From c3efc6aafb0935cd395edc904f371d20bf0ce70a Mon Sep 17 00:00:00 2001 From: YuhangQ Date: Sun, 19 Mar 2023 06:32:08 +0000 Subject: [PATCH] =?UTF-8?q?=E5=BC=95=E5=85=A5=20CCAnr=20=E6=BA=90=E4=BB=A3?= =?UTF-8?q?=E7=A0=81?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- CCAnr/CCAnr+cnc | Bin 0 -> 1844672 bytes CCAnr/Makefile | 3 + CCAnr/basis.cpp | 269 + CCAnr/basis.hpp | 76 + CCAnr/cnc.cpp | 594 + CCAnr/cnc.hpp | 13 + CCAnr/indusLS.cpp | 676 + CCAnr/indusLS.hpp | 21 + CCAnr/license.txt | 48 + CCAnr/main.cc | 274 + CCAnr/readme.txt | 16 + CNC-LS | 1 - ISCAS85/Mylib.lib | 109 - ISCAS85/c1355.bench | 623 - ISCAS85/c17.bench | 17 - ISCAS85/c17.test | 0 ISCAS85/c1908.bench | 942 - ISCAS85/c2670.bench | 1570 - ISCAS85/c2670.test | 0 ISCAS85/c3540.bench | 1745 - ISCAS85/c432.bench | 207 - ISCAS85/c499.bench | 279 - ISCAS85/c5315.bench | 2612 - ISCAS85/c6288.bench | 2484 - ISCAS85/c7552.bench | 3831 - ISCAS85/c880.bench | 473 - ISCAS85/convert.py | 17 - ISCAS85/new/c1355.bench | 623 - ISCAS85/new/c17.bench | 17 - ISCAS85/new/c17.test | 16 - ISCAS85/new/c17.vec | 8 - ISCAS85/new/c1908.bench | 942 - ISCAS85/new/c2670.bench | 1570 - ISCAS85/new/c3540.bench | 1745 - ISCAS85/new/c432.bench | 207 - ISCAS85/new/c499.bench | 279 - ISCAS85/new/c5315.bench | 2612 - ISCAS85/new/c6288.bench | 2484 - ISCAS85/new/c7552.bench | 3831 - ISCAS85/new/c880.bench | 473 - ISCAS85/test.v | 604 - ITC99BENCH/b01.bench | 59 - ITC99BENCH/b02.bench | 35 - ITC99BENCH/b03.bench | 187 - ITC99BENCH/b04.bench | 662 - ITC99BENCH/b06.bench | 72 - ITC99BENCH/b07.bench | 477 - ITC99BENCH/b08.bench | 193 - ITC99BENCH/b09.bench | 172 - ITC99BENCH/b10.bench | 206 - ITC99BENCH/b11.bench | 467 - ITC99BENCH/b12.bench | 1167 - ITC99BENCH/b13.bench | 386 - ITC99BENCH/b17.bench | 25223 ---- ITC99BENCH/b20.bench | 9247 -- ITC99BENCH/b21.bench | 9508 -- ITC99BENCH/b22.bench | 14479 --- atpg | Bin 82544 -> 104504 bytes bench_test/c1355.bench | 623 - bench_test/c1908.bench | 942 - bench_test/c3540.bench | 1745 - bench_test/c499.bench | 279 - bench_test/c6288.bench | 2484 - bench_test/c880.bench | 473 - exp_result/ATPG-LS_b01.bench.txt | 92 - exp_result/ATPG-LS_b03.bench.txt | 101 - exp_result/ATPG-LS_b04.bench.txt | 38440 ------ exp_result/ATPG-LS_b06.bench.txt | 74 - exp_result/ATPG-LS_b07.bench.txt | 53773 -------- exp_result/ATPG-LS_b08.bench.txt | 3653 - exp_result/ATPG-LS_b09.bench.txt | 692 - exp_result/ATPG-LS_b10.bench.txt | 941 - exp_result/ATPG-LS_b11.bench.txt | 24271 ---- exp_result/ATPG-LS_b12.bench.txt | 2941 - exp_result/ATPG-LS_b13.bench.txt | 108628 ---------------- exp_result/ATPG-LS_b17.bench.txt | 10 - exp_result/ATPG-LS_b20.bench.txt | 79 - exp_result/ATPG-LS_b21.bench.txt | 76 - exp_result/ATPG-LS_b22.bench.txt | 22 - exp_result/ATPG-LS_c1355.bench.txt | 12233 -- exp_result/ATPG-LS_c17.bench.txt | 29 - exp_result/ATPG-LS_c1908.bench.txt | 18373 --- exp_result/ATPG-LS_c2670.bench.txt | 13489 -- exp_result/ATPG-LS_c3540.bench.txt | 1312 - exp_result/ATPG-LS_c432.bench.txt | 180163 -------------------------- exp_result/ATPG-LS_c499.bench.txt | 7481 -- exp_result/ATPG-LS_c5315.bench.txt | 2434 - exp_result/ATPG-LS_c6288.bench.txt | 499 - exp_result/ATPG-LS_c7552.bench.txt | 1939 - exp_result/ATPG-LS_c880.bench.txt | 530 - fault-simulator | 1 - gate_encode.txt | 10 - makefile | 2 +- res.txt | 90 - 94 files changed, 1991 insertions(+), 571784 deletions(-) create mode 100644 CCAnr/CCAnr+cnc create mode 100644 CCAnr/Makefile create mode 100644 CCAnr/basis.cpp create mode 100644 CCAnr/basis.hpp create mode 100644 CCAnr/cnc.cpp create mode 100644 CCAnr/cnc.hpp create mode 100644 CCAnr/indusLS.cpp create mode 100644 CCAnr/indusLS.hpp create mode 100644 CCAnr/license.txt create mode 100644 CCAnr/main.cc create mode 100644 CCAnr/readme.txt delete mode 160000 CNC-LS delete mode 100644 ISCAS85/Mylib.lib delete mode 100644 ISCAS85/c1355.bench delete mode 100644 ISCAS85/c17.bench delete mode 100644 ISCAS85/c17.test delete mode 100644 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zfi&G}4X7F)j6bLjct6~6rrK@d(i^;&C)F@hyJ8(t1JRPYZxJwMqh? zUS#=;3V&y(c=DBbsm^%qrX|KNF}`^dwQFyQ_8}d;1ADBY@p>FPu%JBLiB@$@iuVP6 znBNBtGrskyW>zTazmEid>&BZ@aqGq-RKC~wXF+zf{|w{zbG$Tb;2PdJ@0H*L9)sy8IGu48cd^t1Q3D@@2ee zoGvc{7Ja1g4aPSZpZgGQ8e76R#>4O6W8$w}QSHBWMYaEc2mmct(|j-R)>VbKuJ*=j zo?iq$!GE_S@dM*WwIo$0I!~?N;M~-I?3R*0c1z)-{P(ZGHyGbw{Fqjh_0VrRNz~TZ^gvV03Ky%|8Ft=Jmdda`FKUk!ZKl=!0~eef4-)^ z$E)#^qP}d;0_!j9X*|4E?bx6?ZMs~91028P_A~3hDf(YIejtx-yUFp%h_ZiP3*wvN G)cPM^FomT6 literal 0 HcmV?d00001 diff --git a/CCAnr/Makefile b/CCAnr/Makefile new file mode 100644 index 0000000..5eb5ac2 --- /dev/null +++ b/CCAnr/Makefile @@ -0,0 +1,3 @@ +all: basis.hpp basis.cpp cnc.hpp cnc.cpp indusLS.hpp indusLS.cpp main.cpp + g++ -s -O3 -DNDEBUG -static *.cpp -o CCAnr+cnc + diff --git a/CCAnr/basis.cpp b/CCAnr/basis.cpp new file mode 100644 index 0000000..792a203 --- /dev/null +++ b/CCAnr/basis.cpp @@ -0,0 +1,269 @@ +#include "basis.hpp" +#include +#include +#include +#include +#include //these two h files are for linux +#include +#include "cnc.hpp" // cnc_unit_last + +using namespace std; + + +int cutoff_time; + +bool shouldPrint = false; + +/*parameters of the instance*/ +int num_vars; +int num_clauses; + +/* literal arrays */ +lit* var_lit[MAX_VARS]; +int var_lit_count[MAX_VARS]; +lit* clause_lit[MAX_CLAUSES]; +int clause_lit_count[MAX_CLAUSES]; + +lit clause_xor_org[MAX_CLAUSES]; + +int score1[MAX_VARS]; +int score0[MAX_VARS]; + +int tries; +struct _the_best_s the_best; + +static struct tms start; +double get_runtime(void) { + struct tms stop; + times(&stop); + return (double) (stop.tms_utime - start.tms_utime +stop.tms_stime - start.tms_stime) / sysconf(_SC_CLK_TCK); +} +void record_runtime(void) { + times(&start); +} + + + +/* + * Read in the problem. + */ +int build_instance(const char *filename) +{ + char *line = new char[1000000]; + int *temp_lit = new int[MAX_VARS]; + char tempstr1[10]; + char tempstr2[10]; + + + int cur_lit; + int i; + int v,c;//var, clause + + ifstream infile(filename); + if(!infile) + return 0; + + + /*** build problem data structures of the instance ***/ + infile.getline(line,1000000); + while (line[0] != 'p') + infile.getline(line,1000000); + + + sscanf(line, "%s %s %d %d", tempstr1, tempstr2, &num_vars, &num_clauses); + + //cout << num_vars << '\t' << num_clauses << "\n"; + + if(num_vars>=MAX_VARS || num_clauses>=MAX_CLAUSES) + { + //cout<<"c the size of instance exceeds out limitation, please enlarge MAX_VARS and (or) MAX_CLAUSES."<>cur_lit; + while (cur_lit != 0) { + lit_redundent = 0; + for(int p = 0; p < clause_lit_count[c]; p++) + { + if(cur_lit == temp_lit[p]){ + //cout << "c " << filename << ": WARNING! literal " << cur_lit << " redundent in clause " << c + redundent_clause_count << endl; + lit_redundent = 1; + break; + } + else if(cur_lit == -temp_lit[p]){ + //cout << "c " << filename << ": WARNING! conflict variable " << abs(cur_lit) << " detected in the clause " << c + redundent_clause_count << endl; + clause_redundent = 1; + break; + } + } + + if(lit_redundent == 0) + { + temp_lit[clause_lit_count[c]] = cur_lit; + clause_lit_count[c]++; + } + + infile>>cur_lit; + } + + if(clause_redundent == 0) + { + clause_lit[c] = new lit[clause_lit_count[c]+1]; + + clause_xor_org[c].reset(); + for(i=0; i 0) clause_lit[c][i].sense = 1; + else clause_lit[c][i].sense = 0; + + clause_xor_org[c] ^= clause_lit[c][i]; + + var_lit_count[clause_lit[c][i].var_num]++; + } + clause_lit[c][i].var_num=0; + clause_lit[c][i].clause_num = -1; + + c++; + } + else + { + num_clauses--; + clause_lit_count[c] = 0; + redundent_clause_count++; + } + } + + + //creat var literal arrays + for (v=1; v<=num_vars; ++v) + { + var_lit[v] = new lit[var_lit_count[v] + 1]; + var_lit_count[v] = 0; //reset to 0, for build up the array + } + + + //scan all clauses to build up var literal arrays + for (c = 0; c < num_clauses; ++c) + { + for(i=0; i +#include +#include +#include +using std::rand; +using std::swap; +using std::cout; +using std::endl; + +static inline bool with_prob(double p) { + return (rand() % 10000000) * 0.0000001 < p; +} + +static lit org_unitclause_queue[MAX_VARS]; +static int org_unitclause_count; + +static lit unitclause_queue[MAX_VARS]; +static char sense_in_queue[MAX_VARS]; +static int unitclause_queue_beg_pointer, unitclause_queue_end_pointer; +static char clause_delete[MAX_CLAUSES]; +static int cp_clause_lit_count[MAX_CLAUSES]; +static lit clause_xor[MAX_CLAUSES]; +static int fix_soln[MAX_VARS]; + +static int unassigned_var[MAX_VARS]; +static int index_in_unassigned_var[MAX_VARS]; +static int unassigned_count; + +static int clause_delete_count; +static int conflict; + +static float prob; + +static void (* unit_propagation) (); +static bool (* choose_sense) (int); + +double cnc_unit_last; + +static long long cnc_slot_age; // reset on the beginning of the slot + +static long long cnc_age; +static long long vage[MAX_VARS], vage_pos[MAX_VARS], vage_cnt[MAX_VARS]; +static inline void vage_touch(int v, bool sense) { + vage[v] = cnc_age * num_vars + unassigned_count; + vage_pos[v] += sense; + vage_cnt[v]++; +} + + + +struct _canbest_s { + int opt_unsat; + int *soln; +}; + +static struct _canbest_s *canbest; +static int canbest_cap; +static int canbest_count = 0; +static int canbest_max_opt; + +static void canbest_make_space(void) { + if (canbest_count < canbest_cap) + return; + + for (int i = canbest_count - 1; i >= 0; --i) { + if (canbest[i].opt_unsat == canbest_max_opt) { + swap(canbest[i], canbest[--canbest_count]); + return; + } + } + + assert(0); +} + +static void canbest_update_max_opt(void) { + if (canbest_count < canbest_cap) { + canbest_max_opt = num_clauses; + } else { + canbest_max_opt = 0; + for (int i = 0; i < canbest_count; ++i) + if (canbest_max_opt < canbest[i].opt_unsat) + canbest_max_opt = canbest[i].opt_unsat; + } +} + +void cnc_init(int cb_cap) { + for (int c = 0; c < num_clauses; ++c) + if (1 == clause_lit_count[c]) + org_unitclause_queue[org_unitclause_count++] = clause_lit[c][0]; + + canbest_cap = cb_cap; + canbest = new _canbest_s[canbest_cap]; + for (int i = 0; i < canbest_cap; ++i) + canbest[i].soln = new int[num_vars + 1]; + canbest_max_opt = num_clauses; +} + +static inline void remove_unassigned_var(int var) +{ + int index, last_unassigned_var; + + last_unassigned_var = unassigned_var[--unassigned_count]; + index = index_in_unassigned_var[var]; + unassigned_var[index] = last_unassigned_var; + index_in_unassigned_var[last_unassigned_var]=index; +} + +static void assign(int var, bool sense) +{ + assert(var > 0 && var <= num_vars); + assert(1 == sense || 0 == sense); + + int c; + int i; + lit cur; + + vage_touch(var, sense); + + fix_soln[var] = sense; + + remove_unassigned_var(var); + + for(i = 0; iscore0[var]) return 1; + else if(score0[var]>score1[var]) return 0; + else return rand()%2; +} + +//greedy +bool choose_greedy_sense(int var) +{ + int i,c; + lit cur; + + int count1=0, count0=0; + + for(i = 0; icount0) return 1; + else if(count1count0) return 1; + else if(count1 1 && with_prob(cnc_unit_last)) { + int var; + for (int i = 0; i < unitclause_queue_end_pointer; ++i) { + if (unitclause_queue[i].sense != lb_get_last(unitclause_queue[i].var_num)) { + unitclause_queue[i].sense = 1 - unitclause_queue[i].sense; + var = unitclause_queue[i].var_num; + sense_in_queue[var] = unitclause_queue[i].sense; + assert(unitclause_queue[i].sense == lb_get_last(unitclause_queue[i].var_num)); + } + } + } + */ + + + + while (unassigned_count>0) + { + if (clause_delete_count==num_clauses) + { + for (int i=0; i= canbest_max_opt) break; + } + + if (conflict < canbest_max_opt) { + if (the_best.opt_try != tries && conflict < the_best.opt_unsat) { + // Best solution has been searched by LS, or init + update_best_soln(conflict, fix_soln, 1); + //cout << "c CNC_UPDATE_AT\t" << cnc_slot_age << "\t" << cnc_age << "\t" << tries << endl; + } else if (the_best.opt_try == tries && conflict < the_best.opt_unsat) { + // We have updated the best soln in this time slot + // We found a better soln than the_best, and this the_best has not been searched by LS. + // So move the_best to canbest, and update the_best by this new soln + canbest_make_space(); + swap(the_best.soln, canbest[canbest_count].soln); + canbest[canbest_count].opt_unsat = the_best.opt_unsat; + canbest_count++; + + update_best_soln(conflict, fix_soln, 1); + //cout << "c CNC_UPDATE_AT\t" << cnc_slot_age << "\t" << cnc_age << "\t" << tries << endl; + } else { + canbest_make_space(); + canbest[canbest_count].opt_unsat = conflict; + for (int v = 1; v <= num_vars; ++v) + canbest[canbest_count].soln[v] = fix_soln[v]; + canbest_count++; + } + + canbest_update_max_opt(); + } +} + +bool cnc_get_canbest(const int* &soln, int &opt) { + if (0 == canbest_count) + return false; + + opt = canbest[0].opt_unsat; + int pos = 0; + for (int i = 1; i < canbest_count; ++i) { + if (opt > canbest[i].opt_unsat) { + opt = canbest[i].opt_unsat; + pos = i; + } + } + soln = canbest[pos].soln; + swap(canbest[pos], canbest[--canbest_count]); + canbest_update_max_opt(); + + return true; +} + +void cnc_process(long long step_num) { + cnc_slot_age = 0; + + ++step_num; + while (--step_num) { + cnc_process_one(); + } +} diff --git a/CCAnr/cnc.hpp b/CCAnr/cnc.hpp new file mode 100644 index 0000000..c2962be --- /dev/null +++ b/CCAnr/cnc.hpp @@ -0,0 +1,13 @@ +#ifndef _CNC_H_ +#define _CNC_H_ + +extern double cnc_unit_last; +extern double lb_last_prob; +extern double refer_gbest_prob; +extern int vage_window; + +void cnc_init(int cb_cap); +void cnc_process(const long long step_num); +bool cnc_get_canbest(const int* &soln, int &opt); + +#endif diff --git a/CCAnr/indusLS.cpp b/CCAnr/indusLS.cpp new file mode 100644 index 0000000..b780151 --- /dev/null +++ b/CCAnr/indusLS.cpp @@ -0,0 +1,676 @@ +#include "basis.hpp" +#include +#include +#include +#include + +using namespace std; + +#define pop(stack) stack[--stack ## _fill_pointer] +#define push(item, stack) stack[stack ## _fill_pointer++] = item + +#define sigscore ave_weight //significant score needed for aspiration + +/* Information about the variables. */ +static int score[MAX_VARS]; +static int conf_change[MAX_VARS]; +static long long time_stamp[MAX_VARS]; + +static int* var_neighbor[MAX_VARS]; + +/* Information about the clauses */ +static int clause_weight[MAX_CLAUSES]; +static int sat_count[MAX_CLAUSES]; +static int sat_var[MAX_CLAUSES]; + +//unsat clauses stack +static int unsat_stack[MAX_CLAUSES]; //store the unsat clause number +static int unsat_stack_fill_pointer; // NEED TO UPDATE IN RESTART PROCEDURE +static int index_in_unsat_stack[MAX_CLAUSES];//which position is a clause in the unsat_stack + +//variables in unsat clauses +static int unsatvar_stack[MAX_VARS]; +static int unsatvar_stack_fill_pointer; // NEED TO UPDATE IN RESTART PROCEDURE +static int index_in_unsatvar_stack[MAX_VARS]; +static int unsat_app_count[MAX_VARS]; //a varible appears in how many unsat clauses + +//configuration changed decreasing variables (score>0 and confchange=1) +static int goodvar_stack[MAX_VARS]; +static int goodvar_stack_fill_pointer; // NEED TO UPDATE IN RESTART PROCEDURE +static int already_in_goodvar_stack[MAX_VARS]; + +/* Information about solution */ +static int cur_soln[MAX_VARS]; //the current solution, with 1's for True variables, and 0's for False variables + +//cutoff +static long long step; // LS私有step，每次init之后置为零 + +int balancePar; + +bool aspiration_active; + + + + +// local search local best +// which is the best soln in this time slot +static int lb_soln[MAX_VARS]; +static int lb_opt; +static void lb_copy(void) { + for (int v = 1; v <= num_vars; v++) + lb_soln[v] = cur_soln[v]; +} +static int lb_pos[MAX_VARS], lb_neg[MAX_VARS]; +static void lb_update(int mut) { + for (int v = 1; v <= num_vars; v++) { + assert(0 == lb_soln[v] || 1 == lb_soln[v]); + lb_pos[v] += lb_soln[v] * mut; + lb_neg[v] += !lb_soln[v] * mut; + } +} +bool lb_get_prob(int v) { + int sum = lb_pos[v] + lb_neg[v]; + if (0 == sum) { + //return lb_soln[v]; + return rand() & 1; + } else { + return (rand() % sum) < lb_pos[v]; + } +} +bool lb_get_last(int v) { + if (lb_neg[v] + lb_pos[v]) + return lb_soln[v]; + else + return rand() & 1; +} + + + + +void build_neighbor_relation(void) +{ + int *neighbor_flag = new int[MAX_VARS]; + int *temp_neighbor = new int[MAX_VARS]; + + int temp_neighbor_count; + int i,j,count; + int v,c,n; + + for(v=1; v<=num_vars; ++v) + { + //if(fix[v]==1) continue; + + neighbor_flag[v] = 1; + temp_neighbor_count = 0; + + for(i=0; ivar_num)!=0; p++) + { + unsat_app_count[v]++; + if(unsat_app_count[v]==1) + { + index_in_unsatvar_stack[v] = unsatvar_stack_fill_pointer; + push(v,unsatvar_stack); + } + } +} + +static inline void sat(int clause) +{ + int index,last_unsat_clause; + + //since the clause is satisfied, its position can be reused to store the last_unsat_clause + last_unsat_clause = pop(unsat_stack); + index = index_in_unsat_stack[clause]; + unsat_stack[index] = last_unsat_clause; + index_in_unsat_stack[last_unsat_clause] = index; + + //update appreance count of each var in unsat clause and update stack of vars in unsat clauses + int v,last_unsat_var; + for(lit* p=clause_lit[clause]; (v=p->var_num)!=0; p++) + { + unsat_app_count[v]--; + if(unsat_app_count[v]==0) + { + last_unsat_var = pop(unsatvar_stack); + index = index_in_unsatvar_stack[v]; + unsatvar_stack[index] = last_unsat_var; + index_in_unsatvar_stack[last_unsat_var] = index; + } + } +} + +static void flip(int flipvar) +{ + cur_soln[flipvar] = 1 - cur_soln[flipvar]; + + int v,c; + + lit* clause_c; + + int org_flipvar_score = score[flipvar]; + + //update related clauses and neighbor vars + for(lit *q = var_lit[flipvar]; (c=q->clause_num)>=0; q++) + { + clause_c = clause_lit[c]; + if(cur_soln[flipvar] == q->sense) + { + ++sat_count[c]; + + if (sat_count[c] == 2) //sat_count from 1 to 2 + score[sat_var[c]] += clause_weight[c]; + else if (sat_count[c] == 1) // sat_count from 0 to 1 + { + sat_var[c] = flipvar;//record the only true lit's var + for(lit* p=clause_c; (v=p->var_num)!=0; p++) score[v] -= clause_weight[c]; + + sat(c); + } + } + else // cur_soln[flipvar] != cur_lit.sense + { + --sat_count[c]; + if (sat_count[c] == 1) //sat_count from 2 to 1 + { + for(lit* p=clause_c; (v=p->var_num)!=0; p++) + { + if(p->sense == cur_soln[v] ) + { + score[v] -= clause_weight[c]; + sat_var[c] = v; + break; + } + } + } + else if (sat_count[c] == 0) //sat_count from 1 to 0 + { + for(lit* p=clause_c; (v=p->var_num)!=0; p++) score[v] += clause_weight[c]; + unsat(c); + }//end else if + + }//end else + } + + score[flipvar] = -org_flipvar_score; + + /*update CCD */ + int index; + + conf_change[flipvar] = 0; + //remove the vars no longer goodvar in goodvar stack + for(index=goodvar_stack_fill_pointer-1; index>=0; index--) + { + v = goodvar_stack[index]; + if(score[v]<=0) + { + goodvar_stack[index] = pop(goodvar_stack); + already_in_goodvar_stack[v] = 0; + } + } + + //update all flipvar's neighbor's conf_change to be 1, add goodvar + int* p; + for(p=var_neighbor[flipvar]; (v=*p)!=0; p++) + { + conf_change[v] = 1; + + if(score[v]>0 && already_in_goodvar_stack[v] ==0) + { + push(v,goodvar_stack); + already_in_goodvar_stack[v] = 1; + } + } +} + + +/*************weighting ************************************************/ + +// swt +static int ave_weight=1; +static int delta_total_weight=0; +int threshold; +float p_scale;//w=w*p+ave_w*q +float q_scale; +int scale_ave;//scale_ave==ave_weight*q_scale + + +static void smooth_clause_weights_swt(void) +{ + int j,c,v; + int new_total_weight=0; + + for (v=1; v<=num_vars; ++v) + score[v] = 0; + + //smooth clause score and update score of variables + for (c = 0; c0 && conf_change[v]==1) { + already_in_goodvar_stack[v] = 1; + push(v,goodvar_stack); + } else { + already_in_goodvar_stack[v] = 0; + } + } + + ave_weight=new_total_weight/num_clauses; +} + +static void weighting_swt(void) +{ + int i,v; + + for(i=0; i < unsat_stack_fill_pointer; ++i) + clause_weight[unsat_stack[i]]++; + + for(i=0; i0 && conf_change[v]==1 && already_in_goodvar_stack[v] ==0) + if(score[v]>0 && already_in_goodvar_stack[v] ==0) + { + push(v,goodvar_stack); + already_in_goodvar_stack[v] =1; + } + } + + delta_total_weight+=unsat_stack_fill_pointer; + if(delta_total_weight>=num_clauses) + { + ave_weight+=1; + delta_total_weight -= num_clauses; + + //smooth weights + if(ave_weight>threshold) + smooth_clause_weights_swt(); + } +} + + + + +/**********************************PAWS weighting*************************************************/ +const int dec_weight =1; +const float MY_RAND_MAX_FLOAT = 10000000.0; +const int MY_RAND_MAX_INT = 10000000; +const float BASIC_SCALE = 0.0000001; //1.0f/MY_RAND_MAX_FLOAT; +float smooth_probability; +int large_clause_count_threshold; + +//for PAWS (for large ksat) +int large_weight_clauses[MAX_CLAUSES]; +int large_weight_clauses_count=0; + + +void inc_clause_weights_paws() +{ + int i, j, c, v; + + for(i=0; i < unsat_stack_fill_pointer; ++i) + { + c = unsat_stack[i]; + clause_weight[c]++; + if(clause_weight[c] == 2) + { + large_weight_clauses[large_weight_clauses_count++] = c; + } + } + + for(i=0; i0 && conf_change[v]>0 && already_in_goodvar_stack[v] ==0)// + { + push(v,goodvar_stack); + already_in_goodvar_stack[v] =1; + } + } + +} + +void smooth_clause_weights_paws() +{ + int i, j,clause, var; + for(i=0; i0) + { + clause_weight[clause]-=dec_weight; + + if(clause_weight[clause]==1) + { + large_weight_clauses[i] = large_weight_clauses[--large_weight_clauses_count]; + i--; + } + if(sat_count[clause] == 1) + { + var = sat_var[clause]; + score[var]+=dec_weight; + if(score[var]>0 && conf_change[var]>0 && already_in_goodvar_stack[var]==0) + { + push(var,goodvar_stack); + already_in_goodvar_stack[var]=1; + } + } + } + } + +} + +void weighting_paws() +{ + if( ((rand()%MY_RAND_MAX_INT)*BASIC_SCALE)large_clause_count_threshold ) + smooth_clause_weights_paws(); + else + inc_clause_weights_paws(); +} + +/**************************setting clause weighting scheme***********************/ + +void (* update_clause_weights)(); + +void default_clause_weighting(int weighting_type) +{ + if(weighting_type==1) + { + //swt + update_clause_weights = weighting_swt; + threshold=50;//560; // 500 + p_scale=0.3;//0.52; + q_scale=0.7;//0.42; + scale_ave=(threshold+1)*q_scale; + } + else + { + //paws + update_clause_weights = weighting_paws; + smooth_probability = 0.1; + large_clause_count_threshold = 10;//do we need this parameter? + } + +} + +/********************************************end weighting************************************/ + +static int pick_var(void) +{ + int i,k,c,v; + int best_var; + lit* clause_c; + + /**Greedy Mode**/ + /*CCD (configuration changed decreasing) mode, the level with configuation chekcing*/ + if(goodvar_stack_fill_pointer>0) + { + + //if(goodvar_stack_fill_pointerscore[best_var]) best_var = v; + else if(score[v]==score[best_var]) + { + //if(unsat_app_count[v]>unsat_app_count[best_var]) best_var = v; + //else if(unsat_app_count[v]==unsat_app_count[best_var]&&time_stamp[v]score[best_var]) best_var = v; + else if(score[v]==score[best_var]) + { + //if(unsat_app_count[v]>unsat_app_count[best_var]) best_var = v; + //else if(unsat_app_count[v]==unsat_app_count[best_var]&&time_stamp[v]ave_weight) + { + best_var = unsatvar_stack[i]; + break; + } + } + + for(++i; iscore[best_var]) best_var = v; + else if(score[v]==score[best_var] && time_stamp[v]score[best_var]) best_var = v; + //else if(score[v]==score[best_var]&&time_stamp[v]unsat_app_count[best_var]) best_var = v; + //else if(unsat_app_count[v]==unsat_app_count[best_var] && time_stamp[v]score[best_var]) best_var = v; + else if(score[v]==score[best_var]&&time_stamp[v]0) { + already_in_goodvar_stack[v] = 1; + push(v,goodvar_stack); + } else { + already_in_goodvar_stack[v] = 0; + } + } + + //setting for the virtual var 0 + time_stamp[0] = 0; + + lb_opt = opt; + lb_copy(); + + +} + +int lb_update_reduce; +void ls_process(long long no_improv_times) { + int flipvar; + long long notime = 1 + no_improv_times; + while (--notime) { + step++; + + flipvar = pick_var(); + flip(flipvar); + time_stamp[flipvar] = step; + + if (unsat_stack_fill_pointer < lb_opt) { + lb_opt = unsat_stack_fill_pointer; + lb_copy(); + notime = 1 + no_improv_times; + } + + if (unsat_stack_fill_pointer < the_best.opt_unsat) { + update_best_value(unsat_stack_fill_pointer); + lb_update(tries); + + if(the_best.opt_unsat==0) { + ls_update_best_soln(); + return; + } + } + + if (get_runtime() >= cutoff_time) { + return; + } + + } + + int b = tries / lb_update_reduce; + if (0 == b) + b = 1; + lb_update(b); +} + diff --git a/CCAnr/indusLS.hpp b/CCAnr/indusLS.hpp new file mode 100644 index 0000000..109759a --- /dev/null +++ b/CCAnr/indusLS.hpp @@ -0,0 +1,21 @@ +#ifndef _INDUSLS_HPP_ +#define _INDUSLS_HPP_ + +extern int balancePar; +extern int lb_update_reduce; +extern bool aspiration_active; + +extern int threshold; +extern float p_scale;//w=w*p+ave_w*q +extern float q_scale; + +void ls_init(void); +void ls_process(long long no_improv_times); +void ls_restart(const int *soln, const int opt); + +void default_clause_weighting(int weighting_type); + +bool lb_get_prob(int v); +bool lb_get_last(int v); + +#endif diff --git a/CCAnr/license.txt b/CCAnr/license.txt new file mode 100644 index 0000000..88d9199 --- /dev/null +++ b/CCAnr/license.txt @@ -0,0 +1,48 @@ +MiniSat -- Copyright (c) 2003-2006, Niklas Een, Niklas Sorensson + Copyright (c) 2007-2010 Niklas Sorensson +Glucose -- Copyright (c) 2009-2012, Gilles Audemard, Laurent Simon +Coprocessor -- Copyright (c) 2012-2014, Norbert Manthey +CCAnr+cnc -- Copyright (c) 2021, Shaowei Cai, Chuan Luo + +Permission is hereby granted, free of charge, to use this software for +evaluation and research purposes. + +The permission to use the code of Coprocessor within the submission +of the solver CPSparrow version sc14 for the SAT Competition 2014 +has been granted. + +This license does not allow this software to be used in a commercial context. + +It is further prohibited to use this software or a substantial portion of it +in a competition or a similar competetive event, such as the SAT, SMT or QBF, +MaxSAT or HWMCC competitions or evaluations, without explicit written +permission by the copyright holder. + +However, competition organizers are allowed to use this software as part of +the evaluation process of a particular competition, evaluation or +competetive event, if the copyright holder of this software submitted this +software to this particular competition, evaluation or event explicitly. + +This permission of using the software as part of a submission by the +copyright holder to a competition, evaluation or competive event is only +granted for one year and only for one particular instance of the competition +to which this software was submitted by the copyright holder. + +If a competition, evaluation or competetive event has multiple tracks, +categories or sub-competitions, this license is only granted for the tracks +respectively categories or sub-competitions, to which the software was +explicitly submitted by the copyright holder. + +All other usage is reserved. + +The above copyright notice and this permission notice shall be included in +all copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS +IN THE SOFTWARE. + diff --git a/CCAnr/main.cc b/CCAnr/main.cc new file mode 100644 index 0000000..a715634 --- /dev/null +++ b/CCAnr/main.cc @@ -0,0 +1,274 @@ +#include "basis.hpp" +#include "cnc.hpp" +#include "indusLS.hpp" +#include +#include +#include +#include +#include +#include "indusLS.hpp" +using namespace std; + +static void doLS_dynamic(void); +static void doLS_static(void); + +char * inst; +int seed; + +static int cnc_times, ls_no_improv_times; +static int cb_cap; +static void (*doLS) (void); + +int weighting_type; + +static void default_settings(void) { + ios::sync_with_stdio(false); + + cnc_times = 5; + ls_no_improv_times = 50000000; + doLS = doLS_dynamic; + + cb_cap = 50; + balancePar = 40;// no use; + lb_last_prob = 1; + lb_update_reduce = 1; + vage_window = 10; + + aspiration_active = false; + + weighting_type = 1; //1->SWT; 2->PAWS + default_clause_weighting(weighting_type); + + seed = 1; + cutoff_time = 3600; +} + +static void doLsRestartToCanBest(void) { + const int *soln; + int opt; + if (cnc_get_canbest(soln, opt)) { + //cout << "c LS force restart to opt=" << opt << " at " << get_runtime() << endl; + ls_restart(soln, opt); + } +} + +static void doLsRestartToBest(void) { + ls_restart(the_best.soln, the_best.opt_unsat); +} + + +static void doCNC(void) { + cnc_process(cnc_times); + //if (the_best.opt_try == tries) + // cout << "c CNC update: " << the_best.opt_unsat << " at " << the_best.opt_time << endl; +} + + +int max_no_improv_times=20000000; +static void doLS_dynamic(void) { + if (ls_no_improv_times*tries=argc) return false; + inst = argv[i]; + flag_inst = true; + continue; + } + else if(strcmp(argv[i],"-seed")==0) + { + i++; + if(i>=argc) return false; + sscanf(argv[i], "%d", &seed); + continue; + } + else if(strcmp(argv[i],"-cutoff_time")==0) + { + i++; + if(i>=argc) return false; + sscanf(argv[i], "%d", &cutoff_time); + continue; + } + + else if(strcmp(argv[i],"-aspiration")==0) + { + i++; + if(i>=argc) return false; + int tmp; + sscanf(argv[i], "%d", &tmp); + if (tmp==1) + aspiration_active = true; + else aspiration_active = false; + continue; + } + + else if(strcmp(argv[i],"-swt_threshold")==0) + { + i++; + if(i>=argc) return false; + sscanf(argv[i], "%d", &threshold); + continue; + } + else if(strcmp(argv[i],"-swt_p")==0) + { + i++; + if(i>=argc) return false; + sscanf(argv[i], "%f", &p_scale); + continue; + } + else if(strcmp(argv[i],"-swt_q")==0) + { + i++; + if(i>=argc) return false; + sscanf(argv[i], "%f", &q_scale); + continue; + } + + + else if(strcmp(argv[i],"-dynamic")==0) + { + i++; + if(i>=argc) return false; + if(strcmp(argv[i], "0")==0) + { + doLS = doLS_static; + continue; + } + else if(strcmp(argv[i], "1")==0) + { + doLS = doLS_dynamic; + continue; + } + else return false; + } + else if(strcmp(argv[i],"-cnctimes")==0) + { + i++; + if(i>=argc) return false; + sscanf(argv[i], "%d", &cnc_times); + continue; + } + else if(strcmp(argv[i],"-ls_no_improv_steps")==0){ + i++; + if(i>=argc) return false; + sscanf(argv[i], "%d", &ls_no_improv_times); + continue; + } + else return false; + + } + + if (flag_inst) return true; + else return false; + +} + +int main(int argc, char* argv[]) { + + int ret; + + ret = parse_arguments(argc, argv); + if(!ret) {cout<<"c Arguments Error!"<= cutoff_time - 90) { + shouldPrint = true; + print_best_solution(); + } + } else { + const double now = get_runtime(); + double left = 2 * now / tries; // the time needed for two `CNC-LS' rounds + if (left < 10.0) + left = 10.0; + // 6s to 10s are left. + if (now >= cutoff_time - left) { + break; + } + }*/ + const double now = get_runtime(); + if (now >= cutoff_time) { + break; + } + } + + //cout << "c TotalTry=" << tries << endl; + //cout << "c Finished at " << get_runtime() << endl; + //cout << "c " << inst << "\t" << the_best.opt_unsat << '\t' << the_best.opt_time << endl; + + cout<<"s "; + if (0==the_best.opt_unsat && verify_sol() ) { + cout<<"SATISFIABLE"< + -seed + -cutoff_time + -dynamic {0,1} ##0 indicates performing non-dynamic method; 1 indicates performing dynamic method + -cnctimes ##indicate the value of cnc_times underlying CCAnr+cnc + -ls_no_improv_steps ##indicate the value of MaxNoImprSteps underlying CCAnr+cnc + -swt_p <\rho> ##indicate the value of \rho underlying CCAnr + -swt_q ##indicate the value of q underlying CCAnr + -swt_threshold <\gamma> ##indicate the value of \gamma underlying CCAnr diff --git a/CNC-LS b/CNC-LS deleted file mode 160000 index d912260..0000000 --- a/CNC-LS +++ /dev/null @@ -1 +0,0 @@ -Subproject commit d9122607522ea757b3412f1cff247b9db6c79c55 diff --git a/ISCAS85/Mylib.lib b/ISCAS85/Mylib.lib deleted file mode 100644 index ca79f58..0000000 --- a/ISCAS85/Mylib.lib +++ /dev/null @@ -1,109 +0,0 @@ -library(demo) { - -cell(NAND4) { -area: 15; -pin(A) { direction: input; } -pin(B) { direction: input; } -pin(C) { direction: input; } -pin(D) { direction: input; } -pin(Y) { direction: output; function: "(A*B*C*D)'"; } } - -cell(NAND3) { -area: 12; -pin(A) { direction: input; } -pin(B) { direction: input; } -pin(C) { direction: input; } -pin(Y) { direction: output; function: "(A*B*C)'"; } } - -cell(NAND2) { -area: 10; -pin(A) { direction: input; } -pin(B) { direction: input; } -pin(Y) { direction: output; function: "(A*B)'"; } } - -cell(AND4) { -area: 20; -pin(A) { direction: input; } -pin(B) { direction: input; } -pin(C) { direction: input; } -pin(D) { direction: input; } -pin(Y) { direction: output; function: "(A*B*C*D)"; } } - -cell(AND3) { -area: 15; -pin(A) { direction: input; } -pin(B) { direction: input; } -pin(C) { direction: input; } -pin(Y) { direction: output; function: "(A*B*C)"; } } - -cell(AND2) { -area: 12; -pin(A) { direction: input; } -pin(B) { direction: input; } -pin(Y) { direction: output; function: "(A*B)"; } } - -cell(NOR4) { -area: 20; -pin(A) { direction: input; } -pin(B) { direction: input; } -pin(C) { direction: input; } -pin(D) { direction: input; } -pin(Y) { direction: output; function: "(A+B+C+D)'"; } } - -cell(NOR3) { -area: 15; -pin(A) { direction: input; } -pin(B) { direction: input; } -pin(C) { direction: input; } -pin(Y) { direction: output; function: "(A+B+C)'"; } } - -cell(NOR2) { -area: 10; -pin(A) { direction: input; } -pin(B) { direction: input; } -pin(Y) { direction: output; function: "(A+B)'"; } } - -cell(OR4) { -area: 20; -pin(A) { direction: input; } -pin(B) { direction: input; } -pin(C) { direction: input; } -pin(D) { direction: input; } -pin(Y) { direction: output; function: "(A+B+C+D)"; } } - -cell(OR3) { -area: 15; -pin(A) { direction: input; } -pin(B) { direction: input; } -pin(C) { direction: input; } -pin(Y) { direction: output; function: "(A+B+C)"; } } - -cell(OR2) { -area: 10; -pin(A) { direction: input; } -pin(B) { direction: input; } -pin(Y) { direction: output; function: "(A+B)"; } } - -cell(XNOR2) { -area: 25; -pin(A) { direction: input; } -pin(B) { direction: input; } -pin(Y) { direction: output; function: "(A^B)'"; } } - -cell(XOR2) { -area: 25; -pin(A) { direction: input; } -pin(B) { direction: input; } -pin(Y) { direction: output; function: "(A^B)"; } } - -cell(BUF) { -area: 12; -pin(A) { direction: input; } -pin(Y) { direction: output; function: "A"; } } - -cell(NOT) { -area: 6; -pin(A) { direction: input; } -pin(Y) { direction: output; function: "A'"; } } - -} \ No newline at end of file diff --git a/ISCAS85/c1355.bench b/ISCAS85/c1355.bench deleted file mode 100644 index 7880a3e..0000000 --- a/ISCAS85/c1355.bench +++ /dev/null @@ -1,623 +0,0 @@ -# c1355 - -INPUT(1) -INPUT(8) -INPUT(15) -INPUT(22) -INPUT(29) -INPUT(36) -INPUT(43) -INPUT(50) -INPUT(57) -INPUT(64) -INPUT(71) -INPUT(78) -INPUT(85) -INPUT(92) -INPUT(99) -INPUT(106) -INPUT(113) -INPUT(120) -INPUT(127) -INPUT(134) -INPUT(141) -INPUT(148) -INPUT(155) -INPUT(162) -INPUT(169) -INPUT(176) -INPUT(183) -INPUT(190) -INPUT(197) -INPUT(204) -INPUT(211) -INPUT(218) -INPUT(225) -INPUT(226) -INPUT(227) -INPUT(228) -INPUT(229) -INPUT(230) -INPUT(231) -INPUT(232) -INPUT(233) - -OUTPUT(1324) -OUTPUT(1325) -OUTPUT(1326) -OUTPUT(1327) -OUTPUT(1328) -OUTPUT(1329) -OUTPUT(1330) -OUTPUT(1331) -OUTPUT(1332) -OUTPUT(1333) -OUTPUT(1334) -OUTPUT(1335) -OUTPUT(1336) -OUTPUT(1337) -OUTPUT(1338) -OUTPUT(1339) -OUTPUT(1340) -OUTPUT(1341) -OUTPUT(1342) -OUTPUT(1343) -OUTPUT(1344) -OUTPUT(1345) -OUTPUT(1346) -OUTPUT(1347) -OUTPUT(1348) -OUTPUT(1349) -OUTPUT(1350) -OUTPUT(1351) -OUTPUT(1352) -OUTPUT(1353) -OUTPUT(1354) -OUTPUT(1355) - -242 = AND(225, 233) -245 = AND(226, 233) -248 = AND(227, 233) -251 = AND(228, 233) -254 = AND(229, 233) -257 = AND(230, 233) -260 = AND(231, 233) -263 = AND(232, 233) -266 = NAND(1, 8) -269 = NAND(15, 22) -272 = NAND(29, 36) -275 = NAND(43, 50) -278 = NAND(57, 64) -281 = NAND(71, 78) -284 = NAND(85, 92) -287 = NAND(99, 106) -290 = NAND(113, 120) -293 = NAND(127, 134) -296 = NAND(141, 148) -299 = NAND(155, 162) -302 = NAND(169, 176) -305 = NAND(183, 190) -308 = NAND(197, 204) -311 = NAND(211, 218) -314 = NAND(1, 29) -317 = NAND(57, 85) -320 = NAND(8, 36) -323 = NAND(64, 92) -326 = NAND(15, 43) -329 = NAND(71, 99) -332 = NAND(22, 50) -335 = NAND(78, 106) -338 = NAND(113, 141) -341 = NAND(169, 197) -344 = NAND(120, 148) -347 = NAND(176, 204) -350 = NAND(127, 155) -353 = NAND(183, 211) -356 = NAND(134, 162) -359 = NAND(190, 218) -362 = NAND(1, 266) -363 = NAND(8, 266) -364 = NAND(15, 269) -365 = NAND(22, 269) -366 = NAND(29, 272) -367 = NAND(36, 272) -368 = NAND(43, 275) -369 = NAND(50, 275) -370 = NAND(57, 278) -371 = NAND(64, 278) -372 = NAND(71, 281) -373 = NAND(78, 281) -374 = NAND(85, 284) -375 = NAND(92, 284) -376 = NAND(99, 287) -377 = NAND(106, 287) -378 = NAND(113, 290) -379 = NAND(120, 290) -380 = NAND(127, 293) -381 = NAND(134, 293) -382 = NAND(141, 296) -383 = NAND(148, 296) -384 = NAND(155, 299) -385 = NAND(162, 299) -386 = NAND(169, 302) -387 = NAND(176, 302) -388 = NAND(183, 305) -389 = NAND(190, 305) -390 = NAND(197, 308) -391 = NAND(204, 308) -392 = NAND(211, 311) -393 = NAND(218, 311) -394 = NAND(1, 314) -395 = NAND(29, 314) -396 = NAND(57, 317) -397 = NAND(85, 317) -398 = NAND(8, 320) -399 = NAND(36, 320) -400 = NAND(64, 323) -401 = NAND(92, 323) -402 = NAND(15, 326) -403 = NAND(43, 326) -404 = NAND(71, 329) -405 = NAND(99, 329) -406 = NAND(22, 332) -407 = NAND(50, 332) -408 = NAND(78, 335) -409 = NAND(106, 335) -410 = NAND(113, 338) -411 = NAND(141, 338) -412 = NAND(169, 341) -413 = NAND(197, 341) -414 = NAND(120, 344) -415 = NAND(148, 344) -416 = NAND(176, 347) -417 = NAND(204, 347) -418 = NAND(127, 350) -419 = NAND(155, 350) -420 = NAND(183, 353) -421 = NAND(211, 353) -422 = NAND(134, 356) -423 = NAND(162, 356) -424 = NAND(190, 359) -425 = NAND(218, 359) -426 = NAND(362, 363) -429 = NAND(364, 365) -432 = NAND(366, 367) -435 = NAND(368, 369) -438 = NAND(370, 371) -441 = NAND(372, 373) -444 = NAND(374, 375) -447 = NAND(376, 377) -450 = NAND(378, 379) -453 = NAND(380, 381) -456 = NAND(382, 383) -459 = NAND(384, 385) -462 = NAND(386, 387) -465 = NAND(388, 389) -468 = NAND(390, 391) -471 = NAND(392, 393) -474 = NAND(394, 395) -477 = NAND(396, 397) -480 = NAND(398, 399) -483 = NAND(400, 401) -486 = NAND(402, 403) -489 = NAND(404, 405) -492 = NAND(406, 407) -495 = NAND(408, 409) -498 = NAND(410, 411) -501 = NAND(412, 413) -504 = NAND(414, 415) -507 = NAND(416, 417) -510 = NAND(418, 419) -513 = NAND(420, 421) -516 = NAND(422, 423) -519 = NAND(424, 425) -522 = NAND(426, 429) -525 = NAND(432, 435) -528 = NAND(438, 441) -531 = NAND(444, 447) -534 = NAND(450, 453) -537 = NAND(456, 459) -540 = NAND(462, 465) -543 = NAND(468, 471) -546 = NAND(474, 477) -549 = NAND(480, 483) -552 = NAND(486, 489) -555 = NAND(492, 495) -558 = NAND(498, 501) -561 = NAND(504, 507) -564 = NAND(510, 513) -567 = NAND(516, 519) -570 = NAND(426, 522) -571 = NAND(429, 522) -572 = NAND(432, 525) -573 = NAND(435, 525) -574 = NAND(438, 528) -575 = NAND(441, 528) -576 = NAND(444, 531) -577 = NAND(447, 531) -578 = NAND(450, 534) -579 = NAND(453, 534) -580 = NAND(456, 537) -581 = NAND(459, 537) -582 = NAND(462, 540) -583 = NAND(465, 540) -584 = NAND(468, 543) -585 = NAND(471, 543) -586 = NAND(474, 546) -587 = NAND(477, 546) -588 = NAND(480, 549) -589 = NAND(483, 549) -590 = NAND(486, 552) -591 = NAND(489, 552) -592 = NAND(492, 555) -593 = NAND(495, 555) -594 = NAND(498, 558) -595 = NAND(501, 558) -596 = NAND(504, 561) -597 = NAND(507, 561) -598 = NAND(510, 564) -599 = NAND(513, 564) -600 = NAND(516, 567) -601 = NAND(519, 567) -602 = NAND(570, 571) -607 = NAND(572, 573) -612 = NAND(574, 575) -617 = NAND(576, 577) -622 = NAND(578, 579) -627 = NAND(580, 581) -632 = NAND(582, 583) -637 = NAND(584, 585) -642 = NAND(586, 587) -645 = NAND(588, 589) -648 = NAND(590, 591) -651 = NAND(592, 593) -654 = NAND(594, 595) -657 = NAND(596, 597) -660 = NAND(598, 599) -663 = NAND(600, 601) -666 = NAND(602, 607) -669 = NAND(612, 617) -672 = NAND(602, 612) -675 = NAND(607, 617) -678 = NAND(622, 627) -681 = NAND(632, 637) -684 = NAND(622, 632) -687 = NAND(627, 637) -690 = NAND(602, 666) -691 = NAND(607, 666) -692 = NAND(612, 669) -693 = NAND(617, 669) -694 = NAND(602, 672) -695 = NAND(612, 672) -696 = NAND(607, 675) -697 = NAND(617, 675) -698 = NAND(622, 678) -699 = NAND(627, 678) -700 = NAND(632, 681) -701 = NAND(637, 681) -702 = NAND(622, 684) -703 = NAND(632, 684) -704 = NAND(627, 687) -705 = NAND(637, 687) -706 = NAND(690, 691) -709 = NAND(692, 693) -712 = NAND(694, 695) -715 = NAND(696, 697) -718 = NAND(698, 699) -721 = NAND(700, 701) -724 = NAND(702, 703) -727 = NAND(704, 705) -730 = NAND(242, 718) -733 = NAND(245, 721) -736 = NAND(248, 724) -739 = NAND(251, 727) -742 = NAND(254, 706) -745 = NAND(257, 709) -748 = NAND(260, 712) -751 = NAND(263, 715) -754 = NAND(242, 730) -755 = NAND(718, 730) -756 = NAND(245, 733) -757 = NAND(721, 733) -758 = NAND(248, 736) -759 = NAND(724, 736) -760 = NAND(251, 739) -761 = NAND(727, 739) -762 = NAND(254, 742) -763 = NAND(706, 742) -764 = NAND(257, 745) -765 = NAND(709, 745) -766 = NAND(260, 748) -767 = NAND(712, 748) -768 = NAND(263, 751) -769 = NAND(715, 751) -770 = NAND(754, 755) -773 = NAND(756, 757) -776 = NAND(758, 759) -779 = NAND(760, 761) -782 = NAND(762, 763) -785 = NAND(764, 765) -788 = NAND(766, 767) -791 = NAND(768, 769) -794 = NAND(642, 770) -797 = NAND(645, 773) -800 = NAND(648, 776) -803 = NAND(651, 779) -806 = NAND(654, 782) -809 = NAND(657, 785) -812 = NAND(660, 788) -815 = NAND(663, 791) -818 = NAND(642, 794) -819 = NAND(770, 794) -820 = NAND(645, 797) -821 = NAND(773, 797) -822 = NAND(648, 800) -823 = NAND(776, 800) -824 = NAND(651, 803) -825 = NAND(779, 803) -826 = NAND(654, 806) -827 = NAND(782, 806) -828 = NAND(657, 809) -829 = NAND(785, 809) -830 = NAND(660, 812) -831 = NAND(788, 812) -832 = NAND(663, 815) -833 = NAND(791, 815) -834 = NAND(818, 819) -847 = NAND(820, 821) -860 = NAND(822, 823) -873 = NAND(824, 825) -886 = NAND(828, 829) -899 = NAND(832, 833) -912 = NAND(830, 831) -925 = NAND(826, 827) -938 = NOT(834) -939 = NOT(847) -940 = NOT(860) -941 = NOT(834) -942 = NOT(847) -943 = NOT(873) -944 = NOT(834) -945 = NOT(860) -946 = NOT(873) -947 = NOT(847) -948 = NOT(860) -949 = NOT(873) -950 = NOT(886) -951 = NOT(899) -952 = NOT(886) -953 = NOT(912) -954 = NOT(925) -955 = NOT(899) -956 = NOT(925) -957 = NOT(912) -958 = NOT(925) -959 = NOT(886) -960 = NOT(912) -961 = NOT(925) -962 = NOT(886) -963 = NOT(899) -964 = NOT(925) -965 = NOT(912) -966 = NOT(899) -967 = NOT(886) -968 = NOT(912) -969 = NOT(899) -970 = NOT(847) -971 = NOT(873) -972 = NOT(847) -973 = NOT(860) -974 = NOT(834) -975 = NOT(873) -976 = NOT(834) -977 = NOT(860) -978 = AND(938, 939, 940, 873) -979 = AND(941, 942, 860, 943) -980 = AND(944, 847, 945, 946) -981 = AND(834, 947, 948, 949) -982 = AND(958, 959, 960, 899) -983 = AND(961, 962, 912, 963) -984 = AND(964, 886, 965, 966) -985 = AND(925, 967, 968, 969) -986 = OR(978, 979, 980, 981) -991 = OR(982, 983, 984, 985) -996 = AND(925, 950, 912, 951, 986) -1001 = AND(925, 952, 953, 899, 986) -1006 = AND(954, 886, 912, 955, 986) -1011 = AND(956, 886, 957, 899, 986) -1016 = AND(834, 970, 860, 971, 991) -1021 = AND(834, 972, 973, 873, 991) -1026 = AND(974, 847, 860, 975, 991) -1031 = AND(976, 847, 977, 873, 991) -1036 = AND(834, 996) -1039 = AND(847, 996) -1042 = AND(860, 996) -1045 = AND(873, 996) -1048 = AND(834, 1001) -1051 = AND(847, 1001) -1054 = AND(860, 1001) -1057 = AND(873, 1001) -1060 = AND(834, 1006) -1063 = AND(847, 1006) -1066 = AND(860, 1006) -1069 = AND(873, 1006) -1072 = AND(834, 1011) -1075 = AND(847, 1011) -1078 = AND(860, 1011) -1081 = AND(873, 1011) -1084 = AND(925, 1016) -1087 = AND(886, 1016) -1090 = AND(912, 1016) -1093 = AND(899, 1016) -1096 = AND(925, 1021) -1099 = AND(886, 1021) -1102 = AND(912, 1021) -1105 = AND(899, 1021) -1108 = AND(925, 1026) -1111 = AND(886, 1026) -1114 = AND(912, 1026) -1117 = AND(899, 1026) -1120 = AND(925, 1031) -1123 = AND(886, 1031) -1126 = AND(912, 1031) -1129 = AND(899, 1031) -1132 = NAND(1, 1036) -1135 = NAND(8, 1039) -1138 = NAND(15, 1042) -1141 = NAND(22, 1045) -1144 = NAND(29, 1048) -1147 = NAND(36, 1051) -1150 = NAND(43, 1054) -1153 = NAND(50, 1057) -1156 = NAND(57, 1060) -1159 = NAND(64, 1063) -1162 = NAND(71, 1066) -1165 = NAND(78, 1069) -1168 = NAND(85, 1072) -1171 = NAND(92, 1075) -1174 = NAND(99, 1078) -1177 = NAND(106, 1081) -1180 = NAND(113, 1084) -1183 = NAND(120, 1087) -1186 = NAND(127, 1090) -1189 = NAND(134, 1093) -1192 = NAND(141, 1096) -1195 = NAND(148, 1099) -1198 = NAND(155, 1102) -1201 = NAND(162, 1105) -1204 = NAND(169, 1108) -1207 = NAND(176, 1111) -1210 = NAND(183, 1114) -1213 = NAND(190, 1117) -1216 = NAND(197, 1120) -1219 = NAND(204, 1123) -1222 = NAND(211, 1126) -1225 = NAND(218, 1129) -1228 = NAND(1, 1132) -1229 = NAND(1036, 1132) -1230 = NAND(8, 1135) -1231 = NAND(1039, 1135) -1232 = NAND(15, 1138) -1233 = NAND(1042, 1138) -1234 = NAND(22, 1141) -1235 = NAND(1045, 1141) -1236 = NAND(29, 1144) -1237 = NAND(1048, 1144) -1238 = NAND(36, 1147) -1239 = NAND(1051, 1147) -1240 = NAND(43, 1150) -1241 = NAND(1054, 1150) -1242 = NAND(50, 1153) -1243 = NAND(1057, 1153) -1244 = NAND(57, 1156) -1245 = NAND(1060, 1156) -1246 = NAND(64, 1159) -1247 = NAND(1063, 1159) -1248 = NAND(71, 1162) -1249 = NAND(1066, 1162) -1250 = NAND(78, 1165) -1251 = NAND(1069, 1165) -1252 = NAND(85, 1168) -1253 = NAND(1072, 1168) -1254 = NAND(92, 1171) -1255 = NAND(1075, 1171) -1256 = NAND(99, 1174) -1257 = NAND(1078, 1174) -1258 = NAND(106, 1177) -1259 = NAND(1081, 1177) -1260 = NAND(113, 1180) -1261 = NAND(1084, 1180) -1262 = NAND(120, 1183) -1263 = NAND(1087, 1183) -1264 = NAND(127, 1186) -1265 = NAND(1090, 1186) -1266 = NAND(134, 1189) -1267 = NAND(1093, 1189) -1268 = NAND(141, 1192) -1269 = NAND(1096, 1192) -1270 = NAND(148, 1195) -1271 = NAND(1099, 1195) -1272 = NAND(155, 1198) -1273 = NAND(1102, 1198) -1274 = NAND(162, 1201) -1275 = NAND(1105, 1201) -1276 = NAND(169, 1204) -1277 = NAND(1108, 1204) -1278 = NAND(176, 1207) -1279 = NAND(1111, 1207) -1280 = NAND(183, 1210) -1281 = NAND(1114, 1210) -1282 = NAND(190, 1213) -1283 = NAND(1117, 1213) -1284 = NAND(197, 1216) -1285 = NAND(1120, 1216) -1286 = NAND(204, 1219) -1287 = NAND(1123, 1219) -1288 = NAND(211, 1222) -1289 = NAND(1126, 1222) -1290 = NAND(218, 1225) -1291 = NAND(1129, 1225) -1292 = NAND(1228, 1229) -1293 = NAND(1230, 1231) -1294 = NAND(1232, 1233) -1295 = NAND(1234, 1235) -1296 = NAND(1236, 1237) -1297 = NAND(1238, 1239) -1298 = NAND(1240, 1241) -1299 = NAND(1242, 1243) -1300 = NAND(1244, 1245) -1301 = NAND(1246, 1247) -1302 = NAND(1248, 1249) -1303 = NAND(1250, 1251) -1304 = NAND(1252, 1253) -1305 = NAND(1254, 1255) -1306 = NAND(1256, 1257) -1307 = NAND(1258, 1259) -1308 = NAND(1260, 1261) -1309 = NAND(1262, 1263) -1310 = NAND(1264, 1265) -1311 = NAND(1266, 1267) -1312 = NAND(1268, 1269) -1313 = NAND(1270, 1271) -1314 = NAND(1272, 1273) -1315 = NAND(1274, 1275) -1316 = NAND(1276, 1277) -1317 = NAND(1278, 1279) -1318 = NAND(1280, 1281) -1319 = NAND(1282, 1283) -1320 = NAND(1284, 1285) -1321 = NAND(1286, 1287) -1322 = NAND(1288, 1289) -1323 = NAND(1290, 1291) -1324 = BUFF(1292) -1325 = BUFF(1293) -1326 = BUFF(1294) -1327 = BUFF(1295) -1328 = BUFF(1296) -1329 = BUFF(1297) -1330 = BUFF(1298) -1331 = BUFF(1299) -1332 = BUFF(1300) -1333 = BUFF(1301) -1334 = BUFF(1302) -1335 = BUFF(1303) -1336 = BUFF(1304) -1337 = BUFF(1305) -1338 = BUFF(1306) -1339 = BUFF(1307) -1340 = BUFF(1308) -1341 = BUFF(1309) -1342 = BUFF(1310) -1343 = BUFF(1311) -1344 = BUFF(1312) -1345 = BUFF(1313) -1346 = BUFF(1314) -1347 = BUFF(1315) -1348 = BUFF(1316) -1349 = BUFF(1317) -1350 = BUFF(1318) -1351 = BUFF(1319) -1352 = BUFF(1320) -1353 = BUFF(1321) -1354 = BUFF(1322) -1355 = BUFF(1323) diff --git a/ISCAS85/c17.bench b/ISCAS85/c17.bench deleted file mode 100644 index 26ac187..0000000 --- a/ISCAS85/c17.bench +++ /dev/null @@ -1,17 +0,0 @@ -# c17 - -INPUT(1) -INPUT(2) -INPUT(3) -INPUT(6) -INPUT(7) - -OUTPUT(22) -OUTPUT(23) - -10 = NAND(1, 3) -11 = NAND(3, 6) -16 = NAND(2, 11) -19 = NAND(11, 7) -22 = NAND(10, 16) -23 = NAND(16, 19) diff --git a/ISCAS85/c17.test b/ISCAS85/c17.test deleted file mode 100644 index e69de29..0000000 diff --git a/ISCAS85/c1908.bench b/ISCAS85/c1908.bench deleted file mode 100644 index 4ddacb4..0000000 --- a/ISCAS85/c1908.bench +++ /dev/null @@ -1,942 +0,0 @@ -# c1908 - -INPUT(1) -INPUT(4) -INPUT(7) -INPUT(10) -INPUT(13) -INPUT(16) -INPUT(19) -INPUT(22) -INPUT(25) -INPUT(28) -INPUT(31) -INPUT(34) -INPUT(37) -INPUT(40) -INPUT(43) -INPUT(46) -INPUT(49) -INPUT(53) -INPUT(56) -INPUT(60) -INPUT(63) -INPUT(66) -INPUT(69) -INPUT(72) -INPUT(76) -INPUT(79) -INPUT(82) -INPUT(85) -INPUT(88) -INPUT(91) -INPUT(94) -INPUT(99) -INPUT(104) - -OUTPUT(2753) -OUTPUT(2754) -OUTPUT(2755) -OUTPUT(2756) -OUTPUT(2762) -OUTPUT(2767) -OUTPUT(2768) -OUTPUT(2779) -OUTPUT(2780) -OUTPUT(2781) -OUTPUT(2782) -OUTPUT(2783) -OUTPUT(2784) -OUTPUT(2785) -OUTPUT(2786) -OUTPUT(2787) -OUTPUT(2811) -OUTPUT(2886) -OUTPUT(2887) -OUTPUT(2888) -OUTPUT(2889) -OUTPUT(2890) -OUTPUT(2891) -OUTPUT(2892) -OUTPUT(2899) - -190 = NOT(1) -194 = NOT(4) -197 = NOT(7) -201 = NOT(10) -206 = NOT(13) -209 = NOT(16) -212 = NOT(19) -216 = NOT(22) -220 = NOT(25) -225 = NOT(28) -229 = NOT(31) -232 = NOT(34) -235 = NOT(37) -239 = NOT(40) -243 = NOT(43) -247 = NOT(46) -251 = NAND(63, 88) -252 = NAND(66, 91) -253 = NOT(72) -256 = NOT(72) -257 = BUFF(69) -260 = BUFF(69) -263 = NOT(76) -266 = NOT(79) -269 = NOT(82) -272 = NOT(85) -275 = NOT(104) -276 = NOT(104) -277 = NOT(88) -280 = NOT(91) -283 = BUFF(94) -290 = NOT(94) -297 = BUFF(94) -300 = NOT(94) -303 = BUFF(99) -306 = NOT(99) -313 = NOT(99) -316 = BUFF(104) -319 = NOT(104) -326 = BUFF(104) -331 = BUFF(104) -338 = NOT(104) -343 = BUFF(1) -346 = BUFF(4) -349 = BUFF(7) -352 = BUFF(10) -355 = BUFF(13) -358 = BUFF(16) -361 = BUFF(19) -364 = BUFF(22) -367 = BUFF(25) -370 = BUFF(28) -373 = BUFF(31) -376 = BUFF(34) -379 = BUFF(37) -382 = BUFF(40) -385 = BUFF(43) -388 = BUFF(46) -534 = NOT(343) -535 = NOT(346) -536 = NOT(349) -537 = NOT(352) -538 = NOT(355) -539 = NOT(358) -540 = NOT(361) -541 = NOT(364) -542 = NOT(367) -543 = NOT(370) -544 = NOT(373) -545 = NOT(376) -546 = NOT(379) -547 = NOT(382) -548 = NOT(385) -549 = NOT(388) -550 = NAND(306, 331) -551 = NAND(306, 331) -552 = NAND(306, 331) -553 = NAND(306, 331) -554 = NAND(306, 331) -555 = NAND(306, 331) -556 = BUFF(190) -559 = BUFF(194) -562 = BUFF(206) -565 = BUFF(209) -568 = BUFF(225) -571 = BUFF(243) -574 = AND(63, 319) -577 = BUFF(220) -580 = BUFF(229) -583 = BUFF(232) -586 = AND(66, 319) -589 = BUFF(239) -592 = AND(49, 253, 319) -595 = BUFF(247) -598 = BUFF(239) -601 = NAND(326, 277) -602 = NAND(326, 280) -603 = NAND(260, 72) -608 = NAND(260, 300) -612 = NAND(256, 300) -616 = BUFF(201) -619 = BUFF(216) -622 = BUFF(220) -625 = BUFF(239) -628 = BUFF(190) -631 = BUFF(190) -634 = BUFF(194) -637 = BUFF(229) -640 = BUFF(197) -643 = AND(56, 257, 319) -646 = BUFF(232) -649 = BUFF(201) -652 = BUFF(235) -655 = AND(60, 257, 319) -658 = BUFF(263) -661 = BUFF(263) -664 = BUFF(266) -667 = BUFF(266) -670 = BUFF(269) -673 = BUFF(269) -676 = BUFF(272) -679 = BUFF(272) -682 = AND(251, 316) -685 = AND(252, 316) -688 = BUFF(197) -691 = BUFF(197) -694 = BUFF(212) -697 = BUFF(212) -700 = BUFF(247) -703 = BUFF(247) -706 = BUFF(235) -709 = BUFF(235) -712 = BUFF(201) -715 = BUFF(201) -718 = BUFF(206) -721 = BUFF(216) -724 = AND(53, 253, 319) -727 = BUFF(243) -730 = BUFF(220) -733 = BUFF(220) -736 = BUFF(209) -739 = BUFF(216) -742 = BUFF(225) -745 = BUFF(243) -748 = BUFF(212) -751 = BUFF(225) -886 = NOT(682) -887 = NOT(685) -888 = NOT(616) -889 = NOT(619) -890 = NOT(622) -891 = NOT(625) -892 = NOT(631) -893 = NOT(643) -894 = NOT(649) -895 = NOT(652) -896 = NOT(655) -897 = AND(49, 612) -898 = AND(56, 608) -899 = NAND(53, 612) -903 = NAND(60, 608) -907 = NAND(49, 612) -910 = NAND(56, 608) -913 = NOT(661) -914 = NOT(658) -915 = NOT(667) -916 = NOT(664) -917 = NOT(673) -918 = NOT(670) -919 = NOT(679) -920 = NOT(676) -921 = NAND(277, 297, 326, 603) -922 = NAND(280, 297, 326, 603) -923 = NAND(303, 338, 603) -926 = AND(303, 338, 603) -935 = BUFF(556) -938 = NOT(688) -939 = BUFF(556) -942 = NOT(691) -943 = BUFF(562) -946 = NOT(694) -947 = BUFF(562) -950 = NOT(697) -951 = BUFF(568) -954 = NOT(700) -955 = BUFF(568) -958 = NOT(703) -959 = BUFF(574) -962 = BUFF(574) -965 = BUFF(580) -968 = NOT(706) -969 = BUFF(580) -972 = NOT(709) -973 = BUFF(586) -976 = NOT(712) -977 = BUFF(586) -980 = NOT(715) -981 = BUFF(592) -984 = NOT(628) -985 = BUFF(592) -988 = NOT(718) -989 = NOT(721) -990 = NOT(634) -991 = NOT(724) -992 = NOT(727) -993 = NOT(637) -994 = BUFF(595) -997 = NOT(730) -998 = BUFF(595) -1001 = NOT(733) -1002 = NOT(736) -1003 = NOT(739) -1004 = NOT(640) -1005 = NOT(742) -1006 = NOT(745) -1007 = NOT(646) -1008 = NOT(748) -1009 = NOT(751) -1010 = BUFF(559) -1013 = BUFF(559) -1016 = BUFF(565) -1019 = BUFF(565) -1022 = BUFF(571) -1025 = BUFF(571) -1028 = BUFF(577) -1031 = BUFF(577) -1034 = BUFF(583) -1037 = BUFF(583) -1040 = BUFF(589) -1043 = BUFF(589) -1046 = BUFF(598) -1049 = BUFF(598) -1054 = NAND(619, 888) -1055 = NAND(616, 889) -1063 = NAND(625, 890) -1064 = NAND(622, 891) -1067 = NAND(655, 895) -1068 = NAND(652, 896) -1119 = NAND(721, 988) -1120 = NAND(718, 989) -1121 = NAND(727, 991) -1122 = NAND(724, 992) -1128 = NAND(739, 1002) -1129 = NAND(736, 1003) -1130 = NAND(745, 1005) -1131 = NAND(742, 1006) -1132 = NAND(751, 1008) -1133 = NAND(748, 1009) -1148 = NOT(939) -1149 = NOT(935) -1150 = NAND(1054, 1055) -1151 = NOT(943) -1152 = NOT(947) -1153 = NOT(955) -1154 = NOT(951) -1155 = NOT(962) -1156 = NOT(969) -1157 = NOT(977) -1158 = NAND(1063, 1064) -1159 = NOT(985) -1160 = NAND(985, 892) -1161 = NOT(998) -1162 = NAND(1067, 1068) -1163 = NOT(899) -1164 = BUFF(899) -1167 = NOT(903) -1168 = BUFF(903) -1171 = NAND(921, 923) -1188 = NAND(922, 923) -1205 = NOT(1010) -1206 = NAND(1010, 938) -1207 = NOT(1013) -1208 = NAND(1013, 942) -1209 = NOT(1016) -1210 = NAND(1016, 946) -1211 = NOT(1019) -1212 = NAND(1019, 950) -1213 = NOT(1022) -1214 = NAND(1022, 954) -1215 = NOT(1025) -1216 = NAND(1025, 958) -1217 = NOT(1028) -1218 = NOT(959) -1219 = NOT(1031) -1220 = NOT(1034) -1221 = NAND(1034, 968) -1222 = NOT(965) -1223 = NOT(1037) -1224 = NAND(1037, 972) -1225 = NOT(1040) -1226 = NAND(1040, 976) -1227 = NOT(973) -1228 = NOT(1043) -1229 = NAND(1043, 980) -1230 = NOT(981) -1231 = NAND(981, 984) -1232 = NAND(1119, 1120) -1235 = NAND(1121, 1122) -1238 = NOT(1046) -1239 = NAND(1046, 997) -1240 = NOT(994) -1241 = NOT(1049) -1242 = NAND(1049, 1001) -1243 = NAND(1128, 1129) -1246 = NAND(1130, 1131) -1249 = NAND(1132, 1133) -1252 = BUFF(907) -1255 = BUFF(907) -1258 = BUFF(910) -1261 = BUFF(910) -1264 = NOT(1150) -1267 = NAND(631, 1159) -1309 = NAND(688, 1205) -1310 = NAND(691, 1207) -1311 = NAND(694, 1209) -1312 = NAND(697, 1211) -1313 = NAND(700, 1213) -1314 = NAND(703, 1215) -1315 = NAND(706, 1220) -1316 = NAND(709, 1223) -1317 = NAND(712, 1225) -1318 = NAND(715, 1228) -1319 = NOT(1158) -1322 = NAND(628, 1230) -1327 = NAND(730, 1238) -1328 = NAND(733, 1241) -1334 = NOT(1162) -1344 = NAND(1267, 1160) -1345 = NAND(1249, 894) -1346 = NOT(1249) -1348 = NOT(1255) -1349 = NOT(1252) -1350 = NOT(1261) -1351 = NOT(1258) -1352 = NAND(1309, 1206) -1355 = NAND(1310, 1208) -1358 = NAND(1311, 1210) -1361 = NAND(1312, 1212) -1364 = NAND(1313, 1214) -1367 = NAND(1314, 1216) -1370 = NAND(1315, 1221) -1373 = NAND(1316, 1224) -1376 = NAND(1317, 1226) -1379 = NAND(1318, 1229) -1383 = NAND(1322, 1231) -1386 = NOT(1232) -1387 = NAND(1232, 990) -1388 = NOT(1235) -1389 = NAND(1235, 993) -1390 = NAND(1327, 1239) -1393 = NAND(1328, 1242) -1396 = NOT(1243) -1397 = NAND(1243, 1004) -1398 = NOT(1246) -1399 = NAND(1246, 1007) -1409 = NOT(1319) -1412 = NAND(649, 1346) -1413 = NOT(1334) -1416 = BUFF(1264) -1419 = BUFF(1264) -1433 = NAND(634, 1386) -1434 = NAND(637, 1388) -1438 = NAND(640, 1396) -1439 = NAND(646, 1398) -1440 = NOT(1344) -1443 = NAND(1355, 1148) -1444 = NOT(1355) -1445 = NAND(1352, 1149) -1446 = NOT(1352) -1447 = NAND(1358, 1151) -1448 = NOT(1358) -1451 = NAND(1361, 1152) -1452 = NOT(1361) -1453 = NAND(1367, 1153) -1454 = NOT(1367) -1455 = NAND(1364, 1154) -1456 = NOT(1364) -1457 = NAND(1373, 1156) -1458 = NOT(1373) -1459 = NAND(1379, 1157) -1460 = NOT(1379) -1461 = NOT(1383) -1462 = NAND(1393, 1161) -1463 = NOT(1393) -1464 = NAND(1345, 1412) -1468 = NOT(1370) -1469 = NAND(1370, 1222) -1470 = NOT(1376) -1471 = NAND(1376, 1227) -1472 = NAND(1387, 1433) -1475 = NOT(1390) -1476 = NAND(1390, 1240) -1478 = NAND(1389, 1434) -1481 = NAND(1399, 1439) -1484 = NAND(1397, 1438) -1487 = NAND(939, 1444) -1488 = NAND(935, 1446) -1489 = NAND(943, 1448) -1490 = NOT(1419) -1491 = NOT(1416) -1492 = NAND(947, 1452) -1493 = NAND(955, 1454) -1494 = NAND(951, 1456) -1495 = NAND(969, 1458) -1496 = NAND(977, 1460) -1498 = NAND(998, 1463) -1499 = NOT(1440) -1500 = NAND(965, 1468) -1501 = NAND(973, 1470) -1504 = NAND(994, 1475) -1510 = NOT(1464) -1513 = NAND(1443, 1487) -1514 = NAND(1445, 1488) -1517 = NAND(1447, 1489) -1520 = NAND(1451, 1492) -1521 = NAND(1453, 1493) -1522 = NAND(1455, 1494) -1526 = NAND(1457, 1495) -1527 = NAND(1459, 1496) -1528 = NOT(1472) -1529 = NAND(1462, 1498) -1530 = NOT(1478) -1531 = NOT(1481) -1532 = NOT(1484) -1534 = NAND(1471, 1501) -1537 = NAND(1469, 1500) -1540 = NAND(1476, 1504) -1546 = NOT(1513) -1554 = NOT(1521) -1557 = NOT(1526) -1561 = NOT(1520) -1567 = NAND(1484, 1531) -1568 = NAND(1481, 1532) -1569 = NOT(1510) -1571 = NOT(1527) -1576 = NOT(1529) -1588 = BUFF(1522) -1591 = NOT(1534) -1593 = NOT(1537) -1594 = NAND(1540, 1530) -1595 = NOT(1540) -1596 = NAND(1567, 1568) -1600 = BUFF(1517) -1603 = BUFF(1517) -1606 = BUFF(1522) -1609 = BUFF(1522) -1612 = BUFF(1514) -1615 = BUFF(1514) -1620 = BUFF(1557) -1623 = BUFF(1554) -1635 = NOT(1571) -1636 = NAND(1478, 1595) -1638 = NAND(1576, 1569) -1639 = NOT(1576) -1640 = BUFF(1561) -1643 = BUFF(1561) -1647 = BUFF(1546) -1651 = BUFF(1546) -1658 = BUFF(1554) -1661 = BUFF(1557) -1664 = BUFF(1557) -1671 = NAND(1596, 893) -1672 = NOT(1596) -1675 = NOT(1600) -1677 = NOT(1603) -1678 = NAND(1606, 1217) -1679 = NOT(1606) -1680 = NAND(1609, 1219) -1681 = NOT(1609) -1682 = NOT(1612) -1683 = NOT(1615) -1685 = NAND(1594, 1636) -1688 = NAND(1510, 1639) -1697 = BUFF(1588) -1701 = BUFF(1588) -1706 = NAND(643, 1672) -1707 = NOT(1643) -1708 = NAND(1647, 1675) -1709 = NOT(1647) -1710 = NAND(1651, 1677) -1711 = NOT(1651) -1712 = NAND(1028, 1679) -1713 = NAND(1031, 1681) -1714 = BUFF(1620) -1717 = BUFF(1620) -1720 = NAND(1658, 1593) -1721 = NOT(1658) -1723 = NAND(1638, 1688) -1727 = NOT(1661) -1728 = NOT(1640) -1730 = NOT(1664) -1731 = BUFF(1623) -1734 = BUFF(1623) -1740 = NAND(1685, 1528) -1741 = NOT(1685) -1742 = NAND(1671, 1706) -1746 = NAND(1600, 1709) -1747 = NAND(1603, 1711) -1748 = NAND(1678, 1712) -1751 = NAND(1680, 1713) -1759 = NAND(1537, 1721) -1761 = NOT(1697) -1762 = NAND(1697, 1727) -1763 = NOT(1701) -1764 = NAND(1701, 1730) -1768 = NOT(1717) -1769 = NAND(1472, 1741) -1772 = NAND(1723, 1413) -1773 = NOT(1723) -1774 = NAND(1708, 1746) -1777 = NAND(1710, 1747) -1783 = NOT(1731) -1784 = NAND(1731, 1682) -1785 = NOT(1714) -1786 = NOT(1734) -1787 = NAND(1734, 1683) -1788 = NAND(1720, 1759) -1791 = NAND(1661, 1761) -1792 = NAND(1664, 1763) -1795 = NAND(1751, 1155) -1796 = NOT(1751) -1798 = NAND(1740, 1769) -1801 = NAND(1334, 1773) -1802 = NAND(1742, 290) -1807 = NOT(1748) -1808 = NAND(1748, 1218) -1809 = NAND(1612, 1783) -1810 = NAND(1615, 1786) -1812 = NAND(1791, 1762) -1815 = NAND(1792, 1764) -1818 = BUFF(1742) -1821 = NAND(1777, 1490) -1822 = NOT(1777) -1823 = NAND(1774, 1491) -1824 = NOT(1774) -1825 = NAND(962, 1796) -1826 = NAND(1788, 1409) -1827 = NOT(1788) -1830 = NAND(1772, 1801) -1837 = NAND(959, 1807) -1838 = NAND(1809, 1784) -1841 = NAND(1810, 1787) -1848 = NAND(1419, 1822) -1849 = NAND(1416, 1824) -1850 = NAND(1795, 1825) -1852 = NAND(1319, 1827) -1855 = NAND(1815, 1707) -1856 = NOT(1815) -1857 = NOT(1818) -1858 = NAND(1798, 290) -1864 = NOT(1812) -1865 = NAND(1812, 1728) -1866 = BUFF(1798) -1869 = BUFF(1802) -1872 = BUFF(1802) -1875 = NAND(1808, 1837) -1878 = NAND(1821, 1848) -1879 = NAND(1823, 1849) -1882 = NAND(1841, 1768) -1883 = NOT(1841) -1884 = NAND(1826, 1852) -1885 = NAND(1643, 1856) -1889 = NAND(1830, 290) -1895 = NOT(1838) -1896 = NAND(1838, 1785) -1897 = NAND(1640, 1864) -1898 = NOT(1850) -1902 = BUFF(1830) -1910 = NOT(1878) -1911 = NAND(1717, 1883) -1912 = NOT(1884) -1913 = NAND(1855, 1885) -1915 = NOT(1866) -1919 = NAND(1872, 919) -1920 = NOT(1872) -1921 = NAND(1869, 920) -1922 = NOT(1869) -1923 = NOT(1875) -1924 = NAND(1714, 1895) -1927 = BUFF(1858) -1930 = BUFF(1858) -1933 = NAND(1865, 1897) -1936 = NAND(1882, 1911) -1937 = NOT(1898) -1938 = NOT(1902) -1941 = NAND(679, 1920) -1942 = NAND(676, 1922) -1944 = BUFF(1879) -1947 = NOT(1913) -1950 = BUFF(1889) -1953 = BUFF(1889) -1958 = BUFF(1879) -1961 = NAND(1896, 1924) -1965 = AND(1910, 601) -1968 = AND(602, 1912) -1975 = NAND(1930, 917) -1976 = NOT(1930) -1977 = NAND(1927, 918) -1978 = NOT(1927) -1979 = NAND(1919, 1941) -1980 = NAND(1921, 1942) -1985 = NOT(1933) -1987 = NOT(1936) -1999 = NOT(1944) -2000 = NAND(1944, 1937) -2002 = NOT(1947) -2003 = NAND(1947, 1499) -2004 = NAND(1953, 1350) -2005 = NOT(1953) -2006 = NAND(1950, 1351) -2007 = NOT(1950) -2008 = NAND(673, 1976) -2009 = NAND(670, 1978) -2012 = NOT(1979) -2013 = NOT(1958) -2014 = NAND(1958, 1923) -2015 = NOT(1961) -2016 = NAND(1961, 1635) -2018 = NOT(1965) -2019 = NOT(1968) -2020 = NAND(1898, 1999) -2021 = NOT(1987) -2022 = NAND(1987, 1591) -2023 = NAND(1440, 2002) -2024 = NAND(1261, 2005) -2025 = NAND(1258, 2007) -2026 = NAND(1975, 2008) -2027 = NAND(1977, 2009) -2030 = NOT(1980) -2033 = BUFF(1980) -2036 = NAND(1875, 2013) -2037 = NAND(1571, 2015) -2038 = NAND(2020, 2000) -2039 = NAND(1534, 2021) -2040 = NAND(2023, 2003) -2041 = NAND(2004, 2024) -2042 = NAND(2006, 2025) -2047 = NOT(2026) -2052 = NAND(2036, 2014) -2055 = NAND(2037, 2016) -2060 = NOT(2038) -2061 = NAND(2039, 2022) -2062 = NAND(2040, 290) -2067 = NOT(2041) -2068 = NOT(2027) -2071 = BUFF(2027) -2076 = NOT(2052) -2077 = NOT(2055) -2078 = NAND(2060, 290) -2081 = NAND(2061, 290) -2086 = NOT(2042) -2089 = BUFF(2042) -2104 = AND(2030, 2068) -2119 = AND(2033, 2068) -2129 = AND(2030, 2071) -2143 = AND(2033, 2071) -2148 = BUFF(2062) -2151 = BUFF(2062) -2196 = BUFF(2078) -2199 = BUFF(2078) -2202 = BUFF(2081) -2205 = BUFF(2081) -2214 = NAND(2151, 915) -2215 = NOT(2151) -2216 = NAND(2148, 916) -2217 = NOT(2148) -2222 = NAND(2199, 1348) -2223 = NOT(2199) -2224 = NAND(2196, 1349) -2225 = NOT(2196) -2226 = NAND(2205, 913) -2227 = NOT(2205) -2228 = NAND(2202, 914) -2229 = NOT(2202) -2230 = NAND(667, 2215) -2231 = NAND(664, 2217) -2232 = NAND(1255, 2223) -2233 = NAND(1252, 2225) -2234 = NAND(661, 2227) -2235 = NAND(658, 2229) -2236 = NAND(2214, 2230) -2237 = NAND(2216, 2231) -2240 = NAND(2222, 2232) -2241 = NAND(2224, 2233) -2244 = NAND(2226, 2234) -2245 = NAND(2228, 2235) -2250 = NOT(2236) -2253 = NOT(2240) -2256 = NOT(2244) -2257 = NOT(2237) -2260 = BUFF(2237) -2263 = NOT(2241) -2266 = AND(1164, 2241) -2269 = NOT(2245) -2272 = AND(1168, 2245) -2279 = NAND(2067, 2012, 2047, 2250, 899, 2256, 2253, 903) -2286 = BUFF(2266) -2297 = BUFF(2266) -2315 = BUFF(2272) -2326 = BUFF(2272) -2340 = AND(2086, 2257) -2353 = AND(2089, 2257) -2361 = AND(2086, 2260) -2375 = AND(2089, 2260) -2384 = AND(338, 2279, 313, 313) -2385 = AND(1163, 2263) -2386 = AND(1164, 2263) -2426 = AND(1167, 2269) -2427 = AND(1168, 2269) -2537 = NAND(2286, 2315, 2361, 2104, 1171) -2540 = NAND(2286, 2315, 2340, 2129, 1171) -2543 = NAND(2286, 2315, 2340, 2119, 1171) -2546 = NAND(2286, 2315, 2353, 2104, 1171) -2549 = NAND(2297, 2315, 2375, 2119, 1188) -2552 = NAND(2297, 2326, 2361, 2143, 1188) -2555 = NAND(2297, 2326, 2375, 2129, 1188) -2558 = AND(2286, 2315, 2361, 2104, 1171) -2561 = AND(2286, 2315, 2340, 2129, 1171) -2564 = AND(2286, 2315, 2340, 2119, 1171) -2567 = AND(2286, 2315, 2353, 2104, 1171) -2570 = AND(2297, 2315, 2375, 2119, 1188) -2573 = AND(2297, 2326, 2361, 2143, 1188) -2576 = AND(2297, 2326, 2375, 2129, 1188) -2594 = NAND(2286, 2427, 2361, 2129, 1171) -2597 = NAND(2297, 2427, 2361, 2119, 1171) -2600 = NAND(2297, 2427, 2375, 2104, 1171) -2603 = NAND(2297, 2427, 2340, 2143, 1171) -2606 = NAND(2297, 2427, 2353, 2129, 1188) -2611 = NAND(2386, 2326, 2361, 2129, 1188) -2614 = NAND(2386, 2326, 2361, 2119, 1188) -2617 = NAND(2386, 2326, 2375, 2104, 1188) -2620 = NAND(2386, 2326, 2353, 2129, 1188) -2627 = NAND(2297, 2427, 2340, 2104, 926) -2628 = NAND(2386, 2326, 2340, 2104, 926) -2629 = NAND(2386, 2427, 2361, 2104, 926) -2630 = NAND(2386, 2427, 2340, 2129, 926) -2631 = NAND(2386, 2427, 2340, 2119, 926) -2632 = NAND(2386, 2427, 2353, 2104, 926) -2633 = NAND(2386, 2426, 2340, 2104, 926) -2634 = NAND(2385, 2427, 2340, 2104, 926) -2639 = AND(2286, 2427, 2361, 2129, 1171) -2642 = AND(2297, 2427, 2361, 2119, 1171) -2645 = AND(2297, 2427, 2375, 2104, 1171) -2648 = AND(2297, 2427, 2340, 2143, 1171) -2651 = AND(2297, 2427, 2353, 2129, 1188) -2655 = AND(2386, 2326, 2361, 2129, 1188) -2658 = AND(2386, 2326, 2361, 2119, 1188) -2661 = AND(2386, 2326, 2375, 2104, 1188) -2664 = AND(2386, 2326, 2353, 2129, 1188) -2669 = NAND(2558, 534) -2670 = NOT(2558) -2671 = NAND(2561, 535) -2672 = NOT(2561) -2673 = NAND(2564, 536) -2674 = NOT(2564) -2675 = NAND(2567, 537) -2676 = NOT(2567) -2682 = NAND(2570, 543) -2683 = NOT(2570) -2688 = NAND(2573, 548) -2689 = NOT(2573) -2690 = NAND(2576, 549) -2691 = NOT(2576) -2710 = AND(2627, 2628, 2629, 2630, 2631, 2632, 2633, 2634) -2720 = NAND(343, 2670) -2721 = NAND(346, 2672) -2722 = NAND(349, 2674) -2723 = NAND(352, 2676) -2724 = NAND(2639, 538) -2725 = NOT(2639) -2726 = NAND(2642, 539) -2727 = NOT(2642) -2728 = NAND(2645, 540) -2729 = NOT(2645) -2730 = NAND(2648, 541) -2731 = NOT(2648) -2732 = NAND(2651, 542) -2733 = NOT(2651) -2734 = NAND(370, 2683) -2735 = NAND(2655, 544) -2736 = NOT(2655) -2737 = NAND(2658, 545) -2738 = NOT(2658) -2739 = NAND(2661, 546) -2740 = NOT(2661) -2741 = NAND(2664, 547) -2742 = NOT(2664) -2743 = NAND(385, 2689) -2744 = NAND(388, 2691) -2745 = NAND(2537, 2540, 2543, 2546, 2594, 2597, 2600, 2603) -2746 = NAND(2606, 2549, 2611, 2614, 2617, 2620, 2552, 2555) -2747 = AND(2537, 2540, 2543, 2546, 2594, 2597, 2600, 2603) -2750 = AND(2606, 2549, 2611, 2614, 2617, 2620, 2552, 2555) -2753 = NAND(2669, 2720) -2754 = NAND(2671, 2721) -2755 = NAND(2673, 2722) -2756 = NAND(2675, 2723) -2757 = NAND(355, 2725) -2758 = NAND(358, 2727) -2759 = NAND(361, 2729) -2760 = NAND(364, 2731) -2761 = NAND(367, 2733) -2762 = NAND(2682, 2734) -2763 = NAND(373, 2736) -2764 = NAND(376, 2738) -2765 = NAND(379, 2740) -2766 = NAND(382, 2742) -2767 = NAND(2688, 2743) -2768 = NAND(2690, 2744) -2773 = AND(2745, 275) -2776 = AND(2746, 276) -2779 = NAND(2724, 2757) -2780 = NAND(2726, 2758) -2781 = NAND(2728, 2759) -2782 = NAND(2730, 2760) -2783 = NAND(2732, 2761) -2784 = NAND(2735, 2763) -2785 = NAND(2737, 2764) -2786 = NAND(2739, 2765) -2787 = NAND(2741, 2766) -2788 = AND(2747, 2750, 2710) -2789 = NAND(2747, 2750) -2800 = AND(338, 2279, 99, 2788) -2807 = NAND(2773, 2018) -2808 = NOT(2773) -2809 = NAND(2776, 2019) -2810 = NOT(2776) -2811 = NOR(2384, 2800) -2812 = AND(897, 283, 2789) -2815 = AND(76, 283, 2789) -2818 = AND(82, 283, 2789) -2821 = AND(85, 283, 2789) -2824 = AND(898, 283, 2789) -2827 = NAND(1965, 2808) -2828 = NAND(1968, 2810) -2829 = AND(79, 283, 2789) -2843 = NAND(2807, 2827) -2846 = NAND(2809, 2828) -2850 = NAND(2812, 2076) -2851 = NAND(2815, 2077) -2852 = NAND(2818, 1915) -2853 = NAND(2821, 1857) -2854 = NAND(2824, 1938) -2857 = NOT(2812) -2858 = NOT(2815) -2859 = NOT(2818) -2860 = NOT(2821) -2861 = NOT(2824) -2862 = NOT(2829) -2863 = NAND(2829, 1985) -2866 = NAND(2052, 2857) -2867 = NAND(2055, 2858) -2868 = NAND(1866, 2859) -2869 = NAND(1818, 2860) -2870 = NAND(1902, 2861) -2871 = NAND(2843, 886) -2872 = NOT(2843) -2873 = NAND(2846, 887) -2874 = NOT(2846) -2875 = NAND(1933, 2862) -2876 = NAND(2866, 2850) -2877 = NAND(2867, 2851) -2878 = NAND(2868, 2852) -2879 = NAND(2869, 2853) -2880 = NAND(2870, 2854) -2881 = NAND(682, 2872) -2882 = NAND(685, 2874) -2883 = NAND(2875, 2863) -2886 = AND(2876, 550) -2887 = AND(551, 2877) -2888 = AND(553, 2878) -2889 = AND(2879, 554) -2890 = AND(555, 2880) -2891 = NAND(2871, 2881) -2892 = NAND(2873, 2882) -2895 = NAND(2883, 1461) -2896 = NOT(2883) -2897 = NAND(1383, 2896) -2898 = NAND(2895, 2897) -2899 = AND(2898, 552) diff --git a/ISCAS85/c2670.bench b/ISCAS85/c2670.bench deleted file mode 100644 index cec1cee..0000000 --- a/ISCAS85/c2670.bench +++ /dev/null @@ -1,1570 +0,0 @@ -# c2670 - -INPUT(1) -INPUT(2) -INPUT(3) -INPUT(4) -INPUT(5) -INPUT(6) -INPUT(7) -INPUT(8) -INPUT(11) -INPUT(14) -INPUT(15) -INPUT(16) -INPUT(19) -INPUT(20) -INPUT(21) -INPUT(22) -INPUT(23) -INPUT(24) -INPUT(25) -INPUT(26) -INPUT(27) -INPUT(28) -INPUT(29) -INPUT(32) -INPUT(33) -INPUT(34) -INPUT(35) -INPUT(36) -INPUT(37) -INPUT(40) -INPUT(43) -INPUT(44) -INPUT(47) -INPUT(48) -INPUT(49) -INPUT(50) -INPUT(51) -INPUT(52) -INPUT(53) -INPUT(54) -INPUT(55) -INPUT(56) -INPUT(57) -INPUT(60) -INPUT(61) -INPUT(62) -INPUT(63) -INPUT(64) -INPUT(65) -INPUT(66) -INPUT(67) -INPUT(68) -INPUT(69) -INPUT(72) -INPUT(73) -INPUT(74) -INPUT(75) -INPUT(76) -INPUT(77) -INPUT(78) -INPUT(79) -INPUT(80) -INPUT(81) -INPUT(82) -INPUT(85) -INPUT(86) -INPUT(87) -INPUT(88) -INPUT(89) -INPUT(90) -INPUT(91) -INPUT(92) -INPUT(93) -INPUT(94) -INPUT(95) -INPUT(96) -INPUT(99) -INPUT(100) -INPUT(101) -INPUT(102) -INPUT(103) -INPUT(104) -INPUT(105) -INPUT(106) -INPUT(107) -INPUT(108) -INPUT(111) -INPUT(112) -INPUT(113) -INPUT(114) -INPUT(115) -INPUT(116) -INPUT(117) -INPUT(118) -INPUT(119) -INPUT(120) -INPUT(123) -INPUT(124) -INPUT(125) -INPUT(126) -INPUT(127) -INPUT(128) -INPUT(129) -INPUT(130) -INPUT(131) -INPUT(132) -INPUT(135) -INPUT(136) -INPUT(137) -INPUT(138) -INPUT(139) -INPUT(140) -INPUT(141) -INPUT(142) -INPUT(143) -INPUT(144) -INPUT(145) -INPUT(146) -INPUT(147) -INPUT(148) -INPUT(149) -INPUT(150) -INPUT(151) -INPUT(152) -INPUT(153) -INPUT(154) -INPUT(155) -INPUT(156) -INPUT(157) -INPUT(158) -INPUT(159) -INPUT(160) -INPUT(161) -INPUT(162) -INPUT(163) -INPUT(164) -INPUT(165) -INPUT(166) -INPUT(167) -INPUT(168) -INPUT(169) -INPUT(170) -INPUT(171) -INPUT(172) -INPUT(173) -INPUT(174) -INPUT(175) -INPUT(176) -INPUT(177) -INPUT(178) -INPUT(179) -INPUT(180) -INPUT(181) -INPUT(182) -INPUT(183) -INPUT(184) -INPUT(185) -INPUT(186) -INPUT(187) -INPUT(188) -INPUT(189) -INPUT(190) -INPUT(191) -INPUT(192) -INPUT(193) -INPUT(194) -INPUT(195) -INPUT(196) -INPUT(197) -INPUT(198) -INPUT(199) -INPUT(200) -INPUT(201) -INPUT(202) -INPUT(203) -INPUT(204) -INPUT(205) -INPUT(206) -INPUT(207) -INPUT(208) -INPUT(209) -INPUT(210) -INPUT(211) -INPUT(212) -INPUT(213) -INPUT(214) -INPUT(215) -INPUT(216) -INPUT(217) -INPUT(218) -INPUT(219) -INPUT(224) -INPUT(227) -INPUT(230) -INPUT(231) -INPUT(234) -INPUT(237) -INPUT(241) -INPUT(246) -INPUT(253) -INPUT(256) -INPUT(259) -INPUT(262) -INPUT(263) -INPUT(266) -INPUT(269) -INPUT(272) -INPUT(275) -INPUT(278) -INPUT(281) -INPUT(284) -INPUT(287) -INPUT(290) -INPUT(294) -INPUT(297) -INPUT(301) -INPUT(305) -INPUT(309) -INPUT(313) -INPUT(316) -INPUT(319) -INPUT(322) -INPUT(325) -INPUT(328) -INPUT(331) -INPUT(334) -INPUT(337) -INPUT(340) -INPUT(343) -INPUT(346) -INPUT(349) -INPUT(352) -INPUT(355) - -OUTPUT(143) -OUTPUT(144) -OUTPUT(145) -OUTPUT(146) -OUTPUT(147) -OUTPUT(148) -OUTPUT(149) -OUTPUT(150) -OUTPUT(151) -OUTPUT(152) -OUTPUT(153) -OUTPUT(154) -OUTPUT(155) -OUTPUT(156) -OUTPUT(157) -OUTPUT(158) -OUTPUT(159) -OUTPUT(160) -OUTPUT(161) -OUTPUT(162) -OUTPUT(163) -OUTPUT(164) -OUTPUT(165) -OUTPUT(166) -OUTPUT(167) -OUTPUT(168) -OUTPUT(169) -OUTPUT(170) -OUTPUT(171) -OUTPUT(172) -OUTPUT(173) -OUTPUT(174) -OUTPUT(175) -OUTPUT(176) -OUTPUT(177) -OUTPUT(178) -OUTPUT(179) -OUTPUT(180) -OUTPUT(181) -OUTPUT(182) -OUTPUT(183) -OUTPUT(184) -OUTPUT(185) -OUTPUT(186) -OUTPUT(187) -OUTPUT(188) -OUTPUT(189) -OUTPUT(190) -OUTPUT(191) -OUTPUT(192) -OUTPUT(193) -OUTPUT(194) -OUTPUT(195) -OUTPUT(196) -OUTPUT(197) -OUTPUT(198) -OUTPUT(199) -OUTPUT(200) -OUTPUT(201) -OUTPUT(202) -OUTPUT(203) -OUTPUT(204) -OUTPUT(205) -OUTPUT(206) -OUTPUT(207) -OUTPUT(208) -OUTPUT(209) -OUTPUT(210) -OUTPUT(211) -OUTPUT(212) -OUTPUT(213) -OUTPUT(214) -OUTPUT(215) -OUTPUT(216) -OUTPUT(217) -OUTPUT(218) -OUTPUT(398) -OUTPUT(400) -OUTPUT(401) -OUTPUT(419) -OUTPUT(420) -OUTPUT(456) -OUTPUT(457) -OUTPUT(458) -OUTPUT(487) -OUTPUT(488) -OUTPUT(489) -OUTPUT(490) -OUTPUT(491) -OUTPUT(492) -OUTPUT(493) -OUTPUT(494) -OUTPUT(792) -OUTPUT(799) -OUTPUT(805) -OUTPUT(1026) -OUTPUT(1028) -OUTPUT(1029) -OUTPUT(1269) -OUTPUT(1277) -OUTPUT(1448) -OUTPUT(1726) -OUTPUT(1816) -OUTPUT(1817) -OUTPUT(1818) -OUTPUT(1819) -OUTPUT(1820) -OUTPUT(1821) -OUTPUT(1969) -OUTPUT(1970) -OUTPUT(1971) -OUTPUT(2010) -OUTPUT(2012) -OUTPUT(2014) -OUTPUT(2016) -OUTPUT(2018) -OUTPUT(2020) -OUTPUT(2022) -OUTPUT(2387) -OUTPUT(2388) -OUTPUT(2389) -OUTPUT(2390) -OUTPUT(2496) -OUTPUT(2643) -OUTPUT(2644) -OUTPUT(2891) -OUTPUT(2925) -OUTPUT(2970) -OUTPUT(2971) -OUTPUT(3038) -OUTPUT(3079) -OUTPUT(3546) -OUTPUT(3671) -OUTPUT(3803) -OUTPUT(3804) -OUTPUT(3809) -OUTPUT(3851) -OUTPUT(3875) -OUTPUT(3881) -OUTPUT(3882) - -398 = BUFF(219) -400 = BUFF(219) -401 = BUFF(219) -405 = AND(1, 3) -408 = NOT(230) -419 = BUFF(253) -420 = BUFF(253) -425 = NOT(262) -456 = BUFF(290) -457 = BUFF(290) -458 = BUFF(290) -485 = AND(309, 305, 301, 297) -486 = NOT(405) -487 = NOT(44) -488 = NOT(132) -489 = NOT(82) -490 = NOT(96) -491 = NOT(69) -492 = NOT(120) -493 = NOT(57) -494 = NOT(108) -495 = AND(2, 15, 237) -496 = BUFF(237) -499 = AND(37, 37) -500 = BUFF(219) -503 = BUFF(8) -506 = BUFF(8) -509 = BUFF(227) -521 = BUFF(234) -533 = NOT(241) -537 = NOT(246) -543 = AND(11, 246) -544 = AND(132, 82, 96, 44) -547 = AND(120, 57, 108, 69) -550 = BUFF(227) -562 = BUFF(234) -574 = NOT(256) -578 = NOT(259) -582 = BUFF(319) -594 = BUFF(322) -606 = NOT(328) -607 = NOT(331) -608 = NOT(334) -609 = NOT(337) -610 = NOT(340) -611 = NOT(343) -612 = NOT(352) -613 = BUFF(319) -625 = BUFF(322) -637 = BUFF(16) -643 = BUFF(16) -650 = NOT(355) -651 = AND(7, 237) -655 = NOT(263) -659 = NOT(266) -663 = NOT(269) -667 = NOT(272) -671 = NOT(275) -675 = NOT(278) -679 = NOT(281) -683 = NOT(284) -687 = NOT(287) -693 = BUFF(29) -699 = BUFF(29) -705 = NOT(294) -711 = NOT(297) -715 = NOT(301) -719 = NOT(305) -723 = NOT(309) -727 = NOT(313) -730 = NOT(316) -733 = NOT(346) -734 = NOT(349) -735 = BUFF(259) -738 = BUFF(256) -741 = BUFF(263) -744 = BUFF(269) -747 = BUFF(266) -750 = BUFF(275) -753 = BUFF(272) -756 = BUFF(281) -759 = BUFF(278) -762 = BUFF(287) -765 = BUFF(284) -768 = BUFF(294) -771 = BUFF(301) -774 = BUFF(297) -777 = BUFF(309) -780 = BUFF(305) -783 = BUFF(316) -786 = BUFF(313) -792 = NOT(485) -799 = NOT(495) -800 = NOT(499) -805 = BUFF(500) -900 = NAND(331, 606) -901 = NAND(328, 607) -902 = NAND(337, 608) -903 = NAND(334, 609) -904 = NAND(343, 610) -905 = NAND(340, 611) -998 = NAND(349, 733) -999 = NAND(346, 734) -1026 = AND(94, 500) -1027 = AND(325, 651) -1028 = NOT(651) -1029 = NAND(231, 651) -1032 = NOT(544) -1033 = NOT(547) -1034 = AND(547, 544) -1037 = BUFF(503) -1042 = NOT(509) -1053 = NOT(521) -1064 = AND(80, 509, 521) -1065 = AND(68, 509, 521) -1066 = AND(79, 509, 521) -1067 = AND(78, 509, 521) -1068 = AND(77, 509, 521) -1069 = AND(11, 537) -1070 = BUFF(503) -1075 = NOT(550) -1086 = NOT(562) -1097 = AND(76, 550, 562) -1098 = AND(75, 550, 562) -1099 = AND(74, 550, 562) -1100 = AND(73, 550, 562) -1101 = AND(72, 550, 562) -1102 = NOT(582) -1113 = NOT(594) -1124 = AND(114, 582, 594) -1125 = AND(113, 582, 594) -1126 = AND(112, 582, 594) -1127 = AND(111, 582, 594) -1128 = AND(582, 594) -1129 = NAND(900, 901) -1133 = NAND(902, 903) -1137 = NAND(904, 905) -1140 = NOT(741) -1141 = NAND(741, 612) -1142 = NOT(744) -1143 = NOT(747) -1144 = NOT(750) -1145 = NOT(753) -1146 = NOT(613) -1157 = NOT(625) -1168 = AND(118, 613, 625) -1169 = AND(107, 613, 625) -1170 = AND(117, 613, 625) -1171 = AND(116, 613, 625) -1172 = AND(115, 613, 625) -1173 = NOT(637) -1178 = NOT(643) -1184 = NOT(768) -1185 = NAND(768, 650) -1186 = NOT(771) -1187 = NOT(774) -1188 = NOT(777) -1189 = NOT(780) -1190 = BUFF(506) -1195 = BUFF(506) -1200 = NOT(693) -1205 = NOT(699) -1210 = NOT(735) -1211 = NOT(738) -1212 = NOT(756) -1213 = NOT(759) -1214 = NOT(762) -1215 = NOT(765) -1216 = NAND(998, 999) -1219 = BUFF(574) -1222 = BUFF(578) -1225 = BUFF(655) -1228 = BUFF(659) -1231 = BUFF(663) -1234 = BUFF(667) -1237 = BUFF(671) -1240 = BUFF(675) -1243 = BUFF(679) -1246 = BUFF(683) -1249 = NOT(783) -1250 = NOT(786) -1251 = BUFF(687) -1254 = BUFF(705) -1257 = BUFF(711) -1260 = BUFF(715) -1263 = BUFF(719) -1266 = BUFF(723) -1269 = NOT(1027) -1275 = AND(325, 1032) -1276 = AND(231, 1033) -1277 = BUFF(1034) -1302 = OR(1069, 543) -1351 = NAND(352, 1140) -1352 = NAND(747, 1142) -1353 = NAND(744, 1143) -1354 = NAND(753, 1144) -1355 = NAND(750, 1145) -1395 = NAND(355, 1184) -1396 = NAND(774, 1186) -1397 = NAND(771, 1187) -1398 = NAND(780, 1188) -1399 = NAND(777, 1189) -1422 = NAND(738, 1210) -1423 = NAND(735, 1211) -1424 = NAND(759, 1212) -1425 = NAND(756, 1213) -1426 = NAND(765, 1214) -1427 = NAND(762, 1215) -1440 = NAND(786, 1249) -1441 = NAND(783, 1250) -1448 = NOT(1034) -1449 = NOT(1275) -1450 = NOT(1276) -1451 = AND(93, 1042, 1053) -1452 = AND(55, 509, 1053) -1453 = AND(67, 1042, 521) -1454 = AND(81, 1042, 1053) -1455 = AND(43, 509, 1053) -1456 = AND(56, 1042, 521) -1457 = AND(92, 1042, 1053) -1458 = AND(54, 509, 1053) -1459 = AND(66, 1042, 521) -1460 = AND(91, 1042, 1053) -1461 = AND(53, 509, 1053) -1462 = AND(65, 1042, 521) -1463 = AND(90, 1042, 1053) -1464 = AND(52, 509, 1053) -1465 = AND(64, 1042, 521) -1466 = AND(89, 1075, 1086) -1467 = AND(51, 550, 1086) -1468 = AND(63, 1075, 562) -1469 = AND(88, 1075, 1086) -1470 = AND(50, 550, 1086) -1471 = AND(62, 1075, 562) -1472 = AND(87, 1075, 1086) -1473 = AND(49, 550, 1086) -1474 = AND(1075, 562) -1475 = AND(86, 1075, 1086) -1476 = AND(48, 550, 1086) -1477 = AND(61, 1075, 562) -1478 = AND(85, 1075, 1086) -1479 = AND(47, 550, 1086) -1480 = AND(60, 1075, 562) -1481 = AND(138, 1102, 1113) -1482 = AND(102, 582, 1113) -1483 = AND(126, 1102, 594) -1484 = AND(137, 1102, 1113) -1485 = AND(101, 582, 1113) -1486 = AND(125, 1102, 594) -1487 = AND(136, 1102, 1113) -1488 = AND(100, 582, 1113) -1489 = AND(124, 1102, 594) -1490 = AND(135, 1102, 1113) -1491 = AND(99, 582, 1113) -1492 = AND(123, 1102, 594) -1493 = AND(1102, 1113) -1494 = AND(582, 1113) -1495 = AND(1102, 594) -1496 = NOT(1129) -1499 = NOT(1133) -1502 = NAND(1351, 1141) -1506 = NAND(1352, 1353) -1510 = NAND(1354, 1355) -1513 = BUFF(1137) -1516 = BUFF(1137) -1519 = NOT(1219) -1520 = NOT(1222) -1521 = NOT(1225) -1522 = NOT(1228) -1523 = NOT(1231) -1524 = NOT(1234) -1525 = NOT(1237) -1526 = NOT(1240) -1527 = NOT(1243) -1528 = NOT(1246) -1529 = AND(142, 1146, 1157) -1530 = AND(106, 613, 1157) -1531 = AND(130, 1146, 625) -1532 = AND(131, 1146, 1157) -1533 = AND(95, 613, 1157) -1534 = AND(119, 1146, 625) -1535 = AND(141, 1146, 1157) -1536 = AND(105, 613, 1157) -1537 = AND(129, 1146, 625) -1538 = AND(140, 1146, 1157) -1539 = AND(104, 613, 1157) -1540 = AND(128, 1146, 625) -1541 = AND(139, 1146, 1157) -1542 = AND(103, 613, 1157) -1543 = AND(127, 1146, 625) -1544 = AND(19, 1173) -1545 = AND(4, 1173) -1546 = AND(20, 1173) -1547 = AND(5, 1173) -1548 = AND(21, 1178) -1549 = AND(22, 1178) -1550 = AND(23, 1178) -1551 = AND(6, 1178) -1552 = AND(24, 1178) -1553 = NAND(1395, 1185) -1557 = NAND(1396, 1397) -1561 = NAND(1398, 1399) -1564 = AND(25, 1200) -1565 = AND(32, 1200) -1566 = AND(26, 1200) -1567 = AND(33, 1200) -1568 = AND(27, 1205) -1569 = AND(34, 1205) -1570 = AND(35, 1205) -1571 = AND(28, 1205) -1572 = NOT(1251) -1573 = NOT(1254) -1574 = NOT(1257) -1575 = NOT(1260) -1576 = NOT(1263) -1577 = NOT(1266) -1578 = NAND(1422, 1423) -1581 = NOT(1216) -1582 = NAND(1426, 1427) -1585 = NAND(1424, 1425) -1588 = NAND(1440, 1441) -1591 = AND(1449, 1450) -1596 = OR(1451, 1452, 1453, 1064) -1600 = OR(1454, 1455, 1456, 1065) -1606 = OR(1457, 1458, 1459, 1066) -1612 = OR(1460, 1461, 1462, 1067) -1615 = OR(1463, 1464, 1465, 1068) -1619 = OR(1466, 1467, 1468, 1097) -1624 = OR(1469, 1470, 1471, 1098) -1628 = OR(1472, 1473, 1474, 1099) -1631 = OR(1475, 1476, 1477, 1100) -1634 = OR(1478, 1479, 1480, 1101) -1637 = OR(1481, 1482, 1483, 1124) -1642 = OR(1484, 1485, 1486, 1125) -1647 = OR(1487, 1488, 1489, 1126) -1651 = OR(1490, 1491, 1492, 1127) -1656 = OR(1493, 1494, 1495, 1128) -1676 = OR(1532, 1533, 1534, 1169) -1681 = OR(1535, 1536, 1537, 1170) -1686 = OR(1538, 1539, 1540, 1171) -1690 = OR(1541, 1542, 1543, 1172) -1708 = OR(1529, 1530, 1531, 1168) -1726 = BUFF(1591) -1770 = NOT(1502) -1773 = NOT(1506) -1776 = NOT(1513) -1777 = NOT(1516) -1778 = BUFF(1510) -1781 = BUFF(1510) -1784 = AND(1133, 1129, 1513) -1785 = AND(1499, 1496, 1516) -1795 = NOT(1553) -1798 = NOT(1557) -1801 = BUFF(1561) -1804 = BUFF(1561) -1807 = NOT(1588) -1808 = NOT(1578) -1809 = NAND(1578, 1581) -1810 = NOT(1582) -1811 = NOT(1585) -1813 = AND(1596, 241) -1814 = AND(1606, 241) -1815 = AND(1600, 241) -1816 = NOT(1642) -1817 = NOT(1647) -1818 = NOT(1637) -1819 = NOT(1624) -1820 = NOT(1619) -1821 = NOT(1615) -1822 = AND(496, 224, 36, 1591) -1823 = AND(496, 224, 1591, 486) -1824 = BUFF(1596) -1827 = NOT(1606) -1830 = AND(1600, 537) -1831 = AND(1606, 537) -1832 = AND(1619, 246) -1833 = NOT(1596) -1836 = NOT(1600) -1841 = NOT(1606) -1848 = BUFF(1612) -1852 = BUFF(1615) -1856 = BUFF(1619) -1863 = BUFF(1624) -1870 = BUFF(1628) -1875 = BUFF(1631) -1880 = BUFF(1634) -1885 = NAND(727, 1651) -1888 = NAND(730, 1656) -1891 = BUFF(1686) -1894 = AND(1637, 425) -1897 = NOT(1642) -1908 = AND(1496, 1133, 1776) -1909 = AND(1129, 1499, 1777) -1910 = AND(1600, 637) -1911 = AND(1606, 637) -1912 = AND(1612, 637) -1913 = AND(1615, 637) -1914 = AND(1619, 643) -1915 = AND(1624, 643) -1916 = AND(1628, 643) -1917 = AND(1631, 643) -1918 = AND(1634, 643) -1919 = NOT(1708) -1928 = AND(1676, 693) -1929 = AND(1681, 693) -1930 = AND(1686, 693) -1931 = AND(1690, 693) -1932 = AND(1637, 699) -1933 = AND(1642, 699) -1934 = AND(1647, 699) -1935 = AND(1651, 699) -1936 = BUFF(1600) -1939 = NAND(1216, 1808) -1940 = NAND(1585, 1810) -1941 = NAND(1582, 1811) -1942 = BUFF(1676) -1945 = BUFF(1686) -1948 = BUFF(1681) -1951 = BUFF(1637) -1954 = BUFF(1690) -1957 = BUFF(1647) -1960 = BUFF(1642) -1963 = BUFF(1656) -1966 = BUFF(1651) -1969 = OR(533, 1815) -1970 = NOT(1822) -1971 = NOT(1823) -2010 = BUFF(1848) -2012 = BUFF(1852) -2014 = BUFF(1856) -2016 = BUFF(1863) -2018 = BUFF(1870) -2020 = BUFF(1875) -2022 = BUFF(1880) -2028 = NOT(1778) -2029 = NOT(1781) -2030 = NOR(1908, 1784) -2031 = NOR(1909, 1785) -2032 = AND(1506, 1502, 1778) -2033 = AND(1773, 1770, 1781) -2034 = OR(1571, 1935) -2040 = NOT(1801) -2041 = NOT(1804) -2042 = AND(1557, 1553, 1801) -2043 = AND(1798, 1795, 1804) -2046 = NAND(1939, 1809) -2049 = NAND(1940, 1941) -2052 = OR(1544, 1910) -2055 = OR(1545, 1911) -2058 = OR(1546, 1912) -2061 = OR(1547, 1913) -2064 = OR(1548, 1914) -2067 = OR(1549, 1915) -2070 = OR(1550, 1916) -2073 = OR(1551, 1917) -2076 = OR(1552, 1918) -2079 = OR(1564, 1928) -2095 = OR(1565, 1929) -2098 = OR(1566, 1930) -2101 = OR(1567, 1931) -2104 = OR(1568, 1932) -2107 = OR(1569, 1933) -2110 = OR(1570, 1934) -2113 = AND(1897, 1894, 40) -2119 = NOT(1894) -2120 = NAND(408, 1827) -2125 = AND(1824, 537) -2126 = AND(1852, 246) -2127 = AND(1848, 537) -2128 = NOT(1848) -2135 = NOT(1852) -2141 = NOT(1863) -2144 = NOT(1870) -2147 = NOT(1875) -2150 = NOT(1880) -2153 = AND(727, 1885) -2154 = AND(1885, 1651) -2155 = AND(730, 1888) -2156 = AND(1888, 1656) -2157 = AND(1770, 1506, 2028) -2158 = AND(1502, 1773, 2029) -2171 = NOT(1942) -2172 = NAND(1942, 1919) -2173 = NOT(1945) -2174 = NOT(1948) -2175 = NOT(1951) -2176 = NOT(1954) -2177 = AND(1795, 1557, 2040) -2178 = AND(1553, 1798, 2041) -2185 = BUFF(1836) -2188 = BUFF(1833) -2191 = BUFF(1841) -2194 = NOT(1856) -2197 = NOT(1827) -2200 = NOT(1936) -2201 = BUFF(1836) -2204 = BUFF(1833) -2207 = BUFF(1841) -2210 = BUFF(1824) -2213 = BUFF(1841) -2216 = BUFF(1841) -2219 = NAND(2031, 2030) -2234 = NOT(1957) -2235 = NOT(1960) -2236 = NOT(1963) -2237 = NOT(1966) -2250 = AND(40, 1897, 2119) -2266 = OR(1831, 2126) -2269 = OR(2127, 1832) -2291 = OR(2153, 2154) -2294 = OR(2155, 2156) -2297 = NOR(2157, 2032) -2298 = NOR(2158, 2033) -2300 = NOT(2046) -2301 = NOT(2049) -2302 = NAND(2052, 1519) -2303 = NOT(2052) -2304 = NAND(2055, 1520) -2305 = NOT(2055) -2306 = NAND(2058, 1521) -2307 = NOT(2058) -2308 = NAND(2061, 1522) -2309 = NOT(2061) -2310 = NAND(2064, 1523) -2311 = NOT(2064) -2312 = NAND(2067, 1524) -2313 = NOT(2067) -2314 = NAND(2070, 1525) -2315 = NOT(2070) -2316 = NAND(2073, 1526) -2317 = NOT(2073) -2318 = NAND(2076, 1527) -2319 = NOT(2076) -2320 = NAND(2079, 1528) -2321 = NOT(2079) -2322 = NAND(1708, 2171) -2323 = NAND(1948, 2173) -2324 = NAND(1945, 2174) -2325 = NAND(1954, 2175) -2326 = NAND(1951, 2176) -2327 = NOR(2177, 2042) -2328 = NOR(2178, 2043) -2329 = NAND(2095, 1572) -2330 = NOT(2095) -2331 = NAND(2098, 1573) -2332 = NOT(2098) -2333 = NAND(2101, 1574) -2334 = NOT(2101) -2335 = NAND(2104, 1575) -2336 = NOT(2104) -2337 = NAND(2107, 1576) -2338 = NOT(2107) -2339 = NAND(2110, 1577) -2340 = NOT(2110) -2354 = NAND(1960, 2234) -2355 = NAND(1957, 2235) -2356 = NAND(1966, 2236) -2357 = NAND(1963, 2237) -2358 = AND(2120, 533) -2359 = NOT(2113) -2364 = NOT(2185) -2365 = NOT(2188) -2366 = NOT(2191) -2367 = NOT(2194) -2368 = BUFF(2120) -2372 = NOT(2201) -2373 = NOT(2204) -2374 = NOT(2207) -2375 = NOT(2210) -2376 = NOT(2213) -2377 = NOT(2113) -2382 = BUFF(2113) -2386 = AND(2120, 246) -2387 = BUFF(2266) -2388 = BUFF(2266) -2389 = BUFF(2269) -2390 = BUFF(2269) -2391 = BUFF(2113) -2395 = NOT(2113) -2400 = NAND(2219, 2300) -2403 = NOT(2216) -2406 = NOT(2219) -2407 = NAND(1219, 2303) -2408 = NAND(1222, 2305) -2409 = NAND(1225, 2307) -2410 = NAND(1228, 2309) -2411 = NAND(1231, 2311) -2412 = NAND(1234, 2313) -2413 = NAND(1237, 2315) -2414 = NAND(1240, 2317) -2415 = NAND(1243, 2319) -2416 = NAND(1246, 2321) -2417 = NAND(2322, 2172) -2421 = NAND(2323, 2324) -2425 = NAND(2325, 2326) -2428 = NAND(1251, 2330) -2429 = NAND(1254, 2332) -2430 = NAND(1257, 2334) -2431 = NAND(1260, 2336) -2432 = NAND(1263, 2338) -2433 = NAND(1266, 2340) -2434 = BUFF(2128) -2437 = BUFF(2135) -2440 = BUFF(2144) -2443 = BUFF(2141) -2446 = BUFF(2150) -2449 = BUFF(2147) -2452 = NOT(2197) -2453 = NAND(2197, 2200) -2454 = BUFF(2128) -2457 = BUFF(2144) -2460 = BUFF(2141) -2463 = BUFF(2150) -2466 = BUFF(2147) -2469 = NOT(2120) -2472 = BUFF(2128) -2475 = BUFF(2135) -2478 = BUFF(2128) -2481 = BUFF(2135) -2484 = NAND(2298, 2297) -2487 = NAND(2356, 2357) -2490 = NAND(2354, 2355) -2493 = NAND(2328, 2327) -2496 = OR(2358, 1814) -2503 = NAND(2188, 2364) -2504 = NAND(2185, 2365) -2510 = NAND(2204, 2372) -2511 = NAND(2201, 2373) -2521 = OR(1830, 2386) -2528 = NAND(2046, 2406) -2531 = NOT(2291) -2534 = NOT(2294) -2537 = BUFF(2250) -2540 = BUFF(2250) -2544 = NAND(2302, 2407) -2545 = NAND(2304, 2408) -2546 = NAND(2306, 2409) -2547 = NAND(2308, 2410) -2548 = NAND(2310, 2411) -2549 = NAND(2312, 2412) -2550 = NAND(2314, 2413) -2551 = NAND(2316, 2414) -2552 = NAND(2318, 2415) -2553 = NAND(2320, 2416) -2563 = NAND(2329, 2428) -2564 = NAND(2331, 2429) -2565 = NAND(2333, 2430) -2566 = NAND(2335, 2431) -2567 = NAND(2337, 2432) -2568 = NAND(2339, 2433) -2579 = NAND(1936, 2452) -2603 = BUFF(2359) -2607 = AND(1880, 2377) -2608 = AND(1676, 2377) -2609 = AND(1681, 2377) -2610 = AND(1891, 2377) -2611 = AND(1856, 2382) -2612 = AND(1863, 2382) -2613 = NAND(2503, 2504) -2617 = NOT(2434) -2618 = NAND(2434, 2366) -2619 = NAND(2437, 2367) -2620 = NOT(2437) -2621 = NOT(2368) -2624 = NAND(2510, 2511) -2628 = NOT(2454) -2629 = NAND(2454, 2374) -2630 = NOT(2472) -2631 = AND(1856, 2391) -2632 = AND(1863, 2391) -2633 = AND(1880, 2395) -2634 = AND(1676, 2395) -2635 = AND(1681, 2395) -2636 = AND(1891, 2395) -2638 = NOT(2382) -2643 = BUFF(2521) -2644 = BUFF(2521) -2645 = NOT(2475) -2646 = NOT(2391) -2652 = NAND(2528, 2400) -2655 = NOT(2478) -2656 = NOT(2481) -2659 = BUFF(2359) -2663 = NOT(2484) -2664 = NAND(2484, 2301) -2665 = NOT(2553) -2666 = NOT(2552) -2667 = NOT(2551) -2668 = NOT(2550) -2669 = NOT(2549) -2670 = NOT(2548) -2671 = NOT(2547) -2672 = NOT(2546) -2673 = NOT(2545) -2674 = NOT(2544) -2675 = NOT(2568) -2676 = NOT(2567) -2677 = NOT(2566) -2678 = NOT(2565) -2679 = NOT(2564) -2680 = NOT(2563) -2681 = NOT(2417) -2684 = NOT(2421) -2687 = BUFF(2425) -2690 = BUFF(2425) -2693 = NOT(2493) -2694 = NAND(2493, 1807) -2695 = NOT(2440) -2696 = NOT(2443) -2697 = NOT(2446) -2698 = NOT(2449) -2699 = NOT(2457) -2700 = NOT(2460) -2701 = NOT(2463) -2702 = NOT(2466) -2703 = NAND(2579, 2453) -2706 = NOT(2469) -2707 = NOT(2487) -2708 = NOT(2490) -2709 = AND(2294, 2534) -2710 = AND(2291, 2531) -2719 = NAND(2191, 2617) -2720 = NAND(2194, 2620) -2726 = NAND(2207, 2628) -2729 = BUFF(2537) -2738 = BUFF(2537) -2743 = NOT(2652) -2747 = NAND(2049, 2663) -2748 = AND(2665, 2666, 2667, 2668, 2669) -2749 = AND(2670, 2671, 2672, 2673, 2674) -2750 = AND(2034, 2675) -2751 = AND(2676, 2677, 2678, 2679, 2680) -2760 = NAND(1588, 2693) -2761 = BUFF(2540) -2766 = BUFF(2540) -2771 = NAND(2443, 2695) -2772 = NAND(2440, 2696) -2773 = NAND(2449, 2697) -2774 = NAND(2446, 2698) -2775 = NAND(2460, 2699) -2776 = NAND(2457, 2700) -2777 = NAND(2466, 2701) -2778 = NAND(2463, 2702) -2781 = NAND(2490, 2707) -2782 = NAND(2487, 2708) -2783 = OR(2709, 2534) -2784 = OR(2710, 2531) -2789 = AND(1856, 2638) -2790 = AND(1863, 2638) -2791 = AND(1870, 2638) -2792 = AND(1875, 2638) -2793 = NOT(2613) -2796 = NAND(2719, 2618) -2800 = NAND(2619, 2720) -2803 = NOT(2624) -2806 = NAND(2726, 2629) -2809 = AND(1856, 2646) -2810 = AND(1863, 2646) -2811 = AND(1870, 2646) -2812 = AND(1875, 2646) -2817 = AND(2743, 14) -2820 = BUFF(2603) -2826 = NAND(2747, 2664) -2829 = AND(2748, 2749) -2830 = AND(2750, 2751) -2831 = BUFF(2659) -2837 = NOT(2687) -2838 = NOT(2690) -2839 = AND(2421, 2417, 2687) -2840 = AND(2684, 2681, 2690) -2841 = NAND(2760, 2694) -2844 = BUFF(2603) -2854 = BUFF(2603) -2859 = BUFF(2659) -2869 = BUFF(2659) -2874 = NAND(2773, 2774) -2877 = NAND(2771, 2772) -2880 = NOT(2703) -2881 = NAND(2703, 2706) -2882 = NAND(2777, 2778) -2885 = NAND(2775, 2776) -2888 = NAND(2781, 2782) -2891 = NAND(2783, 2784) -2894 = AND(2607, 2729) -2895 = AND(2608, 2729) -2896 = AND(2609, 2729) -2897 = AND(2610, 2729) -2898 = OR(2789, 2611) -2899 = OR(2790, 2612) -2900 = AND(2791, 1037) -2901 = AND(2792, 1037) -2914 = OR(2809, 2631) -2915 = OR(2810, 2632) -2916 = AND(2811, 1070) -2917 = AND(2812, 1070) -2918 = AND(2633, 2738) -2919 = AND(2634, 2738) -2920 = AND(2635, 2738) -2921 = AND(2636, 2738) -2925 = BUFF(2817) -2931 = AND(2829, 2830, 1302) -2938 = AND(2681, 2421, 2837) -2939 = AND(2417, 2684, 2838) -2963 = NAND(2469, 2880) -2970 = NOT(2841) -2971 = NOT(2826) -2972 = NOT(2894) -2975 = NOT(2895) -2978 = NOT(2896) -2981 = NOT(2897) -2984 = AND(2898, 1037) -2985 = AND(2899, 1037) -2986 = NOT(2900) -2989 = NOT(2901) -2992 = NOT(2796) -2995 = BUFF(2800) -2998 = BUFF(2800) -3001 = BUFF(2806) -3004 = BUFF(2806) -3007 = AND(574, 2820) -3008 = AND(2914, 1070) -3009 = AND(2915, 1070) -3010 = NOT(2916) -3013 = NOT(2917) -3016 = NOT(2918) -3019 = NOT(2919) -3022 = NOT(2920) -3025 = NOT(2921) -3028 = NOT(2817) -3029 = AND(574, 2831) -3030 = NOT(2820) -3035 = AND(578, 2820) -3036 = AND(655, 2820) -3037 = AND(659, 2820) -3038 = BUFF(2931) -3039 = NOT(2831) -3044 = AND(578, 2831) -3045 = AND(655, 2831) -3046 = AND(659, 2831) -3047 = NOR(2938, 2839) -3048 = NOR(2939, 2840) -3049 = NOT(2888) -3050 = NOT(2844) -3053 = AND(663, 2844) -3054 = AND(667, 2844) -3055 = AND(671, 2844) -3056 = AND(675, 2844) -3057 = AND(679, 2854) -3058 = AND(683, 2854) -3059 = AND(687, 2854) -3060 = AND(705, 2854) -3061 = NOT(2859) -3064 = AND(663, 2859) -3065 = AND(667, 2859) -3066 = AND(671, 2859) -3067 = AND(675, 2859) -3068 = AND(679, 2869) -3069 = AND(683, 2869) -3070 = AND(687, 2869) -3071 = AND(705, 2869) -3072 = NOT(2874) -3073 = NOT(2877) -3074 = NOT(2882) -3075 = NOT(2885) -3076 = NAND(2881, 2963) -3079 = NOT(2931) -3088 = NOT(2984) -3091 = NOT(2985) -3110 = NOT(3008) -3113 = NOT(3009) -3137 = AND(3055, 1190) -3140 = AND(3056, 1190) -3143 = AND(3057, 2761) -3146 = AND(3058, 2761) -3149 = AND(3059, 2761) -3152 = AND(3060, 2761) -3157 = AND(3066, 1195) -3160 = AND(3067, 1195) -3163 = AND(3068, 2766) -3166 = AND(3069, 2766) -3169 = AND(3070, 2766) -3172 = AND(3071, 2766) -3175 = NAND(2877, 3072) -3176 = NAND(2874, 3073) -3177 = NAND(2885, 3074) -3178 = NAND(2882, 3075) -3180 = NAND(3048, 3047) -3187 = NOT(2995) -3188 = NOT(2998) -3189 = NOT(3001) -3190 = NOT(3004) -3191 = AND(2796, 2613, 2995) -3192 = AND(2992, 2793, 2998) -3193 = AND(2624, 2368, 3001) -3194 = AND(2803, 2621, 3004) -3195 = NAND(3076, 2375) -3196 = NOT(3076) -3197 = AND(687, 3030) -3208 = AND(687, 3039) -3215 = AND(705, 3030) -3216 = AND(711, 3030) -3217 = AND(715, 3030) -3218 = AND(705, 3039) -3219 = AND(711, 3039) -3220 = AND(715, 3039) -3222 = AND(719, 3050) -3223 = AND(723, 3050) -3230 = AND(719, 3061) -3231 = AND(723, 3061) -3238 = NAND(3175, 3176) -3241 = NAND(3177, 3178) -3244 = BUFF(2981) -3247 = BUFF(2978) -3250 = BUFF(2975) -3253 = BUFF(2972) -3256 = BUFF(2989) -3259 = BUFF(2986) -3262 = BUFF(3025) -3265 = BUFF(3022) -3268 = BUFF(3019) -3271 = BUFF(3016) -3274 = BUFF(3013) -3277 = BUFF(3010) -3281 = AND(2793, 2796, 3187) -3282 = AND(2613, 2992, 3188) -3283 = AND(2621, 2624, 3189) -3284 = AND(2368, 2803, 3190) -3286 = NAND(2210, 3196) -3288 = OR(3197, 3007) -3289 = NAND(3180, 3049) -3291 = AND(3152, 2981) -3293 = AND(3149, 2978) -3295 = AND(3146, 2975) -3296 = AND(2972, 3143) -3299 = AND(3140, 2989) -3301 = AND(3137, 2986) -3302 = OR(3208, 3029) -3304 = AND(3172, 3025) -3306 = AND(3169, 3022) -3308 = AND(3166, 3019) -3309 = AND(3016, 3163) -3312 = AND(3160, 3013) -3314 = AND(3157, 3010) -3315 = OR(3215, 3035) -3318 = OR(3216, 3036) -3321 = OR(3217, 3037) -3324 = OR(3218, 3044) -3327 = OR(3219, 3045) -3330 = OR(3220, 3046) -3333 = NOT(3180) -3334 = OR(3222, 3053) -3335 = OR(3223, 3054) -3336 = OR(3230, 3064) -3337 = OR(3231, 3065) -3340 = BUFF(3152) -3344 = BUFF(3149) -3348 = BUFF(3146) -3352 = BUFF(3143) -3356 = BUFF(3140) -3360 = BUFF(3137) -3364 = BUFF(3091) -3367 = BUFF(3088) -3370 = BUFF(3172) -3374 = BUFF(3169) -3378 = BUFF(3166) -3382 = BUFF(3163) -3386 = BUFF(3160) -3390 = BUFF(3157) -3394 = BUFF(3113) -3397 = BUFF(3110) -3400 = NAND(3195, 3286) -3401 = NOR(3281, 3191) -3402 = NOR(3282, 3192) -3403 = NOR(3283, 3193) -3404 = NOR(3284, 3194) -3405 = NOT(3238) -3406 = NOT(3241) -3409 = AND(3288, 1836) -3410 = NAND(2888, 3333) -3412 = NOT(3244) -3414 = NOT(3247) -3416 = NOT(3250) -3418 = NOT(3253) -3420 = NOT(3256) -3422 = NOT(3259) -3428 = AND(3302, 1836) -3430 = NOT(3262) -3432 = NOT(3265) -3434 = NOT(3268) -3436 = NOT(3271) -3438 = NOT(3274) -3440 = NOT(3277) -3450 = AND(3334, 1190) -3453 = AND(3335, 1190) -3456 = AND(3336, 1195) -3459 = AND(3337, 1195) -3478 = AND(3400, 533) -3479 = AND(3318, 2128) -3480 = AND(3315, 1841) -3481 = NAND(3410, 3289) -3482 = NOT(3340) -3483 = NAND(3340, 3412) -3484 = NOT(3344) -3485 = NAND(3344, 3414) -3486 = NOT(3348) -3487 = NAND(3348, 3416) -3488 = NOT(3352) -3489 = NAND(3352, 3418) -3490 = NOT(3356) -3491 = NAND(3356, 3420) -3492 = NOT(3360) -3493 = NAND(3360, 3422) -3494 = NOT(3364) -3496 = NOT(3367) -3498 = AND(3321, 2135) -3499 = AND(3327, 2128) -3500 = AND(3324, 1841) -3501 = NOT(3370) -3502 = NAND(3370, 3430) -3503 = NOT(3374) -3504 = NAND(3374, 3432) -3505 = NOT(3378) -3506 = NAND(3378, 3434) -3507 = NOT(3382) -3508 = NAND(3382, 3436) -3509 = NOT(3386) -3510 = NAND(3386, 3438) -3511 = NOT(3390) -3512 = NAND(3390, 3440) -3513 = NOT(3394) -3515 = NOT(3397) -3517 = AND(3330, 2135) -3522 = NAND(3402, 3401) -3525 = NAND(3404, 3403) -3528 = BUFF(3318) -3531 = BUFF(3315) -3534 = BUFF(3321) -3537 = BUFF(3327) -3540 = BUFF(3324) -3543 = BUFF(3330) -3546 = OR(3478, 1813) -3551 = NOT(3481) -3552 = NAND(3244, 3482) -3553 = NAND(3247, 3484) -3554 = NAND(3250, 3486) -3555 = NAND(3253, 3488) -3556 = NAND(3256, 3490) -3557 = NAND(3259, 3492) -3558 = AND(3453, 3091) -3559 = AND(3450, 3088) -3563 = NAND(3262, 3501) -3564 = NAND(3265, 3503) -3565 = NAND(3268, 3505) -3566 = NAND(3271, 3507) -3567 = NAND(3274, 3509) -3568 = NAND(3277, 3511) -3569 = AND(3459, 3113) -3570 = AND(3456, 3110) -3576 = BUFF(3453) -3579 = BUFF(3450) -3585 = BUFF(3459) -3588 = BUFF(3456) -3592 = NOT(3522) -3593 = NAND(3522, 3405) -3594 = NOT(3525) -3595 = NAND(3525, 3406) -3596 = NOT(3528) -3597 = NAND(3528, 2630) -3598 = NAND(3531, 2376) -3599 = NOT(3531) -3600 = AND(3551, 800) -3603 = NAND(3552, 3483) -3608 = NAND(3553, 3485) -3612 = NAND(3554, 3487) -3615 = NAND(3555, 3489) -3616 = NAND(3556, 3491) -3622 = NAND(3557, 3493) -3629 = NOT(3534) -3630 = NAND(3534, 2645) -3631 = NOT(3537) -3632 = NAND(3537, 2655) -3633 = NAND(3540, 2403) -3634 = NOT(3540) -3635 = NAND(3563, 3502) -3640 = NAND(3564, 3504) -3644 = NAND(3565, 3506) -3647 = NAND(3566, 3508) -3648 = NAND(3567, 3510) -3654 = NAND(3568, 3512) -3661 = NOT(3543) -3662 = NAND(3543, 2656) -3667 = NAND(3238, 3592) -3668 = NAND(3241, 3594) -3669 = NAND(2472, 3596) -3670 = NAND(2213, 3599) -3671 = BUFF(3600) -3691 = NOT(3576) -3692 = NAND(3576, 3494) -3693 = NOT(3579) -3694 = NAND(3579, 3496) -3695 = NAND(2475, 3629) -3696 = NAND(2478, 3631) -3697 = NAND(2216, 3634) -3716 = NOT(3585) -3717 = NAND(3585, 3513) -3718 = NOT(3588) -3719 = NAND(3588, 3515) -3720 = NAND(2481, 3661) -3721 = NAND(3667, 3593) -3722 = NAND(3668, 3595) -3723 = NAND(3669, 3597) -3726 = NAND(3670, 3598) -3727 = NOT(3600) -3728 = NAND(3364, 3691) -3729 = NAND(3367, 3693) -3730 = NAND(3695, 3630) -3731 = AND(3608, 3615, 3612, 3603) -3732 = AND(3603, 3293) -3733 = AND(3608, 3603, 3295) -3734 = AND(3612, 3603, 3296, 3608) -3735 = AND(3616, 3301) -3736 = AND(3622, 3616, 3558) -3737 = NAND(3696, 3632) -3740 = NAND(3697, 3633) -3741 = NAND(3394, 3716) -3742 = NAND(3397, 3718) -3743 = NAND(3720, 3662) -3744 = AND(3640, 3647, 3644, 3635) -3745 = AND(3635, 3306) -3746 = AND(3640, 3635, 3308) -3747 = AND(3644, 3635, 3309, 3640) -3748 = AND(3648, 3314) -3749 = AND(3654, 3648, 3569) -3750 = NOT(3721) -3753 = AND(3722, 246) -3754 = NAND(3728, 3692) -3758 = NAND(3729, 3694) -3761 = NOT(3731) -3762 = OR(3291, 3732, 3733, 3734) -3767 = NAND(3741, 3717) -3771 = NAND(3742, 3719) -3774 = NOT(3744) -3775 = OR(3304, 3745, 3746, 3747) -3778 = AND(3723, 3480) -3779 = AND(3726, 3723, 3409) -3780 = OR(2125, 3753) -3790 = AND(3750, 800) -3793 = AND(3737, 3500) -3794 = AND(3740, 3737, 3428) -3802 = OR(3479, 3778, 3779) -3803 = BUFF(3780) -3804 = BUFF(3780) -3805 = NOT(3762) -3806 = AND(3622, 3730, 3754, 3616, 3758) -3807 = AND(3754, 3616, 3559, 3622) -3808 = AND(3758, 3754, 3616, 3498, 3622) -3809 = BUFF(3790) -3811 = OR(3499, 3793, 3794) -3812 = NOT(3775) -3813 = AND(3654, 3743, 3767, 3648, 3771) -3814 = AND(3767, 3648, 3570, 3654) -3815 = AND(3771, 3767, 3648, 3517, 3654) -3816 = OR(3299, 3735, 3736, 3807, 3808) -3817 = AND(3806, 3802) -3818 = NAND(3805, 3761) -3819 = NOT(3790) -3820 = OR(3312, 3748, 3749, 3814, 3815) -3821 = AND(3813, 3811) -3822 = NAND(3812, 3774) -3823 = OR(3816, 3817) -3826 = AND(3727, 3819, 2841) -3827 = OR(3820, 3821) -3834 = NOT(3823) -3835 = AND(3818, 3823) -3836 = NOT(3827) -3837 = AND(3822, 3827) -3838 = AND(3762, 3834) -3839 = AND(3775, 3836) -3840 = OR(3838, 3835) -3843 = OR(3839, 3837) -3851 = BUFF(3843) -3852 = NAND(3843, 3840) -3857 = AND(3843, 3852) -3858 = AND(3852, 3840) -3859 = OR(3857, 3858) -3864 = NOT(3859) -3869 = AND(3859, 3864) -3870 = OR(3869, 3864) -3875 = NOT(3870) -3876 = AND(2826, 3028, 3870) -3877 = AND(3826, 3876, 1591) -3881 = BUFF(3877) -3882 = NOT(3877) diff --git a/ISCAS85/c2670.test b/ISCAS85/c2670.test deleted file mode 100644 index e69de29..0000000 diff --git a/ISCAS85/c3540.bench b/ISCAS85/c3540.bench deleted file mode 100644 index 12a91f3..0000000 --- a/ISCAS85/c3540.bench +++ /dev/null @@ -1,1745 +0,0 @@ -# c3540 - -INPUT(1) -INPUT(13) -INPUT(20) -INPUT(33) -INPUT(41) -INPUT(45) -INPUT(50) -INPUT(58) -INPUT(68) -INPUT(77) -INPUT(87) -INPUT(97) -INPUT(107) -INPUT(116) -INPUT(124) -INPUT(125) -INPUT(128) -INPUT(132) -INPUT(137) -INPUT(143) -INPUT(150) -INPUT(159) -INPUT(169) -INPUT(179) -INPUT(190) -INPUT(200) -INPUT(213) -INPUT(222) -INPUT(223) -INPUT(226) -INPUT(232) -INPUT(238) -INPUT(244) -INPUT(250) -INPUT(257) -INPUT(264) -INPUT(270) -INPUT(274) -INPUT(283) -INPUT(294) -INPUT(303) -INPUT(311) -INPUT(317) -INPUT(322) -INPUT(326) -INPUT(329) -INPUT(330) -INPUT(343) -INPUT(349) -INPUT(350) - -OUTPUT(1713) -OUTPUT(1947) -OUTPUT(3195) -OUTPUT(3833) -OUTPUT(3987) -OUTPUT(4028) -OUTPUT(4145) -OUTPUT(4589) -OUTPUT(4667) -OUTPUT(4815) -OUTPUT(4944) -OUTPUT(5002) -OUTPUT(5045) -OUTPUT(5047) -OUTPUT(5078) -OUTPUT(5102) -OUTPUT(5120) -OUTPUT(5121) -OUTPUT(5192) -OUTPUT(5231) -OUTPUT(5360) -OUTPUT(5361) - -655 = BUFF(50) -665 = NOT(50) -670 = BUFF(58) -679 = NOT(58) -683 = BUFF(68) -686 = NOT(68) -690 = BUFF(68) -699 = BUFF(77) -702 = NOT(77) -706 = BUFF(77) -715 = BUFF(87) -724 = NOT(87) -727 = BUFF(97) -736 = NOT(97) -740 = BUFF(107) -749 = NOT(107) -753 = BUFF(116) -763 = NOT(116) -768 = OR(257, 264) -769 = NOT(1) -772 = BUFF(1) -779 = NOT(1) -782 = BUFF(13) -786 = NOT(13) -793 = AND(13, 20) -794 = NOT(20) -798 = BUFF(20) -803 = NOT(20) -820 = NOT(33) -821 = BUFF(33) -825 = NOT(33) -829 = AND(33, 41) -832 = NOT(41) -835 = OR(41, 45) -836 = BUFF(45) -839 = NOT(45) -842 = NOT(50) -845 = BUFF(58) -848 = NOT(58) -851 = BUFF(68) -854 = NOT(68) -858 = BUFF(87) -861 = NOT(87) -864 = BUFF(97) -867 = NOT(97) -870 = NOT(107) -874 = BUFF(1) -877 = BUFF(68) -880 = BUFF(107) -883 = NOT(20) -886 = BUFF(190) -889 = NOT(200) -890 = AND(20, 200) -891 = NAND(20, 200) -892 = AND(20, 179) -895 = NOT(20) -896 = OR(349, 33) -913 = NAND(1, 13) -914 = NAND(1, 20, 33) -915 = NOT(20) -916 = NOT(33) -917 = BUFF(179) -920 = NOT(213) -923 = BUFF(343) -926 = BUFF(226) -929 = BUFF(232) -932 = BUFF(238) -935 = BUFF(244) -938 = BUFF(250) -941 = BUFF(257) -944 = BUFF(264) -947 = BUFF(270) -950 = BUFF(50) -953 = BUFF(58) -956 = BUFF(58) -959 = BUFF(97) -962 = BUFF(97) -965 = BUFF(330) -1067 = AND(250, 768) -1117 = OR(820, 20) -1179 = OR(895, 169) -1196 = NOT(793) -1197 = OR(915, 1) -1202 = AND(913, 914) -1219 = OR(916, 1) -1250 = AND(842, 848, 854) -1251 = NAND(226, 655) -1252 = NAND(232, 670) -1253 = NAND(238, 690) -1254 = NAND(244, 706) -1255 = NAND(250, 715) -1256 = NAND(257, 727) -1257 = NAND(264, 740) -1258 = NAND(270, 753) -1259 = NOT(926) -1260 = NOT(929) -1261 = NOT(932) -1262 = NOT(935) -1263 = NAND(679, 686) -1264 = NAND(736, 749) -1267 = NAND(683, 699) -1268 = BUFF(665) -1271 = NOT(953) -1272 = NOT(959) -1273 = BUFF(839) -1276 = BUFF(839) -1279 = BUFF(782) -1298 = BUFF(825) -1302 = BUFF(832) -1306 = AND(779, 835) -1315 = AND(779, 836, 832) -1322 = AND(769, 836) -1325 = AND(772, 786, 798) -1328 = NAND(772, 786, 798) -1331 = NAND(772, 786) -1334 = BUFF(874) -1337 = NAND(782, 794, 45) -1338 = NAND(842, 848, 854) -1339 = NOT(956) -1340 = AND(861, 867, 870) -1343 = NAND(861, 867, 870) -1344 = NOT(962) -1345 = NOT(803) -1346 = NOT(803) -1347 = NOT(803) -1348 = NOT(803) -1349 = NOT(803) -1350 = NOT(803) -1351 = NOT(803) -1352 = NOT(803) -1353 = OR(883, 886) -1358 = NOR(883, 886) -1363 = BUFF(892) -1366 = NOT(892) -1369 = BUFF(821) -1384 = BUFF(825) -1401 = NOT(896) -1402 = NOT(896) -1403 = NOT(896) -1404 = NOT(896) -1405 = NOT(896) -1406 = NOT(896) -1407 = NOT(896) -1408 = NOT(896) -1409 = OR(1, 1196) -1426 = NOT(829) -1427 = NOT(829) -1452 = AND(769, 782, 794) -1459 = NOT(917) -1460 = NOT(965) -1461 = OR(920, 923) -1464 = NOR(920, 923) -1467 = NOT(938) -1468 = NOT(941) -1469 = NOT(944) -1470 = NOT(947) -1471 = BUFF(679) -1474 = NOT(950) -1475 = BUFF(686) -1478 = BUFF(702) -1481 = BUFF(724) -1484 = BUFF(736) -1487 = BUFF(749) -1490 = BUFF(763) -1493 = BUFF(877) -1496 = BUFF(877) -1499 = BUFF(880) -1502 = BUFF(880) -1505 = NAND(702, 1250) -1507 = AND(1251, 1252, 1253, 1254) -1508 = AND(1255, 1256, 1257, 1258) -1509 = NAND(929, 1259) -1510 = NAND(926, 1260) -1511 = NAND(935, 1261) -1512 = NAND(932, 1262) -1520 = AND(655, 1263) -1562 = AND(874, 1337) -1579 = NOT(1117) -1580 = AND(803, 1117) -1581 = AND(1338, 1345) -1582 = NOT(1117) -1583 = AND(803, 1117) -1584 = NOT(1117) -1585 = AND(803, 1117) -1586 = AND(854, 1347) -1587 = NOT(1117) -1588 = AND(803, 1117) -1589 = AND(77, 1348) -1590 = NOT(1117) -1591 = AND(803, 1117) -1592 = AND(1343, 1349) -1593 = NOT(1117) -1594 = AND(803, 1117) -1595 = NOT(1117) -1596 = AND(803, 1117) -1597 = AND(870, 1351) -1598 = NOT(1117) -1599 = AND(803, 1117) -1600 = AND(116, 1352) -1643 = AND(222, 1401) -1644 = AND(223, 1402) -1645 = AND(226, 1403) -1646 = AND(232, 1404) -1647 = AND(238, 1405) -1648 = AND(244, 1406) -1649 = AND(250, 1407) -1650 = AND(257, 1408) -1667 = AND(1, 13, 1426) -1670 = AND(1, 13, 1427) -1673 = NOT(1202) -1674 = NOT(1202) -1675 = NOT(1202) -1676 = NOT(1202) -1677 = NOT(1202) -1678 = NOT(1202) -1679 = NOT(1202) -1680 = NOT(1202) -1691 = NAND(941, 1467) -1692 = NAND(938, 1468) -1693 = NAND(947, 1469) -1694 = NAND(944, 1470) -1713 = NOT(1505) -1714 = AND(87, 1264) -1715 = NAND(1509, 1510) -1718 = NAND(1511, 1512) -1721 = NAND(1507, 1508) -1722 = AND(763, 1340) -1725 = NAND(763, 1340) -1726 = NOT(1268) -1727 = NAND(1493, 1271) -1728 = NOT(1493) -1729 = AND(683, 1268) -1730 = NAND(1499, 1272) -1731 = NOT(1499) -1735 = NAND(87, 1264) -1736 = NOT(1273) -1737 = NOT(1276) -1738 = NAND(1325, 821) -1747 = NAND(1325, 825) -1756 = NAND(772, 1279, 798) -1761 = NAND(772, 786, 798, 1302) -1764 = NAND(1496, 1339) -1765 = NOT(1496) -1766 = NAND(1502, 1344) -1767 = NOT(1502) -1768 = NOT(1328) -1769 = NOT(1334) -1770 = NOT(1331) -1787 = AND(845, 1579) -1788 = AND(150, 1580) -1789 = AND(851, 1582) -1790 = AND(159, 1583) -1791 = AND(77, 1584) -1792 = AND(50, 1585) -1793 = AND(858, 1587) -1794 = AND(845, 1588) -1795 = AND(864, 1590) -1796 = AND(851, 1591) -1797 = AND(107, 1593) -1798 = AND(77, 1594) -1799 = AND(116, 1595) -1800 = AND(858, 1596) -1801 = AND(283, 1598) -1802 = AND(864, 1599) -1803 = AND(200, 1363) -1806 = AND(889, 1363) -1809 = AND(890, 1366) -1812 = AND(891, 1366) -1815 = NAND(1298, 1302) -1818 = NAND(821, 1302) -1821 = NAND(772, 1279, 1179) -1824 = NAND(786, 794, 1298) -1833 = NAND(786, 1298) -1842 = NOT(1369) -1843 = NOT(1369) -1844 = NOT(1369) -1845 = NOT(1369) -1846 = NOT(1369) -1847 = NOT(1369) -1848 = NOT(1369) -1849 = NOT(1384) -1850 = AND(1384, 896) -1851 = NOT(1384) -1852 = AND(1384, 896) -1853 = NOT(1384) -1854 = AND(1384, 896) -1855 = NOT(1384) -1856 = AND(1384, 896) -1857 = NOT(1384) -1858 = AND(1384, 896) -1859 = NOT(1384) -1860 = AND(1384, 896) -1861 = NOT(1384) -1862 = AND(1384, 896) -1863 = NOT(1384) -1864 = AND(1384, 896) -1869 = AND(1202, 1409) -1870 = NOR(50, 1409) -1873 = NOT(1306) -1874 = AND(1202, 1409) -1875 = NOR(58, 1409) -1878 = NOT(1306) -1879 = AND(1202, 1409) -1880 = NOR(68, 1409) -1883 = NOT(1306) -1884 = AND(1202, 1409) -1885 = NOR(77, 1409) -1888 = NOT(1306) -1889 = AND(1202, 1409) -1890 = NOR(87, 1409) -1893 = NOT(1322) -1894 = AND(1202, 1409) -1895 = NOR(97, 1409) -1898 = NOT(1315) -1899 = AND(1202, 1409) -1900 = NOR(107, 1409) -1903 = NOT(1315) -1904 = AND(1202, 1409) -1905 = NOR(116, 1409) -1908 = NOT(1315) -1909 = AND(1452, 213) -1912 = NAND(1452, 213) -1913 = AND(1452, 213, 343) -1917 = NAND(1452, 213, 343) -1922 = AND(1452, 213, 343) -1926 = NAND(1452, 213, 343) -1930 = BUFF(1464) -1933 = NAND(1691, 1692) -1936 = NAND(1693, 1694) -1939 = NOT(1471) -1940 = NAND(1471, 1474) -1941 = NOT(1475) -1942 = NOT(1478) -1943 = NOT(1481) -1944 = NOT(1484) -1945 = NOT(1487) -1946 = NOT(1490) -1947 = NOT(1714) -1960 = NAND(953, 1728) -1961 = NAND(959, 1731) -1966 = AND(1520, 1276) -1981 = NAND(956, 1765) -1982 = NAND(962, 1767) -1983 = AND(1067, 1768) -1986 = OR(1581, 1787, 1788) -1987 = OR(1586, 1791, 1792) -1988 = OR(1589, 1793, 1794) -1989 = OR(1592, 1795, 1796) -1990 = OR(1597, 1799, 1800) -1991 = OR(1600, 1801, 1802) -2022 = AND(77, 1849) -2023 = AND(223, 1850) -2024 = AND(87, 1851) -2025 = AND(226, 1852) -2026 = AND(97, 1853) -2027 = AND(232, 1854) -2028 = AND(107, 1855) -2029 = AND(238, 1856) -2030 = AND(116, 1857) -2031 = AND(244, 1858) -2032 = AND(283, 1859) -2033 = AND(250, 1860) -2034 = AND(294, 1861) -2035 = AND(257, 1862) -2036 = AND(303, 1863) -2037 = AND(264, 1864) -2038 = BUFF(1667) -2043 = NOT(1667) -2052 = BUFF(1670) -2057 = NOT(1670) -2068 = AND(50, 1197, 1869) -2073 = AND(58, 1197, 1874) -2078 = AND(68, 1197, 1879) -2083 = AND(77, 1197, 1884) -2088 = AND(87, 1219, 1889) -2093 = AND(97, 1219, 1894) -2098 = AND(107, 1219, 1899) -2103 = AND(116, 1219, 1904) -2121 = NOT(1562) -2122 = NOT(1562) -2123 = NOT(1562) -2124 = NOT(1562) -2125 = NOT(1562) -2126 = NOT(1562) -2127 = NOT(1562) -2128 = NOT(1562) -2133 = NAND(950, 1939) -2134 = NAND(1478, 1941) -2135 = NAND(1475, 1942) -2136 = NAND(1484, 1943) -2137 = NAND(1481, 1944) -2138 = NAND(1490, 1945) -2139 = NAND(1487, 1946) -2141 = NOT(1933) -2142 = NOT(1936) -2143 = NOT(1738) -2144 = AND(1738, 1747) -2145 = NOT(1747) -2146 = NAND(1727, 1960) -2147 = NAND(1730, 1961) -2148 = AND(1722, 1267, 665, 58) -2149 = NOT(1738) -2150 = AND(1738, 1747) -2151 = NOT(1747) -2152 = NOT(1738) -2153 = NOT(1747) -2154 = AND(1738, 1747) -2155 = NOT(1738) -2156 = NOT(1747) -2157 = AND(1738, 1747) -2158 = BUFF(1761) -2175 = BUFF(1761) -2178 = NAND(1764, 1981) -2179 = NAND(1766, 1982) -2180 = NOT(1756) -2181 = AND(1756, 1328) -2183 = NOT(1756) -2184 = AND(1331, 1756) -2185 = NAND(1358, 1812) -2188 = NAND(1358, 1809) -2191 = NAND(1353, 1812) -2194 = NAND(1353, 1809) -2197 = NAND(1358, 1806) -2200 = NAND(1358, 1803) -2203 = NAND(1353, 1806) -2206 = NAND(1353, 1803) -2209 = NOT(1815) -2210 = NOT(1818) -2211 = AND(1815, 1818) -2212 = BUFF(1821) -2221 = BUFF(1821) -2230 = NOT(1833) -2231 = NOT(1833) -2232 = NOT(1833) -2233 = NOT(1833) -2234 = NOT(1824) -2235 = NOT(1824) -2236 = NOT(1824) -2237 = NOT(1824) -2238 = OR(2022, 1643, 2023) -2239 = OR(2024, 1644, 2025) -2240 = OR(2026, 1645, 2027) -2241 = OR(2028, 1646, 2029) -2242 = OR(2030, 1647, 2031) -2243 = OR(2032, 1648, 2033) -2244 = OR(2034, 1649, 2035) -2245 = OR(2036, 1650, 2037) -2270 = AND(1986, 1673) -2277 = AND(1987, 1675) -2282 = AND(1988, 1676) -2287 = AND(1989, 1677) -2294 = AND(1990, 1679) -2299 = AND(1991, 1680) -2304 = BUFF(1917) -2307 = AND(1930, 350) -2310 = NAND(1930, 350) -2313 = BUFF(1715) -2316 = BUFF(1718) -2319 = BUFF(1715) -2322 = BUFF(1718) -2325 = NAND(1940, 2133) -2328 = NAND(2134, 2135) -2331 = NAND(2136, 2137) -2334 = NAND(2138, 2139) -2341 = NAND(1936, 2141) -2342 = NAND(1933, 2142) -2347 = AND(724, 2144) -2348 = AND(2146, 699, 1726) -2349 = AND(753, 2147) -2350 = AND(2148, 1273) -2351 = AND(736, 2150) -2352 = AND(1735, 2153) -2353 = AND(763, 2154) -2354 = AND(1725, 2156) -2355 = AND(749, 2157) -2374 = NOT(2178) -2375 = NOT(2179) -2376 = AND(1520, 2180) -2379 = AND(1721, 2181) -2398 = AND(665, 2211) -2417 = AND(2057, 226, 1873) -2418 = AND(2057, 274, 1306) -2419 = AND(2052, 2238) -2420 = AND(2057, 232, 1878) -2421 = AND(2057, 274, 1306) -2422 = AND(2052, 2239) -2425 = AND(2057, 238, 1883) -2426 = AND(2057, 274, 1306) -2427 = AND(2052, 2240) -2430 = AND(2057, 244, 1888) -2431 = AND(2057, 274, 1306) -2432 = AND(2052, 2241) -2435 = AND(2043, 250, 1893) -2436 = AND(2043, 274, 1322) -2437 = AND(2038, 2242) -2438 = AND(2043, 257, 1898) -2439 = AND(2043, 274, 1315) -2440 = AND(2038, 2243) -2443 = AND(2043, 264, 1903) -2444 = AND(2043, 274, 1315) -2445 = AND(2038, 2244) -2448 = AND(2043, 270, 1908) -2449 = AND(2043, 274, 1315) -2450 = AND(2038, 2245) -2467 = NOT(2313) -2468 = NOT(2316) -2469 = NOT(2319) -2470 = NOT(2322) -2471 = NAND(2341, 2342) -2474 = NOT(2325) -2475 = NOT(2328) -2476 = NOT(2331) -2477 = NOT(2334) -2478 = OR(2348, 1729) -2481 = NOT(2175) -2482 = AND(2175, 1334) -2483 = AND(2349, 2183) -2486 = AND(2374, 1346) -2487 = AND(2375, 1350) -2488 = BUFF(2185) -2497 = BUFF(2188) -2506 = BUFF(2191) -2515 = BUFF(2194) -2524 = BUFF(2197) -2533 = BUFF(2200) -2542 = BUFF(2203) -2551 = BUFF(2206) -2560 = BUFF(2185) -2569 = BUFF(2188) -2578 = BUFF(2191) -2587 = BUFF(2194) -2596 = BUFF(2197) -2605 = BUFF(2200) -2614 = BUFF(2203) -2623 = BUFF(2206) -2632 = NOT(2212) -2633 = AND(2212, 1833) -2634 = NOT(2212) -2635 = AND(2212, 1833) -2636 = NOT(2212) -2637 = AND(2212, 1833) -2638 = NOT(2212) -2639 = AND(2212, 1833) -2640 = NOT(2221) -2641 = AND(2221, 1824) -2642 = NOT(2221) -2643 = AND(2221, 1824) -2644 = NOT(2221) -2645 = AND(2221, 1824) -2646 = NOT(2221) -2647 = AND(2221, 1824) -2648 = OR(2270, 1870, 2068) -2652 = NOR(2270, 1870, 2068) -2656 = OR(2417, 2418, 2419) -2659 = OR(2420, 2421, 2422) -2662 = OR(2277, 1880, 2078) -2666 = NOR(2277, 1880, 2078) -2670 = OR(2425, 2426, 2427) -2673 = OR(2282, 1885, 2083) -2677 = NOR(2282, 1885, 2083) -2681 = OR(2430, 2431, 2432) -2684 = OR(2287, 1890, 2088) -2688 = NOR(2287, 1890, 2088) -2692 = OR(2435, 2436, 2437) -2697 = OR(2438, 2439, 2440) -2702 = OR(2294, 1900, 2098) -2706 = NOR(2294, 1900, 2098) -2710 = OR(2443, 2444, 2445) -2715 = OR(2299, 1905, 2103) -2719 = NOR(2299, 1905, 2103) -2723 = OR(2448, 2449, 2450) -2728 = NOT(2304) -2729 = NOT(2158) -2730 = AND(1562, 2158) -2731 = NOT(2158) -2732 = AND(1562, 2158) -2733 = NOT(2158) -2734 = AND(1562, 2158) -2735 = NOT(2158) -2736 = AND(1562, 2158) -2737 = NOT(2158) -2738 = AND(1562, 2158) -2739 = NOT(2158) -2740 = AND(1562, 2158) -2741 = NOT(2158) -2742 = AND(1562, 2158) -2743 = NOT(2158) -2744 = AND(1562, 2158) -2745 = OR(2376, 1983, 2379) -2746 = NOR(2376, 1983, 2379) -2748 = NAND(2316, 2467) -2749 = NAND(2313, 2468) -2750 = NAND(2322, 2469) -2751 = NAND(2319, 2470) -2754 = NAND(2328, 2474) -2755 = NAND(2325, 2475) -2756 = NAND(2334, 2476) -2757 = NAND(2331, 2477) -2758 = AND(1520, 2481) -2761 = AND(1722, 2482) -2764 = AND(2478, 1770) -2768 = OR(2486, 1789, 1790) -2769 = OR(2487, 1797, 1798) -2898 = AND(665, 2633) -2899 = AND(679, 2635) -2900 = AND(686, 2637) -2901 = AND(702, 2639) -2962 = NOT(2746) -2966 = NAND(2748, 2749) -2967 = NAND(2750, 2751) -2970 = BUFF(2471) -2973 = NAND(2754, 2755) -2977 = NAND(2756, 2757) -2980 = AND(2471, 2143) -2984 = NOT(2488) -2985 = NOT(2497) -2986 = NOT(2506) -2987 = NOT(2515) -2988 = NOT(2524) -2989 = NOT(2533) -2990 = NOT(2542) -2991 = NOT(2551) -2992 = NOT(2488) -2993 = NOT(2497) -2994 = NOT(2506) -2995 = NOT(2515) -2996 = NOT(2524) -2997 = NOT(2533) -2998 = NOT(2542) -2999 = NOT(2551) -3000 = NOT(2488) -3001 = NOT(2497) -3002 = NOT(2506) -3003 = NOT(2515) -3004 = NOT(2524) -3005 = NOT(2533) -3006 = NOT(2542) -3007 = NOT(2551) -3008 = NOT(2488) -3009 = NOT(2497) -3010 = NOT(2506) -3011 = NOT(2515) -3012 = NOT(2524) -3013 = NOT(2533) -3014 = NOT(2542) -3015 = NOT(2551) -3016 = NOT(2488) -3017 = NOT(2497) -3018 = NOT(2506) -3019 = NOT(2515) -3020 = NOT(2524) -3021 = NOT(2533) -3022 = NOT(2542) -3023 = NOT(2551) -3024 = NOT(2488) -3025 = NOT(2497) -3026 = NOT(2506) -3027 = NOT(2515) -3028 = NOT(2524) -3029 = NOT(2533) -3030 = NOT(2542) -3031 = NOT(2551) -3032 = NOT(2488) -3033 = NOT(2497) -3034 = NOT(2506) -3035 = NOT(2515) -3036 = NOT(2524) -3037 = NOT(2533) -3038 = NOT(2542) -3039 = NOT(2551) -3040 = NOT(2488) -3041 = NOT(2497) -3042 = NOT(2506) -3043 = NOT(2515) -3044 = NOT(2524) -3045 = NOT(2533) -3046 = NOT(2542) -3047 = NOT(2551) -3048 = NOT(2560) -3049 = NOT(2569) -3050 = NOT(2578) -3051 = NOT(2587) -3052 = NOT(2596) -3053 = NOT(2605) -3054 = NOT(2614) -3055 = NOT(2623) -3056 = NOT(2560) -3057 = NOT(2569) -3058 = NOT(2578) -3059 = NOT(2587) -3060 = NOT(2596) -3061 = NOT(2605) -3062 = NOT(2614) -3063 = NOT(2623) -3064 = NOT(2560) -3065 = NOT(2569) -3066 = NOT(2578) -3067 = NOT(2587) -3068 = NOT(2596) -3069 = NOT(2605) -3070 = NOT(2614) -3071 = NOT(2623) -3072 = NOT(2560) -3073 = NOT(2569) -3074 = NOT(2578) -3075 = NOT(2587) -3076 = NOT(2596) -3077 = NOT(2605) -3078 = NOT(2614) -3079 = NOT(2623) -3080 = NOT(2560) -3081 = NOT(2569) -3082 = NOT(2578) -3083 = NOT(2587) -3084 = NOT(2596) -3085 = NOT(2605) -3086 = NOT(2614) -3087 = NOT(2623) -3088 = NOT(2560) -3089 = NOT(2569) -3090 = NOT(2578) -3091 = NOT(2587) -3092 = NOT(2596) -3093 = NOT(2605) -3094 = NOT(2614) -3095 = NOT(2623) -3096 = NOT(2560) -3097 = NOT(2569) -3098 = NOT(2578) -3099 = NOT(2587) -3100 = NOT(2596) -3101 = NOT(2605) -3102 = NOT(2614) -3103 = NOT(2623) -3104 = NOT(2560) -3105 = NOT(2569) -3106 = NOT(2578) -3107 = NOT(2587) -3108 = NOT(2596) -3109 = NOT(2605) -3110 = NOT(2614) -3111 = NOT(2623) -3112 = BUFF(2656) -3115 = NOT(2656) -3118 = NOT(2652) -3119 = AND(2768, 1674) -3122 = BUFF(2659) -3125 = NOT(2659) -3128 = BUFF(2670) -3131 = NOT(2670) -3134 = NOT(2666) -3135 = BUFF(2681) -3138 = NOT(2681) -3141 = NOT(2677) -3142 = BUFF(2692) -3145 = NOT(2692) -3148 = NOT(2688) -3149 = AND(2769, 1678) -3152 = BUFF(2697) -3155 = NOT(2697) -3158 = BUFF(2710) -3161 = NOT(2710) -3164 = NOT(2706) -3165 = BUFF(2723) -3168 = NOT(2723) -3171 = NOT(2719) -3172 = AND(1909, 2648) -3175 = AND(1913, 2662) -3178 = AND(1913, 2673) -3181 = AND(1913, 2684) -3184 = AND(1922, 2702) -3187 = AND(1922, 2715) -3190 = NOT(2692) -3191 = NOT(2697) -3192 = NOT(2710) -3193 = NOT(2723) -3194 = AND(2692, 2697, 2710, 2723, 1459) -3195 = NAND(2745, 2962) -3196 = NOT(2966) -3206 = OR(2980, 2145, 2347) -3207 = AND(124, 2984) -3208 = AND(159, 2985) -3209 = AND(150, 2986) -3210 = AND(143, 2987) -3211 = AND(137, 2988) -3212 = AND(132, 2989) -3213 = AND(128, 2990) -3214 = AND(125, 2991) -3215 = AND(125, 2992) -3216 = AND(655, 2993) -3217 = AND(159, 2994) -3218 = AND(150, 2995) -3219 = AND(143, 2996) -3220 = AND(137, 2997) -3221 = AND(132, 2998) -3222 = AND(128, 2999) -3223 = AND(128, 3000) -3224 = AND(670, 3001) -3225 = AND(655, 3002) -3226 = AND(159, 3003) -3227 = AND(150, 3004) -3228 = AND(143, 3005) -3229 = AND(137, 3006) -3230 = AND(132, 3007) -3231 = AND(132, 3008) -3232 = AND(690, 3009) -3233 = AND(670, 3010) -3234 = AND(655, 3011) -3235 = AND(159, 3012) -3236 = AND(150, 3013) -3237 = AND(143, 3014) -3238 = AND(137, 3015) -3239 = AND(137, 3016) -3240 = AND(706, 3017) -3241 = AND(690, 3018) -3242 = AND(670, 3019) -3243 = AND(655, 3020) -3244 = AND(159, 3021) -3245 = AND(150, 3022) -3246 = AND(143, 3023) -3247 = AND(143, 3024) -3248 = AND(715, 3025) -3249 = AND(706, 3026) -3250 = AND(690, 3027) -3251 = AND(670, 3028) -3252 = AND(655, 3029) -3253 = AND(159, 3030) -3254 = AND(150, 3031) -3255 = AND(150, 3032) -3256 = AND(727, 3033) -3257 = AND(715, 3034) -3258 = AND(706, 3035) -3259 = AND(690, 3036) -3260 = AND(670, 3037) -3261 = AND(655, 3038) -3262 = AND(159, 3039) -3263 = AND(159, 3040) -3264 = AND(740, 3041) -3265 = AND(727, 3042) -3266 = AND(715, 3043) -3267 = AND(706, 3044) -3268 = AND(690, 3045) -3269 = AND(670, 3046) -3270 = AND(655, 3047) -3271 = AND(283, 3048) -3272 = AND(670, 3049) -3273 = AND(690, 3050) -3274 = AND(706, 3051) -3275 = AND(715, 3052) -3276 = AND(727, 3053) -3277 = AND(740, 3054) -3278 = AND(753, 3055) -3279 = AND(294, 3056) -3280 = AND(690, 3057) -3281 = AND(706, 3058) -3282 = AND(715, 3059) -3283 = AND(727, 3060) -3284 = AND(740, 3061) -3285 = AND(753, 3062) -3286 = AND(283, 3063) -3287 = AND(303, 3064) -3288 = AND(706, 3065) -3289 = AND(715, 3066) -3290 = AND(727, 3067) -3291 = AND(740, 3068) -3292 = AND(753, 3069) -3293 = AND(283, 3070) -3294 = AND(294, 3071) -3295 = AND(311, 3072) -3296 = AND(715, 3073) -3297 = AND(727, 3074) -3298 = AND(740, 3075) -3299 = AND(753, 3076) -3300 = AND(283, 3077) -3301 = AND(294, 3078) -3302 = AND(303, 3079) -3303 = AND(317, 3080) -3304 = AND(727, 3081) -3305 = AND(740, 3082) -3306 = AND(753, 3083) -3307 = AND(283, 3084) -3308 = AND(294, 3085) -3309 = AND(303, 3086) -3310 = AND(311, 3087) -3311 = AND(322, 3088) -3312 = AND(740, 3089) -3313 = AND(753, 3090) -3314 = AND(283, 3091) -3315 = AND(294, 3092) -3316 = AND(303, 3093) -3317 = AND(311, 3094) -3318 = AND(317, 3095) -3319 = AND(326, 3096) -3320 = AND(753, 3097) -3321 = AND(283, 3098) -3322 = AND(294, 3099) -3323 = AND(303, 3100) -3324 = AND(311, 3101) -3325 = AND(317, 3102) -3326 = AND(322, 3103) -3327 = AND(329, 3104) -3328 = AND(283, 3105) -3329 = AND(294, 3106) -3330 = AND(303, 3107) -3331 = AND(311, 3108) -3332 = AND(317, 3109) -3333 = AND(322, 3110) -3334 = AND(326, 3111) -3383 = AND(3190, 3191, 3192, 3193, 917) -3384 = BUFF(2977) -3387 = AND(3196, 1736) -3388 = AND(2977, 2149) -3389 = AND(2973, 1737) -3390 = NOR(3207, 3208, 3209, 3210, 3211, 3212, 3213, 3214) -3391 = NOR(3215, 3216, 3217, 3218, 3219, 3220, 3221, 3222) -3392 = NOR(3223, 3224, 3225, 3226, 3227, 3228, 3229, 3230) -3393 = NOR(3231, 3232, 3233, 3234, 3235, 3236, 3237, 3238) -3394 = NOR(3239, 3240, 3241, 3242, 3243, 3244, 3245, 3246) -3395 = NOR(3247, 3248, 3249, 3250, 3251, 3252, 3253, 3254) -3396 = NOR(3255, 3256, 3257, 3258, 3259, 3260, 3261, 3262) -3397 = NOR(3263, 3264, 3265, 3266, 3267, 3268, 3269, 3270) -3398 = NOR(3271, 3272, 3273, 3274, 3275, 3276, 3277, 3278) -3399 = NOR(3279, 3280, 3281, 3282, 3283, 3284, 3285, 3286) -3400 = NOR(3287, 3288, 3289, 3290, 3291, 3292, 3293, 3294) -3401 = NOR(3295, 3296, 3297, 3298, 3299, 3300, 3301, 3302) -3402 = NOR(3303, 3304, 3305, 3306, 3307, 3308, 3309, 3310) -3403 = NOR(3311, 3312, 3313, 3314, 3315, 3316, 3317, 3318) -3404 = NOR(3319, 3320, 3321, 3322, 3323, 3324, 3325, 3326) -3405 = NOR(3327, 3328, 3329, 3330, 3331, 3332, 3333, 3334) -3406 = AND(3206, 2641) -3407 = AND(169, 2648, 3112) -3410 = AND(179, 2648, 3115) -3413 = AND(190, 2652, 3115) -3414 = AND(200, 2652, 3112) -3415 = OR(3119, 1875, 2073) -3419 = NOR(3119, 1875, 2073) -3423 = AND(169, 2662, 3128) -3426 = AND(179, 2662, 3131) -3429 = AND(190, 2666, 3131) -3430 = AND(200, 2666, 3128) -3431 = AND(169, 2673, 3135) -3434 = AND(179, 2673, 3138) -3437 = AND(190, 2677, 3138) -3438 = AND(200, 2677, 3135) -3439 = AND(169, 2684, 3142) -3442 = AND(179, 2684, 3145) -3445 = AND(190, 2688, 3145) -3446 = AND(200, 2688, 3142) -3447 = OR(3149, 1895, 2093) -3451 = NOR(3149, 1895, 2093) -3455 = AND(169, 2702, 3158) -3458 = AND(179, 2702, 3161) -3461 = AND(190, 2706, 3161) -3462 = AND(200, 2706, 3158) -3463 = AND(169, 2715, 3165) -3466 = AND(179, 2715, 3168) -3469 = AND(190, 2719, 3168) -3470 = AND(200, 2719, 3165) -3471 = OR(3194, 3383) -3472 = BUFF(2967) -3475 = BUFF(2970) -3478 = BUFF(2967) -3481 = BUFF(2970) -3484 = BUFF(2973) -3487 = BUFF(2973) -3490 = BUFF(3172) -3493 = BUFF(3172) -3496 = BUFF(3175) -3499 = BUFF(3175) -3502 = BUFF(3178) -3505 = BUFF(3178) -3508 = BUFF(3181) -3511 = BUFF(3181) -3514 = BUFF(3184) -3517 = BUFF(3184) -3520 = BUFF(3187) -3523 = BUFF(3187) -3534 = NOR(3387, 2350) -3535 = OR(3388, 2151, 2351) -3536 = NOR(3389, 1966) -3537 = AND(3390, 2209) -3538 = AND(3398, 2210) -3539 = AND(3391, 1842) -3540 = AND(3399, 1369) -3541 = AND(3392, 1843) -3542 = AND(3400, 1369) -3543 = AND(3393, 1844) -3544 = AND(3401, 1369) -3545 = AND(3394, 1845) -3546 = AND(3402, 1369) -3547 = AND(3395, 1846) -3548 = AND(3403, 1369) -3549 = AND(3396, 1847) -3550 = AND(3404, 1369) -3551 = AND(3397, 1848) -3552 = AND(3405, 1369) -3557 = OR(3413, 3414, 3118) -3568 = OR(3429, 3430, 3134) -3573 = OR(3437, 3438, 3141) -3578 = OR(3445, 3446, 3148) -3589 = OR(3461, 3462, 3164) -3594 = OR(3469, 3470, 3171) -3605 = AND(3471, 2728) -3626 = NOT(3478) -3627 = NOT(3481) -3628 = NOT(3487) -3629 = NOT(3484) -3630 = NOT(3472) -3631 = NOT(3475) -3632 = AND(3536, 2152) -3633 = AND(3534, 2155) -3634 = OR(3537, 3538, 2398) -3635 = OR(3539, 3540) -3636 = OR(3541, 3542) -3637 = OR(3543, 3544) -3638 = OR(3545, 3546) -3639 = OR(3547, 3548) -3640 = OR(3549, 3550) -3641 = OR(3551, 3552) -3642 = AND(3535, 2643) -3643 = OR(3407, 3410) -3644 = NOR(3407, 3410) -3645 = AND(169, 3415, 3122) -3648 = AND(179, 3415, 3125) -3651 = AND(190, 3419, 3125) -3652 = AND(200, 3419, 3122) -3653 = NOT(3419) -3654 = OR(3423, 3426) -3657 = NOR(3423, 3426) -3658 = OR(3431, 3434) -3661 = NOR(3431, 3434) -3662 = OR(3439, 3442) -3663 = NOR(3439, 3442) -3664 = AND(169, 3447, 3152) -3667 = AND(179, 3447, 3155) -3670 = AND(190, 3451, 3155) -3671 = AND(200, 3451, 3152) -3672 = NOT(3451) -3673 = OR(3455, 3458) -3676 = NOR(3455, 3458) -3677 = OR(3463, 3466) -3680 = NOR(3463, 3466) -3681 = NOT(3493) -3682 = AND(1909, 3415) -3685 = NOT(3496) -3686 = NOT(3499) -3687 = NOT(3502) -3688 = NOT(3505) -3689 = NOT(3511) -3690 = AND(1922, 3447) -3693 = NOT(3517) -3694 = NOT(3520) -3695 = NOT(3523) -3696 = NOT(3514) -3697 = BUFF(3384) -3700 = BUFF(3384) -3703 = NOT(3490) -3704 = NOT(3508) -3705 = NAND(3475, 3630) -3706 = NAND(3472, 3631) -3707 = NAND(3481, 3626) -3708 = NAND(3478, 3627) -3711 = OR(3632, 2352, 2353) -3712 = OR(3633, 2354, 2355) -3713 = AND(3634, 2632) -3714 = AND(3635, 2634) -3715 = AND(3636, 2636) -3716 = AND(3637, 2638) -3717 = AND(3638, 2640) -3718 = AND(3639, 2642) -3719 = AND(3640, 2644) -3720 = AND(3641, 2646) -3721 = AND(3644, 3557) -3731 = OR(3651, 3652, 3653) -3734 = AND(3657, 3568) -3740 = AND(3661, 3573) -3743 = AND(3663, 3578) -3753 = OR(3670, 3671, 3672) -3756 = AND(3676, 3589) -3762 = AND(3680, 3594) -3765 = NOT(3643) -3766 = NOT(3662) -3773 = NAND(3705, 3706) -3774 = NAND(3707, 3708) -3775 = NAND(3700, 3628) -3776 = NOT(3700) -3777 = NAND(3697, 3629) -3778 = NOT(3697) -3779 = AND(3712, 2645) -3780 = AND(3711, 2647) -3786 = OR(3645, 3648) -3789 = NOR(3645, 3648) -3800 = OR(3664, 3667) -3803 = NOR(3664, 3667) -3809 = AND(3654, 1917) -3812 = AND(3658, 1917) -3815 = AND(3673, 1926) -3818 = AND(3677, 1926) -3821 = BUFF(3682) -3824 = BUFF(3682) -3827 = BUFF(3690) -3830 = BUFF(3690) -3833 = NAND(3773, 3774) -3834 = NAND(3487, 3776) -3835 = NAND(3484, 3778) -3838 = AND(3789, 3731) -3845 = AND(3803, 3753) -3850 = BUFF(3721) -3855 = BUFF(3734) -3858 = BUFF(3740) -3861 = BUFF(3743) -3865 = BUFF(3756) -3868 = BUFF(3762) -3884 = NAND(3775, 3834) -3885 = NAND(3777, 3835) -3894 = NAND(3721, 3786) -3895 = NAND(3743, 3800) -3898 = NOT(3821) -3899 = NOT(3824) -3906 = NOT(3830) -3911 = NOT(3827) -3912 = AND(3786, 1912) -3913 = BUFF(3812) -3916 = AND(3800, 1917) -3917 = BUFF(3818) -3920 = NOT(3809) -3921 = BUFF(3818) -3924 = NOT(3884) -3925 = NOT(3885) -3926 = AND(3721, 3838, 3734, 3740) -3930 = NAND(3721, 3838, 3654) -3931 = NAND(3658, 3838, 3734, 3721) -3932 = AND(3743, 3845, 3756, 3762) -3935 = NAND(3743, 3845, 3673) -3936 = NAND(3677, 3845, 3756, 3743) -3937 = BUFF(3838) -3940 = BUFF(3845) -3947 = NOT(3912) -3948 = NOT(3916) -3950 = BUFF(3850) -3953 = BUFF(3850) -3956 = BUFF(3855) -3959 = BUFF(3855) -3962 = BUFF(3858) -3965 = BUFF(3858) -3968 = BUFF(3861) -3971 = BUFF(3861) -3974 = BUFF(3865) -3977 = BUFF(3865) -3980 = BUFF(3868) -3983 = BUFF(3868) -3987 = NAND(3924, 3925) -3992 = NAND(3765, 3894, 3930, 3931) -3996 = NAND(3766, 3895, 3935, 3936) -4013 = NOT(3921) -4028 = AND(3932, 3926) -4029 = NAND(3953, 3681) -4030 = NAND(3959, 3686) -4031 = NAND(3965, 3688) -4032 = NAND(3971, 3689) -4033 = NAND(3977, 3693) -4034 = NAND(3983, 3695) -4035 = BUFF(3926) -4042 = NOT(3953) -4043 = NOT(3956) -4044 = NAND(3956, 3685) -4045 = NOT(3959) -4046 = NOT(3962) -4047 = NAND(3962, 3687) -4048 = NOT(3965) -4049 = NOT(3971) -4050 = NOT(3977) -4051 = NOT(3980) -4052 = NAND(3980, 3694) -4053 = NOT(3983) -4054 = NOT(3974) -4055 = NAND(3974, 3696) -4056 = AND(3932, 2304) -4057 = NOT(3950) -4058 = NAND(3950, 3703) -4059 = BUFF(3937) -4062 = BUFF(3937) -4065 = NOT(3968) -4066 = NAND(3968, 3704) -4067 = BUFF(3940) -4070 = BUFF(3940) -4073 = NAND(3926, 3996) -4074 = NOT(3992) -4075 = NAND(3493, 4042) -4076 = NAND(3499, 4045) -4077 = NAND(3505, 4048) -4078 = NAND(3511, 4049) -4079 = NAND(3517, 4050) -4080 = NAND(3523, 4053) -4085 = NAND(3496, 4043) -4086 = NAND(3502, 4046) -4088 = NAND(3520, 4051) -4090 = NAND(3514, 4054) -4091 = AND(3996, 1926) -4094 = OR(3605, 4056) -4098 = NAND(3490, 4057) -4101 = NAND(3508, 4065) -4104 = AND(4073, 4074) -4105 = NAND(4075, 4029) -4106 = NAND(4062, 3899) -4107 = NAND(4076, 4030) -4108 = NAND(4077, 4031) -4109 = NAND(4078, 4032) -4110 = NAND(4070, 3906) -4111 = NAND(4079, 4033) -4112 = NAND(4080, 4034) -4113 = NOT(4059) -4114 = NAND(4059, 3898) -4115 = NOT(4062) -4116 = NAND(4085, 4044) -4119 = NAND(4086, 4047) -4122 = NOT(4070) -4123 = NAND(4088, 4052) -4126 = NOT(4067) -4127 = NAND(4067, 3911) -4128 = NAND(4090, 4055) -4139 = NAND(4098, 4058) -4142 = NAND(4101, 4066) -4145 = NOT(4104) -4146 = NOT(4105) -4147 = NAND(3824, 4115) -4148 = NOT(4107) -4149 = NOT(4108) -4150 = NOT(4109) -4151 = NAND(3830, 4122) -4152 = NOT(4111) -4153 = NOT(4112) -4154 = NAND(3821, 4113) -4161 = NAND(3827, 4126) -4167 = BUFF(4091) -4174 = BUFF(4094) -4182 = BUFF(4091) -4186 = AND(330, 4094) -4189 = AND(4146, 2230) -4190 = NAND(4147, 4106) -4191 = AND(4148, 2232) -4192 = AND(4149, 2233) -4193 = AND(4150, 2234) -4194 = NAND(4151, 4110) -4195 = AND(4152, 2236) -4196 = AND(4153, 2237) -4197 = NAND(4154, 4114) -4200 = BUFF(4116) -4203 = BUFF(4116) -4209 = BUFF(4119) -4213 = BUFF(4119) -4218 = NAND(4161, 4127) -4223 = BUFF(4123) -4238 = AND(4128, 3917) -4239 = NOT(4139) -4241 = NOT(4142) -4242 = AND(330, 4123) -4247 = BUFF(4128) -4251 = NOR(3713, 4189, 2898) -4252 = NOT(4190) -4253 = NOR(3715, 4191, 2900) -4254 = NOR(3716, 4192, 2901) -4255 = NOR(3717, 4193, 3406) -4256 = NOT(4194) -4257 = NOR(3719, 4195, 3779) -4258 = NOR(3720, 4196, 3780) -4283 = AND(4167, 4035) -4284 = AND(4174, 4035) -4287 = OR(3815, 4238) -4291 = NOT(4186) -4295 = NOT(4167) -4296 = BUFF(4167) -4299 = NOT(4182) -4303 = AND(4252, 2231) -4304 = AND(4256, 2235) -4305 = BUFF(4197) -4310 = OR(3992, 4283) -4316 = AND(4174, 4213, 4203) -4317 = AND(4174, 4209) -4318 = AND(4223, 4128, 4218) -4319 = AND(4223, 4128) -4322 = AND(4167, 4209) -4325 = NAND(4203, 3913) -4326 = NAND(4203, 4213, 4167) -4327 = NAND(4218, 3815) -4328 = NAND(4218, 4128, 3917) -4329 = NAND(4247, 4013) -4330 = NOT(4247) -4331 = AND(330, 4094, 4295) -4335 = AND(4251, 2730) -4338 = AND(4253, 2734) -4341 = AND(4254, 2736) -4344 = AND(4255, 2738) -4347 = AND(4257, 2742) -4350 = AND(4258, 2744) -4353 = BUFF(4197) -4356 = BUFF(4203) -4359 = BUFF(4209) -4362 = BUFF(4218) -4365 = BUFF(4242) -4368 = BUFF(4242) -4371 = AND(4223, 4223) -4376 = NOR(3714, 4303, 2899) -4377 = NOR(3718, 4304, 3642) -4387 = AND(330, 4317) -4390 = AND(330, 4318) -4393 = NAND(3921, 4330) -4398 = BUFF(4287) -4413 = BUFF(4284) -4416 = NAND(3920, 4325, 4326) -4421 = OR(3812, 4322) -4427 = NAND(3948, 4327, 4328) -4430 = BUFF(4287) -4435 = AND(330, 4316) -4442 = OR(4331, 4296) -4443 = AND(4174, 4305, 4203, 4213) -4446 = NAND(4305, 3809) -4447 = NAND(4305, 4200, 3913) -4448 = NAND(4305, 4200, 4213, 4167) -4452 = NOT(4356) -4458 = NAND(4329, 4393) -4461 = NOT(4365) -4462 = NOT(4368) -4463 = NAND(4371, 1460) -4464 = NOT(4371) -4465 = BUFF(4310) -4468 = NOR(4331, 4296) -4472 = AND(4376, 2732) -4475 = AND(4377, 2740) -4479 = BUFF(4310) -4484 = NOT(4353) -4486 = NOT(4359) -4487 = NAND(4359, 4299) -4491 = NOT(4362) -4493 = AND(330, 4319) -4496 = NOT(4398) -4497 = AND(4287, 4398) -4498 = AND(4442, 1769) -4503 = NAND(3947, 4446, 4447, 4448) -4506 = NOT(4413) -4507 = NOT(4435) -4508 = NOT(4421) -4509 = NAND(4421, 4452) -4510 = NOT(4427) -4511 = NAND(4427, 4241) -4515 = NAND(965, 4464) -4526 = NOT(4416) -4527 = NAND(4416, 4484) -4528 = NAND(4182, 4486) -4529 = NOT(4430) -4530 = NAND(4430, 4491) -4531 = BUFF(4387) -4534 = BUFF(4387) -4537 = BUFF(4390) -4540 = BUFF(4390) -4545 = AND(330, 4319, 4496) -4549 = AND(330, 4443) -4552 = NAND(4356, 4508) -4555 = NAND(4142, 4510) -4558 = NOT(4493) -4559 = NAND(4463, 4515) -4562 = NOT(4465) -4563 = AND(4310, 4465) -4564 = BUFF(4468) -4568 = NOT(4479) -4569 = BUFF(4443) -4572 = NAND(4353, 4526) -4573 = NAND(4362, 4529) -4576 = NAND(4487, 4528) -4581 = BUFF(4458) -4584 = BUFF(4458) -4587 = OR(2758, 4498, 2761) -4588 = NOR(2758, 4498, 2761) -4589 = OR(4545, 4497) -4593 = NAND(4552, 4509) -4596 = NOT(4531) -4597 = NOT(4534) -4599 = NAND(4555, 4511) -4602 = NOT(4537) -4603 = NOT(4540) -4608 = AND(330, 4284, 4562) -4613 = BUFF(4503) -4616 = BUFF(4503) -4619 = NAND(4572, 4527) -4623 = NAND(4573, 4530) -4628 = NOT(4588) -4629 = NAND(4569, 4506) -4630 = NOT(4569) -4635 = NOT(4576) -4636 = NAND(4576, 4291) -4640 = NOT(4581) -4641 = NAND(4581, 4461) -4642 = NOT(4584) -4643 = NAND(4584, 4462) -4644 = NOR(4608, 4563) -4647 = AND(4559, 2128) -4650 = AND(4559, 2743) -4656 = BUFF(4549) -4659 = BUFF(4549) -4664 = BUFF(4564) -4667 = AND(4587, 4628) -4668 = NAND(4413, 4630) -4669 = NOT(4616) -4670 = NAND(4616, 4239) -4673 = NOT(4619) -4674 = NAND(4619, 4507) -4675 = NAND(4186, 4635) -4676 = NOT(4623) -4677 = NAND(4623, 4558) -4678 = NAND(4365, 4640) -4679 = NAND(4368, 4642) -4687 = NOT(4613) -4688 = NAND(4613, 4568) -4691 = BUFF(4593) -4694 = BUFF(4593) -4697 = BUFF(4599) -4700 = BUFF(4599) -4704 = NAND(4629, 4668) -4705 = NAND(4139, 4669) -4706 = NOT(4656) -4707 = NOT(4659) -4708 = NAND(4435, 4673) -4711 = NAND(4675, 4636) -4716 = NAND(4493, 4676) -4717 = NAND(4678, 4641) -4721 = NAND(4679, 4643) -4722 = BUFF(4644) -4726 = NOT(4664) -4727 = OR(4647, 4650, 4350) -4730 = NOR(4647, 4650, 4350) -4733 = NAND(4479, 4687) -4740 = NAND(4705, 4670) -4743 = NAND(4708, 4674) -4747 = NOT(4691) -4748 = NAND(4691, 4596) -4749 = NOT(4694) -4750 = NAND(4694, 4597) -4753 = NOT(4697) -4754 = NAND(4697, 4602) -4755 = NOT(4700) -4756 = NAND(4700, 4603) -4757 = NAND(4716, 4677) -4769 = NAND(4733, 4688) -4772 = AND(330, 4704) -4775 = NOT(4721) -4778 = NOT(4730) -4786 = NAND(4531, 4747) -4787 = NAND(4534, 4749) -4788 = NAND(4537, 4753) -4789 = NAND(4540, 4755) -4794 = AND(4711, 2124) -4797 = AND(4711, 2735) -4800 = AND(4717, 2127) -4805 = BUFF(4722) -4808 = AND(4717, 4468) -4812 = BUFF(4727) -4815 = AND(4727, 4778) -4816 = NOT(4769) -4817 = NOT(4772) -4818 = NAND(4786, 4748) -4822 = NAND(4787, 4750) -4823 = NAND(4788, 4754) -4826 = NAND(4789, 4756) -4829 = NAND(4775, 4726) -4830 = NOT(4775) -4831 = AND(4743, 2122) -4838 = AND(4757, 2126) -4844 = BUFF(4740) -4847 = BUFF(4740) -4850 = BUFF(4743) -4854 = BUFF(4757) -4859 = NAND(4772, 4816) -4860 = NAND(4769, 4817) -4868 = NOT(4826) -4870 = NOT(4805) -4872 = NOT(4808) -4873 = NAND(4664, 4830) -4876 = OR(4794, 4797, 4341) -4880 = NOR(4794, 4797, 4341) -4885 = NOT(4812) -4889 = NOT(4822) -4895 = NAND(4859, 4860) -4896 = NOT(4844) -4897 = NAND(4844, 4706) -4898 = NOT(4847) -4899 = NAND(4847, 4707) -4900 = NOR(4868, 4564) -4901 = AND(4717, 4757, 4823, 4564) -4902 = NOT(4850) -4904 = NOT(4854) -4905 = NAND(4854, 4872) -4906 = NAND(4873, 4829) -4907 = AND(4818, 2123) -4913 = AND(4823, 2125) -4916 = AND(4818, 4644) -4920 = NOT(4880) -4921 = AND(4895, 2184) -4924 = NAND(4656, 4896) -4925 = NAND(4659, 4898) -4926 = OR(4900, 4901) -4928 = NAND(4889, 4870) -4929 = NOT(4889) -4930 = NAND(4808, 4904) -4931 = NOT(4906) -4937 = BUFF(4876) -4940 = BUFF(4876) -4944 = AND(4876, 4920) -4946 = NAND(4924, 4897) -4949 = NAND(4925, 4899) -4950 = NAND(4916, 4902) -4951 = NOT(4916) -4952 = NAND(4805, 4929) -4953 = NAND(4930, 4905) -4954 = AND(4926, 2737) -4957 = AND(4931, 2741) -4964 = OR(2764, 2483, 4921) -4965 = NOR(2764, 2483, 4921) -4968 = NOT(4949) -4969 = NAND(4850, 4951) -4970 = NAND(4952, 4928) -4973 = AND(4953, 2739) -4978 = NOT(4937) -4979 = NOT(4940) -4980 = NOT(4965) -4981 = NOR(4968, 4722) -4982 = AND(4818, 4743, 4946, 4722) -4983 = NAND(4950, 4969) -4984 = NOT(4970) -4985 = AND(4946, 2121) -4988 = OR(4913, 4954, 4344) -4991 = NOR(4913, 4954, 4344) -4996 = OR(4800, 4957, 4347) -4999 = NOR(4800, 4957, 4347) -5002 = AND(4964, 4980) -5007 = OR(4981, 4982) -5010 = AND(4983, 2731) -5013 = AND(4984, 2733) -5018 = OR(4838, 4973, 4475) -5021 = NOR(4838, 4973, 4475) -5026 = NOT(4991) -5029 = NOT(4999) -5030 = AND(5007, 2729) -5039 = BUFF(4996) -5042 = BUFF(4988) -5045 = AND(4988, 5026) -5046 = NOT(5021) -5047 = AND(4996, 5029) -5050 = OR(4831, 5010, 4472) -5055 = NOR(4831, 5010, 4472) -5058 = OR(4907, 5013, 4338) -5061 = NOR(4907, 5013, 4338) -5066 = AND(4730, 4999, 5021, 4991) -5070 = BUFF(5018) -5078 = AND(5018, 5046) -5080 = OR(4985, 5030, 4335) -5085 = NOR(4985, 5030, 4335) -5094 = NAND(5039, 4885) -5095 = NOT(5039) -5097 = NOT(5042) -5102 = AND(5050, 5050) -5103 = NOT(5061) -5108 = NAND(4812, 5095) -5109 = NOT(5070) -5110 = NAND(5070, 5097) -5111 = BUFF(5058) -5114 = AND(5050, 1461) -5117 = BUFF(5050) -5120 = AND(5080, 5080) -5121 = AND(5058, 5103) -5122 = NAND(5094, 5108) -5125 = NAND(5042, 5109) -5128 = AND(1461, 5080) -5133 = AND(4880, 5061, 5055, 5085) -5136 = AND(5055, 5085, 1464) -5139 = BUFF(5080) -5145 = NAND(5125, 5110) -5151 = BUFF(5111) -5154 = BUFF(5111) -5159 = NOT(5117) -5160 = BUFF(5114) -5163 = BUFF(5114) -5166 = AND(5066, 5133) -5173 = AND(5066, 5133) -5174 = BUFF(5122) -5177 = BUFF(5122) -5182 = NOT(5139) -5183 = NAND(5139, 5159) -5184 = BUFF(5128) -5188 = BUFF(5128) -5192 = NOT(5166) -5193 = NOR(5136, 5173) -5196 = NAND(5151, 4978) -5197 = NOT(5151) -5198 = NAND(5154, 4979) -5199 = NOT(5154) -5201 = NOT(5160) -5203 = NOT(5163) -5205 = BUFF(5145) -5209 = BUFF(5145) -5212 = NAND(5117, 5182) -5215 = AND(213, 5193) -5217 = NOT(5174) -5219 = NOT(5177) -5220 = NAND(4937, 5197) -5221 = NAND(4940, 5199) -5222 = NOT(5184) -5223 = NAND(5184, 5201) -5224 = NAND(5188, 5203) -5225 = NOT(5188) -5228 = NAND(5183, 5212) -5231 = NOT(5215) -5232 = NAND(5205, 5217) -5233 = NOT(5205) -5234 = NAND(5209, 5219) -5235 = NOT(5209) -5236 = NAND(5196, 5220) -5240 = NAND(5198, 5221) -5242 = NAND(5160, 5222) -5243 = NAND(5163, 5225) -5245 = NAND(5174, 5233) -5246 = NAND(5177, 5235) -5250 = NOT(5240) -5253 = NOT(5228) -5254 = NAND(5242, 5223) -5257 = NAND(5243, 5224) -5258 = NAND(5232, 5245) -5261 = NAND(5234, 5246) -5266 = NOT(5257) -5269 = BUFF(5236) -5277 = AND(5236, 5254, 2307) -5278 = AND(5250, 5254, 2310) -5279 = NOT(5261) -5283 = NOT(5269) -5284 = NAND(5269, 5253) -5285 = AND(5236, 5266, 2310) -5286 = AND(5250, 5266, 2307) -5289 = BUFF(5258) -5292 = BUFF(5258) -5295 = NAND(5228, 5283) -5298 = OR(5277, 5285, 5278, 5286) -5303 = BUFF(5279) -5306 = BUFF(5279) -5309 = NAND(5295, 5284) -5312 = NOT(5292) -5313 = NOT(5289) -5322 = NOT(5306) -5323 = NOT(5303) -5324 = BUFF(5298) -5327 = BUFF(5298) -5332 = BUFF(5309) -5335 = BUFF(5309) -5340 = NAND(5324, 5323) -5341 = NAND(5327, 5322) -5344 = NOT(5327) -5345 = NOT(5324) -5348 = NAND(5332, 5313) -5349 = NAND(5335, 5312) -5350 = NAND(5303, 5345) -5351 = NAND(5306, 5344) -5352 = NOT(5335) -5353 = NOT(5332) -5354 = NAND(5289, 5353) -5355 = NAND(5292, 5352) -5356 = NAND(5350, 5340) -5357 = NAND(5351, 5341) -5358 = NAND(5348, 5354) -5359 = NAND(5349, 5355) -5360 = AND(5356, 5357) -5361 = NAND(5358, 5359) diff --git a/ISCAS85/c432.bench b/ISCAS85/c432.bench deleted file mode 100644 index f020905..0000000 --- a/ISCAS85/c432.bench +++ /dev/null @@ -1,207 +0,0 @@ -# c432 - -INPUT(1) -INPUT(4) -INPUT(8) -INPUT(11) -INPUT(14) -INPUT(17) -INPUT(21) -INPUT(24) -INPUT(27) -INPUT(30) -INPUT(34) -INPUT(37) -INPUT(40) -INPUT(43) -INPUT(47) -INPUT(50) -INPUT(53) -INPUT(56) -INPUT(60) -INPUT(63) -INPUT(66) -INPUT(69) -INPUT(73) -INPUT(76) -INPUT(79) -INPUT(82) -INPUT(86) -INPUT(89) -INPUT(92) -INPUT(95) -INPUT(99) -INPUT(102) -INPUT(105) -INPUT(108) -INPUT(112) -INPUT(115) - -OUTPUT(223) -OUTPUT(329) -OUTPUT(370) -OUTPUT(421) -OUTPUT(430) -OUTPUT(431) -OUTPUT(432) - -118 = NOT(1) -119 = NOT(4) -122 = NOT(11) -123 = NOT(17) -126 = NOT(24) -127 = NOT(30) -130 = NOT(37) -131 = NOT(43) -134 = NOT(50) -135 = NOT(56) -138 = NOT(63) -139 = NOT(69) -142 = NOT(76) -143 = NOT(82) -146 = NOT(89) -147 = NOT(95) -150 = NOT(102) -151 = NOT(108) -154 = NAND(118, 4) -157 = NOR(8, 119) -158 = NOR(14, 119) -159 = NAND(122, 17) -162 = NAND(126, 30) -165 = NAND(130, 43) -168 = NAND(134, 56) -171 = NAND(138, 69) -174 = NAND(142, 82) -177 = NAND(146, 95) -180 = NAND(150, 108) -183 = NOR(21, 123) -184 = NOR(27, 123) -185 = NOR(34, 127) -186 = NOR(40, 127) -187 = NOR(47, 131) -188 = NOR(53, 131) -189 = NOR(60, 135) -190 = NOR(66, 135) -191 = NOR(73, 139) -192 = NOR(79, 139) -193 = NOR(86, 143) -194 = NOR(92, 143) -195 = NOR(99, 147) -196 = NOR(105, 147) -197 = NOR(112, 151) -198 = NOR(115, 151) -199 = AND(154, 159, 162, 165, 168, 171, 174, 177, 180) -203 = NOT(199) -213 = NOT(199) -223 = NOT(199) -224 = XOR(203, 154) -227 = XOR(203, 159) -230 = XOR(203, 162) -233 = XOR(203, 165) -236 = XOR(203, 168) -239 = XOR(203, 171) -242 = NAND(1, 213) -243 = XOR(203, 174) -246 = NAND(213, 11) -247 = XOR(203, 177) -250 = NAND(213, 24) -251 = XOR(203, 180) -254 = NAND(213, 37) -255 = NAND(213, 50) -256 = NAND(213, 63) -257 = NAND(213, 76) -258 = NAND(213, 89) -259 = NAND(213, 102) -260 = NAND(224, 157) -263 = NAND(224, 158) -264 = NAND(227, 183) -267 = NAND(230, 185) -270 = NAND(233, 187) -273 = NAND(236, 189) -276 = NAND(239, 191) -279 = NAND(243, 193) -282 = NAND(247, 195) -285 = NAND(251, 197) -288 = NAND(227, 184) -289 = NAND(230, 186) -290 = NAND(233, 188) -291 = NAND(236, 190) -292 = NAND(239, 192) -293 = NAND(243, 194) -294 = NAND(247, 196) -295 = NAND(251, 198) -296 = AND(260, 264, 267, 270, 273, 276, 279, 282, 285) -300 = NOT(263) -301 = NOT(288) -302 = NOT(289) -303 = NOT(290) -304 = NOT(291) -305 = NOT(292) -306 = NOT(293) -307 = NOT(294) -308 = NOT(295) -309 = NOT(296) -319 = NOT(296) -329 = NOT(296) -330 = XOR(309, 260) -331 = XOR(309, 264) -332 = XOR(309, 267) -333 = XOR(309, 270) -334 = NAND(8, 319) -335 = XOR(309, 273) -336 = NAND(319, 21) -337 = XOR(309, 276) -338 = NAND(319, 34) -339 = XOR(309, 279) -340 = NAND(319, 47) -341 = XOR(309, 282) -342 = NAND(319, 60) -343 = XOR(309, 285) -344 = NAND(319, 73) -345 = NAND(319, 86) -346 = NAND(319, 99) -347 = NAND(319, 112) -348 = NAND(330, 300) -349 = NAND(331, 301) -350 = NAND(332, 302) -351 = NAND(333, 303) -352 = NAND(335, 304) -353 = NAND(337, 305) -354 = NAND(339, 306) -355 = NAND(341, 307) -356 = NAND(343, 308) -357 = AND(348, 349, 350, 351, 352, 353, 354, 355, 356) -360 = NOT(357) -370 = NOT(357) -371 = NAND(14, 360) -372 = NAND(360, 27) -373 = NAND(360, 40) -374 = NAND(360, 53) -375 = NAND(360, 66) -376 = NAND(360, 79) -377 = NAND(360, 92) -378 = NAND(360, 105) -379 = NAND(360, 115) -380 = NAND(4, 242, 334, 371) -381 = NAND(246, 336, 372, 17) -386 = NAND(250, 338, 373, 30) -393 = NAND(254, 340, 374, 43) -399 = NAND(255, 342, 375, 56) -404 = NAND(256, 344, 376, 69) -407 = NAND(257, 345, 377, 82) -411 = NAND(258, 346, 378, 95) -414 = NAND(259, 347, 379, 108) -415 = NOT(380) -416 = AND(381, 386, 393, 399, 404, 407, 411, 414) -417 = NOT(393) -418 = NOT(404) -419 = NOT(407) -420 = NOT(411) -421 = NOR(415, 416) -422 = NAND(386, 417) -425 = NAND(386, 393, 418, 399) -428 = NAND(399, 393, 419) -429 = NAND(386, 393, 407, 420) -430 = NAND(381, 386, 422, 399) -431 = NAND(381, 386, 425, 428) -432 = NAND(381, 422, 425, 429) diff --git a/ISCAS85/c499.bench b/ISCAS85/c499.bench deleted file mode 100644 index 21ca030..0000000 --- a/ISCAS85/c499.bench +++ /dev/null @@ -1,279 +0,0 @@ -# c499 - -INPUT(1) -INPUT(5) -INPUT(9) -INPUT(13) -INPUT(17) -INPUT(21) -INPUT(25) -INPUT(29) -INPUT(33) -INPUT(37) -INPUT(41) -INPUT(45) -INPUT(49) -INPUT(53) -INPUT(57) -INPUT(61) -INPUT(65) -INPUT(69) -INPUT(73) -INPUT(77) -INPUT(81) -INPUT(85) -INPUT(89) -INPUT(93) -INPUT(97) -INPUT(101) -INPUT(105) -INPUT(109) -INPUT(113) -INPUT(117) -INPUT(121) -INPUT(125) -INPUT(129) -INPUT(130) -INPUT(131) -INPUT(132) -INPUT(133) -INPUT(134) -INPUT(135) -INPUT(136) -INPUT(137) - -OUTPUT(724) -OUTPUT(725) -OUTPUT(726) -OUTPUT(727) -OUTPUT(728) -OUTPUT(729) -OUTPUT(730) -OUTPUT(731) -OUTPUT(732) -OUTPUT(733) -OUTPUT(734) -OUTPUT(735) -OUTPUT(736) -OUTPUT(737) -OUTPUT(738) -OUTPUT(739) -OUTPUT(740) -OUTPUT(741) -OUTPUT(742) -OUTPUT(743) -OUTPUT(744) -OUTPUT(745) -OUTPUT(746) -OUTPUT(747) -OUTPUT(748) -OUTPUT(749) -OUTPUT(750) -OUTPUT(751) -OUTPUT(752) -OUTPUT(753) -OUTPUT(754) -OUTPUT(755) - -250 = XOR(1, 5) -251 = XOR(9, 13) -252 = XOR(17, 21) -253 = XOR(25, 29) -254 = XOR(33, 37) -255 = XOR(41, 45) -256 = XOR(49, 53) -257 = XOR(57, 61) -258 = XOR(65, 69) -259 = XOR(73, 77) -260 = XOR(81, 85) -261 = XOR(89, 93) -262 = XOR(97, 101) -263 = XOR(105, 109) -264 = XOR(113, 117) -265 = XOR(121, 125) -266 = AND(129, 137) -267 = AND(130, 137) -268 = AND(131, 137) -269 = AND(132, 137) -270 = AND(133, 137) -271 = AND(134, 137) -272 = AND(135, 137) -273 = AND(136, 137) -274 = XOR(1, 17) -275 = XOR(33, 49) -276 = XOR(5, 21) -277 = XOR(37, 53) -278 = XOR(9, 25) -279 = XOR(41, 57) -280 = XOR(13, 29) -281 = XOR(45, 61) -282 = XOR(65, 81) -283 = XOR(97, 113) -284 = XOR(69, 85) -285 = XOR(101, 117) -286 = XOR(73, 89) -287 = XOR(105, 121) -288 = XOR(77, 93) -289 = XOR(109, 125) -290 = XOR(250, 251) -293 = XOR(252, 253) -296 = XOR(254, 255) -299 = XOR(256, 257) -302 = XOR(258, 259) -305 = XOR(260, 261) -308 = XOR(262, 263) -311 = XOR(264, 265) -314 = XOR(274, 275) -315 = XOR(276, 277) -316 = XOR(278, 279) -317 = XOR(280, 281) -318 = XOR(282, 283) -319 = XOR(284, 285) -320 = XOR(286, 287) -321 = XOR(288, 289) -338 = XOR(290, 293) -339 = XOR(296, 299) -340 = XOR(290, 296) -341 = XOR(293, 299) -342 = XOR(302, 305) -343 = XOR(308, 311) -344 = XOR(302, 308) -345 = XOR(305, 311) -346 = XOR(266, 342) -347 = XOR(267, 343) -348 = XOR(268, 344) -349 = XOR(269, 345) -350 = XOR(270, 338) -351 = XOR(271, 339) -352 = XOR(272, 340) -353 = XOR(273, 341) -354 = XOR(314, 346) -367 = XOR(315, 347) -380 = XOR(316, 348) -393 = XOR(317, 349) -406 = XOR(318, 350) -419 = XOR(319, 351) -432 = XOR(320, 352) -445 = XOR(321, 353) -554 = NOT(354) -555 = NOT(367) -556 = NOT(380) -557 = NOT(354) -558 = NOT(367) -559 = NOT(393) -560 = NOT(354) -561 = NOT(380) -562 = NOT(393) -563 = NOT(367) -564 = NOT(380) -565 = NOT(393) -566 = NOT(419) -567 = NOT(445) -568 = NOT(419) -569 = NOT(432) -570 = NOT(406) -571 = NOT(445) -572 = NOT(406) -573 = NOT(432) -574 = NOT(406) -575 = NOT(419) -576 = NOT(432) -577 = NOT(406) -578 = NOT(419) -579 = NOT(445) -580 = NOT(406) -581 = NOT(432) -582 = NOT(445) -583 = NOT(419) -584 = NOT(432) -585 = NOT(445) -586 = NOT(367) -587 = NOT(393) -588 = NOT(367) -589 = NOT(380) -590 = NOT(354) -591 = NOT(393) -592 = NOT(354) -593 = NOT(380) -594 = AND(554, 555, 556, 393) -595 = AND(557, 558, 380, 559) -596 = AND(560, 367, 561, 562) -597 = AND(354, 563, 564, 565) -598 = AND(574, 575, 576, 445) -599 = AND(577, 578, 432, 579) -600 = AND(580, 419, 581, 582) -601 = AND(406, 583, 584, 585) -602 = OR(594, 595, 596, 597) -607 = OR(598, 599, 600, 601) -620 = AND(406, 566, 432, 567, 602) -625 = AND(406, 568, 569, 445, 602) -630 = AND(570, 419, 432, 571, 602) -635 = AND(572, 419, 573, 445, 602) -640 = AND(354, 586, 380, 587, 607) -645 = AND(354, 588, 589, 393, 607) -650 = AND(590, 367, 380, 591, 607) -655 = AND(592, 367, 593, 393, 607) -692 = AND(354, 620) -693 = AND(367, 620) -694 = AND(380, 620) -695 = AND(393, 620) -696 = AND(354, 625) -697 = AND(367, 625) -698 = AND(380, 625) -699 = AND(393, 625) -700 = AND(354, 630) -701 = AND(367, 630) -702 = AND(380, 630) -703 = AND(393, 630) -704 = AND(354, 635) -705 = AND(367, 635) -706 = AND(380, 635) -707 = AND(393, 635) -708 = AND(406, 640) -709 = AND(419, 640) -710 = AND(432, 640) -711 = AND(445, 640) -712 = AND(406, 645) -713 = AND(419, 645) -714 = AND(432, 645) -715 = AND(445, 645) -716 = AND(406, 650) -717 = AND(419, 650) -718 = AND(432, 650) -719 = AND(445, 650) -720 = AND(406, 655) -721 = AND(419, 655) -722 = AND(432, 655) -723 = AND(445, 655) -724 = XOR(1, 692) -725 = XOR(5, 693) -726 = XOR(9, 694) -727 = XOR(13, 695) -728 = XOR(17, 696) -729 = XOR(21, 697) -730 = XOR(25, 698) -731 = XOR(29, 699) -732 = XOR(33, 700) -733 = XOR(37, 701) -734 = XOR(41, 702) -735 = XOR(45, 703) -736 = XOR(49, 704) -737 = XOR(53, 705) -738 = XOR(57, 706) -739 = XOR(61, 707) -740 = XOR(65, 708) -741 = XOR(69, 709) -742 = XOR(73, 710) -743 = XOR(77, 711) -744 = XOR(81, 712) -745 = XOR(85, 713) -746 = XOR(89, 714) -747 = XOR(93, 715) -748 = XOR(97, 716) -749 = XOR(101, 717) -750 = XOR(105, 718) -751 = XOR(109, 719) -752 = XOR(113, 720) -753 = XOR(117, 721) -754 = XOR(121, 722) -755 = XOR(125, 723) diff --git a/ISCAS85/c5315.bench b/ISCAS85/c5315.bench deleted file mode 100644 index dba4048..0000000 --- a/ISCAS85/c5315.bench +++ /dev/null @@ -1,2612 +0,0 @@ -# c5315 - -INPUT(1) -INPUT(4) -INPUT(11) -INPUT(14) -INPUT(17) -INPUT(20) -INPUT(23) -INPUT(24) -INPUT(25) -INPUT(26) -INPUT(27) -INPUT(31) -INPUT(34) -INPUT(37) -INPUT(40) -INPUT(43) -INPUT(46) -INPUT(49) -INPUT(52) -INPUT(53) -INPUT(54) -INPUT(61) -INPUT(64) -INPUT(67) -INPUT(70) -INPUT(73) -INPUT(76) -INPUT(79) -INPUT(80) -INPUT(81) -INPUT(82) -INPUT(83) -INPUT(86) -INPUT(87) -INPUT(88) -INPUT(91) -INPUT(94) -INPUT(97) -INPUT(100) -INPUT(103) -INPUT(106) -INPUT(109) -INPUT(112) -INPUT(113) -INPUT(114) -INPUT(115) -INPUT(116) -INPUT(117) -INPUT(118) -INPUT(119) -INPUT(120) -INPUT(121) -INPUT(122) -INPUT(123) -INPUT(126) -INPUT(127) -INPUT(128) -INPUT(129) -INPUT(130) -INPUT(131) -INPUT(132) -INPUT(135) -INPUT(136) -INPUT(137) -INPUT(140) -INPUT(141) -INPUT(145) -INPUT(146) -INPUT(149) -INPUT(152) -INPUT(155) -INPUT(158) -INPUT(161) -INPUT(164) -INPUT(167) -INPUT(170) -INPUT(173) -INPUT(176) -INPUT(179) -INPUT(182) -INPUT(185) -INPUT(188) -INPUT(191) -INPUT(194) -INPUT(197) -INPUT(200) -INPUT(203) -INPUT(206) -INPUT(209) -INPUT(210) -INPUT(217) -INPUT(218) -INPUT(225) -INPUT(226) -INPUT(233) -INPUT(234) -INPUT(241) -INPUT(242) -INPUT(245) -INPUT(248) -INPUT(251) -INPUT(254) -INPUT(257) -INPUT(264) -INPUT(265) -INPUT(272) -INPUT(273) -INPUT(280) -INPUT(281) -INPUT(288) -INPUT(289) -INPUT(292) -INPUT(293) -INPUT(299) -INPUT(302) -INPUT(307) -INPUT(308) -INPUT(315) -INPUT(316) -INPUT(323) -INPUT(324) -INPUT(331) -INPUT(332) -INPUT(335) -INPUT(338) -INPUT(341) -INPUT(348) -INPUT(351) -INPUT(358) -INPUT(361) -INPUT(366) -INPUT(369) -INPUT(372) -INPUT(373) -INPUT(374) -INPUT(386) -INPUT(389) -INPUT(400) -INPUT(411) -INPUT(422) -INPUT(435) -INPUT(446) -INPUT(457) -INPUT(468) -INPUT(479) -INPUT(490) -INPUT(503) -INPUT(514) -INPUT(523) -INPUT(534) -INPUT(545) -INPUT(549) -INPUT(552) -INPUT(556) -INPUT(559) -INPUT(562) -INPUT(566) -INPUT(571) -INPUT(574) -INPUT(577) -INPUT(580) -INPUT(583) -INPUT(588) -INPUT(591) -INPUT(592) -INPUT(595) -INPUT(596) -INPUT(597) -INPUT(598) -INPUT(599) -INPUT(603) -INPUT(607) -INPUT(610) -INPUT(613) -INPUT(616) -INPUT(619) -INPUT(625) -INPUT(631) - -OUTPUT(709) -OUTPUT(816) -OUTPUT(1066) -OUTPUT(1137) -OUTPUT(1138) -OUTPUT(1139) -OUTPUT(1140) -OUTPUT(1141) -OUTPUT(1142) -OUTPUT(1143) -OUTPUT(1144) -OUTPUT(1145) -OUTPUT(1147) -OUTPUT(1152) -OUTPUT(1153) -OUTPUT(1154) -OUTPUT(1155) -OUTPUT(1972) -OUTPUT(2054) -OUTPUT(2060) -OUTPUT(2061) -OUTPUT(2139) -OUTPUT(2142) -OUTPUT(2309) -OUTPUT(2387) -OUTPUT(2527) -OUTPUT(2584) -OUTPUT(2590) -OUTPUT(2623) -OUTPUT(3357) -OUTPUT(3358) -OUTPUT(3359) -OUTPUT(3360) -OUTPUT(3604) -OUTPUT(3613) -OUTPUT(4272) -OUTPUT(4275) -OUTPUT(4278) -OUTPUT(4279) -OUTPUT(4737) -OUTPUT(4738) -OUTPUT(4739) -OUTPUT(4740) -OUTPUT(5240) -OUTPUT(5388) -OUTPUT(6641) -OUTPUT(6643) -OUTPUT(6646) -OUTPUT(6648) -OUTPUT(6716) -OUTPUT(6877) -OUTPUT(6924) -OUTPUT(6925) -OUTPUT(6926) -OUTPUT(6927) -OUTPUT(7015) -OUTPUT(7363) -OUTPUT(7365) -OUTPUT(7432) -OUTPUT(7449) -OUTPUT(7465) -OUTPUT(7466) -OUTPUT(7467) -OUTPUT(7469) -OUTPUT(7470) -OUTPUT(7471) -OUTPUT(7472) -OUTPUT(7473) -OUTPUT(7474) -OUTPUT(7476) -OUTPUT(7503) -OUTPUT(7504) -OUTPUT(7506) -OUTPUT(7511) -OUTPUT(7515) -OUTPUT(7516) -OUTPUT(7517) -OUTPUT(7518) -OUTPUT(7519) -OUTPUT(7520) -OUTPUT(7521) -OUTPUT(7522) -OUTPUT(7600) -OUTPUT(7601) -OUTPUT(7602) -OUTPUT(7603) -OUTPUT(7604) -OUTPUT(7605) -OUTPUT(7606) -OUTPUT(7607) -OUTPUT(7626) -OUTPUT(7698) -OUTPUT(7699) -OUTPUT(7700) -OUTPUT(7701) -OUTPUT(7702) -OUTPUT(7703) -OUTPUT(7704) -OUTPUT(7705) -OUTPUT(7706) -OUTPUT(7707) -OUTPUT(7735) -OUTPUT(7736) -OUTPUT(7737) -OUTPUT(7738) -OUTPUT(7739) -OUTPUT(7740) -OUTPUT(7741) -OUTPUT(7742) -OUTPUT(7754) -OUTPUT(7755) -OUTPUT(7756) -OUTPUT(7757) -OUTPUT(7758) -OUTPUT(7759) -OUTPUT(7760) -OUTPUT(7761) -OUTPUT(8075) -OUTPUT(8076) -OUTPUT(8123) -OUTPUT(8124) -OUTPUT(8127) -OUTPUT(8128) - -709 = BUFF(141) -816 = BUFF(293) -1042 = AND(135, 631) -1043 = NOT(591) -1066 = BUFF(592) -1067 = NOT(595) -1080 = NOT(596) -1092 = NOT(597) -1104 = NOT(598) -1137 = NOT(545) -1138 = NOT(348) -1139 = NOT(366) -1140 = AND(552, 562) -1141 = NOT(549) -1142 = NOT(545) -1143 = NOT(545) -1144 = NOT(338) -1145 = NOT(358) -1146 = NAND(373, 1) -1147 = AND(141, 145) -1148 = NOT(592) -1149 = NOT(1042) -1150 = AND(1043, 27) -1151 = AND(386, 556) -1152 = NOT(245) -1153 = NOT(552) -1154 = NOT(562) -1155 = NOT(559) -1156 = AND(386, 559, 556, 552) -1157 = NOT(566) -1161 = BUFF(571) -1173 = BUFF(574) -1185 = BUFF(571) -1197 = BUFF(574) -1209 = BUFF(137) -1213 = BUFF(137) -1216 = BUFF(141) -1219 = NOT(583) -1223 = BUFF(577) -1235 = BUFF(580) -1247 = BUFF(577) -1259 = BUFF(580) -1271 = BUFF(254) -1280 = BUFF(251) -1292 = BUFF(251) -1303 = BUFF(248) -1315 = BUFF(248) -1327 = BUFF(610) -1339 = BUFF(607) -1351 = BUFF(613) -1363 = BUFF(616) -1375 = BUFF(210) -1378 = BUFF(210) -1381 = BUFF(218) -1384 = BUFF(218) -1387 = BUFF(226) -1390 = BUFF(226) -1393 = BUFF(234) -1396 = BUFF(234) -1415 = BUFF(257) -1418 = BUFF(257) -1421 = BUFF(265) -1424 = BUFF(265) -1427 = BUFF(273) -1430 = BUFF(273) -1433 = BUFF(281) -1436 = BUFF(281) -1455 = BUFF(335) -1462 = BUFF(335) -1469 = BUFF(206) -1475 = AND(27, 31) -1479 = BUFF(1) -1482 = BUFF(588) -1492 = BUFF(293) -1495 = BUFF(302) -1498 = BUFF(308) -1501 = BUFF(308) -1504 = BUFF(316) -1507 = BUFF(316) -1510 = BUFF(324) -1513 = BUFF(324) -1516 = BUFF(341) -1519 = BUFF(341) -1522 = BUFF(351) -1525 = BUFF(351) -1542 = BUFF(257) -1545 = BUFF(257) -1548 = BUFF(265) -1551 = BUFF(265) -1554 = BUFF(273) -1557 = BUFF(273) -1560 = BUFF(281) -1563 = BUFF(281) -1566 = BUFF(332) -1573 = BUFF(332) -1580 = BUFF(549) -1583 = AND(31, 27) -1588 = NOT(588) -1594 = BUFF(324) -1597 = BUFF(324) -1600 = BUFF(341) -1603 = BUFF(341) -1606 = BUFF(351) -1609 = BUFF(351) -1612 = BUFF(293) -1615 = BUFF(302) -1618 = BUFF(308) -1621 = BUFF(308) -1624 = BUFF(316) -1627 = BUFF(316) -1630 = BUFF(361) -1633 = BUFF(361) -1636 = BUFF(210) -1639 = BUFF(210) -1642 = BUFF(218) -1645 = BUFF(218) -1648 = BUFF(226) -1651 = BUFF(226) -1654 = BUFF(234) -1657 = BUFF(234) -1660 = NOT(324) -1663 = BUFF(242) -1675 = BUFF(242) -1685 = BUFF(254) -1697 = BUFF(610) -1709 = BUFF(607) -1721 = BUFF(625) -1727 = BUFF(619) -1731 = BUFF(613) -1743 = BUFF(616) -1755 = NOT(599) -1758 = NOT(603) -1761 = BUFF(619) -1769 = BUFF(625) -1777 = BUFF(619) -1785 = BUFF(625) -1793 = BUFF(619) -1800 = BUFF(625) -1807 = BUFF(619) -1814 = BUFF(625) -1821 = BUFF(299) -1824 = BUFF(446) -1827 = BUFF(457) -1830 = BUFF(468) -1833 = BUFF(422) -1836 = BUFF(435) -1839 = BUFF(389) -1842 = BUFF(400) -1845 = BUFF(411) -1848 = BUFF(374) -1851 = BUFF(4) -1854 = BUFF(446) -1857 = BUFF(457) -1860 = BUFF(468) -1863 = BUFF(435) -1866 = BUFF(389) -1869 = BUFF(400) -1872 = BUFF(411) -1875 = BUFF(422) -1878 = BUFF(374) -1881 = BUFF(479) -1884 = BUFF(490) -1887 = BUFF(503) -1890 = BUFF(514) -1893 = BUFF(523) -1896 = BUFF(534) -1899 = BUFF(54) -1902 = BUFF(479) -1905 = BUFF(503) -1908 = BUFF(514) -1911 = BUFF(523) -1914 = BUFF(534) -1917 = BUFF(490) -1920 = BUFF(361) -1923 = BUFF(369) -1926 = BUFF(341) -1929 = BUFF(351) -1932 = BUFF(308) -1935 = BUFF(316) -1938 = BUFF(293) -1941 = BUFF(302) -1944 = BUFF(281) -1947 = BUFF(289) -1950 = BUFF(265) -1953 = BUFF(273) -1956 = BUFF(234) -1959 = BUFF(257) -1962 = BUFF(218) -1965 = BUFF(226) -1968 = BUFF(210) -1972 = NOT(1146) -2054 = AND(136, 1148) -2060 = NOT(1150) -2061 = NOT(1151) -2139 = BUFF(1209) -2142 = BUFF(1216) -2309 = BUFF(1479) -2349 = AND(1104, 514) -2350 = OR(1067, 514) -2387 = BUFF(1580) -2527 = BUFF(1821) -2584 = NOT(1580) -2585 = AND(170, 1161, 1173) -2586 = AND(173, 1161, 1173) -2587 = AND(167, 1161, 1173) -2588 = AND(164, 1161, 1173) -2589 = AND(161, 1161, 1173) -2590 = NAND(1475, 140) -2591 = AND(185, 1185, 1197) -2592 = AND(158, 1185, 1197) -2593 = AND(152, 1185, 1197) -2594 = AND(146, 1185, 1197) -2595 = AND(170, 1223, 1235) -2596 = AND(173, 1223, 1235) -2597 = AND(167, 1223, 1235) -2598 = AND(164, 1223, 1235) -2599 = AND(161, 1223, 1235) -2600 = AND(185, 1247, 1259) -2601 = AND(158, 1247, 1259) -2602 = AND(152, 1247, 1259) -2603 = AND(146, 1247, 1259) -2604 = AND(106, 1731, 1743) -2605 = AND(61, 1327, 1339) -2606 = AND(106, 1697, 1709) -2607 = AND(49, 1697, 1709) -2608 = AND(103, 1697, 1709) -2609 = AND(40, 1697, 1709) -2610 = AND(37, 1697, 1709) -2611 = AND(20, 1327, 1339) -2612 = AND(17, 1327, 1339) -2613 = AND(70, 1327, 1339) -2614 = AND(64, 1327, 1339) -2615 = AND(49, 1731, 1743) -2616 = AND(103, 1731, 1743) -2617 = AND(40, 1731, 1743) -2618 = AND(37, 1731, 1743) -2619 = AND(20, 1351, 1363) -2620 = AND(17, 1351, 1363) -2621 = AND(70, 1351, 1363) -2622 = AND(64, 1351, 1363) -2623 = NOT(1475) -2624 = AND(123, 1758, 599) -2625 = AND(1777, 1785) -2626 = AND(61, 1351, 1363) -2627 = AND(1761, 1769) -2628 = NOT(1824) -2629 = NOT(1827) -2630 = NOT(1830) -2631 = NOT(1833) -2632 = NOT(1836) -2633 = NOT(1839) -2634 = NOT(1842) -2635 = NOT(1845) -2636 = NOT(1848) -2637 = NOT(1851) -2638 = NOT(1854) -2639 = NOT(1857) -2640 = NOT(1860) -2641 = NOT(1863) -2642 = NOT(1866) -2643 = NOT(1869) -2644 = NOT(1872) -2645 = NOT(1875) -2646 = NOT(1878) -2647 = BUFF(1209) -2653 = NOT(1161) -2664 = NOT(1173) -2675 = BUFF(1209) -2681 = NOT(1185) -2692 = NOT(1197) -2703 = AND(179, 1185, 1197) -2704 = BUFF(1479) -2709 = NOT(1881) -2710 = NOT(1884) -2711 = NOT(1887) -2712 = NOT(1890) -2713 = NOT(1893) -2714 = NOT(1896) -2715 = NOT(1899) -2716 = NOT(1902) -2717 = NOT(1905) -2718 = NOT(1908) -2719 = NOT(1911) -2720 = NOT(1914) -2721 = NOT(1917) -2722 = BUFF(1213) -2728 = NOT(1223) -2739 = NOT(1235) -2750 = BUFF(1213) -2756 = NOT(1247) -2767 = NOT(1259) -2778 = AND(179, 1247, 1259) -2779 = NOT(1327) -2790 = NOT(1339) -2801 = NOT(1351) -2812 = NOT(1363) -2823 = NOT(1375) -2824 = NOT(1378) -2825 = NOT(1381) -2826 = NOT(1384) -2827 = NOT(1387) -2828 = NOT(1390) -2829 = NOT(1393) -2830 = NOT(1396) -2831 = AND(1104, 457, 1378) -2832 = AND(1104, 468, 1384) -2833 = AND(1104, 422, 1390) -2834 = AND(1104, 435, 1396) -2835 = AND(1067, 1375) -2836 = AND(1067, 1381) -2837 = AND(1067, 1387) -2838 = AND(1067, 1393) -2839 = NOT(1415) -2840 = NOT(1418) -2841 = NOT(1421) -2842 = NOT(1424) -2843 = NOT(1427) -2844 = NOT(1430) -2845 = NOT(1433) -2846 = NOT(1436) -2847 = AND(1104, 389, 1418) -2848 = AND(1104, 400, 1424) -2849 = AND(1104, 411, 1430) -2850 = AND(1104, 374, 1436) -2851 = AND(1067, 1415) -2852 = AND(1067, 1421) -2853 = AND(1067, 1427) -2854 = AND(1067, 1433) -2855 = NOT(1455) -2861 = NOT(1462) -2867 = AND(292, 1455) -2868 = AND(288, 1455) -2869 = AND(280, 1455) -2870 = AND(272, 1455) -2871 = AND(264, 1455) -2872 = AND(241, 1462) -2873 = AND(233, 1462) -2874 = AND(225, 1462) -2875 = AND(217, 1462) -2876 = AND(209, 1462) -2877 = BUFF(1216) -2882 = NOT(1482) -2891 = NOT(1475) -2901 = NOT(1492) -2902 = NOT(1495) -2903 = NOT(1498) -2904 = NOT(1501) -2905 = NOT(1504) -2906 = NOT(1507) -2907 = AND(1303, 1495) -2908 = AND(1303, 479, 1501) -2909 = AND(1303, 490, 1507) -2910 = AND(1663, 1492) -2911 = AND(1663, 1498) -2912 = AND(1663, 1504) -2913 = NOT(1510) -2914 = NOT(1513) -2915 = NOT(1516) -2916 = NOT(1519) -2917 = NOT(1522) -2918 = NOT(1525) -2919 = AND(1104, 503, 1513) -2920 = NOT(2349) -2921 = AND(1104, 523, 1519) -2922 = AND(1104, 534, 1525) -2923 = AND(1067, 1510) -2924 = AND(1067, 1516) -2925 = AND(1067, 1522) -2926 = NOT(1542) -2927 = NOT(1545) -2928 = NOT(1548) -2929 = NOT(1551) -2930 = NOT(1554) -2931 = NOT(1557) -2932 = NOT(1560) -2933 = NOT(1563) -2934 = AND(1303, 389, 1545) -2935 = AND(1303, 400, 1551) -2936 = AND(1303, 411, 1557) -2937 = AND(1303, 374, 1563) -2938 = AND(1663, 1542) -2939 = AND(1663, 1548) -2940 = AND(1663, 1554) -2941 = AND(1663, 1560) -2942 = NOT(1566) -2948 = NOT(1573) -2954 = AND(372, 1566) -2955 = AND(366, 1566) -2956 = AND(358, 1566) -2957 = AND(348, 1566) -2958 = AND(338, 1566) -2959 = AND(331, 1573) -2960 = AND(323, 1573) -2961 = AND(315, 1573) -2962 = AND(307, 1573) -2963 = AND(299, 1573) -2964 = NOT(1588) -2969 = AND(83, 1588) -2970 = AND(86, 1588) -2971 = AND(88, 1588) -2972 = AND(88, 1588) -2973 = NOT(1594) -2974 = NOT(1597) -2975 = NOT(1600) -2976 = NOT(1603) -2977 = NOT(1606) -2978 = NOT(1609) -2979 = AND(1315, 503, 1597) -2980 = AND(1315, 514) -2981 = AND(1315, 523, 1603) -2982 = AND(1315, 534, 1609) -2983 = AND(1675, 1594) -2984 = OR(1675, 514) -2985 = AND(1675, 1600) -2986 = AND(1675, 1606) -2987 = NOT(1612) -2988 = NOT(1615) -2989 = NOT(1618) -2990 = NOT(1621) -2991 = NOT(1624) -2992 = NOT(1627) -2993 = AND(1315, 1615) -2994 = AND(1315, 479, 1621) -2995 = AND(1315, 490, 1627) -2996 = AND(1675, 1612) -2997 = AND(1675, 1618) -2998 = AND(1675, 1624) -2999 = NOT(1630) -3000 = BUFF(1469) -3003 = BUFF(1469) -3006 = NOT(1633) -3007 = BUFF(1469) -3010 = BUFF(1469) -3013 = AND(1315, 1630) -3014 = AND(1315, 1633) -3015 = NOT(1636) -3016 = NOT(1639) -3017 = NOT(1642) -3018 = NOT(1645) -3019 = NOT(1648) -3020 = NOT(1651) -3021 = NOT(1654) -3022 = NOT(1657) -3023 = AND(1303, 457, 1639) -3024 = AND(1303, 468, 1645) -3025 = AND(1303, 422, 1651) -3026 = AND(1303, 435, 1657) -3027 = AND(1663, 1636) -3028 = AND(1663, 1642) -3029 = AND(1663, 1648) -3030 = AND(1663, 1654) -3031 = NOT(1920) -3032 = NOT(1923) -3033 = NOT(1926) -3034 = NOT(1929) -3035 = BUFF(1660) -3038 = BUFF(1660) -3041 = NOT(1697) -3052 = NOT(1709) -3063 = NOT(1721) -3068 = NOT(1727) -3071 = AND(97, 1721) -3072 = AND(94, 1721) -3073 = AND(97, 1721) -3074 = AND(94, 1721) -3075 = NOT(1731) -3086 = NOT(1743) -3097 = NOT(1761) -3108 = NOT(1769) -3119 = NOT(1777) -3130 = NOT(1785) -3141 = NOT(1944) -3142 = NOT(1947) -3143 = NOT(1950) -3144 = NOT(1953) -3145 = NOT(1956) -3146 = NOT(1959) -3147 = NOT(1793) -3158 = NOT(1800) -3169 = NOT(1807) -3180 = NOT(1814) -3191 = BUFF(1821) -3194 = NOT(1932) -3195 = NOT(1935) -3196 = NOT(1938) -3197 = NOT(1941) -3198 = NOT(1962) -3199 = NOT(1965) -3200 = BUFF(1469) -3203 = NOT(1968) -3357 = BUFF(2704) -3358 = BUFF(2704) -3359 = BUFF(2704) -3360 = BUFF(2704) -3401 = AND(457, 1092, 2824) -3402 = AND(468, 1092, 2826) -3403 = AND(422, 1092, 2828) -3404 = AND(435, 1092, 2830) -3405 = AND(1080, 2823) -3406 = AND(1080, 2825) -3407 = AND(1080, 2827) -3408 = AND(1080, 2829) -3409 = AND(389, 1092, 2840) -3410 = AND(400, 1092, 2842) -3411 = AND(411, 1092, 2844) -3412 = AND(374, 1092, 2846) -3413 = AND(1080, 2839) -3414 = AND(1080, 2841) -3415 = AND(1080, 2843) -3416 = AND(1080, 2845) -3444 = AND(1280, 2902) -3445 = AND(479, 1280, 2904) -3446 = AND(490, 1280, 2906) -3447 = AND(1685, 2901) -3448 = AND(1685, 2903) -3449 = AND(1685, 2905) -3450 = AND(503, 1092, 2914) -3451 = AND(523, 1092, 2916) -3452 = AND(534, 1092, 2918) -3453 = AND(1080, 2913) -3454 = AND(1080, 2915) -3455 = AND(1080, 2917) -3456 = AND(2920, 2350) -3459 = AND(389, 1280, 2927) -3460 = AND(400, 1280, 2929) -3461 = AND(411, 1280, 2931) -3462 = AND(374, 1280, 2933) -3463 = AND(1685, 2926) -3464 = AND(1685, 2928) -3465 = AND(1685, 2930) -3466 = AND(1685, 2932) -3481 = AND(503, 1292, 2974) -3482 = NOT(2980) -3483 = AND(523, 1292, 2976) -3484 = AND(534, 1292, 2978) -3485 = AND(1271, 2973) -3486 = AND(1271, 2975) -3487 = AND(1271, 2977) -3488 = AND(1292, 2988) -3489 = AND(479, 1292, 2990) -3490 = AND(490, 1292, 2992) -3491 = AND(1271, 2987) -3492 = AND(1271, 2989) -3493 = AND(1271, 2991) -3502 = AND(1292, 2999) -3503 = AND(1292, 3006) -3504 = AND(457, 1280, 3016) -3505 = AND(468, 1280, 3018) -3506 = AND(422, 1280, 3020) -3507 = AND(435, 1280, 3022) -3508 = AND(1685, 3015) -3509 = AND(1685, 3017) -3510 = AND(1685, 3019) -3511 = AND(1685, 3021) -3512 = NAND(1923, 3031) -3513 = NAND(1920, 3032) -3514 = NAND(1929, 3033) -3515 = NAND(1926, 3034) -3558 = NAND(1947, 3141) -3559 = NAND(1944, 3142) -3560 = NAND(1953, 3143) -3561 = NAND(1950, 3144) -3562 = NAND(1959, 3145) -3563 = NAND(1956, 3146) -3604 = BUFF(3191) -3605 = NAND(1935, 3194) -3606 = NAND(1932, 3195) -3607 = NAND(1941, 3196) -3608 = NAND(1938, 3197) -3609 = NAND(1965, 3198) -3610 = NAND(1962, 3199) -3613 = NOT(3191) -3614 = AND(2882, 2891) -3615 = AND(1482, 2891) -3616 = AND(200, 2653, 1173) -3617 = AND(203, 2653, 1173) -3618 = AND(197, 2653, 1173) -3619 = AND(194, 2653, 1173) -3620 = AND(191, 2653, 1173) -3621 = AND(182, 2681, 1197) -3622 = AND(188, 2681, 1197) -3623 = AND(155, 2681, 1197) -3624 = AND(149, 2681, 1197) -3625 = AND(2882, 2891) -3626 = AND(1482, 2891) -3627 = AND(200, 2728, 1235) -3628 = AND(203, 2728, 1235) -3629 = AND(197, 2728, 1235) -3630 = AND(194, 2728, 1235) -3631 = AND(191, 2728, 1235) -3632 = AND(182, 2756, 1259) -3633 = AND(188, 2756, 1259) -3634 = AND(155, 2756, 1259) -3635 = AND(149, 2756, 1259) -3636 = AND(2882, 2891) -3637 = AND(1482, 2891) -3638 = AND(109, 3075, 1743) -3639 = AND(2882, 2891) -3640 = AND(1482, 2891) -3641 = AND(11, 2779, 1339) -3642 = AND(109, 3041, 1709) -3643 = AND(46, 3041, 1709) -3644 = AND(100, 3041, 1709) -3645 = AND(91, 3041, 1709) -3646 = AND(43, 3041, 1709) -3647 = AND(76, 2779, 1339) -3648 = AND(73, 2779, 1339) -3649 = AND(67, 2779, 1339) -3650 = AND(14, 2779, 1339) -3651 = AND(46, 3075, 1743) -3652 = AND(100, 3075, 1743) -3653 = AND(91, 3075, 1743) -3654 = AND(43, 3075, 1743) -3655 = AND(76, 2801, 1363) -3656 = AND(73, 2801, 1363) -3657 = AND(67, 2801, 1363) -3658 = AND(14, 2801, 1363) -3659 = AND(120, 3119, 1785) -3660 = AND(11, 2801, 1363) -3661 = AND(118, 3097, 1769) -3662 = AND(176, 2681, 1197) -3663 = AND(176, 2756, 1259) -3664 = OR(2831, 3401) -3665 = OR(2832, 3402) -3666 = OR(2833, 3403) -3667 = OR(2834, 3404) -3668 = OR(2835, 3405, 457) -3669 = OR(2836, 3406, 468) -3670 = OR(2837, 3407, 422) -3671 = OR(2838, 3408, 435) -3672 = OR(2847, 3409) -3673 = OR(2848, 3410) -3674 = OR(2849, 3411) -3675 = OR(2850, 3412) -3676 = OR(2851, 3413, 389) -3677 = OR(2852, 3414, 400) -3678 = OR(2853, 3415, 411) -3679 = OR(2854, 3416, 374) -3680 = AND(289, 2855) -3681 = AND(281, 2855) -3682 = AND(273, 2855) -3683 = AND(265, 2855) -3684 = AND(257, 2855) -3685 = AND(234, 2861) -3686 = AND(226, 2861) -3687 = AND(218, 2861) -3688 = AND(210, 2861) -3689 = AND(206, 2861) -3691 = NOT(2891) -3700 = OR(2907, 3444) -3701 = OR(2908, 3445) -3702 = OR(2909, 3446) -3703 = OR(2911, 3448, 479) -3704 = OR(2912, 3449, 490) -3705 = OR(2910, 3447) -3708 = OR(2919, 3450) -3709 = OR(2921, 3451) -3710 = OR(2922, 3452) -3711 = OR(2923, 3453, 503) -3712 = OR(2924, 3454, 523) -3713 = OR(2925, 3455, 534) -3715 = OR(2934, 3459) -3716 = OR(2935, 3460) -3717 = OR(2936, 3461) -3718 = OR(2937, 3462) -3719 = OR(2938, 3463, 389) -3720 = OR(2939, 3464, 400) -3721 = OR(2940, 3465, 411) -3722 = OR(2941, 3466, 374) -3723 = AND(369, 2942) -3724 = AND(361, 2942) -3725 = AND(351, 2942) -3726 = AND(341, 2942) -3727 = AND(324, 2948) -3728 = AND(316, 2948) -3729 = AND(308, 2948) -3730 = AND(302, 2948) -3731 = AND(293, 2948) -3732 = OR(2942, 2958) -3738 = AND(83, 2964) -3739 = AND(87, 2964) -3740 = AND(34, 2964) -3741 = AND(34, 2964) -3742 = OR(2979, 3481) -3743 = OR(2981, 3483) -3744 = OR(2982, 3484) -3745 = OR(2983, 3485, 503) -3746 = OR(2985, 3486, 523) -3747 = OR(2986, 3487, 534) -3748 = OR(2993, 3488) -3749 = OR(2994, 3489) -3750 = OR(2995, 3490) -3751 = OR(2997, 3492, 479) -3752 = OR(2998, 3493, 490) -3753 = NOT(3000) -3754 = NOT(3003) -3755 = NOT(3007) -3756 = NOT(3010) -3757 = OR(3013, 3502) -3758 = AND(1315, 446, 3003) -3759 = OR(3014, 3503) -3760 = AND(1315, 446, 3010) -3761 = AND(1675, 3000) -3762 = AND(1675, 3007) -3763 = OR(3023, 3504) -3764 = OR(3024, 3505) -3765 = OR(3025, 3506) -3766 = OR(3026, 3507) -3767 = OR(3027, 3508, 457) -3768 = OR(3028, 3509, 468) -3769 = OR(3029, 3510, 422) -3770 = OR(3030, 3511, 435) -3771 = NAND(3512, 3513) -3775 = NAND(3514, 3515) -3779 = NOT(3035) -3780 = NOT(3038) -3781 = AND(117, 3097, 1769) -3782 = AND(126, 3097, 1769) -3783 = AND(127, 3097, 1769) -3784 = AND(128, 3097, 1769) -3785 = AND(131, 3119, 1785) -3786 = AND(129, 3119, 1785) -3787 = AND(119, 3119, 1785) -3788 = AND(130, 3119, 1785) -3789 = NAND(3558, 3559) -3793 = NAND(3560, 3561) -3797 = NAND(3562, 3563) -3800 = AND(122, 3147, 1800) -3801 = AND(113, 3147, 1800) -3802 = AND(53, 3147, 1800) -3803 = AND(114, 3147, 1800) -3804 = AND(115, 3147, 1800) -3805 = AND(52, 3169, 1814) -3806 = AND(112, 3169, 1814) -3807 = AND(116, 3169, 1814) -3808 = AND(121, 3169, 1814) -3809 = AND(123, 3169, 1814) -3810 = NAND(3607, 3608) -3813 = NAND(3605, 3606) -3816 = AND(3482, 2984) -3819 = OR(2996, 3491) -3822 = NOT(3200) -3823 = NAND(3200, 3203) -3824 = NAND(3609, 3610) -3827 = NOT(3456) -3828 = OR(3739, 2970) -3829 = OR(3740, 2971) -3830 = OR(3741, 2972) -3831 = OR(3738, 2969) -3834 = NOT(3664) -3835 = NOT(3665) -3836 = NOT(3666) -3837 = NOT(3667) -3838 = NOT(3672) -3839 = NOT(3673) -3840 = NOT(3674) -3841 = NOT(3675) -3842 = OR(3681, 2868) -3849 = OR(3682, 2869) -3855 = OR(3683, 2870) -3861 = OR(3684, 2871) -3867 = OR(3685, 2872) -3873 = OR(3686, 2873) -3881 = OR(3687, 2874) -3887 = OR(3688, 2875) -3893 = OR(3689, 2876) -3908 = NOT(3701) -3909 = NOT(3702) -3911 = NOT(3700) -3914 = NOT(3708) -3915 = NOT(3709) -3916 = NOT(3710) -3917 = NOT(3715) -3918 = NOT(3716) -3919 = NOT(3717) -3920 = NOT(3718) -3921 = OR(3724, 2955) -3927 = OR(3725, 2956) -3933 = OR(3726, 2957) -3942 = OR(3727, 2959) -3948 = OR(3728, 2960) -3956 = OR(3729, 2961) -3962 = OR(3730, 2962) -3968 = OR(3731, 2963) -3975 = NOT(3742) -3976 = NOT(3743) -3977 = NOT(3744) -3978 = NOT(3749) -3979 = NOT(3750) -3980 = AND(446, 1292, 3754) -3981 = AND(446, 1292, 3756) -3982 = AND(1271, 3753) -3983 = AND(1271, 3755) -3984 = NOT(3757) -3987 = NOT(3759) -3988 = NOT(3763) -3989 = NOT(3764) -3990 = NOT(3765) -3991 = NOT(3766) -3998 = AND(3456, 3119, 3130) -4008 = OR(3723, 2954) -4011 = OR(3680, 2867) -4021 = NOT(3748) -4024 = NAND(1968, 3822) -4027 = NOT(3705) -4031 = AND(3828, 1583) -4032 = AND(24, 2882, 3691) -4033 = AND(25, 1482, 3691) -4034 = AND(26, 2882, 3691) -4035 = AND(81, 1482, 3691) -4036 = AND(3829, 1583) -4037 = AND(79, 2882, 3691) -4038 = AND(23, 1482, 3691) -4039 = AND(82, 2882, 3691) -4040 = AND(80, 1482, 3691) -4041 = AND(3830, 1583) -4042 = AND(3831, 1583) -4067 = AND(3732, 514) -4080 = AND(514, 3732) -4088 = AND(3834, 3668) -4091 = AND(3835, 3669) -4094 = AND(3836, 3670) -4097 = AND(3837, 3671) -4100 = AND(3838, 3676) -4103 = AND(3839, 3677) -4106 = AND(3840, 3678) -4109 = AND(3841, 3679) -4144 = AND(3908, 3703) -4147 = AND(3909, 3704) -4150 = BUFF(3705) -4153 = AND(3914, 3711) -4156 = AND(3915, 3712) -4159 = AND(3916, 3713) -4183 = OR(3758, 3980) -4184 = OR(3760, 3981) -4185 = OR(3761, 3982, 446) -4186 = OR(3762, 3983, 446) -4188 = NOT(3771) -4191 = NOT(3775) -4196 = AND(3775, 3771, 3035) -4197 = AND(3987, 3119, 3130) -4198 = AND(3920, 3722) -4199 = NOT(3816) -4200 = NOT(3789) -4203 = NOT(3793) -4206 = BUFF(3797) -4209 = BUFF(3797) -4212 = BUFF(3732) -4215 = BUFF(3732) -4219 = BUFF(3732) -4223 = NOT(3810) -4224 = NOT(3813) -4225 = AND(3918, 3720) -4228 = AND(3919, 3721) -4231 = AND(3991, 3770) -4234 = AND(3917, 3719) -4237 = AND(3989, 3768) -4240 = AND(3990, 3769) -4243 = AND(3988, 3767) -4246 = AND(3976, 3746) -4249 = AND(3977, 3747) -4252 = AND(3975, 3745) -4255 = AND(3978, 3751) -4258 = AND(3979, 3752) -4263 = NOT(3819) -4264 = NAND(4024, 3823) -4267 = NOT(3824) -4268 = AND(446, 3893) -4269 = NOT(3911) -4270 = NOT(3984) -4271 = AND(3893, 446) -4272 = NOT(4031) -4273 = OR(4032, 4033, 3614, 3615) -4274 = OR(4034, 4035, 3625, 3626) -4275 = NOT(4036) -4276 = OR(4037, 4038, 3636, 3637) -4277 = OR(4039, 4040, 3639, 3640) -4278 = NOT(4041) -4279 = NOT(4042) -4280 = AND(3887, 457) -4284 = AND(3881, 468) -4290 = AND(422, 3873) -4297 = AND(3867, 435) -4298 = AND(3861, 389) -4301 = AND(3855, 400) -4305 = AND(3849, 411) -4310 = AND(3842, 374) -4316 = AND(457, 3887) -4320 = AND(468, 3881) -4325 = AND(422, 3873) -4331 = AND(435, 3867) -4332 = AND(389, 3861) -4336 = AND(400, 3855) -4342 = AND(411, 3849) -4349 = AND(374, 3842) -4357 = NOT(3968) -4364 = NOT(3962) -4375 = BUFF(3962) -4379 = AND(3956, 479) -4385 = AND(490, 3948) -4392 = AND(3942, 503) -4396 = AND(3933, 523) -4400 = AND(3927, 534) -4405 = NOT(3921) -4412 = BUFF(3921) -4418 = NOT(3968) -4425 = NOT(3962) -4436 = BUFF(3962) -4440 = AND(479, 3956) -4445 = AND(490, 3948) -4451 = AND(503, 3942) -4456 = AND(523, 3933) -4462 = AND(534, 3927) -4469 = BUFF(3921) -4477 = NOT(3921) -4512 = BUFF(3968) -4515 = NOT(4183) -4516 = NOT(4184) -4521 = NOT(4008) -4523 = NOT(4011) -4524 = NOT(4198) -4532 = NOT(3984) -4547 = AND(3911, 3169, 3180) -4548 = BUFF(3893) -4551 = BUFF(3887) -4554 = BUFF(3881) -4557 = BUFF(3873) -4560 = BUFF(3867) -4563 = BUFF(3861) -4566 = BUFF(3855) -4569 = BUFF(3849) -4572 = BUFF(3842) -4575 = NOR(422, 3873) -4578 = BUFF(3893) -4581 = BUFF(3887) -4584 = BUFF(3881) -4587 = BUFF(3867) -4590 = BUFF(3861) -4593 = BUFF(3855) -4596 = BUFF(3849) -4599 = BUFF(3873) -4602 = BUFF(3842) -4605 = NOR(422, 3873) -4608 = NOR(374, 3842) -4611 = BUFF(3956) -4614 = BUFF(3948) -4617 = BUFF(3942) -4621 = BUFF(3933) -4624 = BUFF(3927) -4627 = NOR(490, 3948) -4630 = BUFF(3956) -4633 = BUFF(3942) -4637 = BUFF(3933) -4640 = BUFF(3927) -4643 = BUFF(3948) -4646 = NOR(490, 3948) -4649 = BUFF(3927) -4652 = BUFF(3933) -4655 = BUFF(3921) -4658 = BUFF(3942) -4662 = BUFF(3956) -4665 = BUFF(3948) -4668 = BUFF(3968) -4671 = BUFF(3962) -4674 = BUFF(3873) -4677 = BUFF(3867) -4680 = BUFF(3887) -4683 = BUFF(3881) -4686 = BUFF(3893) -4689 = BUFF(3849) -4692 = BUFF(3842) -4695 = BUFF(3861) -4698 = BUFF(3855) -4701 = NAND(3813, 4223) -4702 = NAND(3810, 4224) -4720 = NOT(4021) -4721 = NAND(4021, 4263) -4724 = NOT(4147) -4725 = NOT(4144) -4726 = NOT(4159) -4727 = NOT(4156) -4728 = NOT(4153) -4729 = NOT(4097) -4730 = NOT(4094) -4731 = NOT(4091) -4732 = NOT(4088) -4733 = NOT(4109) -4734 = NOT(4106) -4735 = NOT(4103) -4736 = NOT(4100) -4737 = AND(4273, 2877) -4738 = AND(4274, 2877) -4739 = AND(4276, 2877) -4740 = AND(4277, 2877) -4741 = AND(4150, 1758, 1755) -4855 = NOT(4212) -4856 = NAND(4212, 2712) -4908 = NAND(4215, 2718) -4909 = NOT(4215) -4939 = AND(4515, 4185) -4942 = AND(4516, 4186) -4947 = NOT(4219) -4953 = AND(4188, 3775, 3779) -4954 = AND(3771, 4191, 3780) -4955 = AND(4191, 4188, 3038) -4956 = AND(4109, 3097, 3108) -4957 = AND(4106, 3097, 3108) -4958 = AND(4103, 3097, 3108) -4959 = AND(4100, 3097, 3108) -4960 = AND(4159, 3119, 3130) -4961 = AND(4156, 3119, 3130) -4965 = NOT(4225) -4966 = NOT(4228) -4967 = NOT(4231) -4968 = NOT(4234) -4972 = NOT(4246) -4973 = NOT(4249) -4974 = NOT(4252) -4975 = NAND(4252, 4199) -4976 = NOT(4206) -4977 = NOT(4209) -4978 = AND(3793, 3789, 4206) -4979 = AND(4203, 4200, 4209) -4980 = AND(4097, 3147, 3158) -4981 = AND(4094, 3147, 3158) -4982 = AND(4091, 3147, 3158) -4983 = AND(4088, 3147, 3158) -4984 = AND(4153, 3169, 3180) -4985 = AND(4147, 3169, 3180) -4986 = AND(4144, 3169, 3180) -4987 = AND(4150, 3169, 3180) -5049 = NAND(4701, 4702) -5052 = NOT(4237) -5053 = NOT(4240) -5054 = NOT(4243) -5055 = NOT(4255) -5056 = NOT(4258) -5057 = NAND(3819, 4720) -5058 = NOT(4264) -5059 = NAND(4264, 4267) -5060 = AND(4724, 4725, 4269, 4027) -5061 = AND(4726, 4727, 3827, 4728) -5062 = AND(4729, 4730, 4731, 4732) -5063 = AND(4733, 4734, 4735, 4736) -5065 = AND(4357, 4375) -5066 = AND(4364, 4357, 4379) -5067 = AND(4418, 4436) -5068 = AND(4425, 4418, 4440) -5069 = NOT(4548) -5070 = NAND(4548, 2628) -5071 = NOT(4551) -5072 = NAND(4551, 2629) -5073 = NOT(4554) -5074 = NAND(4554, 2630) -5075 = NOT(4557) -5076 = NAND(4557, 2631) -5077 = NOT(4560) -5078 = NAND(4560, 2632) -5079 = NOT(4563) -5080 = NAND(4563, 2633) -5081 = NOT(4566) -5082 = NAND(4566, 2634) -5083 = NOT(4569) -5084 = NAND(4569, 2635) -5085 = NOT(4572) -5086 = NAND(4572, 2636) -5087 = NOT(4575) -5088 = NAND(4578, 2638) -5089 = NOT(4578) -5090 = NAND(4581, 2639) -5091 = NOT(4581) -5092 = NAND(4584, 2640) -5093 = NOT(4584) -5094 = NAND(4587, 2641) -5095 = NOT(4587) -5096 = NAND(4590, 2642) -5097 = NOT(4590) -5098 = NAND(4593, 2643) -5099 = NOT(4593) -5100 = NAND(4596, 2644) -5101 = NOT(4596) -5102 = NAND(4599, 2645) -5103 = NOT(4599) -5104 = NAND(4602, 2646) -5105 = NOT(4602) -5106 = NOT(4611) -5107 = NAND(4611, 2709) -5108 = NOT(4614) -5109 = NAND(4614, 2710) -5110 = NOT(4617) -5111 = NAND(4617, 2711) -5112 = NAND(1890, 4855) -5113 = NOT(4621) -5114 = NAND(4621, 2713) -5115 = NOT(4624) -5116 = NAND(4624, 2714) -5117 = AND(4364, 4379) -5118 = AND(4364, 4379) -5119 = AND(54, 4405) -5120 = NOT(4627) -5121 = NAND(4630, 2716) -5122 = NOT(4630) -5123 = NAND(4633, 2717) -5124 = NOT(4633) -5125 = NAND(1908, 4909) -5126 = NAND(4637, 2719) -5127 = NOT(4637) -5128 = NAND(4640, 2720) -5129 = NOT(4640) -5130 = NAND(4643, 2721) -5131 = NOT(4643) -5132 = AND(4425, 4440) -5133 = AND(4425, 4440) -5135 = NOT(4649) -5136 = NOT(4652) -5137 = NAND(4655, 4521) -5138 = NOT(4655) -5139 = NOT(4658) -5140 = NAND(4658, 4947) -5141 = NOT(4674) -5142 = NOT(4677) -5143 = NOT(4680) -5144 = NOT(4683) -5145 = NAND(4686, 4523) -5146 = NOT(4686) -5147 = NOR(4953, 4196) -5148 = NOR(4954, 4955) -5150 = NOT(4524) -5153 = NAND(4228, 4965) -5154 = NAND(4225, 4966) -5155 = NAND(4234, 4967) -5156 = NAND(4231, 4968) -5157 = NOT(4532) -5160 = NAND(4249, 4972) -5161 = NAND(4246, 4973) -5162 = NAND(3816, 4974) -5163 = AND(4200, 3793, 4976) -5164 = AND(3789, 4203, 4977) -5165 = AND(4942, 3147, 3158) -5166 = NOT(4512) -5169 = BUFF(4290) -5172 = NOT(4605) -5173 = BUFF(4325) -5176 = NOT(4608) -5177 = BUFF(4349) -5180 = BUFF(4405) -5183 = BUFF(4357) -5186 = BUFF(4357) -5189 = BUFF(4364) -5192 = BUFF(4364) -5195 = BUFF(4385) -5198 = NOT(4646) -5199 = BUFF(4418) -5202 = BUFF(4425) -5205 = BUFF(4445) -5208 = BUFF(4418) -5211 = BUFF(4425) -5214 = BUFF(4477) -5217 = BUFF(4469) -5220 = BUFF(4477) -5223 = NOT(4662) -5224 = NOT(4665) -5225 = NOT(4668) -5226 = NOT(4671) -5227 = NOT(4689) -5228 = NOT(4692) -5229 = NOT(4695) -5230 = NOT(4698) -5232 = NAND(4240, 5052) -5233 = NAND(4237, 5053) -5234 = NAND(4258, 5055) -5235 = NAND(4255, 5056) -5236 = NAND(4721, 5057) -5239 = NAND(3824, 5058) -5240 = AND(5060, 5061, 4270) -5241 = NOT(4939) -5242 = NAND(1824, 5069) -5243 = NAND(1827, 5071) -5244 = NAND(1830, 5073) -5245 = NAND(1833, 5075) -5246 = NAND(1836, 5077) -5247 = NAND(1839, 5079) -5248 = NAND(1842, 5081) -5249 = NAND(1845, 5083) -5250 = NAND(1848, 5085) -5252 = NAND(1854, 5089) -5253 = NAND(1857, 5091) -5254 = NAND(1860, 5093) -5255 = NAND(1863, 5095) -5256 = NAND(1866, 5097) -5257 = NAND(1869, 5099) -5258 = NAND(1872, 5101) -5259 = NAND(1875, 5103) -5260 = NAND(1878, 5105) -5261 = NAND(1881, 5106) -5262 = NAND(1884, 5108) -5263 = NAND(1887, 5110) -5264 = NAND(5112, 4856) -5274 = NAND(1893, 5113) -5275 = NAND(1896, 5115) -5282 = NAND(1902, 5122) -5283 = NAND(1905, 5124) -5284 = NAND(4908, 5125) -5298 = NAND(1911, 5127) -5299 = NAND(1914, 5129) -5300 = NAND(1917, 5131) -5303 = NAND(4652, 5135) -5304 = NAND(4649, 5136) -5305 = NAND(4008, 5138) -5306 = NAND(4219, 5139) -5307 = NAND(4677, 5141) -5308 = NAND(4674, 5142) -5309 = NAND(4683, 5143) -5310 = NAND(4680, 5144) -5311 = NAND(4011, 5146) -5312 = NOT(5049) -5315 = NAND(5153, 5154) -5319 = NAND(5155, 5156) -5324 = NAND(5160, 5161) -5328 = NAND(5162, 4975) -5331 = NOR(5163, 4978) -5332 = NOR(5164, 4979) -5346 = OR(4412, 5119) -5363 = NAND(4665, 5223) -5364 = NAND(4662, 5224) -5365 = NAND(4671, 5225) -5366 = NAND(4668, 5226) -5367 = NAND(4692, 5227) -5368 = NAND(4689, 5228) -5369 = NAND(4698, 5229) -5370 = NAND(4695, 5230) -5371 = NAND(5148, 5147) -5374 = BUFF(4939) -5377 = NAND(5232, 5233) -5382 = NAND(5234, 5235) -5385 = NAND(5239, 5059) -5388 = AND(5062, 5063, 5241) -5389 = NAND(5242, 5070) -5396 = NAND(5243, 5072) -5407 = NAND(5244, 5074) -5418 = NAND(5245, 5076) -5424 = NAND(5246, 5078) -5431 = NAND(5247, 5080) -5441 = NAND(5248, 5082) -5452 = NAND(5249, 5084) -5462 = NAND(5250, 5086) -5469 = NOT(5169) -5470 = NAND(5088, 5252) -5477 = NAND(5090, 5253) -5488 = NAND(5092, 5254) -5498 = NAND(5094, 5255) -5506 = NAND(5096, 5256) -5520 = NAND(5098, 5257) -5536 = NAND(5100, 5258) -5549 = NAND(5102, 5259) -5555 = NAND(5104, 5260) -5562 = NAND(5261, 5107) -5573 = NAND(5262, 5109) -5579 = NAND(5263, 5111) -5595 = NAND(5274, 5114) -5606 = NAND(5275, 5116) -5616 = NAND(5180, 2715) -5617 = NOT(5180) -5618 = NOT(5183) -5619 = NOT(5186) -5620 = NOT(5189) -5621 = NOT(5192) -5622 = NOT(5195) -5624 = NAND(5121, 5282) -5634 = NAND(5123, 5283) -5655 = NAND(5126, 5298) -5671 = NAND(5128, 5299) -5684 = NAND(5130, 5300) -5690 = NOT(5202) -5691 = NOT(5211) -5692 = NAND(5303, 5304) -5696 = NAND(5137, 5305) -5700 = NAND(5306, 5140) -5703 = NAND(5307, 5308) -5707 = NAND(5309, 5310) -5711 = NAND(5145, 5311) -5726 = AND(5166, 4512) -5727 = NOT(5173) -5728 = NOT(5177) -5730 = NOT(5199) -5731 = NOT(5205) -5732 = NOT(5208) -5733 = NOT(5214) -5734 = NOT(5217) -5735 = NOT(5220) -5736 = NAND(5365, 5366) -5739 = NAND(5363, 5364) -5742 = NAND(5369, 5370) -5745 = NAND(5367, 5368) -5755 = NOT(5236) -5756 = NAND(5332, 5331) -5954 = AND(5264, 4396) -5955 = NAND(1899, 5617) -5956 = NOT(5346) -6005 = AND(5284, 4456) -6006 = AND(5284, 4456) -6023 = NOT(5371) -6024 = NAND(5371, 5312) -6025 = NOT(5315) -6028 = NOT(5324) -6031 = BUFF(5319) -6034 = BUFF(5319) -6037 = BUFF(5328) -6040 = BUFF(5328) -6044 = NOT(5385) -6045 = OR(5166, 5726) -6048 = BUFF(5264) -6051 = BUFF(5284) -6054 = BUFF(5284) -6065 = NOT(5374) -6066 = NAND(5374, 5054) -6067 = NOT(5377) -6068 = NOT(5382) -6069 = NAND(5382, 5755) -6071 = AND(5470, 4316) -6072 = AND(5477, 5470, 4320) -6073 = AND(5488, 5470, 4325, 5477) -6074 = AND(5562, 4357, 4385, 4364) -6075 = AND(5389, 4280) -6076 = AND(5396, 5389, 4284) -6077 = AND(5407, 5389, 4290, 5396) -6078 = AND(5624, 4418, 4445, 4425) -6079 = NOT(5418) -6080 = AND(5396, 5418, 5407, 5389) -6083 = AND(5396, 4284) -6084 = AND(5407, 4290, 5396) -6085 = AND(5418, 5407, 5396) -6086 = AND(5396, 4284) -6087 = AND(4290, 5407, 5396) -6088 = AND(5407, 4290) -6089 = AND(5418, 5407) -6090 = AND(5407, 4290) -6091 = AND(5431, 5462, 5441, 5424, 5452) -6094 = AND(5424, 4298) -6095 = AND(5431, 5424, 4301) -6096 = AND(5441, 5424, 4305, 5431) -6097 = AND(5452, 5441, 5424, 4310, 5431) -6098 = AND(5431, 4301) -6099 = AND(5441, 4305, 5431) -6100 = AND(5452, 5441, 4310, 5431) -6101 = AND(4, 5462, 5441, 5452, 5431) -6102 = AND(4305, 5441) -6103 = AND(5452, 5441, 4310) -6104 = AND(4, 5462, 5441, 5452) -6105 = AND(5452, 4310) -6106 = AND(4, 5462, 5452) -6107 = AND(4, 5462) -6108 = AND(5549, 5488, 5477, 5470) -6111 = AND(5477, 4320) -6112 = AND(5488, 4325, 5477) -6113 = AND(5549, 5488, 5477) -6114 = AND(5477, 4320) -6115 = AND(5488, 4325, 5477) -6116 = AND(5488, 4325) -6117 = AND(5555, 5536, 5520, 5506, 5498) -6120 = AND(5498, 4332) -6121 = AND(5506, 5498, 4336) -6122 = AND(5520, 5498, 4342, 5506) -6123 = AND(5536, 5520, 5498, 4349, 5506) -6124 = AND(5506, 4336) -6125 = AND(5520, 4342, 5506) -6126 = AND(5536, 5520, 4349, 5506) -6127 = AND(5555, 5520, 5506, 5536) -6128 = AND(5506, 4336) -6129 = AND(5520, 4342, 5506) -6130 = AND(5536, 5520, 4349, 5506) -6131 = AND(5520, 4342) -6132 = AND(5536, 5520, 4349) -6133 = AND(5555, 5520, 5536) -6134 = AND(5520, 4342) -6135 = AND(5536, 5520, 4349) -6136 = AND(5536, 4349) -6137 = AND(5549, 5488) -6138 = AND(5555, 5536) -6139 = NOT(5573) -6140 = AND(4364, 5573, 5562, 4357) -6143 = AND(5562, 4385, 4364) -6144 = AND(5573, 5562, 4364) -6145 = AND(4385, 5562, 4364) -6146 = AND(5562, 4385) -6147 = AND(5573, 5562) -6148 = AND(5562, 4385) -6149 = AND(5264, 4405, 5595, 5579, 5606) -6152 = AND(5579, 4067) -6153 = AND(5264, 5579, 4396) -6154 = AND(5595, 5579, 4400, 5264) -6155 = AND(5606, 5595, 5579, 4412, 5264) -6156 = AND(5595, 4400, 5264) -6157 = AND(5606, 5595, 4412, 5264) -6158 = AND(54, 4405, 5595, 5606, 5264) -6159 = AND(4400, 5595) -6160 = AND(5606, 5595, 4412) -6161 = AND(54, 4405, 5595, 5606) -6162 = AND(5606, 4412) -6163 = AND(54, 4405, 5606) -6164 = NAND(5616, 5955) -6168 = AND(5684, 5624, 4425, 4418) -6171 = AND(5624, 4445, 4425) -6172 = AND(5684, 5624, 4425) -6173 = AND(5624, 4445, 4425) -6174 = AND(5624, 4445) -6175 = AND(4477, 5671, 5655, 5284, 5634) -6178 = AND(5634, 4080) -6179 = AND(5284, 5634, 4456) -6180 = AND(5655, 5634, 4462, 5284) -6181 = AND(5671, 5655, 5634, 4469, 5284) -6182 = AND(5655, 4462, 5284) -6183 = AND(5671, 5655, 4469, 5284) -6184 = AND(4477, 5655, 5284, 5671) -6185 = AND(5655, 4462, 5284) -6186 = AND(5671, 5655, 4469, 5284) -6187 = AND(5655, 4462) -6188 = AND(5671, 5655, 4469) -6189 = AND(4477, 5655, 5671) -6190 = AND(5655, 4462) -6191 = AND(5671, 5655, 4469) -6192 = AND(5671, 4469) -6193 = AND(5684, 5624) -6194 = AND(4477, 5671) -6197 = NOT(5692) -6200 = NOT(5696) -6203 = NOT(5703) -6206 = NOT(5707) -6209 = BUFF(5700) -6212 = BUFF(5700) -6215 = BUFF(5711) -6218 = BUFF(5711) -6221 = NAND(5049, 6023) -6234 = NOT(5756) -6235 = NAND(5756, 6044) -6238 = BUFF(5462) -6241 = BUFF(5389) -6244 = BUFF(5389) -6247 = BUFF(5396) -6250 = BUFF(5396) -6253 = BUFF(5407) -6256 = BUFF(5407) -6259 = BUFF(5424) -6262 = BUFF(5431) -6265 = BUFF(5441) -6268 = BUFF(5452) -6271 = BUFF(5549) -6274 = BUFF(5488) -6277 = BUFF(5470) -6280 = BUFF(5477) -6283 = BUFF(5549) -6286 = BUFF(5488) -6289 = BUFF(5470) -6292 = BUFF(5477) -6295 = BUFF(5555) -6298 = BUFF(5536) -6301 = BUFF(5498) -6304 = BUFF(5520) -6307 = BUFF(5506) -6310 = BUFF(5506) -6313 = BUFF(5555) -6316 = BUFF(5536) -6319 = BUFF(5498) -6322 = BUFF(5520) -6325 = BUFF(5562) -6328 = BUFF(5562) -6331 = BUFF(5579) -6335 = BUFF(5595) -6338 = BUFF(5606) -6341 = BUFF(5684) -6344 = BUFF(5624) -6347 = BUFF(5684) -6350 = BUFF(5624) -6353 = BUFF(5671) -6356 = BUFF(5634) -6359 = BUFF(5655) -6364 = BUFF(5671) -6367 = BUFF(5634) -6370 = BUFF(5655) -6373 = NOT(5736) -6374 = NOT(5739) -6375 = NOT(5742) -6376 = NOT(5745) -6377 = NAND(4243, 6065) -6378 = NAND(5236, 6068) -6382 = OR(4268, 6071, 6072, 6073) -6386 = OR(3968, 5065, 5066, 6074) -6388 = OR(4271, 6075, 6076, 6077) -6392 = OR(3968, 5067, 5068, 6078) -6397 = OR(4297, 6094, 6095, 6096, 6097) -6411 = OR(4320, 6116) -6415 = OR(4331, 6120, 6121, 6122, 6123) -6419 = OR(4342, 6136) -6427 = OR(4392, 6152, 6153, 6154, 6155) -6434 = NOT(6048) -6437 = OR(4440, 6174) -6441 = OR(4451, 6178, 6179, 6180, 6181) -6445 = OR(4462, 6192) -6448 = NOT(6051) -6449 = NOT(6054) -6466 = NAND(6221, 6024) -6469 = NOT(6031) -6470 = NOT(6034) -6471 = NOT(6037) -6472 = NOT(6040) -6473 = AND(5315, 4524, 6031) -6474 = AND(6025, 5150, 6034) -6475 = AND(5324, 4532, 6037) -6476 = AND(6028, 5157, 6040) -6477 = NAND(5385, 6234) -6478 = NAND(6045, 132) -6482 = OR(4280, 6083, 6084, 6085) -6486 = NOR(4280, 6086, 6087) -6490 = OR(4284, 6088, 6089) -6494 = NOR(4284, 6090) -6500 = OR(4298, 6098, 6099, 6100, 6101) -6504 = OR(4301, 6102, 6103, 6104) -6508 = OR(4305, 6105, 6106) -6512 = OR(4310, 6107) -6516 = OR(4316, 6111, 6112, 6113) -6526 = NOR(4316, 6114, 6115) -6536 = OR(4336, 6131, 6132, 6133) -6539 = OR(4332, 6124, 6125, 6126, 6127) -6553 = NOR(4336, 6134, 6135) -6556 = NOR(4332, 6128, 6129, 6130) -6566 = OR(4375, 5117, 6143, 6144) -6569 = NOR(4375, 5118, 6145) -6572 = OR(4379, 6146, 6147) -6575 = NOR(4379, 6148) -6580 = OR(4067, 5954, 6156, 6157, 6158) -6584 = OR(4396, 6159, 6160, 6161) -6587 = OR(4400, 6162, 6163) -6592 = OR(4436, 5132, 6171, 6172) -6599 = NOR(4436, 5133, 6173) -6606 = OR(4456, 6187, 6188, 6189) -6609 = OR(4080, 6005, 6182, 6183, 6184) -6619 = NOR(4456, 6190, 6191) -6622 = NOR(4080, 6006, 6185, 6186) -6630 = NAND(5739, 6373) -6631 = NAND(5736, 6374) -6632 = NAND(5745, 6375) -6633 = NAND(5742, 6376) -6634 = NAND(6377, 6066) -6637 = NAND(6069, 6378) -6640 = NOT(6164) -6641 = AND(6108, 6117) -6643 = AND(6140, 6149) -6646 = AND(6168, 6175) -6648 = AND(6080, 6091) -6650 = NAND(6238, 2637) -6651 = NOT(6238) -6653 = NOT(6241) -6655 = NOT(6244) -6657 = NOT(6247) -6659 = NOT(6250) -6660 = NAND(6253, 5087) -6661 = NOT(6253) -6662 = NAND(6256, 5469) -6663 = NOT(6256) -6664 = AND(6091, 4) -6666 = NOT(6259) -6668 = NOT(6262) -6670 = NOT(6265) -6672 = NOT(6268) -6675 = NOT(6117) -6680 = NOT(6280) -6681 = NOT(6292) -6682 = NOT(6307) -6683 = NOT(6310) -6689 = NAND(6325, 5120) -6690 = NOT(6325) -6691 = NAND(6328, 5622) -6692 = NOT(6328) -6693 = AND(6149, 54) -6695 = NOT(6331) -6698 = NOT(6335) -6699 = NAND(6338, 5956) -6700 = NOT(6338) -6703 = NOT(6175) -6708 = NOT(6209) -6709 = NOT(6212) -6710 = NOT(6215) -6711 = NOT(6218) -6712 = AND(5696, 5692, 6209) -6713 = AND(6200, 6197, 6212) -6714 = AND(5707, 5703, 6215) -6715 = AND(6206, 6203, 6218) -6716 = BUFF(6466) -6718 = AND(6164, 1777, 3130) -6719 = AND(5150, 5315, 6469) -6720 = AND(4524, 6025, 6470) -6721 = AND(5157, 5324, 6471) -6722 = AND(4532, 6028, 6472) -6724 = NAND(6477, 6235) -6739 = NOT(6271) -6740 = NOT(6274) -6741 = NOT(6277) -6744 = NOT(6283) -6745 = NOT(6286) -6746 = NOT(6289) -6751 = NOT(6295) -6752 = NOT(6298) -6753 = NOT(6301) -6754 = NOT(6304) -6755 = NOT(6322) -6760 = NOT(6313) -6761 = NOT(6316) -6762 = NOT(6319) -6772 = NOT(6341) -6773 = NOT(6344) -6776 = NOT(6347) -6777 = NOT(6350) -6782 = NOT(6353) -6783 = NOT(6356) -6784 = NOT(6359) -6785 = NOT(6370) -6790 = NOT(6364) -6791 = NOT(6367) -6792 = NAND(6630, 6631) -6795 = NAND(6632, 6633) -6801 = AND(6108, 6415) -6802 = AND(6427, 6140) -6803 = AND(6397, 6080) -6804 = AND(6168, 6441) -6805 = NOT(6466) -6806 = NAND(1851, 6651) -6807 = NOT(6482) -6808 = NAND(6482, 6653) -6809 = NOT(6486) -6810 = NAND(6486, 6655) -6811 = NOT(6490) -6812 = NAND(6490, 6657) -6813 = NOT(6494) -6814 = NAND(6494, 6659) -6815 = NAND(4575, 6661) -6816 = NAND(5169, 6663) -6817 = OR(6397, 6664) -6823 = NOT(6500) -6824 = NAND(6500, 6666) -6825 = NOT(6504) -6826 = NAND(6504, 6668) -6827 = NOT(6508) -6828 = NAND(6508, 6670) -6829 = NOT(6512) -6830 = NAND(6512, 6672) -6831 = NOT(6415) -6834 = NOT(6566) -6835 = NAND(6566, 5618) -6836 = NOT(6569) -6837 = NAND(6569, 5619) -6838 = NOT(6572) -6839 = NAND(6572, 5620) -6840 = NOT(6575) -6841 = NAND(6575, 5621) -6842 = NAND(4627, 6690) -6843 = NAND(5195, 6692) -6844 = OR(6427, 6693) -6850 = NOT(6580) -6851 = NAND(6580, 6695) -6852 = NOT(6584) -6853 = NAND(6584, 6434) -6854 = NOT(6587) -6855 = NAND(6587, 6698) -6856 = NAND(5346, 6700) -6857 = NOT(6441) -6860 = AND(6197, 5696, 6708) -6861 = AND(5692, 6200, 6709) -6862 = AND(6203, 5707, 6710) -6863 = AND(5703, 6206, 6711) -6866 = OR(4197, 6718, 3785) -6872 = NOR(6719, 6473) -6873 = NOR(6720, 6474) -6874 = NOR(6721, 6475) -6875 = NOR(6722, 6476) -6876 = NOT(6637) -6877 = BUFF(6724) -6879 = AND(6045, 6478) -6880 = AND(6478, 132) -6881 = OR(6411, 6137) -6884 = NOT(6516) -6885 = NOT(6411) -6888 = NOT(6526) -6889 = NOT(6536) -6890 = NAND(6536, 5176) -6891 = OR(6419, 6138) -6894 = NOT(6539) -6895 = NOT(6553) -6896 = NAND(6553, 5728) -6897 = NOT(6419) -6900 = NOT(6556) -6901 = OR(6437, 6193) -6904 = NOT(6592) -6905 = NOT(6437) -6908 = NOT(6599) -6909 = OR(6445, 6194) -6912 = NOT(6606) -6913 = NOT(6609) -6914 = NOT(6619) -6915 = NAND(6619, 5734) -6916 = NOT(6445) -6919 = NOT(6622) -6922 = NOT(6634) -6923 = NAND(6634, 6067) -6924 = OR(6382, 6801) -6925 = OR(6386, 6802) -6926 = OR(6388, 6803) -6927 = OR(6392, 6804) -6930 = NOT(6724) -6932 = NAND(6650, 6806) -6935 = NAND(6241, 6807) -6936 = NAND(6244, 6809) -6937 = NAND(6247, 6811) -6938 = NAND(6250, 6813) -6939 = NAND(6660, 6815) -6940 = NAND(6662, 6816) -6946 = NAND(6259, 6823) -6947 = NAND(6262, 6825) -6948 = NAND(6265, 6827) -6949 = NAND(6268, 6829) -6953 = NAND(5183, 6834) -6954 = NAND(5186, 6836) -6955 = NAND(5189, 6838) -6956 = NAND(5192, 6840) -6957 = NAND(6689, 6842) -6958 = NAND(6691, 6843) -6964 = NAND(6331, 6850) -6965 = NAND(6048, 6852) -6966 = NAND(6335, 6854) -6967 = NAND(6699, 6856) -6973 = NOR(6860, 6712) -6974 = NOR(6861, 6713) -6975 = NOR(6862, 6714) -6976 = NOR(6863, 6715) -6977 = NOT(6792) -6978 = NOT(6795) -6979 = OR(6879, 6880) -6987 = NAND(4608, 6889) -6990 = NAND(5177, 6895) -6999 = NAND(5217, 6914) -7002 = NAND(5377, 6922) -7003 = NAND(6873, 6872) -7006 = NAND(6875, 6874) -7011 = AND(6866, 2681, 2692) -7012 = AND(6866, 2756, 2767) -7013 = AND(6866, 2779, 2790) -7015 = NOT(6866) -7016 = AND(6866, 2801, 2812) -7018 = NAND(6935, 6808) -7019 = NAND(6936, 6810) -7020 = NAND(6937, 6812) -7021 = NAND(6938, 6814) -7022 = NOT(6939) -7023 = NOT(6817) -7028 = NAND(6946, 6824) -7031 = NAND(6947, 6826) -7034 = NAND(6948, 6828) -7037 = NAND(6949, 6830) -7040 = AND(6817, 6079) -7041 = AND(6831, 6675) -7044 = NAND(6953, 6835) -7045 = NAND(6954, 6837) -7046 = NAND(6955, 6839) -7047 = NAND(6956, 6841) -7048 = NOT(6957) -7049 = NOT(6844) -7054 = NAND(6964, 6851) -7057 = NAND(6965, 6853) -7060 = NAND(6966, 6855) -7064 = AND(6844, 6139) -7065 = AND(6857, 6703) -7072 = NOT(6881) -7073 = NAND(6881, 5172) -7074 = NOT(6885) -7075 = NAND(6885, 5727) -7076 = NAND(6890, 6987) -7079 = NOT(6891) -7080 = NAND(6896, 6990) -7083 = NOT(6897) -7084 = NOT(6901) -7085 = NAND(6901, 5198) -7086 = NOT(6905) -7087 = NAND(6905, 5731) -7088 = NOT(6909) -7089 = NAND(6909, 6912) -7090 = NAND(6915, 6999) -7093 = NOT(6916) -7094 = NAND(6974, 6973) -7097 = NAND(6976, 6975) -7101 = NAND(7002, 6923) -7105 = NOT(6932) -7110 = NOT(6967) -7114 = AND(6979, 603, 1755) -7115 = NOT(7019) -7116 = NOT(7021) -7125 = AND(6817, 7018) -7126 = AND(6817, 7020) -7127 = AND(6817, 7022) -7130 = NOT(7045) -7131 = NOT(7047) -7139 = AND(6844, 7044) -7140 = AND(6844, 7046) -7141 = AND(6844, 7048) -7146 = AND(6932, 1761, 3108) -7147 = AND(6967, 1777, 3130) -7149 = NOT(7003) -7150 = NOT(7006) -7151 = NAND(7006, 6876) -7152 = NAND(4605, 7072) -7153 = NAND(5173, 7074) -7158 = NAND(4646, 7084) -7159 = NAND(5205, 7086) -7160 = NAND(6606, 7088) -7166 = NOT(7037) -7167 = NOT(7034) -7168 = NOT(7031) -7169 = NOT(7028) -7170 = NOT(7060) -7171 = NOT(7057) -7172 = NOT(7054) -7173 = AND(7115, 7023) -7174 = AND(7116, 7023) -7175 = AND(6940, 7023) -7176 = AND(5418, 7023) -7177 = NOT(7041) -7178 = AND(7130, 7049) -7179 = AND(7131, 7049) -7180 = AND(6958, 7049) -7181 = AND(5573, 7049) -7182 = NOT(7065) -7183 = NOT(7094) -7184 = NAND(7094, 6977) -7185 = NOT(7097) -7186 = NAND(7097, 6978) -7187 = AND(7037, 1761, 3108) -7188 = AND(7034, 1761, 3108) -7189 = AND(7031, 1761, 3108) -7190 = OR(4956, 7146, 3781) -7196 = AND(7060, 1777, 3130) -7197 = AND(7057, 1777, 3130) -7198 = OR(4960, 7147, 3786) -7204 = NAND(7101, 7149) -7205 = NOT(7101) -7206 = NAND(6637, 7150) -7207 = AND(7028, 1793, 3158) -7208 = AND(7054, 1807, 3180) -7209 = NAND(7073, 7152) -7212 = NAND(7075, 7153) -7215 = NOT(7076) -7216 = NAND(7076, 7079) -7217 = NOT(7080) -7218 = NAND(7080, 7083) -7219 = NAND(7085, 7158) -7222 = NAND(7087, 7159) -7225 = NAND(7089, 7160) -7228 = NOT(7090) -7229 = NAND(7090, 7093) -7236 = OR(7173, 7125) -7239 = OR(7174, 7126) -7242 = OR(7175, 7127) -7245 = OR(7176, 7040) -7250 = OR(7178, 7139) -7257 = OR(7179, 7140) -7260 = OR(7180, 7141) -7263 = OR(7181, 7064) -7268 = NAND(6792, 7183) -7269 = NAND(6795, 7185) -7270 = OR(4957, 7187, 3782) -7276 = OR(4958, 7188, 3783) -7282 = OR(4959, 7189, 3784) -7288 = OR(4961, 7196, 3787) -7294 = OR(3998, 7197, 3788) -7300 = NAND(7003, 7205) -7301 = NAND(7206, 7151) -7304 = OR(4980, 7207, 3800) -7310 = OR(4984, 7208, 3805) -7320 = NAND(6891, 7215) -7321 = NAND(6897, 7217) -7328 = NAND(6916, 7228) -7338 = AND(7190, 1185, 2692) -7339 = AND(7198, 2681, 2692) -7340 = AND(7190, 1247, 2767) -7341 = AND(7198, 2756, 2767) -7342 = AND(7190, 1327, 2790) -7349 = AND(7198, 2779, 2790) -7357 = AND(7198, 2801, 2812) -7363 = NOT(7198) -7364 = AND(7190, 1351, 2812) -7365 = NOT(7190) -7394 = NAND(7268, 7184) -7397 = NAND(7269, 7186) -7402 = NAND(7204, 7300) -7405 = NOT(7209) -7406 = NAND(7209, 6884) -7407 = NOT(7212) -7408 = NAND(7212, 6888) -7409 = NAND(7320, 7216) -7412 = NAND(7321, 7218) -7415 = NOT(7219) -7416 = NAND(7219, 6904) -7417 = NOT(7222) -7418 = NAND(7222, 6908) -7419 = NOT(7225) -7420 = NAND(7225, 6913) -7421 = NAND(7328, 7229) -7424 = NOT(7245) -7425 = NOT(7242) -7426 = NOT(7239) -7427 = NOT(7236) -7428 = NOT(7263) -7429 = NOT(7260) -7430 = NOT(7257) -7431 = NOT(7250) -7432 = NOT(7250) -7433 = AND(7310, 2653, 2664) -7434 = AND(7304, 1161, 2664) -7435 = OR(7011, 7338, 3621, 2591) -7436 = AND(7270, 1185, 2692) -7437 = AND(7288, 2681, 2692) -7438 = AND(7276, 1185, 2692) -7439 = AND(7294, 2681, 2692) -7440 = AND(7282, 1185, 2692) -7441 = AND(7310, 2728, 2739) -7442 = AND(7304, 1223, 2739) -7443 = OR(7012, 7340, 3632, 2600) -7444 = AND(7270, 1247, 2767) -7445 = AND(7288, 2756, 2767) -7446 = AND(7276, 1247, 2767) -7447 = AND(7294, 2756, 2767) -7448 = AND(7282, 1247, 2767) -7449 = OR(7013, 7342, 3641, 2605) -7450 = AND(7310, 3041, 3052) -7451 = AND(7304, 1697, 3052) -7452 = AND(7294, 2779, 2790) -7453 = AND(7282, 1327, 2790) -7454 = AND(7288, 2779, 2790) -7455 = AND(7276, 1327, 2790) -7456 = AND(7270, 1327, 2790) -7457 = AND(7310, 3075, 3086) -7458 = AND(7304, 1731, 3086) -7459 = AND(7294, 2801, 2812) -7460 = AND(7282, 1351, 2812) -7461 = AND(7288, 2801, 2812) -7462 = AND(7276, 1351, 2812) -7463 = AND(7270, 1351, 2812) -7464 = AND(7250, 603, 599) -7465 = NOT(7310) -7466 = NOT(7294) -7467 = NOT(7288) -7468 = NOT(7301) -7469 = OR(7016, 7364, 3660, 2626) -7470 = NOT(7304) -7471 = NOT(7282) -7472 = NOT(7276) -7473 = NOT(7270) -7474 = BUFF(7394) -7476 = BUFF(7397) -7479 = AND(7301, 3068) -7481 = AND(7245, 1793, 3158) -7482 = AND(7242, 1793, 3158) -7483 = AND(7239, 1793, 3158) -7484 = AND(7236, 1793, 3158) -7485 = AND(7263, 1807, 3180) -7486 = AND(7260, 1807, 3180) -7487 = AND(7257, 1807, 3180) -7488 = AND(7250, 1807, 3180) -7489 = NAND(6979, 7250) -7492 = NAND(6516, 7405) -7493 = NAND(6526, 7407) -7498 = NAND(6592, 7415) -7499 = NAND(6599, 7417) -7500 = NAND(6609, 7419) -7503 = AND(7105, 7166, 7167, 7168, 7169, 7424, 7425, 7426, 7427) -7504 = AND(6640, 7110, 7170, 7171, 7172, 7428, 7429, 7430, 7431) -7505 = OR(7433, 7434, 3616, 2585) -7506 = AND(7435, 2675) -7507 = OR(7339, 7436, 3622, 2592) -7508 = OR(7437, 7438, 3623, 2593) -7509 = OR(7439, 7440, 3624, 2594) -7510 = OR(7441, 7442, 3627, 2595) -7511 = AND(7443, 2750) -7512 = OR(7341, 7444, 3633, 2601) -7513 = OR(7445, 7446, 3634, 2602) -7514 = OR(7447, 7448, 3635, 2603) -7515 = OR(7450, 7451, 3646, 2610) -7516 = OR(7452, 7453, 3647, 2611) -7517 = OR(7454, 7455, 3648, 2612) -7518 = OR(7349, 7456, 3649, 2613) -7519 = OR(7457, 7458, 3654, 2618) -7520 = OR(7459, 7460, 3655, 2619) -7521 = OR(7461, 7462, 3656, 2620) -7522 = OR(7357, 7463, 3657, 2621) -7525 = OR(4741, 7114, 2624, 7464) -7526 = AND(7468, 3119, 3130) -7527 = NOT(7394) -7528 = NOT(7397) -7529 = NOT(7402) -7530 = AND(7402, 3068) -7531 = OR(4981, 7481, 3801) -7537 = OR(4982, 7482, 3802) -7543 = OR(4983, 7483, 3803) -7549 = OR(5165, 7484, 3804) -7555 = OR(4985, 7485, 3806) -7561 = OR(4986, 7486, 3807) -7567 = OR(4547, 7487, 3808) -7573 = OR(4987, 7488, 3809) -7579 = NAND(7492, 7406) -7582 = NAND(7493, 7408) -7585 = NOT(7409) -7586 = NAND(7409, 6894) -7587 = NOT(7412) -7588 = NAND(7412, 6900) -7589 = NAND(7498, 7416) -7592 = NAND(7499, 7418) -7595 = NAND(7500, 7420) -7598 = NOT(7421) -7599 = NAND(7421, 6919) -7600 = AND(7505, 2647) -7601 = AND(7507, 2675) -7602 = AND(7508, 2675) -7603 = AND(7509, 2675) -7604 = AND(7510, 2722) -7605 = AND(7512, 2750) -7606 = AND(7513, 2750) -7607 = AND(7514, 2750) -7624 = AND(6979, 7489) -7625 = AND(7489, 7250) -7626 = AND(1149, 7525) -7631 = AND(562, 7527, 7528, 6805, 6930) -7636 = AND(7529, 3097, 3108) -7657 = NAND(6539, 7585) -7658 = NAND(6556, 7587) -7665 = NAND(6622, 7598) -7666 = AND(7555, 2653, 2664) -7667 = AND(7531, 1161, 2664) -7668 = AND(7561, 2653, 2664) -7669 = AND(7537, 1161, 2664) -7670 = AND(7567, 2653, 2664) -7671 = AND(7543, 1161, 2664) -7672 = AND(7573, 2653, 2664) -7673 = AND(7549, 1161, 2664) -7674 = AND(7555, 2728, 2739) -7675 = AND(7531, 1223, 2739) -7676 = AND(7561, 2728, 2739) -7677 = AND(7537, 1223, 2739) -7678 = AND(7567, 2728, 2739) -7679 = AND(7543, 1223, 2739) -7680 = AND(7573, 2728, 2739) -7681 = AND(7549, 1223, 2739) -7682 = AND(7573, 3075, 3086) -7683 = AND(7549, 1731, 3086) -7684 = AND(7573, 3041, 3052) -7685 = AND(7549, 1697, 3052) -7686 = AND(7567, 3041, 3052) -7687 = AND(7543, 1697, 3052) -7688 = AND(7561, 3041, 3052) -7689 = AND(7537, 1697, 3052) -7690 = AND(7555, 3041, 3052) -7691 = AND(7531, 1697, 3052) -7692 = AND(7567, 3075, 3086) -7693 = AND(7543, 1731, 3086) -7694 = AND(7561, 3075, 3086) -7695 = AND(7537, 1731, 3086) -7696 = AND(7555, 3075, 3086) -7697 = AND(7531, 1731, 3086) -7698 = OR(7624, 7625) -7699 = NOT(7573) -7700 = NOT(7567) -7701 = NOT(7561) -7702 = NOT(7555) -7703 = AND(1156, 7631, 245) -7704 = NOT(7549) -7705 = NOT(7543) -7706 = NOT(7537) -7707 = NOT(7531) -7708 = NOT(7579) -7709 = NAND(7579, 6739) -7710 = NOT(7582) -7711 = NAND(7582, 6744) -7712 = NAND(7657, 7586) -7715 = NAND(7658, 7588) -7718 = NOT(7589) -7719 = NAND(7589, 6772) -7720 = NOT(7592) -7721 = NAND(7592, 6776) -7722 = NOT(7595) -7723 = NAND(7595, 5733) -7724 = NAND(7665, 7599) -7727 = OR(7666, 7667, 3617, 2586) -7728 = OR(7668, 7669, 3618, 2587) -7729 = OR(7670, 7671, 3619, 2588) -7730 = OR(7672, 7673, 3620, 2589) -7731 = OR(7674, 7675, 3628, 2596) -7732 = OR(7676, 7677, 3629, 2597) -7733 = OR(7678, 7679, 3630, 2598) -7734 = OR(7680, 7681, 3631, 2599) -7735 = OR(7682, 7683, 3638, 2604) -7736 = OR(7684, 7685, 3642, 2606) -7737 = OR(7686, 7687, 3643, 2607) -7738 = OR(7688, 7689, 3644, 2608) -7739 = OR(7690, 7691, 3645, 2609) -7740 = OR(7692, 7693, 3651, 2615) -7741 = OR(7694, 7695, 3652, 2616) -7742 = OR(7696, 7697, 3653, 2617) -7743 = NAND(6271, 7708) -7744 = NAND(6283, 7710) -7749 = NAND(6341, 7718) -7750 = NAND(6347, 7720) -7751 = NAND(5214, 7722) -7754 = AND(7727, 2647) -7755 = AND(7728, 2647) -7756 = AND(7729, 2647) -7757 = AND(7730, 2647) -7758 = AND(7731, 2722) -7759 = AND(7732, 2722) -7760 = AND(7733, 2722) -7761 = AND(7734, 2722) -7762 = NAND(7743, 7709) -7765 = NAND(7744, 7711) -7768 = NOT(7712) -7769 = NAND(7712, 6751) -7770 = NOT(7715) -7771 = NAND(7715, 6760) -7772 = NAND(7749, 7719) -7775 = NAND(7750, 7721) -7778 = NAND(7751, 7723) -7781 = NOT(7724) -7782 = NAND(7724, 5735) -7787 = NAND(6295, 7768) -7788 = NAND(6313, 7770) -7795 = NAND(5220, 7781) -7796 = NOT(7762) -7797 = NAND(7762, 6740) -7798 = NOT(7765) -7799 = NAND(7765, 6745) -7800 = NAND(7787, 7769) -7803 = NAND(7788, 7771) -7806 = NOT(7772) -7807 = NAND(7772, 6773) -7808 = NOT(7775) -7809 = NAND(7775, 6777) -7810 = NOT(7778) -7811 = NAND(7778, 6782) -7812 = NAND(7795, 7782) -7815 = NAND(6274, 7796) -7816 = NAND(6286, 7798) -7821 = NAND(6344, 7806) -7822 = NAND(6350, 7808) -7823 = NAND(6353, 7810) -7826 = NAND(7815, 7797) -7829 = NAND(7816, 7799) -7832 = NOT(7800) -7833 = NAND(7800, 6752) -7834 = NOT(7803) -7835 = NAND(7803, 6761) -7836 = NAND(7821, 7807) -7839 = NAND(7822, 7809) -7842 = NAND(7823, 7811) -7845 = NOT(7812) -7846 = NAND(7812, 6790) -7851 = NAND(6298, 7832) -7852 = NAND(6316, 7834) -7859 = NAND(6364, 7845) -7860 = NOT(7826) -7861 = NAND(7826, 6741) -7862 = NOT(7829) -7863 = NAND(7829, 6746) -7864 = NAND(7851, 7833) -7867 = NAND(7852, 7835) -7870 = NOT(7836) -7871 = NAND(7836, 5730) -7872 = NOT(7839) -7873 = NAND(7839, 5732) -7874 = NOT(7842) -7875 = NAND(7842, 6783) -7876 = NAND(7859, 7846) -7879 = NAND(6277, 7860) -7880 = NAND(6289, 7862) -7885 = NAND(5199, 7870) -7886 = NAND(5208, 7872) -7887 = NAND(6356, 7874) -7890 = NAND(7879, 7861) -7893 = NAND(7880, 7863) -7896 = NOT(7864) -7897 = NAND(7864, 6753) -7898 = NOT(7867) -7899 = NAND(7867, 6762) -7900 = NAND(7885, 7871) -7903 = NAND(7886, 7873) -7906 = NAND(7887, 7875) -7909 = NOT(7876) -7910 = NAND(7876, 6791) -7917 = NAND(6301, 7896) -7918 = NAND(6319, 7898) -7923 = NAND(6367, 7909) -7924 = NOT(7890) -7925 = NAND(7890, 6680) -7926 = NOT(7893) -7927 = NAND(7893, 6681) -7928 = NOT(7900) -7929 = NAND(7900, 5690) -7930 = NOT(7903) -7931 = NAND(7903, 5691) -7932 = NAND(7917, 7897) -7935 = NAND(7918, 7899) -7938 = NOT(7906) -7939 = NAND(7906, 6784) -7940 = NAND(7923, 7910) -7943 = NAND(6280, 7924) -7944 = NAND(6292, 7926) -7945 = NAND(5202, 7928) -7946 = NAND(5211, 7930) -7951 = NAND(6359, 7938) -7954 = NAND(7943, 7925) -7957 = NAND(7944, 7927) -7960 = NAND(7945, 7929) -7963 = NAND(7946, 7931) -7966 = NOT(7932) -7967 = NAND(7932, 6754) -7968 = NOT(7935) -7969 = NAND(7935, 6755) -7970 = NAND(7951, 7939) -7973 = NOT(7940) -7974 = NAND(7940, 6785) -7984 = NAND(6304, 7966) -7985 = NAND(6322, 7968) -7987 = NAND(6370, 7973) -7988 = AND(7957, 6831, 1157) -7989 = AND(7954, 6415, 1157) -7990 = AND(7957, 7041, 566) -7991 = AND(7954, 7177, 566) -7992 = NOT(7970) -7993 = NAND(7970, 6448) -7994 = AND(7963, 6857, 1219) -7995 = AND(7960, 6441, 1219) -7996 = AND(7963, 7065, 583) -7997 = AND(7960, 7182, 583) -7998 = NAND(7984, 7967) -8001 = NAND(7985, 7969) -8004 = NAND(7987, 7974) -8009 = NAND(6051, 7992) -8013 = OR(7988, 7989, 7990, 7991) -8017 = OR(7994, 7995, 7996, 7997) -8020 = NOT(7998) -8021 = NAND(7998, 6682) -8022 = NOT(8001) -8023 = NAND(8001, 6683) -8025 = NAND(8009, 7993) -8026 = NOT(8004) -8027 = NAND(8004, 6449) -8031 = NAND(6307, 8020) -8032 = NAND(6310, 8022) -8033 = NOT(8013) -8034 = NAND(6054, 8026) -8035 = AND(583, 8025) -8036 = NOT(8017) -8037 = NAND(8031, 8021) -8038 = NAND(8032, 8023) -8039 = NAND(8034, 8027) -8040 = NOT(8038) -8041 = AND(566, 8037) -8042 = NOT(8039) -8043 = AND(8040, 1157) -8044 = AND(8042, 1219) -8045 = OR(8043, 8041) -8048 = OR(8044, 8035) -8055 = NAND(8045, 8033) -8056 = NOT(8045) -8057 = NAND(8048, 8036) -8058 = NOT(8048) -8059 = NAND(8013, 8056) -8060 = NAND(8017, 8058) -8061 = NAND(8055, 8059) -8064 = NAND(8057, 8060) -8071 = AND(8064, 1777, 3130) -8072 = AND(8061, 1761, 3108) -8073 = NOT(8061) -8074 = NOT(8064) -8075 = OR(7526, 8071, 3659, 2625) -8076 = OR(7636, 8072, 3661, 2627) -8077 = AND(8073, 1727) -8078 = AND(8074, 1727) -8079 = OR(7530, 8077) -8082 = OR(7479, 8078) -8089 = AND(8079, 3063) -8090 = AND(8082, 3063) -8091 = AND(8079, 3063) -8092 = AND(8082, 3063) -8093 = OR(8089, 3071) -8096 = OR(8090, 3072) -8099 = OR(8091, 3073) -8102 = OR(8092, 3074) -8113 = AND(8102, 2779, 2790) -8114 = AND(8099, 1327, 2790) -8115 = AND(8102, 2801, 2812) -8116 = AND(8099, 1351, 2812) -8117 = AND(8096, 2681, 2692) -8118 = AND(8093, 1185, 2692) -8119 = AND(8096, 2756, 2767) -8120 = AND(8093, 1247, 2767) -8121 = OR(8117, 8118, 3662, 2703) -8122 = OR(8119, 8120, 3663, 2778) -8123 = OR(8113, 8114, 3650, 2614) -8124 = OR(8115, 8116, 3658, 2622) -8125 = AND(8121, 2675) -8126 = AND(8122, 2750) -8127 = NOT(8125) -8128 = NOT(8126) diff --git a/ISCAS85/c6288.bench b/ISCAS85/c6288.bench deleted file mode 100644 index d578950..0000000 --- a/ISCAS85/c6288.bench +++ /dev/null @@ -1,2484 +0,0 @@ -# c6288 - -INPUT(1) -INPUT(18) -INPUT(35) -INPUT(52) -INPUT(69) -INPUT(86) -INPUT(103) -INPUT(120) -INPUT(137) -INPUT(154) -INPUT(171) -INPUT(188) -INPUT(205) -INPUT(222) -INPUT(239) -INPUT(256) -INPUT(273) -INPUT(290) -INPUT(307) -INPUT(324) -INPUT(341) -INPUT(358) -INPUT(375) -INPUT(392) -INPUT(409) -INPUT(426) -INPUT(443) -INPUT(460) -INPUT(477) -INPUT(494) -INPUT(511) -INPUT(528) - -OUTPUT(545) -OUTPUT(1581) -OUTPUT(1901) -OUTPUT(2223) -OUTPUT(2548) -OUTPUT(2877) -OUTPUT(3211) -OUTPUT(3552) -OUTPUT(3895) -OUTPUT(4241) -OUTPUT(4591) -OUTPUT(4946) -OUTPUT(5308) -OUTPUT(5672) -OUTPUT(5971) -OUTPUT(6123) -OUTPUT(6150) -OUTPUT(6160) -OUTPUT(6170) -OUTPUT(6180) -OUTPUT(6190) -OUTPUT(6200) -OUTPUT(6210) -OUTPUT(6220) -OUTPUT(6230) -OUTPUT(6240) -OUTPUT(6250) -OUTPUT(6260) -OUTPUT(6270) -OUTPUT(6280) -OUTPUT(6287) -OUTPUT(6288) - -545 = AND(1, 273) -546 = AND(1, 290) -549 = AND(1, 307) -552 = AND(1, 324) -555 = AND(1, 341) -558 = AND(1, 358) -561 = AND(1, 375) -564 = AND(1, 392) -567 = AND(1, 409) -570 = AND(1, 426) -573 = AND(1, 443) -576 = AND(1, 460) -579 = AND(1, 477) -582 = AND(1, 494) -585 = AND(1, 511) -588 = AND(1, 528) -591 = AND(18, 273) -594 = AND(18, 290) -597 = AND(18, 307) -600 = AND(18, 324) -603 = AND(18, 341) -606 = AND(18, 358) -609 = AND(18, 375) -612 = AND(18, 392) -615 = AND(18, 409) -618 = AND(18, 426) -621 = AND(18, 443) -624 = AND(18, 460) -627 = AND(18, 477) -630 = AND(18, 494) -633 = AND(18, 511) -636 = AND(18, 528) -639 = AND(35, 273) -642 = AND(35, 290) -645 = AND(35, 307) -648 = AND(35, 324) -651 = AND(35, 341) -654 = AND(35, 358) -657 = AND(35, 375) -660 = AND(35, 392) -663 = AND(35, 409) -666 = AND(35, 426) -669 = AND(35, 443) -672 = AND(35, 460) -675 = AND(35, 477) -678 = AND(35, 494) -681 = AND(35, 511) -684 = AND(35, 528) -687 = AND(52, 273) -690 = AND(52, 290) -693 = AND(52, 307) -696 = AND(52, 324) -699 = AND(52, 341) -702 = AND(52, 358) -705 = AND(52, 375) -708 = AND(52, 392) -711 = AND(52, 409) -714 = AND(52, 426) -717 = AND(52, 443) -720 = AND(52, 460) -723 = AND(52, 477) -726 = AND(52, 494) -729 = AND(52, 511) -732 = AND(52, 528) -735 = AND(69, 273) -738 = AND(69, 290) -741 = AND(69, 307) -744 = AND(69, 324) -747 = AND(69, 341) -750 = AND(69, 358) -753 = AND(69, 375) -756 = AND(69, 392) -759 = AND(69, 409) -762 = AND(69, 426) -765 = AND(69, 443) -768 = AND(69, 460) -771 = AND(69, 477) -774 = AND(69, 494) -777 = AND(69, 511) -780 = AND(69, 528) -783 = AND(86, 273) -786 = AND(86, 290) -789 = AND(86, 307) -792 = AND(86, 324) -795 = AND(86, 341) -798 = AND(86, 358) -801 = AND(86, 375) -804 = AND(86, 392) -807 = AND(86, 409) -810 = AND(86, 426) -813 = AND(86, 443) -816 = AND(86, 460) -819 = AND(86, 477) -822 = AND(86, 494) -825 = AND(86, 511) -828 = AND(86, 528) -831 = AND(103, 273) -834 = AND(103, 290) -837 = AND(103, 307) -840 = AND(103, 324) -843 = AND(103, 341) -846 = AND(103, 358) -849 = AND(103, 375) -852 = AND(103, 392) -855 = AND(103, 409) -858 = AND(103, 426) -861 = AND(103, 443) -864 = AND(103, 460) -867 = AND(103, 477) -870 = AND(103, 494) -873 = AND(103, 511) -876 = AND(103, 528) -879 = AND(120, 273) -882 = AND(120, 290) -885 = AND(120, 307) -888 = AND(120, 324) -891 = AND(120, 341) -894 = AND(120, 358) -897 = AND(120, 375) -900 = AND(120, 392) -903 = AND(120, 409) -906 = AND(120, 426) -909 = AND(120, 443) -912 = AND(120, 460) -915 = AND(120, 477) -918 = AND(120, 494) -921 = AND(120, 511) -924 = AND(120, 528) -927 = AND(137, 273) -930 = AND(137, 290) -933 = AND(137, 307) -936 = AND(137, 324) -939 = AND(137, 341) -942 = AND(137, 358) -945 = AND(137, 375) -948 = AND(137, 392) -951 = AND(137, 409) -954 = AND(137, 426) -957 = AND(137, 443) -960 = AND(137, 460) -963 = AND(137, 477) -966 = AND(137, 494) -969 = AND(137, 511) -972 = AND(137, 528) -975 = AND(154, 273) -978 = AND(154, 290) -981 = AND(154, 307) -984 = AND(154, 324) -987 = AND(154, 341) -990 = AND(154, 358) -993 = AND(154, 375) -996 = AND(154, 392) -999 = AND(154, 409) -1002 = AND(154, 426) -1005 = AND(154, 443) -1008 = AND(154, 460) -1011 = AND(154, 477) -1014 = AND(154, 494) -1017 = AND(154, 511) -1020 = AND(154, 528) -1023 = AND(171, 273) -1026 = AND(171, 290) -1029 = AND(171, 307) -1032 = AND(171, 324) -1035 = AND(171, 341) -1038 = AND(171, 358) -1041 = AND(171, 375) -1044 = AND(171, 392) -1047 = AND(171, 409) -1050 = AND(171, 426) -1053 = AND(171, 443) -1056 = AND(171, 460) -1059 = AND(171, 477) -1062 = AND(171, 494) -1065 = AND(171, 511) -1068 = AND(171, 528) -1071 = AND(188, 273) -1074 = AND(188, 290) -1077 = AND(188, 307) -1080 = AND(188, 324) -1083 = AND(188, 341) -1086 = AND(188, 358) -1089 = AND(188, 375) -1092 = AND(188, 392) -1095 = AND(188, 409) -1098 = AND(188, 426) -1101 = AND(188, 443) -1104 = AND(188, 460) -1107 = AND(188, 477) -1110 = AND(188, 494) -1113 = AND(188, 511) -1116 = AND(188, 528) -1119 = AND(205, 273) -1122 = AND(205, 290) -1125 = AND(205, 307) -1128 = AND(205, 324) -1131 = AND(205, 341) -1134 = AND(205, 358) -1137 = AND(205, 375) -1140 = AND(205, 392) -1143 = AND(205, 409) -1146 = AND(205, 426) -1149 = AND(205, 443) -1152 = AND(205, 460) -1155 = AND(205, 477) -1158 = AND(205, 494) -1161 = AND(205, 511) -1164 = AND(205, 528) -1167 = AND(222, 273) -1170 = AND(222, 290) -1173 = AND(222, 307) -1176 = AND(222, 324) -1179 = AND(222, 341) -1182 = AND(222, 358) -1185 = AND(222, 375) -1188 = AND(222, 392) -1191 = AND(222, 409) -1194 = AND(222, 426) -1197 = AND(222, 443) -1200 = AND(222, 460) -1203 = AND(222, 477) -1206 = AND(222, 494) -1209 = AND(222, 511) -1212 = AND(222, 528) -1215 = AND(239, 273) -1218 = AND(239, 290) -1221 = AND(239, 307) -1224 = AND(239, 324) -1227 = AND(239, 341) -1230 = AND(239, 358) -1233 = AND(239, 375) -1236 = AND(239, 392) -1239 = AND(239, 409) -1242 = AND(239, 426) -1245 = AND(239, 443) -1248 = AND(239, 460) -1251 = AND(239, 477) -1254 = AND(239, 494) -1257 = AND(239, 511) -1260 = AND(239, 528) -1263 = AND(256, 273) -1266 = AND(256, 290) -1269 = AND(256, 307) -1272 = AND(256, 324) -1275 = AND(256, 341) -1278 = AND(256, 358) -1281 = AND(256, 375) -1284 = AND(256, 392) -1287 = AND(256, 409) -1290 = AND(256, 426) -1293 = AND(256, 443) -1296 = AND(256, 460) -1299 = AND(256, 477) -1302 = AND(256, 494) -1305 = AND(256, 511) -1308 = AND(256, 528) -1311 = NOT(591) -1315 = NOT(639) -1319 = NOT(687) -1323 = NOT(735) -1327 = NOT(783) -1331 = NOT(831) -1335 = NOT(879) -1339 = NOT(927) -1343 = NOT(975) -1347 = NOT(1023) -1351 = NOT(1071) -1355 = NOT(1119) -1359 = NOT(1167) -1363 = NOT(1215) -1367 = NOT(1263) -1371 = NOR(591, 1311) -1372 = NOT(1311) -1373 = NOR(639, 1315) -1374 = NOT(1315) -1375 = NOR(687, 1319) -1376 = NOT(1319) -1377 = NOR(735, 1323) -1378 = NOT(1323) -1379 = NOR(783, 1327) -1380 = NOT(1327) -1381 = NOR(831, 1331) -1382 = NOT(1331) -1383 = NOR(879, 1335) -1384 = NOT(1335) -1385 = NOR(927, 1339) -1386 = NOT(1339) -1387 = NOR(975, 1343) -1388 = NOT(1343) -1389 = NOR(1023, 1347) -1390 = NOT(1347) -1391 = NOR(1071, 1351) -1392 = NOT(1351) -1393 = NOR(1119, 1355) -1394 = NOT(1355) -1395 = NOR(1167, 1359) -1396 = NOT(1359) -1397 = NOR(1215, 1363) -1398 = NOT(1363) -1399 = NOR(1263, 1367) -1400 = NOT(1367) -1401 = NOR(1371, 1372) -1404 = NOR(1373, 1374) -1407 = NOR(1375, 1376) -1410 = NOR(1377, 1378) -1413 = NOR(1379, 1380) -1416 = NOR(1381, 1382) -1419 = NOR(1383, 1384) -1422 = NOR(1385, 1386) -1425 = NOR(1387, 1388) -1428 = NOR(1389, 1390) -1431 = NOR(1391, 1392) -1434 = NOR(1393, 1394) -1437 = NOR(1395, 1396) -1440 = NOR(1397, 1398) -1443 = NOR(1399, 1400) -1446 = NOR(1401, 546) -1450 = NOR(1404, 594) -1454 = NOR(1407, 642) -1458 = NOR(1410, 690) -1462 = NOR(1413, 738) -1466 = NOR(1416, 786) -1470 = NOR(1419, 834) -1474 = NOR(1422, 882) -1478 = NOR(1425, 930) -1482 = NOR(1428, 978) -1486 = NOR(1431, 1026) -1490 = NOR(1434, 1074) -1494 = NOR(1437, 1122) -1498 = NOR(1440, 1170) -1502 = NOR(1443, 1218) -1506 = NOR(1401, 1446) -1507 = NOR(1446, 546) -1508 = NOR(1311, 1446) -1511 = NOR(1404, 1450) -1512 = NOR(1450, 594) -1513 = NOR(1315, 1450) -1516 = NOR(1407, 1454) -1517 = NOR(1454, 642) -1518 = NOR(1319, 1454) -1521 = NOR(1410, 1458) -1522 = NOR(1458, 690) -1523 = NOR(1323, 1458) -1526 = NOR(1413, 1462) -1527 = NOR(1462, 738) -1528 = NOR(1327, 1462) -1531 = NOR(1416, 1466) -1532 = NOR(1466, 786) -1533 = NOR(1331, 1466) -1536 = NOR(1419, 1470) -1537 = NOR(1470, 834) -1538 = NOR(1335, 1470) -1541 = NOR(1422, 1474) -1542 = NOR(1474, 882) -1543 = NOR(1339, 1474) -1546 = NOR(1425, 1478) -1547 = NOR(1478, 930) -1548 = NOR(1343, 1478) -1551 = NOR(1428, 1482) -1552 = NOR(1482, 978) -1553 = NOR(1347, 1482) -1556 = NOR(1431, 1486) -1557 = NOR(1486, 1026) -1558 = NOR(1351, 1486) -1561 = NOR(1434, 1490) -1562 = NOR(1490, 1074) -1563 = NOR(1355, 1490) -1566 = NOR(1437, 1494) -1567 = NOR(1494, 1122) -1568 = NOR(1359, 1494) -1571 = NOR(1440, 1498) -1572 = NOR(1498, 1170) -1573 = NOR(1363, 1498) -1576 = NOR(1443, 1502) -1577 = NOR(1502, 1218) -1578 = NOR(1367, 1502) -1581 = NOR(1506, 1507) -1582 = NOR(1511, 1512) -1585 = NOR(1516, 1517) -1588 = NOR(1521, 1522) -1591 = NOR(1526, 1527) -1594 = NOR(1531, 1532) -1597 = NOR(1536, 1537) -1600 = NOR(1541, 1542) -1603 = NOR(1546, 1547) -1606 = NOR(1551, 1552) -1609 = NOR(1556, 1557) -1612 = NOR(1561, 1562) -1615 = NOR(1566, 1567) -1618 = NOR(1571, 1572) -1621 = NOR(1576, 1577) -1624 = NOR(1266, 1578) -1628 = NOR(1582, 1508) -1632 = NOR(1585, 1513) -1636 = NOR(1588, 1518) -1640 = NOR(1591, 1523) -1644 = NOR(1594, 1528) -1648 = NOR(1597, 1533) -1652 = NOR(1600, 1538) -1656 = NOR(1603, 1543) -1660 = NOR(1606, 1548) -1664 = NOR(1609, 1553) -1668 = NOR(1612, 1558) -1672 = NOR(1615, 1563) -1676 = NOR(1618, 1568) -1680 = NOR(1621, 1573) -1684 = NOR(1266, 1624) -1685 = NOR(1624, 1578) -1686 = NOR(1582, 1628) -1687 = NOR(1628, 1508) -1688 = NOR(1585, 1632) -1689 = NOR(1632, 1513) -1690 = NOR(1588, 1636) -1691 = NOR(1636, 1518) -1692 = NOR(1591, 1640) -1693 = NOR(1640, 1523) -1694 = NOR(1594, 1644) -1695 = NOR(1644, 1528) -1696 = NOR(1597, 1648) -1697 = NOR(1648, 1533) -1698 = NOR(1600, 1652) -1699 = NOR(1652, 1538) -1700 = NOR(1603, 1656) -1701 = NOR(1656, 1543) -1702 = NOR(1606, 1660) -1703 = NOR(1660, 1548) -1704 = NOR(1609, 1664) -1705 = NOR(1664, 1553) -1706 = NOR(1612, 1668) -1707 = NOR(1668, 1558) -1708 = NOR(1615, 1672) -1709 = NOR(1672, 1563) -1710 = NOR(1618, 1676) -1711 = NOR(1676, 1568) -1712 = NOR(1621, 1680) -1713 = NOR(1680, 1573) -1714 = NOR(1684, 1685) -1717 = NOR(1686, 1687) -1720 = NOR(1688, 1689) -1723 = NOR(1690, 1691) -1726 = NOR(1692, 1693) -1729 = NOR(1694, 1695) -1732 = NOR(1696, 1697) -1735 = NOR(1698, 1699) -1738 = NOR(1700, 1701) -1741 = NOR(1702, 1703) -1744 = NOR(1704, 1705) -1747 = NOR(1706, 1707) -1750 = NOR(1708, 1709) -1753 = NOR(1710, 1711) -1756 = NOR(1712, 1713) -1759 = NOR(1714, 1221) -1763 = NOR(1717, 549) -1767 = NOR(1720, 597) -1771 = NOR(1723, 645) -1775 = NOR(1726, 693) -1779 = NOR(1729, 741) -1783 = NOR(1732, 789) -1787 = NOR(1735, 837) -1791 = NOR(1738, 885) -1795 = NOR(1741, 933) -1799 = NOR(1744, 981) -1803 = NOR(1747, 1029) -1807 = NOR(1750, 1077) -1811 = NOR(1753, 1125) -1815 = NOR(1756, 1173) -1819 = NOR(1714, 1759) -1820 = NOR(1759, 1221) -1821 = NOR(1624, 1759) -1824 = NOR(1717, 1763) -1825 = NOR(1763, 549) -1826 = NOR(1628, 1763) -1829 = NOR(1720, 1767) -1830 = NOR(1767, 597) -1831 = NOR(1632, 1767) -1834 = NOR(1723, 1771) -1835 = NOR(1771, 645) -1836 = NOR(1636, 1771) -1839 = NOR(1726, 1775) -1840 = NOR(1775, 693) -1841 = NOR(1640, 1775) -1844 = NOR(1729, 1779) -1845 = NOR(1779, 741) -1846 = NOR(1644, 1779) -1849 = NOR(1732, 1783) -1850 = NOR(1783, 789) -1851 = NOR(1648, 1783) -1854 = NOR(1735, 1787) -1855 = NOR(1787, 837) -1856 = NOR(1652, 1787) -1859 = NOR(1738, 1791) -1860 = NOR(1791, 885) -1861 = NOR(1656, 1791) -1864 = NOR(1741, 1795) -1865 = NOR(1795, 933) -1866 = NOR(1660, 1795) -1869 = NOR(1744, 1799) -1870 = NOR(1799, 981) -1871 = NOR(1664, 1799) -1874 = NOR(1747, 1803) -1875 = NOR(1803, 1029) -1876 = NOR(1668, 1803) -1879 = NOR(1750, 1807) -1880 = NOR(1807, 1077) -1881 = NOR(1672, 1807) -1884 = NOR(1753, 1811) -1885 = NOR(1811, 1125) -1886 = NOR(1676, 1811) -1889 = NOR(1756, 1815) -1890 = NOR(1815, 1173) -1891 = NOR(1680, 1815) -1894 = NOR(1819, 1820) -1897 = NOR(1269, 1821) -1901 = NOR(1824, 1825) -1902 = NOR(1829, 1830) -1905 = NOR(1834, 1835) -1908 = NOR(1839, 1840) -1911 = NOR(1844, 1845) -1914 = NOR(1849, 1850) -1917 = NOR(1854, 1855) -1920 = NOR(1859, 1860) -1923 = NOR(1864, 1865) -1926 = NOR(1869, 1870) -1929 = NOR(1874, 1875) -1932 = NOR(1879, 1880) -1935 = NOR(1884, 1885) -1938 = NOR(1889, 1890) -1941 = NOR(1894, 1891) -1945 = NOR(1269, 1897) -1946 = NOR(1897, 1821) -1947 = NOR(1902, 1826) -1951 = NOR(1905, 1831) -1955 = NOR(1908, 1836) -1959 = NOR(1911, 1841) -1963 = NOR(1914, 1846) -1967 = NOR(1917, 1851) -1971 = NOR(1920, 1856) -1975 = NOR(1923, 1861) -1979 = NOR(1926, 1866) -1983 = NOR(1929, 1871) -1987 = NOR(1932, 1876) -1991 = NOR(1935, 1881) -1995 = NOR(1938, 1886) -1999 = NOR(1894, 1941) -2000 = NOR(1941, 1891) -2001 = NOR(1945, 1946) -2004 = NOR(1902, 1947) -2005 = NOR(1947, 1826) -2006 = NOR(1905, 1951) -2007 = NOR(1951, 1831) -2008 = NOR(1908, 1955) -2009 = NOR(1955, 1836) -2010 = NOR(1911, 1959) -2011 = NOR(1959, 1841) -2012 = NOR(1914, 1963) -2013 = NOR(1963, 1846) -2014 = NOR(1917, 1967) -2015 = NOR(1967, 1851) -2016 = NOR(1920, 1971) -2017 = NOR(1971, 1856) -2018 = NOR(1923, 1975) -2019 = NOR(1975, 1861) -2020 = NOR(1926, 1979) -2021 = NOR(1979, 1866) -2022 = NOR(1929, 1983) -2023 = NOR(1983, 1871) -2024 = NOR(1932, 1987) -2025 = NOR(1987, 1876) -2026 = NOR(1935, 1991) -2027 = NOR(1991, 1881) -2028 = NOR(1938, 1995) -2029 = NOR(1995, 1886) -2030 = NOR(1999, 2000) -2033 = NOR(2001, 1224) -2037 = NOR(2004, 2005) -2040 = NOR(2006, 2007) -2043 = NOR(2008, 2009) -2046 = NOR(2010, 2011) -2049 = NOR(2012, 2013) -2052 = NOR(2014, 2015) -2055 = NOR(2016, 2017) -2058 = NOR(2018, 2019) -2061 = NOR(2020, 2021) -2064 = NOR(2022, 2023) -2067 = NOR(2024, 2025) -2070 = NOR(2026, 2027) -2073 = NOR(2028, 2029) -2076 = NOR(2030, 1176) -2080 = NOR(2001, 2033) -2081 = NOR(2033, 1224) -2082 = NOR(1897, 2033) -2085 = NOR(2037, 552) -2089 = NOR(2040, 600) -2093 = NOR(2043, 648) -2097 = NOR(2046, 696) -2101 = NOR(2049, 744) -2105 = NOR(2052, 792) -2109 = NOR(2055, 840) -2113 = NOR(2058, 888) -2117 = NOR(2061, 936) -2121 = NOR(2064, 984) -2125 = NOR(2067, 1032) -2129 = NOR(2070, 1080) -2133 = NOR(2073, 1128) -2137 = NOR(2030, 2076) -2138 = NOR(2076, 1176) -2139 = NOR(1941, 2076) -2142 = NOR(2080, 2081) -2145 = NOR(1272, 2082) -2149 = NOR(2037, 2085) -2150 = NOR(2085, 552) -2151 = NOR(1947, 2085) -2154 = NOR(2040, 2089) -2155 = NOR(2089, 600) -2156 = NOR(1951, 2089) -2159 = NOR(2043, 2093) -2160 = NOR(2093, 648) -2161 = NOR(1955, 2093) -2164 = NOR(2046, 2097) -2165 = NOR(2097, 696) -2166 = NOR(1959, 2097) -2169 = NOR(2049, 2101) -2170 = NOR(2101, 744) -2171 = NOR(1963, 2101) -2174 = NOR(2052, 2105) -2175 = NOR(2105, 792) -2176 = NOR(1967, 2105) -2179 = NOR(2055, 2109) -2180 = NOR(2109, 840) -2181 = NOR(1971, 2109) -2184 = NOR(2058, 2113) -2185 = NOR(2113, 888) -2186 = NOR(1975, 2113) -2189 = NOR(2061, 2117) -2190 = NOR(2117, 936) -2191 = NOR(1979, 2117) -2194 = NOR(2064, 2121) -2195 = NOR(2121, 984) -2196 = NOR(1983, 2121) -2199 = NOR(2067, 2125) -2200 = NOR(2125, 1032) -2201 = NOR(1987, 2125) -2204 = NOR(2070, 2129) -2205 = NOR(2129, 1080) -2206 = NOR(1991, 2129) -2209 = NOR(2073, 2133) -2210 = NOR(2133, 1128) -2211 = NOR(1995, 2133) -2214 = NOR(2137, 2138) -2217 = NOR(2142, 2139) -2221 = NOR(1272, 2145) -2222 = NOR(2145, 2082) -2223 = NOR(2149, 2150) -2224 = NOR(2154, 2155) -2227 = NOR(2159, 2160) -2230 = NOR(2164, 2165) -2233 = NOR(2169, 2170) -2236 = NOR(2174, 2175) -2239 = NOR(2179, 2180) -2242 = NOR(2184, 2185) -2245 = NOR(2189, 2190) -2248 = NOR(2194, 2195) -2251 = NOR(2199, 2200) -2254 = NOR(2204, 2205) -2257 = NOR(2209, 2210) -2260 = NOR(2214, 2211) -2264 = NOR(2142, 2217) -2265 = NOR(2217, 2139) -2266 = NOR(2221, 2222) -2269 = NOR(2224, 2151) -2273 = NOR(2227, 2156) -2277 = NOR(2230, 2161) -2281 = NOR(2233, 2166) -2285 = NOR(2236, 2171) -2289 = NOR(2239, 2176) -2293 = NOR(2242, 2181) -2297 = NOR(2245, 2186) -2301 = NOR(2248, 2191) -2305 = NOR(2251, 2196) -2309 = NOR(2254, 2201) -2313 = NOR(2257, 2206) -2317 = NOR(2214, 2260) -2318 = NOR(2260, 2211) -2319 = NOR(2264, 2265) -2322 = NOR(2266, 1227) -2326 = NOR(2224, 2269) -2327 = NOR(2269, 2151) -2328 = NOR(2227, 2273) -2329 = NOR(2273, 2156) -2330 = NOR(2230, 2277) -2331 = NOR(2277, 2161) -2332 = NOR(2233, 2281) -2333 = NOR(2281, 2166) -2334 = NOR(2236, 2285) -2335 = NOR(2285, 2171) -2336 = NOR(2239, 2289) -2337 = NOR(2289, 2176) -2338 = NOR(2242, 2293) -2339 = NOR(2293, 2181) -2340 = NOR(2245, 2297) -2341 = NOR(2297, 2186) -2342 = NOR(2248, 2301) -2343 = NOR(2301, 2191) -2344 = NOR(2251, 2305) -2345 = NOR(2305, 2196) -2346 = NOR(2254, 2309) -2347 = NOR(2309, 2201) -2348 = NOR(2257, 2313) -2349 = NOR(2313, 2206) -2350 = NOR(2317, 2318) -2353 = NOR(2319, 1179) -2357 = NOR(2266, 2322) -2358 = NOR(2322, 1227) -2359 = NOR(2145, 2322) -2362 = NOR(2326, 2327) -2365 = NOR(2328, 2329) -2368 = NOR(2330, 2331) -2371 = NOR(2332, 2333) -2374 = NOR(2334, 2335) -2377 = NOR(2336, 2337) -2380 = NOR(2338, 2339) -2383 = NOR(2340, 2341) -2386 = NOR(2342, 2343) -2389 = NOR(2344, 2345) -2392 = NOR(2346, 2347) -2395 = NOR(2348, 2349) -2398 = NOR(2350, 1131) -2402 = NOR(2319, 2353) -2403 = NOR(2353, 1179) -2404 = NOR(2217, 2353) -2407 = NOR(2357, 2358) -2410 = NOR(1275, 2359) -2414 = NOR(2362, 555) -2418 = NOR(2365, 603) -2422 = NOR(2368, 651) -2426 = NOR(2371, 699) -2430 = NOR(2374, 747) -2434 = NOR(2377, 795) -2438 = NOR(2380, 843) -2442 = NOR(2383, 891) -2446 = NOR(2386, 939) -2450 = NOR(2389, 987) -2454 = NOR(2392, 1035) -2458 = NOR(2395, 1083) -2462 = NOR(2350, 2398) -2463 = NOR(2398, 1131) -2464 = NOR(2260, 2398) -2467 = NOR(2402, 2403) -2470 = NOR(2407, 2404) -2474 = NOR(1275, 2410) -2475 = NOR(2410, 2359) -2476 = NOR(2362, 2414) -2477 = NOR(2414, 555) -2478 = NOR(2269, 2414) -2481 = NOR(2365, 2418) -2482 = NOR(2418, 603) -2483 = NOR(2273, 2418) -2486 = NOR(2368, 2422) -2487 = NOR(2422, 651) -2488 = NOR(2277, 2422) -2491 = NOR(2371, 2426) -2492 = NOR(2426, 699) -2493 = NOR(2281, 2426) -2496 = NOR(2374, 2430) -2497 = NOR(2430, 747) -2498 = NOR(2285, 2430) -2501 = NOR(2377, 2434) -2502 = NOR(2434, 795) -2503 = NOR(2289, 2434) -2506 = NOR(2380, 2438) -2507 = NOR(2438, 843) -2508 = NOR(2293, 2438) -2511 = NOR(2383, 2442) -2512 = NOR(2442, 891) -2513 = NOR(2297, 2442) -2516 = NOR(2386, 2446) -2517 = NOR(2446, 939) -2518 = NOR(2301, 2446) -2521 = NOR(2389, 2450) -2522 = NOR(2450, 987) -2523 = NOR(2305, 2450) -2526 = NOR(2392, 2454) -2527 = NOR(2454, 1035) -2528 = NOR(2309, 2454) -2531 = NOR(2395, 2458) -2532 = NOR(2458, 1083) -2533 = NOR(2313, 2458) -2536 = NOR(2462, 2463) -2539 = NOR(2467, 2464) -2543 = NOR(2407, 2470) -2544 = NOR(2470, 2404) -2545 = NOR(2474, 2475) -2548 = NOR(2476, 2477) -2549 = NOR(2481, 2482) -2552 = NOR(2486, 2487) -2555 = NOR(2491, 2492) -2558 = NOR(2496, 2497) -2561 = NOR(2501, 2502) -2564 = NOR(2506, 2507) -2567 = NOR(2511, 2512) -2570 = NOR(2516, 2517) -2573 = NOR(2521, 2522) -2576 = NOR(2526, 2527) -2579 = NOR(2531, 2532) -2582 = NOR(2536, 2533) -2586 = NOR(2467, 2539) -2587 = NOR(2539, 2464) -2588 = NOR(2543, 2544) -2591 = NOR(2545, 1230) -2595 = NOR(2549, 2478) -2599 = NOR(2552, 2483) -2603 = NOR(2555, 2488) -2607 = NOR(2558, 2493) -2611 = NOR(2561, 2498) -2615 = NOR(2564, 2503) -2619 = NOR(2567, 2508) -2623 = NOR(2570, 2513) -2627 = NOR(2573, 2518) -2631 = NOR(2576, 2523) -2635 = NOR(2579, 2528) -2639 = NOR(2536, 2582) -2640 = NOR(2582, 2533) -2641 = NOR(2586, 2587) -2644 = NOR(2588, 1182) -2648 = NOR(2545, 2591) -2649 = NOR(2591, 1230) -2650 = NOR(2410, 2591) -2653 = NOR(2549, 2595) -2654 = NOR(2595, 2478) -2655 = NOR(2552, 2599) -2656 = NOR(2599, 2483) -2657 = NOR(2555, 2603) -2658 = NOR(2603, 2488) -2659 = NOR(2558, 2607) -2660 = NOR(2607, 2493) -2661 = NOR(2561, 2611) -2662 = NOR(2611, 2498) -2663 = NOR(2564, 2615) -2664 = NOR(2615, 2503) -2665 = NOR(2567, 2619) -2666 = NOR(2619, 2508) -2667 = NOR(2570, 2623) -2668 = NOR(2623, 2513) -2669 = NOR(2573, 2627) -2670 = NOR(2627, 2518) -2671 = NOR(2576, 2631) -2672 = NOR(2631, 2523) -2673 = NOR(2579, 2635) -2674 = NOR(2635, 2528) -2675 = NOR(2639, 2640) -2678 = NOR(2641, 1134) -2682 = NOR(2588, 2644) -2683 = NOR(2644, 1182) -2684 = NOR(2470, 2644) -2687 = NOR(2648, 2649) -2690 = NOR(1278, 2650) -2694 = NOR(2653, 2654) -2697 = NOR(2655, 2656) -2700 = NOR(2657, 2658) -2703 = NOR(2659, 2660) -2706 = NOR(2661, 2662) -2709 = NOR(2663, 2664) -2712 = NOR(2665, 2666) -2715 = NOR(2667, 2668) -2718 = NOR(2669, 2670) -2721 = NOR(2671, 2672) -2724 = NOR(2673, 2674) -2727 = NOR(2675, 1086) -2731 = NOR(2641, 2678) -2732 = NOR(2678, 1134) -2733 = NOR(2539, 2678) -2736 = NOR(2682, 2683) -2739 = NOR(2687, 2684) -2743 = NOR(1278, 2690) -2744 = NOR(2690, 2650) -2745 = NOR(2694, 558) -2749 = NOR(2697, 606) -2753 = NOR(2700, 654) -2757 = NOR(2703, 702) -2761 = NOR(2706, 750) -2765 = NOR(2709, 798) -2769 = NOR(2712, 846) -2773 = NOR(2715, 894) -2777 = NOR(2718, 942) -2781 = NOR(2721, 990) -2785 = NOR(2724, 1038) -2789 = NOR(2675, 2727) -2790 = NOR(2727, 1086) -2791 = NOR(2582, 2727) -2794 = NOR(2731, 2732) -2797 = NOR(2736, 2733) -2801 = NOR(2687, 2739) -2802 = NOR(2739, 2684) -2803 = NOR(2743, 2744) -2806 = NOR(2694, 2745) -2807 = NOR(2745, 558) -2808 = NOR(2595, 2745) -2811 = NOR(2697, 2749) -2812 = NOR(2749, 606) -2813 = NOR(2599, 2749) -2816 = NOR(2700, 2753) -2817 = NOR(2753, 654) -2818 = NOR(2603, 2753) -2821 = NOR(2703, 2757) -2822 = NOR(2757, 702) -2823 = NOR(2607, 2757) -2826 = NOR(2706, 2761) -2827 = NOR(2761, 750) -2828 = NOR(2611, 2761) -2831 = NOR(2709, 2765) -2832 = NOR(2765, 798) -2833 = NOR(2615, 2765) -2836 = NOR(2712, 2769) -2837 = NOR(2769, 846) -2838 = NOR(2619, 2769) -2841 = NOR(2715, 2773) -2842 = NOR(2773, 894) -2843 = NOR(2623, 2773) -2846 = NOR(2718, 2777) -2847 = NOR(2777, 942) -2848 = NOR(2627, 2777) -2851 = NOR(2721, 2781) -2852 = NOR(2781, 990) -2853 = NOR(2631, 2781) -2856 = NOR(2724, 2785) -2857 = NOR(2785, 1038) -2858 = NOR(2635, 2785) -2861 = NOR(2789, 2790) -2864 = NOR(2794, 2791) -2868 = NOR(2736, 2797) -2869 = NOR(2797, 2733) -2870 = NOR(2801, 2802) -2873 = NOR(2803, 1233) -2877 = NOR(2806, 2807) -2878 = NOR(2811, 2812) -2881 = NOR(2816, 2817) -2884 = NOR(2821, 2822) -2887 = NOR(2826, 2827) -2890 = NOR(2831, 2832) -2893 = NOR(2836, 2837) -2896 = NOR(2841, 2842) -2899 = NOR(2846, 2847) -2902 = NOR(2851, 2852) -2905 = NOR(2856, 2857) -2908 = NOR(2861, 2858) -2912 = NOR(2794, 2864) -2913 = NOR(2864, 2791) -2914 = NOR(2868, 2869) -2917 = NOR(2870, 1185) -2921 = NOR(2803, 2873) -2922 = NOR(2873, 1233) -2923 = NOR(2690, 2873) -2926 = NOR(2878, 2808) -2930 = NOR(2881, 2813) -2934 = NOR(2884, 2818) -2938 = NOR(2887, 2823) -2942 = NOR(2890, 2828) -2946 = NOR(2893, 2833) -2950 = NOR(2896, 2838) -2954 = NOR(2899, 2843) -2958 = NOR(2902, 2848) -2962 = NOR(2905, 2853) -2966 = NOR(2861, 2908) -2967 = NOR(2908, 2858) -2968 = NOR(2912, 2913) -2971 = NOR(2914, 1137) -2975 = NOR(2870, 2917) -2976 = NOR(2917, 1185) -2977 = NOR(2739, 2917) -2980 = NOR(2921, 2922) -2983 = NOR(1281, 2923) -2987 = NOR(2878, 2926) -2988 = NOR(2926, 2808) -2989 = NOR(2881, 2930) -2990 = NOR(2930, 2813) -2991 = NOR(2884, 2934) -2992 = NOR(2934, 2818) -2993 = NOR(2887, 2938) -2994 = NOR(2938, 2823) -2995 = NOR(2890, 2942) -2996 = NOR(2942, 2828) -2997 = NOR(2893, 2946) -2998 = NOR(2946, 2833) -2999 = NOR(2896, 2950) -3000 = NOR(2950, 2838) -3001 = NOR(2899, 2954) -3002 = NOR(2954, 2843) -3003 = NOR(2902, 2958) -3004 = NOR(2958, 2848) -3005 = NOR(2905, 2962) -3006 = NOR(2962, 2853) -3007 = NOR(2966, 2967) -3010 = NOR(2968, 1089) -3014 = NOR(2914, 2971) -3015 = NOR(2971, 1137) -3016 = NOR(2797, 2971) -3019 = NOR(2975, 2976) -3022 = NOR(2980, 2977) -3026 = NOR(1281, 2983) -3027 = NOR(2983, 2923) -3028 = NOR(2987, 2988) -3031 = NOR(2989, 2990) -3034 = NOR(2991, 2992) -3037 = NOR(2993, 2994) -3040 = NOR(2995, 2996) -3043 = NOR(2997, 2998) -3046 = NOR(2999, 3000) -3049 = NOR(3001, 3002) -3052 = NOR(3003, 3004) -3055 = NOR(3005, 3006) -3058 = NOR(3007, 1041) -3062 = NOR(2968, 3010) -3063 = NOR(3010, 1089) -3064 = NOR(2864, 3010) -3067 = NOR(3014, 3015) -3070 = NOR(3019, 3016) -3074 = NOR(2980, 3022) -3075 = NOR(3022, 2977) -3076 = NOR(3026, 3027) -3079 = NOR(3028, 561) -3083 = NOR(3031, 609) -3087 = NOR(3034, 657) -3091 = NOR(3037, 705) -3095 = NOR(3040, 753) -3099 = NOR(3043, 801) -3103 = NOR(3046, 849) -3107 = NOR(3049, 897) -3111 = NOR(3052, 945) -3115 = NOR(3055, 993) -3119 = NOR(3007, 3058) -3120 = NOR(3058, 1041) -3121 = NOR(2908, 3058) -3124 = NOR(3062, 3063) -3127 = NOR(3067, 3064) -3131 = NOR(3019, 3070) -3132 = NOR(3070, 3016) -3133 = NOR(3074, 3075) -3136 = NOR(3076, 1236) -3140 = NOR(3028, 3079) -3141 = NOR(3079, 561) -3142 = NOR(2926, 3079) -3145 = NOR(3031, 3083) -3146 = NOR(3083, 609) -3147 = NOR(2930, 3083) -3150 = NOR(3034, 3087) -3151 = NOR(3087, 657) -3152 = NOR(2934, 3087) -3155 = NOR(3037, 3091) -3156 = NOR(3091, 705) -3157 = NOR(2938, 3091) -3160 = NOR(3040, 3095) -3161 = NOR(3095, 753) -3162 = NOR(2942, 3095) -3165 = NOR(3043, 3099) -3166 = NOR(3099, 801) -3167 = NOR(2946, 3099) -3170 = NOR(3046, 3103) -3171 = NOR(3103, 849) -3172 = NOR(2950, 3103) -3175 = NOR(3049, 3107) -3176 = NOR(3107, 897) -3177 = NOR(2954, 3107) -3180 = NOR(3052, 3111) -3181 = NOR(3111, 945) -3182 = NOR(2958, 3111) -3185 = NOR(3055, 3115) -3186 = NOR(3115, 993) -3187 = NOR(2962, 3115) -3190 = NOR(3119, 3120) -3193 = NOR(3124, 3121) -3197 = NOR(3067, 3127) -3198 = NOR(3127, 3064) -3199 = NOR(3131, 3132) -3202 = NOR(3133, 1188) -3206 = NOR(3076, 3136) -3207 = NOR(3136, 1236) -3208 = NOR(2983, 3136) -3211 = NOR(3140, 3141) -3212 = NOR(3145, 3146) -3215 = NOR(3150, 3151) -3218 = NOR(3155, 3156) -3221 = NOR(3160, 3161) -3224 = NOR(3165, 3166) -3227 = NOR(3170, 3171) -3230 = NOR(3175, 3176) -3233 = NOR(3180, 3181) -3236 = NOR(3185, 3186) -3239 = NOR(3190, 3187) -3243 = NOR(3124, 3193) -3244 = NOR(3193, 3121) -3245 = NOR(3197, 3198) -3248 = NOR(3199, 1140) -3252 = NOR(3133, 3202) -3253 = NOR(3202, 1188) -3254 = NOR(3022, 3202) -3257 = NOR(3206, 3207) -3260 = NOR(1284, 3208) -3264 = NOR(3212, 3142) -3268 = NOR(3215, 3147) -3272 = NOR(3218, 3152) -3276 = NOR(3221, 3157) -3280 = NOR(3224, 3162) -3284 = NOR(3227, 3167) -3288 = NOR(3230, 3172) -3292 = NOR(3233, 3177) -3296 = NOR(3236, 3182) -3300 = NOR(3190, 3239) -3301 = NOR(3239, 3187) -3302 = NOR(3243, 3244) -3305 = NOR(3245, 1092) -3309 = NOR(3199, 3248) -3310 = NOR(3248, 1140) -3311 = NOR(3070, 3248) -3314 = NOR(3252, 3253) -3317 = NOR(3257, 3254) -3321 = NOR(1284, 3260) -3322 = NOR(3260, 3208) -3323 = NOR(3212, 3264) -3324 = NOR(3264, 3142) -3325 = NOR(3215, 3268) -3326 = NOR(3268, 3147) -3327 = NOR(3218, 3272) -3328 = NOR(3272, 3152) -3329 = NOR(3221, 3276) -3330 = NOR(3276, 3157) -3331 = NOR(3224, 3280) -3332 = NOR(3280, 3162) -3333 = NOR(3227, 3284) -3334 = NOR(3284, 3167) -3335 = NOR(3230, 3288) -3336 = NOR(3288, 3172) -3337 = NOR(3233, 3292) -3338 = NOR(3292, 3177) -3339 = NOR(3236, 3296) -3340 = NOR(3296, 3182) -3341 = NOR(3300, 3301) -3344 = NOR(3302, 1044) -3348 = NOR(3245, 3305) -3349 = NOR(3305, 1092) -3350 = NOR(3127, 3305) -3353 = NOR(3309, 3310) -3356 = NOR(3314, 3311) -3360 = NOR(3257, 3317) -3361 = NOR(3317, 3254) -3362 = NOR(3321, 3322) -3365 = NOR(3323, 3324) -3368 = NOR(3325, 3326) -3371 = NOR(3327, 3328) -3374 = NOR(3329, 3330) -3377 = NOR(3331, 3332) -3380 = NOR(3333, 3334) -3383 = NOR(3335, 3336) -3386 = NOR(3337, 3338) -3389 = NOR(3339, 3340) -3392 = NOR(3341, 996) -3396 = NOR(3302, 3344) -3397 = NOR(3344, 1044) -3398 = NOR(3193, 3344) -3401 = NOR(3348, 3349) -3404 = NOR(3353, 3350) -3408 = NOR(3314, 3356) -3409 = NOR(3356, 3311) -3410 = NOR(3360, 3361) -3413 = NOR(3362, 1239) -3417 = NOR(3365, 564) -3421 = NOR(3368, 612) -3425 = NOR(3371, 660) -3429 = NOR(3374, 708) -3433 = NOR(3377, 756) -3437 = NOR(3380, 804) -3441 = NOR(3383, 852) -3445 = NOR(3386, 900) -3449 = NOR(3389, 948) -3453 = NOR(3341, 3392) -3454 = NOR(3392, 996) -3455 = NOR(3239, 3392) -3458 = NOR(3396, 3397) -3461 = NOR(3401, 3398) -3465 = NOR(3353, 3404) -3466 = NOR(3404, 3350) -3467 = NOR(3408, 3409) -3470 = NOR(3410, 1191) -3474 = NOR(3362, 3413) -3475 = NOR(3413, 1239) -3476 = NOR(3260, 3413) -3479 = NOR(3365, 3417) -3480 = NOR(3417, 564) -3481 = NOR(3264, 3417) -3484 = NOR(3368, 3421) -3485 = NOR(3421, 612) -3486 = NOR(3268, 3421) -3489 = NOR(3371, 3425) -3490 = NOR(3425, 660) -3491 = NOR(3272, 3425) -3494 = NOR(3374, 3429) -3495 = NOR(3429, 708) -3496 = NOR(3276, 3429) -3499 = NOR(3377, 3433) -3500 = NOR(3433, 756) -3501 = NOR(3280, 3433) -3504 = NOR(3380, 3437) -3505 = NOR(3437, 804) -3506 = NOR(3284, 3437) -3509 = NOR(3383, 3441) -3510 = NOR(3441, 852) -3511 = NOR(3288, 3441) -3514 = NOR(3386, 3445) -3515 = NOR(3445, 900) -3516 = NOR(3292, 3445) -3519 = NOR(3389, 3449) -3520 = NOR(3449, 948) -3521 = NOR(3296, 3449) -3524 = NOR(3453, 3454) -3527 = NOR(3458, 3455) -3531 = NOR(3401, 3461) -3532 = NOR(3461, 3398) -3533 = NOR(3465, 3466) -3536 = NOR(3467, 1143) -3540 = NOR(3410, 3470) -3541 = NOR(3470, 1191) -3542 = NOR(3317, 3470) -3545 = NOR(3474, 3475) -3548 = NOR(1287, 3476) -3552 = NOR(3479, 3480) -3553 = NOR(3484, 3485) -3556 = NOR(3489, 3490) -3559 = NOR(3494, 3495) -3562 = NOR(3499, 3500) -3565 = NOR(3504, 3505) -3568 = NOR(3509, 3510) -3571 = NOR(3514, 3515) -3574 = NOR(3519, 3520) -3577 = NOR(3524, 3521) -3581 = NOR(3458, 3527) -3582 = NOR(3527, 3455) -3583 = NOR(3531, 3532) -3586 = NOR(3533, 1095) -3590 = NOR(3467, 3536) -3591 = NOR(3536, 1143) -3592 = NOR(3356, 3536) -3595 = NOR(3540, 3541) -3598 = NOR(3545, 3542) -3602 = NOR(1287, 3548) -3603 = NOR(3548, 3476) -3604 = NOR(3553, 3481) -3608 = NOR(3556, 3486) -3612 = NOR(3559, 3491) -3616 = NOR(3562, 3496) -3620 = NOR(3565, 3501) -3624 = NOR(3568, 3506) -3628 = NOR(3571, 3511) -3632 = NOR(3574, 3516) -3636 = NOR(3524, 3577) -3637 = NOR(3577, 3521) -3638 = NOR(3581, 3582) -3641 = NOR(3583, 1047) -3645 = NOR(3533, 3586) -3646 = NOR(3586, 1095) -3647 = NOR(3404, 3586) -3650 = NOR(3590, 3591) -3653 = NOR(3595, 3592) -3657 = NOR(3545, 3598) -3658 = NOR(3598, 3542) -3659 = NOR(3602, 3603) -3662 = NOR(3553, 3604) -3663 = NOR(3604, 3481) -3664 = NOR(3556, 3608) -3665 = NOR(3608, 3486) -3666 = NOR(3559, 3612) -3667 = NOR(3612, 3491) -3668 = NOR(3562, 3616) -3669 = NOR(3616, 3496) -3670 = NOR(3565, 3620) -3671 = NOR(3620, 3501) -3672 = NOR(3568, 3624) -3673 = NOR(3624, 3506) -3674 = NOR(3571, 3628) -3675 = NOR(3628, 3511) -3676 = NOR(3574, 3632) -3677 = NOR(3632, 3516) -3678 = NOR(3636, 3637) -3681 = NOR(3638, 999) -3685 = NOR(3583, 3641) -3686 = NOR(3641, 1047) -3687 = NOR(3461, 3641) -3690 = NOR(3645, 3646) -3693 = NOR(3650, 3647) -3697 = NOR(3595, 3653) -3698 = NOR(3653, 3592) -3699 = NOR(3657, 3658) -3702 = NOR(3659, 1242) -3706 = NOR(3662, 3663) -3709 = NOR(3664, 3665) -3712 = NOR(3666, 3667) -3715 = NOR(3668, 3669) -3718 = NOR(3670, 3671) -3721 = NOR(3672, 3673) -3724 = NOR(3674, 3675) -3727 = NOR(3676, 3677) -3730 = NOR(3678, 951) -3734 = NOR(3638, 3681) -3735 = NOR(3681, 999) -3736 = NOR(3527, 3681) -3739 = NOR(3685, 3686) -3742 = NOR(3690, 3687) -3746 = NOR(3650, 3693) -3747 = NOR(3693, 3647) -3748 = NOR(3697, 3698) -3751 = NOR(3699, 1194) -3755 = NOR(3659, 3702) -3756 = NOR(3702, 1242) -3757 = NOR(3548, 3702) -3760 = NOR(3706, 567) -3764 = NOR(3709, 615) -3768 = NOR(3712, 663) -3772 = NOR(3715, 711) -3776 = NOR(3718, 759) -3780 = NOR(3721, 807) -3784 = NOR(3724, 855) -3788 = NOR(3727, 903) -3792 = NOR(3678, 3730) -3793 = NOR(3730, 951) -3794 = NOR(3577, 3730) -3797 = NOR(3734, 3735) -3800 = NOR(3739, 3736) -3804 = NOR(3690, 3742) -3805 = NOR(3742, 3687) -3806 = NOR(3746, 3747) -3809 = NOR(3748, 1146) -3813 = NOR(3699, 3751) -3814 = NOR(3751, 1194) -3815 = NOR(3598, 3751) -3818 = NOR(3755, 3756) -3821 = NOR(1290, 3757) -3825 = NOR(3706, 3760) -3826 = NOR(3760, 567) -3827 = NOR(3604, 3760) -3830 = NOR(3709, 3764) -3831 = NOR(3764, 615) -3832 = NOR(3608, 3764) -3835 = NOR(3712, 3768) -3836 = NOR(3768, 663) -3837 = NOR(3612, 3768) -3840 = NOR(3715, 3772) -3841 = NOR(3772, 711) -3842 = NOR(3616, 3772) -3845 = NOR(3718, 3776) -3846 = NOR(3776, 759) -3847 = NOR(3620, 3776) -3850 = NOR(3721, 3780) -3851 = NOR(3780, 807) -3852 = NOR(3624, 3780) -3855 = NOR(3724, 3784) -3856 = NOR(3784, 855) -3857 = NOR(3628, 3784) -3860 = NOR(3727, 3788) -3861 = NOR(3788, 903) -3862 = NOR(3632, 3788) -3865 = NOR(3792, 3793) -3868 = NOR(3797, 3794) -3872 = NOR(3739, 3800) -3873 = NOR(3800, 3736) -3874 = NOR(3804, 3805) -3877 = NOR(3806, 1098) -3881 = NOR(3748, 3809) -3882 = NOR(3809, 1146) -3883 = NOR(3653, 3809) -3886 = NOR(3813, 3814) -3889 = NOR(3818, 3815) -3893 = NOR(1290, 3821) -3894 = NOR(3821, 3757) -3895 = NOR(3825, 3826) -3896 = NOR(3830, 3831) -3899 = NOR(3835, 3836) -3902 = NOR(3840, 3841) -3905 = NOR(3845, 3846) -3908 = NOR(3850, 3851) -3911 = NOR(3855, 3856) -3914 = NOR(3860, 3861) -3917 = NOR(3865, 3862) -3921 = NOR(3797, 3868) -3922 = NOR(3868, 3794) -3923 = NOR(3872, 3873) -3926 = NOR(3874, 1050) -3930 = NOR(3806, 3877) -3931 = NOR(3877, 1098) -3932 = NOR(3693, 3877) -3935 = NOR(3881, 3882) -3938 = NOR(3886, 3883) -3942 = NOR(3818, 3889) -3943 = NOR(3889, 3815) -3944 = NOR(3893, 3894) -3947 = NOR(3896, 3827) -3951 = NOR(3899, 3832) -3955 = NOR(3902, 3837) -3959 = NOR(3905, 3842) -3963 = NOR(3908, 3847) -3967 = NOR(3911, 3852) -3971 = NOR(3914, 3857) -3975 = NOR(3865, 3917) -3976 = NOR(3917, 3862) -3977 = NOR(3921, 3922) -3980 = NOR(3923, 1002) -3984 = NOR(3874, 3926) -3985 = NOR(3926, 1050) -3986 = NOR(3742, 3926) -3989 = NOR(3930, 3931) -3992 = NOR(3935, 3932) -3996 = NOR(3886, 3938) -3997 = NOR(3938, 3883) -3998 = NOR(3942, 3943) -4001 = NOR(3944, 1245) -4005 = NOR(3896, 3947) -4006 = NOR(3947, 3827) -4007 = NOR(3899, 3951) -4008 = NOR(3951, 3832) -4009 = NOR(3902, 3955) -4010 = NOR(3955, 3837) -4011 = NOR(3905, 3959) -4012 = NOR(3959, 3842) -4013 = NOR(3908, 3963) -4014 = NOR(3963, 3847) -4015 = NOR(3911, 3967) -4016 = NOR(3967, 3852) -4017 = NOR(3914, 3971) -4018 = NOR(3971, 3857) -4019 = NOR(3975, 3976) -4022 = NOR(3977, 954) -4026 = NOR(3923, 3980) -4027 = NOR(3980, 1002) -4028 = NOR(3800, 3980) -4031 = NOR(3984, 3985) -4034 = NOR(3989, 3986) -4038 = NOR(3935, 3992) -4039 = NOR(3992, 3932) -4040 = NOR(3996, 3997) -4043 = NOR(3998, 1197) -4047 = NOR(3944, 4001) -4048 = NOR(4001, 1245) -4049 = NOR(3821, 4001) -4052 = NOR(4005, 4006) -4055 = NOR(4007, 4008) -4058 = NOR(4009, 4010) -4061 = NOR(4011, 4012) -4064 = NOR(4013, 4014) -4067 = NOR(4015, 4016) -4070 = NOR(4017, 4018) -4073 = NOR(4019, 906) -4077 = NOR(3977, 4022) -4078 = NOR(4022, 954) -4079 = NOR(3868, 4022) -4082 = NOR(4026, 4027) -4085 = NOR(4031, 4028) -4089 = NOR(3989, 4034) -4090 = NOR(4034, 3986) -4091 = NOR(4038, 4039) -4094 = NOR(4040, 1149) -4098 = NOR(3998, 4043) -4099 = NOR(4043, 1197) -4100 = NOR(3889, 4043) -4103 = NOR(4047, 4048) -4106 = NOR(1293, 4049) -4110 = NOR(4052, 570) -4114 = NOR(4055, 618) -4118 = NOR(4058, 666) -4122 = NOR(4061, 714) -4126 = NOR(4064, 762) -4130 = NOR(4067, 810) -4134 = NOR(4070, 858) -4138 = NOR(4019, 4073) -4139 = NOR(4073, 906) -4140 = NOR(3917, 4073) -4143 = NOR(4077, 4078) -4146 = NOR(4082, 4079) -4150 = NOR(4031, 4085) -4151 = NOR(4085, 4028) -4152 = NOR(4089, 4090) -4155 = NOR(4091, 1101) -4159 = NOR(4040, 4094) -4160 = NOR(4094, 1149) -4161 = NOR(3938, 4094) -4164 = NOR(4098, 4099) -4167 = NOR(4103, 4100) -4171 = NOR(1293, 4106) -4172 = NOR(4106, 4049) -4173 = NOR(4052, 4110) -4174 = NOR(4110, 570) -4175 = NOR(3947, 4110) -4178 = NOR(4055, 4114) -4179 = NOR(4114, 618) -4180 = NOR(3951, 4114) -4183 = NOR(4058, 4118) -4184 = NOR(4118, 666) -4185 = NOR(3955, 4118) -4188 = NOR(4061, 4122) -4189 = NOR(4122, 714) -4190 = NOR(3959, 4122) -4193 = NOR(4064, 4126) -4194 = NOR(4126, 762) -4195 = NOR(3963, 4126) -4198 = NOR(4067, 4130) -4199 = NOR(4130, 810) -4200 = NOR(3967, 4130) -4203 = NOR(4070, 4134) -4204 = NOR(4134, 858) -4205 = NOR(3971, 4134) -4208 = NOR(4138, 4139) -4211 = NOR(4143, 4140) -4215 = NOR(4082, 4146) -4216 = NOR(4146, 4079) -4217 = NOR(4150, 4151) -4220 = NOR(4152, 1053) -4224 = NOR(4091, 4155) -4225 = NOR(4155, 1101) -4226 = NOR(3992, 4155) -4229 = NOR(4159, 4160) -4232 = NOR(4164, 4161) -4236 = NOR(4103, 4167) -4237 = NOR(4167, 4100) -4238 = NOR(4171, 4172) -4241 = NOR(4173, 4174) -4242 = NOR(4178, 4179) -4245 = NOR(4183, 4184) -4248 = NOR(4188, 4189) -4251 = NOR(4193, 4194) -4254 = NOR(4198, 4199) -4257 = NOR(4203, 4204) -4260 = NOR(4208, 4205) -4264 = NOR(4143, 4211) -4265 = NOR(4211, 4140) -4266 = NOR(4215, 4216) -4269 = NOR(4217, 1005) -4273 = NOR(4152, 4220) -4274 = NOR(4220, 1053) -4275 = NOR(4034, 4220) -4278 = NOR(4224, 4225) -4281 = NOR(4229, 4226) -4285 = NOR(4164, 4232) -4286 = NOR(4232, 4161) -4287 = NOR(4236, 4237) -4290 = NOR(4238, 1248) -4294 = NOR(4242, 4175) -4298 = NOR(4245, 4180) -4302 = NOR(4248, 4185) -4306 = NOR(4251, 4190) -4310 = NOR(4254, 4195) -4314 = NOR(4257, 4200) -4318 = NOR(4208, 4260) -4319 = NOR(4260, 4205) -4320 = NOR(4264, 4265) -4323 = NOR(4266, 957) -4327 = NOR(4217, 4269) -4328 = NOR(4269, 1005) -4329 = NOR(4085, 4269) -4332 = NOR(4273, 4274) -4335 = NOR(4278, 4275) -4339 = NOR(4229, 4281) -4340 = NOR(4281, 4226) -4341 = NOR(4285, 4286) -4344 = NOR(4287, 1200) -4348 = NOR(4238, 4290) -4349 = NOR(4290, 1248) -4350 = NOR(4106, 4290) -4353 = NOR(4242, 4294) -4354 = NOR(4294, 4175) -4355 = NOR(4245, 4298) -4356 = NOR(4298, 4180) -4357 = NOR(4248, 4302) -4358 = NOR(4302, 4185) -4359 = NOR(4251, 4306) -4360 = NOR(4306, 4190) -4361 = NOR(4254, 4310) -4362 = NOR(4310, 4195) -4363 = NOR(4257, 4314) -4364 = NOR(4314, 4200) -4365 = NOR(4318, 4319) -4368 = NOR(4320, 909) -4372 = NOR(4266, 4323) -4373 = NOR(4323, 957) -4374 = NOR(4146, 4323) -4377 = NOR(4327, 4328) -4380 = NOR(4332, 4329) -4384 = NOR(4278, 4335) -4385 = NOR(4335, 4275) -4386 = NOR(4339, 4340) -4389 = NOR(4341, 1152) -4393 = NOR(4287, 4344) -4394 = NOR(4344, 1200) -4395 = NOR(4167, 4344) -4398 = NOR(4348, 4349) -4401 = NOR(1296, 4350) -4405 = NOR(4353, 4354) -4408 = NOR(4355, 4356) -4411 = NOR(4357, 4358) -4414 = NOR(4359, 4360) -4417 = NOR(4361, 4362) -4420 = NOR(4363, 4364) -4423 = NOR(4365, 861) -4427 = NOR(4320, 4368) -4428 = NOR(4368, 909) -4429 = NOR(4211, 4368) -4432 = NOR(4372, 4373) -4435 = NOR(4377, 4374) -4439 = NOR(4332, 4380) -4440 = NOR(4380, 4329) -4441 = NOR(4384, 4385) -4444 = NOR(4386, 1104) -4448 = NOR(4341, 4389) -4449 = NOR(4389, 1152) -4450 = NOR(4232, 4389) -4453 = NOR(4393, 4394) -4456 = NOR(4398, 4395) -4460 = NOR(1296, 4401) -4461 = NOR(4401, 4350) -4462 = NOR(4405, 573) -4466 = NOR(4408, 621) -4470 = NOR(4411, 669) -4474 = NOR(4414, 717) -4478 = NOR(4417, 765) -4482 = NOR(4420, 813) -4486 = NOR(4365, 4423) -4487 = NOR(4423, 861) -4488 = NOR(4260, 4423) -4491 = NOR(4427, 4428) -4494 = NOR(4432, 4429) -4498 = NOR(4377, 4435) -4499 = NOR(4435, 4374) -4500 = NOR(4439, 4440) -4503 = NOR(4441, 1056) -4507 = NOR(4386, 4444) -4508 = NOR(4444, 1104) -4509 = NOR(4281, 4444) -4512 = NOR(4448, 4449) -4515 = NOR(4453, 4450) -4519 = NOR(4398, 4456) -4520 = NOR(4456, 4395) -4521 = NOR(4460, 4461) -4524 = NOR(4405, 4462) -4525 = NOR(4462, 573) -4526 = NOR(4294, 4462) -4529 = NOR(4408, 4466) -4530 = NOR(4466, 621) -4531 = NOR(4298, 4466) -4534 = NOR(4411, 4470) -4535 = NOR(4470, 669) -4536 = NOR(4302, 4470) -4539 = NOR(4414, 4474) -4540 = NOR(4474, 717) -4541 = NOR(4306, 4474) -4544 = NOR(4417, 4478) -4545 = NOR(4478, 765) -4546 = NOR(4310, 4478) -4549 = NOR(4420, 4482) -4550 = NOR(4482, 813) -4551 = NOR(4314, 4482) -4554 = NOR(4486, 4487) -4557 = NOR(4491, 4488) -4561 = NOR(4432, 4494) -4562 = NOR(4494, 4429) -4563 = NOR(4498, 4499) -4566 = NOR(4500, 1008) -4570 = NOR(4441, 4503) -4571 = NOR(4503, 1056) -4572 = NOR(4335, 4503) -4575 = NOR(4507, 4508) -4578 = NOR(4512, 4509) -4582 = NOR(4453, 4515) -4583 = NOR(4515, 4450) -4584 = NOR(4519, 4520) -4587 = NOR(4521, 1251) -4591 = NOR(4524, 4525) -4592 = NOR(4529, 4530) -4595 = NOR(4534, 4535) -4598 = NOR(4539, 4540) -4601 = NOR(4544, 4545) -4604 = NOR(4549, 4550) -4607 = NOR(4554, 4551) -4611 = NOR(4491, 4557) -4612 = NOR(4557, 4488) -4613 = NOR(4561, 4562) -4616 = NOR(4563, 960) -4620 = NOR(4500, 4566) -4621 = NOR(4566, 1008) -4622 = NOR(4380, 4566) -4625 = NOR(4570, 4571) -4628 = NOR(4575, 4572) -4632 = NOR(4512, 4578) -4633 = NOR(4578, 4509) -4634 = NOR(4582, 4583) -4637 = NOR(4584, 1203) -4641 = NOR(4521, 4587) -4642 = NOR(4587, 1251) -4643 = NOR(4401, 4587) -4646 = NOR(4592, 4526) -4650 = NOR(4595, 4531) -4654 = NOR(4598, 4536) -4658 = NOR(4601, 4541) -4662 = NOR(4604, 4546) -4666 = NOR(4554, 4607) -4667 = NOR(4607, 4551) -4668 = NOR(4611, 4612) -4671 = NOR(4613, 912) -4675 = NOR(4563, 4616) -4676 = NOR(4616, 960) -4677 = NOR(4435, 4616) -4680 = NOR(4620, 4621) -4683 = NOR(4625, 4622) -4687 = NOR(4575, 4628) -4688 = NOR(4628, 4572) -4689 = NOR(4632, 4633) -4692 = NOR(4634, 1155) -4696 = NOR(4584, 4637) -4697 = NOR(4637, 1203) -4698 = NOR(4456, 4637) -4701 = NOR(4641, 4642) -4704 = NOR(1299, 4643) -4708 = NOR(4592, 4646) -4709 = NOR(4646, 4526) -4710 = NOR(4595, 4650) -4711 = NOR(4650, 4531) -4712 = NOR(4598, 4654) -4713 = NOR(4654, 4536) -4714 = NOR(4601, 4658) -4715 = NOR(4658, 4541) -4716 = NOR(4604, 4662) -4717 = NOR(4662, 4546) -4718 = NOR(4666, 4667) -4721 = NOR(4668, 864) -4725 = NOR(4613, 4671) -4726 = NOR(4671, 912) -4727 = NOR(4494, 4671) -4730 = NOR(4675, 4676) -4733 = NOR(4680, 4677) -4737 = NOR(4625, 4683) -4738 = NOR(4683, 4622) -4739 = NOR(4687, 4688) -4742 = NOR(4689, 1107) -4746 = NOR(4634, 4692) -4747 = NOR(4692, 1155) -4748 = NOR(4515, 4692) -4751 = NOR(4696, 4697) -4754 = NOR(4701, 4698) -4758 = NOR(1299, 4704) -4759 = NOR(4704, 4643) -4760 = NOR(4708, 4709) -4763 = NOR(4710, 4711) -4766 = NOR(4712, 4713) -4769 = NOR(4714, 4715) -4772 = NOR(4716, 4717) -4775 = NOR(4718, 816) -4779 = NOR(4668, 4721) -4780 = NOR(4721, 864) -4781 = NOR(4557, 4721) -4784 = NOR(4725, 4726) -4787 = NOR(4730, 4727) -4791 = NOR(4680, 4733) -4792 = NOR(4733, 4677) -4793 = NOR(4737, 4738) -4796 = NOR(4739, 1059) -4800 = NOR(4689, 4742) -4801 = NOR(4742, 1107) -4802 = NOR(4578, 4742) -4805 = NOR(4746, 4747) -4808 = NOR(4751, 4748) -4812 = NOR(4701, 4754) -4813 = NOR(4754, 4698) -4814 = NOR(4758, 4759) -4817 = NOR(4760, 576) -4821 = NOR(4763, 624) -4825 = NOR(4766, 672) -4829 = NOR(4769, 720) -4833 = NOR(4772, 768) -4837 = NOR(4718, 4775) -4838 = NOR(4775, 816) -4839 = NOR(4607, 4775) -4842 = NOR(4779, 4780) -4845 = NOR(4784, 4781) -4849 = NOR(4730, 4787) -4850 = NOR(4787, 4727) -4851 = NOR(4791, 4792) -4854 = NOR(4793, 1011) -4858 = NOR(4739, 4796) -4859 = NOR(4796, 1059) -4860 = NOR(4628, 4796) -4863 = NOR(4800, 4801) -4866 = NOR(4805, 4802) -4870 = NOR(4751, 4808) -4871 = NOR(4808, 4748) -4872 = NOR(4812, 4813) -4875 = NOR(4814, 1254) -4879 = NOR(4760, 4817) -4880 = NOR(4817, 576) -4881 = NOR(4646, 4817) -4884 = NOR(4763, 4821) -4885 = NOR(4821, 624) -4886 = NOR(4650, 4821) -4889 = NOR(4766, 4825) -4890 = NOR(4825, 672) -4891 = NOR(4654, 4825) -4894 = NOR(4769, 4829) -4895 = NOR(4829, 720) -4896 = NOR(4658, 4829) -4899 = NOR(4772, 4833) -4900 = NOR(4833, 768) -4901 = NOR(4662, 4833) -4904 = NOR(4837, 4838) -4907 = NOR(4842, 4839) -4911 = NOR(4784, 4845) -4912 = NOR(4845, 4781) -4913 = NOR(4849, 4850) -4916 = NOR(4851, 963) -4920 = NOR(4793, 4854) -4921 = NOR(4854, 1011) -4922 = NOR(4683, 4854) -4925 = NOR(4858, 4859) -4928 = NOR(4863, 4860) -4932 = NOR(4805, 4866) -4933 = NOR(4866, 4802) -4934 = NOR(4870, 4871) -4937 = NOR(4872, 1206) -4941 = NOR(4814, 4875) -4942 = NOR(4875, 1254) -4943 = NOR(4704, 4875) -4946 = NOR(4879, 4880) -4947 = NOR(4884, 4885) -4950 = NOR(4889, 4890) -4953 = NOR(4894, 4895) -4956 = NOR(4899, 4900) -4959 = NOR(4904, 4901) -4963 = NOR(4842, 4907) -4964 = NOR(4907, 4839) -4965 = NOR(4911, 4912) -4968 = NOR(4913, 915) -4972 = NOR(4851, 4916) -4973 = NOR(4916, 963) -4974 = NOR(4733, 4916) -4977 = NOR(4920, 4921) -4980 = NOR(4925, 4922) -4984 = NOR(4863, 4928) -4985 = NOR(4928, 4860) -4986 = NOR(4932, 4933) -4989 = NOR(4934, 1158) -4993 = NOR(4872, 4937) -4994 = NOR(4937, 1206) -4995 = NOR(4754, 4937) -4998 = NOR(4941, 4942) -5001 = NOR(1302, 4943) -5005 = NOR(4947, 4881) -5009 = NOR(4950, 4886) -5013 = NOR(4953, 4891) -5017 = NOR(4956, 4896) -5021 = NOR(4904, 4959) -5022 = NOR(4959, 4901) -5023 = NOR(4963, 4964) -5026 = NOR(4965, 867) -5030 = NOR(4913, 4968) -5031 = NOR(4968, 915) -5032 = NOR(4787, 4968) -5035 = NOR(4972, 4973) -5038 = NOR(4977, 4974) -5042 = NOR(4925, 4980) -5043 = NOR(4980, 4922) -5044 = NOR(4984, 4985) -5047 = NOR(4986, 1110) -5051 = NOR(4934, 4989) -5052 = NOR(4989, 1158) -5053 = NOR(4808, 4989) -5056 = NOR(4993, 4994) -5059 = NOR(4998, 4995) -5063 = NOR(1302, 5001) -5064 = NOR(5001, 4943) -5065 = NOR(4947, 5005) -5066 = NOR(5005, 4881) -5067 = NOR(4950, 5009) -5068 = NOR(5009, 4886) -5069 = NOR(4953, 5013) -5070 = NOR(5013, 4891) -5071 = NOR(4956, 5017) -5072 = NOR(5017, 4896) -5073 = NOR(5021, 5022) -5076 = NOR(5023, 819) -5080 = NOR(4965, 5026) -5081 = NOR(5026, 867) -5082 = NOR(4845, 5026) -5085 = NOR(5030, 5031) -5088 = NOR(5035, 5032) -5092 = NOR(4977, 5038) -5093 = NOR(5038, 4974) -5094 = NOR(5042, 5043) -5097 = NOR(5044, 1062) -5101 = NOR(4986, 5047) -5102 = NOR(5047, 1110) -5103 = NOR(4866, 5047) -5106 = NOR(5051, 5052) -5109 = NOR(5056, 5053) -5113 = NOR(4998, 5059) -5114 = NOR(5059, 4995) -5115 = NOR(5063, 5064) -5118 = NOR(5065, 5066) -5121 = NOR(5067, 5068) -5124 = NOR(5069, 5070) -5127 = NOR(5071, 5072) -5130 = NOR(5073, 771) -5134 = NOR(5023, 5076) -5135 = NOR(5076, 819) -5136 = NOR(4907, 5076) -5139 = NOR(5080, 5081) -5142 = NOR(5085, 5082) -5146 = NOR(5035, 5088) -5147 = NOR(5088, 5032) -5148 = NOR(5092, 5093) -5151 = NOR(5094, 1014) -5155 = NOR(5044, 5097) -5156 = NOR(5097, 1062) -5157 = NOR(4928, 5097) -5160 = NOR(5101, 5102) -5163 = NOR(5106, 5103) -5167 = NOR(5056, 5109) -5168 = NOR(5109, 5053) -5169 = NOR(5113, 5114) -5172 = NOR(5115, 1257) -5176 = NOR(5118, 579) -5180 = NOR(5121, 627) -5184 = NOR(5124, 675) -5188 = NOR(5127, 723) -5192 = NOR(5073, 5130) -5193 = NOR(5130, 771) -5194 = NOR(4959, 5130) -5197 = NOR(5134, 5135) -5200 = NOR(5139, 5136) -5204 = NOR(5085, 5142) -5205 = NOR(5142, 5082) -5206 = NOR(5146, 5147) -5209 = NOR(5148, 966) -5213 = NOR(5094, 5151) -5214 = NOR(5151, 1014) -5215 = NOR(4980, 5151) -5218 = NOR(5155, 5156) -5221 = NOR(5160, 5157) -5225 = NOR(5106, 5163) -5226 = NOR(5163, 5103) -5227 = NOR(5167, 5168) -5230 = NOR(5169, 1209) -5234 = NOR(5115, 5172) -5235 = NOR(5172, 1257) -5236 = NOR(5001, 5172) -5239 = NOR(5118, 5176) -5240 = NOR(5176, 579) -5241 = NOR(5005, 5176) -5244 = NOR(5121, 5180) -5245 = NOR(5180, 627) -5246 = NOR(5009, 5180) -5249 = NOR(5124, 5184) -5250 = NOR(5184, 675) -5251 = NOR(5013, 5184) -5254 = NOR(5127, 5188) -5255 = NOR(5188, 723) -5256 = NOR(5017, 5188) -5259 = NOR(5192, 5193) -5262 = NOR(5197, 5194) -5266 = NOR(5139, 5200) -5267 = NOR(5200, 5136) -5268 = NOR(5204, 5205) -5271 = NOR(5206, 918) -5275 = NOR(5148, 5209) -5276 = NOR(5209, 966) -5277 = NOR(5038, 5209) -5280 = NOR(5213, 5214) -5283 = NOR(5218, 5215) -5287 = NOR(5160, 5221) -5288 = NOR(5221, 5157) -5289 = NOR(5225, 5226) -5292 = NOR(5227, 1161) -5296 = NOR(5169, 5230) -5297 = NOR(5230, 1209) -5298 = NOR(5059, 5230) -5301 = NOR(5234, 5235) -5304 = NOR(1305, 5236) -5308 = NOR(5239, 5240) -5309 = NOR(5244, 5245) -5312 = NOR(5249, 5250) -5315 = NOR(5254, 5255) -5318 = NOR(5259, 5256) -5322 = NOR(5197, 5262) -5323 = NOR(5262, 5194) -5324 = NOR(5266, 5267) -5327 = NOR(5268, 870) -5331 = NOR(5206, 5271) -5332 = NOR(5271, 918) -5333 = NOR(5088, 5271) -5336 = NOR(5275, 5276) -5339 = NOR(5280, 5277) -5343 = NOR(5218, 5283) -5344 = NOR(5283, 5215) -5345 = NOR(5287, 5288) -5348 = NOR(5289, 1113) -5352 = NOR(5227, 5292) -5353 = NOR(5292, 1161) -5354 = NOR(5109, 5292) -5357 = NOR(5296, 5297) -5360 = NOR(5301, 5298) -5364 = NOR(1305, 5304) -5365 = NOR(5304, 5236) -5366 = NOR(5309, 5241) -5370 = NOR(5312, 5246) -5374 = NOR(5315, 5251) -5378 = NOR(5259, 5318) -5379 = NOR(5318, 5256) -5380 = NOR(5322, 5323) -5383 = NOR(5324, 822) -5387 = NOR(5268, 5327) -5388 = NOR(5327, 870) -5389 = NOR(5142, 5327) -5392 = NOR(5331, 5332) -5395 = NOR(5336, 5333) -5399 = NOR(5280, 5339) -5400 = NOR(5339, 5277) -5401 = NOR(5343, 5344) -5404 = NOR(5345, 1065) -5408 = NOR(5289, 5348) -5409 = NOR(5348, 1113) -5410 = NOR(5163, 5348) -5413 = NOR(5352, 5353) -5416 = NOR(5357, 5354) -5420 = NOR(5301, 5360) -5421 = NOR(5360, 5298) -5422 = NOR(5364, 5365) -5425 = NOR(5309, 5366) -5426 = NOR(5366, 5241) -5427 = NOR(5312, 5370) -5428 = NOR(5370, 5246) -5429 = NOR(5315, 5374) -5430 = NOR(5374, 5251) -5431 = NOR(5378, 5379) -5434 = NOR(5380, 774) -5438 = NOR(5324, 5383) -5439 = NOR(5383, 822) -5440 = NOR(5200, 5383) -5443 = NOR(5387, 5388) -5446 = NOR(5392, 5389) -5450 = NOR(5336, 5395) -5451 = NOR(5395, 5333) -5452 = NOR(5399, 5400) -5455 = NOR(5401, 1017) -5459 = NOR(5345, 5404) -5460 = NOR(5404, 1065) -5461 = NOR(5221, 5404) -5464 = NOR(5408, 5409) -5467 = NOR(5413, 5410) -5471 = NOR(5357, 5416) -5472 = NOR(5416, 5354) -5473 = NOR(5420, 5421) -5476 = NOR(5422, 1260) -5480 = NOR(5425, 5426) -5483 = NOR(5427, 5428) -5486 = NOR(5429, 5430) -5489 = NOR(5431, 726) -5493 = NOR(5380, 5434) -5494 = NOR(5434, 774) -5495 = NOR(5262, 5434) -5498 = NOR(5438, 5439) -5501 = NOR(5443, 5440) -5505 = NOR(5392, 5446) -5506 = NOR(5446, 5389) -5507 = NOR(5450, 5451) -5510 = NOR(5452, 969) -5514 = NOR(5401, 5455) -5515 = NOR(5455, 1017) -5516 = NOR(5283, 5455) -5519 = NOR(5459, 5460) -5522 = NOR(5464, 5461) -5526 = NOR(5413, 5467) -5527 = NOR(5467, 5410) -5528 = NOR(5471, 5472) -5531 = NOR(5473, 1212) -5535 = NOR(5422, 5476) -5536 = NOR(5476, 1260) -5537 = NOR(5304, 5476) -5540 = NOR(5480, 582) -5544 = NOR(5483, 630) -5548 = NOR(5486, 678) -5552 = NOR(5431, 5489) -5553 = NOR(5489, 726) -5554 = NOR(5318, 5489) -5557 = NOR(5493, 5494) -5560 = NOR(5498, 5495) -5564 = NOR(5443, 5501) -5565 = NOR(5501, 5440) -5566 = NOR(5505, 5506) -5569 = NOR(5507, 921) -5573 = NOR(5452, 5510) -5574 = NOR(5510, 969) -5575 = NOR(5339, 5510) -5578 = NOR(5514, 5515) -5581 = NOR(5519, 5516) -5585 = NOR(5464, 5522) -5586 = NOR(5522, 5461) -5587 = NOR(5526, 5527) -5590 = NOR(5528, 1164) -5594 = NOR(5473, 5531) -5595 = NOR(5531, 1212) -5596 = NOR(5360, 5531) -5599 = NOR(5535, 5536) -5602 = NOR(1308, 5537) -5606 = NOR(5480, 5540) -5607 = NOR(5540, 582) -5608 = NOR(5366, 5540) -5611 = NOR(5483, 5544) -5612 = NOR(5544, 630) -5613 = NOR(5370, 5544) -5616 = NOR(5486, 5548) -5617 = NOR(5548, 678) -5618 = NOR(5374, 5548) -5621 = NOR(5552, 5553) -5624 = NOR(5557, 5554) -5628 = NOR(5498, 5560) -5629 = NOR(5560, 5495) -5630 = NOR(5564, 5565) -5633 = NOR(5566, 873) -5637 = NOR(5507, 5569) -5638 = NOR(5569, 921) -5639 = NOR(5395, 5569) -5642 = NOR(5573, 5574) -5645 = NOR(5578, 5575) -5649 = NOR(5519, 5581) -5650 = NOR(5581, 5516) -5651 = NOR(5585, 5586) -5654 = NOR(5587, 1116) -5658 = NOR(5528, 5590) -5659 = NOR(5590, 1164) -5660 = NOR(5416, 5590) -5663 = NOR(5594, 5595) -5666 = NOR(5599, 5596) -5670 = NOR(1308, 5602) -5671 = NOR(5602, 5537) -5672 = NOR(5606, 5607) -5673 = NOR(5611, 5612) -5676 = NOR(5616, 5617) -5679 = NOR(5621, 5618) -5683 = NOR(5557, 5624) -5684 = NOR(5624, 5554) -5685 = NOR(5628, 5629) -5688 = NOR(5630, 825) -5692 = NOR(5566, 5633) -5693 = NOR(5633, 873) -5694 = NOR(5446, 5633) -5697 = NOR(5637, 5638) -5700 = NOR(5642, 5639) -5704 = NOR(5578, 5645) -5705 = NOR(5645, 5575) -5706 = NOR(5649, 5650) -5709 = NOR(5651, 1068) -5713 = NOR(5587, 5654) -5714 = NOR(5654, 1116) -5715 = NOR(5467, 5654) -5718 = NOR(5658, 5659) -5721 = NOR(5663, 5660) -5725 = NOR(5599, 5666) -5726 = NOR(5666, 5596) -5727 = NOR(5670, 5671) -5730 = NOR(5673, 5608) -5734 = NOR(5676, 5613) -5738 = NOR(5621, 5679) -5739 = NOR(5679, 5618) -5740 = NOR(5683, 5684) -5743 = NOR(5685, 777) -5747 = NOR(5630, 5688) -5748 = NOR(5688, 825) -5749 = NOR(5501, 5688) -5752 = NOR(5692, 5693) -5755 = NOR(5697, 5694) -5759 = NOR(5642, 5700) -5760 = NOR(5700, 5639) -5761 = NOR(5704, 5705) -5764 = NOR(5706, 1020) -5768 = NOR(5651, 5709) -5769 = NOR(5709, 1068) -5770 = NOR(5522, 5709) -5773 = NOR(5713, 5714) -5776 = NOR(5718, 5715) -5780 = NOR(5663, 5721) -5781 = NOR(5721, 5660) -5782 = NOR(5725, 5726) -5785 = NOR(5673, 5730) -5786 = NOR(5730, 5608) -5787 = NOR(5676, 5734) -5788 = NOR(5734, 5613) -5789 = NOR(5738, 5739) -5792 = NOR(5740, 729) -5796 = NOR(5685, 5743) -5797 = NOR(5743, 777) -5798 = NOR(5560, 5743) -5801 = NOR(5747, 5748) -5804 = NOR(5752, 5749) -5808 = NOR(5697, 5755) -5809 = NOR(5755, 5694) -5810 = NOR(5759, 5760) -5813 = NOR(5761, 972) -5817 = NOR(5706, 5764) -5818 = NOR(5764, 1020) -5819 = NOR(5581, 5764) -5822 = NOR(5768, 5769) -5825 = NOR(5773, 5770) -5829 = NOR(5718, 5776) -5830 = NOR(5776, 5715) -5831 = NOR(5780, 5781) -5834 = NOR(5785, 5786) -5837 = NOR(5787, 5788) -5840 = NOR(5789, 681) -5844 = NOR(5740, 5792) -5845 = NOR(5792, 729) -5846 = NOR(5624, 5792) -5849 = NOR(5796, 5797) -5852 = NOR(5801, 5798) -5856 = NOR(5752, 5804) -5857 = NOR(5804, 5749) -5858 = NOR(5808, 5809) -5861 = NOR(5810, 924) -5865 = NOR(5761, 5813) -5866 = NOR(5813, 972) -5867 = NOR(5645, 5813) -5870 = NOR(5817, 5818) -5873 = NOR(5822, 5819) -5877 = NOR(5773, 5825) -5878 = NOR(5825, 5770) -5879 = NOR(5829, 5830) -5882 = NOR(5834, 585) -5886 = NOR(5837, 633) -5890 = NOR(5789, 5840) -5891 = NOR(5840, 681) -5892 = NOR(5679, 5840) -5895 = NOR(5844, 5845) -5898 = NOR(5849, 5846) -5902 = NOR(5801, 5852) -5903 = NOR(5852, 5798) -5904 = NOR(5856, 5857) -5907 = NOR(5858, 876) -5911 = NOR(5810, 5861) -5912 = NOR(5861, 924) -5913 = NOR(5700, 5861) -5916 = NOR(5865, 5866) -5919 = NOR(5870, 5867) -5923 = NOR(5822, 5873) -5924 = NOR(5873, 5819) -5925 = NOR(5877, 5878) -5928 = NOR(5834, 5882) -5929 = NOR(5882, 585) -5930 = NOR(5730, 5882) -5933 = NOR(5837, 5886) -5934 = NOR(5886, 633) -5935 = NOR(5734, 5886) -5938 = NOR(5890, 5891) -5941 = NOR(5895, 5892) -5945 = NOR(5849, 5898) -5946 = NOR(5898, 5846) -5947 = NOR(5902, 5903) -5950 = NOR(5904, 828) -5954 = NOR(5858, 5907) -5955 = NOR(5907, 876) -5956 = NOR(5755, 5907) -5959 = NOR(5911, 5912) -5962 = NOR(5916, 5913) -5966 = NOR(5870, 5919) -5967 = NOR(5919, 5867) -5968 = NOR(5923, 5924) -5971 = NOR(5928, 5929) -5972 = NOR(5933, 5934) -5975 = NOR(5938, 5935) -5979 = NOR(5895, 5941) -5980 = NOR(5941, 5892) -5981 = NOR(5945, 5946) -5984 = NOR(5947, 780) -5988 = NOR(5904, 5950) -5989 = NOR(5950, 828) -5990 = NOR(5804, 5950) -5993 = NOR(5954, 5955) -5996 = NOR(5959, 5956) -6000 = NOR(5916, 5962) -6001 = NOR(5962, 5913) -6002 = NOR(5966, 5967) -6005 = NOR(5972, 5930) -6009 = NOR(5938, 5975) -6010 = NOR(5975, 5935) -6011 = NOR(5979, 5980) -6014 = NOR(5981, 732) -6018 = NOR(5947, 5984) -6019 = NOR(5984, 780) -6020 = NOR(5852, 5984) -6023 = NOR(5988, 5989) -6026 = NOR(5993, 5990) -6030 = NOR(5959, 5996) -6031 = NOR(5996, 5956) -6032 = NOR(6000, 6001) -6035 = NOR(5972, 6005) -6036 = NOR(6005, 5930) -6037 = NOR(6009, 6010) -6040 = NOR(6011, 684) -6044 = NOR(5981, 6014) -6045 = NOR(6014, 732) -6046 = NOR(5898, 6014) -6049 = NOR(6018, 6019) -6052 = NOR(6023, 6020) -6056 = NOR(5993, 6026) -6057 = NOR(6026, 5990) -6058 = NOR(6030, 6031) -6061 = NOR(6035, 6036) -6064 = NOR(6037, 636) -6068 = NOR(6011, 6040) -6069 = NOR(6040, 684) -6070 = NOR(5941, 6040) -6073 = NOR(6044, 6045) -6076 = NOR(6049, 6046) -6080 = NOR(6023, 6052) -6081 = NOR(6052, 6020) -6082 = NOR(6056, 6057) -6085 = NOR(6061, 588) -6089 = NOR(6037, 6064) -6090 = NOR(6064, 636) -6091 = NOR(5975, 6064) -6094 = NOR(6068, 6069) -6097 = NOR(6073, 6070) -6101 = NOR(6049, 6076) -6102 = NOR(6076, 6046) -6103 = NOR(6080, 6081) -6106 = NOR(6061, 6085) -6107 = NOR(6085, 588) -6108 = NOR(6005, 6085) -6111 = NOR(6089, 6090) -6114 = NOR(6094, 6091) -6118 = NOR(6073, 6097) -6119 = NOR(6097, 6070) -6120 = NOR(6101, 6102) -6123 = NOR(6106, 6107) -6124 = NOR(6111, 6108) -6128 = NOR(6094, 6114) -6129 = NOR(6114, 6091) -6130 = NOR(6118, 6119) -6133 = NOR(6111, 6124) -6134 = NOR(6124, 6108) -6135 = NOR(6128, 6129) -6138 = NOR(6133, 6134) -6141 = NOT(6138) -6145 = NOR(6138, 6141) -6146 = NOT(6141) -6147 = NOR(6124, 6141) -6150 = NOR(6145, 6146) -6151 = NOR(6135, 6147) -6155 = NOR(6135, 6151) -6156 = NOR(6151, 6147) -6157 = NOR(6114, 6151) -6160 = NOR(6155, 6156) -6161 = NOR(6130, 6157) -6165 = NOR(6130, 6161) -6166 = NOR(6161, 6157) -6167 = NOR(6097, 6161) -6170 = NOR(6165, 6166) -6171 = NOR(6120, 6167) -6175 = NOR(6120, 6171) -6176 = NOR(6171, 6167) -6177 = NOR(6076, 6171) -6180 = NOR(6175, 6176) -6181 = NOR(6103, 6177) -6185 = NOR(6103, 6181) -6186 = NOR(6181, 6177) -6187 = NOR(6052, 6181) -6190 = NOR(6185, 6186) -6191 = NOR(6082, 6187) -6195 = NOR(6082, 6191) -6196 = NOR(6191, 6187) -6197 = NOR(6026, 6191) -6200 = NOR(6195, 6196) -6201 = NOR(6058, 6197) -6205 = NOR(6058, 6201) -6206 = NOR(6201, 6197) -6207 = NOR(5996, 6201) -6210 = NOR(6205, 6206) -6211 = NOR(6032, 6207) -6215 = NOR(6032, 6211) -6216 = NOR(6211, 6207) -6217 = NOR(5962, 6211) -6220 = NOR(6215, 6216) -6221 = NOR(6002, 6217) -6225 = NOR(6002, 6221) -6226 = NOR(6221, 6217) -6227 = NOR(5919, 6221) -6230 = NOR(6225, 6226) -6231 = NOR(5968, 6227) -6235 = NOR(5968, 6231) -6236 = NOR(6231, 6227) -6237 = NOR(5873, 6231) -6240 = NOR(6235, 6236) -6241 = NOR(5925, 6237) -6245 = NOR(5925, 6241) -6246 = NOR(6241, 6237) -6247 = NOR(5825, 6241) -6250 = NOR(6245, 6246) -6251 = NOR(5879, 6247) -6255 = NOR(5879, 6251) -6256 = NOR(6251, 6247) -6257 = NOR(5776, 6251) -6260 = NOR(6255, 6256) -6261 = NOR(5831, 6257) -6265 = NOR(5831, 6261) -6266 = NOR(6261, 6257) -6267 = NOR(5721, 6261) -6270 = NOR(6265, 6266) -6271 = NOR(5782, 6267) -6275 = NOR(5782, 6271) -6276 = NOR(6271, 6267) -6277 = NOR(5666, 6271) -6280 = NOR(6275, 6276) -6281 = NOR(5727, 6277) -6285 = NOR(5727, 6281) -6286 = NOR(6281, 6277) -6287 = NOR(5602, 6281) -6288 = NOR(6285, 6286) diff --git a/ISCAS85/c7552.bench b/ISCAS85/c7552.bench deleted file mode 100644 index 98a2a3f..0000000 --- a/ISCAS85/c7552.bench +++ /dev/null @@ -1,3831 +0,0 @@ -# c7552 - -INPUT(1) -INPUT(5) -INPUT(9) -INPUT(12) -INPUT(15) -INPUT(18) -INPUT(23) -INPUT(26) -INPUT(29) -INPUT(32) -INPUT(35) -INPUT(38) -INPUT(41) -INPUT(44) -INPUT(47) -INPUT(50) -INPUT(53) -INPUT(54) -INPUT(55) -INPUT(56) -INPUT(57) -INPUT(58) -INPUT(59) -INPUT(60) -INPUT(61) -INPUT(62) -INPUT(63) -INPUT(64) -INPUT(65) -INPUT(66) -INPUT(69) -INPUT(70) -INPUT(73) -INPUT(74) -INPUT(75) -INPUT(76) -INPUT(77) -INPUT(78) -INPUT(79) -INPUT(80) -INPUT(81) -INPUT(82) -INPUT(83) -INPUT(84) -INPUT(85) -INPUT(86) -INPUT(87) -INPUT(88) -INPUT(89) -INPUT(94) -INPUT(97) -INPUT(100) -INPUT(103) -INPUT(106) -INPUT(109) -INPUT(110) -INPUT(111) -INPUT(112) -INPUT(113) -INPUT(114) -INPUT(115) -INPUT(118) -INPUT(121) -INPUT(124) -INPUT(127) -INPUT(130) -INPUT(133) -INPUT(134) -INPUT(135) -INPUT(138) -INPUT(141) -INPUT(144) -INPUT(147) -INPUT(150) -INPUT(151) -INPUT(152) -INPUT(153) -INPUT(154) -INPUT(155) -INPUT(156) -INPUT(157) -INPUT(158) -INPUT(159) -INPUT(160) -INPUT(161) -INPUT(162) -INPUT(163) -INPUT(164) -INPUT(165) -INPUT(166) -INPUT(167) -INPUT(168) -INPUT(169) -INPUT(170) -INPUT(171) -INPUT(172) -INPUT(173) -INPUT(174) -INPUT(175) -INPUT(176) -INPUT(177) -INPUT(178) -INPUT(179) -INPUT(180) -INPUT(181) -INPUT(182) -INPUT(183) -INPUT(184) -INPUT(185) -INPUT(186) -INPUT(187) -INPUT(188) -INPUT(189) -INPUT(190) -INPUT(191) -INPUT(192) -INPUT(193) -INPUT(194) -INPUT(195) -INPUT(196) -INPUT(197) -INPUT(198) -INPUT(199) -INPUT(200) -INPUT(201) -INPUT(202) -INPUT(203) -INPUT(204) -INPUT(205) -INPUT(206) -INPUT(207) -INPUT(208) -INPUT(209) -INPUT(210) -INPUT(211) -INPUT(212) -INPUT(213) -INPUT(214) -INPUT(215) -INPUT(216) -INPUT(217) -INPUT(218) -INPUT(219) -INPUT(220) -INPUT(221) -INPUT(222) -INPUT(223) -INPUT(224) -INPUT(225) -INPUT(226) -INPUT(227) -INPUT(228) -INPUT(229) -INPUT(230) -INPUT(231) -INPUT(232) -INPUT(233) -INPUT(234) -INPUT(235) -INPUT(236) -INPUT(237) -INPUT(238) -INPUT(239) -INPUT(240) -INPUT(241) -INPUT(242) -INPUT(245) -INPUT(248) -INPUT(251) -INPUT(254) -INPUT(257) -INPUT(260) -INPUT(263) -INPUT(267) -INPUT(271) -INPUT(274) -INPUT(277) -INPUT(280) -INPUT(283) -INPUT(286) -INPUT(289) -INPUT(293) -INPUT(296) -INPUT(299) -INPUT(303) -INPUT(307) -INPUT(310) -INPUT(313) -INPUT(316) -INPUT(319) -INPUT(322) -INPUT(325) -INPUT(328) -INPUT(331) -INPUT(334) -INPUT(337) -INPUT(340) -INPUT(343) -INPUT(346) -INPUT(349) -INPUT(352) -INPUT(355) -INPUT(358) -INPUT(361) -INPUT(364) -INPUT(367) -INPUT(382) - -OUTPUT(241) -OUTPUT(387) -OUTPUT(388) -OUTPUT(478) -OUTPUT(482) -OUTPUT(484) -OUTPUT(486) -OUTPUT(489) -OUTPUT(492) -OUTPUT(501) -OUTPUT(505) -OUTPUT(507) -OUTPUT(509) -OUTPUT(511) -OUTPUT(513) -OUTPUT(515) -OUTPUT(517) -OUTPUT(519) -OUTPUT(535) -OUTPUT(537) -OUTPUT(539) -OUTPUT(541) -OUTPUT(543) -OUTPUT(545) -OUTPUT(547) -OUTPUT(549) -OUTPUT(551) -OUTPUT(553) -OUTPUT(556) -OUTPUT(559) -OUTPUT(561) -OUTPUT(563) -OUTPUT(565) -OUTPUT(567) -OUTPUT(569) -OUTPUT(571) -OUTPUT(573) -OUTPUT(582) -OUTPUT(643) -OUTPUT(707) -OUTPUT(813) -OUTPUT(881) -OUTPUT(882) -OUTPUT(883) -OUTPUT(884) -OUTPUT(885) -OUTPUT(889) -OUTPUT(945) -OUTPUT(1110) -OUTPUT(1111) -OUTPUT(1112) -OUTPUT(1113) -OUTPUT(1114) -OUTPUT(1489) -OUTPUT(1490) -OUTPUT(1781) -OUTPUT(10025) -OUTPUT(10101) -OUTPUT(10102) -OUTPUT(10103) -OUTPUT(10104) -OUTPUT(10109) -OUTPUT(10110) -OUTPUT(10111) -OUTPUT(10112) -OUTPUT(10350) -OUTPUT(10351) -OUTPUT(10352) -OUTPUT(10353) -OUTPUT(10574) -OUTPUT(10575) -OUTPUT(10576) -OUTPUT(10628) -OUTPUT(10632) -OUTPUT(10641) -OUTPUT(10704) -OUTPUT(10706) -OUTPUT(10711) -OUTPUT(10712) -OUTPUT(10713) -OUTPUT(10714) -OUTPUT(10715) -OUTPUT(10716) -OUTPUT(10717) -OUTPUT(10718) -OUTPUT(10729) -OUTPUT(10759) -OUTPUT(10760) -OUTPUT(10761) -OUTPUT(10762) -OUTPUT(10763) -OUTPUT(10827) -OUTPUT(10837) -OUTPUT(10838) -OUTPUT(10839) -OUTPUT(10840) -OUTPUT(10868) -OUTPUT(10869) -OUTPUT(10870) -OUTPUT(10871) -OUTPUT(10905) -OUTPUT(10906) -OUTPUT(10907) -OUTPUT(10908) -OUTPUT(11333) -OUTPUT(11334) -OUTPUT(11340) -OUTPUT(11342) - -387 = BUFF(1) -388 = BUFF(1) -467 = NOT(57) -469 = AND(134, 133) -478 = BUFF(248) -482 = BUFF(254) -484 = BUFF(257) -486 = BUFF(260) -489 = BUFF(263) -492 = BUFF(267) -494 = AND(162, 172, 188, 199) -501 = BUFF(274) -505 = BUFF(280) -507 = BUFF(283) -509 = BUFF(286) -511 = BUFF(289) -513 = BUFF(293) -515 = BUFF(296) -517 = BUFF(299) -519 = BUFF(303) -528 = AND(150, 184, 228, 240) -535 = BUFF(307) -537 = BUFF(310) -539 = BUFF(313) -541 = BUFF(316) -543 = BUFF(319) -545 = BUFF(322) -547 = BUFF(325) -549 = BUFF(328) -551 = BUFF(331) -553 = BUFF(334) -556 = BUFF(337) -559 = BUFF(343) -561 = BUFF(346) -563 = BUFF(349) -565 = BUFF(352) -567 = BUFF(355) -569 = BUFF(358) -571 = BUFF(361) -573 = BUFF(364) -575 = AND(183, 182, 185, 186) -578 = AND(210, 152, 218, 230) -582 = NOT(15) -585 = NOT(5) -590 = BUFF(1) -593 = NOT(5) -596 = NOT(5) -599 = NOT(289) -604 = NOT(299) -609 = NOT(303) -614 = BUFF(38) -625 = BUFF(15) -628 = NAND(12, 9) -632 = NAND(12, 9) -636 = BUFF(38) -641 = NOT(245) -642 = NOT(248) -643 = BUFF(251) -644 = NOT(251) -651 = NOT(254) -657 = BUFF(106) -660 = NOT(257) -666 = NOT(260) -672 = NOT(263) -673 = NOT(267) -674 = NOT(106) -676 = BUFF(18) -682 = BUFF(18) -688 = AND(382, 263) -689 = BUFF(18) -695 = NOT(18) -700 = NAND(382, 267) -705 = NOT(271) -706 = NOT(274) -707 = BUFF(277) -708 = NOT(277) -715 = NOT(280) -721 = NOT(283) -727 = NOT(286) -733 = NOT(289) -734 = NOT(293) -742 = NOT(296) -748 = NOT(299) -749 = NOT(303) -750 = BUFF(367) -758 = NOT(307) -759 = NOT(310) -762 = NOT(313) -768 = NOT(316) -774 = NOT(319) -780 = NOT(322) -786 = NOT(325) -794 = NOT(328) -800 = NOT(331) -806 = NOT(334) -812 = NOT(337) -813 = BUFF(340) -814 = NOT(340) -821 = NOT(343) -827 = NOT(346) -833 = NOT(349) -839 = NOT(352) -845 = NOT(355) -853 = NOT(358) -859 = NOT(361) -865 = NOT(364) -871 = BUFF(367) -881 = NAND(467, 585) -882 = NOT(528) -883 = NOT(578) -884 = NOT(575) -885 = NOT(494) -886 = AND(528, 578) -887 = AND(575, 494) -889 = BUFF(590) -945 = BUFF(657) -957 = NOT(688) -1028 = AND(382, 641) -1029 = NAND(382, 705) -1109 = AND(469, 596) -1110 = NAND(242, 593) -1111 = NOT(625) -1112 = NAND(242, 593) -1113 = NAND(469, 596) -1114 = NOT(625) -1115 = NOT(871) -1116 = BUFF(590) -1119 = BUFF(628) -1125 = BUFF(682) -1132 = BUFF(628) -1136 = BUFF(682) -1141 = BUFF(628) -1147 = BUFF(682) -1154 = BUFF(632) -1160 = BUFF(676) -1167 = AND(700, 614) -1174 = AND(700, 614) -1175 = BUFF(682) -1182 = BUFF(676) -1189 = NOT(657) -1194 = NOT(676) -1199 = NOT(682) -1206 = NOT(689) -1211 = BUFF(695) -1218 = NOT(750) -1222 = NOT(1028) -1227 = BUFF(632) -1233 = BUFF(676) -1240 = BUFF(632) -1244 = BUFF(676) -1249 = BUFF(689) -1256 = BUFF(689) -1263 = BUFF(695) -1270 = BUFF(689) -1277 = BUFF(689) -1284 = BUFF(700) -1287 = BUFF(614) -1290 = BUFF(666) -1293 = BUFF(660) -1296 = BUFF(651) -1299 = BUFF(614) -1302 = BUFF(644) -1305 = BUFF(700) -1308 = BUFF(614) -1311 = BUFF(614) -1314 = BUFF(666) -1317 = BUFF(660) -1320 = BUFF(651) -1323 = BUFF(644) -1326 = BUFF(609) -1329 = BUFF(604) -1332 = BUFF(742) -1335 = BUFF(599) -1338 = BUFF(727) -1341 = BUFF(721) -1344 = BUFF(715) -1347 = BUFF(734) -1350 = BUFF(708) -1353 = BUFF(609) -1356 = BUFF(604) -1359 = BUFF(742) -1362 = BUFF(734) -1365 = BUFF(599) -1368 = BUFF(727) -1371 = BUFF(721) -1374 = BUFF(715) -1377 = BUFF(708) -1380 = BUFF(806) -1383 = BUFF(800) -1386 = BUFF(794) -1389 = BUFF(786) -1392 = BUFF(780) -1395 = BUFF(774) -1398 = BUFF(768) -1401 = BUFF(762) -1404 = BUFF(806) -1407 = BUFF(800) -1410 = BUFF(794) -1413 = BUFF(780) -1416 = BUFF(774) -1419 = BUFF(768) -1422 = BUFF(762) -1425 = BUFF(786) -1428 = BUFF(636) -1431 = BUFF(636) -1434 = BUFF(865) -1437 = BUFF(859) -1440 = BUFF(853) -1443 = BUFF(845) -1446 = BUFF(839) -1449 = BUFF(833) -1452 = BUFF(827) -1455 = BUFF(821) -1458 = BUFF(814) -1461 = BUFF(865) -1464 = BUFF(859) -1467 = BUFF(853) -1470 = BUFF(839) -1473 = BUFF(833) -1476 = BUFF(827) -1479 = BUFF(821) -1482 = BUFF(845) -1485 = BUFF(814) -1489 = NOT(1109) -1490 = BUFF(1116) -1537 = AND(957, 614) -1551 = AND(614, 957) -1649 = AND(1029, 636) -1703 = BUFF(957) -1708 = NOR(957, 614) -1713 = BUFF(957) -1721 = NOR(614, 957) -1758 = BUFF(1029) -1781 = AND(163, 1116) -1782 = AND(170, 1125) -1783 = NOT(1125) -1789 = NOT(1136) -1793 = AND(169, 1125) -1794 = AND(168, 1125) -1795 = AND(167, 1125) -1796 = AND(166, 1136) -1797 = AND(165, 1136) -1798 = AND(164, 1136) -1799 = NOT(1147) -1805 = NOT(1160) -1811 = AND(177, 1147) -1812 = AND(176, 1147) -1813 = AND(175, 1147) -1814 = AND(174, 1147) -1815 = AND(173, 1147) -1816 = AND(157, 1160) -1817 = AND(156, 1160) -1818 = AND(155, 1160) -1819 = AND(154, 1160) -1820 = AND(153, 1160) -1821 = NOT(1284) -1822 = NOT(1287) -1828 = NOT(1290) -1829 = NOT(1293) -1830 = NOT(1296) -1832 = NOT(1299) -1833 = NOT(1302) -1834 = NOT(1305) -1835 = NOT(1308) -1839 = NOT(1311) -1840 = NOT(1314) -1841 = NOT(1317) -1842 = NOT(1320) -1843 = NOT(1323) -1845 = NOT(1175) -1851 = NOT(1182) -1857 = AND(181, 1175) -1858 = AND(171, 1175) -1859 = AND(180, 1175) -1860 = AND(179, 1175) -1861 = AND(178, 1175) -1862 = AND(161, 1182) -1863 = AND(151, 1182) -1864 = AND(160, 1182) -1865 = AND(159, 1182) -1866 = AND(158, 1182) -1867 = NOT(1326) -1868 = NOT(1329) -1869 = NOT(1332) -1870 = NOT(1335) -1871 = NOT(1338) -1872 = NOT(1341) -1873 = NOT(1344) -1874 = NOT(1347) -1875 = NOT(1350) -1876 = NOT(1353) -1877 = NOT(1356) -1878 = NOT(1359) -1879 = NOT(1362) -1880 = NOT(1365) -1881 = NOT(1368) -1882 = NOT(1371) -1883 = NOT(1374) -1884 = NOT(1377) -1885 = BUFF(1199) -1892 = BUFF(1194) -1899 = BUFF(1199) -1906 = BUFF(1194) -1913 = NOT(1211) -1919 = BUFF(1194) -1926 = AND(44, 1211) -1927 = AND(41, 1211) -1928 = AND(29, 1211) -1929 = AND(26, 1211) -1930 = AND(23, 1211) -1931 = NOT(1380) -1932 = NOT(1383) -1933 = NOT(1386) -1934 = NOT(1389) -1935 = NOT(1392) -1936 = NOT(1395) -1937 = NOT(1398) -1938 = NOT(1401) -1939 = NOT(1404) -1940 = NOT(1407) -1941 = NOT(1410) -1942 = NOT(1413) -1943 = NOT(1416) -1944 = NOT(1419) -1945 = NOT(1422) -1946 = NOT(1425) -1947 = NOT(1233) -1953 = NOT(1244) -1957 = AND(209, 1233) -1958 = AND(216, 1233) -1959 = AND(215, 1233) -1960 = AND(214, 1233) -1961 = AND(213, 1244) -1962 = AND(212, 1244) -1963 = AND(211, 1244) -1965 = NOT(1428) -1966 = AND(1222, 636) -1967 = NOT(1431) -1968 = NOT(1434) -1969 = NOT(1437) -1970 = NOT(1440) -1971 = NOT(1443) -1972 = NOT(1446) -1973 = NOT(1449) -1974 = NOT(1452) -1975 = NOT(1455) -1976 = NOT(1458) -1977 = NOT(1249) -1983 = NOT(1256) -1989 = AND(642, 1249) -1990 = AND(644, 1249) -1991 = AND(651, 1249) -1992 = AND(674, 1249) -1993 = AND(660, 1249) -1994 = AND(666, 1256) -1995 = AND(672, 1256) -1996 = AND(673, 1256) -1997 = NOT(1263) -2003 = BUFF(1194) -2010 = AND(47, 1263) -2011 = AND(35, 1263) -2012 = AND(32, 1263) -2013 = AND(50, 1263) -2014 = AND(66, 1263) -2015 = NOT(1461) -2016 = NOT(1464) -2017 = NOT(1467) -2018 = NOT(1470) -2019 = NOT(1473) -2020 = NOT(1476) -2021 = NOT(1479) -2022 = NOT(1482) -2023 = NOT(1485) -2024 = BUFF(1206) -2031 = BUFF(1206) -2038 = BUFF(1206) -2045 = BUFF(1206) -2052 = NOT(1270) -2058 = NOT(1277) -2064 = AND(706, 1270) -2065 = AND(708, 1270) -2066 = AND(715, 1270) -2067 = AND(721, 1270) -2068 = AND(727, 1270) -2069 = AND(733, 1277) -2070 = AND(734, 1277) -2071 = AND(742, 1277) -2072 = AND(748, 1277) -2073 = AND(749, 1277) -2074 = BUFF(1189) -2081 = BUFF(1189) -2086 = BUFF(1222) -2107 = NAND(1287, 1821) -2108 = NAND(1284, 1822) -2110 = NOT(1703) -2111 = NAND(1703, 1832) -2112 = NAND(1308, 1834) -2113 = NAND(1305, 1835) -2114 = NOT(1713) -2115 = NAND(1713, 1839) -2117 = NOT(1721) -2171 = NOT(1758) -2172 = NAND(1758, 1965) -2230 = NOT(1708) -2231 = BUFF(1537) -2235 = BUFF(1551) -2239 = OR(1783, 1782) -2240 = OR(1783, 1125) -2241 = OR(1783, 1793) -2242 = OR(1783, 1794) -2243 = OR(1783, 1795) -2244 = OR(1789, 1796) -2245 = OR(1789, 1797) -2246 = OR(1789, 1798) -2247 = OR(1799, 1811) -2248 = OR(1799, 1812) -2249 = OR(1799, 1813) -2250 = OR(1799, 1814) -2251 = OR(1799, 1815) -2252 = OR(1805, 1816) -2253 = OR(1805, 1817) -2254 = OR(1805, 1818) -2255 = OR(1805, 1819) -2256 = OR(1805, 1820) -2257 = NAND(2107, 2108) -2267 = NOT(2074) -2268 = NAND(1299, 2110) -2269 = NAND(2112, 2113) -2274 = NAND(1311, 2114) -2275 = NOT(2081) -2277 = AND(141, 1845) -2278 = AND(147, 1845) -2279 = AND(138, 1845) -2280 = AND(144, 1845) -2281 = AND(135, 1845) -2282 = AND(141, 1851) -2283 = AND(147, 1851) -2284 = AND(138, 1851) -2285 = AND(144, 1851) -2286 = AND(135, 1851) -2287 = NOT(1885) -2293 = NOT(1892) -2299 = AND(103, 1885) -2300 = AND(130, 1885) -2301 = AND(127, 1885) -2302 = AND(124, 1885) -2303 = AND(100, 1885) -2304 = AND(103, 1892) -2305 = AND(130, 1892) -2306 = AND(127, 1892) -2307 = AND(124, 1892) -2308 = AND(100, 1892) -2309 = NOT(1899) -2315 = NOT(1906) -2321 = AND(115, 1899) -2322 = AND(118, 1899) -2323 = AND(97, 1899) -2324 = AND(94, 1899) -2325 = AND(121, 1899) -2326 = AND(115, 1906) -2327 = AND(118, 1906) -2328 = AND(97, 1906) -2329 = AND(94, 1906) -2330 = AND(121, 1906) -2331 = NOT(1919) -2337 = AND(208, 1913) -2338 = AND(198, 1913) -2339 = AND(207, 1913) -2340 = AND(206, 1913) -2341 = AND(205, 1913) -2342 = AND(44, 1919) -2343 = AND(41, 1919) -2344 = AND(29, 1919) -2345 = AND(26, 1919) -2346 = AND(23, 1919) -2347 = OR(1947, 1233) -2348 = OR(1947, 1957) -2349 = OR(1947, 1958) -2350 = OR(1947, 1959) -2351 = OR(1947, 1960) -2352 = OR(1953, 1961) -2353 = OR(1953, 1962) -2354 = OR(1953, 1963) -2355 = NAND(1428, 2171) -2356 = NOT(2086) -2357 = NAND(2086, 1967) -2358 = AND(114, 1977) -2359 = AND(113, 1977) -2360 = AND(111, 1977) -2361 = AND(87, 1977) -2362 = AND(112, 1977) -2363 = AND(88, 1983) -2364 = AND(245, 1983) -2365 = AND(271, 1983) -2366 = AND(759, 1983) -2367 = AND(70, 1983) -2368 = NOT(2003) -2374 = AND(193, 1997) -2375 = AND(192, 1997) -2376 = AND(191, 1997) -2377 = AND(190, 1997) -2378 = AND(189, 1997) -2379 = AND(47, 2003) -2380 = AND(35, 2003) -2381 = AND(32, 2003) -2382 = AND(50, 2003) -2383 = AND(66, 2003) -2384 = NOT(2024) -2390 = NOT(2031) -2396 = AND(58, 2024) -2397 = AND(77, 2024) -2398 = AND(78, 2024) -2399 = AND(59, 2024) -2400 = AND(81, 2024) -2401 = AND(80, 2031) -2402 = AND(79, 2031) -2403 = AND(60, 2031) -2404 = AND(61, 2031) -2405 = AND(62, 2031) -2406 = NOT(2038) -2412 = NOT(2045) -2418 = AND(69, 2038) -2419 = AND(70, 2038) -2420 = AND(74, 2038) -2421 = AND(76, 2038) -2422 = AND(75, 2038) -2423 = AND(73, 2045) -2424 = AND(53, 2045) -2425 = AND(54, 2045) -2426 = AND(55, 2045) -2427 = AND(56, 2045) -2428 = AND(82, 2052) -2429 = AND(65, 2052) -2430 = AND(83, 2052) -2431 = AND(84, 2052) -2432 = AND(85, 2052) -2433 = AND(64, 2058) -2434 = AND(63, 2058) -2435 = AND(86, 2058) -2436 = AND(109, 2058) -2437 = AND(110, 2058) -2441 = AND(2239, 1119) -2442 = AND(2240, 1119) -2446 = AND(2241, 1119) -2450 = AND(2242, 1119) -2454 = AND(2243, 1119) -2458 = AND(2244, 1132) -2462 = AND(2247, 1141) -2466 = AND(2248, 1141) -2470 = AND(2249, 1141) -2474 = AND(2250, 1141) -2478 = AND(2251, 1141) -2482 = AND(2252, 1154) -2488 = AND(2253, 1154) -2496 = AND(2254, 1154) -2502 = AND(2255, 1154) -2508 = AND(2256, 1154) -2523 = NAND(2268, 2111) -2533 = NAND(2274, 2115) -2537 = NOT(2235) -2538 = OR(2278, 1858) -2542 = OR(2279, 1859) -2546 = OR(2280, 1860) -2550 = OR(2281, 1861) -2554 = OR(2283, 1863) -2561 = OR(2284, 1864) -2567 = OR(2285, 1865) -2573 = OR(2286, 1866) -2604 = OR(2338, 1927) -2607 = OR(2339, 1928) -2611 = OR(2340, 1929) -2615 = OR(2341, 1930) -2619 = AND(2348, 1227) -2626 = AND(2349, 1227) -2632 = AND(2350, 1227) -2638 = AND(2351, 1227) -2644 = AND(2352, 1240) -2650 = NAND(2355, 2172) -2653 = NAND(1431, 2356) -2654 = OR(2359, 1990) -2658 = OR(2360, 1991) -2662 = OR(2361, 1992) -2666 = OR(2362, 1993) -2670 = OR(2363, 1994) -2674 = OR(2366, 1256) -2680 = OR(2367, 1256) -2688 = OR(2374, 2010) -2692 = OR(2375, 2011) -2696 = OR(2376, 2012) -2700 = OR(2377, 2013) -2704 = OR(2378, 2014) -2728 = AND(2347, 1227) -2729 = OR(2429, 2065) -2733 = OR(2430, 2066) -2737 = OR(2431, 2067) -2741 = OR(2432, 2068) -2745 = OR(2433, 2069) -2749 = OR(2434, 2070) -2753 = OR(2435, 2071) -2757 = OR(2436, 2072) -2761 = OR(2437, 2073) -2765 = NOT(2231) -2766 = AND(2354, 1240) -2769 = AND(2353, 1240) -2772 = AND(2246, 1132) -2775 = AND(2245, 1132) -2778 = OR(2282, 1862) -2781 = OR(2358, 1989) -2784 = OR(2365, 1996) -2787 = OR(2364, 1995) -2790 = OR(2337, 1926) -2793 = OR(2277, 1857) -2796 = OR(2428, 2064) -2866 = AND(2257, 1537) -2867 = AND(2257, 1537) -2868 = AND(2257, 1537) -2869 = AND(2257, 1537) -2878 = AND(2269, 1551) -2913 = AND(204, 2287) -2914 = AND(203, 2287) -2915 = AND(202, 2287) -2916 = AND(201, 2287) -2917 = AND(200, 2287) -2918 = AND(235, 2293) -2919 = AND(234, 2293) -2920 = AND(233, 2293) -2921 = AND(232, 2293) -2922 = AND(231, 2293) -2923 = AND(197, 2309) -2924 = AND(187, 2309) -2925 = AND(196, 2309) -2926 = AND(195, 2309) -2927 = AND(194, 2309) -2928 = AND(227, 2315) -2929 = AND(217, 2315) -2930 = AND(226, 2315) -2931 = AND(225, 2315) -2932 = AND(224, 2315) -2933 = AND(239, 2331) -2934 = AND(229, 2331) -2935 = AND(238, 2331) -2936 = AND(237, 2331) -2937 = AND(236, 2331) -2988 = NAND(2653, 2357) -3005 = AND(223, 2368) -3006 = AND(222, 2368) -3007 = AND(221, 2368) -3008 = AND(220, 2368) -3009 = AND(219, 2368) -3020 = AND(812, 2384) -3021 = AND(814, 2384) -3022 = AND(821, 2384) -3023 = AND(827, 2384) -3024 = AND(833, 2384) -3025 = AND(839, 2390) -3026 = AND(845, 2390) -3027 = AND(853, 2390) -3028 = AND(859, 2390) -3029 = AND(865, 2390) -3032 = AND(758, 2406) -3033 = AND(759, 2406) -3034 = AND(762, 2406) -3035 = AND(768, 2406) -3036 = AND(774, 2406) -3037 = AND(780, 2412) -3038 = AND(786, 2412) -3039 = AND(794, 2412) -3040 = AND(800, 2412) -3041 = AND(806, 2412) -3061 = BUFF(2257) -3064 = BUFF(2257) -3067 = BUFF(2269) -3070 = BUFF(2269) -3073 = NOT(2728) -3080 = NOT(2441) -3096 = AND(666, 2644) -3097 = AND(660, 2638) -3101 = AND(1189, 2632) -3107 = AND(651, 2626) -3114 = AND(644, 2619) -3122 = AND(2523, 2257) -3126 = OR(1167, 2866) -3130 = AND(2523, 2257) -3131 = OR(1167, 2869) -3134 = AND(2523, 2257) -3135 = NOT(2533) -3136 = AND(666, 2644) -3137 = AND(660, 2638) -3140 = AND(1189, 2632) -3144 = AND(651, 2626) -3149 = AND(644, 2619) -3155 = AND(2533, 2269) -3159 = OR(1174, 2878) -3167 = NOT(2778) -3168 = AND(609, 2508) -3169 = AND(604, 2502) -3173 = AND(742, 2496) -3178 = AND(734, 2488) -3184 = AND(599, 2482) -3185 = AND(727, 2573) -3189 = AND(721, 2567) -3195 = AND(715, 2561) -3202 = AND(708, 2554) -3210 = AND(609, 2508) -3211 = AND(604, 2502) -3215 = AND(742, 2496) -3221 = AND(2488, 734) -3228 = AND(599, 2482) -3229 = AND(727, 2573) -3232 = AND(721, 2567) -3236 = AND(715, 2561) -3241 = AND(708, 2554) -3247 = OR(2913, 2299) -3251 = OR(2914, 2300) -3255 = OR(2915, 2301) -3259 = OR(2916, 2302) -3263 = OR(2917, 2303) -3267 = OR(2918, 2304) -3273 = OR(2919, 2305) -3281 = OR(2920, 2306) -3287 = OR(2921, 2307) -3293 = OR(2922, 2308) -3299 = OR(2924, 2322) -3303 = OR(2925, 2323) -3307 = OR(2926, 2324) -3311 = OR(2927, 2325) -3315 = OR(2929, 2327) -3322 = OR(2930, 2328) -3328 = OR(2931, 2329) -3334 = OR(2932, 2330) -3340 = OR(2934, 2343) -3343 = OR(2935, 2344) -3349 = OR(2936, 2345) -3355 = OR(2937, 2346) -3361 = AND(2761, 2478) -3362 = AND(2757, 2474) -3363 = AND(2753, 2470) -3364 = AND(2749, 2466) -3365 = AND(2745, 2462) -3366 = AND(2741, 2550) -3367 = AND(2737, 2546) -3368 = AND(2733, 2542) -3369 = AND(2729, 2538) -3370 = AND(2670, 2458) -3371 = AND(2666, 2454) -3372 = AND(2662, 2450) -3373 = AND(2658, 2446) -3374 = AND(2654, 2442) -3375 = AND(2988, 2650) -3379 = AND(2650, 1966) -3380 = NOT(2781) -3381 = AND(695, 2604) -3384 = OR(3005, 2379) -3390 = OR(3006, 2380) -3398 = OR(3007, 2381) -3404 = OR(3008, 2382) -3410 = OR(3009, 2383) -3416 = OR(3021, 2397) -3420 = OR(3022, 2398) -3424 = OR(3023, 2399) -3428 = OR(3024, 2400) -3432 = OR(3025, 2401) -3436 = OR(3026, 2402) -3440 = OR(3027, 2403) -3444 = OR(3028, 2404) -3448 = OR(3029, 2405) -3452 = NOT(2790) -3453 = NOT(2793) -3454 = OR(3034, 2420) -3458 = OR(3035, 2421) -3462 = OR(3036, 2422) -3466 = OR(3037, 2423) -3470 = OR(3038, 2424) -3474 = OR(3039, 2425) -3478 = OR(3040, 2426) -3482 = OR(3041, 2427) -3486 = NOT(2796) -3487 = BUFF(2644) -3490 = BUFF(2638) -3493 = BUFF(2632) -3496 = BUFF(2626) -3499 = BUFF(2619) -3502 = BUFF(2523) -3507 = NOR(1167, 2868) -3510 = BUFF(2523) -3515 = NOR(644, 2619) -3518 = BUFF(2644) -3521 = BUFF(2638) -3524 = BUFF(2632) -3527 = BUFF(2626) -3530 = BUFF(2619) -3535 = BUFF(2619) -3539 = BUFF(2632) -3542 = BUFF(2626) -3545 = BUFF(2644) -3548 = BUFF(2638) -3551 = NOT(2766) -3552 = NOT(2769) -3553 = BUFF(2442) -3557 = BUFF(2450) -3560 = BUFF(2446) -3563 = BUFF(2458) -3566 = BUFF(2454) -3569 = NOT(2772) -3570 = NOT(2775) -3571 = BUFF(2554) -3574 = BUFF(2567) -3577 = BUFF(2561) -3580 = BUFF(2482) -3583 = BUFF(2573) -3586 = BUFF(2496) -3589 = BUFF(2488) -3592 = BUFF(2508) -3595 = BUFF(2502) -3598 = BUFF(2508) -3601 = BUFF(2502) -3604 = BUFF(2496) -3607 = BUFF(2482) -3610 = BUFF(2573) -3613 = BUFF(2567) -3616 = BUFF(2561) -3619 = BUFF(2488) -3622 = BUFF(2554) -3625 = NOR(734, 2488) -3628 = NOR(708, 2554) -3631 = BUFF(2508) -3634 = BUFF(2502) -3637 = BUFF(2496) -3640 = BUFF(2488) -3643 = BUFF(2482) -3646 = BUFF(2573) -3649 = BUFF(2567) -3652 = BUFF(2561) -3655 = BUFF(2554) -3658 = NOR(2488, 734) -3661 = BUFF(2674) -3664 = BUFF(2674) -3667 = BUFF(2761) -3670 = BUFF(2478) -3673 = BUFF(2757) -3676 = BUFF(2474) -3679 = BUFF(2753) -3682 = BUFF(2470) -3685 = BUFF(2745) -3688 = BUFF(2462) -3691 = BUFF(2741) -3694 = BUFF(2550) -3697 = BUFF(2737) -3700 = BUFF(2546) -3703 = BUFF(2733) -3706 = BUFF(2542) -3709 = BUFF(2749) -3712 = BUFF(2466) -3715 = BUFF(2729) -3718 = BUFF(2538) -3721 = BUFF(2704) -3724 = BUFF(2700) -3727 = BUFF(2696) -3730 = BUFF(2688) -3733 = BUFF(2692) -3736 = BUFF(2670) -3739 = BUFF(2458) -3742 = BUFF(2666) -3745 = BUFF(2454) -3748 = BUFF(2662) -3751 = BUFF(2450) -3754 = BUFF(2658) -3757 = BUFF(2446) -3760 = BUFF(2654) -3763 = BUFF(2442) -3766 = BUFF(2654) -3769 = BUFF(2662) -3772 = BUFF(2658) -3775 = BUFF(2670) -3778 = BUFF(2666) -3781 = NOT(2784) -3782 = NOT(2787) -3783 = OR(2928, 2326) -3786 = OR(2933, 2342) -3789 = OR(2923, 2321) -3792 = BUFF(2688) -3795 = BUFF(2696) -3798 = BUFF(2692) -3801 = BUFF(2704) -3804 = BUFF(2700) -3807 = BUFF(2604) -3810 = BUFF(2611) -3813 = BUFF(2607) -3816 = BUFF(2615) -3819 = BUFF(2538) -3822 = BUFF(2546) -3825 = BUFF(2542) -3828 = BUFF(2462) -3831 = BUFF(2550) -3834 = BUFF(2470) -3837 = BUFF(2466) -3840 = BUFF(2478) -3843 = BUFF(2474) -3846 = BUFF(2615) -3849 = BUFF(2611) -3852 = BUFF(2607) -3855 = BUFF(2680) -3858 = BUFF(2729) -3861 = BUFF(2737) -3864 = BUFF(2733) -3867 = BUFF(2745) -3870 = BUFF(2741) -3873 = BUFF(2753) -3876 = BUFF(2749) -3879 = BUFF(2761) -3882 = BUFF(2757) -3885 = OR(3033, 2419) -3888 = OR(3032, 2418) -3891 = OR(3020, 2396) -3953 = NAND(3067, 2117) -3954 = NOT(3067) -3955 = NAND(3070, 2537) -3956 = NOT(3070) -3958 = NOT(3073) -3964 = NOT(3080) -4193 = OR(1649, 3379) -4303 = OR(1167, 2867, 3130) -4308 = NOT(3061) -4313 = NOT(3064) -4326 = NAND(2769, 3551) -4327 = NAND(2766, 3552) -4333 = NAND(2775, 3569) -4334 = NAND(2772, 3570) -4411 = NAND(2787, 3781) -4412 = NAND(2784, 3782) -4463 = NAND(3487, 1828) -4464 = NOT(3487) -4465 = NAND(3490, 1829) -4466 = NOT(3490) -4467 = NAND(3493, 2267) -4468 = NOT(3493) -4469 = NAND(3496, 1830) -4470 = NOT(3496) -4471 = NAND(3499, 1833) -4472 = NOT(3499) -4473 = NOT(3122) -4474 = NOT(3126) -4475 = NAND(3518, 1840) -4476 = NOT(3518) -4477 = NAND(3521, 1841) -4478 = NOT(3521) -4479 = NAND(3524, 2275) -4480 = NOT(3524) -4481 = NAND(3527, 1842) -4482 = NOT(3527) -4483 = NAND(3530, 1843) -4484 = NOT(3530) -4485 = NOT(3155) -4486 = NOT(3159) -4487 = NAND(1721, 3954) -4488 = NAND(2235, 3956) -4489 = NOT(3535) -4490 = NAND(3535, 3958) -4491 = NOT(3539) -4492 = NOT(3542) -4493 = NOT(3545) -4494 = NOT(3548) -4495 = NOT(3553) -4496 = NAND(3553, 3964) -4497 = NOT(3557) -4498 = NOT(3560) -4499 = NOT(3563) -4500 = NOT(3566) -4501 = NOT(3571) -4502 = NAND(3571, 3167) -4503 = NOT(3574) -4504 = NOT(3577) -4505 = NOT(3580) -4506 = NOT(3583) -4507 = NAND(3598, 1867) -4508 = NOT(3598) -4509 = NAND(3601, 1868) -4510 = NOT(3601) -4511 = NAND(3604, 1869) -4512 = NOT(3604) -4513 = NAND(3607, 1870) -4514 = NOT(3607) -4515 = NAND(3610, 1871) -4516 = NOT(3610) -4517 = NAND(3613, 1872) -4518 = NOT(3613) -4519 = NAND(3616, 1873) -4520 = NOT(3616) -4521 = NAND(3619, 1874) -4522 = NOT(3619) -4523 = NAND(3622, 1875) -4524 = NOT(3622) -4525 = NAND(3631, 1876) -4526 = NOT(3631) -4527 = NAND(3634, 1877) -4528 = NOT(3634) -4529 = NAND(3637, 1878) -4530 = NOT(3637) -4531 = NAND(3640, 1879) -4532 = NOT(3640) -4533 = NAND(3643, 1880) -4534 = NOT(3643) -4535 = NAND(3646, 1881) -4536 = NOT(3646) -4537 = NAND(3649, 1882) -4538 = NOT(3649) -4539 = NAND(3652, 1883) -4540 = NOT(3652) -4541 = NAND(3655, 1884) -4542 = NOT(3655) -4543 = NOT(3658) -4544 = AND(806, 3293) -4545 = AND(800, 3287) -4549 = AND(794, 3281) -4555 = AND(3273, 786) -4562 = AND(780, 3267) -4563 = AND(774, 3355) -4566 = AND(768, 3349) -4570 = AND(762, 3343) -4575 = NOT(3661) -4576 = AND(806, 3293) -4577 = AND(800, 3287) -4581 = AND(794, 3281) -4586 = AND(786, 3273) -4592 = AND(780, 3267) -4593 = AND(774, 3355) -4597 = AND(768, 3349) -4603 = AND(762, 3343) -4610 = NOT(3664) -4611 = NOT(3667) -4612 = NOT(3670) -4613 = NOT(3673) -4614 = NOT(3676) -4615 = NOT(3679) -4616 = NOT(3682) -4617 = NOT(3685) -4618 = NOT(3688) -4619 = NOT(3691) -4620 = NOT(3694) -4621 = NOT(3697) -4622 = NOT(3700) -4623 = NOT(3703) -4624 = NOT(3706) -4625 = NOT(3709) -4626 = NOT(3712) -4627 = NOT(3715) -4628 = NOT(3718) -4629 = NOT(3721) -4630 = AND(3448, 2704) -4631 = NOT(3724) -4632 = AND(3444, 2700) -4633 = NOT(3727) -4634 = AND(3440, 2696) -4635 = AND(3436, 2692) -4636 = NOT(3730) -4637 = AND(3432, 2688) -4638 = AND(3428, 3311) -4639 = AND(3424, 3307) -4640 = AND(3420, 3303) -4641 = AND(3416, 3299) -4642 = NOT(3733) -4643 = NOT(3736) -4644 = NOT(3739) -4645 = NOT(3742) -4646 = NOT(3745) -4647 = NOT(3748) -4648 = NOT(3751) -4649 = NOT(3754) -4650 = NOT(3757) -4651 = NOT(3760) -4652 = NOT(3763) -4653 = NOT(3375) -4656 = AND(865, 3410) -4657 = AND(859, 3404) -4661 = AND(853, 3398) -4667 = AND(3390, 845) -4674 = AND(839, 3384) -4675 = AND(833, 3334) -4678 = AND(827, 3328) -4682 = AND(821, 3322) -4687 = AND(814, 3315) -4693 = NOT(3766) -4694 = NAND(3766, 3380) -4695 = NOT(3769) -4696 = NOT(3772) -4697 = NOT(3775) -4698 = NOT(3778) -4699 = NOT(3783) -4700 = NOT(3786) -4701 = AND(865, 3410) -4702 = AND(859, 3404) -4706 = AND(853, 3398) -4711 = AND(845, 3390) -4717 = AND(839, 3384) -4718 = AND(833, 3334) -4722 = AND(827, 3328) -4728 = AND(821, 3322) -4735 = AND(814, 3315) -4743 = NOT(3789) -4744 = NOT(3792) -4745 = NOT(3807) -4746 = NAND(3807, 3452) -4747 = NOT(3810) -4748 = NOT(3813) -4749 = NOT(3816) -4750 = NOT(3819) -4751 = NAND(3819, 3453) -4752 = NOT(3822) -4753 = NOT(3825) -4754 = NOT(3828) -4755 = NOT(3831) -4756 = AND(3482, 3263) -4757 = AND(3478, 3259) -4758 = AND(3474, 3255) -4759 = AND(3470, 3251) -4760 = AND(3466, 3247) -4761 = NOT(3846) -4762 = AND(3462, 2615) -4763 = NOT(3849) -4764 = AND(3458, 2611) -4765 = NOT(3852) -4766 = AND(3454, 2607) -4767 = AND(2680, 3381) -4768 = NOT(3855) -4769 = AND(3340, 695) -4775 = NOT(3858) -4776 = NAND(3858, 3486) -4777 = NOT(3861) -4778 = NOT(3864) -4779 = NOT(3867) -4780 = NOT(3870) -4781 = NOT(3885) -4782 = NOT(3888) -4783 = NOT(3891) -4784 = OR(3131, 3134) -4789 = NOT(3502) -4790 = NOT(3131) -4793 = NOT(3507) -4794 = NOT(3510) -4795 = NOT(3515) -4796 = BUFF(3114) -4799 = NOT(3586) -4800 = NOT(3589) -4801 = NOT(3592) -4802 = NOT(3595) -4803 = NAND(4326, 4327) -4806 = NAND(4333, 4334) -4809 = NOT(3625) -4810 = BUFF(3178) -4813 = NOT(3628) -4814 = BUFF(3202) -4817 = BUFF(3221) -4820 = BUFF(3293) -4823 = BUFF(3287) -4826 = BUFF(3281) -4829 = BUFF(3273) -4832 = BUFF(3267) -4835 = BUFF(3355) -4838 = BUFF(3349) -4841 = BUFF(3343) -4844 = NOR(3273, 786) -4847 = BUFF(3293) -4850 = BUFF(3287) -4853 = BUFF(3281) -4856 = BUFF(3267) -4859 = BUFF(3355) -4862 = BUFF(3349) -4865 = BUFF(3343) -4868 = BUFF(3273) -4871 = NOR(786, 3273) -4874 = BUFF(3448) -4877 = BUFF(3444) -4880 = BUFF(3440) -4883 = BUFF(3432) -4886 = BUFF(3428) -4889 = BUFF(3311) -4892 = BUFF(3424) -4895 = BUFF(3307) -4898 = BUFF(3420) -4901 = BUFF(3303) -4904 = BUFF(3436) -4907 = BUFF(3416) -4910 = BUFF(3299) -4913 = BUFF(3410) -4916 = BUFF(3404) -4919 = BUFF(3398) -4922 = BUFF(3390) -4925 = BUFF(3384) -4928 = BUFF(3334) -4931 = BUFF(3328) -4934 = BUFF(3322) -4937 = BUFF(3315) -4940 = NOR(3390, 845) -4943 = BUFF(3315) -4946 = BUFF(3328) -4949 = BUFF(3322) -4952 = BUFF(3384) -4955 = BUFF(3334) -4958 = BUFF(3398) -4961 = BUFF(3390) -4964 = BUFF(3410) -4967 = BUFF(3404) -4970 = BUFF(3340) -4973 = BUFF(3349) -4976 = BUFF(3343) -4979 = BUFF(3267) -4982 = BUFF(3355) -4985 = BUFF(3281) -4988 = BUFF(3273) -4991 = BUFF(3293) -4994 = BUFF(3287) -4997 = NAND(4411, 4412) -5000 = BUFF(3410) -5003 = BUFF(3404) -5006 = BUFF(3398) -5009 = BUFF(3384) -5012 = BUFF(3334) -5015 = BUFF(3328) -5018 = BUFF(3322) -5021 = BUFF(3390) -5024 = BUFF(3315) -5027 = NOR(845, 3390) -5030 = NOR(814, 3315) -5033 = BUFF(3299) -5036 = BUFF(3307) -5039 = BUFF(3303) -5042 = BUFF(3311) -5045 = NOT(3795) -5046 = NOT(3798) -5047 = NOT(3801) -5048 = NOT(3804) -5049 = BUFF(3247) -5052 = BUFF(3255) -5055 = BUFF(3251) -5058 = BUFF(3263) -5061 = BUFF(3259) -5064 = NOT(3834) -5065 = NOT(3837) -5066 = NOT(3840) -5067 = NOT(3843) -5068 = BUFF(3482) -5071 = BUFF(3263) -5074 = BUFF(3478) -5077 = BUFF(3259) -5080 = BUFF(3474) -5083 = BUFF(3255) -5086 = BUFF(3466) -5089 = BUFF(3247) -5092 = BUFF(3462) -5095 = BUFF(3458) -5098 = BUFF(3454) -5101 = BUFF(3470) -5104 = BUFF(3251) -5107 = BUFF(3381) -5110 = NOT(3873) -5111 = NOT(3876) -5112 = NOT(3879) -5113 = NOT(3882) -5114 = BUFF(3458) -5117 = BUFF(3454) -5120 = BUFF(3466) -5123 = BUFF(3462) -5126 = BUFF(3474) -5129 = BUFF(3470) -5132 = BUFF(3482) -5135 = BUFF(3478) -5138 = BUFF(3416) -5141 = BUFF(3424) -5144 = BUFF(3420) -5147 = BUFF(3432) -5150 = BUFF(3428) -5153 = BUFF(3440) -5156 = BUFF(3436) -5159 = BUFF(3448) -5162 = BUFF(3444) -5165 = NAND(4486, 4485) -5166 = NAND(4474, 4473) -5167 = NAND(1290, 4464) -5168 = NAND(1293, 4466) -5169 = NAND(2074, 4468) -5170 = NAND(1296, 4470) -5171 = NAND(1302, 4472) -5172 = NAND(1314, 4476) -5173 = NAND(1317, 4478) -5174 = NAND(2081, 4480) -5175 = NAND(1320, 4482) -5176 = NAND(1323, 4484) -5177 = NAND(3953, 4487) -5178 = NAND(3955, 4488) -5179 = NAND(3073, 4489) -5180 = NAND(3542, 4491) -5181 = NAND(3539, 4492) -5182 = NAND(3548, 4493) -5183 = NAND(3545, 4494) -5184 = NAND(3080, 4495) -5185 = NAND(3560, 4497) -5186 = NAND(3557, 4498) -5187 = NAND(3566, 4499) -5188 = NAND(3563, 4500) -5189 = NAND(2778, 4501) -5190 = NAND(3577, 4503) -5191 = NAND(3574, 4504) -5192 = NAND(3583, 4505) -5193 = NAND(3580, 4506) -5196 = NAND(1326, 4508) -5197 = NAND(1329, 4510) -5198 = NAND(1332, 4512) -5199 = NAND(1335, 4514) -5200 = NAND(1338, 4516) -5201 = NAND(1341, 4518) -5202 = NAND(1344, 4520) -5203 = NAND(1347, 4522) -5204 = NAND(1350, 4524) -5205 = NAND(1353, 4526) -5206 = NAND(1356, 4528) -5207 = NAND(1359, 4530) -5208 = NAND(1362, 4532) -5209 = NAND(1365, 4534) -5210 = NAND(1368, 4536) -5211 = NAND(1371, 4538) -5212 = NAND(1374, 4540) -5213 = NAND(1377, 4542) -5283 = NAND(3670, 4611) -5284 = NAND(3667, 4612) -5285 = NAND(3676, 4613) -5286 = NAND(3673, 4614) -5287 = NAND(3682, 4615) -5288 = NAND(3679, 4616) -5289 = NAND(3688, 4617) -5290 = NAND(3685, 4618) -5291 = NAND(3694, 4619) -5292 = NAND(3691, 4620) -5293 = NAND(3700, 4621) -5294 = NAND(3697, 4622) -5295 = NAND(3706, 4623) -5296 = NAND(3703, 4624) -5297 = NAND(3712, 4625) -5298 = NAND(3709, 4626) -5299 = NAND(3718, 4627) -5300 = NAND(3715, 4628) -5314 = NAND(3739, 4643) -5315 = NAND(3736, 4644) -5316 = NAND(3745, 4645) -5317 = NAND(3742, 4646) -5318 = NAND(3751, 4647) -5319 = NAND(3748, 4648) -5320 = NAND(3757, 4649) -5321 = NAND(3754, 4650) -5322 = NAND(3763, 4651) -5323 = NAND(3760, 4652) -5324 = NOT(4193) -5363 = NAND(2781, 4693) -5364 = NAND(3772, 4695) -5365 = NAND(3769, 4696) -5366 = NAND(3778, 4697) -5367 = NAND(3775, 4698) -5425 = NAND(2790, 4745) -5426 = NAND(3813, 4747) -5427 = NAND(3810, 4748) -5429 = NAND(2793, 4750) -5430 = NAND(3825, 4752) -5431 = NAND(3822, 4753) -5432 = NAND(3831, 4754) -5433 = NAND(3828, 4755) -5451 = NAND(2796, 4775) -5452 = NAND(3864, 4777) -5453 = NAND(3861, 4778) -5454 = NAND(3870, 4779) -5455 = NAND(3867, 4780) -5456 = NAND(3888, 4781) -5457 = NAND(3885, 4782) -5469 = NOT(4303) -5474 = NAND(3589, 4799) -5475 = NAND(3586, 4800) -5476 = NAND(3595, 4801) -5477 = NAND(3592, 4802) -5571 = NAND(3798, 5045) -5572 = NAND(3795, 5046) -5573 = NAND(3804, 5047) -5574 = NAND(3801, 5048) -5584 = NAND(3837, 5064) -5585 = NAND(3834, 5065) -5586 = NAND(3843, 5066) -5587 = NAND(3840, 5067) -5602 = NAND(3876, 5110) -5603 = NAND(3873, 5111) -5604 = NAND(3882, 5112) -5605 = NAND(3879, 5113) -5631 = NAND(5324, 4653) -5632 = NAND(4463, 5167) -5640 = NAND(4465, 5168) -5654 = NAND(4467, 5169) -5670 = NAND(4469, 5170) -5683 = NAND(4471, 5171) -5690 = NAND(4475, 5172) -5697 = NAND(4477, 5173) -5707 = NAND(4479, 5174) -5718 = NAND(4481, 5175) -5728 = NAND(4483, 5176) -5735 = NOT(5177) -5736 = NAND(5179, 4490) -5740 = NAND(5180, 5181) -5744 = NAND(5182, 5183) -5747 = NAND(5184, 4496) -5751 = NAND(5185, 5186) -5755 = NAND(5187, 5188) -5758 = NAND(5189, 4502) -5762 = NAND(5190, 5191) -5766 = NAND(5192, 5193) -5769 = NOT(4803) -5770 = NOT(4806) -5771 = NAND(4507, 5196) -5778 = NAND(4509, 5197) -5789 = NAND(4511, 5198) -5799 = NAND(4513, 5199) -5807 = NAND(4515, 5200) -5821 = NAND(4517, 5201) -5837 = NAND(4519, 5202) -5850 = NAND(4521, 5203) -5856 = NAND(4523, 5204) -5863 = NAND(4525, 5205) -5870 = NAND(4527, 5206) -5881 = NAND(4529, 5207) -5892 = NAND(4531, 5208) -5898 = NAND(4533, 5209) -5905 = NAND(4535, 5210) -5915 = NAND(4537, 5211) -5926 = NAND(4539, 5212) -5936 = NAND(4541, 5213) -5943 = NOT(4817) -5944 = NAND(4820, 1931) -5945 = NOT(4820) -5946 = NAND(4823, 1932) -5947 = NOT(4823) -5948 = NAND(4826, 1933) -5949 = NOT(4826) -5950 = NAND(4829, 1934) -5951 = NOT(4829) -5952 = NAND(4832, 1935) -5953 = NOT(4832) -5954 = NAND(4835, 1936) -5955 = NOT(4835) -5956 = NAND(4838, 1937) -5957 = NOT(4838) -5958 = NAND(4841, 1938) -5959 = NOT(4841) -5960 = AND(2674, 4769) -5966 = NOT(4844) -5967 = NAND(4847, 1939) -5968 = NOT(4847) -5969 = NAND(4850, 1940) -5970 = NOT(4850) -5971 = NAND(4853, 1941) -5972 = NOT(4853) -5973 = NAND(4856, 1942) -5974 = NOT(4856) -5975 = NAND(4859, 1943) -5976 = NOT(4859) -5977 = NAND(4862, 1944) -5978 = NOT(4862) -5979 = NAND(4865, 1945) -5980 = NOT(4865) -5981 = AND(2674, 4769) -5989 = NAND(4868, 1946) -5990 = NOT(4868) -5991 = NAND(5283, 5284) -5996 = NAND(5285, 5286) -6000 = NAND(5287, 5288) -6003 = NAND(5289, 5290) -6009 = NAND(5291, 5292) -6014 = NAND(5293, 5294) -6018 = NAND(5295, 5296) -6021 = NAND(5297, 5298) -6022 = NAND(5299, 5300) -6023 = NOT(4874) -6024 = NAND(4874, 4629) -6025 = NOT(4877) -6026 = NAND(4877, 4631) -6027 = NOT(4880) -6028 = NAND(4880, 4633) -6029 = NOT(4883) -6030 = NAND(4883, 4636) -6031 = NOT(4886) -6032 = NOT(4889) -6033 = NOT(4892) -6034 = NOT(4895) -6035 = NOT(4898) -6036 = NOT(4901) -6037 = NOT(4904) -6038 = NAND(4904, 4642) -6039 = NOT(4907) -6040 = NOT(4910) -6041 = NAND(5314, 5315) -6047 = NAND(5316, 5317) -6052 = NAND(5318, 5319) -6056 = NAND(5320, 5321) -6059 = NAND(5322, 5323) -6060 = NAND(4913, 1968) -6061 = NOT(4913) -6062 = NAND(4916, 1969) -6063 = NOT(4916) -6064 = NAND(4919, 1970) -6065 = NOT(4919) -6066 = NAND(4922, 1971) -6067 = NOT(4922) -6068 = NAND(4925, 1972) -6069 = NOT(4925) -6070 = NAND(4928, 1973) -6071 = NOT(4928) -6072 = NAND(4931, 1974) -6073 = NOT(4931) -6074 = NAND(4934, 1975) -6075 = NOT(4934) -6076 = NAND(4937, 1976) -6077 = NOT(4937) -6078 = NOT(4940) -6079 = NAND(5363, 4694) -6083 = NAND(5364, 5365) -6087 = NAND(5366, 5367) -6090 = NOT(4943) -6091 = NAND(4943, 4699) -6092 = NOT(4946) -6093 = NOT(4949) -6094 = NOT(4952) -6095 = NOT(4955) -6096 = NOT(4970) -6097 = NAND(4970, 4700) -6098 = NOT(4973) -6099 = NOT(4976) -6100 = NOT(4979) -6101 = NOT(4982) -6102 = NOT(4997) -6103 = NAND(5000, 2015) -6104 = NOT(5000) -6105 = NAND(5003, 2016) -6106 = NOT(5003) -6107 = NAND(5006, 2017) -6108 = NOT(5006) -6109 = NAND(5009, 2018) -6110 = NOT(5009) -6111 = NAND(5012, 2019) -6112 = NOT(5012) -6113 = NAND(5015, 2020) -6114 = NOT(5015) -6115 = NAND(5018, 2021) -6116 = NOT(5018) -6117 = NAND(5021, 2022) -6118 = NOT(5021) -6119 = NAND(5024, 2023) -6120 = NOT(5024) -6121 = NOT(5033) -6122 = NAND(5033, 4743) -6123 = NOT(5036) -6124 = NOT(5039) -6125 = NAND(5042, 4744) -6126 = NOT(5042) -6127 = NAND(5425, 4746) -6131 = NAND(5426, 5427) -6135 = NOT(5049) -6136 = NAND(5049, 4749) -6137 = NAND(5429, 4751) -6141 = NAND(5430, 5431) -6145 = NAND(5432, 5433) -6148 = NOT(5068) -6149 = NOT(5071) -6150 = NOT(5074) -6151 = NOT(5077) -6152 = NOT(5080) -6153 = NOT(5083) -6154 = NOT(5086) -6155 = NOT(5089) -6156 = NOT(5092) -6157 = NAND(5092, 4761) -6158 = NOT(5095) -6159 = NAND(5095, 4763) -6160 = NOT(5098) -6161 = NAND(5098, 4765) -6162 = NOT(5101) -6163 = NOT(5104) -6164 = NAND(5107, 4768) -6165 = NOT(5107) -6166 = NAND(5451, 4776) -6170 = NAND(5452, 5453) -6174 = NAND(5454, 5455) -6177 = NAND(5456, 5457) -6181 = NOT(5114) -6182 = NOT(5117) -6183 = NOT(5120) -6184 = NOT(5123) -6185 = NOT(5138) -6186 = NAND(5138, 4783) -6187 = NOT(5141) -6188 = NOT(5144) -6189 = NOT(5147) -6190 = NOT(5150) -6191 = NOT(4784) -6192 = NAND(4784, 2230) -6193 = NOT(4790) -6194 = NAND(4790, 2765) -6195 = NOT(4796) -6196 = NAND(5476, 5477) -6199 = NAND(5474, 5475) -6202 = NOT(4810) -6203 = NOT(4814) -6204 = BUFF(4769) -6207 = BUFF(4555) -6210 = BUFF(4769) -6213 = NOT(4871) -6214 = BUFF(4586) -6217 = NOR(2674, 4769) -6220 = BUFF(4667) -6223 = NOT(4958) -6224 = NOT(4961) -6225 = NOT(4964) -6226 = NOT(4967) -6227 = NOT(4985) -6228 = NOT(4988) -6229 = NOT(4991) -6230 = NOT(4994) -6231 = NOT(5027) -6232 = BUFF(4711) -6235 = NOT(5030) -6236 = BUFF(4735) -6239 = NOT(5052) -6240 = NOT(5055) -6241 = NOT(5058) -6242 = NOT(5061) -6243 = NAND(5573, 5574) -6246 = NAND(5571, 5572) -6249 = NAND(5586, 5587) -6252 = NAND(5584, 5585) -6255 = NOT(5126) -6256 = NOT(5129) -6257 = NOT(5132) -6258 = NOT(5135) -6259 = NOT(5153) -6260 = NOT(5156) -6261 = NOT(5159) -6262 = NOT(5162) -6263 = NAND(5604, 5605) -6266 = NAND(5602, 5603) -6540 = NAND(1380, 5945) -6541 = NAND(1383, 5947) -6542 = NAND(1386, 5949) -6543 = NAND(1389, 5951) -6544 = NAND(1392, 5953) -6545 = NAND(1395, 5955) -6546 = NAND(1398, 5957) -6547 = NAND(1401, 5959) -6555 = NAND(1404, 5968) -6556 = NAND(1407, 5970) -6557 = NAND(1410, 5972) -6558 = NAND(1413, 5974) -6559 = NAND(1416, 5976) -6560 = NAND(1419, 5978) -6561 = NAND(1422, 5980) -6569 = NAND(1425, 5990) -6594 = NAND(3721, 6023) -6595 = NAND(3724, 6025) -6596 = NAND(3727, 6027) -6597 = NAND(3730, 6029) -6598 = NAND(4889, 6031) -6599 = NAND(4886, 6032) -6600 = NAND(4895, 6033) -6601 = NAND(4892, 6034) -6602 = NAND(4901, 6035) -6603 = NAND(4898, 6036) -6604 = NAND(3733, 6037) -6605 = NAND(4910, 6039) -6606 = NAND(4907, 6040) -6621 = NAND(1434, 6061) -6622 = NAND(1437, 6063) -6623 = NAND(1440, 6065) -6624 = NAND(1443, 6067) -6625 = NAND(1446, 6069) -6626 = NAND(1449, 6071) -6627 = NAND(1452, 6073) -6628 = NAND(1455, 6075) -6629 = NAND(1458, 6077) -6639 = NAND(3783, 6090) -6640 = NAND(4949, 6092) -6641 = NAND(4946, 6093) -6642 = NAND(4955, 6094) -6643 = NAND(4952, 6095) -6644 = NAND(3786, 6096) -6645 = NAND(4976, 6098) -6646 = NAND(4973, 6099) -6647 = NAND(4982, 6100) -6648 = NAND(4979, 6101) -6649 = NAND(1461, 6104) -6650 = NAND(1464, 6106) -6651 = NAND(1467, 6108) -6652 = NAND(1470, 6110) -6653 = NAND(1473, 6112) -6654 = NAND(1476, 6114) -6655 = NAND(1479, 6116) -6656 = NAND(1482, 6118) -6657 = NAND(1485, 6120) -6658 = NAND(3789, 6121) -6659 = NAND(5039, 6123) -6660 = NAND(5036, 6124) -6661 = NAND(3792, 6126) -6668 = NAND(3816, 6135) -6677 = NAND(5071, 6148) -6678 = NAND(5068, 6149) -6679 = NAND(5077, 6150) -6680 = NAND(5074, 6151) -6681 = NAND(5083, 6152) -6682 = NAND(5080, 6153) -6683 = NAND(5089, 6154) -6684 = NAND(5086, 6155) -6685 = NAND(3846, 6156) -6686 = NAND(3849, 6158) -6687 = NAND(3852, 6160) -6688 = NAND(5104, 6162) -6689 = NAND(5101, 6163) -6690 = NAND(3855, 6165) -6702 = NAND(5117, 6181) -6703 = NAND(5114, 6182) -6704 = NAND(5123, 6183) -6705 = NAND(5120, 6184) -6706 = NAND(3891, 6185) -6707 = NAND(5144, 6187) -6708 = NAND(5141, 6188) -6709 = NAND(5150, 6189) -6710 = NAND(5147, 6190) -6711 = NAND(1708, 6191) -6712 = NAND(2231, 6193) -6729 = NAND(4961, 6223) -6730 = NAND(4958, 6224) -6731 = NAND(4967, 6225) -6732 = NAND(4964, 6226) -6733 = NAND(4988, 6227) -6734 = NAND(4985, 6228) -6735 = NAND(4994, 6229) -6736 = NAND(4991, 6230) -6741 = NAND(5055, 6239) -6742 = NAND(5052, 6240) -6743 = NAND(5061, 6241) -6744 = NAND(5058, 6242) -6751 = NAND(5129, 6255) -6752 = NAND(5126, 6256) -6753 = NAND(5135, 6257) -6754 = NAND(5132, 6258) -6755 = NAND(5156, 6259) -6756 = NAND(5153, 6260) -6757 = NAND(5162, 6261) -6758 = NAND(5159, 6262) -6761 = NOT(5892) -6762 = AND(5683, 5670, 5654, 5640, 5632) -6766 = AND(5632, 3097) -6767 = AND(5640, 5632, 3101) -6768 = AND(5654, 5632, 3107, 5640) -6769 = AND(5670, 5654, 5632, 3114, 5640) -6770 = AND(5640, 3101) -6771 = AND(5654, 3107, 5640) -6772 = AND(5670, 5654, 3114, 5640) -6773 = AND(5683, 5654, 5640, 5670) -6774 = AND(5640, 3101) -6775 = AND(5654, 3107, 5640) -6776 = AND(5670, 5654, 3114, 5640) -6777 = AND(5654, 3107) -6778 = AND(5670, 5654, 3114) -6779 = AND(5683, 5654, 5670) -6780 = AND(5654, 3107) -6781 = AND(5670, 5654, 3114) -6782 = AND(5670, 3114) -6783 = AND(5683, 5670) -6784 = AND(5697, 5728, 5707, 5690, 5718) -6787 = AND(5690, 3137) -6788 = AND(5697, 5690, 3140) -6789 = AND(5707, 5690, 3144, 5697) -6790 = AND(5718, 5707, 5690, 3149, 5697) -6791 = AND(5697, 3140) -6792 = AND(5707, 3144, 5697) -6793 = AND(5718, 5707, 3149, 5697) -6794 = AND(3144, 5707) -6795 = AND(5718, 5707, 3149) -6796 = AND(5718, 3149) -6797 = NOT(5736) -6800 = NOT(5740) -6803 = NOT(5747) -6806 = NOT(5751) -6809 = NOT(5758) -6812 = NOT(5762) -6815 = BUFF(5744) -6818 = BUFF(5744) -6821 = BUFF(5755) -6824 = BUFF(5755) -6827 = BUFF(5766) -6830 = BUFF(5766) -6833 = AND(5850, 5789, 5778, 5771) -6836 = AND(5771, 3169) -6837 = AND(5778, 5771, 3173) -6838 = AND(5789, 5771, 3178, 5778) -6839 = AND(5778, 3173) -6840 = AND(5789, 3178, 5778) -6841 = AND(5850, 5789, 5778) -6842 = AND(5778, 3173) -6843 = AND(5789, 3178, 5778) -6844 = AND(5789, 3178) -6845 = AND(5856, 5837, 5821, 5807, 5799) -6848 = AND(5799, 3185) -6849 = AND(5807, 5799, 3189) -6850 = AND(5821, 5799, 3195, 5807) -6851 = AND(5837, 5821, 5799, 3202, 5807) -6852 = AND(5807, 3189) -6853 = AND(5821, 3195, 5807) -6854 = AND(5837, 5821, 3202, 5807) -6855 = AND(5856, 5821, 5807, 5837) -6856 = AND(5807, 3189) -6857 = AND(5821, 3195, 5807) -6858 = AND(5837, 5821, 3202, 5807) -6859 = AND(5821, 3195) -6860 = AND(5837, 5821, 3202) -6861 = AND(5856, 5821, 5837) -6862 = AND(5821, 3195) -6863 = AND(5837, 5821, 3202) -6864 = AND(5837, 3202) -6865 = AND(5850, 5789) -6866 = AND(5856, 5837) -6867 = AND(5870, 5892, 5881, 5863) -6870 = AND(5863, 3211) -6871 = AND(5870, 5863, 3215) -6872 = AND(5881, 5863, 3221, 5870) -6873 = AND(5870, 3215) -6874 = AND(5881, 3221, 5870) -6875 = AND(5892, 5881, 5870) -6876 = AND(5870, 3215) -6877 = AND(3221, 5881, 5870) -6878 = AND(5881, 3221) -6879 = AND(5892, 5881) -6880 = AND(5881, 3221) -6881 = AND(5905, 5936, 5915, 5898, 5926) -6884 = AND(5898, 3229) -6885 = AND(5905, 5898, 3232) -6886 = AND(5915, 5898, 3236, 5905) -6887 = AND(5926, 5915, 5898, 3241, 5905) -6888 = AND(5905, 3232) -6889 = AND(5915, 3236, 5905) -6890 = AND(5926, 5915, 3241, 5905) -6891 = AND(3236, 5915) -6892 = AND(5926, 5915, 3241) -6893 = AND(5926, 3241) -6894 = NAND(5944, 6540) -6901 = NAND(5946, 6541) -6912 = NAND(5948, 6542) -6923 = NAND(5950, 6543) -6929 = NAND(5952, 6544) -6936 = NAND(5954, 6545) -6946 = NAND(5956, 6546) -6957 = NAND(5958, 6547) -6967 = NAND(6204, 4575) -6968 = NOT(6204) -6969 = NOT(6207) -6970 = NAND(5967, 6555) -6977 = NAND(5969, 6556) -6988 = NAND(5971, 6557) -6998 = NAND(5973, 6558) -7006 = NAND(5975, 6559) -7020 = NAND(5977, 6560) -7036 = NAND(5979, 6561) -7049 = NAND(5989, 6569) -7055 = NAND(6210, 4610) -7056 = NOT(6210) -7057 = AND(6021, 6000, 5996, 5991) -7060 = AND(5991, 3362) -7061 = AND(5996, 5991, 3363) -7062 = AND(6000, 5991, 3364, 5996) -7063 = AND(6022, 6018, 6014, 6009, 6003) -7064 = AND(6003, 3366) -7065 = AND(6009, 6003, 3367) -7066 = AND(6014, 6003, 3368, 6009) -7067 = AND(6018, 6014, 6003, 3369, 6009) -7068 = NAND(6594, 6024) -7073 = NAND(6595, 6026) -7077 = NAND(6596, 6028) -7080 = NAND(6597, 6030) -7086 = NAND(6598, 6599) -7091 = NAND(6600, 6601) -7095 = NAND(6602, 6603) -7098 = NAND(6604, 6038) -7099 = NAND(6605, 6606) -7100 = AND(6059, 6056, 6052, 6047, 6041) -7103 = AND(6041, 3371) -7104 = AND(6047, 6041, 3372) -7105 = AND(6052, 6041, 3373, 6047) -7106 = AND(6056, 6052, 6041, 3374, 6047) -7107 = NAND(6060, 6621) -7114 = NAND(6062, 6622) -7125 = NAND(6064, 6623) -7136 = NAND(6066, 6624) -7142 = NAND(6068, 6625) -7149 = NAND(6070, 6626) -7159 = NAND(6072, 6627) -7170 = NAND(6074, 6628) -7180 = NAND(6076, 6629) -7187 = NOT(6220) -7188 = NOT(6079) -7191 = NOT(6083) -7194 = NAND(6639, 6091) -7198 = NAND(6640, 6641) -7202 = NAND(6642, 6643) -7205 = NAND(6644, 6097) -7209 = NAND(6645, 6646) -7213 = NAND(6647, 6648) -7216 = BUFF(6087) -7219 = BUFF(6087) -7222 = NAND(6103, 6649) -7229 = NAND(6105, 6650) -7240 = NAND(6107, 6651) -7250 = NAND(6109, 6652) -7258 = NAND(6111, 6653) -7272 = NAND(6113, 6654) -7288 = NAND(6115, 6655) -7301 = NAND(6117, 6656) -7307 = NAND(6119, 6657) -7314 = NAND(6658, 6122) -7318 = NAND(6659, 6660) -7322 = NAND(6125, 6661) -7325 = NOT(6127) -7328 = NOT(6131) -7331 = NAND(6668, 6136) -7334 = NOT(6137) -7337 = NOT(6141) -7340 = BUFF(6145) -7343 = BUFF(6145) -7346 = NAND(6677, 6678) -7351 = NAND(6679, 6680) -7355 = NAND(6681, 6682) -7358 = NAND(6683, 6684) -7364 = NAND(6685, 6157) -7369 = NAND(6686, 6159) -7373 = NAND(6687, 6161) -7376 = NAND(6688, 6689) -7377 = NAND(6164, 6690) -7378 = NOT(6166) -7381 = NOT(6170) -7384 = NOT(6177) -7387 = NAND(6702, 6703) -7391 = NAND(6704, 6705) -7394 = NAND(6706, 6186) -7398 = NAND(6707, 6708) -7402 = NAND(6709, 6710) -7405 = BUFF(6174) -7408 = BUFF(6174) -7411 = BUFF(5936) -7414 = BUFF(5898) -7417 = BUFF(5905) -7420 = BUFF(5915) -7423 = BUFF(5926) -7426 = BUFF(5728) -7429 = BUFF(5690) -7432 = BUFF(5697) -7435 = BUFF(5707) -7438 = BUFF(5718) -7441 = NAND(6192, 6711) -7444 = NAND(6194, 6712) -7447 = BUFF(5683) -7450 = BUFF(5670) -7453 = BUFF(5632) -7456 = BUFF(5654) -7459 = BUFF(5640) -7462 = BUFF(5640) -7465 = BUFF(5683) -7468 = BUFF(5670) -7471 = BUFF(5632) -7474 = BUFF(5654) -7477 = NOT(6196) -7478 = NOT(6199) -7479 = BUFF(5850) -7482 = BUFF(5789) -7485 = BUFF(5771) -7488 = BUFF(5778) -7491 = BUFF(5850) -7494 = BUFF(5789) -7497 = BUFF(5771) -7500 = BUFF(5778) -7503 = BUFF(5856) -7506 = BUFF(5837) -7509 = BUFF(5799) -7512 = BUFF(5821) -7515 = BUFF(5807) -7518 = BUFF(5807) -7521 = BUFF(5856) -7524 = BUFF(5837) -7527 = BUFF(5799) -7530 = BUFF(5821) -7533 = BUFF(5863) -7536 = BUFF(5863) -7539 = BUFF(5870) -7542 = BUFF(5870) -7545 = BUFF(5881) -7548 = BUFF(5881) -7551 = NOT(6214) -7552 = NOT(6217) -7553 = BUFF(5981) -7556 = NOT(6249) -7557 = NOT(6252) -7558 = NOT(6243) -7559 = NOT(6246) -7560 = NAND(6731, 6732) -7563 = NAND(6729, 6730) -7566 = NAND(6735, 6736) -7569 = NAND(6733, 6734) -7572 = NOT(6232) -7573 = NOT(6236) -7574 = NAND(6743, 6744) -7577 = NAND(6741, 6742) -7580 = NOT(6263) -7581 = NOT(6266) -7582 = NAND(6753, 6754) -7585 = NAND(6751, 6752) -7588 = NAND(6757, 6758) -7591 = NAND(6755, 6756) -7609 = OR(3096, 6766, 6767, 6768, 6769) -7613 = OR(3107, 6782) -7620 = OR(3136, 6787, 6788, 6789, 6790) -7649 = OR(3168, 6836, 6837, 6838) -7650 = OR(3173, 6844) -7655 = OR(3184, 6848, 6849, 6850, 6851) -7659 = OR(3195, 6864) -7668 = OR(3210, 6870, 6871, 6872) -7671 = OR(3228, 6884, 6885, 6886, 6887) -7744 = NAND(3661, 6968) -7822 = NAND(3664, 7056) -7825 = OR(3361, 7060, 7061, 7062) -7826 = OR(3365, 7064, 7065, 7066, 7067) -7852 = OR(3370, 7103, 7104, 7105, 7106) -8114 = OR(3101, 6777, 6778, 6779) -8117 = OR(3097, 6770, 6771, 6772, 6773) -8131 = NOR(3101, 6780, 6781) -8134 = NOR(3097, 6774, 6775, 6776) -8144 = NAND(6199, 7477) -8145 = NAND(6196, 7478) -8146 = OR(3169, 6839, 6840, 6841) -8156 = NOR(3169, 6842, 6843) -8166 = OR(3189, 6859, 6860, 6861) -8169 = OR(3185, 6852, 6853, 6854, 6855) -8183 = NOR(3189, 6862, 6863) -8186 = NOR(3185, 6856, 6857, 6858) -8196 = OR(3211, 6873, 6874, 6875) -8200 = NOR(3211, 6876, 6877) -8204 = OR(3215, 6878, 6879) -8208 = NOR(3215, 6880) -8216 = NAND(6252, 7556) -8217 = NAND(6249, 7557) -8218 = NAND(6246, 7558) -8219 = NAND(6243, 7559) -8232 = NAND(6266, 7580) -8233 = NAND(6263, 7581) -8242 = NOT(7411) -8243 = NOT(7414) -8244 = NOT(7417) -8245 = NOT(7420) -8246 = NOT(7423) -8247 = NOT(7426) -8248 = NOT(7429) -8249 = NOT(7432) -8250 = NOT(7435) -8251 = NOT(7438) -8252 = NOT(7136) -8253 = NOT(6923) -8254 = NOT(6762) -8260 = NOT(7459) -8261 = NOT(7462) -8262 = AND(3122, 6762) -8269 = AND(3155, 6784) -8274 = NOT(6815) -8275 = NOT(6818) -8276 = NOT(6821) -8277 = NOT(6824) -8278 = NOT(6827) -8279 = NOT(6830) -8280 = AND(5740, 5736, 6815) -8281 = AND(6800, 6797, 6818) -8282 = AND(5751, 5747, 6821) -8283 = AND(6806, 6803, 6824) -8284 = AND(5762, 5758, 6827) -8285 = AND(6812, 6809, 6830) -8288 = NOT(6845) -8294 = NOT(7488) -8295 = NOT(7500) -8296 = NOT(7515) -8297 = NOT(7518) -8298 = AND(6833, 6845) -8307 = AND(6867, 6881) -8315 = NOT(7533) -8317 = NOT(7536) -8319 = NOT(7539) -8321 = NOT(7542) -8322 = NAND(7545, 4543) -8323 = NOT(7545) -8324 = NAND(7548, 5943) -8325 = NOT(7548) -8326 = NAND(6967, 7744) -8333 = AND(6901, 6923, 6912, 6894) -8337 = AND(6894, 4545) -8338 = AND(6901, 6894, 4549) -8339 = AND(6912, 6894, 4555, 6901) -8340 = AND(6901, 4549) -8341 = AND(6912, 4555, 6901) -8342 = AND(6923, 6912, 6901) -8343 = AND(6901, 4549) -8344 = AND(4555, 6912, 6901) -8345 = AND(6912, 4555) -8346 = AND(6923, 6912) -8347 = AND(6912, 4555) -8348 = AND(6929, 4563) -8349 = AND(6936, 6929, 4566) -8350 = AND(6946, 6929, 4570, 6936) -8351 = AND(6957, 6946, 6929, 5960, 6936) -8352 = AND(6936, 4566) -8353 = AND(6946, 4570, 6936) -8354 = AND(6957, 6946, 5960, 6936) -8355 = AND(4570, 6946) -8356 = AND(6957, 6946, 5960) -8357 = AND(6957, 5960) -8358 = NAND(7055, 7822) -8365 = AND(7049, 6988, 6977, 6970) -8369 = AND(6970, 4577) -8370 = AND(6977, 6970, 4581) -8371 = AND(6988, 6970, 4586, 6977) -8372 = AND(6977, 4581) -8373 = AND(6988, 4586, 6977) -8374 = AND(7049, 6988, 6977) -8375 = AND(6977, 4581) -8376 = AND(6988, 4586, 6977) -8377 = AND(6988, 4586) -8378 = AND(6998, 4593) -8379 = AND(7006, 6998, 4597) -8380 = AND(7020, 6998, 4603, 7006) -8381 = AND(7036, 7020, 6998, 5981, 7006) -8382 = AND(7006, 4597) -8383 = AND(7020, 4603, 7006) -8384 = AND(7036, 7020, 5981, 7006) -8385 = AND(7006, 4597) -8386 = AND(7020, 4603, 7006) -8387 = AND(7036, 7020, 5981, 7006) -8388 = AND(7020, 4603) -8389 = AND(7036, 7020, 5981) -8390 = AND(7020, 4603) -8391 = AND(7036, 7020, 5981) -8392 = AND(7036, 5981) -8393 = AND(7049, 6988) -8394 = AND(7057, 7063) -8404 = AND(7057, 7826) -8405 = AND(7098, 7077, 7073, 7068) -8409 = AND(7068, 4632) -8410 = AND(7073, 7068, 4634) -8411 = AND(7077, 7068, 4635, 7073) -8412 = AND(7099, 7095, 7091, 7086, 7080) -8415 = AND(7080, 4638) -8416 = AND(7086, 7080, 4639) -8417 = AND(7091, 7080, 4640, 7086) -8418 = AND(7095, 7091, 7080, 4641, 7086) -8421 = AND(3375, 7100) -8430 = AND(7114, 7136, 7125, 7107) -8433 = AND(7107, 4657) -8434 = AND(7114, 7107, 4661) -8435 = AND(7125, 7107, 4667, 7114) -8436 = AND(7114, 4661) -8437 = AND(7125, 4667, 7114) -8438 = AND(7136, 7125, 7114) -8439 = AND(7114, 4661) -8440 = AND(4667, 7125, 7114) -8441 = AND(7125, 4667) -8442 = AND(7136, 7125) -8443 = AND(7125, 4667) -8444 = AND(7149, 7180, 7159, 7142, 7170) -8447 = AND(7142, 4675) -8448 = AND(7149, 7142, 4678) -8449 = AND(7159, 7142, 4682, 7149) -8450 = AND(7170, 7159, 7142, 4687, 7149) -8451 = AND(7149, 4678) -8452 = AND(7159, 4682, 7149) -8453 = AND(7170, 7159, 4687, 7149) -8454 = AND(4682, 7159) -8455 = AND(7170, 7159, 4687) -8456 = AND(7170, 4687) -8457 = NOT(7194) -8460 = NOT(7198) -8463 = NOT(7205) -8466 = NOT(7209) -8469 = NOT(7216) -8470 = NOT(7219) -8471 = BUFF(7202) -8474 = BUFF(7202) -8477 = BUFF(7213) -8480 = BUFF(7213) -8483 = AND(6083, 6079, 7216) -8484 = AND(7191, 7188, 7219) -8485 = AND(7301, 7240, 7229, 7222) -8488 = AND(7222, 4702) -8489 = AND(7229, 7222, 4706) -8490 = AND(7240, 7222, 4711, 7229) -8491 = AND(7229, 4706) -8492 = AND(7240, 4711, 7229) -8493 = AND(7301, 7240, 7229) -8494 = AND(7229, 4706) -8495 = AND(7240, 4711, 7229) -8496 = AND(7240, 4711) -8497 = AND(7307, 7288, 7272, 7258, 7250) -8500 = AND(7250, 4718) -8501 = AND(7258, 7250, 4722) -8502 = AND(7272, 7250, 4728, 7258) -8503 = AND(7288, 7272, 7250, 4735, 7258) -8504 = AND(7258, 4722) -8505 = AND(7272, 4728, 7258) -8506 = AND(7288, 7272, 4735, 7258) -8507 = AND(7307, 7272, 7258, 7288) -8508 = AND(7258, 4722) -8509 = AND(7272, 4728, 7258) -8510 = AND(7288, 7272, 4735, 7258) -8511 = AND(7272, 4728) -8512 = AND(7288, 7272, 4735) -8513 = AND(7307, 7272, 7288) -8514 = AND(7272, 4728) -8515 = AND(7288, 7272, 4735) -8516 = AND(7288, 4735) -8517 = AND(7301, 7240) -8518 = AND(7307, 7288) -8519 = NOT(7314) -8522 = NOT(7318) -8525 = BUFF(7322) -8528 = BUFF(7322) -8531 = BUFF(7331) -8534 = BUFF(7331) -8537 = NOT(7340) -8538 = NOT(7343) -8539 = AND(6141, 6137, 7340) -8540 = AND(7337, 7334, 7343) -8541 = AND(7376, 7355, 7351, 7346) -8545 = AND(7346, 4757) -8546 = AND(7351, 7346, 4758) -8547 = AND(7355, 7346, 4759, 7351) -8548 = AND(7377, 7373, 7369, 7364, 7358) -8551 = AND(7358, 4762) -8552 = AND(7364, 7358, 4764) -8553 = AND(7369, 7358, 4766, 7364) -8554 = AND(7373, 7369, 7358, 4767, 7364) -8555 = NOT(7387) -8558 = NOT(7394) -8561 = NOT(7398) -8564 = NOT(7405) -8565 = NOT(7408) -8566 = BUFF(7391) -8569 = BUFF(7391) -8572 = BUFF(7402) -8575 = BUFF(7402) -8578 = AND(6170, 6166, 7405) -8579 = AND(7381, 7378, 7408) -8580 = BUFF(7180) -8583 = BUFF(7142) -8586 = BUFF(7149) -8589 = BUFF(7159) -8592 = BUFF(7170) -8595 = BUFF(6929) -8598 = BUFF(6936) -8601 = BUFF(6946) -8604 = BUFF(6957) -8607 = NOT(7441) -8608 = NAND(7441, 5469) -8609 = NOT(7444) -8610 = NAND(7444, 4793) -8615 = NOT(7447) -8616 = NOT(7450) -8617 = NOT(7453) -8618 = NOT(7456) -8619 = NOT(7474) -8624 = NOT(7465) -8625 = NOT(7468) -8626 = NOT(7471) -8627 = NAND(8144, 8145) -8632 = NOT(7479) -8633 = NOT(7482) -8634 = NOT(7485) -8637 = NOT(7491) -8638 = NOT(7494) -8639 = NOT(7497) -8644 = NOT(7503) -8645 = NOT(7506) -8646 = NOT(7509) -8647 = NOT(7512) -8648 = NOT(7530) -8653 = NOT(7521) -8654 = NOT(7524) -8655 = NOT(7527) -8660 = BUFF(6894) -8663 = BUFF(6894) -8666 = BUFF(6901) -8669 = BUFF(6901) -8672 = BUFF(6912) -8675 = BUFF(6912) -8678 = BUFF(7049) -8681 = BUFF(6988) -8684 = BUFF(6970) -8687 = BUFF(6977) -8690 = BUFF(7049) -8693 = BUFF(6988) -8696 = BUFF(6970) -8699 = BUFF(6977) -8702 = BUFF(7036) -8705 = BUFF(6998) -8708 = BUFF(7020) -8711 = BUFF(7006) -8714 = BUFF(7006) -8717 = NOT(7553) -8718 = BUFF(7036) -8721 = BUFF(6998) -8724 = BUFF(7020) -8727 = NAND(8216, 8217) -8730 = NAND(8218, 8219) -8733 = NOT(7574) -8734 = NOT(7577) -8735 = BUFF(7107) -8738 = BUFF(7107) -8741 = BUFF(7114) -8744 = BUFF(7114) -8747 = BUFF(7125) -8750 = BUFF(7125) -8753 = NOT(7560) -8754 = NOT(7563) -8755 = NOT(7566) -8756 = NOT(7569) -8757 = BUFF(7301) -8760 = BUFF(7240) -8763 = BUFF(7222) -8766 = BUFF(7229) -8769 = BUFF(7301) -8772 = BUFF(7240) -8775 = BUFF(7222) -8778 = BUFF(7229) -8781 = BUFF(7307) -8784 = BUFF(7288) -8787 = BUFF(7250) -8790 = BUFF(7272) -8793 = BUFF(7258) -8796 = BUFF(7258) -8799 = BUFF(7307) -8802 = BUFF(7288) -8805 = BUFF(7250) -8808 = BUFF(7272) -8811 = NAND(8232, 8233) -8814 = NOT(7588) -8815 = NOT(7591) -8816 = NOT(7582) -8817 = NOT(7585) -8818 = AND(7620, 3155) -8840 = AND(3122, 7609) -8857 = NOT(7609) -8861 = AND(6797, 5740, 8274) -8862 = AND(5736, 6800, 8275) -8863 = AND(6803, 5751, 8276) -8864 = AND(5747, 6806, 8277) -8865 = AND(6809, 5762, 8278) -8866 = AND(5758, 6812, 8279) -8871 = NOT(7655) -8874 = AND(6833, 7655) -8878 = AND(7671, 6867) -8879 = NOT(8196) -8880 = NAND(8196, 8315) -8881 = NOT(8200) -8882 = NAND(8200, 8317) -8883 = NOT(8204) -8884 = NAND(8204, 8319) -8885 = NOT(8208) -8886 = NAND(8208, 8321) -8887 = NAND(3658, 8323) -8888 = NAND(4817, 8325) -8898 = OR(4544, 8337, 8338, 8339) -8902 = OR(4562, 8348, 8349, 8350, 8351) -8920 = OR(4576, 8369, 8370, 8371) -8924 = OR(4581, 8377) -8927 = OR(4592, 8378, 8379, 8380, 8381) -8931 = OR(4603, 8392) -8943 = OR(7825, 8404) -8950 = OR(4630, 8409, 8410, 8411) -8956 = OR(4637, 8415, 8416, 8417, 8418) -8959 = NOT(7852) -8960 = AND(3375, 7852) -8963 = OR(4656, 8433, 8434, 8435) -8966 = OR(4674, 8447, 8448, 8449, 8450) -8991 = AND(7188, 6083, 8469) -8992 = AND(6079, 7191, 8470) -8995 = OR(4701, 8488, 8489, 8490) -8996 = OR(4706, 8496) -9001 = OR(4717, 8500, 8501, 8502, 8503) -9005 = OR(4728, 8516) -9024 = AND(7334, 6141, 8537) -9025 = AND(6137, 7337, 8538) -9029 = OR(4756, 8545, 8546, 8547) -9035 = OR(4760, 8551, 8552, 8553, 8554) -9053 = AND(7378, 6170, 8564) -9054 = AND(6166, 7381, 8565) -9064 = NAND(4303, 8607) -9065 = NAND(3507, 8609) -9066 = NOT(8114) -9067 = NAND(8114, 4795) -9068 = OR(7613, 6783) -9071 = NOT(8117) -9072 = NOT(8131) -9073 = NAND(8131, 6195) -9074 = NOT(7613) -9077 = NOT(8134) -9079 = OR(7650, 6865) -9082 = NOT(8146) -9083 = NOT(7650) -9086 = NOT(8156) -9087 = NOT(8166) -9088 = NAND(8166, 4813) -9089 = OR(7659, 6866) -9092 = NOT(8169) -9093 = NOT(8183) -9094 = NAND(8183, 6203) -9095 = NOT(7659) -9098 = NOT(8186) -9099 = OR(4545, 8340, 8341, 8342) -9103 = NOR(4545, 8343, 8344) -9107 = OR(4549, 8345, 8346) -9111 = NOR(4549, 8347) -9117 = OR(4577, 8372, 8373, 8374) -9127 = NOR(4577, 8375, 8376) -9146 = NOR(4597, 8390, 8391) -9149 = NOR(4593, 8385, 8386, 8387) -9159 = NAND(7577, 8733) -9160 = NAND(7574, 8734) -9161 = OR(4657, 8436, 8437, 8438) -9165 = NOR(4657, 8439, 8440) -9169 = OR(4661, 8441, 8442) -9173 = NOR(4661, 8443) -9179 = NAND(7563, 8753) -9180 = NAND(7560, 8754) -9181 = NAND(7569, 8755) -9182 = NAND(7566, 8756) -9183 = OR(4702, 8491, 8492, 8493) -9193 = NOR(4702, 8494, 8495) -9203 = OR(4722, 8511, 8512, 8513) -9206 = OR(4718, 8504, 8505, 8506, 8507) -9220 = NOR(4722, 8514, 8515) -9223 = NOR(4718, 8508, 8509, 8510) -9234 = NAND(7591, 8814) -9235 = NAND(7588, 8815) -9236 = NAND(7585, 8816) -9237 = NAND(7582, 8817) -9238 = OR(3159, 8818) -9242 = OR(3126, 8840) -9243 = NAND(8324, 8888) -9244 = NOT(8580) -9245 = NOT(8583) -9246 = NOT(8586) -9247 = NOT(8589) -9248 = NOT(8592) -9249 = NOT(8595) -9250 = NOT(8598) -9251 = NOT(8601) -9252 = NOT(8604) -9256 = NOR(8861, 8280) -9257 = NOR(8862, 8281) -9258 = NOR(8863, 8282) -9259 = NOR(8864, 8283) -9260 = NOR(8865, 8284) -9261 = NOR(8866, 8285) -9262 = NOT(8627) -9265 = OR(7649, 8874) -9268 = OR(7668, 8878) -9271 = NAND(7533, 8879) -9272 = NAND(7536, 8881) -9273 = NAND(7539, 8883) -9274 = NAND(7542, 8885) -9275 = NAND(8322, 8887) -9276 = NOT(8333) -9280 = AND(6936, 8326, 6946, 6929, 6957) -9285 = AND(367, 8326, 6946, 6957, 6936) -9286 = AND(367, 8326, 6946, 6957) -9287 = AND(367, 8326, 6957) -9288 = AND(367, 8326) -9290 = NOT(8660) -9292 = NOT(8663) -9294 = NOT(8666) -9296 = NOT(8669) -9297 = NAND(8672, 5966) -9298 = NOT(8672) -9299 = NAND(8675, 6969) -9300 = NOT(8675) -9301 = NOT(8365) -9307 = AND(8358, 7036, 7020, 7006, 6998) -9314 = AND(8358, 7020, 7006, 7036) -9315 = AND(8358, 7020, 7036) -9318 = AND(8358, 7036) -9319 = NOT(8687) -9320 = NOT(8699) -9321 = NOT(8711) -9322 = NOT(8714) -9323 = NOT(8727) -9324 = NOT(8730) -9326 = NOT(8405) -9332 = AND(8405, 8412) -9339 = OR(4193, 8960) -9344 = AND(8430, 8444) -9352 = NOT(8735) -9354 = NOT(8738) -9356 = NOT(8741) -9358 = NOT(8744) -9359 = NAND(8747, 6078) -9360 = NOT(8747) -9361 = NAND(8750, 7187) -9362 = NOT(8750) -9363 = NOT(8471) -9364 = NOT(8474) -9365 = NOT(8477) -9366 = NOT(8480) -9367 = NOR(8991, 8483) -9368 = NOR(8992, 8484) -9369 = AND(7198, 7194, 8471) -9370 = AND(8460, 8457, 8474) -9371 = AND(7209, 7205, 8477) -9372 = AND(8466, 8463, 8480) -9375 = NOT(8497) -9381 = NOT(8766) -9382 = NOT(8778) -9383 = NOT(8793) -9384 = NOT(8796) -9385 = AND(8485, 8497) -9392 = NOT(8525) -9393 = NOT(8528) -9394 = NOT(8531) -9395 = NOT(8534) -9396 = AND(7318, 7314, 8525) -9397 = AND(8522, 8519, 8528) -9398 = AND(6131, 6127, 8531) -9399 = AND(7328, 7325, 8534) -9400 = NOR(9024, 8539) -9401 = NOR(9025, 8540) -9402 = NOT(8541) -9407 = NAND(8548, 89) -9408 = AND(8541, 8548) -9412 = NOT(8811) -9413 = NOT(8566) -9414 = NOT(8569) -9415 = NOT(8572) -9416 = NOT(8575) -9417 = NOR(9053, 8578) -9418 = NOR(9054, 8579) -9419 = AND(7387, 6177, 8566) -9420 = AND(8555, 7384, 8569) -9421 = AND(7398, 7394, 8572) -9422 = AND(8561, 8558, 8575) -9423 = BUFF(8326) -9426 = NAND(9064, 8608) -9429 = NAND(9065, 8610) -9432 = NAND(3515, 9066) -9435 = NAND(4796, 9072) -9442 = NAND(3628, 9087) -9445 = NAND(4814, 9093) -9454 = NOT(8678) -9455 = NOT(8681) -9456 = NOT(8684) -9459 = NOT(8690) -9460 = NOT(8693) -9461 = NOT(8696) -9462 = BUFF(8358) -9465 = NOT(8702) -9466 = NOT(8705) -9467 = NOT(8708) -9468 = NOT(8724) -9473 = BUFF(8358) -9476 = NOT(8718) -9477 = NOT(8721) -9478 = NAND(9159, 9160) -9485 = NAND(9179, 9180) -9488 = NAND(9181, 9182) -9493 = NOT(8757) -9494 = NOT(8760) -9495 = NOT(8763) -9498 = NOT(8769) -9499 = NOT(8772) -9500 = NOT(8775) -9505 = NOT(8781) -9506 = NOT(8784) -9507 = NOT(8787) -9508 = NOT(8790) -9509 = NOT(8808) -9514 = NOT(8799) -9515 = NOT(8802) -9516 = NOT(8805) -9517 = NAND(9234, 9235) -9520 = NAND(9236, 9237) -9526 = AND(8943, 8421) -9531 = AND(8943, 8421) -9539 = NAND(9271, 8880) -9540 = NAND(9273, 8884) -9541 = NOT(9275) -9543 = AND(8857, 8254) -9551 = AND(8871, 8288) -9555 = NAND(9272, 8882) -9556 = NAND(9274, 8886) -9557 = NOT(8898) -9560 = AND(8902, 8333) -9561 = NOT(9099) -9562 = NAND(9099, 9290) -9563 = NOT(9103) -9564 = NAND(9103, 9292) -9565 = NOT(9107) -9566 = NAND(9107, 9294) -9567 = NOT(9111) -9568 = NAND(9111, 9296) -9569 = NAND(4844, 9298) -9570 = NAND(6207, 9300) -9571 = NOT(8920) -9575 = NOT(8927) -9579 = AND(8365, 8927) -9581 = NOT(8950) -9582 = NOT(8956) -9585 = AND(8405, 8956) -9591 = AND(8966, 8430) -9592 = NOT(9161) -9593 = NAND(9161, 9352) -9594 = NOT(9165) -9595 = NAND(9165, 9354) -9596 = NOT(9169) -9597 = NAND(9169, 9356) -9598 = NOT(9173) -9599 = NAND(9173, 9358) -9600 = NAND(4940, 9360) -9601 = NAND(6220, 9362) -9602 = AND(8457, 7198, 9363) -9603 = AND(7194, 8460, 9364) -9604 = AND(8463, 7209, 9365) -9605 = AND(7205, 8466, 9366) -9608 = NOT(9001) -9611 = AND(8485, 9001) -9612 = AND(8519, 7318, 9392) -9613 = AND(7314, 8522, 9393) -9614 = AND(7325, 6131, 9394) -9615 = AND(6127, 7328, 9395) -9616 = NOT(9029) -9617 = NOT(9035) -9618 = AND(8541, 9035) -9621 = AND(7384, 7387, 9413) -9622 = AND(6177, 8555, 9414) -9623 = AND(8558, 7398, 9415) -9624 = AND(7394, 8561, 9416) -9626 = OR(4563, 8352, 8353, 8354, 9285) -9629 = OR(4566, 8355, 8356, 9286) -9632 = OR(4570, 8357, 9287) -9635 = OR(5960, 9288) -9642 = NAND(9067, 9432) -9645 = NOT(9068) -9646 = NAND(9073, 9435) -9649 = NOT(9074) -9650 = NAND(9257, 9256) -9653 = NAND(9259, 9258) -9656 = NAND(9261, 9260) -9659 = NOT(9079) -9660 = NAND(9079, 4809) -9661 = NOT(9083) -9662 = NAND(9083, 6202) -9663 = NAND(9088, 9442) -9666 = NOT(9089) -9667 = NAND(9094, 9445) -9670 = NOT(9095) -9671 = OR(8924, 8393) -9674 = NOT(9117) -9675 = NOT(8924) -9678 = NOT(9127) -9679 = OR(4597, 8388, 8389, 9315) -9682 = OR(8931, 9318) -9685 = OR(4593, 8382, 8383, 8384, 9314) -9690 = NOT(9146) -9691 = NAND(9146, 8717) -9692 = NOT(8931) -9695 = NOT(9149) -9698 = NAND(9401, 9400) -9702 = NAND(9368, 9367) -9707 = OR(8996, 8517) -9710 = NOT(9183) -9711 = NOT(8996) -9714 = NOT(9193) -9715 = NOT(9203) -9716 = NAND(9203, 6235) -9717 = OR(9005, 8518) -9720 = NOT(9206) -9721 = NOT(9220) -9722 = NAND(9220, 7573) -9723 = NOT(9005) -9726 = NOT(9223) -9727 = NAND(9418, 9417) -9732 = AND(9268, 8269) -9733 = NAND(9581, 9326) -9734 = AND(89, 9408, 9332, 8394, 8421) -9735 = AND(89, 9408, 9332, 8394, 8421) -9736 = AND(9265, 8262) -9737 = NOT(9555) -9738 = NOT(9556) -9739 = NAND(9361, 9601) -9740 = NAND(9423, 1115) -9741 = NOT(9423) -9742 = NAND(9299, 9570) -9754 = AND(8333, 9280) -9758 = OR(8898, 9560) -9762 = NAND(8660, 9561) -9763 = NAND(8663, 9563) -9764 = NAND(8666, 9565) -9765 = NAND(8669, 9567) -9766 = NAND(9297, 9569) -9767 = AND(9280, 367) -9768 = NAND(9557, 9276) -9769 = NOT(9307) -9773 = NAND(9307, 367) -9774 = NAND(9571, 9301) -9775 = AND(8365, 9307) -9779 = OR(8920, 9579) -9784 = NOT(9478) -9785 = NAND(9616, 9402) -9786 = OR(8950, 9585) -9790 = AND(89, 9408, 9332, 8394) -9791 = OR(8963, 9591) -9795 = NAND(8735, 9592) -9796 = NAND(8738, 9594) -9797 = NAND(8741, 9596) -9798 = NAND(8744, 9598) -9799 = NAND(9359, 9600) -9800 = NOR(9602, 9369) -9801 = NOR(9603, 9370) -9802 = NOR(9604, 9371) -9803 = NOR(9605, 9372) -9805 = NOT(9485) -9806 = NOT(9488) -9809 = OR(8995, 9611) -9813 = NOR(9612, 9396) -9814 = NOR(9613, 9397) -9815 = NOR(9614, 9398) -9816 = NOR(9615, 9399) -9817 = AND(9617, 9407) -9820 = OR(9029, 9618) -9825 = NOT(9517) -9826 = NOT(9520) -9827 = NOR(9621, 9419) -9828 = NOR(9622, 9420) -9829 = NOR(9623, 9421) -9830 = NOR(9624, 9422) -9835 = NOT(9426) -9836 = NAND(9426, 4789) -9837 = NOT(9429) -9838 = NAND(9429, 4794) -9846 = NAND(3625, 9659) -9847 = NAND(4810, 9661) -9862 = NOT(9462) -9863 = NAND(7553, 9690) -9866 = NOT(9473) -9873 = NAND(5030, 9715) -9876 = NAND(6236, 9721) -9890 = NAND(9795, 9593) -9891 = NAND(9797, 9597) -9892 = NOT(9799) -9893 = NAND(871, 9741) -9894 = NAND(9762, 9562) -9895 = NAND(9764, 9566) -9896 = NOT(9766) -9897 = NOT(9626) -9898 = NAND(9626, 9249) -9899 = NOT(9629) -9900 = NAND(9629, 9250) -9901 = NOT(9632) -9902 = NAND(9632, 9251) -9903 = NOT(9635) -9904 = NAND(9635, 9252) -9905 = NOT(9543) -9906 = NOT(9650) -9907 = NAND(9650, 5769) -9908 = NOT(9653) -9909 = NAND(9653, 5770) -9910 = NOT(9656) -9911 = NAND(9656, 9262) -9917 = NOT(9551) -9923 = NAND(9763, 9564) -9924 = NAND(9765, 9568) -9925 = OR(8902, 9767) -9932 = AND(9575, 9773) -9935 = AND(9575, 9769) -9938 = NOT(9698) -9939 = NAND(9698, 9323) -9945 = NAND(9796, 9595) -9946 = NAND(9798, 9599) -9947 = NOT(9702) -9948 = NAND(9702, 6102) -9949 = AND(9608, 9375) -9953 = NOT(9727) -9954 = NAND(9727, 9412) -9955 = NAND(3502, 9835) -9956 = NAND(3510, 9837) -9957 = NOT(9642) -9958 = NAND(9642, 9645) -9959 = NOT(9646) -9960 = NAND(9646, 9649) -9961 = NAND(9660, 9846) -9964 = NAND(9662, 9847) -9967 = NOT(9663) -9968 = NAND(9663, 9666) -9969 = NOT(9667) -9970 = NAND(9667, 9670) -9971 = NOT(9671) -9972 = NAND(9671, 6213) -9973 = NOT(9675) -9974 = NAND(9675, 7551) -9975 = NOT(9679) -9976 = NAND(9679, 7552) -9977 = NOT(9682) -9978 = NOT(9685) -9979 = NAND(9691, 9863) -9982 = NOT(9692) -9983 = NAND(9814, 9813) -9986 = NAND(9816, 9815) -9989 = NAND(9801, 9800) -9992 = NAND(9803, 9802) -9995 = NOT(9707) -9996 = NAND(9707, 6231) -9997 = NOT(9711) -9998 = NAND(9711, 7572) -9999 = NAND(9716, 9873) -10002 = NOT(9717) -10003 = NAND(9722, 9876) -10006 = NOT(9723) -10007 = NAND(9830, 9829) -10010 = NAND(9828, 9827) -10013 = AND(9791, 8307, 8269) -10014 = AND(9758, 9344, 8307, 8269) -10015 = AND(367, 9754, 9344, 8307, 8269) -10016 = AND(9786, 8394, 8421) -10017 = AND(9820, 9332, 8394, 8421) -10018 = AND(9786, 8394, 8421) -10019 = AND(9820, 9332, 8394, 8421) -10020 = AND(9809, 8298, 8262) -10021 = AND(9779, 9385, 8298, 8262) -10022 = AND(367, 9775, 9385, 8298, 8262) -10023 = NOT(9945) -10024 = NOT(9946) -10025 = NAND(9740, 9893) -10026 = NOT(9923) -10028 = NOT(9924) -10032 = NAND(8595, 9897) -10033 = NAND(8598, 9899) -10034 = NAND(8601, 9901) -10035 = NAND(8604, 9903) -10036 = NAND(4803, 9906) -10037 = NAND(4806, 9908) -10038 = NAND(8627, 9910) -10039 = AND(9809, 8298) -10040 = AND(9779, 9385, 8298) -10041 = AND(367, 9775, 9385, 8298) -10042 = AND(9779, 9385) -10043 = AND(367, 9775, 9385) -10050 = NAND(8727, 9938) -10053 = NOT(9817) -10054 = AND(9817, 9029) -10055 = AND(9786, 8394) -10056 = AND(9820, 9332, 8394) -10057 = AND(9791, 8307) -10058 = AND(9758, 9344, 8307) -10059 = AND(367, 9754, 9344, 8307) -10060 = AND(9758, 9344) -10061 = AND(367, 9754, 9344) -10062 = NAND(4997, 9947) -10067 = NAND(8811, 9953) -10070 = NAND(9955, 9836) -10073 = NAND(9956, 9838) -10076 = NAND(9068, 9957) -10077 = NAND(9074, 9959) -10082 = NAND(9089, 9967) -10083 = NAND(9095, 9969) -10084 = NAND(4871, 9971) -10085 = NAND(6214, 9973) -10086 = NAND(6217, 9975) -10093 = NAND(5027, 9995) -10094 = NAND(6232, 9997) -10101 = OR(9238, 9732, 10013, 10014, 10015) -10102 = OR(9339, 9526, 10016, 10017, 9734) -10103 = OR(9339, 9531, 10018, 10019, 9735) -10104 = OR(9242, 9736, 10020, 10021, 10022) -10105 = AND(9925, 9894) -10106 = AND(9925, 9895) -10107 = AND(9925, 9896) -10108 = AND(9925, 8253) -10109 = NAND(10032, 9898) -10110 = NAND(10033, 9900) -10111 = NAND(10034, 9902) -10112 = NAND(10035, 9904) -10113 = NAND(10036, 9907) -10114 = NAND(10037, 9909) -10115 = NAND(10038, 9911) -10116 = OR(9265, 10039, 10040, 10041) -10119 = OR(9809, 10042, 10043) -10124 = NOT(9925) -10130 = AND(9768, 9925) -10131 = NOT(9932) -10132 = NOT(9935) -10133 = AND(9932, 8920) -10134 = NAND(10050, 9939) -10135 = NOT(9983) -10136 = NAND(9983, 9324) -10137 = NOT(9986) -10138 = NAND(9986, 9784) -10139 = AND(9785, 10053) -10140 = OR(8943, 10055, 10056, 9790) -10141 = OR(9268, 10057, 10058, 10059) -10148 = OR(9791, 10060, 10061) -10155 = NAND(10062, 9948) -10156 = NOT(9989) -10157 = NAND(9989, 9805) -10158 = NOT(9992) -10159 = NAND(9992, 9806) -10160 = NOT(9949) -10161 = NAND(10067, 9954) -10162 = NOT(10007) -10163 = NAND(10007, 9825) -10164 = NOT(10010) -10165 = NAND(10010, 9826) -10170 = NAND(10076, 9958) -10173 = NAND(10077, 9960) -10176 = NOT(9961) -10177 = NAND(9961, 9082) -10178 = NOT(9964) -10179 = NAND(9964, 9086) -10180 = NAND(10082, 9968) -10183 = NAND(10083, 9970) -10186 = NAND(9972, 10084) -10189 = NAND(9974, 10085) -10192 = NAND(9976, 10086) -10195 = NOT(9979) -10196 = NAND(9979, 9982) -10197 = NAND(9996, 10093) -10200 = NAND(9998, 10094) -10203 = NOT(9999) -10204 = NAND(9999, 10002) -10205 = NOT(10003) -10206 = NAND(10003, 10006) -10212 = NAND(10070, 4308) -10213 = NAND(10073, 4313) -10230 = AND(9774, 10131) -10231 = NAND(8730, 10135) -10232 = NAND(9478, 10137) -10233 = OR(10139, 10054) -10234 = NAND(7100, 10140) -10237 = NAND(9485, 10156) -10238 = NAND(9488, 10158) -10239 = NAND(9517, 10162) -10240 = NAND(9520, 10164) -10241 = NOT(10070) -10242 = NOT(10073) -10247 = NAND(8146, 10176) -10248 = NAND(8156, 10178) -10259 = NAND(9692, 10195) -10264 = NAND(9717, 10203) -10265 = NAND(9723, 10205) -10266 = AND(10026, 10124) -10267 = AND(10028, 10124) -10268 = AND(9742, 10124) -10269 = AND(6923, 10124) -10270 = NAND(6762, 10116) -10271 = NAND(3061, 10241) -10272 = NAND(3064, 10242) -10273 = BUFF(10116) -10278 = AND(10141, 5728, 5707, 5718, 5697) -10279 = AND(10141, 5728, 5707, 5718) -10280 = AND(10141, 5728, 5718) -10281 = AND(10141, 5728) -10282 = AND(6784, 10141) -10283 = NOT(10119) -10287 = AND(10148, 5936, 5915, 5926, 5905) -10288 = AND(10148, 5936, 5915, 5926) -10289 = AND(10148, 5936, 5926) -10290 = AND(10148, 5936) -10291 = AND(6881, 10148) -10292 = AND(8898, 10124) -10293 = NAND(10231, 10136) -10294 = NAND(10232, 10138) -10295 = NAND(8412, 10233) -10296 = AND(8959, 10234) -10299 = NAND(10237, 10157) -10300 = NAND(10238, 10159) -10301 = OR(10230, 10133) -10306 = NAND(10239, 10163) -10307 = NAND(10240, 10165) -10308 = BUFF(10148) -10311 = BUFF(10141) -10314 = NOT(10170) -10315 = NAND(10170, 9071) -10316 = NOT(10173) -10317 = NAND(10173, 9077) -10318 = NAND(10247, 10177) -10321 = NAND(10248, 10179) -10324 = NOT(10180) -10325 = NAND(10180, 9092) -10326 = NOT(10183) -10327 = NAND(10183, 9098) -10328 = NOT(10186) -10329 = NAND(10186, 9674) -10330 = NOT(10189) -10331 = NAND(10189, 9678) -10332 = NOT(10192) -10333 = NAND(10192, 9977) -10334 = NAND(10259, 10196) -10337 = NOT(10197) -10338 = NAND(10197, 9710) -10339 = NOT(10200) -10340 = NAND(10200, 9714) -10341 = NAND(10264, 10204) -10344 = NAND(10265, 10206) -10350 = OR(10266, 10105) -10351 = OR(10267, 10106) -10352 = OR(10268, 10107) -10353 = OR(10269, 10108) -10354 = AND(8857, 10270) -10357 = NAND(10271, 10212) -10360 = NAND(10272, 10213) -10367 = OR(7620, 10282) -10375 = OR(7671, 10291) -10381 = OR(10292, 10130) -10388 = AND(10114, 10134, 10293, 10294) -10391 = AND(9582, 10295) -10399 = AND(10113, 10115, 10299, 10300) -10402 = AND(10155, 10161, 10306, 10307) -10406 = OR(3229, 6888, 6889, 6890, 10287) -10409 = OR(3232, 6891, 6892, 10288) -10412 = OR(3236, 6893, 10289) -10415 = OR(3241, 10290) -10419 = OR(3137, 6791, 6792, 6793, 10278) -10422 = OR(3140, 6794, 6795, 10279) -10425 = OR(3144, 6796, 10280) -10428 = OR(3149, 10281) -10431 = NAND(8117, 10314) -10432 = NAND(8134, 10316) -10437 = NAND(8169, 10324) -10438 = NAND(8186, 10326) -10439 = NAND(9117, 10328) -10440 = NAND(9127, 10330) -10441 = NAND(9682, 10332) -10444 = NAND(9183, 10337) -10445 = NAND(9193, 10339) -10450 = NOT(10296) -10451 = AND(10296, 4193) -10455 = NOT(10308) -10456 = NAND(10308, 8242) -10465 = NOT(10311) -10466 = NAND(10311, 8247) -10479 = NOT(10273) -10497 = NOT(10301) -10509 = NAND(10431, 10315) -10512 = NAND(10432, 10317) -10515 = NOT(10318) -10516 = NAND(10318, 8632) -10517 = NOT(10321) -10518 = NAND(10321, 8637) -10519 = NAND(10437, 10325) -10522 = NAND(10438, 10327) -10525 = NAND(10439, 10329) -10528 = NAND(10440, 10331) -10531 = NAND(10441, 10333) -10534 = NOT(10334) -10535 = NAND(10334, 9695) -10536 = NAND(10444, 10338) -10539 = NAND(10445, 10340) -10542 = NOT(10341) -10543 = NAND(10341, 9720) -10544 = NOT(10344) -10545 = NAND(10344, 9726) -10546 = AND(5631, 10450) -10547 = NOT(10391) -10548 = AND(10391, 8950) -10549 = AND(5165, 10367) -10550 = NOT(10354) -10551 = AND(10354, 3126) -10552 = NAND(7411, 10455) -10553 = AND(10375, 9539) -10554 = AND(10375, 9540) -10555 = AND(10375, 9541) -10556 = AND(10375, 6761) -10557 = NOT(10406) -10558 = NAND(10406, 8243) -10559 = NOT(10409) -10560 = NAND(10409, 8244) -10561 = NOT(10412) -10562 = NAND(10412, 8245) -10563 = NOT(10415) -10564 = NAND(10415, 8246) -10565 = NAND(7426, 10465) -10566 = NOT(10419) -10567 = NAND(10419, 8248) -10568 = NOT(10422) -10569 = NAND(10422, 8249) -10570 = NOT(10425) -10571 = NAND(10425, 8250) -10572 = NOT(10428) -10573 = NAND(10428, 8251) -10574 = NOT(10399) -10575 = NOT(10402) -10576 = NOT(10388) -10577 = AND(10399, 10402, 10388) -10581 = AND(10360, 9543, 10273) -10582 = AND(10357, 9905, 10273) -10583 = NOT(10367) -10587 = AND(10367, 5735) -10588 = AND(10367, 3135) -10589 = NOT(10375) -10594 = AND(10381, 7180, 7159, 7170, 7149) -10595 = AND(10381, 7180, 7159, 7170) -10596 = AND(10381, 7180, 7170) -10597 = AND(10381, 7180) -10598 = AND(8444, 10381) -10602 = BUFF(10381) -10609 = NAND(7479, 10515) -10610 = NAND(7491, 10517) -10621 = NAND(9149, 10534) -10626 = NAND(9206, 10542) -10627 = NAND(9223, 10544) -10628 = OR(10546, 10451) -10629 = AND(9733, 10547) -10631 = AND(5166, 10550) -10632 = NAND(10552, 10456) -10637 = NAND(7414, 10557) -10638 = NAND(7417, 10559) -10639 = NAND(7420, 10561) -10640 = NAND(7423, 10563) -10641 = NAND(10565, 10466) -10642 = NAND(7429, 10566) -10643 = NAND(7432, 10568) -10644 = NAND(7435, 10570) -10645 = NAND(7438, 10572) -10647 = AND(886, 887, 10577) -10648 = AND(10360, 8857, 10479) -10649 = AND(10357, 7609, 10479) -10652 = OR(8966, 10598) -10659 = OR(4675, 8451, 8452, 8453, 10594) -10662 = OR(4678, 8454, 8455, 10595) -10665 = OR(4682, 8456, 10596) -10668 = OR(4687, 10597) -10671 = NOT(10509) -10672 = NAND(10509, 8615) -10673 = NOT(10512) -10674 = NAND(10512, 8624) -10675 = NAND(10609, 10516) -10678 = NAND(10610, 10518) -10681 = NOT(10519) -10682 = NAND(10519, 8644) -10683 = NOT(10522) -10684 = NAND(10522, 8653) -10685 = NOT(10525) -10686 = NAND(10525, 9454) -10687 = NOT(10528) -10688 = NAND(10528, 9459) -10689 = NOT(10531) -10690 = NAND(10531, 9978) -10691 = NAND(10621, 10535) -10694 = NOT(10536) -10695 = NAND(10536, 9493) -10696 = NOT(10539) -10697 = NAND(10539, 9498) -10698 = NAND(10626, 10543) -10701 = NAND(10627, 10545) -10704 = OR(10629, 10548) -10705 = AND(3159, 10583) -10706 = OR(10631, 10551) -10707 = AND(9737, 10589) -10708 = AND(9738, 10589) -10709 = AND(9243, 10589) -10710 = AND(5892, 10589) -10711 = NAND(10637, 10558) -10712 = NAND(10638, 10560) -10713 = NAND(10639, 10562) -10714 = NAND(10640, 10564) -10715 = NAND(10642, 10567) -10716 = NAND(10643, 10569) -10717 = NAND(10644, 10571) -10718 = NAND(10645, 10573) -10719 = NOT(10602) -10720 = NAND(10602, 9244) -10729 = NOT(10647) -10730 = AND(5178, 10583) -10731 = AND(2533, 10583) -10737 = NAND(7447, 10671) -10738 = NAND(7465, 10673) -10739 = OR(10648, 10649, 10581, 10582) -10746 = NAND(7503, 10681) -10747 = NAND(7521, 10683) -10748 = NAND(8678, 10685) -10749 = NAND(8690, 10687) -10750 = NAND(9685, 10689) -10753 = NAND(8757, 10694) -10754 = NAND(8769, 10696) -10759 = OR(10705, 10549) -10760 = OR(10707, 10553) -10761 = OR(10708, 10554) -10762 = OR(10709, 10555) -10763 = OR(10710, 10556) -10764 = NAND(8580, 10719) -10765 = AND(10652, 9890) -10766 = AND(10652, 9891) -10767 = AND(10652, 9892) -10768 = AND(10652, 8252) -10769 = NOT(10659) -10770 = NAND(10659, 9245) -10771 = NOT(10662) -10772 = NAND(10662, 9246) -10773 = NOT(10665) -10774 = NAND(10665, 9247) -10775 = NOT(10668) -10776 = NAND(10668, 9248) -10778 = OR(10730, 10587) -10781 = OR(10731, 10588) -10784 = NOT(10652) -10789 = NAND(10737, 10672) -10792 = NAND(10738, 10674) -10796 = NOT(10675) -10797 = NAND(10675, 8633) -10798 = NOT(10678) -10799 = NAND(10678, 8638) -10800 = NAND(10746, 10682) -10803 = NAND(10747, 10684) -10806 = NAND(10748, 10686) -10809 = NAND(10749, 10688) -10812 = NAND(10750, 10690) -10815 = NOT(10691) -10816 = NAND(10691, 9866) -10817 = NAND(10753, 10695) -10820 = NAND(10754, 10697) -10823 = NOT(10698) -10824 = NAND(10698, 9505) -10825 = NOT(10701) -10826 = NAND(10701, 9514) -10827 = NAND(10764, 10720) -10832 = NAND(8583, 10769) -10833 = NAND(8586, 10771) -10834 = NAND(8589, 10773) -10835 = NAND(8592, 10775) -10836 = NOT(10739) -10837 = BUFF(10778) -10838 = BUFF(10778) -10839 = BUFF(10781) -10840 = BUFF(10781) -10845 = NAND(7482, 10796) -10846 = NAND(7494, 10798) -10857 = NAND(9473, 10815) -10862 = NAND(8781, 10823) -10863 = NAND(8799, 10825) -10864 = AND(10023, 10784) -10865 = AND(10024, 10784) -10866 = AND(9739, 10784) -10867 = AND(7136, 10784) -10868 = NAND(10832, 10770) -10869 = NAND(10833, 10772) -10870 = NAND(10834, 10774) -10871 = NAND(10835, 10776) -10872 = NOT(10789) -10873 = NAND(10789, 8616) -10874 = NOT(10792) -10875 = NAND(10792, 8625) -10876 = NAND(10845, 10797) -10879 = NAND(10846, 10799) -10882 = NOT(10800) -10883 = NAND(10800, 8645) -10884 = NOT(10803) -10885 = NAND(10803, 8654) -10886 = NOT(10806) -10887 = NAND(10806, 9455) -10888 = NOT(10809) -10889 = NAND(10809, 9460) -10890 = NOT(10812) -10891 = NAND(10812, 9862) -10892 = NAND(10857, 10816) -10895 = NOT(10817) -10896 = NAND(10817, 9494) -10897 = NOT(10820) -10898 = NAND(10820, 9499) -10899 = NAND(10862, 10824) -10902 = NAND(10863, 10826) -10905 = OR(10864, 10765) -10906 = OR(10865, 10766) -10907 = OR(10866, 10767) -10908 = OR(10867, 10768) -10909 = NAND(7450, 10872) -10910 = NAND(7468, 10874) -10915 = NAND(7506, 10882) -10916 = NAND(7524, 10884) -10917 = NAND(8681, 10886) -10918 = NAND(8693, 10888) -10919 = NAND(9462, 10890) -10922 = NAND(8760, 10895) -10923 = NAND(8772, 10897) -10928 = NAND(10909, 10873) -10931 = NAND(10910, 10875) -10934 = NOT(10876) -10935 = NAND(10876, 8634) -10936 = NOT(10879) -10937 = NAND(10879, 8639) -10938 = NAND(10915, 10883) -10941 = NAND(10916, 10885) -10944 = NAND(10917, 10887) -10947 = NAND(10918, 10889) -10950 = NAND(10919, 10891) -10953 = NOT(10892) -10954 = NAND(10892, 9476) -10955 = NAND(10922, 10896) -10958 = NAND(10923, 10898) -10961 = NOT(10899) -10962 = NAND(10899, 9506) -10963 = NOT(10902) -10964 = NAND(10902, 9515) -10969 = NAND(7485, 10934) -10970 = NAND(7497, 10936) -10981 = NAND(8718, 10953) -10986 = NAND(8784, 10961) -10987 = NAND(8802, 10963) -10988 = NOT(10928) -10989 = NAND(10928, 8617) -10990 = NOT(10931) -10991 = NAND(10931, 8626) -10992 = NAND(10969, 10935) -10995 = NAND(10970, 10937) -10998 = NOT(10938) -10999 = NAND(10938, 8646) -11000 = NOT(10941) -11001 = NAND(10941, 8655) -11002 = NOT(10944) -11003 = NAND(10944, 9456) -11004 = NOT(10947) -11005 = NAND(10947, 9461) -11006 = NOT(10950) -11007 = NAND(10950, 9465) -11008 = NAND(10981, 10954) -11011 = NOT(10955) -11012 = NAND(10955, 9495) -11013 = NOT(10958) -11014 = NAND(10958, 9500) -11015 = NAND(10986, 10962) -11018 = NAND(10987, 10964) -11023 = NAND(7453, 10988) -11024 = NAND(7471, 10990) -11027 = NAND(7509, 10998) -11028 = NAND(7527, 11000) -11029 = NAND(8684, 11002) -11030 = NAND(8696, 11004) -11031 = NAND(8702, 11006) -11034 = NAND(8763, 11011) -11035 = NAND(8775, 11013) -11040 = NOT(10992) -11041 = NAND(10992, 8294) -11042 = NOT(10995) -11043 = NAND(10995, 8295) -11044 = NAND(11023, 10989) -11047 = NAND(11024, 10991) -11050 = NAND(11027, 10999) -11053 = NAND(11028, 11001) -11056 = NAND(11029, 11003) -11059 = NAND(11030, 11005) -11062 = NAND(11031, 11007) -11065 = NOT(11008) -11066 = NAND(11008, 9477) -11067 = NAND(11034, 11012) -11070 = NAND(11035, 11014) -11073 = NOT(11015) -11074 = NAND(11015, 9507) -11075 = NOT(11018) -11076 = NAND(11018, 9516) -11077 = NAND(7488, 11040) -11078 = NAND(7500, 11042) -11095 = NAND(8721, 11065) -11098 = NAND(8787, 11073) -11099 = NAND(8805, 11075) -11100 = NAND(11077, 11041) -11103 = NAND(11078, 11043) -11106 = NOT(11056) -11107 = NAND(11056, 9319) -11108 = NOT(11059) -11109 = NAND(11059, 9320) -11110 = NOT(11067) -11111 = NAND(11067, 9381) -11112 = NOT(11070) -11113 = NAND(11070, 9382) -11114 = NOT(11044) -11115 = NAND(11044, 8618) -11116 = NOT(11047) -11117 = NAND(11047, 8619) -11118 = NOT(11050) -11119 = NAND(11050, 8647) -11120 = NOT(11053) -11121 = NAND(11053, 8648) -11122 = NOT(11062) -11123 = NAND(11062, 9466) -11124 = NAND(11095, 11066) -11127 = NAND(11098, 11074) -11130 = NAND(11099, 11076) -11137 = NAND(8687, 11106) -11138 = NAND(8699, 11108) -11139 = NAND(8766, 11110) -11140 = NAND(8778, 11112) -11141 = NAND(7456, 11114) -11142 = NAND(7474, 11116) -11143 = NAND(7512, 11118) -11144 = NAND(7530, 11120) -11145 = NAND(8705, 11122) -11152 = AND(11103, 8871, 10283) -11153 = AND(11100, 7655, 10283) -11154 = AND(11103, 9551, 10119) -11155 = AND(11100, 9917, 10119) -11156 = NAND(11137, 11107) -11159 = NAND(11138, 11109) -11162 = NAND(11139, 11111) -11165 = NAND(11140, 11113) -11168 = NAND(11141, 11115) -11171 = NAND(11142, 11117) -11174 = NAND(11143, 11119) -11177 = NAND(11144, 11121) -11180 = NAND(11145, 11123) -11183 = NOT(11124) -11184 = NAND(11124, 9468) -11185 = NOT(11127) -11186 = NAND(11127, 9508) -11187 = NOT(11130) -11188 = NAND(11130, 9509) -11205 = OR(11152, 11153, 11154, 11155) -11210 = NAND(8724, 11183) -11211 = NAND(8790, 11185) -11212 = NAND(8808, 11187) -11213 = NOT(11168) -11214 = NAND(11168, 8260) -11215 = NOT(11171) -11216 = NAND(11171, 8261) -11217 = NOT(11174) -11218 = NAND(11174, 8296) -11219 = NOT(11177) -11220 = NAND(11177, 8297) -11222 = AND(11159, 9575, 1218) -11223 = AND(11156, 8927, 1218) -11224 = AND(11159, 9935, 750) -11225 = AND(11156, 10132, 750) -11226 = AND(11165, 9608, 10497) -11227 = AND(11162, 9001, 10497) -11228 = AND(11165, 9949, 10301) -11229 = AND(11162, 10160, 10301) -11231 = NOT(11180) -11232 = NAND(11180, 9467) -11233 = NAND(11210, 11184) -11236 = NAND(11211, 11186) -11239 = NAND(11212, 11188) -11242 = NAND(7459, 11213) -11243 = NAND(7462, 11215) -11244 = NAND(7515, 11217) -11245 = NAND(7518, 11219) -11246 = NOT(11205) -11250 = NAND(8708, 11231) -11252 = OR(11222, 11223, 11224, 11225) -11257 = OR(11226, 11227, 11228, 11229) -11260 = NAND(11242, 11214) -11261 = NAND(11243, 11216) -11262 = NAND(11244, 11218) -11263 = NAND(11245, 11220) -11264 = NOT(11233) -11265 = NAND(11233, 9322) -11267 = NOT(11236) -11268 = NAND(11236, 9383) -11269 = NOT(11239) -11270 = NAND(11239, 9384) -11272 = NAND(11250, 11232) -11277 = NOT(11261) -11278 = AND(10273, 11260) -11279 = NOT(11263) -11280 = AND(10119, 11262) -11282 = NAND(8714, 11264) -11283 = NOT(11252) -11284 = NAND(8793, 11267) -11285 = NAND(8796, 11269) -11286 = NOT(11257) -11288 = AND(11277, 10479) -11289 = AND(11279, 10283) -11290 = NOT(11272) -11291 = NAND(11272, 9321) -11292 = NAND(11282, 11265) -11293 = NAND(11284, 11268) -11294 = NAND(11285, 11270) -11295 = NAND(8711, 11290) -11296 = NOT(11292) -11297 = NOT(11294) -11298 = AND(10301, 11293) -11299 = OR(11288, 11278) -11302 = OR(11289, 11280) -11307 = NAND(11295, 11291) -11308 = AND(11296, 1218) -11309 = AND(11297, 10497) -11312 = NAND(11302, 11246) -11313 = NAND(11299, 10836) -11314 = NOT(11299) -11315 = NOT(11302) -11316 = AND(750, 11307) -11317 = OR(11309, 11298) -11320 = NAND(11205, 11315) -11321 = NAND(10739, 11314) -11323 = OR(11308, 11316) -11327 = NAND(11312, 11320) -11328 = NAND(11313, 11321) -11329 = NAND(11317, 11286) -11331 = NOT(11317) -11333 = NOT(11327) -11334 = NOT(11328) -11335 = NAND(11257, 11331) -11336 = NAND(11323, 11283) -11337 = NOT(11323) -11338 = NAND(11329, 11335) -11339 = NAND(11252, 11337) -11340 = NOT(11338) -11341 = NAND(11336, 11339) -11342 = NOT(11341) diff --git a/ISCAS85/c880.bench b/ISCAS85/c880.bench deleted file mode 100644 index cda033f..0000000 --- a/ISCAS85/c880.bench +++ /dev/null @@ -1,473 +0,0 @@ -# c880 - -INPUT(1) -INPUT(8) -INPUT(13) -INPUT(17) -INPUT(26) -INPUT(29) -INPUT(36) -INPUT(42) -INPUT(51) -INPUT(55) -INPUT(59) -INPUT(68) -INPUT(72) -INPUT(73) -INPUT(74) -INPUT(75) -INPUT(80) -INPUT(85) -INPUT(86) -INPUT(87) -INPUT(88) -INPUT(89) -INPUT(90) -INPUT(91) -INPUT(96) -INPUT(101) -INPUT(106) -INPUT(111) -INPUT(116) -INPUT(121) -INPUT(126) -INPUT(130) -INPUT(135) -INPUT(138) -INPUT(143) -INPUT(146) -INPUT(149) -INPUT(152) -INPUT(153) -INPUT(156) -INPUT(159) -INPUT(165) -INPUT(171) -INPUT(177) -INPUT(183) -INPUT(189) -INPUT(195) -INPUT(201) -INPUT(207) -INPUT(210) -INPUT(219) -INPUT(228) -INPUT(237) -INPUT(246) -INPUT(255) -INPUT(259) -INPUT(260) -INPUT(261) -INPUT(267) -INPUT(268) - -OUTPUT(388) -OUTPUT(389) -OUTPUT(390) -OUTPUT(391) -OUTPUT(418) -OUTPUT(419) -OUTPUT(420) -OUTPUT(421) -OUTPUT(422) -OUTPUT(423) -OUTPUT(446) -OUTPUT(447) -OUTPUT(448) -OUTPUT(449) -OUTPUT(450) -OUTPUT(767) -OUTPUT(768) -OUTPUT(850) -OUTPUT(863) -OUTPUT(864) -OUTPUT(865) -OUTPUT(866) -OUTPUT(874) -OUTPUT(878) -OUTPUT(879) -OUTPUT(880) - -269 = NAND(1, 8, 13, 17) -270 = NAND(1, 26, 13, 17) -273 = AND(29, 36, 42) -276 = AND(1, 26, 51) -279 = NAND(1, 8, 51, 17) -280 = NAND(1, 8, 13, 55) -284 = NAND(59, 42, 68, 72) -285 = NAND(29, 68) -286 = NAND(59, 68, 74) -287 = AND(29, 75, 80) -290 = AND(29, 75, 42) -291 = AND(29, 36, 80) -292 = AND(29, 36, 42) -293 = AND(59, 75, 80) -294 = AND(59, 75, 42) -295 = AND(59, 36, 80) -296 = AND(59, 36, 42) -297 = AND(85, 86) -298 = OR(87, 88) -301 = NAND(91, 96) -302 = OR(91, 96) -303 = NAND(101, 106) -304 = OR(101, 106) -305 = NAND(111, 116) -306 = OR(111, 116) -307 = NAND(121, 126) -308 = OR(121, 126) -309 = AND(8, 138) -310 = NOT(268) -316 = AND(51, 138) -317 = AND(17, 138) -318 = AND(152, 138) -319 = NAND(59, 156) -322 = NOR(17, 42) -323 = AND(17, 42) -324 = NAND(159, 165) -325 = OR(159, 165) -326 = NAND(171, 177) -327 = OR(171, 177) -328 = NAND(183, 189) -329 = OR(183, 189) -330 = NAND(195, 201) -331 = OR(195, 201) -332 = AND(210, 91) -333 = AND(210, 96) -334 = AND(210, 101) -335 = AND(210, 106) -336 = AND(210, 111) -337 = AND(255, 259) -338 = AND(210, 116) -339 = AND(255, 260) -340 = AND(210, 121) -341 = AND(255, 267) -342 = NOT(269) -343 = NOT(273) -344 = OR(270, 273) -345 = NOT(276) -346 = NOT(276) -347 = NOT(279) -348 = NOR(280, 284) -349 = OR(280, 285) -350 = OR(280, 286) -351 = NOT(293) -352 = NOT(294) -353 = NOT(295) -354 = NOT(296) -355 = NAND(89, 298) -356 = AND(90, 298) -357 = NAND(301, 302) -360 = NAND(303, 304) -363 = NAND(305, 306) -366 = NAND(307, 308) -369 = NOT(310) -375 = NOR(322, 323) -376 = NAND(324, 325) -379 = NAND(326, 327) -382 = NAND(328, 329) -385 = NAND(330, 331) -388 = BUFF(290) -389 = BUFF(291) -390 = BUFF(292) -391 = BUFF(297) -392 = OR(270, 343) -393 = NOT(345) -399 = NOT(346) -400 = AND(348, 73) -401 = NOT(349) -402 = NOT(350) -403 = NOT(355) -404 = NOT(357) -405 = NOT(360) -406 = AND(357, 360) -407 = NOT(363) -408 = NOT(366) -409 = AND(363, 366) -410 = NAND(347, 352) -411 = NOT(376) -412 = NOT(379) -413 = AND(376, 379) -414 = NOT(382) -415 = NOT(385) -416 = AND(382, 385) -417 = AND(210, 369) -418 = BUFF(342) -419 = BUFF(344) -420 = BUFF(351) -421 = BUFF(353) -422 = BUFF(354) -423 = BUFF(356) -424 = NOT(400) -425 = AND(404, 405) -426 = AND(407, 408) -427 = AND(319, 393, 55) -432 = AND(393, 17, 287) -437 = NAND(393, 287, 55) -442 = NAND(375, 59, 156, 393) -443 = NAND(393, 319, 17) -444 = AND(411, 412) -445 = AND(414, 415) -446 = BUFF(392) -447 = BUFF(399) -448 = BUFF(401) -449 = BUFF(402) -450 = BUFF(403) -451 = NOT(424) -460 = NOR(406, 425) -463 = NOR(409, 426) -466 = NAND(442, 410) -475 = AND(143, 427) -476 = AND(310, 432) -477 = AND(146, 427) -478 = AND(310, 432) -479 = AND(149, 427) -480 = AND(310, 432) -481 = AND(153, 427) -482 = AND(310, 432) -483 = NAND(443, 1) -488 = OR(369, 437) -489 = OR(369, 437) -490 = OR(369, 437) -491 = OR(369, 437) -492 = NOR(413, 444) -495 = NOR(416, 445) -498 = NAND(130, 460) -499 = OR(130, 460) -500 = NAND(463, 135) -501 = OR(463, 135) -502 = AND(91, 466) -503 = NOR(475, 476) -504 = AND(96, 466) -505 = NOR(477, 478) -506 = AND(101, 466) -507 = NOR(479, 480) -508 = AND(106, 466) -509 = NOR(481, 482) -510 = AND(143, 483) -511 = AND(111, 466) -512 = AND(146, 483) -513 = AND(116, 466) -514 = AND(149, 483) -515 = AND(121, 466) -516 = AND(153, 483) -517 = AND(126, 466) -518 = NAND(130, 492) -519 = OR(130, 492) -520 = NAND(495, 207) -521 = OR(495, 207) -522 = AND(451, 159) -523 = AND(451, 165) -524 = AND(451, 171) -525 = AND(451, 177) -526 = AND(451, 183) -527 = NAND(451, 189) -528 = NAND(451, 195) -529 = NAND(451, 201) -530 = NAND(498, 499) -533 = NAND(500, 501) -536 = NOR(309, 502) -537 = NOR(316, 504) -538 = NOR(317, 506) -539 = NOR(318, 508) -540 = NOR(510, 511) -541 = NOR(512, 513) -542 = NOR(514, 515) -543 = NOR(516, 517) -544 = NAND(518, 519) -547 = NAND(520, 521) -550 = NOT(530) -551 = NOT(533) -552 = AND(530, 533) -553 = NAND(536, 503) -557 = NAND(537, 505) -561 = NAND(538, 507) -565 = NAND(539, 509) -569 = NAND(488, 540) -573 = NAND(489, 541) -577 = NAND(490, 542) -581 = NAND(491, 543) -585 = NOT(544) -586 = NOT(547) -587 = AND(544, 547) -588 = AND(550, 551) -589 = AND(585, 586) -590 = NAND(553, 159) -593 = OR(553, 159) -596 = AND(246, 553) -597 = NAND(557, 165) -600 = OR(557, 165) -605 = AND(246, 557) -606 = NAND(561, 171) -609 = OR(561, 171) -615 = AND(246, 561) -616 = NAND(565, 177) -619 = OR(565, 177) -624 = AND(246, 565) -625 = NAND(569, 183) -628 = OR(569, 183) -631 = AND(246, 569) -632 = NAND(573, 189) -635 = OR(573, 189) -640 = AND(246, 573) -641 = NAND(577, 195) -644 = OR(577, 195) -650 = AND(246, 577) -651 = NAND(581, 201) -654 = OR(581, 201) -659 = AND(246, 581) -660 = NOR(552, 588) -661 = NOR(587, 589) -662 = NOT(590) -665 = AND(593, 590) -669 = NOR(596, 522) -670 = NOT(597) -673 = AND(600, 597) -677 = NOR(605, 523) -678 = NOT(606) -682 = AND(609, 606) -686 = NOR(615, 524) -687 = NOT(616) -692 = AND(619, 616) -696 = NOR(624, 525) -697 = NOT(625) -700 = AND(628, 625) -704 = NOR(631, 526) -705 = NOT(632) -708 = AND(635, 632) -712 = NOR(337, 640) -713 = NOT(641) -717 = AND(644, 641) -721 = NOR(339, 650) -722 = NOT(651) -727 = AND(654, 651) -731 = NOR(341, 659) -732 = NAND(654, 261) -733 = NAND(644, 654, 261) -734 = NAND(635, 644, 654, 261) -735 = NOT(662) -736 = AND(228, 665) -737 = AND(237, 662) -738 = NOT(670) -739 = AND(228, 673) -740 = AND(237, 670) -741 = NOT(678) -742 = AND(228, 682) -743 = AND(237, 678) -744 = NOT(687) -745 = AND(228, 692) -746 = AND(237, 687) -747 = NOT(697) -748 = AND(228, 700) -749 = AND(237, 697) -750 = NOT(705) -751 = AND(228, 708) -752 = AND(237, 705) -753 = NOT(713) -754 = AND(228, 717) -755 = AND(237, 713) -756 = NOT(722) -757 = NOR(727, 261) -758 = AND(727, 261) -759 = AND(228, 727) -760 = AND(237, 722) -761 = NAND(644, 722) -762 = NAND(635, 713) -763 = NAND(635, 644, 722) -764 = NAND(609, 687) -765 = NAND(600, 678) -766 = NAND(600, 609, 687) -767 = BUFF(660) -768 = BUFF(661) -769 = NOR(736, 737) -770 = NOR(739, 740) -771 = NOR(742, 743) -772 = NOR(745, 746) -773 = NAND(750, 762, 763, 734) -777 = NOR(748, 749) -778 = NAND(753, 761, 733) -781 = NOR(751, 752) -782 = NAND(756, 732) -785 = NOR(754, 755) -786 = NOR(757, 758) -787 = NOR(759, 760) -788 = NOR(700, 773) -789 = AND(700, 773) -790 = NOR(708, 778) -791 = AND(708, 778) -792 = NOR(717, 782) -793 = AND(717, 782) -794 = AND(219, 786) -795 = NAND(628, 773) -796 = NAND(795, 747) -802 = NOR(788, 789) -803 = NOR(790, 791) -804 = NOR(792, 793) -805 = NOR(340, 794) -806 = NOR(692, 796) -807 = AND(692, 796) -808 = AND(219, 802) -809 = AND(219, 803) -810 = AND(219, 804) -811 = NAND(805, 787, 731, 529) -812 = NAND(619, 796) -813 = NAND(609, 619, 796) -814 = NAND(600, 609, 619, 796) -815 = NAND(738, 765, 766, 814) -819 = NAND(741, 764, 813) -822 = NAND(744, 812) -825 = NOR(806, 807) -826 = NOR(335, 808) -827 = NOR(336, 809) -828 = NOR(338, 810) -829 = NOT(811) -830 = NOR(665, 815) -831 = AND(665, 815) -832 = NOR(673, 819) -833 = AND(673, 819) -834 = NOR(682, 822) -835 = AND(682, 822) -836 = AND(219, 825) -837 = NAND(826, 777, 704) -838 = NAND(827, 781, 712, 527) -839 = NAND(828, 785, 721, 528) -840 = NOT(829) -841 = NAND(815, 593) -842 = NOR(830, 831) -843 = NOR(832, 833) -844 = NOR(834, 835) -845 = NOR(334, 836) -846 = NOT(837) -847 = NOT(838) -848 = NOT(839) -849 = AND(735, 841) -850 = BUFF(840) -851 = AND(219, 842) -852 = AND(219, 843) -853 = AND(219, 844) -854 = NAND(845, 772, 696) -855 = NOT(846) -856 = NOT(847) -857 = NOT(848) -858 = NOT(849) -859 = NOR(417, 851) -860 = NOR(332, 852) -861 = NOR(333, 853) -862 = NOT(854) -863 = BUFF(855) -864 = BUFF(856) -865 = BUFF(857) -866 = BUFF(858) -867 = NAND(859, 769, 669) -868 = NAND(860, 770, 677) -869 = NAND(861, 771, 686) -870 = NOT(862) -871 = NOT(867) -872 = NOT(868) -873 = NOT(869) -874 = BUFF(870) -875 = NOT(871) -876 = NOT(872) -877 = NOT(873) -878 = BUFF(875) -879 = BUFF(876) -880 = BUFF(877) diff --git a/ISCAS85/convert.py b/ISCAS85/convert.py deleted file mode 100644 index 8691139..0000000 --- a/ISCAS85/convert.py +++ /dev/null @@ -1,17 +0,0 @@ -import os -import re - -for file in os.listdir("."): - if not file.endswith(".bench"): continue - - content = open(file, "r").read() - - content = re.sub(r"(\d+)", r"\\\1", content) - - print(content) - - f = open("new/" + file, "w") - f.write(content) - f.close() - - diff --git a/ISCAS85/new/c1355.bench b/ISCAS85/new/c1355.bench deleted file mode 100644 index 12c927a..0000000 --- a/ISCAS85/new/c1355.bench +++ /dev/null @@ -1,623 +0,0 @@ -# c\1355 - -INPUT(\1) -INPUT(\8) -INPUT(\15) -INPUT(\22) -INPUT(\29) -INPUT(\36) -INPUT(\43) -INPUT(\50) -INPUT(\57) -INPUT(\64) -INPUT(\71) -INPUT(\78) -INPUT(\85) -INPUT(\92) -INPUT(\99) -INPUT(\106) -INPUT(\113) -INPUT(\120) -INPUT(\127) -INPUT(\134) -INPUT(\141) -INPUT(\148) -INPUT(\155) -INPUT(\162) -INPUT(\169) -INPUT(\176) -INPUT(\183) -INPUT(\190) -INPUT(\197) -INPUT(\204) -INPUT(\211) -INPUT(\218) -INPUT(\225) -INPUT(\226) -INPUT(\227) -INPUT(\228) -INPUT(\229) -INPUT(\230) -INPUT(\231) -INPUT(\232) -INPUT(\233) - -OUTPUT(\1324) -OUTPUT(\1325) -OUTPUT(\1326) -OUTPUT(\1327) -OUTPUT(\1328) -OUTPUT(\1329) -OUTPUT(\1330) -OUTPUT(\1331) -OUTPUT(\1332) -OUTPUT(\1333) -OUTPUT(\1334) -OUTPUT(\1335) -OUTPUT(\1336) -OUTPUT(\1337) -OUTPUT(\1338) -OUTPUT(\1339) -OUTPUT(\1340) -OUTPUT(\1341) -OUTPUT(\1342) -OUTPUT(\1343) -OUTPUT(\1344) -OUTPUT(\1345) -OUTPUT(\1346) -OUTPUT(\1347) -OUTPUT(\1348) -OUTPUT(\1349) -OUTPUT(\1350) -OUTPUT(\1351) -OUTPUT(\1352) -OUTPUT(\1353) -OUTPUT(\1354) -OUTPUT(\1355) - -\242 = AND(\225, \233) -\245 = AND(\226, \233) -\248 = AND(\227, \233) -\251 = AND(\228, \233) -\254 = AND(\229, \233) -\257 = AND(\230, \233) -\260 = AND(\231, \233) -\263 = AND(\232, \233) -\266 = NAND(\1, \8) -\269 = NAND(\15, \22) -\272 = NAND(\29, \36) -\275 = NAND(\43, \50) -\278 = NAND(\57, \64) -\281 = NAND(\71, \78) -\284 = NAND(\85, \92) -\287 = NAND(\99, \106) -\290 = NAND(\113, \120) -\293 = NAND(\127, \134) -\296 = NAND(\141, \148) -\299 = NAND(\155, \162) -\302 = NAND(\169, \176) -\305 = NAND(\183, \190) -\308 = NAND(\197, \204) -\311 = NAND(\211, \218) -\314 = NAND(\1, \29) -\317 = NAND(\57, \85) -\320 = NAND(\8, \36) -\323 = NAND(\64, \92) -\326 = NAND(\15, \43) -\329 = NAND(\71, \99) -\332 = NAND(\22, \50) -\335 = NAND(\78, \106) -\338 = NAND(\113, \141) -\341 = NAND(\169, \197) -\344 = NAND(\120, \148) -\347 = NAND(\176, \204) -\350 = NAND(\127, \155) -\353 = NAND(\183, \211) -\356 = NAND(\134, \162) -\359 = NAND(\190, \218) -\362 = NAND(\1, \266) -\363 = NAND(\8, \266) -\364 = NAND(\15, \269) -\365 = NAND(\22, \269) -\366 = NAND(\29, \272) -\367 = NAND(\36, \272) -\368 = NAND(\43, \275) -\369 = NAND(\50, \275) -\370 = NAND(\57, \278) -\371 = NAND(\64, \278) -\372 = NAND(\71, \281) -\373 = NAND(\78, \281) -\374 = NAND(\85, \284) -\375 = NAND(\92, \284) -\376 = NAND(\99, \287) -\377 = NAND(\106, \287) -\378 = NAND(\113, \290) -\379 = NAND(\120, \290) -\380 = NAND(\127, \293) -\381 = NAND(\134, \293) -\382 = NAND(\141, \296) -\383 = NAND(\148, \296) -\384 = NAND(\155, \299) -\385 = NAND(\162, \299) -\386 = NAND(\169, \302) -\387 = NAND(\176, \302) -\388 = NAND(\183, \305) -\389 = NAND(\190, \305) -\390 = NAND(\197, \308) -\391 = NAND(\204, \308) -\392 = NAND(\211, \311) -\393 = NAND(\218, \311) -\394 = NAND(\1, \314) -\395 = NAND(\29, \314) -\396 = NAND(\57, \317) -\397 = NAND(\85, \317) -\398 = NAND(\8, \320) -\399 = NAND(\36, \320) -\400 = NAND(\64, \323) -\401 = NAND(\92, \323) -\402 = NAND(\15, \326) -\403 = NAND(\43, \326) -\404 = NAND(\71, \329) -\405 = NAND(\99, \329) -\406 = NAND(\22, \332) -\407 = NAND(\50, \332) -\408 = NAND(\78, \335) -\409 = NAND(\106, \335) -\410 = NAND(\113, \338) -\411 = NAND(\141, \338) -\412 = NAND(\169, \341) -\413 = NAND(\197, \341) -\414 = NAND(\120, \344) -\415 = NAND(\148, \344) -\416 = NAND(\176, \347) -\417 = NAND(\204, \347) -\418 = NAND(\127, \350) -\419 = NAND(\155, \350) -\420 = NAND(\183, \353) -\421 = NAND(\211, \353) -\422 = NAND(\134, \356) -\423 = NAND(\162, \356) -\424 = NAND(\190, \359) -\425 = NAND(\218, \359) -\426 = NAND(\362, \363) -\429 = NAND(\364, \365) -\432 = NAND(\366, \367) -\435 = NAND(\368, \369) -\438 = NAND(\370, \371) -\441 = NAND(\372, \373) -\444 = NAND(\374, \375) -\447 = NAND(\376, \377) -\450 = NAND(\378, \379) -\453 = NAND(\380, \381) -\456 = NAND(\382, \383) -\459 = NAND(\384, \385) -\462 = NAND(\386, \387) -\465 = NAND(\388, \389) -\468 = NAND(\390, \391) -\471 = NAND(\392, \393) -\474 = NAND(\394, \395) -\477 = NAND(\396, \397) -\480 = NAND(\398, \399) -\483 = NAND(\400, \401) -\486 = NAND(\402, \403) -\489 = NAND(\404, \405) -\492 = NAND(\406, \407) -\495 = NAND(\408, \409) -\498 = NAND(\410, \411) -\501 = NAND(\412, \413) -\504 = NAND(\414, \415) -\507 = NAND(\416, \417) -\510 = NAND(\418, \419) -\513 = NAND(\420, \421) -\516 = NAND(\422, \423) -\519 = NAND(\424, \425) -\522 = NAND(\426, \429) -\525 = NAND(\432, \435) -\528 = NAND(\438, \441) -\531 = NAND(\444, \447) -\534 = NAND(\450, \453) -\537 = NAND(\456, \459) -\540 = NAND(\462, \465) -\543 = NAND(\468, \471) -\546 = NAND(\474, \477) -\549 = NAND(\480, \483) -\552 = NAND(\486, \489) -\555 = NAND(\492, \495) -\558 = NAND(\498, \501) -\561 = NAND(\504, \507) -\564 = NAND(\510, \513) -\567 = NAND(\516, \519) -\570 = NAND(\426, \522) -\571 = NAND(\429, \522) -\572 = NAND(\432, \525) -\573 = NAND(\435, \525) -\574 = NAND(\438, \528) -\575 = NAND(\441, \528) -\576 = NAND(\444, \531) -\577 = NAND(\447, \531) -\578 = NAND(\450, \534) -\579 = NAND(\453, \534) -\580 = NAND(\456, \537) -\581 = NAND(\459, \537) -\582 = NAND(\462, \540) -\583 = NAND(\465, \540) -\584 = NAND(\468, \543) -\585 = NAND(\471, \543) -\586 = NAND(\474, \546) -\587 = NAND(\477, \546) -\588 = NAND(\480, \549) -\589 = NAND(\483, \549) -\590 = NAND(\486, \552) -\591 = NAND(\489, \552) -\592 = NAND(\492, \555) -\593 = NAND(\495, \555) -\594 = NAND(\498, \558) -\595 = NAND(\501, \558) -\596 = NAND(\504, \561) -\597 = NAND(\507, \561) -\598 = NAND(\510, \564) -\599 = NAND(\513, \564) -\600 = NAND(\516, \567) -\601 = NAND(\519, \567) -\602 = NAND(\570, \571) -\607 = NAND(\572, \573) -\612 = NAND(\574, \575) -\617 = NAND(\576, \577) -\622 = NAND(\578, \579) -\627 = NAND(\580, \581) -\632 = NAND(\582, \583) -\637 = NAND(\584, \585) -\642 = NAND(\586, \587) -\645 = NAND(\588, \589) -\648 = NAND(\590, \591) -\651 = NAND(\592, \593) -\654 = NAND(\594, \595) -\657 = NAND(\596, \597) -\660 = NAND(\598, \599) -\663 = NAND(\600, \601) -\666 = NAND(\602, \607) -\669 = NAND(\612, \617) -\672 = NAND(\602, \612) -\675 = NAND(\607, \617) -\678 = NAND(\622, \627) -\681 = NAND(\632, \637) -\684 = NAND(\622, \632) -\687 = NAND(\627, \637) -\690 = NAND(\602, \666) -\691 = NAND(\607, \666) -\692 = NAND(\612, \669) -\693 = NAND(\617, \669) -\694 = NAND(\602, \672) -\695 = NAND(\612, \672) -\696 = NAND(\607, \675) -\697 = NAND(\617, \675) -\698 = NAND(\622, \678) -\699 = NAND(\627, \678) -\700 = NAND(\632, \681) -\701 = NAND(\637, \681) -\702 = NAND(\622, \684) -\703 = NAND(\632, \684) -\704 = NAND(\627, \687) -\705 = NAND(\637, \687) -\706 = NAND(\690, \691) -\709 = NAND(\692, \693) -\712 = NAND(\694, \695) -\715 = NAND(\696, \697) -\718 = NAND(\698, \699) -\721 = NAND(\700, \701) -\724 = NAND(\702, \703) -\727 = NAND(\704, \705) -\730 = NAND(\242, \718) -\733 = NAND(\245, \721) -\736 = NAND(\248, \724) -\739 = NAND(\251, \727) -\742 = NAND(\254, \706) -\745 = NAND(\257, \709) -\748 = NAND(\260, \712) -\751 = NAND(\263, \715) -\754 = NAND(\242, \730) -\755 = NAND(\718, \730) -\756 = NAND(\245, \733) -\757 = NAND(\721, \733) -\758 = NAND(\248, \736) -\759 = NAND(\724, \736) -\760 = NAND(\251, \739) -\761 = NAND(\727, \739) -\762 = NAND(\254, \742) -\763 = NAND(\706, \742) -\764 = NAND(\257, \745) -\765 = NAND(\709, \745) -\766 = NAND(\260, \748) -\767 = NAND(\712, \748) -\768 = NAND(\263, \751) -\769 = NAND(\715, \751) -\770 = NAND(\754, \755) -\773 = NAND(\756, \757) -\776 = NAND(\758, \759) -\779 = NAND(\760, \761) -\782 = NAND(\762, \763) -\785 = NAND(\764, \765) -\788 = NAND(\766, \767) -\791 = NAND(\768, \769) -\794 = NAND(\642, \770) -\797 = NAND(\645, \773) -\800 = NAND(\648, \776) -\803 = NAND(\651, \779) -\806 = NAND(\654, \782) -\809 = NAND(\657, \785) -\812 = NAND(\660, \788) -\815 = NAND(\663, \791) -\818 = NAND(\642, \794) -\819 = NAND(\770, \794) -\820 = NAND(\645, \797) -\821 = NAND(\773, \797) -\822 = NAND(\648, \800) -\823 = NAND(\776, \800) -\824 = NAND(\651, \803) -\825 = NAND(\779, \803) -\826 = NAND(\654, \806) -\827 = NAND(\782, \806) -\828 = NAND(\657, \809) -\829 = NAND(\785, \809) -\830 = NAND(\660, \812) -\831 = NAND(\788, \812) -\832 = NAND(\663, \815) -\833 = NAND(\791, \815) -\834 = NAND(\818, \819) -\847 = NAND(\820, \821) -\860 = NAND(\822, \823) -\873 = NAND(\824, \825) -\886 = NAND(\828, \829) -\899 = NAND(\832, \833) -\912 = NAND(\830, \831) -\925 = NAND(\826, \827) -\938 = NOT(\834) -\939 = NOT(\847) -\940 = NOT(\860) -\941 = NOT(\834) -\942 = NOT(\847) -\943 = NOT(\873) -\944 = NOT(\834) -\945 = NOT(\860) -\946 = NOT(\873) -\947 = NOT(\847) -\948 = NOT(\860) -\949 = NOT(\873) -\950 = NOT(\886) -\951 = NOT(\899) -\952 = NOT(\886) -\953 = NOT(\912) -\954 = NOT(\925) -\955 = NOT(\899) -\956 = NOT(\925) -\957 = NOT(\912) -\958 = NOT(\925) -\959 = NOT(\886) -\960 = NOT(\912) -\961 = NOT(\925) -\962 = NOT(\886) -\963 = NOT(\899) -\964 = NOT(\925) -\965 = NOT(\912) -\966 = NOT(\899) -\967 = NOT(\886) -\968 = NOT(\912) -\969 = NOT(\899) -\970 = NOT(\847) -\971 = NOT(\873) -\972 = NOT(\847) -\973 = NOT(\860) -\974 = NOT(\834) -\975 = NOT(\873) -\976 = NOT(\834) -\977 = NOT(\860) -\978 = AND(\938, \939, \940, \873) -\979 = AND(\941, \942, \860, \943) -\980 = AND(\944, \847, \945, \946) -\981 = AND(\834, \947, \948, \949) -\982 = AND(\958, \959, \960, \899) -\983 = AND(\961, \962, \912, \963) -\984 = AND(\964, \886, \965, \966) -\985 = AND(\925, \967, \968, \969) -\986 = OR(\978, \979, \980, \981) -\991 = OR(\982, \983, \984, \985) -\996 = AND(\925, \950, \912, \951, \986) -\1001 = AND(\925, \952, \953, \899, \986) -\1006 = AND(\954, \886, \912, \955, \986) -\1011 = AND(\956, \886, \957, \899, \986) -\1016 = AND(\834, \970, \860, \971, \991) -\1021 = AND(\834, \972, \973, \873, \991) -\1026 = AND(\974, \847, \860, \975, \991) -\1031 = AND(\976, \847, \977, \873, \991) -\1036 = AND(\834, \996) -\1039 = AND(\847, \996) -\1042 = AND(\860, \996) -\1045 = AND(\873, \996) -\1048 = AND(\834, \1001) -\1051 = AND(\847, \1001) -\1054 = AND(\860, \1001) -\1057 = AND(\873, \1001) -\1060 = AND(\834, \1006) -\1063 = AND(\847, \1006) -\1066 = AND(\860, \1006) -\1069 = AND(\873, \1006) -\1072 = AND(\834, \1011) -\1075 = AND(\847, \1011) -\1078 = AND(\860, \1011) -\1081 = AND(\873, \1011) -\1084 = AND(\925, \1016) -\1087 = AND(\886, \1016) -\1090 = AND(\912, \1016) -\1093 = AND(\899, \1016) -\1096 = AND(\925, \1021) -\1099 = AND(\886, \1021) -\1102 = AND(\912, \1021) -\1105 = AND(\899, \1021) -\1108 = AND(\925, \1026) -\1111 = AND(\886, \1026) -\1114 = AND(\912, \1026) -\1117 = AND(\899, \1026) -\1120 = AND(\925, \1031) -\1123 = AND(\886, \1031) -\1126 = AND(\912, \1031) -\1129 = AND(\899, \1031) -\1132 = NAND(\1, \1036) -\1135 = NAND(\8, \1039) -\1138 = NAND(\15, \1042) -\1141 = NAND(\22, \1045) -\1144 = NAND(\29, \1048) -\1147 = NAND(\36, \1051) -\1150 = NAND(\43, \1054) -\1153 = NAND(\50, \1057) -\1156 = NAND(\57, \1060) -\1159 = NAND(\64, \1063) -\1162 = NAND(\71, \1066) -\1165 = NAND(\78, \1069) -\1168 = NAND(\85, \1072) -\1171 = NAND(\92, \1075) -\1174 = NAND(\99, \1078) -\1177 = NAND(\106, \1081) -\1180 = NAND(\113, \1084) -\1183 = NAND(\120, \1087) -\1186 = NAND(\127, \1090) -\1189 = NAND(\134, \1093) -\1192 = NAND(\141, \1096) -\1195 = NAND(\148, \1099) -\1198 = NAND(\155, \1102) -\1201 = NAND(\162, \1105) -\1204 = NAND(\169, \1108) -\1207 = NAND(\176, \1111) -\1210 = NAND(\183, \1114) -\1213 = NAND(\190, \1117) -\1216 = NAND(\197, \1120) -\1219 = NAND(\204, \1123) -\1222 = NAND(\211, \1126) -\1225 = NAND(\218, \1129) -\1228 = NAND(\1, \1132) -\1229 = NAND(\1036, \1132) -\1230 = NAND(\8, \1135) -\1231 = NAND(\1039, \1135) -\1232 = NAND(\15, \1138) -\1233 = NAND(\1042, \1138) -\1234 = NAND(\22, \1141) -\1235 = NAND(\1045, \1141) -\1236 = NAND(\29, \1144) -\1237 = NAND(\1048, \1144) -\1238 = NAND(\36, \1147) -\1239 = NAND(\1051, \1147) -\1240 = NAND(\43, \1150) -\1241 = NAND(\1054, \1150) -\1242 = NAND(\50, \1153) -\1243 = NAND(\1057, \1153) -\1244 = NAND(\57, \1156) -\1245 = NAND(\1060, \1156) -\1246 = NAND(\64, \1159) -\1247 = NAND(\1063, \1159) -\1248 = NAND(\71, \1162) -\1249 = NAND(\1066, \1162) -\1250 = NAND(\78, \1165) -\1251 = NAND(\1069, \1165) -\1252 = NAND(\85, \1168) -\1253 = NAND(\1072, \1168) -\1254 = NAND(\92, \1171) -\1255 = NAND(\1075, \1171) -\1256 = NAND(\99, \1174) -\1257 = NAND(\1078, \1174) -\1258 = NAND(\106, \1177) -\1259 = NAND(\1081, \1177) -\1260 = NAND(\113, \1180) -\1261 = NAND(\1084, \1180) -\1262 = NAND(\120, \1183) -\1263 = NAND(\1087, \1183) -\1264 = NAND(\127, \1186) -\1265 = NAND(\1090, \1186) -\1266 = NAND(\134, \1189) -\1267 = NAND(\1093, \1189) -\1268 = NAND(\141, \1192) -\1269 = NAND(\1096, \1192) -\1270 = NAND(\148, \1195) -\1271 = NAND(\1099, \1195) -\1272 = NAND(\155, \1198) -\1273 = NAND(\1102, \1198) -\1274 = NAND(\162, \1201) -\1275 = NAND(\1105, \1201) -\1276 = NAND(\169, \1204) -\1277 = NAND(\1108, \1204) -\1278 = NAND(\176, \1207) -\1279 = NAND(\1111, \1207) -\1280 = NAND(\183, \1210) -\1281 = NAND(\1114, \1210) -\1282 = NAND(\190, \1213) -\1283 = NAND(\1117, \1213) -\1284 = NAND(\197, \1216) -\1285 = NAND(\1120, \1216) -\1286 = NAND(\204, \1219) -\1287 = NAND(\1123, \1219) -\1288 = NAND(\211, \1222) -\1289 = NAND(\1126, \1222) -\1290 = NAND(\218, \1225) -\1291 = NAND(\1129, \1225) -\1292 = NAND(\1228, \1229) -\1293 = NAND(\1230, \1231) -\1294 = NAND(\1232, \1233) -\1295 = NAND(\1234, \1235) -\1296 = NAND(\1236, \1237) -\1297 = NAND(\1238, \1239) -\1298 = NAND(\1240, \1241) -\1299 = NAND(\1242, \1243) -\1300 = NAND(\1244, \1245) -\1301 = NAND(\1246, \1247) -\1302 = NAND(\1248, \1249) -\1303 = NAND(\1250, \1251) -\1304 = NAND(\1252, \1253) -\1305 = NAND(\1254, \1255) -\1306 = NAND(\1256, \1257) -\1307 = NAND(\1258, \1259) -\1308 = NAND(\1260, \1261) -\1309 = NAND(\1262, \1263) -\1310 = NAND(\1264, \1265) -\1311 = NAND(\1266, \1267) -\1312 = NAND(\1268, \1269) -\1313 = NAND(\1270, \1271) -\1314 = NAND(\1272, \1273) -\1315 = NAND(\1274, \1275) -\1316 = NAND(\1276, \1277) -\1317 = NAND(\1278, \1279) -\1318 = NAND(\1280, \1281) -\1319 = NAND(\1282, \1283) -\1320 = NAND(\1284, \1285) -\1321 = NAND(\1286, \1287) -\1322 = NAND(\1288, \1289) -\1323 = NAND(\1290, \1291) -\1324 = BUFF(\1292) -\1325 = BUFF(\1293) -\1326 = BUFF(\1294) -\1327 = BUFF(\1295) -\1328 = BUFF(\1296) -\1329 = BUFF(\1297) -\1330 = BUFF(\1298) -\1331 = BUFF(\1299) -\1332 = BUFF(\1300) -\1333 = BUFF(\1301) -\1334 = BUFF(\1302) -\1335 = BUFF(\1303) -\1336 = BUFF(\1304) -\1337 = BUFF(\1305) -\1338 = BUFF(\1306) -\1339 = BUFF(\1307) -\1340 = BUFF(\1308) -\1341 = BUFF(\1309) -\1342 = BUFF(\1310) -\1343 = BUFF(\1311) -\1344 = BUFF(\1312) -\1345 = BUFF(\1313) -\1346 = BUFF(\1314) -\1347 = BUFF(\1315) -\1348 = BUFF(\1316) -\1349 = BUFF(\1317) -\1350 = BUFF(\1318) -\1351 = BUFF(\1319) -\1352 = BUFF(\1320) -\1353 = BUFF(\1321) -\1354 = BUFF(\1322) -\1355 = BUFF(\1323) diff --git a/ISCAS85/new/c17.bench b/ISCAS85/new/c17.bench deleted file mode 100644 index 7437404..0000000 --- a/ISCAS85/new/c17.bench +++ /dev/null @@ -1,17 +0,0 @@ -# c\17 - -INPUT(\1) -INPUT(\2) -INPUT(\3) -INPUT(\6) -INPUT(\7) - -OUTPUT(\22) -OUTPUT(\23) - -\10 = NAND(\1, \3) -\11 = NAND(\3, \6) -\16 = NAND(\2, \11) -\19 = NAND(\11, \7) -\22 = NAND(\10, \16) -\23 = NAND(\16, \19) diff --git a/ISCAS85/new/c17.test b/ISCAS85/new/c17.test deleted file mode 100644 index 4f53860..0000000 --- a/ISCAS85/new/c17.test +++ /dev/null @@ -1,16 +0,0 @@ -* Name of circuit: c17.bench -* Primary inputs : - \1 \2 \3 \6 \7 - -* Primary outputs: - \22 \23 - -* Test patterns and fault free responses: - - 1: 01100 11 - 2: 10000 00 - 3: 00001 01 - 4: 00111 00 - 5: 01110 00 - 6: 01010 11 - 7: 10100 10 diff --git a/ISCAS85/new/c17.vec b/ISCAS85/new/c17.vec deleted file mode 100644 index 96485f0..0000000 --- a/ISCAS85/new/c17.vec +++ /dev/null @@ -1,8 +0,0 @@ -01100 -10000 -00001 -00111 -01110 -01010 -10100 -END diff --git a/ISCAS85/new/c1908.bench b/ISCAS85/new/c1908.bench deleted file mode 100644 index c2069f2..0000000 --- a/ISCAS85/new/c1908.bench +++ /dev/null @@ -1,942 +0,0 @@ -# c\1908 - -INPUT(\1) -INPUT(\4) -INPUT(\7) -INPUT(\10) -INPUT(\13) -INPUT(\16) -INPUT(\19) -INPUT(\22) -INPUT(\25) -INPUT(\28) -INPUT(\31) -INPUT(\34) -INPUT(\37) -INPUT(\40) -INPUT(\43) -INPUT(\46) -INPUT(\49) -INPUT(\53) -INPUT(\56) -INPUT(\60) -INPUT(\63) -INPUT(\66) -INPUT(\69) -INPUT(\72) -INPUT(\76) -INPUT(\79) -INPUT(\82) -INPUT(\85) -INPUT(\88) -INPUT(\91) -INPUT(\94) -INPUT(\99) -INPUT(\104) - -OUTPUT(\2753) -OUTPUT(\2754) -OUTPUT(\2755) -OUTPUT(\2756) -OUTPUT(\2762) -OUTPUT(\2767) -OUTPUT(\2768) -OUTPUT(\2779) -OUTPUT(\2780) -OUTPUT(\2781) -OUTPUT(\2782) -OUTPUT(\2783) -OUTPUT(\2784) -OUTPUT(\2785) -OUTPUT(\2786) -OUTPUT(\2787) -OUTPUT(\2811) -OUTPUT(\2886) -OUTPUT(\2887) -OUTPUT(\2888) -OUTPUT(\2889) -OUTPUT(\2890) -OUTPUT(\2891) -OUTPUT(\2892) -OUTPUT(\2899) - -\190 = NOT(\1) -\194 = NOT(\4) -\197 = NOT(\7) -\201 = NOT(\10) -\206 = NOT(\13) -\209 = NOT(\16) -\212 = NOT(\19) -\216 = NOT(\22) -\220 = NOT(\25) -\225 = NOT(\28) -\229 = NOT(\31) -\232 = NOT(\34) -\235 = NOT(\37) -\239 = NOT(\40) -\243 = NOT(\43) -\247 = NOT(\46) -\251 = NAND(\63, \88) -\252 = NAND(\66, \91) -\253 = NOT(\72) -\256 = NOT(\72) -\257 = BUFF(\69) -\260 = BUFF(\69) -\263 = NOT(\76) -\266 = NOT(\79) -\269 = NOT(\82) -\272 = NOT(\85) -\275 = NOT(\104) -\276 = NOT(\104) -\277 = NOT(\88) -\280 = NOT(\91) -\283 = BUFF(\94) -\290 = NOT(\94) -\297 = BUFF(\94) -\300 = NOT(\94) -\303 = BUFF(\99) -\306 = NOT(\99) -\313 = NOT(\99) -\316 = BUFF(\104) -\319 = NOT(\104) -\326 = BUFF(\104) -\331 = BUFF(\104) -\338 = NOT(\104) -\343 = BUFF(\1) -\346 = BUFF(\4) -\349 = BUFF(\7) -\352 = BUFF(\10) -\355 = BUFF(\13) -\358 = BUFF(\16) -\361 = BUFF(\19) -\364 = BUFF(\22) -\367 = BUFF(\25) -\370 = BUFF(\28) -\373 = BUFF(\31) -\376 = BUFF(\34) -\379 = BUFF(\37) -\382 = BUFF(\40) -\385 = BUFF(\43) -\388 = BUFF(\46) -\534 = NOT(\343) -\535 = NOT(\346) -\536 = NOT(\349) -\537 = NOT(\352) -\538 = NOT(\355) -\539 = NOT(\358) -\540 = NOT(\361) -\541 = NOT(\364) -\542 = NOT(\367) -\543 = NOT(\370) -\544 = NOT(\373) -\545 = NOT(\376) -\546 = NOT(\379) -\547 = NOT(\382) -\548 = NOT(\385) -\549 = NOT(\388) -\550 = NAND(\306, \331) -\551 = NAND(\306, \331) -\552 = NAND(\306, \331) -\553 = NAND(\306, \331) -\554 = NAND(\306, \331) -\555 = NAND(\306, \331) -\556 = BUFF(\190) -\559 = BUFF(\194) -\562 = BUFF(\206) -\565 = BUFF(\209) -\568 = BUFF(\225) -\571 = BUFF(\243) -\574 = AND(\63, \319) -\577 = BUFF(\220) -\580 = BUFF(\229) -\583 = BUFF(\232) -\586 = AND(\66, \319) -\589 = BUFF(\239) -\592 = AND(\49, \253, \319) -\595 = BUFF(\247) -\598 = BUFF(\239) -\601 = NAND(\326, \277) -\602 = NAND(\326, \280) -\603 = NAND(\260, \72) -\608 = NAND(\260, \300) -\612 = NAND(\256, \300) -\616 = BUFF(\201) -\619 = BUFF(\216) -\622 = BUFF(\220) -\625 = BUFF(\239) -\628 = BUFF(\190) -\631 = BUFF(\190) -\634 = BUFF(\194) -\637 = BUFF(\229) -\640 = BUFF(\197) -\643 = AND(\56, \257, \319) -\646 = BUFF(\232) -\649 = BUFF(\201) -\652 = BUFF(\235) -\655 = AND(\60, \257, \319) -\658 = BUFF(\263) -\661 = BUFF(\263) -\664 = BUFF(\266) -\667 = BUFF(\266) -\670 = BUFF(\269) -\673 = BUFF(\269) -\676 = BUFF(\272) -\679 = BUFF(\272) -\682 = AND(\251, \316) -\685 = AND(\252, \316) -\688 = BUFF(\197) -\691 = BUFF(\197) -\694 = BUFF(\212) -\697 = BUFF(\212) -\700 = BUFF(\247) -\703 = BUFF(\247) -\706 = BUFF(\235) -\709 = BUFF(\235) -\712 = BUFF(\201) -\715 = BUFF(\201) -\718 = BUFF(\206) -\721 = BUFF(\216) -\724 = AND(\53, \253, \319) -\727 = BUFF(\243) -\730 = BUFF(\220) -\733 = BUFF(\220) -\736 = BUFF(\209) -\739 = BUFF(\216) -\742 = BUFF(\225) -\745 = BUFF(\243) -\748 = BUFF(\212) -\751 = BUFF(\225) -\886 = NOT(\682) -\887 = NOT(\685) -\888 = NOT(\616) -\889 = NOT(\619) -\890 = NOT(\622) -\891 = NOT(\625) -\892 = NOT(\631) -\893 = NOT(\643) -\894 = NOT(\649) -\895 = NOT(\652) -\896 = NOT(\655) -\897 = AND(\49, \612) -\898 = AND(\56, \608) -\899 = NAND(\53, \612) -\903 = NAND(\60, \608) -\907 = NAND(\49, \612) -\910 = NAND(\56, \608) -\913 = NOT(\661) -\914 = NOT(\658) -\915 = NOT(\667) -\916 = NOT(\664) -\917 = NOT(\673) -\918 = NOT(\670) -\919 = NOT(\679) -\920 = NOT(\676) -\921 = NAND(\277, \297, \326, \603) -\922 = NAND(\280, \297, \326, \603) -\923 = NAND(\303, \338, \603) -\926 = AND(\303, \338, \603) -\935 = BUFF(\556) -\938 = NOT(\688) -\939 = BUFF(\556) -\942 = NOT(\691) -\943 = BUFF(\562) -\946 = NOT(\694) -\947 = BUFF(\562) -\950 = NOT(\697) -\951 = BUFF(\568) -\954 = NOT(\700) -\955 = BUFF(\568) -\958 = NOT(\703) -\959 = BUFF(\574) -\962 = BUFF(\574) -\965 = BUFF(\580) -\968 = NOT(\706) -\969 = BUFF(\580) -\972 = NOT(\709) -\973 = BUFF(\586) -\976 = NOT(\712) -\977 = BUFF(\586) -\980 = NOT(\715) -\981 = BUFF(\592) -\984 = NOT(\628) -\985 = BUFF(\592) -\988 = NOT(\718) -\989 = NOT(\721) -\990 = NOT(\634) -\991 = NOT(\724) -\992 = NOT(\727) -\993 = NOT(\637) -\994 = BUFF(\595) -\997 = NOT(\730) -\998 = BUFF(\595) -\1001 = NOT(\733) -\1002 = NOT(\736) -\1003 = NOT(\739) -\1004 = NOT(\640) -\1005 = NOT(\742) -\1006 = NOT(\745) -\1007 = NOT(\646) -\1008 = NOT(\748) -\1009 = NOT(\751) -\1010 = BUFF(\559) -\1013 = BUFF(\559) -\1016 = BUFF(\565) -\1019 = BUFF(\565) -\1022 = BUFF(\571) -\1025 = BUFF(\571) -\1028 = BUFF(\577) -\1031 = BUFF(\577) -\1034 = BUFF(\583) -\1037 = BUFF(\583) -\1040 = BUFF(\589) -\1043 = BUFF(\589) -\1046 = BUFF(\598) -\1049 = BUFF(\598) -\1054 = NAND(\619, \888) -\1055 = NAND(\616, \889) -\1063 = NAND(\625, \890) -\1064 = NAND(\622, \891) -\1067 = NAND(\655, \895) -\1068 = NAND(\652, \896) -\1119 = NAND(\721, \988) -\1120 = NAND(\718, \989) -\1121 = NAND(\727, \991) -\1122 = NAND(\724, \992) -\1128 = NAND(\739, \1002) -\1129 = NAND(\736, \1003) -\1130 = NAND(\745, \1005) -\1131 = NAND(\742, \1006) -\1132 = NAND(\751, \1008) -\1133 = NAND(\748, \1009) -\1148 = NOT(\939) -\1149 = NOT(\935) -\1150 = NAND(\1054, \1055) -\1151 = NOT(\943) -\1152 = NOT(\947) -\1153 = NOT(\955) -\1154 = NOT(\951) -\1155 = NOT(\962) -\1156 = NOT(\969) -\1157 = NOT(\977) -\1158 = NAND(\1063, \1064) -\1159 = NOT(\985) -\1160 = NAND(\985, \892) -\1161 = NOT(\998) -\1162 = NAND(\1067, \1068) -\1163 = NOT(\899) -\1164 = BUFF(\899) -\1167 = NOT(\903) -\1168 = BUFF(\903) -\1171 = NAND(\921, \923) -\1188 = NAND(\922, \923) -\1205 = NOT(\1010) -\1206 = NAND(\1010, \938) -\1207 = NOT(\1013) -\1208 = NAND(\1013, \942) -\1209 = NOT(\1016) -\1210 = NAND(\1016, \946) -\1211 = NOT(\1019) -\1212 = NAND(\1019, \950) -\1213 = NOT(\1022) -\1214 = NAND(\1022, \954) -\1215 = NOT(\1025) -\1216 = NAND(\1025, \958) -\1217 = NOT(\1028) -\1218 = NOT(\959) -\1219 = NOT(\1031) -\1220 = NOT(\1034) -\1221 = NAND(\1034, \968) -\1222 = NOT(\965) -\1223 = NOT(\1037) -\1224 = NAND(\1037, \972) -\1225 = NOT(\1040) -\1226 = NAND(\1040, \976) -\1227 = NOT(\973) -\1228 = NOT(\1043) -\1229 = NAND(\1043, \980) -\1230 = NOT(\981) -\1231 = NAND(\981, \984) -\1232 = NAND(\1119, \1120) -\1235 = NAND(\1121, \1122) -\1238 = NOT(\1046) -\1239 = NAND(\1046, \997) -\1240 = NOT(\994) -\1241 = NOT(\1049) -\1242 = NAND(\1049, \1001) -\1243 = NAND(\1128, \1129) -\1246 = NAND(\1130, \1131) -\1249 = NAND(\1132, \1133) -\1252 = BUFF(\907) -\1255 = BUFF(\907) -\1258 = BUFF(\910) -\1261 = BUFF(\910) -\1264 = NOT(\1150) -\1267 = NAND(\631, \1159) -\1309 = NAND(\688, \1205) -\1310 = NAND(\691, \1207) -\1311 = NAND(\694, \1209) -\1312 = NAND(\697, \1211) -\1313 = NAND(\700, \1213) -\1314 = NAND(\703, \1215) -\1315 = NAND(\706, \1220) -\1316 = NAND(\709, \1223) -\1317 = NAND(\712, \1225) -\1318 = NAND(\715, \1228) -\1319 = NOT(\1158) -\1322 = NAND(\628, \1230) -\1327 = NAND(\730, \1238) -\1328 = NAND(\733, \1241) -\1334 = NOT(\1162) -\1344 = NAND(\1267, \1160) -\1345 = NAND(\1249, \894) -\1346 = NOT(\1249) -\1348 = NOT(\1255) -\1349 = NOT(\1252) -\1350 = NOT(\1261) -\1351 = NOT(\1258) -\1352 = NAND(\1309, \1206) -\1355 = NAND(\1310, \1208) -\1358 = NAND(\1311, \1210) -\1361 = NAND(\1312, \1212) -\1364 = NAND(\1313, \1214) -\1367 = NAND(\1314, \1216) -\1370 = NAND(\1315, \1221) -\1373 = NAND(\1316, \1224) -\1376 = NAND(\1317, \1226) -\1379 = NAND(\1318, \1229) -\1383 = NAND(\1322, \1231) -\1386 = NOT(\1232) -\1387 = NAND(\1232, \990) -\1388 = NOT(\1235) -\1389 = NAND(\1235, \993) -\1390 = NAND(\1327, \1239) -\1393 = NAND(\1328, \1242) -\1396 = NOT(\1243) -\1397 = NAND(\1243, \1004) -\1398 = NOT(\1246) -\1399 = NAND(\1246, \1007) -\1409 = NOT(\1319) -\1412 = NAND(\649, \1346) -\1413 = NOT(\1334) -\1416 = BUFF(\1264) -\1419 = BUFF(\1264) -\1433 = NAND(\634, \1386) -\1434 = NAND(\637, \1388) -\1438 = NAND(\640, \1396) -\1439 = NAND(\646, \1398) -\1440 = NOT(\1344) -\1443 = NAND(\1355, \1148) -\1444 = NOT(\1355) -\1445 = NAND(\1352, \1149) -\1446 = NOT(\1352) -\1447 = NAND(\1358, \1151) -\1448 = NOT(\1358) -\1451 = NAND(\1361, \1152) -\1452 = NOT(\1361) -\1453 = NAND(\1367, \1153) -\1454 = NOT(\1367) -\1455 = NAND(\1364, \1154) -\1456 = NOT(\1364) -\1457 = NAND(\1373, \1156) -\1458 = NOT(\1373) -\1459 = NAND(\1379, \1157) -\1460 = NOT(\1379) -\1461 = NOT(\1383) -\1462 = NAND(\1393, \1161) -\1463 = NOT(\1393) -\1464 = NAND(\1345, \1412) -\1468 = NOT(\1370) -\1469 = NAND(\1370, \1222) -\1470 = NOT(\1376) -\1471 = NAND(\1376, \1227) -\1472 = NAND(\1387, \1433) -\1475 = NOT(\1390) -\1476 = NAND(\1390, \1240) -\1478 = NAND(\1389, \1434) -\1481 = NAND(\1399, \1439) -\1484 = NAND(\1397, \1438) -\1487 = NAND(\939, \1444) -\1488 = NAND(\935, \1446) -\1489 = NAND(\943, \1448) -\1490 = NOT(\1419) -\1491 = NOT(\1416) -\1492 = NAND(\947, \1452) -\1493 = NAND(\955, \1454) -\1494 = NAND(\951, \1456) -\1495 = NAND(\969, \1458) -\1496 = NAND(\977, \1460) -\1498 = NAND(\998, \1463) -\1499 = NOT(\1440) -\1500 = NAND(\965, \1468) -\1501 = NAND(\973, \1470) -\1504 = NAND(\994, \1475) -\1510 = NOT(\1464) -\1513 = NAND(\1443, \1487) -\1514 = NAND(\1445, \1488) -\1517 = NAND(\1447, \1489) -\1520 = NAND(\1451, \1492) -\1521 = NAND(\1453, \1493) -\1522 = NAND(\1455, \1494) -\1526 = NAND(\1457, \1495) -\1527 = NAND(\1459, \1496) -\1528 = NOT(\1472) -\1529 = NAND(\1462, \1498) -\1530 = NOT(\1478) -\1531 = NOT(\1481) -\1532 = NOT(\1484) -\1534 = NAND(\1471, \1501) -\1537 = NAND(\1469, \1500) -\1540 = NAND(\1476, \1504) -\1546 = NOT(\1513) -\1554 = NOT(\1521) -\1557 = NOT(\1526) -\1561 = NOT(\1520) -\1567 = NAND(\1484, \1531) -\1568 = NAND(\1481, \1532) -\1569 = NOT(\1510) -\1571 = NOT(\1527) -\1576 = NOT(\1529) -\1588 = BUFF(\1522) -\1591 = NOT(\1534) -\1593 = NOT(\1537) -\1594 = NAND(\1540, \1530) -\1595 = NOT(\1540) -\1596 = NAND(\1567, \1568) -\1600 = BUFF(\1517) -\1603 = BUFF(\1517) -\1606 = BUFF(\1522) -\1609 = BUFF(\1522) -\1612 = BUFF(\1514) -\1615 = BUFF(\1514) -\1620 = BUFF(\1557) -\1623 = BUFF(\1554) -\1635 = NOT(\1571) -\1636 = NAND(\1478, \1595) -\1638 = NAND(\1576, \1569) -\1639 = NOT(\1576) -\1640 = BUFF(\1561) -\1643 = BUFF(\1561) -\1647 = BUFF(\1546) -\1651 = BUFF(\1546) -\1658 = BUFF(\1554) -\1661 = BUFF(\1557) -\1664 = BUFF(\1557) -\1671 = NAND(\1596, \893) -\1672 = NOT(\1596) -\1675 = NOT(\1600) -\1677 = NOT(\1603) -\1678 = NAND(\1606, \1217) -\1679 = NOT(\1606) -\1680 = NAND(\1609, \1219) -\1681 = NOT(\1609) -\1682 = NOT(\1612) -\1683 = NOT(\1615) -\1685 = NAND(\1594, \1636) -\1688 = NAND(\1510, \1639) -\1697 = BUFF(\1588) -\1701 = BUFF(\1588) -\1706 = NAND(\643, \1672) -\1707 = NOT(\1643) -\1708 = NAND(\1647, \1675) -\1709 = NOT(\1647) -\1710 = NAND(\1651, \1677) -\1711 = NOT(\1651) -\1712 = NAND(\1028, \1679) -\1713 = NAND(\1031, \1681) -\1714 = BUFF(\1620) -\1717 = BUFF(\1620) -\1720 = NAND(\1658, \1593) -\1721 = NOT(\1658) -\1723 = NAND(\1638, \1688) -\1727 = NOT(\1661) -\1728 = NOT(\1640) -\1730 = NOT(\1664) -\1731 = BUFF(\1623) -\1734 = BUFF(\1623) -\1740 = NAND(\1685, \1528) -\1741 = NOT(\1685) -\1742 = NAND(\1671, \1706) -\1746 = NAND(\1600, \1709) -\1747 = NAND(\1603, \1711) -\1748 = NAND(\1678, \1712) -\1751 = NAND(\1680, \1713) -\1759 = NAND(\1537, \1721) -\1761 = NOT(\1697) -\1762 = NAND(\1697, \1727) -\1763 = NOT(\1701) -\1764 = NAND(\1701, \1730) -\1768 = NOT(\1717) -\1769 = NAND(\1472, \1741) -\1772 = NAND(\1723, \1413) -\1773 = NOT(\1723) -\1774 = NAND(\1708, \1746) -\1777 = NAND(\1710, \1747) -\1783 = NOT(\1731) -\1784 = NAND(\1731, \1682) -\1785 = NOT(\1714) -\1786 = NOT(\1734) -\1787 = NAND(\1734, \1683) -\1788 = NAND(\1720, \1759) -\1791 = NAND(\1661, \1761) -\1792 = NAND(\1664, \1763) -\1795 = NAND(\1751, \1155) -\1796 = NOT(\1751) -\1798 = NAND(\1740, \1769) -\1801 = NAND(\1334, \1773) -\1802 = NAND(\1742, \290) -\1807 = NOT(\1748) -\1808 = NAND(\1748, \1218) -\1809 = NAND(\1612, \1783) -\1810 = NAND(\1615, \1786) -\1812 = NAND(\1791, \1762) -\1815 = NAND(\1792, \1764) -\1818 = BUFF(\1742) -\1821 = NAND(\1777, \1490) -\1822 = NOT(\1777) -\1823 = NAND(\1774, \1491) -\1824 = NOT(\1774) -\1825 = NAND(\962, \1796) -\1826 = NAND(\1788, \1409) -\1827 = NOT(\1788) -\1830 = NAND(\1772, \1801) -\1837 = NAND(\959, \1807) -\1838 = NAND(\1809, \1784) -\1841 = NAND(\1810, \1787) -\1848 = NAND(\1419, \1822) -\1849 = NAND(\1416, \1824) -\1850 = NAND(\1795, \1825) -\1852 = NAND(\1319, \1827) -\1855 = NAND(\1815, \1707) -\1856 = NOT(\1815) -\1857 = NOT(\1818) -\1858 = NAND(\1798, \290) -\1864 = NOT(\1812) -\1865 = NAND(\1812, \1728) -\1866 = BUFF(\1798) -\1869 = BUFF(\1802) -\1872 = BUFF(\1802) -\1875 = NAND(\1808, \1837) -\1878 = NAND(\1821, \1848) -\1879 = NAND(\1823, \1849) -\1882 = NAND(\1841, \1768) -\1883 = NOT(\1841) -\1884 = NAND(\1826, \1852) -\1885 = NAND(\1643, \1856) -\1889 = NAND(\1830, \290) -\1895 = NOT(\1838) -\1896 = NAND(\1838, \1785) -\1897 = NAND(\1640, \1864) -\1898 = NOT(\1850) -\1902 = BUFF(\1830) -\1910 = NOT(\1878) -\1911 = NAND(\1717, \1883) -\1912 = NOT(\1884) -\1913 = NAND(\1855, \1885) -\1915 = NOT(\1866) -\1919 = NAND(\1872, \919) -\1920 = NOT(\1872) -\1921 = NAND(\1869, \920) -\1922 = NOT(\1869) -\1923 = NOT(\1875) -\1924 = NAND(\1714, \1895) -\1927 = BUFF(\1858) -\1930 = BUFF(\1858) -\1933 = NAND(\1865, \1897) -\1936 = NAND(\1882, \1911) -\1937 = NOT(\1898) -\1938 = NOT(\1902) -\1941 = NAND(\679, \1920) -\1942 = NAND(\676, \1922) -\1944 = BUFF(\1879) -\1947 = NOT(\1913) -\1950 = BUFF(\1889) -\1953 = BUFF(\1889) -\1958 = BUFF(\1879) -\1961 = NAND(\1896, \1924) -\1965 = AND(\1910, \601) -\1968 = AND(\602, \1912) -\1975 = NAND(\1930, \917) -\1976 = NOT(\1930) -\1977 = NAND(\1927, \918) -\1978 = NOT(\1927) -\1979 = NAND(\1919, \1941) -\1980 = NAND(\1921, \1942) -\1985 = NOT(\1933) -\1987 = NOT(\1936) -\1999 = NOT(\1944) -\2000 = NAND(\1944, \1937) -\2002 = NOT(\1947) -\2003 = NAND(\1947, \1499) -\2004 = NAND(\1953, \1350) -\2005 = NOT(\1953) -\2006 = NAND(\1950, \1351) -\2007 = NOT(\1950) -\2008 = NAND(\673, \1976) -\2009 = NAND(\670, \1978) -\2012 = NOT(\1979) -\2013 = NOT(\1958) -\2014 = NAND(\1958, \1923) -\2015 = NOT(\1961) -\2016 = NAND(\1961, \1635) -\2018 = NOT(\1965) -\2019 = NOT(\1968) -\2020 = NAND(\1898, \1999) -\2021 = NOT(\1987) -\2022 = NAND(\1987, \1591) -\2023 = NAND(\1440, \2002) -\2024 = NAND(\1261, \2005) -\2025 = NAND(\1258, \2007) -\2026 = NAND(\1975, \2008) -\2027 = NAND(\1977, \2009) -\2030 = NOT(\1980) -\2033 = BUFF(\1980) -\2036 = NAND(\1875, \2013) -\2037 = NAND(\1571, \2015) -\2038 = NAND(\2020, \2000) -\2039 = NAND(\1534, \2021) -\2040 = NAND(\2023, \2003) -\2041 = NAND(\2004, \2024) -\2042 = NAND(\2006, \2025) -\2047 = NOT(\2026) -\2052 = NAND(\2036, \2014) -\2055 = NAND(\2037, \2016) -\2060 = NOT(\2038) -\2061 = NAND(\2039, \2022) -\2062 = NAND(\2040, \290) -\2067 = NOT(\2041) -\2068 = NOT(\2027) -\2071 = BUFF(\2027) -\2076 = NOT(\2052) -\2077 = NOT(\2055) -\2078 = NAND(\2060, \290) -\2081 = NAND(\2061, \290) -\2086 = NOT(\2042) -\2089 = BUFF(\2042) -\2104 = AND(\2030, \2068) -\2119 = AND(\2033, \2068) -\2129 = AND(\2030, \2071) -\2143 = AND(\2033, \2071) -\2148 = BUFF(\2062) -\2151 = BUFF(\2062) -\2196 = BUFF(\2078) -\2199 = BUFF(\2078) -\2202 = BUFF(\2081) -\2205 = BUFF(\2081) -\2214 = NAND(\2151, \915) -\2215 = NOT(\2151) -\2216 = NAND(\2148, \916) -\2217 = NOT(\2148) -\2222 = NAND(\2199, \1348) -\2223 = NOT(\2199) -\2224 = NAND(\2196, \1349) -\2225 = NOT(\2196) -\2226 = NAND(\2205, \913) -\2227 = NOT(\2205) -\2228 = NAND(\2202, \914) -\2229 = NOT(\2202) -\2230 = NAND(\667, \2215) -\2231 = NAND(\664, \2217) -\2232 = NAND(\1255, \2223) -\2233 = NAND(\1252, \2225) -\2234 = NAND(\661, \2227) -\2235 = NAND(\658, \2229) -\2236 = NAND(\2214, \2230) -\2237 = NAND(\2216, \2231) -\2240 = NAND(\2222, \2232) -\2241 = NAND(\2224, \2233) -\2244 = NAND(\2226, \2234) -\2245 = NAND(\2228, \2235) -\2250 = NOT(\2236) -\2253 = NOT(\2240) -\2256 = NOT(\2244) -\2257 = NOT(\2237) -\2260 = BUFF(\2237) -\2263 = NOT(\2241) -\2266 = AND(\1164, \2241) -\2269 = NOT(\2245) -\2272 = AND(\1168, \2245) -\2279 = NAND(\2067, \2012, \2047, \2250, \899, \2256, \2253, \903) -\2286 = BUFF(\2266) -\2297 = BUFF(\2266) -\2315 = BUFF(\2272) -\2326 = BUFF(\2272) -\2340 = AND(\2086, \2257) -\2353 = AND(\2089, \2257) -\2361 = AND(\2086, \2260) -\2375 = AND(\2089, \2260) -\2384 = AND(\338, \2279, \313, \313) -\2385 = AND(\1163, \2263) -\2386 = AND(\1164, \2263) -\2426 = AND(\1167, \2269) -\2427 = AND(\1168, \2269) -\2537 = NAND(\2286, \2315, \2361, \2104, \1171) -\2540 = NAND(\2286, \2315, \2340, \2129, \1171) -\2543 = NAND(\2286, \2315, \2340, \2119, \1171) -\2546 = NAND(\2286, \2315, \2353, \2104, \1171) -\2549 = NAND(\2297, \2315, \2375, \2119, \1188) -\2552 = NAND(\2297, \2326, \2361, \2143, \1188) -\2555 = NAND(\2297, \2326, \2375, \2129, \1188) -\2558 = AND(\2286, \2315, \2361, \2104, \1171) -\2561 = AND(\2286, \2315, \2340, \2129, \1171) -\2564 = AND(\2286, \2315, \2340, \2119, \1171) -\2567 = AND(\2286, \2315, \2353, \2104, \1171) -\2570 = AND(\2297, \2315, \2375, \2119, \1188) -\2573 = AND(\2297, \2326, \2361, \2143, \1188) -\2576 = AND(\2297, \2326, \2375, \2129, \1188) -\2594 = NAND(\2286, \2427, \2361, \2129, \1171) -\2597 = NAND(\2297, \2427, \2361, \2119, \1171) -\2600 = NAND(\2297, \2427, \2375, \2104, \1171) -\2603 = NAND(\2297, \2427, \2340, \2143, \1171) -\2606 = NAND(\2297, \2427, \2353, \2129, \1188) -\2611 = NAND(\2386, \2326, \2361, \2129, \1188) -\2614 = NAND(\2386, \2326, \2361, \2119, \1188) -\2617 = NAND(\2386, \2326, \2375, \2104, \1188) -\2620 = NAND(\2386, \2326, \2353, \2129, \1188) -\2627 = NAND(\2297, \2427, \2340, \2104, \926) -\2628 = NAND(\2386, \2326, \2340, \2104, \926) -\2629 = NAND(\2386, \2427, \2361, \2104, \926) -\2630 = NAND(\2386, \2427, \2340, \2129, \926) -\2631 = NAND(\2386, \2427, \2340, \2119, \926) -\2632 = NAND(\2386, \2427, \2353, \2104, \926) -\2633 = NAND(\2386, \2426, \2340, \2104, \926) -\2634 = NAND(\2385, \2427, \2340, \2104, \926) -\2639 = AND(\2286, \2427, \2361, \2129, \1171) -\2642 = AND(\2297, \2427, \2361, \2119, \1171) -\2645 = AND(\2297, \2427, \2375, \2104, \1171) -\2648 = AND(\2297, \2427, \2340, \2143, \1171) -\2651 = AND(\2297, \2427, \2353, \2129, \1188) -\2655 = AND(\2386, \2326, \2361, \2129, \1188) -\2658 = AND(\2386, \2326, \2361, \2119, \1188) -\2661 = AND(\2386, \2326, \2375, \2104, \1188) -\2664 = AND(\2386, \2326, \2353, \2129, \1188) -\2669 = NAND(\2558, \534) -\2670 = NOT(\2558) -\2671 = NAND(\2561, \535) -\2672 = NOT(\2561) -\2673 = NAND(\2564, \536) -\2674 = NOT(\2564) -\2675 = NAND(\2567, \537) -\2676 = NOT(\2567) -\2682 = NAND(\2570, \543) -\2683 = NOT(\2570) -\2688 = NAND(\2573, \548) -\2689 = NOT(\2573) -\2690 = NAND(\2576, \549) -\2691 = NOT(\2576) -\2710 = AND(\2627, \2628, \2629, \2630, \2631, \2632, \2633, \2634) -\2720 = NAND(\343, \2670) -\2721 = NAND(\346, \2672) -\2722 = NAND(\349, \2674) -\2723 = NAND(\352, \2676) -\2724 = NAND(\2639, \538) -\2725 = NOT(\2639) -\2726 = NAND(\2642, \539) -\2727 = NOT(\2642) -\2728 = NAND(\2645, \540) -\2729 = NOT(\2645) -\2730 = NAND(\2648, \541) -\2731 = NOT(\2648) -\2732 = NAND(\2651, \542) -\2733 = NOT(\2651) -\2734 = NAND(\370, \2683) -\2735 = NAND(\2655, \544) -\2736 = NOT(\2655) -\2737 = NAND(\2658, \545) -\2738 = NOT(\2658) -\2739 = NAND(\2661, \546) -\2740 = NOT(\2661) -\2741 = NAND(\2664, \547) -\2742 = NOT(\2664) -\2743 = NAND(\385, \2689) -\2744 = NAND(\388, \2691) -\2745 = NAND(\2537, \2540, \2543, \2546, \2594, \2597, \2600, \2603) -\2746 = NAND(\2606, \2549, \2611, \2614, \2617, \2620, \2552, \2555) -\2747 = AND(\2537, \2540, \2543, \2546, \2594, \2597, \2600, \2603) -\2750 = AND(\2606, \2549, \2611, \2614, \2617, \2620, \2552, \2555) -\2753 = NAND(\2669, \2720) -\2754 = NAND(\2671, \2721) -\2755 = NAND(\2673, \2722) -\2756 = NAND(\2675, \2723) -\2757 = NAND(\355, \2725) -\2758 = NAND(\358, \2727) -\2759 = NAND(\361, \2729) -\2760 = NAND(\364, \2731) -\2761 = NAND(\367, \2733) -\2762 = NAND(\2682, \2734) -\2763 = NAND(\373, \2736) -\2764 = NAND(\376, \2738) -\2765 = NAND(\379, \2740) -\2766 = NAND(\382, \2742) -\2767 = NAND(\2688, \2743) -\2768 = NAND(\2690, \2744) -\2773 = AND(\2745, \275) -\2776 = AND(\2746, \276) -\2779 = NAND(\2724, \2757) -\2780 = NAND(\2726, \2758) -\2781 = NAND(\2728, \2759) -\2782 = NAND(\2730, \2760) -\2783 = NAND(\2732, \2761) -\2784 = NAND(\2735, \2763) -\2785 = NAND(\2737, \2764) -\2786 = NAND(\2739, \2765) -\2787 = NAND(\2741, \2766) -\2788 = AND(\2747, \2750, \2710) -\2789 = NAND(\2747, \2750) -\2800 = AND(\338, \2279, \99, \2788) -\2807 = NAND(\2773, \2018) -\2808 = NOT(\2773) -\2809 = NAND(\2776, \2019) -\2810 = NOT(\2776) -\2811 = NOR(\2384, \2800) -\2812 = AND(\897, \283, \2789) -\2815 = AND(\76, \283, \2789) -\2818 = AND(\82, \283, \2789) -\2821 = AND(\85, \283, \2789) -\2824 = AND(\898, \283, \2789) -\2827 = NAND(\1965, \2808) -\2828 = NAND(\1968, \2810) -\2829 = AND(\79, \283, \2789) -\2843 = NAND(\2807, \2827) -\2846 = NAND(\2809, \2828) -\2850 = NAND(\2812, \2076) -\2851 = NAND(\2815, \2077) -\2852 = NAND(\2818, \1915) -\2853 = NAND(\2821, \1857) -\2854 = NAND(\2824, \1938) -\2857 = NOT(\2812) -\2858 = NOT(\2815) -\2859 = NOT(\2818) -\2860 = NOT(\2821) -\2861 = NOT(\2824) -\2862 = NOT(\2829) -\2863 = NAND(\2829, \1985) -\2866 = NAND(\2052, \2857) -\2867 = NAND(\2055, \2858) -\2868 = NAND(\1866, \2859) -\2869 = NAND(\1818, \2860) -\2870 = NAND(\1902, \2861) -\2871 = NAND(\2843, \886) -\2872 = NOT(\2843) -\2873 = NAND(\2846, \887) -\2874 = NOT(\2846) -\2875 = NAND(\1933, \2862) -\2876 = NAND(\2866, \2850) -\2877 = NAND(\2867, \2851) -\2878 = NAND(\2868, \2852) -\2879 = NAND(\2869, \2853) -\2880 = NAND(\2870, \2854) -\2881 = NAND(\682, \2872) -\2882 = NAND(\685, \2874) -\2883 = NAND(\2875, \2863) -\2886 = AND(\2876, \550) -\2887 = AND(\551, \2877) -\2888 = AND(\553, \2878) -\2889 = AND(\2879, \554) -\2890 = AND(\555, \2880) -\2891 = NAND(\2871, \2881) -\2892 = NAND(\2873, \2882) -\2895 = NAND(\2883, \1461) -\2896 = NOT(\2883) -\2897 = NAND(\1383, \2896) -\2898 = NAND(\2895, \2897) -\2899 = AND(\2898, \552) diff --git a/ISCAS85/new/c2670.bench b/ISCAS85/new/c2670.bench deleted file mode 100644 index 7521d59..0000000 --- a/ISCAS85/new/c2670.bench +++ /dev/null @@ -1,1570 +0,0 @@ -# c\2670 - -INPUT(\1) -INPUT(\2) -INPUT(\3) -INPUT(\4) -INPUT(\5) -INPUT(\6) -INPUT(\7) -INPUT(\8) -INPUT(\11) -INPUT(\14) -INPUT(\15) -INPUT(\16) -INPUT(\19) -INPUT(\20) -INPUT(\21) -INPUT(\22) -INPUT(\23) -INPUT(\24) -INPUT(\25) -INPUT(\26) -INPUT(\27) -INPUT(\28) -INPUT(\29) -INPUT(\32) -INPUT(\33) -INPUT(\34) -INPUT(\35) -INPUT(\36) -INPUT(\37) -INPUT(\40) -INPUT(\43) -INPUT(\44) -INPUT(\47) -INPUT(\48) -INPUT(\49) -INPUT(\50) -INPUT(\51) -INPUT(\52) -INPUT(\53) -INPUT(\54) -INPUT(\55) -INPUT(\56) -INPUT(\57) -INPUT(\60) -INPUT(\61) -INPUT(\62) -INPUT(\63) -INPUT(\64) -INPUT(\65) -INPUT(\66) -INPUT(\67) -INPUT(\68) -INPUT(\69) -INPUT(\72) -INPUT(\73) -INPUT(\74) -INPUT(\75) -INPUT(\76) -INPUT(\77) -INPUT(\78) -INPUT(\79) -INPUT(\80) -INPUT(\81) -INPUT(\82) -INPUT(\85) -INPUT(\86) -INPUT(\87) -INPUT(\88) -INPUT(\89) -INPUT(\90) -INPUT(\91) -INPUT(\92) -INPUT(\93) -INPUT(\94) -INPUT(\95) -INPUT(\96) -INPUT(\99) -INPUT(\100) -INPUT(\101) -INPUT(\102) -INPUT(\103) -INPUT(\104) -INPUT(\105) -INPUT(\106) -INPUT(\107) -INPUT(\108) -INPUT(\111) -INPUT(\112) -INPUT(\113) -INPUT(\114) -INPUT(\115) -INPUT(\116) -INPUT(\117) -INPUT(\118) -INPUT(\119) -INPUT(\120) -INPUT(\123) -INPUT(\124) -INPUT(\125) -INPUT(\126) -INPUT(\127) -INPUT(\128) -INPUT(\129) -INPUT(\130) -INPUT(\131) -INPUT(\132) -INPUT(\135) -INPUT(\136) -INPUT(\137) -INPUT(\138) -INPUT(\139) -INPUT(\140) -INPUT(\141) -INPUT(\142) -INPUT(\143) -INPUT(\144) -INPUT(\145) -INPUT(\146) -INPUT(\147) -INPUT(\148) -INPUT(\149) -INPUT(\150) -INPUT(\151) -INPUT(\152) -INPUT(\153) -INPUT(\154) -INPUT(\155) -INPUT(\156) -INPUT(\157) -INPUT(\158) -INPUT(\159) -INPUT(\160) -INPUT(\161) -INPUT(\162) -INPUT(\163) -INPUT(\164) -INPUT(\165) -INPUT(\166) -INPUT(\167) -INPUT(\168) -INPUT(\169) -INPUT(\170) -INPUT(\171) -INPUT(\172) -INPUT(\173) -INPUT(\174) -INPUT(\175) -INPUT(\176) -INPUT(\177) -INPUT(\178) -INPUT(\179) -INPUT(\180) -INPUT(\181) -INPUT(\182) -INPUT(\183) -INPUT(\184) -INPUT(\185) -INPUT(\186) -INPUT(\187) -INPUT(\188) -INPUT(\189) -INPUT(\190) -INPUT(\191) -INPUT(\192) -INPUT(\193) -INPUT(\194) -INPUT(\195) -INPUT(\196) -INPUT(\197) -INPUT(\198) -INPUT(\199) -INPUT(\200) -INPUT(\201) -INPUT(\202) -INPUT(\203) -INPUT(\204) -INPUT(\205) -INPUT(\206) -INPUT(\207) -INPUT(\208) -INPUT(\209) -INPUT(\210) -INPUT(\211) -INPUT(\212) -INPUT(\213) -INPUT(\214) -INPUT(\215) -INPUT(\216) -INPUT(\217) -INPUT(\218) -INPUT(\219) -INPUT(\224) -INPUT(\227) -INPUT(\230) -INPUT(\231) -INPUT(\234) -INPUT(\237) -INPUT(\241) -INPUT(\246) -INPUT(\253) -INPUT(\256) -INPUT(\259) -INPUT(\262) -INPUT(\263) -INPUT(\266) -INPUT(\269) -INPUT(\272) -INPUT(\275) -INPUT(\278) -INPUT(\281) -INPUT(\284) -INPUT(\287) -INPUT(\290) -INPUT(\294) -INPUT(\297) -INPUT(\301) -INPUT(\305) -INPUT(\309) -INPUT(\313) -INPUT(\316) -INPUT(\319) -INPUT(\322) -INPUT(\325) -INPUT(\328) -INPUT(\331) -INPUT(\334) -INPUT(\337) -INPUT(\340) -INPUT(\343) -INPUT(\346) -INPUT(\349) -INPUT(\352) -INPUT(\355) - -OUTPUT(\143) -OUTPUT(\144) -OUTPUT(\145) -OUTPUT(\146) -OUTPUT(\147) -OUTPUT(\148) -OUTPUT(\149) -OUTPUT(\150) -OUTPUT(\151) -OUTPUT(\152) -OUTPUT(\153) -OUTPUT(\154) -OUTPUT(\155) -OUTPUT(\156) -OUTPUT(\157) -OUTPUT(\158) -OUTPUT(\159) -OUTPUT(\160) -OUTPUT(\161) -OUTPUT(\162) -OUTPUT(\163) -OUTPUT(\164) -OUTPUT(\165) -OUTPUT(\166) -OUTPUT(\167) -OUTPUT(\168) -OUTPUT(\169) -OUTPUT(\170) -OUTPUT(\171) -OUTPUT(\172) -OUTPUT(\173) -OUTPUT(\174) -OUTPUT(\175) -OUTPUT(\176) -OUTPUT(\177) -OUTPUT(\178) -OUTPUT(\179) -OUTPUT(\180) -OUTPUT(\181) -OUTPUT(\182) -OUTPUT(\183) -OUTPUT(\184) -OUTPUT(\185) -OUTPUT(\186) -OUTPUT(\187) -OUTPUT(\188) -OUTPUT(\189) -OUTPUT(\190) -OUTPUT(\191) -OUTPUT(\192) -OUTPUT(\193) -OUTPUT(\194) -OUTPUT(\195) -OUTPUT(\196) -OUTPUT(\197) -OUTPUT(\198) -OUTPUT(\199) -OUTPUT(\200) -OUTPUT(\201) -OUTPUT(\202) -OUTPUT(\203) -OUTPUT(\204) -OUTPUT(\205) -OUTPUT(\206) -OUTPUT(\207) -OUTPUT(\208) -OUTPUT(\209) -OUTPUT(\210) -OUTPUT(\211) -OUTPUT(\212) -OUTPUT(\213) -OUTPUT(\214) -OUTPUT(\215) -OUTPUT(\216) -OUTPUT(\217) -OUTPUT(\218) -OUTPUT(\398) -OUTPUT(\400) -OUTPUT(\401) -OUTPUT(\419) -OUTPUT(\420) -OUTPUT(\456) -OUTPUT(\457) -OUTPUT(\458) -OUTPUT(\487) -OUTPUT(\488) -OUTPUT(\489) -OUTPUT(\490) -OUTPUT(\491) -OUTPUT(\492) -OUTPUT(\493) -OUTPUT(\494) -OUTPUT(\792) -OUTPUT(\799) -OUTPUT(\805) -OUTPUT(\1026) -OUTPUT(\1028) -OUTPUT(\1029) -OUTPUT(\1269) -OUTPUT(\1277) -OUTPUT(\1448) -OUTPUT(\1726) -OUTPUT(\1816) -OUTPUT(\1817) -OUTPUT(\1818) -OUTPUT(\1819) -OUTPUT(\1820) -OUTPUT(\1821) -OUTPUT(\1969) -OUTPUT(\1970) -OUTPUT(\1971) -OUTPUT(\2010) -OUTPUT(\2012) -OUTPUT(\2014) -OUTPUT(\2016) -OUTPUT(\2018) -OUTPUT(\2020) -OUTPUT(\2022) -OUTPUT(\2387) -OUTPUT(\2388) -OUTPUT(\2389) -OUTPUT(\2390) -OUTPUT(\2496) -OUTPUT(\2643) -OUTPUT(\2644) -OUTPUT(\2891) -OUTPUT(\2925) -OUTPUT(\2970) -OUTPUT(\2971) -OUTPUT(\3038) -OUTPUT(\3079) -OUTPUT(\3546) -OUTPUT(\3671) -OUTPUT(\3803) -OUTPUT(\3804) -OUTPUT(\3809) -OUTPUT(\3851) -OUTPUT(\3875) -OUTPUT(\3881) -OUTPUT(\3882) - -\398 = BUFF(\219) -\400 = BUFF(\219) -\401 = BUFF(\219) -\405 = AND(\1, \3) -\408 = NOT(\230) -\419 = BUFF(\253) -\420 = BUFF(\253) -\425 = NOT(\262) -\456 = BUFF(\290) -\457 = BUFF(\290) -\458 = BUFF(\290) -\485 = AND(\309, \305, \301, \297) -\486 = NOT(\405) -\487 = NOT(\44) -\488 = NOT(\132) -\489 = NOT(\82) -\490 = NOT(\96) -\491 = NOT(\69) -\492 = NOT(\120) -\493 = NOT(\57) -\494 = NOT(\108) -\495 = AND(\2, \15, \237) -\496 = BUFF(\237) -\499 = AND(\37, \37) -\500 = BUFF(\219) -\503 = BUFF(\8) -\506 = BUFF(\8) -\509 = BUFF(\227) -\521 = BUFF(\234) -\533 = NOT(\241) -\537 = NOT(\246) -\543 = AND(\11, \246) -\544 = AND(\132, \82, \96, \44) -\547 = AND(\120, \57, \108, \69) -\550 = BUFF(\227) -\562 = BUFF(\234) -\574 = NOT(\256) -\578 = NOT(\259) -\582 = BUFF(\319) -\594 = BUFF(\322) -\606 = NOT(\328) -\607 = NOT(\331) -\608 = NOT(\334) -\609 = NOT(\337) -\610 = NOT(\340) -\611 = NOT(\343) -\612 = NOT(\352) -\613 = BUFF(\319) -\625 = BUFF(\322) -\637 = BUFF(\16) -\643 = BUFF(\16) -\650 = NOT(\355) -\651 = AND(\7, \237) -\655 = NOT(\263) -\659 = NOT(\266) -\663 = NOT(\269) -\667 = NOT(\272) -\671 = NOT(\275) -\675 = NOT(\278) -\679 = NOT(\281) -\683 = NOT(\284) -\687 = NOT(\287) -\693 = BUFF(\29) -\699 = BUFF(\29) -\705 = NOT(\294) -\711 = NOT(\297) -\715 = NOT(\301) -\719 = NOT(\305) -\723 = NOT(\309) -\727 = NOT(\313) -\730 = NOT(\316) -\733 = NOT(\346) -\734 = NOT(\349) -\735 = BUFF(\259) -\738 = BUFF(\256) -\741 = BUFF(\263) -\744 = BUFF(\269) -\747 = BUFF(\266) -\750 = BUFF(\275) -\753 = BUFF(\272) -\756 = BUFF(\281) -\759 = BUFF(\278) -\762 = BUFF(\287) -\765 = BUFF(\284) -\768 = BUFF(\294) -\771 = BUFF(\301) -\774 = BUFF(\297) -\777 = BUFF(\309) -\780 = BUFF(\305) -\783 = BUFF(\316) -\786 = BUFF(\313) -\792 = NOT(\485) -\799 = NOT(\495) -\800 = NOT(\499) -\805 = BUFF(\500) -\900 = NAND(\331, \606) -\901 = NAND(\328, \607) -\902 = NAND(\337, \608) -\903 = NAND(\334, \609) -\904 = NAND(\343, \610) -\905 = NAND(\340, \611) -\998 = NAND(\349, \733) -\999 = NAND(\346, \734) -\1026 = AND(\94, \500) -\1027 = AND(\325, \651) -\1028 = NOT(\651) -\1029 = NAND(\231, \651) -\1032 = NOT(\544) -\1033 = NOT(\547) -\1034 = AND(\547, \544) -\1037 = BUFF(\503) -\1042 = NOT(\509) -\1053 = NOT(\521) -\1064 = AND(\80, \509, \521) -\1065 = AND(\68, \509, \521) -\1066 = AND(\79, \509, \521) -\1067 = AND(\78, \509, \521) -\1068 = AND(\77, \509, \521) -\1069 = AND(\11, \537) -\1070 = BUFF(\503) -\1075 = NOT(\550) -\1086 = NOT(\562) -\1097 = AND(\76, \550, \562) -\1098 = AND(\75, \550, \562) -\1099 = AND(\74, \550, \562) -\1100 = AND(\73, \550, \562) -\1101 = AND(\72, \550, \562) -\1102 = NOT(\582) -\1113 = NOT(\594) -\1124 = AND(\114, \582, \594) -\1125 = AND(\113, \582, \594) -\1126 = AND(\112, \582, \594) -\1127 = AND(\111, \582, \594) -\1128 = AND(\582, \594) -\1129 = NAND(\900, \901) -\1133 = NAND(\902, \903) -\1137 = NAND(\904, \905) -\1140 = NOT(\741) -\1141 = NAND(\741, \612) -\1142 = NOT(\744) -\1143 = NOT(\747) -\1144 = NOT(\750) -\1145 = NOT(\753) -\1146 = NOT(\613) -\1157 = NOT(\625) -\1168 = AND(\118, \613, \625) -\1169 = AND(\107, \613, \625) -\1170 = AND(\117, \613, \625) -\1171 = AND(\116, \613, \625) -\1172 = AND(\115, \613, \625) -\1173 = NOT(\637) -\1178 = NOT(\643) -\1184 = NOT(\768) -\1185 = NAND(\768, \650) -\1186 = NOT(\771) -\1187 = NOT(\774) -\1188 = NOT(\777) -\1189 = NOT(\780) -\1190 = BUFF(\506) -\1195 = BUFF(\506) -\1200 = NOT(\693) -\1205 = NOT(\699) -\1210 = NOT(\735) -\1211 = NOT(\738) -\1212 = NOT(\756) -\1213 = NOT(\759) -\1214 = NOT(\762) -\1215 = NOT(\765) -\1216 = NAND(\998, \999) -\1219 = BUFF(\574) -\1222 = BUFF(\578) -\1225 = BUFF(\655) -\1228 = BUFF(\659) -\1231 = BUFF(\663) -\1234 = BUFF(\667) -\1237 = BUFF(\671) -\1240 = BUFF(\675) -\1243 = BUFF(\679) -\1246 = BUFF(\683) -\1249 = NOT(\783) -\1250 = NOT(\786) -\1251 = BUFF(\687) -\1254 = BUFF(\705) -\1257 = BUFF(\711) -\1260 = BUFF(\715) -\1263 = BUFF(\719) -\1266 = BUFF(\723) -\1269 = NOT(\1027) -\1275 = AND(\325, \1032) -\1276 = AND(\231, \1033) -\1277 = BUFF(\1034) -\1302 = OR(\1069, \543) -\1351 = NAND(\352, \1140) -\1352 = NAND(\747, \1142) -\1353 = NAND(\744, \1143) -\1354 = NAND(\753, \1144) -\1355 = NAND(\750, \1145) -\1395 = NAND(\355, \1184) -\1396 = NAND(\774, \1186) -\1397 = NAND(\771, \1187) -\1398 = NAND(\780, \1188) -\1399 = NAND(\777, \1189) -\1422 = NAND(\738, \1210) -\1423 = NAND(\735, \1211) -\1424 = NAND(\759, \1212) -\1425 = NAND(\756, \1213) -\1426 = NAND(\765, \1214) -\1427 = NAND(\762, \1215) -\1440 = NAND(\786, \1249) -\1441 = NAND(\783, \1250) -\1448 = NOT(\1034) -\1449 = NOT(\1275) -\1450 = NOT(\1276) -\1451 = AND(\93, \1042, \1053) -\1452 = AND(\55, \509, \1053) -\1453 = AND(\67, \1042, \521) -\1454 = AND(\81, \1042, \1053) -\1455 = AND(\43, \509, \1053) -\1456 = AND(\56, \1042, \521) -\1457 = AND(\92, \1042, \1053) -\1458 = AND(\54, \509, \1053) -\1459 = AND(\66, \1042, \521) -\1460 = AND(\91, \1042, \1053) -\1461 = AND(\53, \509, \1053) -\1462 = AND(\65, \1042, \521) -\1463 = AND(\90, \1042, \1053) -\1464 = AND(\52, \509, \1053) -\1465 = AND(\64, \1042, \521) -\1466 = AND(\89, \1075, \1086) -\1467 = AND(\51, \550, \1086) -\1468 = AND(\63, \1075, \562) -\1469 = AND(\88, \1075, \1086) -\1470 = AND(\50, \550, \1086) -\1471 = AND(\62, \1075, \562) -\1472 = AND(\87, \1075, \1086) -\1473 = AND(\49, \550, \1086) -\1474 = AND(\1075, \562) -\1475 = AND(\86, \1075, \1086) -\1476 = AND(\48, \550, \1086) -\1477 = AND(\61, \1075, \562) -\1478 = AND(\85, \1075, \1086) -\1479 = AND(\47, \550, \1086) -\1480 = AND(\60, \1075, \562) -\1481 = AND(\138, \1102, \1113) -\1482 = AND(\102, \582, \1113) -\1483 = AND(\126, \1102, \594) -\1484 = AND(\137, \1102, \1113) -\1485 = AND(\101, \582, \1113) -\1486 = AND(\125, \1102, \594) -\1487 = AND(\136, \1102, \1113) -\1488 = AND(\100, \582, \1113) -\1489 = AND(\124, \1102, \594) -\1490 = AND(\135, \1102, \1113) -\1491 = AND(\99, \582, \1113) -\1492 = AND(\123, \1102, \594) -\1493 = AND(\1102, \1113) -\1494 = AND(\582, \1113) -\1495 = AND(\1102, \594) -\1496 = NOT(\1129) -\1499 = NOT(\1133) -\1502 = NAND(\1351, \1141) -\1506 = NAND(\1352, \1353) -\1510 = NAND(\1354, \1355) -\1513 = BUFF(\1137) -\1516 = BUFF(\1137) -\1519 = NOT(\1219) -\1520 = NOT(\1222) -\1521 = NOT(\1225) -\1522 = NOT(\1228) -\1523 = NOT(\1231) -\1524 = NOT(\1234) -\1525 = NOT(\1237) -\1526 = NOT(\1240) -\1527 = NOT(\1243) -\1528 = NOT(\1246) -\1529 = AND(\142, \1146, \1157) -\1530 = AND(\106, \613, \1157) -\1531 = AND(\130, \1146, \625) -\1532 = AND(\131, \1146, \1157) -\1533 = AND(\95, \613, \1157) -\1534 = AND(\119, \1146, \625) -\1535 = AND(\141, \1146, \1157) -\1536 = AND(\105, \613, \1157) -\1537 = AND(\129, \1146, \625) -\1538 = AND(\140, \1146, \1157) -\1539 = AND(\104, \613, \1157) -\1540 = AND(\128, \1146, \625) -\1541 = AND(\139, \1146, \1157) -\1542 = AND(\103, \613, \1157) -\1543 = AND(\127, \1146, \625) -\1544 = AND(\19, \1173) -\1545 = AND(\4, \1173) -\1546 = AND(\20, \1173) -\1547 = AND(\5, \1173) -\1548 = AND(\21, \1178) -\1549 = AND(\22, \1178) -\1550 = AND(\23, \1178) -\1551 = AND(\6, \1178) -\1552 = AND(\24, \1178) -\1553 = NAND(\1395, \1185) -\1557 = NAND(\1396, \1397) -\1561 = NAND(\1398, \1399) -\1564 = AND(\25, \1200) -\1565 = AND(\32, \1200) -\1566 = AND(\26, \1200) -\1567 = AND(\33, \1200) -\1568 = AND(\27, \1205) -\1569 = AND(\34, \1205) -\1570 = AND(\35, \1205) -\1571 = AND(\28, \1205) -\1572 = NOT(\1251) -\1573 = NOT(\1254) -\1574 = NOT(\1257) -\1575 = NOT(\1260) -\1576 = NOT(\1263) -\1577 = NOT(\1266) -\1578 = NAND(\1422, \1423) -\1581 = NOT(\1216) -\1582 = NAND(\1426, \1427) -\1585 = NAND(\1424, \1425) -\1588 = NAND(\1440, \1441) -\1591 = AND(\1449, \1450) -\1596 = OR(\1451, \1452, \1453, \1064) -\1600 = OR(\1454, \1455, \1456, \1065) -\1606 = OR(\1457, \1458, \1459, \1066) -\1612 = OR(\1460, \1461, \1462, \1067) -\1615 = OR(\1463, \1464, \1465, \1068) -\1619 = OR(\1466, \1467, \1468, \1097) -\1624 = OR(\1469, \1470, \1471, \1098) -\1628 = OR(\1472, \1473, \1474, \1099) -\1631 = OR(\1475, \1476, \1477, \1100) -\1634 = OR(\1478, \1479, \1480, \1101) -\1637 = OR(\1481, \1482, \1483, \1124) -\1642 = OR(\1484, \1485, \1486, \1125) -\1647 = OR(\1487, \1488, \1489, \1126) -\1651 = OR(\1490, \1491, \1492, \1127) -\1656 = OR(\1493, \1494, \1495, \1128) -\1676 = OR(\1532, \1533, \1534, \1169) -\1681 = OR(\1535, \1536, \1537, \1170) -\1686 = OR(\1538, \1539, \1540, \1171) -\1690 = OR(\1541, \1542, \1543, \1172) -\1708 = OR(\1529, \1530, \1531, \1168) -\1726 = BUFF(\1591) -\1770 = NOT(\1502) -\1773 = NOT(\1506) -\1776 = NOT(\1513) -\1777 = NOT(\1516) -\1778 = BUFF(\1510) -\1781 = BUFF(\1510) -\1784 = AND(\1133, \1129, \1513) -\1785 = AND(\1499, \1496, \1516) -\1795 = NOT(\1553) -\1798 = NOT(\1557) -\1801 = BUFF(\1561) -\1804 = BUFF(\1561) -\1807 = NOT(\1588) -\1808 = NOT(\1578) -\1809 = NAND(\1578, \1581) -\1810 = NOT(\1582) -\1811 = NOT(\1585) -\1813 = AND(\1596, \241) -\1814 = AND(\1606, \241) -\1815 = AND(\1600, \241) -\1816 = NOT(\1642) -\1817 = NOT(\1647) -\1818 = NOT(\1637) -\1819 = NOT(\1624) -\1820 = NOT(\1619) -\1821 = NOT(\1615) -\1822 = AND(\496, \224, \36, \1591) -\1823 = AND(\496, \224, \1591, \486) -\1824 = BUFF(\1596) -\1827 = NOT(\1606) -\1830 = AND(\1600, \537) -\1831 = AND(\1606, \537) -\1832 = AND(\1619, \246) -\1833 = NOT(\1596) -\1836 = NOT(\1600) -\1841 = NOT(\1606) -\1848 = BUFF(\1612) -\1852 = BUFF(\1615) -\1856 = BUFF(\1619) -\1863 = BUFF(\1624) -\1870 = BUFF(\1628) -\1875 = BUFF(\1631) -\1880 = BUFF(\1634) -\1885 = NAND(\727, \1651) -\1888 = NAND(\730, \1656) -\1891 = BUFF(\1686) -\1894 = AND(\1637, \425) -\1897 = NOT(\1642) -\1908 = AND(\1496, \1133, \1776) -\1909 = AND(\1129, \1499, \1777) -\1910 = AND(\1600, \637) -\1911 = AND(\1606, \637) -\1912 = AND(\1612, \637) -\1913 = AND(\1615, \637) -\1914 = AND(\1619, \643) -\1915 = AND(\1624, \643) -\1916 = AND(\1628, \643) -\1917 = AND(\1631, \643) -\1918 = AND(\1634, \643) -\1919 = NOT(\1708) -\1928 = AND(\1676, \693) -\1929 = AND(\1681, \693) -\1930 = AND(\1686, \693) -\1931 = AND(\1690, \693) -\1932 = AND(\1637, \699) -\1933 = AND(\1642, \699) -\1934 = AND(\1647, \699) -\1935 = AND(\1651, \699) -\1936 = BUFF(\1600) -\1939 = NAND(\1216, \1808) -\1940 = NAND(\1585, \1810) -\1941 = NAND(\1582, \1811) -\1942 = BUFF(\1676) -\1945 = BUFF(\1686) -\1948 = BUFF(\1681) -\1951 = BUFF(\1637) -\1954 = BUFF(\1690) -\1957 = BUFF(\1647) -\1960 = BUFF(\1642) -\1963 = BUFF(\1656) -\1966 = BUFF(\1651) -\1969 = OR(\533, \1815) -\1970 = NOT(\1822) -\1971 = NOT(\1823) -\2010 = BUFF(\1848) -\2012 = BUFF(\1852) -\2014 = BUFF(\1856) -\2016 = BUFF(\1863) -\2018 = BUFF(\1870) -\2020 = BUFF(\1875) -\2022 = BUFF(\1880) -\2028 = NOT(\1778) -\2029 = NOT(\1781) -\2030 = NOR(\1908, \1784) -\2031 = NOR(\1909, \1785) -\2032 = AND(\1506, \1502, \1778) -\2033 = AND(\1773, \1770, \1781) -\2034 = OR(\1571, \1935) -\2040 = NOT(\1801) -\2041 = NOT(\1804) -\2042 = AND(\1557, \1553, \1801) -\2043 = AND(\1798, \1795, \1804) -\2046 = NAND(\1939, \1809) -\2049 = NAND(\1940, \1941) -\2052 = OR(\1544, \1910) -\2055 = OR(\1545, \1911) -\2058 = OR(\1546, \1912) -\2061 = OR(\1547, \1913) -\2064 = OR(\1548, \1914) -\2067 = OR(\1549, \1915) -\2070 = OR(\1550, \1916) -\2073 = OR(\1551, \1917) -\2076 = OR(\1552, \1918) -\2079 = OR(\1564, \1928) -\2095 = OR(\1565, \1929) -\2098 = OR(\1566, \1930) -\2101 = OR(\1567, \1931) -\2104 = OR(\1568, \1932) -\2107 = OR(\1569, \1933) -\2110 = OR(\1570, \1934) -\2113 = AND(\1897, \1894, \40) -\2119 = NOT(\1894) -\2120 = NAND(\408, \1827) -\2125 = AND(\1824, \537) -\2126 = AND(\1852, \246) -\2127 = AND(\1848, \537) -\2128 = NOT(\1848) -\2135 = NOT(\1852) -\2141 = NOT(\1863) -\2144 = NOT(\1870) -\2147 = NOT(\1875) -\2150 = NOT(\1880) -\2153 = AND(\727, \1885) -\2154 = AND(\1885, \1651) -\2155 = AND(\730, \1888) -\2156 = AND(\1888, \1656) -\2157 = AND(\1770, \1506, \2028) -\2158 = AND(\1502, \1773, \2029) -\2171 = NOT(\1942) -\2172 = NAND(\1942, \1919) -\2173 = NOT(\1945) -\2174 = NOT(\1948) -\2175 = NOT(\1951) -\2176 = NOT(\1954) -\2177 = AND(\1795, \1557, \2040) -\2178 = AND(\1553, \1798, \2041) -\2185 = BUFF(\1836) -\2188 = BUFF(\1833) -\2191 = BUFF(\1841) -\2194 = NOT(\1856) -\2197 = NOT(\1827) -\2200 = NOT(\1936) -\2201 = BUFF(\1836) -\2204 = BUFF(\1833) -\2207 = BUFF(\1841) -\2210 = BUFF(\1824) -\2213 = BUFF(\1841) -\2216 = BUFF(\1841) -\2219 = NAND(\2031, \2030) -\2234 = NOT(\1957) -\2235 = NOT(\1960) -\2236 = NOT(\1963) -\2237 = NOT(\1966) -\2250 = AND(\40, \1897, \2119) -\2266 = OR(\1831, \2126) -\2269 = OR(\2127, \1832) -\2291 = OR(\2153, \2154) -\2294 = OR(\2155, \2156) -\2297 = NOR(\2157, \2032) -\2298 = NOR(\2158, \2033) -\2300 = NOT(\2046) -\2301 = NOT(\2049) -\2302 = NAND(\2052, \1519) -\2303 = NOT(\2052) -\2304 = NAND(\2055, \1520) -\2305 = NOT(\2055) -\2306 = NAND(\2058, \1521) -\2307 = NOT(\2058) -\2308 = NAND(\2061, \1522) -\2309 = NOT(\2061) -\2310 = NAND(\2064, \1523) -\2311 = NOT(\2064) -\2312 = NAND(\2067, \1524) -\2313 = NOT(\2067) -\2314 = NAND(\2070, \1525) -\2315 = NOT(\2070) -\2316 = NAND(\2073, \1526) -\2317 = NOT(\2073) -\2318 = NAND(\2076, \1527) -\2319 = NOT(\2076) -\2320 = NAND(\2079, \1528) -\2321 = NOT(\2079) -\2322 = NAND(\1708, \2171) -\2323 = NAND(\1948, \2173) -\2324 = NAND(\1945, \2174) -\2325 = NAND(\1954, \2175) -\2326 = NAND(\1951, \2176) -\2327 = NOR(\2177, \2042) -\2328 = NOR(\2178, \2043) -\2329 = NAND(\2095, \1572) -\2330 = NOT(\2095) -\2331 = NAND(\2098, \1573) -\2332 = NOT(\2098) -\2333 = NAND(\2101, \1574) -\2334 = NOT(\2101) -\2335 = NAND(\2104, \1575) -\2336 = NOT(\2104) -\2337 = NAND(\2107, \1576) -\2338 = NOT(\2107) -\2339 = NAND(\2110, \1577) -\2340 = NOT(\2110) -\2354 = NAND(\1960, \2234) -\2355 = NAND(\1957, \2235) -\2356 = NAND(\1966, \2236) -\2357 = NAND(\1963, \2237) -\2358 = AND(\2120, \533) -\2359 = NOT(\2113) -\2364 = NOT(\2185) -\2365 = NOT(\2188) -\2366 = NOT(\2191) -\2367 = NOT(\2194) -\2368 = BUFF(\2120) -\2372 = NOT(\2201) -\2373 = NOT(\2204) -\2374 = NOT(\2207) -\2375 = NOT(\2210) -\2376 = NOT(\2213) -\2377 = NOT(\2113) -\2382 = BUFF(\2113) -\2386 = AND(\2120, \246) -\2387 = BUFF(\2266) -\2388 = BUFF(\2266) -\2389 = BUFF(\2269) -\2390 = BUFF(\2269) -\2391 = BUFF(\2113) -\2395 = NOT(\2113) -\2400 = NAND(\2219, \2300) -\2403 = NOT(\2216) -\2406 = NOT(\2219) -\2407 = NAND(\1219, \2303) -\2408 = NAND(\1222, \2305) -\2409 = NAND(\1225, \2307) -\2410 = NAND(\1228, \2309) -\2411 = NAND(\1231, \2311) -\2412 = NAND(\1234, \2313) -\2413 = NAND(\1237, \2315) -\2414 = NAND(\1240, \2317) -\2415 = NAND(\1243, \2319) -\2416 = NAND(\1246, \2321) -\2417 = NAND(\2322, \2172) -\2421 = NAND(\2323, \2324) -\2425 = NAND(\2325, \2326) -\2428 = NAND(\1251, \2330) -\2429 = NAND(\1254, \2332) -\2430 = NAND(\1257, \2334) -\2431 = NAND(\1260, \2336) -\2432 = NAND(\1263, \2338) -\2433 = NAND(\1266, \2340) -\2434 = BUFF(\2128) -\2437 = BUFF(\2135) -\2440 = BUFF(\2144) -\2443 = BUFF(\2141) -\2446 = BUFF(\2150) -\2449 = BUFF(\2147) -\2452 = NOT(\2197) -\2453 = NAND(\2197, \2200) -\2454 = BUFF(\2128) -\2457 = BUFF(\2144) -\2460 = BUFF(\2141) -\2463 = BUFF(\2150) -\2466 = BUFF(\2147) -\2469 = NOT(\2120) -\2472 = BUFF(\2128) -\2475 = BUFF(\2135) -\2478 = BUFF(\2128) -\2481 = BUFF(\2135) -\2484 = NAND(\2298, \2297) -\2487 = NAND(\2356, \2357) -\2490 = NAND(\2354, \2355) -\2493 = NAND(\2328, \2327) -\2496 = OR(\2358, \1814) -\2503 = NAND(\2188, \2364) -\2504 = NAND(\2185, \2365) -\2510 = NAND(\2204, \2372) -\2511 = NAND(\2201, \2373) -\2521 = OR(\1830, \2386) -\2528 = NAND(\2046, \2406) -\2531 = NOT(\2291) -\2534 = NOT(\2294) -\2537 = BUFF(\2250) -\2540 = BUFF(\2250) -\2544 = NAND(\2302, \2407) -\2545 = NAND(\2304, \2408) -\2546 = NAND(\2306, \2409) -\2547 = NAND(\2308, \2410) -\2548 = NAND(\2310, \2411) -\2549 = NAND(\2312, \2412) -\2550 = NAND(\2314, \2413) -\2551 = NAND(\2316, \2414) -\2552 = NAND(\2318, \2415) -\2553 = NAND(\2320, \2416) -\2563 = NAND(\2329, \2428) -\2564 = NAND(\2331, \2429) -\2565 = NAND(\2333, \2430) -\2566 = NAND(\2335, \2431) -\2567 = NAND(\2337, \2432) -\2568 = NAND(\2339, \2433) -\2579 = NAND(\1936, \2452) -\2603 = BUFF(\2359) -\2607 = AND(\1880, \2377) -\2608 = AND(\1676, \2377) -\2609 = AND(\1681, \2377) -\2610 = AND(\1891, \2377) -\2611 = AND(\1856, \2382) -\2612 = AND(\1863, \2382) -\2613 = NAND(\2503, \2504) -\2617 = NOT(\2434) -\2618 = NAND(\2434, \2366) -\2619 = NAND(\2437, \2367) -\2620 = NOT(\2437) -\2621 = NOT(\2368) -\2624 = NAND(\2510, \2511) -\2628 = NOT(\2454) -\2629 = NAND(\2454, \2374) -\2630 = NOT(\2472) -\2631 = AND(\1856, \2391) -\2632 = AND(\1863, \2391) -\2633 = AND(\1880, \2395) -\2634 = AND(\1676, \2395) -\2635 = AND(\1681, \2395) -\2636 = AND(\1891, \2395) -\2638 = NOT(\2382) -\2643 = BUFF(\2521) -\2644 = BUFF(\2521) -\2645 = NOT(\2475) -\2646 = NOT(\2391) -\2652 = NAND(\2528, \2400) -\2655 = NOT(\2478) -\2656 = NOT(\2481) -\2659 = BUFF(\2359) -\2663 = NOT(\2484) -\2664 = NAND(\2484, \2301) -\2665 = NOT(\2553) -\2666 = NOT(\2552) -\2667 = NOT(\2551) -\2668 = NOT(\2550) -\2669 = NOT(\2549) -\2670 = NOT(\2548) -\2671 = NOT(\2547) -\2672 = NOT(\2546) -\2673 = NOT(\2545) -\2674 = NOT(\2544) -\2675 = NOT(\2568) -\2676 = NOT(\2567) -\2677 = NOT(\2566) -\2678 = NOT(\2565) -\2679 = NOT(\2564) -\2680 = NOT(\2563) -\2681 = NOT(\2417) -\2684 = NOT(\2421) -\2687 = BUFF(\2425) -\2690 = BUFF(\2425) -\2693 = NOT(\2493) -\2694 = NAND(\2493, \1807) -\2695 = NOT(\2440) -\2696 = NOT(\2443) -\2697 = NOT(\2446) -\2698 = NOT(\2449) -\2699 = NOT(\2457) -\2700 = NOT(\2460) -\2701 = NOT(\2463) -\2702 = NOT(\2466) -\2703 = NAND(\2579, \2453) -\2706 = NOT(\2469) -\2707 = NOT(\2487) -\2708 = NOT(\2490) -\2709 = AND(\2294, \2534) -\2710 = AND(\2291, \2531) -\2719 = NAND(\2191, \2617) -\2720 = NAND(\2194, \2620) -\2726 = NAND(\2207, \2628) -\2729 = BUFF(\2537) -\2738 = BUFF(\2537) -\2743 = NOT(\2652) -\2747 = NAND(\2049, \2663) -\2748 = AND(\2665, \2666, \2667, \2668, \2669) -\2749 = AND(\2670, \2671, \2672, \2673, \2674) -\2750 = AND(\2034, \2675) -\2751 = AND(\2676, \2677, \2678, \2679, \2680) -\2760 = NAND(\1588, \2693) -\2761 = BUFF(\2540) -\2766 = BUFF(\2540) -\2771 = NAND(\2443, \2695) -\2772 = NAND(\2440, \2696) -\2773 = NAND(\2449, \2697) -\2774 = NAND(\2446, \2698) -\2775 = NAND(\2460, \2699) -\2776 = NAND(\2457, \2700) -\2777 = NAND(\2466, \2701) -\2778 = NAND(\2463, \2702) -\2781 = NAND(\2490, \2707) -\2782 = NAND(\2487, \2708) -\2783 = OR(\2709, \2534) -\2784 = OR(\2710, \2531) -\2789 = AND(\1856, \2638) -\2790 = AND(\1863, \2638) -\2791 = AND(\1870, \2638) -\2792 = AND(\1875, \2638) -\2793 = NOT(\2613) -\2796 = NAND(\2719, \2618) -\2800 = NAND(\2619, \2720) -\2803 = NOT(\2624) -\2806 = NAND(\2726, \2629) -\2809 = AND(\1856, \2646) -\2810 = AND(\1863, \2646) -\2811 = AND(\1870, \2646) -\2812 = AND(\1875, \2646) -\2817 = AND(\2743, \14) -\2820 = BUFF(\2603) -\2826 = NAND(\2747, \2664) -\2829 = AND(\2748, \2749) -\2830 = AND(\2750, \2751) -\2831 = BUFF(\2659) -\2837 = NOT(\2687) -\2838 = NOT(\2690) -\2839 = AND(\2421, \2417, \2687) -\2840 = AND(\2684, \2681, \2690) -\2841 = NAND(\2760, \2694) -\2844 = BUFF(\2603) -\2854 = BUFF(\2603) -\2859 = BUFF(\2659) -\2869 = BUFF(\2659) -\2874 = NAND(\2773, \2774) -\2877 = NAND(\2771, \2772) -\2880 = NOT(\2703) -\2881 = NAND(\2703, \2706) -\2882 = NAND(\2777, \2778) -\2885 = NAND(\2775, \2776) -\2888 = NAND(\2781, \2782) -\2891 = NAND(\2783, \2784) -\2894 = AND(\2607, \2729) -\2895 = AND(\2608, \2729) -\2896 = AND(\2609, \2729) -\2897 = AND(\2610, \2729) -\2898 = OR(\2789, \2611) -\2899 = OR(\2790, \2612) -\2900 = AND(\2791, \1037) -\2901 = AND(\2792, \1037) -\2914 = OR(\2809, \2631) -\2915 = OR(\2810, \2632) -\2916 = AND(\2811, \1070) -\2917 = AND(\2812, \1070) -\2918 = AND(\2633, \2738) -\2919 = AND(\2634, \2738) -\2920 = AND(\2635, \2738) -\2921 = AND(\2636, \2738) -\2925 = BUFF(\2817) -\2931 = AND(\2829, \2830, \1302) -\2938 = AND(\2681, \2421, \2837) -\2939 = AND(\2417, \2684, \2838) -\2963 = NAND(\2469, \2880) -\2970 = NOT(\2841) -\2971 = NOT(\2826) -\2972 = NOT(\2894) -\2975 = NOT(\2895) -\2978 = NOT(\2896) -\2981 = NOT(\2897) -\2984 = AND(\2898, \1037) -\2985 = AND(\2899, \1037) -\2986 = NOT(\2900) -\2989 = NOT(\2901) -\2992 = NOT(\2796) -\2995 = BUFF(\2800) -\2998 = BUFF(\2800) -\3001 = BUFF(\2806) -\3004 = BUFF(\2806) -\3007 = AND(\574, \2820) -\3008 = AND(\2914, \1070) -\3009 = AND(\2915, \1070) -\3010 = NOT(\2916) -\3013 = NOT(\2917) -\3016 = NOT(\2918) -\3019 = NOT(\2919) -\3022 = NOT(\2920) -\3025 = NOT(\2921) -\3028 = NOT(\2817) -\3029 = AND(\574, \2831) -\3030 = NOT(\2820) -\3035 = AND(\578, \2820) -\3036 = AND(\655, \2820) -\3037 = AND(\659, \2820) -\3038 = BUFF(\2931) -\3039 = NOT(\2831) -\3044 = AND(\578, \2831) -\3045 = AND(\655, \2831) -\3046 = AND(\659, \2831) -\3047 = NOR(\2938, \2839) -\3048 = NOR(\2939, \2840) -\3049 = NOT(\2888) -\3050 = NOT(\2844) -\3053 = AND(\663, \2844) -\3054 = AND(\667, \2844) -\3055 = AND(\671, \2844) -\3056 = AND(\675, \2844) -\3057 = AND(\679, \2854) -\3058 = AND(\683, \2854) -\3059 = AND(\687, \2854) -\3060 = AND(\705, \2854) -\3061 = NOT(\2859) -\3064 = AND(\663, \2859) -\3065 = AND(\667, \2859) -\3066 = AND(\671, \2859) -\3067 = AND(\675, \2859) -\3068 = AND(\679, \2869) -\3069 = AND(\683, \2869) -\3070 = AND(\687, \2869) -\3071 = AND(\705, \2869) -\3072 = NOT(\2874) -\3073 = NOT(\2877) -\3074 = NOT(\2882) -\3075 = NOT(\2885) -\3076 = NAND(\2881, \2963) -\3079 = NOT(\2931) -\3088 = NOT(\2984) -\3091 = NOT(\2985) -\3110 = NOT(\3008) -\3113 = NOT(\3009) -\3137 = AND(\3055, \1190) -\3140 = AND(\3056, \1190) -\3143 = AND(\3057, \2761) -\3146 = AND(\3058, \2761) -\3149 = AND(\3059, \2761) -\3152 = AND(\3060, \2761) -\3157 = AND(\3066, \1195) -\3160 = AND(\3067, \1195) -\3163 = AND(\3068, \2766) -\3166 = AND(\3069, \2766) -\3169 = AND(\3070, \2766) -\3172 = AND(\3071, \2766) -\3175 = NAND(\2877, \3072) -\3176 = NAND(\2874, \3073) -\3177 = NAND(\2885, \3074) -\3178 = NAND(\2882, \3075) -\3180 = NAND(\3048, \3047) -\3187 = NOT(\2995) -\3188 = NOT(\2998) -\3189 = NOT(\3001) -\3190 = NOT(\3004) -\3191 = AND(\2796, \2613, \2995) -\3192 = AND(\2992, \2793, \2998) -\3193 = AND(\2624, \2368, \3001) -\3194 = AND(\2803, \2621, \3004) -\3195 = NAND(\3076, \2375) -\3196 = NOT(\3076) -\3197 = AND(\687, \3030) -\3208 = AND(\687, \3039) -\3215 = AND(\705, \3030) -\3216 = AND(\711, \3030) -\3217 = AND(\715, \3030) -\3218 = AND(\705, \3039) -\3219 = AND(\711, \3039) -\3220 = AND(\715, \3039) -\3222 = AND(\719, \3050) -\3223 = AND(\723, \3050) -\3230 = AND(\719, \3061) -\3231 = AND(\723, \3061) -\3238 = NAND(\3175, \3176) -\3241 = NAND(\3177, \3178) -\3244 = BUFF(\2981) -\3247 = BUFF(\2978) -\3250 = BUFF(\2975) -\3253 = BUFF(\2972) -\3256 = BUFF(\2989) -\3259 = BUFF(\2986) -\3262 = BUFF(\3025) -\3265 = BUFF(\3022) -\3268 = BUFF(\3019) -\3271 = BUFF(\3016) -\3274 = BUFF(\3013) -\3277 = BUFF(\3010) -\3281 = AND(\2793, \2796, \3187) -\3282 = AND(\2613, \2992, \3188) -\3283 = AND(\2621, \2624, \3189) -\3284 = AND(\2368, \2803, \3190) -\3286 = NAND(\2210, \3196) -\3288 = OR(\3197, \3007) -\3289 = NAND(\3180, \3049) -\3291 = AND(\3152, \2981) -\3293 = AND(\3149, \2978) -\3295 = AND(\3146, \2975) -\3296 = AND(\2972, \3143) -\3299 = AND(\3140, \2989) -\3301 = AND(\3137, \2986) -\3302 = OR(\3208, \3029) -\3304 = AND(\3172, \3025) -\3306 = AND(\3169, \3022) -\3308 = AND(\3166, \3019) -\3309 = AND(\3016, \3163) -\3312 = AND(\3160, \3013) -\3314 = AND(\3157, \3010) -\3315 = OR(\3215, \3035) -\3318 = OR(\3216, \3036) -\3321 = OR(\3217, \3037) -\3324 = OR(\3218, \3044) -\3327 = OR(\3219, \3045) -\3330 = OR(\3220, \3046) -\3333 = NOT(\3180) -\3334 = OR(\3222, \3053) -\3335 = OR(\3223, \3054) -\3336 = OR(\3230, \3064) -\3337 = OR(\3231, \3065) -\3340 = BUFF(\3152) -\3344 = BUFF(\3149) -\3348 = BUFF(\3146) -\3352 = BUFF(\3143) -\3356 = BUFF(\3140) -\3360 = BUFF(\3137) -\3364 = BUFF(\3091) -\3367 = BUFF(\3088) -\3370 = BUFF(\3172) -\3374 = BUFF(\3169) -\3378 = BUFF(\3166) -\3382 = BUFF(\3163) -\3386 = BUFF(\3160) -\3390 = BUFF(\3157) -\3394 = BUFF(\3113) -\3397 = BUFF(\3110) -\3400 = NAND(\3195, \3286) -\3401 = NOR(\3281, \3191) -\3402 = NOR(\3282, \3192) -\3403 = NOR(\3283, \3193) -\3404 = NOR(\3284, \3194) -\3405 = NOT(\3238) -\3406 = NOT(\3241) -\3409 = AND(\3288, \1836) -\3410 = NAND(\2888, \3333) -\3412 = NOT(\3244) -\3414 = NOT(\3247) -\3416 = NOT(\3250) -\3418 = NOT(\3253) -\3420 = NOT(\3256) -\3422 = NOT(\3259) -\3428 = AND(\3302, \1836) -\3430 = NOT(\3262) -\3432 = NOT(\3265) -\3434 = NOT(\3268) -\3436 = NOT(\3271) -\3438 = NOT(\3274) -\3440 = NOT(\3277) -\3450 = AND(\3334, \1190) -\3453 = AND(\3335, \1190) -\3456 = AND(\3336, \1195) -\3459 = AND(\3337, \1195) -\3478 = AND(\3400, \533) -\3479 = AND(\3318, \2128) -\3480 = AND(\3315, \1841) -\3481 = NAND(\3410, \3289) -\3482 = NOT(\3340) -\3483 = NAND(\3340, \3412) -\3484 = NOT(\3344) -\3485 = NAND(\3344, \3414) -\3486 = NOT(\3348) -\3487 = NAND(\3348, \3416) -\3488 = NOT(\3352) -\3489 = NAND(\3352, \3418) -\3490 = NOT(\3356) -\3491 = NAND(\3356, \3420) -\3492 = NOT(\3360) -\3493 = NAND(\3360, \3422) -\3494 = NOT(\3364) -\3496 = NOT(\3367) -\3498 = AND(\3321, \2135) -\3499 = AND(\3327, \2128) -\3500 = AND(\3324, \1841) -\3501 = NOT(\3370) -\3502 = NAND(\3370, \3430) -\3503 = NOT(\3374) -\3504 = NAND(\3374, \3432) -\3505 = NOT(\3378) -\3506 = NAND(\3378, \3434) -\3507 = NOT(\3382) -\3508 = NAND(\3382, \3436) -\3509 = NOT(\3386) -\3510 = NAND(\3386, \3438) -\3511 = NOT(\3390) -\3512 = NAND(\3390, \3440) -\3513 = NOT(\3394) -\3515 = NOT(\3397) -\3517 = AND(\3330, \2135) -\3522 = NAND(\3402, \3401) -\3525 = NAND(\3404, \3403) -\3528 = BUFF(\3318) -\3531 = BUFF(\3315) -\3534 = BUFF(\3321) -\3537 = BUFF(\3327) -\3540 = BUFF(\3324) -\3543 = BUFF(\3330) -\3546 = OR(\3478, \1813) -\3551 = NOT(\3481) -\3552 = NAND(\3244, \3482) -\3553 = NAND(\3247, \3484) -\3554 = NAND(\3250, \3486) -\3555 = NAND(\3253, \3488) -\3556 = NAND(\3256, \3490) -\3557 = NAND(\3259, \3492) -\3558 = AND(\3453, \3091) -\3559 = AND(\3450, \3088) -\3563 = NAND(\3262, \3501) -\3564 = NAND(\3265, \3503) -\3565 = NAND(\3268, \3505) -\3566 = NAND(\3271, \3507) -\3567 = NAND(\3274, \3509) -\3568 = NAND(\3277, \3511) -\3569 = AND(\3459, \3113) -\3570 = AND(\3456, \3110) -\3576 = BUFF(\3453) -\3579 = BUFF(\3450) -\3585 = BUFF(\3459) -\3588 = BUFF(\3456) -\3592 = NOT(\3522) -\3593 = NAND(\3522, \3405) -\3594 = NOT(\3525) -\3595 = NAND(\3525, \3406) -\3596 = NOT(\3528) -\3597 = NAND(\3528, \2630) -\3598 = NAND(\3531, \2376) -\3599 = NOT(\3531) -\3600 = AND(\3551, \800) -\3603 = NAND(\3552, \3483) -\3608 = NAND(\3553, \3485) -\3612 = NAND(\3554, \3487) -\3615 = NAND(\3555, \3489) -\3616 = NAND(\3556, \3491) -\3622 = NAND(\3557, \3493) -\3629 = NOT(\3534) -\3630 = NAND(\3534, \2645) -\3631 = NOT(\3537) -\3632 = NAND(\3537, \2655) -\3633 = NAND(\3540, \2403) -\3634 = NOT(\3540) -\3635 = NAND(\3563, \3502) -\3640 = NAND(\3564, \3504) -\3644 = NAND(\3565, \3506) -\3647 = NAND(\3566, \3508) -\3648 = NAND(\3567, \3510) -\3654 = NAND(\3568, \3512) -\3661 = NOT(\3543) -\3662 = NAND(\3543, \2656) -\3667 = NAND(\3238, \3592) -\3668 = NAND(\3241, \3594) -\3669 = NAND(\2472, \3596) -\3670 = NAND(\2213, \3599) -\3671 = BUFF(\3600) -\3691 = NOT(\3576) -\3692 = NAND(\3576, \3494) -\3693 = NOT(\3579) -\3694 = NAND(\3579, \3496) -\3695 = NAND(\2475, \3629) -\3696 = NAND(\2478, \3631) -\3697 = NAND(\2216, \3634) -\3716 = NOT(\3585) -\3717 = NAND(\3585, \3513) -\3718 = NOT(\3588) -\3719 = NAND(\3588, \3515) -\3720 = NAND(\2481, \3661) -\3721 = NAND(\3667, \3593) -\3722 = NAND(\3668, \3595) -\3723 = NAND(\3669, \3597) -\3726 = NAND(\3670, \3598) -\3727 = NOT(\3600) -\3728 = NAND(\3364, \3691) -\3729 = NAND(\3367, \3693) -\3730 = NAND(\3695, \3630) -\3731 = AND(\3608, \3615, \3612, \3603) -\3732 = AND(\3603, \3293) -\3733 = AND(\3608, \3603, \3295) -\3734 = AND(\3612, \3603, \3296, \3608) -\3735 = AND(\3616, \3301) -\3736 = AND(\3622, \3616, \3558) -\3737 = NAND(\3696, \3632) -\3740 = NAND(\3697, \3633) -\3741 = NAND(\3394, \3716) -\3742 = NAND(\3397, \3718) -\3743 = NAND(\3720, \3662) -\3744 = AND(\3640, \3647, \3644, \3635) -\3745 = AND(\3635, \3306) -\3746 = AND(\3640, \3635, \3308) -\3747 = AND(\3644, \3635, \3309, \3640) -\3748 = AND(\3648, \3314) -\3749 = AND(\3654, \3648, \3569) -\3750 = NOT(\3721) -\3753 = AND(\3722, \246) -\3754 = NAND(\3728, \3692) -\3758 = NAND(\3729, \3694) -\3761 = NOT(\3731) -\3762 = OR(\3291, \3732, \3733, \3734) -\3767 = NAND(\3741, \3717) -\3771 = NAND(\3742, \3719) -\3774 = NOT(\3744) -\3775 = OR(\3304, \3745, \3746, \3747) -\3778 = AND(\3723, \3480) -\3779 = AND(\3726, \3723, \3409) -\3780 = OR(\2125, \3753) -\3790 = AND(\3750, \800) -\3793 = AND(\3737, \3500) -\3794 = AND(\3740, \3737, \3428) -\3802 = OR(\3479, \3778, \3779) -\3803 = BUFF(\3780) -\3804 = BUFF(\3780) -\3805 = NOT(\3762) -\3806 = AND(\3622, \3730, \3754, \3616, \3758) -\3807 = AND(\3754, \3616, \3559, \3622) -\3808 = AND(\3758, \3754, \3616, \3498, \3622) -\3809 = BUFF(\3790) -\3811 = OR(\3499, \3793, \3794) -\3812 = NOT(\3775) -\3813 = AND(\3654, \3743, \3767, \3648, \3771) -\3814 = AND(\3767, \3648, \3570, \3654) -\3815 = AND(\3771, \3767, \3648, \3517, \3654) -\3816 = OR(\3299, \3735, \3736, \3807, \3808) -\3817 = AND(\3806, \3802) -\3818 = NAND(\3805, \3761) -\3819 = NOT(\3790) -\3820 = OR(\3312, \3748, \3749, \3814, \3815) -\3821 = AND(\3813, \3811) -\3822 = NAND(\3812, \3774) -\3823 = OR(\3816, \3817) -\3826 = AND(\3727, \3819, \2841) -\3827 = OR(\3820, \3821) -\3834 = NOT(\3823) -\3835 = AND(\3818, \3823) -\3836 = NOT(\3827) -\3837 = AND(\3822, \3827) -\3838 = AND(\3762, \3834) -\3839 = AND(\3775, \3836) -\3840 = OR(\3838, \3835) -\3843 = OR(\3839, \3837) -\3851 = BUFF(\3843) -\3852 = NAND(\3843, \3840) -\3857 = AND(\3843, \3852) -\3858 = AND(\3852, \3840) -\3859 = OR(\3857, \3858) -\3864 = NOT(\3859) -\3869 = AND(\3859, \3864) -\3870 = OR(\3869, \3864) -\3875 = NOT(\3870) -\3876 = AND(\2826, \3028, \3870) -\3877 = AND(\3826, \3876, \1591) -\3881 = BUFF(\3877) -\3882 = NOT(\3877) diff --git a/ISCAS85/new/c3540.bench b/ISCAS85/new/c3540.bench deleted file mode 100644 index d03bc78..0000000 --- a/ISCAS85/new/c3540.bench +++ /dev/null @@ -1,1745 +0,0 @@ -# c\3540 - -INPUT(\1) -INPUT(\13) -INPUT(\20) -INPUT(\33) -INPUT(\41) -INPUT(\45) -INPUT(\50) -INPUT(\58) -INPUT(\68) -INPUT(\77) -INPUT(\87) -INPUT(\97) -INPUT(\107) -INPUT(\116) -INPUT(\124) -INPUT(\125) -INPUT(\128) -INPUT(\132) -INPUT(\137) -INPUT(\143) -INPUT(\150) -INPUT(\159) -INPUT(\169) -INPUT(\179) -INPUT(\190) -INPUT(\200) -INPUT(\213) -INPUT(\222) -INPUT(\223) -INPUT(\226) -INPUT(\232) -INPUT(\238) -INPUT(\244) -INPUT(\250) -INPUT(\257) -INPUT(\264) -INPUT(\270) -INPUT(\274) -INPUT(\283) -INPUT(\294) -INPUT(\303) -INPUT(\311) -INPUT(\317) -INPUT(\322) -INPUT(\326) -INPUT(\329) -INPUT(\330) -INPUT(\343) -INPUT(\349) -INPUT(\350) - -OUTPUT(\1713) -OUTPUT(\1947) -OUTPUT(\3195) -OUTPUT(\3833) -OUTPUT(\3987) -OUTPUT(\4028) -OUTPUT(\4145) -OUTPUT(\4589) -OUTPUT(\4667) -OUTPUT(\4815) -OUTPUT(\4944) -OUTPUT(\5002) -OUTPUT(\5045) -OUTPUT(\5047) -OUTPUT(\5078) -OUTPUT(\5102) -OUTPUT(\5120) -OUTPUT(\5121) -OUTPUT(\5192) -OUTPUT(\5231) -OUTPUT(\5360) -OUTPUT(\5361) - -\655 = BUFF(\50) -\665 = NOT(\50) -\670 = BUFF(\58) -\679 = NOT(\58) -\683 = BUFF(\68) -\686 = NOT(\68) -\690 = BUFF(\68) -\699 = BUFF(\77) -\702 = NOT(\77) -\706 = BUFF(\77) -\715 = BUFF(\87) -\724 = NOT(\87) -\727 = BUFF(\97) -\736 = NOT(\97) -\740 = BUFF(\107) -\749 = NOT(\107) -\753 = BUFF(\116) -\763 = NOT(\116) -\768 = OR(\257, \264) -\769 = NOT(\1) -\772 = BUFF(\1) -\779 = NOT(\1) -\782 = BUFF(\13) -\786 = NOT(\13) -\793 = AND(\13, \20) -\794 = NOT(\20) -\798 = BUFF(\20) -\803 = NOT(\20) -\820 = NOT(\33) -\821 = BUFF(\33) -\825 = NOT(\33) -\829 = AND(\33, \41) -\832 = NOT(\41) -\835 = OR(\41, \45) -\836 = BUFF(\45) -\839 = NOT(\45) -\842 = NOT(\50) -\845 = BUFF(\58) -\848 = NOT(\58) -\851 = BUFF(\68) -\854 = NOT(\68) -\858 = BUFF(\87) -\861 = NOT(\87) -\864 = BUFF(\97) -\867 = NOT(\97) -\870 = NOT(\107) -\874 = BUFF(\1) -\877 = BUFF(\68) -\880 = BUFF(\107) -\883 = NOT(\20) -\886 = BUFF(\190) -\889 = NOT(\200) -\890 = AND(\20, \200) -\891 = NAND(\20, \200) -\892 = AND(\20, \179) -\895 = NOT(\20) -\896 = OR(\349, \33) -\913 = NAND(\1, \13) -\914 = NAND(\1, \20, \33) -\915 = NOT(\20) -\916 = NOT(\33) -\917 = BUFF(\179) -\920 = NOT(\213) -\923 = BUFF(\343) -\926 = BUFF(\226) -\929 = BUFF(\232) -\932 = BUFF(\238) -\935 = BUFF(\244) -\938 = BUFF(\250) -\941 = BUFF(\257) -\944 = BUFF(\264) -\947 = BUFF(\270) -\950 = BUFF(\50) -\953 = BUFF(\58) -\956 = BUFF(\58) -\959 = BUFF(\97) -\962 = BUFF(\97) -\965 = BUFF(\330) -\1067 = AND(\250, \768) -\1117 = OR(\820, \20) -\1179 = OR(\895, \169) -\1196 = NOT(\793) -\1197 = OR(\915, \1) -\1202 = AND(\913, \914) -\1219 = OR(\916, \1) -\1250 = AND(\842, \848, \854) -\1251 = NAND(\226, \655) -\1252 = NAND(\232, \670) -\1253 = NAND(\238, \690) -\1254 = NAND(\244, \706) -\1255 = NAND(\250, \715) -\1256 = NAND(\257, \727) -\1257 = NAND(\264, \740) -\1258 = NAND(\270, \753) -\1259 = NOT(\926) -\1260 = NOT(\929) -\1261 = NOT(\932) -\1262 = NOT(\935) -\1263 = NAND(\679, \686) -\1264 = NAND(\736, \749) -\1267 = NAND(\683, \699) -\1268 = BUFF(\665) -\1271 = NOT(\953) -\1272 = NOT(\959) -\1273 = BUFF(\839) -\1276 = BUFF(\839) -\1279 = BUFF(\782) -\1298 = BUFF(\825) -\1302 = BUFF(\832) -\1306 = AND(\779, \835) -\1315 = AND(\779, \836, \832) -\1322 = AND(\769, \836) -\1325 = AND(\772, \786, \798) -\1328 = NAND(\772, \786, \798) -\1331 = NAND(\772, \786) -\1334 = BUFF(\874) -\1337 = NAND(\782, \794, \45) -\1338 = NAND(\842, \848, \854) -\1339 = NOT(\956) -\1340 = AND(\861, \867, \870) -\1343 = NAND(\861, \867, \870) -\1344 = NOT(\962) -\1345 = NOT(\803) -\1346 = NOT(\803) -\1347 = NOT(\803) -\1348 = NOT(\803) -\1349 = NOT(\803) -\1350 = NOT(\803) -\1351 = NOT(\803) -\1352 = NOT(\803) -\1353 = OR(\883, \886) -\1358 = NOR(\883, \886) -\1363 = BUFF(\892) -\1366 = NOT(\892) -\1369 = BUFF(\821) -\1384 = BUFF(\825) -\1401 = NOT(\896) -\1402 = NOT(\896) -\1403 = NOT(\896) -\1404 = NOT(\896) -\1405 = NOT(\896) -\1406 = NOT(\896) -\1407 = NOT(\896) -\1408 = NOT(\896) -\1409 = OR(\1, \1196) -\1426 = NOT(\829) -\1427 = NOT(\829) -\1452 = AND(\769, \782, \794) -\1459 = NOT(\917) -\1460 = NOT(\965) -\1461 = OR(\920, \923) -\1464 = NOR(\920, \923) -\1467 = NOT(\938) -\1468 = NOT(\941) -\1469 = NOT(\944) -\1470 = NOT(\947) -\1471 = BUFF(\679) -\1474 = NOT(\950) -\1475 = BUFF(\686) -\1478 = BUFF(\702) -\1481 = BUFF(\724) -\1484 = BUFF(\736) -\1487 = BUFF(\749) -\1490 = BUFF(\763) -\1493 = BUFF(\877) -\1496 = BUFF(\877) -\1499 = BUFF(\880) -\1502 = BUFF(\880) -\1505 = NAND(\702, \1250) -\1507 = AND(\1251, \1252, \1253, \1254) -\1508 = AND(\1255, \1256, \1257, \1258) -\1509 = NAND(\929, \1259) -\1510 = NAND(\926, \1260) -\1511 = NAND(\935, \1261) -\1512 = NAND(\932, \1262) -\1520 = AND(\655, \1263) -\1562 = AND(\874, \1337) -\1579 = NOT(\1117) -\1580 = AND(\803, \1117) -\1581 = AND(\1338, \1345) -\1582 = NOT(\1117) -\1583 = AND(\803, \1117) -\1584 = NOT(\1117) -\1585 = AND(\803, \1117) -\1586 = AND(\854, \1347) -\1587 = NOT(\1117) -\1588 = AND(\803, \1117) -\1589 = AND(\77, \1348) -\1590 = NOT(\1117) -\1591 = AND(\803, \1117) -\1592 = AND(\1343, \1349) -\1593 = NOT(\1117) -\1594 = AND(\803, \1117) -\1595 = NOT(\1117) -\1596 = AND(\803, \1117) -\1597 = AND(\870, \1351) -\1598 = NOT(\1117) -\1599 = AND(\803, \1117) -\1600 = AND(\116, \1352) -\1643 = AND(\222, \1401) -\1644 = AND(\223, \1402) -\1645 = AND(\226, \1403) -\1646 = AND(\232, \1404) -\1647 = AND(\238, \1405) -\1648 = AND(\244, \1406) -\1649 = AND(\250, \1407) -\1650 = AND(\257, \1408) -\1667 = AND(\1, \13, \1426) -\1670 = AND(\1, \13, \1427) -\1673 = NOT(\1202) -\1674 = NOT(\1202) -\1675 = NOT(\1202) -\1676 = NOT(\1202) -\1677 = NOT(\1202) -\1678 = NOT(\1202) -\1679 = NOT(\1202) -\1680 = NOT(\1202) -\1691 = NAND(\941, \1467) -\1692 = NAND(\938, \1468) -\1693 = NAND(\947, \1469) -\1694 = NAND(\944, \1470) -\1713 = NOT(\1505) -\1714 = AND(\87, \1264) -\1715 = NAND(\1509, \1510) -\1718 = NAND(\1511, \1512) -\1721 = NAND(\1507, \1508) -\1722 = AND(\763, \1340) -\1725 = NAND(\763, \1340) -\1726 = NOT(\1268) -\1727 = NAND(\1493, \1271) -\1728 = NOT(\1493) -\1729 = AND(\683, \1268) -\1730 = NAND(\1499, \1272) -\1731 = NOT(\1499) -\1735 = NAND(\87, \1264) -\1736 = NOT(\1273) -\1737 = NOT(\1276) -\1738 = NAND(\1325, \821) -\1747 = NAND(\1325, \825) -\1756 = NAND(\772, \1279, \798) -\1761 = NAND(\772, \786, \798, \1302) -\1764 = NAND(\1496, \1339) -\1765 = NOT(\1496) -\1766 = NAND(\1502, \1344) -\1767 = NOT(\1502) -\1768 = NOT(\1328) -\1769 = NOT(\1334) -\1770 = NOT(\1331) -\1787 = AND(\845, \1579) -\1788 = AND(\150, \1580) -\1789 = AND(\851, \1582) -\1790 = AND(\159, \1583) -\1791 = AND(\77, \1584) -\1792 = AND(\50, \1585) -\1793 = AND(\858, \1587) -\1794 = AND(\845, \1588) -\1795 = AND(\864, \1590) -\1796 = AND(\851, \1591) -\1797 = AND(\107, \1593) -\1798 = AND(\77, \1594) -\1799 = AND(\116, \1595) -\1800 = AND(\858, \1596) -\1801 = AND(\283, \1598) -\1802 = AND(\864, \1599) -\1803 = AND(\200, \1363) -\1806 = AND(\889, \1363) -\1809 = AND(\890, \1366) -\1812 = AND(\891, \1366) -\1815 = NAND(\1298, \1302) -\1818 = NAND(\821, \1302) -\1821 = NAND(\772, \1279, \1179) -\1824 = NAND(\786, \794, \1298) -\1833 = NAND(\786, \1298) -\1842 = NOT(\1369) -\1843 = NOT(\1369) -\1844 = NOT(\1369) -\1845 = NOT(\1369) -\1846 = NOT(\1369) -\1847 = NOT(\1369) -\1848 = NOT(\1369) -\1849 = NOT(\1384) -\1850 = AND(\1384, \896) -\1851 = NOT(\1384) -\1852 = AND(\1384, \896) -\1853 = NOT(\1384) -\1854 = AND(\1384, \896) -\1855 = NOT(\1384) -\1856 = AND(\1384, \896) -\1857 = NOT(\1384) -\1858 = AND(\1384, \896) -\1859 = NOT(\1384) -\1860 = AND(\1384, \896) -\1861 = NOT(\1384) -\1862 = AND(\1384, \896) -\1863 = NOT(\1384) -\1864 = AND(\1384, \896) -\1869 = AND(\1202, \1409) -\1870 = NOR(\50, \1409) -\1873 = NOT(\1306) -\1874 = AND(\1202, \1409) -\1875 = NOR(\58, \1409) -\1878 = NOT(\1306) -\1879 = AND(\1202, \1409) -\1880 = NOR(\68, \1409) -\1883 = NOT(\1306) -\1884 = AND(\1202, \1409) -\1885 = NOR(\77, \1409) -\1888 = NOT(\1306) -\1889 = AND(\1202, \1409) -\1890 = NOR(\87, \1409) -\1893 = NOT(\1322) -\1894 = AND(\1202, \1409) -\1895 = NOR(\97, \1409) -\1898 = NOT(\1315) -\1899 = AND(\1202, \1409) -\1900 = NOR(\107, \1409) -\1903 = NOT(\1315) -\1904 = AND(\1202, \1409) -\1905 = NOR(\116, \1409) -\1908 = NOT(\1315) -\1909 = AND(\1452, \213) -\1912 = NAND(\1452, \213) -\1913 = AND(\1452, \213, \343) -\1917 = NAND(\1452, \213, \343) -\1922 = AND(\1452, \213, \343) -\1926 = NAND(\1452, \213, \343) -\1930 = BUFF(\1464) -\1933 = NAND(\1691, \1692) -\1936 = NAND(\1693, \1694) -\1939 = NOT(\1471) -\1940 = NAND(\1471, \1474) -\1941 = NOT(\1475) -\1942 = NOT(\1478) -\1943 = NOT(\1481) -\1944 = NOT(\1484) -\1945 = NOT(\1487) -\1946 = NOT(\1490) -\1947 = NOT(\1714) -\1960 = NAND(\953, \1728) -\1961 = NAND(\959, \1731) -\1966 = AND(\1520, \1276) -\1981 = NAND(\956, \1765) -\1982 = NAND(\962, \1767) -\1983 = AND(\1067, \1768) -\1986 = OR(\1581, \1787, \1788) -\1987 = OR(\1586, \1791, \1792) -\1988 = OR(\1589, \1793, \1794) -\1989 = OR(\1592, \1795, \1796) -\1990 = OR(\1597, \1799, \1800) -\1991 = OR(\1600, \1801, \1802) -\2022 = AND(\77, \1849) -\2023 = AND(\223, \1850) -\2024 = AND(\87, \1851) -\2025 = AND(\226, \1852) -\2026 = AND(\97, \1853) -\2027 = AND(\232, \1854) -\2028 = AND(\107, \1855) -\2029 = AND(\238, \1856) -\2030 = AND(\116, \1857) -\2031 = AND(\244, \1858) -\2032 = AND(\283, \1859) -\2033 = AND(\250, \1860) -\2034 = AND(\294, \1861) -\2035 = AND(\257, \1862) -\2036 = AND(\303, \1863) -\2037 = AND(\264, \1864) -\2038 = BUFF(\1667) -\2043 = NOT(\1667) -\2052 = BUFF(\1670) -\2057 = NOT(\1670) -\2068 = AND(\50, \1197, \1869) -\2073 = AND(\58, \1197, \1874) -\2078 = AND(\68, \1197, \1879) -\2083 = AND(\77, \1197, \1884) -\2088 = AND(\87, \1219, \1889) -\2093 = AND(\97, \1219, \1894) -\2098 = AND(\107, \1219, \1899) -\2103 = AND(\116, \1219, \1904) -\2121 = NOT(\1562) -\2122 = NOT(\1562) -\2123 = NOT(\1562) -\2124 = NOT(\1562) -\2125 = NOT(\1562) -\2126 = NOT(\1562) -\2127 = NOT(\1562) -\2128 = NOT(\1562) -\2133 = NAND(\950, \1939) -\2134 = NAND(\1478, \1941) -\2135 = NAND(\1475, \1942) -\2136 = NAND(\1484, \1943) -\2137 = NAND(\1481, \1944) -\2138 = NAND(\1490, \1945) -\2139 = NAND(\1487, \1946) -\2141 = NOT(\1933) -\2142 = NOT(\1936) -\2143 = NOT(\1738) -\2144 = AND(\1738, \1747) -\2145 = NOT(\1747) -\2146 = NAND(\1727, \1960) -\2147 = NAND(\1730, \1961) -\2148 = AND(\1722, \1267, \665, \58) -\2149 = NOT(\1738) -\2150 = AND(\1738, \1747) -\2151 = NOT(\1747) -\2152 = NOT(\1738) -\2153 = NOT(\1747) -\2154 = AND(\1738, \1747) -\2155 = NOT(\1738) -\2156 = NOT(\1747) -\2157 = AND(\1738, \1747) -\2158 = BUFF(\1761) -\2175 = BUFF(\1761) -\2178 = NAND(\1764, \1981) -\2179 = NAND(\1766, \1982) -\2180 = NOT(\1756) -\2181 = AND(\1756, \1328) -\2183 = NOT(\1756) -\2184 = AND(\1331, \1756) -\2185 = NAND(\1358, \1812) -\2188 = NAND(\1358, \1809) -\2191 = NAND(\1353, \1812) -\2194 = NAND(\1353, \1809) -\2197 = NAND(\1358, \1806) -\2200 = NAND(\1358, \1803) -\2203 = NAND(\1353, \1806) -\2206 = NAND(\1353, \1803) -\2209 = NOT(\1815) -\2210 = NOT(\1818) -\2211 = AND(\1815, \1818) -\2212 = BUFF(\1821) -\2221 = BUFF(\1821) -\2230 = NOT(\1833) -\2231 = NOT(\1833) -\2232 = NOT(\1833) -\2233 = NOT(\1833) -\2234 = NOT(\1824) -\2235 = NOT(\1824) -\2236 = NOT(\1824) -\2237 = NOT(\1824) -\2238 = OR(\2022, \1643, \2023) -\2239 = OR(\2024, \1644, \2025) -\2240 = OR(\2026, \1645, \2027) -\2241 = OR(\2028, \1646, \2029) -\2242 = OR(\2030, \1647, \2031) -\2243 = OR(\2032, \1648, \2033) -\2244 = OR(\2034, \1649, \2035) -\2245 = OR(\2036, \1650, \2037) -\2270 = AND(\1986, \1673) -\2277 = AND(\1987, \1675) -\2282 = AND(\1988, \1676) -\2287 = AND(\1989, \1677) -\2294 = AND(\1990, \1679) -\2299 = AND(\1991, \1680) -\2304 = BUFF(\1917) -\2307 = AND(\1930, \350) -\2310 = NAND(\1930, \350) -\2313 = BUFF(\1715) -\2316 = BUFF(\1718) -\2319 = BUFF(\1715) -\2322 = BUFF(\1718) -\2325 = NAND(\1940, \2133) -\2328 = NAND(\2134, \2135) -\2331 = NAND(\2136, \2137) -\2334 = NAND(\2138, \2139) -\2341 = NAND(\1936, \2141) -\2342 = NAND(\1933, \2142) -\2347 = AND(\724, \2144) -\2348 = AND(\2146, \699, \1726) -\2349 = AND(\753, \2147) -\2350 = AND(\2148, \1273) -\2351 = AND(\736, \2150) -\2352 = AND(\1735, \2153) -\2353 = AND(\763, \2154) -\2354 = AND(\1725, \2156) -\2355 = AND(\749, \2157) -\2374 = NOT(\2178) -\2375 = NOT(\2179) -\2376 = AND(\1520, \2180) -\2379 = AND(\1721, \2181) -\2398 = AND(\665, \2211) -\2417 = AND(\2057, \226, \1873) -\2418 = AND(\2057, \274, \1306) -\2419 = AND(\2052, \2238) -\2420 = AND(\2057, \232, \1878) -\2421 = AND(\2057, \274, \1306) -\2422 = AND(\2052, \2239) -\2425 = AND(\2057, \238, \1883) -\2426 = AND(\2057, \274, \1306) -\2427 = AND(\2052, \2240) -\2430 = AND(\2057, \244, \1888) -\2431 = AND(\2057, \274, \1306) -\2432 = AND(\2052, \2241) -\2435 = AND(\2043, \250, \1893) -\2436 = AND(\2043, \274, \1322) -\2437 = AND(\2038, \2242) -\2438 = AND(\2043, \257, \1898) -\2439 = AND(\2043, \274, \1315) -\2440 = AND(\2038, \2243) -\2443 = AND(\2043, \264, \1903) -\2444 = AND(\2043, \274, \1315) -\2445 = AND(\2038, \2244) -\2448 = AND(\2043, \270, \1908) -\2449 = AND(\2043, \274, \1315) -\2450 = AND(\2038, \2245) -\2467 = NOT(\2313) -\2468 = NOT(\2316) -\2469 = NOT(\2319) -\2470 = NOT(\2322) -\2471 = NAND(\2341, \2342) -\2474 = NOT(\2325) -\2475 = NOT(\2328) -\2476 = NOT(\2331) -\2477 = NOT(\2334) -\2478 = OR(\2348, \1729) -\2481 = NOT(\2175) -\2482 = AND(\2175, \1334) -\2483 = AND(\2349, \2183) -\2486 = AND(\2374, \1346) -\2487 = AND(\2375, \1350) -\2488 = BUFF(\2185) -\2497 = BUFF(\2188) -\2506 = BUFF(\2191) -\2515 = BUFF(\2194) -\2524 = BUFF(\2197) -\2533 = BUFF(\2200) -\2542 = BUFF(\2203) -\2551 = BUFF(\2206) -\2560 = BUFF(\2185) -\2569 = BUFF(\2188) -\2578 = BUFF(\2191) -\2587 = BUFF(\2194) -\2596 = BUFF(\2197) -\2605 = BUFF(\2200) -\2614 = BUFF(\2203) -\2623 = BUFF(\2206) -\2632 = NOT(\2212) -\2633 = AND(\2212, \1833) -\2634 = NOT(\2212) -\2635 = AND(\2212, \1833) -\2636 = NOT(\2212) -\2637 = AND(\2212, \1833) -\2638 = NOT(\2212) -\2639 = AND(\2212, \1833) -\2640 = NOT(\2221) -\2641 = AND(\2221, \1824) -\2642 = NOT(\2221) -\2643 = AND(\2221, \1824) -\2644 = NOT(\2221) -\2645 = AND(\2221, \1824) -\2646 = NOT(\2221) -\2647 = AND(\2221, \1824) -\2648 = OR(\2270, \1870, \2068) -\2652 = NOR(\2270, \1870, \2068) -\2656 = OR(\2417, \2418, \2419) -\2659 = OR(\2420, \2421, \2422) -\2662 = OR(\2277, \1880, \2078) -\2666 = NOR(\2277, \1880, \2078) -\2670 = OR(\2425, \2426, \2427) -\2673 = OR(\2282, \1885, \2083) -\2677 = NOR(\2282, \1885, \2083) -\2681 = OR(\2430, \2431, \2432) -\2684 = OR(\2287, \1890, \2088) -\2688 = NOR(\2287, \1890, \2088) -\2692 = OR(\2435, \2436, \2437) -\2697 = OR(\2438, \2439, \2440) -\2702 = OR(\2294, \1900, \2098) -\2706 = NOR(\2294, \1900, \2098) -\2710 = OR(\2443, \2444, \2445) -\2715 = OR(\2299, \1905, \2103) -\2719 = NOR(\2299, \1905, \2103) -\2723 = OR(\2448, \2449, \2450) -\2728 = NOT(\2304) -\2729 = NOT(\2158) -\2730 = AND(\1562, \2158) -\2731 = NOT(\2158) -\2732 = AND(\1562, \2158) -\2733 = NOT(\2158) -\2734 = AND(\1562, \2158) -\2735 = NOT(\2158) -\2736 = AND(\1562, \2158) -\2737 = NOT(\2158) -\2738 = AND(\1562, \2158) -\2739 = NOT(\2158) -\2740 = AND(\1562, \2158) -\2741 = NOT(\2158) -\2742 = AND(\1562, \2158) -\2743 = NOT(\2158) -\2744 = AND(\1562, \2158) -\2745 = OR(\2376, \1983, \2379) -\2746 = NOR(\2376, \1983, \2379) -\2748 = NAND(\2316, \2467) -\2749 = NAND(\2313, \2468) -\2750 = NAND(\2322, \2469) -\2751 = NAND(\2319, \2470) -\2754 = NAND(\2328, \2474) -\2755 = NAND(\2325, \2475) -\2756 = NAND(\2334, \2476) -\2757 = NAND(\2331, \2477) -\2758 = AND(\1520, \2481) -\2761 = AND(\1722, \2482) -\2764 = AND(\2478, \1770) -\2768 = OR(\2486, \1789, \1790) -\2769 = OR(\2487, \1797, \1798) -\2898 = AND(\665, \2633) -\2899 = AND(\679, \2635) -\2900 = AND(\686, \2637) -\2901 = AND(\702, \2639) -\2962 = NOT(\2746) -\2966 = NAND(\2748, \2749) -\2967 = NAND(\2750, \2751) -\2970 = BUFF(\2471) -\2973 = NAND(\2754, \2755) -\2977 = NAND(\2756, \2757) -\2980 = AND(\2471, \2143) -\2984 = NOT(\2488) -\2985 = NOT(\2497) -\2986 = NOT(\2506) -\2987 = NOT(\2515) -\2988 = NOT(\2524) -\2989 = NOT(\2533) -\2990 = NOT(\2542) -\2991 = NOT(\2551) -\2992 = NOT(\2488) -\2993 = NOT(\2497) -\2994 = NOT(\2506) -\2995 = NOT(\2515) -\2996 = NOT(\2524) -\2997 = NOT(\2533) -\2998 = NOT(\2542) -\2999 = NOT(\2551) -\3000 = NOT(\2488) -\3001 = NOT(\2497) -\3002 = NOT(\2506) -\3003 = NOT(\2515) -\3004 = NOT(\2524) -\3005 = NOT(\2533) -\3006 = NOT(\2542) -\3007 = NOT(\2551) -\3008 = NOT(\2488) -\3009 = NOT(\2497) -\3010 = NOT(\2506) -\3011 = NOT(\2515) -\3012 = NOT(\2524) -\3013 = NOT(\2533) -\3014 = NOT(\2542) -\3015 = NOT(\2551) -\3016 = NOT(\2488) -\3017 = NOT(\2497) -\3018 = NOT(\2506) -\3019 = NOT(\2515) -\3020 = NOT(\2524) -\3021 = NOT(\2533) -\3022 = NOT(\2542) -\3023 = NOT(\2551) -\3024 = NOT(\2488) -\3025 = NOT(\2497) -\3026 = NOT(\2506) -\3027 = NOT(\2515) -\3028 = NOT(\2524) -\3029 = NOT(\2533) -\3030 = NOT(\2542) -\3031 = NOT(\2551) -\3032 = NOT(\2488) -\3033 = NOT(\2497) -\3034 = NOT(\2506) -\3035 = NOT(\2515) -\3036 = NOT(\2524) -\3037 = NOT(\2533) -\3038 = NOT(\2542) -\3039 = NOT(\2551) -\3040 = NOT(\2488) -\3041 = NOT(\2497) -\3042 = NOT(\2506) -\3043 = NOT(\2515) -\3044 = NOT(\2524) -\3045 = NOT(\2533) -\3046 = NOT(\2542) -\3047 = NOT(\2551) -\3048 = NOT(\2560) -\3049 = NOT(\2569) -\3050 = NOT(\2578) -\3051 = NOT(\2587) -\3052 = NOT(\2596) -\3053 = NOT(\2605) -\3054 = NOT(\2614) -\3055 = NOT(\2623) -\3056 = NOT(\2560) -\3057 = NOT(\2569) -\3058 = NOT(\2578) -\3059 = NOT(\2587) -\3060 = NOT(\2596) -\3061 = NOT(\2605) -\3062 = NOT(\2614) -\3063 = NOT(\2623) -\3064 = NOT(\2560) -\3065 = NOT(\2569) -\3066 = NOT(\2578) -\3067 = NOT(\2587) -\3068 = NOT(\2596) -\3069 = NOT(\2605) -\3070 = NOT(\2614) -\3071 = NOT(\2623) -\3072 = NOT(\2560) -\3073 = NOT(\2569) -\3074 = NOT(\2578) -\3075 = NOT(\2587) -\3076 = NOT(\2596) -\3077 = NOT(\2605) -\3078 = NOT(\2614) -\3079 = NOT(\2623) -\3080 = NOT(\2560) -\3081 = NOT(\2569) -\3082 = NOT(\2578) -\3083 = NOT(\2587) -\3084 = NOT(\2596) -\3085 = NOT(\2605) -\3086 = NOT(\2614) -\3087 = NOT(\2623) -\3088 = NOT(\2560) -\3089 = NOT(\2569) -\3090 = NOT(\2578) -\3091 = NOT(\2587) -\3092 = NOT(\2596) -\3093 = NOT(\2605) -\3094 = NOT(\2614) -\3095 = NOT(\2623) -\3096 = NOT(\2560) -\3097 = NOT(\2569) -\3098 = NOT(\2578) -\3099 = NOT(\2587) -\3100 = NOT(\2596) -\3101 = NOT(\2605) -\3102 = NOT(\2614) -\3103 = NOT(\2623) -\3104 = NOT(\2560) -\3105 = NOT(\2569) -\3106 = NOT(\2578) -\3107 = NOT(\2587) -\3108 = NOT(\2596) -\3109 = NOT(\2605) -\3110 = NOT(\2614) -\3111 = NOT(\2623) -\3112 = BUFF(\2656) -\3115 = NOT(\2656) -\3118 = NOT(\2652) -\3119 = AND(\2768, \1674) -\3122 = BUFF(\2659) -\3125 = NOT(\2659) -\3128 = BUFF(\2670) -\3131 = NOT(\2670) -\3134 = NOT(\2666) -\3135 = BUFF(\2681) -\3138 = NOT(\2681) -\3141 = NOT(\2677) -\3142 = BUFF(\2692) -\3145 = NOT(\2692) -\3148 = NOT(\2688) -\3149 = AND(\2769, \1678) -\3152 = BUFF(\2697) -\3155 = NOT(\2697) -\3158 = BUFF(\2710) -\3161 = NOT(\2710) -\3164 = NOT(\2706) -\3165 = BUFF(\2723) -\3168 = NOT(\2723) -\3171 = NOT(\2719) -\3172 = AND(\1909, \2648) -\3175 = AND(\1913, \2662) -\3178 = AND(\1913, \2673) -\3181 = AND(\1913, \2684) -\3184 = AND(\1922, \2702) -\3187 = AND(\1922, \2715) -\3190 = NOT(\2692) -\3191 = NOT(\2697) -\3192 = NOT(\2710) -\3193 = NOT(\2723) -\3194 = AND(\2692, \2697, \2710, \2723, \1459) -\3195 = NAND(\2745, \2962) -\3196 = NOT(\2966) -\3206 = OR(\2980, \2145, \2347) -\3207 = AND(\124, \2984) -\3208 = AND(\159, \2985) -\3209 = AND(\150, \2986) -\3210 = AND(\143, \2987) -\3211 = AND(\137, \2988) -\3212 = AND(\132, \2989) -\3213 = AND(\128, \2990) -\3214 = AND(\125, \2991) -\3215 = AND(\125, \2992) -\3216 = AND(\655, \2993) -\3217 = AND(\159, \2994) -\3218 = AND(\150, \2995) -\3219 = AND(\143, \2996) -\3220 = AND(\137, \2997) -\3221 = AND(\132, \2998) -\3222 = AND(\128, \2999) -\3223 = AND(\128, \3000) -\3224 = AND(\670, \3001) -\3225 = AND(\655, \3002) -\3226 = AND(\159, \3003) -\3227 = AND(\150, \3004) -\3228 = AND(\143, \3005) -\3229 = AND(\137, \3006) -\3230 = AND(\132, \3007) -\3231 = AND(\132, \3008) -\3232 = AND(\690, \3009) -\3233 = AND(\670, \3010) -\3234 = AND(\655, \3011) -\3235 = AND(\159, \3012) -\3236 = AND(\150, \3013) -\3237 = AND(\143, \3014) -\3238 = AND(\137, \3015) -\3239 = AND(\137, \3016) -\3240 = AND(\706, \3017) -\3241 = AND(\690, \3018) -\3242 = AND(\670, \3019) -\3243 = AND(\655, \3020) -\3244 = AND(\159, \3021) -\3245 = AND(\150, \3022) -\3246 = AND(\143, \3023) -\3247 = AND(\143, \3024) -\3248 = AND(\715, \3025) -\3249 = AND(\706, \3026) -\3250 = AND(\690, \3027) -\3251 = AND(\670, \3028) -\3252 = AND(\655, \3029) -\3253 = AND(\159, \3030) -\3254 = AND(\150, \3031) -\3255 = AND(\150, \3032) -\3256 = AND(\727, \3033) -\3257 = AND(\715, \3034) -\3258 = AND(\706, \3035) -\3259 = AND(\690, \3036) -\3260 = AND(\670, \3037) -\3261 = AND(\655, \3038) -\3262 = AND(\159, \3039) -\3263 = AND(\159, \3040) -\3264 = AND(\740, \3041) -\3265 = AND(\727, \3042) -\3266 = AND(\715, \3043) -\3267 = AND(\706, \3044) -\3268 = AND(\690, \3045) -\3269 = AND(\670, \3046) -\3270 = AND(\655, \3047) -\3271 = AND(\283, \3048) -\3272 = AND(\670, \3049) -\3273 = AND(\690, \3050) -\3274 = AND(\706, \3051) -\3275 = AND(\715, \3052) -\3276 = AND(\727, \3053) -\3277 = AND(\740, \3054) -\3278 = AND(\753, \3055) -\3279 = AND(\294, \3056) -\3280 = AND(\690, \3057) -\3281 = AND(\706, \3058) -\3282 = AND(\715, \3059) -\3283 = AND(\727, \3060) -\3284 = AND(\740, \3061) -\3285 = AND(\753, \3062) -\3286 = AND(\283, \3063) -\3287 = AND(\303, \3064) -\3288 = AND(\706, \3065) -\3289 = AND(\715, \3066) -\3290 = AND(\727, \3067) -\3291 = AND(\740, \3068) -\3292 = AND(\753, \3069) -\3293 = AND(\283, \3070) -\3294 = AND(\294, \3071) -\3295 = AND(\311, \3072) -\3296 = AND(\715, \3073) -\3297 = AND(\727, \3074) -\3298 = AND(\740, \3075) -\3299 = AND(\753, \3076) -\3300 = AND(\283, \3077) -\3301 = AND(\294, \3078) -\3302 = AND(\303, \3079) -\3303 = AND(\317, \3080) -\3304 = AND(\727, \3081) -\3305 = AND(\740, \3082) -\3306 = AND(\753, \3083) -\3307 = AND(\283, \3084) -\3308 = AND(\294, \3085) -\3309 = AND(\303, \3086) -\3310 = AND(\311, \3087) -\3311 = AND(\322, \3088) -\3312 = AND(\740, \3089) -\3313 = AND(\753, \3090) -\3314 = AND(\283, \3091) -\3315 = AND(\294, \3092) -\3316 = AND(\303, \3093) -\3317 = AND(\311, \3094) -\3318 = AND(\317, \3095) -\3319 = AND(\326, \3096) -\3320 = AND(\753, \3097) -\3321 = AND(\283, \3098) -\3322 = AND(\294, \3099) -\3323 = AND(\303, \3100) -\3324 = AND(\311, \3101) -\3325 = AND(\317, \3102) -\3326 = AND(\322, \3103) -\3327 = AND(\329, \3104) -\3328 = AND(\283, \3105) -\3329 = AND(\294, \3106) -\3330 = AND(\303, \3107) -\3331 = AND(\311, \3108) -\3332 = AND(\317, \3109) -\3333 = AND(\322, \3110) -\3334 = AND(\326, \3111) -\3383 = AND(\3190, \3191, \3192, \3193, \917) -\3384 = BUFF(\2977) -\3387 = AND(\3196, \1736) -\3388 = AND(\2977, \2149) -\3389 = AND(\2973, \1737) -\3390 = NOR(\3207, \3208, \3209, \3210, \3211, \3212, \3213, \3214) -\3391 = NOR(\3215, \3216, \3217, \3218, \3219, \3220, \3221, \3222) -\3392 = NOR(\3223, \3224, \3225, \3226, \3227, \3228, \3229, \3230) -\3393 = NOR(\3231, \3232, \3233, \3234, \3235, \3236, \3237, \3238) -\3394 = NOR(\3239, \3240, \3241, \3242, \3243, \3244, \3245, \3246) -\3395 = NOR(\3247, \3248, \3249, \3250, \3251, \3252, \3253, \3254) -\3396 = NOR(\3255, \3256, \3257, \3258, \3259, \3260, \3261, \3262) -\3397 = NOR(\3263, \3264, \3265, \3266, \3267, \3268, \3269, \3270) -\3398 = NOR(\3271, \3272, \3273, \3274, \3275, \3276, \3277, \3278) -\3399 = NOR(\3279, \3280, \3281, \3282, \3283, \3284, \3285, \3286) -\3400 = NOR(\3287, \3288, \3289, \3290, \3291, \3292, \3293, \3294) -\3401 = NOR(\3295, \3296, \3297, \3298, \3299, \3300, \3301, \3302) -\3402 = NOR(\3303, \3304, \3305, \3306, \3307, \3308, \3309, \3310) -\3403 = NOR(\3311, \3312, \3313, \3314, \3315, \3316, \3317, \3318) -\3404 = NOR(\3319, \3320, \3321, \3322, \3323, \3324, \3325, \3326) -\3405 = NOR(\3327, \3328, \3329, \3330, \3331, \3332, \3333, \3334) -\3406 = AND(\3206, \2641) -\3407 = AND(\169, \2648, \3112) -\3410 = AND(\179, \2648, \3115) -\3413 = AND(\190, \2652, \3115) -\3414 = AND(\200, \2652, \3112) -\3415 = OR(\3119, \1875, \2073) -\3419 = NOR(\3119, \1875, \2073) -\3423 = AND(\169, \2662, \3128) -\3426 = AND(\179, \2662, \3131) -\3429 = AND(\190, \2666, \3131) -\3430 = AND(\200, \2666, \3128) -\3431 = AND(\169, \2673, \3135) -\3434 = AND(\179, \2673, \3138) -\3437 = AND(\190, \2677, \3138) -\3438 = AND(\200, \2677, \3135) -\3439 = AND(\169, \2684, \3142) -\3442 = AND(\179, \2684, \3145) -\3445 = AND(\190, \2688, \3145) -\3446 = AND(\200, \2688, \3142) -\3447 = OR(\3149, \1895, \2093) -\3451 = NOR(\3149, \1895, \2093) -\3455 = AND(\169, \2702, \3158) -\3458 = AND(\179, \2702, \3161) -\3461 = AND(\190, \2706, \3161) -\3462 = AND(\200, \2706, \3158) -\3463 = AND(\169, \2715, \3165) -\3466 = AND(\179, \2715, \3168) -\3469 = AND(\190, \2719, \3168) -\3470 = AND(\200, \2719, \3165) -\3471 = OR(\3194, \3383) -\3472 = BUFF(\2967) -\3475 = BUFF(\2970) -\3478 = BUFF(\2967) -\3481 = BUFF(\2970) -\3484 = BUFF(\2973) -\3487 = BUFF(\2973) -\3490 = BUFF(\3172) -\3493 = BUFF(\3172) -\3496 = BUFF(\3175) -\3499 = BUFF(\3175) -\3502 = BUFF(\3178) -\3505 = BUFF(\3178) -\3508 = BUFF(\3181) -\3511 = BUFF(\3181) -\3514 = BUFF(\3184) -\3517 = BUFF(\3184) -\3520 = BUFF(\3187) -\3523 = BUFF(\3187) -\3534 = NOR(\3387, \2350) -\3535 = OR(\3388, \2151, \2351) -\3536 = NOR(\3389, \1966) -\3537 = AND(\3390, \2209) -\3538 = AND(\3398, \2210) -\3539 = AND(\3391, \1842) -\3540 = AND(\3399, \1369) -\3541 = AND(\3392, \1843) -\3542 = AND(\3400, \1369) -\3543 = AND(\3393, \1844) -\3544 = AND(\3401, \1369) -\3545 = AND(\3394, \1845) -\3546 = AND(\3402, \1369) -\3547 = AND(\3395, \1846) -\3548 = AND(\3403, \1369) -\3549 = AND(\3396, \1847) -\3550 = AND(\3404, \1369) -\3551 = AND(\3397, \1848) -\3552 = AND(\3405, \1369) -\3557 = OR(\3413, \3414, \3118) -\3568 = OR(\3429, \3430, \3134) -\3573 = OR(\3437, \3438, \3141) -\3578 = OR(\3445, \3446, \3148) -\3589 = OR(\3461, \3462, \3164) -\3594 = OR(\3469, \3470, \3171) -\3605 = AND(\3471, \2728) -\3626 = NOT(\3478) -\3627 = NOT(\3481) -\3628 = NOT(\3487) -\3629 = NOT(\3484) -\3630 = NOT(\3472) -\3631 = NOT(\3475) -\3632 = AND(\3536, \2152) -\3633 = AND(\3534, \2155) -\3634 = OR(\3537, \3538, \2398) -\3635 = OR(\3539, \3540) -\3636 = OR(\3541, \3542) -\3637 = OR(\3543, \3544) -\3638 = OR(\3545, \3546) -\3639 = OR(\3547, \3548) -\3640 = OR(\3549, \3550) -\3641 = OR(\3551, \3552) -\3642 = AND(\3535, \2643) -\3643 = OR(\3407, \3410) -\3644 = NOR(\3407, \3410) -\3645 = AND(\169, \3415, \3122) -\3648 = AND(\179, \3415, \3125) -\3651 = AND(\190, \3419, \3125) -\3652 = AND(\200, \3419, \3122) -\3653 = NOT(\3419) -\3654 = OR(\3423, \3426) -\3657 = NOR(\3423, \3426) -\3658 = OR(\3431, \3434) -\3661 = NOR(\3431, \3434) -\3662 = OR(\3439, \3442) -\3663 = NOR(\3439, \3442) -\3664 = AND(\169, \3447, \3152) -\3667 = AND(\179, \3447, \3155) -\3670 = AND(\190, \3451, \3155) -\3671 = AND(\200, \3451, \3152) -\3672 = NOT(\3451) -\3673 = OR(\3455, \3458) -\3676 = NOR(\3455, \3458) -\3677 = OR(\3463, \3466) -\3680 = NOR(\3463, \3466) -\3681 = NOT(\3493) -\3682 = AND(\1909, \3415) -\3685 = NOT(\3496) -\3686 = NOT(\3499) -\3687 = NOT(\3502) -\3688 = NOT(\3505) -\3689 = NOT(\3511) -\3690 = AND(\1922, \3447) -\3693 = NOT(\3517) -\3694 = NOT(\3520) -\3695 = NOT(\3523) -\3696 = NOT(\3514) -\3697 = BUFF(\3384) -\3700 = BUFF(\3384) -\3703 = NOT(\3490) -\3704 = NOT(\3508) -\3705 = NAND(\3475, \3630) -\3706 = NAND(\3472, \3631) -\3707 = NAND(\3481, \3626) -\3708 = NAND(\3478, \3627) -\3711 = OR(\3632, \2352, \2353) -\3712 = OR(\3633, \2354, \2355) -\3713 = AND(\3634, \2632) -\3714 = AND(\3635, \2634) -\3715 = AND(\3636, \2636) -\3716 = AND(\3637, \2638) -\3717 = AND(\3638, \2640) -\3718 = AND(\3639, \2642) -\3719 = AND(\3640, \2644) -\3720 = AND(\3641, \2646) -\3721 = AND(\3644, \3557) -\3731 = OR(\3651, \3652, \3653) -\3734 = AND(\3657, \3568) -\3740 = AND(\3661, \3573) -\3743 = AND(\3663, \3578) -\3753 = OR(\3670, \3671, \3672) -\3756 = AND(\3676, \3589) -\3762 = AND(\3680, \3594) -\3765 = NOT(\3643) -\3766 = NOT(\3662) -\3773 = NAND(\3705, \3706) -\3774 = NAND(\3707, \3708) -\3775 = NAND(\3700, \3628) -\3776 = NOT(\3700) -\3777 = NAND(\3697, \3629) -\3778 = NOT(\3697) -\3779 = AND(\3712, \2645) -\3780 = AND(\3711, \2647) -\3786 = OR(\3645, \3648) -\3789 = NOR(\3645, \3648) -\3800 = OR(\3664, \3667) -\3803 = NOR(\3664, \3667) -\3809 = AND(\3654, \1917) -\3812 = AND(\3658, \1917) -\3815 = AND(\3673, \1926) -\3818 = AND(\3677, \1926) -\3821 = BUFF(\3682) -\3824 = BUFF(\3682) -\3827 = BUFF(\3690) -\3830 = BUFF(\3690) -\3833 = NAND(\3773, \3774) -\3834 = NAND(\3487, \3776) -\3835 = NAND(\3484, \3778) -\3838 = AND(\3789, \3731) -\3845 = AND(\3803, \3753) -\3850 = BUFF(\3721) -\3855 = BUFF(\3734) -\3858 = BUFF(\3740) -\3861 = BUFF(\3743) -\3865 = BUFF(\3756) -\3868 = BUFF(\3762) -\3884 = NAND(\3775, \3834) -\3885 = NAND(\3777, \3835) -\3894 = NAND(\3721, \3786) -\3895 = NAND(\3743, \3800) -\3898 = NOT(\3821) -\3899 = NOT(\3824) -\3906 = NOT(\3830) -\3911 = NOT(\3827) -\3912 = AND(\3786, \1912) -\3913 = BUFF(\3812) -\3916 = AND(\3800, \1917) -\3917 = BUFF(\3818) -\3920 = NOT(\3809) -\3921 = BUFF(\3818) -\3924 = NOT(\3884) -\3925 = NOT(\3885) -\3926 = AND(\3721, \3838, \3734, \3740) -\3930 = NAND(\3721, \3838, \3654) -\3931 = NAND(\3658, \3838, \3734, \3721) -\3932 = AND(\3743, \3845, \3756, \3762) -\3935 = NAND(\3743, \3845, \3673) -\3936 = NAND(\3677, \3845, \3756, \3743) -\3937 = BUFF(\3838) -\3940 = BUFF(\3845) -\3947 = NOT(\3912) -\3948 = NOT(\3916) -\3950 = BUFF(\3850) -\3953 = BUFF(\3850) -\3956 = BUFF(\3855) -\3959 = BUFF(\3855) -\3962 = BUFF(\3858) -\3965 = BUFF(\3858) -\3968 = BUFF(\3861) -\3971 = BUFF(\3861) -\3974 = BUFF(\3865) -\3977 = BUFF(\3865) -\3980 = BUFF(\3868) -\3983 = BUFF(\3868) -\3987 = NAND(\3924, \3925) -\3992 = NAND(\3765, \3894, \3930, \3931) -\3996 = NAND(\3766, \3895, \3935, \3936) -\4013 = NOT(\3921) -\4028 = AND(\3932, \3926) -\4029 = NAND(\3953, \3681) -\4030 = NAND(\3959, \3686) -\4031 = NAND(\3965, \3688) -\4032 = NAND(\3971, \3689) -\4033 = NAND(\3977, \3693) -\4034 = NAND(\3983, \3695) -\4035 = BUFF(\3926) -\4042 = NOT(\3953) -\4043 = NOT(\3956) -\4044 = NAND(\3956, \3685) -\4045 = NOT(\3959) -\4046 = NOT(\3962) -\4047 = NAND(\3962, \3687) -\4048 = NOT(\3965) -\4049 = NOT(\3971) -\4050 = NOT(\3977) -\4051 = NOT(\3980) -\4052 = NAND(\3980, \3694) -\4053 = NOT(\3983) -\4054 = NOT(\3974) -\4055 = NAND(\3974, \3696) -\4056 = AND(\3932, \2304) -\4057 = NOT(\3950) -\4058 = NAND(\3950, \3703) -\4059 = BUFF(\3937) -\4062 = BUFF(\3937) -\4065 = NOT(\3968) -\4066 = NAND(\3968, \3704) -\4067 = BUFF(\3940) -\4070 = BUFF(\3940) -\4073 = NAND(\3926, \3996) -\4074 = NOT(\3992) -\4075 = NAND(\3493, \4042) -\4076 = NAND(\3499, \4045) -\4077 = NAND(\3505, \4048) -\4078 = NAND(\3511, \4049) -\4079 = NAND(\3517, \4050) -\4080 = NAND(\3523, \4053) -\4085 = NAND(\3496, \4043) -\4086 = NAND(\3502, \4046) -\4088 = NAND(\3520, \4051) -\4090 = NAND(\3514, \4054) -\4091 = AND(\3996, \1926) -\4094 = OR(\3605, \4056) -\4098 = NAND(\3490, \4057) -\4101 = NAND(\3508, \4065) -\4104 = AND(\4073, \4074) -\4105 = NAND(\4075, \4029) -\4106 = NAND(\4062, \3899) -\4107 = NAND(\4076, \4030) -\4108 = NAND(\4077, \4031) -\4109 = NAND(\4078, \4032) -\4110 = NAND(\4070, \3906) -\4111 = NAND(\4079, \4033) -\4112 = NAND(\4080, \4034) -\4113 = NOT(\4059) -\4114 = NAND(\4059, \3898) -\4115 = NOT(\4062) -\4116 = NAND(\4085, \4044) -\4119 = NAND(\4086, \4047) -\4122 = NOT(\4070) -\4123 = NAND(\4088, \4052) -\4126 = NOT(\4067) -\4127 = NAND(\4067, \3911) -\4128 = NAND(\4090, \4055) -\4139 = NAND(\4098, \4058) -\4142 = NAND(\4101, \4066) -\4145 = NOT(\4104) -\4146 = NOT(\4105) -\4147 = NAND(\3824, \4115) -\4148 = NOT(\4107) -\4149 = NOT(\4108) -\4150 = NOT(\4109) -\4151 = NAND(\3830, \4122) -\4152 = NOT(\4111) -\4153 = NOT(\4112) -\4154 = NAND(\3821, \4113) -\4161 = NAND(\3827, \4126) -\4167 = BUFF(\4091) -\4174 = BUFF(\4094) -\4182 = BUFF(\4091) -\4186 = AND(\330, \4094) -\4189 = AND(\4146, \2230) -\4190 = NAND(\4147, \4106) -\4191 = AND(\4148, \2232) -\4192 = AND(\4149, \2233) -\4193 = AND(\4150, \2234) -\4194 = NAND(\4151, \4110) -\4195 = AND(\4152, \2236) -\4196 = AND(\4153, \2237) -\4197 = NAND(\4154, \4114) -\4200 = BUFF(\4116) -\4203 = BUFF(\4116) -\4209 = BUFF(\4119) -\4213 = BUFF(\4119) -\4218 = NAND(\4161, \4127) -\4223 = BUFF(\4123) -\4238 = AND(\4128, \3917) -\4239 = NOT(\4139) -\4241 = NOT(\4142) -\4242 = AND(\330, \4123) -\4247 = BUFF(\4128) -\4251 = NOR(\3713, \4189, \2898) -\4252 = NOT(\4190) -\4253 = NOR(\3715, \4191, \2900) -\4254 = NOR(\3716, \4192, \2901) -\4255 = NOR(\3717, \4193, \3406) -\4256 = NOT(\4194) -\4257 = NOR(\3719, \4195, \3779) -\4258 = NOR(\3720, \4196, \3780) -\4283 = AND(\4167, \4035) -\4284 = AND(\4174, \4035) -\4287 = OR(\3815, \4238) -\4291 = NOT(\4186) -\4295 = NOT(\4167) -\4296 = BUFF(\4167) -\4299 = NOT(\4182) -\4303 = AND(\4252, \2231) -\4304 = AND(\4256, \2235) -\4305 = BUFF(\4197) -\4310 = OR(\3992, \4283) -\4316 = AND(\4174, \4213, \4203) -\4317 = AND(\4174, \4209) -\4318 = AND(\4223, \4128, \4218) -\4319 = AND(\4223, \4128) -\4322 = AND(\4167, \4209) -\4325 = NAND(\4203, \3913) -\4326 = NAND(\4203, \4213, \4167) -\4327 = NAND(\4218, \3815) -\4328 = NAND(\4218, \4128, \3917) -\4329 = NAND(\4247, \4013) -\4330 = NOT(\4247) -\4331 = AND(\330, \4094, \4295) -\4335 = AND(\4251, \2730) -\4338 = AND(\4253, \2734) -\4341 = AND(\4254, \2736) -\4344 = AND(\4255, \2738) -\4347 = AND(\4257, \2742) -\4350 = AND(\4258, \2744) -\4353 = BUFF(\4197) -\4356 = BUFF(\4203) -\4359 = BUFF(\4209) -\4362 = BUFF(\4218) -\4365 = BUFF(\4242) -\4368 = BUFF(\4242) -\4371 = AND(\4223, \4223) -\4376 = NOR(\3714, \4303, \2899) -\4377 = NOR(\3718, \4304, \3642) -\4387 = AND(\330, \4317) -\4390 = AND(\330, \4318) -\4393 = NAND(\3921, \4330) -\4398 = BUFF(\4287) -\4413 = BUFF(\4284) -\4416 = NAND(\3920, \4325, \4326) -\4421 = OR(\3812, \4322) -\4427 = NAND(\3948, \4327, \4328) -\4430 = BUFF(\4287) -\4435 = AND(\330, \4316) -\4442 = OR(\4331, \4296) -\4443 = AND(\4174, \4305, \4203, \4213) -\4446 = NAND(\4305, \3809) -\4447 = NAND(\4305, \4200, \3913) -\4448 = NAND(\4305, \4200, \4213, \4167) -\4452 = NOT(\4356) -\4458 = NAND(\4329, \4393) -\4461 = NOT(\4365) -\4462 = NOT(\4368) -\4463 = NAND(\4371, \1460) -\4464 = NOT(\4371) -\4465 = BUFF(\4310) -\4468 = NOR(\4331, \4296) -\4472 = AND(\4376, \2732) -\4475 = AND(\4377, \2740) -\4479 = BUFF(\4310) -\4484 = NOT(\4353) -\4486 = NOT(\4359) -\4487 = NAND(\4359, \4299) -\4491 = NOT(\4362) -\4493 = AND(\330, \4319) -\4496 = NOT(\4398) -\4497 = AND(\4287, \4398) -\4498 = AND(\4442, \1769) -\4503 = NAND(\3947, \4446, \4447, \4448) -\4506 = NOT(\4413) -\4507 = NOT(\4435) -\4508 = NOT(\4421) -\4509 = NAND(\4421, \4452) -\4510 = NOT(\4427) -\4511 = NAND(\4427, \4241) -\4515 = NAND(\965, \4464) -\4526 = NOT(\4416) -\4527 = NAND(\4416, \4484) -\4528 = NAND(\4182, \4486) -\4529 = NOT(\4430) -\4530 = NAND(\4430, \4491) -\4531 = BUFF(\4387) -\4534 = BUFF(\4387) -\4537 = BUFF(\4390) -\4540 = BUFF(\4390) -\4545 = AND(\330, \4319, \4496) -\4549 = AND(\330, \4443) -\4552 = NAND(\4356, \4508) -\4555 = NAND(\4142, \4510) -\4558 = NOT(\4493) -\4559 = NAND(\4463, \4515) -\4562 = NOT(\4465) -\4563 = AND(\4310, \4465) -\4564 = BUFF(\4468) -\4568 = NOT(\4479) -\4569 = BUFF(\4443) -\4572 = NAND(\4353, \4526) -\4573 = NAND(\4362, \4529) -\4576 = NAND(\4487, \4528) -\4581 = BUFF(\4458) -\4584 = BUFF(\4458) -\4587 = OR(\2758, \4498, \2761) -\4588 = NOR(\2758, \4498, \2761) -\4589 = OR(\4545, \4497) -\4593 = NAND(\4552, \4509) -\4596 = NOT(\4531) -\4597 = NOT(\4534) -\4599 = NAND(\4555, \4511) -\4602 = NOT(\4537) -\4603 = NOT(\4540) -\4608 = AND(\330, \4284, \4562) -\4613 = BUFF(\4503) -\4616 = BUFF(\4503) -\4619 = NAND(\4572, \4527) -\4623 = NAND(\4573, \4530) -\4628 = NOT(\4588) -\4629 = NAND(\4569, \4506) -\4630 = NOT(\4569) -\4635 = NOT(\4576) -\4636 = NAND(\4576, \4291) -\4640 = NOT(\4581) -\4641 = NAND(\4581, \4461) -\4642 = NOT(\4584) -\4643 = NAND(\4584, \4462) -\4644 = NOR(\4608, \4563) -\4647 = AND(\4559, \2128) -\4650 = AND(\4559, \2743) -\4656 = BUFF(\4549) -\4659 = BUFF(\4549) -\4664 = BUFF(\4564) -\4667 = AND(\4587, \4628) -\4668 = NAND(\4413, \4630) -\4669 = NOT(\4616) -\4670 = NAND(\4616, \4239) -\4673 = NOT(\4619) -\4674 = NAND(\4619, \4507) -\4675 = NAND(\4186, \4635) -\4676 = NOT(\4623) -\4677 = NAND(\4623, \4558) -\4678 = NAND(\4365, \4640) -\4679 = NAND(\4368, \4642) -\4687 = NOT(\4613) -\4688 = NAND(\4613, \4568) -\4691 = BUFF(\4593) -\4694 = BUFF(\4593) -\4697 = BUFF(\4599) -\4700 = BUFF(\4599) -\4704 = NAND(\4629, \4668) -\4705 = NAND(\4139, \4669) -\4706 = NOT(\4656) -\4707 = NOT(\4659) -\4708 = NAND(\4435, \4673) -\4711 = NAND(\4675, \4636) -\4716 = NAND(\4493, \4676) -\4717 = NAND(\4678, \4641) -\4721 = NAND(\4679, \4643) -\4722 = BUFF(\4644) -\4726 = NOT(\4664) -\4727 = OR(\4647, \4650, \4350) -\4730 = NOR(\4647, \4650, \4350) -\4733 = NAND(\4479, \4687) -\4740 = NAND(\4705, \4670) -\4743 = NAND(\4708, \4674) -\4747 = NOT(\4691) -\4748 = NAND(\4691, \4596) -\4749 = NOT(\4694) -\4750 = NAND(\4694, \4597) -\4753 = NOT(\4697) -\4754 = NAND(\4697, \4602) -\4755 = NOT(\4700) -\4756 = NAND(\4700, \4603) -\4757 = NAND(\4716, \4677) -\4769 = NAND(\4733, \4688) -\4772 = AND(\330, \4704) -\4775 = NOT(\4721) -\4778 = NOT(\4730) -\4786 = NAND(\4531, \4747) -\4787 = NAND(\4534, \4749) -\4788 = NAND(\4537, \4753) -\4789 = NAND(\4540, \4755) -\4794 = AND(\4711, \2124) -\4797 = AND(\4711, \2735) -\4800 = AND(\4717, \2127) -\4805 = BUFF(\4722) -\4808 = AND(\4717, \4468) -\4812 = BUFF(\4727) -\4815 = AND(\4727, \4778) -\4816 = NOT(\4769) -\4817 = NOT(\4772) -\4818 = NAND(\4786, \4748) -\4822 = NAND(\4787, \4750) -\4823 = NAND(\4788, \4754) -\4826 = NAND(\4789, \4756) -\4829 = NAND(\4775, \4726) -\4830 = NOT(\4775) -\4831 = AND(\4743, \2122) -\4838 = AND(\4757, \2126) -\4844 = BUFF(\4740) -\4847 = BUFF(\4740) -\4850 = BUFF(\4743) -\4854 = BUFF(\4757) -\4859 = NAND(\4772, \4816) -\4860 = NAND(\4769, \4817) -\4868 = NOT(\4826) -\4870 = NOT(\4805) -\4872 = NOT(\4808) -\4873 = NAND(\4664, \4830) -\4876 = OR(\4794, \4797, \4341) -\4880 = NOR(\4794, \4797, \4341) -\4885 = NOT(\4812) -\4889 = NOT(\4822) -\4895 = NAND(\4859, \4860) -\4896 = NOT(\4844) -\4897 = NAND(\4844, \4706) -\4898 = NOT(\4847) -\4899 = NAND(\4847, \4707) -\4900 = NOR(\4868, \4564) -\4901 = AND(\4717, \4757, \4823, \4564) -\4902 = NOT(\4850) -\4904 = NOT(\4854) -\4905 = NAND(\4854, \4872) -\4906 = NAND(\4873, \4829) -\4907 = AND(\4818, \2123) -\4913 = AND(\4823, \2125) -\4916 = AND(\4818, \4644) -\4920 = NOT(\4880) -\4921 = AND(\4895, \2184) -\4924 = NAND(\4656, \4896) -\4925 = NAND(\4659, \4898) -\4926 = OR(\4900, \4901) -\4928 = NAND(\4889, \4870) -\4929 = NOT(\4889) -\4930 = NAND(\4808, \4904) -\4931 = NOT(\4906) -\4937 = BUFF(\4876) -\4940 = BUFF(\4876) -\4944 = AND(\4876, \4920) -\4946 = NAND(\4924, \4897) -\4949 = NAND(\4925, \4899) -\4950 = NAND(\4916, \4902) -\4951 = NOT(\4916) -\4952 = NAND(\4805, \4929) -\4953 = NAND(\4930, \4905) -\4954 = AND(\4926, \2737) -\4957 = AND(\4931, \2741) -\4964 = OR(\2764, \2483, \4921) -\4965 = NOR(\2764, \2483, \4921) -\4968 = NOT(\4949) -\4969 = NAND(\4850, \4951) -\4970 = NAND(\4952, \4928) -\4973 = AND(\4953, \2739) -\4978 = NOT(\4937) -\4979 = NOT(\4940) -\4980 = NOT(\4965) -\4981 = NOR(\4968, \4722) -\4982 = AND(\4818, \4743, \4946, \4722) -\4983 = NAND(\4950, \4969) -\4984 = NOT(\4970) -\4985 = AND(\4946, \2121) -\4988 = OR(\4913, \4954, \4344) -\4991 = NOR(\4913, \4954, \4344) -\4996 = OR(\4800, \4957, \4347) -\4999 = NOR(\4800, \4957, \4347) -\5002 = AND(\4964, \4980) -\5007 = OR(\4981, \4982) -\5010 = AND(\4983, \2731) -\5013 = AND(\4984, \2733) -\5018 = OR(\4838, \4973, \4475) -\5021 = NOR(\4838, \4973, \4475) -\5026 = NOT(\4991) -\5029 = NOT(\4999) -\5030 = AND(\5007, \2729) -\5039 = BUFF(\4996) -\5042 = BUFF(\4988) -\5045 = AND(\4988, \5026) -\5046 = NOT(\5021) -\5047 = AND(\4996, \5029) -\5050 = OR(\4831, \5010, \4472) -\5055 = NOR(\4831, \5010, \4472) -\5058 = OR(\4907, \5013, \4338) -\5061 = NOR(\4907, \5013, \4338) -\5066 = AND(\4730, \4999, \5021, \4991) -\5070 = BUFF(\5018) -\5078 = AND(\5018, \5046) -\5080 = OR(\4985, \5030, \4335) -\5085 = NOR(\4985, \5030, \4335) -\5094 = NAND(\5039, \4885) -\5095 = NOT(\5039) -\5097 = NOT(\5042) -\5102 = AND(\5050, \5050) -\5103 = NOT(\5061) -\5108 = NAND(\4812, \5095) -\5109 = NOT(\5070) -\5110 = NAND(\5070, \5097) -\5111 = BUFF(\5058) -\5114 = AND(\5050, \1461) -\5117 = BUFF(\5050) -\5120 = AND(\5080, \5080) -\5121 = AND(\5058, \5103) -\5122 = NAND(\5094, \5108) -\5125 = NAND(\5042, \5109) -\5128 = AND(\1461, \5080) -\5133 = AND(\4880, \5061, \5055, \5085) -\5136 = AND(\5055, \5085, \1464) -\5139 = BUFF(\5080) -\5145 = NAND(\5125, \5110) -\5151 = BUFF(\5111) -\5154 = BUFF(\5111) -\5159 = NOT(\5117) -\5160 = BUFF(\5114) -\5163 = BUFF(\5114) -\5166 = AND(\5066, \5133) -\5173 = AND(\5066, \5133) -\5174 = BUFF(\5122) -\5177 = BUFF(\5122) -\5182 = NOT(\5139) -\5183 = NAND(\5139, \5159) -\5184 = BUFF(\5128) -\5188 = BUFF(\5128) -\5192 = NOT(\5166) -\5193 = NOR(\5136, \5173) -\5196 = NAND(\5151, \4978) -\5197 = NOT(\5151) -\5198 = NAND(\5154, \4979) -\5199 = NOT(\5154) -\5201 = NOT(\5160) -\5203 = NOT(\5163) -\5205 = BUFF(\5145) -\5209 = BUFF(\5145) -\5212 = NAND(\5117, \5182) -\5215 = AND(\213, \5193) -\5217 = NOT(\5174) -\5219 = NOT(\5177) -\5220 = NAND(\4937, \5197) -\5221 = NAND(\4940, \5199) -\5222 = NOT(\5184) -\5223 = NAND(\5184, \5201) -\5224 = NAND(\5188, \5203) -\5225 = NOT(\5188) -\5228 = NAND(\5183, \5212) -\5231 = NOT(\5215) -\5232 = NAND(\5205, \5217) -\5233 = NOT(\5205) -\5234 = NAND(\5209, \5219) -\5235 = NOT(\5209) -\5236 = NAND(\5196, \5220) -\5240 = NAND(\5198, \5221) -\5242 = NAND(\5160, \5222) -\5243 = NAND(\5163, \5225) -\5245 = NAND(\5174, \5233) -\5246 = NAND(\5177, \5235) -\5250 = NOT(\5240) -\5253 = NOT(\5228) -\5254 = NAND(\5242, \5223) -\5257 = NAND(\5243, \5224) -\5258 = NAND(\5232, \5245) -\5261 = NAND(\5234, \5246) -\5266 = NOT(\5257) -\5269 = BUFF(\5236) -\5277 = AND(\5236, \5254, \2307) -\5278 = AND(\5250, \5254, \2310) -\5279 = NOT(\5261) -\5283 = NOT(\5269) -\5284 = NAND(\5269, \5253) -\5285 = AND(\5236, \5266, \2310) -\5286 = AND(\5250, \5266, \2307) -\5289 = BUFF(\5258) -\5292 = BUFF(\5258) -\5295 = NAND(\5228, \5283) -\5298 = OR(\5277, \5285, \5278, \5286) -\5303 = BUFF(\5279) -\5306 = BUFF(\5279) -\5309 = NAND(\5295, \5284) -\5312 = NOT(\5292) -\5313 = NOT(\5289) -\5322 = NOT(\5306) -\5323 = NOT(\5303) -\5324 = BUFF(\5298) -\5327 = BUFF(\5298) -\5332 = BUFF(\5309) -\5335 = BUFF(\5309) -\5340 = NAND(\5324, \5323) -\5341 = NAND(\5327, \5322) -\5344 = NOT(\5327) -\5345 = NOT(\5324) -\5348 = NAND(\5332, \5313) -\5349 = NAND(\5335, \5312) -\5350 = NAND(\5303, \5345) -\5351 = NAND(\5306, \5344) -\5352 = NOT(\5335) -\5353 = NOT(\5332) -\5354 = NAND(\5289, \5353) -\5355 = NAND(\5292, \5352) -\5356 = NAND(\5350, \5340) -\5357 = NAND(\5351, \5341) -\5358 = NAND(\5348, \5354) -\5359 = NAND(\5349, \5355) -\5360 = AND(\5356, \5357) -\5361 = NAND(\5358, \5359) diff --git a/ISCAS85/new/c432.bench b/ISCAS85/new/c432.bench deleted file mode 100644 index 1bb0323..0000000 --- a/ISCAS85/new/c432.bench +++ /dev/null @@ -1,207 +0,0 @@ -# c\432 - -INPUT(\1) -INPUT(\4) -INPUT(\8) -INPUT(\11) -INPUT(\14) -INPUT(\17) -INPUT(\21) -INPUT(\24) -INPUT(\27) -INPUT(\30) -INPUT(\34) -INPUT(\37) -INPUT(\40) -INPUT(\43) -INPUT(\47) -INPUT(\50) -INPUT(\53) -INPUT(\56) -INPUT(\60) -INPUT(\63) -INPUT(\66) -INPUT(\69) -INPUT(\73) -INPUT(\76) -INPUT(\79) -INPUT(\82) -INPUT(\86) -INPUT(\89) -INPUT(\92) -INPUT(\95) -INPUT(\99) -INPUT(\102) -INPUT(\105) -INPUT(\108) -INPUT(\112) -INPUT(\115) - -OUTPUT(\223) -OUTPUT(\329) -OUTPUT(\370) -OUTPUT(\421) -OUTPUT(\430) -OUTPUT(\431) -OUTPUT(\432) - -\118 = NOT(\1) -\119 = NOT(\4) -\122 = NOT(\11) -\123 = NOT(\17) -\126 = NOT(\24) -\127 = NOT(\30) -\130 = NOT(\37) -\131 = NOT(\43) -\134 = NOT(\50) -\135 = NOT(\56) -\138 = NOT(\63) -\139 = NOT(\69) -\142 = NOT(\76) -\143 = NOT(\82) -\146 = NOT(\89) -\147 = NOT(\95) -\150 = NOT(\102) -\151 = NOT(\108) -\154 = NAND(\118, \4) -\157 = NOR(\8, \119) -\158 = NOR(\14, \119) -\159 = NAND(\122, \17) -\162 = NAND(\126, \30) -\165 = NAND(\130, \43) -\168 = NAND(\134, \56) -\171 = NAND(\138, \69) -\174 = NAND(\142, \82) -\177 = NAND(\146, \95) -\180 = NAND(\150, \108) -\183 = NOR(\21, \123) -\184 = NOR(\27, \123) -\185 = NOR(\34, \127) -\186 = NOR(\40, \127) -\187 = NOR(\47, \131) -\188 = NOR(\53, \131) -\189 = NOR(\60, \135) -\190 = NOR(\66, \135) -\191 = NOR(\73, \139) -\192 = NOR(\79, \139) -\193 = NOR(\86, \143) -\194 = NOR(\92, \143) -\195 = NOR(\99, \147) -\196 = NOR(\105, \147) -\197 = NOR(\112, \151) -\198 = NOR(\115, \151) -\199 = AND(\154, \159, \162, \165, \168, \171, \174, \177, \180) -\203 = NOT(\199) -\213 = NOT(\199) -\223 = NOT(\199) -\224 = XOR(\203, \154) -\227 = XOR(\203, \159) -\230 = XOR(\203, \162) -\233 = XOR(\203, \165) -\236 = XOR(\203, \168) -\239 = XOR(\203, \171) -\242 = NAND(\1, \213) -\243 = XOR(\203, \174) -\246 = NAND(\213, \11) -\247 = XOR(\203, \177) -\250 = NAND(\213, \24) -\251 = XOR(\203, \180) -\254 = NAND(\213, \37) -\255 = NAND(\213, \50) -\256 = NAND(\213, \63) -\257 = NAND(\213, \76) -\258 = NAND(\213, \89) -\259 = NAND(\213, \102) -\260 = NAND(\224, \157) -\263 = NAND(\224, \158) -\264 = NAND(\227, \183) -\267 = NAND(\230, \185) -\270 = NAND(\233, \187) -\273 = NAND(\236, \189) -\276 = NAND(\239, \191) -\279 = NAND(\243, \193) -\282 = NAND(\247, \195) -\285 = NAND(\251, \197) -\288 = NAND(\227, \184) -\289 = NAND(\230, \186) -\290 = NAND(\233, \188) -\291 = NAND(\236, \190) -\292 = NAND(\239, \192) -\293 = NAND(\243, \194) -\294 = NAND(\247, \196) -\295 = NAND(\251, \198) -\296 = AND(\260, \264, \267, \270, \273, \276, \279, \282, \285) -\300 = NOT(\263) -\301 = NOT(\288) -\302 = NOT(\289) -\303 = NOT(\290) -\304 = NOT(\291) -\305 = NOT(\292) -\306 = NOT(\293) -\307 = NOT(\294) -\308 = NOT(\295) -\309 = NOT(\296) -\319 = NOT(\296) -\329 = NOT(\296) -\330 = XOR(\309, \260) -\331 = XOR(\309, \264) -\332 = XOR(\309, \267) -\333 = XOR(\309, \270) -\334 = NAND(\8, \319) -\335 = XOR(\309, \273) -\336 = NAND(\319, \21) -\337 = XOR(\309, \276) -\338 = NAND(\319, \34) -\339 = XOR(\309, \279) -\340 = NAND(\319, \47) -\341 = XOR(\309, \282) -\342 = NAND(\319, \60) -\343 = XOR(\309, \285) -\344 = NAND(\319, \73) -\345 = NAND(\319, \86) -\346 = NAND(\319, \99) -\347 = NAND(\319, \112) -\348 = NAND(\330, \300) -\349 = NAND(\331, \301) -\350 = NAND(\332, \302) -\351 = NAND(\333, \303) -\352 = NAND(\335, \304) -\353 = NAND(\337, \305) -\354 = NAND(\339, \306) -\355 = NAND(\341, \307) -\356 = NAND(\343, \308) -\357 = AND(\348, \349, \350, \351, \352, \353, \354, \355, \356) -\360 = NOT(\357) -\370 = NOT(\357) -\371 = NAND(\14, \360) -\372 = NAND(\360, \27) -\373 = NAND(\360, \40) -\374 = NAND(\360, \53) -\375 = NAND(\360, \66) -\376 = NAND(\360, \79) -\377 = NAND(\360, \92) -\378 = NAND(\360, \105) -\379 = NAND(\360, \115) -\380 = NAND(\4, \242, \334, \371) -\381 = NAND(\246, \336, \372, \17) -\386 = NAND(\250, \338, \373, \30) -\393 = NAND(\254, \340, \374, \43) -\399 = NAND(\255, \342, \375, \56) -\404 = NAND(\256, \344, \376, \69) -\407 = NAND(\257, \345, \377, \82) -\411 = NAND(\258, \346, \378, \95) -\414 = NAND(\259, \347, \379, \108) -\415 = NOT(\380) -\416 = AND(\381, \386, \393, \399, \404, \407, \411, \414) -\417 = NOT(\393) -\418 = NOT(\404) -\419 = NOT(\407) -\420 = NOT(\411) -\421 = NOR(\415, \416) -\422 = NAND(\386, \417) -\425 = NAND(\386, \393, \418, \399) -\428 = NAND(\399, \393, \419) -\429 = NAND(\386, \393, \407, \420) -\430 = NAND(\381, \386, \422, \399) -\431 = NAND(\381, \386, \425, \428) -\432 = NAND(\381, \422, \425, \429) diff --git a/ISCAS85/new/c499.bench b/ISCAS85/new/c499.bench deleted file mode 100644 index f039e39..0000000 --- a/ISCAS85/new/c499.bench +++ /dev/null @@ -1,279 +0,0 @@ -# c\499 - -INPUT(\1) -INPUT(\5) -INPUT(\9) -INPUT(\13) -INPUT(\17) -INPUT(\21) -INPUT(\25) -INPUT(\29) -INPUT(\33) -INPUT(\37) -INPUT(\41) -INPUT(\45) -INPUT(\49) -INPUT(\53) -INPUT(\57) -INPUT(\61) -INPUT(\65) -INPUT(\69) -INPUT(\73) -INPUT(\77) -INPUT(\81) -INPUT(\85) -INPUT(\89) -INPUT(\93) -INPUT(\97) -INPUT(\101) -INPUT(\105) -INPUT(\109) -INPUT(\113) -INPUT(\117) -INPUT(\121) -INPUT(\125) -INPUT(\129) -INPUT(\130) -INPUT(\131) -INPUT(\132) -INPUT(\133) -INPUT(\134) -INPUT(\135) -INPUT(\136) -INPUT(\137) - -OUTPUT(\724) -OUTPUT(\725) -OUTPUT(\726) -OUTPUT(\727) -OUTPUT(\728) -OUTPUT(\729) -OUTPUT(\730) -OUTPUT(\731) -OUTPUT(\732) -OUTPUT(\733) -OUTPUT(\734) -OUTPUT(\735) -OUTPUT(\736) -OUTPUT(\737) -OUTPUT(\738) -OUTPUT(\739) -OUTPUT(\740) -OUTPUT(\741) -OUTPUT(\742) -OUTPUT(\743) -OUTPUT(\744) -OUTPUT(\745) -OUTPUT(\746) -OUTPUT(\747) -OUTPUT(\748) -OUTPUT(\749) -OUTPUT(\750) -OUTPUT(\751) -OUTPUT(\752) -OUTPUT(\753) -OUTPUT(\754) -OUTPUT(\755) - -\250 = XOR(\1, \5) -\251 = XOR(\9, \13) -\252 = XOR(\17, \21) -\253 = XOR(\25, \29) -\254 = XOR(\33, \37) -\255 = XOR(\41, \45) -\256 = XOR(\49, \53) -\257 = XOR(\57, \61) -\258 = XOR(\65, \69) -\259 = XOR(\73, \77) -\260 = XOR(\81, \85) -\261 = XOR(\89, \93) -\262 = XOR(\97, \101) -\263 = XOR(\105, \109) -\264 = XOR(\113, \117) -\265 = XOR(\121, \125) -\266 = AND(\129, \137) -\267 = AND(\130, \137) -\268 = AND(\131, \137) -\269 = AND(\132, \137) -\270 = AND(\133, \137) -\271 = AND(\134, \137) -\272 = AND(\135, \137) -\273 = AND(\136, \137) -\274 = XOR(\1, \17) -\275 = XOR(\33, \49) -\276 = XOR(\5, \21) -\277 = XOR(\37, \53) -\278 = XOR(\9, \25) -\279 = XOR(\41, \57) -\280 = XOR(\13, \29) -\281 = XOR(\45, \61) -\282 = XOR(\65, \81) -\283 = XOR(\97, \113) -\284 = XOR(\69, \85) -\285 = XOR(\101, \117) -\286 = XOR(\73, \89) -\287 = XOR(\105, \121) -\288 = XOR(\77, \93) -\289 = XOR(\109, \125) -\290 = XOR(\250, \251) -\293 = XOR(\252, \253) -\296 = XOR(\254, \255) -\299 = XOR(\256, \257) -\302 = XOR(\258, \259) -\305 = XOR(\260, \261) -\308 = XOR(\262, \263) -\311 = XOR(\264, \265) -\314 = XOR(\274, \275) -\315 = XOR(\276, \277) -\316 = XOR(\278, \279) -\317 = XOR(\280, \281) -\318 = XOR(\282, \283) -\319 = XOR(\284, \285) -\320 = XOR(\286, \287) -\321 = XOR(\288, \289) -\338 = XOR(\290, \293) -\339 = XOR(\296, \299) -\340 = XOR(\290, \296) -\341 = XOR(\293, \299) -\342 = XOR(\302, \305) -\343 = XOR(\308, \311) -\344 = XOR(\302, \308) -\345 = XOR(\305, \311) -\346 = XOR(\266, \342) -\347 = XOR(\267, \343) -\348 = XOR(\268, \344) -\349 = XOR(\269, \345) -\350 = XOR(\270, \338) -\351 = XOR(\271, \339) -\352 = XOR(\272, \340) -\353 = XOR(\273, \341) -\354 = XOR(\314, \346) -\367 = XOR(\315, \347) -\380 = XOR(\316, \348) -\393 = XOR(\317, \349) -\406 = XOR(\318, \350) -\419 = XOR(\319, \351) -\432 = XOR(\320, \352) -\445 = XOR(\321, \353) -\554 = NOT(\354) -\555 = NOT(\367) -\556 = NOT(\380) -\557 = NOT(\354) -\558 = NOT(\367) -\559 = NOT(\393) -\560 = NOT(\354) -\561 = NOT(\380) -\562 = NOT(\393) -\563 = NOT(\367) -\564 = NOT(\380) -\565 = NOT(\393) -\566 = NOT(\419) -\567 = NOT(\445) -\568 = NOT(\419) -\569 = NOT(\432) -\570 = NOT(\406) -\571 = NOT(\445) -\572 = NOT(\406) -\573 = NOT(\432) -\574 = NOT(\406) -\575 = NOT(\419) -\576 = NOT(\432) -\577 = NOT(\406) -\578 = NOT(\419) -\579 = NOT(\445) -\580 = NOT(\406) -\581 = NOT(\432) -\582 = NOT(\445) -\583 = NOT(\419) -\584 = NOT(\432) -\585 = NOT(\445) -\586 = NOT(\367) -\587 = NOT(\393) -\588 = NOT(\367) -\589 = NOT(\380) -\590 = NOT(\354) -\591 = NOT(\393) -\592 = NOT(\354) -\593 = NOT(\380) -\594 = AND(\554, \555, \556, \393) -\595 = AND(\557, \558, \380, \559) -\596 = AND(\560, \367, \561, \562) -\597 = AND(\354, \563, \564, \565) -\598 = AND(\574, \575, \576, \445) -\599 = AND(\577, \578, \432, \579) -\600 = AND(\580, \419, \581, \582) -\601 = AND(\406, \583, \584, \585) -\602 = OR(\594, \595, \596, \597) -\607 = OR(\598, \599, \600, \601) -\620 = AND(\406, \566, \432, \567, \602) -\625 = AND(\406, \568, \569, \445, \602) -\630 = AND(\570, \419, \432, \571, \602) -\635 = AND(\572, \419, \573, \445, \602) -\640 = AND(\354, \586, \380, \587, \607) -\645 = AND(\354, \588, \589, \393, \607) -\650 = AND(\590, \367, \380, \591, \607) -\655 = AND(\592, \367, \593, \393, \607) -\692 = AND(\354, \620) -\693 = AND(\367, \620) -\694 = AND(\380, \620) -\695 = AND(\393, \620) -\696 = AND(\354, \625) -\697 = AND(\367, \625) -\698 = AND(\380, \625) -\699 = AND(\393, \625) -\700 = AND(\354, \630) -\701 = AND(\367, \630) -\702 = AND(\380, \630) -\703 = AND(\393, \630) -\704 = AND(\354, \635) -\705 = AND(\367, \635) -\706 = AND(\380, \635) -\707 = AND(\393, \635) -\708 = AND(\406, \640) -\709 = AND(\419, \640) -\710 = AND(\432, \640) -\711 = AND(\445, \640) -\712 = AND(\406, \645) -\713 = AND(\419, \645) -\714 = AND(\432, \645) -\715 = AND(\445, \645) -\716 = AND(\406, \650) -\717 = AND(\419, \650) -\718 = AND(\432, \650) -\719 = AND(\445, \650) -\720 = AND(\406, \655) -\721 = AND(\419, \655) -\722 = AND(\432, \655) -\723 = AND(\445, \655) -\724 = XOR(\1, \692) -\725 = XOR(\5, \693) -\726 = XOR(\9, \694) -\727 = XOR(\13, \695) -\728 = XOR(\17, \696) -\729 = XOR(\21, \697) -\730 = XOR(\25, \698) -\731 = XOR(\29, \699) -\732 = XOR(\33, \700) -\733 = XOR(\37, \701) -\734 = XOR(\41, \702) -\735 = XOR(\45, \703) -\736 = XOR(\49, \704) -\737 = XOR(\53, \705) -\738 = XOR(\57, \706) -\739 = XOR(\61, \707) -\740 = XOR(\65, \708) -\741 = XOR(\69, \709) -\742 = XOR(\73, \710) -\743 = XOR(\77, \711) -\744 = XOR(\81, \712) -\745 = XOR(\85, \713) -\746 = XOR(\89, \714) -\747 = XOR(\93, \715) -\748 = XOR(\97, \716) -\749 = XOR(\101, \717) -\750 = XOR(\105, \718) -\751 = XOR(\109, \719) -\752 = XOR(\113, \720) -\753 = XOR(\117, \721) -\754 = XOR(\121, \722) -\755 = XOR(\125, \723) diff --git a/ISCAS85/new/c5315.bench b/ISCAS85/new/c5315.bench deleted file mode 100644 index e3da17e..0000000 --- a/ISCAS85/new/c5315.bench +++ /dev/null @@ -1,2612 +0,0 @@ -# c\5315 - -INPUT(\1) -INPUT(\4) -INPUT(\11) -INPUT(\14) -INPUT(\17) -INPUT(\20) -INPUT(\23) -INPUT(\24) -INPUT(\25) -INPUT(\26) -INPUT(\27) -INPUT(\31) -INPUT(\34) -INPUT(\37) -INPUT(\40) -INPUT(\43) -INPUT(\46) -INPUT(\49) -INPUT(\52) -INPUT(\53) -INPUT(\54) -INPUT(\61) -INPUT(\64) -INPUT(\67) -INPUT(\70) -INPUT(\73) -INPUT(\76) -INPUT(\79) -INPUT(\80) -INPUT(\81) -INPUT(\82) -INPUT(\83) -INPUT(\86) -INPUT(\87) -INPUT(\88) -INPUT(\91) -INPUT(\94) -INPUT(\97) -INPUT(\100) -INPUT(\103) -INPUT(\106) -INPUT(\109) -INPUT(\112) -INPUT(\113) -INPUT(\114) -INPUT(\115) -INPUT(\116) -INPUT(\117) -INPUT(\118) -INPUT(\119) -INPUT(\120) -INPUT(\121) -INPUT(\122) -INPUT(\123) -INPUT(\126) -INPUT(\127) -INPUT(\128) -INPUT(\129) -INPUT(\130) -INPUT(\131) -INPUT(\132) -INPUT(\135) -INPUT(\136) -INPUT(\137) -INPUT(\140) -INPUT(\141) -INPUT(\145) -INPUT(\146) -INPUT(\149) -INPUT(\152) -INPUT(\155) -INPUT(\158) -INPUT(\161) -INPUT(\164) -INPUT(\167) -INPUT(\170) -INPUT(\173) -INPUT(\176) -INPUT(\179) -INPUT(\182) -INPUT(\185) -INPUT(\188) -INPUT(\191) -INPUT(\194) -INPUT(\197) -INPUT(\200) -INPUT(\203) -INPUT(\206) -INPUT(\209) -INPUT(\210) -INPUT(\217) -INPUT(\218) -INPUT(\225) -INPUT(\226) -INPUT(\233) -INPUT(\234) -INPUT(\241) -INPUT(\242) -INPUT(\245) -INPUT(\248) -INPUT(\251) -INPUT(\254) -INPUT(\257) -INPUT(\264) -INPUT(\265) -INPUT(\272) -INPUT(\273) -INPUT(\280) -INPUT(\281) -INPUT(\288) -INPUT(\289) -INPUT(\292) -INPUT(\293) -INPUT(\299) -INPUT(\302) -INPUT(\307) -INPUT(\308) -INPUT(\315) -INPUT(\316) -INPUT(\323) -INPUT(\324) -INPUT(\331) -INPUT(\332) -INPUT(\335) -INPUT(\338) -INPUT(\341) -INPUT(\348) -INPUT(\351) -INPUT(\358) -INPUT(\361) -INPUT(\366) -INPUT(\369) -INPUT(\372) -INPUT(\373) -INPUT(\374) -INPUT(\386) -INPUT(\389) -INPUT(\400) -INPUT(\411) -INPUT(\422) -INPUT(\435) -INPUT(\446) -INPUT(\457) -INPUT(\468) -INPUT(\479) -INPUT(\490) -INPUT(\503) -INPUT(\514) -INPUT(\523) -INPUT(\534) -INPUT(\545) -INPUT(\549) -INPUT(\552) -INPUT(\556) -INPUT(\559) -INPUT(\562) -INPUT(\566) -INPUT(\571) -INPUT(\574) -INPUT(\577) -INPUT(\580) -INPUT(\583) -INPUT(\588) -INPUT(\591) -INPUT(\592) -INPUT(\595) -INPUT(\596) -INPUT(\597) -INPUT(\598) -INPUT(\599) -INPUT(\603) -INPUT(\607) -INPUT(\610) -INPUT(\613) -INPUT(\616) -INPUT(\619) -INPUT(\625) -INPUT(\631) - -OUTPUT(\709) -OUTPUT(\816) -OUTPUT(\1066) -OUTPUT(\1137) -OUTPUT(\1138) -OUTPUT(\1139) -OUTPUT(\1140) -OUTPUT(\1141) -OUTPUT(\1142) -OUTPUT(\1143) -OUTPUT(\1144) -OUTPUT(\1145) -OUTPUT(\1147) -OUTPUT(\1152) -OUTPUT(\1153) -OUTPUT(\1154) -OUTPUT(\1155) -OUTPUT(\1972) -OUTPUT(\2054) -OUTPUT(\2060) -OUTPUT(\2061) -OUTPUT(\2139) -OUTPUT(\2142) -OUTPUT(\2309) -OUTPUT(\2387) -OUTPUT(\2527) -OUTPUT(\2584) -OUTPUT(\2590) -OUTPUT(\2623) -OUTPUT(\3357) -OUTPUT(\3358) -OUTPUT(\3359) -OUTPUT(\3360) -OUTPUT(\3604) -OUTPUT(\3613) -OUTPUT(\4272) -OUTPUT(\4275) -OUTPUT(\4278) -OUTPUT(\4279) -OUTPUT(\4737) -OUTPUT(\4738) -OUTPUT(\4739) -OUTPUT(\4740) -OUTPUT(\5240) -OUTPUT(\5388) -OUTPUT(\6641) -OUTPUT(\6643) -OUTPUT(\6646) -OUTPUT(\6648) -OUTPUT(\6716) -OUTPUT(\6877) -OUTPUT(\6924) -OUTPUT(\6925) -OUTPUT(\6926) -OUTPUT(\6927) -OUTPUT(\7015) -OUTPUT(\7363) -OUTPUT(\7365) -OUTPUT(\7432) -OUTPUT(\7449) -OUTPUT(\7465) -OUTPUT(\7466) -OUTPUT(\7467) -OUTPUT(\7469) -OUTPUT(\7470) -OUTPUT(\7471) -OUTPUT(\7472) -OUTPUT(\7473) -OUTPUT(\7474) -OUTPUT(\7476) -OUTPUT(\7503) -OUTPUT(\7504) -OUTPUT(\7506) -OUTPUT(\7511) -OUTPUT(\7515) -OUTPUT(\7516) -OUTPUT(\7517) -OUTPUT(\7518) -OUTPUT(\7519) -OUTPUT(\7520) -OUTPUT(\7521) -OUTPUT(\7522) -OUTPUT(\7600) -OUTPUT(\7601) -OUTPUT(\7602) -OUTPUT(\7603) -OUTPUT(\7604) -OUTPUT(\7605) -OUTPUT(\7606) -OUTPUT(\7607) -OUTPUT(\7626) -OUTPUT(\7698) -OUTPUT(\7699) -OUTPUT(\7700) -OUTPUT(\7701) -OUTPUT(\7702) -OUTPUT(\7703) -OUTPUT(\7704) -OUTPUT(\7705) -OUTPUT(\7706) -OUTPUT(\7707) -OUTPUT(\7735) -OUTPUT(\7736) -OUTPUT(\7737) -OUTPUT(\7738) -OUTPUT(\7739) -OUTPUT(\7740) -OUTPUT(\7741) -OUTPUT(\7742) -OUTPUT(\7754) -OUTPUT(\7755) -OUTPUT(\7756) -OUTPUT(\7757) -OUTPUT(\7758) -OUTPUT(\7759) -OUTPUT(\7760) -OUTPUT(\7761) -OUTPUT(\8075) -OUTPUT(\8076) -OUTPUT(\8123) -OUTPUT(\8124) -OUTPUT(\8127) -OUTPUT(\8128) - -\709 = BUFF(\141) -\816 = BUFF(\293) -\1042 = AND(\135, \631) -\1043 = NOT(\591) -\1066 = BUFF(\592) -\1067 = NOT(\595) -\1080 = NOT(\596) -\1092 = NOT(\597) -\1104 = NOT(\598) -\1137 = NOT(\545) -\1138 = NOT(\348) -\1139 = NOT(\366) -\1140 = AND(\552, \562) -\1141 = NOT(\549) -\1142 = NOT(\545) -\1143 = NOT(\545) -\1144 = NOT(\338) -\1145 = NOT(\358) -\1146 = NAND(\373, \1) -\1147 = AND(\141, \145) -\1148 = NOT(\592) -\1149 = NOT(\1042) -\1150 = AND(\1043, \27) -\1151 = AND(\386, \556) -\1152 = NOT(\245) -\1153 = NOT(\552) -\1154 = NOT(\562) -\1155 = NOT(\559) -\1156 = AND(\386, \559, \556, \552) -\1157 = NOT(\566) -\1161 = BUFF(\571) -\1173 = BUFF(\574) -\1185 = BUFF(\571) -\1197 = BUFF(\574) -\1209 = BUFF(\137) -\1213 = BUFF(\137) -\1216 = BUFF(\141) -\1219 = NOT(\583) -\1223 = BUFF(\577) -\1235 = BUFF(\580) -\1247 = BUFF(\577) -\1259 = BUFF(\580) -\1271 = BUFF(\254) -\1280 = BUFF(\251) -\1292 = BUFF(\251) -\1303 = BUFF(\248) -\1315 = BUFF(\248) -\1327 = BUFF(\610) -\1339 = BUFF(\607) -\1351 = BUFF(\613) -\1363 = BUFF(\616) -\1375 = BUFF(\210) -\1378 = BUFF(\210) -\1381 = BUFF(\218) -\1384 = BUFF(\218) -\1387 = BUFF(\226) -\1390 = BUFF(\226) -\1393 = BUFF(\234) -\1396 = BUFF(\234) -\1415 = BUFF(\257) -\1418 = BUFF(\257) -\1421 = BUFF(\265) -\1424 = BUFF(\265) -\1427 = BUFF(\273) -\1430 = BUFF(\273) -\1433 = BUFF(\281) -\1436 = BUFF(\281) -\1455 = BUFF(\335) -\1462 = BUFF(\335) -\1469 = BUFF(\206) -\1475 = AND(\27, \31) -\1479 = BUFF(\1) -\1482 = BUFF(\588) -\1492 = BUFF(\293) -\1495 = BUFF(\302) -\1498 = BUFF(\308) -\1501 = BUFF(\308) -\1504 = BUFF(\316) -\1507 = BUFF(\316) -\1510 = BUFF(\324) -\1513 = BUFF(\324) -\1516 = BUFF(\341) -\1519 = BUFF(\341) -\1522 = BUFF(\351) -\1525 = BUFF(\351) -\1542 = BUFF(\257) -\1545 = BUFF(\257) -\1548 = BUFF(\265) -\1551 = BUFF(\265) -\1554 = BUFF(\273) -\1557 = BUFF(\273) -\1560 = BUFF(\281) -\1563 = BUFF(\281) -\1566 = BUFF(\332) -\1573 = BUFF(\332) -\1580 = BUFF(\549) -\1583 = AND(\31, \27) -\1588 = NOT(\588) -\1594 = BUFF(\324) -\1597 = BUFF(\324) -\1600 = BUFF(\341) -\1603 = BUFF(\341) -\1606 = BUFF(\351) -\1609 = BUFF(\351) -\1612 = BUFF(\293) -\1615 = BUFF(\302) -\1618 = BUFF(\308) -\1621 = BUFF(\308) -\1624 = BUFF(\316) -\1627 = BUFF(\316) -\1630 = BUFF(\361) -\1633 = BUFF(\361) -\1636 = BUFF(\210) -\1639 = BUFF(\210) -\1642 = BUFF(\218) -\1645 = BUFF(\218) -\1648 = BUFF(\226) -\1651 = BUFF(\226) -\1654 = BUFF(\234) -\1657 = BUFF(\234) -\1660 = NOT(\324) -\1663 = BUFF(\242) -\1675 = BUFF(\242) -\1685 = BUFF(\254) -\1697 = BUFF(\610) -\1709 = BUFF(\607) -\1721 = BUFF(\625) -\1727 = BUFF(\619) -\1731 = BUFF(\613) -\1743 = BUFF(\616) -\1755 = NOT(\599) -\1758 = NOT(\603) -\1761 = BUFF(\619) -\1769 = BUFF(\625) -\1777 = BUFF(\619) -\1785 = BUFF(\625) -\1793 = BUFF(\619) -\1800 = BUFF(\625) -\1807 = BUFF(\619) -\1814 = BUFF(\625) -\1821 = BUFF(\299) -\1824 = BUFF(\446) -\1827 = BUFF(\457) -\1830 = BUFF(\468) -\1833 = BUFF(\422) -\1836 = BUFF(\435) -\1839 = BUFF(\389) -\1842 = BUFF(\400) -\1845 = BUFF(\411) -\1848 = BUFF(\374) -\1851 = BUFF(\4) -\1854 = BUFF(\446) -\1857 = BUFF(\457) -\1860 = BUFF(\468) -\1863 = BUFF(\435) -\1866 = BUFF(\389) -\1869 = BUFF(\400) -\1872 = BUFF(\411) -\1875 = BUFF(\422) -\1878 = BUFF(\374) -\1881 = BUFF(\479) -\1884 = BUFF(\490) -\1887 = BUFF(\503) -\1890 = BUFF(\514) -\1893 = BUFF(\523) -\1896 = BUFF(\534) -\1899 = BUFF(\54) -\1902 = BUFF(\479) -\1905 = BUFF(\503) -\1908 = BUFF(\514) -\1911 = BUFF(\523) -\1914 = BUFF(\534) -\1917 = BUFF(\490) -\1920 = BUFF(\361) -\1923 = BUFF(\369) -\1926 = BUFF(\341) -\1929 = BUFF(\351) -\1932 = BUFF(\308) -\1935 = BUFF(\316) -\1938 = BUFF(\293) -\1941 = BUFF(\302) -\1944 = BUFF(\281) -\1947 = BUFF(\289) -\1950 = BUFF(\265) -\1953 = BUFF(\273) -\1956 = BUFF(\234) -\1959 = BUFF(\257) -\1962 = BUFF(\218) -\1965 = BUFF(\226) -\1968 = BUFF(\210) -\1972 = NOT(\1146) -\2054 = AND(\136, \1148) -\2060 = NOT(\1150) -\2061 = NOT(\1151) -\2139 = BUFF(\1209) -\2142 = BUFF(\1216) -\2309 = BUFF(\1479) -\2349 = AND(\1104, \514) -\2350 = OR(\1067, \514) -\2387 = BUFF(\1580) -\2527 = BUFF(\1821) -\2584 = NOT(\1580) -\2585 = AND(\170, \1161, \1173) -\2586 = AND(\173, \1161, \1173) -\2587 = AND(\167, \1161, \1173) -\2588 = AND(\164, \1161, \1173) -\2589 = AND(\161, \1161, \1173) -\2590 = NAND(\1475, \140) -\2591 = AND(\185, \1185, \1197) -\2592 = AND(\158, \1185, \1197) -\2593 = AND(\152, \1185, \1197) -\2594 = AND(\146, \1185, \1197) -\2595 = AND(\170, \1223, \1235) -\2596 = AND(\173, \1223, \1235) -\2597 = AND(\167, \1223, \1235) -\2598 = AND(\164, \1223, \1235) -\2599 = AND(\161, \1223, \1235) -\2600 = AND(\185, \1247, \1259) -\2601 = AND(\158, \1247, \1259) -\2602 = AND(\152, \1247, \1259) -\2603 = AND(\146, \1247, \1259) -\2604 = AND(\106, \1731, \1743) -\2605 = AND(\61, \1327, \1339) -\2606 = AND(\106, \1697, \1709) -\2607 = AND(\49, \1697, \1709) -\2608 = AND(\103, \1697, \1709) -\2609 = AND(\40, \1697, \1709) -\2610 = AND(\37, \1697, \1709) -\2611 = AND(\20, \1327, \1339) -\2612 = AND(\17, \1327, \1339) -\2613 = AND(\70, \1327, \1339) -\2614 = AND(\64, \1327, \1339) -\2615 = AND(\49, \1731, \1743) -\2616 = AND(\103, \1731, \1743) -\2617 = AND(\40, \1731, \1743) -\2618 = AND(\37, \1731, \1743) -\2619 = AND(\20, \1351, \1363) -\2620 = AND(\17, \1351, \1363) -\2621 = AND(\70, \1351, \1363) -\2622 = AND(\64, \1351, \1363) -\2623 = NOT(\1475) -\2624 = AND(\123, \1758, \599) -\2625 = AND(\1777, \1785) -\2626 = AND(\61, \1351, \1363) -\2627 = AND(\1761, \1769) -\2628 = NOT(\1824) -\2629 = NOT(\1827) -\2630 = NOT(\1830) -\2631 = NOT(\1833) -\2632 = NOT(\1836) -\2633 = NOT(\1839) -\2634 = NOT(\1842) -\2635 = NOT(\1845) -\2636 = NOT(\1848) -\2637 = NOT(\1851) -\2638 = NOT(\1854) -\2639 = NOT(\1857) -\2640 = NOT(\1860) -\2641 = NOT(\1863) -\2642 = NOT(\1866) -\2643 = NOT(\1869) -\2644 = NOT(\1872) -\2645 = NOT(\1875) -\2646 = NOT(\1878) -\2647 = BUFF(\1209) -\2653 = NOT(\1161) -\2664 = NOT(\1173) -\2675 = BUFF(\1209) -\2681 = NOT(\1185) -\2692 = NOT(\1197) -\2703 = AND(\179, \1185, \1197) -\2704 = BUFF(\1479) -\2709 = NOT(\1881) -\2710 = NOT(\1884) -\2711 = NOT(\1887) -\2712 = NOT(\1890) -\2713 = NOT(\1893) -\2714 = NOT(\1896) -\2715 = NOT(\1899) -\2716 = NOT(\1902) -\2717 = NOT(\1905) -\2718 = NOT(\1908) -\2719 = NOT(\1911) -\2720 = NOT(\1914) -\2721 = NOT(\1917) -\2722 = BUFF(\1213) -\2728 = NOT(\1223) -\2739 = NOT(\1235) -\2750 = BUFF(\1213) -\2756 = NOT(\1247) -\2767 = NOT(\1259) -\2778 = AND(\179, \1247, \1259) -\2779 = NOT(\1327) -\2790 = NOT(\1339) -\2801 = NOT(\1351) -\2812 = NOT(\1363) -\2823 = NOT(\1375) -\2824 = NOT(\1378) -\2825 = NOT(\1381) -\2826 = NOT(\1384) -\2827 = NOT(\1387) -\2828 = NOT(\1390) -\2829 = NOT(\1393) -\2830 = NOT(\1396) -\2831 = AND(\1104, \457, \1378) -\2832 = AND(\1104, \468, \1384) -\2833 = AND(\1104, \422, \1390) -\2834 = AND(\1104, \435, \1396) -\2835 = AND(\1067, \1375) -\2836 = AND(\1067, \1381) -\2837 = AND(\1067, \1387) -\2838 = AND(\1067, \1393) -\2839 = NOT(\1415) -\2840 = NOT(\1418) -\2841 = NOT(\1421) -\2842 = NOT(\1424) -\2843 = NOT(\1427) -\2844 = NOT(\1430) -\2845 = NOT(\1433) -\2846 = NOT(\1436) -\2847 = AND(\1104, \389, \1418) -\2848 = AND(\1104, \400, \1424) -\2849 = AND(\1104, \411, \1430) -\2850 = AND(\1104, \374, \1436) -\2851 = AND(\1067, \1415) -\2852 = AND(\1067, \1421) -\2853 = AND(\1067, \1427) -\2854 = AND(\1067, \1433) -\2855 = NOT(\1455) -\2861 = NOT(\1462) -\2867 = AND(\292, \1455) -\2868 = AND(\288, \1455) -\2869 = AND(\280, \1455) -\2870 = AND(\272, \1455) -\2871 = AND(\264, \1455) -\2872 = AND(\241, \1462) -\2873 = AND(\233, \1462) -\2874 = AND(\225, \1462) -\2875 = AND(\217, \1462) -\2876 = AND(\209, \1462) -\2877 = BUFF(\1216) -\2882 = NOT(\1482) -\2891 = NOT(\1475) -\2901 = NOT(\1492) -\2902 = NOT(\1495) -\2903 = NOT(\1498) -\2904 = NOT(\1501) -\2905 = NOT(\1504) -\2906 = NOT(\1507) -\2907 = AND(\1303, \1495) -\2908 = AND(\1303, \479, \1501) -\2909 = AND(\1303, \490, \1507) -\2910 = AND(\1663, \1492) -\2911 = AND(\1663, \1498) -\2912 = AND(\1663, \1504) -\2913 = NOT(\1510) -\2914 = NOT(\1513) -\2915 = NOT(\1516) -\2916 = NOT(\1519) -\2917 = NOT(\1522) -\2918 = NOT(\1525) -\2919 = AND(\1104, \503, \1513) -\2920 = NOT(\2349) -\2921 = AND(\1104, \523, \1519) -\2922 = AND(\1104, \534, \1525) -\2923 = AND(\1067, \1510) -\2924 = AND(\1067, \1516) -\2925 = AND(\1067, \1522) -\2926 = NOT(\1542) -\2927 = NOT(\1545) -\2928 = NOT(\1548) -\2929 = NOT(\1551) -\2930 = NOT(\1554) -\2931 = NOT(\1557) -\2932 = NOT(\1560) -\2933 = NOT(\1563) -\2934 = AND(\1303, \389, \1545) -\2935 = AND(\1303, \400, \1551) -\2936 = AND(\1303, \411, \1557) -\2937 = AND(\1303, \374, \1563) -\2938 = AND(\1663, \1542) -\2939 = AND(\1663, \1548) -\2940 = AND(\1663, \1554) -\2941 = AND(\1663, \1560) -\2942 = NOT(\1566) -\2948 = NOT(\1573) -\2954 = AND(\372, \1566) -\2955 = AND(\366, \1566) -\2956 = AND(\358, \1566) -\2957 = AND(\348, \1566) -\2958 = AND(\338, \1566) -\2959 = AND(\331, \1573) -\2960 = AND(\323, \1573) -\2961 = AND(\315, \1573) -\2962 = AND(\307, \1573) -\2963 = AND(\299, \1573) -\2964 = NOT(\1588) -\2969 = AND(\83, \1588) -\2970 = AND(\86, \1588) -\2971 = AND(\88, \1588) -\2972 = AND(\88, \1588) -\2973 = NOT(\1594) -\2974 = NOT(\1597) -\2975 = NOT(\1600) -\2976 = NOT(\1603) -\2977 = NOT(\1606) -\2978 = NOT(\1609) -\2979 = AND(\1315, \503, \1597) -\2980 = AND(\1315, \514) -\2981 = AND(\1315, \523, \1603) -\2982 = AND(\1315, \534, \1609) -\2983 = AND(\1675, \1594) -\2984 = OR(\1675, \514) -\2985 = AND(\1675, \1600) -\2986 = AND(\1675, \1606) -\2987 = NOT(\1612) -\2988 = NOT(\1615) -\2989 = NOT(\1618) -\2990 = NOT(\1621) -\2991 = NOT(\1624) -\2992 = NOT(\1627) -\2993 = AND(\1315, \1615) -\2994 = AND(\1315, \479, \1621) -\2995 = AND(\1315, \490, \1627) -\2996 = AND(\1675, \1612) -\2997 = AND(\1675, \1618) -\2998 = AND(\1675, \1624) -\2999 = NOT(\1630) -\3000 = BUFF(\1469) -\3003 = BUFF(\1469) -\3006 = NOT(\1633) -\3007 = BUFF(\1469) -\3010 = BUFF(\1469) -\3013 = AND(\1315, \1630) -\3014 = AND(\1315, \1633) -\3015 = NOT(\1636) -\3016 = NOT(\1639) -\3017 = NOT(\1642) -\3018 = NOT(\1645) -\3019 = NOT(\1648) -\3020 = NOT(\1651) -\3021 = NOT(\1654) -\3022 = NOT(\1657) -\3023 = AND(\1303, \457, \1639) -\3024 = AND(\1303, \468, \1645) -\3025 = AND(\1303, \422, \1651) -\3026 = AND(\1303, \435, \1657) -\3027 = AND(\1663, \1636) -\3028 = AND(\1663, \1642) -\3029 = AND(\1663, \1648) -\3030 = AND(\1663, \1654) -\3031 = NOT(\1920) -\3032 = NOT(\1923) -\3033 = NOT(\1926) -\3034 = NOT(\1929) -\3035 = BUFF(\1660) -\3038 = BUFF(\1660) -\3041 = NOT(\1697) -\3052 = NOT(\1709) -\3063 = NOT(\1721) -\3068 = NOT(\1727) -\3071 = AND(\97, \1721) -\3072 = AND(\94, \1721) -\3073 = AND(\97, \1721) -\3074 = AND(\94, \1721) -\3075 = NOT(\1731) -\3086 = NOT(\1743) -\3097 = NOT(\1761) -\3108 = NOT(\1769) -\3119 = NOT(\1777) -\3130 = NOT(\1785) -\3141 = NOT(\1944) -\3142 = NOT(\1947) -\3143 = NOT(\1950) -\3144 = NOT(\1953) -\3145 = NOT(\1956) -\3146 = NOT(\1959) -\3147 = NOT(\1793) -\3158 = NOT(\1800) -\3169 = NOT(\1807) -\3180 = NOT(\1814) -\3191 = BUFF(\1821) -\3194 = NOT(\1932) -\3195 = NOT(\1935) -\3196 = NOT(\1938) -\3197 = NOT(\1941) -\3198 = NOT(\1962) -\3199 = NOT(\1965) -\3200 = BUFF(\1469) -\3203 = NOT(\1968) -\3357 = BUFF(\2704) -\3358 = BUFF(\2704) -\3359 = BUFF(\2704) -\3360 = BUFF(\2704) -\3401 = AND(\457, \1092, \2824) -\3402 = AND(\468, \1092, \2826) -\3403 = AND(\422, \1092, \2828) -\3404 = AND(\435, \1092, \2830) -\3405 = AND(\1080, \2823) -\3406 = AND(\1080, \2825) -\3407 = AND(\1080, \2827) -\3408 = AND(\1080, \2829) -\3409 = AND(\389, \1092, \2840) -\3410 = AND(\400, \1092, \2842) -\3411 = AND(\411, \1092, \2844) -\3412 = AND(\374, \1092, \2846) -\3413 = AND(\1080, \2839) -\3414 = AND(\1080, \2841) -\3415 = AND(\1080, \2843) -\3416 = AND(\1080, \2845) -\3444 = AND(\1280, \2902) -\3445 = AND(\479, \1280, \2904) -\3446 = AND(\490, \1280, \2906) -\3447 = AND(\1685, \2901) -\3448 = AND(\1685, \2903) -\3449 = AND(\1685, \2905) -\3450 = AND(\503, \1092, \2914) -\3451 = AND(\523, \1092, \2916) -\3452 = AND(\534, \1092, \2918) -\3453 = AND(\1080, \2913) -\3454 = AND(\1080, \2915) -\3455 = AND(\1080, \2917) -\3456 = AND(\2920, \2350) -\3459 = AND(\389, \1280, \2927) -\3460 = AND(\400, \1280, \2929) -\3461 = AND(\411, \1280, \2931) -\3462 = AND(\374, \1280, \2933) -\3463 = AND(\1685, \2926) -\3464 = AND(\1685, \2928) -\3465 = AND(\1685, \2930) -\3466 = AND(\1685, \2932) -\3481 = AND(\503, \1292, \2974) -\3482 = NOT(\2980) -\3483 = AND(\523, \1292, \2976) -\3484 = AND(\534, \1292, \2978) -\3485 = AND(\1271, \2973) -\3486 = AND(\1271, \2975) -\3487 = AND(\1271, \2977) -\3488 = AND(\1292, \2988) -\3489 = AND(\479, \1292, \2990) -\3490 = AND(\490, \1292, \2992) -\3491 = AND(\1271, \2987) -\3492 = AND(\1271, \2989) -\3493 = AND(\1271, \2991) -\3502 = AND(\1292, \2999) -\3503 = AND(\1292, \3006) -\3504 = AND(\457, \1280, \3016) -\3505 = AND(\468, \1280, \3018) -\3506 = AND(\422, \1280, \3020) -\3507 = AND(\435, \1280, \3022) -\3508 = AND(\1685, \3015) -\3509 = AND(\1685, \3017) -\3510 = AND(\1685, \3019) -\3511 = AND(\1685, \3021) -\3512 = NAND(\1923, \3031) -\3513 = NAND(\1920, \3032) -\3514 = NAND(\1929, \3033) -\3515 = NAND(\1926, \3034) -\3558 = NAND(\1947, \3141) -\3559 = NAND(\1944, \3142) -\3560 = NAND(\1953, \3143) -\3561 = NAND(\1950, \3144) -\3562 = NAND(\1959, \3145) -\3563 = NAND(\1956, \3146) -\3604 = BUFF(\3191) -\3605 = NAND(\1935, \3194) -\3606 = NAND(\1932, \3195) -\3607 = NAND(\1941, \3196) -\3608 = NAND(\1938, \3197) -\3609 = NAND(\1965, \3198) -\3610 = NAND(\1962, \3199) -\3613 = NOT(\3191) -\3614 = AND(\2882, \2891) -\3615 = AND(\1482, \2891) -\3616 = AND(\200, \2653, \1173) -\3617 = AND(\203, \2653, \1173) -\3618 = AND(\197, \2653, \1173) -\3619 = AND(\194, \2653, \1173) -\3620 = AND(\191, \2653, \1173) -\3621 = AND(\182, \2681, \1197) -\3622 = AND(\188, \2681, \1197) -\3623 = AND(\155, \2681, \1197) -\3624 = AND(\149, \2681, \1197) -\3625 = AND(\2882, \2891) -\3626 = AND(\1482, \2891) -\3627 = AND(\200, \2728, \1235) -\3628 = AND(\203, \2728, \1235) -\3629 = AND(\197, \2728, \1235) -\3630 = AND(\194, \2728, \1235) -\3631 = AND(\191, \2728, \1235) -\3632 = AND(\182, \2756, \1259) -\3633 = AND(\188, \2756, \1259) -\3634 = AND(\155, \2756, \1259) -\3635 = AND(\149, \2756, \1259) -\3636 = AND(\2882, \2891) -\3637 = AND(\1482, \2891) -\3638 = AND(\109, \3075, \1743) -\3639 = AND(\2882, \2891) -\3640 = AND(\1482, \2891) -\3641 = AND(\11, \2779, \1339) -\3642 = AND(\109, \3041, \1709) -\3643 = AND(\46, \3041, \1709) -\3644 = AND(\100, \3041, \1709) -\3645 = AND(\91, \3041, \1709) -\3646 = AND(\43, \3041, \1709) -\3647 = AND(\76, \2779, \1339) -\3648 = AND(\73, \2779, \1339) -\3649 = AND(\67, \2779, \1339) -\3650 = AND(\14, \2779, \1339) -\3651 = AND(\46, \3075, \1743) -\3652 = AND(\100, \3075, \1743) -\3653 = AND(\91, \3075, \1743) -\3654 = AND(\43, \3075, \1743) -\3655 = AND(\76, \2801, \1363) -\3656 = AND(\73, \2801, \1363) -\3657 = AND(\67, \2801, \1363) -\3658 = AND(\14, \2801, \1363) -\3659 = AND(\120, \3119, \1785) -\3660 = AND(\11, \2801, \1363) -\3661 = AND(\118, \3097, \1769) -\3662 = AND(\176, \2681, \1197) -\3663 = AND(\176, \2756, \1259) -\3664 = OR(\2831, \3401) -\3665 = OR(\2832, \3402) -\3666 = OR(\2833, \3403) -\3667 = OR(\2834, \3404) -\3668 = OR(\2835, \3405, \457) -\3669 = OR(\2836, \3406, \468) -\3670 = OR(\2837, \3407, \422) -\3671 = OR(\2838, \3408, \435) -\3672 = OR(\2847, \3409) -\3673 = OR(\2848, \3410) -\3674 = OR(\2849, \3411) -\3675 = OR(\2850, \3412) -\3676 = OR(\2851, \3413, \389) -\3677 = OR(\2852, \3414, \400) -\3678 = OR(\2853, \3415, \411) -\3679 = OR(\2854, \3416, \374) -\3680 = AND(\289, \2855) -\3681 = AND(\281, \2855) -\3682 = AND(\273, \2855) -\3683 = AND(\265, \2855) -\3684 = AND(\257, \2855) -\3685 = AND(\234, \2861) -\3686 = AND(\226, \2861) -\3687 = AND(\218, \2861) -\3688 = AND(\210, \2861) -\3689 = AND(\206, \2861) -\3691 = NOT(\2891) -\3700 = OR(\2907, \3444) -\3701 = OR(\2908, \3445) -\3702 = OR(\2909, \3446) -\3703 = OR(\2911, \3448, \479) -\3704 = OR(\2912, \3449, \490) -\3705 = OR(\2910, \3447) -\3708 = OR(\2919, \3450) -\3709 = OR(\2921, \3451) -\3710 = OR(\2922, \3452) -\3711 = OR(\2923, \3453, \503) -\3712 = OR(\2924, \3454, \523) -\3713 = OR(\2925, \3455, \534) -\3715 = OR(\2934, \3459) -\3716 = OR(\2935, \3460) -\3717 = OR(\2936, \3461) -\3718 = OR(\2937, \3462) -\3719 = OR(\2938, \3463, \389) -\3720 = OR(\2939, \3464, \400) -\3721 = OR(\2940, \3465, \411) -\3722 = OR(\2941, \3466, \374) -\3723 = AND(\369, \2942) -\3724 = AND(\361, \2942) -\3725 = AND(\351, \2942) -\3726 = AND(\341, \2942) -\3727 = AND(\324, \2948) -\3728 = AND(\316, \2948) -\3729 = AND(\308, \2948) -\3730 = AND(\302, \2948) -\3731 = AND(\293, \2948) -\3732 = OR(\2942, \2958) -\3738 = AND(\83, \2964) -\3739 = AND(\87, \2964) -\3740 = AND(\34, \2964) -\3741 = AND(\34, \2964) -\3742 = OR(\2979, \3481) -\3743 = OR(\2981, \3483) -\3744 = OR(\2982, \3484) -\3745 = OR(\2983, \3485, \503) -\3746 = OR(\2985, \3486, \523) -\3747 = OR(\2986, \3487, \534) -\3748 = OR(\2993, \3488) -\3749 = OR(\2994, \3489) -\3750 = OR(\2995, \3490) -\3751 = OR(\2997, \3492, \479) -\3752 = OR(\2998, \3493, \490) -\3753 = NOT(\3000) -\3754 = NOT(\3003) -\3755 = NOT(\3007) -\3756 = NOT(\3010) -\3757 = OR(\3013, \3502) -\3758 = AND(\1315, \446, \3003) -\3759 = OR(\3014, \3503) -\3760 = AND(\1315, \446, \3010) -\3761 = AND(\1675, \3000) -\3762 = AND(\1675, \3007) -\3763 = OR(\3023, \3504) -\3764 = OR(\3024, \3505) -\3765 = OR(\3025, \3506) -\3766 = OR(\3026, \3507) -\3767 = OR(\3027, \3508, \457) -\3768 = OR(\3028, \3509, \468) -\3769 = OR(\3029, \3510, \422) -\3770 = OR(\3030, \3511, \435) -\3771 = NAND(\3512, \3513) -\3775 = NAND(\3514, \3515) -\3779 = NOT(\3035) -\3780 = NOT(\3038) -\3781 = AND(\117, \3097, \1769) -\3782 = AND(\126, \3097, \1769) -\3783 = AND(\127, \3097, \1769) -\3784 = AND(\128, \3097, \1769) -\3785 = AND(\131, \3119, \1785) -\3786 = AND(\129, \3119, \1785) -\3787 = AND(\119, \3119, \1785) -\3788 = AND(\130, \3119, \1785) -\3789 = NAND(\3558, \3559) -\3793 = NAND(\3560, \3561) -\3797 = NAND(\3562, \3563) -\3800 = AND(\122, \3147, \1800) -\3801 = AND(\113, \3147, \1800) -\3802 = AND(\53, \3147, \1800) -\3803 = AND(\114, \3147, \1800) -\3804 = AND(\115, \3147, \1800) -\3805 = AND(\52, \3169, \1814) -\3806 = AND(\112, \3169, \1814) -\3807 = AND(\116, \3169, \1814) -\3808 = AND(\121, \3169, \1814) -\3809 = AND(\123, \3169, \1814) -\3810 = NAND(\3607, \3608) -\3813 = NAND(\3605, \3606) -\3816 = AND(\3482, \2984) -\3819 = OR(\2996, \3491) -\3822 = NOT(\3200) -\3823 = NAND(\3200, \3203) -\3824 = NAND(\3609, \3610) -\3827 = NOT(\3456) -\3828 = OR(\3739, \2970) -\3829 = OR(\3740, \2971) -\3830 = OR(\3741, \2972) -\3831 = OR(\3738, \2969) -\3834 = NOT(\3664) -\3835 = NOT(\3665) -\3836 = NOT(\3666) -\3837 = NOT(\3667) -\3838 = NOT(\3672) -\3839 = NOT(\3673) -\3840 = NOT(\3674) -\3841 = NOT(\3675) -\3842 = OR(\3681, \2868) -\3849 = OR(\3682, \2869) -\3855 = OR(\3683, \2870) -\3861 = OR(\3684, \2871) -\3867 = OR(\3685, \2872) -\3873 = OR(\3686, \2873) -\3881 = OR(\3687, \2874) -\3887 = OR(\3688, \2875) -\3893 = OR(\3689, \2876) -\3908 = NOT(\3701) -\3909 = NOT(\3702) -\3911 = NOT(\3700) -\3914 = NOT(\3708) -\3915 = NOT(\3709) -\3916 = NOT(\3710) -\3917 = NOT(\3715) -\3918 = NOT(\3716) -\3919 = NOT(\3717) -\3920 = NOT(\3718) -\3921 = OR(\3724, \2955) -\3927 = OR(\3725, \2956) -\3933 = OR(\3726, \2957) -\3942 = OR(\3727, \2959) -\3948 = OR(\3728, \2960) -\3956 = OR(\3729, \2961) -\3962 = OR(\3730, \2962) -\3968 = OR(\3731, \2963) -\3975 = NOT(\3742) -\3976 = NOT(\3743) -\3977 = NOT(\3744) -\3978 = NOT(\3749) -\3979 = NOT(\3750) -\3980 = AND(\446, \1292, \3754) -\3981 = AND(\446, \1292, \3756) -\3982 = AND(\1271, \3753) -\3983 = AND(\1271, \3755) -\3984 = NOT(\3757) -\3987 = NOT(\3759) -\3988 = NOT(\3763) -\3989 = NOT(\3764) -\3990 = NOT(\3765) -\3991 = NOT(\3766) -\3998 = AND(\3456, \3119, \3130) -\4008 = OR(\3723, \2954) -\4011 = OR(\3680, \2867) -\4021 = NOT(\3748) -\4024 = NAND(\1968, \3822) -\4027 = NOT(\3705) -\4031 = AND(\3828, \1583) -\4032 = AND(\24, \2882, \3691) -\4033 = AND(\25, \1482, \3691) -\4034 = AND(\26, \2882, \3691) -\4035 = AND(\81, \1482, \3691) -\4036 = AND(\3829, \1583) -\4037 = AND(\79, \2882, \3691) -\4038 = AND(\23, \1482, \3691) -\4039 = AND(\82, \2882, \3691) -\4040 = AND(\80, \1482, \3691) -\4041 = AND(\3830, \1583) -\4042 = AND(\3831, \1583) -\4067 = AND(\3732, \514) -\4080 = AND(\514, \3732) -\4088 = AND(\3834, \3668) -\4091 = AND(\3835, \3669) -\4094 = AND(\3836, \3670) -\4097 = AND(\3837, \3671) -\4100 = AND(\3838, \3676) -\4103 = AND(\3839, \3677) -\4106 = AND(\3840, \3678) -\4109 = AND(\3841, \3679) -\4144 = AND(\3908, \3703) -\4147 = AND(\3909, \3704) -\4150 = BUFF(\3705) -\4153 = AND(\3914, \3711) -\4156 = AND(\3915, \3712) -\4159 = AND(\3916, \3713) -\4183 = OR(\3758, \3980) -\4184 = OR(\3760, \3981) -\4185 = OR(\3761, \3982, \446) -\4186 = OR(\3762, \3983, \446) -\4188 = NOT(\3771) -\4191 = NOT(\3775) -\4196 = AND(\3775, \3771, \3035) -\4197 = AND(\3987, \3119, \3130) -\4198 = AND(\3920, \3722) -\4199 = NOT(\3816) -\4200 = NOT(\3789) -\4203 = NOT(\3793) -\4206 = BUFF(\3797) -\4209 = BUFF(\3797) -\4212 = BUFF(\3732) -\4215 = BUFF(\3732) -\4219 = BUFF(\3732) -\4223 = NOT(\3810) -\4224 = NOT(\3813) -\4225 = AND(\3918, \3720) -\4228 = AND(\3919, \3721) -\4231 = AND(\3991, \3770) -\4234 = AND(\3917, \3719) -\4237 = AND(\3989, \3768) -\4240 = AND(\3990, \3769) -\4243 = AND(\3988, \3767) -\4246 = AND(\3976, \3746) -\4249 = AND(\3977, \3747) -\4252 = AND(\3975, \3745) -\4255 = AND(\3978, \3751) -\4258 = AND(\3979, \3752) -\4263 = NOT(\3819) -\4264 = NAND(\4024, \3823) -\4267 = NOT(\3824) -\4268 = AND(\446, \3893) -\4269 = NOT(\3911) -\4270 = NOT(\3984) -\4271 = AND(\3893, \446) -\4272 = NOT(\4031) -\4273 = OR(\4032, \4033, \3614, \3615) -\4274 = OR(\4034, \4035, \3625, \3626) -\4275 = NOT(\4036) -\4276 = OR(\4037, \4038, \3636, \3637) -\4277 = OR(\4039, \4040, \3639, \3640) -\4278 = NOT(\4041) -\4279 = NOT(\4042) -\4280 = AND(\3887, \457) -\4284 = AND(\3881, \468) -\4290 = AND(\422, \3873) -\4297 = AND(\3867, \435) -\4298 = AND(\3861, \389) -\4301 = AND(\3855, \400) -\4305 = AND(\3849, \411) -\4310 = AND(\3842, \374) -\4316 = AND(\457, \3887) -\4320 = AND(\468, \3881) -\4325 = AND(\422, \3873) -\4331 = AND(\435, \3867) -\4332 = AND(\389, \3861) -\4336 = AND(\400, \3855) -\4342 = AND(\411, \3849) -\4349 = AND(\374, \3842) -\4357 = NOT(\3968) -\4364 = NOT(\3962) -\4375 = BUFF(\3962) -\4379 = AND(\3956, \479) -\4385 = AND(\490, \3948) -\4392 = AND(\3942, \503) -\4396 = AND(\3933, \523) -\4400 = AND(\3927, \534) -\4405 = NOT(\3921) -\4412 = BUFF(\3921) -\4418 = NOT(\3968) -\4425 = NOT(\3962) -\4436 = BUFF(\3962) -\4440 = AND(\479, \3956) -\4445 = AND(\490, \3948) -\4451 = AND(\503, \3942) -\4456 = AND(\523, \3933) -\4462 = AND(\534, \3927) -\4469 = BUFF(\3921) -\4477 = NOT(\3921) -\4512 = BUFF(\3968) -\4515 = NOT(\4183) -\4516 = NOT(\4184) -\4521 = NOT(\4008) -\4523 = NOT(\4011) -\4524 = NOT(\4198) -\4532 = NOT(\3984) -\4547 = AND(\3911, \3169, \3180) -\4548 = BUFF(\3893) -\4551 = BUFF(\3887) -\4554 = BUFF(\3881) -\4557 = BUFF(\3873) -\4560 = BUFF(\3867) -\4563 = BUFF(\3861) -\4566 = BUFF(\3855) -\4569 = BUFF(\3849) -\4572 = BUFF(\3842) -\4575 = NOR(\422, \3873) -\4578 = BUFF(\3893) -\4581 = BUFF(\3887) -\4584 = BUFF(\3881) -\4587 = BUFF(\3867) -\4590 = BUFF(\3861) -\4593 = BUFF(\3855) -\4596 = BUFF(\3849) -\4599 = BUFF(\3873) -\4602 = BUFF(\3842) -\4605 = NOR(\422, \3873) -\4608 = NOR(\374, \3842) -\4611 = BUFF(\3956) -\4614 = BUFF(\3948) -\4617 = BUFF(\3942) -\4621 = BUFF(\3933) -\4624 = BUFF(\3927) -\4627 = NOR(\490, \3948) -\4630 = BUFF(\3956) -\4633 = BUFF(\3942) -\4637 = BUFF(\3933) -\4640 = BUFF(\3927) -\4643 = BUFF(\3948) -\4646 = NOR(\490, \3948) -\4649 = BUFF(\3927) -\4652 = BUFF(\3933) -\4655 = BUFF(\3921) -\4658 = BUFF(\3942) -\4662 = BUFF(\3956) -\4665 = BUFF(\3948) -\4668 = BUFF(\3968) -\4671 = BUFF(\3962) -\4674 = BUFF(\3873) -\4677 = BUFF(\3867) -\4680 = BUFF(\3887) -\4683 = BUFF(\3881) -\4686 = BUFF(\3893) -\4689 = BUFF(\3849) -\4692 = BUFF(\3842) -\4695 = BUFF(\3861) -\4698 = BUFF(\3855) -\4701 = NAND(\3813, \4223) -\4702 = NAND(\3810, \4224) -\4720 = NOT(\4021) -\4721 = NAND(\4021, \4263) -\4724 = NOT(\4147) -\4725 = NOT(\4144) -\4726 = NOT(\4159) -\4727 = NOT(\4156) -\4728 = NOT(\4153) -\4729 = NOT(\4097) -\4730 = NOT(\4094) -\4731 = NOT(\4091) -\4732 = NOT(\4088) -\4733 = NOT(\4109) -\4734 = NOT(\4106) -\4735 = NOT(\4103) -\4736 = NOT(\4100) -\4737 = AND(\4273, \2877) -\4738 = AND(\4274, \2877) -\4739 = AND(\4276, \2877) -\4740 = AND(\4277, \2877) -\4741 = AND(\4150, \1758, \1755) -\4855 = NOT(\4212) -\4856 = NAND(\4212, \2712) -\4908 = NAND(\4215, \2718) -\4909 = NOT(\4215) -\4939 = AND(\4515, \4185) -\4942 = AND(\4516, \4186) -\4947 = NOT(\4219) -\4953 = AND(\4188, \3775, \3779) -\4954 = AND(\3771, \4191, \3780) -\4955 = AND(\4191, \4188, \3038) -\4956 = AND(\4109, \3097, \3108) -\4957 = AND(\4106, \3097, \3108) -\4958 = AND(\4103, \3097, \3108) -\4959 = AND(\4100, \3097, \3108) -\4960 = AND(\4159, \3119, \3130) -\4961 = AND(\4156, \3119, \3130) -\4965 = NOT(\4225) -\4966 = NOT(\4228) -\4967 = NOT(\4231) -\4968 = NOT(\4234) -\4972 = NOT(\4246) -\4973 = NOT(\4249) -\4974 = NOT(\4252) -\4975 = NAND(\4252, \4199) -\4976 = NOT(\4206) -\4977 = NOT(\4209) -\4978 = AND(\3793, \3789, \4206) -\4979 = AND(\4203, \4200, \4209) -\4980 = AND(\4097, \3147, \3158) -\4981 = AND(\4094, \3147, \3158) -\4982 = AND(\4091, \3147, \3158) -\4983 = AND(\4088, \3147, \3158) -\4984 = AND(\4153, \3169, \3180) -\4985 = AND(\4147, \3169, \3180) -\4986 = AND(\4144, \3169, \3180) -\4987 = AND(\4150, \3169, \3180) -\5049 = NAND(\4701, \4702) -\5052 = NOT(\4237) -\5053 = NOT(\4240) -\5054 = NOT(\4243) -\5055 = NOT(\4255) -\5056 = NOT(\4258) -\5057 = NAND(\3819, \4720) -\5058 = NOT(\4264) -\5059 = NAND(\4264, \4267) -\5060 = AND(\4724, \4725, \4269, \4027) -\5061 = AND(\4726, \4727, \3827, \4728) -\5062 = AND(\4729, \4730, \4731, \4732) -\5063 = AND(\4733, \4734, \4735, \4736) -\5065 = AND(\4357, \4375) -\5066 = AND(\4364, \4357, \4379) -\5067 = AND(\4418, \4436) -\5068 = AND(\4425, \4418, \4440) -\5069 = NOT(\4548) -\5070 = NAND(\4548, \2628) -\5071 = NOT(\4551) -\5072 = NAND(\4551, \2629) -\5073 = NOT(\4554) -\5074 = NAND(\4554, \2630) -\5075 = NOT(\4557) -\5076 = NAND(\4557, \2631) -\5077 = NOT(\4560) -\5078 = NAND(\4560, \2632) -\5079 = NOT(\4563) -\5080 = NAND(\4563, \2633) -\5081 = NOT(\4566) -\5082 = NAND(\4566, \2634) -\5083 = NOT(\4569) -\5084 = NAND(\4569, \2635) -\5085 = NOT(\4572) -\5086 = NAND(\4572, \2636) -\5087 = NOT(\4575) -\5088 = NAND(\4578, \2638) -\5089 = NOT(\4578) -\5090 = NAND(\4581, \2639) -\5091 = NOT(\4581) -\5092 = NAND(\4584, \2640) -\5093 = NOT(\4584) -\5094 = NAND(\4587, \2641) -\5095 = NOT(\4587) -\5096 = NAND(\4590, \2642) -\5097 = NOT(\4590) -\5098 = NAND(\4593, \2643) -\5099 = NOT(\4593) -\5100 = NAND(\4596, \2644) -\5101 = NOT(\4596) -\5102 = NAND(\4599, \2645) -\5103 = NOT(\4599) -\5104 = NAND(\4602, \2646) -\5105 = NOT(\4602) -\5106 = NOT(\4611) -\5107 = NAND(\4611, \2709) -\5108 = NOT(\4614) -\5109 = NAND(\4614, \2710) -\5110 = NOT(\4617) -\5111 = NAND(\4617, \2711) -\5112 = NAND(\1890, \4855) -\5113 = NOT(\4621) -\5114 = NAND(\4621, \2713) -\5115 = NOT(\4624) -\5116 = NAND(\4624, \2714) -\5117 = AND(\4364, \4379) -\5118 = AND(\4364, \4379) -\5119 = AND(\54, \4405) -\5120 = NOT(\4627) -\5121 = NAND(\4630, \2716) -\5122 = NOT(\4630) -\5123 = NAND(\4633, \2717) -\5124 = NOT(\4633) -\5125 = NAND(\1908, \4909) -\5126 = NAND(\4637, \2719) -\5127 = NOT(\4637) -\5128 = NAND(\4640, \2720) -\5129 = NOT(\4640) -\5130 = NAND(\4643, \2721) -\5131 = NOT(\4643) -\5132 = AND(\4425, \4440) -\5133 = AND(\4425, \4440) -\5135 = NOT(\4649) -\5136 = NOT(\4652) -\5137 = NAND(\4655, \4521) -\5138 = NOT(\4655) -\5139 = NOT(\4658) -\5140 = NAND(\4658, \4947) -\5141 = NOT(\4674) -\5142 = NOT(\4677) -\5143 = NOT(\4680) -\5144 = NOT(\4683) -\5145 = NAND(\4686, \4523) -\5146 = NOT(\4686) -\5147 = NOR(\4953, \4196) -\5148 = NOR(\4954, \4955) -\5150 = NOT(\4524) -\5153 = NAND(\4228, \4965) -\5154 = NAND(\4225, \4966) -\5155 = NAND(\4234, \4967) -\5156 = NAND(\4231, \4968) -\5157 = NOT(\4532) -\5160 = NAND(\4249, \4972) -\5161 = NAND(\4246, \4973) -\5162 = NAND(\3816, \4974) -\5163 = AND(\4200, \3793, \4976) -\5164 = AND(\3789, \4203, \4977) -\5165 = AND(\4942, \3147, \3158) -\5166 = NOT(\4512) -\5169 = BUFF(\4290) -\5172 = NOT(\4605) -\5173 = BUFF(\4325) -\5176 = NOT(\4608) -\5177 = BUFF(\4349) -\5180 = BUFF(\4405) -\5183 = BUFF(\4357) -\5186 = BUFF(\4357) -\5189 = BUFF(\4364) -\5192 = BUFF(\4364) -\5195 = BUFF(\4385) -\5198 = NOT(\4646) -\5199 = BUFF(\4418) -\5202 = BUFF(\4425) -\5205 = BUFF(\4445) -\5208 = BUFF(\4418) -\5211 = BUFF(\4425) -\5214 = BUFF(\4477) -\5217 = BUFF(\4469) -\5220 = BUFF(\4477) -\5223 = NOT(\4662) -\5224 = NOT(\4665) -\5225 = NOT(\4668) -\5226 = NOT(\4671) -\5227 = NOT(\4689) -\5228 = NOT(\4692) -\5229 = NOT(\4695) -\5230 = NOT(\4698) -\5232 = NAND(\4240, \5052) -\5233 = NAND(\4237, \5053) -\5234 = NAND(\4258, \5055) -\5235 = NAND(\4255, \5056) -\5236 = NAND(\4721, \5057) -\5239 = NAND(\3824, \5058) -\5240 = AND(\5060, \5061, \4270) -\5241 = NOT(\4939) -\5242 = NAND(\1824, \5069) -\5243 = NAND(\1827, \5071) -\5244 = NAND(\1830, \5073) -\5245 = NAND(\1833, \5075) -\5246 = NAND(\1836, \5077) -\5247 = NAND(\1839, \5079) -\5248 = NAND(\1842, \5081) -\5249 = NAND(\1845, \5083) -\5250 = NAND(\1848, \5085) -\5252 = NAND(\1854, \5089) -\5253 = NAND(\1857, \5091) -\5254 = NAND(\1860, \5093) -\5255 = NAND(\1863, \5095) -\5256 = NAND(\1866, \5097) -\5257 = NAND(\1869, \5099) -\5258 = NAND(\1872, \5101) -\5259 = NAND(\1875, \5103) -\5260 = NAND(\1878, \5105) -\5261 = NAND(\1881, \5106) -\5262 = NAND(\1884, \5108) -\5263 = NAND(\1887, \5110) -\5264 = NAND(\5112, \4856) -\5274 = NAND(\1893, \5113) -\5275 = NAND(\1896, \5115) -\5282 = NAND(\1902, \5122) -\5283 = NAND(\1905, \5124) -\5284 = NAND(\4908, \5125) -\5298 = NAND(\1911, \5127) -\5299 = NAND(\1914, \5129) -\5300 = NAND(\1917, \5131) -\5303 = NAND(\4652, \5135) -\5304 = NAND(\4649, \5136) -\5305 = NAND(\4008, \5138) -\5306 = NAND(\4219, \5139) -\5307 = NAND(\4677, \5141) -\5308 = NAND(\4674, \5142) -\5309 = NAND(\4683, \5143) -\5310 = NAND(\4680, \5144) -\5311 = NAND(\4011, \5146) -\5312 = NOT(\5049) -\5315 = NAND(\5153, \5154) -\5319 = NAND(\5155, \5156) -\5324 = NAND(\5160, \5161) -\5328 = NAND(\5162, \4975) -\5331 = NOR(\5163, \4978) -\5332 = NOR(\5164, \4979) -\5346 = OR(\4412, \5119) -\5363 = NAND(\4665, \5223) -\5364 = NAND(\4662, \5224) -\5365 = NAND(\4671, \5225) -\5366 = NAND(\4668, \5226) -\5367 = NAND(\4692, \5227) -\5368 = NAND(\4689, \5228) -\5369 = NAND(\4698, \5229) -\5370 = NAND(\4695, \5230) -\5371 = NAND(\5148, \5147) -\5374 = BUFF(\4939) -\5377 = NAND(\5232, \5233) -\5382 = NAND(\5234, \5235) -\5385 = NAND(\5239, \5059) -\5388 = AND(\5062, \5063, \5241) -\5389 = NAND(\5242, \5070) -\5396 = NAND(\5243, \5072) -\5407 = NAND(\5244, \5074) -\5418 = NAND(\5245, \5076) -\5424 = NAND(\5246, \5078) -\5431 = NAND(\5247, \5080) -\5441 = NAND(\5248, \5082) -\5452 = NAND(\5249, \5084) -\5462 = NAND(\5250, \5086) -\5469 = NOT(\5169) -\5470 = NAND(\5088, \5252) -\5477 = NAND(\5090, \5253) -\5488 = NAND(\5092, \5254) -\5498 = NAND(\5094, \5255) -\5506 = NAND(\5096, \5256) -\5520 = NAND(\5098, \5257) -\5536 = NAND(\5100, \5258) -\5549 = NAND(\5102, \5259) -\5555 = NAND(\5104, \5260) -\5562 = NAND(\5261, \5107) -\5573 = NAND(\5262, \5109) -\5579 = NAND(\5263, \5111) -\5595 = NAND(\5274, \5114) -\5606 = NAND(\5275, \5116) -\5616 = NAND(\5180, \2715) -\5617 = NOT(\5180) -\5618 = NOT(\5183) -\5619 = NOT(\5186) -\5620 = NOT(\5189) -\5621 = NOT(\5192) -\5622 = NOT(\5195) -\5624 = NAND(\5121, \5282) -\5634 = NAND(\5123, \5283) -\5655 = NAND(\5126, \5298) -\5671 = NAND(\5128, \5299) -\5684 = NAND(\5130, \5300) -\5690 = NOT(\5202) -\5691 = NOT(\5211) -\5692 = NAND(\5303, \5304) -\5696 = NAND(\5137, \5305) -\5700 = NAND(\5306, \5140) -\5703 = NAND(\5307, \5308) -\5707 = NAND(\5309, \5310) -\5711 = NAND(\5145, \5311) -\5726 = AND(\5166, \4512) -\5727 = NOT(\5173) -\5728 = NOT(\5177) -\5730 = NOT(\5199) -\5731 = NOT(\5205) -\5732 = NOT(\5208) -\5733 = NOT(\5214) -\5734 = NOT(\5217) -\5735 = NOT(\5220) -\5736 = NAND(\5365, \5366) -\5739 = NAND(\5363, \5364) -\5742 = NAND(\5369, \5370) -\5745 = NAND(\5367, \5368) -\5755 = NOT(\5236) -\5756 = NAND(\5332, \5331) -\5954 = AND(\5264, \4396) -\5955 = NAND(\1899, \5617) -\5956 = NOT(\5346) -\6005 = AND(\5284, \4456) -\6006 = AND(\5284, \4456) -\6023 = NOT(\5371) -\6024 = NAND(\5371, \5312) -\6025 = NOT(\5315) -\6028 = NOT(\5324) -\6031 = BUFF(\5319) -\6034 = BUFF(\5319) -\6037 = BUFF(\5328) -\6040 = BUFF(\5328) -\6044 = NOT(\5385) -\6045 = OR(\5166, \5726) -\6048 = BUFF(\5264) -\6051 = BUFF(\5284) -\6054 = BUFF(\5284) -\6065 = NOT(\5374) -\6066 = NAND(\5374, \5054) -\6067 = NOT(\5377) -\6068 = NOT(\5382) -\6069 = NAND(\5382, \5755) -\6071 = AND(\5470, \4316) -\6072 = AND(\5477, \5470, \4320) -\6073 = AND(\5488, \5470, \4325, \5477) -\6074 = AND(\5562, \4357, \4385, \4364) -\6075 = AND(\5389, \4280) -\6076 = AND(\5396, \5389, \4284) -\6077 = AND(\5407, \5389, \4290, \5396) -\6078 = AND(\5624, \4418, \4445, \4425) -\6079 = NOT(\5418) -\6080 = AND(\5396, \5418, \5407, \5389) -\6083 = AND(\5396, \4284) -\6084 = AND(\5407, \4290, \5396) -\6085 = AND(\5418, \5407, \5396) -\6086 = AND(\5396, \4284) -\6087 = AND(\4290, \5407, \5396) -\6088 = AND(\5407, \4290) -\6089 = AND(\5418, \5407) -\6090 = AND(\5407, \4290) -\6091 = AND(\5431, \5462, \5441, \5424, \5452) -\6094 = AND(\5424, \4298) -\6095 = AND(\5431, \5424, \4301) -\6096 = AND(\5441, \5424, \4305, \5431) -\6097 = AND(\5452, \5441, \5424, \4310, \5431) -\6098 = AND(\5431, \4301) -\6099 = AND(\5441, \4305, \5431) -\6100 = AND(\5452, \5441, \4310, \5431) -\6101 = AND(\4, \5462, \5441, \5452, \5431) -\6102 = AND(\4305, \5441) -\6103 = AND(\5452, \5441, \4310) -\6104 = AND(\4, \5462, \5441, \5452) -\6105 = AND(\5452, \4310) -\6106 = AND(\4, \5462, \5452) -\6107 = AND(\4, \5462) -\6108 = AND(\5549, \5488, \5477, \5470) -\6111 = AND(\5477, \4320) -\6112 = AND(\5488, \4325, \5477) -\6113 = AND(\5549, \5488, \5477) -\6114 = AND(\5477, \4320) -\6115 = AND(\5488, \4325, \5477) -\6116 = AND(\5488, \4325) -\6117 = AND(\5555, \5536, \5520, \5506, \5498) -\6120 = AND(\5498, \4332) -\6121 = AND(\5506, \5498, \4336) -\6122 = AND(\5520, \5498, \4342, \5506) -\6123 = AND(\5536, \5520, \5498, \4349, \5506) -\6124 = AND(\5506, \4336) -\6125 = AND(\5520, \4342, \5506) -\6126 = AND(\5536, \5520, \4349, \5506) -\6127 = AND(\5555, \5520, \5506, \5536) -\6128 = AND(\5506, \4336) -\6129 = AND(\5520, \4342, \5506) -\6130 = AND(\5536, \5520, \4349, \5506) -\6131 = AND(\5520, \4342) -\6132 = AND(\5536, \5520, \4349) -\6133 = AND(\5555, \5520, \5536) -\6134 = AND(\5520, \4342) -\6135 = AND(\5536, \5520, \4349) -\6136 = AND(\5536, \4349) -\6137 = AND(\5549, \5488) -\6138 = AND(\5555, \5536) -\6139 = NOT(\5573) -\6140 = AND(\4364, \5573, \5562, \4357) -\6143 = AND(\5562, \4385, \4364) -\6144 = AND(\5573, \5562, \4364) -\6145 = AND(\4385, \5562, \4364) -\6146 = AND(\5562, \4385) -\6147 = AND(\5573, \5562) -\6148 = AND(\5562, \4385) -\6149 = AND(\5264, \4405, \5595, \5579, \5606) -\6152 = AND(\5579, \4067) -\6153 = AND(\5264, \5579, \4396) -\6154 = AND(\5595, \5579, \4400, \5264) -\6155 = AND(\5606, \5595, \5579, \4412, \5264) -\6156 = AND(\5595, \4400, \5264) -\6157 = AND(\5606, \5595, \4412, \5264) -\6158 = AND(\54, \4405, \5595, \5606, \5264) -\6159 = AND(\4400, \5595) -\6160 = AND(\5606, \5595, \4412) -\6161 = AND(\54, \4405, \5595, \5606) -\6162 = AND(\5606, \4412) -\6163 = AND(\54, \4405, \5606) -\6164 = NAND(\5616, \5955) -\6168 = AND(\5684, \5624, \4425, \4418) -\6171 = AND(\5624, \4445, \4425) -\6172 = AND(\5684, \5624, \4425) -\6173 = AND(\5624, \4445, \4425) -\6174 = AND(\5624, \4445) -\6175 = AND(\4477, \5671, \5655, \5284, \5634) -\6178 = AND(\5634, \4080) -\6179 = AND(\5284, \5634, \4456) -\6180 = AND(\5655, \5634, \4462, \5284) -\6181 = AND(\5671, \5655, \5634, \4469, \5284) -\6182 = AND(\5655, \4462, \5284) -\6183 = AND(\5671, \5655, \4469, \5284) -\6184 = AND(\4477, \5655, \5284, \5671) -\6185 = AND(\5655, \4462, \5284) -\6186 = AND(\5671, \5655, \4469, \5284) -\6187 = AND(\5655, \4462) -\6188 = AND(\5671, \5655, \4469) -\6189 = AND(\4477, \5655, \5671) -\6190 = AND(\5655, \4462) -\6191 = AND(\5671, \5655, \4469) -\6192 = AND(\5671, \4469) -\6193 = AND(\5684, \5624) -\6194 = AND(\4477, \5671) -\6197 = NOT(\5692) -\6200 = NOT(\5696) -\6203 = NOT(\5703) -\6206 = NOT(\5707) -\6209 = BUFF(\5700) -\6212 = BUFF(\5700) -\6215 = BUFF(\5711) -\6218 = BUFF(\5711) -\6221 = NAND(\5049, \6023) -\6234 = NOT(\5756) -\6235 = NAND(\5756, \6044) -\6238 = BUFF(\5462) -\6241 = BUFF(\5389) -\6244 = BUFF(\5389) -\6247 = BUFF(\5396) -\6250 = BUFF(\5396) -\6253 = BUFF(\5407) -\6256 = BUFF(\5407) -\6259 = BUFF(\5424) -\6262 = BUFF(\5431) -\6265 = BUFF(\5441) -\6268 = BUFF(\5452) -\6271 = BUFF(\5549) -\6274 = BUFF(\5488) -\6277 = BUFF(\5470) -\6280 = BUFF(\5477) -\6283 = BUFF(\5549) -\6286 = BUFF(\5488) -\6289 = BUFF(\5470) -\6292 = BUFF(\5477) -\6295 = BUFF(\5555) -\6298 = BUFF(\5536) -\6301 = BUFF(\5498) -\6304 = BUFF(\5520) -\6307 = BUFF(\5506) -\6310 = BUFF(\5506) -\6313 = BUFF(\5555) -\6316 = BUFF(\5536) -\6319 = BUFF(\5498) -\6322 = BUFF(\5520) -\6325 = BUFF(\5562) -\6328 = BUFF(\5562) -\6331 = BUFF(\5579) -\6335 = BUFF(\5595) -\6338 = BUFF(\5606) -\6341 = BUFF(\5684) -\6344 = BUFF(\5624) -\6347 = BUFF(\5684) -\6350 = BUFF(\5624) -\6353 = BUFF(\5671) -\6356 = BUFF(\5634) -\6359 = BUFF(\5655) -\6364 = BUFF(\5671) -\6367 = BUFF(\5634) -\6370 = BUFF(\5655) -\6373 = NOT(\5736) -\6374 = NOT(\5739) -\6375 = NOT(\5742) -\6376 = NOT(\5745) -\6377 = NAND(\4243, \6065) -\6378 = NAND(\5236, \6068) -\6382 = OR(\4268, \6071, \6072, \6073) -\6386 = OR(\3968, \5065, \5066, \6074) -\6388 = OR(\4271, \6075, \6076, \6077) -\6392 = OR(\3968, \5067, \5068, \6078) -\6397 = OR(\4297, \6094, \6095, \6096, \6097) -\6411 = OR(\4320, \6116) -\6415 = OR(\4331, \6120, \6121, \6122, \6123) -\6419 = OR(\4342, \6136) -\6427 = OR(\4392, \6152, \6153, \6154, \6155) -\6434 = NOT(\6048) -\6437 = OR(\4440, \6174) -\6441 = OR(\4451, \6178, \6179, \6180, \6181) -\6445 = OR(\4462, \6192) -\6448 = NOT(\6051) -\6449 = NOT(\6054) -\6466 = NAND(\6221, \6024) -\6469 = NOT(\6031) -\6470 = NOT(\6034) -\6471 = NOT(\6037) -\6472 = NOT(\6040) -\6473 = AND(\5315, \4524, \6031) -\6474 = AND(\6025, \5150, \6034) -\6475 = AND(\5324, \4532, \6037) -\6476 = AND(\6028, \5157, \6040) -\6477 = NAND(\5385, \6234) -\6478 = NAND(\6045, \132) -\6482 = OR(\4280, \6083, \6084, \6085) -\6486 = NOR(\4280, \6086, \6087) -\6490 = OR(\4284, \6088, \6089) -\6494 = NOR(\4284, \6090) -\6500 = OR(\4298, \6098, \6099, \6100, \6101) -\6504 = OR(\4301, \6102, \6103, \6104) -\6508 = OR(\4305, \6105, \6106) -\6512 = OR(\4310, \6107) -\6516 = OR(\4316, \6111, \6112, \6113) -\6526 = NOR(\4316, \6114, \6115) -\6536 = OR(\4336, \6131, \6132, \6133) -\6539 = OR(\4332, \6124, \6125, \6126, \6127) -\6553 = NOR(\4336, \6134, \6135) -\6556 = NOR(\4332, \6128, \6129, \6130) -\6566 = OR(\4375, \5117, \6143, \6144) -\6569 = NOR(\4375, \5118, \6145) -\6572 = OR(\4379, \6146, \6147) -\6575 = NOR(\4379, \6148) -\6580 = OR(\4067, \5954, \6156, \6157, \6158) -\6584 = OR(\4396, \6159, \6160, \6161) -\6587 = OR(\4400, \6162, \6163) -\6592 = OR(\4436, \5132, \6171, \6172) -\6599 = NOR(\4436, \5133, \6173) -\6606 = OR(\4456, \6187, \6188, \6189) -\6609 = OR(\4080, \6005, \6182, \6183, \6184) -\6619 = NOR(\4456, \6190, \6191) -\6622 = NOR(\4080, \6006, \6185, \6186) -\6630 = NAND(\5739, \6373) -\6631 = NAND(\5736, \6374) -\6632 = NAND(\5745, \6375) -\6633 = NAND(\5742, \6376) -\6634 = NAND(\6377, \6066) -\6637 = NAND(\6069, \6378) -\6640 = NOT(\6164) -\6641 = AND(\6108, \6117) -\6643 = AND(\6140, \6149) -\6646 = AND(\6168, \6175) -\6648 = AND(\6080, \6091) -\6650 = NAND(\6238, \2637) -\6651 = NOT(\6238) -\6653 = NOT(\6241) -\6655 = NOT(\6244) -\6657 = NOT(\6247) -\6659 = NOT(\6250) -\6660 = NAND(\6253, \5087) -\6661 = NOT(\6253) -\6662 = NAND(\6256, \5469) -\6663 = NOT(\6256) -\6664 = AND(\6091, \4) -\6666 = NOT(\6259) -\6668 = NOT(\6262) -\6670 = NOT(\6265) -\6672 = NOT(\6268) -\6675 = NOT(\6117) -\6680 = NOT(\6280) -\6681 = NOT(\6292) -\6682 = NOT(\6307) -\6683 = NOT(\6310) -\6689 = NAND(\6325, \5120) -\6690 = NOT(\6325) -\6691 = NAND(\6328, \5622) -\6692 = NOT(\6328) -\6693 = AND(\6149, \54) -\6695 = NOT(\6331) -\6698 = NOT(\6335) -\6699 = NAND(\6338, \5956) -\6700 = NOT(\6338) -\6703 = NOT(\6175) -\6708 = NOT(\6209) -\6709 = NOT(\6212) -\6710 = NOT(\6215) -\6711 = NOT(\6218) -\6712 = AND(\5696, \5692, \6209) -\6713 = AND(\6200, \6197, \6212) -\6714 = AND(\5707, \5703, \6215) -\6715 = AND(\6206, \6203, \6218) -\6716 = BUFF(\6466) -\6718 = AND(\6164, \1777, \3130) -\6719 = AND(\5150, \5315, \6469) -\6720 = AND(\4524, \6025, \6470) -\6721 = AND(\5157, \5324, \6471) -\6722 = AND(\4532, \6028, \6472) -\6724 = NAND(\6477, \6235) -\6739 = NOT(\6271) -\6740 = NOT(\6274) -\6741 = NOT(\6277) -\6744 = NOT(\6283) -\6745 = NOT(\6286) -\6746 = NOT(\6289) -\6751 = NOT(\6295) -\6752 = NOT(\6298) -\6753 = NOT(\6301) -\6754 = NOT(\6304) -\6755 = NOT(\6322) -\6760 = NOT(\6313) -\6761 = NOT(\6316) -\6762 = NOT(\6319) -\6772 = NOT(\6341) -\6773 = NOT(\6344) -\6776 = NOT(\6347) -\6777 = NOT(\6350) -\6782 = NOT(\6353) -\6783 = NOT(\6356) -\6784 = NOT(\6359) -\6785 = NOT(\6370) -\6790 = NOT(\6364) -\6791 = NOT(\6367) -\6792 = NAND(\6630, \6631) -\6795 = NAND(\6632, \6633) -\6801 = AND(\6108, \6415) -\6802 = AND(\6427, \6140) -\6803 = AND(\6397, \6080) -\6804 = AND(\6168, \6441) -\6805 = NOT(\6466) -\6806 = NAND(\1851, \6651) -\6807 = NOT(\6482) -\6808 = NAND(\6482, \6653) -\6809 = NOT(\6486) -\6810 = NAND(\6486, \6655) -\6811 = NOT(\6490) -\6812 = NAND(\6490, \6657) -\6813 = NOT(\6494) -\6814 = NAND(\6494, \6659) -\6815 = NAND(\4575, \6661) -\6816 = NAND(\5169, \6663) -\6817 = OR(\6397, \6664) -\6823 = NOT(\6500) -\6824 = NAND(\6500, \6666) -\6825 = NOT(\6504) -\6826 = NAND(\6504, \6668) -\6827 = NOT(\6508) -\6828 = NAND(\6508, \6670) -\6829 = NOT(\6512) -\6830 = NAND(\6512, \6672) -\6831 = NOT(\6415) -\6834 = NOT(\6566) -\6835 = NAND(\6566, \5618) -\6836 = NOT(\6569) -\6837 = NAND(\6569, \5619) -\6838 = NOT(\6572) -\6839 = NAND(\6572, \5620) -\6840 = NOT(\6575) -\6841 = NAND(\6575, \5621) -\6842 = NAND(\4627, \6690) -\6843 = NAND(\5195, \6692) -\6844 = OR(\6427, \6693) -\6850 = NOT(\6580) -\6851 = NAND(\6580, \6695) -\6852 = NOT(\6584) -\6853 = NAND(\6584, \6434) -\6854 = NOT(\6587) -\6855 = NAND(\6587, \6698) -\6856 = NAND(\5346, \6700) -\6857 = NOT(\6441) -\6860 = AND(\6197, \5696, \6708) -\6861 = AND(\5692, \6200, \6709) -\6862 = AND(\6203, \5707, \6710) -\6863 = AND(\5703, \6206, \6711) -\6866 = OR(\4197, \6718, \3785) -\6872 = NOR(\6719, \6473) -\6873 = NOR(\6720, \6474) -\6874 = NOR(\6721, \6475) -\6875 = NOR(\6722, \6476) -\6876 = NOT(\6637) -\6877 = BUFF(\6724) -\6879 = AND(\6045, \6478) -\6880 = AND(\6478, \132) -\6881 = OR(\6411, \6137) -\6884 = NOT(\6516) -\6885 = NOT(\6411) -\6888 = NOT(\6526) -\6889 = NOT(\6536) -\6890 = NAND(\6536, \5176) -\6891 = OR(\6419, \6138) -\6894 = NOT(\6539) -\6895 = NOT(\6553) -\6896 = NAND(\6553, \5728) -\6897 = NOT(\6419) -\6900 = NOT(\6556) -\6901 = OR(\6437, \6193) -\6904 = NOT(\6592) -\6905 = NOT(\6437) -\6908 = NOT(\6599) -\6909 = OR(\6445, \6194) -\6912 = NOT(\6606) -\6913 = NOT(\6609) -\6914 = NOT(\6619) -\6915 = NAND(\6619, \5734) -\6916 = NOT(\6445) -\6919 = NOT(\6622) -\6922 = NOT(\6634) -\6923 = NAND(\6634, \6067) -\6924 = OR(\6382, \6801) -\6925 = OR(\6386, \6802) -\6926 = OR(\6388, \6803) -\6927 = OR(\6392, \6804) -\6930 = NOT(\6724) -\6932 = NAND(\6650, \6806) -\6935 = NAND(\6241, \6807) -\6936 = NAND(\6244, \6809) -\6937 = NAND(\6247, \6811) -\6938 = NAND(\6250, \6813) -\6939 = NAND(\6660, \6815) -\6940 = NAND(\6662, \6816) -\6946 = NAND(\6259, \6823) -\6947 = NAND(\6262, \6825) -\6948 = NAND(\6265, \6827) -\6949 = NAND(\6268, \6829) -\6953 = NAND(\5183, \6834) -\6954 = NAND(\5186, \6836) -\6955 = NAND(\5189, \6838) -\6956 = NAND(\5192, \6840) -\6957 = NAND(\6689, \6842) -\6958 = NAND(\6691, \6843) -\6964 = NAND(\6331, \6850) -\6965 = NAND(\6048, \6852) -\6966 = NAND(\6335, \6854) -\6967 = NAND(\6699, \6856) -\6973 = NOR(\6860, \6712) -\6974 = NOR(\6861, \6713) -\6975 = NOR(\6862, \6714) -\6976 = NOR(\6863, \6715) -\6977 = NOT(\6792) -\6978 = NOT(\6795) -\6979 = OR(\6879, \6880) -\6987 = NAND(\4608, \6889) -\6990 = NAND(\5177, \6895) -\6999 = NAND(\5217, \6914) -\7002 = NAND(\5377, \6922) -\7003 = NAND(\6873, \6872) -\7006 = NAND(\6875, \6874) -\7011 = AND(\6866, \2681, \2692) -\7012 = AND(\6866, \2756, \2767) -\7013 = AND(\6866, \2779, \2790) -\7015 = NOT(\6866) -\7016 = AND(\6866, \2801, \2812) -\7018 = NAND(\6935, \6808) -\7019 = NAND(\6936, \6810) -\7020 = NAND(\6937, \6812) -\7021 = NAND(\6938, \6814) -\7022 = NOT(\6939) -\7023 = NOT(\6817) -\7028 = NAND(\6946, \6824) -\7031 = NAND(\6947, \6826) -\7034 = NAND(\6948, \6828) -\7037 = NAND(\6949, \6830) -\7040 = AND(\6817, \6079) -\7041 = AND(\6831, \6675) -\7044 = NAND(\6953, \6835) -\7045 = NAND(\6954, \6837) -\7046 = NAND(\6955, \6839) -\7047 = NAND(\6956, \6841) -\7048 = NOT(\6957) -\7049 = NOT(\6844) -\7054 = NAND(\6964, \6851) -\7057 = NAND(\6965, \6853) -\7060 = NAND(\6966, \6855) -\7064 = AND(\6844, \6139) -\7065 = AND(\6857, \6703) -\7072 = NOT(\6881) -\7073 = NAND(\6881, \5172) -\7074 = NOT(\6885) -\7075 = NAND(\6885, \5727) -\7076 = NAND(\6890, \6987) -\7079 = NOT(\6891) -\7080 = NAND(\6896, \6990) -\7083 = NOT(\6897) -\7084 = NOT(\6901) -\7085 = NAND(\6901, \5198) -\7086 = NOT(\6905) -\7087 = NAND(\6905, \5731) -\7088 = NOT(\6909) -\7089 = NAND(\6909, \6912) -\7090 = NAND(\6915, \6999) -\7093 = NOT(\6916) -\7094 = NAND(\6974, \6973) -\7097 = NAND(\6976, \6975) -\7101 = NAND(\7002, \6923) -\7105 = NOT(\6932) -\7110 = NOT(\6967) -\7114 = AND(\6979, \603, \1755) -\7115 = NOT(\7019) -\7116 = NOT(\7021) -\7125 = AND(\6817, \7018) -\7126 = AND(\6817, \7020) -\7127 = AND(\6817, \7022) -\7130 = NOT(\7045) -\7131 = NOT(\7047) -\7139 = AND(\6844, \7044) -\7140 = AND(\6844, \7046) -\7141 = AND(\6844, \7048) -\7146 = AND(\6932, \1761, \3108) -\7147 = AND(\6967, \1777, \3130) -\7149 = NOT(\7003) -\7150 = NOT(\7006) -\7151 = NAND(\7006, \6876) -\7152 = NAND(\4605, \7072) -\7153 = NAND(\5173, \7074) -\7158 = NAND(\4646, \7084) -\7159 = NAND(\5205, \7086) -\7160 = NAND(\6606, \7088) -\7166 = NOT(\7037) -\7167 = NOT(\7034) -\7168 = NOT(\7031) -\7169 = NOT(\7028) -\7170 = NOT(\7060) -\7171 = NOT(\7057) -\7172 = NOT(\7054) -\7173 = AND(\7115, \7023) -\7174 = AND(\7116, \7023) -\7175 = AND(\6940, \7023) -\7176 = AND(\5418, \7023) -\7177 = NOT(\7041) -\7178 = AND(\7130, \7049) -\7179 = AND(\7131, \7049) -\7180 = AND(\6958, \7049) -\7181 = AND(\5573, \7049) -\7182 = NOT(\7065) -\7183 = NOT(\7094) -\7184 = NAND(\7094, \6977) -\7185 = NOT(\7097) -\7186 = NAND(\7097, \6978) -\7187 = AND(\7037, \1761, \3108) -\7188 = AND(\7034, \1761, \3108) -\7189 = AND(\7031, \1761, \3108) -\7190 = OR(\4956, \7146, \3781) -\7196 = AND(\7060, \1777, \3130) -\7197 = AND(\7057, \1777, \3130) -\7198 = OR(\4960, \7147, \3786) -\7204 = NAND(\7101, \7149) -\7205 = NOT(\7101) -\7206 = NAND(\6637, \7150) -\7207 = AND(\7028, \1793, \3158) -\7208 = AND(\7054, \1807, \3180) -\7209 = NAND(\7073, \7152) -\7212 = NAND(\7075, \7153) -\7215 = NOT(\7076) -\7216 = NAND(\7076, \7079) -\7217 = NOT(\7080) -\7218 = NAND(\7080, \7083) -\7219 = NAND(\7085, \7158) -\7222 = NAND(\7087, \7159) -\7225 = NAND(\7089, \7160) -\7228 = NOT(\7090) -\7229 = NAND(\7090, \7093) -\7236 = OR(\7173, \7125) -\7239 = OR(\7174, \7126) -\7242 = OR(\7175, \7127) -\7245 = OR(\7176, \7040) -\7250 = OR(\7178, \7139) -\7257 = OR(\7179, \7140) -\7260 = OR(\7180, \7141) -\7263 = OR(\7181, \7064) -\7268 = NAND(\6792, \7183) -\7269 = NAND(\6795, \7185) -\7270 = OR(\4957, \7187, \3782) -\7276 = OR(\4958, \7188, \3783) -\7282 = OR(\4959, \7189, \3784) -\7288 = OR(\4961, \7196, \3787) -\7294 = OR(\3998, \7197, \3788) -\7300 = NAND(\7003, \7205) -\7301 = NAND(\7206, \7151) -\7304 = OR(\4980, \7207, \3800) -\7310 = OR(\4984, \7208, \3805) -\7320 = NAND(\6891, \7215) -\7321 = NAND(\6897, \7217) -\7328 = NAND(\6916, \7228) -\7338 = AND(\7190, \1185, \2692) -\7339 = AND(\7198, \2681, \2692) -\7340 = AND(\7190, \1247, \2767) -\7341 = AND(\7198, \2756, \2767) -\7342 = AND(\7190, \1327, \2790) -\7349 = AND(\7198, \2779, \2790) -\7357 = AND(\7198, \2801, \2812) -\7363 = NOT(\7198) -\7364 = AND(\7190, \1351, \2812) -\7365 = NOT(\7190) -\7394 = NAND(\7268, \7184) -\7397 = NAND(\7269, \7186) -\7402 = NAND(\7204, \7300) -\7405 = NOT(\7209) -\7406 = NAND(\7209, \6884) -\7407 = NOT(\7212) -\7408 = NAND(\7212, \6888) -\7409 = NAND(\7320, \7216) -\7412 = NAND(\7321, \7218) -\7415 = NOT(\7219) -\7416 = NAND(\7219, \6904) -\7417 = NOT(\7222) -\7418 = NAND(\7222, \6908) -\7419 = NOT(\7225) -\7420 = NAND(\7225, \6913) -\7421 = NAND(\7328, \7229) -\7424 = NOT(\7245) -\7425 = NOT(\7242) -\7426 = NOT(\7239) -\7427 = NOT(\7236) -\7428 = NOT(\7263) -\7429 = NOT(\7260) -\7430 = NOT(\7257) -\7431 = NOT(\7250) -\7432 = NOT(\7250) -\7433 = AND(\7310, \2653, \2664) -\7434 = AND(\7304, \1161, \2664) -\7435 = OR(\7011, \7338, \3621, \2591) -\7436 = AND(\7270, \1185, \2692) -\7437 = AND(\7288, \2681, \2692) -\7438 = AND(\7276, \1185, \2692) -\7439 = AND(\7294, \2681, \2692) -\7440 = AND(\7282, \1185, \2692) -\7441 = AND(\7310, \2728, \2739) -\7442 = AND(\7304, \1223, \2739) -\7443 = OR(\7012, \7340, \3632, \2600) -\7444 = AND(\7270, \1247, \2767) -\7445 = AND(\7288, \2756, \2767) -\7446 = AND(\7276, \1247, \2767) -\7447 = AND(\7294, \2756, \2767) -\7448 = AND(\7282, \1247, \2767) -\7449 = OR(\7013, \7342, \3641, \2605) -\7450 = AND(\7310, \3041, \3052) -\7451 = AND(\7304, \1697, \3052) -\7452 = AND(\7294, \2779, \2790) -\7453 = AND(\7282, \1327, \2790) -\7454 = AND(\7288, \2779, \2790) -\7455 = AND(\7276, \1327, \2790) -\7456 = AND(\7270, \1327, \2790) -\7457 = AND(\7310, \3075, \3086) -\7458 = AND(\7304, \1731, \3086) -\7459 = AND(\7294, \2801, \2812) -\7460 = AND(\7282, \1351, \2812) -\7461 = AND(\7288, \2801, \2812) -\7462 = AND(\7276, \1351, \2812) -\7463 = AND(\7270, \1351, \2812) -\7464 = AND(\7250, \603, \599) -\7465 = NOT(\7310) -\7466 = NOT(\7294) -\7467 = NOT(\7288) -\7468 = NOT(\7301) -\7469 = OR(\7016, \7364, \3660, \2626) -\7470 = NOT(\7304) -\7471 = NOT(\7282) -\7472 = NOT(\7276) -\7473 = NOT(\7270) -\7474 = BUFF(\7394) -\7476 = BUFF(\7397) -\7479 = AND(\7301, \3068) -\7481 = AND(\7245, \1793, \3158) -\7482 = AND(\7242, \1793, \3158) -\7483 = AND(\7239, \1793, \3158) -\7484 = AND(\7236, \1793, \3158) -\7485 = AND(\7263, \1807, \3180) -\7486 = AND(\7260, \1807, \3180) -\7487 = AND(\7257, \1807, \3180) -\7488 = AND(\7250, \1807, \3180) -\7489 = NAND(\6979, \7250) -\7492 = NAND(\6516, \7405) -\7493 = NAND(\6526, \7407) -\7498 = NAND(\6592, \7415) -\7499 = NAND(\6599, \7417) -\7500 = NAND(\6609, \7419) -\7503 = AND(\7105, \7166, \7167, \7168, \7169, \7424, \7425, \7426, \7427) -\7504 = AND(\6640, \7110, \7170, \7171, \7172, \7428, \7429, \7430, \7431) -\7505 = OR(\7433, \7434, \3616, \2585) -\7506 = AND(\7435, \2675) -\7507 = OR(\7339, \7436, \3622, \2592) -\7508 = OR(\7437, \7438, \3623, \2593) -\7509 = OR(\7439, \7440, \3624, \2594) -\7510 = OR(\7441, \7442, \3627, \2595) -\7511 = AND(\7443, \2750) -\7512 = OR(\7341, \7444, \3633, \2601) -\7513 = OR(\7445, \7446, \3634, \2602) -\7514 = OR(\7447, \7448, \3635, \2603) -\7515 = OR(\7450, \7451, \3646, \2610) -\7516 = OR(\7452, \7453, \3647, \2611) -\7517 = OR(\7454, \7455, \3648, \2612) -\7518 = OR(\7349, \7456, \3649, \2613) -\7519 = OR(\7457, \7458, \3654, \2618) -\7520 = OR(\7459, \7460, \3655, \2619) -\7521 = OR(\7461, \7462, \3656, \2620) -\7522 = OR(\7357, \7463, \3657, \2621) -\7525 = OR(\4741, \7114, \2624, \7464) -\7526 = AND(\7468, \3119, \3130) -\7527 = NOT(\7394) -\7528 = NOT(\7397) -\7529 = NOT(\7402) -\7530 = AND(\7402, \3068) -\7531 = OR(\4981, \7481, \3801) -\7537 = OR(\4982, \7482, \3802) -\7543 = OR(\4983, \7483, \3803) -\7549 = OR(\5165, \7484, \3804) -\7555 = OR(\4985, \7485, \3806) -\7561 = OR(\4986, \7486, \3807) -\7567 = OR(\4547, \7487, \3808) -\7573 = OR(\4987, \7488, \3809) -\7579 = NAND(\7492, \7406) -\7582 = NAND(\7493, \7408) -\7585 = NOT(\7409) -\7586 = NAND(\7409, \6894) -\7587 = NOT(\7412) -\7588 = NAND(\7412, \6900) -\7589 = NAND(\7498, \7416) -\7592 = NAND(\7499, \7418) -\7595 = NAND(\7500, \7420) -\7598 = NOT(\7421) -\7599 = NAND(\7421, \6919) -\7600 = AND(\7505, \2647) -\7601 = AND(\7507, \2675) -\7602 = AND(\7508, \2675) -\7603 = AND(\7509, \2675) -\7604 = AND(\7510, \2722) -\7605 = AND(\7512, \2750) -\7606 = AND(\7513, \2750) -\7607 = AND(\7514, \2750) -\7624 = AND(\6979, \7489) -\7625 = AND(\7489, \7250) -\7626 = AND(\1149, \7525) -\7631 = AND(\562, \7527, \7528, \6805, \6930) -\7636 = AND(\7529, \3097, \3108) -\7657 = NAND(\6539, \7585) -\7658 = NAND(\6556, \7587) -\7665 = NAND(\6622, \7598) -\7666 = AND(\7555, \2653, \2664) -\7667 = AND(\7531, \1161, \2664) -\7668 = AND(\7561, \2653, \2664) -\7669 = AND(\7537, \1161, \2664) -\7670 = AND(\7567, \2653, \2664) -\7671 = AND(\7543, \1161, \2664) -\7672 = AND(\7573, \2653, \2664) -\7673 = AND(\7549, \1161, \2664) -\7674 = AND(\7555, \2728, \2739) -\7675 = AND(\7531, \1223, \2739) -\7676 = AND(\7561, \2728, \2739) -\7677 = AND(\7537, \1223, \2739) -\7678 = AND(\7567, \2728, \2739) -\7679 = AND(\7543, \1223, \2739) -\7680 = AND(\7573, \2728, \2739) -\7681 = AND(\7549, \1223, \2739) -\7682 = AND(\7573, \3075, \3086) -\7683 = AND(\7549, \1731, \3086) -\7684 = AND(\7573, \3041, \3052) -\7685 = AND(\7549, \1697, \3052) -\7686 = AND(\7567, \3041, \3052) -\7687 = AND(\7543, \1697, \3052) -\7688 = AND(\7561, \3041, \3052) -\7689 = AND(\7537, \1697, \3052) -\7690 = AND(\7555, \3041, \3052) -\7691 = AND(\7531, \1697, \3052) -\7692 = AND(\7567, \3075, \3086) -\7693 = AND(\7543, \1731, \3086) -\7694 = AND(\7561, \3075, \3086) -\7695 = AND(\7537, \1731, \3086) -\7696 = AND(\7555, \3075, \3086) -\7697 = AND(\7531, \1731, \3086) -\7698 = OR(\7624, \7625) -\7699 = NOT(\7573) -\7700 = NOT(\7567) -\7701 = NOT(\7561) -\7702 = NOT(\7555) -\7703 = AND(\1156, \7631, \245) -\7704 = NOT(\7549) -\7705 = NOT(\7543) -\7706 = NOT(\7537) -\7707 = NOT(\7531) -\7708 = NOT(\7579) -\7709 = NAND(\7579, \6739) -\7710 = NOT(\7582) -\7711 = NAND(\7582, \6744) -\7712 = NAND(\7657, \7586) -\7715 = NAND(\7658, \7588) -\7718 = NOT(\7589) -\7719 = NAND(\7589, \6772) -\7720 = NOT(\7592) -\7721 = NAND(\7592, \6776) -\7722 = NOT(\7595) -\7723 = NAND(\7595, \5733) -\7724 = NAND(\7665, \7599) -\7727 = OR(\7666, \7667, \3617, \2586) -\7728 = OR(\7668, \7669, \3618, \2587) -\7729 = OR(\7670, \7671, \3619, \2588) -\7730 = OR(\7672, \7673, \3620, \2589) -\7731 = OR(\7674, \7675, \3628, \2596) -\7732 = OR(\7676, \7677, \3629, \2597) -\7733 = OR(\7678, \7679, \3630, \2598) -\7734 = OR(\7680, \7681, \3631, \2599) -\7735 = OR(\7682, \7683, \3638, \2604) -\7736 = OR(\7684, \7685, \3642, \2606) -\7737 = OR(\7686, \7687, \3643, \2607) -\7738 = OR(\7688, \7689, \3644, \2608) -\7739 = OR(\7690, \7691, \3645, \2609) -\7740 = OR(\7692, \7693, \3651, \2615) -\7741 = OR(\7694, \7695, \3652, \2616) -\7742 = OR(\7696, \7697, \3653, \2617) -\7743 = NAND(\6271, \7708) -\7744 = NAND(\6283, \7710) -\7749 = NAND(\6341, \7718) -\7750 = NAND(\6347, \7720) -\7751 = NAND(\5214, \7722) -\7754 = AND(\7727, \2647) -\7755 = AND(\7728, \2647) -\7756 = AND(\7729, \2647) -\7757 = AND(\7730, \2647) -\7758 = AND(\7731, \2722) -\7759 = AND(\7732, \2722) -\7760 = AND(\7733, \2722) -\7761 = AND(\7734, \2722) -\7762 = NAND(\7743, \7709) -\7765 = NAND(\7744, \7711) -\7768 = NOT(\7712) -\7769 = NAND(\7712, \6751) -\7770 = NOT(\7715) -\7771 = NAND(\7715, \6760) -\7772 = NAND(\7749, \7719) -\7775 = NAND(\7750, \7721) -\7778 = NAND(\7751, \7723) -\7781 = NOT(\7724) -\7782 = NAND(\7724, \5735) -\7787 = NAND(\6295, \7768) -\7788 = NAND(\6313, \7770) -\7795 = NAND(\5220, \7781) -\7796 = NOT(\7762) -\7797 = NAND(\7762, \6740) -\7798 = NOT(\7765) -\7799 = NAND(\7765, \6745) -\7800 = NAND(\7787, \7769) -\7803 = NAND(\7788, \7771) -\7806 = NOT(\7772) -\7807 = NAND(\7772, \6773) -\7808 = NOT(\7775) -\7809 = NAND(\7775, \6777) -\7810 = NOT(\7778) -\7811 = NAND(\7778, \6782) -\7812 = NAND(\7795, \7782) -\7815 = NAND(\6274, \7796) -\7816 = NAND(\6286, \7798) -\7821 = NAND(\6344, \7806) -\7822 = NAND(\6350, \7808) -\7823 = NAND(\6353, \7810) -\7826 = NAND(\7815, \7797) -\7829 = NAND(\7816, \7799) -\7832 = NOT(\7800) -\7833 = NAND(\7800, \6752) -\7834 = NOT(\7803) -\7835 = NAND(\7803, \6761) -\7836 = NAND(\7821, \7807) -\7839 = NAND(\7822, \7809) -\7842 = NAND(\7823, \7811) -\7845 = NOT(\7812) -\7846 = NAND(\7812, \6790) -\7851 = NAND(\6298, \7832) -\7852 = NAND(\6316, \7834) -\7859 = NAND(\6364, \7845) -\7860 = NOT(\7826) -\7861 = NAND(\7826, \6741) -\7862 = NOT(\7829) -\7863 = NAND(\7829, \6746) -\7864 = NAND(\7851, \7833) -\7867 = NAND(\7852, \7835) -\7870 = NOT(\7836) -\7871 = NAND(\7836, \5730) -\7872 = NOT(\7839) -\7873 = NAND(\7839, \5732) -\7874 = NOT(\7842) -\7875 = NAND(\7842, \6783) -\7876 = NAND(\7859, \7846) -\7879 = NAND(\6277, \7860) -\7880 = NAND(\6289, \7862) -\7885 = NAND(\5199, \7870) -\7886 = NAND(\5208, \7872) -\7887 = NAND(\6356, \7874) -\7890 = NAND(\7879, \7861) -\7893 = NAND(\7880, \7863) -\7896 = NOT(\7864) -\7897 = NAND(\7864, \6753) -\7898 = NOT(\7867) -\7899 = NAND(\7867, \6762) -\7900 = NAND(\7885, \7871) -\7903 = NAND(\7886, \7873) -\7906 = NAND(\7887, \7875) -\7909 = NOT(\7876) -\7910 = NAND(\7876, \6791) -\7917 = NAND(\6301, \7896) -\7918 = NAND(\6319, \7898) -\7923 = NAND(\6367, \7909) -\7924 = NOT(\7890) -\7925 = NAND(\7890, \6680) -\7926 = NOT(\7893) -\7927 = NAND(\7893, \6681) -\7928 = NOT(\7900) -\7929 = NAND(\7900, \5690) -\7930 = NOT(\7903) -\7931 = NAND(\7903, \5691) -\7932 = NAND(\7917, \7897) -\7935 = NAND(\7918, \7899) -\7938 = NOT(\7906) -\7939 = NAND(\7906, \6784) -\7940 = NAND(\7923, \7910) -\7943 = NAND(\6280, \7924) -\7944 = NAND(\6292, \7926) -\7945 = NAND(\5202, \7928) -\7946 = NAND(\5211, \7930) -\7951 = NAND(\6359, \7938) -\7954 = NAND(\7943, \7925) -\7957 = NAND(\7944, \7927) -\7960 = NAND(\7945, \7929) -\7963 = NAND(\7946, \7931) -\7966 = NOT(\7932) -\7967 = NAND(\7932, \6754) -\7968 = NOT(\7935) -\7969 = NAND(\7935, \6755) -\7970 = NAND(\7951, \7939) -\7973 = NOT(\7940) -\7974 = NAND(\7940, \6785) -\7984 = NAND(\6304, \7966) -\7985 = NAND(\6322, \7968) -\7987 = NAND(\6370, \7973) -\7988 = AND(\7957, \6831, \1157) -\7989 = AND(\7954, \6415, \1157) -\7990 = AND(\7957, \7041, \566) -\7991 = AND(\7954, \7177, \566) -\7992 = NOT(\7970) -\7993 = NAND(\7970, \6448) -\7994 = AND(\7963, \6857, \1219) -\7995 = AND(\7960, \6441, \1219) -\7996 = AND(\7963, \7065, \583) -\7997 = AND(\7960, \7182, \583) -\7998 = NAND(\7984, \7967) -\8001 = NAND(\7985, \7969) -\8004 = NAND(\7987, \7974) -\8009 = NAND(\6051, \7992) -\8013 = OR(\7988, \7989, \7990, \7991) -\8017 = OR(\7994, \7995, \7996, \7997) -\8020 = NOT(\7998) -\8021 = NAND(\7998, \6682) -\8022 = NOT(\8001) -\8023 = NAND(\8001, \6683) -\8025 = NAND(\8009, \7993) -\8026 = NOT(\8004) -\8027 = NAND(\8004, \6449) -\8031 = NAND(\6307, \8020) -\8032 = NAND(\6310, \8022) -\8033 = NOT(\8013) -\8034 = NAND(\6054, \8026) -\8035 = AND(\583, \8025) -\8036 = NOT(\8017) -\8037 = NAND(\8031, \8021) -\8038 = NAND(\8032, \8023) -\8039 = NAND(\8034, \8027) -\8040 = NOT(\8038) -\8041 = AND(\566, \8037) -\8042 = NOT(\8039) -\8043 = AND(\8040, \1157) -\8044 = AND(\8042, \1219) -\8045 = OR(\8043, \8041) -\8048 = OR(\8044, \8035) -\8055 = NAND(\8045, \8033) -\8056 = NOT(\8045) -\8057 = NAND(\8048, \8036) -\8058 = NOT(\8048) -\8059 = NAND(\8013, \8056) -\8060 = NAND(\8017, \8058) -\8061 = NAND(\8055, \8059) -\8064 = NAND(\8057, \8060) -\8071 = AND(\8064, \1777, \3130) -\8072 = AND(\8061, \1761, \3108) -\8073 = NOT(\8061) -\8074 = NOT(\8064) -\8075 = OR(\7526, \8071, \3659, \2625) -\8076 = OR(\7636, \8072, \3661, \2627) -\8077 = AND(\8073, \1727) -\8078 = AND(\8074, \1727) -\8079 = OR(\7530, \8077) -\8082 = OR(\7479, \8078) -\8089 = AND(\8079, \3063) -\8090 = AND(\8082, \3063) -\8091 = AND(\8079, \3063) -\8092 = AND(\8082, \3063) -\8093 = OR(\8089, \3071) -\8096 = OR(\8090, \3072) -\8099 = OR(\8091, \3073) -\8102 = OR(\8092, \3074) -\8113 = AND(\8102, \2779, \2790) -\8114 = AND(\8099, \1327, \2790) -\8115 = AND(\8102, \2801, \2812) -\8116 = AND(\8099, \1351, \2812) -\8117 = AND(\8096, \2681, \2692) -\8118 = AND(\8093, \1185, \2692) -\8119 = AND(\8096, \2756, \2767) -\8120 = AND(\8093, \1247, \2767) -\8121 = OR(\8117, \8118, \3662, \2703) -\8122 = OR(\8119, \8120, \3663, \2778) -\8123 = OR(\8113, \8114, \3650, \2614) -\8124 = OR(\8115, \8116, \3658, \2622) -\8125 = AND(\8121, \2675) -\8126 = AND(\8122, \2750) -\8127 = NOT(\8125) -\8128 = NOT(\8126) diff --git a/ISCAS85/new/c6288.bench b/ISCAS85/new/c6288.bench deleted file mode 100644 index be9eb81..0000000 --- a/ISCAS85/new/c6288.bench +++ /dev/null @@ -1,2484 +0,0 @@ -# c\6288 - -INPUT(\1) -INPUT(\18) -INPUT(\35) -INPUT(\52) -INPUT(\69) -INPUT(\86) -INPUT(\103) -INPUT(\120) -INPUT(\137) -INPUT(\154) -INPUT(\171) -INPUT(\188) -INPUT(\205) -INPUT(\222) -INPUT(\239) -INPUT(\256) -INPUT(\273) -INPUT(\290) -INPUT(\307) -INPUT(\324) -INPUT(\341) -INPUT(\358) -INPUT(\375) -INPUT(\392) -INPUT(\409) -INPUT(\426) -INPUT(\443) -INPUT(\460) -INPUT(\477) -INPUT(\494) -INPUT(\511) -INPUT(\528) - -OUTPUT(\545) -OUTPUT(\1581) -OUTPUT(\1901) -OUTPUT(\2223) -OUTPUT(\2548) -OUTPUT(\2877) -OUTPUT(\3211) -OUTPUT(\3552) -OUTPUT(\3895) -OUTPUT(\4241) -OUTPUT(\4591) -OUTPUT(\4946) -OUTPUT(\5308) -OUTPUT(\5672) -OUTPUT(\5971) -OUTPUT(\6123) -OUTPUT(\6150) -OUTPUT(\6160) -OUTPUT(\6170) -OUTPUT(\6180) -OUTPUT(\6190) -OUTPUT(\6200) -OUTPUT(\6210) -OUTPUT(\6220) -OUTPUT(\6230) -OUTPUT(\6240) -OUTPUT(\6250) -OUTPUT(\6260) -OUTPUT(\6270) -OUTPUT(\6280) -OUTPUT(\6287) -OUTPUT(\6288) - -\545 = AND(\1, \273) -\546 = AND(\1, \290) -\549 = AND(\1, \307) -\552 = AND(\1, \324) -\555 = AND(\1, \341) -\558 = AND(\1, \358) -\561 = AND(\1, \375) -\564 = AND(\1, \392) -\567 = AND(\1, \409) -\570 = AND(\1, \426) -\573 = AND(\1, \443) -\576 = AND(\1, \460) -\579 = AND(\1, \477) -\582 = AND(\1, \494) -\585 = AND(\1, \511) -\588 = AND(\1, \528) -\591 = AND(\18, \273) -\594 = AND(\18, \290) -\597 = AND(\18, \307) -\600 = AND(\18, \324) -\603 = AND(\18, \341) -\606 = AND(\18, \358) -\609 = AND(\18, \375) -\612 = AND(\18, \392) -\615 = AND(\18, \409) -\618 = AND(\18, \426) -\621 = AND(\18, \443) -\624 = AND(\18, \460) -\627 = AND(\18, \477) -\630 = AND(\18, \494) -\633 = AND(\18, \511) -\636 = AND(\18, \528) -\639 = AND(\35, \273) -\642 = AND(\35, \290) -\645 = AND(\35, \307) -\648 = AND(\35, \324) -\651 = AND(\35, \341) -\654 = AND(\35, \358) -\657 = AND(\35, \375) -\660 = AND(\35, \392) -\663 = AND(\35, \409) -\666 = AND(\35, \426) -\669 = AND(\35, \443) -\672 = AND(\35, \460) -\675 = AND(\35, \477) -\678 = AND(\35, \494) -\681 = AND(\35, \511) -\684 = AND(\35, \528) -\687 = AND(\52, \273) -\690 = AND(\52, \290) -\693 = AND(\52, \307) -\696 = AND(\52, \324) -\699 = AND(\52, \341) -\702 = AND(\52, \358) -\705 = AND(\52, \375) -\708 = AND(\52, \392) -\711 = AND(\52, \409) -\714 = AND(\52, \426) -\717 = AND(\52, \443) -\720 = AND(\52, \460) -\723 = AND(\52, \477) -\726 = AND(\52, \494) -\729 = AND(\52, \511) -\732 = AND(\52, \528) -\735 = AND(\69, \273) -\738 = AND(\69, \290) -\741 = AND(\69, \307) -\744 = AND(\69, \324) -\747 = AND(\69, \341) -\750 = AND(\69, \358) -\753 = AND(\69, \375) -\756 = AND(\69, \392) -\759 = AND(\69, \409) -\762 = AND(\69, \426) -\765 = AND(\69, \443) -\768 = AND(\69, \460) -\771 = AND(\69, \477) -\774 = AND(\69, \494) -\777 = AND(\69, \511) -\780 = AND(\69, \528) -\783 = AND(\86, \273) -\786 = AND(\86, \290) -\789 = AND(\86, \307) -\792 = AND(\86, \324) -\795 = AND(\86, \341) -\798 = AND(\86, \358) -\801 = AND(\86, \375) -\804 = AND(\86, \392) -\807 = AND(\86, \409) -\810 = AND(\86, \426) -\813 = AND(\86, \443) -\816 = AND(\86, \460) -\819 = AND(\86, \477) -\822 = AND(\86, \494) -\825 = AND(\86, \511) -\828 = AND(\86, \528) -\831 = AND(\103, \273) -\834 = AND(\103, \290) -\837 = AND(\103, \307) -\840 = AND(\103, \324) -\843 = AND(\103, \341) -\846 = AND(\103, \358) -\849 = AND(\103, \375) -\852 = AND(\103, \392) -\855 = AND(\103, \409) -\858 = AND(\103, \426) -\861 = AND(\103, \443) -\864 = AND(\103, \460) -\867 = AND(\103, \477) -\870 = AND(\103, \494) -\873 = AND(\103, \511) -\876 = AND(\103, \528) -\879 = AND(\120, \273) -\882 = AND(\120, \290) -\885 = AND(\120, \307) -\888 = AND(\120, \324) -\891 = AND(\120, \341) -\894 = AND(\120, \358) -\897 = AND(\120, \375) -\900 = AND(\120, \392) -\903 = AND(\120, \409) -\906 = AND(\120, \426) -\909 = AND(\120, \443) -\912 = AND(\120, \460) -\915 = AND(\120, \477) -\918 = AND(\120, \494) -\921 = AND(\120, \511) -\924 = AND(\120, \528) -\927 = AND(\137, \273) -\930 = AND(\137, \290) -\933 = AND(\137, \307) -\936 = AND(\137, \324) -\939 = AND(\137, \341) -\942 = AND(\137, \358) -\945 = AND(\137, \375) -\948 = AND(\137, \392) -\951 = AND(\137, \409) -\954 = AND(\137, \426) -\957 = AND(\137, \443) -\960 = AND(\137, \460) -\963 = AND(\137, \477) -\966 = AND(\137, \494) -\969 = AND(\137, \511) -\972 = AND(\137, \528) -\975 = AND(\154, \273) -\978 = AND(\154, \290) -\981 = AND(\154, \307) -\984 = AND(\154, \324) -\987 = AND(\154, \341) -\990 = AND(\154, \358) -\993 = AND(\154, \375) -\996 = AND(\154, \392) -\999 = AND(\154, \409) -\1002 = AND(\154, \426) -\1005 = AND(\154, \443) -\1008 = AND(\154, \460) -\1011 = AND(\154, \477) -\1014 = AND(\154, \494) -\1017 = AND(\154, \511) -\1020 = AND(\154, \528) -\1023 = AND(\171, \273) -\1026 = AND(\171, \290) -\1029 = AND(\171, \307) -\1032 = AND(\171, \324) -\1035 = AND(\171, \341) -\1038 = AND(\171, \358) -\1041 = AND(\171, \375) -\1044 = AND(\171, \392) -\1047 = AND(\171, \409) -\1050 = AND(\171, \426) -\1053 = AND(\171, \443) -\1056 = AND(\171, \460) -\1059 = AND(\171, \477) -\1062 = AND(\171, \494) -\1065 = AND(\171, \511) -\1068 = AND(\171, \528) -\1071 = AND(\188, \273) -\1074 = AND(\188, \290) -\1077 = AND(\188, \307) -\1080 = AND(\188, \324) -\1083 = AND(\188, \341) -\1086 = AND(\188, \358) -\1089 = AND(\188, \375) -\1092 = AND(\188, \392) -\1095 = AND(\188, \409) -\1098 = AND(\188, \426) -\1101 = AND(\188, \443) -\1104 = AND(\188, \460) -\1107 = AND(\188, \477) -\1110 = AND(\188, \494) -\1113 = AND(\188, \511) -\1116 = AND(\188, \528) -\1119 = AND(\205, \273) -\1122 = AND(\205, \290) -\1125 = AND(\205, \307) -\1128 = AND(\205, \324) -\1131 = AND(\205, \341) -\1134 = AND(\205, \358) -\1137 = AND(\205, \375) -\1140 = AND(\205, \392) -\1143 = AND(\205, \409) -\1146 = AND(\205, \426) -\1149 = AND(\205, \443) -\1152 = AND(\205, \460) -\1155 = AND(\205, \477) -\1158 = AND(\205, \494) -\1161 = AND(\205, \511) -\1164 = AND(\205, \528) -\1167 = AND(\222, \273) -\1170 = AND(\222, \290) -\1173 = AND(\222, \307) -\1176 = AND(\222, \324) -\1179 = AND(\222, \341) -\1182 = AND(\222, \358) -\1185 = AND(\222, \375) -\1188 = AND(\222, \392) -\1191 = AND(\222, \409) -\1194 = AND(\222, \426) -\1197 = AND(\222, \443) -\1200 = AND(\222, \460) -\1203 = AND(\222, \477) -\1206 = AND(\222, \494) -\1209 = AND(\222, \511) -\1212 = AND(\222, \528) -\1215 = AND(\239, \273) -\1218 = AND(\239, \290) -\1221 = AND(\239, \307) -\1224 = AND(\239, \324) -\1227 = AND(\239, \341) -\1230 = AND(\239, \358) -\1233 = AND(\239, \375) -\1236 = AND(\239, \392) -\1239 = AND(\239, \409) -\1242 = AND(\239, \426) -\1245 = AND(\239, \443) -\1248 = AND(\239, \460) -\1251 = AND(\239, \477) -\1254 = AND(\239, \494) -\1257 = AND(\239, \511) -\1260 = AND(\239, \528) -\1263 = AND(\256, \273) -\1266 = AND(\256, \290) -\1269 = AND(\256, \307) -\1272 = AND(\256, \324) -\1275 = AND(\256, \341) -\1278 = AND(\256, \358) -\1281 = AND(\256, \375) -\1284 = AND(\256, \392) -\1287 = AND(\256, \409) -\1290 = AND(\256, \426) -\1293 = AND(\256, \443) -\1296 = AND(\256, \460) -\1299 = AND(\256, \477) -\1302 = AND(\256, \494) -\1305 = AND(\256, \511) -\1308 = AND(\256, \528) -\1311 = NOT(\591) -\1315 = NOT(\639) -\1319 = NOT(\687) -\1323 = NOT(\735) -\1327 = NOT(\783) -\1331 = NOT(\831) -\1335 = NOT(\879) -\1339 = NOT(\927) -\1343 = NOT(\975) -\1347 = NOT(\1023) -\1351 = NOT(\1071) -\1355 = NOT(\1119) -\1359 = NOT(\1167) -\1363 = NOT(\1215) -\1367 = NOT(\1263) -\1371 = NOR(\591, \1311) -\1372 = NOT(\1311) -\1373 = NOR(\639, \1315) -\1374 = NOT(\1315) -\1375 = NOR(\687, \1319) -\1376 = NOT(\1319) -\1377 = NOR(\735, \1323) -\1378 = NOT(\1323) -\1379 = NOR(\783, \1327) -\1380 = NOT(\1327) -\1381 = NOR(\831, \1331) -\1382 = NOT(\1331) -\1383 = NOR(\879, \1335) -\1384 = NOT(\1335) -\1385 = NOR(\927, \1339) -\1386 = NOT(\1339) -\1387 = NOR(\975, \1343) -\1388 = NOT(\1343) -\1389 = NOR(\1023, \1347) -\1390 = NOT(\1347) -\1391 = NOR(\1071, \1351) -\1392 = NOT(\1351) -\1393 = NOR(\1119, \1355) -\1394 = NOT(\1355) -\1395 = NOR(\1167, \1359) -\1396 = NOT(\1359) -\1397 = NOR(\1215, \1363) -\1398 = NOT(\1363) -\1399 = NOR(\1263, \1367) -\1400 = NOT(\1367) -\1401 = NOR(\1371, \1372) -\1404 = NOR(\1373, \1374) -\1407 = NOR(\1375, \1376) -\1410 = NOR(\1377, \1378) -\1413 = NOR(\1379, \1380) -\1416 = NOR(\1381, \1382) -\1419 = NOR(\1383, \1384) -\1422 = NOR(\1385, \1386) -\1425 = NOR(\1387, \1388) -\1428 = NOR(\1389, \1390) -\1431 = NOR(\1391, \1392) -\1434 = NOR(\1393, \1394) -\1437 = NOR(\1395, \1396) -\1440 = NOR(\1397, \1398) -\1443 = NOR(\1399, \1400) -\1446 = NOR(\1401, \546) -\1450 = NOR(\1404, \594) -\1454 = NOR(\1407, \642) -\1458 = NOR(\1410, \690) -\1462 = NOR(\1413, \738) -\1466 = NOR(\1416, \786) -\1470 = NOR(\1419, \834) -\1474 = NOR(\1422, \882) -\1478 = NOR(\1425, \930) -\1482 = NOR(\1428, \978) -\1486 = NOR(\1431, \1026) -\1490 = NOR(\1434, \1074) -\1494 = NOR(\1437, \1122) -\1498 = NOR(\1440, \1170) -\1502 = NOR(\1443, \1218) -\1506 = NOR(\1401, \1446) -\1507 = NOR(\1446, \546) -\1508 = NOR(\1311, \1446) -\1511 = NOR(\1404, \1450) -\1512 = NOR(\1450, \594) -\1513 = NOR(\1315, \1450) -\1516 = NOR(\1407, \1454) -\1517 = NOR(\1454, \642) -\1518 = NOR(\1319, \1454) -\1521 = NOR(\1410, \1458) -\1522 = NOR(\1458, \690) -\1523 = NOR(\1323, \1458) -\1526 = NOR(\1413, \1462) -\1527 = NOR(\1462, \738) -\1528 = NOR(\1327, \1462) -\1531 = NOR(\1416, \1466) -\1532 = NOR(\1466, \786) -\1533 = NOR(\1331, \1466) -\1536 = NOR(\1419, \1470) -\1537 = NOR(\1470, \834) -\1538 = NOR(\1335, \1470) -\1541 = NOR(\1422, \1474) -\1542 = NOR(\1474, \882) -\1543 = NOR(\1339, \1474) -\1546 = NOR(\1425, \1478) -\1547 = NOR(\1478, \930) -\1548 = NOR(\1343, \1478) -\1551 = NOR(\1428, \1482) -\1552 = NOR(\1482, \978) -\1553 = NOR(\1347, \1482) -\1556 = NOR(\1431, \1486) -\1557 = NOR(\1486, \1026) -\1558 = NOR(\1351, \1486) -\1561 = NOR(\1434, \1490) -\1562 = NOR(\1490, \1074) -\1563 = NOR(\1355, \1490) -\1566 = NOR(\1437, \1494) -\1567 = NOR(\1494, \1122) -\1568 = NOR(\1359, \1494) -\1571 = NOR(\1440, \1498) -\1572 = NOR(\1498, \1170) -\1573 = NOR(\1363, \1498) -\1576 = NOR(\1443, \1502) -\1577 = NOR(\1502, \1218) -\1578 = NOR(\1367, \1502) -\1581 = NOR(\1506, \1507) -\1582 = NOR(\1511, \1512) -\1585 = NOR(\1516, \1517) -\1588 = NOR(\1521, \1522) -\1591 = NOR(\1526, \1527) -\1594 = NOR(\1531, \1532) -\1597 = NOR(\1536, \1537) -\1600 = NOR(\1541, \1542) -\1603 = NOR(\1546, \1547) -\1606 = NOR(\1551, \1552) -\1609 = NOR(\1556, \1557) -\1612 = NOR(\1561, \1562) -\1615 = NOR(\1566, \1567) -\1618 = NOR(\1571, \1572) -\1621 = NOR(\1576, \1577) -\1624 = NOR(\1266, \1578) -\1628 = NOR(\1582, \1508) -\1632 = NOR(\1585, \1513) -\1636 = NOR(\1588, \1518) -\1640 = NOR(\1591, \1523) -\1644 = NOR(\1594, \1528) -\1648 = NOR(\1597, \1533) -\1652 = NOR(\1600, \1538) -\1656 = NOR(\1603, \1543) -\1660 = NOR(\1606, \1548) -\1664 = NOR(\1609, \1553) -\1668 = NOR(\1612, \1558) -\1672 = NOR(\1615, \1563) -\1676 = NOR(\1618, \1568) -\1680 = NOR(\1621, \1573) -\1684 = NOR(\1266, \1624) -\1685 = NOR(\1624, \1578) -\1686 = NOR(\1582, \1628) -\1687 = NOR(\1628, \1508) -\1688 = NOR(\1585, \1632) -\1689 = NOR(\1632, \1513) -\1690 = NOR(\1588, \1636) -\1691 = NOR(\1636, \1518) -\1692 = NOR(\1591, \1640) -\1693 = NOR(\1640, \1523) -\1694 = NOR(\1594, \1644) -\1695 = NOR(\1644, \1528) -\1696 = NOR(\1597, \1648) -\1697 = NOR(\1648, \1533) -\1698 = NOR(\1600, \1652) -\1699 = NOR(\1652, \1538) -\1700 = NOR(\1603, \1656) -\1701 = NOR(\1656, \1543) -\1702 = NOR(\1606, \1660) -\1703 = NOR(\1660, \1548) -\1704 = NOR(\1609, \1664) -\1705 = NOR(\1664, \1553) -\1706 = NOR(\1612, \1668) -\1707 = NOR(\1668, \1558) -\1708 = NOR(\1615, \1672) -\1709 = NOR(\1672, \1563) -\1710 = NOR(\1618, \1676) -\1711 = NOR(\1676, \1568) -\1712 = NOR(\1621, \1680) -\1713 = NOR(\1680, \1573) -\1714 = NOR(\1684, \1685) -\1717 = NOR(\1686, \1687) -\1720 = NOR(\1688, \1689) -\1723 = NOR(\1690, \1691) -\1726 = NOR(\1692, \1693) -\1729 = NOR(\1694, \1695) -\1732 = NOR(\1696, \1697) -\1735 = NOR(\1698, \1699) -\1738 = NOR(\1700, \1701) -\1741 = NOR(\1702, \1703) -\1744 = NOR(\1704, \1705) -\1747 = NOR(\1706, \1707) -\1750 = NOR(\1708, \1709) -\1753 = NOR(\1710, \1711) -\1756 = NOR(\1712, \1713) -\1759 = NOR(\1714, \1221) -\1763 = NOR(\1717, \549) -\1767 = NOR(\1720, \597) -\1771 = NOR(\1723, \645) -\1775 = NOR(\1726, \693) -\1779 = NOR(\1729, \741) -\1783 = NOR(\1732, \789) -\1787 = NOR(\1735, \837) -\1791 = NOR(\1738, \885) -\1795 = NOR(\1741, \933) -\1799 = NOR(\1744, \981) -\1803 = NOR(\1747, \1029) -\1807 = NOR(\1750, \1077) -\1811 = NOR(\1753, \1125) -\1815 = NOR(\1756, \1173) -\1819 = NOR(\1714, \1759) -\1820 = NOR(\1759, \1221) -\1821 = NOR(\1624, \1759) -\1824 = NOR(\1717, \1763) -\1825 = NOR(\1763, \549) -\1826 = NOR(\1628, \1763) -\1829 = NOR(\1720, \1767) -\1830 = NOR(\1767, \597) -\1831 = NOR(\1632, \1767) -\1834 = NOR(\1723, \1771) -\1835 = NOR(\1771, \645) -\1836 = NOR(\1636, \1771) -\1839 = NOR(\1726, \1775) -\1840 = NOR(\1775, \693) -\1841 = NOR(\1640, \1775) -\1844 = NOR(\1729, \1779) -\1845 = NOR(\1779, \741) -\1846 = NOR(\1644, \1779) -\1849 = NOR(\1732, \1783) -\1850 = NOR(\1783, \789) -\1851 = NOR(\1648, \1783) -\1854 = NOR(\1735, \1787) -\1855 = NOR(\1787, \837) -\1856 = NOR(\1652, \1787) -\1859 = NOR(\1738, \1791) -\1860 = NOR(\1791, \885) -\1861 = NOR(\1656, \1791) -\1864 = NOR(\1741, \1795) -\1865 = NOR(\1795, \933) -\1866 = NOR(\1660, \1795) -\1869 = NOR(\1744, \1799) -\1870 = NOR(\1799, \981) -\1871 = NOR(\1664, \1799) -\1874 = NOR(\1747, \1803) -\1875 = NOR(\1803, \1029) -\1876 = NOR(\1668, \1803) -\1879 = NOR(\1750, \1807) -\1880 = NOR(\1807, \1077) -\1881 = NOR(\1672, \1807) -\1884 = NOR(\1753, \1811) -\1885 = NOR(\1811, \1125) -\1886 = NOR(\1676, \1811) -\1889 = NOR(\1756, \1815) -\1890 = NOR(\1815, \1173) -\1891 = NOR(\1680, \1815) -\1894 = NOR(\1819, \1820) -\1897 = NOR(\1269, \1821) -\1901 = NOR(\1824, \1825) -\1902 = NOR(\1829, \1830) -\1905 = NOR(\1834, \1835) -\1908 = NOR(\1839, \1840) -\1911 = NOR(\1844, \1845) -\1914 = NOR(\1849, \1850) -\1917 = NOR(\1854, \1855) -\1920 = NOR(\1859, \1860) -\1923 = NOR(\1864, \1865) -\1926 = NOR(\1869, \1870) -\1929 = NOR(\1874, \1875) -\1932 = NOR(\1879, \1880) -\1935 = NOR(\1884, \1885) -\1938 = NOR(\1889, \1890) -\1941 = NOR(\1894, \1891) -\1945 = NOR(\1269, \1897) -\1946 = NOR(\1897, \1821) -\1947 = NOR(\1902, \1826) -\1951 = NOR(\1905, \1831) -\1955 = NOR(\1908, \1836) -\1959 = NOR(\1911, \1841) -\1963 = NOR(\1914, \1846) -\1967 = NOR(\1917, \1851) -\1971 = NOR(\1920, \1856) -\1975 = NOR(\1923, \1861) -\1979 = NOR(\1926, \1866) -\1983 = NOR(\1929, \1871) -\1987 = NOR(\1932, \1876) -\1991 = NOR(\1935, \1881) -\1995 = NOR(\1938, \1886) -\1999 = NOR(\1894, \1941) -\2000 = NOR(\1941, \1891) -\2001 = NOR(\1945, \1946) -\2004 = NOR(\1902, \1947) -\2005 = NOR(\1947, \1826) -\2006 = NOR(\1905, \1951) -\2007 = NOR(\1951, \1831) -\2008 = NOR(\1908, \1955) -\2009 = NOR(\1955, \1836) -\2010 = NOR(\1911, \1959) -\2011 = NOR(\1959, \1841) -\2012 = NOR(\1914, \1963) -\2013 = NOR(\1963, \1846) -\2014 = NOR(\1917, \1967) -\2015 = NOR(\1967, \1851) -\2016 = NOR(\1920, \1971) -\2017 = NOR(\1971, \1856) -\2018 = NOR(\1923, \1975) -\2019 = NOR(\1975, \1861) -\2020 = NOR(\1926, \1979) -\2021 = NOR(\1979, \1866) -\2022 = NOR(\1929, \1983) -\2023 = NOR(\1983, \1871) -\2024 = NOR(\1932, \1987) -\2025 = NOR(\1987, \1876) -\2026 = NOR(\1935, \1991) -\2027 = NOR(\1991, \1881) -\2028 = NOR(\1938, \1995) -\2029 = NOR(\1995, \1886) -\2030 = NOR(\1999, \2000) -\2033 = NOR(\2001, \1224) -\2037 = NOR(\2004, \2005) -\2040 = NOR(\2006, \2007) -\2043 = NOR(\2008, \2009) -\2046 = NOR(\2010, \2011) -\2049 = NOR(\2012, \2013) -\2052 = NOR(\2014, \2015) -\2055 = NOR(\2016, \2017) -\2058 = NOR(\2018, \2019) -\2061 = NOR(\2020, \2021) -\2064 = NOR(\2022, \2023) -\2067 = NOR(\2024, \2025) -\2070 = NOR(\2026, \2027) -\2073 = NOR(\2028, \2029) -\2076 = NOR(\2030, \1176) -\2080 = NOR(\2001, \2033) -\2081 = NOR(\2033, \1224) -\2082 = NOR(\1897, \2033) -\2085 = NOR(\2037, \552) -\2089 = NOR(\2040, \600) -\2093 = NOR(\2043, \648) -\2097 = NOR(\2046, \696) -\2101 = NOR(\2049, \744) -\2105 = NOR(\2052, \792) -\2109 = NOR(\2055, \840) -\2113 = NOR(\2058, \888) -\2117 = NOR(\2061, \936) -\2121 = NOR(\2064, \984) -\2125 = NOR(\2067, \1032) -\2129 = NOR(\2070, \1080) -\2133 = NOR(\2073, \1128) -\2137 = NOR(\2030, \2076) -\2138 = NOR(\2076, \1176) -\2139 = NOR(\1941, \2076) -\2142 = NOR(\2080, \2081) -\2145 = NOR(\1272, \2082) -\2149 = NOR(\2037, \2085) -\2150 = NOR(\2085, \552) -\2151 = NOR(\1947, \2085) -\2154 = NOR(\2040, \2089) -\2155 = NOR(\2089, \600) -\2156 = NOR(\1951, \2089) -\2159 = NOR(\2043, \2093) -\2160 = NOR(\2093, \648) -\2161 = NOR(\1955, \2093) -\2164 = NOR(\2046, \2097) -\2165 = NOR(\2097, \696) -\2166 = NOR(\1959, \2097) -\2169 = NOR(\2049, \2101) -\2170 = NOR(\2101, \744) -\2171 = NOR(\1963, \2101) -\2174 = NOR(\2052, \2105) -\2175 = NOR(\2105, \792) -\2176 = NOR(\1967, \2105) -\2179 = NOR(\2055, \2109) -\2180 = NOR(\2109, \840) -\2181 = NOR(\1971, \2109) -\2184 = NOR(\2058, \2113) -\2185 = NOR(\2113, \888) -\2186 = NOR(\1975, \2113) -\2189 = NOR(\2061, \2117) -\2190 = NOR(\2117, \936) -\2191 = NOR(\1979, \2117) -\2194 = NOR(\2064, \2121) -\2195 = NOR(\2121, \984) -\2196 = NOR(\1983, \2121) -\2199 = NOR(\2067, \2125) -\2200 = NOR(\2125, \1032) -\2201 = NOR(\1987, \2125) -\2204 = NOR(\2070, \2129) -\2205 = NOR(\2129, \1080) -\2206 = NOR(\1991, \2129) -\2209 = NOR(\2073, \2133) -\2210 = NOR(\2133, \1128) -\2211 = NOR(\1995, \2133) -\2214 = NOR(\2137, \2138) -\2217 = NOR(\2142, \2139) -\2221 = NOR(\1272, \2145) -\2222 = NOR(\2145, \2082) -\2223 = NOR(\2149, \2150) -\2224 = NOR(\2154, \2155) -\2227 = NOR(\2159, \2160) -\2230 = NOR(\2164, \2165) -\2233 = NOR(\2169, \2170) -\2236 = NOR(\2174, \2175) -\2239 = NOR(\2179, \2180) -\2242 = NOR(\2184, \2185) -\2245 = NOR(\2189, \2190) -\2248 = NOR(\2194, \2195) -\2251 = NOR(\2199, \2200) -\2254 = NOR(\2204, \2205) -\2257 = NOR(\2209, \2210) -\2260 = NOR(\2214, \2211) -\2264 = NOR(\2142, \2217) -\2265 = NOR(\2217, \2139) -\2266 = NOR(\2221, \2222) -\2269 = NOR(\2224, \2151) -\2273 = NOR(\2227, \2156) -\2277 = NOR(\2230, \2161) -\2281 = NOR(\2233, \2166) -\2285 = NOR(\2236, \2171) -\2289 = NOR(\2239, \2176) -\2293 = NOR(\2242, \2181) -\2297 = NOR(\2245, \2186) -\2301 = NOR(\2248, \2191) -\2305 = NOR(\2251, \2196) -\2309 = NOR(\2254, \2201) -\2313 = NOR(\2257, \2206) -\2317 = NOR(\2214, \2260) -\2318 = NOR(\2260, \2211) -\2319 = NOR(\2264, \2265) -\2322 = NOR(\2266, \1227) -\2326 = NOR(\2224, \2269) -\2327 = NOR(\2269, \2151) -\2328 = NOR(\2227, \2273) -\2329 = NOR(\2273, \2156) -\2330 = NOR(\2230, \2277) -\2331 = NOR(\2277, \2161) -\2332 = NOR(\2233, \2281) -\2333 = NOR(\2281, \2166) -\2334 = NOR(\2236, \2285) -\2335 = NOR(\2285, \2171) -\2336 = NOR(\2239, \2289) -\2337 = NOR(\2289, \2176) -\2338 = NOR(\2242, \2293) -\2339 = NOR(\2293, \2181) -\2340 = NOR(\2245, \2297) -\2341 = NOR(\2297, \2186) -\2342 = NOR(\2248, \2301) -\2343 = NOR(\2301, \2191) -\2344 = NOR(\2251, \2305) -\2345 = NOR(\2305, \2196) -\2346 = NOR(\2254, \2309) -\2347 = NOR(\2309, \2201) -\2348 = NOR(\2257, \2313) -\2349 = NOR(\2313, \2206) -\2350 = NOR(\2317, \2318) -\2353 = NOR(\2319, \1179) -\2357 = NOR(\2266, \2322) -\2358 = NOR(\2322, \1227) -\2359 = NOR(\2145, \2322) -\2362 = NOR(\2326, \2327) -\2365 = NOR(\2328, \2329) -\2368 = NOR(\2330, \2331) -\2371 = NOR(\2332, \2333) -\2374 = NOR(\2334, \2335) -\2377 = NOR(\2336, \2337) -\2380 = NOR(\2338, \2339) -\2383 = NOR(\2340, \2341) -\2386 = NOR(\2342, \2343) -\2389 = NOR(\2344, \2345) -\2392 = NOR(\2346, \2347) -\2395 = NOR(\2348, \2349) -\2398 = NOR(\2350, \1131) -\2402 = NOR(\2319, \2353) -\2403 = NOR(\2353, \1179) -\2404 = NOR(\2217, \2353) -\2407 = NOR(\2357, \2358) -\2410 = NOR(\1275, \2359) -\2414 = NOR(\2362, \555) -\2418 = NOR(\2365, \603) -\2422 = NOR(\2368, \651) -\2426 = NOR(\2371, \699) -\2430 = NOR(\2374, \747) -\2434 = NOR(\2377, \795) -\2438 = NOR(\2380, \843) -\2442 = NOR(\2383, \891) -\2446 = NOR(\2386, \939) -\2450 = NOR(\2389, \987) -\2454 = NOR(\2392, \1035) -\2458 = NOR(\2395, \1083) -\2462 = NOR(\2350, \2398) -\2463 = NOR(\2398, \1131) -\2464 = NOR(\2260, \2398) -\2467 = NOR(\2402, \2403) -\2470 = NOR(\2407, \2404) -\2474 = NOR(\1275, \2410) -\2475 = NOR(\2410, \2359) -\2476 = NOR(\2362, \2414) -\2477 = NOR(\2414, \555) -\2478 = NOR(\2269, \2414) -\2481 = NOR(\2365, \2418) -\2482 = NOR(\2418, \603) -\2483 = NOR(\2273, \2418) -\2486 = NOR(\2368, \2422) -\2487 = NOR(\2422, \651) -\2488 = NOR(\2277, \2422) -\2491 = NOR(\2371, \2426) -\2492 = NOR(\2426, \699) -\2493 = NOR(\2281, \2426) -\2496 = NOR(\2374, \2430) -\2497 = NOR(\2430, \747) -\2498 = NOR(\2285, \2430) -\2501 = NOR(\2377, \2434) -\2502 = NOR(\2434, \795) -\2503 = NOR(\2289, \2434) -\2506 = NOR(\2380, \2438) -\2507 = NOR(\2438, \843) -\2508 = NOR(\2293, \2438) -\2511 = NOR(\2383, \2442) -\2512 = NOR(\2442, \891) -\2513 = NOR(\2297, \2442) -\2516 = NOR(\2386, \2446) -\2517 = NOR(\2446, \939) -\2518 = NOR(\2301, \2446) -\2521 = NOR(\2389, \2450) -\2522 = NOR(\2450, \987) -\2523 = NOR(\2305, \2450) -\2526 = NOR(\2392, \2454) -\2527 = NOR(\2454, \1035) -\2528 = NOR(\2309, \2454) -\2531 = NOR(\2395, \2458) -\2532 = NOR(\2458, \1083) -\2533 = NOR(\2313, \2458) -\2536 = NOR(\2462, \2463) -\2539 = NOR(\2467, \2464) -\2543 = NOR(\2407, \2470) -\2544 = NOR(\2470, \2404) -\2545 = NOR(\2474, \2475) -\2548 = NOR(\2476, \2477) -\2549 = NOR(\2481, \2482) -\2552 = NOR(\2486, \2487) -\2555 = NOR(\2491, \2492) -\2558 = NOR(\2496, \2497) -\2561 = NOR(\2501, \2502) -\2564 = NOR(\2506, \2507) -\2567 = NOR(\2511, \2512) -\2570 = NOR(\2516, \2517) -\2573 = NOR(\2521, \2522) -\2576 = NOR(\2526, \2527) -\2579 = NOR(\2531, \2532) -\2582 = NOR(\2536, \2533) -\2586 = NOR(\2467, \2539) -\2587 = NOR(\2539, \2464) -\2588 = NOR(\2543, \2544) -\2591 = NOR(\2545, \1230) -\2595 = NOR(\2549, \2478) -\2599 = NOR(\2552, \2483) -\2603 = NOR(\2555, \2488) -\2607 = NOR(\2558, \2493) -\2611 = NOR(\2561, \2498) -\2615 = NOR(\2564, \2503) -\2619 = NOR(\2567, \2508) -\2623 = NOR(\2570, \2513) -\2627 = NOR(\2573, \2518) -\2631 = NOR(\2576, \2523) -\2635 = NOR(\2579, \2528) -\2639 = NOR(\2536, \2582) -\2640 = NOR(\2582, \2533) -\2641 = NOR(\2586, \2587) -\2644 = NOR(\2588, \1182) -\2648 = NOR(\2545, \2591) -\2649 = NOR(\2591, \1230) -\2650 = NOR(\2410, \2591) -\2653 = NOR(\2549, \2595) -\2654 = NOR(\2595, \2478) -\2655 = NOR(\2552, \2599) -\2656 = NOR(\2599, \2483) -\2657 = NOR(\2555, \2603) -\2658 = NOR(\2603, \2488) -\2659 = NOR(\2558, \2607) -\2660 = NOR(\2607, \2493) -\2661 = NOR(\2561, \2611) -\2662 = NOR(\2611, \2498) -\2663 = NOR(\2564, \2615) -\2664 = NOR(\2615, \2503) -\2665 = NOR(\2567, \2619) -\2666 = NOR(\2619, \2508) -\2667 = NOR(\2570, \2623) -\2668 = NOR(\2623, \2513) -\2669 = NOR(\2573, \2627) -\2670 = NOR(\2627, \2518) -\2671 = NOR(\2576, \2631) -\2672 = NOR(\2631, \2523) -\2673 = NOR(\2579, \2635) -\2674 = NOR(\2635, \2528) -\2675 = NOR(\2639, \2640) -\2678 = NOR(\2641, \1134) -\2682 = NOR(\2588, \2644) -\2683 = NOR(\2644, \1182) -\2684 = NOR(\2470, \2644) -\2687 = NOR(\2648, \2649) -\2690 = NOR(\1278, \2650) -\2694 = NOR(\2653, \2654) -\2697 = NOR(\2655, \2656) -\2700 = NOR(\2657, \2658) -\2703 = NOR(\2659, \2660) -\2706 = NOR(\2661, \2662) -\2709 = NOR(\2663, \2664) -\2712 = NOR(\2665, \2666) -\2715 = NOR(\2667, \2668) -\2718 = NOR(\2669, \2670) -\2721 = NOR(\2671, \2672) -\2724 = NOR(\2673, \2674) -\2727 = NOR(\2675, \1086) -\2731 = NOR(\2641, \2678) -\2732 = NOR(\2678, \1134) -\2733 = NOR(\2539, \2678) -\2736 = NOR(\2682, \2683) -\2739 = NOR(\2687, \2684) -\2743 = NOR(\1278, \2690) -\2744 = NOR(\2690, \2650) -\2745 = NOR(\2694, \558) -\2749 = NOR(\2697, \606) -\2753 = NOR(\2700, \654) -\2757 = NOR(\2703, \702) -\2761 = NOR(\2706, \750) -\2765 = NOR(\2709, \798) -\2769 = NOR(\2712, \846) -\2773 = NOR(\2715, \894) -\2777 = NOR(\2718, \942) -\2781 = NOR(\2721, \990) -\2785 = NOR(\2724, \1038) -\2789 = NOR(\2675, \2727) -\2790 = NOR(\2727, \1086) -\2791 = NOR(\2582, \2727) -\2794 = NOR(\2731, \2732) -\2797 = NOR(\2736, \2733) -\2801 = NOR(\2687, \2739) -\2802 = NOR(\2739, \2684) -\2803 = NOR(\2743, \2744) -\2806 = NOR(\2694, \2745) -\2807 = NOR(\2745, \558) -\2808 = NOR(\2595, \2745) -\2811 = NOR(\2697, \2749) -\2812 = NOR(\2749, \606) -\2813 = NOR(\2599, \2749) -\2816 = NOR(\2700, \2753) -\2817 = NOR(\2753, \654) -\2818 = NOR(\2603, \2753) -\2821 = NOR(\2703, \2757) -\2822 = NOR(\2757, \702) -\2823 = NOR(\2607, \2757) -\2826 = NOR(\2706, \2761) -\2827 = NOR(\2761, \750) -\2828 = NOR(\2611, \2761) -\2831 = NOR(\2709, \2765) -\2832 = NOR(\2765, \798) -\2833 = NOR(\2615, \2765) -\2836 = NOR(\2712, \2769) -\2837 = NOR(\2769, \846) -\2838 = NOR(\2619, \2769) -\2841 = NOR(\2715, \2773) -\2842 = NOR(\2773, \894) -\2843 = NOR(\2623, \2773) -\2846 = NOR(\2718, \2777) -\2847 = NOR(\2777, \942) -\2848 = NOR(\2627, \2777) -\2851 = NOR(\2721, \2781) -\2852 = NOR(\2781, \990) -\2853 = NOR(\2631, \2781) -\2856 = NOR(\2724, \2785) -\2857 = NOR(\2785, \1038) -\2858 = NOR(\2635, \2785) -\2861 = NOR(\2789, \2790) -\2864 = NOR(\2794, \2791) -\2868 = NOR(\2736, \2797) -\2869 = NOR(\2797, \2733) -\2870 = NOR(\2801, \2802) -\2873 = NOR(\2803, \1233) -\2877 = NOR(\2806, \2807) -\2878 = NOR(\2811, \2812) -\2881 = NOR(\2816, \2817) -\2884 = NOR(\2821, \2822) -\2887 = NOR(\2826, \2827) -\2890 = NOR(\2831, \2832) -\2893 = NOR(\2836, \2837) -\2896 = NOR(\2841, \2842) -\2899 = NOR(\2846, \2847) -\2902 = NOR(\2851, \2852) -\2905 = NOR(\2856, \2857) -\2908 = NOR(\2861, \2858) -\2912 = NOR(\2794, \2864) -\2913 = NOR(\2864, \2791) -\2914 = NOR(\2868, \2869) -\2917 = NOR(\2870, \1185) -\2921 = NOR(\2803, \2873) -\2922 = NOR(\2873, \1233) -\2923 = NOR(\2690, \2873) -\2926 = NOR(\2878, \2808) -\2930 = NOR(\2881, \2813) -\2934 = NOR(\2884, \2818) -\2938 = NOR(\2887, \2823) -\2942 = NOR(\2890, \2828) -\2946 = NOR(\2893, \2833) -\2950 = NOR(\2896, \2838) -\2954 = NOR(\2899, \2843) -\2958 = NOR(\2902, \2848) -\2962 = NOR(\2905, \2853) -\2966 = NOR(\2861, \2908) -\2967 = NOR(\2908, \2858) -\2968 = NOR(\2912, \2913) -\2971 = NOR(\2914, \1137) -\2975 = NOR(\2870, \2917) -\2976 = NOR(\2917, \1185) -\2977 = NOR(\2739, \2917) -\2980 = NOR(\2921, \2922) -\2983 = NOR(\1281, \2923) -\2987 = NOR(\2878, \2926) -\2988 = NOR(\2926, \2808) -\2989 = NOR(\2881, \2930) -\2990 = NOR(\2930, \2813) -\2991 = NOR(\2884, \2934) -\2992 = NOR(\2934, \2818) -\2993 = NOR(\2887, \2938) -\2994 = NOR(\2938, \2823) -\2995 = NOR(\2890, \2942) -\2996 = NOR(\2942, \2828) -\2997 = NOR(\2893, \2946) -\2998 = NOR(\2946, \2833) -\2999 = NOR(\2896, \2950) -\3000 = NOR(\2950, \2838) -\3001 = NOR(\2899, \2954) -\3002 = NOR(\2954, \2843) -\3003 = NOR(\2902, \2958) -\3004 = NOR(\2958, \2848) -\3005 = NOR(\2905, \2962) -\3006 = NOR(\2962, \2853) -\3007 = NOR(\2966, \2967) -\3010 = NOR(\2968, \1089) -\3014 = NOR(\2914, \2971) -\3015 = NOR(\2971, \1137) -\3016 = NOR(\2797, \2971) -\3019 = NOR(\2975, \2976) -\3022 = NOR(\2980, \2977) -\3026 = NOR(\1281, \2983) -\3027 = NOR(\2983, \2923) -\3028 = NOR(\2987, \2988) -\3031 = NOR(\2989, \2990) -\3034 = NOR(\2991, \2992) -\3037 = NOR(\2993, \2994) -\3040 = NOR(\2995, \2996) -\3043 = NOR(\2997, \2998) -\3046 = NOR(\2999, \3000) -\3049 = NOR(\3001, \3002) -\3052 = NOR(\3003, \3004) -\3055 = NOR(\3005, \3006) -\3058 = NOR(\3007, \1041) -\3062 = NOR(\2968, \3010) -\3063 = NOR(\3010, \1089) -\3064 = NOR(\2864, \3010) -\3067 = NOR(\3014, \3015) -\3070 = NOR(\3019, \3016) -\3074 = NOR(\2980, \3022) -\3075 = NOR(\3022, \2977) -\3076 = NOR(\3026, \3027) -\3079 = NOR(\3028, \561) -\3083 = NOR(\3031, \609) -\3087 = NOR(\3034, \657) -\3091 = NOR(\3037, \705) -\3095 = NOR(\3040, \753) -\3099 = NOR(\3043, \801) -\3103 = NOR(\3046, \849) -\3107 = NOR(\3049, \897) -\3111 = NOR(\3052, \945) -\3115 = NOR(\3055, \993) -\3119 = NOR(\3007, \3058) -\3120 = NOR(\3058, \1041) -\3121 = NOR(\2908, \3058) -\3124 = NOR(\3062, \3063) -\3127 = NOR(\3067, \3064) -\3131 = NOR(\3019, \3070) -\3132 = NOR(\3070, \3016) -\3133 = NOR(\3074, \3075) -\3136 = NOR(\3076, \1236) -\3140 = NOR(\3028, \3079) -\3141 = NOR(\3079, \561) -\3142 = NOR(\2926, \3079) -\3145 = NOR(\3031, \3083) -\3146 = NOR(\3083, \609) -\3147 = NOR(\2930, \3083) -\3150 = NOR(\3034, \3087) -\3151 = NOR(\3087, \657) -\3152 = NOR(\2934, \3087) -\3155 = NOR(\3037, \3091) -\3156 = NOR(\3091, \705) -\3157 = NOR(\2938, \3091) -\3160 = NOR(\3040, \3095) -\3161 = NOR(\3095, \753) -\3162 = NOR(\2942, \3095) -\3165 = NOR(\3043, \3099) -\3166 = NOR(\3099, \801) -\3167 = NOR(\2946, \3099) -\3170 = NOR(\3046, \3103) -\3171 = NOR(\3103, \849) -\3172 = NOR(\2950, \3103) -\3175 = NOR(\3049, \3107) -\3176 = NOR(\3107, \897) -\3177 = NOR(\2954, \3107) -\3180 = NOR(\3052, \3111) -\3181 = NOR(\3111, \945) -\3182 = NOR(\2958, \3111) -\3185 = NOR(\3055, \3115) -\3186 = NOR(\3115, \993) -\3187 = NOR(\2962, \3115) -\3190 = NOR(\3119, \3120) -\3193 = NOR(\3124, \3121) -\3197 = NOR(\3067, \3127) -\3198 = NOR(\3127, \3064) -\3199 = NOR(\3131, \3132) -\3202 = NOR(\3133, \1188) -\3206 = NOR(\3076, \3136) -\3207 = NOR(\3136, \1236) -\3208 = NOR(\2983, \3136) -\3211 = NOR(\3140, \3141) -\3212 = NOR(\3145, \3146) -\3215 = NOR(\3150, \3151) -\3218 = NOR(\3155, \3156) -\3221 = NOR(\3160, \3161) -\3224 = NOR(\3165, \3166) -\3227 = NOR(\3170, \3171) -\3230 = NOR(\3175, \3176) -\3233 = NOR(\3180, \3181) -\3236 = NOR(\3185, \3186) -\3239 = NOR(\3190, \3187) -\3243 = NOR(\3124, \3193) -\3244 = NOR(\3193, \3121) -\3245 = NOR(\3197, \3198) -\3248 = NOR(\3199, \1140) -\3252 = NOR(\3133, \3202) -\3253 = NOR(\3202, \1188) -\3254 = NOR(\3022, \3202) -\3257 = NOR(\3206, \3207) -\3260 = NOR(\1284, \3208) -\3264 = NOR(\3212, \3142) -\3268 = NOR(\3215, \3147) -\3272 = NOR(\3218, \3152) -\3276 = NOR(\3221, \3157) -\3280 = NOR(\3224, \3162) -\3284 = NOR(\3227, \3167) -\3288 = NOR(\3230, \3172) -\3292 = NOR(\3233, \3177) -\3296 = NOR(\3236, \3182) -\3300 = NOR(\3190, \3239) -\3301 = NOR(\3239, \3187) -\3302 = NOR(\3243, \3244) -\3305 = NOR(\3245, \1092) -\3309 = NOR(\3199, \3248) -\3310 = NOR(\3248, \1140) -\3311 = NOR(\3070, \3248) -\3314 = NOR(\3252, \3253) -\3317 = NOR(\3257, \3254) -\3321 = NOR(\1284, \3260) -\3322 = NOR(\3260, \3208) -\3323 = NOR(\3212, \3264) -\3324 = NOR(\3264, \3142) -\3325 = NOR(\3215, \3268) -\3326 = NOR(\3268, \3147) -\3327 = NOR(\3218, \3272) -\3328 = NOR(\3272, \3152) -\3329 = NOR(\3221, \3276) -\3330 = NOR(\3276, \3157) -\3331 = NOR(\3224, \3280) -\3332 = NOR(\3280, \3162) -\3333 = NOR(\3227, \3284) -\3334 = NOR(\3284, \3167) -\3335 = NOR(\3230, \3288) -\3336 = NOR(\3288, \3172) -\3337 = NOR(\3233, \3292) -\3338 = NOR(\3292, \3177) -\3339 = NOR(\3236, \3296) -\3340 = NOR(\3296, \3182) -\3341 = NOR(\3300, \3301) -\3344 = NOR(\3302, \1044) -\3348 = NOR(\3245, \3305) -\3349 = NOR(\3305, \1092) -\3350 = NOR(\3127, \3305) -\3353 = NOR(\3309, \3310) -\3356 = NOR(\3314, \3311) -\3360 = NOR(\3257, \3317) -\3361 = NOR(\3317, \3254) -\3362 = NOR(\3321, \3322) -\3365 = NOR(\3323, \3324) -\3368 = NOR(\3325, \3326) -\3371 = NOR(\3327, \3328) -\3374 = NOR(\3329, \3330) -\3377 = NOR(\3331, \3332) -\3380 = NOR(\3333, \3334) -\3383 = NOR(\3335, \3336) -\3386 = NOR(\3337, \3338) -\3389 = NOR(\3339, \3340) -\3392 = NOR(\3341, \996) -\3396 = NOR(\3302, \3344) -\3397 = NOR(\3344, \1044) -\3398 = NOR(\3193, \3344) -\3401 = NOR(\3348, \3349) -\3404 = NOR(\3353, \3350) -\3408 = NOR(\3314, \3356) -\3409 = NOR(\3356, \3311) -\3410 = NOR(\3360, \3361) -\3413 = NOR(\3362, \1239) -\3417 = NOR(\3365, \564) -\3421 = NOR(\3368, \612) -\3425 = NOR(\3371, \660) -\3429 = NOR(\3374, \708) -\3433 = NOR(\3377, \756) -\3437 = NOR(\3380, \804) -\3441 = NOR(\3383, \852) -\3445 = NOR(\3386, \900) -\3449 = NOR(\3389, \948) -\3453 = NOR(\3341, \3392) -\3454 = NOR(\3392, \996) -\3455 = NOR(\3239, \3392) -\3458 = NOR(\3396, \3397) -\3461 = NOR(\3401, \3398) -\3465 = NOR(\3353, \3404) -\3466 = NOR(\3404, \3350) -\3467 = NOR(\3408, \3409) -\3470 = NOR(\3410, \1191) -\3474 = NOR(\3362, \3413) -\3475 = NOR(\3413, \1239) -\3476 = NOR(\3260, \3413) -\3479 = NOR(\3365, \3417) -\3480 = NOR(\3417, \564) -\3481 = NOR(\3264, \3417) -\3484 = NOR(\3368, \3421) -\3485 = NOR(\3421, \612) -\3486 = NOR(\3268, \3421) -\3489 = NOR(\3371, \3425) -\3490 = NOR(\3425, \660) -\3491 = NOR(\3272, \3425) -\3494 = NOR(\3374, \3429) -\3495 = NOR(\3429, \708) -\3496 = NOR(\3276, \3429) -\3499 = NOR(\3377, \3433) -\3500 = NOR(\3433, \756) -\3501 = NOR(\3280, \3433) -\3504 = NOR(\3380, \3437) -\3505 = NOR(\3437, \804) -\3506 = NOR(\3284, \3437) -\3509 = NOR(\3383, \3441) -\3510 = NOR(\3441, \852) -\3511 = NOR(\3288, \3441) -\3514 = NOR(\3386, \3445) -\3515 = NOR(\3445, \900) -\3516 = NOR(\3292, \3445) -\3519 = NOR(\3389, \3449) -\3520 = NOR(\3449, \948) -\3521 = NOR(\3296, \3449) -\3524 = NOR(\3453, \3454) -\3527 = NOR(\3458, \3455) -\3531 = NOR(\3401, \3461) -\3532 = NOR(\3461, \3398) -\3533 = NOR(\3465, \3466) -\3536 = NOR(\3467, \1143) -\3540 = NOR(\3410, \3470) -\3541 = NOR(\3470, \1191) -\3542 = NOR(\3317, \3470) -\3545 = NOR(\3474, \3475) -\3548 = NOR(\1287, \3476) -\3552 = NOR(\3479, \3480) -\3553 = NOR(\3484, \3485) -\3556 = NOR(\3489, \3490) -\3559 = NOR(\3494, \3495) -\3562 = NOR(\3499, \3500) -\3565 = NOR(\3504, \3505) -\3568 = NOR(\3509, \3510) -\3571 = NOR(\3514, \3515) -\3574 = NOR(\3519, \3520) -\3577 = NOR(\3524, \3521) -\3581 = NOR(\3458, \3527) -\3582 = NOR(\3527, \3455) -\3583 = NOR(\3531, \3532) -\3586 = NOR(\3533, \1095) -\3590 = NOR(\3467, \3536) -\3591 = NOR(\3536, \1143) -\3592 = NOR(\3356, \3536) -\3595 = NOR(\3540, \3541) -\3598 = NOR(\3545, \3542) -\3602 = NOR(\1287, \3548) -\3603 = NOR(\3548, \3476) -\3604 = NOR(\3553, \3481) -\3608 = NOR(\3556, \3486) -\3612 = NOR(\3559, \3491) -\3616 = NOR(\3562, \3496) -\3620 = NOR(\3565, \3501) -\3624 = NOR(\3568, \3506) -\3628 = NOR(\3571, \3511) -\3632 = NOR(\3574, \3516) -\3636 = NOR(\3524, \3577) -\3637 = NOR(\3577, \3521) -\3638 = NOR(\3581, \3582) -\3641 = NOR(\3583, \1047) -\3645 = NOR(\3533, \3586) -\3646 = NOR(\3586, \1095) -\3647 = NOR(\3404, \3586) -\3650 = NOR(\3590, \3591) -\3653 = NOR(\3595, \3592) -\3657 = NOR(\3545, \3598) -\3658 = NOR(\3598, \3542) -\3659 = NOR(\3602, \3603) -\3662 = NOR(\3553, \3604) -\3663 = NOR(\3604, \3481) -\3664 = NOR(\3556, \3608) -\3665 = NOR(\3608, \3486) -\3666 = NOR(\3559, \3612) -\3667 = NOR(\3612, \3491) -\3668 = NOR(\3562, \3616) -\3669 = NOR(\3616, \3496) -\3670 = NOR(\3565, \3620) -\3671 = NOR(\3620, \3501) -\3672 = NOR(\3568, \3624) -\3673 = NOR(\3624, \3506) -\3674 = NOR(\3571, \3628) -\3675 = NOR(\3628, \3511) -\3676 = NOR(\3574, \3632) -\3677 = NOR(\3632, \3516) -\3678 = NOR(\3636, \3637) -\3681 = NOR(\3638, \999) -\3685 = NOR(\3583, \3641) -\3686 = NOR(\3641, \1047) -\3687 = NOR(\3461, \3641) -\3690 = NOR(\3645, \3646) -\3693 = NOR(\3650, \3647) -\3697 = NOR(\3595, \3653) -\3698 = NOR(\3653, \3592) -\3699 = NOR(\3657, \3658) -\3702 = NOR(\3659, \1242) -\3706 = NOR(\3662, \3663) -\3709 = NOR(\3664, \3665) -\3712 = NOR(\3666, \3667) -\3715 = NOR(\3668, \3669) -\3718 = NOR(\3670, \3671) -\3721 = NOR(\3672, \3673) -\3724 = NOR(\3674, \3675) -\3727 = NOR(\3676, \3677) -\3730 = NOR(\3678, \951) -\3734 = NOR(\3638, \3681) -\3735 = NOR(\3681, \999) -\3736 = NOR(\3527, \3681) -\3739 = NOR(\3685, \3686) -\3742 = NOR(\3690, \3687) -\3746 = NOR(\3650, \3693) -\3747 = NOR(\3693, \3647) -\3748 = NOR(\3697, \3698) -\3751 = NOR(\3699, \1194) -\3755 = NOR(\3659, \3702) -\3756 = NOR(\3702, \1242) -\3757 = NOR(\3548, \3702) -\3760 = NOR(\3706, \567) -\3764 = NOR(\3709, \615) -\3768 = NOR(\3712, \663) -\3772 = NOR(\3715, \711) -\3776 = NOR(\3718, \759) -\3780 = NOR(\3721, \807) -\3784 = NOR(\3724, \855) -\3788 = NOR(\3727, \903) -\3792 = NOR(\3678, \3730) -\3793 = NOR(\3730, \951) -\3794 = NOR(\3577, \3730) -\3797 = NOR(\3734, \3735) -\3800 = NOR(\3739, \3736) -\3804 = NOR(\3690, \3742) -\3805 = NOR(\3742, \3687) -\3806 = NOR(\3746, \3747) -\3809 = NOR(\3748, \1146) -\3813 = NOR(\3699, \3751) -\3814 = NOR(\3751, \1194) -\3815 = NOR(\3598, \3751) -\3818 = NOR(\3755, \3756) -\3821 = NOR(\1290, \3757) -\3825 = NOR(\3706, \3760) -\3826 = NOR(\3760, \567) -\3827 = NOR(\3604, \3760) -\3830 = NOR(\3709, \3764) -\3831 = NOR(\3764, \615) -\3832 = NOR(\3608, \3764) -\3835 = NOR(\3712, \3768) -\3836 = NOR(\3768, \663) -\3837 = NOR(\3612, \3768) -\3840 = NOR(\3715, \3772) -\3841 = NOR(\3772, \711) -\3842 = NOR(\3616, \3772) -\3845 = NOR(\3718, \3776) -\3846 = NOR(\3776, \759) -\3847 = NOR(\3620, \3776) -\3850 = NOR(\3721, \3780) -\3851 = NOR(\3780, \807) -\3852 = NOR(\3624, \3780) -\3855 = NOR(\3724, \3784) -\3856 = NOR(\3784, \855) -\3857 = NOR(\3628, \3784) -\3860 = NOR(\3727, \3788) -\3861 = NOR(\3788, \903) -\3862 = NOR(\3632, \3788) -\3865 = NOR(\3792, \3793) -\3868 = NOR(\3797, \3794) -\3872 = NOR(\3739, \3800) -\3873 = NOR(\3800, \3736) -\3874 = NOR(\3804, \3805) -\3877 = NOR(\3806, \1098) -\3881 = NOR(\3748, \3809) -\3882 = NOR(\3809, \1146) -\3883 = NOR(\3653, \3809) -\3886 = NOR(\3813, \3814) -\3889 = NOR(\3818, \3815) -\3893 = NOR(\1290, \3821) -\3894 = NOR(\3821, \3757) -\3895 = NOR(\3825, \3826) -\3896 = NOR(\3830, \3831) -\3899 = NOR(\3835, \3836) -\3902 = NOR(\3840, \3841) -\3905 = NOR(\3845, \3846) -\3908 = NOR(\3850, \3851) -\3911 = NOR(\3855, \3856) -\3914 = NOR(\3860, \3861) -\3917 = NOR(\3865, \3862) -\3921 = NOR(\3797, \3868) -\3922 = NOR(\3868, \3794) -\3923 = NOR(\3872, \3873) -\3926 = NOR(\3874, \1050) -\3930 = NOR(\3806, \3877) -\3931 = NOR(\3877, \1098) -\3932 = NOR(\3693, \3877) -\3935 = NOR(\3881, \3882) -\3938 = NOR(\3886, \3883) -\3942 = NOR(\3818, \3889) -\3943 = NOR(\3889, \3815) -\3944 = NOR(\3893, \3894) -\3947 = NOR(\3896, \3827) -\3951 = NOR(\3899, \3832) -\3955 = NOR(\3902, \3837) -\3959 = NOR(\3905, \3842) -\3963 = NOR(\3908, \3847) -\3967 = NOR(\3911, \3852) -\3971 = NOR(\3914, \3857) -\3975 = NOR(\3865, \3917) -\3976 = NOR(\3917, \3862) -\3977 = NOR(\3921, \3922) -\3980 = NOR(\3923, \1002) -\3984 = NOR(\3874, \3926) -\3985 = NOR(\3926, \1050) -\3986 = NOR(\3742, \3926) -\3989 = NOR(\3930, \3931) -\3992 = NOR(\3935, \3932) -\3996 = NOR(\3886, \3938) -\3997 = NOR(\3938, \3883) -\3998 = NOR(\3942, \3943) -\4001 = NOR(\3944, \1245) -\4005 = NOR(\3896, \3947) -\4006 = NOR(\3947, \3827) -\4007 = NOR(\3899, \3951) -\4008 = NOR(\3951, \3832) -\4009 = NOR(\3902, \3955) -\4010 = NOR(\3955, \3837) -\4011 = NOR(\3905, \3959) -\4012 = NOR(\3959, \3842) -\4013 = NOR(\3908, \3963) -\4014 = NOR(\3963, \3847) -\4015 = NOR(\3911, \3967) -\4016 = NOR(\3967, \3852) -\4017 = NOR(\3914, \3971) -\4018 = NOR(\3971, \3857) -\4019 = NOR(\3975, \3976) -\4022 = NOR(\3977, \954) -\4026 = NOR(\3923, \3980) -\4027 = NOR(\3980, \1002) -\4028 = NOR(\3800, \3980) -\4031 = NOR(\3984, \3985) -\4034 = NOR(\3989, \3986) -\4038 = NOR(\3935, \3992) -\4039 = NOR(\3992, \3932) -\4040 = NOR(\3996, \3997) -\4043 = NOR(\3998, \1197) -\4047 = NOR(\3944, \4001) -\4048 = NOR(\4001, \1245) -\4049 = NOR(\3821, \4001) -\4052 = NOR(\4005, \4006) -\4055 = NOR(\4007, \4008) -\4058 = NOR(\4009, \4010) -\4061 = NOR(\4011, \4012) -\4064 = NOR(\4013, \4014) -\4067 = NOR(\4015, \4016) -\4070 = NOR(\4017, \4018) -\4073 = NOR(\4019, \906) -\4077 = NOR(\3977, \4022) -\4078 = NOR(\4022, \954) -\4079 = NOR(\3868, \4022) -\4082 = NOR(\4026, \4027) -\4085 = NOR(\4031, \4028) -\4089 = NOR(\3989, \4034) -\4090 = NOR(\4034, \3986) -\4091 = NOR(\4038, \4039) -\4094 = NOR(\4040, \1149) -\4098 = NOR(\3998, \4043) -\4099 = NOR(\4043, \1197) -\4100 = NOR(\3889, \4043) -\4103 = NOR(\4047, \4048) -\4106 = NOR(\1293, \4049) -\4110 = NOR(\4052, \570) -\4114 = NOR(\4055, \618) -\4118 = NOR(\4058, \666) -\4122 = NOR(\4061, \714) -\4126 = NOR(\4064, \762) -\4130 = NOR(\4067, \810) -\4134 = NOR(\4070, \858) -\4138 = NOR(\4019, \4073) -\4139 = NOR(\4073, \906) -\4140 = NOR(\3917, \4073) -\4143 = NOR(\4077, \4078) -\4146 = NOR(\4082, \4079) -\4150 = NOR(\4031, \4085) -\4151 = NOR(\4085, \4028) -\4152 = NOR(\4089, \4090) -\4155 = NOR(\4091, \1101) -\4159 = NOR(\4040, \4094) -\4160 = NOR(\4094, \1149) -\4161 = NOR(\3938, \4094) -\4164 = NOR(\4098, \4099) -\4167 = NOR(\4103, \4100) -\4171 = NOR(\1293, \4106) -\4172 = NOR(\4106, \4049) -\4173 = NOR(\4052, \4110) -\4174 = NOR(\4110, \570) -\4175 = NOR(\3947, \4110) -\4178 = NOR(\4055, \4114) -\4179 = NOR(\4114, \618) -\4180 = NOR(\3951, \4114) -\4183 = NOR(\4058, \4118) -\4184 = NOR(\4118, \666) -\4185 = NOR(\3955, \4118) -\4188 = NOR(\4061, \4122) -\4189 = NOR(\4122, \714) -\4190 = NOR(\3959, \4122) -\4193 = NOR(\4064, \4126) -\4194 = NOR(\4126, \762) -\4195 = NOR(\3963, \4126) -\4198 = NOR(\4067, \4130) -\4199 = NOR(\4130, \810) -\4200 = NOR(\3967, \4130) -\4203 = NOR(\4070, \4134) -\4204 = NOR(\4134, \858) -\4205 = NOR(\3971, \4134) -\4208 = NOR(\4138, \4139) -\4211 = NOR(\4143, \4140) -\4215 = NOR(\4082, \4146) -\4216 = NOR(\4146, \4079) -\4217 = NOR(\4150, \4151) -\4220 = NOR(\4152, \1053) -\4224 = NOR(\4091, \4155) -\4225 = NOR(\4155, \1101) -\4226 = NOR(\3992, \4155) -\4229 = NOR(\4159, \4160) -\4232 = NOR(\4164, \4161) -\4236 = NOR(\4103, \4167) -\4237 = NOR(\4167, \4100) -\4238 = NOR(\4171, \4172) -\4241 = NOR(\4173, \4174) -\4242 = NOR(\4178, \4179) -\4245 = NOR(\4183, \4184) -\4248 = NOR(\4188, \4189) -\4251 = NOR(\4193, \4194) -\4254 = NOR(\4198, \4199) -\4257 = NOR(\4203, \4204) -\4260 = NOR(\4208, \4205) -\4264 = NOR(\4143, \4211) -\4265 = NOR(\4211, \4140) -\4266 = NOR(\4215, \4216) -\4269 = NOR(\4217, \1005) -\4273 = NOR(\4152, \4220) -\4274 = NOR(\4220, \1053) -\4275 = NOR(\4034, \4220) -\4278 = NOR(\4224, \4225) -\4281 = NOR(\4229, \4226) -\4285 = NOR(\4164, \4232) -\4286 = NOR(\4232, \4161) -\4287 = NOR(\4236, \4237) -\4290 = NOR(\4238, \1248) -\4294 = NOR(\4242, \4175) -\4298 = NOR(\4245, \4180) -\4302 = NOR(\4248, \4185) -\4306 = NOR(\4251, \4190) -\4310 = NOR(\4254, \4195) -\4314 = NOR(\4257, \4200) -\4318 = NOR(\4208, \4260) -\4319 = NOR(\4260, \4205) -\4320 = NOR(\4264, \4265) -\4323 = NOR(\4266, \957) -\4327 = NOR(\4217, \4269) -\4328 = NOR(\4269, \1005) -\4329 = NOR(\4085, \4269) -\4332 = NOR(\4273, \4274) -\4335 = NOR(\4278, \4275) -\4339 = NOR(\4229, \4281) -\4340 = NOR(\4281, \4226) -\4341 = NOR(\4285, \4286) -\4344 = NOR(\4287, \1200) -\4348 = NOR(\4238, \4290) -\4349 = NOR(\4290, \1248) -\4350 = NOR(\4106, \4290) -\4353 = NOR(\4242, \4294) -\4354 = NOR(\4294, \4175) -\4355 = NOR(\4245, \4298) -\4356 = NOR(\4298, \4180) -\4357 = NOR(\4248, \4302) -\4358 = NOR(\4302, \4185) -\4359 = NOR(\4251, \4306) -\4360 = NOR(\4306, \4190) -\4361 = NOR(\4254, \4310) -\4362 = NOR(\4310, \4195) -\4363 = NOR(\4257, \4314) -\4364 = NOR(\4314, \4200) -\4365 = NOR(\4318, \4319) -\4368 = NOR(\4320, \909) -\4372 = NOR(\4266, \4323) -\4373 = NOR(\4323, \957) -\4374 = NOR(\4146, \4323) -\4377 = NOR(\4327, \4328) -\4380 = NOR(\4332, \4329) -\4384 = NOR(\4278, \4335) -\4385 = NOR(\4335, \4275) -\4386 = NOR(\4339, \4340) -\4389 = NOR(\4341, \1152) -\4393 = NOR(\4287, \4344) -\4394 = NOR(\4344, \1200) -\4395 = NOR(\4167, \4344) -\4398 = NOR(\4348, \4349) -\4401 = NOR(\1296, \4350) -\4405 = NOR(\4353, \4354) -\4408 = NOR(\4355, \4356) -\4411 = NOR(\4357, \4358) -\4414 = NOR(\4359, \4360) -\4417 = NOR(\4361, \4362) -\4420 = NOR(\4363, \4364) -\4423 = NOR(\4365, \861) -\4427 = NOR(\4320, \4368) -\4428 = NOR(\4368, \909) -\4429 = NOR(\4211, \4368) -\4432 = NOR(\4372, \4373) -\4435 = NOR(\4377, \4374) -\4439 = NOR(\4332, \4380) -\4440 = NOR(\4380, \4329) -\4441 = NOR(\4384, \4385) -\4444 = NOR(\4386, \1104) -\4448 = NOR(\4341, \4389) -\4449 = NOR(\4389, \1152) -\4450 = NOR(\4232, \4389) -\4453 = NOR(\4393, \4394) -\4456 = NOR(\4398, \4395) -\4460 = NOR(\1296, \4401) -\4461 = NOR(\4401, \4350) -\4462 = NOR(\4405, \573) -\4466 = NOR(\4408, \621) -\4470 = NOR(\4411, \669) -\4474 = NOR(\4414, \717) -\4478 = NOR(\4417, \765) -\4482 = NOR(\4420, \813) -\4486 = NOR(\4365, \4423) -\4487 = NOR(\4423, \861) -\4488 = NOR(\4260, \4423) -\4491 = NOR(\4427, \4428) -\4494 = NOR(\4432, \4429) -\4498 = NOR(\4377, \4435) -\4499 = NOR(\4435, \4374) -\4500 = NOR(\4439, \4440) -\4503 = NOR(\4441, \1056) -\4507 = NOR(\4386, \4444) -\4508 = NOR(\4444, \1104) -\4509 = NOR(\4281, \4444) -\4512 = NOR(\4448, \4449) -\4515 = NOR(\4453, \4450) -\4519 = NOR(\4398, \4456) -\4520 = NOR(\4456, \4395) -\4521 = NOR(\4460, \4461) -\4524 = NOR(\4405, \4462) -\4525 = NOR(\4462, \573) -\4526 = NOR(\4294, \4462) -\4529 = NOR(\4408, \4466) -\4530 = NOR(\4466, \621) -\4531 = NOR(\4298, \4466) -\4534 = NOR(\4411, \4470) -\4535 = NOR(\4470, \669) -\4536 = NOR(\4302, \4470) -\4539 = NOR(\4414, \4474) -\4540 = NOR(\4474, \717) -\4541 = NOR(\4306, \4474) -\4544 = NOR(\4417, \4478) -\4545 = NOR(\4478, \765) -\4546 = NOR(\4310, \4478) -\4549 = NOR(\4420, \4482) -\4550 = NOR(\4482, \813) -\4551 = NOR(\4314, \4482) -\4554 = NOR(\4486, \4487) -\4557 = NOR(\4491, \4488) -\4561 = NOR(\4432, \4494) -\4562 = NOR(\4494, \4429) -\4563 = NOR(\4498, \4499) -\4566 = NOR(\4500, \1008) -\4570 = NOR(\4441, \4503) -\4571 = NOR(\4503, \1056) -\4572 = NOR(\4335, \4503) -\4575 = NOR(\4507, \4508) -\4578 = NOR(\4512, \4509) -\4582 = NOR(\4453, \4515) -\4583 = NOR(\4515, \4450) -\4584 = NOR(\4519, \4520) -\4587 = NOR(\4521, \1251) -\4591 = NOR(\4524, \4525) -\4592 = NOR(\4529, \4530) -\4595 = NOR(\4534, \4535) -\4598 = NOR(\4539, \4540) -\4601 = NOR(\4544, \4545) -\4604 = NOR(\4549, \4550) -\4607 = NOR(\4554, \4551) -\4611 = NOR(\4491, \4557) -\4612 = NOR(\4557, \4488) -\4613 = NOR(\4561, \4562) -\4616 = NOR(\4563, \960) -\4620 = NOR(\4500, \4566) -\4621 = NOR(\4566, \1008) -\4622 = NOR(\4380, \4566) -\4625 = NOR(\4570, \4571) -\4628 = NOR(\4575, \4572) -\4632 = NOR(\4512, \4578) -\4633 = NOR(\4578, \4509) -\4634 = NOR(\4582, \4583) -\4637 = NOR(\4584, \1203) -\4641 = NOR(\4521, \4587) -\4642 = NOR(\4587, \1251) -\4643 = NOR(\4401, \4587) -\4646 = NOR(\4592, \4526) -\4650 = NOR(\4595, \4531) -\4654 = NOR(\4598, \4536) -\4658 = NOR(\4601, \4541) -\4662 = NOR(\4604, \4546) -\4666 = NOR(\4554, \4607) -\4667 = NOR(\4607, \4551) -\4668 = NOR(\4611, \4612) -\4671 = NOR(\4613, \912) -\4675 = NOR(\4563, \4616) -\4676 = NOR(\4616, \960) -\4677 = NOR(\4435, \4616) -\4680 = NOR(\4620, \4621) -\4683 = NOR(\4625, \4622) -\4687 = NOR(\4575, \4628) -\4688 = NOR(\4628, \4572) -\4689 = NOR(\4632, \4633) -\4692 = NOR(\4634, \1155) -\4696 = NOR(\4584, \4637) -\4697 = NOR(\4637, \1203) -\4698 = NOR(\4456, \4637) -\4701 = NOR(\4641, \4642) -\4704 = NOR(\1299, \4643) -\4708 = NOR(\4592, \4646) -\4709 = NOR(\4646, \4526) -\4710 = NOR(\4595, \4650) -\4711 = NOR(\4650, \4531) -\4712 = NOR(\4598, \4654) -\4713 = NOR(\4654, \4536) -\4714 = NOR(\4601, \4658) -\4715 = NOR(\4658, \4541) -\4716 = NOR(\4604, \4662) -\4717 = NOR(\4662, \4546) -\4718 = NOR(\4666, \4667) -\4721 = NOR(\4668, \864) -\4725 = NOR(\4613, \4671) -\4726 = NOR(\4671, \912) -\4727 = NOR(\4494, \4671) -\4730 = NOR(\4675, \4676) -\4733 = NOR(\4680, \4677) -\4737 = NOR(\4625, \4683) -\4738 = NOR(\4683, \4622) -\4739 = NOR(\4687, \4688) -\4742 = NOR(\4689, \1107) -\4746 = NOR(\4634, \4692) -\4747 = NOR(\4692, \1155) -\4748 = NOR(\4515, \4692) -\4751 = NOR(\4696, \4697) -\4754 = NOR(\4701, \4698) -\4758 = NOR(\1299, \4704) -\4759 = NOR(\4704, \4643) -\4760 = NOR(\4708, \4709) -\4763 = NOR(\4710, \4711) -\4766 = NOR(\4712, \4713) -\4769 = NOR(\4714, \4715) -\4772 = NOR(\4716, \4717) -\4775 = NOR(\4718, \816) -\4779 = NOR(\4668, \4721) -\4780 = NOR(\4721, \864) -\4781 = NOR(\4557, \4721) -\4784 = NOR(\4725, \4726) -\4787 = NOR(\4730, \4727) -\4791 = NOR(\4680, \4733) -\4792 = NOR(\4733, \4677) -\4793 = NOR(\4737, \4738) -\4796 = NOR(\4739, \1059) -\4800 = NOR(\4689, \4742) -\4801 = NOR(\4742, \1107) -\4802 = NOR(\4578, \4742) -\4805 = NOR(\4746, \4747) -\4808 = NOR(\4751, \4748) -\4812 = NOR(\4701, \4754) -\4813 = NOR(\4754, \4698) -\4814 = NOR(\4758, \4759) -\4817 = NOR(\4760, \576) -\4821 = NOR(\4763, \624) -\4825 = NOR(\4766, \672) -\4829 = NOR(\4769, \720) -\4833 = NOR(\4772, \768) -\4837 = NOR(\4718, \4775) -\4838 = NOR(\4775, \816) -\4839 = NOR(\4607, \4775) -\4842 = NOR(\4779, \4780) -\4845 = NOR(\4784, \4781) -\4849 = NOR(\4730, \4787) -\4850 = NOR(\4787, \4727) -\4851 = NOR(\4791, \4792) -\4854 = NOR(\4793, \1011) -\4858 = NOR(\4739, \4796) -\4859 = NOR(\4796, \1059) -\4860 = NOR(\4628, \4796) -\4863 = NOR(\4800, \4801) -\4866 = NOR(\4805, \4802) -\4870 = NOR(\4751, \4808) -\4871 = NOR(\4808, \4748) -\4872 = NOR(\4812, \4813) -\4875 = NOR(\4814, \1254) -\4879 = NOR(\4760, \4817) -\4880 = NOR(\4817, \576) -\4881 = NOR(\4646, \4817) -\4884 = NOR(\4763, \4821) -\4885 = NOR(\4821, \624) -\4886 = NOR(\4650, \4821) -\4889 = NOR(\4766, \4825) -\4890 = NOR(\4825, \672) -\4891 = NOR(\4654, \4825) -\4894 = NOR(\4769, \4829) -\4895 = NOR(\4829, \720) -\4896 = NOR(\4658, \4829) -\4899 = NOR(\4772, \4833) -\4900 = NOR(\4833, \768) -\4901 = NOR(\4662, \4833) -\4904 = NOR(\4837, \4838) -\4907 = NOR(\4842, \4839) -\4911 = NOR(\4784, \4845) -\4912 = NOR(\4845, \4781) -\4913 = NOR(\4849, \4850) -\4916 = NOR(\4851, \963) -\4920 = NOR(\4793, \4854) -\4921 = NOR(\4854, \1011) -\4922 = NOR(\4683, \4854) -\4925 = NOR(\4858, \4859) -\4928 = NOR(\4863, \4860) -\4932 = NOR(\4805, \4866) -\4933 = NOR(\4866, \4802) -\4934 = NOR(\4870, \4871) -\4937 = NOR(\4872, \1206) -\4941 = NOR(\4814, \4875) -\4942 = NOR(\4875, \1254) -\4943 = NOR(\4704, \4875) -\4946 = NOR(\4879, \4880) -\4947 = NOR(\4884, \4885) -\4950 = NOR(\4889, \4890) -\4953 = NOR(\4894, \4895) -\4956 = NOR(\4899, \4900) -\4959 = NOR(\4904, \4901) -\4963 = NOR(\4842, \4907) -\4964 = NOR(\4907, \4839) -\4965 = NOR(\4911, \4912) -\4968 = NOR(\4913, \915) -\4972 = NOR(\4851, \4916) -\4973 = NOR(\4916, \963) -\4974 = NOR(\4733, \4916) -\4977 = NOR(\4920, \4921) -\4980 = NOR(\4925, \4922) -\4984 = NOR(\4863, \4928) -\4985 = NOR(\4928, \4860) -\4986 = NOR(\4932, \4933) -\4989 = NOR(\4934, \1158) -\4993 = NOR(\4872, \4937) -\4994 = NOR(\4937, \1206) -\4995 = NOR(\4754, \4937) -\4998 = NOR(\4941, \4942) -\5001 = NOR(\1302, \4943) -\5005 = NOR(\4947, \4881) -\5009 = NOR(\4950, \4886) -\5013 = NOR(\4953, \4891) -\5017 = NOR(\4956, \4896) -\5021 = NOR(\4904, \4959) -\5022 = NOR(\4959, \4901) -\5023 = NOR(\4963, \4964) -\5026 = NOR(\4965, \867) -\5030 = NOR(\4913, \4968) -\5031 = NOR(\4968, \915) -\5032 = NOR(\4787, \4968) -\5035 = NOR(\4972, \4973) -\5038 = NOR(\4977, \4974) -\5042 = NOR(\4925, \4980) -\5043 = NOR(\4980, \4922) -\5044 = NOR(\4984, \4985) -\5047 = NOR(\4986, \1110) -\5051 = NOR(\4934, \4989) -\5052 = NOR(\4989, \1158) -\5053 = NOR(\4808, \4989) -\5056 = NOR(\4993, \4994) -\5059 = NOR(\4998, \4995) -\5063 = NOR(\1302, \5001) -\5064 = NOR(\5001, \4943) -\5065 = NOR(\4947, \5005) -\5066 = NOR(\5005, \4881) -\5067 = NOR(\4950, \5009) -\5068 = NOR(\5009, \4886) -\5069 = NOR(\4953, \5013) -\5070 = NOR(\5013, \4891) -\5071 = NOR(\4956, \5017) -\5072 = NOR(\5017, \4896) -\5073 = NOR(\5021, \5022) -\5076 = NOR(\5023, \819) -\5080 = NOR(\4965, \5026) -\5081 = NOR(\5026, \867) -\5082 = NOR(\4845, \5026) -\5085 = NOR(\5030, \5031) -\5088 = NOR(\5035, \5032) -\5092 = NOR(\4977, \5038) -\5093 = NOR(\5038, \4974) -\5094 = NOR(\5042, \5043) -\5097 = NOR(\5044, \1062) -\5101 = NOR(\4986, \5047) -\5102 = NOR(\5047, \1110) -\5103 = NOR(\4866, \5047) -\5106 = NOR(\5051, \5052) -\5109 = NOR(\5056, \5053) -\5113 = NOR(\4998, \5059) -\5114 = NOR(\5059, \4995) -\5115 = NOR(\5063, \5064) -\5118 = NOR(\5065, \5066) -\5121 = NOR(\5067, \5068) -\5124 = NOR(\5069, \5070) -\5127 = NOR(\5071, \5072) -\5130 = NOR(\5073, \771) -\5134 = NOR(\5023, \5076) -\5135 = NOR(\5076, \819) -\5136 = NOR(\4907, \5076) -\5139 = NOR(\5080, \5081) -\5142 = NOR(\5085, \5082) -\5146 = NOR(\5035, \5088) -\5147 = NOR(\5088, \5032) -\5148 = NOR(\5092, \5093) -\5151 = NOR(\5094, \1014) -\5155 = NOR(\5044, \5097) -\5156 = NOR(\5097, \1062) -\5157 = NOR(\4928, \5097) -\5160 = NOR(\5101, \5102) -\5163 = NOR(\5106, \5103) -\5167 = NOR(\5056, \5109) -\5168 = NOR(\5109, \5053) -\5169 = NOR(\5113, \5114) -\5172 = NOR(\5115, \1257) -\5176 = NOR(\5118, \579) -\5180 = NOR(\5121, \627) -\5184 = NOR(\5124, \675) -\5188 = NOR(\5127, \723) -\5192 = NOR(\5073, \5130) -\5193 = NOR(\5130, \771) -\5194 = NOR(\4959, \5130) -\5197 = NOR(\5134, \5135) -\5200 = NOR(\5139, \5136) -\5204 = NOR(\5085, \5142) -\5205 = NOR(\5142, \5082) -\5206 = NOR(\5146, \5147) -\5209 = NOR(\5148, \966) -\5213 = NOR(\5094, \5151) -\5214 = NOR(\5151, \1014) -\5215 = NOR(\4980, \5151) -\5218 = NOR(\5155, \5156) -\5221 = NOR(\5160, \5157) -\5225 = NOR(\5106, \5163) -\5226 = NOR(\5163, \5103) -\5227 = NOR(\5167, \5168) -\5230 = NOR(\5169, \1209) -\5234 = NOR(\5115, \5172) -\5235 = NOR(\5172, \1257) -\5236 = NOR(\5001, \5172) -\5239 = NOR(\5118, \5176) -\5240 = NOR(\5176, \579) -\5241 = NOR(\5005, \5176) -\5244 = NOR(\5121, \5180) -\5245 = NOR(\5180, \627) -\5246 = NOR(\5009, \5180) -\5249 = NOR(\5124, \5184) -\5250 = NOR(\5184, \675) -\5251 = NOR(\5013, \5184) -\5254 = NOR(\5127, \5188) -\5255 = NOR(\5188, \723) -\5256 = NOR(\5017, \5188) -\5259 = NOR(\5192, \5193) -\5262 = NOR(\5197, \5194) -\5266 = NOR(\5139, \5200) -\5267 = NOR(\5200, \5136) -\5268 = NOR(\5204, \5205) -\5271 = NOR(\5206, \918) -\5275 = NOR(\5148, \5209) -\5276 = NOR(\5209, \966) -\5277 = NOR(\5038, \5209) -\5280 = NOR(\5213, \5214) -\5283 = NOR(\5218, \5215) -\5287 = NOR(\5160, \5221) -\5288 = NOR(\5221, \5157) -\5289 = NOR(\5225, \5226) -\5292 = NOR(\5227, \1161) -\5296 = NOR(\5169, \5230) -\5297 = NOR(\5230, \1209) -\5298 = NOR(\5059, \5230) -\5301 = NOR(\5234, \5235) -\5304 = NOR(\1305, \5236) -\5308 = NOR(\5239, \5240) -\5309 = NOR(\5244, \5245) -\5312 = NOR(\5249, \5250) -\5315 = NOR(\5254, \5255) -\5318 = NOR(\5259, \5256) -\5322 = NOR(\5197, \5262) -\5323 = NOR(\5262, \5194) -\5324 = NOR(\5266, \5267) -\5327 = NOR(\5268, \870) -\5331 = NOR(\5206, \5271) -\5332 = NOR(\5271, \918) -\5333 = NOR(\5088, \5271) -\5336 = NOR(\5275, \5276) -\5339 = NOR(\5280, \5277) -\5343 = NOR(\5218, \5283) -\5344 = NOR(\5283, \5215) -\5345 = NOR(\5287, \5288) -\5348 = NOR(\5289, \1113) -\5352 = NOR(\5227, \5292) -\5353 = NOR(\5292, \1161) -\5354 = NOR(\5109, \5292) -\5357 = NOR(\5296, \5297) -\5360 = NOR(\5301, \5298) -\5364 = NOR(\1305, \5304) -\5365 = NOR(\5304, \5236) -\5366 = NOR(\5309, \5241) -\5370 = NOR(\5312, \5246) -\5374 = NOR(\5315, \5251) -\5378 = NOR(\5259, \5318) -\5379 = NOR(\5318, \5256) -\5380 = NOR(\5322, \5323) -\5383 = NOR(\5324, \822) -\5387 = NOR(\5268, \5327) -\5388 = NOR(\5327, \870) -\5389 = NOR(\5142, \5327) -\5392 = NOR(\5331, \5332) -\5395 = NOR(\5336, \5333) -\5399 = NOR(\5280, \5339) -\5400 = NOR(\5339, \5277) -\5401 = NOR(\5343, \5344) -\5404 = NOR(\5345, \1065) -\5408 = NOR(\5289, \5348) -\5409 = NOR(\5348, \1113) -\5410 = NOR(\5163, \5348) -\5413 = NOR(\5352, \5353) -\5416 = NOR(\5357, \5354) -\5420 = NOR(\5301, \5360) -\5421 = NOR(\5360, \5298) -\5422 = NOR(\5364, \5365) -\5425 = NOR(\5309, \5366) -\5426 = NOR(\5366, \5241) -\5427 = NOR(\5312, \5370) -\5428 = NOR(\5370, \5246) -\5429 = NOR(\5315, \5374) -\5430 = NOR(\5374, \5251) -\5431 = NOR(\5378, \5379) -\5434 = NOR(\5380, \774) -\5438 = NOR(\5324, \5383) -\5439 = NOR(\5383, \822) -\5440 = NOR(\5200, \5383) -\5443 = NOR(\5387, \5388) -\5446 = NOR(\5392, \5389) -\5450 = NOR(\5336, \5395) -\5451 = NOR(\5395, \5333) -\5452 = NOR(\5399, \5400) -\5455 = NOR(\5401, \1017) -\5459 = NOR(\5345, \5404) -\5460 = NOR(\5404, \1065) -\5461 = NOR(\5221, \5404) -\5464 = NOR(\5408, \5409) -\5467 = NOR(\5413, \5410) -\5471 = NOR(\5357, \5416) -\5472 = NOR(\5416, \5354) -\5473 = NOR(\5420, \5421) -\5476 = NOR(\5422, \1260) -\5480 = NOR(\5425, \5426) -\5483 = NOR(\5427, \5428) -\5486 = NOR(\5429, \5430) -\5489 = NOR(\5431, \726) -\5493 = NOR(\5380, \5434) -\5494 = NOR(\5434, \774) -\5495 = NOR(\5262, \5434) -\5498 = NOR(\5438, \5439) -\5501 = NOR(\5443, \5440) -\5505 = NOR(\5392, \5446) -\5506 = NOR(\5446, \5389) -\5507 = NOR(\5450, \5451) -\5510 = NOR(\5452, \969) -\5514 = NOR(\5401, \5455) -\5515 = NOR(\5455, \1017) -\5516 = NOR(\5283, \5455) -\5519 = NOR(\5459, \5460) -\5522 = NOR(\5464, \5461) -\5526 = NOR(\5413, \5467) -\5527 = NOR(\5467, \5410) -\5528 = NOR(\5471, \5472) -\5531 = NOR(\5473, \1212) -\5535 = NOR(\5422, \5476) -\5536 = NOR(\5476, \1260) -\5537 = NOR(\5304, \5476) -\5540 = NOR(\5480, \582) -\5544 = NOR(\5483, \630) -\5548 = NOR(\5486, \678) -\5552 = NOR(\5431, \5489) -\5553 = NOR(\5489, \726) -\5554 = NOR(\5318, \5489) -\5557 = NOR(\5493, \5494) -\5560 = NOR(\5498, \5495) -\5564 = NOR(\5443, \5501) -\5565 = NOR(\5501, \5440) -\5566 = NOR(\5505, \5506) -\5569 = NOR(\5507, \921) -\5573 = NOR(\5452, \5510) -\5574 = NOR(\5510, \969) -\5575 = NOR(\5339, \5510) -\5578 = NOR(\5514, \5515) -\5581 = NOR(\5519, \5516) -\5585 = NOR(\5464, \5522) -\5586 = NOR(\5522, \5461) -\5587 = NOR(\5526, \5527) -\5590 = NOR(\5528, \1164) -\5594 = NOR(\5473, \5531) -\5595 = NOR(\5531, \1212) -\5596 = NOR(\5360, \5531) -\5599 = NOR(\5535, \5536) -\5602 = NOR(\1308, \5537) -\5606 = NOR(\5480, \5540) -\5607 = NOR(\5540, \582) -\5608 = NOR(\5366, \5540) -\5611 = NOR(\5483, \5544) -\5612 = NOR(\5544, \630) -\5613 = NOR(\5370, \5544) -\5616 = NOR(\5486, \5548) -\5617 = NOR(\5548, \678) -\5618 = NOR(\5374, \5548) -\5621 = NOR(\5552, \5553) -\5624 = NOR(\5557, \5554) -\5628 = NOR(\5498, \5560) -\5629 = NOR(\5560, \5495) -\5630 = NOR(\5564, \5565) -\5633 = NOR(\5566, \873) -\5637 = NOR(\5507, \5569) -\5638 = NOR(\5569, \921) -\5639 = NOR(\5395, \5569) -\5642 = NOR(\5573, \5574) -\5645 = NOR(\5578, \5575) -\5649 = NOR(\5519, \5581) -\5650 = NOR(\5581, \5516) -\5651 = NOR(\5585, \5586) -\5654 = NOR(\5587, \1116) -\5658 = NOR(\5528, \5590) -\5659 = NOR(\5590, \1164) -\5660 = NOR(\5416, \5590) -\5663 = NOR(\5594, \5595) -\5666 = NOR(\5599, \5596) -\5670 = NOR(\1308, \5602) -\5671 = NOR(\5602, \5537) -\5672 = NOR(\5606, \5607) -\5673 = NOR(\5611, \5612) -\5676 = NOR(\5616, \5617) -\5679 = NOR(\5621, \5618) -\5683 = NOR(\5557, \5624) -\5684 = NOR(\5624, \5554) -\5685 = NOR(\5628, \5629) -\5688 = NOR(\5630, \825) -\5692 = NOR(\5566, \5633) -\5693 = NOR(\5633, \873) -\5694 = NOR(\5446, \5633) -\5697 = NOR(\5637, \5638) -\5700 = NOR(\5642, \5639) -\5704 = NOR(\5578, \5645) -\5705 = NOR(\5645, \5575) -\5706 = NOR(\5649, \5650) -\5709 = NOR(\5651, \1068) -\5713 = NOR(\5587, \5654) -\5714 = NOR(\5654, \1116) -\5715 = NOR(\5467, \5654) -\5718 = NOR(\5658, \5659) -\5721 = NOR(\5663, \5660) -\5725 = NOR(\5599, \5666) -\5726 = NOR(\5666, \5596) -\5727 = NOR(\5670, \5671) -\5730 = NOR(\5673, \5608) -\5734 = NOR(\5676, \5613) -\5738 = NOR(\5621, \5679) -\5739 = NOR(\5679, \5618) -\5740 = NOR(\5683, \5684) -\5743 = NOR(\5685, \777) -\5747 = NOR(\5630, \5688) -\5748 = NOR(\5688, \825) -\5749 = NOR(\5501, \5688) -\5752 = NOR(\5692, \5693) -\5755 = NOR(\5697, \5694) -\5759 = NOR(\5642, \5700) -\5760 = NOR(\5700, \5639) -\5761 = NOR(\5704, \5705) -\5764 = NOR(\5706, \1020) -\5768 = NOR(\5651, \5709) -\5769 = NOR(\5709, \1068) -\5770 = NOR(\5522, \5709) -\5773 = NOR(\5713, \5714) -\5776 = NOR(\5718, \5715) -\5780 = NOR(\5663, \5721) -\5781 = NOR(\5721, \5660) -\5782 = NOR(\5725, \5726) -\5785 = NOR(\5673, \5730) -\5786 = NOR(\5730, \5608) -\5787 = NOR(\5676, \5734) -\5788 = NOR(\5734, \5613) -\5789 = NOR(\5738, \5739) -\5792 = NOR(\5740, \729) -\5796 = NOR(\5685, \5743) -\5797 = NOR(\5743, \777) -\5798 = NOR(\5560, \5743) -\5801 = NOR(\5747, \5748) -\5804 = NOR(\5752, \5749) -\5808 = NOR(\5697, \5755) -\5809 = NOR(\5755, \5694) -\5810 = NOR(\5759, \5760) -\5813 = NOR(\5761, \972) -\5817 = NOR(\5706, \5764) -\5818 = NOR(\5764, \1020) -\5819 = NOR(\5581, \5764) -\5822 = NOR(\5768, \5769) -\5825 = NOR(\5773, \5770) -\5829 = NOR(\5718, \5776) -\5830 = NOR(\5776, \5715) -\5831 = NOR(\5780, \5781) -\5834 = NOR(\5785, \5786) -\5837 = NOR(\5787, \5788) -\5840 = NOR(\5789, \681) -\5844 = NOR(\5740, \5792) -\5845 = NOR(\5792, \729) -\5846 = NOR(\5624, \5792) -\5849 = NOR(\5796, \5797) -\5852 = NOR(\5801, \5798) -\5856 = NOR(\5752, \5804) -\5857 = NOR(\5804, \5749) -\5858 = NOR(\5808, \5809) -\5861 = NOR(\5810, \924) -\5865 = NOR(\5761, \5813) -\5866 = NOR(\5813, \972) -\5867 = NOR(\5645, \5813) -\5870 = NOR(\5817, \5818) -\5873 = NOR(\5822, \5819) -\5877 = NOR(\5773, \5825) -\5878 = NOR(\5825, \5770) -\5879 = NOR(\5829, \5830) -\5882 = NOR(\5834, \585) -\5886 = NOR(\5837, \633) -\5890 = NOR(\5789, \5840) -\5891 = NOR(\5840, \681) -\5892 = NOR(\5679, \5840) -\5895 = NOR(\5844, \5845) -\5898 = NOR(\5849, \5846) -\5902 = NOR(\5801, \5852) -\5903 = NOR(\5852, \5798) -\5904 = NOR(\5856, \5857) -\5907 = NOR(\5858, \876) -\5911 = NOR(\5810, \5861) -\5912 = NOR(\5861, \924) -\5913 = NOR(\5700, \5861) -\5916 = NOR(\5865, \5866) -\5919 = NOR(\5870, \5867) -\5923 = NOR(\5822, \5873) -\5924 = NOR(\5873, \5819) -\5925 = NOR(\5877, \5878) -\5928 = NOR(\5834, \5882) -\5929 = NOR(\5882, \585) -\5930 = NOR(\5730, \5882) -\5933 = NOR(\5837, \5886) -\5934 = NOR(\5886, \633) -\5935 = NOR(\5734, \5886) -\5938 = NOR(\5890, \5891) -\5941 = NOR(\5895, \5892) -\5945 = NOR(\5849, \5898) -\5946 = NOR(\5898, \5846) -\5947 = NOR(\5902, \5903) -\5950 = NOR(\5904, \828) -\5954 = NOR(\5858, \5907) -\5955 = NOR(\5907, \876) -\5956 = NOR(\5755, \5907) -\5959 = NOR(\5911, \5912) -\5962 = NOR(\5916, \5913) -\5966 = NOR(\5870, \5919) -\5967 = NOR(\5919, \5867) -\5968 = NOR(\5923, \5924) -\5971 = NOR(\5928, \5929) -\5972 = NOR(\5933, \5934) -\5975 = NOR(\5938, \5935) -\5979 = NOR(\5895, \5941) -\5980 = NOR(\5941, \5892) -\5981 = NOR(\5945, \5946) -\5984 = NOR(\5947, \780) -\5988 = NOR(\5904, \5950) -\5989 = NOR(\5950, \828) -\5990 = NOR(\5804, \5950) -\5993 = NOR(\5954, \5955) -\5996 = NOR(\5959, \5956) -\6000 = NOR(\5916, \5962) -\6001 = NOR(\5962, \5913) -\6002 = NOR(\5966, \5967) -\6005 = NOR(\5972, \5930) -\6009 = NOR(\5938, \5975) -\6010 = NOR(\5975, \5935) -\6011 = NOR(\5979, \5980) -\6014 = NOR(\5981, \732) -\6018 = NOR(\5947, \5984) -\6019 = NOR(\5984, \780) -\6020 = NOR(\5852, \5984) -\6023 = NOR(\5988, \5989) -\6026 = NOR(\5993, \5990) -\6030 = NOR(\5959, \5996) -\6031 = NOR(\5996, \5956) -\6032 = NOR(\6000, \6001) -\6035 = NOR(\5972, \6005) -\6036 = NOR(\6005, \5930) -\6037 = NOR(\6009, \6010) -\6040 = NOR(\6011, \684) -\6044 = NOR(\5981, \6014) -\6045 = NOR(\6014, \732) -\6046 = NOR(\5898, \6014) -\6049 = NOR(\6018, \6019) -\6052 = NOR(\6023, \6020) -\6056 = NOR(\5993, \6026) -\6057 = NOR(\6026, \5990) -\6058 = NOR(\6030, \6031) -\6061 = NOR(\6035, \6036) -\6064 = NOR(\6037, \636) -\6068 = NOR(\6011, \6040) -\6069 = NOR(\6040, \684) -\6070 = NOR(\5941, \6040) -\6073 = NOR(\6044, \6045) -\6076 = NOR(\6049, \6046) -\6080 = NOR(\6023, \6052) -\6081 = NOR(\6052, \6020) -\6082 = NOR(\6056, \6057) -\6085 = NOR(\6061, \588) -\6089 = NOR(\6037, \6064) -\6090 = NOR(\6064, \636) -\6091 = NOR(\5975, \6064) -\6094 = NOR(\6068, \6069) -\6097 = NOR(\6073, \6070) -\6101 = NOR(\6049, \6076) -\6102 = NOR(\6076, \6046) -\6103 = NOR(\6080, \6081) -\6106 = NOR(\6061, \6085) -\6107 = NOR(\6085, \588) -\6108 = NOR(\6005, \6085) -\6111 = NOR(\6089, \6090) -\6114 = NOR(\6094, \6091) -\6118 = NOR(\6073, \6097) -\6119 = NOR(\6097, \6070) -\6120 = NOR(\6101, \6102) -\6123 = NOR(\6106, \6107) -\6124 = NOR(\6111, \6108) -\6128 = NOR(\6094, \6114) -\6129 = NOR(\6114, \6091) -\6130 = NOR(\6118, \6119) -\6133 = NOR(\6111, \6124) -\6134 = NOR(\6124, \6108) -\6135 = NOR(\6128, \6129) -\6138 = NOR(\6133, \6134) -\6141 = NOT(\6138) -\6145 = NOR(\6138, \6141) -\6146 = NOT(\6141) -\6147 = NOR(\6124, \6141) -\6150 = NOR(\6145, \6146) -\6151 = NOR(\6135, \6147) -\6155 = NOR(\6135, \6151) -\6156 = NOR(\6151, \6147) -\6157 = NOR(\6114, \6151) -\6160 = NOR(\6155, \6156) -\6161 = NOR(\6130, \6157) -\6165 = NOR(\6130, \6161) -\6166 = NOR(\6161, \6157) -\6167 = NOR(\6097, \6161) -\6170 = NOR(\6165, \6166) -\6171 = NOR(\6120, \6167) -\6175 = NOR(\6120, \6171) -\6176 = NOR(\6171, \6167) -\6177 = NOR(\6076, \6171) -\6180 = NOR(\6175, \6176) -\6181 = NOR(\6103, \6177) -\6185 = NOR(\6103, \6181) -\6186 = NOR(\6181, \6177) -\6187 = NOR(\6052, \6181) -\6190 = NOR(\6185, \6186) -\6191 = NOR(\6082, \6187) -\6195 = NOR(\6082, \6191) -\6196 = NOR(\6191, \6187) -\6197 = NOR(\6026, \6191) -\6200 = NOR(\6195, \6196) -\6201 = NOR(\6058, \6197) -\6205 = NOR(\6058, \6201) -\6206 = NOR(\6201, \6197) -\6207 = NOR(\5996, \6201) -\6210 = NOR(\6205, \6206) -\6211 = NOR(\6032, \6207) -\6215 = NOR(\6032, \6211) -\6216 = NOR(\6211, \6207) -\6217 = NOR(\5962, \6211) -\6220 = NOR(\6215, \6216) -\6221 = NOR(\6002, \6217) -\6225 = NOR(\6002, \6221) -\6226 = NOR(\6221, \6217) -\6227 = NOR(\5919, \6221) -\6230 = NOR(\6225, \6226) -\6231 = NOR(\5968, \6227) -\6235 = NOR(\5968, \6231) -\6236 = NOR(\6231, \6227) -\6237 = NOR(\5873, \6231) -\6240 = NOR(\6235, \6236) -\6241 = NOR(\5925, \6237) -\6245 = NOR(\5925, \6241) -\6246 = NOR(\6241, \6237) -\6247 = NOR(\5825, \6241) -\6250 = NOR(\6245, \6246) -\6251 = NOR(\5879, \6247) -\6255 = NOR(\5879, \6251) -\6256 = NOR(\6251, \6247) -\6257 = NOR(\5776, \6251) -\6260 = NOR(\6255, \6256) -\6261 = NOR(\5831, \6257) -\6265 = NOR(\5831, \6261) -\6266 = NOR(\6261, \6257) -\6267 = NOR(\5721, \6261) -\6270 = NOR(\6265, \6266) -\6271 = NOR(\5782, \6267) -\6275 = NOR(\5782, \6271) -\6276 = NOR(\6271, \6267) -\6277 = NOR(\5666, \6271) -\6280 = NOR(\6275, \6276) -\6281 = NOR(\5727, \6277) -\6285 = NOR(\5727, \6281) -\6286 = NOR(\6281, \6277) -\6287 = NOR(\5602, \6281) -\6288 = NOR(\6285, \6286) diff --git a/ISCAS85/new/c7552.bench b/ISCAS85/new/c7552.bench deleted file mode 100644 index e48104e..0000000 --- a/ISCAS85/new/c7552.bench +++ /dev/null @@ -1,3831 +0,0 @@ -# c\7552 - -INPUT(\1) -INPUT(\5) -INPUT(\9) -INPUT(\12) -INPUT(\15) -INPUT(\18) -INPUT(\23) -INPUT(\26) -INPUT(\29) -INPUT(\32) -INPUT(\35) -INPUT(\38) -INPUT(\41) -INPUT(\44) -INPUT(\47) -INPUT(\50) -INPUT(\53) -INPUT(\54) -INPUT(\55) -INPUT(\56) -INPUT(\57) -INPUT(\58) -INPUT(\59) -INPUT(\60) -INPUT(\61) -INPUT(\62) -INPUT(\63) -INPUT(\64) -INPUT(\65) -INPUT(\66) -INPUT(\69) -INPUT(\70) -INPUT(\73) -INPUT(\74) -INPUT(\75) -INPUT(\76) -INPUT(\77) -INPUT(\78) -INPUT(\79) -INPUT(\80) -INPUT(\81) -INPUT(\82) -INPUT(\83) -INPUT(\84) -INPUT(\85) -INPUT(\86) -INPUT(\87) -INPUT(\88) -INPUT(\89) -INPUT(\94) -INPUT(\97) -INPUT(\100) -INPUT(\103) -INPUT(\106) -INPUT(\109) -INPUT(\110) -INPUT(\111) -INPUT(\112) -INPUT(\113) -INPUT(\114) -INPUT(\115) -INPUT(\118) -INPUT(\121) -INPUT(\124) -INPUT(\127) -INPUT(\130) -INPUT(\133) -INPUT(\134) -INPUT(\135) -INPUT(\138) -INPUT(\141) -INPUT(\144) -INPUT(\147) -INPUT(\150) -INPUT(\151) -INPUT(\152) -INPUT(\153) -INPUT(\154) -INPUT(\155) -INPUT(\156) -INPUT(\157) -INPUT(\158) -INPUT(\159) -INPUT(\160) -INPUT(\161) -INPUT(\162) -INPUT(\163) -INPUT(\164) -INPUT(\165) -INPUT(\166) -INPUT(\167) -INPUT(\168) -INPUT(\169) -INPUT(\170) -INPUT(\171) -INPUT(\172) -INPUT(\173) -INPUT(\174) -INPUT(\175) -INPUT(\176) -INPUT(\177) -INPUT(\178) -INPUT(\179) -INPUT(\180) -INPUT(\181) -INPUT(\182) -INPUT(\183) -INPUT(\184) -INPUT(\185) -INPUT(\186) -INPUT(\187) -INPUT(\188) -INPUT(\189) -INPUT(\190) -INPUT(\191) -INPUT(\192) -INPUT(\193) -INPUT(\194) -INPUT(\195) -INPUT(\196) -INPUT(\197) -INPUT(\198) -INPUT(\199) -INPUT(\200) -INPUT(\201) -INPUT(\202) -INPUT(\203) -INPUT(\204) -INPUT(\205) -INPUT(\206) -INPUT(\207) -INPUT(\208) -INPUT(\209) -INPUT(\210) -INPUT(\211) -INPUT(\212) -INPUT(\213) -INPUT(\214) -INPUT(\215) -INPUT(\216) -INPUT(\217) -INPUT(\218) -INPUT(\219) -INPUT(\220) -INPUT(\221) -INPUT(\222) -INPUT(\223) -INPUT(\224) -INPUT(\225) -INPUT(\226) -INPUT(\227) -INPUT(\228) -INPUT(\229) -INPUT(\230) -INPUT(\231) -INPUT(\232) -INPUT(\233) -INPUT(\234) -INPUT(\235) -INPUT(\236) -INPUT(\237) -INPUT(\238) -INPUT(\239) -INPUT(\240) -INPUT(\241) -INPUT(\242) -INPUT(\245) -INPUT(\248) -INPUT(\251) -INPUT(\254) -INPUT(\257) -INPUT(\260) -INPUT(\263) -INPUT(\267) -INPUT(\271) -INPUT(\274) -INPUT(\277) -INPUT(\280) -INPUT(\283) -INPUT(\286) -INPUT(\289) -INPUT(\293) -INPUT(\296) -INPUT(\299) -INPUT(\303) -INPUT(\307) -INPUT(\310) -INPUT(\313) -INPUT(\316) -INPUT(\319) -INPUT(\322) -INPUT(\325) -INPUT(\328) -INPUT(\331) -INPUT(\334) -INPUT(\337) -INPUT(\340) -INPUT(\343) -INPUT(\346) -INPUT(\349) -INPUT(\352) -INPUT(\355) -INPUT(\358) -INPUT(\361) -INPUT(\364) -INPUT(\367) -INPUT(\382) - -OUTPUT(\241) -OUTPUT(\387) -OUTPUT(\388) -OUTPUT(\478) -OUTPUT(\482) -OUTPUT(\484) -OUTPUT(\486) -OUTPUT(\489) -OUTPUT(\492) -OUTPUT(\501) -OUTPUT(\505) -OUTPUT(\507) -OUTPUT(\509) -OUTPUT(\511) -OUTPUT(\513) -OUTPUT(\515) -OUTPUT(\517) -OUTPUT(\519) -OUTPUT(\535) -OUTPUT(\537) -OUTPUT(\539) -OUTPUT(\541) -OUTPUT(\543) -OUTPUT(\545) -OUTPUT(\547) -OUTPUT(\549) -OUTPUT(\551) -OUTPUT(\553) -OUTPUT(\556) -OUTPUT(\559) -OUTPUT(\561) -OUTPUT(\563) -OUTPUT(\565) -OUTPUT(\567) -OUTPUT(\569) -OUTPUT(\571) -OUTPUT(\573) -OUTPUT(\582) -OUTPUT(\643) -OUTPUT(\707) -OUTPUT(\813) -OUTPUT(\881) -OUTPUT(\882) -OUTPUT(\883) -OUTPUT(\884) -OUTPUT(\885) -OUTPUT(\889) -OUTPUT(\945) -OUTPUT(\1110) -OUTPUT(\1111) -OUTPUT(\1112) -OUTPUT(\1113) -OUTPUT(\1114) -OUTPUT(\1489) -OUTPUT(\1490) -OUTPUT(\1781) -OUTPUT(\10025) -OUTPUT(\10101) -OUTPUT(\10102) -OUTPUT(\10103) -OUTPUT(\10104) -OUTPUT(\10109) -OUTPUT(\10110) -OUTPUT(\10111) -OUTPUT(\10112) -OUTPUT(\10350) -OUTPUT(\10351) -OUTPUT(\10352) -OUTPUT(\10353) -OUTPUT(\10574) -OUTPUT(\10575) -OUTPUT(\10576) -OUTPUT(\10628) -OUTPUT(\10632) -OUTPUT(\10641) -OUTPUT(\10704) -OUTPUT(\10706) -OUTPUT(\10711) -OUTPUT(\10712) -OUTPUT(\10713) -OUTPUT(\10714) -OUTPUT(\10715) -OUTPUT(\10716) -OUTPUT(\10717) -OUTPUT(\10718) -OUTPUT(\10729) -OUTPUT(\10759) -OUTPUT(\10760) -OUTPUT(\10761) -OUTPUT(\10762) -OUTPUT(\10763) -OUTPUT(\10827) -OUTPUT(\10837) -OUTPUT(\10838) -OUTPUT(\10839) -OUTPUT(\10840) -OUTPUT(\10868) -OUTPUT(\10869) -OUTPUT(\10870) -OUTPUT(\10871) -OUTPUT(\10905) -OUTPUT(\10906) -OUTPUT(\10907) -OUTPUT(\10908) -OUTPUT(\11333) -OUTPUT(\11334) -OUTPUT(\11340) -OUTPUT(\11342) - -\387 = BUFF(\1) -\388 = BUFF(\1) -\467 = NOT(\57) -\469 = AND(\134, \133) -\478 = BUFF(\248) -\482 = BUFF(\254) -\484 = BUFF(\257) -\486 = BUFF(\260) -\489 = BUFF(\263) -\492 = BUFF(\267) -\494 = AND(\162, \172, \188, \199) -\501 = BUFF(\274) -\505 = BUFF(\280) -\507 = BUFF(\283) -\509 = BUFF(\286) -\511 = BUFF(\289) -\513 = BUFF(\293) -\515 = BUFF(\296) -\517 = BUFF(\299) -\519 = BUFF(\303) -\528 = AND(\150, \184, \228, \240) -\535 = BUFF(\307) -\537 = BUFF(\310) -\539 = BUFF(\313) -\541 = BUFF(\316) -\543 = BUFF(\319) -\545 = BUFF(\322) -\547 = BUFF(\325) -\549 = BUFF(\328) -\551 = BUFF(\331) -\553 = BUFF(\334) -\556 = BUFF(\337) -\559 = BUFF(\343) -\561 = BUFF(\346) -\563 = BUFF(\349) -\565 = BUFF(\352) -\567 = BUFF(\355) -\569 = BUFF(\358) -\571 = BUFF(\361) -\573 = BUFF(\364) -\575 = AND(\183, \182, \185, \186) -\578 = AND(\210, \152, \218, \230) -\582 = NOT(\15) -\585 = NOT(\5) -\590 = BUFF(\1) -\593 = NOT(\5) -\596 = NOT(\5) -\599 = NOT(\289) -\604 = NOT(\299) -\609 = NOT(\303) -\614 = BUFF(\38) -\625 = BUFF(\15) -\628 = NAND(\12, \9) -\632 = NAND(\12, \9) -\636 = BUFF(\38) -\641 = NOT(\245) -\642 = NOT(\248) -\643 = BUFF(\251) -\644 = NOT(\251) -\651 = NOT(\254) -\657 = BUFF(\106) -\660 = NOT(\257) -\666 = NOT(\260) -\672 = NOT(\263) -\673 = NOT(\267) -\674 = NOT(\106) -\676 = BUFF(\18) -\682 = BUFF(\18) -\688 = AND(\382, \263) -\689 = BUFF(\18) -\695 = NOT(\18) -\700 = NAND(\382, \267) -\705 = NOT(\271) -\706 = NOT(\274) -\707 = BUFF(\277) -\708 = NOT(\277) -\715 = NOT(\280) -\721 = NOT(\283) -\727 = NOT(\286) -\733 = NOT(\289) -\734 = NOT(\293) -\742 = NOT(\296) -\748 = NOT(\299) -\749 = NOT(\303) -\750 = BUFF(\367) -\758 = NOT(\307) -\759 = NOT(\310) -\762 = NOT(\313) -\768 = NOT(\316) -\774 = NOT(\319) -\780 = NOT(\322) -\786 = NOT(\325) -\794 = NOT(\328) -\800 = NOT(\331) -\806 = NOT(\334) -\812 = NOT(\337) -\813 = BUFF(\340) -\814 = NOT(\340) -\821 = NOT(\343) -\827 = NOT(\346) -\833 = NOT(\349) -\839 = NOT(\352) -\845 = NOT(\355) -\853 = NOT(\358) -\859 = NOT(\361) -\865 = NOT(\364) -\871 = BUFF(\367) -\881 = NAND(\467, \585) -\882 = NOT(\528) -\883 = NOT(\578) -\884 = NOT(\575) -\885 = NOT(\494) -\886 = AND(\528, \578) -\887 = AND(\575, \494) -\889 = BUFF(\590) -\945 = BUFF(\657) -\957 = NOT(\688) -\1028 = AND(\382, \641) -\1029 = NAND(\382, \705) -\1109 = AND(\469, \596) -\1110 = NAND(\242, \593) -\1111 = NOT(\625) -\1112 = NAND(\242, \593) -\1113 = NAND(\469, \596) -\1114 = NOT(\625) -\1115 = NOT(\871) -\1116 = BUFF(\590) -\1119 = BUFF(\628) -\1125 = BUFF(\682) -\1132 = BUFF(\628) -\1136 = BUFF(\682) -\1141 = BUFF(\628) -\1147 = BUFF(\682) -\1154 = BUFF(\632) -\1160 = BUFF(\676) -\1167 = AND(\700, \614) -\1174 = AND(\700, \614) -\1175 = BUFF(\682) -\1182 = BUFF(\676) -\1189 = NOT(\657) -\1194 = NOT(\676) -\1199 = NOT(\682) -\1206 = NOT(\689) -\1211 = BUFF(\695) -\1218 = NOT(\750) -\1222 = NOT(\1028) -\1227 = BUFF(\632) -\1233 = BUFF(\676) -\1240 = BUFF(\632) -\1244 = BUFF(\676) -\1249 = BUFF(\689) -\1256 = BUFF(\689) -\1263 = BUFF(\695) -\1270 = BUFF(\689) -\1277 = BUFF(\689) -\1284 = BUFF(\700) -\1287 = BUFF(\614) -\1290 = BUFF(\666) -\1293 = BUFF(\660) -\1296 = BUFF(\651) -\1299 = BUFF(\614) -\1302 = BUFF(\644) -\1305 = BUFF(\700) -\1308 = BUFF(\614) -\1311 = BUFF(\614) -\1314 = BUFF(\666) -\1317 = BUFF(\660) -\1320 = BUFF(\651) -\1323 = BUFF(\644) -\1326 = BUFF(\609) -\1329 = BUFF(\604) -\1332 = BUFF(\742) -\1335 = BUFF(\599) -\1338 = BUFF(\727) -\1341 = BUFF(\721) -\1344 = BUFF(\715) -\1347 = BUFF(\734) -\1350 = BUFF(\708) -\1353 = BUFF(\609) -\1356 = BUFF(\604) -\1359 = BUFF(\742) -\1362 = BUFF(\734) -\1365 = BUFF(\599) -\1368 = BUFF(\727) -\1371 = BUFF(\721) -\1374 = BUFF(\715) -\1377 = BUFF(\708) -\1380 = BUFF(\806) -\1383 = BUFF(\800) -\1386 = BUFF(\794) -\1389 = BUFF(\786) -\1392 = BUFF(\780) -\1395 = BUFF(\774) -\1398 = BUFF(\768) -\1401 = BUFF(\762) -\1404 = BUFF(\806) -\1407 = BUFF(\800) -\1410 = BUFF(\794) -\1413 = BUFF(\780) -\1416 = BUFF(\774) -\1419 = BUFF(\768) -\1422 = BUFF(\762) -\1425 = BUFF(\786) -\1428 = BUFF(\636) -\1431 = BUFF(\636) -\1434 = BUFF(\865) -\1437 = BUFF(\859) -\1440 = BUFF(\853) -\1443 = BUFF(\845) -\1446 = BUFF(\839) -\1449 = BUFF(\833) -\1452 = BUFF(\827) -\1455 = BUFF(\821) -\1458 = BUFF(\814) -\1461 = BUFF(\865) -\1464 = BUFF(\859) -\1467 = BUFF(\853) -\1470 = BUFF(\839) -\1473 = BUFF(\833) -\1476 = BUFF(\827) -\1479 = BUFF(\821) -\1482 = BUFF(\845) -\1485 = BUFF(\814) -\1489 = NOT(\1109) -\1490 = BUFF(\1116) -\1537 = AND(\957, \614) -\1551 = AND(\614, \957) -\1649 = AND(\1029, \636) -\1703 = BUFF(\957) -\1708 = NOR(\957, \614) -\1713 = BUFF(\957) -\1721 = NOR(\614, \957) -\1758 = BUFF(\1029) -\1781 = AND(\163, \1116) -\1782 = AND(\170, \1125) -\1783 = NOT(\1125) -\1789 = NOT(\1136) -\1793 = AND(\169, \1125) -\1794 = AND(\168, \1125) -\1795 = AND(\167, \1125) -\1796 = AND(\166, \1136) -\1797 = AND(\165, \1136) -\1798 = AND(\164, \1136) -\1799 = NOT(\1147) -\1805 = NOT(\1160) -\1811 = AND(\177, \1147) -\1812 = AND(\176, \1147) -\1813 = AND(\175, \1147) -\1814 = AND(\174, \1147) -\1815 = AND(\173, \1147) -\1816 = AND(\157, \1160) -\1817 = AND(\156, \1160) -\1818 = AND(\155, \1160) -\1819 = AND(\154, \1160) -\1820 = AND(\153, \1160) -\1821 = NOT(\1284) -\1822 = NOT(\1287) -\1828 = NOT(\1290) -\1829 = NOT(\1293) -\1830 = NOT(\1296) -\1832 = NOT(\1299) -\1833 = NOT(\1302) -\1834 = NOT(\1305) -\1835 = NOT(\1308) -\1839 = NOT(\1311) -\1840 = NOT(\1314) -\1841 = NOT(\1317) -\1842 = NOT(\1320) -\1843 = NOT(\1323) -\1845 = NOT(\1175) -\1851 = NOT(\1182) -\1857 = AND(\181, \1175) -\1858 = AND(\171, \1175) -\1859 = AND(\180, \1175) -\1860 = AND(\179, \1175) -\1861 = AND(\178, \1175) -\1862 = AND(\161, \1182) -\1863 = AND(\151, \1182) -\1864 = AND(\160, \1182) -\1865 = AND(\159, \1182) -\1866 = AND(\158, \1182) -\1867 = NOT(\1326) -\1868 = NOT(\1329) -\1869 = NOT(\1332) -\1870 = NOT(\1335) -\1871 = NOT(\1338) -\1872 = NOT(\1341) -\1873 = NOT(\1344) -\1874 = NOT(\1347) -\1875 = NOT(\1350) -\1876 = NOT(\1353) -\1877 = NOT(\1356) -\1878 = NOT(\1359) -\1879 = NOT(\1362) -\1880 = NOT(\1365) -\1881 = NOT(\1368) -\1882 = NOT(\1371) -\1883 = NOT(\1374) -\1884 = NOT(\1377) -\1885 = BUFF(\1199) -\1892 = BUFF(\1194) -\1899 = BUFF(\1199) -\1906 = BUFF(\1194) -\1913 = NOT(\1211) -\1919 = BUFF(\1194) -\1926 = AND(\44, \1211) -\1927 = AND(\41, \1211) -\1928 = AND(\29, \1211) -\1929 = AND(\26, \1211) -\1930 = AND(\23, \1211) -\1931 = NOT(\1380) -\1932 = NOT(\1383) -\1933 = NOT(\1386) -\1934 = NOT(\1389) -\1935 = NOT(\1392) -\1936 = NOT(\1395) -\1937 = NOT(\1398) -\1938 = NOT(\1401) -\1939 = NOT(\1404) -\1940 = NOT(\1407) -\1941 = NOT(\1410) -\1942 = NOT(\1413) -\1943 = NOT(\1416) -\1944 = NOT(\1419) -\1945 = NOT(\1422) -\1946 = NOT(\1425) -\1947 = NOT(\1233) -\1953 = NOT(\1244) -\1957 = AND(\209, \1233) -\1958 = AND(\216, \1233) -\1959 = AND(\215, \1233) -\1960 = AND(\214, \1233) -\1961 = AND(\213, \1244) -\1962 = AND(\212, \1244) -\1963 = AND(\211, \1244) -\1965 = NOT(\1428) -\1966 = AND(\1222, \636) -\1967 = NOT(\1431) -\1968 = NOT(\1434) -\1969 = NOT(\1437) -\1970 = NOT(\1440) -\1971 = NOT(\1443) -\1972 = NOT(\1446) -\1973 = NOT(\1449) -\1974 = NOT(\1452) -\1975 = NOT(\1455) -\1976 = NOT(\1458) -\1977 = NOT(\1249) -\1983 = NOT(\1256) -\1989 = AND(\642, \1249) -\1990 = AND(\644, \1249) -\1991 = AND(\651, \1249) -\1992 = AND(\674, \1249) -\1993 = AND(\660, \1249) -\1994 = AND(\666, \1256) -\1995 = AND(\672, \1256) -\1996 = AND(\673, \1256) -\1997 = NOT(\1263) -\2003 = BUFF(\1194) -\2010 = AND(\47, \1263) -\2011 = AND(\35, \1263) -\2012 = AND(\32, \1263) -\2013 = AND(\50, \1263) -\2014 = AND(\66, \1263) -\2015 = NOT(\1461) -\2016 = NOT(\1464) -\2017 = NOT(\1467) -\2018 = NOT(\1470) -\2019 = NOT(\1473) -\2020 = NOT(\1476) -\2021 = NOT(\1479) -\2022 = NOT(\1482) -\2023 = NOT(\1485) -\2024 = BUFF(\1206) -\2031 = BUFF(\1206) -\2038 = BUFF(\1206) -\2045 = BUFF(\1206) -\2052 = NOT(\1270) -\2058 = NOT(\1277) -\2064 = AND(\706, \1270) -\2065 = AND(\708, \1270) -\2066 = AND(\715, \1270) -\2067 = AND(\721, \1270) -\2068 = AND(\727, \1270) -\2069 = AND(\733, \1277) -\2070 = AND(\734, \1277) -\2071 = AND(\742, \1277) -\2072 = AND(\748, \1277) -\2073 = AND(\749, \1277) -\2074 = BUFF(\1189) -\2081 = BUFF(\1189) -\2086 = BUFF(\1222) -\2107 = NAND(\1287, \1821) -\2108 = NAND(\1284, \1822) -\2110 = NOT(\1703) -\2111 = NAND(\1703, \1832) -\2112 = NAND(\1308, \1834) -\2113 = NAND(\1305, \1835) -\2114 = NOT(\1713) -\2115 = NAND(\1713, \1839) -\2117 = NOT(\1721) -\2171 = NOT(\1758) -\2172 = NAND(\1758, \1965) -\2230 = NOT(\1708) -\2231 = BUFF(\1537) -\2235 = BUFF(\1551) -\2239 = OR(\1783, \1782) -\2240 = OR(\1783, \1125) -\2241 = OR(\1783, \1793) -\2242 = OR(\1783, \1794) -\2243 = OR(\1783, \1795) -\2244 = OR(\1789, \1796) -\2245 = OR(\1789, \1797) -\2246 = OR(\1789, \1798) -\2247 = OR(\1799, \1811) -\2248 = OR(\1799, \1812) -\2249 = OR(\1799, \1813) -\2250 = OR(\1799, \1814) -\2251 = OR(\1799, \1815) -\2252 = OR(\1805, \1816) -\2253 = OR(\1805, \1817) -\2254 = OR(\1805, \1818) -\2255 = OR(\1805, \1819) -\2256 = OR(\1805, \1820) -\2257 = NAND(\2107, \2108) -\2267 = NOT(\2074) -\2268 = NAND(\1299, \2110) -\2269 = NAND(\2112, \2113) -\2274 = NAND(\1311, \2114) -\2275 = NOT(\2081) -\2277 = AND(\141, \1845) -\2278 = AND(\147, \1845) -\2279 = AND(\138, \1845) -\2280 = AND(\144, \1845) -\2281 = AND(\135, \1845) -\2282 = AND(\141, \1851) -\2283 = AND(\147, \1851) -\2284 = AND(\138, \1851) -\2285 = AND(\144, \1851) -\2286 = AND(\135, \1851) -\2287 = NOT(\1885) -\2293 = NOT(\1892) -\2299 = AND(\103, \1885) -\2300 = AND(\130, \1885) -\2301 = AND(\127, \1885) -\2302 = AND(\124, \1885) -\2303 = AND(\100, \1885) -\2304 = AND(\103, \1892) -\2305 = AND(\130, \1892) -\2306 = AND(\127, \1892) -\2307 = AND(\124, \1892) -\2308 = AND(\100, \1892) -\2309 = NOT(\1899) -\2315 = NOT(\1906) -\2321 = AND(\115, \1899) -\2322 = AND(\118, \1899) -\2323 = AND(\97, \1899) -\2324 = AND(\94, \1899) -\2325 = AND(\121, \1899) -\2326 = AND(\115, \1906) -\2327 = AND(\118, \1906) -\2328 = AND(\97, \1906) -\2329 = AND(\94, \1906) -\2330 = AND(\121, \1906) -\2331 = NOT(\1919) -\2337 = AND(\208, \1913) -\2338 = AND(\198, \1913) -\2339 = AND(\207, \1913) -\2340 = AND(\206, \1913) -\2341 = AND(\205, \1913) -\2342 = AND(\44, \1919) -\2343 = AND(\41, \1919) -\2344 = AND(\29, \1919) -\2345 = AND(\26, \1919) -\2346 = AND(\23, \1919) -\2347 = OR(\1947, \1233) -\2348 = OR(\1947, \1957) -\2349 = OR(\1947, \1958) -\2350 = OR(\1947, \1959) -\2351 = OR(\1947, \1960) -\2352 = OR(\1953, \1961) -\2353 = OR(\1953, \1962) -\2354 = OR(\1953, \1963) -\2355 = NAND(\1428, \2171) -\2356 = NOT(\2086) -\2357 = NAND(\2086, \1967) -\2358 = AND(\114, \1977) -\2359 = AND(\113, \1977) -\2360 = AND(\111, \1977) -\2361 = AND(\87, \1977) -\2362 = AND(\112, \1977) -\2363 = AND(\88, \1983) -\2364 = AND(\245, \1983) -\2365 = AND(\271, \1983) -\2366 = AND(\759, \1983) -\2367 = AND(\70, \1983) -\2368 = NOT(\2003) -\2374 = AND(\193, \1997) -\2375 = AND(\192, \1997) -\2376 = AND(\191, \1997) -\2377 = AND(\190, \1997) -\2378 = AND(\189, \1997) -\2379 = AND(\47, \2003) -\2380 = AND(\35, \2003) -\2381 = AND(\32, \2003) -\2382 = AND(\50, \2003) -\2383 = AND(\66, \2003) -\2384 = NOT(\2024) -\2390 = NOT(\2031) -\2396 = AND(\58, \2024) -\2397 = AND(\77, \2024) -\2398 = AND(\78, \2024) -\2399 = AND(\59, \2024) -\2400 = AND(\81, \2024) -\2401 = AND(\80, \2031) -\2402 = AND(\79, \2031) -\2403 = AND(\60, \2031) -\2404 = AND(\61, \2031) -\2405 = AND(\62, \2031) -\2406 = NOT(\2038) -\2412 = NOT(\2045) -\2418 = AND(\69, \2038) -\2419 = AND(\70, \2038) -\2420 = AND(\74, \2038) -\2421 = AND(\76, \2038) -\2422 = AND(\75, \2038) -\2423 = AND(\73, \2045) -\2424 = AND(\53, \2045) -\2425 = AND(\54, \2045) -\2426 = AND(\55, \2045) -\2427 = AND(\56, \2045) -\2428 = AND(\82, \2052) -\2429 = AND(\65, \2052) -\2430 = AND(\83, \2052) -\2431 = AND(\84, \2052) -\2432 = AND(\85, \2052) -\2433 = AND(\64, \2058) -\2434 = AND(\63, \2058) -\2435 = AND(\86, \2058) -\2436 = AND(\109, \2058) -\2437 = AND(\110, \2058) -\2441 = AND(\2239, \1119) -\2442 = AND(\2240, \1119) -\2446 = AND(\2241, \1119) -\2450 = AND(\2242, \1119) -\2454 = AND(\2243, \1119) -\2458 = AND(\2244, \1132) -\2462 = AND(\2247, \1141) -\2466 = AND(\2248, \1141) -\2470 = AND(\2249, \1141) -\2474 = AND(\2250, \1141) -\2478 = AND(\2251, \1141) -\2482 = AND(\2252, \1154) -\2488 = AND(\2253, \1154) -\2496 = AND(\2254, \1154) -\2502 = AND(\2255, \1154) -\2508 = AND(\2256, \1154) -\2523 = NAND(\2268, \2111) -\2533 = NAND(\2274, \2115) -\2537 = NOT(\2235) -\2538 = OR(\2278, \1858) -\2542 = OR(\2279, \1859) -\2546 = OR(\2280, \1860) -\2550 = OR(\2281, \1861) -\2554 = OR(\2283, \1863) -\2561 = OR(\2284, \1864) -\2567 = OR(\2285, \1865) -\2573 = OR(\2286, \1866) -\2604 = OR(\2338, \1927) -\2607 = OR(\2339, \1928) -\2611 = OR(\2340, \1929) -\2615 = OR(\2341, \1930) -\2619 = AND(\2348, \1227) -\2626 = AND(\2349, \1227) -\2632 = AND(\2350, \1227) -\2638 = AND(\2351, \1227) -\2644 = AND(\2352, \1240) -\2650 = NAND(\2355, \2172) -\2653 = NAND(\1431, \2356) -\2654 = OR(\2359, \1990) -\2658 = OR(\2360, \1991) -\2662 = OR(\2361, \1992) -\2666 = OR(\2362, \1993) -\2670 = OR(\2363, \1994) -\2674 = OR(\2366, \1256) -\2680 = OR(\2367, \1256) -\2688 = OR(\2374, \2010) -\2692 = OR(\2375, \2011) -\2696 = OR(\2376, \2012) -\2700 = OR(\2377, \2013) -\2704 = OR(\2378, \2014) -\2728 = AND(\2347, \1227) -\2729 = OR(\2429, \2065) -\2733 = OR(\2430, \2066) -\2737 = OR(\2431, \2067) -\2741 = OR(\2432, \2068) -\2745 = OR(\2433, \2069) -\2749 = OR(\2434, \2070) -\2753 = OR(\2435, \2071) -\2757 = OR(\2436, \2072) -\2761 = OR(\2437, \2073) -\2765 = NOT(\2231) -\2766 = AND(\2354, \1240) -\2769 = AND(\2353, \1240) -\2772 = AND(\2246, \1132) -\2775 = AND(\2245, \1132) -\2778 = OR(\2282, \1862) -\2781 = OR(\2358, \1989) -\2784 = OR(\2365, \1996) -\2787 = OR(\2364, \1995) -\2790 = OR(\2337, \1926) -\2793 = OR(\2277, \1857) -\2796 = OR(\2428, \2064) -\2866 = AND(\2257, \1537) -\2867 = AND(\2257, \1537) -\2868 = AND(\2257, \1537) -\2869 = AND(\2257, \1537) -\2878 = AND(\2269, \1551) -\2913 = AND(\204, \2287) -\2914 = AND(\203, \2287) -\2915 = AND(\202, \2287) -\2916 = AND(\201, \2287) -\2917 = AND(\200, \2287) -\2918 = AND(\235, \2293) -\2919 = AND(\234, \2293) -\2920 = AND(\233, \2293) -\2921 = AND(\232, \2293) -\2922 = AND(\231, \2293) -\2923 = AND(\197, \2309) -\2924 = AND(\187, \2309) -\2925 = AND(\196, \2309) -\2926 = AND(\195, \2309) -\2927 = AND(\194, \2309) -\2928 = AND(\227, \2315) -\2929 = AND(\217, \2315) -\2930 = AND(\226, \2315) -\2931 = AND(\225, \2315) -\2932 = AND(\224, \2315) -\2933 = AND(\239, \2331) -\2934 = AND(\229, \2331) -\2935 = AND(\238, \2331) -\2936 = AND(\237, \2331) -\2937 = AND(\236, \2331) -\2988 = NAND(\2653, \2357) -\3005 = AND(\223, \2368) -\3006 = AND(\222, \2368) -\3007 = AND(\221, \2368) -\3008 = AND(\220, \2368) -\3009 = AND(\219, \2368) -\3020 = AND(\812, \2384) -\3021 = AND(\814, \2384) -\3022 = AND(\821, \2384) -\3023 = AND(\827, \2384) -\3024 = AND(\833, \2384) -\3025 = AND(\839, \2390) -\3026 = AND(\845, \2390) -\3027 = AND(\853, \2390) -\3028 = AND(\859, \2390) -\3029 = AND(\865, \2390) -\3032 = AND(\758, \2406) -\3033 = AND(\759, \2406) -\3034 = AND(\762, \2406) -\3035 = AND(\768, \2406) -\3036 = AND(\774, \2406) -\3037 = AND(\780, \2412) -\3038 = AND(\786, \2412) -\3039 = AND(\794, \2412) -\3040 = AND(\800, \2412) -\3041 = AND(\806, \2412) -\3061 = BUFF(\2257) -\3064 = BUFF(\2257) -\3067 = BUFF(\2269) -\3070 = BUFF(\2269) -\3073 = NOT(\2728) -\3080 = NOT(\2441) -\3096 = AND(\666, \2644) -\3097 = AND(\660, \2638) -\3101 = AND(\1189, \2632) -\3107 = AND(\651, \2626) -\3114 = AND(\644, \2619) -\3122 = AND(\2523, \2257) -\3126 = OR(\1167, \2866) -\3130 = AND(\2523, \2257) -\3131 = OR(\1167, \2869) -\3134 = AND(\2523, \2257) -\3135 = NOT(\2533) -\3136 = AND(\666, \2644) -\3137 = AND(\660, \2638) -\3140 = AND(\1189, \2632) -\3144 = AND(\651, \2626) -\3149 = AND(\644, \2619) -\3155 = AND(\2533, \2269) -\3159 = OR(\1174, \2878) -\3167 = NOT(\2778) -\3168 = AND(\609, \2508) -\3169 = AND(\604, \2502) -\3173 = AND(\742, \2496) -\3178 = AND(\734, \2488) -\3184 = AND(\599, \2482) -\3185 = AND(\727, \2573) -\3189 = AND(\721, \2567) -\3195 = AND(\715, \2561) -\3202 = AND(\708, \2554) -\3210 = AND(\609, \2508) -\3211 = AND(\604, \2502) -\3215 = AND(\742, \2496) -\3221 = AND(\2488, \734) -\3228 = AND(\599, \2482) -\3229 = AND(\727, \2573) -\3232 = AND(\721, \2567) -\3236 = AND(\715, \2561) -\3241 = AND(\708, \2554) -\3247 = OR(\2913, \2299) -\3251 = OR(\2914, \2300) -\3255 = OR(\2915, \2301) -\3259 = OR(\2916, \2302) -\3263 = OR(\2917, \2303) -\3267 = OR(\2918, \2304) -\3273 = OR(\2919, \2305) -\3281 = OR(\2920, \2306) -\3287 = OR(\2921, \2307) -\3293 = OR(\2922, \2308) -\3299 = OR(\2924, \2322) -\3303 = OR(\2925, \2323) -\3307 = OR(\2926, \2324) -\3311 = OR(\2927, \2325) -\3315 = OR(\2929, \2327) -\3322 = OR(\2930, \2328) -\3328 = OR(\2931, \2329) -\3334 = OR(\2932, \2330) -\3340 = OR(\2934, \2343) -\3343 = OR(\2935, \2344) -\3349 = OR(\2936, \2345) -\3355 = OR(\2937, \2346) -\3361 = AND(\2761, \2478) -\3362 = AND(\2757, \2474) -\3363 = AND(\2753, \2470) -\3364 = AND(\2749, \2466) -\3365 = AND(\2745, \2462) -\3366 = AND(\2741, \2550) -\3367 = AND(\2737, \2546) -\3368 = AND(\2733, \2542) -\3369 = AND(\2729, \2538) -\3370 = AND(\2670, \2458) -\3371 = AND(\2666, \2454) -\3372 = AND(\2662, \2450) -\3373 = AND(\2658, \2446) -\3374 = AND(\2654, \2442) -\3375 = AND(\2988, \2650) -\3379 = AND(\2650, \1966) -\3380 = NOT(\2781) -\3381 = AND(\695, \2604) -\3384 = OR(\3005, \2379) -\3390 = OR(\3006, \2380) -\3398 = OR(\3007, \2381) -\3404 = OR(\3008, \2382) -\3410 = OR(\3009, \2383) -\3416 = OR(\3021, \2397) -\3420 = OR(\3022, \2398) -\3424 = OR(\3023, \2399) -\3428 = OR(\3024, \2400) -\3432 = OR(\3025, \2401) -\3436 = OR(\3026, \2402) -\3440 = OR(\3027, \2403) -\3444 = OR(\3028, \2404) -\3448 = OR(\3029, \2405) -\3452 = NOT(\2790) -\3453 = NOT(\2793) -\3454 = OR(\3034, \2420) -\3458 = OR(\3035, \2421) -\3462 = OR(\3036, \2422) -\3466 = OR(\3037, \2423) -\3470 = OR(\3038, \2424) -\3474 = OR(\3039, \2425) -\3478 = OR(\3040, \2426) -\3482 = OR(\3041, \2427) -\3486 = NOT(\2796) -\3487 = BUFF(\2644) -\3490 = BUFF(\2638) -\3493 = BUFF(\2632) -\3496 = BUFF(\2626) -\3499 = BUFF(\2619) -\3502 = BUFF(\2523) -\3507 = NOR(\1167, \2868) -\3510 = BUFF(\2523) -\3515 = NOR(\644, \2619) -\3518 = BUFF(\2644) -\3521 = BUFF(\2638) -\3524 = BUFF(\2632) -\3527 = BUFF(\2626) -\3530 = BUFF(\2619) -\3535 = BUFF(\2619) -\3539 = BUFF(\2632) -\3542 = BUFF(\2626) -\3545 = BUFF(\2644) -\3548 = BUFF(\2638) -\3551 = NOT(\2766) -\3552 = NOT(\2769) -\3553 = BUFF(\2442) -\3557 = BUFF(\2450) -\3560 = BUFF(\2446) -\3563 = BUFF(\2458) -\3566 = BUFF(\2454) -\3569 = NOT(\2772) -\3570 = NOT(\2775) -\3571 = BUFF(\2554) -\3574 = BUFF(\2567) -\3577 = BUFF(\2561) -\3580 = BUFF(\2482) -\3583 = BUFF(\2573) -\3586 = BUFF(\2496) -\3589 = BUFF(\2488) -\3592 = BUFF(\2508) -\3595 = BUFF(\2502) -\3598 = BUFF(\2508) -\3601 = BUFF(\2502) -\3604 = BUFF(\2496) -\3607 = BUFF(\2482) -\3610 = BUFF(\2573) -\3613 = BUFF(\2567) -\3616 = BUFF(\2561) -\3619 = BUFF(\2488) -\3622 = BUFF(\2554) -\3625 = NOR(\734, \2488) -\3628 = NOR(\708, \2554) -\3631 = BUFF(\2508) -\3634 = BUFF(\2502) -\3637 = BUFF(\2496) -\3640 = BUFF(\2488) -\3643 = BUFF(\2482) -\3646 = BUFF(\2573) -\3649 = BUFF(\2567) -\3652 = BUFF(\2561) -\3655 = BUFF(\2554) -\3658 = NOR(\2488, \734) -\3661 = BUFF(\2674) -\3664 = BUFF(\2674) -\3667 = BUFF(\2761) -\3670 = BUFF(\2478) -\3673 = BUFF(\2757) -\3676 = BUFF(\2474) -\3679 = BUFF(\2753) -\3682 = BUFF(\2470) -\3685 = BUFF(\2745) -\3688 = BUFF(\2462) -\3691 = BUFF(\2741) -\3694 = BUFF(\2550) -\3697 = BUFF(\2737) -\3700 = BUFF(\2546) -\3703 = BUFF(\2733) -\3706 = BUFF(\2542) -\3709 = BUFF(\2749) -\3712 = BUFF(\2466) -\3715 = BUFF(\2729) -\3718 = BUFF(\2538) -\3721 = BUFF(\2704) -\3724 = BUFF(\2700) -\3727 = BUFF(\2696) -\3730 = BUFF(\2688) -\3733 = BUFF(\2692) -\3736 = BUFF(\2670) -\3739 = BUFF(\2458) -\3742 = BUFF(\2666) -\3745 = BUFF(\2454) -\3748 = BUFF(\2662) -\3751 = BUFF(\2450) -\3754 = BUFF(\2658) -\3757 = BUFF(\2446) -\3760 = BUFF(\2654) -\3763 = BUFF(\2442) -\3766 = BUFF(\2654) -\3769 = BUFF(\2662) -\3772 = BUFF(\2658) -\3775 = BUFF(\2670) -\3778 = BUFF(\2666) -\3781 = NOT(\2784) -\3782 = NOT(\2787) -\3783 = OR(\2928, \2326) -\3786 = OR(\2933, \2342) -\3789 = OR(\2923, \2321) -\3792 = BUFF(\2688) -\3795 = BUFF(\2696) -\3798 = BUFF(\2692) -\3801 = BUFF(\2704) -\3804 = BUFF(\2700) -\3807 = BUFF(\2604) -\3810 = BUFF(\2611) -\3813 = BUFF(\2607) -\3816 = BUFF(\2615) -\3819 = BUFF(\2538) -\3822 = BUFF(\2546) -\3825 = BUFF(\2542) -\3828 = BUFF(\2462) -\3831 = BUFF(\2550) -\3834 = BUFF(\2470) -\3837 = BUFF(\2466) -\3840 = BUFF(\2478) -\3843 = BUFF(\2474) -\3846 = BUFF(\2615) -\3849 = BUFF(\2611) -\3852 = BUFF(\2607) -\3855 = BUFF(\2680) -\3858 = BUFF(\2729) -\3861 = BUFF(\2737) -\3864 = BUFF(\2733) -\3867 = BUFF(\2745) -\3870 = BUFF(\2741) -\3873 = BUFF(\2753) -\3876 = BUFF(\2749) -\3879 = BUFF(\2761) -\3882 = BUFF(\2757) -\3885 = OR(\3033, \2419) -\3888 = OR(\3032, \2418) -\3891 = OR(\3020, \2396) -\3953 = NAND(\3067, \2117) -\3954 = NOT(\3067) -\3955 = NAND(\3070, \2537) -\3956 = NOT(\3070) -\3958 = NOT(\3073) -\3964 = NOT(\3080) -\4193 = OR(\1649, \3379) -\4303 = OR(\1167, \2867, \3130) -\4308 = NOT(\3061) -\4313 = NOT(\3064) -\4326 = NAND(\2769, \3551) -\4327 = NAND(\2766, \3552) -\4333 = NAND(\2775, \3569) -\4334 = NAND(\2772, \3570) -\4411 = NAND(\2787, \3781) -\4412 = NAND(\2784, \3782) -\4463 = NAND(\3487, \1828) -\4464 = NOT(\3487) -\4465 = NAND(\3490, \1829) -\4466 = NOT(\3490) -\4467 = NAND(\3493, \2267) -\4468 = NOT(\3493) -\4469 = NAND(\3496, \1830) -\4470 = NOT(\3496) -\4471 = NAND(\3499, \1833) -\4472 = NOT(\3499) -\4473 = NOT(\3122) -\4474 = NOT(\3126) -\4475 = NAND(\3518, \1840) -\4476 = NOT(\3518) -\4477 = NAND(\3521, \1841) -\4478 = NOT(\3521) -\4479 = NAND(\3524, \2275) -\4480 = NOT(\3524) -\4481 = NAND(\3527, \1842) -\4482 = NOT(\3527) -\4483 = NAND(\3530, \1843) -\4484 = NOT(\3530) -\4485 = NOT(\3155) -\4486 = NOT(\3159) -\4487 = NAND(\1721, \3954) -\4488 = NAND(\2235, \3956) -\4489 = NOT(\3535) -\4490 = NAND(\3535, \3958) -\4491 = NOT(\3539) -\4492 = NOT(\3542) -\4493 = NOT(\3545) -\4494 = NOT(\3548) -\4495 = NOT(\3553) -\4496 = NAND(\3553, \3964) -\4497 = NOT(\3557) -\4498 = NOT(\3560) -\4499 = NOT(\3563) -\4500 = NOT(\3566) -\4501 = NOT(\3571) -\4502 = NAND(\3571, \3167) -\4503 = NOT(\3574) -\4504 = NOT(\3577) -\4505 = NOT(\3580) -\4506 = NOT(\3583) -\4507 = NAND(\3598, \1867) -\4508 = NOT(\3598) -\4509 = NAND(\3601, \1868) -\4510 = NOT(\3601) -\4511 = NAND(\3604, \1869) -\4512 = NOT(\3604) -\4513 = NAND(\3607, \1870) -\4514 = NOT(\3607) -\4515 = NAND(\3610, \1871) -\4516 = NOT(\3610) -\4517 = NAND(\3613, \1872) -\4518 = NOT(\3613) -\4519 = NAND(\3616, \1873) -\4520 = NOT(\3616) -\4521 = NAND(\3619, \1874) -\4522 = NOT(\3619) -\4523 = NAND(\3622, \1875) -\4524 = NOT(\3622) -\4525 = NAND(\3631, \1876) -\4526 = NOT(\3631) -\4527 = NAND(\3634, \1877) -\4528 = NOT(\3634) -\4529 = NAND(\3637, \1878) -\4530 = NOT(\3637) -\4531 = NAND(\3640, \1879) -\4532 = NOT(\3640) -\4533 = NAND(\3643, \1880) -\4534 = NOT(\3643) -\4535 = NAND(\3646, \1881) -\4536 = NOT(\3646) -\4537 = NAND(\3649, \1882) -\4538 = NOT(\3649) -\4539 = NAND(\3652, \1883) -\4540 = NOT(\3652) -\4541 = NAND(\3655, \1884) -\4542 = NOT(\3655) -\4543 = NOT(\3658) -\4544 = AND(\806, \3293) -\4545 = AND(\800, \3287) -\4549 = AND(\794, \3281) -\4555 = AND(\3273, \786) -\4562 = AND(\780, \3267) -\4563 = AND(\774, \3355) -\4566 = AND(\768, \3349) -\4570 = AND(\762, \3343) -\4575 = NOT(\3661) -\4576 = AND(\806, \3293) -\4577 = AND(\800, \3287) -\4581 = AND(\794, \3281) -\4586 = AND(\786, \3273) -\4592 = AND(\780, \3267) -\4593 = AND(\774, \3355) -\4597 = AND(\768, \3349) -\4603 = AND(\762, \3343) -\4610 = NOT(\3664) -\4611 = NOT(\3667) -\4612 = NOT(\3670) -\4613 = NOT(\3673) -\4614 = NOT(\3676) -\4615 = NOT(\3679) -\4616 = NOT(\3682) -\4617 = NOT(\3685) -\4618 = NOT(\3688) -\4619 = NOT(\3691) -\4620 = NOT(\3694) -\4621 = NOT(\3697) -\4622 = NOT(\3700) -\4623 = NOT(\3703) -\4624 = NOT(\3706) -\4625 = NOT(\3709) -\4626 = NOT(\3712) -\4627 = NOT(\3715) -\4628 = NOT(\3718) -\4629 = NOT(\3721) -\4630 = AND(\3448, \2704) -\4631 = NOT(\3724) -\4632 = AND(\3444, \2700) -\4633 = NOT(\3727) -\4634 = AND(\3440, \2696) -\4635 = AND(\3436, \2692) -\4636 = NOT(\3730) -\4637 = AND(\3432, \2688) -\4638 = AND(\3428, \3311) -\4639 = AND(\3424, \3307) -\4640 = AND(\3420, \3303) -\4641 = AND(\3416, \3299) -\4642 = NOT(\3733) -\4643 = NOT(\3736) -\4644 = NOT(\3739) -\4645 = NOT(\3742) -\4646 = NOT(\3745) -\4647 = NOT(\3748) -\4648 = NOT(\3751) -\4649 = NOT(\3754) -\4650 = NOT(\3757) -\4651 = NOT(\3760) -\4652 = NOT(\3763) -\4653 = NOT(\3375) -\4656 = AND(\865, \3410) -\4657 = AND(\859, \3404) -\4661 = AND(\853, \3398) -\4667 = AND(\3390, \845) -\4674 = AND(\839, \3384) -\4675 = AND(\833, \3334) -\4678 = AND(\827, \3328) -\4682 = AND(\821, \3322) -\4687 = AND(\814, \3315) -\4693 = NOT(\3766) -\4694 = NAND(\3766, \3380) -\4695 = NOT(\3769) -\4696 = NOT(\3772) -\4697 = NOT(\3775) -\4698 = NOT(\3778) -\4699 = NOT(\3783) -\4700 = NOT(\3786) -\4701 = AND(\865, \3410) -\4702 = AND(\859, \3404) -\4706 = AND(\853, \3398) -\4711 = AND(\845, \3390) -\4717 = AND(\839, \3384) -\4718 = AND(\833, \3334) -\4722 = AND(\827, \3328) -\4728 = AND(\821, \3322) -\4735 = AND(\814, \3315) -\4743 = NOT(\3789) -\4744 = NOT(\3792) -\4745 = NOT(\3807) -\4746 = NAND(\3807, \3452) -\4747 = NOT(\3810) -\4748 = NOT(\3813) -\4749 = NOT(\3816) -\4750 = NOT(\3819) -\4751 = NAND(\3819, \3453) -\4752 = NOT(\3822) -\4753 = NOT(\3825) -\4754 = NOT(\3828) -\4755 = NOT(\3831) -\4756 = AND(\3482, \3263) -\4757 = AND(\3478, \3259) -\4758 = AND(\3474, \3255) -\4759 = AND(\3470, \3251) -\4760 = AND(\3466, \3247) -\4761 = NOT(\3846) -\4762 = AND(\3462, \2615) -\4763 = NOT(\3849) -\4764 = AND(\3458, \2611) -\4765 = NOT(\3852) -\4766 = AND(\3454, \2607) -\4767 = AND(\2680, \3381) -\4768 = NOT(\3855) -\4769 = AND(\3340, \695) -\4775 = NOT(\3858) -\4776 = NAND(\3858, \3486) -\4777 = NOT(\3861) -\4778 = NOT(\3864) -\4779 = NOT(\3867) -\4780 = NOT(\3870) -\4781 = NOT(\3885) -\4782 = NOT(\3888) -\4783 = NOT(\3891) -\4784 = OR(\3131, \3134) -\4789 = NOT(\3502) -\4790 = NOT(\3131) -\4793 = NOT(\3507) -\4794 = NOT(\3510) -\4795 = NOT(\3515) -\4796 = BUFF(\3114) -\4799 = NOT(\3586) -\4800 = NOT(\3589) -\4801 = NOT(\3592) -\4802 = NOT(\3595) -\4803 = NAND(\4326, \4327) -\4806 = NAND(\4333, \4334) -\4809 = NOT(\3625) -\4810 = BUFF(\3178) -\4813 = NOT(\3628) -\4814 = BUFF(\3202) -\4817 = BUFF(\3221) -\4820 = BUFF(\3293) -\4823 = BUFF(\3287) -\4826 = BUFF(\3281) -\4829 = BUFF(\3273) -\4832 = BUFF(\3267) -\4835 = BUFF(\3355) -\4838 = BUFF(\3349) -\4841 = BUFF(\3343) -\4844 = NOR(\3273, \786) -\4847 = BUFF(\3293) -\4850 = BUFF(\3287) -\4853 = BUFF(\3281) -\4856 = BUFF(\3267) -\4859 = BUFF(\3355) -\4862 = BUFF(\3349) -\4865 = BUFF(\3343) -\4868 = BUFF(\3273) -\4871 = NOR(\786, \3273) -\4874 = BUFF(\3448) -\4877 = BUFF(\3444) -\4880 = BUFF(\3440) -\4883 = BUFF(\3432) -\4886 = BUFF(\3428) -\4889 = BUFF(\3311) -\4892 = BUFF(\3424) -\4895 = BUFF(\3307) -\4898 = BUFF(\3420) -\4901 = BUFF(\3303) -\4904 = BUFF(\3436) -\4907 = BUFF(\3416) -\4910 = BUFF(\3299) -\4913 = BUFF(\3410) -\4916 = BUFF(\3404) -\4919 = BUFF(\3398) -\4922 = BUFF(\3390) -\4925 = BUFF(\3384) -\4928 = BUFF(\3334) -\4931 = BUFF(\3328) -\4934 = BUFF(\3322) -\4937 = BUFF(\3315) -\4940 = NOR(\3390, \845) -\4943 = BUFF(\3315) -\4946 = BUFF(\3328) -\4949 = BUFF(\3322) -\4952 = BUFF(\3384) -\4955 = BUFF(\3334) -\4958 = BUFF(\3398) -\4961 = BUFF(\3390) -\4964 = BUFF(\3410) -\4967 = BUFF(\3404) -\4970 = BUFF(\3340) -\4973 = BUFF(\3349) -\4976 = BUFF(\3343) -\4979 = BUFF(\3267) -\4982 = BUFF(\3355) -\4985 = BUFF(\3281) -\4988 = BUFF(\3273) -\4991 = BUFF(\3293) -\4994 = BUFF(\3287) -\4997 = NAND(\4411, \4412) -\5000 = BUFF(\3410) -\5003 = BUFF(\3404) -\5006 = BUFF(\3398) -\5009 = BUFF(\3384) -\5012 = BUFF(\3334) -\5015 = BUFF(\3328) -\5018 = BUFF(\3322) -\5021 = BUFF(\3390) -\5024 = BUFF(\3315) -\5027 = NOR(\845, \3390) -\5030 = NOR(\814, \3315) -\5033 = BUFF(\3299) -\5036 = BUFF(\3307) -\5039 = BUFF(\3303) -\5042 = BUFF(\3311) -\5045 = NOT(\3795) -\5046 = NOT(\3798) -\5047 = NOT(\3801) -\5048 = NOT(\3804) -\5049 = BUFF(\3247) -\5052 = BUFF(\3255) -\5055 = BUFF(\3251) -\5058 = BUFF(\3263) -\5061 = BUFF(\3259) -\5064 = NOT(\3834) -\5065 = NOT(\3837) -\5066 = NOT(\3840) -\5067 = NOT(\3843) -\5068 = BUFF(\3482) -\5071 = BUFF(\3263) -\5074 = BUFF(\3478) -\5077 = BUFF(\3259) -\5080 = BUFF(\3474) -\5083 = BUFF(\3255) -\5086 = BUFF(\3466) -\5089 = BUFF(\3247) -\5092 = BUFF(\3462) -\5095 = BUFF(\3458) -\5098 = BUFF(\3454) -\5101 = BUFF(\3470) -\5104 = BUFF(\3251) -\5107 = BUFF(\3381) -\5110 = NOT(\3873) -\5111 = NOT(\3876) -\5112 = NOT(\3879) -\5113 = NOT(\3882) -\5114 = BUFF(\3458) -\5117 = BUFF(\3454) -\5120 = BUFF(\3466) -\5123 = BUFF(\3462) -\5126 = BUFF(\3474) -\5129 = BUFF(\3470) -\5132 = BUFF(\3482) -\5135 = BUFF(\3478) -\5138 = BUFF(\3416) -\5141 = BUFF(\3424) -\5144 = BUFF(\3420) -\5147 = BUFF(\3432) -\5150 = BUFF(\3428) -\5153 = BUFF(\3440) -\5156 = BUFF(\3436) -\5159 = BUFF(\3448) -\5162 = BUFF(\3444) -\5165 = NAND(\4486, \4485) -\5166 = NAND(\4474, \4473) -\5167 = NAND(\1290, \4464) -\5168 = NAND(\1293, \4466) -\5169 = NAND(\2074, \4468) -\5170 = NAND(\1296, \4470) -\5171 = NAND(\1302, \4472) -\5172 = NAND(\1314, \4476) -\5173 = NAND(\1317, \4478) -\5174 = NAND(\2081, \4480) -\5175 = NAND(\1320, \4482) -\5176 = NAND(\1323, \4484) -\5177 = NAND(\3953, \4487) -\5178 = NAND(\3955, \4488) -\5179 = NAND(\3073, \4489) -\5180 = NAND(\3542, \4491) -\5181 = NAND(\3539, \4492) -\5182 = NAND(\3548, \4493) -\5183 = NAND(\3545, \4494) -\5184 = NAND(\3080, \4495) -\5185 = NAND(\3560, \4497) -\5186 = NAND(\3557, \4498) -\5187 = NAND(\3566, \4499) -\5188 = NAND(\3563, \4500) -\5189 = NAND(\2778, \4501) -\5190 = NAND(\3577, \4503) -\5191 = NAND(\3574, \4504) -\5192 = NAND(\3583, \4505) -\5193 = NAND(\3580, \4506) -\5196 = NAND(\1326, \4508) -\5197 = NAND(\1329, \4510) -\5198 = NAND(\1332, \4512) -\5199 = NAND(\1335, \4514) -\5200 = NAND(\1338, \4516) -\5201 = NAND(\1341, \4518) -\5202 = NAND(\1344, \4520) -\5203 = NAND(\1347, \4522) -\5204 = NAND(\1350, \4524) -\5205 = NAND(\1353, \4526) -\5206 = NAND(\1356, \4528) -\5207 = NAND(\1359, \4530) -\5208 = NAND(\1362, \4532) -\5209 = NAND(\1365, \4534) -\5210 = NAND(\1368, \4536) -\5211 = NAND(\1371, \4538) -\5212 = NAND(\1374, \4540) -\5213 = NAND(\1377, \4542) -\5283 = NAND(\3670, \4611) -\5284 = NAND(\3667, \4612) -\5285 = NAND(\3676, \4613) -\5286 = NAND(\3673, \4614) -\5287 = NAND(\3682, \4615) -\5288 = NAND(\3679, \4616) -\5289 = NAND(\3688, \4617) -\5290 = NAND(\3685, \4618) -\5291 = NAND(\3694, \4619) -\5292 = NAND(\3691, \4620) -\5293 = NAND(\3700, \4621) -\5294 = NAND(\3697, \4622) -\5295 = NAND(\3706, \4623) -\5296 = NAND(\3703, \4624) -\5297 = NAND(\3712, \4625) -\5298 = NAND(\3709, \4626) -\5299 = NAND(\3718, \4627) -\5300 = NAND(\3715, \4628) -\5314 = NAND(\3739, \4643) -\5315 = NAND(\3736, \4644) -\5316 = NAND(\3745, \4645) -\5317 = NAND(\3742, \4646) -\5318 = NAND(\3751, \4647) -\5319 = NAND(\3748, \4648) -\5320 = NAND(\3757, \4649) -\5321 = NAND(\3754, \4650) -\5322 = NAND(\3763, \4651) -\5323 = NAND(\3760, \4652) -\5324 = NOT(\4193) -\5363 = NAND(\2781, \4693) -\5364 = NAND(\3772, \4695) -\5365 = NAND(\3769, \4696) -\5366 = NAND(\3778, \4697) -\5367 = NAND(\3775, \4698) -\5425 = NAND(\2790, \4745) -\5426 = NAND(\3813, \4747) -\5427 = NAND(\3810, \4748) -\5429 = NAND(\2793, \4750) -\5430 = NAND(\3825, \4752) -\5431 = NAND(\3822, \4753) -\5432 = NAND(\3831, \4754) -\5433 = NAND(\3828, \4755) -\5451 = NAND(\2796, \4775) -\5452 = NAND(\3864, \4777) -\5453 = NAND(\3861, \4778) -\5454 = NAND(\3870, \4779) -\5455 = NAND(\3867, \4780) -\5456 = NAND(\3888, \4781) -\5457 = NAND(\3885, \4782) -\5469 = NOT(\4303) -\5474 = NAND(\3589, \4799) -\5475 = NAND(\3586, \4800) -\5476 = NAND(\3595, \4801) -\5477 = NAND(\3592, \4802) -\5571 = NAND(\3798, \5045) -\5572 = NAND(\3795, \5046) -\5573 = NAND(\3804, \5047) -\5574 = NAND(\3801, \5048) -\5584 = NAND(\3837, \5064) -\5585 = NAND(\3834, \5065) -\5586 = NAND(\3843, \5066) -\5587 = NAND(\3840, \5067) -\5602 = NAND(\3876, \5110) -\5603 = NAND(\3873, \5111) -\5604 = NAND(\3882, \5112) -\5605 = NAND(\3879, \5113) -\5631 = NAND(\5324, \4653) -\5632 = NAND(\4463, \5167) -\5640 = NAND(\4465, \5168) -\5654 = NAND(\4467, \5169) -\5670 = NAND(\4469, \5170) -\5683 = NAND(\4471, \5171) -\5690 = NAND(\4475, \5172) -\5697 = NAND(\4477, \5173) -\5707 = NAND(\4479, \5174) -\5718 = NAND(\4481, \5175) -\5728 = NAND(\4483, \5176) -\5735 = NOT(\5177) -\5736 = NAND(\5179, \4490) -\5740 = NAND(\5180, \5181) -\5744 = NAND(\5182, \5183) -\5747 = NAND(\5184, \4496) -\5751 = NAND(\5185, \5186) -\5755 = NAND(\5187, \5188) -\5758 = NAND(\5189, \4502) -\5762 = NAND(\5190, \5191) -\5766 = NAND(\5192, \5193) -\5769 = NOT(\4803) -\5770 = NOT(\4806) -\5771 = NAND(\4507, \5196) -\5778 = NAND(\4509, \5197) -\5789 = NAND(\4511, \5198) -\5799 = NAND(\4513, \5199) -\5807 = NAND(\4515, \5200) -\5821 = NAND(\4517, \5201) -\5837 = NAND(\4519, \5202) -\5850 = NAND(\4521, \5203) -\5856 = NAND(\4523, \5204) -\5863 = NAND(\4525, \5205) -\5870 = NAND(\4527, \5206) -\5881 = NAND(\4529, \5207) -\5892 = NAND(\4531, \5208) -\5898 = NAND(\4533, \5209) -\5905 = NAND(\4535, \5210) -\5915 = NAND(\4537, \5211) -\5926 = NAND(\4539, \5212) -\5936 = NAND(\4541, \5213) -\5943 = NOT(\4817) -\5944 = NAND(\4820, \1931) -\5945 = NOT(\4820) -\5946 = NAND(\4823, \1932) -\5947 = NOT(\4823) -\5948 = NAND(\4826, \1933) -\5949 = NOT(\4826) -\5950 = NAND(\4829, \1934) -\5951 = NOT(\4829) -\5952 = NAND(\4832, \1935) -\5953 = NOT(\4832) -\5954 = NAND(\4835, \1936) -\5955 = NOT(\4835) -\5956 = NAND(\4838, \1937) -\5957 = NOT(\4838) -\5958 = NAND(\4841, \1938) -\5959 = NOT(\4841) -\5960 = AND(\2674, \4769) -\5966 = NOT(\4844) -\5967 = NAND(\4847, \1939) -\5968 = NOT(\4847) -\5969 = NAND(\4850, \1940) -\5970 = NOT(\4850) -\5971 = NAND(\4853, \1941) -\5972 = NOT(\4853) -\5973 = NAND(\4856, \1942) -\5974 = NOT(\4856) -\5975 = NAND(\4859, \1943) -\5976 = NOT(\4859) -\5977 = NAND(\4862, \1944) -\5978 = NOT(\4862) -\5979 = NAND(\4865, \1945) -\5980 = NOT(\4865) -\5981 = AND(\2674, \4769) -\5989 = NAND(\4868, \1946) -\5990 = NOT(\4868) -\5991 = NAND(\5283, \5284) -\5996 = NAND(\5285, \5286) -\6000 = NAND(\5287, \5288) -\6003 = NAND(\5289, \5290) -\6009 = NAND(\5291, \5292) -\6014 = NAND(\5293, \5294) -\6018 = NAND(\5295, \5296) -\6021 = NAND(\5297, \5298) -\6022 = NAND(\5299, \5300) -\6023 = NOT(\4874) -\6024 = NAND(\4874, \4629) -\6025 = NOT(\4877) -\6026 = NAND(\4877, \4631) -\6027 = NOT(\4880) -\6028 = NAND(\4880, \4633) -\6029 = NOT(\4883) -\6030 = NAND(\4883, \4636) -\6031 = NOT(\4886) -\6032 = NOT(\4889) -\6033 = NOT(\4892) -\6034 = NOT(\4895) -\6035 = NOT(\4898) -\6036 = NOT(\4901) -\6037 = NOT(\4904) -\6038 = NAND(\4904, \4642) -\6039 = NOT(\4907) -\6040 = NOT(\4910) -\6041 = NAND(\5314, \5315) -\6047 = NAND(\5316, \5317) -\6052 = NAND(\5318, \5319) -\6056 = NAND(\5320, \5321) -\6059 = NAND(\5322, \5323) -\6060 = NAND(\4913, \1968) -\6061 = NOT(\4913) -\6062 = NAND(\4916, \1969) -\6063 = NOT(\4916) -\6064 = NAND(\4919, \1970) -\6065 = NOT(\4919) -\6066 = NAND(\4922, \1971) -\6067 = NOT(\4922) -\6068 = NAND(\4925, \1972) -\6069 = NOT(\4925) -\6070 = NAND(\4928, \1973) -\6071 = NOT(\4928) -\6072 = NAND(\4931, \1974) -\6073 = NOT(\4931) -\6074 = NAND(\4934, \1975) -\6075 = NOT(\4934) -\6076 = NAND(\4937, \1976) -\6077 = NOT(\4937) -\6078 = NOT(\4940) -\6079 = NAND(\5363, \4694) -\6083 = NAND(\5364, \5365) -\6087 = NAND(\5366, \5367) -\6090 = NOT(\4943) -\6091 = NAND(\4943, \4699) -\6092 = NOT(\4946) -\6093 = NOT(\4949) -\6094 = NOT(\4952) -\6095 = NOT(\4955) -\6096 = NOT(\4970) -\6097 = NAND(\4970, \4700) -\6098 = NOT(\4973) -\6099 = NOT(\4976) -\6100 = NOT(\4979) -\6101 = NOT(\4982) -\6102 = NOT(\4997) -\6103 = NAND(\5000, \2015) -\6104 = NOT(\5000) -\6105 = NAND(\5003, \2016) -\6106 = NOT(\5003) -\6107 = NAND(\5006, \2017) -\6108 = NOT(\5006) -\6109 = NAND(\5009, \2018) -\6110 = NOT(\5009) -\6111 = NAND(\5012, \2019) -\6112 = NOT(\5012) -\6113 = NAND(\5015, \2020) -\6114 = NOT(\5015) -\6115 = NAND(\5018, \2021) -\6116 = NOT(\5018) -\6117 = NAND(\5021, \2022) -\6118 = NOT(\5021) -\6119 = NAND(\5024, \2023) -\6120 = NOT(\5024) -\6121 = NOT(\5033) -\6122 = NAND(\5033, \4743) -\6123 = NOT(\5036) -\6124 = NOT(\5039) -\6125 = NAND(\5042, \4744) -\6126 = NOT(\5042) -\6127 = NAND(\5425, \4746) -\6131 = NAND(\5426, \5427) -\6135 = NOT(\5049) -\6136 = NAND(\5049, \4749) -\6137 = NAND(\5429, \4751) -\6141 = NAND(\5430, \5431) -\6145 = NAND(\5432, \5433) -\6148 = NOT(\5068) -\6149 = NOT(\5071) -\6150 = NOT(\5074) -\6151 = NOT(\5077) -\6152 = NOT(\5080) -\6153 = NOT(\5083) -\6154 = NOT(\5086) -\6155 = NOT(\5089) -\6156 = NOT(\5092) -\6157 = NAND(\5092, \4761) -\6158 = NOT(\5095) -\6159 = NAND(\5095, \4763) -\6160 = NOT(\5098) -\6161 = NAND(\5098, \4765) -\6162 = NOT(\5101) -\6163 = NOT(\5104) -\6164 = NAND(\5107, \4768) -\6165 = NOT(\5107) -\6166 = NAND(\5451, \4776) -\6170 = NAND(\5452, \5453) -\6174 = NAND(\5454, \5455) -\6177 = NAND(\5456, \5457) -\6181 = NOT(\5114) -\6182 = NOT(\5117) -\6183 = NOT(\5120) -\6184 = NOT(\5123) -\6185 = NOT(\5138) -\6186 = NAND(\5138, \4783) -\6187 = NOT(\5141) -\6188 = NOT(\5144) -\6189 = NOT(\5147) -\6190 = NOT(\5150) -\6191 = NOT(\4784) -\6192 = NAND(\4784, \2230) -\6193 = NOT(\4790) -\6194 = NAND(\4790, \2765) -\6195 = NOT(\4796) -\6196 = NAND(\5476, \5477) -\6199 = NAND(\5474, \5475) -\6202 = NOT(\4810) -\6203 = NOT(\4814) -\6204 = BUFF(\4769) -\6207 = BUFF(\4555) -\6210 = BUFF(\4769) -\6213 = NOT(\4871) -\6214 = BUFF(\4586) -\6217 = NOR(\2674, \4769) -\6220 = BUFF(\4667) -\6223 = NOT(\4958) -\6224 = NOT(\4961) -\6225 = NOT(\4964) -\6226 = NOT(\4967) -\6227 = NOT(\4985) -\6228 = NOT(\4988) -\6229 = NOT(\4991) -\6230 = NOT(\4994) -\6231 = NOT(\5027) -\6232 = BUFF(\4711) -\6235 = NOT(\5030) -\6236 = BUFF(\4735) -\6239 = NOT(\5052) -\6240 = NOT(\5055) -\6241 = NOT(\5058) -\6242 = NOT(\5061) -\6243 = NAND(\5573, \5574) -\6246 = NAND(\5571, \5572) -\6249 = NAND(\5586, \5587) -\6252 = NAND(\5584, \5585) -\6255 = NOT(\5126) -\6256 = NOT(\5129) -\6257 = NOT(\5132) -\6258 = NOT(\5135) -\6259 = NOT(\5153) -\6260 = NOT(\5156) -\6261 = NOT(\5159) -\6262 = NOT(\5162) -\6263 = NAND(\5604, \5605) -\6266 = NAND(\5602, \5603) -\6540 = NAND(\1380, \5945) -\6541 = NAND(\1383, \5947) -\6542 = NAND(\1386, \5949) -\6543 = NAND(\1389, \5951) -\6544 = NAND(\1392, \5953) -\6545 = NAND(\1395, \5955) -\6546 = NAND(\1398, \5957) -\6547 = NAND(\1401, \5959) -\6555 = NAND(\1404, \5968) -\6556 = NAND(\1407, \5970) -\6557 = NAND(\1410, \5972) -\6558 = NAND(\1413, \5974) -\6559 = NAND(\1416, \5976) -\6560 = NAND(\1419, \5978) -\6561 = NAND(\1422, \5980) -\6569 = NAND(\1425, \5990) -\6594 = NAND(\3721, \6023) -\6595 = NAND(\3724, \6025) -\6596 = NAND(\3727, \6027) -\6597 = NAND(\3730, \6029) -\6598 = NAND(\4889, \6031) -\6599 = NAND(\4886, \6032) -\6600 = NAND(\4895, \6033) -\6601 = NAND(\4892, \6034) -\6602 = NAND(\4901, \6035) -\6603 = NAND(\4898, \6036) -\6604 = NAND(\3733, \6037) -\6605 = NAND(\4910, \6039) -\6606 = NAND(\4907, \6040) -\6621 = NAND(\1434, \6061) -\6622 = NAND(\1437, \6063) -\6623 = NAND(\1440, \6065) -\6624 = NAND(\1443, \6067) -\6625 = NAND(\1446, \6069) -\6626 = NAND(\1449, \6071) -\6627 = NAND(\1452, \6073) -\6628 = NAND(\1455, \6075) -\6629 = NAND(\1458, \6077) -\6639 = NAND(\3783, \6090) -\6640 = NAND(\4949, \6092) -\6641 = NAND(\4946, \6093) -\6642 = NAND(\4955, \6094) -\6643 = NAND(\4952, \6095) -\6644 = NAND(\3786, \6096) -\6645 = NAND(\4976, \6098) -\6646 = NAND(\4973, \6099) -\6647 = NAND(\4982, \6100) -\6648 = NAND(\4979, \6101) -\6649 = NAND(\1461, \6104) -\6650 = NAND(\1464, \6106) -\6651 = NAND(\1467, \6108) -\6652 = NAND(\1470, \6110) -\6653 = NAND(\1473, \6112) -\6654 = NAND(\1476, \6114) -\6655 = NAND(\1479, \6116) -\6656 = NAND(\1482, \6118) -\6657 = NAND(\1485, \6120) -\6658 = NAND(\3789, \6121) -\6659 = NAND(\5039, \6123) -\6660 = NAND(\5036, \6124) -\6661 = NAND(\3792, \6126) -\6668 = NAND(\3816, \6135) -\6677 = NAND(\5071, \6148) -\6678 = NAND(\5068, \6149) -\6679 = NAND(\5077, \6150) -\6680 = NAND(\5074, \6151) -\6681 = NAND(\5083, \6152) -\6682 = NAND(\5080, \6153) -\6683 = NAND(\5089, \6154) -\6684 = NAND(\5086, \6155) -\6685 = NAND(\3846, \6156) -\6686 = NAND(\3849, \6158) -\6687 = NAND(\3852, \6160) -\6688 = NAND(\5104, \6162) -\6689 = NAND(\5101, \6163) -\6690 = NAND(\3855, \6165) -\6702 = NAND(\5117, \6181) -\6703 = NAND(\5114, \6182) -\6704 = NAND(\5123, \6183) -\6705 = NAND(\5120, \6184) -\6706 = NAND(\3891, \6185) -\6707 = NAND(\5144, \6187) -\6708 = NAND(\5141, \6188) -\6709 = NAND(\5150, \6189) -\6710 = NAND(\5147, \6190) -\6711 = NAND(\1708, \6191) -\6712 = NAND(\2231, \6193) -\6729 = NAND(\4961, \6223) -\6730 = NAND(\4958, \6224) -\6731 = NAND(\4967, \6225) -\6732 = NAND(\4964, \6226) -\6733 = NAND(\4988, \6227) -\6734 = NAND(\4985, \6228) -\6735 = NAND(\4994, \6229) -\6736 = NAND(\4991, \6230) -\6741 = NAND(\5055, \6239) -\6742 = NAND(\5052, \6240) -\6743 = NAND(\5061, \6241) -\6744 = NAND(\5058, \6242) -\6751 = NAND(\5129, \6255) -\6752 = NAND(\5126, \6256) -\6753 = NAND(\5135, \6257) -\6754 = NAND(\5132, \6258) -\6755 = NAND(\5156, \6259) -\6756 = NAND(\5153, \6260) -\6757 = NAND(\5162, \6261) -\6758 = NAND(\5159, \6262) -\6761 = NOT(\5892) -\6762 = AND(\5683, \5670, \5654, \5640, \5632) -\6766 = AND(\5632, \3097) -\6767 = AND(\5640, \5632, \3101) -\6768 = AND(\5654, \5632, \3107, \5640) -\6769 = AND(\5670, \5654, \5632, \3114, \5640) -\6770 = AND(\5640, \3101) -\6771 = AND(\5654, \3107, \5640) -\6772 = AND(\5670, \5654, \3114, \5640) -\6773 = AND(\5683, \5654, \5640, \5670) -\6774 = AND(\5640, \3101) -\6775 = AND(\5654, \3107, \5640) -\6776 = AND(\5670, \5654, \3114, \5640) -\6777 = AND(\5654, \3107) -\6778 = AND(\5670, \5654, \3114) -\6779 = AND(\5683, \5654, \5670) -\6780 = AND(\5654, \3107) -\6781 = AND(\5670, \5654, \3114) -\6782 = AND(\5670, \3114) -\6783 = AND(\5683, \5670) -\6784 = AND(\5697, \5728, \5707, \5690, \5718) -\6787 = AND(\5690, \3137) -\6788 = AND(\5697, \5690, \3140) -\6789 = AND(\5707, \5690, \3144, \5697) -\6790 = AND(\5718, \5707, \5690, \3149, \5697) -\6791 = AND(\5697, \3140) -\6792 = AND(\5707, \3144, \5697) -\6793 = AND(\5718, \5707, \3149, \5697) -\6794 = AND(\3144, \5707) -\6795 = AND(\5718, \5707, \3149) -\6796 = AND(\5718, \3149) -\6797 = NOT(\5736) -\6800 = NOT(\5740) -\6803 = NOT(\5747) -\6806 = NOT(\5751) -\6809 = NOT(\5758) -\6812 = NOT(\5762) -\6815 = BUFF(\5744) -\6818 = BUFF(\5744) -\6821 = BUFF(\5755) -\6824 = BUFF(\5755) -\6827 = BUFF(\5766) -\6830 = BUFF(\5766) -\6833 = AND(\5850, \5789, \5778, \5771) -\6836 = AND(\5771, \3169) -\6837 = AND(\5778, \5771, \3173) -\6838 = AND(\5789, \5771, \3178, \5778) -\6839 = AND(\5778, \3173) -\6840 = AND(\5789, \3178, \5778) -\6841 = AND(\5850, \5789, \5778) -\6842 = AND(\5778, \3173) -\6843 = AND(\5789, \3178, \5778) -\6844 = AND(\5789, \3178) -\6845 = AND(\5856, \5837, \5821, \5807, \5799) -\6848 = AND(\5799, \3185) -\6849 = AND(\5807, \5799, \3189) -\6850 = AND(\5821, \5799, \3195, \5807) -\6851 = AND(\5837, \5821, \5799, \3202, \5807) -\6852 = AND(\5807, \3189) -\6853 = AND(\5821, \3195, \5807) -\6854 = AND(\5837, \5821, \3202, \5807) -\6855 = AND(\5856, \5821, \5807, \5837) -\6856 = AND(\5807, \3189) -\6857 = AND(\5821, \3195, \5807) -\6858 = AND(\5837, \5821, \3202, \5807) -\6859 = AND(\5821, \3195) -\6860 = AND(\5837, \5821, \3202) -\6861 = AND(\5856, \5821, \5837) -\6862 = AND(\5821, \3195) -\6863 = AND(\5837, \5821, \3202) -\6864 = AND(\5837, \3202) -\6865 = AND(\5850, \5789) -\6866 = AND(\5856, \5837) -\6867 = AND(\5870, \5892, \5881, \5863) -\6870 = AND(\5863, \3211) -\6871 = AND(\5870, \5863, \3215) -\6872 = AND(\5881, \5863, \3221, \5870) -\6873 = AND(\5870, \3215) -\6874 = AND(\5881, \3221, \5870) -\6875 = AND(\5892, \5881, \5870) -\6876 = AND(\5870, \3215) -\6877 = AND(\3221, \5881, \5870) -\6878 = AND(\5881, \3221) -\6879 = AND(\5892, \5881) -\6880 = AND(\5881, \3221) -\6881 = AND(\5905, \5936, \5915, \5898, \5926) -\6884 = AND(\5898, \3229) -\6885 = AND(\5905, \5898, \3232) -\6886 = AND(\5915, \5898, \3236, \5905) -\6887 = AND(\5926, \5915, \5898, \3241, \5905) -\6888 = AND(\5905, \3232) -\6889 = AND(\5915, \3236, \5905) -\6890 = AND(\5926, \5915, \3241, \5905) -\6891 = AND(\3236, \5915) -\6892 = AND(\5926, \5915, \3241) -\6893 = AND(\5926, \3241) -\6894 = NAND(\5944, \6540) -\6901 = NAND(\5946, \6541) -\6912 = NAND(\5948, \6542) -\6923 = NAND(\5950, \6543) -\6929 = NAND(\5952, \6544) -\6936 = NAND(\5954, \6545) -\6946 = NAND(\5956, \6546) -\6957 = NAND(\5958, \6547) -\6967 = NAND(\6204, \4575) -\6968 = NOT(\6204) -\6969 = NOT(\6207) -\6970 = NAND(\5967, \6555) -\6977 = NAND(\5969, \6556) -\6988 = NAND(\5971, \6557) -\6998 = NAND(\5973, \6558) -\7006 = NAND(\5975, \6559) -\7020 = NAND(\5977, \6560) -\7036 = NAND(\5979, \6561) -\7049 = NAND(\5989, \6569) -\7055 = NAND(\6210, \4610) -\7056 = NOT(\6210) -\7057 = AND(\6021, \6000, \5996, \5991) -\7060 = AND(\5991, \3362) -\7061 = AND(\5996, \5991, \3363) -\7062 = AND(\6000, \5991, \3364, \5996) -\7063 = AND(\6022, \6018, \6014, \6009, \6003) -\7064 = AND(\6003, \3366) -\7065 = AND(\6009, \6003, \3367) -\7066 = AND(\6014, \6003, \3368, \6009) -\7067 = AND(\6018, \6014, \6003, \3369, \6009) -\7068 = NAND(\6594, \6024) -\7073 = NAND(\6595, \6026) -\7077 = NAND(\6596, \6028) -\7080 = NAND(\6597, \6030) -\7086 = NAND(\6598, \6599) -\7091 = NAND(\6600, \6601) -\7095 = NAND(\6602, \6603) -\7098 = NAND(\6604, \6038) -\7099 = NAND(\6605, \6606) -\7100 = AND(\6059, \6056, \6052, \6047, \6041) -\7103 = AND(\6041, \3371) -\7104 = AND(\6047, \6041, \3372) -\7105 = AND(\6052, \6041, \3373, \6047) -\7106 = AND(\6056, \6052, \6041, \3374, \6047) -\7107 = NAND(\6060, \6621) -\7114 = NAND(\6062, \6622) -\7125 = NAND(\6064, \6623) -\7136 = NAND(\6066, \6624) -\7142 = NAND(\6068, \6625) -\7149 = NAND(\6070, \6626) -\7159 = NAND(\6072, \6627) -\7170 = NAND(\6074, \6628) -\7180 = NAND(\6076, \6629) -\7187 = NOT(\6220) -\7188 = NOT(\6079) -\7191 = NOT(\6083) -\7194 = NAND(\6639, \6091) -\7198 = NAND(\6640, \6641) -\7202 = NAND(\6642, \6643) -\7205 = NAND(\6644, \6097) -\7209 = NAND(\6645, \6646) -\7213 = NAND(\6647, \6648) -\7216 = BUFF(\6087) -\7219 = BUFF(\6087) -\7222 = NAND(\6103, \6649) -\7229 = NAND(\6105, \6650) -\7240 = NAND(\6107, \6651) -\7250 = NAND(\6109, \6652) -\7258 = NAND(\6111, \6653) -\7272 = NAND(\6113, \6654) -\7288 = NAND(\6115, \6655) -\7301 = NAND(\6117, \6656) -\7307 = NAND(\6119, \6657) -\7314 = NAND(\6658, \6122) -\7318 = NAND(\6659, \6660) -\7322 = NAND(\6125, \6661) -\7325 = NOT(\6127) -\7328 = NOT(\6131) -\7331 = NAND(\6668, \6136) -\7334 = NOT(\6137) -\7337 = NOT(\6141) -\7340 = BUFF(\6145) -\7343 = BUFF(\6145) -\7346 = NAND(\6677, \6678) -\7351 = NAND(\6679, \6680) -\7355 = NAND(\6681, \6682) -\7358 = NAND(\6683, \6684) -\7364 = NAND(\6685, \6157) -\7369 = NAND(\6686, \6159) -\7373 = NAND(\6687, \6161) -\7376 = NAND(\6688, \6689) -\7377 = NAND(\6164, \6690) -\7378 = NOT(\6166) -\7381 = NOT(\6170) -\7384 = NOT(\6177) -\7387 = NAND(\6702, \6703) -\7391 = NAND(\6704, \6705) -\7394 = NAND(\6706, \6186) -\7398 = NAND(\6707, \6708) -\7402 = NAND(\6709, \6710) -\7405 = BUFF(\6174) -\7408 = BUFF(\6174) -\7411 = BUFF(\5936) -\7414 = BUFF(\5898) -\7417 = BUFF(\5905) -\7420 = BUFF(\5915) -\7423 = BUFF(\5926) -\7426 = BUFF(\5728) -\7429 = BUFF(\5690) -\7432 = BUFF(\5697) -\7435 = BUFF(\5707) -\7438 = BUFF(\5718) -\7441 = NAND(\6192, \6711) -\7444 = NAND(\6194, \6712) -\7447 = BUFF(\5683) -\7450 = BUFF(\5670) -\7453 = BUFF(\5632) -\7456 = BUFF(\5654) -\7459 = BUFF(\5640) -\7462 = BUFF(\5640) -\7465 = BUFF(\5683) -\7468 = BUFF(\5670) -\7471 = BUFF(\5632) -\7474 = BUFF(\5654) -\7477 = NOT(\6196) -\7478 = NOT(\6199) -\7479 = BUFF(\5850) -\7482 = BUFF(\5789) -\7485 = BUFF(\5771) -\7488 = BUFF(\5778) -\7491 = BUFF(\5850) -\7494 = BUFF(\5789) -\7497 = BUFF(\5771) -\7500 = BUFF(\5778) -\7503 = BUFF(\5856) -\7506 = BUFF(\5837) -\7509 = BUFF(\5799) -\7512 = BUFF(\5821) -\7515 = BUFF(\5807) -\7518 = BUFF(\5807) -\7521 = BUFF(\5856) -\7524 = BUFF(\5837) -\7527 = BUFF(\5799) -\7530 = BUFF(\5821) -\7533 = BUFF(\5863) -\7536 = BUFF(\5863) -\7539 = BUFF(\5870) -\7542 = BUFF(\5870) -\7545 = BUFF(\5881) -\7548 = BUFF(\5881) -\7551 = NOT(\6214) -\7552 = NOT(\6217) -\7553 = BUFF(\5981) -\7556 = NOT(\6249) -\7557 = NOT(\6252) -\7558 = NOT(\6243) -\7559 = NOT(\6246) -\7560 = NAND(\6731, \6732) -\7563 = NAND(\6729, \6730) -\7566 = NAND(\6735, \6736) -\7569 = NAND(\6733, \6734) -\7572 = NOT(\6232) -\7573 = NOT(\6236) -\7574 = NAND(\6743, \6744) -\7577 = NAND(\6741, \6742) -\7580 = NOT(\6263) -\7581 = NOT(\6266) -\7582 = NAND(\6753, \6754) -\7585 = NAND(\6751, \6752) -\7588 = NAND(\6757, \6758) -\7591 = NAND(\6755, \6756) -\7609 = OR(\3096, \6766, \6767, \6768, \6769) -\7613 = OR(\3107, \6782) -\7620 = OR(\3136, \6787, \6788, \6789, \6790) -\7649 = OR(\3168, \6836, \6837, \6838) -\7650 = OR(\3173, \6844) -\7655 = OR(\3184, \6848, \6849, \6850, \6851) -\7659 = OR(\3195, \6864) -\7668 = OR(\3210, \6870, \6871, \6872) -\7671 = OR(\3228, \6884, \6885, \6886, \6887) -\7744 = NAND(\3661, \6968) -\7822 = NAND(\3664, \7056) -\7825 = OR(\3361, \7060, \7061, \7062) -\7826 = OR(\3365, \7064, \7065, \7066, \7067) -\7852 = OR(\3370, \7103, \7104, \7105, \7106) -\8114 = OR(\3101, \6777, \6778, \6779) -\8117 = OR(\3097, \6770, \6771, \6772, \6773) -\8131 = NOR(\3101, \6780, \6781) -\8134 = NOR(\3097, \6774, \6775, \6776) -\8144 = NAND(\6199, \7477) -\8145 = NAND(\6196, \7478) -\8146 = OR(\3169, \6839, \6840, \6841) -\8156 = NOR(\3169, \6842, \6843) -\8166 = OR(\3189, \6859, \6860, \6861) -\8169 = OR(\3185, \6852, \6853, \6854, \6855) -\8183 = NOR(\3189, \6862, \6863) -\8186 = NOR(\3185, \6856, \6857, \6858) -\8196 = OR(\3211, \6873, \6874, \6875) -\8200 = NOR(\3211, \6876, \6877) -\8204 = OR(\3215, \6878, \6879) -\8208 = NOR(\3215, \6880) -\8216 = NAND(\6252, \7556) -\8217 = NAND(\6249, \7557) -\8218 = NAND(\6246, \7558) -\8219 = NAND(\6243, \7559) -\8232 = NAND(\6266, \7580) -\8233 = NAND(\6263, \7581) -\8242 = NOT(\7411) -\8243 = NOT(\7414) -\8244 = NOT(\7417) -\8245 = NOT(\7420) -\8246 = NOT(\7423) -\8247 = NOT(\7426) -\8248 = NOT(\7429) -\8249 = NOT(\7432) -\8250 = NOT(\7435) -\8251 = NOT(\7438) -\8252 = NOT(\7136) -\8253 = NOT(\6923) -\8254 = NOT(\6762) -\8260 = NOT(\7459) -\8261 = NOT(\7462) -\8262 = AND(\3122, \6762) -\8269 = AND(\3155, \6784) -\8274 = NOT(\6815) -\8275 = NOT(\6818) -\8276 = NOT(\6821) -\8277 = NOT(\6824) -\8278 = NOT(\6827) -\8279 = NOT(\6830) -\8280 = AND(\5740, \5736, \6815) -\8281 = AND(\6800, \6797, \6818) -\8282 = AND(\5751, \5747, \6821) -\8283 = AND(\6806, \6803, \6824) -\8284 = AND(\5762, \5758, \6827) -\8285 = AND(\6812, \6809, \6830) -\8288 = NOT(\6845) -\8294 = NOT(\7488) -\8295 = NOT(\7500) -\8296 = NOT(\7515) -\8297 = NOT(\7518) -\8298 = AND(\6833, \6845) -\8307 = AND(\6867, \6881) -\8315 = NOT(\7533) -\8317 = NOT(\7536) -\8319 = NOT(\7539) -\8321 = NOT(\7542) -\8322 = NAND(\7545, \4543) -\8323 = NOT(\7545) -\8324 = NAND(\7548, \5943) -\8325 = NOT(\7548) -\8326 = NAND(\6967, \7744) -\8333 = AND(\6901, \6923, \6912, \6894) -\8337 = AND(\6894, \4545) -\8338 = AND(\6901, \6894, \4549) -\8339 = AND(\6912, \6894, \4555, \6901) -\8340 = AND(\6901, \4549) -\8341 = AND(\6912, \4555, \6901) -\8342 = AND(\6923, \6912, \6901) -\8343 = AND(\6901, \4549) -\8344 = AND(\4555, \6912, \6901) -\8345 = AND(\6912, \4555) -\8346 = AND(\6923, \6912) -\8347 = AND(\6912, \4555) -\8348 = AND(\6929, \4563) -\8349 = AND(\6936, \6929, \4566) -\8350 = AND(\6946, \6929, \4570, \6936) -\8351 = AND(\6957, \6946, \6929, \5960, \6936) -\8352 = AND(\6936, \4566) -\8353 = AND(\6946, \4570, \6936) -\8354 = AND(\6957, \6946, \5960, \6936) -\8355 = AND(\4570, \6946) -\8356 = AND(\6957, \6946, \5960) -\8357 = AND(\6957, \5960) -\8358 = NAND(\7055, \7822) -\8365 = AND(\7049, \6988, \6977, \6970) -\8369 = AND(\6970, \4577) -\8370 = AND(\6977, \6970, \4581) -\8371 = AND(\6988, \6970, \4586, \6977) -\8372 = AND(\6977, \4581) -\8373 = AND(\6988, \4586, \6977) -\8374 = AND(\7049, \6988, \6977) -\8375 = AND(\6977, \4581) -\8376 = AND(\6988, \4586, \6977) -\8377 = AND(\6988, \4586) -\8378 = AND(\6998, \4593) -\8379 = AND(\7006, \6998, \4597) -\8380 = AND(\7020, \6998, \4603, \7006) -\8381 = AND(\7036, \7020, \6998, \5981, \7006) -\8382 = AND(\7006, \4597) -\8383 = AND(\7020, \4603, \7006) -\8384 = AND(\7036, \7020, \5981, \7006) -\8385 = AND(\7006, \4597) -\8386 = AND(\7020, \4603, \7006) -\8387 = AND(\7036, \7020, \5981, \7006) -\8388 = AND(\7020, \4603) -\8389 = AND(\7036, \7020, \5981) -\8390 = AND(\7020, \4603) -\8391 = AND(\7036, \7020, \5981) -\8392 = AND(\7036, \5981) -\8393 = AND(\7049, \6988) -\8394 = AND(\7057, \7063) -\8404 = AND(\7057, \7826) -\8405 = AND(\7098, \7077, \7073, \7068) -\8409 = AND(\7068, \4632) -\8410 = AND(\7073, \7068, \4634) -\8411 = AND(\7077, \7068, \4635, \7073) -\8412 = AND(\7099, \7095, \7091, \7086, \7080) -\8415 = AND(\7080, \4638) -\8416 = AND(\7086, \7080, \4639) -\8417 = AND(\7091, \7080, \4640, \7086) -\8418 = AND(\7095, \7091, \7080, \4641, \7086) -\8421 = AND(\3375, \7100) -\8430 = AND(\7114, \7136, \7125, \7107) -\8433 = AND(\7107, \4657) -\8434 = AND(\7114, \7107, \4661) -\8435 = AND(\7125, \7107, \4667, \7114) -\8436 = AND(\7114, \4661) -\8437 = AND(\7125, \4667, \7114) -\8438 = AND(\7136, \7125, \7114) -\8439 = AND(\7114, \4661) -\8440 = AND(\4667, \7125, \7114) -\8441 = AND(\7125, \4667) -\8442 = AND(\7136, \7125) -\8443 = AND(\7125, \4667) -\8444 = AND(\7149, \7180, \7159, \7142, \7170) -\8447 = AND(\7142, \4675) -\8448 = AND(\7149, \7142, \4678) -\8449 = AND(\7159, \7142, \4682, \7149) -\8450 = AND(\7170, \7159, \7142, \4687, \7149) -\8451 = AND(\7149, \4678) -\8452 = AND(\7159, \4682, \7149) -\8453 = AND(\7170, \7159, \4687, \7149) -\8454 = AND(\4682, \7159) -\8455 = AND(\7170, \7159, \4687) -\8456 = AND(\7170, \4687) -\8457 = NOT(\7194) -\8460 = NOT(\7198) -\8463 = NOT(\7205) -\8466 = NOT(\7209) -\8469 = NOT(\7216) -\8470 = NOT(\7219) -\8471 = BUFF(\7202) -\8474 = BUFF(\7202) -\8477 = BUFF(\7213) -\8480 = BUFF(\7213) -\8483 = AND(\6083, \6079, \7216) -\8484 = AND(\7191, \7188, \7219) -\8485 = AND(\7301, \7240, \7229, \7222) -\8488 = AND(\7222, \4702) -\8489 = AND(\7229, \7222, \4706) -\8490 = AND(\7240, \7222, \4711, \7229) -\8491 = AND(\7229, \4706) -\8492 = AND(\7240, \4711, \7229) -\8493 = AND(\7301, \7240, \7229) -\8494 = AND(\7229, \4706) -\8495 = AND(\7240, \4711, \7229) -\8496 = AND(\7240, \4711) -\8497 = AND(\7307, \7288, \7272, \7258, \7250) -\8500 = AND(\7250, \4718) -\8501 = AND(\7258, \7250, \4722) -\8502 = AND(\7272, \7250, \4728, \7258) -\8503 = AND(\7288, \7272, \7250, \4735, \7258) -\8504 = AND(\7258, \4722) -\8505 = AND(\7272, \4728, \7258) -\8506 = AND(\7288, \7272, \4735, \7258) -\8507 = AND(\7307, \7272, \7258, \7288) -\8508 = AND(\7258, \4722) -\8509 = AND(\7272, \4728, \7258) -\8510 = AND(\7288, \7272, \4735, \7258) -\8511 = AND(\7272, \4728) -\8512 = AND(\7288, \7272, \4735) -\8513 = AND(\7307, \7272, \7288) -\8514 = AND(\7272, \4728) -\8515 = AND(\7288, \7272, \4735) -\8516 = AND(\7288, \4735) -\8517 = AND(\7301, \7240) -\8518 = AND(\7307, \7288) -\8519 = NOT(\7314) -\8522 = NOT(\7318) -\8525 = BUFF(\7322) -\8528 = BUFF(\7322) -\8531 = BUFF(\7331) -\8534 = BUFF(\7331) -\8537 = NOT(\7340) -\8538 = NOT(\7343) -\8539 = AND(\6141, \6137, \7340) -\8540 = AND(\7337, \7334, \7343) -\8541 = AND(\7376, \7355, \7351, \7346) -\8545 = AND(\7346, \4757) -\8546 = AND(\7351, \7346, \4758) -\8547 = AND(\7355, \7346, \4759, \7351) -\8548 = AND(\7377, \7373, \7369, \7364, \7358) -\8551 = AND(\7358, \4762) -\8552 = AND(\7364, \7358, \4764) -\8553 = AND(\7369, \7358, \4766, \7364) -\8554 = AND(\7373, \7369, \7358, \4767, \7364) -\8555 = NOT(\7387) -\8558 = NOT(\7394) -\8561 = NOT(\7398) -\8564 = NOT(\7405) -\8565 = NOT(\7408) -\8566 = BUFF(\7391) -\8569 = BUFF(\7391) -\8572 = BUFF(\7402) -\8575 = BUFF(\7402) -\8578 = AND(\6170, \6166, \7405) -\8579 = AND(\7381, \7378, \7408) -\8580 = BUFF(\7180) -\8583 = BUFF(\7142) -\8586 = BUFF(\7149) -\8589 = BUFF(\7159) -\8592 = BUFF(\7170) -\8595 = BUFF(\6929) -\8598 = BUFF(\6936) -\8601 = BUFF(\6946) -\8604 = BUFF(\6957) -\8607 = NOT(\7441) -\8608 = NAND(\7441, \5469) -\8609 = NOT(\7444) -\8610 = NAND(\7444, \4793) -\8615 = NOT(\7447) -\8616 = NOT(\7450) -\8617 = NOT(\7453) -\8618 = NOT(\7456) -\8619 = NOT(\7474) -\8624 = NOT(\7465) -\8625 = NOT(\7468) -\8626 = NOT(\7471) -\8627 = NAND(\8144, \8145) -\8632 = NOT(\7479) -\8633 = NOT(\7482) -\8634 = NOT(\7485) -\8637 = NOT(\7491) -\8638 = NOT(\7494) -\8639 = NOT(\7497) -\8644 = NOT(\7503) -\8645 = NOT(\7506) -\8646 = NOT(\7509) -\8647 = NOT(\7512) -\8648 = NOT(\7530) -\8653 = NOT(\7521) -\8654 = NOT(\7524) -\8655 = NOT(\7527) -\8660 = BUFF(\6894) -\8663 = BUFF(\6894) -\8666 = BUFF(\6901) -\8669 = BUFF(\6901) -\8672 = BUFF(\6912) -\8675 = BUFF(\6912) -\8678 = BUFF(\7049) -\8681 = BUFF(\6988) -\8684 = BUFF(\6970) -\8687 = BUFF(\6977) -\8690 = BUFF(\7049) -\8693 = BUFF(\6988) -\8696 = BUFF(\6970) -\8699 = BUFF(\6977) -\8702 = BUFF(\7036) -\8705 = BUFF(\6998) -\8708 = BUFF(\7020) -\8711 = BUFF(\7006) -\8714 = BUFF(\7006) -\8717 = NOT(\7553) -\8718 = BUFF(\7036) -\8721 = BUFF(\6998) -\8724 = BUFF(\7020) -\8727 = NAND(\8216, \8217) -\8730 = NAND(\8218, \8219) -\8733 = NOT(\7574) -\8734 = NOT(\7577) -\8735 = BUFF(\7107) -\8738 = BUFF(\7107) -\8741 = BUFF(\7114) -\8744 = BUFF(\7114) -\8747 = BUFF(\7125) -\8750 = BUFF(\7125) -\8753 = NOT(\7560) -\8754 = NOT(\7563) -\8755 = NOT(\7566) -\8756 = NOT(\7569) -\8757 = BUFF(\7301) -\8760 = BUFF(\7240) -\8763 = BUFF(\7222) -\8766 = BUFF(\7229) -\8769 = BUFF(\7301) -\8772 = BUFF(\7240) -\8775 = BUFF(\7222) -\8778 = BUFF(\7229) -\8781 = BUFF(\7307) -\8784 = BUFF(\7288) -\8787 = BUFF(\7250) -\8790 = BUFF(\7272) -\8793 = BUFF(\7258) -\8796 = BUFF(\7258) -\8799 = BUFF(\7307) -\8802 = BUFF(\7288) -\8805 = BUFF(\7250) -\8808 = BUFF(\7272) -\8811 = NAND(\8232, \8233) -\8814 = NOT(\7588) -\8815 = NOT(\7591) -\8816 = NOT(\7582) -\8817 = NOT(\7585) -\8818 = AND(\7620, \3155) -\8840 = AND(\3122, \7609) -\8857 = NOT(\7609) -\8861 = AND(\6797, \5740, \8274) -\8862 = AND(\5736, \6800, \8275) -\8863 = AND(\6803, \5751, \8276) -\8864 = AND(\5747, \6806, \8277) -\8865 = AND(\6809, \5762, \8278) -\8866 = AND(\5758, \6812, \8279) -\8871 = NOT(\7655) -\8874 = AND(\6833, \7655) -\8878 = AND(\7671, \6867) -\8879 = NOT(\8196) -\8880 = NAND(\8196, \8315) -\8881 = NOT(\8200) -\8882 = NAND(\8200, \8317) -\8883 = NOT(\8204) -\8884 = NAND(\8204, \8319) -\8885 = NOT(\8208) -\8886 = NAND(\8208, \8321) -\8887 = NAND(\3658, \8323) -\8888 = NAND(\4817, \8325) -\8898 = OR(\4544, \8337, \8338, \8339) -\8902 = OR(\4562, \8348, \8349, \8350, \8351) -\8920 = OR(\4576, \8369, \8370, \8371) -\8924 = OR(\4581, \8377) -\8927 = OR(\4592, \8378, \8379, \8380, \8381) -\8931 = OR(\4603, \8392) -\8943 = OR(\7825, \8404) -\8950 = OR(\4630, \8409, \8410, \8411) -\8956 = OR(\4637, \8415, \8416, \8417, \8418) -\8959 = NOT(\7852) -\8960 = AND(\3375, \7852) -\8963 = OR(\4656, \8433, \8434, \8435) -\8966 = OR(\4674, \8447, \8448, \8449, \8450) -\8991 = AND(\7188, \6083, \8469) -\8992 = AND(\6079, \7191, \8470) -\8995 = OR(\4701, \8488, \8489, \8490) -\8996 = OR(\4706, \8496) -\9001 = OR(\4717, \8500, \8501, \8502, \8503) -\9005 = OR(\4728, \8516) -\9024 = AND(\7334, \6141, \8537) -\9025 = AND(\6137, \7337, \8538) -\9029 = OR(\4756, \8545, \8546, \8547) -\9035 = OR(\4760, \8551, \8552, \8553, \8554) -\9053 = AND(\7378, \6170, \8564) -\9054 = AND(\6166, \7381, \8565) -\9064 = NAND(\4303, \8607) -\9065 = NAND(\3507, \8609) -\9066 = NOT(\8114) -\9067 = NAND(\8114, \4795) -\9068 = OR(\7613, \6783) -\9071 = NOT(\8117) -\9072 = NOT(\8131) -\9073 = NAND(\8131, \6195) -\9074 = NOT(\7613) -\9077 = NOT(\8134) -\9079 = OR(\7650, \6865) -\9082 = NOT(\8146) -\9083 = NOT(\7650) -\9086 = NOT(\8156) -\9087 = NOT(\8166) -\9088 = NAND(\8166, \4813) -\9089 = OR(\7659, \6866) -\9092 = NOT(\8169) -\9093 = NOT(\8183) -\9094 = NAND(\8183, \6203) -\9095 = NOT(\7659) -\9098 = NOT(\8186) -\9099 = OR(\4545, \8340, \8341, \8342) -\9103 = NOR(\4545, \8343, \8344) -\9107 = OR(\4549, \8345, \8346) -\9111 = NOR(\4549, \8347) -\9117 = OR(\4577, \8372, \8373, \8374) -\9127 = NOR(\4577, \8375, \8376) -\9146 = NOR(\4597, \8390, \8391) -\9149 = NOR(\4593, \8385, \8386, \8387) -\9159 = NAND(\7577, \8733) -\9160 = NAND(\7574, \8734) -\9161 = OR(\4657, \8436, \8437, \8438) -\9165 = NOR(\4657, \8439, \8440) -\9169 = OR(\4661, \8441, \8442) -\9173 = NOR(\4661, \8443) -\9179 = NAND(\7563, \8753) -\9180 = NAND(\7560, \8754) -\9181 = NAND(\7569, \8755) -\9182 = NAND(\7566, \8756) -\9183 = OR(\4702, \8491, \8492, \8493) -\9193 = NOR(\4702, \8494, \8495) -\9203 = OR(\4722, \8511, \8512, \8513) -\9206 = OR(\4718, \8504, \8505, \8506, \8507) -\9220 = NOR(\4722, \8514, \8515) -\9223 = NOR(\4718, \8508, \8509, \8510) -\9234 = NAND(\7591, \8814) -\9235 = NAND(\7588, \8815) -\9236 = NAND(\7585, \8816) -\9237 = NAND(\7582, \8817) -\9238 = OR(\3159, \8818) -\9242 = OR(\3126, \8840) -\9243 = NAND(\8324, \8888) -\9244 = NOT(\8580) -\9245 = NOT(\8583) -\9246 = NOT(\8586) -\9247 = NOT(\8589) -\9248 = NOT(\8592) -\9249 = NOT(\8595) -\9250 = NOT(\8598) -\9251 = NOT(\8601) -\9252 = NOT(\8604) -\9256 = NOR(\8861, \8280) -\9257 = NOR(\8862, \8281) -\9258 = NOR(\8863, \8282) -\9259 = NOR(\8864, \8283) -\9260 = NOR(\8865, \8284) -\9261 = NOR(\8866, \8285) -\9262 = NOT(\8627) -\9265 = OR(\7649, \8874) -\9268 = OR(\7668, \8878) -\9271 = NAND(\7533, \8879) -\9272 = NAND(\7536, \8881) -\9273 = NAND(\7539, \8883) -\9274 = NAND(\7542, \8885) -\9275 = NAND(\8322, \8887) -\9276 = NOT(\8333) -\9280 = AND(\6936, \8326, \6946, \6929, \6957) -\9285 = AND(\367, \8326, \6946, \6957, \6936) -\9286 = AND(\367, \8326, \6946, \6957) -\9287 = AND(\367, \8326, \6957) -\9288 = AND(\367, \8326) -\9290 = NOT(\8660) -\9292 = NOT(\8663) -\9294 = NOT(\8666) -\9296 = NOT(\8669) -\9297 = NAND(\8672, \5966) -\9298 = NOT(\8672) -\9299 = NAND(\8675, \6969) -\9300 = NOT(\8675) -\9301 = NOT(\8365) -\9307 = AND(\8358, \7036, \7020, \7006, \6998) -\9314 = AND(\8358, \7020, \7006, \7036) -\9315 = AND(\8358, \7020, \7036) -\9318 = AND(\8358, \7036) -\9319 = NOT(\8687) -\9320 = NOT(\8699) -\9321 = NOT(\8711) -\9322 = NOT(\8714) -\9323 = NOT(\8727) -\9324 = NOT(\8730) -\9326 = NOT(\8405) -\9332 = AND(\8405, \8412) -\9339 = OR(\4193, \8960) -\9344 = AND(\8430, \8444) -\9352 = NOT(\8735) -\9354 = NOT(\8738) -\9356 = NOT(\8741) -\9358 = NOT(\8744) -\9359 = NAND(\8747, \6078) -\9360 = NOT(\8747) -\9361 = NAND(\8750, \7187) -\9362 = NOT(\8750) -\9363 = NOT(\8471) -\9364 = NOT(\8474) -\9365 = NOT(\8477) -\9366 = NOT(\8480) -\9367 = NOR(\8991, \8483) -\9368 = NOR(\8992, \8484) -\9369 = AND(\7198, \7194, \8471) -\9370 = AND(\8460, \8457, \8474) -\9371 = AND(\7209, \7205, \8477) -\9372 = AND(\8466, \8463, \8480) -\9375 = NOT(\8497) -\9381 = NOT(\8766) -\9382 = NOT(\8778) -\9383 = NOT(\8793) -\9384 = NOT(\8796) -\9385 = AND(\8485, \8497) -\9392 = NOT(\8525) -\9393 = NOT(\8528) -\9394 = NOT(\8531) -\9395 = NOT(\8534) -\9396 = AND(\7318, \7314, \8525) -\9397 = AND(\8522, \8519, \8528) -\9398 = AND(\6131, \6127, \8531) -\9399 = AND(\7328, \7325, \8534) -\9400 = NOR(\9024, \8539) -\9401 = NOR(\9025, \8540) -\9402 = NOT(\8541) -\9407 = NAND(\8548, \89) -\9408 = AND(\8541, \8548) -\9412 = NOT(\8811) -\9413 = NOT(\8566) -\9414 = NOT(\8569) -\9415 = NOT(\8572) -\9416 = NOT(\8575) -\9417 = NOR(\9053, \8578) -\9418 = NOR(\9054, \8579) -\9419 = AND(\7387, \6177, \8566) -\9420 = AND(\8555, \7384, \8569) -\9421 = AND(\7398, \7394, \8572) -\9422 = AND(\8561, \8558, \8575) -\9423 = BUFF(\8326) -\9426 = NAND(\9064, \8608) -\9429 = NAND(\9065, \8610) -\9432 = NAND(\3515, \9066) -\9435 = NAND(\4796, \9072) -\9442 = NAND(\3628, \9087) -\9445 = NAND(\4814, \9093) -\9454 = NOT(\8678) -\9455 = NOT(\8681) -\9456 = NOT(\8684) -\9459 = NOT(\8690) -\9460 = NOT(\8693) -\9461 = NOT(\8696) -\9462 = BUFF(\8358) -\9465 = NOT(\8702) -\9466 = NOT(\8705) -\9467 = NOT(\8708) -\9468 = NOT(\8724) -\9473 = BUFF(\8358) -\9476 = NOT(\8718) -\9477 = NOT(\8721) -\9478 = NAND(\9159, \9160) -\9485 = NAND(\9179, \9180) -\9488 = NAND(\9181, \9182) -\9493 = NOT(\8757) -\9494 = NOT(\8760) -\9495 = NOT(\8763) -\9498 = NOT(\8769) -\9499 = NOT(\8772) -\9500 = NOT(\8775) -\9505 = NOT(\8781) -\9506 = NOT(\8784) -\9507 = NOT(\8787) -\9508 = NOT(\8790) -\9509 = NOT(\8808) -\9514 = NOT(\8799) -\9515 = NOT(\8802) -\9516 = NOT(\8805) -\9517 = NAND(\9234, \9235) -\9520 = NAND(\9236, \9237) -\9526 = AND(\8943, \8421) -\9531 = AND(\8943, \8421) -\9539 = NAND(\9271, \8880) -\9540 = NAND(\9273, \8884) -\9541 = NOT(\9275) -\9543 = AND(\8857, \8254) -\9551 = AND(\8871, \8288) -\9555 = NAND(\9272, \8882) -\9556 = NAND(\9274, \8886) -\9557 = NOT(\8898) -\9560 = AND(\8902, \8333) -\9561 = NOT(\9099) -\9562 = NAND(\9099, \9290) -\9563 = NOT(\9103) -\9564 = NAND(\9103, \9292) -\9565 = NOT(\9107) -\9566 = NAND(\9107, \9294) -\9567 = NOT(\9111) -\9568 = NAND(\9111, \9296) -\9569 = NAND(\4844, \9298) -\9570 = NAND(\6207, \9300) -\9571 = NOT(\8920) -\9575 = NOT(\8927) -\9579 = AND(\8365, \8927) -\9581 = NOT(\8950) -\9582 = NOT(\8956) -\9585 = AND(\8405, \8956) -\9591 = AND(\8966, \8430) -\9592 = NOT(\9161) -\9593 = NAND(\9161, \9352) -\9594 = NOT(\9165) -\9595 = NAND(\9165, \9354) -\9596 = NOT(\9169) -\9597 = NAND(\9169, \9356) -\9598 = NOT(\9173) -\9599 = NAND(\9173, \9358) -\9600 = NAND(\4940, \9360) -\9601 = NAND(\6220, \9362) -\9602 = AND(\8457, \7198, \9363) -\9603 = AND(\7194, \8460, \9364) -\9604 = AND(\8463, \7209, \9365) -\9605 = AND(\7205, \8466, \9366) -\9608 = NOT(\9001) -\9611 = AND(\8485, \9001) -\9612 = AND(\8519, \7318, \9392) -\9613 = AND(\7314, \8522, \9393) -\9614 = AND(\7325, \6131, \9394) -\9615 = AND(\6127, \7328, \9395) -\9616 = NOT(\9029) -\9617 = NOT(\9035) -\9618 = AND(\8541, \9035) -\9621 = AND(\7384, \7387, \9413) -\9622 = AND(\6177, \8555, \9414) -\9623 = AND(\8558, \7398, \9415) -\9624 = AND(\7394, \8561, \9416) -\9626 = OR(\4563, \8352, \8353, \8354, \9285) -\9629 = OR(\4566, \8355, \8356, \9286) -\9632 = OR(\4570, \8357, \9287) -\9635 = OR(\5960, \9288) -\9642 = NAND(\9067, \9432) -\9645 = NOT(\9068) -\9646 = NAND(\9073, \9435) -\9649 = NOT(\9074) -\9650 = NAND(\9257, \9256) -\9653 = NAND(\9259, \9258) -\9656 = NAND(\9261, \9260) -\9659 = NOT(\9079) -\9660 = NAND(\9079, \4809) -\9661 = NOT(\9083) -\9662 = NAND(\9083, \6202) -\9663 = NAND(\9088, \9442) -\9666 = NOT(\9089) -\9667 = NAND(\9094, \9445) -\9670 = NOT(\9095) -\9671 = OR(\8924, \8393) -\9674 = NOT(\9117) -\9675 = NOT(\8924) -\9678 = NOT(\9127) -\9679 = OR(\4597, \8388, \8389, \9315) -\9682 = OR(\8931, \9318) -\9685 = OR(\4593, \8382, \8383, \8384, \9314) -\9690 = NOT(\9146) -\9691 = NAND(\9146, \8717) -\9692 = NOT(\8931) -\9695 = NOT(\9149) -\9698 = NAND(\9401, \9400) -\9702 = NAND(\9368, \9367) -\9707 = OR(\8996, \8517) -\9710 = NOT(\9183) -\9711 = NOT(\8996) -\9714 = NOT(\9193) -\9715 = NOT(\9203) -\9716 = NAND(\9203, \6235) -\9717 = OR(\9005, \8518) -\9720 = NOT(\9206) -\9721 = NOT(\9220) -\9722 = NAND(\9220, \7573) -\9723 = NOT(\9005) -\9726 = NOT(\9223) -\9727 = NAND(\9418, \9417) -\9732 = AND(\9268, \8269) -\9733 = NAND(\9581, \9326) -\9734 = AND(\89, \9408, \9332, \8394, \8421) -\9735 = AND(\89, \9408, \9332, \8394, \8421) -\9736 = AND(\9265, \8262) -\9737 = NOT(\9555) -\9738 = NOT(\9556) -\9739 = NAND(\9361, \9601) -\9740 = NAND(\9423, \1115) -\9741 = NOT(\9423) -\9742 = NAND(\9299, \9570) -\9754 = AND(\8333, \9280) -\9758 = OR(\8898, \9560) -\9762 = NAND(\8660, \9561) -\9763 = NAND(\8663, \9563) -\9764 = NAND(\8666, \9565) -\9765 = NAND(\8669, \9567) -\9766 = NAND(\9297, \9569) -\9767 = AND(\9280, \367) -\9768 = NAND(\9557, \9276) -\9769 = NOT(\9307) -\9773 = NAND(\9307, \367) -\9774 = NAND(\9571, \9301) -\9775 = AND(\8365, \9307) -\9779 = OR(\8920, \9579) -\9784 = NOT(\9478) -\9785 = NAND(\9616, \9402) -\9786 = OR(\8950, \9585) -\9790 = AND(\89, \9408, \9332, \8394) -\9791 = OR(\8963, \9591) -\9795 = NAND(\8735, \9592) -\9796 = NAND(\8738, \9594) -\9797 = NAND(\8741, \9596) -\9798 = NAND(\8744, \9598) -\9799 = NAND(\9359, \9600) -\9800 = NOR(\9602, \9369) -\9801 = NOR(\9603, \9370) -\9802 = NOR(\9604, \9371) -\9803 = NOR(\9605, \9372) -\9805 = NOT(\9485) -\9806 = NOT(\9488) -\9809 = OR(\8995, \9611) -\9813 = NOR(\9612, \9396) -\9814 = NOR(\9613, \9397) -\9815 = NOR(\9614, \9398) -\9816 = NOR(\9615, \9399) -\9817 = AND(\9617, \9407) -\9820 = OR(\9029, \9618) -\9825 = NOT(\9517) -\9826 = NOT(\9520) -\9827 = NOR(\9621, \9419) -\9828 = NOR(\9622, \9420) -\9829 = NOR(\9623, \9421) -\9830 = NOR(\9624, \9422) -\9835 = NOT(\9426) -\9836 = NAND(\9426, \4789) -\9837 = NOT(\9429) -\9838 = NAND(\9429, \4794) -\9846 = NAND(\3625, \9659) -\9847 = NAND(\4810, \9661) -\9862 = NOT(\9462) -\9863 = NAND(\7553, \9690) -\9866 = NOT(\9473) -\9873 = NAND(\5030, \9715) -\9876 = NAND(\6236, \9721) -\9890 = NAND(\9795, \9593) -\9891 = NAND(\9797, \9597) -\9892 = NOT(\9799) -\9893 = NAND(\871, \9741) -\9894 = NAND(\9762, \9562) -\9895 = NAND(\9764, \9566) -\9896 = NOT(\9766) -\9897 = NOT(\9626) -\9898 = NAND(\9626, \9249) -\9899 = NOT(\9629) -\9900 = NAND(\9629, \9250) -\9901 = NOT(\9632) -\9902 = NAND(\9632, \9251) -\9903 = NOT(\9635) -\9904 = NAND(\9635, \9252) -\9905 = NOT(\9543) -\9906 = NOT(\9650) -\9907 = NAND(\9650, \5769) -\9908 = NOT(\9653) -\9909 = NAND(\9653, \5770) -\9910 = NOT(\9656) -\9911 = NAND(\9656, \9262) -\9917 = NOT(\9551) -\9923 = NAND(\9763, \9564) -\9924 = NAND(\9765, \9568) -\9925 = OR(\8902, \9767) -\9932 = AND(\9575, \9773) -\9935 = AND(\9575, \9769) -\9938 = NOT(\9698) -\9939 = NAND(\9698, \9323) -\9945 = NAND(\9796, \9595) -\9946 = NAND(\9798, \9599) -\9947 = NOT(\9702) -\9948 = NAND(\9702, \6102) -\9949 = AND(\9608, \9375) -\9953 = NOT(\9727) -\9954 = NAND(\9727, \9412) -\9955 = NAND(\3502, \9835) -\9956 = NAND(\3510, \9837) -\9957 = NOT(\9642) -\9958 = NAND(\9642, \9645) -\9959 = NOT(\9646) -\9960 = NAND(\9646, \9649) -\9961 = NAND(\9660, \9846) -\9964 = NAND(\9662, \9847) -\9967 = NOT(\9663) -\9968 = NAND(\9663, \9666) -\9969 = NOT(\9667) -\9970 = NAND(\9667, \9670) -\9971 = NOT(\9671) -\9972 = NAND(\9671, \6213) -\9973 = NOT(\9675) -\9974 = NAND(\9675, \7551) -\9975 = NOT(\9679) -\9976 = NAND(\9679, \7552) -\9977 = NOT(\9682) -\9978 = NOT(\9685) -\9979 = NAND(\9691, \9863) -\9982 = NOT(\9692) -\9983 = NAND(\9814, \9813) -\9986 = NAND(\9816, \9815) -\9989 = NAND(\9801, \9800) -\9992 = NAND(\9803, \9802) -\9995 = NOT(\9707) -\9996 = NAND(\9707, \6231) -\9997 = NOT(\9711) -\9998 = NAND(\9711, \7572) -\9999 = NAND(\9716, \9873) -\10002 = NOT(\9717) -\10003 = NAND(\9722, \9876) -\10006 = NOT(\9723) -\10007 = NAND(\9830, \9829) -\10010 = NAND(\9828, \9827) -\10013 = AND(\9791, \8307, \8269) -\10014 = AND(\9758, \9344, \8307, \8269) -\10015 = AND(\367, \9754, \9344, \8307, \8269) -\10016 = AND(\9786, \8394, \8421) -\10017 = AND(\9820, \9332, \8394, \8421) -\10018 = AND(\9786, \8394, \8421) -\10019 = AND(\9820, \9332, \8394, \8421) -\10020 = AND(\9809, \8298, \8262) -\10021 = AND(\9779, \9385, \8298, \8262) -\10022 = AND(\367, \9775, \9385, \8298, \8262) -\10023 = NOT(\9945) -\10024 = NOT(\9946) -\10025 = NAND(\9740, \9893) -\10026 = NOT(\9923) -\10028 = NOT(\9924) -\10032 = NAND(\8595, \9897) -\10033 = NAND(\8598, \9899) -\10034 = NAND(\8601, \9901) -\10035 = NAND(\8604, \9903) -\10036 = NAND(\4803, \9906) -\10037 = NAND(\4806, \9908) -\10038 = NAND(\8627, \9910) -\10039 = AND(\9809, \8298) -\10040 = AND(\9779, \9385, \8298) -\10041 = AND(\367, \9775, \9385, \8298) -\10042 = AND(\9779, \9385) -\10043 = AND(\367, \9775, \9385) -\10050 = NAND(\8727, \9938) -\10053 = NOT(\9817) -\10054 = AND(\9817, \9029) -\10055 = AND(\9786, \8394) -\10056 = AND(\9820, \9332, \8394) -\10057 = AND(\9791, \8307) -\10058 = AND(\9758, \9344, \8307) -\10059 = AND(\367, \9754, \9344, \8307) -\10060 = AND(\9758, \9344) -\10061 = AND(\367, \9754, \9344) -\10062 = NAND(\4997, \9947) -\10067 = NAND(\8811, \9953) -\10070 = NAND(\9955, \9836) -\10073 = NAND(\9956, \9838) -\10076 = NAND(\9068, \9957) -\10077 = NAND(\9074, \9959) -\10082 = NAND(\9089, \9967) -\10083 = NAND(\9095, \9969) -\10084 = NAND(\4871, \9971) -\10085 = NAND(\6214, \9973) -\10086 = NAND(\6217, \9975) -\10093 = NAND(\5027, \9995) -\10094 = NAND(\6232, \9997) -\10101 = OR(\9238, \9732, \10013, \10014, \10015) -\10102 = OR(\9339, \9526, \10016, \10017, \9734) -\10103 = OR(\9339, \9531, \10018, \10019, \9735) -\10104 = OR(\9242, \9736, \10020, \10021, \10022) -\10105 = AND(\9925, \9894) -\10106 = AND(\9925, \9895) -\10107 = AND(\9925, \9896) -\10108 = AND(\9925, \8253) -\10109 = NAND(\10032, \9898) -\10110 = NAND(\10033, \9900) -\10111 = NAND(\10034, \9902) -\10112 = NAND(\10035, \9904) -\10113 = NAND(\10036, \9907) -\10114 = NAND(\10037, \9909) -\10115 = NAND(\10038, \9911) -\10116 = OR(\9265, \10039, \10040, \10041) -\10119 = OR(\9809, \10042, \10043) -\10124 = NOT(\9925) -\10130 = AND(\9768, \9925) -\10131 = NOT(\9932) -\10132 = NOT(\9935) -\10133 = AND(\9932, \8920) -\10134 = NAND(\10050, \9939) -\10135 = NOT(\9983) -\10136 = NAND(\9983, \9324) -\10137 = NOT(\9986) -\10138 = NAND(\9986, \9784) -\10139 = AND(\9785, \10053) -\10140 = OR(\8943, \10055, \10056, \9790) -\10141 = OR(\9268, \10057, \10058, \10059) -\10148 = OR(\9791, \10060, \10061) -\10155 = NAND(\10062, \9948) -\10156 = NOT(\9989) -\10157 = NAND(\9989, \9805) -\10158 = NOT(\9992) -\10159 = NAND(\9992, \9806) -\10160 = NOT(\9949) -\10161 = NAND(\10067, \9954) -\10162 = NOT(\10007) -\10163 = NAND(\10007, \9825) -\10164 = NOT(\10010) -\10165 = NAND(\10010, \9826) -\10170 = NAND(\10076, \9958) -\10173 = NAND(\10077, \9960) -\10176 = NOT(\9961) -\10177 = NAND(\9961, \9082) -\10178 = NOT(\9964) -\10179 = NAND(\9964, \9086) -\10180 = NAND(\10082, \9968) -\10183 = NAND(\10083, \9970) -\10186 = NAND(\9972, \10084) -\10189 = NAND(\9974, \10085) -\10192 = NAND(\9976, \10086) -\10195 = NOT(\9979) -\10196 = NAND(\9979, \9982) -\10197 = NAND(\9996, \10093) -\10200 = NAND(\9998, \10094) -\10203 = NOT(\9999) -\10204 = NAND(\9999, \10002) -\10205 = NOT(\10003) -\10206 = NAND(\10003, \10006) -\10212 = NAND(\10070, \4308) -\10213 = NAND(\10073, \4313) -\10230 = AND(\9774, \10131) -\10231 = NAND(\8730, \10135) -\10232 = NAND(\9478, \10137) -\10233 = OR(\10139, \10054) -\10234 = NAND(\7100, \10140) -\10237 = NAND(\9485, \10156) -\10238 = NAND(\9488, \10158) -\10239 = NAND(\9517, \10162) -\10240 = NAND(\9520, \10164) -\10241 = NOT(\10070) -\10242 = NOT(\10073) -\10247 = NAND(\8146, \10176) -\10248 = NAND(\8156, \10178) -\10259 = NAND(\9692, \10195) -\10264 = NAND(\9717, \10203) -\10265 = NAND(\9723, \10205) -\10266 = AND(\10026, \10124) -\10267 = AND(\10028, \10124) -\10268 = AND(\9742, \10124) -\10269 = AND(\6923, \10124) -\10270 = NAND(\6762, \10116) -\10271 = NAND(\3061, \10241) -\10272 = NAND(\3064, \10242) -\10273 = BUFF(\10116) -\10278 = AND(\10141, \5728, \5707, \5718, \5697) -\10279 = AND(\10141, \5728, \5707, \5718) -\10280 = AND(\10141, \5728, \5718) -\10281 = AND(\10141, \5728) -\10282 = AND(\6784, \10141) -\10283 = NOT(\10119) -\10287 = AND(\10148, \5936, \5915, \5926, \5905) -\10288 = AND(\10148, \5936, \5915, \5926) -\10289 = AND(\10148, \5936, \5926) -\10290 = AND(\10148, \5936) -\10291 = AND(\6881, \10148) -\10292 = AND(\8898, \10124) -\10293 = NAND(\10231, \10136) -\10294 = NAND(\10232, \10138) -\10295 = NAND(\8412, \10233) -\10296 = AND(\8959, \10234) -\10299 = NAND(\10237, \10157) -\10300 = NAND(\10238, \10159) -\10301 = OR(\10230, \10133) -\10306 = NAND(\10239, \10163) -\10307 = NAND(\10240, \10165) -\10308 = BUFF(\10148) -\10311 = BUFF(\10141) -\10314 = NOT(\10170) -\10315 = NAND(\10170, \9071) -\10316 = NOT(\10173) -\10317 = NAND(\10173, \9077) -\10318 = NAND(\10247, \10177) -\10321 = NAND(\10248, \10179) -\10324 = NOT(\10180) -\10325 = NAND(\10180, \9092) -\10326 = NOT(\10183) -\10327 = NAND(\10183, \9098) -\10328 = NOT(\10186) -\10329 = NAND(\10186, \9674) -\10330 = NOT(\10189) -\10331 = NAND(\10189, \9678) -\10332 = NOT(\10192) -\10333 = NAND(\10192, \9977) -\10334 = NAND(\10259, \10196) -\10337 = NOT(\10197) -\10338 = NAND(\10197, \9710) -\10339 = NOT(\10200) -\10340 = NAND(\10200, \9714) -\10341 = NAND(\10264, \10204) -\10344 = NAND(\10265, \10206) -\10350 = OR(\10266, \10105) -\10351 = OR(\10267, \10106) -\10352 = OR(\10268, \10107) -\10353 = OR(\10269, \10108) -\10354 = AND(\8857, \10270) -\10357 = NAND(\10271, \10212) -\10360 = NAND(\10272, \10213) -\10367 = OR(\7620, \10282) -\10375 = OR(\7671, \10291) -\10381 = OR(\10292, \10130) -\10388 = AND(\10114, \10134, \10293, \10294) -\10391 = AND(\9582, \10295) -\10399 = AND(\10113, \10115, \10299, \10300) -\10402 = AND(\10155, \10161, \10306, \10307) -\10406 = OR(\3229, \6888, \6889, \6890, \10287) -\10409 = OR(\3232, \6891, \6892, \10288) -\10412 = OR(\3236, \6893, \10289) -\10415 = OR(\3241, \10290) -\10419 = OR(\3137, \6791, \6792, \6793, \10278) -\10422 = OR(\3140, \6794, \6795, \10279) -\10425 = OR(\3144, \6796, \10280) -\10428 = OR(\3149, \10281) -\10431 = NAND(\8117, \10314) -\10432 = NAND(\8134, \10316) -\10437 = NAND(\8169, \10324) -\10438 = NAND(\8186, \10326) -\10439 = NAND(\9117, \10328) -\10440 = NAND(\9127, \10330) -\10441 = NAND(\9682, \10332) -\10444 = NAND(\9183, \10337) -\10445 = NAND(\9193, \10339) -\10450 = NOT(\10296) -\10451 = AND(\10296, \4193) -\10455 = NOT(\10308) -\10456 = NAND(\10308, \8242) -\10465 = NOT(\10311) -\10466 = NAND(\10311, \8247) -\10479 = NOT(\10273) -\10497 = NOT(\10301) -\10509 = NAND(\10431, \10315) -\10512 = NAND(\10432, \10317) -\10515 = NOT(\10318) -\10516 = NAND(\10318, \8632) -\10517 = NOT(\10321) -\10518 = NAND(\10321, \8637) -\10519 = NAND(\10437, \10325) -\10522 = NAND(\10438, \10327) -\10525 = NAND(\10439, \10329) -\10528 = NAND(\10440, \10331) -\10531 = NAND(\10441, \10333) -\10534 = NOT(\10334) -\10535 = NAND(\10334, \9695) -\10536 = NAND(\10444, \10338) -\10539 = NAND(\10445, \10340) -\10542 = NOT(\10341) -\10543 = NAND(\10341, \9720) -\10544 = NOT(\10344) -\10545 = NAND(\10344, \9726) -\10546 = AND(\5631, \10450) -\10547 = NOT(\10391) -\10548 = AND(\10391, \8950) -\10549 = AND(\5165, \10367) -\10550 = NOT(\10354) -\10551 = AND(\10354, \3126) -\10552 = NAND(\7411, \10455) -\10553 = AND(\10375, \9539) -\10554 = AND(\10375, \9540) -\10555 = AND(\10375, \9541) -\10556 = AND(\10375, \6761) -\10557 = NOT(\10406) -\10558 = NAND(\10406, \8243) -\10559 = NOT(\10409) -\10560 = NAND(\10409, \8244) -\10561 = NOT(\10412) -\10562 = NAND(\10412, \8245) -\10563 = NOT(\10415) -\10564 = NAND(\10415, \8246) -\10565 = NAND(\7426, \10465) -\10566 = NOT(\10419) -\10567 = NAND(\10419, \8248) -\10568 = NOT(\10422) -\10569 = NAND(\10422, \8249) -\10570 = NOT(\10425) -\10571 = NAND(\10425, \8250) -\10572 = NOT(\10428) -\10573 = NAND(\10428, \8251) -\10574 = NOT(\10399) -\10575 = NOT(\10402) -\10576 = NOT(\10388) -\10577 = AND(\10399, \10402, \10388) -\10581 = AND(\10360, \9543, \10273) -\10582 = AND(\10357, \9905, \10273) -\10583 = NOT(\10367) -\10587 = AND(\10367, \5735) -\10588 = AND(\10367, \3135) -\10589 = NOT(\10375) -\10594 = AND(\10381, \7180, \7159, \7170, \7149) -\10595 = AND(\10381, \7180, \7159, \7170) -\10596 = AND(\10381, \7180, \7170) -\10597 = AND(\10381, \7180) -\10598 = AND(\8444, \10381) -\10602 = BUFF(\10381) -\10609 = NAND(\7479, \10515) -\10610 = NAND(\7491, \10517) -\10621 = NAND(\9149, \10534) -\10626 = NAND(\9206, \10542) -\10627 = NAND(\9223, \10544) -\10628 = OR(\10546, \10451) -\10629 = AND(\9733, \10547) -\10631 = AND(\5166, \10550) -\10632 = NAND(\10552, \10456) -\10637 = NAND(\7414, \10557) -\10638 = NAND(\7417, \10559) -\10639 = NAND(\7420, \10561) -\10640 = NAND(\7423, \10563) -\10641 = NAND(\10565, \10466) -\10642 = NAND(\7429, \10566) -\10643 = NAND(\7432, \10568) -\10644 = NAND(\7435, \10570) -\10645 = NAND(\7438, \10572) -\10647 = AND(\886, \887, \10577) -\10648 = AND(\10360, \8857, \10479) -\10649 = AND(\10357, \7609, \10479) -\10652 = OR(\8966, \10598) -\10659 = OR(\4675, \8451, \8452, \8453, \10594) -\10662 = OR(\4678, \8454, \8455, \10595) -\10665 = OR(\4682, \8456, \10596) -\10668 = OR(\4687, \10597) -\10671 = NOT(\10509) -\10672 = NAND(\10509, \8615) -\10673 = NOT(\10512) -\10674 = NAND(\10512, \8624) -\10675 = NAND(\10609, \10516) -\10678 = NAND(\10610, \10518) -\10681 = NOT(\10519) -\10682 = NAND(\10519, \8644) -\10683 = NOT(\10522) -\10684 = NAND(\10522, \8653) -\10685 = NOT(\10525) -\10686 = NAND(\10525, \9454) -\10687 = NOT(\10528) -\10688 = NAND(\10528, \9459) -\10689 = NOT(\10531) -\10690 = NAND(\10531, \9978) -\10691 = NAND(\10621, \10535) -\10694 = NOT(\10536) -\10695 = NAND(\10536, \9493) -\10696 = NOT(\10539) -\10697 = NAND(\10539, \9498) -\10698 = NAND(\10626, \10543) -\10701 = NAND(\10627, \10545) -\10704 = OR(\10629, \10548) -\10705 = AND(\3159, \10583) -\10706 = OR(\10631, \10551) -\10707 = AND(\9737, \10589) -\10708 = AND(\9738, \10589) -\10709 = AND(\9243, \10589) -\10710 = AND(\5892, \10589) -\10711 = NAND(\10637, \10558) -\10712 = NAND(\10638, \10560) -\10713 = NAND(\10639, \10562) -\10714 = NAND(\10640, \10564) -\10715 = NAND(\10642, \10567) -\10716 = NAND(\10643, \10569) -\10717 = NAND(\10644, \10571) -\10718 = NAND(\10645, \10573) -\10719 = NOT(\10602) -\10720 = NAND(\10602, \9244) -\10729 = NOT(\10647) -\10730 = AND(\5178, \10583) -\10731 = AND(\2533, \10583) -\10737 = NAND(\7447, \10671) -\10738 = NAND(\7465, \10673) -\10739 = OR(\10648, \10649, \10581, \10582) -\10746 = NAND(\7503, \10681) -\10747 = NAND(\7521, \10683) -\10748 = NAND(\8678, \10685) -\10749 = NAND(\8690, \10687) -\10750 = NAND(\9685, \10689) -\10753 = NAND(\8757, \10694) -\10754 = NAND(\8769, \10696) -\10759 = OR(\10705, \10549) -\10760 = OR(\10707, \10553) -\10761 = OR(\10708, \10554) -\10762 = OR(\10709, \10555) -\10763 = OR(\10710, \10556) -\10764 = NAND(\8580, \10719) -\10765 = AND(\10652, \9890) -\10766 = AND(\10652, \9891) -\10767 = AND(\10652, \9892) -\10768 = AND(\10652, \8252) -\10769 = NOT(\10659) -\10770 = NAND(\10659, \9245) -\10771 = NOT(\10662) -\10772 = NAND(\10662, \9246) -\10773 = NOT(\10665) -\10774 = NAND(\10665, \9247) -\10775 = NOT(\10668) -\10776 = NAND(\10668, \9248) -\10778 = OR(\10730, \10587) -\10781 = OR(\10731, \10588) -\10784 = NOT(\10652) -\10789 = NAND(\10737, \10672) -\10792 = NAND(\10738, \10674) -\10796 = NOT(\10675) -\10797 = NAND(\10675, \8633) -\10798 = NOT(\10678) -\10799 = NAND(\10678, \8638) -\10800 = NAND(\10746, \10682) -\10803 = NAND(\10747, \10684) -\10806 = NAND(\10748, \10686) -\10809 = NAND(\10749, \10688) -\10812 = NAND(\10750, \10690) -\10815 = NOT(\10691) -\10816 = NAND(\10691, \9866) -\10817 = NAND(\10753, \10695) -\10820 = NAND(\10754, \10697) -\10823 = NOT(\10698) -\10824 = NAND(\10698, \9505) -\10825 = NOT(\10701) -\10826 = NAND(\10701, \9514) -\10827 = NAND(\10764, \10720) -\10832 = NAND(\8583, \10769) -\10833 = NAND(\8586, \10771) -\10834 = NAND(\8589, \10773) -\10835 = NAND(\8592, \10775) -\10836 = NOT(\10739) -\10837 = BUFF(\10778) -\10838 = BUFF(\10778) -\10839 = BUFF(\10781) -\10840 = BUFF(\10781) -\10845 = NAND(\7482, \10796) -\10846 = NAND(\7494, \10798) -\10857 = NAND(\9473, \10815) -\10862 = NAND(\8781, \10823) -\10863 = NAND(\8799, \10825) -\10864 = AND(\10023, \10784) -\10865 = AND(\10024, \10784) -\10866 = AND(\9739, \10784) -\10867 = AND(\7136, \10784) -\10868 = NAND(\10832, \10770) -\10869 = NAND(\10833, \10772) -\10870 = NAND(\10834, \10774) -\10871 = NAND(\10835, \10776) -\10872 = NOT(\10789) -\10873 = NAND(\10789, \8616) -\10874 = NOT(\10792) -\10875 = NAND(\10792, \8625) -\10876 = NAND(\10845, \10797) -\10879 = NAND(\10846, \10799) -\10882 = NOT(\10800) -\10883 = NAND(\10800, \8645) -\10884 = NOT(\10803) -\10885 = NAND(\10803, \8654) -\10886 = NOT(\10806) -\10887 = NAND(\10806, \9455) -\10888 = NOT(\10809) -\10889 = NAND(\10809, \9460) -\10890 = NOT(\10812) -\10891 = NAND(\10812, \9862) -\10892 = NAND(\10857, \10816) -\10895 = NOT(\10817) -\10896 = NAND(\10817, \9494) -\10897 = NOT(\10820) -\10898 = NAND(\10820, \9499) -\10899 = NAND(\10862, \10824) -\10902 = NAND(\10863, \10826) -\10905 = OR(\10864, \10765) -\10906 = OR(\10865, \10766) -\10907 = OR(\10866, \10767) -\10908 = OR(\10867, \10768) -\10909 = NAND(\7450, \10872) -\10910 = NAND(\7468, \10874) -\10915 = NAND(\7506, \10882) -\10916 = NAND(\7524, \10884) -\10917 = NAND(\8681, \10886) -\10918 = NAND(\8693, \10888) -\10919 = NAND(\9462, \10890) -\10922 = NAND(\8760, \10895) -\10923 = NAND(\8772, \10897) -\10928 = NAND(\10909, \10873) -\10931 = NAND(\10910, \10875) -\10934 = NOT(\10876) -\10935 = NAND(\10876, \8634) -\10936 = NOT(\10879) -\10937 = NAND(\10879, \8639) -\10938 = NAND(\10915, \10883) -\10941 = NAND(\10916, \10885) -\10944 = NAND(\10917, \10887) -\10947 = NAND(\10918, \10889) -\10950 = NAND(\10919, \10891) -\10953 = NOT(\10892) -\10954 = NAND(\10892, \9476) -\10955 = NAND(\10922, \10896) -\10958 = NAND(\10923, \10898) -\10961 = NOT(\10899) -\10962 = NAND(\10899, \9506) -\10963 = NOT(\10902) -\10964 = NAND(\10902, \9515) -\10969 = NAND(\7485, \10934) -\10970 = NAND(\7497, \10936) -\10981 = NAND(\8718, \10953) -\10986 = NAND(\8784, \10961) -\10987 = NAND(\8802, \10963) -\10988 = NOT(\10928) -\10989 = NAND(\10928, \8617) -\10990 = NOT(\10931) -\10991 = NAND(\10931, \8626) -\10992 = NAND(\10969, \10935) -\10995 = NAND(\10970, \10937) -\10998 = NOT(\10938) -\10999 = NAND(\10938, \8646) -\11000 = NOT(\10941) -\11001 = NAND(\10941, \8655) -\11002 = NOT(\10944) -\11003 = NAND(\10944, \9456) -\11004 = NOT(\10947) -\11005 = NAND(\10947, \9461) -\11006 = NOT(\10950) -\11007 = NAND(\10950, \9465) -\11008 = NAND(\10981, \10954) -\11011 = NOT(\10955) -\11012 = NAND(\10955, \9495) -\11013 = NOT(\10958) -\11014 = NAND(\10958, \9500) -\11015 = NAND(\10986, \10962) -\11018 = NAND(\10987, \10964) -\11023 = NAND(\7453, \10988) -\11024 = NAND(\7471, \10990) -\11027 = NAND(\7509, \10998) -\11028 = NAND(\7527, \11000) -\11029 = NAND(\8684, \11002) -\11030 = NAND(\8696, \11004) -\11031 = NAND(\8702, \11006) -\11034 = NAND(\8763, \11011) -\11035 = NAND(\8775, \11013) -\11040 = NOT(\10992) -\11041 = NAND(\10992, \8294) -\11042 = NOT(\10995) -\11043 = NAND(\10995, \8295) -\11044 = NAND(\11023, \10989) -\11047 = NAND(\11024, \10991) -\11050 = NAND(\11027, \10999) -\11053 = NAND(\11028, \11001) -\11056 = NAND(\11029, \11003) -\11059 = NAND(\11030, \11005) -\11062 = NAND(\11031, \11007) -\11065 = NOT(\11008) -\11066 = NAND(\11008, \9477) -\11067 = NAND(\11034, \11012) -\11070 = NAND(\11035, \11014) -\11073 = NOT(\11015) -\11074 = NAND(\11015, \9507) -\11075 = NOT(\11018) -\11076 = NAND(\11018, \9516) -\11077 = NAND(\7488, \11040) -\11078 = NAND(\7500, \11042) -\11095 = NAND(\8721, \11065) -\11098 = NAND(\8787, \11073) -\11099 = NAND(\8805, \11075) -\11100 = NAND(\11077, \11041) -\11103 = NAND(\11078, \11043) -\11106 = NOT(\11056) -\11107 = NAND(\11056, \9319) -\11108 = NOT(\11059) -\11109 = NAND(\11059, \9320) -\11110 = NOT(\11067) -\11111 = NAND(\11067, \9381) -\11112 = NOT(\11070) -\11113 = NAND(\11070, \9382) -\11114 = NOT(\11044) -\11115 = NAND(\11044, \8618) -\11116 = NOT(\11047) -\11117 = NAND(\11047, \8619) -\11118 = NOT(\11050) -\11119 = NAND(\11050, \8647) -\11120 = NOT(\11053) -\11121 = NAND(\11053, \8648) -\11122 = NOT(\11062) -\11123 = NAND(\11062, \9466) -\11124 = NAND(\11095, \11066) -\11127 = NAND(\11098, \11074) -\11130 = NAND(\11099, \11076) -\11137 = NAND(\8687, \11106) -\11138 = NAND(\8699, \11108) -\11139 = NAND(\8766, \11110) -\11140 = NAND(\8778, \11112) -\11141 = NAND(\7456, \11114) -\11142 = NAND(\7474, \11116) -\11143 = NAND(\7512, \11118) -\11144 = NAND(\7530, \11120) -\11145 = NAND(\8705, \11122) -\11152 = AND(\11103, \8871, \10283) -\11153 = AND(\11100, \7655, \10283) -\11154 = AND(\11103, \9551, \10119) -\11155 = AND(\11100, \9917, \10119) -\11156 = NAND(\11137, \11107) -\11159 = NAND(\11138, \11109) -\11162 = NAND(\11139, \11111) -\11165 = NAND(\11140, \11113) -\11168 = NAND(\11141, \11115) -\11171 = NAND(\11142, \11117) -\11174 = NAND(\11143, \11119) -\11177 = NAND(\11144, \11121) -\11180 = NAND(\11145, \11123) -\11183 = NOT(\11124) -\11184 = NAND(\11124, \9468) -\11185 = NOT(\11127) -\11186 = NAND(\11127, \9508) -\11187 = NOT(\11130) -\11188 = NAND(\11130, \9509) -\11205 = OR(\11152, \11153, \11154, \11155) -\11210 = NAND(\8724, \11183) -\11211 = NAND(\8790, \11185) -\11212 = NAND(\8808, \11187) -\11213 = NOT(\11168) -\11214 = NAND(\11168, \8260) -\11215 = NOT(\11171) -\11216 = NAND(\11171, \8261) -\11217 = NOT(\11174) -\11218 = NAND(\11174, \8296) -\11219 = NOT(\11177) -\11220 = NAND(\11177, \8297) -\11222 = AND(\11159, \9575, \1218) -\11223 = AND(\11156, \8927, \1218) -\11224 = AND(\11159, \9935, \750) -\11225 = AND(\11156, \10132, \750) -\11226 = AND(\11165, \9608, \10497) -\11227 = AND(\11162, \9001, \10497) -\11228 = AND(\11165, \9949, \10301) -\11229 = AND(\11162, \10160, \10301) -\11231 = NOT(\11180) -\11232 = NAND(\11180, \9467) -\11233 = NAND(\11210, \11184) -\11236 = NAND(\11211, \11186) -\11239 = NAND(\11212, \11188) -\11242 = NAND(\7459, \11213) -\11243 = NAND(\7462, \11215) -\11244 = NAND(\7515, \11217) -\11245 = NAND(\7518, \11219) -\11246 = NOT(\11205) -\11250 = NAND(\8708, \11231) -\11252 = OR(\11222, \11223, \11224, \11225) -\11257 = OR(\11226, \11227, \11228, \11229) -\11260 = NAND(\11242, \11214) -\11261 = NAND(\11243, \11216) -\11262 = NAND(\11244, \11218) -\11263 = NAND(\11245, \11220) -\11264 = NOT(\11233) -\11265 = NAND(\11233, \9322) -\11267 = NOT(\11236) -\11268 = NAND(\11236, \9383) -\11269 = NOT(\11239) -\11270 = NAND(\11239, \9384) -\11272 = NAND(\11250, \11232) -\11277 = NOT(\11261) -\11278 = AND(\10273, \11260) -\11279 = NOT(\11263) -\11280 = AND(\10119, \11262) -\11282 = NAND(\8714, \11264) -\11283 = NOT(\11252) -\11284 = NAND(\8793, \11267) -\11285 = NAND(\8796, \11269) -\11286 = NOT(\11257) -\11288 = AND(\11277, \10479) -\11289 = AND(\11279, \10283) -\11290 = NOT(\11272) -\11291 = NAND(\11272, \9321) -\11292 = NAND(\11282, \11265) -\11293 = NAND(\11284, \11268) -\11294 = NAND(\11285, \11270) -\11295 = NAND(\8711, \11290) -\11296 = NOT(\11292) -\11297 = NOT(\11294) -\11298 = AND(\10301, \11293) -\11299 = OR(\11288, \11278) -\11302 = OR(\11289, \11280) -\11307 = NAND(\11295, \11291) -\11308 = AND(\11296, \1218) -\11309 = AND(\11297, \10497) -\11312 = NAND(\11302, \11246) -\11313 = NAND(\11299, \10836) -\11314 = NOT(\11299) -\11315 = NOT(\11302) -\11316 = AND(\750, \11307) -\11317 = OR(\11309, \11298) -\11320 = NAND(\11205, \11315) -\11321 = NAND(\10739, \11314) -\11323 = OR(\11308, \11316) -\11327 = NAND(\11312, \11320) -\11328 = NAND(\11313, \11321) -\11329 = NAND(\11317, \11286) -\11331 = NOT(\11317) -\11333 = NOT(\11327) -\11334 = NOT(\11328) -\11335 = NAND(\11257, \11331) -\11336 = NAND(\11323, \11283) -\11337 = NOT(\11323) -\11338 = NAND(\11329, \11335) -\11339 = NAND(\11252, \11337) -\11340 = NOT(\11338) -\11341 = NAND(\11336, \11339) -\11342 = NOT(\11341) diff --git a/ISCAS85/new/c880.bench b/ISCAS85/new/c880.bench deleted file mode 100644 index 78a52b5..0000000 --- a/ISCAS85/new/c880.bench +++ /dev/null @@ -1,473 +0,0 @@ -# c\880 - -INPUT(\1) -INPUT(\8) -INPUT(\13) -INPUT(\17) -INPUT(\26) -INPUT(\29) -INPUT(\36) -INPUT(\42) -INPUT(\51) -INPUT(\55) -INPUT(\59) -INPUT(\68) -INPUT(\72) -INPUT(\73) -INPUT(\74) -INPUT(\75) -INPUT(\80) -INPUT(\85) -INPUT(\86) -INPUT(\87) -INPUT(\88) -INPUT(\89) -INPUT(\90) -INPUT(\91) -INPUT(\96) -INPUT(\101) -INPUT(\106) -INPUT(\111) -INPUT(\116) -INPUT(\121) -INPUT(\126) -INPUT(\130) -INPUT(\135) -INPUT(\138) -INPUT(\143) -INPUT(\146) -INPUT(\149) -INPUT(\152) -INPUT(\153) -INPUT(\156) -INPUT(\159) -INPUT(\165) -INPUT(\171) -INPUT(\177) -INPUT(\183) -INPUT(\189) -INPUT(\195) -INPUT(\201) -INPUT(\207) -INPUT(\210) -INPUT(\219) -INPUT(\228) -INPUT(\237) -INPUT(\246) -INPUT(\255) -INPUT(\259) -INPUT(\260) -INPUT(\261) -INPUT(\267) -INPUT(\268) - -OUTPUT(\388) -OUTPUT(\389) -OUTPUT(\390) -OUTPUT(\391) -OUTPUT(\418) -OUTPUT(\419) -OUTPUT(\420) -OUTPUT(\421) -OUTPUT(\422) -OUTPUT(\423) -OUTPUT(\446) -OUTPUT(\447) -OUTPUT(\448) -OUTPUT(\449) -OUTPUT(\450) -OUTPUT(\767) -OUTPUT(\768) -OUTPUT(\850) -OUTPUT(\863) -OUTPUT(\864) -OUTPUT(\865) -OUTPUT(\866) -OUTPUT(\874) -OUTPUT(\878) -OUTPUT(\879) -OUTPUT(\880) - -\269 = NAND(\1, \8, \13, \17) -\270 = NAND(\1, \26, \13, \17) -\273 = AND(\29, \36, \42) -\276 = AND(\1, \26, \51) -\279 = NAND(\1, \8, \51, \17) -\280 = NAND(\1, \8, \13, \55) -\284 = NAND(\59, \42, \68, \72) -\285 = NAND(\29, \68) -\286 = NAND(\59, \68, \74) -\287 = AND(\29, \75, \80) -\290 = AND(\29, \75, \42) -\291 = AND(\29, \36, \80) -\292 = AND(\29, \36, \42) -\293 = AND(\59, \75, \80) -\294 = AND(\59, \75, \42) -\295 = AND(\59, \36, \80) -\296 = AND(\59, \36, \42) -\297 = AND(\85, \86) -\298 = OR(\87, \88) -\301 = NAND(\91, \96) -\302 = OR(\91, \96) -\303 = NAND(\101, \106) -\304 = OR(\101, \106) -\305 = NAND(\111, \116) -\306 = OR(\111, \116) -\307 = NAND(\121, \126) -\308 = OR(\121, \126) -\309 = AND(\8, \138) -\310 = NOT(\268) -\316 = AND(\51, \138) -\317 = AND(\17, \138) -\318 = AND(\152, \138) -\319 = NAND(\59, \156) -\322 = NOR(\17, \42) -\323 = AND(\17, \42) -\324 = NAND(\159, \165) -\325 = OR(\159, \165) -\326 = NAND(\171, \177) -\327 = OR(\171, \177) -\328 = NAND(\183, \189) -\329 = OR(\183, \189) -\330 = NAND(\195, \201) -\331 = OR(\195, \201) -\332 = AND(\210, \91) -\333 = AND(\210, \96) -\334 = AND(\210, \101) -\335 = AND(\210, \106) -\336 = AND(\210, \111) -\337 = AND(\255, \259) -\338 = AND(\210, \116) -\339 = AND(\255, \260) -\340 = AND(\210, \121) -\341 = AND(\255, \267) -\342 = NOT(\269) -\343 = NOT(\273) -\344 = OR(\270, \273) -\345 = NOT(\276) -\346 = NOT(\276) -\347 = NOT(\279) -\348 = NOR(\280, \284) -\349 = OR(\280, \285) -\350 = OR(\280, \286) -\351 = NOT(\293) -\352 = NOT(\294) -\353 = NOT(\295) -\354 = NOT(\296) -\355 = NAND(\89, \298) -\356 = AND(\90, \298) -\357 = NAND(\301, \302) -\360 = NAND(\303, \304) -\363 = NAND(\305, \306) -\366 = NAND(\307, \308) -\369 = NOT(\310) -\375 = NOR(\322, \323) -\376 = NAND(\324, \325) -\379 = NAND(\326, \327) -\382 = NAND(\328, \329) -\385 = NAND(\330, \331) -\388 = BUFF(\290) -\389 = BUFF(\291) -\390 = BUFF(\292) -\391 = BUFF(\297) -\392 = OR(\270, \343) -\393 = NOT(\345) -\399 = NOT(\346) -\400 = AND(\348, \73) -\401 = NOT(\349) -\402 = NOT(\350) -\403 = NOT(\355) -\404 = NOT(\357) -\405 = NOT(\360) -\406 = AND(\357, \360) -\407 = NOT(\363) -\408 = NOT(\366) -\409 = AND(\363, \366) -\410 = NAND(\347, \352) -\411 = NOT(\376) -\412 = NOT(\379) -\413 = AND(\376, \379) -\414 = NOT(\382) -\415 = NOT(\385) -\416 = AND(\382, \385) -\417 = AND(\210, \369) -\418 = BUFF(\342) -\419 = BUFF(\344) -\420 = BUFF(\351) -\421 = BUFF(\353) -\422 = BUFF(\354) -\423 = BUFF(\356) -\424 = NOT(\400) -\425 = AND(\404, \405) -\426 = AND(\407, \408) -\427 = AND(\319, \393, \55) -\432 = AND(\393, \17, \287) -\437 = NAND(\393, \287, \55) -\442 = NAND(\375, \59, \156, \393) -\443 = NAND(\393, \319, \17) -\444 = AND(\411, \412) -\445 = AND(\414, \415) -\446 = BUFF(\392) -\447 = BUFF(\399) -\448 = BUFF(\401) -\449 = BUFF(\402) -\450 = BUFF(\403) -\451 = NOT(\424) -\460 = NOR(\406, \425) -\463 = NOR(\409, \426) -\466 = NAND(\442, \410) -\475 = AND(\143, \427) -\476 = AND(\310, \432) -\477 = AND(\146, \427) -\478 = AND(\310, \432) -\479 = AND(\149, \427) -\480 = AND(\310, \432) -\481 = AND(\153, \427) -\482 = AND(\310, \432) -\483 = NAND(\443, \1) -\488 = OR(\369, \437) -\489 = OR(\369, \437) -\490 = OR(\369, \437) -\491 = OR(\369, \437) -\492 = NOR(\413, \444) -\495 = NOR(\416, \445) -\498 = NAND(\130, \460) -\499 = OR(\130, \460) -\500 = NAND(\463, \135) -\501 = OR(\463, \135) -\502 = AND(\91, \466) -\503 = NOR(\475, \476) -\504 = AND(\96, \466) -\505 = NOR(\477, \478) -\506 = AND(\101, \466) -\507 = NOR(\479, \480) -\508 = AND(\106, \466) -\509 = NOR(\481, \482) -\510 = AND(\143, \483) -\511 = AND(\111, \466) -\512 = AND(\146, \483) -\513 = AND(\116, \466) -\514 = AND(\149, \483) -\515 = AND(\121, \466) -\516 = AND(\153, \483) -\517 = AND(\126, \466) -\518 = NAND(\130, \492) -\519 = OR(\130, \492) -\520 = NAND(\495, \207) -\521 = OR(\495, \207) -\522 = AND(\451, \159) -\523 = AND(\451, \165) -\524 = AND(\451, \171) -\525 = AND(\451, \177) -\526 = AND(\451, \183) -\527 = NAND(\451, \189) -\528 = NAND(\451, \195) -\529 = NAND(\451, \201) -\530 = NAND(\498, \499) -\533 = NAND(\500, \501) -\536 = NOR(\309, \502) -\537 = NOR(\316, \504) -\538 = NOR(\317, \506) -\539 = NOR(\318, \508) -\540 = NOR(\510, \511) -\541 = NOR(\512, \513) -\542 = NOR(\514, \515) -\543 = NOR(\516, \517) -\544 = NAND(\518, \519) -\547 = NAND(\520, \521) -\550 = NOT(\530) -\551 = NOT(\533) -\552 = AND(\530, \533) -\553 = NAND(\536, \503) -\557 = NAND(\537, \505) -\561 = NAND(\538, \507) -\565 = NAND(\539, \509) -\569 = NAND(\488, \540) -\573 = NAND(\489, \541) -\577 = NAND(\490, \542) -\581 = NAND(\491, \543) -\585 = NOT(\544) -\586 = NOT(\547) -\587 = AND(\544, \547) -\588 = AND(\550, \551) -\589 = AND(\585, \586) -\590 = NAND(\553, \159) -\593 = OR(\553, \159) -\596 = AND(\246, \553) -\597 = NAND(\557, \165) -\600 = OR(\557, \165) -\605 = AND(\246, \557) -\606 = NAND(\561, \171) -\609 = OR(\561, \171) -\615 = AND(\246, \561) -\616 = NAND(\565, \177) -\619 = OR(\565, \177) -\624 = AND(\246, \565) -\625 = NAND(\569, \183) -\628 = OR(\569, \183) -\631 = AND(\246, \569) -\632 = NAND(\573, \189) -\635 = OR(\573, \189) -\640 = AND(\246, \573) -\641 = NAND(\577, \195) -\644 = OR(\577, \195) -\650 = AND(\246, \577) -\651 = NAND(\581, \201) -\654 = OR(\581, \201) -\659 = AND(\246, \581) -\660 = NOR(\552, \588) -\661 = NOR(\587, \589) -\662 = NOT(\590) -\665 = AND(\593, \590) -\669 = NOR(\596, \522) -\670 = NOT(\597) -\673 = AND(\600, \597) -\677 = NOR(\605, \523) -\678 = NOT(\606) -\682 = AND(\609, \606) -\686 = NOR(\615, \524) -\687 = NOT(\616) -\692 = AND(\619, \616) -\696 = NOR(\624, \525) -\697 = NOT(\625) -\700 = AND(\628, \625) -\704 = NOR(\631, \526) -\705 = NOT(\632) -\708 = AND(\635, \632) -\712 = NOR(\337, \640) -\713 = NOT(\641) -\717 = AND(\644, \641) -\721 = NOR(\339, \650) -\722 = NOT(\651) -\727 = AND(\654, \651) -\731 = NOR(\341, \659) -\732 = NAND(\654, \261) -\733 = NAND(\644, \654, \261) -\734 = NAND(\635, \644, \654, \261) -\735 = NOT(\662) -\736 = AND(\228, \665) -\737 = AND(\237, \662) -\738 = NOT(\670) -\739 = AND(\228, \673) -\740 = AND(\237, \670) -\741 = NOT(\678) -\742 = AND(\228, \682) -\743 = AND(\237, \678) -\744 = NOT(\687) -\745 = AND(\228, \692) -\746 = AND(\237, \687) -\747 = NOT(\697) -\748 = AND(\228, \700) -\749 = AND(\237, \697) -\750 = NOT(\705) -\751 = AND(\228, \708) -\752 = AND(\237, \705) -\753 = NOT(\713) -\754 = AND(\228, \717) -\755 = AND(\237, \713) -\756 = NOT(\722) -\757 = NOR(\727, \261) -\758 = AND(\727, \261) -\759 = AND(\228, \727) -\760 = AND(\237, \722) -\761 = NAND(\644, \722) -\762 = NAND(\635, \713) -\763 = NAND(\635, \644, \722) -\764 = NAND(\609, \687) -\765 = NAND(\600, \678) -\766 = NAND(\600, \609, \687) -\767 = BUFF(\660) -\768 = BUFF(\661) -\769 = NOR(\736, \737) -\770 = NOR(\739, \740) -\771 = NOR(\742, \743) -\772 = NOR(\745, \746) -\773 = NAND(\750, \762, \763, \734) -\777 = NOR(\748, \749) -\778 = NAND(\753, \761, \733) -\781 = NOR(\751, \752) -\782 = NAND(\756, \732) -\785 = NOR(\754, \755) -\786 = NOR(\757, \758) -\787 = NOR(\759, \760) -\788 = NOR(\700, \773) -\789 = AND(\700, \773) -\790 = NOR(\708, \778) -\791 = AND(\708, \778) -\792 = NOR(\717, \782) -\793 = AND(\717, \782) -\794 = AND(\219, \786) -\795 = NAND(\628, \773) -\796 = NAND(\795, \747) -\802 = NOR(\788, \789) -\803 = NOR(\790, \791) -\804 = NOR(\792, \793) -\805 = NOR(\340, \794) -\806 = NOR(\692, \796) -\807 = AND(\692, \796) -\808 = AND(\219, \802) -\809 = AND(\219, \803) -\810 = AND(\219, \804) -\811 = NAND(\805, \787, \731, \529) -\812 = NAND(\619, \796) -\813 = NAND(\609, \619, \796) -\814 = NAND(\600, \609, \619, \796) -\815 = NAND(\738, \765, \766, \814) -\819 = NAND(\741, \764, \813) -\822 = NAND(\744, \812) -\825 = NOR(\806, \807) -\826 = NOR(\335, \808) -\827 = NOR(\336, \809) -\828 = NOR(\338, \810) -\829 = NOT(\811) -\830 = NOR(\665, \815) -\831 = AND(\665, \815) -\832 = NOR(\673, \819) -\833 = AND(\673, \819) -\834 = NOR(\682, \822) -\835 = AND(\682, \822) -\836 = AND(\219, \825) -\837 = NAND(\826, \777, \704) -\838 = NAND(\827, \781, \712, \527) -\839 = NAND(\828, \785, \721, \528) -\840 = NOT(\829) -\841 = NAND(\815, \593) -\842 = NOR(\830, \831) -\843 = NOR(\832, \833) -\844 = NOR(\834, \835) -\845 = NOR(\334, \836) -\846 = NOT(\837) -\847 = NOT(\838) -\848 = NOT(\839) -\849 = AND(\735, \841) -\850 = BUFF(\840) -\851 = AND(\219, \842) -\852 = AND(\219, \843) -\853 = AND(\219, \844) -\854 = NAND(\845, \772, \696) -\855 = NOT(\846) -\856 = NOT(\847) -\857 = NOT(\848) -\858 = NOT(\849) -\859 = NOR(\417, \851) -\860 = NOR(\332, \852) -\861 = NOR(\333, \853) -\862 = NOT(\854) -\863 = BUFF(\855) -\864 = BUFF(\856) -\865 = BUFF(\857) -\866 = BUFF(\858) -\867 = NAND(\859, \769, \669) -\868 = NAND(\860, \770, \677) -\869 = NAND(\861, \771, \686) -\870 = NOT(\862) -\871 = NOT(\867) -\872 = NOT(\868) -\873 = NOT(\869) -\874 = BUFF(\870) -\875 = NOT(\871) -\876 = NOT(\872) -\877 = NOT(\873) -\878 = BUFF(\875) -\879 = BUFF(\876) -\880 = BUFF(\877) diff --git a/ISCAS85/test.v b/ISCAS85/test.v deleted file mode 100644 index bddc9f3..0000000 --- a/ISCAS85/test.v +++ /dev/null @@ -1,604 +0,0 @@ -// Benchmark "c2670" written by ABC on Sun Jan 8 23:46:44 2023 - -module c2670 ( - \1 , \2 , \3 , \4 , \5 , \6 , \7 , \8 , \11 , \14 , \15 , \16 , \19 , - \20 , \21 , \22 , \23 , \24 , \25 , \26 , \27 , \28 , \29 , \32 , \33 , - \34 , \35 , \36 , \37 , \40 , \43 , \44 , \47 , \48 , \49 , \50 , \51 , - \52 , \53 , \54 , \55 , \56 , \57 , \60 , \61 , \62 , \63 , \64 , \65 , - \66 , \67 , \68 , \69 , \72 , \73 , \74 , \75 , \76 , \77 , \78 , \79 , - \80 , \81 , \82 , \85 , \86 , \87 , \88 , \89 , \90 , \91 , \92 , \93 , - \94 , \95 , \96 , \99 , \100 , \101 , \102 , \103 , \104 , \105 , - \106 , \107 , \108 , \111 , \112 , \113 , \114 , \115 , \116 , \117 , - \118 , \119 , \120 , \123 , \124 , \125 , \126 , \127 , \128 , \129 , - \130 , \131 , \132 , \135 , \136 , \137 , \138 , \139 , \140 , \141 , - \142 , \143 , \144 , \145 , \146 , \147 , \148 , \149 , \150 , \151 , - \152 , \153 , \154 , \155 , \156 , \157 , \158 , \159 , \160 , \161 , - \162 , \163 , \164 , \165 , \166 , \167 , \168 , \169 , \170 , \171 , - \172 , \173 , \174 , \175 , \176 , \177 , \178 , \179 , \180 , \181 , - \182 , \183 , \184 , \185 , \186 , \187 , \188 , \189 , \190 , \191 , - \192 , \193 , \194 , \195 , \196 , \197 , \198 , \199 , \200 , \201 , - \202 , \203 , \204 , \205 , \206 , \207 , \208 , \209 , \210 , \211 , - \212 , \213 , \214 , \215 , \216 , \217 , \218 , \219 , \224 , \227 , - \230 , \231 , \234 , \237 , \241 , \246 , \253 , \256 , \259 , \262 , - \263 , \266 , \269 , \272 , \275 , \278 , \281 , \284 , \287 , \290 , - \294 , \297 , \301 , \305 , \309 , \313 , \316 , \319 , \322 , \325 , - \328 , \331 , \334 , \337 , \340 , \343 , \346 , \349 , \352 , \355 , - \398 , \400 , \401 , \419 , \420 , \456 , \457 , \458 , \487 , \488 , - \489 , \490 , \491 , \492 , \493 , \494 , \792 , \799 , \805 , \1026 , - \1028 , \1029 , \1269 , \1277 , \1448 , \1726 , \1816 , \1817 , \1818 , - \1819 , \1820 , \1821 , \1969 , \1970 , \1971 , \2010 , \2012 , \2014 , - \2016 , \2018 , \2020 , \2022 , \2387 , \2388 , \2389 , \2390 , \2496 , - \2643 , \2644 , \2891 , \2925 , \2970 , \2971 , \3038 , \3079 , \3546 , - \3671 , \3803 , \3804 , \3809 , \3851 , \3875 , \3881 , \3882 ); - input \1 , \2 , \3 , \4 , \5 , \6 , \7 , \8 , \11 , \14 , \15 , \16 , - \19 , \20 , \21 , \22 , \23 , \24 , \25 , \26 , \27 , \28 , \29 , \32 , - \33 , \34 , \35 , \36 , \37 , \40 , \43 , \44 , \47 , \48 , \49 , \50 , - \51 , \52 , \53 , \54 , \55 , \56 , \57 , \60 , \61 , \62 , \63 , \64 , - \65 , \66 , \67 , \68 , \69 , \72 , \73 , \74 , \75 , \76 , \77 , \78 , - \79 , \80 , \81 , \82 , \85 , \86 , \87 , \88 , \89 , \90 , \91 , \92 , - \93 , \94 , \95 , \96 , \99 , \100 , \101 , \102 , \103 , \104 , \105 , - \106 , \107 , \108 , \111 , \112 , \113 , \114 , \115 , \116 , \117 , - \118 , \119 , \120 , \123 , \124 , \125 , \126 , \127 , \128 , \129 , - \130 , \131 , \132 , \135 , \136 , \137 , \138 , \139 , \140 , \141 , - \142 , \143 , \144 , \145 , \146 , \147 , \148 , \149 , \150 , \151 , - \152 , \153 , \154 , \155 , \156 , \157 , \158 , \159 , \160 , \161 , - \162 , \163 , \164 , \165 , \166 , \167 , \168 , \169 , \170 , \171 , - \172 , \173 , \174 , \175 , \176 , \177 , \178 , \179 , \180 , \181 , - \182 , \183 , \184 , \185 , \186 , \187 , \188 , \189 , \190 , \191 , - \192 , \193 , \194 , \195 , \196 , \197 , \198 , \199 , \200 , \201 , - \202 , \203 , \204 , \205 , \206 , \207 , \208 , \209 , \210 , \211 , - \212 , \213 , \214 , \215 , \216 , \217 , \218 , \219 , \224 , \227 , - \230 , \231 , \234 , \237 , \241 , \246 , \253 , \256 , \259 , \262 , - \263 , \266 , \269 , \272 , \275 , \278 , \281 , \284 , \287 , \290 , - \294 , \297 , \301 , \305 , \309 , \313 , \316 , \319 , \322 , \325 , - \328 , \331 , \334 , \337 , \340 , \343 , \346 , \349 , \352 , \355 ; - output \398 , \400 , \401 , \419 , \420 , \456 , \457 , \458 , \487 , \488 , - \489 , \490 , \491 , \492 , \493 , \494 , \792 , \799 , \805 , \1026 , - \1028 , \1029 , \1269 , \1277 , \1448 , \1726 , \1816 , \1817 , \1818 , - \1819 , \1820 , \1821 , \1969 , \1970 , \1971 , \2010 , \2012 , \2014 , - \2016 , \2018 , \2020 , \2022 , \2387 , \2388 , \2389 , \2390 , \2496 , - \2643 , \2644 , \2891 , \2925 , \2970 , \2971 , \3038 , \3079 , \3546 , - \3671 , \3803 , \3804 , \3809 , \3851 , \3875 , \3881 , \3882 ; - wire new_n388_, new_n389_, new_n392_, new_n393_, new_n394_, new_n396_, - new_n397_, new_n398_, new_n399_, new_n400_, new_n401_, new_n403_, - new_n404_, new_n405_, new_n406_, new_n407_, new_n409_, new_n410_, - new_n411_, new_n412_, new_n413_, new_n415_, new_n416_, new_n417_, - new_n418_, new_n419_, new_n420_, new_n423_, new_n424_, new_n425_, - new_n426_, new_n429_, new_n430_, new_n431_, new_n432_, new_n435_, - new_n436_, new_n437_, new_n438_, new_n439_, new_n440_, new_n443_, - new_n445_, new_n446_, new_n447_, new_n448_, new_n450_, new_n451_, - new_n452_, new_n453_, new_n455_, new_n456_, new_n457_, new_n458_, - new_n460_, new_n461_, new_n462_, new_n463_, new_n465_, new_n466_, - new_n467_, new_n468_, new_n469_, new_n470_, new_n471_, new_n472_, - new_n474_, new_n475_, new_n477_, new_n478_, new_n479_, new_n481_, - new_n482_, new_n484_, new_n485_, new_n486_, new_n487_, new_n488_, - new_n489_, new_n490_, new_n491_, new_n492_, new_n493_, new_n494_, - new_n495_, new_n496_, new_n497_, new_n499_, new_n500_, new_n501_, - new_n502_, new_n503_, new_n504_, new_n505_, new_n506_, new_n507_, - new_n508_, new_n509_, new_n510_, new_n511_, new_n512_, new_n513_, - new_n514_, new_n515_, new_n517_, new_n518_, new_n519_, new_n520_, - new_n521_, new_n522_, new_n523_, new_n524_, new_n525_, new_n526_, - new_n527_, new_n528_, new_n530_, new_n531_, new_n532_, new_n533_, - new_n534_, new_n535_, new_n536_, new_n537_, new_n538_, new_n539_, - new_n540_, new_n541_, new_n542_, new_n543_, new_n545_, new_n546_, - new_n547_, new_n548_, new_n549_, new_n550_, new_n551_, new_n552_, - new_n553_, new_n554_, new_n555_, new_n556_, new_n557_, new_n558_, - new_n559_, new_n560_, new_n561_, new_n562_, new_n563_, new_n564_, - new_n565_, new_n566_, new_n567_, new_n568_, new_n569_, new_n570_, - new_n571_, new_n572_, new_n573_, new_n574_, new_n575_, new_n576_, - new_n577_, new_n578_, new_n579_, new_n580_, new_n581_, new_n582_, - new_n583_, new_n584_, new_n585_, new_n586_, new_n587_, new_n588_, - new_n589_, new_n590_, new_n591_, new_n592_, new_n593_, new_n594_, - new_n595_, new_n596_, new_n597_, new_n598_, new_n599_, new_n600_, - new_n601_, new_n602_, new_n603_, new_n604_, new_n605_, new_n606_, - new_n607_, new_n608_, new_n609_, new_n610_, new_n611_, new_n612_, - new_n613_, new_n614_, new_n615_, new_n616_, new_n617_, new_n618_, - new_n619_, new_n620_, new_n621_, new_n622_, new_n623_, new_n624_, - new_n625_, new_n626_, new_n627_, new_n628_, new_n629_, new_n630_, - new_n631_, new_n632_, new_n633_, new_n634_, new_n635_, new_n636_, - new_n637_, new_n638_, new_n639_, new_n640_, new_n641_, new_n642_, - new_n643_, new_n644_, new_n645_, new_n646_, new_n647_, new_n648_, - new_n649_, new_n650_, new_n651_, new_n652_, new_n653_, new_n654_, - new_n655_, new_n656_, new_n657_, new_n658_, new_n659_, new_n660_, - new_n661_, new_n662_, new_n663_, new_n664_, new_n665_, new_n666_, - new_n667_, new_n668_, new_n669_, new_n670_, new_n671_, new_n672_, - new_n673_, new_n674_, new_n675_, new_n676_, new_n677_, new_n678_, - new_n679_, new_n682_, new_n683_, new_n684_, new_n685_, new_n686_, - new_n687_, new_n688_, new_n689_, new_n690_, new_n691_, new_n693_, - new_n694_, new_n695_, new_n696_, new_n697_, new_n698_, new_n699_, - new_n700_, new_n701_, new_n702_, new_n703_, new_n704_, new_n705_, - new_n706_, new_n707_, new_n708_, new_n709_, new_n710_, new_n711_, - new_n712_, new_n713_, new_n714_, new_n715_, new_n717_, new_n718_, - new_n719_, new_n720_, new_n721_, new_n722_, new_n723_, new_n724_, - new_n725_, new_n726_, new_n727_, new_n728_, new_n729_, new_n730_, - new_n731_, new_n732_, new_n734_, new_n735_, new_n736_, new_n737_, - new_n738_, new_n739_, new_n740_, new_n741_, new_n742_, new_n743_, - new_n745_, new_n746_, new_n747_, new_n748_, new_n749_, new_n750_, - new_n751_, new_n752_, new_n753_, new_n754_, new_n755_, new_n756_, - new_n757_, new_n758_, new_n759_, new_n760_, new_n761_, new_n762_, - new_n763_, new_n764_, new_n765_, new_n766_, new_n767_, new_n768_, - new_n769_, new_n770_, new_n771_, new_n772_, new_n773_, new_n774_, - new_n775_, new_n776_, new_n777_, new_n778_, new_n779_, new_n780_, - new_n781_, new_n782_, new_n783_, new_n784_, new_n785_, new_n786_, - new_n787_, new_n788_, new_n789_, new_n790_, new_n791_, new_n792_, - new_n793_, new_n794_, new_n795_, new_n796_, new_n797_, new_n798_, - new_n799_, new_n800_, new_n801_, new_n802_, new_n803_, new_n804_, - new_n805_, new_n806_, new_n807_, new_n808_, new_n809_, new_n810_, - new_n811_, new_n812_, new_n813_, new_n814_, new_n815_, new_n816_, - new_n817_, new_n818_, new_n819_, new_n820_, new_n821_, new_n822_, - new_n823_, new_n824_, new_n825_, new_n826_, new_n827_, new_n830_; - NOT g000(.A(\44 ), .Y(\487 )); - NOT g001(.A(\132 ), .Y(\488 )); - NOT g002(.A(\82 ), .Y(\489 )); - NOT g003(.A(\96 ), .Y(\490 )); - NOT g004(.A(\69 ), .Y(\491 )); - NOT g005(.A(\120 ), .Y(\492 )); - NOT g006(.A(\57 ), .Y(\493 )); - NOT g007(.A(\108 ), .Y(\494 )); - NAND4 g008(.A(\309 ), .B(\305 ), .C(\301 ), .D(\297 ), .Y(\792 )); - NAND3 g009(.A(\237 ), .B(\15 ), .C(\2 ), .Y(\799 )); - AND2 g010(.A(\219 ), .B(\94 ), .Y(\1026 )); - NAND2 g011(.A(\237 ), .B(\7 ), .Y(\1028 )); - NAND3 g012(.A(\237 ), .B(\231 ), .C(\7 ), .Y(\1029 )); - NAND3 g013(.A(\325 ), .B(\237 ), .C(\7 ), .Y(\1269 )); - NAND4 g014(.A(\120 ), .B(\108 ), .C(\69 ), .D(\57 ), .Y(new_n388_)); - NAND4 g015(.A(\132 ), .B(\96 ), .C(\82 ), .D(\44 ), .Y(new_n389_)); - NOR2 g016(.A(new_n389_), .B(new_n388_), .Y(\1277 )); - NOT g017(.A(\1277 ), .Y(\1448 )); - NAND2 g018(.A(new_n389_), .B(\325 ), .Y(new_n392_)); - NAND2 g019(.A(new_n388_), .B(\231 ), .Y(new_n393_)); - NAND2 g020(.A(new_n393_), .B(new_n392_), .Y(new_n394_)); - NOT g021(.A(new_n394_), .Y(\1726 )); - NAND3 g022(.A(\322 ), .B(\319 ), .C(\113 ), .Y(new_n396_)); - NOT g023(.A(\319 ), .Y(new_n397_)); - NAND3 g024(.A(\322 ), .B(new_n397_), .C(\125 ), .Y(new_n398_)); - NOT g025(.A(\322 ), .Y(new_n399_)); - NAND3 g026(.A(new_n399_), .B(new_n397_), .C(\137 ), .Y(new_n400_)); - NAND3 g027(.A(new_n399_), .B(\319 ), .C(\101 ), .Y(new_n401_)); - AND4 g028(.A(new_n401_), .B(new_n400_), .C(new_n398_), .D(new_n396_), .Y(\1816 )); - NAND3 g029(.A(\322 ), .B(\319 ), .C(\112 ), .Y(new_n403_)); - NAND3 g030(.A(\322 ), .B(new_n397_), .C(\124 ), .Y(new_n404_)); - NAND3 g031(.A(new_n399_), .B(new_n397_), .C(\136 ), .Y(new_n405_)); - NAND3 g032(.A(new_n399_), .B(\319 ), .C(\100 ), .Y(new_n406_)); - NAND4 g033(.A(new_n406_), .B(new_n405_), .C(new_n404_), .D(new_n403_), .Y(new_n407_)); - NOT g034(.A(new_n407_), .Y(\1817 )); - NAND3 g035(.A(\322 ), .B(\319 ), .C(\114 ), .Y(new_n409_)); - NAND3 g036(.A(\322 ), .B(new_n397_), .C(\126 ), .Y(new_n410_)); - NAND3 g037(.A(new_n399_), .B(new_n397_), .C(\138 ), .Y(new_n411_)); - NAND3 g038(.A(new_n399_), .B(\319 ), .C(\102 ), .Y(new_n412_)); - NAND4 g039(.A(new_n412_), .B(new_n411_), .C(new_n410_), .D(new_n409_), .Y(new_n413_)); - NOT g040(.A(new_n413_), .Y(\1818 )); - NAND3 g041(.A(\234 ), .B(\227 ), .C(\75 ), .Y(new_n415_)); - NOT g042(.A(\227 ), .Y(new_n416_)); - NAND3 g043(.A(\234 ), .B(new_n416_), .C(\62 ), .Y(new_n417_)); - NOT g044(.A(\234 ), .Y(new_n418_)); - NAND3 g045(.A(new_n418_), .B(new_n416_), .C(\88 ), .Y(new_n419_)); - NAND3 g046(.A(new_n418_), .B(\227 ), .C(\50 ), .Y(new_n420_)); - NAND4 g047(.A(new_n420_), .B(new_n419_), .C(new_n417_), .D(new_n415_), .Y(\2016 )); - NOT g048(.A(\2016 ), .Y(\1819 )); - NAND3 g049(.A(\234 ), .B(\227 ), .C(\76 ), .Y(new_n423_)); - NAND3 g050(.A(\234 ), .B(new_n416_), .C(\63 ), .Y(new_n424_)); - NAND3 g051(.A(new_n418_), .B(new_n416_), .C(\89 ), .Y(new_n425_)); - NAND3 g052(.A(new_n418_), .B(\227 ), .C(\51 ), .Y(new_n426_)); - NAND4 g053(.A(new_n426_), .B(new_n425_), .C(new_n424_), .D(new_n423_), .Y(\2014 )); - NOT g054(.A(\2014 ), .Y(\1820 )); - NAND3 g055(.A(\234 ), .B(\227 ), .C(\77 ), .Y(new_n429_)); - NAND3 g056(.A(\234 ), .B(new_n416_), .C(\64 ), .Y(new_n430_)); - NAND3 g057(.A(new_n418_), .B(new_n416_), .C(\90 ), .Y(new_n431_)); - NAND3 g058(.A(new_n418_), .B(\227 ), .C(\52 ), .Y(new_n432_)); - NAND4 g059(.A(new_n432_), .B(new_n431_), .C(new_n430_), .D(new_n429_), .Y(\2012 )); - NOT g060(.A(\2012 ), .Y(\1821 )); - NAND3 g061(.A(\234 ), .B(\227 ), .C(\68 ), .Y(new_n435_)); - NAND3 g062(.A(\234 ), .B(new_n416_), .C(\56 ), .Y(new_n436_)); - NAND3 g063(.A(new_n418_), .B(new_n416_), .C(\81 ), .Y(new_n437_)); - NAND3 g064(.A(new_n418_), .B(\227 ), .C(\43 ), .Y(new_n438_)); - NAND4 g065(.A(new_n438_), .B(new_n437_), .C(new_n436_), .D(new_n435_), .Y(new_n439_)); - NOT g066(.A(new_n439_), .Y(new_n440_)); - NAND2 g067(.A(new_n440_), .B(\241 ), .Y(\1969 )); - NAND4 g068(.A(\1726 ), .B(\237 ), .C(\224 ), .D(\36 ), .Y(\1970 )); - NAND2 g069(.A(\3 ), .B(\1 ), .Y(new_n443_)); - NAND4 g070(.A(new_n443_), .B(\1726 ), .C(\237 ), .D(\224 ), .Y(\1971 )); - NAND3 g071(.A(\234 ), .B(\227 ), .C(\78 ), .Y(new_n445_)); - NAND3 g072(.A(\234 ), .B(new_n416_), .C(\65 ), .Y(new_n446_)); - NAND3 g073(.A(new_n418_), .B(new_n416_), .C(\91 ), .Y(new_n447_)); - NAND3 g074(.A(new_n418_), .B(\227 ), .C(\53 ), .Y(new_n448_)); - NAND4 g075(.A(new_n448_), .B(new_n447_), .C(new_n446_), .D(new_n445_), .Y(\2010 )); - NAND3 g076(.A(\234 ), .B(\227 ), .C(\74 ), .Y(new_n450_)); - OR2 g077(.A(new_n418_), .B(\227 ), .Y(new_n451_)); - NAND3 g078(.A(new_n418_), .B(new_n416_), .C(\87 ), .Y(new_n452_)); - NAND3 g079(.A(new_n418_), .B(\227 ), .C(\49 ), .Y(new_n453_)); - NAND4 g080(.A(new_n453_), .B(new_n452_), .C(new_n451_), .D(new_n450_), .Y(\2018 )); - NAND3 g081(.A(\234 ), .B(\227 ), .C(\73 ), .Y(new_n455_)); - NAND3 g082(.A(\234 ), .B(new_n416_), .C(\61 ), .Y(new_n456_)); - NAND3 g083(.A(new_n418_), .B(new_n416_), .C(\86 ), .Y(new_n457_)); - NAND3 g084(.A(new_n418_), .B(\227 ), .C(\48 ), .Y(new_n458_)); - NAND4 g085(.A(new_n458_), .B(new_n457_), .C(new_n456_), .D(new_n455_), .Y(\2020 )); - NAND3 g086(.A(\234 ), .B(\227 ), .C(\72 ), .Y(new_n460_)); - NAND3 g087(.A(\234 ), .B(new_n416_), .C(\60 ), .Y(new_n461_)); - NAND3 g088(.A(new_n418_), .B(new_n416_), .C(\85 ), .Y(new_n462_)); - NAND3 g089(.A(new_n418_), .B(\227 ), .C(\47 ), .Y(new_n463_)); - NAND4 g090(.A(new_n463_), .B(new_n462_), .C(new_n461_), .D(new_n460_), .Y(\2022 )); - NOT g091(.A(\246 ), .Y(new_n465_)); - NAND3 g092(.A(\234 ), .B(\227 ), .C(\79 ), .Y(new_n466_)); - NAND3 g093(.A(\234 ), .B(new_n416_), .C(\66 ), .Y(new_n467_)); - NAND3 g094(.A(new_n418_), .B(new_n416_), .C(\92 ), .Y(new_n468_)); - NAND3 g095(.A(new_n418_), .B(\227 ), .C(\54 ), .Y(new_n469_)); - NAND4 g096(.A(new_n469_), .B(new_n468_), .C(new_n467_), .D(new_n466_), .Y(new_n470_)); - NAND2 g097(.A(new_n470_), .B(new_n465_), .Y(new_n471_)); - NAND2 g098(.A(\2012 ), .B(\246 ), .Y(new_n472_)); - NAND2 g099(.A(new_n472_), .B(new_n471_), .Y(\2387 )); - NAND2 g100(.A(\2010 ), .B(new_n465_), .Y(new_n474_)); - NAND2 g101(.A(\2014 ), .B(\246 ), .Y(new_n475_)); - NAND2 g102(.A(new_n475_), .B(new_n474_), .Y(\2389 )); - NOR2 g103(.A(new_n470_), .B(\230 ), .Y(new_n477_)); - OR2 g104(.A(new_n477_), .B(\241 ), .Y(new_n478_)); - NAND2 g105(.A(new_n470_), .B(\241 ), .Y(new_n479_)); - NAND2 g106(.A(new_n479_), .B(new_n478_), .Y(\2496 )); - NAND2 g107(.A(new_n439_), .B(new_n465_), .Y(new_n481_)); - OR2 g108(.A(new_n477_), .B(new_n465_), .Y(new_n482_)); - NAND2 g109(.A(new_n482_), .B(new_n481_), .Y(\2643 )); - NAND3 g110(.A(\322 ), .B(\319 ), .C(\111 ), .Y(new_n484_)); - NAND3 g111(.A(\322 ), .B(new_n397_), .C(\123 ), .Y(new_n485_)); - NAND3 g112(.A(new_n399_), .B(new_n397_), .C(\135 ), .Y(new_n486_)); - NAND3 g113(.A(new_n399_), .B(\319 ), .C(\99 ), .Y(new_n487_)); - NAND4 g114(.A(new_n487_), .B(new_n486_), .C(new_n485_), .D(new_n484_), .Y(new_n488_)); - NAND2 g115(.A(new_n488_), .B(\313 ), .Y(new_n489_)); - OR2 g116(.A(new_n488_), .B(\313 ), .Y(new_n490_)); - NAND2 g117(.A(\322 ), .B(\319 ), .Y(new_n491_)); - OR2 g118(.A(new_n399_), .B(\319 ), .Y(new_n492_)); - OR2 g119(.A(\322 ), .B(\319 ), .Y(new_n493_)); - OR2 g120(.A(\322 ), .B(new_n397_), .Y(new_n494_)); - NAND4 g121(.A(new_n494_), .B(new_n493_), .C(new_n492_), .D(new_n491_), .Y(new_n495_)); - OR2 g122(.A(new_n495_), .B(\316 ), .Y(new_n496_)); - NAND2 g123(.A(new_n495_), .B(\316 ), .Y(new_n497_)); - NAND4 g124(.A(new_n497_), .B(new_n496_), .C(new_n490_), .D(new_n489_), .Y(\2891 )); - XOR2 g125(.A(\349 ), .B(\346 ), .Y(new_n499_)); - XNOR2 g126(.A(\259 ), .B(\256 ), .Y(new_n500_)); - XOR2 g127(.A(new_n500_), .B(new_n499_), .Y(new_n501_)); - XNOR2 g128(.A(\337 ), .B(\334 ), .Y(new_n502_)); - XNOR2 g129(.A(\343 ), .B(\340 ), .Y(new_n503_)); - XNOR2 g130(.A(\331 ), .B(\328 ), .Y(new_n504_)); - NOT g131(.A(new_n504_), .Y(new_n505_)); - NAND3 g132(.A(new_n505_), .B(new_n503_), .C(new_n502_), .Y(new_n506_)); - NOT g133(.A(new_n503_), .Y(new_n507_)); - NAND3 g134(.A(new_n504_), .B(new_n507_), .C(new_n502_), .Y(new_n508_)); - NOT g135(.A(new_n502_), .Y(new_n509_)); - NAND3 g136(.A(new_n504_), .B(new_n503_), .C(new_n509_), .Y(new_n510_)); - NAND3 g137(.A(new_n505_), .B(new_n507_), .C(new_n509_), .Y(new_n511_)); - NAND4 g138(.A(new_n511_), .B(new_n510_), .C(new_n508_), .D(new_n506_), .Y(new_n512_)); - NAND2 g139(.A(new_n512_), .B(new_n501_), .Y(new_n513_)); - OR2 g140(.A(new_n512_), .B(new_n501_), .Y(new_n514_)); - NAND3 g141(.A(new_n514_), .B(new_n513_), .C(\14 ), .Y(new_n515_)); - NOT g142(.A(new_n515_), .Y(\2925 )); - XNOR2 g143(.A(\316 ), .B(\313 ), .Y(new_n517_)); - XNOR2 g144(.A(\301 ), .B(\297 ), .Y(new_n518_)); - XNOR2 g145(.A(\309 ), .B(\305 ), .Y(new_n519_)); - XNOR2 g146(.A(\355 ), .B(\294 ), .Y(new_n520_)); - NOT g147(.A(new_n520_), .Y(new_n521_)); - NAND3 g148(.A(new_n521_), .B(new_n519_), .C(new_n518_), .Y(new_n522_)); - NOT g149(.A(new_n519_), .Y(new_n523_)); - NAND3 g150(.A(new_n520_), .B(new_n523_), .C(new_n518_), .Y(new_n524_)); - NOT g151(.A(new_n518_), .Y(new_n525_)); - NAND3 g152(.A(new_n520_), .B(new_n519_), .C(new_n525_), .Y(new_n526_)); - NAND3 g153(.A(new_n521_), .B(new_n523_), .C(new_n525_), .Y(new_n527_)); - NAND4 g154(.A(new_n527_), .B(new_n526_), .C(new_n524_), .D(new_n522_), .Y(new_n528_)); - XOR2 g155(.A(new_n528_), .B(new_n517_), .Y(\2970 )); - XOR2 g156(.A(\281 ), .B(\278 ), .Y(new_n530_)); - XNOR2 g157(.A(\287 ), .B(\284 ), .Y(new_n531_)); - XOR2 g158(.A(new_n531_), .B(new_n530_), .Y(new_n532_)); - XNOR2 g159(.A(\269 ), .B(\266 ), .Y(new_n533_)); - XNOR2 g160(.A(\275 ), .B(\272 ), .Y(new_n534_)); - XNOR2 g161(.A(\352 ), .B(\263 ), .Y(new_n535_)); - NOT g162(.A(new_n535_), .Y(new_n536_)); - NAND3 g163(.A(new_n536_), .B(new_n534_), .C(new_n533_), .Y(new_n537_)); - NOT g164(.A(new_n534_), .Y(new_n538_)); - NAND3 g165(.A(new_n535_), .B(new_n538_), .C(new_n533_), .Y(new_n539_)); - NOT g166(.A(new_n533_), .Y(new_n540_)); - NAND3 g167(.A(new_n535_), .B(new_n534_), .C(new_n540_), .Y(new_n541_)); - NAND3 g168(.A(new_n536_), .B(new_n538_), .C(new_n540_), .Y(new_n542_)); - NAND4 g169(.A(new_n542_), .B(new_n541_), .C(new_n539_), .D(new_n537_), .Y(new_n543_)); - XOR2 g170(.A(new_n543_), .B(new_n532_), .Y(\2971 )); - NOT g171(.A(\27 ), .Y(new_n545_)); - OR2 g172(.A(\29 ), .B(new_n545_), .Y(new_n546_)); - NAND2 g173(.A(new_n413_), .B(\29 ), .Y(new_n547_)); - NAND2 g174(.A(new_n547_), .B(new_n546_), .Y(new_n548_)); - OR2 g175(.A(new_n548_), .B(\301 ), .Y(new_n549_)); - NOT g176(.A(\34 ), .Y(new_n550_)); - OR2 g177(.A(new_n550_), .B(\29 ), .Y(new_n551_)); - NAND4 g178(.A(new_n401_), .B(new_n400_), .C(new_n398_), .D(new_n396_), .Y(new_n552_)); - NAND2 g179(.A(new_n552_), .B(\29 ), .Y(new_n553_)); - NAND2 g180(.A(new_n553_), .B(new_n551_), .Y(new_n554_)); - OR2 g181(.A(new_n554_), .B(\305 ), .Y(new_n555_)); - NAND2 g182(.A(new_n548_), .B(\301 ), .Y(new_n556_)); - NOT g183(.A(\26 ), .Y(new_n557_)); - OR2 g184(.A(\29 ), .B(new_n557_), .Y(new_n558_)); - NAND3 g185(.A(\322 ), .B(\319 ), .C(\116 ), .Y(new_n559_)); - NAND3 g186(.A(\322 ), .B(new_n397_), .C(\128 ), .Y(new_n560_)); - NAND3 g187(.A(new_n399_), .B(new_n397_), .C(\140 ), .Y(new_n561_)); - NAND3 g188(.A(new_n399_), .B(\319 ), .C(\104 ), .Y(new_n562_)); - NAND4 g189(.A(new_n562_), .B(new_n561_), .C(new_n560_), .D(new_n559_), .Y(new_n563_)); - NAND2 g190(.A(new_n563_), .B(\29 ), .Y(new_n564_)); - NAND2 g191(.A(new_n564_), .B(new_n558_), .Y(new_n565_)); - OR2 g192(.A(new_n565_), .B(\294 ), .Y(new_n566_)); - NOT g193(.A(\33 ), .Y(new_n567_)); - OR2 g194(.A(new_n567_), .B(\29 ), .Y(new_n568_)); - NAND3 g195(.A(\322 ), .B(\319 ), .C(\115 ), .Y(new_n569_)); - NAND3 g196(.A(\322 ), .B(new_n397_), .C(\127 ), .Y(new_n570_)); - NAND3 g197(.A(new_n399_), .B(new_n397_), .C(\139 ), .Y(new_n571_)); - NAND3 g198(.A(new_n399_), .B(\319 ), .C(\103 ), .Y(new_n572_)); - NAND4 g199(.A(new_n572_), .B(new_n571_), .C(new_n570_), .D(new_n569_), .Y(new_n573_)); - NAND2 g200(.A(new_n573_), .B(\29 ), .Y(new_n574_)); - NAND2 g201(.A(new_n574_), .B(new_n568_), .Y(new_n575_)); - NAND2 g202(.A(new_n575_), .B(\297 ), .Y(new_n576_)); - OR2 g203(.A(new_n575_), .B(\297 ), .Y(new_n577_)); - NAND2 g204(.A(new_n554_), .B(\305 ), .Y(new_n578_)); - NAND4 g205(.A(new_n578_), .B(new_n577_), .C(new_n576_), .D(new_n566_), .Y(new_n579_)); - NOT g206(.A(\35 ), .Y(new_n580_)); - OR2 g207(.A(new_n580_), .B(\29 ), .Y(new_n581_)); - NAND2 g208(.A(new_n407_), .B(\29 ), .Y(new_n582_)); - NAND2 g209(.A(new_n582_), .B(new_n581_), .Y(new_n583_)); - OR2 g210(.A(new_n583_), .B(\309 ), .Y(new_n584_)); - NOT g211(.A(\32 ), .Y(new_n585_)); - OR2 g212(.A(new_n585_), .B(\29 ), .Y(new_n586_)); - NAND3 g213(.A(\322 ), .B(\319 ), .C(\117 ), .Y(new_n587_)); - NAND3 g214(.A(\322 ), .B(new_n397_), .C(\129 ), .Y(new_n588_)); - NAND3 g215(.A(new_n399_), .B(new_n397_), .C(\141 ), .Y(new_n589_)); - NAND3 g216(.A(new_n399_), .B(\319 ), .C(\105 ), .Y(new_n590_)); - NAND4 g217(.A(new_n590_), .B(new_n589_), .C(new_n588_), .D(new_n587_), .Y(new_n591_)); - NAND2 g218(.A(new_n591_), .B(\29 ), .Y(new_n592_)); - NAND2 g219(.A(new_n592_), .B(new_n586_), .Y(new_n593_)); - NAND2 g220(.A(new_n593_), .B(\287 ), .Y(new_n594_)); - OR2 g221(.A(new_n593_), .B(\287 ), .Y(new_n595_)); - NAND2 g222(.A(new_n565_), .B(\294 ), .Y(new_n596_)); - NAND4 g223(.A(new_n596_), .B(new_n595_), .C(new_n594_), .D(new_n584_), .Y(new_n597_)); - NOR2 g224(.A(new_n597_), .B(new_n579_), .Y(new_n598_)); - NAND4 g225(.A(new_n598_), .B(new_n556_), .C(new_n555_), .D(new_n549_), .Y(new_n599_)); - NOT g226(.A(\22 ), .Y(new_n600_)); - OR2 g227(.A(new_n600_), .B(\16 ), .Y(new_n601_)); - NAND2 g228(.A(\2016 ), .B(\16 ), .Y(new_n602_)); - NAND2 g229(.A(new_n602_), .B(new_n601_), .Y(new_n603_)); - NAND2 g230(.A(new_n603_), .B(\272 ), .Y(new_n604_)); - NAND2 g231(.A(new_n465_), .B(\11 ), .Y(new_n605_)); - NAND2 g232(.A(\246 ), .B(\11 ), .Y(new_n606_)); - NAND2 g233(.A(new_n606_), .B(new_n605_), .Y(new_n607_)); - NOT g234(.A(\28 ), .Y(new_n608_)); - OR2 g235(.A(\29 ), .B(new_n608_), .Y(new_n609_)); - NAND2 g236(.A(new_n488_), .B(\29 ), .Y(new_n610_)); - NAND2 g237(.A(new_n610_), .B(new_n609_), .Y(new_n611_)); - NAND3 g238(.A(new_n611_), .B(new_n607_), .C(new_n604_), .Y(new_n612_)); - OR2 g239(.A(new_n603_), .B(\272 ), .Y(new_n613_)); - NOT g240(.A(\23 ), .Y(new_n614_)); - OR2 g241(.A(new_n614_), .B(\16 ), .Y(new_n615_)); - NAND2 g242(.A(\2018 ), .B(\16 ), .Y(new_n616_)); - NAND2 g243(.A(new_n616_), .B(new_n615_), .Y(new_n617_)); - NAND2 g244(.A(new_n617_), .B(\275 ), .Y(new_n618_)); - OR2 g245(.A(new_n617_), .B(\275 ), .Y(new_n619_)); - NOT g246(.A(\6 ), .Y(new_n620_)); - OR2 g247(.A(\16 ), .B(new_n620_), .Y(new_n621_)); - NAND2 g248(.A(\2020 ), .B(\16 ), .Y(new_n622_)); - NAND2 g249(.A(new_n622_), .B(new_n621_), .Y(new_n623_)); - NAND2 g250(.A(new_n623_), .B(\278 ), .Y(new_n624_)); - NAND4 g251(.A(new_n624_), .B(new_n619_), .C(new_n618_), .D(new_n613_), .Y(new_n625_)); - NOT g252(.A(\24 ), .Y(new_n626_)); - OR2 g253(.A(new_n626_), .B(\16 ), .Y(new_n627_)); - NAND2 g254(.A(\2022 ), .B(\16 ), .Y(new_n628_)); - NAND2 g255(.A(new_n628_), .B(new_n627_), .Y(new_n629_)); - OR2 g256(.A(new_n629_), .B(\281 ), .Y(new_n630_)); - NOT g257(.A(\19 ), .Y(new_n631_)); - OR2 g258(.A(new_n631_), .B(\16 ), .Y(new_n632_)); - NAND2 g259(.A(new_n439_), .B(\16 ), .Y(new_n633_)); - NAND2 g260(.A(new_n633_), .B(new_n632_), .Y(new_n634_)); - NAND2 g261(.A(new_n634_), .B(\256 ), .Y(new_n635_)); - OR2 g262(.A(new_n634_), .B(\256 ), .Y(new_n636_)); - NOT g263(.A(\4 ), .Y(new_n637_)); - OR2 g264(.A(\16 ), .B(new_n637_), .Y(new_n638_)); - NAND2 g265(.A(new_n470_), .B(\16 ), .Y(new_n639_)); - NAND2 g266(.A(new_n639_), .B(new_n638_), .Y(new_n640_)); - NAND2 g267(.A(new_n640_), .B(\259 ), .Y(new_n641_)); - NAND4 g268(.A(new_n641_), .B(new_n636_), .C(new_n635_), .D(new_n630_), .Y(new_n642_)); - OR2 g269(.A(new_n623_), .B(\278 ), .Y(new_n643_)); - NOT g270(.A(\25 ), .Y(new_n644_)); - OR2 g271(.A(\29 ), .B(new_n644_), .Y(new_n645_)); - NAND3 g272(.A(\322 ), .B(\319 ), .C(\107 ), .Y(new_n646_)); - NAND3 g273(.A(\322 ), .B(new_n397_), .C(\119 ), .Y(new_n647_)); - NAND3 g274(.A(new_n399_), .B(new_n397_), .C(\131 ), .Y(new_n648_)); - NAND3 g275(.A(new_n399_), .B(\319 ), .C(\95 ), .Y(new_n649_)); - NAND4 g276(.A(new_n649_), .B(new_n648_), .C(new_n647_), .D(new_n646_), .Y(new_n650_)); - NAND2 g277(.A(new_n650_), .B(\29 ), .Y(new_n651_)); - NAND2 g278(.A(new_n651_), .B(new_n645_), .Y(new_n652_)); - NAND2 g279(.A(new_n652_), .B(\284 ), .Y(new_n653_)); - OR2 g280(.A(new_n652_), .B(\284 ), .Y(new_n654_)); - NAND2 g281(.A(new_n629_), .B(\281 ), .Y(new_n655_)); - NAND4 g282(.A(new_n655_), .B(new_n654_), .C(new_n653_), .D(new_n643_), .Y(new_n656_)); - NOT g283(.A(\21 ), .Y(new_n657_)); - OR2 g284(.A(new_n657_), .B(\16 ), .Y(new_n658_)); - NAND2 g285(.A(\2014 ), .B(\16 ), .Y(new_n659_)); - NAND2 g286(.A(new_n659_), .B(new_n658_), .Y(new_n660_)); - OR2 g287(.A(new_n660_), .B(\269 ), .Y(new_n661_)); - NOT g288(.A(\5 ), .Y(new_n662_)); - OR2 g289(.A(\16 ), .B(new_n662_), .Y(new_n663_)); - NAND2 g290(.A(\2012 ), .B(\16 ), .Y(new_n664_)); - NAND2 g291(.A(new_n664_), .B(new_n663_), .Y(new_n665_)); - NAND2 g292(.A(new_n665_), .B(\266 ), .Y(new_n666_)); - OR2 g293(.A(new_n665_), .B(\266 ), .Y(new_n667_)); - NAND2 g294(.A(new_n583_), .B(\309 ), .Y(new_n668_)); - NAND4 g295(.A(new_n668_), .B(new_n667_), .C(new_n666_), .D(new_n661_), .Y(new_n669_)); - OR2 g296(.A(new_n640_), .B(\259 ), .Y(new_n670_)); - NOT g297(.A(\20 ), .Y(new_n671_)); - OR2 g298(.A(new_n671_), .B(\16 ), .Y(new_n672_)); - NAND2 g299(.A(\2010 ), .B(\16 ), .Y(new_n673_)); - NAND2 g300(.A(new_n673_), .B(new_n672_), .Y(new_n674_)); - NAND2 g301(.A(new_n674_), .B(\263 ), .Y(new_n675_)); - OR2 g302(.A(new_n674_), .B(\263 ), .Y(new_n676_)); - NAND2 g303(.A(new_n660_), .B(\269 ), .Y(new_n677_)); - NAND4 g304(.A(new_n677_), .B(new_n676_), .C(new_n675_), .D(new_n670_), .Y(new_n678_)); - OR4 g305(.A(new_n678_), .B(new_n669_), .C(new_n656_), .D(new_n642_), .Y(new_n679_)); - NOR4 g306(.A(new_n679_), .B(new_n625_), .C(new_n612_), .D(new_n599_), .Y(\3038 )); - NOT g307(.A(\3038 ), .Y(\3079 )); - XNOR2 g308(.A(new_n470_), .B(new_n439_), .Y(new_n682_)); - XOR2 g309(.A(new_n682_), .B(new_n477_), .Y(new_n683_)); - NAND3 g310(.A(\234 ), .B(\227 ), .C(\80 ), .Y(new_n684_)); - NAND3 g311(.A(\234 ), .B(new_n416_), .C(\67 ), .Y(new_n685_)); - NAND3 g312(.A(new_n418_), .B(new_n416_), .C(\93 ), .Y(new_n686_)); - NAND3 g313(.A(new_n418_), .B(\227 ), .C(\55 ), .Y(new_n687_)); - NAND4 g314(.A(new_n687_), .B(new_n686_), .C(new_n685_), .D(new_n684_), .Y(new_n688_)); - XOR2 g315(.A(new_n688_), .B(new_n683_), .Y(new_n689_)); - OR2 g316(.A(new_n689_), .B(\241 ), .Y(new_n690_)); - NAND2 g317(.A(new_n688_), .B(\241 ), .Y(new_n691_)); - NAND2 g318(.A(new_n691_), .B(new_n690_), .Y(\3546 )); - NOT g319(.A(\37 ), .Y(new_n693_)); - XOR2 g320(.A(new_n407_), .B(new_n552_), .Y(new_n694_)); - XNOR2 g321(.A(new_n495_), .B(new_n488_), .Y(new_n695_)); - XOR2 g322(.A(new_n695_), .B(new_n694_), .Y(new_n696_)); - XNOR2 g323(.A(new_n591_), .B(new_n563_), .Y(new_n697_)); - XNOR2 g324(.A(new_n573_), .B(new_n413_), .Y(new_n698_)); - NAND3 g325(.A(\322 ), .B(\319 ), .C(\118 ), .Y(new_n699_)); - NAND3 g326(.A(\322 ), .B(new_n397_), .C(\130 ), .Y(new_n700_)); - NAND3 g327(.A(new_n399_), .B(new_n397_), .C(\142 ), .Y(new_n701_)); - NAND3 g328(.A(new_n399_), .B(\319 ), .C(\106 ), .Y(new_n702_)); - NAND4 g329(.A(new_n702_), .B(new_n701_), .C(new_n700_), .D(new_n699_), .Y(new_n703_)); - XNOR2 g330(.A(new_n703_), .B(new_n650_), .Y(new_n704_)); - NOT g331(.A(new_n704_), .Y(new_n705_)); - NAND3 g332(.A(new_n705_), .B(new_n698_), .C(new_n697_), .Y(new_n706_)); - NOT g333(.A(new_n698_), .Y(new_n707_)); - NAND3 g334(.A(new_n704_), .B(new_n707_), .C(new_n697_), .Y(new_n708_)); - NOT g335(.A(new_n697_), .Y(new_n709_)); - NAND3 g336(.A(new_n704_), .B(new_n698_), .C(new_n709_), .Y(new_n710_)); - NAND3 g337(.A(new_n705_), .B(new_n707_), .C(new_n709_), .Y(new_n711_)); - NAND4 g338(.A(new_n711_), .B(new_n710_), .C(new_n708_), .D(new_n706_), .Y(new_n712_)); - NAND2 g339(.A(new_n712_), .B(new_n696_), .Y(new_n713_)); - OR2 g340(.A(new_n712_), .B(new_n696_), .Y(new_n714_)); - NAND3 g341(.A(new_n714_), .B(new_n713_), .C(new_n693_), .Y(new_n715_)); - NOT g342(.A(new_n715_), .Y(\3671 )); - NAND2 g343(.A(new_n688_), .B(new_n465_), .Y(new_n717_)); - XOR2 g344(.A(\2018 ), .B(\2016 ), .Y(new_n718_)); - XNOR2 g345(.A(\2022 ), .B(\2020 ), .Y(new_n719_)); - XOR2 g346(.A(new_n719_), .B(new_n718_), .Y(new_n720_)); - NOT g347(.A(new_n477_), .Y(new_n721_)); - XNOR2 g348(.A(new_n688_), .B(new_n439_), .Y(new_n722_)); - XNOR2 g349(.A(new_n470_), .B(\2010 ), .Y(new_n723_)); - NAND3 g350(.A(new_n723_), .B(new_n722_), .C(new_n721_), .Y(new_n724_)); - NOT g351(.A(new_n723_), .Y(new_n725_)); - NAND3 g352(.A(new_n725_), .B(new_n722_), .C(new_n477_), .Y(new_n726_)); - NOT g353(.A(new_n722_), .Y(new_n727_)); - NAND3 g354(.A(new_n723_), .B(new_n727_), .C(new_n477_), .Y(new_n728_)); - NAND3 g355(.A(new_n725_), .B(new_n727_), .C(new_n721_), .Y(new_n729_)); - NAND4 g356(.A(new_n729_), .B(new_n728_), .C(new_n726_), .D(new_n724_), .Y(new_n730_)); - XOR2 g357(.A(new_n730_), .B(new_n720_), .Y(new_n731_)); - OR2 g358(.A(new_n731_), .B(new_n465_), .Y(new_n732_)); - NAND2 g359(.A(new_n732_), .B(new_n717_), .Y(\3803 )); - XNOR2 g360(.A(\2012 ), .B(\2014 ), .Y(new_n734_)); - NAND3 g361(.A(new_n734_), .B(new_n723_), .C(new_n727_), .Y(new_n735_)); - NOT g362(.A(new_n734_), .Y(new_n736_)); - NAND3 g363(.A(new_n736_), .B(new_n723_), .C(new_n722_), .Y(new_n737_)); - NAND3 g364(.A(new_n734_), .B(new_n725_), .C(new_n722_), .Y(new_n738_)); - NAND3 g365(.A(new_n736_), .B(new_n725_), .C(new_n727_), .Y(new_n739_)); - NAND4 g366(.A(new_n739_), .B(new_n738_), .C(new_n737_), .D(new_n735_), .Y(new_n740_)); - NAND2 g367(.A(new_n740_), .B(new_n720_), .Y(new_n741_)); - OR2 g368(.A(new_n740_), .B(new_n720_), .Y(new_n742_)); - NAND3 g369(.A(new_n742_), .B(new_n741_), .C(new_n693_), .Y(new_n743_)); - NOT g370(.A(new_n743_), .Y(\3809 )); - NOT g371(.A(\40 ), .Y(new_n745_)); - NOT g372(.A(\262 ), .Y(new_n746_)); - NAND2 g373(.A(new_n413_), .B(new_n746_), .Y(new_n747_)); - NOR3 g374(.A(new_n747_), .B(new_n552_), .C(new_n745_), .Y(new_n748_)); - NOR2 g375(.A(new_n552_), .B(new_n745_), .Y(new_n749_)); - NAND2 g376(.A(new_n749_), .B(new_n747_), .Y(new_n750_)); - NOR3 g377(.A(new_n750_), .B(new_n748_), .C(\294 ), .Y(new_n751_)); - NAND3 g378(.A(new_n749_), .B(new_n747_), .C(new_n563_), .Y(new_n752_)); - XOR2 g379(.A(new_n752_), .B(new_n751_), .Y(new_n753_)); - NOR3 g380(.A(new_n750_), .B(new_n748_), .C(\287 ), .Y(new_n754_)); - NAND3 g381(.A(new_n749_), .B(new_n747_), .C(new_n591_), .Y(new_n755_)); - XOR2 g382(.A(new_n755_), .B(new_n754_), .Y(new_n756_)); - NOR3 g383(.A(new_n750_), .B(new_n748_), .C(\284 ), .Y(new_n757_)); - NAND3 g384(.A(new_n749_), .B(new_n747_), .C(new_n650_), .Y(new_n758_)); - NAND4 g385(.A(new_n758_), .B(new_n757_), .C(new_n756_), .D(new_n753_), .Y(new_n759_)); - NOR4 g386(.A(new_n750_), .B(new_n748_), .C(\2022 ), .D(\281 ), .Y(new_n760_)); - XOR2 g387(.A(new_n758_), .B(new_n757_), .Y(new_n761_)); - NAND4 g388(.A(new_n761_), .B(new_n760_), .C(new_n756_), .D(new_n753_), .Y(new_n762_)); - NAND2 g389(.A(new_n752_), .B(new_n751_), .Y(new_n763_)); - NAND3 g390(.A(new_n755_), .B(new_n754_), .C(new_n753_), .Y(new_n764_)); - AND4 g391(.A(new_n764_), .B(new_n763_), .C(new_n762_), .D(new_n759_), .Y(new_n765_)); - NAND4 g392(.A(new_n413_), .B(\1816 ), .C(new_n746_), .D(\40 ), .Y(new_n766_)); - OR2 g393(.A(new_n766_), .B(\294 ), .Y(new_n767_)); - NOT g394(.A(\259 ), .Y(new_n768_)); - NAND2 g395(.A(new_n766_), .B(new_n768_), .Y(new_n769_)); - NAND2 g396(.A(new_n769_), .B(new_n767_), .Y(new_n770_)); - XNOR2 g397(.A(new_n770_), .B(new_n470_), .Y(new_n771_)); - OR2 g398(.A(new_n766_), .B(\297 ), .Y(new_n772_)); - NOT g399(.A(\263 ), .Y(new_n773_)); - NAND2 g400(.A(new_n766_), .B(new_n773_), .Y(new_n774_)); - AND2 g401(.A(new_n774_), .B(new_n772_), .Y(new_n775_)); - XOR2 g402(.A(new_n775_), .B(\2010 ), .Y(new_n776_)); - OR2 g403(.A(new_n766_), .B(\287 ), .Y(new_n777_)); - OR2 g404(.A(new_n748_), .B(\256 ), .Y(new_n778_)); - NAND2 g405(.A(new_n778_), .B(new_n777_), .Y(new_n779_)); - NAND4 g406(.A(new_n779_), .B(new_n776_), .C(new_n771_), .D(new_n440_), .Y(new_n780_)); - OR2 g407(.A(new_n775_), .B(\2010 ), .Y(new_n781_)); - NOT g408(.A(new_n470_), .Y(new_n782_)); - NAND3 g409(.A(new_n776_), .B(new_n770_), .C(new_n782_), .Y(new_n783_)); - NAND3 g410(.A(new_n783_), .B(new_n781_), .C(new_n780_), .Y(new_n784_)); - NOT g411(.A(\8 ), .Y(new_n785_)); - NOR2 g412(.A(new_n766_), .B(\305 ), .Y(new_n786_)); - NOR2 g413(.A(new_n748_), .B(\269 ), .Y(new_n787_)); - NOR2 g414(.A(new_n787_), .B(new_n786_), .Y(new_n788_)); - NOR2 g415(.A(new_n788_), .B(new_n785_), .Y(new_n789_)); - NAND2 g416(.A(\2014 ), .B(\8 ), .Y(new_n790_)); - XOR2 g417(.A(new_n790_), .B(new_n789_), .Y(new_n791_)); - NOR2 g418(.A(new_n766_), .B(\309 ), .Y(new_n792_)); - NOR2 g419(.A(new_n748_), .B(\272 ), .Y(new_n793_)); - NOR2 g420(.A(new_n793_), .B(new_n792_), .Y(new_n794_)); - NOR2 g421(.A(new_n794_), .B(new_n785_), .Y(new_n795_)); - NAND2 g422(.A(\2016 ), .B(\8 ), .Y(new_n796_)); - XOR2 g423(.A(new_n796_), .B(new_n795_), .Y(new_n797_)); - NOR3 g424(.A(new_n748_), .B(\275 ), .C(new_n785_), .Y(new_n798_)); - NAND3 g425(.A(new_n766_), .B(\2018 ), .C(\8 ), .Y(new_n799_)); - XNOR2 g426(.A(new_n799_), .B(new_n798_), .Y(new_n800_)); - NOT g427(.A(\278 ), .Y(new_n801_)); - NAND3 g428(.A(new_n766_), .B(new_n801_), .C(\8 ), .Y(new_n802_)); - NAND3 g429(.A(new_n766_), .B(\2020 ), .C(\8 ), .Y(new_n803_)); - XOR2 g430(.A(new_n803_), .B(new_n802_), .Y(new_n804_)); - NOR2 g431(.A(new_n804_), .B(new_n800_), .Y(new_n805_)); - NOR2 g432(.A(new_n766_), .B(\301 ), .Y(new_n806_)); - NOR2 g433(.A(new_n748_), .B(\266 ), .Y(new_n807_)); - NOR2 g434(.A(new_n807_), .B(new_n806_), .Y(new_n808_)); - XOR2 g435(.A(new_n808_), .B(\2012 ), .Y(new_n809_)); - AND2 g436(.A(new_n809_), .B(new_n805_), .Y(new_n810_)); - NAND4 g437(.A(new_n810_), .B(new_n797_), .C(new_n791_), .D(new_n784_), .Y(new_n811_)); - NOT g438(.A(new_n804_), .Y(new_n812_)); - NOR3 g439(.A(new_n808_), .B(new_n800_), .C(\2012 ), .Y(new_n813_)); - NAND4 g440(.A(new_n813_), .B(new_n812_), .C(new_n797_), .D(new_n791_), .Y(new_n814_)); - NAND4 g441(.A(new_n805_), .B(new_n797_), .C(new_n790_), .D(new_n789_), .Y(new_n815_)); - NAND3 g442(.A(new_n805_), .B(new_n796_), .C(new_n795_), .Y(new_n816_)); - NAND4 g443(.A(new_n803_), .B(new_n766_), .C(new_n801_), .D(\8 ), .Y(new_n817_)); - NAND3 g444(.A(new_n812_), .B(new_n799_), .C(new_n798_), .Y(new_n818_)); - AND3 g445(.A(new_n818_), .B(new_n817_), .C(new_n816_), .Y(new_n819_)); - NAND4 g446(.A(new_n819_), .B(new_n815_), .C(new_n814_), .D(new_n811_), .Y(new_n820_)); - OR2 g447(.A(new_n820_), .B(new_n765_), .Y(new_n821_)); - NAND3 g448(.A(new_n749_), .B(new_n747_), .C(\2022 ), .Y(new_n822_)); - OR3 g449(.A(new_n750_), .B(new_n748_), .C(\281 ), .Y(new_n823_)); - XNOR2 g450(.A(new_n823_), .B(new_n822_), .Y(new_n824_)); - NAND4 g451(.A(new_n824_), .B(new_n761_), .C(new_n756_), .D(new_n753_), .Y(new_n825_)); - NAND2 g452(.A(new_n825_), .B(new_n765_), .Y(new_n826_)); - NAND2 g453(.A(new_n826_), .B(new_n820_), .Y(new_n827_)); - NAND2 g454(.A(new_n827_), .B(new_n821_), .Y(\3851 )); - NOR3 g455(.A(\2971 ), .B(\2970 ), .C(new_n394_), .Y(new_n830_)); - NAND4 g456(.A(new_n830_), .B(new_n743_), .C(new_n715_), .D(new_n515_), .Y(\3882 )); - NOT g457(.A(\3882 ), .Y(\3881 )); - assign \3875 = 1'b0; - BUF g458(.A(\219 ), .Y(\398 )); - BUF g459(.A(\219 ), .Y(\400 )); - BUF g460(.A(\219 ), .Y(\401 )); - BUF g461(.A(\253 ), .Y(\419 )); - BUF g462(.A(\253 ), .Y(\420 )); - BUF g463(.A(\290 ), .Y(\456 )); - BUF g464(.A(\290 ), .Y(\457 )); - BUF g465(.A(\290 ), .Y(\458 )); - BUF g466(.A(\219 ), .Y(\805 )); - NAND2 g467(.A(new_n472_), .B(new_n471_), .Y(\2388 )); - NAND2 g468(.A(new_n475_), .B(new_n474_), .Y(\2390 )); - NAND2 g469(.A(new_n482_), .B(new_n481_), .Y(\2644 )); - NAND2 g470(.A(new_n732_), .B(new_n717_), .Y(\3804 )); -endmodule - - diff --git a/ITC99BENCH/b01.bench b/ITC99BENCH/b01.bench deleted file mode 100644 index f60c0a5..0000000 --- a/ITC99BENCH/b01.bench +++ /dev/null @@ -1,59 +0,0 @@ -# generated by verilog2bench.py https://gitea.yuhangq.com/YuhangQ/any2bench - -INPUT(NET_1) -INPUT(NET_2) -INPUT(NET_3) -INPUT(NET_4) -INPUT(NET_5) -INPUT(NET_6) -INPUT(NET_7) - -OUTPUT(NET_112) -OUTPUT(NET_41) -OUTPUT(NET_42) -OUTPUT(NET_45) -OUTPUT(NET_46) -OUTPUT(NET_8) -OUTPUT(NET_9) - -new_n15_ = NOT ( NET_3 ) -NET_112 = AND ( NET_5, NET_4, new_n15_ ) -new_n17_ = NAND ( NET_2, NET_1 ) -new_n18_ = OR ( NET_2, NET_1 ) -new_n19_ = AND ( new_n18_, new_n17_ ) -new_n20_ = NOT ( NET_1 ) -new_n21_ = NOT ( NET_2 ) -new_n22_ = NOR ( new_n21_, new_n20_ ) -new_n23_ = NOR ( new_n22_, NET_4 ) -new_n24_ = NAND ( new_n23_, new_n19_, NET_3 ) -new_n25_ = NAND ( new_n23_, NET_5, NET_3 ) -new_n26_ = NAND ( NET_4, NET_3 ) -new_n27_ = NAND ( new_n26_, new_n22_ ) -new_n28_ = NOT ( NET_4 ) -new_n29_ = NOR ( NET_5, new_n28_ ) -new_n30_ = NAND ( new_n29_, new_n15_ ) -NET_41 = NAND ( new_n30_, new_n27_, new_n25_, new_n24_ ) -new_n32_ = NAND ( new_n18_, new_n17_ ) -new_n33_ = NAND ( new_n32_, new_n28_, NET_3 ) -new_n34_ = NOR ( new_n29_, new_n15_ ) -new_n35_ = OR ( new_n34_, new_n32_ ) -new_n36_ = NAND ( new_n32_, NET_5, NET_3 ) -NET_42 = NAND ( new_n36_, new_n35_, new_n33_ ) -new_n38_ = NAND ( new_n19_, NET_5, NET_3 ) -new_n39_ = NAND ( new_n29_, new_n22_ ) -new_n40_ = AND ( new_n39_, new_n38_ ) -new_n41_ = OR ( new_n33_, new_n22_ ) -new_n42_ = NAND ( new_n17_, NET_5, new_n28_ ) -new_n43_ = NAND ( new_n22_, NET_5, NET_3 ) -new_n44_ = AND ( new_n43_, new_n42_, new_n30_ ) -NET_45 = NAND ( new_n44_, new_n41_, new_n40_ ) -new_n46_ = NOT ( NET_5 ) -new_n47_ = NOR ( new_n46_, NET_4 ) -new_n48_ = NOR ( new_n47_, NET_3 ) -new_n49_ = OR ( new_n48_, new_n17_ ) -new_n50_ = NAND ( new_n17_, new_n46_, new_n28_, new_n15_ ) -new_n51_ = NAND ( new_n17_, NET_112 ) -new_n52_ = AND ( new_n51_, new_n50_ ) -NET_46 = NAND ( new_n52_, new_n49_, new_n40_, new_n24_ ) -NET_8 = BUF ( NET_6 ) -NET_9 = BUF ( NET_7 ) diff --git a/ITC99BENCH/b02.bench b/ITC99BENCH/b02.bench deleted file mode 100644 index c56796d..0000000 --- a/ITC99BENCH/b02.bench +++ /dev/null @@ -1,35 +0,0 @@ -# generated by verilog2bench.py https://gitea.yuhangq.com/YuhangQ/any2bench -INPUT(NET_1) -INPUT(NET_2) -INPUT(NET_3) -INPUT(NET_4) -INPUT(NET_5) -OUTPUT(NET_12) -OUTPUT(NET_23) -OUTPUT(NET_27) -OUTPUT(NET_28) -OUTPUT(NET_6) -new_n11_ = NOT ( NET_3 ) -new_n12_ = NOT ( NET_4 ) -NET_12 = AND ( new_n12_, new_n11_, NET_2 ) -new_n14_ = NOR ( new_n11_, NET_2 ) -new_n15_ = NAND ( new_n14_, new_n12_ ) -new_n16_ = NOR ( NET_3, NET_1 ) -new_n17_ = NOR ( new_n16_, NET_2 ) -new_n18_ = OR ( new_n17_, new_n12_ ) -NET_23 = NAND ( new_n18_, new_n15_ ) -new_n20_ = NOR ( new_n11_, NET_1 ) -new_n21_ = OR ( new_n20_, NET_4 ) -new_n22_ = NAND ( new_n21_, NET_2 ) -new_n23_ = NOT ( NET_1 ) -new_n24_ = NOR ( new_n14_, NET_4 ) -new_n25_ = OR ( new_n24_, new_n23_ ) -new_n26_ = NAND ( NET_4, NET_3 ) -NET_27 = NAND ( new_n26_, new_n25_, new_n22_ ) -new_n28_ = NOR ( NET_4, NET_2, NET_1 ) -new_n29_ = NOR ( NET_2, new_n23_ ) -new_n30_ = NOR ( new_n29_, new_n12_ ) -new_n31_ = NOR ( new_n30_, NET_3 ) -NET_28 = OR ( new_n31_, new_n28_ ) -NET_6 = BUF ( NET_5 ) -NET_2313123 = DFF ( NET_5 ) \ No newline at end of file diff --git a/ITC99BENCH/b03.bench b/ITC99BENCH/b03.bench deleted file mode 100644 index 0555cd8..0000000 --- a/ITC99BENCH/b03.bench +++ /dev/null @@ -1,187 +0,0 @@ -# generated by verilog2bench.py https://gitea.yuhangq.com/YuhangQ/any2bench -INPUT(NET_1) -INPUT(NET_10) -INPUT(NET_11) -INPUT(NET_12) -INPUT(NET_13) -INPUT(NET_14) -INPUT(NET_15) -INPUT(NET_16) -INPUT(NET_17) -INPUT(NET_18) -INPUT(NET_19) -INPUT(NET_2) -INPUT(NET_20) -INPUT(NET_21) -INPUT(NET_22) -INPUT(NET_23) -INPUT(NET_24) -INPUT(NET_25) -INPUT(NET_26) -INPUT(NET_27) -INPUT(NET_28) -INPUT(NET_29) -INPUT(NET_3) -INPUT(NET_30) -INPUT(NET_31) -INPUT(NET_32) -INPUT(NET_33) -INPUT(NET_34) -INPUT(NET_4) -INPUT(NET_5) -INPUT(NET_6) -INPUT(NET_7) -INPUT(NET_8) -INPUT(NET_9) -OUTPUT(NET_100) -OUTPUT(NET_139) -OUTPUT(NET_140) -OUTPUT(NET_141) -OUTPUT(NET_142) -OUTPUT(NET_143) -OUTPUT(NET_144) -OUTPUT(NET_145) -OUTPUT(NET_146) -OUTPUT(NET_147) -OUTPUT(NET_148) -OUTPUT(NET_149) -OUTPUT(NET_150) -OUTPUT(NET_325) -OUTPUT(NET_35) -OUTPUT(NET_36) -OUTPUT(NET_37) -OUTPUT(NET_38) -OUTPUT(NET_57) -OUTPUT(NET_76) -OUTPUT(NET_77) -OUTPUT(NET_78) -OUTPUT(NET_79) -OUTPUT(NET_80) -OUTPUT(NET_81) -OUTPUT(NET_82) -OUTPUT(NET_83) -OUTPUT(NET_84) -OUTPUT(NET_85) -OUTPUT(NET_86) -OUTPUT(NET_87) -OUTPUT(NET_97) -OUTPUT(NET_98) -OUTPUT(NET_99) -new_n69_ = NOT ( NET_33 ) -new_n70_ = NOR ( NET_31, NET_30, NET_27, NET_26 ) -new_n71_ = OR ( new_n70_, new_n69_ ) -new_n72_ = NOT ( new_n71_ ) -new_n73_ = NAND ( new_n72_, NET_7, NET_6, NET_5 ) -new_n74_ = NAND ( new_n71_, NET_20 ) -NET_100 = NAND ( new_n74_, new_n73_ ) -new_n76_ = NOT ( NET_28 ) -new_n77_ = NOT ( NET_25 ) -new_n78_ = OR ( NET_32, new_n77_ ) -new_n79_ = OR ( new_n78_, NET_27 ) -new_n80_ = NOT ( NET_32 ) -new_n81_ = NOT ( NET_31 ) -new_n82_ = NAND ( new_n81_, NET_29, new_n77_ ) -new_n83_ = NAND ( new_n82_, new_n80_ ) -new_n84_ = NAND ( NET_32, NET_30 ) -new_n85_ = NAND ( new_n84_, new_n83_ ) -new_n86_ = NAND ( new_n85_, new_n79_ ) -new_n87_ = NAND ( new_n86_, NET_34, new_n76_ ) -new_n88_ = NAND ( NET_34, NET_28 ) -new_n89_ = OR ( new_n88_, NET_26 ) -new_n90_ = NAND ( new_n89_, new_n87_, new_n71_ ) -new_n91_ = NAND ( new_n90_, NET_8, NET_33 ) -new_n92_ = NOT ( NET_5 ) -new_n93_ = OR ( new_n90_, new_n92_ ) -new_n94_ = NOR ( NET_32, NET_25 ) -new_n95_ = OR ( new_n94_, NET_28 ) -new_n96_ = NAND ( new_n95_, new_n90_, new_n69_ ) -NET_139 = NAND ( new_n96_, new_n93_, new_n91_ ) -new_n98_ = NAND ( new_n90_, NET_9, NET_33 ) -new_n99_ = NOT ( NET_6 ) -new_n100_ = OR ( new_n90_, new_n99_ ) -new_n101_ = NAND ( new_n90_, new_n78_, new_n69_, new_n76_ ) -NET_140 = NAND ( new_n101_, new_n100_, new_n98_ ) -new_n103_ = NAND ( new_n90_, NET_33, NET_10 ) -new_n104_ = NOT ( NET_7 ) -new_n105_ = OR ( new_n90_, new_n104_ ) -new_n106_ = NAND ( new_n90_, new_n69_, new_n80_, new_n76_ ) -NET_141 = NAND ( new_n106_, new_n105_, new_n103_ ) -new_n108_ = NAND ( new_n90_, NET_5, new_n69_ ) -new_n109_ = NAND ( new_n89_, new_n87_, new_n71_, NET_8 ) -new_n110_ = NAND ( new_n90_, NET_33, NET_11 ) -NET_142 = NAND ( new_n110_, new_n109_, new_n108_ ) -new_n112_ = NAND ( new_n90_, NET_6, new_n69_ ) -new_n113_ = NAND ( new_n89_, new_n87_, new_n71_, NET_9 ) -new_n114_ = NAND ( new_n90_, NET_33, NET_12 ) -NET_143 = NAND ( new_n114_, new_n113_, new_n112_ ) -new_n116_ = NAND ( new_n90_, NET_7, new_n69_ ) -new_n117_ = NAND ( new_n89_, new_n87_, new_n71_, NET_10 ) -new_n118_ = NAND ( new_n90_, NET_33, NET_13 ) -NET_144 = NAND ( new_n118_, new_n117_, new_n116_ ) -new_n120_ = NAND ( new_n90_, NET_8, new_n69_ ) -new_n121_ = NAND ( new_n89_, new_n87_, new_n71_, NET_11 ) -new_n122_ = NAND ( new_n90_, NET_33, NET_14 ) -NET_145 = NAND ( new_n122_, new_n121_, new_n120_ ) -new_n124_ = NAND ( new_n90_, NET_9, new_n69_ ) -new_n125_ = NAND ( new_n89_, new_n87_, new_n71_, NET_12 ) -new_n126_ = NAND ( new_n90_, NET_33, NET_15 ) -NET_146 = NAND ( new_n126_, new_n125_, new_n124_ ) -new_n128_ = NAND ( new_n90_, new_n69_, NET_10 ) -new_n129_ = NAND ( new_n89_, new_n87_, new_n71_, NET_13 ) -new_n130_ = NAND ( new_n90_, NET_33, NET_16 ) -NET_147 = NAND ( new_n130_, new_n129_, new_n128_ ) -new_n132_ = NAND ( new_n90_, new_n69_, NET_11 ) -new_n133_ = NAND ( new_n89_, new_n87_, new_n71_, NET_14 ) -NET_148 = NAND ( new_n133_, new_n132_ ) -new_n135_ = NAND ( new_n90_, new_n69_, NET_12 ) -new_n136_ = NAND ( new_n89_, new_n87_, new_n71_, NET_15 ) -NET_149 = NAND ( new_n136_, new_n135_ ) -new_n138_ = NAND ( new_n90_, new_n69_, NET_13 ) -new_n139_ = NAND ( new_n89_, new_n87_, new_n71_, NET_16 ) -NET_150 = NAND ( new_n139_, new_n138_ ) -NET_325 = NOT ( NET_34 ) -new_n142_ = NAND ( NET_325, NET_26 ) -NET_76 = NAND ( new_n142_, new_n88_ ) -new_n144_ = NAND ( NET_325, NET_1 ) -NET_77 = NAND ( new_n144_, new_n88_ ) -new_n146_ = NAND ( NET_325, NET_21 ) -new_n147_ = NAND ( NET_34, NET_17 ) -NET_78 = NAND ( new_n147_, new_n146_ ) -new_n149_ = NAND ( NET_325, NET_22 ) -new_n150_ = NAND ( NET_34, NET_18 ) -NET_79 = NAND ( new_n150_, new_n149_ ) -new_n152_ = NAND ( NET_325, NET_23 ) -new_n153_ = NAND ( NET_34, NET_19 ) -NET_80 = NAND ( new_n153_, new_n152_ ) -new_n155_ = NAND ( NET_325, NET_24 ) -new_n156_ = NAND ( NET_34, NET_20 ) -NET_81 = NAND ( new_n156_, new_n155_ ) -new_n158_ = NAND ( NET_325, NET_3 ) -new_n159_ = NAND ( NET_34, NET_25 ) -NET_82 = NAND ( new_n159_, new_n158_ ) -new_n161_ = NAND ( NET_325, NET_27 ) -NET_83 = NAND ( new_n161_, new_n159_ ) -new_n163_ = NAND ( NET_4, NET_325 ) -new_n164_ = NAND ( NET_34, NET_29 ) -NET_84 = NAND ( new_n164_, new_n163_ ) -new_n166_ = NAND ( NET_325, NET_30 ) -new_n167_ = NAND ( NET_34, NET_32 ) -NET_85 = NAND ( new_n167_, new_n166_ ) -new_n169_ = OR ( NET_34, new_n81_ ) -NET_86 = NAND ( new_n169_, new_n164_ ) -new_n171_ = NAND ( NET_325, NET_2 ) -NET_87 = NAND ( new_n171_, new_n167_ ) -new_n173_ = NAND ( new_n72_, new_n104_, new_n99_, NET_5 ) -new_n174_ = NAND ( new_n71_, NET_17 ) -NET_97 = NAND ( new_n174_, new_n173_ ) -new_n176_ = NAND ( new_n72_, new_n104_, NET_6, new_n92_ ) -new_n177_ = NAND ( new_n71_, NET_18 ) -NET_98 = NAND ( new_n177_, new_n176_ ) -new_n179_ = NAND ( new_n72_, NET_7, new_n99_, new_n92_ ) -new_n180_ = NAND ( new_n71_, NET_19 ) -NET_99 = NAND ( new_n180_, new_n179_ ) -NET_35 = BUF ( NET_21 ) -NET_36 = BUF ( NET_22 ) -NET_37 = BUF ( NET_23 ) -NET_38 = BUF ( NET_24 ) -NET_57 = BUF ( NET_34 ) diff --git a/ITC99BENCH/b04.bench b/ITC99BENCH/b04.bench deleted file mode 100644 index 11a3edc..0000000 --- a/ITC99BENCH/b04.bench +++ /dev/null @@ -1,662 +0,0 @@ -# generated by verilog2bench.py https://gitea.yuhangq.com/YuhangQ/any2bench -INPUT(NET_1) -INPUT(NET_10) -INPUT(NET_11) -INPUT(NET_12) -INPUT(NET_13) -INPUT(NET_14) -INPUT(NET_15) -INPUT(NET_16) -INPUT(NET_17) -INPUT(NET_18) -INPUT(NET_19) -INPUT(NET_2) -INPUT(NET_20) -INPUT(NET_21) -INPUT(NET_22) -INPUT(NET_23) -INPUT(NET_24) -INPUT(NET_25) -INPUT(NET_26) -INPUT(NET_27) -INPUT(NET_28) -INPUT(NET_29) -INPUT(NET_3) -INPUT(NET_30) -INPUT(NET_31) -INPUT(NET_32) -INPUT(NET_33) -INPUT(NET_34) -INPUT(NET_35) -INPUT(NET_36) -INPUT(NET_37) -INPUT(NET_38) -INPUT(NET_39) -INPUT(NET_4) -INPUT(NET_40) -INPUT(NET_41) -INPUT(NET_42) -INPUT(NET_43) -INPUT(NET_44) -INPUT(NET_45) -INPUT(NET_46) -INPUT(NET_47) -INPUT(NET_48) -INPUT(NET_49) -INPUT(NET_5) -INPUT(NET_50) -INPUT(NET_51) -INPUT(NET_52) -INPUT(NET_53) -INPUT(NET_54) -INPUT(NET_55) -INPUT(NET_56) -INPUT(NET_57) -INPUT(NET_58) -INPUT(NET_59) -INPUT(NET_6) -INPUT(NET_60) -INPUT(NET_61) -INPUT(NET_62) -INPUT(NET_63) -INPUT(NET_64) -INPUT(NET_65) -INPUT(NET_66) -INPUT(NET_67) -INPUT(NET_68) -INPUT(NET_69) -INPUT(NET_7) -INPUT(NET_70) -INPUT(NET_71) -INPUT(NET_72) -INPUT(NET_73) -INPUT(NET_74) -INPUT(NET_75) -INPUT(NET_76) -INPUT(NET_77) -INPUT(NET_8) -INPUT(NET_9) -OUTPUT(NET_1308) -OUTPUT(NET_1309) -OUTPUT(NET_344) -OUTPUT(NET_345) -OUTPUT(NET_346) -OUTPUT(NET_347) -OUTPUT(NET_348) -OUTPUT(NET_349) -OUTPUT(NET_350) -OUTPUT(NET_351) -OUTPUT(NET_352) -OUTPUT(NET_353) -OUTPUT(NET_354) -OUTPUT(NET_355) -OUTPUT(NET_356) -OUTPUT(NET_357) -OUTPUT(NET_358) -OUTPUT(NET_359) -OUTPUT(NET_360) -OUTPUT(NET_361) -OUTPUT(NET_362) -OUTPUT(NET_363) -OUTPUT(NET_364) -OUTPUT(NET_365) -OUTPUT(NET_366) -OUTPUT(NET_367) -OUTPUT(NET_368) -OUTPUT(NET_369) -OUTPUT(NET_370) -OUTPUT(NET_371) -OUTPUT(NET_372) -OUTPUT(NET_373) -OUTPUT(NET_374) -OUTPUT(NET_375) -OUTPUT(NET_376) -OUTPUT(NET_377) -OUTPUT(NET_378) -OUTPUT(NET_379) -OUTPUT(NET_380) -OUTPUT(NET_381) -OUTPUT(NET_382) -OUTPUT(NET_383) -OUTPUT(NET_489) -OUTPUT(NET_490) -OUTPUT(NET_491) -OUTPUT(NET_492) -OUTPUT(NET_493) -OUTPUT(NET_494) -OUTPUT(NET_495) -OUTPUT(NET_496) -OUTPUT(NET_530) -OUTPUT(NET_531) -OUTPUT(NET_532) -OUTPUT(NET_533) -OUTPUT(NET_534) -OUTPUT(NET_535) -OUTPUT(NET_536) -OUTPUT(NET_537) -OUTPUT(NET_572) -OUTPUT(NET_573) -OUTPUT(NET_574) -OUTPUT(NET_583) -OUTPUT(NET_589) -OUTPUT(NET_593) -OUTPUT(NET_596) -OUTPUT(NET_597) -OUTPUT(NET_78) -OUTPUT(NET_79) -OUTPUT(NET_80) -OUTPUT(NET_81) -OUTPUT(NET_82) -OUTPUT(NET_83) -OUTPUT(NET_84) -OUTPUT(NET_85) -new_n152_ = NOT ( NET_77 ) -new_n153_ = NOR ( new_n152_, NET_76 ) -new_n154_ = NOT ( NET_76 ) -new_n155_ = NOR ( NET_77, new_n154_ ) -NET_1308 = OR ( new_n155_, new_n153_ ) -NET_1309 = NOR ( NET_77, NET_76 ) -new_n158_ = NOT ( NET_4 ) -new_n159_ = NOR ( NET_77, NET_3 ) -new_n160_ = OR ( new_n159_, new_n154_ ) -new_n161_ = OR ( new_n160_, new_n158_ ) -new_n162_ = NOT ( NET_28 ) -new_n163_ = NOR ( new_n159_, NET_1309 ) -new_n164_ = OR ( new_n163_, new_n162_ ) -NET_344 = NAND ( new_n164_, new_n161_ ) -new_n166_ = NOT ( NET_5 ) -new_n167_ = OR ( new_n160_, new_n166_ ) -new_n168_ = NOT ( NET_29 ) -new_n169_ = OR ( new_n163_, new_n168_ ) -NET_345 = NAND ( new_n169_, new_n167_ ) -new_n171_ = NOT ( NET_6 ) -new_n172_ = OR ( new_n160_, new_n171_ ) -new_n173_ = NOT ( NET_30 ) -new_n174_ = OR ( new_n163_, new_n173_ ) -NET_346 = NAND ( new_n174_, new_n172_ ) -new_n176_ = NOT ( NET_7 ) -new_n177_ = OR ( new_n160_, new_n176_ ) -new_n178_ = NOT ( NET_31 ) -new_n179_ = OR ( new_n163_, new_n178_ ) -NET_347 = NAND ( new_n179_, new_n177_ ) -new_n181_ = NOT ( NET_8 ) -new_n182_ = OR ( new_n160_, new_n181_ ) -new_n183_ = NOT ( NET_32 ) -new_n184_ = OR ( new_n163_, new_n183_ ) -NET_348 = NAND ( new_n184_, new_n182_ ) -new_n186_ = NOT ( NET_9 ) -new_n187_ = OR ( new_n160_, new_n186_ ) -new_n188_ = NOT ( NET_33 ) -new_n189_ = OR ( new_n163_, new_n188_ ) -NET_349 = NAND ( new_n189_, new_n187_ ) -new_n191_ = NOT ( NET_10 ) -new_n192_ = OR ( new_n160_, new_n191_ ) -new_n193_ = NOT ( NET_34 ) -new_n194_ = OR ( new_n163_, new_n193_ ) -NET_350 = NAND ( new_n194_, new_n192_ ) -new_n196_ = NOT ( NET_11 ) -new_n197_ = OR ( new_n160_, new_n196_ ) -new_n198_ = NOT ( NET_35 ) -new_n199_ = OR ( new_n163_, new_n198_ ) -NET_351 = NAND ( new_n199_, new_n197_ ) -new_n201_ = NAND ( new_n155_, NET_4 ) -new_n202_ = NOT ( NET_36 ) -new_n203_ = OR ( NET_1308, new_n202_ ) -NET_352 = NAND ( new_n203_, new_n201_ ) -new_n205_ = NAND ( new_n155_, NET_5 ) -new_n206_ = NOT ( NET_37 ) -new_n207_ = OR ( NET_1308, new_n206_ ) -NET_353 = NAND ( new_n207_, new_n205_ ) -new_n209_ = NAND ( new_n155_, NET_6 ) -new_n210_ = NOT ( NET_38 ) -new_n211_ = OR ( NET_1308, new_n210_ ) -NET_354 = NAND ( new_n211_, new_n209_ ) -new_n213_ = NAND ( new_n155_, NET_7 ) -new_n214_ = NOT ( NET_39 ) -new_n215_ = OR ( NET_1308, new_n214_ ) -NET_355 = NAND ( new_n215_, new_n213_ ) -new_n217_ = NAND ( new_n155_, NET_8 ) -new_n218_ = NOT ( NET_40 ) -new_n219_ = OR ( NET_1308, new_n218_ ) -NET_356 = NAND ( new_n219_, new_n217_ ) -new_n221_ = NAND ( new_n155_, NET_9 ) -new_n222_ = NOT ( NET_41 ) -new_n223_ = OR ( NET_1308, new_n222_ ) -NET_357 = NAND ( new_n223_, new_n221_ ) -new_n225_ = NAND ( new_n155_, NET_10 ) -new_n226_ = NOT ( NET_42 ) -new_n227_ = OR ( NET_1308, new_n226_ ) -NET_358 = NAND ( new_n227_, new_n225_ ) -new_n229_ = NAND ( new_n155_, NET_11 ) -new_n230_ = NOT ( NET_43 ) -new_n231_ = OR ( NET_1308, new_n230_ ) -NET_359 = NAND ( new_n231_, new_n229_ ) -new_n233_ = NAND ( new_n155_, NET_36 ) -new_n234_ = NOT ( NET_44 ) -new_n235_ = OR ( NET_1308, new_n234_ ) -NET_360 = NAND ( new_n235_, new_n233_ ) -new_n237_ = NAND ( new_n155_, NET_37 ) -new_n238_ = NOT ( NET_45 ) -new_n239_ = OR ( NET_1308, new_n238_ ) -NET_361 = NAND ( new_n239_, new_n237_ ) -new_n241_ = NAND ( new_n155_, NET_38 ) -new_n242_ = NOT ( NET_46 ) -new_n243_ = OR ( NET_1308, new_n242_ ) -NET_362 = NAND ( new_n243_, new_n241_ ) -new_n245_ = NAND ( new_n155_, NET_39 ) -new_n246_ = NOT ( NET_47 ) -new_n247_ = OR ( NET_1308, new_n246_ ) -NET_363 = NAND ( new_n247_, new_n245_ ) -new_n249_ = NAND ( new_n155_, NET_40 ) -new_n250_ = NOT ( NET_48 ) -new_n251_ = OR ( NET_1308, new_n250_ ) -NET_364 = NAND ( new_n251_, new_n249_ ) -new_n253_ = NAND ( new_n155_, NET_41 ) -new_n254_ = NOT ( NET_49 ) -new_n255_ = OR ( NET_1308, new_n254_ ) -NET_365 = NAND ( new_n255_, new_n253_ ) -new_n257_ = NAND ( new_n155_, NET_42 ) -new_n258_ = NOT ( NET_50 ) -new_n259_ = OR ( NET_1308, new_n258_ ) -NET_366 = NAND ( new_n259_, new_n257_ ) -new_n261_ = NAND ( new_n155_, NET_43 ) -new_n262_ = NOT ( NET_51 ) -new_n263_ = OR ( NET_1308, new_n262_ ) -NET_367 = NAND ( new_n263_, new_n261_ ) -new_n265_ = NAND ( new_n155_, NET_44 ) -new_n266_ = NOT ( NET_52 ) -new_n267_ = OR ( NET_1308, new_n266_ ) -NET_368 = NAND ( new_n267_, new_n265_ ) -new_n269_ = NAND ( new_n155_, NET_45 ) -new_n270_ = NOT ( NET_53 ) -new_n271_ = OR ( NET_1308, new_n270_ ) -NET_369 = NAND ( new_n271_, new_n269_ ) -new_n273_ = NAND ( new_n155_, NET_46 ) -new_n274_ = NOT ( NET_54 ) -new_n275_ = OR ( NET_1308, new_n274_ ) -NET_370 = NAND ( new_n275_, new_n273_ ) -new_n277_ = NAND ( new_n155_, NET_47 ) -new_n278_ = NOT ( NET_55 ) -new_n279_ = OR ( NET_1308, new_n278_ ) -NET_371 = NAND ( new_n279_, new_n277_ ) -new_n281_ = NAND ( new_n155_, NET_48 ) -new_n282_ = NOT ( NET_56 ) -new_n283_ = OR ( NET_1308, new_n282_ ) -NET_372 = NAND ( new_n283_, new_n281_ ) -new_n285_ = NAND ( new_n155_, NET_49 ) -new_n286_ = NOT ( NET_57 ) -new_n287_ = OR ( NET_1308, new_n286_ ) -NET_373 = NAND ( new_n287_, new_n285_ ) -new_n289_ = NAND ( new_n155_, NET_50 ) -new_n290_ = NOT ( NET_58 ) -new_n291_ = OR ( NET_1308, new_n290_ ) -NET_374 = NAND ( new_n291_, new_n289_ ) -new_n293_ = NAND ( new_n155_, NET_51 ) -new_n294_ = NOT ( NET_59 ) -new_n295_ = OR ( NET_1308, new_n294_ ) -NET_375 = NAND ( new_n295_, new_n293_ ) -new_n297_ = NAND ( new_n155_, NET_52 ) -new_n298_ = NOT ( NET_60 ) -new_n299_ = OR ( NET_1308, new_n298_ ) -NET_376 = NAND ( new_n299_, new_n297_ ) -new_n301_ = NAND ( new_n155_, NET_53 ) -new_n302_ = NOT ( NET_61 ) -new_n303_ = OR ( NET_1308, new_n302_ ) -NET_377 = NAND ( new_n303_, new_n301_ ) -new_n305_ = NAND ( new_n155_, NET_54 ) -new_n306_ = NOT ( NET_62 ) -new_n307_ = OR ( NET_1308, new_n306_ ) -NET_378 = NAND ( new_n307_, new_n305_ ) -new_n309_ = NAND ( new_n155_, NET_55 ) -new_n310_ = NOT ( NET_63 ) -new_n311_ = OR ( NET_1308, new_n310_ ) -NET_379 = NAND ( new_n311_, new_n309_ ) -new_n313_ = NAND ( new_n155_, NET_56 ) -new_n314_ = NOT ( NET_64 ) -new_n315_ = OR ( NET_1308, new_n314_ ) -NET_380 = NAND ( new_n315_, new_n313_ ) -new_n317_ = NAND ( new_n155_, NET_57 ) -new_n318_ = NOT ( NET_65 ) -new_n319_ = OR ( NET_1308, new_n318_ ) -NET_381 = NAND ( new_n319_, new_n317_ ) -new_n321_ = NAND ( new_n155_, NET_58 ) -new_n322_ = NOT ( NET_66 ) -new_n323_ = OR ( NET_1308, new_n322_ ) -NET_382 = NAND ( new_n323_, new_n321_ ) -new_n325_ = NAND ( new_n155_, NET_59 ) -new_n326_ = NOT ( NET_67 ) -new_n327_ = OR ( NET_1308, new_n326_ ) -NET_383 = NAND ( new_n327_, new_n325_ ) -new_n329_ = NOT ( NET_1309 ) -new_n330_ = NAND ( new_n158_, NET_12 ) -new_n331_ = AND ( NET_18, new_n191_ ) -new_n332_ = OR ( new_n331_, NET_19, new_n196_ ) -new_n333_ = OR ( new_n186_, NET_17 ) -new_n334_ = OR ( NET_18, new_n191_ ) -new_n335_ = NAND ( new_n334_, new_n333_, new_n332_ ) -new_n336_ = NAND ( new_n181_, NET_16 ) -new_n337_ = NAND ( new_n186_, NET_17 ) -new_n338_ = NAND ( new_n337_, new_n336_, new_n335_ ) -new_n339_ = OR ( new_n176_, NET_15 ) -new_n340_ = OR ( new_n181_, NET_16 ) -new_n341_ = NAND ( new_n340_, new_n339_, new_n338_ ) -new_n342_ = NAND ( new_n171_, NET_14 ) -new_n343_ = NAND ( new_n176_, NET_15 ) -new_n344_ = NAND ( new_n343_, new_n342_, new_n341_ ) -new_n345_ = OR ( new_n166_, NET_13 ) -new_n346_ = OR ( new_n171_, NET_14 ) -new_n347_ = NAND ( new_n346_, new_n345_, new_n344_ ) -new_n348_ = OR ( new_n158_, NET_12 ) -new_n349_ = NAND ( new_n166_, NET_13 ) -new_n350_ = NAND ( new_n349_, new_n348_, new_n347_ ) -new_n351_ = AND ( new_n350_, new_n330_ ) -new_n352_ = NAND ( new_n351_, new_n152_ ) -new_n353_ = NAND ( new_n352_, new_n329_ ) -new_n354_ = NAND ( new_n353_, NET_12 ) -new_n355_ = OR ( new_n351_, new_n154_ ) -new_n356_ = NAND ( new_n355_, new_n152_ ) -new_n357_ = NAND ( new_n356_, NET_4 ) -NET_489 = NAND ( new_n357_, new_n354_ ) -new_n359_ = NAND ( new_n353_, NET_13 ) -new_n360_ = NAND ( new_n356_, NET_5 ) -NET_490 = NAND ( new_n360_, new_n359_ ) -new_n362_ = NAND ( new_n353_, NET_14 ) -new_n363_ = NAND ( new_n356_, NET_6 ) -NET_491 = NAND ( new_n363_, new_n362_ ) -new_n365_ = NAND ( new_n353_, NET_15 ) -new_n366_ = NAND ( new_n356_, NET_7 ) -NET_492 = NAND ( new_n366_, new_n365_ ) -new_n368_ = NAND ( new_n353_, NET_16 ) -new_n369_ = NAND ( new_n356_, NET_8 ) -NET_493 = NAND ( new_n369_, new_n368_ ) -new_n371_ = NAND ( new_n353_, NET_17 ) -new_n372_ = NAND ( new_n356_, NET_9 ) -NET_494 = NAND ( new_n372_, new_n371_ ) -new_n374_ = NAND ( new_n353_, NET_18 ) -new_n375_ = NAND ( new_n356_, NET_10 ) -NET_495 = NAND ( new_n375_, new_n374_ ) -new_n377_ = NAND ( new_n353_, NET_19 ) -new_n378_ = NAND ( new_n356_, NET_11 ) -NET_496 = NAND ( new_n378_, new_n377_ ) -new_n380_ = OR ( new_n158_, NET_20 ) -new_n381_ = OR ( NET_26, new_n191_ ) -new_n382_ = NAND ( new_n381_, NET_27, new_n196_ ) -new_n383_ = NAND ( new_n186_, NET_25 ) -new_n384_ = NAND ( NET_26, new_n191_ ) -new_n385_ = NAND ( new_n384_, new_n383_, new_n382_ ) -new_n386_ = OR ( new_n181_, NET_24 ) -new_n387_ = OR ( new_n186_, NET_25 ) -new_n388_ = NAND ( new_n387_, new_n386_, new_n385_ ) -new_n389_ = NAND ( new_n176_, NET_23 ) -new_n390_ = NAND ( new_n181_, NET_24 ) -new_n391_ = NAND ( new_n390_, new_n389_, new_n388_ ) -new_n392_ = OR ( new_n171_, NET_22 ) -new_n393_ = OR ( new_n176_, NET_23 ) -new_n394_ = NAND ( new_n393_, new_n392_, new_n391_ ) -new_n395_ = NAND ( new_n166_, NET_21 ) -new_n396_ = NAND ( new_n171_, NET_22 ) -new_n397_ = NAND ( new_n396_, new_n395_, new_n394_ ) -new_n398_ = NAND ( new_n158_, NET_20 ) -new_n399_ = OR ( new_n166_, NET_21 ) -new_n400_ = NAND ( new_n399_, new_n398_, new_n397_ ) -new_n401_ = NAND ( new_n400_, new_n380_ ) -new_n402_ = NAND ( new_n401_, new_n351_, NET_76 ) -new_n403_ = NAND ( new_n402_, new_n152_ ) -new_n404_ = NAND ( new_n403_, NET_4 ) -new_n405_ = NAND ( new_n401_, new_n351_ ) -new_n406_ = NAND ( new_n405_, new_n152_ ) -new_n407_ = NAND ( new_n406_, new_n329_ ) -new_n408_ = NAND ( new_n407_, NET_20 ) -NET_530 = NAND ( new_n408_, new_n404_ ) -new_n410_ = NAND ( new_n403_, NET_5 ) -new_n411_ = NAND ( new_n407_, NET_21 ) -NET_531 = NAND ( new_n411_, new_n410_ ) -new_n413_ = NAND ( new_n403_, NET_6 ) -new_n414_ = NAND ( new_n407_, NET_22 ) -NET_532 = NAND ( new_n414_, new_n413_ ) -new_n416_ = NAND ( new_n403_, NET_7 ) -new_n417_ = NAND ( new_n407_, NET_23 ) -NET_533 = NAND ( new_n417_, new_n416_ ) -new_n419_ = NAND ( new_n403_, NET_8 ) -new_n420_ = NAND ( new_n407_, NET_24 ) -NET_534 = NAND ( new_n420_, new_n419_ ) -new_n422_ = NAND ( new_n403_, NET_9 ) -new_n423_ = NAND ( new_n407_, NET_25 ) -NET_535 = NAND ( new_n423_, new_n422_ ) -new_n425_ = NAND ( new_n403_, NET_10 ) -new_n426_ = NAND ( new_n407_, NET_26 ) -NET_536 = NAND ( new_n426_, new_n425_ ) -new_n428_ = NAND ( new_n403_, NET_11 ) -new_n429_ = NAND ( new_n407_, NET_27 ) -NET_537 = NAND ( new_n429_, new_n428_ ) -new_n431_ = OR ( new_n181_, NET_1 ) -new_n432_ = NAND ( NET_16, NET_1 ) -new_n433_ = NAND ( new_n432_, new_n431_ ) -new_n434_ = OR ( new_n314_, NET_1 ) -new_n435_ = NAND ( NET_24, NET_1 ) -new_n436_ = NAND ( new_n435_, new_n434_ ) -new_n437_ = OR ( new_n436_, new_n433_ ) -new_n438_ = NAND ( new_n436_, new_n433_ ) -new_n439_ = NAND ( new_n438_, new_n437_ ) -new_n440_ = OR ( new_n186_, NET_1 ) -new_n441_ = NAND ( NET_17, NET_1 ) -new_n442_ = NAND ( new_n441_, new_n440_ ) -new_n443_ = OR ( new_n318_, NET_1 ) -new_n444_ = NAND ( NET_25, NET_1 ) -new_n445_ = NAND ( new_n444_, new_n443_ ) -new_n446_ = NAND ( new_n445_, new_n442_ ) -new_n447_ = OR ( new_n196_, NET_1 ) -new_n448_ = NAND ( NET_19, NET_1 ) -new_n449_ = NAND ( new_n448_, new_n447_ ) -new_n450_ = OR ( new_n326_, NET_1 ) -new_n451_ = NAND ( NET_27, NET_1 ) -new_n452_ = NAND ( new_n451_, new_n450_ ) -new_n453_ = NAND ( new_n452_, new_n449_ ) -new_n454_ = NOR ( NET_66, NET_1 ) -new_n455_ = NOT ( NET_1 ) -new_n456_ = NOR ( NET_26, new_n455_ ) -new_n457_ = OR ( new_n456_, new_n454_ ) -new_n458_ = OR ( new_n457_, new_n453_ ) -new_n459_ = OR ( new_n191_, NET_1 ) -new_n460_ = NAND ( NET_18, NET_1 ) -new_n461_ = NAND ( new_n460_, new_n459_ ) -new_n462_ = NAND ( new_n457_, new_n453_ ) -new_n463_ = NAND ( new_n462_, new_n461_ ) -new_n464_ = NAND ( new_n463_, new_n458_ ) -new_n465_ = OR ( new_n445_, new_n442_ ) -new_n466_ = NAND ( new_n465_, new_n464_ ) -new_n467_ = NAND ( new_n466_, new_n446_, new_n439_ ) -new_n468_ = NAND ( new_n466_, new_n446_ ) -new_n469_ = NAND ( new_n468_, new_n438_, new_n437_ ) -new_n470_ = NAND ( new_n469_, new_n467_ ) -new_n471_ = NOT ( new_n155_ ) -new_n472_ = NOT ( NET_3 ) -new_n473_ = NOR ( new_n472_, NET_2 ) -new_n474_ = NOR ( new_n473_, NET_1 ) -new_n475_ = NOR ( new_n474_, new_n471_ ) -new_n476_ = NOT ( new_n475_ ) -new_n477_ = OR ( new_n158_, NET_1 ) -new_n478_ = NAND ( NET_12, NET_1 ) -new_n479_ = NAND ( new_n478_, new_n477_ ) -new_n480_ = OR ( new_n298_, NET_1 ) -new_n481_ = NAND ( NET_20, NET_1 ) -new_n482_ = NAND ( new_n481_, new_n480_ ) -new_n483_ = OR ( new_n166_, NET_1 ) -new_n484_ = NAND ( NET_13, NET_1 ) -new_n485_ = NAND ( new_n484_, new_n483_ ) -new_n486_ = NOT ( new_n485_ ) -new_n487_ = OR ( new_n302_, NET_1 ) -new_n488_ = NAND ( NET_21, NET_1 ) -new_n489_ = NAND ( new_n488_, new_n487_ ) -new_n490_ = NOT ( new_n489_ ) -new_n491_ = OR ( new_n322_, NET_1 ) -new_n492_ = NAND ( NET_26, NET_1 ) -new_n493_ = NAND ( new_n492_, new_n491_ ) -new_n494_ = NAND ( new_n493_, new_n461_ ) -new_n495_ = NAND ( new_n494_, new_n453_ ) -new_n496_ = OR ( new_n493_, new_n461_ ) -new_n497_ = NAND ( new_n496_, new_n495_, new_n465_ ) -new_n498_ = NAND ( new_n497_, new_n446_, new_n438_ ) -new_n499_ = OR ( new_n176_, NET_1 ) -new_n500_ = NAND ( NET_15, NET_1 ) -new_n501_ = NAND ( new_n500_, new_n499_ ) -new_n502_ = OR ( new_n310_, NET_1 ) -new_n503_ = NAND ( NET_23, NET_1 ) -new_n504_ = NAND ( new_n503_, new_n502_ ) -new_n505_ = OR ( new_n504_, new_n501_ ) -new_n506_ = NAND ( new_n505_, new_n498_, new_n437_ ) -new_n507_ = NAND ( new_n504_, new_n501_ ) -new_n508_ = OR ( new_n171_, NET_1 ) -new_n509_ = NAND ( NET_14, NET_1 ) -new_n510_ = NAND ( new_n509_, new_n508_ ) -new_n511_ = OR ( new_n306_, NET_1 ) -new_n512_ = NAND ( NET_22, NET_1 ) -new_n513_ = NAND ( new_n512_, new_n511_ ) -new_n514_ = NAND ( new_n513_, new_n510_ ) -new_n515_ = NAND ( new_n514_, new_n507_, new_n506_ ) -new_n516_ = OR ( new_n489_, new_n485_ ) -new_n517_ = NOR ( new_n513_, new_n510_ ) -new_n518_ = NOT ( new_n517_ ) -new_n519_ = NAND ( new_n518_, new_n516_, new_n515_ ) -new_n521_ = NAND ( new_n482_, new_n479_ ) -new_n522_ = OR ( new_n482_, new_n479_ ) -new_n523_ = NAND ( new_n489_, new_n485_ ) -new_n524_ = NAND ( new_n482_, new_n479_ ) -new_n525_ = NAND ( new_n524_, new_n523_, new_n519_, new_n522_ ) -new_n526_ = NAND ( new_n525_, new_n521_ ) -new_n527_ = OR ( new_n526_, new_n476_ ) -new_n528_ = OR ( new_n527_, new_n470_ ) -new_n529_ = NAND ( new_n526_, new_n475_ ) -new_n530_ = NOT ( new_n529_ ) -new_n531_ = XOR ( new_n452_, new_n449_ ) -new_n532_ = AND ( new_n452_, new_n449_ ) -new_n533_ = OR ( new_n461_, new_n532_ ) -new_n534_ = NAND ( new_n461_, new_n532_ ) -new_n535_ = NAND ( new_n534_, new_n533_, new_n492_, new_n491_ ) -new_n536_ = NOR ( new_n457_, new_n532_ ) -new_n537_ = OR ( new_n536_, new_n461_ ) -new_n538_ = NAND ( new_n461_, new_n458_ ) -new_n539_ = NAND ( new_n538_, new_n537_ ) -new_n540_ = NAND ( new_n539_, new_n535_ ) -new_n541_ = OR ( new_n540_, new_n531_ ) -new_n542_ = NAND ( new_n540_, new_n531_ ) -new_n543_ = AND ( new_n542_, new_n541_ ) -new_n544_ = NAND ( new_n465_, new_n446_ ) -new_n545_ = XNOR ( new_n544_, new_n464_ ) -new_n546_ = AND ( new_n545_, new_n541_ ) -new_n547_ = NOR ( new_n545_, new_n541_ ) -new_n548_ = NOR ( new_n547_, new_n546_ ) -new_n549_ = OR ( new_n548_, new_n543_ ) -new_n550_ = XOR ( new_n547_, new_n470_ ) -new_n551_ = NAND ( new_n550_, new_n549_ ) -new_n552_ = OR ( new_n550_, new_n549_ ) -new_n553_ = NAND ( new_n552_, new_n551_, new_n530_ ) -new_n554_ = AND ( new_n155_, NET_3, new_n455_ ) -new_n555_ = NAND ( new_n554_, NET_2 ) -new_n556_ = OR ( new_n555_, new_n318_ ) -new_n557_ = NOT ( NET_73 ) -new_n558_ = NOR ( NET_1308, new_n557_ ) -new_n559_ = NAND ( new_n155_, new_n472_, new_n455_ ) -new_n560_ = NOR ( new_n559_, new_n188_ ) -new_n561_ = NOR ( new_n560_, new_n558_ ) -NET_572 = NAND ( new_n561_, new_n556_, new_n553_, new_n528_ ) -new_n563_ = NOT ( new_n527_ ) -new_n564_ = NAND ( new_n545_, new_n563_ ) -new_n565_ = NAND ( new_n548_, new_n543_ ) -new_n566_ = NAND ( new_n565_, new_n549_, new_n530_ ) -new_n567_ = OR ( new_n555_, new_n322_ ) -new_n568_ = NOT ( NET_74 ) -new_n569_ = NOR ( NET_1308, new_n568_ ) -new_n570_ = NOR ( new_n559_, new_n193_ ) -new_n571_ = NOR ( new_n570_, new_n569_ ) -NET_573 = NAND ( new_n571_, new_n567_, new_n566_, new_n564_ ) -new_n573_ = NAND ( new_n540_, new_n563_ ) -new_n574_ = NAND ( new_n543_, new_n530_ ) -new_n575_ = OR ( new_n555_, new_n326_ ) -new_n576_ = NOT ( NET_75 ) -new_n577_ = NOR ( NET_1308, new_n576_ ) -new_n578_ = NOR ( new_n559_, new_n198_ ) -new_n579_ = NOR ( new_n578_, new_n577_ ) -NET_574 = NAND ( new_n579_, new_n575_, new_n574_, new_n573_ ) -new_n581_ = NAND ( new_n547_, new_n470_ ) -new_n582_ = NAND ( new_n468_, new_n437_ ) -new_n583_ = NAND ( new_n582_, new_n438_ ) -new_n584_ = XOR ( new_n504_, new_n501_ ) -new_n585_ = XOR ( new_n584_, new_n583_ ) -new_n586_ = NAND ( new_n585_, new_n581_ ) -new_n587_ = OR ( new_n585_, new_n581_ ) -new_n588_ = AND ( new_n587_, new_n586_ ) -new_n589_ = NAND ( new_n588_, new_n552_ ) -new_n590_ = OR ( new_n588_, new_n552_ ) -new_n591_ = NAND ( new_n590_, new_n589_, new_n530_ ) -new_n592_ = NAND ( new_n585_, new_n563_ ) -new_n593_ = OR ( new_n555_, new_n314_ ) -new_n594_ = NOT ( NET_72 ) -new_n595_ = NOR ( NET_1308, new_n594_ ) -new_n596_ = NOR ( new_n559_, new_n183_ ) -new_n597_ = NOR ( new_n596_, new_n595_ ) -NET_583 = NAND ( new_n597_, new_n593_, new_n592_, new_n591_ ) -new_n599_ = NAND ( new_n507_, new_n582_, new_n438_ ) -new_n600_ = NAND ( new_n599_, new_n505_ ) -new_n601_ = NAND ( new_n518_, new_n514_ ) -new_n602_ = XNOR ( new_n601_, new_n600_ ) -new_n603_ = XNOR ( new_n602_, new_n587_ ) -new_n604_ = NAND ( new_n603_, new_n590_ ) -new_n605_ = OR ( new_n603_, new_n590_ ) -new_n606_ = NAND ( new_n605_, new_n604_, new_n530_ ) -new_n607_ = OR ( new_n602_, new_n527_ ) -new_n608_ = OR ( new_n555_, new_n310_ ) -new_n609_ = NOT ( NET_71 ) -new_n610_ = NOR ( NET_1308, new_n609_ ) -new_n611_ = NOR ( new_n559_, new_n178_ ) -new_n612_ = NOR ( new_n611_, new_n610_ ) -NET_589 = NAND ( new_n612_, new_n608_, new_n607_, new_n606_ ) -new_n614_ = OR ( new_n600_, new_n517_ ) -new_n615_ = OR ( new_n489_, new_n486_ ) -new_n616_ = OR ( new_n490_, new_n485_ ) -new_n617_ = NAND ( new_n616_, new_n615_, new_n614_, new_n514_ ) -new_n618_ = NAND ( new_n600_, new_n514_ ) -new_n619_ = NAND ( new_n616_, new_n615_ ) -new_n620_ = NAND ( new_n619_, new_n618_, new_n518_ ) -new_n621_ = NAND ( new_n620_, new_n617_ ) -new_n622_ = NOR ( new_n585_, new_n581_ ) -new_n623_ = AND ( new_n602_, new_n622_ ) -new_n624_ = XOR ( new_n623_, new_n621_ ) -new_n625_ = XNOR ( new_n624_, new_n605_ ) -new_n626_ = NOR ( new_n625_, new_n529_ ) -new_n627_ = OR ( new_n621_, new_n527_ ) -new_n628_ = OR ( new_n555_, new_n306_ ) -new_n629_ = NOT ( NET_70 ) -new_n630_ = OR ( NET_1308, new_n629_ ) -new_n631_ = OR ( new_n559_, new_n173_ ) -new_n632_ = NAND ( new_n631_, new_n630_, new_n628_, new_n627_ ) -NET_593 = OR ( new_n632_, new_n626_ ) -new_n634_ = NOT ( NET_2 ) -new_n635_ = NAND ( new_n554_, new_n634_ ) -new_n636_ = NAND ( new_n155_, NET_1 ) -new_n637_ = NAND ( new_n636_, new_n635_ ) -new_n638_ = AND ( new_n637_, new_n526_ ) -new_n639_ = NAND ( new_n638_, new_n623_, new_n621_, new_n605_ ) -new_n640_ = OR ( new_n555_, new_n298_ ) -new_n641_ = OR ( new_n559_, new_n162_ ) -new_n642_ = NOT ( NET_68 ) -new_n643_ = OR ( NET_1308, new_n642_ ) -NET_596 = NAND ( new_n643_, new_n641_, new_n640_, new_n639_ ) -new_n645_ = OR ( new_n624_, new_n605_ ) -new_n646_ = NAND ( new_n623_, new_n621_ ) -new_n647_ = OR ( new_n646_, new_n645_ ) -new_n648_ = NAND ( new_n646_, new_n645_ ) -new_n649_ = NAND ( new_n648_, new_n647_, new_n638_ ) -new_n650_ = OR ( new_n555_, new_n302_ ) -new_n651_ = OR ( new_n559_, new_n168_ ) -new_n652_ = NOT ( NET_69 ) -new_n653_ = OR ( NET_1308, new_n652_ ) -NET_597 = NAND ( new_n653_, new_n651_, new_n650_, new_n649_ ) -NET_78 = BUF ( NET_68 ) -NET_79 = BUF ( NET_69 ) -NET_80 = BUF ( NET_70 ) -NET_81 = BUF ( NET_71 ) -NET_82 = BUF ( NET_72 ) -NET_83 = BUF ( NET_73 ) -NET_84 = BUF ( NET_74 ) -NET_85 = BUF ( NET_75 ) diff --git a/ITC99BENCH/b06.bench b/ITC99BENCH/b06.bench deleted file mode 100644 index 3b85135..0000000 --- a/ITC99BENCH/b06.bench +++ /dev/null @@ -1,72 +0,0 @@ -# generated by verilog2bench.py https://gitea.yuhangq.com/YuhangQ/any2bench -INPUT(NET_1) -INPUT(NET_10) -INPUT(NET_11) -INPUT(NET_2) -INPUT(NET_3) -INPUT(NET_4) -INPUT(NET_5) -INPUT(NET_6) -INPUT(NET_7) -INPUT(NET_8) -INPUT(NET_9) -OUTPUT(NET_12) -OUTPUT(NET_13) -OUTPUT(NET_135) -OUTPUT(NET_136) -OUTPUT(NET_14) -OUTPUT(NET_15) -OUTPUT(NET_16) -OUTPUT(NET_17) -OUTPUT(NET_48) -OUTPUT(NET_49) -OUTPUT(NET_50) -OUTPUT(NET_51) -OUTPUT(NET_52) -OUTPUT(NET_57) -OUTPUT(NET_60) -new_n27_ = OR ( NET_5, NET_3 ) -new_n28_ = NOT ( NET_4 ) -new_n29_ = OR ( new_n28_, NET_1 ) -new_n30_ = OR ( new_n29_, new_n27_ ) -new_n31_ = NAND ( NET_5, NET_3 ) -new_n32_ = NOR ( new_n31_, new_n28_ ) -new_n33_ = OR ( new_n32_, NET_2 ) -NET_135 = NAND ( new_n33_, new_n30_ ) -new_n35_ = NOR ( new_n28_, NET_1 ) -new_n36_ = NOT ( NET_1 ) -new_n37_ = NOR ( NET_4, new_n36_ ) -new_n38_ = NOR ( new_n37_, new_n35_ ) -new_n39_ = NAND ( NET_4, NET_1 ) -new_n40_ = NAND ( new_n39_, NET_5 ) -NET_48 = AND ( new_n40_, new_n38_, NET_3 ) -new_n42_ = NOT ( NET_5 ) -new_n43_ = NAND ( new_n42_, new_n28_, NET_3 ) -new_n44_ = NOT ( NET_3 ) -new_n45_ = NAND ( NET_5, new_n28_, new_n44_, new_n36_ ) -new_n46_ = NAND ( NET_3, NET_1 ) -NET_49 = NAND ( new_n46_, new_n45_, new_n43_ ) -new_n48_ = OR ( new_n43_, NET_1 ) -new_n49_ = OR ( new_n27_, new_n28_ ) -new_n50_ = NAND ( NET_5, new_n44_, NET_1 ) -NET_50 = NAND ( new_n50_, new_n49_, new_n48_, new_n39_ ) -new_n52_ = OR ( new_n37_, new_n42_ ) -new_n53_ = OR ( new_n27_, NET_4 ) -NET_51 = NAND ( new_n53_, new_n52_, new_n29_ ) -new_n55_ = OR ( new_n39_, NET_3 ) -new_n56_ = AND ( new_n31_, new_n27_ ) -NET_52 = NAND ( new_n56_, new_n55_, new_n38_ ) -new_n58_ = NAND ( new_n56_, new_n28_ ) -new_n59_ = OR ( new_n39_, NET_5 ) -NET_57 = NAND ( new_n59_, new_n58_, new_n46_ ) -new_n61_ = XOR ( new_n31_, NET_4 ) -new_n62_ = OR ( new_n61_, new_n56_ ) -new_n63_ = NAND ( new_n62_, new_n58_ ) -NET_60 = NAND ( new_n63_, NET_1 ) -NET_12 = BUF ( NET_6 ) -NET_13 = BUF ( NET_7 ) -NET_136 = NAND ( new_n33_, new_n30_ ) -NET_14 = BUF ( NET_8 ) -NET_15 = BUF ( NET_9 ) -NET_16 = BUF ( NET_10 ) -NET_17 = BUF ( NET_11 ) diff --git a/ITC99BENCH/b07.bench b/ITC99BENCH/b07.bench deleted file mode 100644 index 79bf608..0000000 --- a/ITC99BENCH/b07.bench +++ /dev/null @@ -1,477 +0,0 @@ -# generated by verilog2bench.py https://gitea.yuhangq.com/YuhangQ/any2bench -INPUT(NET_1) -INPUT(NET_10) -INPUT(NET_11) -INPUT(NET_12) -INPUT(NET_13) -INPUT(NET_14) -INPUT(NET_15) -INPUT(NET_16) -INPUT(NET_17) -INPUT(NET_18) -INPUT(NET_19) -INPUT(NET_2) -INPUT(NET_20) -INPUT(NET_21) -INPUT(NET_22) -INPUT(NET_23) -INPUT(NET_24) -INPUT(NET_25) -INPUT(NET_26) -INPUT(NET_27) -INPUT(NET_28) -INPUT(NET_29) -INPUT(NET_3) -INPUT(NET_30) -INPUT(NET_31) -INPUT(NET_32) -INPUT(NET_33) -INPUT(NET_34) -INPUT(NET_35) -INPUT(NET_36) -INPUT(NET_37) -INPUT(NET_38) -INPUT(NET_39) -INPUT(NET_4) -INPUT(NET_40) -INPUT(NET_41) -INPUT(NET_42) -INPUT(NET_43) -INPUT(NET_44) -INPUT(NET_45) -INPUT(NET_46) -INPUT(NET_47) -INPUT(NET_48) -INPUT(NET_49) -INPUT(NET_5) -INPUT(NET_50) -INPUT(NET_6) -INPUT(NET_7) -INPUT(NET_8) -INPUT(NET_9) -OUTPUT(NET_183) -OUTPUT(NET_184) -OUTPUT(NET_185) -OUTPUT(NET_186) -OUTPUT(NET_189) -OUTPUT(NET_206) -OUTPUT(NET_209) -OUTPUT(NET_240) -OUTPUT(NET_241) -OUTPUT(NET_242) -OUTPUT(NET_243) -OUTPUT(NET_244) -OUTPUT(NET_249) -OUTPUT(NET_263) -OUTPUT(NET_289) -OUTPUT(NET_290) -OUTPUT(NET_291) -OUTPUT(NET_292) -OUTPUT(NET_328) -OUTPUT(NET_329) -OUTPUT(NET_330) -OUTPUT(NET_331) -OUTPUT(NET_341) -OUTPUT(NET_342) -OUTPUT(NET_343) -OUTPUT(NET_344) -OUTPUT(NET_353) -OUTPUT(NET_354) -OUTPUT(NET_355) -OUTPUT(NET_356) -OUTPUT(NET_369) -OUTPUT(NET_370) -OUTPUT(NET_371) -OUTPUT(NET_372) -OUTPUT(NET_382) -OUTPUT(NET_383) -OUTPUT(NET_384) -OUTPUT(NET_385) -OUTPUT(NET_395) -OUTPUT(NET_396) -OUTPUT(NET_397) -OUTPUT(NET_398) -OUTPUT(NET_410) -OUTPUT(NET_411) -OUTPUT(NET_412) -OUTPUT(NET_413) -OUTPUT(NET_418) -OUTPUT(NET_419) -OUTPUT(NET_420) -OUTPUT(NET_51) -OUTPUT(NET_52) -OUTPUT(NET_53) -OUTPUT(NET_54) -OUTPUT(NET_55) -OUTPUT(NET_56) -OUTPUT(NET_57) -OUTPUT(NET_58) -new_n108_ = NOT ( NET_23 ) -new_n109_ = NOT ( NET_24 ) -new_n110_ = NAND ( NET_25, new_n109_, new_n108_ ) -new_n111_ = OR ( new_n110_, NET_22 ) -new_n112_ = NOT ( NET_25 ) -new_n113_ = NAND ( new_n112_, NET_24, new_n108_, NET_22 ) -new_n114_ = NAND ( new_n113_, new_n111_ ) -new_n115_ = NOT ( NET_48 ) -new_n116_ = OR ( NET_50, NET_49 ) -new_n117_ = NOR ( new_n116_, new_n115_ ) -new_n118_ = NAND ( new_n117_, new_n114_ ) -new_n119_ = NOT ( NET_34 ) -new_n120_ = OR ( new_n117_, new_n119_ ) -NET_183 = NAND ( new_n120_, new_n118_ ) -new_n122_ = NOT ( NET_36 ) -new_n123_ = OR ( new_n117_, new_n122_ ) -NET_184 = NAND ( new_n123_, new_n118_ ) -new_n125_ = NOT ( NET_44 ) -new_n126_ = OR ( new_n117_, new_n125_ ) -NET_185 = NAND ( new_n126_, new_n118_ ) -new_n128_ = NOT ( NET_47 ) -new_n129_ = OR ( new_n117_, new_n128_ ) -NET_186 = NAND ( new_n129_, new_n118_ ) -new_n131_ = NOR ( new_n109_, NET_22 ) -new_n132_ = OR ( new_n131_, new_n112_, new_n108_ ) -new_n133_ = NAND ( new_n132_, new_n113_, new_n110_ ) -new_n134_ = NAND ( new_n133_, new_n117_ ) -new_n135_ = NOT ( NET_35 ) -new_n136_ = OR ( new_n117_, new_n135_ ) -NET_189 = NAND ( new_n136_, new_n134_ ) -new_n138_ = NAND ( NET_49, NET_48 ) -new_n139_ = NOT ( NET_18 ) -new_n140_ = NOT ( NET_19 ) -new_n141_ = NOR ( new_n112_, new_n109_ ) -new_n142_ = AND ( new_n141_, NET_23 ) -new_n143_ = NOT ( NET_20 ) -new_n144_ = NOT ( NET_21 ) -new_n145_ = AND ( NET_22, new_n144_, new_n143_ ) -new_n146_ = NAND ( new_n145_, new_n142_, new_n140_, new_n139_ ) -new_n147_ = NOR ( new_n146_, new_n138_ ) -new_n148_ = NOR ( NET_49, NET_48 ) -new_n149_ = NOR ( new_n148_, new_n147_ ) -new_n150_ = OR ( new_n149_, NET_1 ) -new_n151_ = NOR ( NET_50, NET_48 ) -new_n152_ = NOT ( new_n151_ ) -NET_206 = NAND ( new_n152_, new_n150_, new_n116_ ) -new_n154_ = NOT ( new_n114_ ) -new_n155_ = NAND ( new_n141_, new_n108_, NET_22 ) -new_n156_ = NAND ( new_n155_, new_n154_ ) -new_n157_ = NAND ( new_n156_, new_n117_ ) -new_n158_ = NOT ( NET_46 ) -new_n159_ = OR ( new_n117_, new_n158_ ) -NET_209 = NAND ( new_n159_, new_n157_ ) -new_n161_ = NOT ( NET_49 ) -new_n162_ = NOT ( NET_1 ) -new_n163_ = NOR ( new_n146_, new_n162_ ) -new_n164_ = NOR ( new_n163_, new_n161_ ) -new_n165_ = OR ( new_n164_, new_n115_ ) -new_n166_ = NOT ( NET_50 ) -new_n167_ = NOR ( new_n166_, new_n161_ ) -new_n168_ = NOT ( new_n167_ ) -NET_240 = NAND ( new_n168_, new_n165_ ) -new_n170_ = NAND ( new_n146_, NET_49, NET_48 ) -new_n171_ = NAND ( NET_50, new_n115_, NET_1 ) -new_n172_ = NAND ( new_n171_, new_n170_, new_n168_ ) -NET_241 = NOR ( new_n172_, new_n139_ ) -NET_242 = NOR ( new_n172_, new_n140_ ) -NET_243 = NOR ( new_n172_, new_n143_ ) -NET_244 = NOR ( new_n172_, new_n144_ ) -new_n177_ = NOT ( NET_22 ) -new_n178_ = NAND ( new_n109_, new_n108_, new_n177_ ) -new_n179_ = NAND ( new_n178_, new_n155_, new_n154_ ) -new_n180_ = NAND ( new_n179_, new_n117_ ) -new_n181_ = NOT ( NET_45 ) -new_n182_ = OR ( new_n117_, new_n181_ ) -NET_249 = NAND ( new_n182_, new_n180_ ) -new_n184_ = NOR ( new_n146_, NET_1 ) -new_n185_ = NOR ( new_n184_, NET_50 ) -new_n186_ = NOR ( new_n185_, new_n151_ ) -new_n187_ = OR ( new_n186_, new_n161_ ) -new_n188_ = NAND ( NET_50, new_n161_, NET_1 ) -new_n189_ = NAND ( NET_50, NET_48 ) -NET_263 = NAND ( new_n189_, new_n188_, new_n187_ ) -new_n191_ = NOT ( new_n148_ ) -new_n192_ = NAND ( new_n172_, new_n191_ ) -new_n193_ = NOT ( new_n192_ ) -new_n194_ = NAND ( new_n193_, new_n142_, new_n177_ ) -new_n195_ = OR ( new_n148_, new_n142_ ) -new_n196_ = NAND ( new_n195_, new_n172_ ) -new_n197_ = NAND ( new_n196_, NET_22 ) -NET_289 = NAND ( new_n197_, new_n194_ ) -new_n199_ = NAND ( new_n193_, new_n141_, new_n108_ ) -new_n200_ = OR ( new_n148_, new_n141_ ) -new_n201_ = NAND ( new_n200_, new_n172_ ) -new_n202_ = NAND ( new_n201_, NET_23 ) -NET_290 = NAND ( new_n202_, new_n199_ ) -new_n204_ = NAND ( new_n193_, NET_25, new_n109_ ) -new_n205_ = OR ( new_n148_, NET_25 ) -new_n206_ = NAND ( new_n205_, new_n172_ ) -new_n207_ = NAND ( new_n206_, NET_24 ) -NET_291 = NAND ( new_n207_, new_n204_ ) -new_n209_ = OR ( new_n192_, NET_25 ) -new_n210_ = OR ( new_n172_, new_n112_ ) -NET_292 = NAND ( new_n210_, new_n209_ ) -new_n212_ = NOT ( NET_17 ) -new_n213_ = NOR ( new_n191_, new_n166_ ) -new_n214_ = NOR ( new_n213_, new_n147_ ) -new_n215_ = NOR ( new_n214_, NET_1 ) -new_n216_ = NOT ( NET_33 ) -new_n217_ = NOR ( NET_31, NET_30 ) -new_n218_ = NOR ( NET_29, NET_28, NET_27, NET_26 ) -new_n219_ = NAND ( new_n218_, new_n217_, new_n216_, NET_32 ) -new_n220_ = NAND ( new_n219_, new_n215_, NET_48 ) -new_n221_ = OR ( new_n220_, new_n212_ ) -new_n222_ = NOT ( NET_9 ) -new_n223_ = OR ( new_n215_, new_n222_ ) -new_n224_ = NAND ( new_n166_, new_n161_, NET_40 ) -new_n225_ = OR ( new_n189_, new_n181_ ) -new_n226_ = OR ( NET_48, new_n216_ ) -new_n227_ = NAND ( new_n226_, new_n225_, new_n224_, new_n138_ ) -new_n228_ = OR ( new_n138_, new_n212_ ) -new_n229_ = NAND ( new_n166_, NET_49, NET_48 ) -new_n230_ = NAND ( new_n229_, NET_33 ) -new_n231_ = NAND ( new_n230_, new_n228_ ) -new_n232_ = AND ( new_n231_, new_n227_ ) -new_n233_ = NOR ( new_n231_, new_n227_ ) -new_n234_ = OR ( new_n233_, new_n232_ ) -new_n235_ = NAND ( new_n215_, NET_48 ) -new_n236_ = NOR ( new_n219_, new_n235_ ) -new_n237_ = NOT ( new_n236_ ) -new_n238_ = OR ( new_n237_, new_n234_ ) -NET_328 = NAND ( new_n238_, new_n223_, new_n221_ ) -new_n240_ = NAND ( new_n148_, NET_50, NET_1 ) -new_n241_ = OR ( new_n219_, new_n170_ ) -new_n242_ = NAND ( new_n241_, new_n240_ ) -new_n243_ = NAND ( new_n242_, NET_48 ) -new_n244_ = OR ( new_n243_, new_n234_ ) -new_n245_ = OR ( new_n242_, new_n212_ ) -NET_329 = NAND ( new_n245_, new_n244_ ) -new_n247_ = NOR ( NET_49, new_n115_ ) -new_n248_ = NOT ( new_n247_ ) -new_n249_ = OR ( new_n248_, new_n234_ ) -new_n250_ = NOR ( new_n151_, new_n161_ ) -new_n251_ = NOR ( new_n250_, new_n148_ ) -new_n252_ = OR ( new_n251_, new_n216_ ) -new_n253_ = AND ( new_n251_, new_n115_ ) -new_n254_ = NAND ( new_n253_, new_n179_ ) -NET_330 = NAND ( new_n254_, new_n252_, new_n249_ ) -new_n256_ = NAND ( new_n168_, NET_40 ) -new_n257_ = OR ( new_n234_, new_n168_ ) -NET_331 = NAND ( new_n257_, new_n256_ ) -new_n259_ = NOT ( NET_16 ) -new_n260_ = OR ( new_n138_, new_n259_ ) -new_n261_ = NAND ( new_n229_, NET_32 ) -new_n262_ = NAND ( new_n261_, new_n260_ ) -new_n263_ = NOR ( new_n262_, new_n232_ ) -new_n264_ = NOT ( new_n232_ ) -new_n265_ = NOT ( new_n262_ ) -new_n266_ = NOR ( new_n265_, new_n264_ ) -new_n267_ = NAND ( new_n166_, new_n161_, NET_39 ) -new_n268_ = NOT ( NET_32 ) -new_n269_ = OR ( NET_48, new_n268_ ) -new_n270_ = OR ( new_n189_, new_n135_ ) -new_n271_ = NAND ( new_n270_, new_n269_, new_n267_ ) -new_n272_ = OR ( new_n271_, new_n266_, new_n263_ ) -new_n273_ = NAND ( new_n271_, new_n264_ ) -new_n274_ = NAND ( new_n273_, new_n265_ ) -new_n275_ = NAND ( new_n271_, new_n232_ ) -new_n276_ = NAND ( new_n275_, new_n262_ ) -new_n277_ = NAND ( new_n276_, new_n274_ ) -new_n278_ = NAND ( new_n277_, new_n272_ ) -new_n279_ = NAND ( new_n278_, new_n236_ ) -new_n280_ = NOT ( NET_8 ) -new_n281_ = OR ( new_n215_, new_n280_ ) -new_n282_ = OR ( new_n220_, new_n259_ ) -NET_341 = NAND ( new_n282_, new_n281_, new_n279_ ) -new_n284_ = NOT ( new_n243_ ) -new_n285_ = NAND ( new_n278_, new_n284_ ) -new_n286_ = OR ( new_n242_, new_n259_ ) -NET_342 = NAND ( new_n286_, new_n285_ ) -new_n288_ = NAND ( new_n278_, new_n247_ ) -new_n289_ = NAND ( new_n253_, new_n114_ ) -new_n290_ = NOR ( new_n131_, new_n108_ ) -new_n291_ = OR ( new_n290_, new_n109_ ) -new_n292_ = NAND ( new_n291_, new_n253_, NET_25 ) -new_n293_ = OR ( new_n251_, new_n268_ ) -NET_343 = NAND ( new_n293_, new_n292_, new_n289_, new_n288_ ) -new_n295_ = NAND ( new_n168_, NET_39 ) -new_n296_ = NAND ( new_n278_, new_n167_ ) -NET_344 = NAND ( new_n296_, new_n295_ ) -new_n298_ = NOT ( NET_15 ) -new_n299_ = OR ( new_n138_, new_n298_ ) -new_n300_ = NAND ( new_n229_, NET_31 ) -new_n301_ = NAND ( new_n300_, new_n299_ ) -new_n302_ = NAND ( new_n166_, new_n161_, NET_43 ) -new_n303_ = NOT ( NET_31 ) -new_n304_ = OR ( NET_48, new_n303_ ) -new_n305_ = OR ( new_n189_, new_n158_ ) -new_n306_ = NAND ( new_n305_, new_n304_, new_n302_ ) -new_n307_ = NAND ( new_n306_, new_n301_ ) -new_n308_ = OR ( new_n306_, new_n301_ ) -new_n309_ = NAND ( new_n308_, new_n307_ ) -new_n310_ = OR ( new_n271_, new_n232_ ) -new_n311_ = NAND ( new_n310_, new_n262_ ) -new_n312_ = NAND ( new_n311_, new_n275_ ) -new_n313_ = XOR ( new_n312_, new_n309_ ) -new_n314_ = OR ( new_n313_, new_n237_ ) -new_n315_ = NOT ( NET_7 ) -new_n316_ = OR ( new_n215_, new_n315_ ) -new_n317_ = OR ( new_n220_, new_n298_ ) -NET_353 = NAND ( new_n317_, new_n316_, new_n314_ ) -new_n319_ = OR ( new_n313_, new_n243_ ) -new_n320_ = OR ( new_n242_, new_n298_ ) -NET_354 = NAND ( new_n320_, new_n319_ ) -new_n322_ = OR ( new_n313_, new_n248_ ) -new_n323_ = OR ( new_n251_, new_n303_ ) -new_n324_ = NAND ( new_n253_, new_n156_ ) -NET_355 = NAND ( new_n324_, new_n323_, new_n322_ ) -new_n326_ = NAND ( new_n168_, NET_43 ) -new_n327_ = OR ( new_n313_, new_n168_ ) -NET_356 = NAND ( new_n327_, new_n326_ ) -new_n329_ = NOT ( NET_14 ) -new_n330_ = OR ( new_n138_, new_n329_ ) -new_n331_ = NAND ( new_n229_, NET_30 ) -new_n332_ = NAND ( new_n331_, new_n330_ ) -new_n333_ = NAND ( new_n166_, new_n161_, NET_37 ) -new_n334_ = NOT ( NET_30 ) -new_n335_ = OR ( NET_48, new_n334_ ) -new_n336_ = OR ( new_n189_, new_n119_ ) -new_n337_ = NAND ( new_n336_, new_n335_, new_n333_ ) -new_n338_ = NAND ( new_n337_, new_n332_ ) -new_n339_ = OR ( new_n337_, new_n332_ ) -new_n340_ = NAND ( new_n339_, new_n338_ ) -new_n341_ = NAND ( new_n312_, new_n308_ ) -new_n342_ = NAND ( new_n341_, new_n340_, new_n307_ ) -new_n343_ = NAND ( new_n341_, new_n307_ ) -new_n344_ = NAND ( new_n343_, new_n339_, new_n338_ ) -new_n345_ = NAND ( new_n344_, new_n342_ ) -new_n346_ = OR ( new_n345_, new_n237_ ) -new_n347_ = NOT ( NET_6 ) -new_n348_ = OR ( new_n215_, new_n347_ ) -new_n349_ = OR ( new_n220_, new_n329_ ) -NET_369 = NAND ( new_n349_, new_n348_, new_n346_ ) -new_n351_ = OR ( new_n345_, new_n243_ ) -new_n352_ = OR ( new_n242_, new_n329_ ) -NET_370 = NAND ( new_n352_, new_n351_ ) -new_n354_ = OR ( new_n345_, new_n248_ ) -new_n355_ = OR ( new_n251_, new_n334_ ) -NET_371 = NAND ( new_n355_, new_n354_, new_n289_ ) -new_n357_ = NAND ( new_n168_, NET_37 ) -new_n358_ = OR ( new_n345_, new_n168_ ) -NET_372 = NAND ( new_n358_, new_n357_ ) -new_n360_ = NAND ( new_n166_, new_n161_, NET_41 ) -new_n361_ = NOT ( NET_29 ) -new_n362_ = OR ( NET_48, new_n361_ ) -new_n363_ = OR ( new_n189_, new_n125_ ) -new_n364_ = NAND ( new_n363_, new_n362_, new_n360_ ) -new_n365_ = NOT ( NET_13 ) -new_n366_ = OR ( new_n138_, new_n365_ ) -new_n367_ = NAND ( new_n229_, NET_29 ) -new_n368_ = NAND ( new_n367_, new_n366_ ) -new_n369_ = NAND ( new_n368_, new_n364_ ) -new_n370_ = OR ( new_n368_, new_n364_ ) -new_n371_ = NAND ( new_n370_, new_n369_ ) -new_n372_ = NAND ( new_n343_, new_n339_ ) -new_n373_ = NAND ( new_n372_, new_n338_ ) -new_n374_ = XOR ( new_n373_, new_n371_ ) -new_n375_ = OR ( new_n374_, new_n237_ ) -new_n376_ = NOT ( NET_5 ) -new_n377_ = OR ( new_n215_, new_n376_ ) -new_n378_ = OR ( new_n220_, new_n365_ ) -NET_382 = NAND ( new_n378_, new_n377_, new_n375_ ) -new_n380_ = OR ( new_n374_, new_n243_ ) -new_n381_ = OR ( new_n242_, new_n365_ ) -NET_383 = NAND ( new_n381_, new_n380_ ) -new_n383_ = OR ( new_n374_, new_n248_ ) -new_n384_ = OR ( new_n251_, new_n361_ ) -NET_384 = NAND ( new_n384_, new_n383_, new_n289_ ) -new_n386_ = NAND ( new_n168_, NET_41 ) -new_n387_ = OR ( new_n374_, new_n168_ ) -NET_385 = NAND ( new_n387_, new_n386_ ) -new_n389_ = NAND ( new_n166_, new_n161_, NET_38 ) -new_n390_ = NOT ( NET_28 ) -new_n391_ = OR ( NET_48, new_n390_ ) -new_n392_ = OR ( new_n189_, new_n122_ ) -new_n393_ = NAND ( new_n392_, new_n391_, new_n389_ ) -new_n394_ = NOT ( NET_12 ) -new_n395_ = OR ( new_n138_, new_n394_ ) -new_n396_ = NAND ( new_n229_, NET_28 ) -new_n397_ = NAND ( new_n396_, new_n395_ ) -new_n398_ = OR ( new_n397_, new_n393_ ) -new_n399_ = NAND ( new_n397_, new_n393_ ) -new_n400_ = NAND ( new_n399_, new_n398_ ) -new_n401_ = NAND ( new_n369_, new_n372_, new_n338_ ) -new_n402_ = NAND ( new_n401_, new_n370_ ) -new_n403_ = XNOR ( new_n402_, new_n400_ ) -new_n404_ = OR ( new_n403_, new_n237_ ) -new_n405_ = NOT ( NET_4 ) -new_n406_ = OR ( new_n215_, new_n405_ ) -new_n407_ = OR ( new_n220_, new_n394_ ) -NET_395 = NAND ( new_n407_, new_n406_, new_n404_ ) -new_n409_ = OR ( new_n403_, new_n243_ ) -new_n410_ = OR ( new_n242_, new_n394_ ) -NET_396 = NAND ( new_n410_, new_n409_ ) -new_n412_ = OR ( new_n403_, new_n248_ ) -new_n413_ = OR ( new_n251_, new_n390_ ) -NET_397 = NAND ( new_n413_, new_n412_, new_n289_ ) -new_n415_ = NAND ( new_n168_, NET_38 ) -new_n416_ = OR ( new_n403_, new_n168_ ) -NET_398 = NAND ( new_n416_, new_n415_ ) -new_n418_ = NAND ( new_n166_, new_n161_, NET_42 ) -new_n419_ = NOT ( NET_27 ) -new_n420_ = OR ( NET_48, new_n419_ ) -new_n421_ = OR ( new_n189_, new_n128_ ) -new_n422_ = NAND ( new_n421_, new_n420_, new_n418_ ) -new_n423_ = NOT ( NET_11 ) -new_n424_ = OR ( new_n138_, new_n423_ ) -new_n425_ = NAND ( new_n229_, NET_27 ) -new_n426_ = NAND ( new_n425_, new_n424_ ) -new_n427_ = NAND ( new_n426_, new_n422_ ) -new_n428_ = NOR ( new_n426_, new_n422_ ) -new_n429_ = NOT ( new_n428_ ) -new_n430_ = NAND ( new_n429_, new_n427_ ) -new_n431_ = NAND ( new_n402_, new_n399_ ) -new_n432_ = NAND ( new_n431_, new_n398_ ) -new_n433_ = XNOR ( new_n432_, new_n430_ ) -new_n434_ = OR ( new_n433_, new_n237_ ) -new_n435_ = NOT ( NET_3 ) -new_n436_ = OR ( new_n215_, new_n435_ ) -new_n437_ = OR ( new_n220_, new_n423_ ) -NET_410 = NAND ( new_n437_, new_n436_, new_n434_ ) -new_n439_ = OR ( new_n433_, new_n243_ ) -new_n440_ = OR ( new_n242_, new_n423_ ) -NET_411 = NAND ( new_n440_, new_n439_ ) -new_n442_ = OR ( new_n433_, new_n248_ ) -new_n443_ = OR ( new_n251_, new_n419_ ) -NET_412 = NAND ( new_n443_, new_n442_, new_n289_ ) -new_n445_ = NAND ( new_n168_, NET_42 ) -new_n446_ = OR ( new_n433_, new_n168_ ) -NET_413 = NAND ( new_n446_, new_n445_ ) -new_n448_ = NAND ( new_n432_, new_n427_ ) -new_n449_ = AND ( new_n448_, new_n429_ ) -new_n450_ = NOT ( NET_10 ) -new_n451_ = OR ( new_n138_, new_n450_ ) -new_n452_ = OR ( new_n451_, new_n449_ ) -new_n453_ = OR ( new_n432_, new_n428_ ) -new_n454_ = NAND ( new_n453_, new_n427_ ) -new_n455_ = NAND ( new_n454_, new_n451_ ) -new_n456_ = NAND ( new_n455_, new_n452_ ) -new_n457_ = NAND ( new_n456_, new_n236_ ) -new_n458_ = NOT ( NET_2 ) -new_n459_ = OR ( new_n215_, new_n458_ ) -new_n460_ = OR ( new_n220_, new_n450_ ) -NET_418 = NAND ( new_n460_, new_n459_, new_n457_ ) -new_n462_ = NAND ( new_n456_, new_n284_ ) -new_n463_ = OR ( new_n242_, new_n450_ ) -NET_419 = NAND ( new_n463_, new_n462_ ) -new_n465_ = NAND ( new_n456_, new_n247_ ) -new_n466_ = NOT ( NET_26 ) -new_n467_ = OR ( new_n251_, new_n466_ ) -NET_420 = NAND ( new_n467_, new_n465_, new_n289_ ) -NET_51 = BUF ( NET_2 ) -NET_52 = BUF ( NET_3 ) -NET_53 = BUF ( NET_4 ) -NET_54 = BUF ( NET_5 ) -NET_55 = BUF ( NET_6 ) -NET_56 = BUF ( NET_7 ) -NET_57 = BUF ( NET_8 ) -NET_58 = BUF ( NET_9 ) diff --git a/ITC99BENCH/b08.bench b/ITC99BENCH/b08.bench deleted file mode 100644 index f87f27d..0000000 --- a/ITC99BENCH/b08.bench +++ /dev/null @@ -1,193 +0,0 @@ -# generated by verilog2bench.py https://gitea.yuhangq.com/YuhangQ/any2bench -INPUT(NET_1) -INPUT(NET_10) -INPUT(NET_11) -INPUT(NET_12) -INPUT(NET_13) -INPUT(NET_14) -INPUT(NET_15) -INPUT(NET_16) -INPUT(NET_17) -INPUT(NET_18) -INPUT(NET_19) -INPUT(NET_2) -INPUT(NET_20) -INPUT(NET_21) -INPUT(NET_22) -INPUT(NET_23) -INPUT(NET_24) -INPUT(NET_25) -INPUT(NET_26) -INPUT(NET_27) -INPUT(NET_28) -INPUT(NET_29) -INPUT(NET_3) -INPUT(NET_30) -INPUT(NET_4) -INPUT(NET_5) -INPUT(NET_6) -INPUT(NET_7) -INPUT(NET_8) -INPUT(NET_9) -OUTPUT(NET_103) -OUTPUT(NET_119) -OUTPUT(NET_120) -OUTPUT(NET_123) -OUTPUT(NET_135) -OUTPUT(NET_136) -OUTPUT(NET_137) -OUTPUT(NET_138) -OUTPUT(NET_144) -OUTPUT(NET_162) -OUTPUT(NET_163) -OUTPUT(NET_166) -OUTPUT(NET_167) -OUTPUT(NET_31) -OUTPUT(NET_32) -OUTPUT(NET_33) -OUTPUT(NET_34) -OUTPUT(NET_91) -OUTPUT(NET_92) -OUTPUT(NET_93) -OUTPUT(NET_94) -OUTPUT(NET_95) -OUTPUT(NET_96) -OUTPUT(NET_97) -OUTPUT(NET_98) -new_n56_ = NOT ( NET_11 ) -new_n57_ = NOT ( NET_12 ) -new_n58_ = NAND ( NET_14, NET_13 ) -new_n59_ = OR ( new_n58_, new_n57_ ) -new_n60_ = NOR ( new_n59_, NET_1 ) -new_n61_ = NOR ( new_n60_, new_n56_ ) -new_n62_ = NOT ( NET_10 ) -new_n63_ = NOR ( NET_11, new_n62_ ) -new_n64_ = NOR ( new_n56_, NET_10 ) -NET_103 = OR ( new_n64_, new_n63_, new_n61_ ) -new_n66_ = OR ( new_n59_, new_n62_ ) -new_n67_ = NAND ( new_n66_, NET_11 ) -new_n68_ = AND ( new_n67_, NET_1 ) -NET_119 = OR ( new_n68_, new_n63_ ) -new_n70_ = NOT ( NET_13 ) -new_n71_ = OR ( NET_14, new_n70_ ) -new_n72_ = OR ( new_n71_, new_n62_ ) -new_n73_ = NOR ( new_n56_, new_n62_ ) -new_n74_ = NAND ( new_n73_, NET_14 ) -new_n75_ = NAND ( new_n74_, new_n70_ ) -new_n76_ = OR ( new_n67_, new_n70_ ) -new_n77_ = NAND ( new_n76_, new_n75_ ) -NET_120 = NAND ( new_n77_, new_n72_ ) -new_n79_ = NOT ( NET_14 ) -new_n80_ = NAND ( new_n73_, new_n79_ ) -new_n81_ = NAND ( new_n67_, NET_14 ) -NET_123 = NAND ( new_n81_, new_n80_ ) -new_n83_ = NAND ( new_n73_, new_n60_ ) -new_n84_ = NAND ( new_n83_, NET_27 ) -new_n85_ = NOT ( NET_23 ) -new_n86_ = OR ( new_n83_, new_n85_ ) -NET_135 = NAND ( new_n86_, new_n84_ ) -new_n88_ = NAND ( new_n83_, NET_28 ) -new_n89_ = NOT ( NET_24 ) -new_n90_ = OR ( new_n83_, new_n89_ ) -NET_136 = NAND ( new_n90_, new_n88_ ) -new_n92_ = NAND ( new_n83_, NET_29 ) -new_n93_ = NOT ( NET_25 ) -new_n94_ = OR ( new_n83_, new_n93_ ) -NET_137 = NAND ( new_n94_, new_n92_ ) -new_n96_ = NAND ( new_n83_, NET_30 ) -new_n97_ = NOT ( NET_26 ) -new_n98_ = OR ( new_n83_, new_n97_ ) -NET_138 = NAND ( new_n98_, new_n96_ ) -new_n100_ = OR ( new_n64_, new_n57_ ) -new_n101_ = NAND ( new_n73_, NET_14, NET_13, new_n57_ ) -NET_144 = NAND ( new_n101_, new_n100_ ) -new_n103_ = NAND ( new_n79_, NET_13, new_n57_ ) -new_n104_ = NAND ( new_n79_, new_n70_, NET_12 ) -new_n105_ = AND ( new_n104_, new_n103_, new_n59_ ) -new_n106_ = NOT ( NET_21 ) -new_n107_ = NAND ( new_n106_, new_n79_, NET_13, NET_12 ) -new_n108_ = NAND ( NET_14, new_n70_, new_n57_ ) -new_n109_ = NAND ( new_n79_, new_n70_, new_n57_ ) -new_n110_ = OR ( new_n58_, NET_12 ) -new_n111_ = OR ( NET_13, new_n57_ ) -new_n112_ = AND ( new_n111_, new_n110_ ) -new_n113_ = AND ( new_n112_, new_n109_ ) -new_n114_ = NAND ( new_n113_, new_n108_, new_n59_, NET_22 ) -new_n115_ = NOT ( NET_15 ) -new_n116_ = OR ( new_n111_, new_n79_ ) -new_n117_ = AND ( new_n109_, new_n108_, new_n105_ ) -new_n118_ = NAND ( new_n117_, new_n116_, new_n115_ ) -new_n119_ = NOT ( NET_20 ) -new_n120_ = NAND ( new_n79_, NET_13, NET_12 ) -new_n121_ = NAND ( new_n120_, new_n117_, new_n119_ ) -new_n122_ = NAND ( new_n121_, new_n118_, new_n114_, new_n107_ ) -new_n123_ = NAND ( new_n120_, new_n113_, NET_16 ) -new_n124_ = NOT ( NET_17 ) -new_n125_ = AND ( new_n120_, new_n105_, new_n110_ ) -new_n126_ = NAND ( new_n125_, new_n116_, new_n124_ ) -new_n127_ = NOT ( NET_16 ) -new_n128_ = NAND ( new_n125_, new_n108_, new_n127_ ) -new_n129_ = NAND ( new_n128_, new_n126_, new_n123_ ) -new_n130_ = NAND ( new_n113_, new_n59_, NET_20 ) -new_n131_ = NAND ( new_n120_, new_n103_ ) -new_n132_ = NOT ( NET_22 ) -new_n133_ = NAND ( new_n109_, new_n110_, new_n59_, new_n132_ ) -new_n134_ = OR ( new_n133_, new_n131_ ) -new_n135_ = NAND ( new_n112_, new_n71_, NET_15 ) -new_n136_ = NOT ( NET_19 ) -new_n137_ = NAND ( NET_14, NET_12 ) -new_n138_ = OR ( new_n70_, NET_12 ) -new_n139_ = NAND ( new_n138_, new_n137_, new_n136_ ) -new_n140_ = AND ( new_n139_, new_n135_, new_n134_, new_n63_ ) -new_n141_ = NAND ( new_n113_, new_n108_, NET_18 ) -new_n142_ = NAND ( new_n120_, new_n113_, new_n59_, NET_21 ) -new_n143_ = NAND ( new_n142_, new_n141_, new_n140_, new_n130_ ) -new_n144_ = NAND ( NET_17, new_n79_, NET_13, NET_12 ) -new_n145_ = NOT ( NET_18 ) -new_n146_ = NAND ( new_n145_, NET_14, NET_13, new_n57_ ) -new_n147_ = NAND ( new_n146_, new_n144_ ) -new_n148_ = NOR ( new_n147_, new_n143_, new_n129_, new_n122_ ) -new_n149_ = OR ( new_n148_, new_n64_ ) -new_n150_ = NAND ( new_n149_, NET_10 ) -new_n151_ = OR ( new_n150_, new_n105_ ) -new_n152_ = AND ( new_n149_, new_n62_ ) -new_n153_ = OR ( new_n152_, new_n89_ ) -NET_162 = NAND ( new_n153_, new_n151_ ) -new_n155_ = NAND ( new_n149_, new_n131_, NET_10 ) -new_n156_ = OR ( new_n152_, new_n97_ ) -NET_163 = NAND ( new_n156_, new_n155_ ) -new_n158_ = OR ( new_n150_, NET_14 ) -new_n159_ = OR ( new_n152_, new_n85_ ) -new_n160_ = OR ( new_n150_, new_n112_ ) -NET_166 = NAND ( new_n160_, new_n159_, new_n158_ ) -new_n162_ = OR ( new_n150_, NET_12 ) -new_n163_ = OR ( new_n152_, new_n93_ ) -NET_167 = NAND ( new_n163_, new_n162_, new_n158_ ) -new_n165_ = NAND ( new_n64_, NET_2 ) -new_n166_ = OR ( new_n64_, new_n115_ ) -NET_91 = NAND ( new_n166_, new_n165_ ) -new_n168_ = NAND ( new_n64_, NET_3 ) -new_n169_ = OR ( new_n64_, new_n127_ ) -NET_92 = NAND ( new_n169_, new_n168_ ) -new_n171_ = NAND ( new_n64_, NET_4 ) -new_n172_ = OR ( new_n64_, new_n124_ ) -NET_93 = NAND ( new_n172_, new_n171_ ) -new_n174_ = NAND ( new_n64_, NET_5 ) -new_n175_ = OR ( new_n64_, new_n145_ ) -NET_94 = NAND ( new_n175_, new_n174_ ) -new_n177_ = NAND ( new_n64_, NET_6 ) -new_n178_ = OR ( new_n64_, new_n136_ ) -NET_95 = NAND ( new_n178_, new_n177_ ) -new_n180_ = NAND ( new_n64_, NET_7 ) -new_n181_ = OR ( new_n64_, new_n119_ ) -NET_96 = NAND ( new_n181_, new_n180_ ) -new_n183_ = NAND ( new_n64_, NET_8 ) -new_n184_ = OR ( new_n64_, new_n106_ ) -NET_97 = NAND ( new_n184_, new_n183_ ) -new_n186_ = NAND ( new_n64_, NET_9 ) -new_n187_ = OR ( new_n64_, new_n132_ ) -NET_98 = NAND ( new_n187_, new_n186_ ) -NET_31 = BUF ( NET_27 ) -NET_32 = BUF ( NET_28 ) -NET_33 = BUF ( NET_29 ) -NET_34 = BUF ( NET_30 ) diff --git a/ITC99BENCH/b09.bench b/ITC99BENCH/b09.bench deleted file mode 100644 index 1d342bc..0000000 --- a/ITC99BENCH/b09.bench +++ /dev/null @@ -1,172 +0,0 @@ -# generated by verilog2bench.py https://gitea.yuhangq.com/YuhangQ/any2bench -INPUT(NET_1) -INPUT(NET_10) -INPUT(NET_11) -INPUT(NET_12) -INPUT(NET_13) -INPUT(NET_14) -INPUT(NET_15) -INPUT(NET_16) -INPUT(NET_17) -INPUT(NET_18) -INPUT(NET_19) -INPUT(NET_2) -INPUT(NET_20) -INPUT(NET_21) -INPUT(NET_22) -INPUT(NET_23) -INPUT(NET_24) -INPUT(NET_25) -INPUT(NET_26) -INPUT(NET_27) -INPUT(NET_28) -INPUT(NET_29) -INPUT(NET_3) -INPUT(NET_4) -INPUT(NET_5) -INPUT(NET_6) -INPUT(NET_7) -INPUT(NET_8) -INPUT(NET_9) -OUTPUT(NET_102) -OUTPUT(NET_103) -OUTPUT(NET_104) -OUTPUT(NET_105) -OUTPUT(NET_106) -OUTPUT(NET_107) -OUTPUT(NET_108) -OUTPUT(NET_109) -OUTPUT(NET_110) -OUTPUT(NET_111) -OUTPUT(NET_116) -OUTPUT(NET_117) -OUTPUT(NET_118) -OUTPUT(NET_119) -OUTPUT(NET_120) -OUTPUT(NET_121) -OUTPUT(NET_122) -OUTPUT(NET_123) -OUTPUT(NET_136) -OUTPUT(NET_152) -OUTPUT(NET_153) -OUTPUT(NET_154) -OUTPUT(NET_155) -OUTPUT(NET_156) -OUTPUT(NET_157) -OUTPUT(NET_158) -OUTPUT(NET_159) -OUTPUT(NET_30) -OUTPUT(NET_45) -new_n59_ = XNOR ( NET_22, NET_11 ) -new_n60_ = XNOR ( NET_28, NET_17 ) -new_n61_ = XNOR ( NET_21, NET_10 ) -new_n62_ = XNOR ( NET_27, NET_16 ) -new_n63_ = NAND ( new_n62_, new_n61_, new_n60_, new_n59_ ) -new_n64_ = XNOR ( NET_26, NET_15 ) -new_n65_ = XNOR ( NET_24, NET_13 ) -new_n66_ = XNOR ( NET_25, NET_14 ) -new_n67_ = XNOR ( NET_23, NET_12 ) -new_n68_ = NAND ( new_n67_, new_n66_, new_n65_, new_n64_ ) -new_n69_ = NOR ( new_n68_, new_n63_ ) -new_n70_ = NAND ( new_n69_, NET_20, NET_19 ) -new_n71_ = NOT ( NET_19 ) -new_n72_ = NOR ( NET_29, new_n71_ ) -new_n73_ = OR ( new_n72_, NET_20 ) -new_n74_ = NOT ( NET_20 ) -new_n75_ = OR ( NET_29, new_n74_ ) -NET_102 = NAND ( new_n75_, new_n73_, new_n70_ ) -new_n77_ = NOT ( NET_21 ) -new_n78_ = NAND ( NET_29, NET_20 ) -new_n79_ = OR ( new_n78_, new_n77_ ) -new_n80_ = OR ( NET_20, NET_19 ) -new_n81_ = NAND ( new_n80_, new_n78_, NET_10 ) -NET_103 = NAND ( new_n81_, new_n79_ ) -new_n83_ = NOT ( NET_22 ) -new_n84_ = OR ( new_n78_, new_n83_ ) -new_n85_ = NAND ( new_n80_, new_n78_, NET_11 ) -NET_104 = NAND ( new_n85_, new_n84_ ) -new_n87_ = NOT ( NET_23 ) -new_n88_ = OR ( new_n78_, new_n87_ ) -new_n89_ = NAND ( new_n80_, new_n78_, NET_12 ) -NET_105 = NAND ( new_n89_, new_n88_ ) -new_n91_ = NOT ( NET_24 ) -new_n92_ = OR ( new_n78_, new_n91_ ) -new_n93_ = NAND ( new_n80_, new_n78_, NET_13 ) -NET_106 = NAND ( new_n93_, new_n92_ ) -new_n95_ = NOT ( NET_25 ) -new_n96_ = OR ( new_n78_, new_n95_ ) -new_n97_ = NAND ( new_n80_, new_n78_, NET_14 ) -NET_107 = NAND ( new_n97_, new_n96_ ) -new_n99_ = NOT ( NET_26 ) -new_n100_ = OR ( new_n78_, new_n99_ ) -new_n101_ = NAND ( new_n80_, new_n78_, NET_15 ) -NET_108 = NAND ( new_n101_, new_n100_ ) -new_n103_ = NOT ( NET_27 ) -new_n104_ = OR ( new_n78_, new_n103_ ) -new_n105_ = NAND ( new_n80_, new_n78_, NET_16 ) -NET_109 = NAND ( new_n105_, new_n104_ ) -new_n107_ = NOT ( NET_28 ) -new_n108_ = OR ( new_n78_, new_n107_ ) -new_n109_ = NAND ( new_n80_, new_n78_, NET_17 ) -NET_110 = NAND ( new_n109_, new_n108_ ) -new_n111_ = OR ( new_n78_, new_n69_ ) -new_n112_ = NOR ( NET_29, NET_18 ) -new_n113_ = OR ( new_n74_, NET_19 ) -new_n114_ = OR ( new_n113_, new_n112_ ) -new_n115_ = NOT ( NET_29 ) -new_n116_ = NAND ( NET_9, new_n115_, new_n74_, NET_19 ) -NET_111 = NAND ( new_n116_, new_n114_, new_n111_ ) -new_n118_ = NAND ( new_n80_, new_n78_ ) -NET_116 = NOR ( new_n118_, new_n107_ ) -NET_117 = NOR ( new_n118_, new_n103_ ) -NET_118 = NOR ( new_n118_, new_n99_ ) -NET_119 = NOR ( new_n118_, new_n95_ ) -NET_120 = NOR ( new_n118_, new_n91_ ) -NET_121 = NOR ( new_n118_, new_n87_ ) -NET_122 = NOR ( new_n118_, new_n83_ ) -NET_123 = NOR ( new_n118_, new_n77_ ) -new_n127_ = OR ( NET_20, new_n71_ ) -new_n128_ = NAND ( NET_20, NET_19 ) -new_n129_ = OR ( new_n128_, NET_29 ) -new_n130_ = NAND ( new_n129_, new_n127_, new_n113_ ) -new_n131_ = NAND ( new_n130_, NET_1 ) -new_n132_ = OR ( new_n69_, new_n128_ ) -new_n133_ = NAND ( new_n132_, new_n113_ ) -new_n134_ = NAND ( new_n133_, NET_29 ) -NET_136 = NAND ( new_n134_, new_n131_ ) -new_n136_ = OR ( NET_29, NET_20 ) -new_n137_ = OR ( new_n115_, NET_19 ) -new_n138_ = NAND ( new_n137_, new_n136_, new_n111_ ) -new_n139_ = NAND ( new_n138_, NET_21, NET_20 ) -new_n140_ = NAND ( new_n137_, new_n136_, new_n111_, NET_2 ) -NET_152 = NAND ( new_n140_, new_n139_ ) -new_n142_ = NAND ( new_n138_, NET_22, NET_20 ) -new_n143_ = NAND ( new_n137_, new_n136_, new_n111_, NET_3 ) -new_n144_ = NAND ( new_n115_, new_n74_, NET_2, NET_19 ) -NET_153 = NAND ( new_n144_, new_n143_, new_n142_ ) -new_n146_ = NAND ( new_n138_, NET_23, NET_20 ) -new_n147_ = NAND ( new_n137_, new_n136_, new_n111_, NET_4 ) -new_n148_ = NAND ( NET_3, new_n115_, new_n74_, NET_19 ) -NET_154 = NAND ( new_n148_, new_n147_, new_n146_ ) -new_n150_ = NAND ( new_n138_, NET_24, NET_20 ) -new_n151_ = NAND ( new_n137_, new_n136_, new_n111_, NET_5 ) -new_n152_ = NAND ( NET_4, new_n115_, new_n74_, NET_19 ) -NET_155 = NAND ( new_n152_, new_n151_, new_n150_ ) -new_n154_ = NAND ( new_n138_, NET_25, NET_20 ) -new_n155_ = NAND ( new_n137_, new_n136_, new_n111_, NET_6 ) -new_n156_ = NAND ( NET_5, new_n115_, new_n74_, NET_19 ) -NET_156 = NAND ( new_n156_, new_n155_, new_n154_ ) -new_n158_ = NAND ( new_n138_, NET_26, NET_20 ) -new_n159_ = NAND ( new_n137_, new_n136_, new_n111_, NET_7 ) -new_n160_ = NAND ( NET_6, new_n115_, new_n74_, NET_19 ) -NET_157 = NAND ( new_n160_, new_n159_, new_n158_ ) -new_n162_ = NAND ( new_n138_, NET_27, NET_20 ) -new_n163_ = NAND ( new_n137_, new_n136_, new_n111_, NET_8 ) -new_n164_ = NAND ( NET_7, new_n115_, new_n74_, NET_19 ) -NET_158 = NAND ( new_n164_, new_n163_, new_n162_ ) -new_n166_ = NAND ( new_n138_, NET_28, NET_20 ) -new_n167_ = NAND ( new_n137_, new_n136_, new_n111_, NET_9 ) -new_n168_ = NAND ( NET_8, new_n115_, new_n74_, NET_19 ) -NET_159 = NAND ( new_n168_, new_n167_, new_n166_ ) -NET_45 = NAND ( new_n78_, new_n71_ ) -NET_30 = BUF ( NET_18 ) diff --git a/ITC99BENCH/b10.bench b/ITC99BENCH/b10.bench deleted file mode 100644 index cd552e2..0000000 --- a/ITC99BENCH/b10.bench +++ /dev/null @@ -1,206 +0,0 @@ -# generated by verilog2bench.py https://gitea.yuhangq.com/YuhangQ/any2bench -INPUT(NET_1) -INPUT(NET_10) -INPUT(NET_11) -INPUT(NET_12) -INPUT(NET_13) -INPUT(NET_14) -INPUT(NET_15) -INPUT(NET_16) -INPUT(NET_17) -INPUT(NET_18) -INPUT(NET_19) -INPUT(NET_2) -INPUT(NET_20) -INPUT(NET_21) -INPUT(NET_22) -INPUT(NET_23) -INPUT(NET_24) -INPUT(NET_25) -INPUT(NET_26) -INPUT(NET_27) -INPUT(NET_28) -INPUT(NET_3) -INPUT(NET_4) -INPUT(NET_5) -INPUT(NET_6) -INPUT(NET_7) -INPUT(NET_8) -INPUT(NET_9) -OUTPUT(NET_121) -OUTPUT(NET_123) -OUTPUT(NET_124) -OUTPUT(NET_125) -OUTPUT(NET_126) -OUTPUT(NET_153) -OUTPUT(NET_154) -OUTPUT(NET_156) -OUTPUT(NET_157) -OUTPUT(NET_176) -OUTPUT(NET_177) -OUTPUT(NET_178) -OUTPUT(NET_179) -OUTPUT(NET_180) -OUTPUT(NET_187) -OUTPUT(NET_188) -OUTPUT(NET_189) -OUTPUT(NET_29) -OUTPUT(NET_30) -OUTPUT(NET_31) -OUTPUT(NET_32) -OUTPUT(NET_33) -OUTPUT(NET_34) -new_n52_ = NOT ( NET_27 ) -new_n53_ = OR ( NET_25, NET_18 ) -new_n54_ = NOR ( new_n53_, NET_17 ) -new_n55_ = NAND ( new_n54_, new_n52_ ) -new_n56_ = OR ( new_n55_, NET_5 ) -new_n57_ = NAND ( new_n56_, NET_16 ) -new_n58_ = NAND ( NET_25, NET_17 ) -NET_121 = NAND ( new_n58_, new_n57_ ) -new_n60_ = NOT ( NET_17 ) -new_n61_ = NAND ( NET_7, new_n52_, NET_18, new_n60_ ) -new_n62_ = NAND ( new_n61_, NET_12 ) -new_n63_ = NOT ( NET_21 ) -new_n64_ = OR ( new_n61_, new_n63_ ) -NET_123 = NAND ( new_n64_, new_n62_ ) -new_n66_ = NAND ( new_n61_, NET_13 ) -new_n67_ = NOT ( NET_24 ) -new_n68_ = OR ( new_n61_, new_n67_ ) -NET_124 = NAND ( new_n68_, new_n66_ ) -new_n70_ = NAND ( new_n61_, NET_14 ) -new_n71_ = NOT ( NET_19 ) -new_n72_ = OR ( new_n61_, new_n71_ ) -NET_125 = NAND ( new_n72_, new_n70_ ) -new_n74_ = NAND ( new_n61_, NET_15 ) -new_n75_ = NOT ( NET_28 ) -new_n76_ = OR ( new_n61_, new_n75_ ) -NET_126 = NAND ( new_n76_, new_n74_ ) -new_n78_ = NOR ( new_n52_, NET_18 ) -new_n79_ = NOT ( NET_18 ) -new_n80_ = NOR ( NET_27, new_n79_ ) -new_n81_ = NOR ( new_n80_, new_n78_ ) -new_n82_ = OR ( NET_6, new_n52_ ) -new_n83_ = NOT ( NET_25 ) -new_n84_ = OR ( NET_27, new_n83_ ) -new_n85_ = NAND ( new_n84_, new_n82_, new_n81_, new_n60_ ) -new_n86_ = NAND ( new_n85_, NET_20 ) -new_n87_ = NOT ( NET_6 ) -new_n88_ = NOR ( NET_27, new_n60_ ) -new_n89_ = NAND ( new_n88_, new_n87_, NET_18 ) -NET_153 = NAND ( new_n89_, new_n86_ ) -new_n91_ = OR ( new_n52_, NET_17 ) -new_n92_ = OR ( NET_25, NET_17 ) -new_n93_ = NAND ( new_n92_, NET_7 ) -new_n94_ = NAND ( new_n88_, NET_25 ) -new_n95_ = NAND ( new_n94_, new_n93_, new_n91_, new_n81_ ) -new_n96_ = NAND ( new_n95_, NET_23 ) -new_n97_ = NAND ( new_n88_, NET_7, new_n83_, new_n79_ ) -new_n98_ = NAND ( new_n80_, NET_25, new_n60_ ) -NET_154 = NAND ( new_n98_, new_n97_, new_n96_, new_n61_ ) -new_n100_ = NOT ( NET_4 ) -new_n101_ = OR ( new_n53_, NET_17 ) -new_n102_ = NOR ( new_n101_, new_n100_ ) -new_n103_ = NAND ( new_n102_, NET_3, NET_27, NET_1 ) -new_n104_ = NAND ( new_n102_, NET_3, NET_27 ) -new_n105_ = NAND ( new_n104_, NET_22 ) -NET_156 = NAND ( new_n105_, new_n103_ ) -new_n107_ = NAND ( new_n102_, NET_3, NET_27, NET_2 ) -new_n108_ = NAND ( new_n104_, NET_26 ) -NET_157 = NAND ( new_n108_, new_n107_ ) -new_n110_ = NAND ( NET_27, NET_18, new_n60_ ) -new_n111_ = NOT ( new_n88_ ) -new_n112_ = AND ( NET_9, NET_8, NET_25 ) -new_n113_ = NAND ( new_n112_, NET_11, NET_10 ) -new_n114_ = NOT ( NET_7 ) -new_n115_ = NAND ( new_n114_, NET_27, NET_18 ) -new_n116_ = OR ( new_n53_, new_n100_ ) -new_n117_ = NAND ( new_n116_, new_n115_, new_n113_ ) -new_n118_ = NAND ( new_n117_, NET_17 ) -new_n119_ = OR ( new_n110_, new_n87_ ) -new_n120_ = AND ( new_n119_, new_n55_ ) -new_n121_ = OR ( new_n100_, NET_25 ) -new_n122_ = NAND ( new_n121_, new_n78_, new_n58_ ) -new_n123_ = NAND ( new_n114_, new_n52_, NET_25, new_n60_ ) -new_n124_ = AND ( new_n123_, new_n89_, new_n61_ ) -new_n125_ = NAND ( new_n124_, new_n122_, new_n120_, new_n118_ ) -new_n126_ = NAND ( new_n75_, NET_24, new_n63_, NET_19 ) -new_n127_ = NAND ( new_n126_, new_n60_ ) -new_n128_ = NAND ( new_n127_, new_n125_, new_n111_ ) -new_n129_ = NAND ( new_n128_, NET_18 ) -new_n130_ = NAND ( new_n92_, new_n58_, NET_27 ) -NET_176 = NAND ( new_n130_, new_n129_, new_n110_ ) -new_n132_ = NOR ( new_n126_, new_n79_, NET_17 ) -new_n133_ = NOR ( new_n101_, NET_5 ) -new_n134_ = OR ( new_n133_, new_n132_ ) -new_n135_ = NAND ( new_n134_, new_n125_, new_n52_ ) -new_n136_ = NAND ( new_n125_, new_n60_ ) -new_n137_ = NAND ( new_n136_, NET_25 ) -NET_177 = NAND ( new_n137_, new_n135_ ) -new_n139_ = OR ( new_n125_, new_n52_ ) -new_n140_ = OR ( new_n52_, NET_25 ) -new_n141_ = NAND ( new_n140_, new_n125_, NET_17 ) -new_n142_ = OR ( new_n140_, NET_17 ) -NET_178 = NAND ( new_n142_, new_n141_, new_n139_, new_n110_ ) -new_n144_ = OR ( new_n126_, NET_25 ) -new_n145_ = NAND ( new_n144_, new_n52_, new_n60_ ) -new_n146_ = NAND ( new_n145_, new_n110_, new_n101_ ) -new_n147_ = NAND ( new_n146_, new_n125_ ) -new_n148_ = OR ( new_n125_, new_n60_ ) -NET_179 = NAND ( new_n148_, new_n147_ ) -new_n150_ = NOT ( NET_3 ) -new_n151_ = NOR ( new_n101_, new_n150_ ) -new_n152_ = NOR ( new_n83_, NET_16 ) -new_n153_ = NOR ( new_n152_, new_n151_ ) -new_n154_ = OR ( new_n153_, new_n52_ ) -new_n155_ = OR ( new_n110_, NET_25 ) -new_n156_ = NAND ( new_n88_, NET_25, new_n79_ ) -new_n157_ = NAND ( new_n156_, new_n155_ ) -new_n158_ = NAND ( new_n157_, NET_11 ) -new_n159_ = NAND ( new_n158_, new_n154_ ) -new_n160_ = NAND ( new_n92_, new_n78_, new_n58_ ) -new_n161_ = NAND ( new_n160_, new_n156_, new_n120_, new_n116_ ) -new_n162_ = NAND ( new_n161_, new_n159_ ) -new_n163_ = OR ( new_n161_, new_n75_ ) -NET_180 = NAND ( new_n163_, new_n162_ ) -new_n165_ = NAND ( new_n78_, NET_3, new_n71_ ) -new_n166_ = NAND ( new_n157_, NET_10 ) -new_n167_ = NAND ( new_n166_, new_n165_ ) -new_n168_ = NAND ( new_n88_, NET_4, new_n79_ ) -new_n169_ = AND ( new_n168_, new_n156_, new_n120_ ) -new_n170_ = NOT ( NET_26 ) -new_n171_ = NAND ( new_n102_, new_n170_, NET_2 ) -new_n172_ = NAND ( new_n102_, new_n150_ ) -new_n173_ = NAND ( new_n172_, new_n171_, new_n169_ ) -new_n174_ = NAND ( new_n173_, new_n167_ ) -new_n175_ = OR ( new_n173_, new_n71_ ) -NET_187 = NAND ( new_n175_, new_n174_ ) -new_n177_ = XNOR ( NET_28, NET_24 ) -new_n178_ = NAND ( new_n177_, new_n71_ ) -new_n179_ = OR ( new_n177_, new_n71_ ) -new_n180_ = NAND ( new_n179_, new_n178_, NET_27, NET_17 ) -new_n181_ = NAND ( new_n157_, NET_8 ) -new_n182_ = NAND ( new_n181_, new_n180_ ) -new_n183_ = NAND ( NET_27, NET_17 ) -new_n184_ = OR ( new_n100_, NET_3 ) -new_n185_ = AND ( new_n184_, new_n183_ ) -new_n186_ = OR ( new_n185_, new_n53_ ) -new_n187_ = NAND ( new_n186_, new_n169_ ) -new_n188_ = NAND ( new_n187_, new_n182_ ) -new_n189_ = OR ( new_n187_, new_n63_ ) -NET_188 = NAND ( new_n189_, new_n188_ ) -new_n191_ = NAND ( new_n78_, NET_3, new_n67_ ) -new_n192_ = NAND ( new_n157_, NET_9 ) -new_n193_ = NAND ( new_n192_, new_n191_ ) -new_n194_ = NOT ( NET_22 ) -new_n195_ = NAND ( new_n102_, new_n194_, NET_1 ) -new_n196_ = NAND ( new_n195_, new_n172_, new_n169_ ) -new_n197_ = NAND ( new_n196_, new_n193_ ) -new_n198_ = OR ( new_n196_, new_n67_ ) -NET_189 = NAND ( new_n198_, new_n197_ ) -NET_29 = BUF ( NET_23 ) -NET_30 = BUF ( NET_20 ) -NET_31 = BUF ( NET_12 ) -NET_32 = BUF ( NET_13 ) -NET_33 = BUF ( NET_14 ) -NET_34 = BUF ( NET_15 ) diff --git a/ITC99BENCH/b11.bench b/ITC99BENCH/b11.bench deleted file mode 100644 index 741eab3..0000000 --- a/ITC99BENCH/b11.bench +++ /dev/null @@ -1,467 +0,0 @@ -# generated by verilog2bench.py https://gitea.yuhangq.com/YuhangQ/any2bench -INPUT(NET_1) -INPUT(NET_10) -INPUT(NET_11) -INPUT(NET_12) -INPUT(NET_13) -INPUT(NET_14) -INPUT(NET_15) -INPUT(NET_16) -INPUT(NET_17) -INPUT(NET_18) -INPUT(NET_19) -INPUT(NET_2) -INPUT(NET_20) -INPUT(NET_21) -INPUT(NET_22) -INPUT(NET_23) -INPUT(NET_24) -INPUT(NET_25) -INPUT(NET_26) -INPUT(NET_27) -INPUT(NET_28) -INPUT(NET_29) -INPUT(NET_3) -INPUT(NET_30) -INPUT(NET_31) -INPUT(NET_32) -INPUT(NET_33) -INPUT(NET_34) -INPUT(NET_35) -INPUT(NET_36) -INPUT(NET_37) -INPUT(NET_38) -INPUT(NET_4) -INPUT(NET_5) -INPUT(NET_6) -INPUT(NET_7) -INPUT(NET_8) -INPUT(NET_9) -OUTPUT(NET_136) -OUTPUT(NET_140) -OUTPUT(NET_141) -OUTPUT(NET_142) -OUTPUT(NET_143) -OUTPUT(NET_144) -OUTPUT(NET_145) -OUTPUT(NET_169) -OUTPUT(NET_380) -OUTPUT(NET_381) -OUTPUT(NET_382) -OUTPUT(NET_383) -OUTPUT(NET_39) -OUTPUT(NET_40) -OUTPUT(NET_404) -OUTPUT(NET_405) -OUTPUT(NET_406) -OUTPUT(NET_407) -OUTPUT(NET_408) -OUTPUT(NET_41) -OUTPUT(NET_42) -OUTPUT(NET_426) -OUTPUT(NET_43) -OUTPUT(NET_44) -OUTPUT(NET_444) -OUTPUT(NET_445) -OUTPUT(NET_446) -OUTPUT(NET_447) -OUTPUT(NET_448) -OUTPUT(NET_449) -OUTPUT(NET_450) -OUTPUT(NET_460) -OUTPUT(NET_461) -OUTPUT(NET_462) -OUTPUT(NET_470) -OUTPUT(NET_478) -OUTPUT(NET_481) -new_n76_ = NOT ( NET_37 ) -new_n77_ = NOR ( new_n76_, NET_36 ) -new_n78_ = NAND ( new_n77_, NET_38 ) -new_n79_ = NOT ( NET_36 ) -new_n80_ = OR ( NET_38, new_n79_ ) -new_n81_ = OR ( NET_37, new_n79_ ) -NET_136 = NAND ( new_n81_, new_n80_, new_n78_ ) -new_n83_ = NOR ( NET_37, NET_35 ) -new_n84_ = NOT ( new_n83_ ) -new_n85_ = NOR ( new_n84_, NET_36 ) -new_n86_ = NAND ( new_n85_, NET_1 ) -new_n87_ = NOT ( NET_8 ) -new_n88_ = OR ( new_n85_, new_n87_ ) -NET_140 = NAND ( new_n88_, new_n86_ ) -new_n90_ = NAND ( new_n85_, NET_2 ) -new_n91_ = NOT ( NET_9 ) -new_n92_ = OR ( new_n85_, new_n91_ ) -NET_141 = NAND ( new_n92_, new_n90_ ) -new_n94_ = NAND ( new_n85_, NET_3 ) -new_n95_ = NOT ( NET_10 ) -new_n96_ = OR ( new_n85_, new_n95_ ) -NET_142 = NAND ( new_n96_, new_n94_ ) -new_n98_ = NAND ( new_n85_, NET_4 ) -new_n99_ = NOT ( NET_11 ) -new_n100_ = OR ( new_n85_, new_n99_ ) -NET_143 = NAND ( new_n100_, new_n98_ ) -new_n102_ = NAND ( new_n85_, NET_5 ) -new_n103_ = NOT ( NET_12 ) -new_n104_ = OR ( new_n85_, new_n103_ ) -NET_144 = NAND ( new_n104_, new_n102_ ) -new_n106_ = NAND ( new_n85_, NET_6 ) -new_n107_ = NOT ( NET_13 ) -new_n108_ = OR ( new_n85_, new_n107_ ) -NET_145 = NAND ( new_n108_, new_n106_ ) -new_n110_ = NOT ( NET_38 ) -new_n111_ = NAND ( NET_37, NET_36 ) -new_n112_ = OR ( new_n111_, new_n110_ ) -new_n113_ = OR ( NET_13, NET_11 ) -new_n114_ = NAND ( NET_9, NET_13 ) -new_n115_ = NAND ( new_n114_, new_n113_ ) -new_n116_ = OR ( new_n103_, NET_11 ) -new_n117_ = OR ( NET_12, new_n95_ ) -new_n118_ = OR ( new_n91_, NET_8 ) -new_n119_ = OR ( new_n87_, NET_10 ) -new_n120_ = AND ( new_n119_, new_n118_, new_n117_, new_n116_ ) -new_n121_ = AND ( new_n120_, new_n115_ ) -new_n122_ = NAND ( new_n121_, new_n77_, new_n110_ ) -NET_169 = NAND ( new_n122_, new_n112_ ) -new_n124_ = OR ( new_n111_, NET_38 ) -new_n125_ = NOT ( NET_35 ) -new_n126_ = NAND ( new_n121_, new_n79_, new_n125_, NET_18 ) -new_n127_ = NAND ( new_n111_, new_n84_ ) -new_n128_ = NOT ( new_n127_ ) -new_n129_ = NOT ( new_n121_ ) -new_n130_ = NAND ( new_n129_, new_n79_, new_n125_ ) -new_n131_ = AND ( new_n130_, new_n128_ ) -new_n132_ = NAND ( NET_35, NET_27 ) -new_n133_ = NAND ( new_n132_, new_n131_, new_n126_ ) -new_n134_ = NOT ( NET_27 ) -new_n135_ = NOR ( new_n128_, new_n134_ ) -new_n136_ = NOR ( new_n130_, new_n103_ ) -new_n137_ = NOR ( new_n136_, new_n135_ ) -new_n138_ = AND ( new_n137_, new_n133_ ) -new_n139_ = NAND ( new_n121_, new_n79_, new_n125_ ) -new_n140_ = OR ( new_n130_, new_n107_ ) -new_n141_ = NAND ( new_n127_, NET_28 ) -new_n142_ = NAND ( new_n141_, new_n140_, new_n139_ ) -new_n143_ = NAND ( new_n121_, new_n79_, new_n125_, NET_19 ) -new_n144_ = NAND ( NET_35, NET_28 ) -new_n145_ = NAND ( new_n144_, new_n143_, new_n142_, new_n111_ ) -new_n146_ = OR ( new_n145_, new_n138_ ) -new_n147_ = NOT ( NET_26 ) -new_n148_ = NOR ( new_n128_, new_n147_ ) -new_n149_ = NOR ( new_n130_, new_n99_ ) -new_n150_ = NOR ( new_n149_, new_n148_ ) -new_n151_ = NOT ( NET_17 ) -new_n152_ = OR ( new_n139_, new_n151_ ) -new_n153_ = NAND ( NET_35, NET_26 ) -new_n154_ = NAND ( new_n153_, new_n152_, new_n111_ ) -new_n155_ = OR ( new_n154_, new_n150_ ) -new_n156_ = OR ( new_n137_, new_n133_ ) -new_n157_ = NAND ( new_n156_, new_n155_, new_n146_ ) -new_n158_ = NOT ( NET_16 ) -new_n159_ = OR ( new_n139_, new_n158_ ) -new_n160_ = NAND ( NET_35, NET_25 ) -new_n161_ = NAND ( new_n160_, new_n159_, new_n131_ ) -new_n162_ = OR ( new_n130_, new_n95_ ) -new_n163_ = NAND ( new_n127_, NET_25 ) -new_n164_ = AND ( new_n163_, new_n162_, new_n139_ ) -new_n165_ = NAND ( new_n164_, new_n161_ ) -new_n166_ = NAND ( new_n154_, new_n150_ ) -new_n167_ = NAND ( new_n166_, new_n165_, new_n157_ ) -new_n168_ = OR ( new_n130_, new_n91_ ) -new_n169_ = NAND ( new_n127_, NET_24 ) -new_n170_ = AND ( new_n169_, new_n168_, new_n139_ ) -new_n171_ = NOT ( NET_15 ) -new_n172_ = OR ( new_n139_, new_n171_ ) -new_n173_ = NAND ( NET_35, NET_24 ) -new_n174_ = NAND ( new_n173_, new_n172_, new_n131_ ) -new_n175_ = OR ( new_n174_, new_n170_ ) -new_n176_ = OR ( new_n164_, new_n161_ ) -new_n177_ = NAND ( new_n176_, new_n175_, new_n167_ ) -new_n178_ = NOT ( NET_14 ) -new_n179_ = OR ( new_n139_, new_n178_ ) -new_n180_ = NAND ( NET_35, NET_23 ) -new_n181_ = NAND ( new_n180_, new_n179_, new_n111_ ) -new_n182_ = NOT ( NET_23 ) -new_n183_ = NOR ( new_n128_, new_n182_ ) -new_n184_ = NOR ( new_n130_, new_n87_ ) -new_n185_ = NOR ( new_n184_, new_n183_ ) -new_n186_ = NAND ( new_n185_, new_n181_ ) -new_n187_ = NAND ( new_n174_, new_n170_ ) -new_n188_ = NAND ( new_n187_, new_n186_, new_n177_ ) -new_n189_ = NAND ( new_n127_, new_n125_, NET_22 ) -new_n190_ = OR ( new_n185_, new_n181_ ) -new_n191_ = NAND ( new_n190_, new_n189_, new_n188_ ) -new_n192_ = NAND ( new_n128_, NET_35, NET_21 ) -new_n193_ = NAND ( new_n128_, NET_35, NET_22 ) -new_n194_ = NAND ( new_n193_, new_n192_, new_n191_ ) -new_n195_ = NAND ( new_n127_, new_n125_, NET_21 ) -new_n196_ = NAND ( new_n128_, NET_35, NET_20 ) -new_n197_ = NAND ( new_n127_, new_n125_, NET_20 ) -new_n198_ = NAND ( new_n197_, new_n196_, new_n195_, new_n194_ ) -new_n199_ = NOT ( new_n77_ ) -new_n200_ = NAND ( new_n127_, new_n199_, new_n125_, NET_20 ) -new_n201_ = NAND ( new_n200_, new_n198_ ) -new_n202_ = NOT ( new_n201_ ) -new_n203_ = OR ( new_n202_, new_n124_ ) -new_n204_ = NAND ( new_n129_, new_n77_, new_n110_ ) -new_n205_ = NAND ( NET_7, new_n76_, new_n79_ ) -new_n206_ = NOR ( new_n110_, NET_37 ) -new_n207_ = NAND ( new_n206_, NET_36 ) -new_n208_ = NAND ( new_n110_, new_n76_, new_n79_ ) -new_n209_ = OR ( new_n81_, new_n103_ ) -new_n210_ = AND ( new_n209_, new_n208_, new_n207_, new_n205_ ) -NET_380 = NAND ( new_n210_, new_n204_, new_n203_ ) -new_n212_ = AND ( NET_38, NET_37 ) -new_n213_ = NAND ( new_n212_, NET_11, NET_10 ) -new_n214_ = NAND ( new_n212_, new_n99_, NET_10 ) -new_n215_ = NAND ( new_n83_, new_n110_, new_n103_ ) -new_n216_ = NAND ( new_n215_, new_n214_, new_n213_, new_n124_ ) -new_n217_ = NOR ( new_n216_, NET_35 ) -new_n218_ = OR ( new_n217_, new_n147_ ) -new_n219_ = NAND ( new_n83_, new_n110_, NET_12 ) -new_n220_ = OR ( new_n219_, new_n99_ ) -new_n221_ = NAND ( new_n212_, new_n99_, new_n95_ ) -new_n222_ = NAND ( new_n221_, new_n220_, new_n218_, new_n152_ ) -new_n223_ = NOT ( new_n206_ ) -new_n224_ = OR ( NET_37, NET_12 ) -new_n225_ = OR ( new_n110_, NET_10 ) -new_n226_ = NAND ( new_n225_, new_n224_, new_n223_, new_n125_ ) -new_n227_ = XOR ( new_n226_, new_n222_ ) -new_n228_ = NAND ( NET_38, NET_37 ) -new_n229_ = NOR ( new_n228_, new_n99_, NET_10 ) -new_n230_ = NOR ( new_n229_, new_n206_ ) -new_n231_ = NAND ( new_n230_, new_n221_, new_n219_ ) -new_n232_ = NAND ( new_n231_, NET_26 ) -new_n233_ = OR ( new_n215_, new_n99_ ) -new_n234_ = NAND ( new_n233_, new_n232_, new_n214_, new_n213_ ) -new_n235_ = OR ( new_n234_, new_n227_ ) -new_n236_ = NAND ( new_n234_, new_n227_ ) -new_n237_ = NAND ( new_n236_, new_n235_ ) -new_n238_ = NAND ( new_n231_, NET_28 ) -new_n239_ = OR ( new_n215_, new_n107_ ) -new_n240_ = NAND ( new_n239_, new_n238_, new_n214_, new_n139_ ) -new_n241_ = NOT ( NET_28 ) -new_n242_ = OR ( new_n217_, new_n241_ ) -new_n243_ = OR ( new_n219_, new_n107_ ) -new_n244_ = AND ( new_n243_, new_n242_, new_n221_, new_n143_ ) -new_n245_ = NOR ( new_n244_, new_n240_ ) -new_n246_ = NAND ( new_n243_, new_n242_, new_n221_, new_n143_ ) -new_n247_ = NOR ( new_n246_, new_n226_ ) -new_n248_ = OR ( new_n247_, new_n245_ ) -new_n249_ = OR ( new_n217_, new_n134_ ) -new_n250_ = NAND ( new_n249_, new_n230_, new_n219_, new_n126_ ) -new_n251_ = XOR ( new_n250_, new_n226_ ) -new_n252_ = NAND ( new_n231_, NET_27 ) -new_n253_ = NAND ( new_n252_, new_n214_, new_n124_ ) -new_n254_ = NOR ( new_n253_, new_n251_ ) -new_n255_ = OR ( new_n254_, new_n248_ ) -new_n256_ = NAND ( new_n253_, new_n251_ ) -new_n257_ = NAND ( new_n256_, new_n255_ ) -new_n258_ = XNOR ( new_n257_, new_n237_ ) -new_n259_ = NAND ( new_n85_, new_n110_ ) -new_n260_ = NAND ( new_n259_, new_n122_ ) -new_n261_ = AND ( new_n260_, new_n202_, NET_37 ) -new_n262_ = NAND ( new_n261_, new_n258_ ) -new_n263_ = OR ( new_n260_, new_n151_ ) -NET_381 = NAND ( new_n263_, new_n262_ ) -new_n265_ = NOT ( new_n254_ ) -new_n266_ = NAND ( new_n256_, new_n265_ ) -new_n267_ = XOR ( new_n266_, new_n248_ ) -new_n268_ = NAND ( new_n267_, new_n261_ ) -new_n269_ = NOT ( NET_18 ) -new_n270_ = OR ( new_n260_, new_n269_ ) -NET_382 = NAND ( new_n270_, new_n268_ ) -new_n272_ = AND ( new_n246_, new_n226_ ) -new_n273_ = NOR ( new_n272_, new_n247_ ) -new_n274_ = XOR ( new_n273_, new_n240_ ) -new_n275_ = XOR ( new_n274_, new_n226_ ) -new_n276_ = NAND ( new_n275_, new_n261_ ) -new_n277_ = NOT ( NET_19 ) -new_n278_ = OR ( new_n260_, new_n277_ ) -NET_383 = NAND ( new_n278_, new_n276_ ) -new_n280_ = NOT ( NET_25 ) -new_n281_ = OR ( new_n217_, new_n280_ ) -new_n282_ = OR ( new_n219_, new_n95_ ) -new_n283_ = NAND ( new_n282_, new_n281_, new_n230_, new_n159_ ) -new_n284_ = XOR ( new_n283_, new_n226_ ) -new_n285_ = AND ( new_n213_, new_n124_ ) -new_n286_ = NAND ( new_n231_, NET_25 ) -new_n287_ = OR ( new_n215_, new_n95_ ) -new_n288_ = NAND ( new_n287_, new_n286_, new_n285_ ) -new_n289_ = OR ( new_n288_, new_n284_ ) -new_n290_ = NAND ( new_n288_, new_n284_ ) -new_n291_ = NAND ( new_n290_, new_n289_ ) -new_n292_ = NAND ( new_n257_, new_n235_ ) -new_n293_ = NAND ( new_n292_, new_n236_ ) -new_n294_ = XNOR ( new_n293_, new_n291_ ) -new_n295_ = NAND ( new_n294_, new_n261_ ) -new_n296_ = OR ( new_n260_, new_n158_ ) -NET_404 = NAND ( new_n296_, new_n295_ ) -new_n298_ = OR ( new_n208_, new_n202_, new_n125_ ) -new_n299_ = OR ( new_n298_, new_n280_ ) -new_n300_ = NAND ( new_n208_, NET_31 ) -new_n301_ = NOR ( new_n208_, new_n201_, new_n125_ ) -new_n302_ = NAND ( new_n301_, new_n294_ ) -NET_405 = NAND ( new_n302_, new_n300_, new_n299_ ) -new_n304_ = OR ( new_n298_, new_n147_ ) -new_n305_ = NAND ( new_n208_, NET_32 ) -new_n306_ = NAND ( new_n301_, new_n258_ ) -NET_406 = NAND ( new_n306_, new_n305_, new_n304_ ) -new_n308_ = OR ( new_n298_, new_n134_ ) -new_n309_ = NAND ( new_n208_, NET_33 ) -new_n310_ = NAND ( new_n301_, new_n267_ ) -NET_407 = NAND ( new_n310_, new_n309_, new_n308_ ) -new_n312_ = OR ( new_n298_, new_n241_ ) -new_n313_ = NAND ( new_n208_, NET_34 ) -new_n314_ = NAND ( new_n301_, new_n275_ ) -NET_408 = NAND ( new_n314_, new_n313_, new_n312_ ) -new_n316_ = OR ( NET_38, NET_12 ) -new_n317_ = NAND ( new_n206_, new_n201_ ) -new_n318_ = NAND ( new_n317_, new_n316_ ) -new_n319_ = NAND ( new_n318_, NET_36 ) -new_n320_ = OR ( new_n204_, new_n202_ ) -new_n321_ = OR ( new_n223_, NET_7, NET_36 ) -NET_426 = NAND ( new_n321_, new_n320_, new_n319_, new_n124_ ) -new_n323_ = NOT ( NET_24 ) -new_n324_ = NOR ( new_n217_, new_n323_ ) -new_n325_ = OR ( new_n219_, new_n91_ ) -new_n326_ = NAND ( new_n325_, new_n221_, new_n223_, new_n172_ ) -new_n327_ = OR ( new_n326_, new_n324_ ) -new_n328_ = XOR ( new_n327_, new_n226_ ) -new_n329_ = NAND ( new_n231_, NET_24 ) -new_n330_ = OR ( new_n215_, new_n91_ ) -new_n331_ = NAND ( new_n330_, new_n329_, new_n285_ ) -new_n332_ = OR ( new_n331_, new_n328_ ) -new_n333_ = NAND ( new_n331_, new_n328_ ) -new_n334_ = NAND ( new_n333_, new_n332_ ) -new_n335_ = NAND ( new_n293_, new_n289_ ) -new_n336_ = NAND ( new_n335_, new_n290_ ) -new_n337_ = XNOR ( new_n336_, new_n334_ ) -new_n338_ = NAND ( new_n337_, new_n261_ ) -new_n339_ = OR ( new_n260_, new_n171_ ) -NET_444 = NAND ( new_n339_, new_n338_ ) -new_n341_ = OR ( new_n201_, new_n79_ ) -new_n342_ = NAND ( new_n121_, new_n77_ ) -new_n343_ = OR ( new_n81_, NET_38 ) -new_n344_ = AND ( new_n343_, new_n342_, new_n228_ ) -new_n345_ = NAND ( new_n344_, new_n341_ ) -new_n346_ = AND ( new_n345_, new_n199_ ) -new_n347_ = NAND ( new_n346_, new_n337_ ) -new_n348_ = NAND ( new_n345_, new_n110_, new_n79_ ) -new_n349_ = OR ( new_n348_, new_n91_ ) -new_n350_ = OR ( new_n345_, new_n323_ ) -new_n351_ = AND ( NET_38, NET_37, new_n79_ ) -new_n352_ = NAND ( new_n351_, new_n107_ ) -new_n353_ = NOR ( new_n352_, new_n171_ ) -new_n354_ = NAND ( new_n351_, NET_13 ) -new_n355_ = NOR ( new_n354_, new_n158_ ) -new_n356_ = NOR ( new_n355_, new_n353_ ) -NET_445 = NAND ( new_n356_, new_n350_, new_n349_, new_n347_ ) -new_n358_ = NAND ( new_n346_, new_n294_ ) -new_n359_ = OR ( new_n348_, new_n95_ ) -new_n360_ = OR ( new_n345_, new_n280_ ) -new_n361_ = NOR ( new_n352_, new_n158_ ) -new_n362_ = NOR ( new_n354_, new_n151_ ) -new_n363_ = NOR ( new_n362_, new_n361_ ) -NET_446 = NAND ( new_n363_, new_n360_, new_n359_, new_n358_ ) -new_n365_ = NAND ( new_n346_, new_n258_ ) -new_n366_ = OR ( new_n348_, new_n99_ ) -new_n367_ = OR ( new_n345_, new_n147_ ) -new_n368_ = NOR ( new_n352_, new_n151_ ) -new_n369_ = NOR ( new_n354_, new_n269_ ) -new_n370_ = NOR ( new_n369_, new_n368_ ) -NET_447 = NAND ( new_n370_, new_n367_, new_n366_, new_n365_ ) -new_n372_ = NAND ( new_n346_, new_n267_ ) -new_n373_ = OR ( new_n348_, new_n103_ ) -new_n374_ = OR ( new_n345_, new_n134_ ) -new_n375_ = NOR ( new_n352_, new_n269_ ) -new_n376_ = NOR ( new_n354_, new_n277_ ) -new_n377_ = NOR ( new_n376_, new_n375_ ) -NET_448 = NAND ( new_n377_, new_n374_, new_n373_, new_n372_ ) -new_n379_ = OR ( new_n352_, new_n277_ ) -new_n380_ = OR ( new_n348_, new_n107_ ) -new_n381_ = NAND ( new_n346_, new_n275_ ) -new_n382_ = OR ( new_n345_, new_n241_ ) -NET_449 = NAND ( new_n382_, new_n381_, new_n380_, new_n379_ ) -new_n384_ = OR ( new_n298_, new_n323_ ) -new_n385_ = NAND ( new_n208_, NET_30 ) -new_n386_ = NAND ( new_n337_, new_n301_ ) -NET_450 = NAND ( new_n386_, new_n385_, new_n384_ ) -new_n388_ = NOT ( new_n229_ ) -new_n389_ = OR ( new_n217_, new_n182_ ) -new_n390_ = OR ( new_n219_, new_n87_ ) -new_n391_ = NAND ( new_n390_, new_n389_, new_n388_, new_n179_ ) -new_n392_ = XOR ( new_n391_, new_n226_ ) -new_n393_ = NAND ( new_n231_, NET_23 ) -new_n394_ = OR ( new_n215_, new_n87_ ) -new_n395_ = NAND ( new_n394_, new_n393_ ) -new_n396_ = OR ( new_n395_, new_n392_ ) -new_n397_ = NAND ( new_n395_, new_n392_ ) -new_n398_ = NAND ( new_n397_, new_n396_ ) -new_n399_ = NAND ( new_n336_, new_n332_ ) -new_n400_ = NAND ( new_n399_, new_n333_ ) -new_n401_ = XNOR ( new_n400_, new_n398_ ) -new_n402_ = NAND ( new_n401_, new_n261_ ) -new_n403_ = OR ( new_n260_, new_n178_ ) -NET_460 = NAND ( new_n403_, new_n402_ ) -new_n405_ = NAND ( new_n401_, new_n346_ ) -new_n406_ = OR ( new_n348_, new_n87_ ) -new_n407_ = OR ( new_n345_, new_n182_ ) -new_n408_ = NOR ( new_n352_, new_n178_ ) -new_n409_ = NOR ( new_n354_, new_n171_ ) -new_n410_ = NOR ( new_n409_, new_n408_ ) -NET_461 = NAND ( new_n410_, new_n407_, new_n406_, new_n405_ ) -new_n412_ = NAND ( new_n401_, new_n301_ ) -new_n413_ = NAND ( new_n208_, NET_29 ) -new_n414_ = OR ( new_n298_, new_n182_ ) -NET_462 = NAND ( new_n414_, new_n413_, new_n412_ ) -new_n416_ = NAND ( new_n216_, NET_22 ) -new_n417_ = NAND ( new_n416_, new_n180_ ) -new_n418_ = XOR ( new_n417_, new_n226_ ) -new_n419_ = NOT ( new_n418_ ) -new_n420_ = NAND ( new_n231_, NET_22 ) -new_n421_ = OR ( new_n420_, new_n419_ ) -new_n422_ = NAND ( new_n420_, new_n419_ ) -new_n423_ = AND ( new_n422_, new_n421_ ) -new_n424_ = NAND ( new_n400_, new_n396_ ) -new_n425_ = NAND ( new_n424_, new_n397_ ) -new_n426_ = NAND ( new_n425_, new_n423_ ) -new_n427_ = OR ( new_n425_, new_n423_ ) -new_n428_ = NAND ( new_n427_, new_n426_, new_n346_ ) -new_n429_ = NAND ( new_n344_, new_n341_, NET_22 ) -new_n430_ = OR ( new_n354_, new_n178_ ) -NET_470 = NAND ( new_n430_, new_n429_, new_n428_ ) -new_n432_ = NAND ( new_n216_, NET_21 ) -new_n433_ = NAND ( new_n432_, new_n180_ ) -new_n434_ = XOR ( new_n433_, new_n226_ ) -new_n435_ = NOT ( new_n434_ ) -new_n436_ = NAND ( new_n231_, NET_21 ) -new_n437_ = OR ( new_n436_, new_n435_ ) -new_n438_ = NAND ( new_n436_, new_n435_ ) -new_n439_ = NAND ( new_n425_, new_n422_ ) -new_n440_ = NAND ( new_n439_, new_n421_ ) -new_n441_ = NAND ( new_n440_, new_n438_, new_n437_ ) -new_n442_ = NAND ( new_n438_, new_n437_ ) -new_n443_ = NAND ( new_n442_, new_n439_, new_n421_ ) -new_n444_ = NAND ( new_n443_, new_n441_, new_n346_ ) -new_n445_ = NAND ( new_n344_, new_n341_, NET_21 ) -NET_478 = NAND ( new_n445_, new_n444_ ) -new_n447_ = NAND ( new_n440_, new_n438_ ) -new_n448_ = AND ( new_n447_, new_n437_ ) -new_n449_ = NAND ( new_n231_, NET_20 ) -new_n450_ = OR ( new_n449_, new_n448_ ) -new_n451_ = NAND ( new_n449_, new_n447_, new_n437_ ) -new_n452_ = NAND ( new_n451_, new_n450_ ) -new_n453_ = NAND ( new_n216_, NET_20 ) -new_n454_ = NAND ( new_n453_, new_n180_ ) -new_n455_ = XNOR ( new_n454_, new_n226_ ) -new_n456_ = OR ( new_n455_, new_n452_ ) -new_n457_ = NAND ( new_n455_, new_n452_ ) -new_n458_ = NAND ( new_n457_, new_n456_, new_n346_ ) -new_n459_ = NAND ( new_n344_, new_n341_, NET_20 ) -NET_481 = NAND ( new_n459_, new_n458_ ) -NET_39 = BUF ( NET_29 ) -NET_40 = BUF ( NET_30 ) -NET_41 = BUF ( NET_31 ) -NET_42 = BUF ( NET_32 ) -NET_43 = BUF ( NET_33 ) -NET_44 = BUF ( NET_34 ) diff --git a/ITC99BENCH/b12.bench b/ITC99BENCH/b12.bench deleted file mode 100644 index 1182e37..0000000 --- a/ITC99BENCH/b12.bench +++ /dev/null @@ -1,1167 +0,0 @@ -# generated by verilog2bench.py https://gitea.yuhangq.com/YuhangQ/any2bench -INPUT(NET_1) -INPUT(NET_10) -INPUT(NET_100) -INPUT(NET_101) -INPUT(NET_102) -INPUT(NET_103) -INPUT(NET_104) -INPUT(NET_105) -INPUT(NET_106) -INPUT(NET_107) -INPUT(NET_108) -INPUT(NET_109) -INPUT(NET_11) -INPUT(NET_110) -INPUT(NET_111) -INPUT(NET_112) -INPUT(NET_113) -INPUT(NET_114) -INPUT(NET_115) -INPUT(NET_116) -INPUT(NET_117) -INPUT(NET_118) -INPUT(NET_119) -INPUT(NET_12) -INPUT(NET_120) -INPUT(NET_121) -INPUT(NET_122) -INPUT(NET_123) -INPUT(NET_124) -INPUT(NET_125) -INPUT(NET_126) -INPUT(NET_13) -INPUT(NET_14) -INPUT(NET_15) -INPUT(NET_16) -INPUT(NET_17) -INPUT(NET_18) -INPUT(NET_19) -INPUT(NET_2) -INPUT(NET_20) -INPUT(NET_21) -INPUT(NET_22) -INPUT(NET_23) -INPUT(NET_24) -INPUT(NET_25) -INPUT(NET_26) -INPUT(NET_27) -INPUT(NET_28) -INPUT(NET_29) -INPUT(NET_3) -INPUT(NET_30) -INPUT(NET_31) -INPUT(NET_32) -INPUT(NET_33) -INPUT(NET_34) -INPUT(NET_35) -INPUT(NET_36) -INPUT(NET_37) -INPUT(NET_38) -INPUT(NET_39) -INPUT(NET_4) -INPUT(NET_40) -INPUT(NET_41) -INPUT(NET_42) -INPUT(NET_43) -INPUT(NET_44) -INPUT(NET_45) -INPUT(NET_46) -INPUT(NET_47) -INPUT(NET_48) -INPUT(NET_49) -INPUT(NET_5) -INPUT(NET_50) -INPUT(NET_51) -INPUT(NET_52) -INPUT(NET_53) -INPUT(NET_54) -INPUT(NET_55) -INPUT(NET_56) -INPUT(NET_57) -INPUT(NET_58) -INPUT(NET_59) -INPUT(NET_6) -INPUT(NET_60) -INPUT(NET_61) -INPUT(NET_62) -INPUT(NET_63) -INPUT(NET_64) -INPUT(NET_65) -INPUT(NET_66) -INPUT(NET_67) -INPUT(NET_68) -INPUT(NET_69) -INPUT(NET_7) -INPUT(NET_70) -INPUT(NET_71) -INPUT(NET_72) -INPUT(NET_73) -INPUT(NET_74) -INPUT(NET_75) -INPUT(NET_76) -INPUT(NET_77) -INPUT(NET_78) -INPUT(NET_79) -INPUT(NET_8) -INPUT(NET_80) -INPUT(NET_81) -INPUT(NET_82) -INPUT(NET_83) -INPUT(NET_84) -INPUT(NET_85) -INPUT(NET_86) -INPUT(NET_87) -INPUT(NET_88) -INPUT(NET_89) -INPUT(NET_9) -INPUT(NET_90) -INPUT(NET_91) -INPUT(NET_92) -INPUT(NET_93) -INPUT(NET_94) -INPUT(NET_95) -INPUT(NET_96) -INPUT(NET_97) -INPUT(NET_98) -INPUT(NET_99) -OUTPUT(NET_1009) -OUTPUT(NET_1010) -OUTPUT(NET_1011) -OUTPUT(NET_1012) -OUTPUT(NET_1013) -OUTPUT(NET_1014) -OUTPUT(NET_1015) -OUTPUT(NET_1016) -OUTPUT(NET_1029) -OUTPUT(NET_1030) -OUTPUT(NET_1031) -OUTPUT(NET_1032) -OUTPUT(NET_1033) -OUTPUT(NET_1034) -OUTPUT(NET_1035) -OUTPUT(NET_1036) -OUTPUT(NET_127) -OUTPUT(NET_128) -OUTPUT(NET_129) -OUTPUT(NET_130) -OUTPUT(NET_131) -OUTPUT(NET_132) -OUTPUT(NET_2397) -OUTPUT(NET_2398) -OUTPUT(NET_2399) -OUTPUT(NET_2400) -OUTPUT(NET_616) -OUTPUT(NET_617) -OUTPUT(NET_618) -OUTPUT(NET_619) -OUTPUT(NET_620) -OUTPUT(NET_621) -OUTPUT(NET_622) -OUTPUT(NET_623) -OUTPUT(NET_624) -OUTPUT(NET_625) -OUTPUT(NET_626) -OUTPUT(NET_627) -OUTPUT(NET_628) -OUTPUT(NET_629) -OUTPUT(NET_630) -OUTPUT(NET_631) -OUTPUT(NET_632) -OUTPUT(NET_633) -OUTPUT(NET_634) -OUTPUT(NET_635) -OUTPUT(NET_636) -OUTPUT(NET_637) -OUTPUT(NET_638) -OUTPUT(NET_639) -OUTPUT(NET_640) -OUTPUT(NET_641) -OUTPUT(NET_642) -OUTPUT(NET_643) -OUTPUT(NET_644) -OUTPUT(NET_645) -OUTPUT(NET_646) -OUTPUT(NET_647) -OUTPUT(NET_745) -OUTPUT(NET_746) -OUTPUT(NET_747) -OUTPUT(NET_748) -OUTPUT(NET_749) -OUTPUT(NET_750) -OUTPUT(NET_751) -OUTPUT(NET_752) -OUTPUT(NET_753) -OUTPUT(NET_754) -OUTPUT(NET_755) -OUTPUT(NET_756) -OUTPUT(NET_757) -OUTPUT(NET_758) -OUTPUT(NET_759) -OUTPUT(NET_760) -OUTPUT(NET_761) -OUTPUT(NET_762) -OUTPUT(NET_763) -OUTPUT(NET_764) -OUTPUT(NET_765) -OUTPUT(NET_766) -OUTPUT(NET_767) -OUTPUT(NET_768) -OUTPUT(NET_769) -OUTPUT(NET_770) -OUTPUT(NET_771) -OUTPUT(NET_772) -OUTPUT(NET_773) -OUTPUT(NET_774) -OUTPUT(NET_775) -OUTPUT(NET_776) -OUTPUT(NET_809) -OUTPUT(NET_810) -OUTPUT(NET_811) -OUTPUT(NET_812) -OUTPUT(NET_813) -OUTPUT(NET_862) -OUTPUT(NET_863) -OUTPUT(NET_864) -OUTPUT(NET_870) -OUTPUT(NET_871) -OUTPUT(NET_872) -OUTPUT(NET_873) -OUTPUT(NET_909) -OUTPUT(NET_910) -OUTPUT(NET_911) -OUTPUT(NET_912) -OUTPUT(NET_913) -OUTPUT(NET_914) -OUTPUT(NET_915) -OUTPUT(NET_916) -OUTPUT(NET_918) -OUTPUT(NET_919) -OUTPUT(NET_955) -OUTPUT(NET_956) -OUTPUT(NET_957) -OUTPUT(NET_958) -OUTPUT(NET_959) -OUTPUT(NET_960) -OUTPUT(NET_961) -OUTPUT(NET_966) -OUTPUT(NET_967) -OUTPUT(NET_968) -OUTPUT(NET_981) -OUTPUT(NET_982) -OUTPUT(NET_983) -OUTPUT(NET_984) -OUTPUT(NET_985) -new_n254_ = NOT ( NET_122 ) -new_n255_ = OR ( new_n254_, NET_1 ) -new_n256_ = NOT ( NET_123 ) -new_n257_ = NOR ( new_n256_, NET_1 ) -new_n258_ = OR ( new_n257_, new_n255_ ) -new_n259_ = NAND ( new_n258_, NET_75 ) -new_n260_ = NOT ( NET_80 ) -new_n261_ = OR ( new_n255_, new_n260_ ) -new_n262_ = NAND ( new_n261_, new_n259_ ) -new_n263_ = NAND ( new_n258_, NET_77 ) -new_n264_ = NOT ( NET_82 ) -new_n265_ = OR ( new_n255_, new_n264_ ) -new_n266_ = NAND ( new_n265_, new_n263_ ) -new_n267_ = NAND ( new_n258_, NET_79 ) -new_n268_ = NOT ( NET_84 ) -new_n269_ = OR ( new_n255_, new_n268_ ) -new_n270_ = NAND ( new_n269_, new_n267_ ) -new_n271_ = NAND ( new_n258_, NET_78 ) -new_n272_ = NOT ( NET_83 ) -new_n273_ = OR ( new_n255_, new_n272_ ) -new_n274_ = NAND ( new_n273_, new_n271_ ) -new_n275_ = AND ( new_n274_, new_n270_ ) -new_n276_ = NAND ( new_n258_, NET_76 ) -new_n277_ = NOT ( NET_81 ) -new_n278_ = OR ( new_n255_, new_n277_ ) -new_n279_ = NAND ( new_n278_, new_n276_ ) -new_n280_ = NAND ( new_n279_, new_n275_, new_n266_ ) -new_n281_ = XOR ( new_n280_, new_n262_ ) -new_n282_ = XOR ( NET_83, NET_78 ) -new_n283_ = XOR ( NET_81, NET_76 ) -new_n284_ = NOR ( new_n283_, new_n282_ ) -new_n285_ = XNOR ( NET_80, NET_75 ) -new_n286_ = XNOR ( NET_84, NET_79 ) -new_n287_ = XNOR ( NET_82, NET_77 ) -new_n288_ = NAND ( new_n287_, new_n286_, new_n285_, new_n284_ ) -new_n289_ = NOT ( NET_124 ) -new_n290_ = NOR ( new_n289_, NET_1 ) -new_n291_ = NOT ( NET_95 ) -new_n292_ = NOT ( NET_96 ) -new_n293_ = NOR ( NET_94, NET_93 ) -new_n294_ = NOR ( NET_98, NET_97 ) -new_n295_ = NAND ( new_n294_, new_n293_, new_n292_, new_n291_ ) -new_n296_ = NOT ( new_n295_ ) -new_n297_ = OR ( new_n256_, NET_1 ) -new_n298_ = OR ( new_n289_, NET_1 ) -new_n299_ = OR ( new_n298_, new_n297_ ) -new_n300_ = NOT ( NET_125 ) -new_n301_ = NOR ( new_n300_, NET_1 ) -new_n302_ = NOR ( NET_126, NET_1 ) -new_n303_ = OR ( new_n302_, new_n301_ ) -new_n304_ = NOR ( new_n303_, new_n299_ ) -new_n305_ = NAND ( new_n304_, new_n296_, new_n288_ ) -new_n306_ = OR ( new_n300_, NET_1 ) -new_n307_ = OR ( NET_126, NET_1 ) -new_n308_ = OR ( new_n307_, new_n306_ ) -new_n309_ = NOT ( new_n308_ ) -new_n310_ = NOR ( new_n254_, NET_1 ) -new_n311_ = NOR ( new_n257_, new_n310_ ) -new_n312_ = NAND ( new_n311_, new_n309_, new_n298_ ) -new_n313_ = OR ( new_n302_, new_n306_ ) -new_n314_ = OR ( new_n257_, new_n310_ ) -new_n315_ = OR ( new_n314_, new_n298_ ) -new_n316_ = OR ( new_n315_, new_n313_ ) -new_n317_ = OR ( new_n316_, new_n295_ ) -new_n318_ = NAND ( new_n317_, new_n312_, new_n305_ ) -new_n319_ = NAND ( new_n318_, new_n290_, new_n288_ ) -new_n320_ = OR ( new_n319_, new_n281_ ) -new_n321_ = NOT ( NET_75 ) -new_n322_ = OR ( new_n318_, new_n321_ ) -NET_1009 = NAND ( new_n322_, new_n320_ ) -new_n324_ = OR ( new_n314_, new_n303_ ) -new_n325_ = OR ( new_n324_, new_n290_ ) -new_n326_ = OR ( new_n303_, new_n299_ ) -new_n327_ = NAND ( NET_84, NET_83, NET_82 ) -new_n328_ = NOR ( new_n327_, new_n277_, new_n260_ ) -new_n329_ = OR ( new_n328_, new_n326_, new_n295_, new_n288_ ) -new_n330_ = AND ( new_n329_, new_n325_ ) -new_n331_ = NOR ( new_n302_, new_n301_ ) -new_n332_ = NOR ( new_n298_, new_n255_ ) -new_n333_ = NAND ( new_n332_, new_n331_, new_n288_ ) -new_n334_ = OR ( new_n290_, new_n297_ ) -new_n335_ = OR ( new_n334_, new_n308_ ) -new_n336_ = OR ( new_n307_, new_n301_ ) -new_n337_ = OR ( new_n290_, new_n255_ ) -new_n338_ = OR ( new_n337_, new_n257_ ) -new_n339_ = OR ( new_n338_, new_n336_ ) -new_n340_ = AND ( new_n339_, new_n335_, new_n333_ ) -new_n341_ = OR ( new_n340_, new_n295_ ) -new_n342_ = NAND ( new_n341_, new_n330_ ) -new_n343_ = NAND ( new_n342_, new_n290_ ) -new_n344_ = OR ( new_n343_, new_n281_ ) -new_n345_ = OR ( new_n342_, new_n260_ ) -NET_1010 = NAND ( new_n345_, new_n344_ ) -new_n347_ = OR ( new_n315_, new_n303_ ) -new_n348_ = NOR ( new_n295_, new_n288_ ) -new_n349_ = NAND ( new_n332_, new_n348_, new_n331_ ) -new_n350_ = AND ( new_n349_, new_n347_ ) -new_n351_ = OR ( new_n338_, new_n313_ ) -new_n352_ = NAND ( new_n328_, new_n348_, new_n304_ ) -new_n353_ = AND ( new_n352_, new_n351_ ) -new_n354_ = NAND ( new_n307_, new_n290_, new_n297_ ) -new_n355_ = OR ( new_n303_, new_n298_ ) -new_n356_ = OR ( new_n334_, new_n307_ ) -new_n357_ = OR ( new_n337_, new_n336_ ) -new_n358_ = NAND ( new_n357_, new_n356_, new_n355_, new_n354_ ) -new_n359_ = NAND ( new_n358_, new_n295_ ) -new_n360_ = OR ( new_n313_, new_n299_ ) -new_n361_ = NOR ( new_n307_, new_n301_ ) -new_n362_ = NAND ( new_n361_, new_n257_ ) -new_n363_ = NAND ( new_n362_, new_n360_ ) -new_n364_ = NAND ( new_n363_, new_n255_ ) -new_n365_ = OR ( new_n315_, new_n308_ ) -new_n366_ = NAND ( new_n332_, new_n303_, new_n297_ ) -new_n367_ = NOR ( new_n297_, new_n255_ ) -new_n368_ = NAND ( new_n367_, new_n306_, new_n298_ ) -new_n369_ = AND ( new_n368_, new_n366_, new_n365_ ) -new_n370_ = AND ( new_n369_, new_n364_, new_n359_ ) -new_n371_ = NAND ( new_n370_, new_n353_, new_n350_ ) -new_n372_ = OR ( new_n290_, new_n310_ ) -new_n373_ = NOT ( new_n372_ ) -new_n374_ = NAND ( new_n373_, new_n371_, new_n306_ ) -new_n375_ = NAND ( new_n361_, new_n290_, new_n296_ ) -new_n376_ = OR ( new_n306_, new_n299_ ) -new_n377_ = NAND ( new_n376_, new_n314_ ) -new_n378_ = NAND ( new_n377_, new_n296_ ) -new_n379_ = OR ( new_n338_, new_n306_ ) -new_n380_ = NOT ( NET_2 ) -new_n381_ = NOT ( NET_3 ) -new_n382_ = NOR ( NET_5, NET_4 ) -new_n383_ = AND ( new_n382_, new_n381_, new_n380_ ) -new_n384_ = NOR ( new_n383_, new_n372_ ) -new_n385_ = NOR ( new_n314_, new_n301_ ) -new_n386_ = NOR ( new_n385_, new_n384_ ) -new_n387_ = NAND ( new_n386_, new_n379_, new_n378_, new_n375_ ) -new_n388_ = NAND ( new_n387_, NET_87 ) -new_n389_ = OR ( new_n297_, new_n255_ ) -new_n390_ = OR ( new_n307_, new_n257_ ) -new_n391_ = OR ( new_n311_, new_n303_ ) -new_n392_ = NAND ( new_n391_, new_n390_, new_n389_ ) -new_n393_ = NAND ( new_n392_, new_n295_ ) -new_n394_ = NOT ( new_n383_ ) -new_n395_ = OR ( new_n394_, new_n372_ ) -new_n396_ = OR ( new_n306_, new_n290_ ) -new_n397_ = NAND ( new_n396_, new_n303_, new_n295_ ) -new_n398_ = NAND ( new_n397_, new_n395_, new_n393_ ) -new_n399_ = AND ( new_n294_, new_n292_ ) -new_n400_ = NAND ( new_n399_, new_n291_ ) -new_n401_ = NOR ( new_n400_, NET_94 ) -new_n402_ = XOR ( new_n401_, NET_93 ) -new_n403_ = NAND ( new_n402_, new_n398_ ) -new_n404_ = NAND ( new_n403_, new_n388_ ) -new_n405_ = NAND ( new_n404_, new_n371_ ) -new_n406_ = NAND ( new_n370_, new_n353_, new_n350_, NET_93 ) -NET_1011 = NAND ( new_n406_, new_n405_, new_n374_ ) -new_n408_ = NAND ( new_n384_, new_n301_ ) -new_n409_ = OR ( new_n315_, new_n301_ ) -new_n410_ = AND ( new_n409_, new_n408_ ) -new_n411_ = NAND ( new_n410_, new_n379_, new_n378_, new_n375_ ) -new_n412_ = NAND ( new_n411_, new_n371_, NET_88 ) -new_n413_ = NAND ( new_n383_, new_n373_, new_n301_ ) -new_n414_ = NAND ( new_n303_, new_n290_, new_n295_ ) -new_n415_ = NAND ( new_n414_, new_n413_, new_n393_ ) -new_n416_ = AND ( new_n415_, new_n371_ ) -new_n417_ = NOT ( NET_94 ) -new_n418_ = NAND ( new_n400_, new_n417_ ) -new_n419_ = OR ( new_n400_, new_n417_ ) -new_n420_ = NAND ( new_n419_, new_n418_, new_n416_ ) -new_n421_ = OR ( new_n371_, new_n417_ ) -NET_1012 = NAND ( new_n421_, new_n420_, new_n412_ ) -new_n423_ = NAND ( new_n411_, new_n371_, NET_90 ) -new_n424_ = OR ( new_n294_, NET_96 ) -new_n425_ = NAND ( new_n294_, NET_96 ) -new_n426_ = NAND ( new_n425_, new_n424_, new_n416_ ) -new_n427_ = OR ( new_n371_, new_n292_ ) -NET_1013 = NAND ( new_n427_, new_n426_, new_n423_ ) -new_n429_ = NAND ( new_n411_, new_n371_, NET_91 ) -new_n430_ = NOT ( NET_97 ) -new_n431_ = NOT ( NET_98 ) -new_n432_ = NOR ( new_n431_, new_n430_ ) -new_n433_ = OR ( new_n432_, new_n294_ ) -new_n434_ = NAND ( new_n433_, new_n416_ ) -new_n435_ = OR ( new_n371_, new_n430_ ) -NET_1014 = NAND ( new_n435_, new_n434_, new_n429_ ) -new_n437_ = OR ( new_n371_, new_n431_ ) -new_n438_ = NAND ( new_n387_, NET_92 ) -new_n439_ = NAND ( new_n398_, new_n431_ ) -new_n440_ = NAND ( new_n439_, new_n438_ ) -new_n441_ = NAND ( new_n440_, new_n371_ ) -NET_1015 = NAND ( new_n441_, new_n437_, new_n374_ ) -new_n443_ = NAND ( new_n410_, new_n379_, new_n378_ ) -new_n444_ = NAND ( new_n443_, NET_89 ) -new_n445_ = OR ( new_n399_, new_n291_ ) -new_n446_ = NAND ( new_n445_, new_n400_ ) -new_n447_ = NAND ( new_n446_, new_n415_ ) -new_n448_ = NOT ( NET_89 ) -new_n449_ = OR ( new_n298_, new_n448_ ) -new_n450_ = NAND ( new_n332_, new_n301_ ) -new_n451_ = NAND ( new_n450_, new_n449_, new_n391_, new_n389_ ) -new_n452_ = NAND ( new_n451_, new_n296_ ) -new_n453_ = NAND ( new_n452_, new_n447_, new_n444_ ) -new_n454_ = NAND ( new_n453_, new_n371_ ) -new_n455_ = OR ( new_n371_, new_n291_ ) -NET_1016 = NAND ( new_n455_, new_n454_ ) -new_n457_ = NAND ( new_n348_, new_n331_, new_n290_, new_n297_ ) -new_n458_ = OR ( new_n389_, new_n295_ ) -new_n459_ = AND ( new_n458_, new_n457_, new_n324_ ) -new_n460_ = OR ( new_n308_, new_n298_ ) -new_n461_ = OR ( new_n307_, new_n290_ ) -new_n462_ = NAND ( new_n461_, new_n314_, new_n303_ ) -new_n463_ = NAND ( new_n462_, new_n460_ ) -new_n464_ = NAND ( new_n463_, new_n296_ ) -new_n465_ = OR ( new_n372_, new_n297_ ) -new_n466_ = AND ( new_n465_, new_n338_ ) -new_n467_ = OR ( new_n466_, new_n313_ ) -new_n468_ = OR ( new_n308_, new_n299_ ) -new_n469_ = OR ( new_n468_, new_n310_ ) -new_n470_ = NAND ( new_n469_, new_n467_, new_n464_, new_n459_ ) -new_n471_ = NOR ( new_n373_, new_n309_ ) -new_n472_ = NOR ( new_n471_, new_n297_ ) -new_n473_ = NOT ( new_n332_ ) -new_n474_ = OR ( new_n473_, new_n313_ ) -new_n475_ = OR ( new_n303_, new_n258_ ) -new_n476_ = NAND ( new_n475_, new_n474_, new_n409_, new_n338_ ) -new_n477_ = NOR ( new_n476_, new_n472_ ) -new_n478_ = NAND ( new_n477_, new_n470_ ) -new_n479_ = NAND ( new_n478_, NET_71 ) -new_n480_ = NAND ( new_n470_, new_n367_, new_n302_ ) -new_n481_ = AND ( new_n472_, new_n470_ ) -new_n482_ = NAND ( new_n481_, NET_86, NET_85 ) -new_n483_ = AND ( new_n476_, new_n470_ ) -new_n484_ = NAND ( new_n483_, NET_121, NET_120 ) -NET_1029 = NAND ( new_n484_, new_n482_, new_n480_, new_n479_ ) -new_n486_ = NAND ( new_n478_, NET_72 ) -new_n487_ = NOT ( NET_86 ) -new_n488_ = NAND ( new_n481_, new_n487_, NET_85 ) -new_n489_ = NOT ( NET_121 ) -new_n490_ = NAND ( new_n483_, new_n489_, NET_120 ) -NET_1030 = NAND ( new_n490_, new_n488_, new_n486_, new_n480_ ) -new_n492_ = NAND ( new_n478_, NET_73 ) -new_n493_ = NOT ( NET_85 ) -new_n494_ = NAND ( new_n481_, NET_86, new_n493_ ) -new_n495_ = NOR ( new_n489_, NET_120 ) -new_n496_ = NAND ( new_n495_, new_n483_ ) -NET_1031 = NAND ( new_n496_, new_n494_, new_n492_, new_n480_ ) -new_n498_ = NOT ( NET_120 ) -new_n499_ = NAND ( new_n483_, new_n489_, new_n498_ ) -new_n500_ = NAND ( new_n478_, NET_74 ) -new_n501_ = NAND ( new_n481_, new_n487_, new_n493_ ) -NET_1032 = NAND ( new_n501_, new_n500_, new_n499_, new_n480_ ) -new_n503_ = OR ( new_n311_, new_n298_ ) -new_n504_ = NAND ( new_n503_, new_n389_ ) -new_n505_ = NOR ( new_n335_, new_n296_ ) -new_n506_ = NAND ( new_n505_, new_n394_ ) -new_n507_ = AND ( new_n506_, new_n353_ ) -new_n508_ = OR ( new_n389_, new_n302_ ) -new_n509_ = OR ( new_n313_, new_n255_ ) -new_n510_ = NAND ( new_n509_, new_n508_ ) -new_n511_ = NAND ( new_n510_, new_n296_ ) -new_n512_ = NAND ( new_n511_, new_n507_, new_n350_ ) -new_n513_ = NAND ( new_n512_, new_n504_ ) -new_n514_ = NOT ( NET_99 ) -new_n515_ = OR ( new_n512_, new_n514_ ) -NET_1033 = NAND ( new_n515_, new_n513_ ) -new_n517_ = NOT ( new_n382_ ) -new_n518_ = OR ( new_n517_, new_n372_ ) -new_n519_ = NAND ( new_n409_, new_n338_ ) -new_n520_ = NAND ( new_n519_, NET_120 ) -new_n521_ = NAND ( new_n520_, new_n518_ ) -new_n522_ = NAND ( new_n521_, new_n512_ ) -new_n523_ = NOT ( NET_100 ) -new_n524_ = OR ( new_n512_, new_n523_ ) -NET_1034 = NAND ( new_n524_, new_n522_ ) -new_n526_ = NOR ( NET_4, new_n381_ ) -new_n527_ = OR ( new_n526_, NET_5 ) -new_n528_ = OR ( new_n527_, new_n372_ ) -new_n529_ = OR ( new_n257_, new_n489_ ) -new_n530_ = NAND ( new_n529_, new_n528_, new_n473_ ) -new_n531_ = NAND ( new_n530_, new_n512_ ) -new_n532_ = NAND ( new_n511_, new_n507_, new_n350_, NET_101 ) -NET_1035 = NAND ( new_n532_, new_n531_ ) -new_n534_ = NAND ( new_n355_, new_n335_ ) -new_n535_ = NAND ( new_n534_, new_n255_ ) -new_n536_ = OR ( new_n302_, new_n298_ ) -new_n537_ = NAND ( new_n536_, new_n313_ ) -new_n538_ = NAND ( new_n537_, new_n297_ ) -new_n539_ = NAND ( new_n367_, new_n331_, new_n298_ ) -new_n540_ = NAND ( new_n539_, new_n538_, new_n535_ ) -new_n541_ = NAND ( new_n461_, new_n303_, new_n310_ ) -new_n542_ = OR ( new_n336_, new_n299_ ) -new_n543_ = NAND ( new_n309_, new_n290_, new_n297_ ) -new_n544_ = NAND ( new_n543_, new_n542_, new_n541_, new_n360_ ) -new_n545_ = NAND ( new_n544_, new_n296_ ) -new_n546_ = NAND ( new_n545_, new_n507_, new_n459_ ) -new_n547_ = NAND ( new_n546_, new_n540_ ) -new_n548_ = NOT ( NET_110 ) -new_n549_ = OR ( new_n546_, new_n548_ ) -NET_1036 = NAND ( new_n549_, new_n547_ ) -NET_2397 = NOT ( NET_6 ) -NET_2398 = XOR ( NET_6, NET_117 ) -new_n553_ = NOT ( NET_7 ) -new_n554_ = NAND ( NET_113, NET_103, NET_102 ) -new_n555_ = NAND ( NET_106, NET_105, NET_104 ) -new_n556_ = NOR ( new_n555_, new_n554_ ) -new_n557_ = OR ( new_n556_, new_n553_ ) -new_n558_ = NAND ( new_n556_, NET_107 ) -NET_616 = NAND ( new_n558_, new_n557_ ) -new_n560_ = NOT ( NET_8 ) -new_n561_ = OR ( new_n556_, new_n560_ ) -new_n562_ = NAND ( new_n556_, NET_108 ) -NET_617 = NAND ( new_n562_, new_n561_ ) -new_n564_ = NOT ( NET_106 ) -new_n565_ = NAND ( new_n564_, NET_105, NET_104 ) -new_n566_ = OR ( new_n565_, new_n554_ ) -new_n567_ = NAND ( new_n566_, NET_9 ) -new_n568_ = NOT ( NET_107 ) -new_n569_ = OR ( new_n566_, new_n568_ ) -NET_618 = NAND ( new_n569_, new_n567_ ) -new_n571_ = NAND ( new_n566_, NET_10 ) -new_n572_ = NOT ( NET_108 ) -new_n573_ = OR ( new_n566_, new_n572_ ) -NET_619 = NAND ( new_n573_, new_n571_ ) -new_n575_ = NOT ( NET_105 ) -new_n576_ = NAND ( NET_106, new_n575_, NET_104 ) -new_n577_ = OR ( new_n576_, new_n554_ ) -new_n578_ = NAND ( new_n577_, NET_11 ) -new_n579_ = OR ( new_n577_, new_n568_ ) -NET_620 = NAND ( new_n579_, new_n578_ ) -new_n581_ = NAND ( new_n577_, NET_12 ) -new_n582_ = OR ( new_n577_, new_n572_ ) -NET_621 = NAND ( new_n582_, new_n581_ ) -new_n584_ = NAND ( new_n564_, new_n575_, NET_104 ) -new_n585_ = OR ( new_n584_, new_n554_ ) -new_n586_ = NAND ( new_n585_, NET_13 ) -new_n587_ = OR ( new_n585_, new_n568_ ) -NET_622 = NAND ( new_n587_, new_n586_ ) -new_n589_ = NAND ( new_n585_, NET_14 ) -new_n590_ = OR ( new_n585_, new_n572_ ) -NET_623 = NAND ( new_n590_, new_n589_ ) -new_n592_ = NOT ( NET_104 ) -new_n593_ = NAND ( NET_106, NET_105, new_n592_ ) -new_n594_ = OR ( new_n593_, new_n554_ ) -new_n595_ = NAND ( new_n594_, NET_15 ) -new_n596_ = OR ( new_n594_, new_n568_ ) -NET_624 = NAND ( new_n596_, new_n595_ ) -new_n598_ = NAND ( new_n594_, NET_16 ) -new_n599_ = OR ( new_n594_, new_n572_ ) -NET_625 = NAND ( new_n599_, new_n598_ ) -new_n601_ = NAND ( new_n564_, NET_105, new_n592_ ) -new_n602_ = OR ( new_n601_, new_n554_ ) -new_n603_ = NAND ( new_n602_, NET_17 ) -new_n604_ = OR ( new_n602_, new_n568_ ) -NET_626 = NAND ( new_n604_, new_n603_ ) -new_n606_ = NAND ( new_n602_, NET_18 ) -new_n607_ = OR ( new_n602_, new_n572_ ) -NET_627 = NAND ( new_n607_, new_n606_ ) -new_n609_ = NAND ( NET_106, new_n575_, new_n592_ ) -new_n610_ = OR ( new_n609_, new_n554_ ) -new_n611_ = NAND ( new_n610_, NET_19 ) -new_n612_ = OR ( new_n610_, new_n568_ ) -NET_628 = NAND ( new_n612_, new_n611_ ) -new_n614_ = NAND ( new_n610_, NET_20 ) -new_n615_ = OR ( new_n610_, new_n572_ ) -NET_629 = NAND ( new_n615_, new_n614_ ) -new_n617_ = NOT ( NET_21 ) -new_n618_ = NAND ( new_n564_, new_n575_, new_n592_ ) -new_n619_ = NOR ( new_n618_, new_n554_ ) -new_n620_ = OR ( new_n619_, new_n617_ ) -new_n621_ = NAND ( new_n619_, NET_107 ) -NET_630 = NAND ( new_n621_, new_n620_ ) -new_n623_ = NOT ( NET_22 ) -new_n624_ = OR ( new_n619_, new_n623_ ) -new_n625_ = NAND ( new_n619_, NET_108 ) -NET_631 = NAND ( new_n625_, new_n624_ ) -new_n627_ = NOT ( NET_102 ) -new_n628_ = NAND ( NET_113, NET_103, new_n627_ ) -new_n629_ = OR ( new_n628_, new_n555_ ) -new_n630_ = NAND ( new_n629_, NET_39 ) -new_n631_ = OR ( new_n629_, new_n568_ ) -NET_632 = NAND ( new_n631_, new_n630_ ) -new_n633_ = NAND ( new_n629_, NET_40 ) -new_n634_ = OR ( new_n629_, new_n572_ ) -NET_633 = NAND ( new_n634_, new_n633_ ) -new_n636_ = OR ( new_n628_, new_n565_ ) -new_n637_ = NAND ( new_n636_, NET_41 ) -new_n638_ = OR ( new_n636_, new_n568_ ) -NET_634 = NAND ( new_n638_, new_n637_ ) -new_n640_ = NAND ( new_n636_, NET_42 ) -new_n641_ = OR ( new_n636_, new_n572_ ) -NET_635 = NAND ( new_n641_, new_n640_ ) -new_n643_ = NOT ( NET_43 ) -new_n644_ = NOR ( new_n628_, new_n576_ ) -new_n645_ = OR ( new_n644_, new_n643_ ) -new_n646_ = NAND ( new_n644_, NET_107 ) -NET_636 = NAND ( new_n646_, new_n645_ ) -new_n648_ = NOT ( NET_44 ) -new_n649_ = OR ( new_n644_, new_n648_ ) -new_n650_ = NAND ( new_n644_, NET_108 ) -NET_637 = NAND ( new_n650_, new_n649_ ) -new_n652_ = NOT ( NET_45 ) -new_n653_ = NOR ( new_n628_, new_n584_ ) -new_n654_ = OR ( new_n653_, new_n652_ ) -new_n655_ = NAND ( new_n653_, NET_107 ) -NET_638 = NAND ( new_n655_, new_n654_ ) -new_n657_ = NOT ( NET_46 ) -new_n658_ = OR ( new_n653_, new_n657_ ) -new_n659_ = NAND ( new_n653_, NET_108 ) -NET_639 = NAND ( new_n659_, new_n658_ ) -new_n661_ = NOT ( NET_47 ) -new_n662_ = NOR ( new_n628_, new_n593_ ) -new_n663_ = OR ( new_n662_, new_n661_ ) -new_n664_ = NAND ( new_n662_, NET_107 ) -NET_640 = NAND ( new_n664_, new_n663_ ) -new_n666_ = NOT ( NET_48 ) -new_n667_ = OR ( new_n662_, new_n666_ ) -new_n668_ = NAND ( new_n662_, NET_108 ) -NET_641 = NAND ( new_n668_, new_n667_ ) -new_n670_ = NOT ( NET_49 ) -new_n671_ = NOR ( new_n628_, new_n601_ ) -new_n672_ = OR ( new_n671_, new_n670_ ) -new_n673_ = NAND ( new_n671_, NET_107 ) -NET_642 = NAND ( new_n673_, new_n672_ ) -new_n675_ = NOT ( NET_50 ) -new_n676_ = OR ( new_n671_, new_n675_ ) -new_n677_ = NAND ( new_n671_, NET_108 ) -NET_643 = NAND ( new_n677_, new_n676_ ) -new_n679_ = OR ( new_n628_, new_n609_ ) -new_n680_ = NAND ( new_n679_, NET_51 ) -new_n681_ = OR ( new_n679_, new_n568_ ) -NET_644 = NAND ( new_n681_, new_n680_ ) -new_n683_ = NAND ( new_n679_, NET_52 ) -new_n684_ = OR ( new_n679_, new_n572_ ) -NET_645 = NAND ( new_n684_, new_n683_ ) -new_n686_ = OR ( new_n628_, new_n618_ ) -new_n687_ = NAND ( new_n686_, NET_53 ) -new_n688_ = OR ( new_n686_, new_n568_ ) -NET_646 = NAND ( new_n688_, new_n687_ ) -new_n690_ = NAND ( new_n686_, NET_54 ) -new_n691_ = OR ( new_n686_, new_n572_ ) -NET_647 = NAND ( new_n691_, new_n690_ ) -new_n693_ = NOT ( NET_103 ) -new_n694_ = NAND ( NET_113, new_n693_, NET_102 ) -new_n695_ = OR ( new_n694_, new_n555_ ) -new_n696_ = NAND ( new_n695_, NET_23 ) -new_n697_ = OR ( new_n695_, new_n568_ ) -NET_745 = NAND ( new_n697_, new_n696_ ) -new_n699_ = NAND ( new_n695_, NET_24 ) -new_n700_ = OR ( new_n695_, new_n572_ ) -NET_746 = NAND ( new_n700_, new_n699_ ) -new_n702_ = NOT ( NET_25 ) -new_n703_ = NOR ( new_n694_, new_n565_ ) -new_n704_ = OR ( new_n703_, new_n702_ ) -new_n705_ = NAND ( new_n703_, NET_107 ) -NET_747 = NAND ( new_n705_, new_n704_ ) -new_n707_ = NOT ( NET_26 ) -new_n708_ = OR ( new_n703_, new_n707_ ) -new_n709_ = NAND ( new_n703_, NET_108 ) -NET_748 = NAND ( new_n709_, new_n708_ ) -new_n711_ = NOT ( NET_27 ) -new_n712_ = NOR ( new_n694_, new_n576_ ) -new_n713_ = OR ( new_n712_, new_n711_ ) -new_n714_ = NAND ( new_n712_, NET_107 ) -NET_749 = NAND ( new_n714_, new_n713_ ) -new_n716_ = NOT ( NET_28 ) -new_n717_ = OR ( new_n712_, new_n716_ ) -new_n718_ = NAND ( new_n712_, NET_108 ) -NET_750 = NAND ( new_n718_, new_n717_ ) -new_n720_ = NOT ( NET_29 ) -new_n721_ = NOR ( new_n694_, new_n584_ ) -new_n722_ = OR ( new_n721_, new_n720_ ) -new_n723_ = NAND ( new_n721_, NET_107 ) -NET_751 = NAND ( new_n723_, new_n722_ ) -new_n725_ = NOT ( NET_30 ) -new_n726_ = OR ( new_n721_, new_n725_ ) -new_n727_ = NAND ( new_n721_, NET_108 ) -NET_752 = NAND ( new_n727_, new_n726_ ) -new_n729_ = NOT ( NET_31 ) -new_n730_ = NOR ( new_n694_, new_n593_ ) -new_n731_ = OR ( new_n730_, new_n729_ ) -new_n732_ = NAND ( new_n730_, NET_107 ) -NET_753 = NAND ( new_n732_, new_n731_ ) -new_n734_ = NOT ( NET_32 ) -new_n735_ = OR ( new_n730_, new_n734_ ) -new_n736_ = NAND ( new_n730_, NET_108 ) -NET_754 = NAND ( new_n736_, new_n735_ ) -new_n738_ = NOT ( NET_33 ) -new_n739_ = NOR ( new_n694_, new_n601_ ) -new_n740_ = OR ( new_n739_, new_n738_ ) -new_n741_ = NAND ( new_n739_, NET_107 ) -NET_755 = NAND ( new_n741_, new_n740_ ) -new_n743_ = NOT ( NET_34 ) -new_n744_ = OR ( new_n739_, new_n743_ ) -new_n745_ = NAND ( new_n739_, NET_108 ) -NET_756 = NAND ( new_n745_, new_n744_ ) -new_n747_ = NOT ( NET_35 ) -new_n748_ = NOR ( new_n694_, new_n609_ ) -new_n749_ = OR ( new_n748_, new_n747_ ) -new_n750_ = NAND ( new_n748_, NET_107 ) -NET_757 = NAND ( new_n750_, new_n749_ ) -new_n752_ = NOT ( NET_36 ) -new_n753_ = OR ( new_n748_, new_n752_ ) -new_n754_ = NAND ( new_n748_, NET_108 ) -NET_758 = NAND ( new_n754_, new_n753_ ) -new_n756_ = OR ( new_n694_, new_n618_ ) -new_n757_ = NAND ( new_n756_, NET_37 ) -new_n758_ = OR ( new_n756_, new_n568_ ) -NET_759 = NAND ( new_n758_, new_n757_ ) -new_n760_ = NAND ( new_n756_, NET_38 ) -new_n761_ = OR ( new_n756_, new_n572_ ) -NET_760 = NAND ( new_n761_, new_n760_ ) -new_n763_ = NAND ( NET_113, new_n693_, new_n627_ ) -new_n764_ = OR ( new_n763_, new_n555_ ) -new_n765_ = NAND ( new_n764_, NET_55 ) -new_n766_ = OR ( new_n764_, new_n568_ ) -NET_761 = NAND ( new_n766_, new_n765_ ) -new_n768_ = NAND ( new_n764_, NET_56 ) -new_n769_ = OR ( new_n764_, new_n572_ ) -NET_762 = NAND ( new_n769_, new_n768_ ) -new_n771_ = NOT ( NET_57 ) -new_n772_ = NOR ( new_n763_, new_n565_ ) -new_n773_ = OR ( new_n772_, new_n771_ ) -new_n774_ = NAND ( new_n772_, NET_107 ) -NET_763 = NAND ( new_n774_, new_n773_ ) -new_n776_ = NOT ( NET_58 ) -new_n777_ = OR ( new_n772_, new_n776_ ) -new_n778_ = NAND ( new_n772_, NET_108 ) -NET_764 = NAND ( new_n778_, new_n777_ ) -new_n780_ = NOT ( NET_59 ) -new_n781_ = NOR ( new_n763_, new_n576_ ) -new_n782_ = OR ( new_n781_, new_n780_ ) -new_n783_ = NAND ( new_n781_, NET_107 ) -NET_765 = NAND ( new_n783_, new_n782_ ) -new_n785_ = NOT ( NET_60 ) -new_n786_ = OR ( new_n781_, new_n785_ ) -new_n787_ = NAND ( new_n781_, NET_108 ) -NET_766 = NAND ( new_n787_, new_n786_ ) -new_n789_ = NOT ( NET_61 ) -new_n790_ = NOR ( new_n763_, new_n584_ ) -new_n791_ = OR ( new_n790_, new_n789_ ) -new_n792_ = NAND ( new_n790_, NET_107 ) -NET_767 = NAND ( new_n792_, new_n791_ ) -new_n794_ = NOT ( NET_62 ) -new_n795_ = OR ( new_n790_, new_n794_ ) -new_n796_ = NAND ( new_n790_, NET_108 ) -NET_768 = NAND ( new_n796_, new_n795_ ) -new_n798_ = NOT ( NET_63 ) -new_n799_ = NOR ( new_n763_, new_n593_ ) -new_n800_ = OR ( new_n799_, new_n798_ ) -new_n801_ = NAND ( new_n799_, NET_107 ) -NET_769 = NAND ( new_n801_, new_n800_ ) -new_n803_ = NOT ( NET_64 ) -new_n804_ = OR ( new_n799_, new_n803_ ) -new_n805_ = NAND ( new_n799_, NET_108 ) -NET_770 = NAND ( new_n805_, new_n804_ ) -new_n807_ = NOT ( NET_65 ) -new_n808_ = NOR ( new_n763_, new_n601_ ) -new_n809_ = OR ( new_n808_, new_n807_ ) -new_n810_ = NAND ( new_n808_, NET_107 ) -NET_771 = NAND ( new_n810_, new_n809_ ) -new_n812_ = NOT ( NET_66 ) -new_n813_ = OR ( new_n808_, new_n812_ ) -new_n814_ = NAND ( new_n808_, NET_108 ) -NET_772 = NAND ( new_n814_, new_n813_ ) -new_n816_ = NOT ( NET_67 ) -new_n817_ = NOR ( new_n763_, new_n609_ ) -new_n818_ = OR ( new_n817_, new_n816_ ) -new_n819_ = NAND ( new_n817_, NET_107 ) -NET_773 = NAND ( new_n819_, new_n818_ ) -new_n821_ = NOT ( NET_68 ) -new_n822_ = OR ( new_n817_, new_n821_ ) -new_n823_ = NAND ( new_n817_, NET_108 ) -NET_774 = NAND ( new_n823_, new_n822_ ) -new_n825_ = OR ( new_n763_, new_n618_ ) -new_n826_ = NAND ( new_n825_, NET_69 ) -new_n827_ = OR ( new_n825_, new_n568_ ) -NET_775 = NAND ( new_n827_, new_n826_ ) -new_n829_ = NAND ( new_n825_, NET_70 ) -new_n830_ = OR ( new_n825_, new_n572_ ) -NET_776 = NAND ( new_n830_, new_n829_ ) -new_n832_ = NAND ( NET_116, NET_115 ) -new_n833_ = NOT ( new_n832_ ) -new_n834_ = NOR ( new_n833_, NET_114 ) -new_n835_ = NOR ( new_n514_, NET_101 ) -new_n836_ = NOR ( new_n835_, NET_100 ) -new_n837_ = OR ( new_n836_, NET_114 ) -new_n838_ = NAND ( new_n836_, NET_114 ) -new_n839_ = NOT ( NET_115 ) -new_n840_ = NOT ( NET_116 ) -new_n841_ = OR ( new_n840_, NET_101 ) -new_n842_ = NAND ( new_n841_, new_n839_ ) -new_n843_ = NAND ( new_n842_, NET_100 ) -new_n844_ = NAND ( NET_99, NET_101 ) -new_n845_ = NAND ( new_n844_, new_n841_ ) -new_n846_ = NAND ( new_n845_, NET_115 ) -new_n847_ = NAND ( new_n846_, new_n843_, new_n838_ ) -new_n848_ = NAND ( new_n847_, new_n837_ ) -new_n849_ = NOR ( new_n514_, new_n523_ ) -new_n850_ = NOT ( new_n849_ ) -new_n851_ = NAND ( new_n850_, new_n848_, NET_110 ) -NET_809 = NOR ( new_n851_, new_n834_ ) -new_n853_ = NOR ( NET_116, NET_115 ) -NET_810 = NOR ( new_n853_, new_n851_, new_n833_ ) -NET_811 = NOR ( new_n851_, NET_116 ) -new_n856_ = NAND ( new_n360_, new_n335_ ) -new_n857_ = NAND ( new_n856_, new_n296_ ) -NET_812 = NAND ( new_n857_, new_n352_, new_n337_, new_n473_ ) -new_n859_ = NAND ( new_n311_, new_n307_, new_n298_ ) -new_n860_ = NAND ( new_n859_, NET_113 ) -NET_813 = NAND ( new_n860_, new_n312_ ) -new_n862_ = NOT ( new_n316_ ) -new_n863_ = NAND ( new_n348_, new_n862_ ) -new_n864_ = NOT ( new_n505_ ) -new_n865_ = OR ( new_n334_, new_n309_ ) -new_n866_ = AND ( new_n865_, new_n542_, new_n389_ ) -new_n867_ = NOR ( new_n328_, new_n295_ ) -new_n868_ = OR ( new_n867_, new_n326_ ) -new_n869_ = OR ( new_n360_, new_n296_ ) -new_n870_ = AND ( new_n869_, new_n468_ ) -new_n871_ = AND ( new_n870_, new_n868_, new_n866_, new_n864_ ) -NET_862 = NAND ( new_n871_, new_n863_, new_n305_ ) -new_n873_ = NAND ( new_n308_, new_n303_ ) -new_n874_ = NAND ( new_n873_, new_n298_, new_n297_ ) -new_n875_ = NAND ( new_n874_, new_n864_, new_n365_ ) -new_n876_ = OR ( new_n316_, new_n296_ ) -new_n877_ = OR ( new_n372_, new_n303_ ) -new_n878_ = AND ( new_n877_, new_n450_, new_n324_ ) -new_n879_ = NAND ( new_n878_, new_n876_, new_n870_ ) -new_n880_ = NOR ( new_n879_, new_n875_ ) -new_n881_ = AND ( new_n862_, new_n288_ ) -new_n882_ = NOR ( new_n337_, new_n308_ ) -new_n883_ = NOR ( new_n882_, new_n881_ ) -NET_863 = NAND ( new_n883_, new_n880_, new_n349_, new_n329_ ) -new_n885_ = OR ( new_n849_, new_n848_ ) -new_n886_ = NAND ( new_n885_, NET_112, NET_110 ) -new_n887_ = OR ( new_n885_, new_n548_, NET_109 ) -NET_864 = NAND ( new_n887_, new_n886_ ) -new_n889_ = NAND ( new_n312_, NET_107 ) -new_n890_ = NAND ( new_n311_, new_n309_, new_n298_, NET_118 ) -NET_870 = NAND ( new_n890_, new_n889_ ) -new_n892_ = NAND ( new_n312_, NET_108 ) -new_n893_ = NAND ( new_n311_, new_n309_, new_n298_, NET_119 ) -NET_871 = NAND ( new_n893_, new_n892_ ) -new_n895_ = OR ( new_n584_, new_n789_ ) -new_n896_ = OR ( new_n576_, new_n780_ ) -new_n897_ = OR ( new_n565_, new_n771_ ) -new_n898_ = NAND ( NET_55, NET_106, NET_105, NET_104 ) -new_n899_ = NAND ( new_n898_, new_n897_, new_n896_, new_n895_ ) -new_n900_ = NAND ( NET_69, new_n564_, new_n575_, new_n592_ ) -new_n901_ = OR ( new_n609_, new_n816_ ) -new_n902_ = OR ( new_n601_, new_n807_ ) -new_n903_ = OR ( new_n593_, new_n798_ ) -new_n904_ = NAND ( new_n903_, new_n902_, new_n901_, new_n900_ ) -new_n905_ = NOR ( new_n904_, new_n899_ ) -new_n906_ = NOR ( new_n905_, NET_102 ) -new_n907_ = OR ( new_n584_, new_n720_ ) -new_n908_ = OR ( new_n576_, new_n711_ ) -new_n909_ = OR ( new_n565_, new_n702_ ) -new_n910_ = NAND ( NET_23, NET_106, NET_105, NET_104 ) -new_n911_ = NAND ( new_n910_, new_n909_, new_n908_, new_n907_ ) -new_n912_ = NAND ( NET_37, new_n564_, new_n575_, new_n592_ ) -new_n913_ = OR ( new_n609_, new_n747_ ) -new_n914_ = OR ( new_n601_, new_n738_ ) -new_n915_ = OR ( new_n593_, new_n729_ ) -new_n916_ = NAND ( new_n915_, new_n914_, new_n913_, new_n912_ ) -new_n917_ = NOR ( new_n916_, new_n911_ ) -new_n918_ = NOR ( new_n917_, new_n627_ ) -new_n919_ = NOR ( new_n918_, new_n906_ ) -new_n920_ = NOR ( new_n919_, NET_103 ) -new_n921_ = OR ( new_n584_, new_n652_ ) -new_n922_ = OR ( new_n576_, new_n643_ ) -new_n923_ = NAND ( NET_41, new_n564_, NET_105, NET_104 ) -new_n924_ = NAND ( NET_39, NET_106, NET_105, NET_104 ) -new_n925_ = NAND ( new_n924_, new_n923_, new_n922_, new_n921_ ) -new_n926_ = NAND ( NET_53, new_n564_, new_n575_, new_n592_ ) -new_n927_ = NAND ( NET_51, NET_106, new_n575_, new_n592_ ) -new_n928_ = OR ( new_n601_, new_n670_ ) -new_n929_ = OR ( new_n593_, new_n661_ ) -new_n930_ = NAND ( new_n929_, new_n928_, new_n927_, new_n926_ ) -new_n931_ = NOR ( new_n930_, new_n925_ ) -new_n932_ = NOR ( new_n931_, NET_102 ) -new_n933_ = NAND ( NET_13, new_n564_, new_n575_, NET_104 ) -new_n934_ = NAND ( NET_11, NET_106, new_n575_, NET_104 ) -new_n935_ = NAND ( NET_9, new_n564_, NET_105, NET_104 ) -new_n936_ = OR ( new_n555_, new_n553_ ) -new_n937_ = NAND ( new_n936_, new_n935_, new_n934_, new_n933_ ) -new_n938_ = OR ( new_n618_, new_n617_ ) -new_n939_ = NAND ( NET_19, NET_106, new_n575_, new_n592_ ) -new_n940_ = NAND ( NET_17, new_n564_, NET_105, new_n592_ ) -new_n941_ = NAND ( NET_15, NET_106, NET_105, new_n592_ ) -new_n942_ = NAND ( new_n941_, new_n940_, new_n939_, new_n938_ ) -new_n943_ = NOR ( new_n942_, new_n937_ ) -new_n944_ = NOR ( new_n943_, new_n627_ ) -new_n945_ = NOR ( new_n944_, new_n932_ ) -new_n946_ = NOR ( new_n945_, new_n693_ ) -NET_872 = OR ( new_n946_, new_n920_ ) -new_n948_ = OR ( new_n584_, new_n794_ ) -new_n949_ = OR ( new_n576_, new_n785_ ) -new_n950_ = OR ( new_n565_, new_n776_ ) -new_n951_ = NAND ( NET_56, NET_106, NET_105, NET_104 ) -new_n952_ = NAND ( new_n951_, new_n950_, new_n949_, new_n948_ ) -new_n953_ = NAND ( NET_70, new_n564_, new_n575_, new_n592_ ) -new_n954_ = OR ( new_n609_, new_n821_ ) -new_n955_ = OR ( new_n601_, new_n812_ ) -new_n956_ = OR ( new_n593_, new_n803_ ) -new_n957_ = NAND ( new_n956_, new_n955_, new_n954_, new_n953_ ) -new_n958_ = NOR ( new_n957_, new_n952_ ) -new_n959_ = NOR ( new_n958_, NET_102 ) -new_n960_ = OR ( new_n584_, new_n725_ ) -new_n961_ = OR ( new_n576_, new_n716_ ) -new_n962_ = OR ( new_n565_, new_n707_ ) -new_n963_ = NAND ( NET_24, NET_106, NET_105, NET_104 ) -new_n964_ = NAND ( new_n963_, new_n962_, new_n961_, new_n960_ ) -new_n965_ = NAND ( NET_38, new_n564_, new_n575_, new_n592_ ) -new_n966_ = OR ( new_n609_, new_n752_ ) -new_n967_ = OR ( new_n601_, new_n743_ ) -new_n968_ = OR ( new_n593_, new_n734_ ) -new_n969_ = NAND ( new_n968_, new_n967_, new_n966_, new_n965_ ) -new_n970_ = NOR ( new_n969_, new_n964_ ) -new_n971_ = NOR ( new_n970_, new_n627_ ) -new_n972_ = NOR ( new_n971_, new_n959_ ) -new_n973_ = NOR ( new_n972_, NET_103 ) -new_n974_ = OR ( new_n584_, new_n657_ ) -new_n975_ = OR ( new_n576_, new_n648_ ) -new_n976_ = NAND ( NET_42, new_n564_, NET_105, NET_104 ) -new_n977_ = NAND ( NET_40, NET_106, NET_105, NET_104 ) -new_n978_ = NAND ( new_n977_, new_n976_, new_n975_, new_n974_ ) -new_n979_ = NAND ( NET_54, new_n564_, new_n575_, new_n592_ ) -new_n980_ = NAND ( NET_52, NET_106, new_n575_, new_n592_ ) -new_n981_ = OR ( new_n601_, new_n675_ ) -new_n982_ = OR ( new_n593_, new_n666_ ) -new_n983_ = NAND ( new_n982_, new_n981_, new_n980_, new_n979_ ) -new_n984_ = NOR ( new_n983_, new_n978_ ) -new_n985_ = NOR ( new_n984_, NET_102 ) -new_n986_ = NAND ( NET_14, new_n564_, new_n575_, NET_104 ) -new_n987_ = NAND ( NET_12, NET_106, new_n575_, NET_104 ) -new_n988_ = NAND ( new_n564_, NET_105, NET_104, NET_10 ) -new_n989_ = OR ( new_n555_, new_n560_ ) -new_n990_ = NAND ( new_n989_, new_n988_, new_n987_, new_n986_ ) -new_n991_ = OR ( new_n618_, new_n623_ ) -new_n992_ = NAND ( NET_20, NET_106, new_n575_, new_n592_ ) -new_n993_ = NAND ( NET_18, new_n564_, NET_105, new_n592_ ) -new_n994_ = NAND ( NET_16, NET_106, NET_105, new_n592_ ) -new_n995_ = NAND ( new_n994_, new_n993_, new_n992_, new_n991_ ) -new_n996_ = NOR ( new_n995_, new_n990_ ) -new_n997_ = NOR ( new_n996_, new_n627_ ) -new_n998_ = NOR ( new_n997_, new_n985_ ) -new_n999_ = NOR ( new_n998_, new_n693_ ) -NET_873 = OR ( new_n999_, new_n973_ ) -new_n1001_ = NAND ( new_n332_, new_n331_ ) -new_n1002_ = NAND ( new_n1001_, new_n316_, new_n326_ ) -new_n1003_ = NAND ( new_n1002_, new_n295_ ) -new_n1004_ = OR ( new_n336_, new_n315_ ) -new_n1005_ = AND ( new_n1004_, new_n1003_, new_n870_ ) -new_n1006_ = NAND ( NET_121, NET_120 ) -new_n1007_ = NAND ( new_n1006_, NET_2 ) -new_n1008_ = NAND ( new_n1007_, new_n381_ ) -new_n1009_ = NAND ( NET_3, new_n489_, NET_120 ) -new_n1010_ = NAND ( new_n1009_, new_n1008_, new_n382_ ) -new_n1011_ = NOT ( NET_4 ) -new_n1012_ = NOR ( new_n495_, new_n1011_ ) -new_n1013_ = OR ( new_n1012_, NET_5 ) -new_n1014_ = NAND ( NET_5, new_n489_, new_n498_ ) -new_n1015_ = NAND ( new_n1014_, new_n1013_ ) -new_n1016_ = NAND ( new_n1015_, new_n1010_ ) -new_n1017_ = NAND ( new_n1016_, new_n505_ ) -new_n1018_ = OR ( new_n473_, new_n308_ ) -new_n1019_ = NAND ( new_n361_, new_n332_ ) -new_n1020_ = AND ( new_n1019_, new_n1018_, new_n542_, new_n365_ ) -new_n1021_ = OR ( new_n313_, new_n290_ ) -new_n1022_ = AND ( new_n1021_, new_n1020_, new_n474_ ) -NET_909 = NAND ( new_n1022_, new_n1017_, new_n1005_, new_n350_ ) -new_n1024_ = OR ( new_n389_, new_n307_ ) -new_n1025_ = NAND ( new_n1020_, new_n1024_, new_n340_ ) -new_n1026_ = NAND ( new_n1025_, new_n296_ ) -new_n1027_ = OR ( new_n381_, NET_121 ) -new_n1028_ = NAND ( new_n381_, NET_2, NET_121 ) -new_n1029_ = NAND ( new_n1028_, new_n1027_ ) -new_n1030_ = NAND ( new_n1029_, new_n382_ ) -new_n1031_ = NAND ( new_n1030_, NET_120 ) -new_n1032_ = NOR ( NET_5, NET_121 ) -new_n1033_ = NOR ( NET_5, new_n1011_ ) -new_n1034_ = NOR ( new_n1033_, new_n489_ ) -new_n1035_ = NOR ( new_n1034_, new_n1032_ ) -new_n1036_ = OR ( new_n1035_, NET_120 ) -new_n1037_ = NAND ( new_n1036_, new_n1031_, new_n505_ ) -new_n1038_ = NAND ( new_n508_, new_n474_ ) -new_n1039_ = NAND ( new_n1038_, new_n295_ ) -new_n1040_ = OR ( new_n372_, new_n362_ ) -new_n1041_ = AND ( new_n1040_, new_n1039_, new_n1037_, new_n312_ ) -NET_910 = NAND ( new_n1041_, new_n1026_, new_n1005_, new_n883_ ) -new_n1043_ = OR ( new_n338_, new_n303_ ) -new_n1044_ = OR ( new_n396_, new_n314_ ) -new_n1045_ = NAND ( new_n1044_, new_n1043_, new_n1040_ ) -new_n1046_ = NAND ( new_n362_, new_n313_ ) -new_n1047_ = NAND ( new_n1046_, new_n1045_ ) -new_n1048_ = OR ( new_n1047_, new_n321_ ) -new_n1049_ = NAND ( new_n308_, new_n255_ ) -new_n1050_ = NAND ( new_n1049_, new_n1045_ ) -new_n1051_ = OR ( new_n1050_, new_n260_ ) -new_n1052_ = OR ( new_n1045_, new_n627_ ) -NET_911 = NAND ( new_n1052_, new_n1051_, new_n1048_ ) -new_n1054_ = NOT ( NET_76 ) -new_n1055_ = OR ( new_n1047_, new_n1054_ ) -new_n1056_ = OR ( new_n1050_, new_n277_ ) -new_n1057_ = OR ( new_n1045_, new_n693_ ) -NET_912 = NAND ( new_n1057_, new_n1056_, new_n1055_ ) -new_n1059_ = NOT ( NET_77 ) -new_n1060_ = OR ( new_n1047_, new_n1059_ ) -new_n1061_ = OR ( new_n1050_, new_n264_ ) -new_n1062_ = OR ( new_n1045_, new_n592_ ) -NET_913 = NAND ( new_n1062_, new_n1061_, new_n1060_ ) -new_n1064_ = NOT ( NET_78 ) -new_n1065_ = OR ( new_n1047_, new_n1064_ ) -new_n1066_ = OR ( new_n1050_, new_n272_ ) -new_n1067_ = OR ( new_n1045_, new_n575_ ) -NET_914 = NAND ( new_n1067_, new_n1066_, new_n1065_ ) -new_n1069_ = NOT ( NET_79 ) -new_n1070_ = OR ( new_n1047_, new_n1069_ ) -new_n1071_ = OR ( new_n1050_, new_n268_ ) -new_n1072_ = OR ( new_n1045_, new_n564_ ) -NET_915 = NAND ( new_n1072_, new_n1071_, new_n1070_ ) -new_n1074_ = OR ( new_n885_, new_n548_ ) -new_n1075_ = NAND ( new_n1074_, NET_109 ) -NET_916 = NAND ( new_n1075_, new_n887_ ) -new_n1077_ = NAND ( new_n330_, NET_87 ) -new_n1078_ = NOT ( new_n330_ ) -new_n1079_ = NOT ( NET_87 ) -new_n1080_ = NOT ( NET_88 ) -new_n1081_ = NOT ( NET_90 ) -new_n1082_ = NOR ( NET_92, NET_91 ) -new_n1083_ = NAND ( new_n1082_, new_n1081_ ) -new_n1084_ = NOR ( new_n1083_, NET_89 ) -new_n1085_ = AND ( new_n1084_, new_n1080_ ) -new_n1086_ = NAND ( new_n1085_, new_n1079_ ) -new_n1087_ = OR ( new_n1085_, new_n1079_ ) -new_n1088_ = NAND ( new_n1087_, new_n1086_, new_n257_ ) -new_n1089_ = NAND ( new_n1088_, new_n1078_ ) -NET_918 = NAND ( new_n1089_, new_n1077_ ) -new_n1091_ = NAND ( new_n330_, NET_92 ) -new_n1092_ = NOT ( NET_92 ) -new_n1093_ = NOR ( new_n297_, new_n1092_ ) -new_n1094_ = OR ( new_n1093_, new_n330_ ) -NET_919 = NAND ( new_n1094_, new_n1091_ ) -new_n1096_ = NAND ( new_n275_, new_n266_ ) -new_n1097_ = OR ( new_n275_, new_n266_ ) -new_n1098_ = NAND ( new_n1097_, new_n1096_ ) -new_n1099_ = OR ( new_n1098_, new_n319_ ) -new_n1100_ = OR ( new_n318_, new_n1059_ ) -NET_955 = NAND ( new_n1100_, new_n1099_ ) -new_n1102_ = NOR ( new_n274_, new_n270_ ) -new_n1103_ = NOR ( new_n1102_, new_n275_ ) -new_n1104_ = NAND ( new_n1103_, new_n318_, new_n290_, new_n288_ ) -new_n1105_ = OR ( new_n318_, new_n1064_ ) -NET_956 = NAND ( new_n1105_, new_n1104_ ) -new_n1107_ = OR ( new_n319_, new_n270_ ) -new_n1108_ = OR ( new_n318_, new_n1069_ ) -NET_957 = NAND ( new_n1108_, new_n1107_ ) -new_n1110_ = NOR ( new_n330_, new_n297_ ) -new_n1111_ = OR ( new_n1084_, NET_88 ) -new_n1112_ = NAND ( new_n1084_, NET_88 ) -new_n1113_ = NAND ( new_n1112_, new_n1111_, new_n1110_ ) -new_n1114_ = NAND ( new_n330_, NET_88 ) -NET_958 = NAND ( new_n1114_, new_n1113_ ) -new_n1116_ = NAND ( new_n1083_, new_n448_ ) -new_n1117_ = OR ( new_n1083_, new_n448_ ) -new_n1118_ = NAND ( new_n1117_, new_n1116_, new_n1110_ ) -new_n1119_ = NAND ( new_n330_, NET_89 ) -NET_959 = NAND ( new_n1119_, new_n1118_ ) -new_n1121_ = OR ( new_n1082_, NET_90 ) -new_n1122_ = NAND ( new_n1082_, NET_90 ) -new_n1123_ = NAND ( new_n1122_, new_n1121_, new_n1110_ ) -new_n1124_ = NAND ( new_n330_, NET_90 ) -NET_960 = NAND ( new_n1124_, new_n1123_ ) -new_n1126_ = OR ( new_n1092_, NET_91 ) -new_n1127_ = NOT ( NET_91 ) -new_n1128_ = OR ( NET_92, new_n1127_ ) -new_n1129_ = NAND ( new_n1128_, new_n1126_, new_n1110_ ) -new_n1130_ = NAND ( new_n330_, NET_91 ) -NET_961 = NAND ( new_n1130_, new_n1129_ ) -new_n1132_ = NAND ( new_n506_, NET_85 ) -new_n1133_ = OR ( new_n506_, new_n517_ ) -NET_966 = NAND ( new_n1133_, new_n1132_ ) -new_n1135_ = OR ( new_n527_, new_n506_ ) -new_n1136_ = NAND ( new_n506_, NET_86 ) -NET_967 = NAND ( new_n1136_, new_n1135_ ) -new_n1138_ = OR ( new_n335_, new_n295_ ) -new_n1139_ = NAND ( new_n1138_, new_n1017_, new_n325_ ) -new_n1140_ = NAND ( new_n1139_, new_n257_ ) -new_n1141_ = NAND ( new_n1138_, new_n1017_, new_n325_, NET_111 ) -NET_968 = NAND ( new_n1141_, new_n1140_ ) -new_n1143_ = XOR ( new_n279_, new_n1096_ ) -new_n1144_ = OR ( new_n1143_, new_n319_ ) -new_n1145_ = OR ( new_n318_, new_n1054_ ) -NET_981 = NAND ( new_n1145_, new_n1144_ ) -new_n1147_ = OR ( new_n1143_, new_n343_ ) -new_n1148_ = OR ( new_n342_, new_n277_ ) -NET_982 = NAND ( new_n1148_, new_n1147_ ) -new_n1150_ = OR ( new_n1098_, new_n343_ ) -new_n1151_ = OR ( new_n342_, new_n264_ ) -NET_983 = NAND ( new_n1151_, new_n1150_ ) -new_n1153_ = NAND ( new_n1103_, new_n342_, new_n290_ ) -new_n1154_ = OR ( new_n342_, new_n272_ ) -NET_984 = NAND ( new_n1154_, new_n1153_ ) -new_n1156_ = OR ( new_n343_, new_n270_ ) -new_n1157_ = OR ( new_n342_, new_n268_ ) -NET_985 = NAND ( new_n1157_, new_n1156_ ) -NET_127 = BUF ( NET_111 ) -NET_128 = BUF ( NET_71 ) -NET_129 = BUF ( NET_72 ) -NET_130 = BUF ( NET_73 ) -NET_131 = BUF ( NET_74 ) -NET_132 = BUF ( NET_112 ) -NET_2399 = XOR ( NET_6, NET_117 ) -NET_2400 = NOT ( NET_6 ) diff --git a/ITC99BENCH/b13.bench b/ITC99BENCH/b13.bench deleted file mode 100644 index 3d7d5d6..0000000 --- a/ITC99BENCH/b13.bench +++ /dev/null @@ -1,386 +0,0 @@ -# generated by verilog2bench.py https://gitea.yuhangq.com/YuhangQ/any2bench -INPUT(NET_1) -INPUT(NET_10) -INPUT(NET_11) -INPUT(NET_12) -INPUT(NET_13) -INPUT(NET_14) -INPUT(NET_15) -INPUT(NET_16) -INPUT(NET_17) -INPUT(NET_18) -INPUT(NET_19) -INPUT(NET_2) -INPUT(NET_20) -INPUT(NET_21) -INPUT(NET_22) -INPUT(NET_23) -INPUT(NET_24) -INPUT(NET_25) -INPUT(NET_26) -INPUT(NET_27) -INPUT(NET_28) -INPUT(NET_29) -INPUT(NET_3) -INPUT(NET_30) -INPUT(NET_31) -INPUT(NET_32) -INPUT(NET_33) -INPUT(NET_34) -INPUT(NET_35) -INPUT(NET_36) -INPUT(NET_37) -INPUT(NET_38) -INPUT(NET_39) -INPUT(NET_4) -INPUT(NET_40) -INPUT(NET_41) -INPUT(NET_42) -INPUT(NET_43) -INPUT(NET_44) -INPUT(NET_45) -INPUT(NET_46) -INPUT(NET_47) -INPUT(NET_48) -INPUT(NET_49) -INPUT(NET_5) -INPUT(NET_50) -INPUT(NET_51) -INPUT(NET_52) -INPUT(NET_53) -INPUT(NET_54) -INPUT(NET_55) -INPUT(NET_56) -INPUT(NET_57) -INPUT(NET_58) -INPUT(NET_59) -INPUT(NET_6) -INPUT(NET_60) -INPUT(NET_61) -INPUT(NET_62) -INPUT(NET_63) -INPUT(NET_7) -INPUT(NET_8) -INPUT(NET_9) -OUTPUT(NET_171) -OUTPUT(NET_172) -OUTPUT(NET_173) -OUTPUT(NET_174) -OUTPUT(NET_215) -OUTPUT(NET_216) -OUTPUT(NET_217) -OUTPUT(NET_218) -OUTPUT(NET_219) -OUTPUT(NET_220) -OUTPUT(NET_221) -OUTPUT(NET_223) -OUTPUT(NET_224) -OUTPUT(NET_225) -OUTPUT(NET_251) -OUTPUT(NET_252) -OUTPUT(NET_253) -OUTPUT(NET_255) -OUTPUT(NET_256) -OUTPUT(NET_257) -OUTPUT(NET_258) -OUTPUT(NET_259) -OUTPUT(NET_260) -OUTPUT(NET_261) -OUTPUT(NET_262) -OUTPUT(NET_263) -OUTPUT(NET_264) -OUTPUT(NET_286) -OUTPUT(NET_287) -OUTPUT(NET_288) -OUTPUT(NET_289) -OUTPUT(NET_290) -OUTPUT(NET_291) -OUTPUT(NET_292) -OUTPUT(NET_301) -OUTPUT(NET_302) -OUTPUT(NET_303) -OUTPUT(NET_318) -OUTPUT(NET_319) -OUTPUT(NET_320) -OUTPUT(NET_321) -OUTPUT(NET_322) -OUTPUT(NET_323) -OUTPUT(NET_324) -OUTPUT(NET_325) -OUTPUT(NET_326) -OUTPUT(NET_327) -OUTPUT(NET_328) -OUTPUT(NET_333) -OUTPUT(NET_337) -OUTPUT(NET_338) -OUTPUT(NET_339) -OUTPUT(NET_64) -OUTPUT(NET_65) -OUTPUT(NET_66) -OUTPUT(NET_67) -OUTPUT(NET_68) -OUTPUT(NET_69) -OUTPUT(NET_70) -OUTPUT(NET_71) -OUTPUT(NET_72) -OUTPUT(NET_73) -OUTPUT(NET_75) -new_n127_ = NOT ( NET_58 ) -new_n128_ = OR ( NET_59, new_n127_ ) -new_n129_ = NAND ( NET_59, NET_57 ) -NET_171 = NAND ( new_n129_, new_n128_ ) -new_n131_ = OR ( new_n127_, NET_57, NET_55 ) -new_n132_ = NAND ( new_n127_, NET_57, NET_1 ) -NET_172 = NAND ( new_n132_, new_n131_, NET_59 ) -new_n134_ = NOT ( NET_50 ) -new_n135_ = NAND ( NET_47, NET_10 ) -new_n136_ = OR ( new_n135_, new_n134_ ) -new_n137_ = NOT ( NET_44 ) -new_n138_ = OR ( NET_62, new_n137_ ) -NET_173 = NAND ( new_n138_, new_n136_ ) -new_n140_ = NOR ( NET_50, NET_42 ) -new_n141_ = OR ( new_n140_, NET_46 ) -new_n142_ = NAND ( NET_50, NET_42 ) -NET_174 = NAND ( new_n142_, new_n141_ ) -new_n144_ = NOT ( NET_61 ) -new_n145_ = NAND ( new_n144_, NET_60, NET_52 ) -new_n146_ = NOT ( NET_60 ) -new_n147_ = NAND ( new_n144_, new_n146_, NET_43 ) -NET_215 = NAND ( new_n147_, new_n145_ ) -new_n149_ = NOR ( NET_46, NET_42 ) -new_n150_ = NAND ( new_n149_, NET_53 ) -new_n151_ = NOT ( NET_46 ) -new_n152_ = NAND ( new_n151_, NET_42 ) -new_n153_ = NAND ( new_n152_, NET_41 ) -NET_216 = NAND ( new_n153_, new_n150_ ) -new_n155_ = NAND ( NET_62, NET_42 ) -new_n156_ = NAND ( new_n155_, NET_46 ) -new_n157_ = NOT ( NET_53 ) -new_n158_ = OR ( new_n157_, NET_42 ) -NET_217 = NAND ( new_n158_, new_n156_ ) -new_n160_ = OR ( new_n129_, new_n127_ ) -new_n161_ = NOT ( NET_59 ) -new_n162_ = NAND ( NET_58, NET_55 ) -new_n163_ = OR ( new_n162_, new_n161_ ) -new_n164_ = NAND ( new_n163_, NET_43 ) -NET_218 = NAND ( new_n164_, new_n160_ ) -new_n166_ = NOT ( NET_57 ) -new_n167_ = NAND ( new_n161_, new_n127_, new_n166_ ) -new_n168_ = OR ( NET_58, NET_1 ) -new_n169_ = OR ( new_n168_, new_n129_ ) -new_n170_ = NAND ( new_n169_, NET_45 ) -NET_219 = NAND ( new_n170_, new_n167_ ) -new_n172_ = OR ( new_n155_, new_n151_ ) -new_n173_ = NOT ( NET_52 ) -new_n174_ = OR ( new_n149_, new_n173_ ) -NET_220 = NAND ( new_n174_, new_n172_ ) -new_n176_ = NAND ( new_n144_, NET_60, new_n173_ ) -new_n177_ = NAND ( new_n176_, NET_53 ) -new_n178_ = OR ( new_n144_, NET_60 ) -NET_221 = NAND ( new_n178_, new_n177_ ) -new_n180_ = OR ( new_n151_, NET_42 ) -new_n181_ = NAND ( NET_62, NET_46 ) -new_n182_ = NAND ( new_n181_, NET_42 ) -NET_223 = NAND ( new_n182_, new_n180_ ) -new_n184_ = NAND ( new_n128_, NET_49 ) -new_n185_ = OR ( new_n128_, NET_57 ) -NET_224 = NAND ( new_n185_, new_n184_ ) -new_n187_ = OR ( new_n173_, NET_51 ) -new_n188_ = NAND ( new_n187_, new_n144_, NET_60 ) -NET_225 = NAND ( new_n188_, new_n178_ ) -new_n190_ = NAND ( new_n145_, NET_51 ) -new_n191_ = OR ( new_n145_, NET_51 ) -NET_251 = NAND ( new_n191_, new_n190_ ) -new_n193_ = NOT ( NET_54 ) -NET_252 = NAND ( new_n191_, new_n193_ ) -new_n195_ = NOT ( NET_15 ) -new_n196_ = NOT ( NET_16 ) -new_n197_ = NAND ( NET_18, NET_17 ) -new_n198_ = OR ( new_n197_, new_n196_ ) -new_n199_ = NOR ( new_n128_, new_n166_ ) -new_n200_ = NOT ( new_n199_ ) -new_n201_ = NOR ( new_n200_, new_n198_ ) -NET_253 = NOR ( new_n201_, new_n195_ ) -new_n203_ = NOT ( NET_41 ) -new_n204_ = NAND ( NET_56, new_n203_ ) -new_n205_ = NAND ( NET_47, NET_41 ) -new_n206_ = NAND ( new_n205_, new_n204_ ) -new_n207_ = NAND ( new_n206_, new_n134_ ) -new_n208_ = NAND ( new_n135_, NET_50 ) -NET_255 = NAND ( new_n208_, new_n207_ ) -new_n210_ = NOR ( NET_47, new_n203_ ) -new_n211_ = NAND ( new_n210_, NET_2 ) -new_n212_ = NOT ( new_n210_ ) -new_n213_ = NAND ( new_n212_, NET_19 ) -NET_256 = NAND ( new_n213_, new_n211_ ) -new_n215_ = NAND ( new_n210_, NET_3 ) -new_n216_ = NAND ( new_n212_, NET_20 ) -NET_257 = NAND ( new_n216_, new_n215_ ) -new_n218_ = NAND ( new_n210_, NET_4 ) -new_n219_ = NAND ( new_n212_, NET_21 ) -NET_258 = NAND ( new_n219_, new_n218_ ) -new_n221_ = NAND ( new_n210_, NET_5 ) -new_n222_ = NAND ( new_n212_, NET_22 ) -NET_259 = NAND ( new_n222_, new_n221_ ) -new_n224_ = NAND ( new_n210_, NET_6 ) -new_n225_ = NAND ( new_n212_, NET_23 ) -NET_260 = NAND ( new_n225_, new_n224_ ) -new_n227_ = NAND ( new_n210_, NET_7 ) -new_n228_ = NAND ( new_n212_, NET_24 ) -NET_261 = NAND ( new_n228_, new_n227_ ) -new_n230_ = NAND ( new_n210_, NET_8 ) -new_n231_ = NAND ( new_n212_, NET_25 ) -NET_262 = NAND ( new_n231_, new_n230_ ) -new_n233_ = NAND ( new_n210_, NET_9 ) -new_n234_ = NAND ( new_n212_, NET_26 ) -NET_263 = NAND ( new_n234_, new_n233_ ) -new_n236_ = OR ( NET_59, new_n166_ ) -new_n237_ = NAND ( new_n162_, new_n166_ ) -new_n238_ = NAND ( new_n237_, new_n168_ ) -new_n239_ = NAND ( new_n238_, NET_59 ) -NET_264 = NAND ( new_n239_, new_n236_ ) -new_n241_ = NAND ( new_n199_, new_n198_ ) -new_n242_ = OR ( new_n241_, new_n195_ ) -new_n243_ = NAND ( new_n200_, NET_11 ) -NET_286 = NAND ( new_n243_, new_n242_ ) -new_n245_ = OR ( new_n241_, new_n196_ ) -new_n246_ = NAND ( new_n200_, NET_12 ) -new_n247_ = OR ( new_n241_, new_n197_ ) -NET_287 = NAND ( new_n247_, new_n246_, new_n245_ ) -new_n249_ = NAND ( new_n200_, NET_14 ) -new_n250_ = OR ( new_n241_, NET_18 ) -NET_288 = NAND ( new_n250_, new_n249_ ) -new_n252_ = OR ( new_n200_, new_n197_ ) -new_n253_ = NAND ( new_n252_, NET_16 ) -NET_289 = NAND ( new_n253_, new_n247_ ) -new_n255_ = NAND ( new_n200_, NET_18 ) -NET_290 = NAND ( new_n255_, new_n250_ ) -new_n257_ = NAND ( new_n200_, NET_48 ) -NET_291 = NAND ( new_n257_, new_n169_ ) -new_n259_ = NAND ( new_n144_, NET_60, NET_52, NET_51 ) -new_n260_ = NAND ( new_n259_, NET_55 ) -NET_292 = NAND ( new_n260_, new_n147_ ) -new_n262_ = NOT ( NET_31 ) -new_n263_ = NOT ( NET_32 ) -new_n264_ = NOT ( NET_33 ) -new_n265_ = NOT ( NET_37 ) -new_n266_ = NOR ( NET_40, NET_39, NET_38 ) -new_n267_ = NOR ( new_n266_, new_n265_ ) -new_n268_ = OR ( new_n267_, NET_36 ) -new_n269_ = NAND ( new_n268_, NET_35, NET_34 ) -new_n270_ = NAND ( new_n269_, new_n264_, new_n263_, new_n262_ ) -new_n271_ = AND ( new_n270_, NET_44 ) -new_n272_ = NOT ( NET_30 ) -new_n273_ = NOT ( NET_28 ) -new_n274_ = NAND ( NET_29, new_n273_, NET_19 ) -new_n275_ = NAND ( NET_27, NET_25 ) -new_n276_ = NAND ( NET_29, NET_28, NET_23 ) -new_n277_ = NOT ( NET_29 ) -new_n278_ = NAND ( new_n277_, NET_28, NET_21 ) -new_n279_ = NAND ( new_n278_, new_n276_, new_n275_, new_n274_ ) -new_n280_ = NAND ( new_n279_, new_n272_ ) -new_n281_ = NAND ( new_n277_, NET_28, NET_22 ) -new_n282_ = NAND ( NET_27, NET_26 ) -new_n283_ = NAND ( NET_29, NET_28, NET_24 ) -new_n284_ = NOT ( NET_27 ) -new_n285_ = NAND ( new_n277_, new_n273_, new_n284_ ) -new_n286_ = NAND ( NET_29, new_n273_, NET_20 ) -new_n287_ = AND ( new_n286_, new_n285_, new_n283_ ) -new_n288_ = NAND ( new_n287_, new_n282_, new_n281_ ) -new_n289_ = NAND ( new_n288_, NET_30 ) -NET_301 = NAND ( new_n289_, new_n280_, new_n271_ ) -new_n291_ = NOT ( NET_17 ) -new_n292_ = OR ( new_n250_, new_n291_ ) -new_n293_ = NAND ( new_n200_, NET_13 ) -new_n294_ = NAND ( new_n199_, new_n198_, NET_18, new_n291_ ) -NET_302 = NAND ( new_n294_, new_n293_, new_n292_ ) -new_n296_ = NAND ( new_n199_, NET_18 ) -new_n297_ = NAND ( new_n296_, NET_17 ) -NET_303 = NAND ( new_n297_, new_n294_ ) -new_n299_ = NAND ( new_n270_, NET_44, NET_30 ) -NET_318 = NOR ( new_n299_, new_n285_ ) -new_n301_ = NOR ( new_n270_, new_n137_ ) -new_n302_ = NOT ( NET_34 ) -new_n303_ = NOT ( NET_35 ) -new_n304_ = NOT ( NET_36 ) -new_n305_ = NAND ( NET_40, NET_39, NET_38 ) -new_n306_ = OR ( new_n305_, new_n265_, new_n304_ ) -new_n307_ = OR ( new_n306_, new_n303_ ) -new_n308_ = OR ( new_n307_, new_n302_ ) -new_n309_ = OR ( new_n308_, new_n264_ ) -new_n310_ = NAND ( new_n309_, new_n263_ ) -new_n311_ = OR ( new_n308_, new_n264_, new_n263_ ) -new_n312_ = NAND ( new_n311_, new_n310_, new_n301_ ) -new_n313_ = OR ( NET_44, new_n263_ ) -NET_319 = NAND ( new_n313_, new_n312_ ) -new_n315_ = NAND ( new_n308_, new_n264_ ) -new_n316_ = NAND ( new_n315_, new_n309_, new_n301_ ) -new_n317_ = OR ( NET_44, new_n264_ ) -NET_320 = NAND ( new_n317_, new_n316_ ) -new_n319_ = NAND ( new_n307_, new_n302_ ) -new_n320_ = NAND ( new_n319_, new_n308_, new_n301_ ) -new_n321_ = OR ( NET_44, new_n302_ ) -NET_321 = NAND ( new_n321_, new_n320_ ) -new_n323_ = NAND ( new_n306_, new_n303_ ) -new_n324_ = NAND ( new_n323_, new_n307_, new_n301_ ) -new_n325_ = OR ( NET_44, new_n303_ ) -NET_322 = NAND ( new_n325_, new_n324_ ) -new_n327_ = OR ( new_n305_, new_n265_ ) -new_n328_ = NAND ( new_n327_, new_n304_ ) -new_n329_ = OR ( new_n327_, new_n304_ ) -new_n330_ = NAND ( new_n329_, new_n328_, new_n301_ ) -new_n331_ = OR ( NET_44, new_n304_ ) -NET_323 = NAND ( new_n331_, new_n330_ ) -new_n333_ = NAND ( new_n305_, new_n265_ ) -new_n334_ = NAND ( new_n333_, new_n327_, new_n301_ ) -new_n335_ = OR ( NET_44, new_n265_ ) -NET_324 = NAND ( new_n335_, new_n334_ ) -new_n337_ = NOT ( NET_38 ) -new_n338_ = NAND ( NET_40, NET_39 ) -new_n339_ = OR ( new_n338_, new_n337_ ) -new_n340_ = NAND ( new_n338_, new_n337_ ) -new_n341_ = NAND ( new_n340_, new_n339_, new_n301_ ) -new_n342_ = OR ( NET_44, new_n337_ ) -NET_325 = NAND ( new_n342_, new_n341_ ) -new_n344_ = OR ( NET_40, NET_39 ) -new_n345_ = NAND ( new_n344_, new_n338_, new_n301_ ) -new_n346_ = NAND ( new_n137_, NET_39 ) -NET_326 = NAND ( new_n346_, new_n345_ ) -new_n348_ = NOT ( NET_40 ) -new_n349_ = NAND ( new_n301_, new_n348_ ) -new_n350_ = OR ( NET_44, new_n348_ ) -NET_327 = NAND ( new_n350_, new_n349_ ) -new_n352_ = NOR ( NET_29, NET_28 ) -new_n353_ = NOR ( new_n352_, NET_30 ) -new_n354_ = OR ( new_n353_, NET_27 ) -new_n355_ = NAND ( new_n354_, new_n271_ ) -new_n356_ = OR ( new_n271_, new_n272_ ) -NET_328 = NAND ( new_n356_, new_n355_ ) -new_n358_ = XOR ( new_n311_, new_n262_ ) -new_n359_ = NAND ( new_n358_, new_n301_ ) -new_n360_ = OR ( NET_44, new_n262_ ) -NET_333 = NAND ( new_n360_, new_n359_ ) -new_n362_ = OR ( NET_29, new_n273_ ) -new_n363_ = NAND ( new_n299_, NET_28 ) -new_n364_ = OR ( new_n299_, new_n277_, NET_28 ) -NET_337 = NAND ( new_n364_, new_n363_, new_n362_ ) -new_n366_ = NAND ( new_n272_, new_n273_, new_n284_ ) -new_n367_ = OR ( new_n362_, new_n272_ ) -new_n368_ = NAND ( new_n367_, new_n366_ ) -new_n369_ = NAND ( new_n368_, new_n271_ ) -new_n370_ = NAND ( new_n299_, NET_29 ) -NET_338 = NAND ( new_n370_, new_n369_ ) -new_n372_ = OR ( new_n299_, new_n277_, new_n273_ ) -new_n373_ = NAND ( new_n299_, NET_27 ) -NET_339 = NAND ( new_n373_, new_n372_ ) -NET_75 = OR ( NET_62, NET_47, NET_41 ) -NET_64 = BUF ( NET_49 ) -NET_65 = BUF ( NET_48 ) -NET_66 = BUF ( NET_54 ) -NET_67 = BUF ( NET_11 ) -NET_68 = BUF ( NET_12 ) -NET_69 = BUF ( NET_13 ) -NET_70 = BUF ( NET_14 ) -NET_71 = BUF ( NET_45 ) -NET_72 = BUF ( NET_56 ) -NET_73 = BUF ( NET_63 ) diff --git a/ITC99BENCH/b17.bench b/ITC99BENCH/b17.bench deleted file mode 100644 index 844f06c..0000000 --- a/ITC99BENCH/b17.bench +++ /dev/null @@ -1,25223 +0,0 @@ -# generated by verilog2bench.py https://gitea.yuhangq.com/YuhangQ/any2bench -INPUT(NET_1) -INPUT(NET_10) -INPUT(NET_100) -INPUT(NET_1000) -INPUT(NET_1001) -INPUT(NET_1002) -INPUT(NET_1003) -INPUT(NET_1004) -INPUT(NET_1005) -INPUT(NET_1006) -INPUT(NET_1007) -INPUT(NET_1008) -INPUT(NET_1009) -INPUT(NET_101) -INPUT(NET_1010) -INPUT(NET_1011) -INPUT(NET_1012) -INPUT(NET_1013) -INPUT(NET_1014) -INPUT(NET_1015) -INPUT(NET_1016) -INPUT(NET_1017) -INPUT(NET_1018) -INPUT(NET_1019) -INPUT(NET_102) -INPUT(NET_1020) -INPUT(NET_1021) -INPUT(NET_1022) -INPUT(NET_1023) -INPUT(NET_1024) -INPUT(NET_1025) -INPUT(NET_1026) -INPUT(NET_1027) -INPUT(NET_1028) -INPUT(NET_1029) -INPUT(NET_103) -INPUT(NET_1030) -INPUT(NET_1031) -INPUT(NET_1032) -INPUT(NET_1033) -INPUT(NET_1034) -INPUT(NET_1035) -INPUT(NET_1036) -INPUT(NET_1037) -INPUT(NET_1038) -INPUT(NET_1039) -INPUT(NET_104) -INPUT(NET_1040) -INPUT(NET_1041) -INPUT(NET_1042) -INPUT(NET_1043) -INPUT(NET_1044) -INPUT(NET_1045) -INPUT(NET_1046) -INPUT(NET_1047) -INPUT(NET_1048) -INPUT(NET_1049) -INPUT(NET_105) -INPUT(NET_1050) -INPUT(NET_1051) -INPUT(NET_1052) -INPUT(NET_1053) -INPUT(NET_1054) -INPUT(NET_1055) -INPUT(NET_1056) -INPUT(NET_1057) -INPUT(NET_1058) -INPUT(NET_1059) -INPUT(NET_106) -INPUT(NET_1060) -INPUT(NET_1061) -INPUT(NET_1062) -INPUT(NET_1063) -INPUT(NET_1064) -INPUT(NET_1065) -INPUT(NET_1066) -INPUT(NET_1067) -INPUT(NET_1068) -INPUT(NET_1069) -INPUT(NET_107) -INPUT(NET_1070) -INPUT(NET_1071) -INPUT(NET_1072) -INPUT(NET_1073) -INPUT(NET_1074) -INPUT(NET_1075) -INPUT(NET_1076) -INPUT(NET_1077) -INPUT(NET_1078) -INPUT(NET_1079) -INPUT(NET_108) -INPUT(NET_1080) -INPUT(NET_1081) -INPUT(NET_1082) -INPUT(NET_1083) -INPUT(NET_1084) -INPUT(NET_1085) -INPUT(NET_1086) -INPUT(NET_1087) -INPUT(NET_1088) -INPUT(NET_1089) -INPUT(NET_109) -INPUT(NET_1090) -INPUT(NET_1091) -INPUT(NET_1092) -INPUT(NET_1093) -INPUT(NET_1094) -INPUT(NET_1095) -INPUT(NET_1096) -INPUT(NET_1097) -INPUT(NET_1098) -INPUT(NET_1099) -INPUT(NET_11) -INPUT(NET_110) -INPUT(NET_1100) -INPUT(NET_1101) -INPUT(NET_1102) -INPUT(NET_1103) -INPUT(NET_1104) -INPUT(NET_1105) -INPUT(NET_1106) -INPUT(NET_1107) -INPUT(NET_1108) -INPUT(NET_1109) -INPUT(NET_111) -INPUT(NET_1110) -INPUT(NET_1111) -INPUT(NET_1112) -INPUT(NET_1113) -INPUT(NET_1114) -INPUT(NET_1115) -INPUT(NET_1116) -INPUT(NET_1117) -INPUT(NET_1118) -INPUT(NET_1119) -INPUT(NET_112) -INPUT(NET_1120) -INPUT(NET_1121) -INPUT(NET_1122) -INPUT(NET_1123) -INPUT(NET_1124) -INPUT(NET_1125) -INPUT(NET_1126) -INPUT(NET_1127) -INPUT(NET_1128) -INPUT(NET_1129) -INPUT(NET_113) -INPUT(NET_1130) -INPUT(NET_1131) -INPUT(NET_1132) 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-OUTPUT(NET_3956) -OUTPUT(NET_3957) -OUTPUT(NET_3958) -OUTPUT(NET_3959) -OUTPUT(NET_3960) -OUTPUT(NET_3961) -OUTPUT(NET_3962) -OUTPUT(NET_3963) -OUTPUT(NET_3964) -OUTPUT(NET_3965) -OUTPUT(NET_3966) -OUTPUT(NET_3967) -OUTPUT(NET_3968) -OUTPUT(NET_3969) -OUTPUT(NET_3970) -OUTPUT(NET_3971) -OUTPUT(NET_3972) -OUTPUT(NET_3973) -OUTPUT(NET_3974) -OUTPUT(NET_4064) -OUTPUT(NET_4065) -OUTPUT(NET_4066) -OUTPUT(NET_4067) -OUTPUT(NET_4068) -OUTPUT(NET_4069) -OUTPUT(NET_4070) -OUTPUT(NET_4071) -OUTPUT(NET_4072) -OUTPUT(NET_4073) -OUTPUT(NET_4074) -OUTPUT(NET_4075) -OUTPUT(NET_4076) -OUTPUT(NET_4077) -OUTPUT(NET_4078) -OUTPUT(NET_4079) -OUTPUT(NET_4080) -OUTPUT(NET_4081) -OUTPUT(NET_4082) -OUTPUT(NET_4083) -OUTPUT(NET_4084) -OUTPUT(NET_4085) -OUTPUT(NET_4086) -OUTPUT(NET_4087) -OUTPUT(NET_4088) -OUTPUT(NET_4089) -OUTPUT(NET_4090) -OUTPUT(NET_4091) -OUTPUT(NET_4092) -OUTPUT(NET_4093) -OUTPUT(NET_4191) -OUTPUT(NET_4192) -OUTPUT(NET_4193) -OUTPUT(NET_4211) -OUTPUT(NET_4212) -OUTPUT(NET_4293) -OUTPUT(NET_4294) -OUTPUT(NET_4295) -OUTPUT(NET_4313) -OUTPUT(NET_4314) -OUTPUT(NET_4395) -OUTPUT(NET_4396) -OUTPUT(NET_4397) -OUTPUT(NET_4415) -OUTPUT(NET_4416) -OUTPUT(NET_4503) -OUTPUT(NET_5413) -OUTPUT(NET_5414) -OUTPUT(NET_5415) -OUTPUT(NET_5416) -OUTPUT(NET_5417) -OUTPUT(NET_5418) -OUTPUT(NET_5419) -OUTPUT(NET_5420) -OUTPUT(NET_5421) -OUTPUT(NET_5422) -OUTPUT(NET_5423) -OUTPUT(NET_5424) -OUTPUT(NET_5425) -OUTPUT(NET_5426) -OUTPUT(NET_5427) -OUTPUT(NET_5428) -OUTPUT(NET_5429) -OUTPUT(NET_5430) -OUTPUT(NET_5431) -OUTPUT(NET_5432) -OUTPUT(NET_5433) -OUTPUT(NET_5434) -OUTPUT(NET_5435) -OUTPUT(NET_5436) -OUTPUT(NET_5437) -OUTPUT(NET_5438) -OUTPUT(NET_5439) -OUTPUT(NET_5440) -OUTPUT(NET_5441) -OUTPUT(NET_5442) -OUTPUT(NET_5443) -OUTPUT(NET_5444) -OUTPUT(NET_58839) -OUTPUT(NET_58840) -new_n2965_ = NOT ( NET_263 ) -new_n2966_ = NOT ( NET_308 ) -new_n2967_ = NOT ( NET_310 ) -new_n2968_ = NAND ( NET_311, new_n2967_, NET_309, new_n2966_ ) -new_n2969_ = OR ( new_n2968_, new_n2965_ ) -new_n2970_ = NOT ( NET_255 ) -new_n2971_ = NOT ( NET_311 ) -new_n2972_ = NAND ( new_n2971_, NET_310, NET_309, new_n2966_ ) -new_n2973_ = OR ( new_n2972_, new_n2970_ ) -new_n2974_ = NOT ( NET_247 ) -new_n2975_ = NOT ( NET_309 ) -new_n2976_ = NOR ( new_n2975_, NET_308 ) -new_n2977_ = NOR ( new_n2971_, new_n2967_ ) -new_n2978_ = NAND ( new_n2977_, new_n2976_ ) -new_n2979_ = OR ( new_n2978_, new_n2974_ ) -new_n2980_ = NOT ( NET_239 ) -new_n2981_ = NOR ( NET_311, NET_310 ) -new_n2982_ = NAND ( new_n2981_, new_n2975_, NET_308 ) -new_n2983_ = OR ( new_n2982_, new_n2980_ ) -new_n2984_ = NAND ( new_n2983_, new_n2979_, new_n2973_, new_n2969_ ) -new_n2985_ = NOT ( NET_295 ) -new_n2986_ = NOR ( new_n2971_, NET_310 ) -new_n2987_ = NOR ( NET_309, NET_308 ) -new_n2988_ = NAND ( new_n2987_, new_n2986_ ) -new_n2989_ = OR ( new_n2988_, new_n2985_ ) -new_n2990_ = NOT ( NET_287 ) -new_n2991_ = NOR ( NET_311, new_n2967_ ) -new_n2992_ = NAND ( new_n2987_, new_n2991_ ) -new_n2993_ = OR ( new_n2992_, new_n2990_ ) -new_n2994_ = NOT ( NET_279 ) -new_n2995_ = NAND ( new_n2987_, new_n2977_ ) -new_n2996_ = OR ( new_n2995_, new_n2994_ ) -new_n2997_ = NOT ( NET_271 ) -new_n2998_ = NAND ( new_n2981_, NET_309, new_n2966_ ) -new_n2999_ = OR ( new_n2998_, new_n2997_ ) -new_n3000_ = NAND ( new_n2999_, new_n2996_, new_n2993_, new_n2989_ ) -new_n3001_ = NOT ( NET_199 ) -new_n3002_ = NOR ( new_n2975_, new_n2966_ ) -new_n3003_ = NAND ( new_n3002_, new_n2986_ ) -new_n3004_ = OR ( new_n3003_, new_n3001_ ) -new_n3005_ = NOT ( NET_191 ) -new_n3006_ = NAND ( new_n3002_, new_n2991_ ) -new_n3007_ = OR ( new_n3006_, new_n3005_ ) -new_n3008_ = NOT ( NET_183 ) -new_n3009_ = NAND ( NET_311, NET_310, NET_309, NET_308 ) -new_n3010_ = OR ( new_n3009_, new_n3008_ ) -new_n3011_ = NOT ( NET_303 ) -new_n3012_ = NAND ( new_n2987_, new_n2981_ ) -new_n3013_ = OR ( new_n3012_, new_n3011_ ) -new_n3014_ = NAND ( new_n3013_, new_n3010_, new_n3007_, new_n3004_ ) -new_n3015_ = NOT ( NET_231 ) -new_n3016_ = NAND ( NET_311, new_n2967_, new_n2975_, NET_308 ) -new_n3017_ = OR ( new_n3016_, new_n3015_ ) -new_n3018_ = NOT ( NET_223 ) -new_n3019_ = NAND ( new_n2971_, NET_310, new_n2975_, NET_308 ) -new_n3020_ = OR ( new_n3019_, new_n3018_ ) -new_n3021_ = NOT ( NET_215 ) -new_n3022_ = NOR ( NET_309, new_n2966_ ) -new_n3023_ = NAND ( new_n3022_, new_n2977_ ) -new_n3024_ = OR ( new_n3023_, new_n3021_ ) -new_n3025_ = NOT ( NET_207 ) -new_n3026_ = NAND ( new_n3002_, new_n2981_ ) -new_n3027_ = OR ( new_n3026_, new_n3025_ ) -new_n3028_ = NAND ( new_n3027_, new_n3024_, new_n3020_, new_n3017_ ) -new_n3029_ = NOR ( new_n3028_, new_n3014_, new_n3000_, new_n2984_ ) -new_n3030_ = NOT ( new_n3029_ ) -new_n3031_ = NOT ( NET_260 ) -new_n3032_ = OR ( new_n2968_, new_n3031_ ) -new_n3033_ = NOT ( NET_252 ) -new_n3034_ = OR ( new_n2972_, new_n3033_ ) -new_n3035_ = NOT ( NET_244 ) -new_n3036_ = OR ( new_n2978_, new_n3035_ ) -new_n3037_ = NOT ( NET_236 ) -new_n3038_ = OR ( new_n2982_, new_n3037_ ) -new_n3039_ = NAND ( new_n3038_, new_n3036_, new_n3034_, new_n3032_ ) -new_n3040_ = NOT ( NET_292 ) -new_n3041_ = OR ( new_n2988_, new_n3040_ ) -new_n3042_ = NOT ( NET_284 ) -new_n3043_ = OR ( new_n2992_, new_n3042_ ) -new_n3044_ = NOT ( NET_276 ) -new_n3045_ = OR ( new_n2995_, new_n3044_ ) -new_n3046_ = NOT ( NET_268 ) -new_n3047_ = OR ( new_n2998_, new_n3046_ ) -new_n3048_ = NAND ( new_n3047_, new_n3045_, new_n3043_, new_n3041_ ) -new_n3049_ = NOR ( new_n3048_, new_n3039_ ) -new_n3050_ = NOT ( NET_196 ) -new_n3051_ = OR ( new_n3003_, new_n3050_ ) -new_n3052_ = NOT ( NET_188 ) -new_n3053_ = OR ( new_n3006_, new_n3052_ ) -new_n3054_ = NOT ( NET_180 ) -new_n3055_ = OR ( new_n3009_, new_n3054_ ) -new_n3056_ = NOT ( NET_300 ) -new_n3057_ = OR ( new_n3012_, new_n3056_ ) -new_n3058_ = NAND ( new_n3057_, new_n3055_, new_n3053_, new_n3051_ ) -new_n3059_ = NOT ( NET_228 ) -new_n3060_ = OR ( new_n3016_, new_n3059_ ) -new_n3061_ = NOT ( NET_220 ) -new_n3062_ = OR ( new_n3019_, new_n3061_ ) -new_n3063_ = NOT ( NET_212 ) -new_n3064_ = OR ( new_n3023_, new_n3063_ ) -new_n3065_ = NOT ( NET_204 ) -new_n3066_ = OR ( new_n3026_, new_n3065_ ) -new_n3067_ = NAND ( new_n3066_, new_n3064_, new_n3062_, new_n3060_ ) -new_n3068_ = NOR ( new_n3067_, new_n3058_ ) -new_n3069_ = NAND ( new_n3068_, new_n3049_ ) -new_n3070_ = NOR ( NET_177, NET_175 ) -new_n3071_ = NAND ( new_n3070_, new_n3069_, new_n3030_ ) -new_n3072_ = NOT ( NET_176 ) -new_n3073_ = NOT ( NET_315 ) -new_n3074_ = NOT ( NET_316 ) -new_n3075_ = NOR ( new_n3074_, new_n3073_ ) -new_n3076_ = OR ( new_n3075_, NET_314 ) -new_n3077_ = NAND ( new_n3075_, NET_314 ) -new_n3078_ = NAND ( new_n3077_, new_n3076_, new_n3072_ ) -new_n3079_ = NOT ( NET_314 ) -new_n3080_ = OR ( NET_178, new_n3072_ ) -new_n3081_ = OR ( new_n3080_, new_n3079_ ) -new_n3082_ = NOT ( NET_178 ) -new_n3083_ = NOR ( new_n3082_, NET_177 ) -new_n3084_ = NAND ( new_n3083_, NET_309 ) -new_n3085_ = NAND ( new_n3084_, new_n3081_, new_n3078_ ) -new_n3086_ = NAND ( new_n3083_, NET_311 ) -new_n3087_ = OR ( new_n3080_, new_n3074_ ) -new_n3088_ = OR ( NET_316, NET_176 ) -new_n3089_ = NOT ( NET_177 ) -new_n3090_ = NOR ( new_n3089_, new_n3072_ ) -new_n3091_ = NOT ( new_n3090_ ) -new_n3092_ = NAND ( new_n3091_, new_n3088_, new_n3087_, new_n3086_ ) -new_n3093_ = NOT ( NET_261 ) -new_n3094_ = OR ( new_n2968_, new_n3093_ ) -new_n3095_ = NOT ( NET_253 ) -new_n3096_ = OR ( new_n2972_, new_n3095_ ) -new_n3097_ = NAND ( new_n2977_, new_n2976_, NET_245 ) -new_n3098_ = NOT ( NET_237 ) -new_n3099_ = OR ( new_n2982_, new_n3098_ ) -new_n3100_ = NAND ( new_n3099_, new_n3097_, new_n3096_, new_n3094_ ) -new_n3101_ = NAND ( new_n2987_, new_n2986_, NET_293 ) -new_n3102_ = NAND ( new_n2987_, new_n2991_, NET_285 ) -new_n3103_ = NAND ( new_n2987_, new_n2977_, NET_277 ) -new_n3104_ = NOT ( NET_269 ) -new_n3105_ = OR ( new_n2998_, new_n3104_ ) -new_n3106_ = NAND ( new_n3105_, new_n3103_, new_n3102_, new_n3101_ ) -new_n3107_ = NAND ( new_n3002_, new_n2986_, NET_197 ) -new_n3108_ = NAND ( new_n3002_, new_n2991_, NET_189 ) -new_n3109_ = NOT ( NET_181 ) -new_n3110_ = OR ( new_n3009_, new_n3109_ ) -new_n3111_ = NOT ( NET_301 ) -new_n3112_ = OR ( new_n3012_, new_n3111_ ) -new_n3113_ = NAND ( new_n3112_, new_n3110_, new_n3108_, new_n3107_ ) -new_n3114_ = NOT ( NET_229 ) -new_n3115_ = OR ( new_n3016_, new_n3114_ ) -new_n3116_ = NOT ( NET_221 ) -new_n3117_ = OR ( new_n3019_, new_n3116_ ) -new_n3118_ = NAND ( new_n3022_, new_n2977_, NET_213 ) -new_n3119_ = NAND ( new_n3002_, new_n2981_, NET_205 ) -new_n3120_ = NAND ( new_n3119_, new_n3118_, new_n3117_, new_n3115_ ) -new_n3121_ = NOR ( new_n3120_, new_n3113_, new_n3106_, new_n3100_ ) -new_n3122_ = NOT ( NET_273 ) -new_n3123_ = OR ( new_n2998_, new_n3122_ ) -new_n3124_ = NOT ( NET_265 ) -new_n3125_ = OR ( new_n2968_, new_n3124_ ) -new_n3126_ = NOT ( NET_257 ) -new_n3127_ = OR ( new_n2972_, new_n3126_ ) -new_n3128_ = NAND ( new_n2977_, new_n2976_, NET_249 ) -new_n3129_ = NAND ( new_n3128_, new_n3127_, new_n3125_, new_n3123_ ) -new_n3130_ = NOT ( NET_305 ) -new_n3131_ = OR ( new_n3012_, new_n3130_ ) -new_n3132_ = NAND ( new_n2987_, new_n2986_, NET_297 ) -new_n3133_ = NAND ( new_n2987_, new_n2991_, NET_289 ) -new_n3134_ = NAND ( new_n2987_, new_n2977_, NET_281 ) -new_n3135_ = NAND ( new_n3134_, new_n3133_, new_n3132_, new_n3131_ ) -new_n3136_ = NAND ( new_n3002_, new_n2981_, NET_209 ) -new_n3137_ = NAND ( new_n3002_, new_n2986_, NET_201 ) -new_n3138_ = NAND ( new_n3002_, new_n2991_, NET_193 ) -new_n3139_ = NOT ( NET_185 ) -new_n3140_ = OR ( new_n3009_, new_n3139_ ) -new_n3141_ = NAND ( new_n3140_, new_n3138_, new_n3137_, new_n3136_ ) -new_n3142_ = NOT ( NET_241 ) -new_n3143_ = OR ( new_n2982_, new_n3142_ ) -new_n3144_ = NOT ( NET_233 ) -new_n3145_ = OR ( new_n3016_, new_n3144_ ) -new_n3146_ = NOT ( NET_225 ) -new_n3147_ = OR ( new_n3019_, new_n3146_ ) -new_n3148_ = NAND ( new_n3022_, new_n2977_, NET_217 ) -new_n3149_ = NAND ( new_n3148_, new_n3147_, new_n3145_, new_n3143_ ) -new_n3150_ = OR ( new_n3149_, new_n3141_, new_n3135_, new_n3129_ ) -new_n3151_ = NOT ( NET_274 ) -new_n3152_ = OR ( new_n2998_, new_n3151_ ) -new_n3153_ = NOT ( NET_266 ) -new_n3154_ = OR ( new_n2968_, new_n3153_ ) -new_n3155_ = NOT ( NET_258 ) -new_n3156_ = OR ( new_n2972_, new_n3155_ ) -new_n3157_ = NAND ( new_n2977_, new_n2976_, NET_250 ) -new_n3158_ = NAND ( new_n3157_, new_n3156_, new_n3154_, new_n3152_ ) -new_n3159_ = NOT ( NET_306 ) -new_n3160_ = OR ( new_n3012_, new_n3159_ ) -new_n3161_ = NAND ( new_n2987_, new_n2986_, NET_298 ) -new_n3162_ = NAND ( new_n2987_, new_n2991_, NET_290 ) -new_n3163_ = NAND ( new_n2987_, new_n2977_, NET_282 ) -new_n3164_ = NAND ( new_n3163_, new_n3162_, new_n3161_, new_n3160_ ) -new_n3165_ = NAND ( new_n3002_, new_n2981_, NET_210 ) -new_n3166_ = NAND ( new_n3002_, new_n2986_, NET_202 ) -new_n3167_ = NAND ( new_n3002_, new_n2991_, NET_194 ) -new_n3168_ = NOT ( NET_186 ) -new_n3169_ = OR ( new_n3009_, new_n3168_ ) -new_n3170_ = NAND ( new_n3169_, new_n3167_, new_n3166_, new_n3165_ ) -new_n3171_ = NOT ( NET_242 ) -new_n3172_ = OR ( new_n2982_, new_n3171_ ) -new_n3173_ = NOT ( NET_234 ) -new_n3174_ = OR ( new_n3016_, new_n3173_ ) -new_n3175_ = NOT ( NET_226 ) -new_n3176_ = OR ( new_n3019_, new_n3175_ ) -new_n3177_ = NAND ( new_n3022_, new_n2977_, NET_218 ) -new_n3178_ = NAND ( new_n3177_, new_n3176_, new_n3174_, new_n3172_ ) -new_n3179_ = OR ( new_n3178_, new_n3170_, new_n3164_, new_n3158_ ) -new_n3180_ = NOT ( NET_272 ) -new_n3181_ = OR ( new_n2998_, new_n3180_ ) -new_n3182_ = NOT ( NET_264 ) -new_n3183_ = OR ( new_n2968_, new_n3182_ ) -new_n3184_ = NOT ( NET_256 ) -new_n3185_ = OR ( new_n2972_, new_n3184_ ) -new_n3186_ = NAND ( new_n2977_, new_n2976_, NET_248 ) -new_n3187_ = NAND ( new_n3186_, new_n3185_, new_n3183_, new_n3181_ ) -new_n3188_ = NOT ( NET_304 ) -new_n3189_ = OR ( new_n3012_, new_n3188_ ) -new_n3190_ = NAND ( new_n2987_, new_n2986_, NET_296 ) -new_n3191_ = NAND ( new_n2987_, new_n2991_, NET_288 ) -new_n3192_ = NAND ( new_n2987_, new_n2977_, NET_280 ) -new_n3193_ = NAND ( new_n3192_, new_n3191_, new_n3190_, new_n3189_ ) -new_n3194_ = NAND ( new_n3002_, new_n2981_, NET_208 ) -new_n3195_ = NAND ( new_n3002_, new_n2986_, NET_200 ) -new_n3196_ = NAND ( new_n3002_, new_n2991_, NET_192 ) -new_n3197_ = NOT ( NET_184 ) -new_n3198_ = OR ( new_n3009_, new_n3197_ ) -new_n3199_ = NAND ( new_n3198_, new_n3196_, new_n3195_, new_n3194_ ) -new_n3200_ = NOT ( NET_240 ) -new_n3201_ = OR ( new_n2982_, new_n3200_ ) -new_n3202_ = NOT ( NET_232 ) -new_n3203_ = OR ( new_n3016_, new_n3202_ ) -new_n3204_ = NOT ( NET_224 ) -new_n3205_ = OR ( new_n3019_, new_n3204_ ) -new_n3206_ = NAND ( new_n3022_, new_n2977_, NET_216 ) -new_n3207_ = NAND ( new_n3206_, new_n3205_, new_n3203_, new_n3201_ ) -new_n3208_ = NOR ( new_n3207_, new_n3199_, new_n3193_, new_n3187_ ) -new_n3209_ = NAND ( new_n3208_, new_n3179_, new_n3150_, new_n3121_ ) -new_n3210_ = NAND ( new_n3209_, new_n3089_ ) -new_n3211_ = NAND ( NET_317, NET_177 ) -new_n3212_ = NAND ( new_n3211_, new_n3210_, NET_178, NET_176 ) -new_n3213_ = NOR ( new_n3074_, NET_315 ) -new_n3214_ = NOR ( NET_316, new_n3073_ ) -new_n3215_ = NOR ( new_n3214_, new_n3213_ ) -new_n3216_ = OR ( new_n3215_, NET_176 ) -new_n3217_ = OR ( new_n3080_, new_n3073_ ) -new_n3218_ = NAND ( new_n3083_, NET_310 ) -new_n3219_ = NAND ( new_n3218_, new_n3217_, new_n3216_ ) -new_n3220_ = NAND ( new_n3219_, new_n3212_, new_n3092_ ) -new_n3221_ = NOT ( NET_507 ) -new_n3222_ = OR ( new_n3221_, NET_177 ) -new_n3223_ = NAND ( NET_348, NET_177 ) -new_n3224_ = NAND ( new_n3223_, new_n3222_ ) -new_n3225_ = XNOR ( NET_318, NET_317 ) -new_n3226_ = NAND ( new_n3225_, new_n3224_ ) -new_n3227_ = OR ( new_n3224_, NET_318 ) -new_n3228_ = NAND ( new_n3227_, new_n3226_, new_n3090_ ) -new_n3229_ = OR ( new_n3120_, new_n3113_, new_n3106_, new_n3100_ ) -new_n3230_ = NOR ( new_n3149_, new_n3141_, new_n3135_, new_n3129_ ) -new_n3231_ = OR ( new_n3230_, new_n3229_ ) -new_n3232_ = NOT ( new_n3231_ ) -new_n3233_ = NAND ( new_n3232_, new_n3083_ ) -new_n3234_ = NAND ( new_n3233_, new_n3228_, new_n3220_ ) -new_n3235_ = NAND ( new_n3212_, new_n3092_ ) -new_n3236_ = NAND ( new_n3218_, new_n3217_, new_n3216_, new_n3235_ ) -new_n3237_ = NAND ( new_n3236_, new_n3234_, new_n3085_ ) -new_n3238_ = NOT ( NET_313 ) -new_n3239_ = NAND ( new_n3075_, NET_314, new_n3238_ ) -new_n3240_ = OR ( new_n3075_, new_n3238_ ) -new_n3241_ = OR ( NET_314, new_n3238_ ) -new_n3242_ = NAND ( new_n3241_, new_n3240_, new_n3239_ ) -new_n3243_ = NAND ( new_n3242_, new_n3072_ ) -new_n3244_ = OR ( new_n3080_, new_n3238_ ) -new_n3245_ = NAND ( new_n3083_, NET_308 ) -new_n3246_ = NAND ( new_n3245_, new_n3244_, new_n3243_ ) -new_n3247_ = XOR ( new_n3246_, new_n3237_ ) -new_n3248_ = NAND ( new_n3233_, new_n3228_ ) -new_n3249_ = XNOR ( new_n3248_, new_n3235_ ) -new_n3250_ = XNOR ( new_n3249_, new_n3219_ ) -new_n3251_ = NAND ( new_n3236_, new_n3234_ ) -new_n3252_ = XNOR ( new_n3251_, new_n3085_ ) -new_n3253_ = XNOR ( new_n3212_, new_n3092_ ) -new_n3254_ = NOT ( new_n3253_ ) -new_n3255_ = NAND ( new_n3254_, new_n3252_, new_n3250_, new_n3247_ ) -new_n3256_ = OR ( new_n3255_, new_n3031_ ) -new_n3257_ = XOR ( new_n3249_, new_n3219_ ) -new_n3258_ = NAND ( new_n3253_, new_n3252_, new_n3257_, new_n3247_ ) -new_n3259_ = OR ( new_n3258_, new_n3033_ ) -new_n3260_ = NAND ( new_n3254_, new_n3252_, new_n3257_, new_n3247_ ) -new_n3261_ = OR ( new_n3260_, new_n3035_ ) -new_n3262_ = XOR ( new_n3251_, new_n3085_ ) -new_n3263_ = XNOR ( new_n3246_, new_n3237_ ) -new_n3264_ = NAND ( new_n3263_, new_n3253_, new_n3262_, new_n3250_ ) -new_n3265_ = OR ( new_n3264_, new_n3037_ ) -new_n3266_ = NAND ( new_n3265_, new_n3261_, new_n3259_, new_n3256_ ) -new_n3267_ = NAND ( new_n3254_, new_n3262_, new_n3250_, new_n3247_ ) -new_n3268_ = OR ( new_n3267_, new_n3040_ ) -new_n3269_ = NAND ( new_n3253_, new_n3262_, new_n3257_, new_n3247_ ) -new_n3270_ = OR ( new_n3269_, new_n3042_ ) -new_n3271_ = NAND ( new_n3254_, new_n3262_, new_n3257_, new_n3247_ ) -new_n3272_ = OR ( new_n3271_, new_n3044_ ) -new_n3273_ = NAND ( new_n3253_, new_n3252_, new_n3250_, new_n3247_ ) -new_n3274_ = OR ( new_n3273_, new_n3046_ ) -new_n3275_ = NAND ( new_n3274_, new_n3272_, new_n3270_, new_n3268_ ) -new_n3276_ = NAND ( new_n3263_, new_n3254_, new_n3252_, new_n3250_ ) -new_n3277_ = OR ( new_n3276_, new_n3050_ ) -new_n3278_ = NAND ( new_n3263_, new_n3253_, new_n3252_, new_n3257_ ) -new_n3279_ = OR ( new_n3278_, new_n3052_ ) -new_n3280_ = NAND ( new_n3263_, new_n3254_, new_n3252_, new_n3257_ ) -new_n3281_ = OR ( new_n3280_, new_n3054_ ) -new_n3282_ = NAND ( new_n3253_, new_n3262_, new_n3250_, new_n3247_ ) -new_n3283_ = OR ( new_n3282_, new_n3056_ ) -new_n3284_ = NAND ( new_n3283_, new_n3281_, new_n3279_, new_n3277_ ) -new_n3285_ = NAND ( new_n3263_, new_n3254_, new_n3262_, new_n3250_ ) -new_n3286_ = OR ( new_n3285_, new_n3059_ ) -new_n3287_ = NAND ( new_n3263_, new_n3253_, new_n3262_, new_n3257_ ) -new_n3288_ = OR ( new_n3287_, new_n3061_ ) -new_n3289_ = NAND ( new_n3263_, new_n3254_, new_n3262_, new_n3257_ ) -new_n3290_ = OR ( new_n3289_, new_n3063_ ) -new_n3291_ = NAND ( new_n3263_, new_n3253_, new_n3252_, new_n3250_ ) -new_n3292_ = OR ( new_n3291_, new_n3065_ ) -new_n3293_ = NAND ( new_n3292_, new_n3290_, new_n3288_, new_n3286_ ) -new_n3294_ = NOR ( new_n3293_, new_n3284_, new_n3275_, new_n3266_ ) -new_n3295_ = OR ( new_n3294_, new_n3071_ ) -new_n3296_ = OR ( new_n3255_, new_n3093_ ) -new_n3297_ = OR ( new_n3258_, new_n3095_ ) -new_n3298_ = NOT ( NET_245 ) -new_n3299_ = OR ( new_n3260_, new_n3298_ ) -new_n3300_ = OR ( new_n3264_, new_n3098_ ) -new_n3301_ = NAND ( new_n3300_, new_n3299_, new_n3297_, new_n3296_ ) -new_n3302_ = NOT ( NET_293 ) -new_n3303_ = OR ( new_n3267_, new_n3302_ ) -new_n3304_ = NOT ( NET_285 ) -new_n3305_ = OR ( new_n3269_, new_n3304_ ) -new_n3306_ = NOT ( NET_277 ) -new_n3307_ = OR ( new_n3271_, new_n3306_ ) -new_n3308_ = OR ( new_n3273_, new_n3104_ ) -new_n3309_ = NAND ( new_n3308_, new_n3307_, new_n3305_, new_n3303_ ) -new_n3310_ = NOT ( NET_197 ) -new_n3311_ = OR ( new_n3276_, new_n3310_ ) -new_n3312_ = NOT ( NET_189 ) -new_n3313_ = OR ( new_n3278_, new_n3312_ ) -new_n3314_ = OR ( new_n3280_, new_n3109_ ) -new_n3315_ = OR ( new_n3282_, new_n3111_ ) -new_n3316_ = NAND ( new_n3315_, new_n3314_, new_n3313_, new_n3311_ ) -new_n3317_ = OR ( new_n3285_, new_n3114_ ) -new_n3318_ = OR ( new_n3287_, new_n3116_ ) -new_n3319_ = NOT ( NET_213 ) -new_n3320_ = OR ( new_n3289_, new_n3319_ ) -new_n3321_ = NOT ( NET_205 ) -new_n3322_ = OR ( new_n3291_, new_n3321_ ) -new_n3323_ = NAND ( new_n3322_, new_n3320_, new_n3318_, new_n3317_ ) -new_n3324_ = NOR ( new_n3323_, new_n3316_, new_n3309_, new_n3301_ ) -new_n3325_ = OR ( new_n3324_, new_n3071_ ) -new_n3326_ = AND ( new_n3325_, new_n3295_ ) -new_n3327_ = NOT ( new_n3071_ ) -new_n3328_ = NOT ( NET_312 ) -new_n3329_ = NOT ( NET_307 ) -new_n3330_ = NOR ( NET_316, new_n2971_ ) -new_n3331_ = NOR ( NET_315, new_n2967_ ) -new_n3332_ = NOR ( new_n3331_, new_n3330_ ) -new_n3333_ = NOR ( new_n3073_, NET_310 ) -new_n3334_ = NOR ( new_n3333_, new_n3332_ ) -new_n3335_ = NAND ( new_n3334_, NET_309 ) -new_n3336_ = NAND ( new_n3335_, NET_314 ) -new_n3337_ = OR ( new_n3334_, NET_309 ) -new_n3338_ = NAND ( new_n3337_, new_n3336_ ) -new_n3339_ = OR ( new_n3338_, new_n2966_ ) -new_n3340_ = NAND ( new_n3339_, NET_313 ) -new_n3341_ = NAND ( new_n3338_, new_n2966_ ) -new_n3342_ = NAND ( new_n3341_, new_n3340_ ) -new_n3343_ = NAND ( new_n3342_, new_n3329_ ) -new_n3344_ = NAND ( new_n3343_, new_n3328_ ) -new_n3345_ = OR ( new_n3342_, new_n3329_ ) -new_n3346_ = NAND ( new_n3345_, new_n3344_ ) -new_n3347_ = NOR ( new_n3230_, new_n3069_ ) -new_n3348_ = NAND ( new_n3150_, new_n3229_, new_n3030_ ) -new_n3349_ = OR ( new_n3348_, new_n3347_ ) -new_n3350_ = NAND ( new_n3349_, new_n3070_ ) -new_n3351_ = NOT ( new_n3350_ ) -new_n3352_ = NAND ( new_n3351_, new_n3346_ ) -new_n3353_ = NOT ( NET_545 ) -new_n3354_ = NAND ( new_n3353_, NET_307, NET_177 ) -new_n3355_ = NAND ( new_n3354_, new_n3352_ ) -new_n3356_ = OR ( new_n3355_, new_n3327_ ) -new_n3357_ = OR ( new_n3356_, new_n3326_ ) -new_n3358_ = OR ( new_n3273_, new_n3122_ ) -new_n3359_ = OR ( new_n3255_, new_n3124_ ) -new_n3360_ = OR ( new_n3258_, new_n3126_ ) -new_n3361_ = NOT ( NET_249 ) -new_n3362_ = OR ( new_n3260_, new_n3361_ ) -new_n3363_ = NAND ( new_n3362_, new_n3360_, new_n3359_, new_n3358_ ) -new_n3364_ = OR ( new_n3282_, new_n3130_ ) -new_n3365_ = NOT ( NET_297 ) -new_n3366_ = OR ( new_n3267_, new_n3365_ ) -new_n3367_ = NOT ( NET_289 ) -new_n3368_ = OR ( new_n3269_, new_n3367_ ) -new_n3369_ = NOT ( NET_281 ) -new_n3370_ = OR ( new_n3271_, new_n3369_ ) -new_n3371_ = NAND ( new_n3370_, new_n3368_, new_n3366_, new_n3364_ ) -new_n3372_ = NOT ( NET_209 ) -new_n3373_ = OR ( new_n3291_, new_n3372_ ) -new_n3374_ = NOT ( NET_201 ) -new_n3375_ = OR ( new_n3276_, new_n3374_ ) -new_n3376_ = NOT ( NET_193 ) -new_n3377_ = OR ( new_n3278_, new_n3376_ ) -new_n3378_ = OR ( new_n3280_, new_n3139_ ) -new_n3379_ = NAND ( new_n3378_, new_n3377_, new_n3375_, new_n3373_ ) -new_n3380_ = OR ( new_n3264_, new_n3142_ ) -new_n3381_ = OR ( new_n3285_, new_n3144_ ) -new_n3382_ = OR ( new_n3287_, new_n3146_ ) -new_n3383_ = NOT ( NET_217 ) -new_n3384_ = OR ( new_n3289_, new_n3383_ ) -new_n3385_ = NAND ( new_n3384_, new_n3382_, new_n3381_, new_n3380_ ) -new_n3386_ = NOR ( new_n3385_, new_n3379_, new_n3371_, new_n3363_ ) -new_n3387_ = OR ( new_n3386_, new_n3071_ ) -new_n3388_ = NOR ( new_n3150_, new_n3069_ ) -new_n3389_ = NOR ( new_n3230_, new_n3029_ ) -new_n3390_ = NOR ( new_n3389_, new_n3388_ ) -new_n3391_ = NOR ( new_n3390_, new_n3121_ ) -new_n3392_ = OR ( new_n3391_, NET_175 ) -new_n3393_ = NAND ( NET_310, NET_175 ) -new_n3394_ = AND ( new_n3393_, new_n3392_, new_n3089_ ) -new_n3395_ = NOT ( new_n3224_ ) -new_n3396_ = NAND ( NET_545, NET_317 ) -new_n3397_ = OR ( new_n3396_, new_n3250_ ) -new_n3398_ = OR ( NET_545, new_n2967_ ) -new_n3399_ = NAND ( new_n3398_, new_n3397_, NET_177 ) -new_n3400_ = NOR ( new_n3327_, NET_175 ) -new_n3401_ = NOR ( new_n3333_, new_n3331_ ) -new_n3402_ = XNOR ( new_n3401_, new_n3330_ ) -new_n3403_ = NAND ( new_n3402_, new_n3351_ ) -new_n3404_ = NAND ( new_n3403_, new_n3400_, new_n3399_ ) -new_n3405_ = NAND ( new_n3404_, new_n3394_, new_n3387_ ) -new_n3406_ = OR ( new_n3273_, new_n3151_ ) -new_n3407_ = OR ( new_n3255_, new_n3153_ ) -new_n3408_ = OR ( new_n3258_, new_n3155_ ) -new_n3409_ = NOT ( NET_250 ) -new_n3410_ = OR ( new_n3260_, new_n3409_ ) -new_n3411_ = NAND ( new_n3410_, new_n3408_, new_n3407_, new_n3406_ ) -new_n3412_ = OR ( new_n3282_, new_n3159_ ) -new_n3413_ = NOT ( NET_298 ) -new_n3414_ = OR ( new_n3267_, new_n3413_ ) -new_n3415_ = NOT ( NET_290 ) -new_n3416_ = OR ( new_n3269_, new_n3415_ ) -new_n3417_ = NOT ( NET_282 ) -new_n3418_ = OR ( new_n3271_, new_n3417_ ) -new_n3419_ = NAND ( new_n3418_, new_n3416_, new_n3414_, new_n3412_ ) -new_n3420_ = NOT ( NET_210 ) -new_n3421_ = OR ( new_n3291_, new_n3420_ ) -new_n3422_ = NOT ( NET_202 ) -new_n3423_ = OR ( new_n3276_, new_n3422_ ) -new_n3424_ = NOT ( NET_194 ) -new_n3425_ = OR ( new_n3278_, new_n3424_ ) -new_n3426_ = OR ( new_n3280_, new_n3168_ ) -new_n3427_ = NAND ( new_n3426_, new_n3425_, new_n3423_, new_n3421_ ) -new_n3428_ = OR ( new_n3264_, new_n3171_ ) -new_n3429_ = OR ( new_n3285_, new_n3173_ ) -new_n3430_ = OR ( new_n3287_, new_n3175_ ) -new_n3431_ = NOT ( NET_218 ) -new_n3432_ = OR ( new_n3289_, new_n3431_ ) -new_n3433_ = NAND ( new_n3432_, new_n3430_, new_n3429_, new_n3428_ ) -new_n3434_ = NOR ( new_n3433_, new_n3427_, new_n3419_, new_n3411_ ) -new_n3435_ = OR ( new_n3434_, new_n3071_ ) -new_n3436_ = NOR ( new_n3121_, new_n3069_ ) -new_n3437_ = NOR ( new_n3436_, new_n3347_ ) -new_n3438_ = OR ( new_n3437_, NET_175 ) -new_n3439_ = NAND ( NET_311, NET_175 ) -new_n3440_ = NAND ( new_n3439_, new_n3438_, new_n3435_, new_n3089_ ) -new_n3441_ = OR ( NET_545, NET_311 ) -new_n3442_ = NOT ( NET_317 ) -new_n3443_ = OR ( new_n3224_, new_n3442_ ) -new_n3444_ = NAND ( new_n3224_, NET_317 ) -new_n3445_ = NAND ( new_n3444_, new_n3443_ ) -new_n3446_ = NAND ( new_n3445_, new_n3253_ ) -new_n3447_ = OR ( new_n3446_, new_n3353_ ) -new_n3448_ = NAND ( new_n3447_, new_n3441_ ) -new_n3449_ = NAND ( new_n3448_, NET_177 ) -new_n3450_ = XNOR ( NET_316, NET_311 ) -new_n3451_ = OR ( new_n3450_, new_n3350_ ) -new_n3452_ = AND ( new_n3451_, new_n3449_, new_n3400_ ) -new_n3453_ = NAND ( new_n3452_, new_n3440_, new_n3405_ ) -new_n3454_ = AND ( new_n3394_, new_n3387_ ) -new_n3455_ = OR ( new_n3404_, new_n3454_ ) -new_n3456_ = OR ( new_n3396_, new_n3262_ ) -new_n3457_ = OR ( NET_545, new_n2975_ ) -new_n3458_ = NAND ( new_n3457_, new_n3456_, NET_177 ) -new_n3459_ = XOR ( NET_314, NET_309 ) -new_n3460_ = XOR ( new_n3459_, new_n3334_ ) -new_n3461_ = NAND ( new_n3460_, new_n3351_ ) -new_n3462_ = NAND ( new_n3461_, new_n3458_, new_n3400_ ) -new_n3463_ = OR ( new_n3273_, new_n3180_ ) -new_n3464_ = OR ( new_n3255_, new_n3182_ ) -new_n3465_ = OR ( new_n3258_, new_n3184_ ) -new_n3466_ = NOT ( NET_248 ) -new_n3467_ = OR ( new_n3260_, new_n3466_ ) -new_n3468_ = NAND ( new_n3467_, new_n3465_, new_n3464_, new_n3463_ ) -new_n3469_ = OR ( new_n3282_, new_n3188_ ) -new_n3470_ = NOT ( NET_296 ) -new_n3471_ = OR ( new_n3267_, new_n3470_ ) -new_n3472_ = NOT ( NET_288 ) -new_n3473_ = OR ( new_n3269_, new_n3472_ ) -new_n3474_ = NOT ( NET_280 ) -new_n3475_ = OR ( new_n3271_, new_n3474_ ) -new_n3476_ = NAND ( new_n3475_, new_n3473_, new_n3471_, new_n3469_ ) -new_n3477_ = NOT ( NET_208 ) -new_n3478_ = OR ( new_n3291_, new_n3477_ ) -new_n3479_ = NOT ( NET_200 ) -new_n3480_ = OR ( new_n3276_, new_n3479_ ) -new_n3481_ = NOT ( NET_192 ) -new_n3482_ = OR ( new_n3278_, new_n3481_ ) -new_n3483_ = OR ( new_n3280_, new_n3197_ ) -new_n3484_ = NAND ( new_n3483_, new_n3482_, new_n3480_, new_n3478_ ) -new_n3485_ = OR ( new_n3264_, new_n3200_ ) -new_n3486_ = OR ( new_n3285_, new_n3202_ ) -new_n3487_ = OR ( new_n3287_, new_n3204_ ) -new_n3488_ = NOT ( NET_216 ) -new_n3489_ = OR ( new_n3289_, new_n3488_ ) -new_n3490_ = NAND ( new_n3489_, new_n3487_, new_n3486_, new_n3485_ ) -new_n3491_ = NOR ( new_n3490_, new_n3484_, new_n3476_, new_n3468_ ) -new_n3492_ = OR ( new_n3491_, new_n3071_ ) -new_n3493_ = NAND ( NET_309, NET_175 ) -new_n3494_ = OR ( new_n3437_, NET_177, NET_175 ) -new_n3495_ = AND ( new_n3494_, new_n3493_, new_n3492_ ) -new_n3496_ = OR ( new_n3495_, new_n3462_ ) -new_n3497_ = NAND ( new_n3496_, new_n3455_, new_n3453_ ) -new_n3498_ = NAND ( new_n3495_, new_n3462_ ) -new_n3499_ = OR ( new_n3255_, new_n2965_ ) -new_n3500_ = OR ( new_n3258_, new_n2970_ ) -new_n3501_ = OR ( new_n3260_, new_n2974_ ) -new_n3502_ = OR ( new_n3264_, new_n2980_ ) -new_n3503_ = NAND ( new_n3502_, new_n3501_, new_n3500_, new_n3499_ ) -new_n3504_ = OR ( new_n3267_, new_n2985_ ) -new_n3505_ = OR ( new_n3269_, new_n2990_ ) -new_n3506_ = OR ( new_n3271_, new_n2994_ ) -new_n3507_ = OR ( new_n3273_, new_n2997_ ) -new_n3508_ = NAND ( new_n3507_, new_n3506_, new_n3505_, new_n3504_ ) -new_n3509_ = OR ( new_n3276_, new_n3001_ ) -new_n3510_ = OR ( new_n3278_, new_n3005_ ) -new_n3511_ = OR ( new_n3280_, new_n3008_ ) -new_n3512_ = OR ( new_n3282_, new_n3011_ ) -new_n3513_ = NAND ( new_n3512_, new_n3511_, new_n3510_, new_n3509_ ) -new_n3514_ = OR ( new_n3285_, new_n3015_ ) -new_n3515_ = OR ( new_n3287_, new_n3018_ ) -new_n3516_ = OR ( new_n3289_, new_n3021_ ) -new_n3517_ = OR ( new_n3291_, new_n3025_ ) -new_n3518_ = NAND ( new_n3517_, new_n3516_, new_n3515_, new_n3514_ ) -new_n3519_ = NOR ( new_n3518_, new_n3513_, new_n3508_, new_n3503_ ) -new_n3520_ = NOR ( new_n3519_, new_n3071_ ) -new_n3521_ = NOT ( NET_175 ) -new_n3522_ = NOR ( new_n2966_, new_n3521_ ) -new_n3523_ = NOR ( new_n3522_, new_n3520_ ) -new_n3524_ = XOR ( NET_313, NET_308 ) -new_n3525_ = XOR ( new_n3524_, new_n3338_ ) -new_n3526_ = OR ( new_n3525_, new_n3350_ ) -new_n3527_ = NOR ( NET_545, new_n2966_ ) -new_n3528_ = OR ( new_n3527_, new_n3089_ ) -new_n3529_ = NAND ( new_n3528_, new_n3526_, new_n3400_ ) -new_n3530_ = NAND ( new_n3529_, new_n3523_ ) -new_n3531_ = NAND ( new_n3530_, new_n3498_, new_n3497_ ) -new_n3532_ = OR ( new_n3529_, new_n3523_ ) -new_n3533_ = XOR ( NET_312, NET_307 ) -new_n3534_ = XOR ( new_n3533_, new_n3342_ ) -new_n3535_ = OR ( new_n3534_, new_n3350_ ) -new_n3536_ = NAND ( new_n3535_, new_n3354_, new_n3071_ ) -new_n3537_ = NOR ( new_n3329_, new_n3521_ ) -new_n3538_ = NOT ( NET_262 ) -new_n3539_ = OR ( new_n3255_, new_n3538_ ) -new_n3540_ = NOT ( NET_254 ) -new_n3541_ = OR ( new_n3258_, new_n3540_ ) -new_n3542_ = NOT ( NET_246 ) -new_n3543_ = OR ( new_n3260_, new_n3542_ ) -new_n3544_ = NOT ( NET_238 ) -new_n3545_ = OR ( new_n3264_, new_n3544_ ) -new_n3546_ = NAND ( new_n3545_, new_n3543_, new_n3541_, new_n3539_ ) -new_n3547_ = NOT ( NET_294 ) -new_n3548_ = OR ( new_n3267_, new_n3547_ ) -new_n3549_ = NOT ( NET_286 ) -new_n3550_ = OR ( new_n3269_, new_n3549_ ) -new_n3551_ = NOT ( NET_278 ) -new_n3552_ = OR ( new_n3271_, new_n3551_ ) -new_n3553_ = NOT ( NET_270 ) -new_n3554_ = OR ( new_n3273_, new_n3553_ ) -new_n3555_ = NAND ( new_n3554_, new_n3552_, new_n3550_, new_n3548_ ) -new_n3556_ = NOT ( NET_198 ) -new_n3557_ = OR ( new_n3276_, new_n3556_ ) -new_n3558_ = NOT ( NET_190 ) -new_n3559_ = OR ( new_n3278_, new_n3558_ ) -new_n3560_ = NOT ( NET_182 ) -new_n3561_ = OR ( new_n3280_, new_n3560_ ) -new_n3562_ = NOT ( NET_302 ) -new_n3563_ = OR ( new_n3282_, new_n3562_ ) -new_n3564_ = NAND ( new_n3563_, new_n3561_, new_n3559_, new_n3557_ ) -new_n3565_ = NOT ( NET_230 ) -new_n3566_ = OR ( new_n3285_, new_n3565_ ) -new_n3567_ = NOT ( NET_222 ) -new_n3568_ = OR ( new_n3287_, new_n3567_ ) -new_n3569_ = NOT ( NET_214 ) -new_n3570_ = OR ( new_n3289_, new_n3569_ ) -new_n3571_ = NOT ( NET_206 ) -new_n3572_ = OR ( new_n3291_, new_n3571_ ) -new_n3573_ = NAND ( new_n3572_, new_n3570_, new_n3568_, new_n3566_ ) -new_n3574_ = NOR ( new_n3573_, new_n3564_, new_n3555_, new_n3546_ ) -new_n3575_ = NOR ( new_n3574_, new_n3071_ ) -new_n3576_ = NOR ( new_n3575_, new_n3537_ ) -new_n3577_ = OR ( new_n3576_, new_n3536_ ) -new_n3578_ = NAND ( new_n3577_, new_n3532_, new_n3531_ ) -new_n3579_ = NAND ( new_n3576_, new_n3536_ ) -new_n3580_ = NAND ( new_n3356_, new_n3325_ ) -new_n3581_ = NAND ( new_n3580_, new_n3579_, new_n3578_ ) -new_n3582_ = NAND ( new_n3581_, new_n3357_ ) -new_n3583_ = NAND ( new_n3355_, new_n3071_ ) -new_n3584_ = NAND ( new_n3294_, new_n3327_ ) -new_n3585_ = NAND ( new_n3584_, new_n3583_, new_n3582_ ) -new_n3586_ = NOT ( new_n3355_ ) -new_n3587_ = NOT ( NET_259 ) -new_n3588_ = OR ( new_n3255_, new_n3587_ ) -new_n3589_ = NOT ( NET_251 ) -new_n3590_ = OR ( new_n3258_, new_n3589_ ) -new_n3591_ = NOT ( NET_243 ) -new_n3592_ = OR ( new_n3260_, new_n3591_ ) -new_n3593_ = NOT ( NET_235 ) -new_n3594_ = OR ( new_n3264_, new_n3593_ ) -new_n3595_ = NAND ( new_n3594_, new_n3592_, new_n3590_, new_n3588_ ) -new_n3596_ = NOT ( NET_291 ) -new_n3597_ = OR ( new_n3267_, new_n3596_ ) -new_n3598_ = NOT ( NET_283 ) -new_n3599_ = OR ( new_n3269_, new_n3598_ ) -new_n3600_ = NOT ( NET_275 ) -new_n3601_ = OR ( new_n3271_, new_n3600_ ) -new_n3602_ = NOT ( NET_267 ) -new_n3603_ = OR ( new_n3273_, new_n3602_ ) -new_n3604_ = NAND ( new_n3603_, new_n3601_, new_n3599_, new_n3597_ ) -new_n3605_ = NOT ( NET_195 ) -new_n3606_ = OR ( new_n3276_, new_n3605_ ) -new_n3607_ = NOT ( NET_187 ) -new_n3608_ = OR ( new_n3278_, new_n3607_ ) -new_n3609_ = NOT ( NET_179 ) -new_n3610_ = OR ( new_n3280_, new_n3609_ ) -new_n3611_ = NOT ( NET_299 ) -new_n3612_ = OR ( new_n3282_, new_n3611_ ) -new_n3613_ = NAND ( new_n3612_, new_n3610_, new_n3608_, new_n3606_ ) -new_n3614_ = NOT ( NET_227 ) -new_n3615_ = OR ( new_n3285_, new_n3614_ ) -new_n3616_ = NOT ( NET_219 ) -new_n3617_ = OR ( new_n3287_, new_n3616_ ) -new_n3618_ = NOT ( NET_211 ) -new_n3619_ = OR ( new_n3289_, new_n3618_ ) -new_n3620_ = NOT ( NET_203 ) -new_n3621_ = OR ( new_n3291_, new_n3620_ ) -new_n3622_ = NAND ( new_n3621_, new_n3619_, new_n3617_, new_n3615_ ) -new_n3623_ = NOR ( new_n3622_, new_n3613_, new_n3604_, new_n3595_ ) -new_n3624_ = NOR ( new_n3623_, new_n3071_ ) -new_n3625_ = XOR ( new_n3624_, new_n3586_ ) -new_n3626_ = NAND ( new_n3625_, new_n3585_ ) -new_n3627_ = NOT ( new_n3069_ ) -new_n3628_ = OR ( new_n3348_, new_n3627_ ) -new_n3629_ = NAND ( new_n3628_, new_n3521_ ) -new_n3630_ = NAND ( new_n3629_, new_n3089_ ) -new_n3631_ = NAND ( new_n3630_, new_n3624_ ) -new_n3632_ = NAND ( new_n3631_, new_n3586_ ) -new_n3633_ = OR ( new_n3630_, new_n3624_ ) -new_n3634_ = NAND ( new_n3633_, new_n3355_ ) -new_n3635_ = NAND ( new_n3634_, new_n3632_ ) -new_n3636_ = NAND ( new_n3635_, new_n3626_ ) -new_n3637_ = NOT ( new_n3208_ ) -new_n3638_ = OR ( new_n2968_, new_n3538_ ) -new_n3639_ = OR ( new_n2972_, new_n3540_ ) -new_n3640_ = OR ( new_n2978_, new_n3542_ ) -new_n3641_ = OR ( new_n2982_, new_n3544_ ) -new_n3642_ = NAND ( new_n3641_, new_n3640_, new_n3639_, new_n3638_ ) -new_n3643_ = OR ( new_n2988_, new_n3547_ ) -new_n3644_ = OR ( new_n2992_, new_n3549_ ) -new_n3645_ = OR ( new_n2995_, new_n3551_ ) -new_n3646_ = OR ( new_n2998_, new_n3553_ ) -new_n3647_ = NAND ( new_n3646_, new_n3645_, new_n3644_, new_n3643_ ) -new_n3648_ = NOR ( new_n3647_, new_n3642_ ) -new_n3649_ = OR ( new_n3003_, new_n3556_ ) -new_n3650_ = OR ( new_n3006_, new_n3558_ ) -new_n3651_ = OR ( new_n3009_, new_n3560_ ) -new_n3652_ = OR ( new_n3012_, new_n3562_ ) -new_n3653_ = NAND ( new_n3652_, new_n3651_, new_n3650_, new_n3649_ ) -new_n3654_ = OR ( new_n3016_, new_n3565_ ) -new_n3655_ = OR ( new_n3019_, new_n3567_ ) -new_n3656_ = OR ( new_n3023_, new_n3569_ ) -new_n3657_ = OR ( new_n3026_, new_n3571_ ) -new_n3658_ = NAND ( new_n3657_, new_n3656_, new_n3655_, new_n3654_ ) -new_n3659_ = NOR ( new_n3658_, new_n3653_ ) -new_n3660_ = NAND ( new_n3659_, new_n3648_ ) -new_n3661_ = NOR ( new_n3660_, new_n3121_ ) -new_n3662_ = OR ( new_n2968_, new_n3587_ ) -new_n3663_ = OR ( new_n2972_, new_n3589_ ) -new_n3664_ = OR ( new_n2978_, new_n3591_ ) -new_n3665_ = OR ( new_n2982_, new_n3593_ ) -new_n3666_ = NAND ( new_n3665_, new_n3664_, new_n3663_, new_n3662_ ) -new_n3667_ = OR ( new_n2988_, new_n3596_ ) -new_n3668_ = OR ( new_n2992_, new_n3598_ ) -new_n3669_ = OR ( new_n2995_, new_n3600_ ) -new_n3670_ = OR ( new_n2998_, new_n3602_ ) -new_n3671_ = NAND ( new_n3670_, new_n3669_, new_n3668_, new_n3667_ ) -new_n3672_ = OR ( new_n3003_, new_n3605_ ) -new_n3673_ = OR ( new_n3006_, new_n3607_ ) -new_n3674_ = OR ( new_n3009_, new_n3609_ ) -new_n3675_ = OR ( new_n3012_, new_n3611_ ) -new_n3676_ = NAND ( new_n3675_, new_n3674_, new_n3673_, new_n3672_ ) -new_n3677_ = OR ( new_n3016_, new_n3614_ ) -new_n3678_ = OR ( new_n3019_, new_n3616_ ) -new_n3679_ = OR ( new_n3023_, new_n3618_ ) -new_n3680_ = OR ( new_n3026_, new_n3620_ ) -new_n3681_ = NAND ( new_n3680_, new_n3679_, new_n3678_, new_n3677_ ) -new_n3682_ = NOR ( new_n3681_, new_n3676_, new_n3671_, new_n3666_ ) -new_n3683_ = NOT ( new_n3682_ ) -new_n3684_ = AND ( new_n3683_, new_n3661_, new_n3069_ ) -new_n3685_ = NOR ( new_n3179_, new_n3030_ ) -new_n3686_ = NAND ( new_n3685_, new_n3684_, new_n3637_ ) -new_n3687_ = NOR ( new_n3686_, new_n3230_ ) -new_n3688_ = XOR ( NET_141, NET_140 ) -new_n3689_ = NOT ( new_n3688_ ) -new_n3690_ = NOR ( new_n3689_, NET_142 ) -new_n3691_ = NAND ( new_n3690_, new_n3687_, NET_178 ) -new_n3692_ = NOT ( new_n3388_ ) -new_n3693_ = OR ( new_n3682_, new_n3029_ ) -new_n3694_ = NOR ( new_n3693_, new_n3637_ ) -new_n3695_ = NOT ( new_n3694_ ) -new_n3696_ = NOT ( new_n3179_ ) -new_n3697_ = OR ( new_n3660_, new_n3229_ ) -new_n3698_ = OR ( new_n3697_, new_n3696_ ) -new_n3699_ = NOR ( new_n3698_, new_n3695_, new_n3692_ ) -new_n3700_ = NAND ( new_n3699_, new_n3688_, NET_178 ) -new_n3701_ = OR ( new_n3700_, NET_142 ) -new_n3702_ = NAND ( new_n3701_, new_n3691_ ) -new_n3703_ = NOR ( NET_177, new_n3072_ ) -new_n3704_ = NAND ( new_n3703_, new_n3702_, new_n3636_ ) -new_n3705_ = OR ( new_n3080_, new_n3089_ ) -new_n3706_ = NAND ( new_n3705_, new_n3704_ ) -new_n3707_ = NOT ( new_n3706_ ) -NET_10536 = AND ( new_n3707_, NET_443 ) -new_n3709_ = NOT ( NET_892 ) -new_n3710_ = NOT ( NET_712 ) -new_n3711_ = NOT ( NET_757 ) -new_n3712_ = NOT ( NET_759 ) -new_n3713_ = NAND ( NET_760, new_n3712_, NET_758, new_n3711_ ) -new_n3714_ = OR ( new_n3713_, new_n3710_ ) -new_n3715_ = NOT ( NET_704 ) -new_n3716_ = NOT ( NET_760 ) -new_n3717_ = NAND ( new_n3716_, NET_759, NET_758, new_n3711_ ) -new_n3718_ = OR ( new_n3717_, new_n3715_ ) -new_n3719_ = NOT ( NET_696 ) -new_n3720_ = NOT ( NET_758 ) -new_n3721_ = NOR ( new_n3720_, NET_757 ) -new_n3722_ = NOR ( new_n3716_, new_n3712_ ) -new_n3723_ = NAND ( new_n3722_, new_n3721_ ) -new_n3724_ = OR ( new_n3723_, new_n3719_ ) -new_n3725_ = NOT ( NET_688 ) -new_n3726_ = NOR ( NET_760, NET_759 ) -new_n3727_ = NAND ( new_n3726_, new_n3720_, NET_757 ) -new_n3728_ = OR ( new_n3727_, new_n3725_ ) -new_n3729_ = NAND ( new_n3728_, new_n3724_, new_n3718_, new_n3714_ ) -new_n3730_ = NOT ( NET_744 ) -new_n3731_ = NOR ( new_n3716_, NET_759 ) -new_n3732_ = NOR ( NET_758, NET_757 ) -new_n3733_ = NAND ( new_n3732_, new_n3731_ ) -new_n3734_ = OR ( new_n3733_, new_n3730_ ) -new_n3735_ = NOT ( NET_736 ) -new_n3736_ = NOR ( NET_760, new_n3712_ ) -new_n3737_ = NAND ( new_n3732_, new_n3736_ ) -new_n3738_ = OR ( new_n3737_, new_n3735_ ) -new_n3739_ = NOT ( NET_728 ) -new_n3740_ = NAND ( new_n3732_, new_n3722_ ) -new_n3741_ = OR ( new_n3740_, new_n3739_ ) -new_n3742_ = NOT ( NET_720 ) -new_n3743_ = NAND ( new_n3726_, NET_758, new_n3711_ ) -new_n3744_ = OR ( new_n3743_, new_n3742_ ) -new_n3745_ = NAND ( new_n3744_, new_n3741_, new_n3738_, new_n3734_ ) -new_n3746_ = NOT ( NET_648 ) -new_n3747_ = NOR ( new_n3720_, new_n3711_ ) -new_n3748_ = NAND ( new_n3747_, new_n3731_ ) -new_n3749_ = OR ( new_n3748_, new_n3746_ ) -new_n3750_ = NOT ( NET_640 ) -new_n3751_ = NAND ( new_n3747_, new_n3736_ ) -new_n3752_ = OR ( new_n3751_, new_n3750_ ) -new_n3753_ = NOT ( NET_632 ) -new_n3754_ = NAND ( NET_760, NET_759, NET_758, NET_757 ) -new_n3755_ = OR ( new_n3754_, new_n3753_ ) -new_n3756_ = NOT ( NET_752 ) -new_n3757_ = NAND ( new_n3732_, new_n3726_ ) -new_n3758_ = OR ( new_n3757_, new_n3756_ ) -new_n3759_ = NAND ( new_n3758_, new_n3755_, new_n3752_, new_n3749_ ) -new_n3760_ = NOT ( NET_680 ) -new_n3761_ = NAND ( NET_760, new_n3712_, new_n3720_, NET_757 ) -new_n3762_ = OR ( new_n3761_, new_n3760_ ) -new_n3763_ = NOT ( NET_672 ) -new_n3764_ = NAND ( new_n3716_, NET_759, new_n3720_, NET_757 ) -new_n3765_ = OR ( new_n3764_, new_n3763_ ) -new_n3766_ = NOT ( NET_664 ) -new_n3767_ = NOR ( NET_758, new_n3711_ ) -new_n3768_ = NAND ( new_n3767_, new_n3722_ ) -new_n3769_ = OR ( new_n3768_, new_n3766_ ) -new_n3770_ = NOT ( NET_656 ) -new_n3771_ = NAND ( new_n3747_, new_n3726_ ) -new_n3772_ = OR ( new_n3771_, new_n3770_ ) -new_n3773_ = NAND ( new_n3772_, new_n3769_, new_n3765_, new_n3762_ ) -new_n3774_ = NOR ( new_n3773_, new_n3759_, new_n3745_, new_n3729_ ) -new_n3775_ = NOT ( new_n3774_ ) -new_n3776_ = NOT ( NET_709 ) -new_n3777_ = OR ( new_n3713_, new_n3776_ ) -new_n3778_ = NOT ( NET_701 ) -new_n3779_ = OR ( new_n3717_, new_n3778_ ) -new_n3780_ = NOT ( NET_693 ) -new_n3781_ = OR ( new_n3723_, new_n3780_ ) -new_n3782_ = NOT ( NET_685 ) -new_n3783_ = OR ( new_n3727_, new_n3782_ ) -new_n3784_ = NAND ( new_n3783_, new_n3781_, new_n3779_, new_n3777_ ) -new_n3785_ = NOT ( NET_741 ) -new_n3786_ = OR ( new_n3733_, new_n3785_ ) -new_n3787_ = NOT ( NET_733 ) -new_n3788_ = OR ( new_n3737_, new_n3787_ ) -new_n3789_ = NOT ( NET_725 ) -new_n3790_ = OR ( new_n3740_, new_n3789_ ) -new_n3791_ = NOT ( NET_717 ) -new_n3792_ = OR ( new_n3743_, new_n3791_ ) -new_n3793_ = NAND ( new_n3792_, new_n3790_, new_n3788_, new_n3786_ ) -new_n3794_ = NOR ( new_n3793_, new_n3784_ ) -new_n3795_ = NOT ( NET_645 ) -new_n3796_ = OR ( new_n3748_, new_n3795_ ) -new_n3797_ = NOT ( NET_637 ) -new_n3798_ = OR ( new_n3751_, new_n3797_ ) -new_n3799_ = NOT ( NET_629 ) -new_n3800_ = OR ( new_n3754_, new_n3799_ ) -new_n3801_ = NOT ( NET_749 ) -new_n3802_ = OR ( new_n3757_, new_n3801_ ) -new_n3803_ = NAND ( new_n3802_, new_n3800_, new_n3798_, new_n3796_ ) -new_n3804_ = NOT ( NET_677 ) -new_n3805_ = OR ( new_n3761_, new_n3804_ ) -new_n3806_ = NOT ( NET_669 ) -new_n3807_ = OR ( new_n3764_, new_n3806_ ) -new_n3808_ = NOT ( NET_661 ) -new_n3809_ = OR ( new_n3768_, new_n3808_ ) -new_n3810_ = NOT ( NET_653 ) -new_n3811_ = OR ( new_n3771_, new_n3810_ ) -new_n3812_ = NAND ( new_n3811_, new_n3809_, new_n3807_, new_n3805_ ) -new_n3813_ = NOR ( new_n3812_, new_n3803_ ) -new_n3814_ = NAND ( new_n3813_, new_n3794_ ) -new_n3815_ = NOR ( NET_626, NET_624 ) -new_n3816_ = NAND ( new_n3815_, new_n3814_, new_n3775_ ) -new_n3817_ = NOT ( NET_625 ) -new_n3818_ = NOT ( NET_764 ) -new_n3819_ = NOT ( NET_765 ) -new_n3820_ = NOR ( new_n3819_, new_n3818_ ) -new_n3821_ = OR ( new_n3820_, NET_763 ) -new_n3822_ = NAND ( new_n3820_, NET_763 ) -new_n3823_ = NAND ( new_n3822_, new_n3821_, new_n3817_ ) -new_n3824_ = NOT ( NET_763 ) -new_n3825_ = OR ( NET_627, new_n3817_ ) -new_n3826_ = OR ( new_n3825_, new_n3824_ ) -new_n3827_ = NOT ( NET_627 ) -new_n3828_ = NOR ( new_n3827_, NET_626 ) -new_n3829_ = NAND ( new_n3828_, NET_758 ) -new_n3830_ = NAND ( new_n3829_, new_n3826_, new_n3823_ ) -new_n3831_ = NAND ( new_n3828_, NET_760 ) -new_n3832_ = OR ( new_n3825_, new_n3819_ ) -new_n3833_ = OR ( NET_765, NET_625 ) -new_n3834_ = NOT ( NET_626 ) -new_n3835_ = NOR ( new_n3834_, new_n3817_ ) -new_n3836_ = NOT ( new_n3835_ ) -new_n3837_ = NAND ( new_n3836_, new_n3833_, new_n3832_, new_n3831_ ) -new_n3838_ = NOT ( NET_710 ) -new_n3839_ = OR ( new_n3713_, new_n3838_ ) -new_n3840_ = NOT ( NET_702 ) -new_n3841_ = OR ( new_n3717_, new_n3840_ ) -new_n3842_ = NAND ( new_n3722_, new_n3721_, NET_694 ) -new_n3843_ = NOT ( NET_686 ) -new_n3844_ = OR ( new_n3727_, new_n3843_ ) -new_n3845_ = NAND ( new_n3844_, new_n3842_, new_n3841_, new_n3839_ ) -new_n3846_ = NAND ( new_n3732_, new_n3731_, NET_742 ) -new_n3847_ = NAND ( new_n3732_, new_n3736_, NET_734 ) -new_n3848_ = NAND ( new_n3732_, new_n3722_, NET_726 ) -new_n3849_ = NOT ( NET_718 ) -new_n3850_ = OR ( new_n3743_, new_n3849_ ) -new_n3851_ = NAND ( new_n3850_, new_n3848_, new_n3847_, new_n3846_ ) -new_n3852_ = NAND ( new_n3747_, new_n3731_, NET_646 ) -new_n3853_ = NAND ( new_n3747_, new_n3736_, NET_638 ) -new_n3854_ = NOT ( NET_630 ) -new_n3855_ = OR ( new_n3754_, new_n3854_ ) -new_n3856_ = NOT ( NET_750 ) -new_n3857_ = OR ( new_n3757_, new_n3856_ ) -new_n3858_ = NAND ( new_n3857_, new_n3855_, new_n3853_, new_n3852_ ) -new_n3859_ = NOT ( NET_678 ) -new_n3860_ = OR ( new_n3761_, new_n3859_ ) -new_n3861_ = NOT ( NET_670 ) -new_n3862_ = OR ( new_n3764_, new_n3861_ ) -new_n3863_ = NAND ( new_n3767_, new_n3722_, NET_662 ) -new_n3864_ = NAND ( new_n3747_, new_n3726_, NET_654 ) -new_n3865_ = NAND ( new_n3864_, new_n3863_, new_n3862_, new_n3860_ ) -new_n3866_ = NOR ( new_n3865_, new_n3858_, new_n3851_, new_n3845_ ) -new_n3867_ = NOT ( NET_722 ) -new_n3868_ = OR ( new_n3743_, new_n3867_ ) -new_n3869_ = NOT ( NET_714 ) -new_n3870_ = OR ( new_n3713_, new_n3869_ ) -new_n3871_ = NOT ( NET_706 ) -new_n3872_ = OR ( new_n3717_, new_n3871_ ) -new_n3873_ = NAND ( new_n3722_, new_n3721_, NET_698 ) -new_n3874_ = NAND ( new_n3873_, new_n3872_, new_n3870_, new_n3868_ ) -new_n3875_ = NOT ( NET_754 ) -new_n3876_ = OR ( new_n3757_, new_n3875_ ) -new_n3877_ = NAND ( new_n3732_, new_n3731_, NET_746 ) -new_n3878_ = NAND ( new_n3732_, new_n3736_, NET_738 ) -new_n3879_ = NAND ( new_n3732_, new_n3722_, NET_730 ) -new_n3880_ = NAND ( new_n3879_, new_n3878_, new_n3877_, new_n3876_ ) -new_n3881_ = NAND ( new_n3747_, new_n3726_, NET_658 ) -new_n3882_ = NAND ( new_n3747_, new_n3731_, NET_650 ) -new_n3883_ = NAND ( new_n3747_, new_n3736_, NET_642 ) -new_n3884_ = NOT ( NET_634 ) -new_n3885_ = OR ( new_n3754_, new_n3884_ ) -new_n3886_ = NAND ( new_n3885_, new_n3883_, new_n3882_, new_n3881_ ) -new_n3887_ = NOT ( NET_690 ) -new_n3888_ = OR ( new_n3727_, new_n3887_ ) -new_n3889_ = NOT ( NET_682 ) -new_n3890_ = OR ( new_n3761_, new_n3889_ ) -new_n3891_ = NOT ( NET_674 ) -new_n3892_ = OR ( new_n3764_, new_n3891_ ) -new_n3893_ = NAND ( new_n3767_, new_n3722_, NET_666 ) -new_n3894_ = NAND ( new_n3893_, new_n3892_, new_n3890_, new_n3888_ ) -new_n3895_ = OR ( new_n3894_, new_n3886_, new_n3880_, new_n3874_ ) -new_n3896_ = NOT ( NET_723 ) -new_n3897_ = OR ( new_n3743_, new_n3896_ ) -new_n3898_ = NOT ( NET_715 ) -new_n3899_ = OR ( new_n3713_, new_n3898_ ) -new_n3900_ = NOT ( NET_707 ) -new_n3901_ = OR ( new_n3717_, new_n3900_ ) -new_n3902_ = NAND ( new_n3722_, new_n3721_, NET_699 ) -new_n3903_ = NAND ( new_n3902_, new_n3901_, new_n3899_, new_n3897_ ) -new_n3904_ = NOT ( NET_755 ) -new_n3905_ = OR ( new_n3757_, new_n3904_ ) -new_n3906_ = NAND ( new_n3732_, new_n3731_, NET_747 ) -new_n3907_ = NAND ( new_n3732_, new_n3736_, NET_739 ) -new_n3908_ = NAND ( new_n3732_, new_n3722_, NET_731 ) -new_n3909_ = NAND ( new_n3908_, new_n3907_, new_n3906_, new_n3905_ ) -new_n3910_ = NAND ( new_n3747_, new_n3726_, NET_659 ) -new_n3911_ = NAND ( new_n3747_, new_n3731_, NET_651 ) -new_n3912_ = NAND ( new_n3747_, new_n3736_, NET_643 ) -new_n3913_ = NOT ( NET_635 ) -new_n3914_ = OR ( new_n3754_, new_n3913_ ) -new_n3915_ = NAND ( new_n3914_, new_n3912_, new_n3911_, new_n3910_ ) -new_n3916_ = NOT ( NET_691 ) -new_n3917_ = OR ( new_n3727_, new_n3916_ ) -new_n3918_ = NOT ( NET_683 ) -new_n3919_ = OR ( new_n3761_, new_n3918_ ) -new_n3920_ = NOT ( NET_675 ) -new_n3921_ = OR ( new_n3764_, new_n3920_ ) -new_n3922_ = NAND ( new_n3767_, new_n3722_, NET_667 ) -new_n3923_ = NAND ( new_n3922_, new_n3921_, new_n3919_, new_n3917_ ) -new_n3924_ = OR ( new_n3923_, new_n3915_, new_n3909_, new_n3903_ ) -new_n3925_ = NOT ( NET_721 ) -new_n3926_ = OR ( new_n3743_, new_n3925_ ) -new_n3927_ = NOT ( NET_713 ) -new_n3928_ = OR ( new_n3713_, new_n3927_ ) -new_n3929_ = NOT ( NET_705 ) -new_n3930_ = OR ( new_n3717_, new_n3929_ ) -new_n3931_ = NAND ( new_n3722_, new_n3721_, NET_697 ) -new_n3932_ = NAND ( new_n3931_, new_n3930_, new_n3928_, new_n3926_ ) -new_n3933_ = NOT ( NET_753 ) -new_n3934_ = OR ( new_n3757_, new_n3933_ ) -new_n3935_ = NAND ( new_n3732_, new_n3731_, NET_745 ) -new_n3936_ = NAND ( new_n3732_, new_n3736_, NET_737 ) -new_n3937_ = NAND ( new_n3732_, new_n3722_, NET_729 ) -new_n3938_ = NAND ( new_n3937_, new_n3936_, new_n3935_, new_n3934_ ) -new_n3939_ = NAND ( new_n3747_, new_n3726_, NET_657 ) -new_n3940_ = NAND ( new_n3747_, new_n3731_, NET_649 ) -new_n3941_ = NAND ( new_n3747_, new_n3736_, NET_641 ) -new_n3942_ = NOT ( NET_633 ) -new_n3943_ = OR ( new_n3754_, new_n3942_ ) -new_n3944_ = NAND ( new_n3943_, new_n3941_, new_n3940_, new_n3939_ ) -new_n3945_ = NOT ( NET_689 ) -new_n3946_ = OR ( new_n3727_, new_n3945_ ) -new_n3947_ = NOT ( NET_681 ) -new_n3948_ = OR ( new_n3761_, new_n3947_ ) -new_n3949_ = NOT ( NET_673 ) -new_n3950_ = OR ( new_n3764_, new_n3949_ ) -new_n3951_ = NAND ( new_n3767_, new_n3722_, NET_665 ) -new_n3952_ = NAND ( new_n3951_, new_n3950_, new_n3948_, new_n3946_ ) -new_n3953_ = NOR ( new_n3952_, new_n3944_, new_n3938_, new_n3932_ ) -new_n3954_ = NAND ( new_n3953_, new_n3924_, new_n3895_, new_n3866_ ) -new_n3955_ = NAND ( new_n3954_, new_n3834_ ) -new_n3956_ = NAND ( NET_766, NET_626 ) -new_n3957_ = NAND ( new_n3956_, new_n3955_, NET_627, NET_625 ) -new_n3958_ = NOR ( new_n3819_, NET_764 ) -new_n3959_ = NOR ( NET_765, new_n3818_ ) -new_n3960_ = NOR ( new_n3959_, new_n3958_ ) -new_n3961_ = OR ( new_n3960_, NET_625 ) -new_n3962_ = OR ( new_n3825_, new_n3818_ ) -new_n3963_ = NAND ( new_n3828_, NET_759 ) -new_n3964_ = NAND ( new_n3963_, new_n3962_, new_n3961_ ) -new_n3965_ = NAND ( new_n3964_, new_n3957_, new_n3837_ ) -new_n3966_ = NOT ( NET_956 ) -new_n3967_ = OR ( new_n3966_, NET_626 ) -new_n3968_ = NAND ( NET_797, NET_626 ) -new_n3969_ = NAND ( new_n3968_, new_n3967_ ) -new_n3970_ = XNOR ( NET_767, NET_766 ) -new_n3971_ = NAND ( new_n3970_, new_n3969_ ) -new_n3972_ = OR ( new_n3969_, NET_767 ) -new_n3973_ = NAND ( new_n3972_, new_n3971_, new_n3835_ ) -new_n3974_ = OR ( new_n3865_, new_n3858_, new_n3851_, new_n3845_ ) -new_n3975_ = NOR ( new_n3894_, new_n3886_, new_n3880_, new_n3874_ ) -new_n3976_ = OR ( new_n3975_, new_n3974_ ) -new_n3977_ = NOT ( new_n3976_ ) -new_n3978_ = NAND ( new_n3977_, new_n3828_ ) -new_n3979_ = NAND ( new_n3978_, new_n3973_, new_n3965_ ) -new_n3980_ = NAND ( new_n3957_, new_n3837_ ) -new_n3981_ = NAND ( new_n3963_, new_n3962_, new_n3961_, new_n3980_ ) -new_n3982_ = NAND ( new_n3981_, new_n3979_, new_n3830_ ) -new_n3983_ = NOT ( NET_762 ) -new_n3984_ = NAND ( new_n3820_, NET_763, new_n3983_ ) -new_n3985_ = OR ( new_n3820_, new_n3983_ ) -new_n3986_ = OR ( NET_763, new_n3983_ ) -new_n3987_ = NAND ( new_n3986_, new_n3985_, new_n3984_ ) -new_n3988_ = NAND ( new_n3987_, new_n3817_ ) -new_n3989_ = OR ( new_n3825_, new_n3983_ ) -new_n3990_ = NAND ( new_n3828_, NET_757 ) -new_n3991_ = NAND ( new_n3990_, new_n3989_, new_n3988_ ) -new_n3992_ = XOR ( new_n3991_, new_n3982_ ) -new_n3993_ = NAND ( new_n3978_, new_n3973_ ) -new_n3994_ = XNOR ( new_n3993_, new_n3980_ ) -new_n3995_ = XNOR ( new_n3994_, new_n3964_ ) -new_n3996_ = NAND ( new_n3981_, new_n3979_ ) -new_n3997_ = XNOR ( new_n3996_, new_n3830_ ) -new_n3998_ = XNOR ( new_n3957_, new_n3837_ ) -new_n3999_ = NOT ( new_n3998_ ) -new_n4000_ = NAND ( new_n3999_, new_n3997_, new_n3995_, new_n3992_ ) -new_n4001_ = OR ( new_n4000_, new_n3776_ ) -new_n4002_ = XOR ( new_n3994_, new_n3964_ ) -new_n4003_ = NAND ( new_n3998_, new_n3997_, new_n4002_, new_n3992_ ) -new_n4004_ = OR ( new_n4003_, new_n3778_ ) -new_n4005_ = NAND ( new_n3999_, new_n3997_, new_n4002_, new_n3992_ ) -new_n4006_ = OR ( new_n4005_, new_n3780_ ) -new_n4007_ = XOR ( new_n3996_, new_n3830_ ) -new_n4008_ = XNOR ( new_n3991_, new_n3982_ ) -new_n4009_ = NAND ( new_n4008_, new_n3998_, new_n4007_, new_n3995_ ) -new_n4010_ = OR ( new_n4009_, new_n3782_ ) -new_n4011_ = NAND ( new_n4010_, new_n4006_, new_n4004_, new_n4001_ ) -new_n4012_ = NAND ( new_n3999_, new_n4007_, new_n3995_, new_n3992_ ) -new_n4013_ = OR ( new_n4012_, new_n3785_ ) -new_n4014_ = NAND ( new_n3998_, new_n4007_, new_n4002_, new_n3992_ ) -new_n4015_ = OR ( new_n4014_, new_n3787_ ) -new_n4016_ = NAND ( new_n3999_, new_n4007_, new_n4002_, new_n3992_ ) -new_n4017_ = OR ( new_n4016_, new_n3789_ ) -new_n4018_ = NAND ( new_n3998_, new_n3997_, new_n3995_, new_n3992_ ) -new_n4019_ = OR ( new_n4018_, new_n3791_ ) -new_n4020_ = NAND ( new_n4019_, new_n4017_, new_n4015_, new_n4013_ ) -new_n4021_ = NAND ( new_n4008_, new_n3999_, new_n3997_, new_n3995_ ) -new_n4022_ = OR ( new_n4021_, new_n3795_ ) -new_n4023_ = NAND ( new_n4008_, new_n3998_, new_n3997_, new_n4002_ ) -new_n4024_ = OR ( new_n4023_, new_n3797_ ) -new_n4025_ = NAND ( new_n4008_, new_n3999_, new_n3997_, new_n4002_ ) -new_n4026_ = OR ( new_n4025_, new_n3799_ ) -new_n4027_ = NAND ( new_n3998_, new_n4007_, new_n3995_, new_n3992_ ) -new_n4028_ = OR ( new_n4027_, new_n3801_ ) -new_n4029_ = NAND ( new_n4028_, new_n4026_, new_n4024_, new_n4022_ ) -new_n4030_ = NAND ( new_n4008_, new_n3999_, new_n4007_, new_n3995_ ) -new_n4031_ = OR ( new_n4030_, new_n3804_ ) -new_n4032_ = NAND ( new_n4008_, new_n3998_, new_n4007_, new_n4002_ ) -new_n4033_ = OR ( new_n4032_, new_n3806_ ) -new_n4034_ = NAND ( new_n4008_, new_n3999_, new_n4007_, new_n4002_ ) -new_n4035_ = OR ( new_n4034_, new_n3808_ ) -new_n4036_ = NAND ( new_n4008_, new_n3998_, new_n3997_, new_n3995_ ) -new_n4037_ = OR ( new_n4036_, new_n3810_ ) -new_n4038_ = NAND ( new_n4037_, new_n4035_, new_n4033_, new_n4031_ ) -new_n4039_ = NOR ( new_n4038_, new_n4029_, new_n4020_, new_n4011_ ) -new_n4040_ = OR ( new_n4039_, new_n3816_ ) -new_n4041_ = OR ( new_n4000_, new_n3838_ ) -new_n4042_ = OR ( new_n4003_, new_n3840_ ) -new_n4043_ = NOT ( NET_694 ) -new_n4044_ = OR ( new_n4005_, new_n4043_ ) -new_n4045_ = OR ( new_n4009_, new_n3843_ ) -new_n4046_ = NAND ( new_n4045_, new_n4044_, new_n4042_, new_n4041_ ) -new_n4047_ = NOT ( NET_742 ) -new_n4048_ = OR ( new_n4012_, new_n4047_ ) -new_n4049_ = NOT ( NET_734 ) -new_n4050_ = OR ( new_n4014_, new_n4049_ ) -new_n4051_ = NOT ( NET_726 ) -new_n4052_ = OR ( new_n4016_, new_n4051_ ) -new_n4053_ = OR ( new_n4018_, new_n3849_ ) -new_n4054_ = NAND ( new_n4053_, new_n4052_, new_n4050_, new_n4048_ ) -new_n4055_ = NOT ( NET_646 ) -new_n4056_ = OR ( new_n4021_, new_n4055_ ) -new_n4057_ = NOT ( NET_638 ) -new_n4058_ = OR ( new_n4023_, new_n4057_ ) -new_n4059_ = OR ( new_n4025_, new_n3854_ ) -new_n4060_ = OR ( new_n4027_, new_n3856_ ) -new_n4061_ = NAND ( new_n4060_, new_n4059_, new_n4058_, new_n4056_ ) -new_n4062_ = OR ( new_n4030_, new_n3859_ ) -new_n4063_ = OR ( new_n4032_, new_n3861_ ) -new_n4064_ = NOT ( NET_662 ) -new_n4065_ = OR ( new_n4034_, new_n4064_ ) -new_n4066_ = NOT ( NET_654 ) -new_n4067_ = OR ( new_n4036_, new_n4066_ ) -new_n4068_ = NAND ( new_n4067_, new_n4065_, new_n4063_, new_n4062_ ) -new_n4069_ = NOR ( new_n4068_, new_n4061_, new_n4054_, new_n4046_ ) -new_n4070_ = OR ( new_n4069_, new_n3816_ ) -new_n4071_ = AND ( new_n4070_, new_n4040_ ) -new_n4072_ = NOT ( new_n3816_ ) -new_n4073_ = NOT ( NET_761 ) -new_n4074_ = NOT ( NET_756 ) -new_n4075_ = NOR ( NET_765, new_n3716_ ) -new_n4076_ = NOR ( NET_764, new_n3712_ ) -new_n4077_ = NOR ( new_n4076_, new_n4075_ ) -new_n4078_ = NOR ( new_n3818_, NET_759 ) -new_n4079_ = NOR ( new_n4078_, new_n4077_ ) -new_n4080_ = NAND ( new_n4079_, NET_758 ) -new_n4081_ = NAND ( new_n4080_, NET_763 ) -new_n4082_ = OR ( new_n4079_, NET_758 ) -new_n4083_ = NAND ( new_n4082_, new_n4081_ ) -new_n4084_ = OR ( new_n4083_, new_n3711_ ) -new_n4085_ = NAND ( new_n4084_, NET_762 ) -new_n4086_ = NAND ( new_n4083_, new_n3711_ ) -new_n4087_ = NAND ( new_n4086_, new_n4085_ ) -new_n4088_ = NAND ( new_n4087_, new_n4074_ ) -new_n4089_ = NAND ( new_n4088_, new_n4073_ ) -new_n4090_ = OR ( new_n4087_, new_n4074_ ) -new_n4091_ = NAND ( new_n4090_, new_n4089_ ) -new_n4092_ = NOR ( new_n3975_, new_n3814_ ) -new_n4093_ = NAND ( new_n3895_, new_n3974_, new_n3775_ ) -new_n4094_ = OR ( new_n4093_, new_n4092_ ) -new_n4095_ = NAND ( new_n4094_, new_n3815_ ) -new_n4096_ = NOT ( new_n4095_ ) -new_n4097_ = NAND ( new_n4096_, new_n4091_ ) -new_n4098_ = NOT ( NET_994 ) -new_n4099_ = NAND ( new_n4098_, NET_756, NET_626 ) -new_n4100_ = NAND ( new_n4099_, new_n4097_ ) -new_n4101_ = OR ( new_n4100_, new_n4072_ ) -new_n4102_ = OR ( new_n4101_, new_n4071_ ) -new_n4103_ = OR ( new_n4018_, new_n3867_ ) -new_n4104_ = OR ( new_n4000_, new_n3869_ ) -new_n4105_ = OR ( new_n4003_, new_n3871_ ) -new_n4106_ = NOT ( NET_698 ) -new_n4107_ = OR ( new_n4005_, new_n4106_ ) -new_n4108_ = NAND ( new_n4107_, new_n4105_, new_n4104_, new_n4103_ ) -new_n4109_ = OR ( new_n4027_, new_n3875_ ) -new_n4110_ = NOT ( NET_746 ) -new_n4111_ = OR ( new_n4012_, new_n4110_ ) -new_n4112_ = NOT ( NET_738 ) -new_n4113_ = OR ( new_n4014_, new_n4112_ ) -new_n4114_ = NOT ( NET_730 ) -new_n4115_ = OR ( new_n4016_, new_n4114_ ) -new_n4116_ = NAND ( new_n4115_, new_n4113_, new_n4111_, new_n4109_ ) -new_n4117_ = NOT ( NET_658 ) -new_n4118_ = OR ( new_n4036_, new_n4117_ ) -new_n4119_ = NOT ( NET_650 ) -new_n4120_ = OR ( new_n4021_, new_n4119_ ) -new_n4121_ = NOT ( NET_642 ) -new_n4122_ = OR ( new_n4023_, new_n4121_ ) -new_n4123_ = OR ( new_n4025_, new_n3884_ ) -new_n4124_ = NAND ( new_n4123_, new_n4122_, new_n4120_, new_n4118_ ) -new_n4125_ = OR ( new_n4009_, new_n3887_ ) -new_n4126_ = OR ( new_n4030_, new_n3889_ ) -new_n4127_ = OR ( new_n4032_, new_n3891_ ) -new_n4128_ = NOT ( NET_666 ) -new_n4129_ = OR ( new_n4034_, new_n4128_ ) -new_n4130_ = NAND ( new_n4129_, new_n4127_, new_n4126_, new_n4125_ ) -new_n4131_ = NOR ( new_n4130_, new_n4124_, new_n4116_, new_n4108_ ) -new_n4132_ = OR ( new_n4131_, new_n3816_ ) -new_n4133_ = NOR ( new_n3895_, new_n3814_ ) -new_n4134_ = NOR ( new_n3975_, new_n3774_ ) -new_n4135_ = NOR ( new_n4134_, new_n4133_ ) -new_n4136_ = NOR ( new_n4135_, new_n3866_ ) -new_n4137_ = OR ( new_n4136_, NET_624 ) -new_n4138_ = NAND ( NET_759, NET_624 ) -new_n4139_ = AND ( new_n4138_, new_n4137_, new_n3834_ ) -new_n4140_ = NOT ( new_n3969_ ) -new_n4141_ = NAND ( NET_994, NET_766 ) -new_n4142_ = OR ( new_n4141_, new_n3995_ ) -new_n4143_ = OR ( NET_994, new_n3712_ ) -new_n4144_ = NAND ( new_n4143_, new_n4142_, NET_626 ) -new_n4145_ = NOR ( new_n4072_, NET_624 ) -new_n4146_ = NOR ( new_n4078_, new_n4076_ ) -new_n4147_ = XNOR ( new_n4146_, new_n4075_ ) -new_n4148_ = NAND ( new_n4147_, new_n4096_ ) -new_n4149_ = NAND ( new_n4148_, new_n4145_, new_n4144_ ) -new_n4150_ = NAND ( new_n4149_, new_n4139_, new_n4132_ ) -new_n4151_ = OR ( new_n4018_, new_n3896_ ) -new_n4152_ = OR ( new_n4000_, new_n3898_ ) -new_n4153_ = OR ( new_n4003_, new_n3900_ ) -new_n4154_ = NOT ( NET_699 ) -new_n4155_ = OR ( new_n4005_, new_n4154_ ) -new_n4156_ = NAND ( new_n4155_, new_n4153_, new_n4152_, new_n4151_ ) -new_n4157_ = OR ( new_n4027_, new_n3904_ ) -new_n4158_ = NOT ( NET_747 ) -new_n4159_ = OR ( new_n4012_, new_n4158_ ) -new_n4160_ = NOT ( NET_739 ) -new_n4161_ = OR ( new_n4014_, new_n4160_ ) -new_n4162_ = NOT ( NET_731 ) -new_n4163_ = OR ( new_n4016_, new_n4162_ ) -new_n4164_ = NAND ( new_n4163_, new_n4161_, new_n4159_, new_n4157_ ) -new_n4165_ = NOT ( NET_659 ) -new_n4166_ = OR ( new_n4036_, new_n4165_ ) -new_n4167_ = NOT ( NET_651 ) -new_n4168_ = OR ( new_n4021_, new_n4167_ ) -new_n4169_ = NOT ( NET_643 ) -new_n4170_ = OR ( new_n4023_, new_n4169_ ) -new_n4171_ = OR ( new_n4025_, new_n3913_ ) -new_n4172_ = NAND ( new_n4171_, new_n4170_, new_n4168_, new_n4166_ ) -new_n4173_ = OR ( new_n4009_, new_n3916_ ) -new_n4174_ = OR ( new_n4030_, new_n3918_ ) -new_n4175_ = OR ( new_n4032_, new_n3920_ ) -new_n4176_ = NOT ( NET_667 ) -new_n4177_ = OR ( new_n4034_, new_n4176_ ) -new_n4178_ = NAND ( new_n4177_, new_n4175_, new_n4174_, new_n4173_ ) -new_n4179_ = NOR ( new_n4178_, new_n4172_, new_n4164_, new_n4156_ ) -new_n4180_ = OR ( new_n4179_, new_n3816_ ) -new_n4181_ = NOR ( new_n3866_, new_n3814_ ) -new_n4182_ = NOR ( new_n4181_, new_n4092_ ) -new_n4183_ = OR ( new_n4182_, NET_624 ) -new_n4184_ = NAND ( NET_760, NET_624 ) -new_n4185_ = NAND ( new_n4184_, new_n4183_, new_n4180_, new_n3834_ ) -new_n4186_ = OR ( NET_994, NET_760 ) -new_n4187_ = NOT ( NET_766 ) -new_n4188_ = OR ( new_n3969_, new_n4187_ ) -new_n4189_ = NAND ( new_n3969_, NET_766 ) -new_n4190_ = NAND ( new_n4189_, new_n4188_ ) -new_n4191_ = NAND ( new_n4190_, new_n3998_ ) -new_n4192_ = OR ( new_n4191_, new_n4098_ ) -new_n4193_ = NAND ( new_n4192_, new_n4186_ ) -new_n4194_ = NAND ( new_n4193_, NET_626 ) -new_n4195_ = XNOR ( NET_765, NET_760 ) -new_n4196_ = OR ( new_n4195_, new_n4095_ ) -new_n4197_ = AND ( new_n4196_, new_n4194_, new_n4145_ ) -new_n4198_ = NAND ( new_n4197_, new_n4185_, new_n4150_ ) -new_n4199_ = AND ( new_n4139_, new_n4132_ ) -new_n4200_ = OR ( new_n4149_, new_n4199_ ) -new_n4201_ = OR ( new_n4141_, new_n4007_ ) -new_n4202_ = OR ( NET_994, new_n3720_ ) -new_n4203_ = NAND ( new_n4202_, new_n4201_, NET_626 ) -new_n4204_ = XOR ( NET_763, NET_758 ) -new_n4205_ = XOR ( new_n4204_, new_n4079_ ) -new_n4206_ = NAND ( new_n4205_, new_n4096_ ) -new_n4207_ = NAND ( new_n4206_, new_n4203_, new_n4145_ ) -new_n4208_ = OR ( new_n4018_, new_n3925_ ) -new_n4209_ = OR ( new_n4000_, new_n3927_ ) -new_n4210_ = OR ( new_n4003_, new_n3929_ ) -new_n4211_ = NOT ( NET_697 ) -new_n4212_ = OR ( new_n4005_, new_n4211_ ) -new_n4213_ = NAND ( new_n4212_, new_n4210_, new_n4209_, new_n4208_ ) -new_n4214_ = OR ( new_n4027_, new_n3933_ ) -new_n4215_ = NOT ( NET_745 ) -new_n4216_ = OR ( new_n4012_, new_n4215_ ) -new_n4217_ = NOT ( NET_737 ) -new_n4218_ = OR ( new_n4014_, new_n4217_ ) -new_n4219_ = NOT ( NET_729 ) -new_n4220_ = OR ( new_n4016_, new_n4219_ ) -new_n4221_ = NAND ( new_n4220_, new_n4218_, new_n4216_, new_n4214_ ) -new_n4222_ = NOT ( NET_657 ) -new_n4223_ = OR ( new_n4036_, new_n4222_ ) -new_n4224_ = NOT ( NET_649 ) -new_n4225_ = OR ( new_n4021_, new_n4224_ ) -new_n4226_ = NOT ( NET_641 ) -new_n4227_ = OR ( new_n4023_, new_n4226_ ) -new_n4228_ = OR ( new_n4025_, new_n3942_ ) -new_n4229_ = NAND ( new_n4228_, new_n4227_, new_n4225_, new_n4223_ ) -new_n4230_ = OR ( new_n4009_, new_n3945_ ) -new_n4231_ = OR ( new_n4030_, new_n3947_ ) -new_n4232_ = OR ( new_n4032_, new_n3949_ ) -new_n4233_ = NOT ( NET_665 ) -new_n4234_ = OR ( new_n4034_, new_n4233_ ) -new_n4235_ = NAND ( new_n4234_, new_n4232_, new_n4231_, new_n4230_ ) -new_n4236_ = NOR ( new_n4235_, new_n4229_, new_n4221_, new_n4213_ ) -new_n4237_ = OR ( new_n4236_, new_n3816_ ) -new_n4238_ = NAND ( NET_758, NET_624 ) -new_n4239_ = OR ( new_n4182_, NET_626, NET_624 ) -new_n4240_ = AND ( new_n4239_, new_n4238_, new_n4237_ ) -new_n4241_ = OR ( new_n4240_, new_n4207_ ) -new_n4242_ = NAND ( new_n4241_, new_n4200_, new_n4198_ ) -new_n4243_ = NAND ( new_n4240_, new_n4207_ ) -new_n4244_ = OR ( new_n4000_, new_n3710_ ) -new_n4245_ = OR ( new_n4003_, new_n3715_ ) -new_n4246_ = OR ( new_n4005_, new_n3719_ ) -new_n4247_ = OR ( new_n4009_, new_n3725_ ) -new_n4248_ = NAND ( new_n4247_, new_n4246_, new_n4245_, new_n4244_ ) -new_n4249_ = OR ( new_n4012_, new_n3730_ ) -new_n4250_ = OR ( new_n4014_, new_n3735_ ) -new_n4251_ = OR ( new_n4016_, new_n3739_ ) -new_n4252_ = OR ( new_n4018_, new_n3742_ ) -new_n4253_ = NAND ( new_n4252_, new_n4251_, new_n4250_, new_n4249_ ) -new_n4254_ = OR ( new_n4021_, new_n3746_ ) -new_n4255_ = OR ( new_n4023_, new_n3750_ ) -new_n4256_ = OR ( new_n4025_, new_n3753_ ) -new_n4257_ = OR ( new_n4027_, new_n3756_ ) -new_n4258_ = NAND ( new_n4257_, new_n4256_, new_n4255_, new_n4254_ ) -new_n4259_ = OR ( new_n4030_, new_n3760_ ) -new_n4260_ = OR ( new_n4032_, new_n3763_ ) -new_n4261_ = OR ( new_n4034_, new_n3766_ ) -new_n4262_ = OR ( new_n4036_, new_n3770_ ) -new_n4263_ = NAND ( new_n4262_, new_n4261_, new_n4260_, new_n4259_ ) -new_n4264_ = NOR ( new_n4263_, new_n4258_, new_n4253_, new_n4248_ ) -new_n4265_ = NOR ( new_n4264_, new_n3816_ ) -new_n4266_ = NOT ( NET_624 ) -new_n4267_ = NOR ( new_n3711_, new_n4266_ ) -new_n4268_ = NOR ( new_n4267_, new_n4265_ ) -new_n4269_ = XOR ( NET_762, NET_757 ) -new_n4270_ = XOR ( new_n4269_, new_n4083_ ) -new_n4271_ = OR ( new_n4270_, new_n4095_ ) -new_n4272_ = NOR ( NET_994, new_n3711_ ) -new_n4273_ = OR ( new_n4272_, new_n3834_ ) -new_n4274_ = NAND ( new_n4273_, new_n4271_, new_n4145_ ) -new_n4275_ = NAND ( new_n4274_, new_n4268_ ) -new_n4276_ = NAND ( new_n4275_, new_n4243_, new_n4242_ ) -new_n4277_ = OR ( new_n4274_, new_n4268_ ) -new_n4278_ = XOR ( NET_761, NET_756 ) -new_n4279_ = XOR ( new_n4278_, new_n4087_ ) -new_n4280_ = OR ( new_n4279_, new_n4095_ ) -new_n4281_ = NAND ( new_n4280_, new_n4099_, new_n3816_ ) -new_n4282_ = NOR ( new_n4074_, new_n4266_ ) -new_n4283_ = NOT ( NET_711 ) -new_n4284_ = OR ( new_n4000_, new_n4283_ ) -new_n4285_ = NOT ( NET_703 ) -new_n4286_ = OR ( new_n4003_, new_n4285_ ) -new_n4287_ = NOT ( NET_695 ) -new_n4288_ = OR ( new_n4005_, new_n4287_ ) -new_n4289_ = NOT ( NET_687 ) -new_n4290_ = OR ( new_n4009_, new_n4289_ ) -new_n4291_ = NAND ( new_n4290_, new_n4288_, new_n4286_, new_n4284_ ) -new_n4292_ = NOT ( NET_743 ) -new_n4293_ = OR ( new_n4012_, new_n4292_ ) -new_n4294_ = NOT ( NET_735 ) -new_n4295_ = OR ( new_n4014_, new_n4294_ ) -new_n4296_ = NOT ( NET_727 ) -new_n4297_ = OR ( new_n4016_, new_n4296_ ) -new_n4298_ = NOT ( NET_719 ) -new_n4299_ = OR ( new_n4018_, new_n4298_ ) -new_n4300_ = NAND ( new_n4299_, new_n4297_, new_n4295_, new_n4293_ ) -new_n4301_ = NOT ( NET_647 ) -new_n4302_ = OR ( new_n4021_, new_n4301_ ) -new_n4303_ = NOT ( NET_639 ) -new_n4304_ = OR ( new_n4023_, new_n4303_ ) -new_n4305_ = NOT ( NET_631 ) -new_n4306_ = OR ( new_n4025_, new_n4305_ ) -new_n4307_ = NOT ( NET_751 ) -new_n4308_ = OR ( new_n4027_, new_n4307_ ) -new_n4309_ = NAND ( new_n4308_, new_n4306_, new_n4304_, new_n4302_ ) -new_n4310_ = NOT ( NET_679 ) -new_n4311_ = OR ( new_n4030_, new_n4310_ ) -new_n4312_ = NOT ( NET_671 ) -new_n4313_ = OR ( new_n4032_, new_n4312_ ) -new_n4314_ = NOT ( NET_663 ) -new_n4315_ = OR ( new_n4034_, new_n4314_ ) -new_n4316_ = NOT ( NET_655 ) -new_n4317_ = OR ( new_n4036_, new_n4316_ ) -new_n4318_ = NAND ( new_n4317_, new_n4315_, new_n4313_, new_n4311_ ) -new_n4319_ = NOR ( new_n4318_, new_n4309_, new_n4300_, new_n4291_ ) -new_n4320_ = NOR ( new_n4319_, new_n3816_ ) -new_n4321_ = NOR ( new_n4320_, new_n4282_ ) -new_n4322_ = OR ( new_n4321_, new_n4281_ ) -new_n4323_ = NAND ( new_n4322_, new_n4277_, new_n4276_ ) -new_n4324_ = NAND ( new_n4321_, new_n4281_ ) -new_n4325_ = NAND ( new_n4101_, new_n4070_ ) -new_n4326_ = NAND ( new_n4325_, new_n4324_, new_n4323_ ) -new_n4327_ = NAND ( new_n4326_, new_n4102_ ) -new_n4328_ = NAND ( new_n4100_, new_n3816_ ) -new_n4329_ = NAND ( new_n4039_, new_n4072_ ) -new_n4330_ = NAND ( new_n4329_, new_n4328_, new_n4327_ ) -new_n4331_ = NOT ( new_n4100_ ) -new_n4332_ = NOT ( NET_708 ) -new_n4333_ = OR ( new_n4000_, new_n4332_ ) -new_n4334_ = NOT ( NET_700 ) -new_n4335_ = OR ( new_n4003_, new_n4334_ ) -new_n4336_ = NOT ( NET_692 ) -new_n4337_ = OR ( new_n4005_, new_n4336_ ) -new_n4338_ = NOT ( NET_684 ) -new_n4339_ = OR ( new_n4009_, new_n4338_ ) -new_n4340_ = NAND ( new_n4339_, new_n4337_, new_n4335_, new_n4333_ ) -new_n4341_ = NOT ( NET_740 ) -new_n4342_ = OR ( new_n4012_, new_n4341_ ) -new_n4343_ = NOT ( NET_732 ) -new_n4344_ = OR ( new_n4014_, new_n4343_ ) -new_n4345_ = NOT ( NET_724 ) -new_n4346_ = OR ( new_n4016_, new_n4345_ ) -new_n4347_ = NOT ( NET_716 ) -new_n4348_ = OR ( new_n4018_, new_n4347_ ) -new_n4349_ = NAND ( new_n4348_, new_n4346_, new_n4344_, new_n4342_ ) -new_n4350_ = NOT ( NET_644 ) -new_n4351_ = OR ( new_n4021_, new_n4350_ ) -new_n4352_ = NOT ( NET_636 ) -new_n4353_ = OR ( new_n4023_, new_n4352_ ) -new_n4354_ = NOT ( NET_628 ) -new_n4355_ = OR ( new_n4025_, new_n4354_ ) -new_n4356_ = NOT ( NET_748 ) -new_n4357_ = OR ( new_n4027_, new_n4356_ ) -new_n4358_ = NAND ( new_n4357_, new_n4355_, new_n4353_, new_n4351_ ) -new_n4359_ = NOT ( NET_676 ) -new_n4360_ = OR ( new_n4030_, new_n4359_ ) -new_n4361_ = NOT ( NET_668 ) -new_n4362_ = OR ( new_n4032_, new_n4361_ ) -new_n4363_ = NOT ( NET_660 ) -new_n4364_ = OR ( new_n4034_, new_n4363_ ) -new_n4365_ = NOT ( NET_652 ) -new_n4366_ = OR ( new_n4036_, new_n4365_ ) -new_n4367_ = NAND ( new_n4366_, new_n4364_, new_n4362_, new_n4360_ ) -new_n4368_ = NOR ( new_n4367_, new_n4358_, new_n4349_, new_n4340_ ) -new_n4369_ = NOR ( new_n4368_, new_n3816_ ) -new_n4370_ = XOR ( new_n4369_, new_n4331_ ) -new_n4371_ = NAND ( new_n4370_, new_n4330_ ) -new_n4372_ = NOT ( new_n3814_ ) -new_n4373_ = OR ( new_n4093_, new_n4372_ ) -new_n4374_ = NAND ( new_n4373_, new_n4266_ ) -new_n4375_ = NAND ( new_n4374_, new_n3834_ ) -new_n4376_ = NAND ( new_n4375_, new_n4369_ ) -new_n4377_ = NAND ( new_n4376_, new_n4331_ ) -new_n4378_ = OR ( new_n4375_, new_n4369_ ) -new_n4379_ = NAND ( new_n4378_, new_n4100_ ) -new_n4380_ = NAND ( new_n4379_, new_n4377_ ) -new_n4381_ = NAND ( new_n4380_, new_n4371_ ) -new_n4382_ = NOT ( new_n3953_ ) -new_n4383_ = OR ( new_n3713_, new_n4283_ ) -new_n4384_ = OR ( new_n3717_, new_n4285_ ) -new_n4385_ = OR ( new_n3723_, new_n4287_ ) -new_n4386_ = OR ( new_n3727_, new_n4289_ ) -new_n4387_ = NAND ( new_n4386_, new_n4385_, new_n4384_, new_n4383_ ) -new_n4388_ = OR ( new_n3733_, new_n4292_ ) -new_n4389_ = OR ( new_n3737_, new_n4294_ ) -new_n4390_ = OR ( new_n3740_, new_n4296_ ) -new_n4391_ = OR ( new_n3743_, new_n4298_ ) -new_n4392_ = NAND ( new_n4391_, new_n4390_, new_n4389_, new_n4388_ ) -new_n4393_ = NOR ( new_n4392_, new_n4387_ ) -new_n4394_ = OR ( new_n3748_, new_n4301_ ) -new_n4395_ = OR ( new_n3751_, new_n4303_ ) -new_n4396_ = OR ( new_n3754_, new_n4305_ ) -new_n4397_ = OR ( new_n3757_, new_n4307_ ) -new_n4398_ = NAND ( new_n4397_, new_n4396_, new_n4395_, new_n4394_ ) -new_n4399_ = OR ( new_n3761_, new_n4310_ ) -new_n4400_ = OR ( new_n3764_, new_n4312_ ) -new_n4401_ = OR ( new_n3768_, new_n4314_ ) -new_n4402_ = OR ( new_n3771_, new_n4316_ ) -new_n4403_ = NAND ( new_n4402_, new_n4401_, new_n4400_, new_n4399_ ) -new_n4404_ = NOR ( new_n4403_, new_n4398_ ) -new_n4405_ = NAND ( new_n4404_, new_n4393_ ) -new_n4406_ = NOR ( new_n4405_, new_n3866_ ) -new_n4407_ = OR ( new_n3713_, new_n4332_ ) -new_n4408_ = OR ( new_n3717_, new_n4334_ ) -new_n4409_ = OR ( new_n3723_, new_n4336_ ) -new_n4410_ = OR ( new_n3727_, new_n4338_ ) -new_n4411_ = NAND ( new_n4410_, new_n4409_, new_n4408_, new_n4407_ ) -new_n4412_ = OR ( new_n3733_, new_n4341_ ) -new_n4413_ = OR ( new_n3737_, new_n4343_ ) -new_n4414_ = OR ( new_n3740_, new_n4345_ ) -new_n4415_ = OR ( new_n3743_, new_n4347_ ) -new_n4416_ = NAND ( new_n4415_, new_n4414_, new_n4413_, new_n4412_ ) -new_n4417_ = OR ( new_n3748_, new_n4350_ ) -new_n4418_ = OR ( new_n3751_, new_n4352_ ) -new_n4419_ = OR ( new_n3754_, new_n4354_ ) -new_n4420_ = OR ( new_n3757_, new_n4356_ ) -new_n4421_ = NAND ( new_n4420_, new_n4419_, new_n4418_, new_n4417_ ) -new_n4422_ = OR ( new_n3761_, new_n4359_ ) -new_n4423_ = OR ( new_n3764_, new_n4361_ ) -new_n4424_ = OR ( new_n3768_, new_n4363_ ) -new_n4425_ = OR ( new_n3771_, new_n4365_ ) -new_n4426_ = NAND ( new_n4425_, new_n4424_, new_n4423_, new_n4422_ ) -new_n4427_ = NOR ( new_n4426_, new_n4421_, new_n4416_, new_n4411_ ) -new_n4428_ = NOT ( new_n4427_ ) -new_n4429_ = AND ( new_n4428_, new_n4406_, new_n3814_ ) -new_n4430_ = NOR ( new_n3924_, new_n3775_ ) -new_n4431_ = NAND ( new_n4430_, new_n4429_, new_n4382_ ) -new_n4432_ = NOR ( new_n4431_, new_n3975_ ) -new_n4433_ = XOR ( NET_590, NET_589 ) -new_n4434_ = NOT ( new_n4433_ ) -new_n4435_ = NOR ( new_n4434_, NET_591 ) -new_n4436_ = NAND ( new_n4435_, new_n4432_, NET_627 ) -new_n4437_ = NOT ( new_n4133_ ) -new_n4438_ = OR ( new_n4427_, new_n3774_ ) -new_n4439_ = NOR ( new_n4438_, new_n4382_ ) -new_n4440_ = NOT ( new_n4439_ ) -new_n4441_ = NOT ( new_n3924_ ) -new_n4442_ = OR ( new_n4405_, new_n3974_ ) -new_n4443_ = OR ( new_n4442_, new_n4441_ ) -new_n4444_ = NOR ( new_n4443_, new_n4440_, new_n4437_ ) -new_n4445_ = NAND ( new_n4444_, new_n4433_, NET_627 ) -new_n4446_ = OR ( new_n4445_, NET_591 ) -new_n4447_ = NAND ( new_n4446_, new_n4436_ ) -new_n4448_ = NOR ( NET_626, new_n3817_ ) -new_n4449_ = NAND ( new_n4448_, new_n4447_, new_n4381_ ) -new_n4450_ = OR ( new_n3825_, new_n3834_ ) -new_n4451_ = NAND ( new_n4450_, new_n4449_ ) -NET_10621 = NOR ( new_n4451_, new_n3709_ ) -new_n4453_ = NOT ( NET_1341 ) -new_n4454_ = NOT ( NET_1161 ) -new_n4455_ = NOT ( NET_1206 ) -new_n4456_ = NOT ( NET_1208 ) -new_n4457_ = NAND ( NET_1209, new_n4456_, NET_1207, new_n4455_ ) -new_n4458_ = OR ( new_n4457_, new_n4454_ ) -new_n4459_ = NOT ( NET_1153 ) -new_n4460_ = NOT ( NET_1209 ) -new_n4461_ = NAND ( new_n4460_, NET_1208, NET_1207, new_n4455_ ) -new_n4462_ = OR ( new_n4461_, new_n4459_ ) -new_n4463_ = NOT ( NET_1145 ) -new_n4464_ = NOT ( NET_1207 ) -new_n4465_ = NOR ( new_n4464_, NET_1206 ) -new_n4466_ = NOR ( new_n4460_, new_n4456_ ) -new_n4467_ = NAND ( new_n4466_, new_n4465_ ) -new_n4468_ = OR ( new_n4467_, new_n4463_ ) -new_n4469_ = NOT ( NET_1137 ) -new_n4470_ = NOR ( NET_1209, NET_1208 ) -new_n4471_ = NAND ( new_n4470_, new_n4464_, NET_1206 ) -new_n4472_ = OR ( new_n4471_, new_n4469_ ) -new_n4473_ = NAND ( new_n4472_, new_n4468_, new_n4462_, new_n4458_ ) -new_n4474_ = NOT ( NET_1193 ) -new_n4475_ = NOR ( new_n4460_, NET_1208 ) -new_n4476_ = NOR ( NET_1207, NET_1206 ) -new_n4477_ = NAND ( new_n4476_, new_n4475_ ) -new_n4478_ = OR ( new_n4477_, new_n4474_ ) -new_n4479_ = NOT ( NET_1185 ) -new_n4480_ = NOR ( NET_1209, new_n4456_ ) -new_n4481_ = NAND ( new_n4476_, new_n4480_ ) -new_n4482_ = OR ( new_n4481_, new_n4479_ ) -new_n4483_ = NOT ( NET_1177 ) -new_n4484_ = NAND ( new_n4476_, new_n4466_ ) -new_n4485_ = OR ( new_n4484_, new_n4483_ ) -new_n4486_ = NOT ( NET_1169 ) -new_n4487_ = NAND ( new_n4470_, NET_1207, new_n4455_ ) -new_n4488_ = OR ( new_n4487_, new_n4486_ ) -new_n4489_ = NAND ( new_n4488_, new_n4485_, new_n4482_, new_n4478_ ) -new_n4490_ = NOT ( NET_1097 ) -new_n4491_ = NOR ( new_n4464_, new_n4455_ ) -new_n4492_ = NAND ( new_n4491_, new_n4475_ ) -new_n4493_ = OR ( new_n4492_, new_n4490_ ) -new_n4494_ = NOT ( NET_1089 ) -new_n4495_ = NAND ( new_n4491_, new_n4480_ ) -new_n4496_ = OR ( new_n4495_, new_n4494_ ) -new_n4497_ = NOT ( NET_1081 ) -new_n4498_ = NAND ( NET_1209, NET_1208, NET_1207, NET_1206 ) -new_n4499_ = OR ( new_n4498_, new_n4497_ ) -new_n4500_ = NOT ( NET_1201 ) -new_n4501_ = NAND ( new_n4476_, new_n4470_ ) -new_n4502_ = OR ( new_n4501_, new_n4500_ ) -new_n4503_ = NAND ( new_n4502_, new_n4499_, new_n4496_, new_n4493_ ) -new_n4504_ = NOT ( NET_1129 ) -new_n4505_ = NAND ( NET_1209, new_n4456_, new_n4464_, NET_1206 ) -new_n4506_ = OR ( new_n4505_, new_n4504_ ) -new_n4507_ = NOT ( NET_1121 ) -new_n4508_ = NAND ( new_n4460_, NET_1208, new_n4464_, NET_1206 ) -new_n4509_ = OR ( new_n4508_, new_n4507_ ) -new_n4510_ = NOT ( NET_1113 ) -new_n4511_ = NOR ( NET_1207, new_n4455_ ) -new_n4512_ = NAND ( new_n4511_, new_n4466_ ) -new_n4513_ = OR ( new_n4512_, new_n4510_ ) -new_n4514_ = NOT ( NET_1105 ) -new_n4515_ = NAND ( new_n4491_, new_n4470_ ) -new_n4516_ = OR ( new_n4515_, new_n4514_ ) -new_n4517_ = NAND ( new_n4516_, new_n4513_, new_n4509_, new_n4506_ ) -new_n4518_ = NOR ( new_n4517_, new_n4503_, new_n4489_, new_n4473_ ) -new_n4519_ = NOT ( new_n4518_ ) -new_n4520_ = NOT ( NET_1158 ) -new_n4521_ = OR ( new_n4457_, new_n4520_ ) -new_n4522_ = NOT ( NET_1150 ) -new_n4523_ = OR ( new_n4461_, new_n4522_ ) -new_n4524_ = NOT ( NET_1142 ) -new_n4525_ = OR ( new_n4467_, new_n4524_ ) -new_n4526_ = NOT ( NET_1134 ) -new_n4527_ = OR ( new_n4471_, new_n4526_ ) -new_n4528_ = NAND ( new_n4527_, new_n4525_, new_n4523_, new_n4521_ ) -new_n4529_ = NOT ( NET_1190 ) -new_n4530_ = OR ( new_n4477_, new_n4529_ ) -new_n4531_ = NOT ( NET_1182 ) -new_n4532_ = OR ( new_n4481_, new_n4531_ ) -new_n4533_ = NOT ( NET_1174 ) -new_n4534_ = OR ( new_n4484_, new_n4533_ ) -new_n4535_ = NOT ( NET_1166 ) -new_n4536_ = OR ( new_n4487_, new_n4535_ ) -new_n4537_ = NAND ( new_n4536_, new_n4534_, new_n4532_, new_n4530_ ) -new_n4538_ = NOR ( new_n4537_, new_n4528_ ) -new_n4539_ = NOT ( NET_1094 ) -new_n4540_ = OR ( new_n4492_, new_n4539_ ) -new_n4541_ = NOT ( NET_1086 ) -new_n4542_ = OR ( new_n4495_, new_n4541_ ) -new_n4543_ = NOT ( NET_1078 ) -new_n4544_ = OR ( new_n4498_, new_n4543_ ) -new_n4545_ = NOT ( NET_1198 ) -new_n4546_ = OR ( new_n4501_, new_n4545_ ) -new_n4547_ = NAND ( new_n4546_, new_n4544_, new_n4542_, new_n4540_ ) -new_n4548_ = NOT ( NET_1126 ) -new_n4549_ = OR ( new_n4505_, new_n4548_ ) -new_n4550_ = NOT ( NET_1118 ) -new_n4551_ = OR ( new_n4508_, new_n4550_ ) -new_n4552_ = NOT ( NET_1110 ) -new_n4553_ = OR ( new_n4512_, new_n4552_ ) -new_n4554_ = NOT ( NET_1102 ) -new_n4555_ = OR ( new_n4515_, new_n4554_ ) -new_n4556_ = NAND ( new_n4555_, new_n4553_, new_n4551_, new_n4549_ ) -new_n4557_ = NOR ( new_n4556_, new_n4547_ ) -new_n4558_ = NAND ( new_n4557_, new_n4538_ ) -new_n4559_ = NOR ( NET_1075, NET_1073 ) -new_n4560_ = NAND ( new_n4559_, new_n4558_, new_n4519_ ) -new_n4561_ = NOT ( NET_1074 ) -new_n4562_ = NOT ( NET_1213 ) -new_n4563_ = NOT ( NET_1214 ) -new_n4564_ = NOR ( new_n4563_, new_n4562_ ) -new_n4565_ = OR ( new_n4564_, NET_1212 ) -new_n4566_ = NAND ( new_n4564_, NET_1212 ) -new_n4567_ = NAND ( new_n4566_, new_n4565_, new_n4561_ ) -new_n4568_ = NOT ( NET_1212 ) -new_n4569_ = OR ( NET_1076, new_n4561_ ) -new_n4570_ = OR ( new_n4569_, new_n4568_ ) -new_n4571_ = NOT ( NET_1076 ) -new_n4572_ = NOR ( new_n4571_, NET_1075 ) -new_n4573_ = NAND ( new_n4572_, NET_1207 ) -new_n4574_ = NAND ( new_n4573_, new_n4570_, new_n4567_ ) -new_n4575_ = NAND ( new_n4572_, NET_1209 ) -new_n4576_ = OR ( new_n4569_, new_n4563_ ) -new_n4577_ = OR ( NET_1214, NET_1074 ) -new_n4578_ = NOT ( NET_1075 ) -new_n4579_ = NOR ( new_n4578_, new_n4561_ ) -new_n4580_ = NOT ( new_n4579_ ) -new_n4581_ = NAND ( new_n4580_, new_n4577_, new_n4576_, new_n4575_ ) -new_n4582_ = NOT ( NET_1159 ) -new_n4583_ = OR ( new_n4457_, new_n4582_ ) -new_n4584_ = NOT ( NET_1151 ) -new_n4585_ = OR ( new_n4461_, new_n4584_ ) -new_n4586_ = NAND ( new_n4466_, new_n4465_, NET_1143 ) -new_n4587_ = NOT ( NET_1135 ) -new_n4588_ = OR ( new_n4471_, new_n4587_ ) -new_n4589_ = NAND ( new_n4588_, new_n4586_, new_n4585_, new_n4583_ ) -new_n4590_ = NAND ( new_n4476_, new_n4475_, NET_1191 ) -new_n4591_ = NAND ( new_n4476_, new_n4480_, NET_1183 ) -new_n4592_ = NAND ( new_n4476_, new_n4466_, NET_1175 ) -new_n4593_ = NOT ( NET_1167 ) -new_n4594_ = OR ( new_n4487_, new_n4593_ ) -new_n4595_ = NAND ( new_n4594_, new_n4592_, new_n4591_, new_n4590_ ) -new_n4596_ = NAND ( new_n4491_, new_n4475_, NET_1095 ) -new_n4597_ = NAND ( new_n4491_, new_n4480_, NET_1087 ) -new_n4598_ = NOT ( NET_1079 ) -new_n4599_ = OR ( new_n4498_, new_n4598_ ) -new_n4600_ = NOT ( NET_1199 ) -new_n4601_ = OR ( new_n4501_, new_n4600_ ) -new_n4602_ = NAND ( new_n4601_, new_n4599_, new_n4597_, new_n4596_ ) -new_n4603_ = NOT ( NET_1127 ) -new_n4604_ = OR ( new_n4505_, new_n4603_ ) -new_n4605_ = NOT ( NET_1119 ) -new_n4606_ = OR ( new_n4508_, new_n4605_ ) -new_n4607_ = NAND ( new_n4511_, new_n4466_, NET_1111 ) -new_n4608_ = NAND ( new_n4491_, new_n4470_, NET_1103 ) -new_n4609_ = NAND ( new_n4608_, new_n4607_, new_n4606_, new_n4604_ ) -new_n4610_ = NOR ( new_n4609_, new_n4602_, new_n4595_, new_n4589_ ) -new_n4611_ = NOT ( NET_1171 ) -new_n4612_ = OR ( new_n4487_, new_n4611_ ) -new_n4613_ = NOT ( NET_1163 ) -new_n4614_ = OR ( new_n4457_, new_n4613_ ) -new_n4615_ = NOT ( NET_1155 ) -new_n4616_ = OR ( new_n4461_, new_n4615_ ) -new_n4617_ = NAND ( new_n4466_, new_n4465_, NET_1147 ) -new_n4618_ = NAND ( new_n4617_, new_n4616_, new_n4614_, new_n4612_ ) -new_n4619_ = NOT ( NET_1203 ) -new_n4620_ = OR ( new_n4501_, new_n4619_ ) -new_n4621_ = NAND ( new_n4476_, new_n4475_, NET_1195 ) -new_n4622_ = NAND ( new_n4476_, new_n4480_, NET_1187 ) -new_n4623_ = NAND ( new_n4476_, new_n4466_, NET_1179 ) -new_n4624_ = NAND ( new_n4623_, new_n4622_, new_n4621_, new_n4620_ ) -new_n4625_ = NAND ( new_n4491_, new_n4470_, NET_1107 ) -new_n4626_ = NAND ( new_n4491_, new_n4475_, NET_1099 ) -new_n4627_ = NAND ( new_n4491_, new_n4480_, NET_1091 ) -new_n4628_ = NOT ( NET_1083 ) -new_n4629_ = OR ( new_n4498_, new_n4628_ ) -new_n4630_ = NAND ( new_n4629_, new_n4627_, new_n4626_, new_n4625_ ) -new_n4631_ = NOT ( NET_1139 ) -new_n4632_ = OR ( new_n4471_, new_n4631_ ) -new_n4633_ = NOT ( NET_1131 ) -new_n4634_ = OR ( new_n4505_, new_n4633_ ) -new_n4635_ = NOT ( NET_1123 ) -new_n4636_ = OR ( new_n4508_, new_n4635_ ) -new_n4637_ = NAND ( new_n4511_, new_n4466_, NET_1115 ) -new_n4638_ = NAND ( new_n4637_, new_n4636_, new_n4634_, new_n4632_ ) -new_n4639_ = OR ( new_n4638_, new_n4630_, new_n4624_, new_n4618_ ) -new_n4640_ = NOT ( NET_1172 ) -new_n4641_ = OR ( new_n4487_, new_n4640_ ) -new_n4642_ = NOT ( NET_1164 ) -new_n4643_ = OR ( new_n4457_, new_n4642_ ) -new_n4644_ = NOT ( NET_1156 ) -new_n4645_ = OR ( new_n4461_, new_n4644_ ) -new_n4646_ = NAND ( new_n4466_, new_n4465_, NET_1148 ) -new_n4647_ = NAND ( new_n4646_, new_n4645_, new_n4643_, new_n4641_ ) -new_n4648_ = NOT ( NET_1204 ) -new_n4649_ = OR ( new_n4501_, new_n4648_ ) -new_n4650_ = NAND ( new_n4476_, new_n4475_, NET_1196 ) -new_n4651_ = NAND ( new_n4476_, new_n4480_, NET_1188 ) -new_n4652_ = NAND ( new_n4476_, new_n4466_, NET_1180 ) -new_n4653_ = NAND ( new_n4652_, new_n4651_, new_n4650_, new_n4649_ ) -new_n4654_ = NAND ( new_n4491_, new_n4470_, NET_1108 ) -new_n4655_ = NAND ( new_n4491_, new_n4475_, NET_1100 ) -new_n4656_ = NAND ( new_n4491_, new_n4480_, NET_1092 ) -new_n4657_ = NOT ( NET_1084 ) -new_n4658_ = OR ( new_n4498_, new_n4657_ ) -new_n4659_ = NAND ( new_n4658_, new_n4656_, new_n4655_, new_n4654_ ) -new_n4660_ = NOT ( NET_1140 ) -new_n4661_ = OR ( new_n4471_, new_n4660_ ) -new_n4662_ = NOT ( NET_1132 ) -new_n4663_ = OR ( new_n4505_, new_n4662_ ) -new_n4664_ = NOT ( NET_1124 ) -new_n4665_ = OR ( new_n4508_, new_n4664_ ) -new_n4666_ = NAND ( new_n4511_, new_n4466_, NET_1116 ) -new_n4667_ = NAND ( new_n4666_, new_n4665_, new_n4663_, new_n4661_ ) -new_n4668_ = OR ( new_n4667_, new_n4659_, new_n4653_, new_n4647_ ) -new_n4669_ = NOT ( NET_1170 ) -new_n4670_ = OR ( new_n4487_, new_n4669_ ) -new_n4671_ = NOT ( NET_1162 ) -new_n4672_ = OR ( new_n4457_, new_n4671_ ) -new_n4673_ = NOT ( NET_1154 ) -new_n4674_ = OR ( new_n4461_, new_n4673_ ) -new_n4675_ = NAND ( new_n4466_, new_n4465_, NET_1146 ) -new_n4676_ = NAND ( new_n4675_, new_n4674_, new_n4672_, new_n4670_ ) -new_n4677_ = NOT ( NET_1202 ) -new_n4678_ = OR ( new_n4501_, new_n4677_ ) -new_n4679_ = NAND ( new_n4476_, new_n4475_, NET_1194 ) -new_n4680_ = NAND ( new_n4476_, new_n4480_, NET_1186 ) -new_n4681_ = NAND ( new_n4476_, new_n4466_, NET_1178 ) -new_n4682_ = NAND ( new_n4681_, new_n4680_, new_n4679_, new_n4678_ ) -new_n4683_ = NAND ( new_n4491_, new_n4470_, NET_1106 ) -new_n4684_ = NAND ( new_n4491_, new_n4475_, NET_1098 ) -new_n4685_ = NAND ( new_n4491_, new_n4480_, NET_1090 ) -new_n4686_ = NOT ( NET_1082 ) -new_n4687_ = OR ( new_n4498_, new_n4686_ ) -new_n4688_ = NAND ( new_n4687_, new_n4685_, new_n4684_, new_n4683_ ) -new_n4689_ = NOT ( NET_1138 ) -new_n4690_ = OR ( new_n4471_, new_n4689_ ) -new_n4691_ = NOT ( NET_1130 ) -new_n4692_ = OR ( new_n4505_, new_n4691_ ) -new_n4693_ = NOT ( NET_1122 ) -new_n4694_ = OR ( new_n4508_, new_n4693_ ) -new_n4695_ = NAND ( new_n4511_, new_n4466_, NET_1114 ) -new_n4696_ = NAND ( new_n4695_, new_n4694_, new_n4692_, new_n4690_ ) -new_n4697_ = NOR ( new_n4696_, new_n4688_, new_n4682_, new_n4676_ ) -new_n4698_ = NAND ( new_n4697_, new_n4668_, new_n4639_, new_n4610_ ) -new_n4699_ = NAND ( new_n4698_, new_n4578_ ) -new_n4700_ = NAND ( NET_1215, NET_1075 ) -new_n4701_ = NAND ( new_n4700_, new_n4699_, NET_1076, NET_1074 ) -new_n4702_ = NOR ( new_n4563_, NET_1213 ) -new_n4703_ = NOR ( NET_1214, new_n4562_ ) -new_n4704_ = NOR ( new_n4703_, new_n4702_ ) -new_n4705_ = OR ( new_n4704_, NET_1074 ) -new_n4706_ = OR ( new_n4569_, new_n4562_ ) -new_n4707_ = NAND ( new_n4572_, NET_1208 ) -new_n4708_ = NAND ( new_n4707_, new_n4706_, new_n4705_ ) -new_n4709_ = NAND ( new_n4708_, new_n4701_, new_n4581_ ) -new_n4710_ = NOT ( NET_1405 ) -new_n4711_ = OR ( new_n4710_, NET_1075 ) -new_n4712_ = NAND ( NET_1246, NET_1075 ) -new_n4713_ = NAND ( new_n4712_, new_n4711_ ) -new_n4714_ = XNOR ( NET_1216, NET_1215 ) -new_n4715_ = NAND ( new_n4714_, new_n4713_ ) -new_n4716_ = OR ( new_n4713_, NET_1216 ) -new_n4717_ = NAND ( new_n4716_, new_n4715_, new_n4579_ ) -new_n4718_ = OR ( new_n4609_, new_n4602_, new_n4595_, new_n4589_ ) -new_n4719_ = NOR ( new_n4638_, new_n4630_, new_n4624_, new_n4618_ ) -new_n4720_ = OR ( new_n4719_, new_n4718_ ) -new_n4721_ = NOT ( new_n4720_ ) -new_n4722_ = NAND ( new_n4721_, new_n4572_ ) -new_n4723_ = NAND ( new_n4722_, new_n4717_, new_n4709_ ) -new_n4724_ = NAND ( new_n4701_, new_n4581_ ) -new_n4725_ = NAND ( new_n4707_, new_n4706_, new_n4705_, new_n4724_ ) -new_n4726_ = NAND ( new_n4725_, new_n4723_, new_n4574_ ) -new_n4727_ = NOT ( NET_1211 ) -new_n4728_ = NAND ( new_n4564_, NET_1212, new_n4727_ ) -new_n4729_ = OR ( new_n4564_, new_n4727_ ) -new_n4730_ = OR ( NET_1212, new_n4727_ ) -new_n4731_ = NAND ( new_n4730_, new_n4729_, new_n4728_ ) -new_n4732_ = NAND ( new_n4731_, new_n4561_ ) -new_n4733_ = OR ( new_n4569_, new_n4727_ ) -new_n4734_ = NAND ( new_n4572_, NET_1206 ) -new_n4735_ = NAND ( new_n4734_, new_n4733_, new_n4732_ ) -new_n4736_ = XOR ( new_n4735_, new_n4726_ ) -new_n4737_ = NAND ( new_n4722_, new_n4717_ ) -new_n4738_ = XNOR ( new_n4737_, new_n4724_ ) -new_n4739_ = XNOR ( new_n4738_, new_n4708_ ) -new_n4740_ = NAND ( new_n4725_, new_n4723_ ) -new_n4741_ = XNOR ( new_n4740_, new_n4574_ ) -new_n4742_ = XNOR ( new_n4701_, new_n4581_ ) -new_n4743_ = NOT ( new_n4742_ ) -new_n4744_ = NAND ( new_n4743_, new_n4741_, new_n4739_, new_n4736_ ) -new_n4745_ = OR ( new_n4744_, new_n4520_ ) -new_n4746_ = XOR ( new_n4738_, new_n4708_ ) -new_n4747_ = NAND ( new_n4742_, new_n4741_, new_n4746_, new_n4736_ ) -new_n4748_ = OR ( new_n4747_, new_n4522_ ) -new_n4749_ = NAND ( new_n4743_, new_n4741_, new_n4746_, new_n4736_ ) -new_n4750_ = OR ( new_n4749_, new_n4524_ ) -new_n4751_ = XOR ( new_n4740_, new_n4574_ ) -new_n4752_ = XNOR ( new_n4735_, new_n4726_ ) -new_n4753_ = NAND ( new_n4752_, new_n4742_, new_n4751_, new_n4739_ ) -new_n4754_ = OR ( new_n4753_, new_n4526_ ) -new_n4755_ = NAND ( new_n4754_, new_n4750_, new_n4748_, new_n4745_ ) -new_n4756_ = NAND ( new_n4743_, new_n4751_, new_n4739_, new_n4736_ ) -new_n4757_ = OR ( new_n4756_, new_n4529_ ) -new_n4758_ = NAND ( new_n4742_, new_n4751_, new_n4746_, new_n4736_ ) -new_n4759_ = OR ( new_n4758_, new_n4531_ ) -new_n4760_ = NAND ( new_n4743_, new_n4751_, new_n4746_, new_n4736_ ) -new_n4761_ = OR ( new_n4760_, new_n4533_ ) -new_n4762_ = NAND ( new_n4742_, new_n4741_, new_n4739_, new_n4736_ ) -new_n4763_ = OR ( new_n4762_, new_n4535_ ) -new_n4764_ = NAND ( new_n4763_, new_n4761_, new_n4759_, new_n4757_ ) -new_n4765_ = NAND ( new_n4752_, new_n4743_, new_n4741_, new_n4739_ ) -new_n4766_ = OR ( new_n4765_, new_n4539_ ) -new_n4767_ = NAND ( new_n4752_, new_n4742_, new_n4741_, new_n4746_ ) -new_n4768_ = OR ( new_n4767_, new_n4541_ ) -new_n4769_ = NAND ( new_n4752_, new_n4743_, new_n4741_, new_n4746_ ) -new_n4770_ = OR ( new_n4769_, new_n4543_ ) -new_n4771_ = NAND ( new_n4742_, new_n4751_, new_n4739_, new_n4736_ ) -new_n4772_ = OR ( new_n4771_, new_n4545_ ) -new_n4773_ = NAND ( new_n4772_, new_n4770_, new_n4768_, new_n4766_ ) -new_n4774_ = NAND ( new_n4752_, new_n4743_, new_n4751_, new_n4739_ ) -new_n4775_ = OR ( new_n4774_, new_n4548_ ) -new_n4776_ = NAND ( new_n4752_, new_n4742_, new_n4751_, new_n4746_ ) -new_n4777_ = OR ( new_n4776_, new_n4550_ ) -new_n4778_ = NAND ( new_n4752_, new_n4743_, new_n4751_, new_n4746_ ) -new_n4779_ = OR ( new_n4778_, new_n4552_ ) -new_n4780_ = NAND ( new_n4752_, new_n4742_, new_n4741_, new_n4739_ ) -new_n4781_ = OR ( new_n4780_, new_n4554_ ) -new_n4782_ = NAND ( new_n4781_, new_n4779_, new_n4777_, new_n4775_ ) -new_n4783_ = NOR ( new_n4782_, new_n4773_, new_n4764_, new_n4755_ ) -new_n4784_ = OR ( new_n4783_, new_n4560_ ) -new_n4785_ = OR ( new_n4744_, new_n4582_ ) -new_n4786_ = OR ( new_n4747_, new_n4584_ ) -new_n4787_ = NOT ( NET_1143 ) -new_n4788_ = OR ( new_n4749_, new_n4787_ ) -new_n4789_ = OR ( new_n4753_, new_n4587_ ) -new_n4790_ = NAND ( new_n4789_, new_n4788_, new_n4786_, new_n4785_ ) -new_n4791_ = NOT ( NET_1191 ) -new_n4792_ = OR ( new_n4756_, new_n4791_ ) -new_n4793_ = NOT ( NET_1183 ) -new_n4794_ = OR ( new_n4758_, new_n4793_ ) -new_n4795_ = NOT ( NET_1175 ) -new_n4796_ = OR ( new_n4760_, new_n4795_ ) -new_n4797_ = OR ( new_n4762_, new_n4593_ ) -new_n4798_ = NAND ( new_n4797_, new_n4796_, new_n4794_, new_n4792_ ) -new_n4799_ = NOT ( NET_1095 ) -new_n4800_ = OR ( new_n4765_, new_n4799_ ) -new_n4801_ = NOT ( NET_1087 ) -new_n4802_ = OR ( new_n4767_, new_n4801_ ) -new_n4803_ = OR ( new_n4769_, new_n4598_ ) -new_n4804_ = OR ( new_n4771_, new_n4600_ ) -new_n4805_ = NAND ( new_n4804_, new_n4803_, new_n4802_, new_n4800_ ) -new_n4806_ = OR ( new_n4774_, new_n4603_ ) -new_n4807_ = OR ( new_n4776_, new_n4605_ ) -new_n4808_ = NOT ( NET_1111 ) -new_n4809_ = OR ( new_n4778_, new_n4808_ ) -new_n4810_ = NOT ( NET_1103 ) -new_n4811_ = OR ( new_n4780_, new_n4810_ ) -new_n4812_ = NAND ( new_n4811_, new_n4809_, new_n4807_, new_n4806_ ) -new_n4813_ = NOR ( new_n4812_, new_n4805_, new_n4798_, new_n4790_ ) -new_n4814_ = OR ( new_n4813_, new_n4560_ ) -new_n4815_ = AND ( new_n4814_, new_n4784_ ) -new_n4816_ = NOT ( new_n4560_ ) -new_n4817_ = NOT ( NET_1210 ) -new_n4818_ = NOT ( NET_1205 ) -new_n4819_ = NOR ( NET_1214, new_n4460_ ) -new_n4820_ = NOR ( NET_1213, new_n4456_ ) -new_n4821_ = NOR ( new_n4820_, new_n4819_ ) -new_n4822_ = NOR ( new_n4562_, NET_1208 ) -new_n4823_ = NOR ( new_n4822_, new_n4821_ ) -new_n4824_ = NAND ( new_n4823_, NET_1207 ) -new_n4825_ = NAND ( new_n4824_, NET_1212 ) -new_n4826_ = OR ( new_n4823_, NET_1207 ) -new_n4827_ = NAND ( new_n4826_, new_n4825_ ) -new_n4828_ = OR ( new_n4827_, new_n4455_ ) -new_n4829_ = NAND ( new_n4828_, NET_1211 ) -new_n4830_ = NAND ( new_n4827_, new_n4455_ ) -new_n4831_ = NAND ( new_n4830_, new_n4829_ ) -new_n4832_ = NAND ( new_n4831_, new_n4818_ ) -new_n4833_ = NAND ( new_n4832_, new_n4817_ ) -new_n4834_ = OR ( new_n4831_, new_n4818_ ) -new_n4835_ = NAND ( new_n4834_, new_n4833_ ) -new_n4836_ = NOR ( new_n4719_, new_n4558_ ) -new_n4837_ = NAND ( new_n4639_, new_n4718_, new_n4519_ ) -new_n4838_ = OR ( new_n4837_, new_n4836_ ) -new_n4839_ = NAND ( new_n4838_, new_n4559_ ) -new_n4840_ = NOT ( new_n4839_ ) -new_n4841_ = NAND ( new_n4840_, new_n4835_ ) -new_n4842_ = NOT ( NET_1443 ) -new_n4843_ = NAND ( new_n4842_, NET_1205, NET_1075 ) -new_n4844_ = NAND ( new_n4843_, new_n4841_ ) -new_n4845_ = OR ( new_n4844_, new_n4816_ ) -new_n4846_ = OR ( new_n4845_, new_n4815_ ) -new_n4847_ = OR ( new_n4762_, new_n4611_ ) -new_n4848_ = OR ( new_n4744_, new_n4613_ ) -new_n4849_ = OR ( new_n4747_, new_n4615_ ) -new_n4850_ = NOT ( NET_1147 ) -new_n4851_ = OR ( new_n4749_, new_n4850_ ) -new_n4852_ = NAND ( new_n4851_, new_n4849_, new_n4848_, new_n4847_ ) -new_n4853_ = OR ( new_n4771_, new_n4619_ ) -new_n4854_ = NOT ( NET_1195 ) -new_n4855_ = OR ( new_n4756_, new_n4854_ ) -new_n4856_ = NOT ( NET_1187 ) -new_n4857_ = OR ( new_n4758_, new_n4856_ ) -new_n4858_ = NOT ( NET_1179 ) -new_n4859_ = OR ( new_n4760_, new_n4858_ ) -new_n4860_ = NAND ( new_n4859_, new_n4857_, new_n4855_, new_n4853_ ) -new_n4861_ = NOT ( NET_1107 ) -new_n4862_ = OR ( new_n4780_, new_n4861_ ) -new_n4863_ = NOT ( NET_1099 ) -new_n4864_ = OR ( new_n4765_, new_n4863_ ) -new_n4865_ = NOT ( NET_1091 ) -new_n4866_ = OR ( new_n4767_, new_n4865_ ) -new_n4867_ = OR ( new_n4769_, new_n4628_ ) -new_n4868_ = NAND ( new_n4867_, new_n4866_, new_n4864_, new_n4862_ ) -new_n4869_ = OR ( new_n4753_, new_n4631_ ) -new_n4870_ = OR ( new_n4774_, new_n4633_ ) -new_n4871_ = OR ( new_n4776_, new_n4635_ ) -new_n4872_ = NOT ( NET_1115 ) -new_n4873_ = OR ( new_n4778_, new_n4872_ ) -new_n4874_ = NAND ( new_n4873_, new_n4871_, new_n4870_, new_n4869_ ) -new_n4875_ = NOR ( new_n4874_, new_n4868_, new_n4860_, new_n4852_ ) -new_n4876_ = OR ( new_n4875_, new_n4560_ ) -new_n4877_ = NOR ( new_n4639_, new_n4558_ ) -new_n4878_ = NOR ( new_n4719_, new_n4518_ ) -new_n4879_ = NOR ( new_n4878_, new_n4877_ ) -new_n4880_ = NOR ( new_n4879_, new_n4610_ ) -new_n4881_ = OR ( new_n4880_, NET_1073 ) -new_n4882_ = NAND ( NET_1208, NET_1073 ) -new_n4883_ = AND ( new_n4882_, new_n4881_, new_n4578_ ) -new_n4884_ = NOT ( new_n4713_ ) -new_n4885_ = NAND ( NET_1443, NET_1215 ) -new_n4886_ = OR ( new_n4885_, new_n4739_ ) -new_n4887_ = OR ( NET_1443, new_n4456_ ) -new_n4888_ = NAND ( new_n4887_, new_n4886_, NET_1075 ) -new_n4889_ = NOR ( new_n4816_, NET_1073 ) -new_n4890_ = NOR ( new_n4822_, new_n4820_ ) -new_n4891_ = XNOR ( new_n4890_, new_n4819_ ) -new_n4892_ = NAND ( new_n4891_, new_n4840_ ) -new_n4893_ = NAND ( new_n4892_, new_n4889_, new_n4888_ ) -new_n4894_ = NAND ( new_n4893_, new_n4883_, new_n4876_ ) -new_n4895_ = OR ( new_n4762_, new_n4640_ ) -new_n4896_ = OR ( new_n4744_, new_n4642_ ) -new_n4897_ = OR ( new_n4747_, new_n4644_ ) -new_n4898_ = NOT ( NET_1148 ) -new_n4899_ = OR ( new_n4749_, new_n4898_ ) -new_n4900_ = NAND ( new_n4899_, new_n4897_, new_n4896_, new_n4895_ ) -new_n4901_ = OR ( new_n4771_, new_n4648_ ) -new_n4902_ = NOT ( NET_1196 ) -new_n4903_ = OR ( new_n4756_, new_n4902_ ) -new_n4904_ = NOT ( NET_1188 ) -new_n4905_ = OR ( new_n4758_, new_n4904_ ) -new_n4906_ = NOT ( NET_1180 ) -new_n4907_ = OR ( new_n4760_, new_n4906_ ) -new_n4908_ = NAND ( new_n4907_, new_n4905_, new_n4903_, new_n4901_ ) -new_n4909_ = NOT ( NET_1108 ) -new_n4910_ = OR ( new_n4780_, new_n4909_ ) -new_n4911_ = NOT ( NET_1100 ) -new_n4912_ = OR ( new_n4765_, new_n4911_ ) -new_n4913_ = NOT ( NET_1092 ) -new_n4914_ = OR ( new_n4767_, new_n4913_ ) -new_n4915_ = OR ( new_n4769_, new_n4657_ ) -new_n4916_ = NAND ( new_n4915_, new_n4914_, new_n4912_, new_n4910_ ) -new_n4917_ = OR ( new_n4753_, new_n4660_ ) -new_n4918_ = OR ( new_n4774_, new_n4662_ ) -new_n4919_ = OR ( new_n4776_, new_n4664_ ) -new_n4920_ = NOT ( NET_1116 ) -new_n4921_ = OR ( new_n4778_, new_n4920_ ) -new_n4922_ = NAND ( new_n4921_, new_n4919_, new_n4918_, new_n4917_ ) -new_n4923_ = NOR ( new_n4922_, new_n4916_, new_n4908_, new_n4900_ ) -new_n4924_ = OR ( new_n4923_, new_n4560_ ) -new_n4925_ = NOR ( new_n4610_, new_n4558_ ) -new_n4926_ = NOR ( new_n4925_, new_n4836_ ) -new_n4927_ = OR ( new_n4926_, NET_1073 ) -new_n4928_ = NAND ( NET_1209, NET_1073 ) -new_n4929_ = NAND ( new_n4928_, new_n4927_, new_n4924_, new_n4578_ ) -new_n4930_ = OR ( NET_1443, NET_1209 ) -new_n4931_ = NOT ( NET_1215 ) -new_n4932_ = OR ( new_n4713_, new_n4931_ ) -new_n4933_ = NAND ( new_n4713_, NET_1215 ) -new_n4934_ = NAND ( new_n4933_, new_n4932_ ) -new_n4935_ = NAND ( new_n4934_, new_n4742_ ) -new_n4936_ = OR ( new_n4935_, new_n4842_ ) -new_n4937_ = NAND ( new_n4936_, new_n4930_ ) -new_n4938_ = NAND ( new_n4937_, NET_1075 ) -new_n4939_ = XNOR ( NET_1214, NET_1209 ) -new_n4940_ = OR ( new_n4939_, new_n4839_ ) -new_n4941_ = AND ( new_n4940_, new_n4938_, new_n4889_ ) -new_n4942_ = NAND ( new_n4941_, new_n4929_, new_n4894_ ) -new_n4943_ = AND ( new_n4883_, new_n4876_ ) -new_n4944_ = OR ( new_n4893_, new_n4943_ ) -new_n4945_ = OR ( new_n4885_, new_n4751_ ) -new_n4946_ = OR ( NET_1443, new_n4464_ ) -new_n4947_ = NAND ( new_n4946_, new_n4945_, NET_1075 ) -new_n4948_ = XOR ( NET_1212, NET_1207 ) -new_n4949_ = XOR ( new_n4948_, new_n4823_ ) -new_n4950_ = NAND ( new_n4949_, new_n4840_ ) -new_n4951_ = NAND ( new_n4950_, new_n4947_, new_n4889_ ) -new_n4952_ = OR ( new_n4762_, new_n4669_ ) -new_n4953_ = OR ( new_n4744_, new_n4671_ ) -new_n4954_ = OR ( new_n4747_, new_n4673_ ) -new_n4955_ = NOT ( NET_1146 ) -new_n4956_ = OR ( new_n4749_, new_n4955_ ) -new_n4957_ = NAND ( new_n4956_, new_n4954_, new_n4953_, new_n4952_ ) -new_n4958_ = OR ( new_n4771_, new_n4677_ ) -new_n4959_ = NOT ( NET_1194 ) -new_n4960_ = OR ( new_n4756_, new_n4959_ ) -new_n4961_ = NOT ( NET_1186 ) -new_n4962_ = OR ( new_n4758_, new_n4961_ ) -new_n4963_ = NOT ( NET_1178 ) -new_n4964_ = OR ( new_n4760_, new_n4963_ ) -new_n4965_ = NAND ( new_n4964_, new_n4962_, new_n4960_, new_n4958_ ) -new_n4966_ = NOT ( NET_1106 ) -new_n4967_ = OR ( new_n4780_, new_n4966_ ) -new_n4968_ = NOT ( NET_1098 ) -new_n4969_ = OR ( new_n4765_, new_n4968_ ) -new_n4970_ = NOT ( NET_1090 ) -new_n4971_ = OR ( new_n4767_, new_n4970_ ) -new_n4972_ = OR ( new_n4769_, new_n4686_ ) -new_n4973_ = NAND ( new_n4972_, new_n4971_, new_n4969_, new_n4967_ ) -new_n4974_ = OR ( new_n4753_, new_n4689_ ) -new_n4975_ = OR ( new_n4774_, new_n4691_ ) -new_n4976_ = OR ( new_n4776_, new_n4693_ ) -new_n4977_ = NOT ( NET_1114 ) -new_n4978_ = OR ( new_n4778_, new_n4977_ ) -new_n4979_ = NAND ( new_n4978_, new_n4976_, new_n4975_, new_n4974_ ) -new_n4980_ = NOR ( new_n4979_, new_n4973_, new_n4965_, new_n4957_ ) -new_n4981_ = OR ( new_n4980_, new_n4560_ ) -new_n4982_ = NAND ( NET_1207, NET_1073 ) -new_n4983_ = OR ( new_n4926_, NET_1075, NET_1073 ) -new_n4984_ = AND ( new_n4983_, new_n4982_, new_n4981_ ) -new_n4985_ = OR ( new_n4984_, new_n4951_ ) -new_n4986_ = NAND ( new_n4985_, new_n4944_, new_n4942_ ) -new_n4987_ = NAND ( new_n4984_, new_n4951_ ) -new_n4988_ = OR ( new_n4744_, new_n4454_ ) -new_n4989_ = OR ( new_n4747_, new_n4459_ ) -new_n4990_ = OR ( new_n4749_, new_n4463_ ) -new_n4991_ = OR ( new_n4753_, new_n4469_ ) -new_n4992_ = NAND ( new_n4991_, new_n4990_, new_n4989_, new_n4988_ ) -new_n4993_ = OR ( new_n4756_, new_n4474_ ) -new_n4994_ = OR ( new_n4758_, new_n4479_ ) -new_n4995_ = OR ( new_n4760_, new_n4483_ ) -new_n4996_ = OR ( new_n4762_, new_n4486_ ) -new_n4997_ = NAND ( new_n4996_, new_n4995_, new_n4994_, new_n4993_ ) -new_n4998_ = OR ( new_n4765_, new_n4490_ ) -new_n4999_ = OR ( new_n4767_, new_n4494_ ) -new_n5000_ = OR ( new_n4769_, new_n4497_ ) -new_n5001_ = OR ( new_n4771_, new_n4500_ ) -new_n5002_ = NAND ( new_n5001_, new_n5000_, new_n4999_, new_n4998_ ) -new_n5003_ = OR ( new_n4774_, new_n4504_ ) -new_n5004_ = OR ( new_n4776_, new_n4507_ ) -new_n5005_ = OR ( new_n4778_, new_n4510_ ) -new_n5006_ = OR ( new_n4780_, new_n4514_ ) -new_n5007_ = NAND ( new_n5006_, new_n5005_, new_n5004_, new_n5003_ ) -new_n5008_ = NOR ( new_n5007_, new_n5002_, new_n4997_, new_n4992_ ) -new_n5009_ = NOR ( new_n5008_, new_n4560_ ) -new_n5010_ = NOT ( NET_1073 ) -new_n5011_ = NOR ( new_n4455_, new_n5010_ ) -new_n5012_ = NOR ( new_n5011_, new_n5009_ ) -new_n5013_ = XOR ( NET_1211, NET_1206 ) -new_n5014_ = XOR ( new_n5013_, new_n4827_ ) -new_n5015_ = OR ( new_n5014_, new_n4839_ ) -new_n5016_ = NOR ( NET_1443, new_n4455_ ) -new_n5017_ = OR ( new_n5016_, new_n4578_ ) -new_n5018_ = NAND ( new_n5017_, new_n5015_, new_n4889_ ) -new_n5019_ = NAND ( new_n5018_, new_n5012_ ) -new_n5020_ = NAND ( new_n5019_, new_n4987_, new_n4986_ ) -new_n5021_ = OR ( new_n5018_, new_n5012_ ) -new_n5022_ = XOR ( NET_1210, NET_1205 ) -new_n5023_ = XOR ( new_n5022_, new_n4831_ ) -new_n5024_ = OR ( new_n5023_, new_n4839_ ) -new_n5025_ = NAND ( new_n5024_, new_n4843_, new_n4560_ ) -new_n5026_ = NOR ( new_n4818_, new_n5010_ ) -new_n5027_ = NOT ( NET_1160 ) -new_n5028_ = OR ( new_n4744_, new_n5027_ ) -new_n5029_ = NOT ( NET_1152 ) -new_n5030_ = OR ( new_n4747_, new_n5029_ ) -new_n5031_ = NOT ( NET_1144 ) -new_n5032_ = OR ( new_n4749_, new_n5031_ ) -new_n5033_ = NOT ( NET_1136 ) -new_n5034_ = OR ( new_n4753_, new_n5033_ ) -new_n5035_ = NAND ( new_n5034_, new_n5032_, new_n5030_, new_n5028_ ) -new_n5036_ = NOT ( NET_1192 ) -new_n5037_ = OR ( new_n4756_, new_n5036_ ) -new_n5038_ = NOT ( NET_1184 ) -new_n5039_ = OR ( new_n4758_, new_n5038_ ) -new_n5040_ = NOT ( NET_1176 ) -new_n5041_ = OR ( new_n4760_, new_n5040_ ) -new_n5042_ = NOT ( NET_1168 ) -new_n5043_ = OR ( new_n4762_, new_n5042_ ) -new_n5044_ = NAND ( new_n5043_, new_n5041_, new_n5039_, new_n5037_ ) -new_n5045_ = NOT ( NET_1096 ) -new_n5046_ = OR ( new_n4765_, new_n5045_ ) -new_n5047_ = NOT ( NET_1088 ) -new_n5048_ = OR ( new_n4767_, new_n5047_ ) -new_n5049_ = NOT ( NET_1080 ) -new_n5050_ = OR ( new_n4769_, new_n5049_ ) -new_n5051_ = NOT ( NET_1200 ) -new_n5052_ = OR ( new_n4771_, new_n5051_ ) -new_n5053_ = NAND ( new_n5052_, new_n5050_, new_n5048_, new_n5046_ ) -new_n5054_ = NOT ( NET_1128 ) -new_n5055_ = OR ( new_n4774_, new_n5054_ ) -new_n5056_ = NOT ( NET_1120 ) -new_n5057_ = OR ( new_n4776_, new_n5056_ ) -new_n5058_ = NOT ( NET_1112 ) -new_n5059_ = OR ( new_n4778_, new_n5058_ ) -new_n5060_ = NOT ( NET_1104 ) -new_n5061_ = OR ( new_n4780_, new_n5060_ ) -new_n5062_ = NAND ( new_n5061_, new_n5059_, new_n5057_, new_n5055_ ) -new_n5063_ = NOR ( new_n5062_, new_n5053_, new_n5044_, new_n5035_ ) -new_n5064_ = NOR ( new_n5063_, new_n4560_ ) -new_n5065_ = NOR ( new_n5064_, new_n5026_ ) -new_n5066_ = OR ( new_n5065_, new_n5025_ ) -new_n5067_ = NAND ( new_n5066_, new_n5021_, new_n5020_ ) -new_n5068_ = NAND ( new_n5065_, new_n5025_ ) -new_n5069_ = NAND ( new_n4845_, new_n4814_ ) -new_n5070_ = NAND ( new_n5069_, new_n5068_, new_n5067_ ) -new_n5071_ = NAND ( new_n5070_, new_n4846_ ) -new_n5072_ = NAND ( new_n4844_, new_n4560_ ) -new_n5073_ = NAND ( new_n4783_, new_n4816_ ) -new_n5074_ = NAND ( new_n5073_, new_n5072_, new_n5071_ ) -new_n5075_ = NOT ( new_n4844_ ) -new_n5076_ = NOT ( NET_1157 ) -new_n5077_ = OR ( new_n4744_, new_n5076_ ) -new_n5078_ = NOT ( NET_1149 ) -new_n5079_ = OR ( new_n4747_, new_n5078_ ) -new_n5080_ = NOT ( NET_1141 ) -new_n5081_ = OR ( new_n4749_, new_n5080_ ) -new_n5082_ = NOT ( NET_1133 ) -new_n5083_ = OR ( new_n4753_, new_n5082_ ) -new_n5084_ = NAND ( new_n5083_, new_n5081_, new_n5079_, new_n5077_ ) -new_n5085_ = NOT ( NET_1189 ) -new_n5086_ = OR ( new_n4756_, new_n5085_ ) -new_n5087_ = NOT ( NET_1181 ) -new_n5088_ = OR ( new_n4758_, new_n5087_ ) -new_n5089_ = NOT ( NET_1173 ) -new_n5090_ = OR ( new_n4760_, new_n5089_ ) -new_n5091_ = NOT ( NET_1165 ) -new_n5092_ = OR ( new_n4762_, new_n5091_ ) -new_n5093_ = NAND ( new_n5092_, new_n5090_, new_n5088_, new_n5086_ ) -new_n5094_ = NOT ( NET_1093 ) -new_n5095_ = OR ( new_n4765_, new_n5094_ ) -new_n5096_ = NOT ( NET_1085 ) -new_n5097_ = OR ( new_n4767_, new_n5096_ ) -new_n5098_ = NOT ( NET_1077 ) -new_n5099_ = OR ( new_n4769_, new_n5098_ ) -new_n5100_ = NOT ( NET_1197 ) -new_n5101_ = OR ( new_n4771_, new_n5100_ ) -new_n5102_ = NAND ( new_n5101_, new_n5099_, new_n5097_, new_n5095_ ) -new_n5103_ = NOT ( NET_1125 ) -new_n5104_ = OR ( new_n4774_, new_n5103_ ) -new_n5105_ = NOT ( NET_1117 ) -new_n5106_ = OR ( new_n4776_, new_n5105_ ) -new_n5107_ = NOT ( NET_1109 ) -new_n5108_ = OR ( new_n4778_, new_n5107_ ) -new_n5109_ = NOT ( NET_1101 ) -new_n5110_ = OR ( new_n4780_, new_n5109_ ) -new_n5111_ = NAND ( new_n5110_, new_n5108_, new_n5106_, new_n5104_ ) -new_n5112_ = NOR ( new_n5111_, new_n5102_, new_n5093_, new_n5084_ ) -new_n5113_ = NOR ( new_n5112_, new_n4560_ ) -new_n5114_ = XOR ( new_n5113_, new_n5075_ ) -new_n5115_ = NAND ( new_n5114_, new_n5074_ ) -new_n5116_ = NOT ( new_n4558_ ) -new_n5117_ = OR ( new_n4837_, new_n5116_ ) -new_n5118_ = NAND ( new_n5117_, new_n5010_ ) -new_n5119_ = NAND ( new_n5118_, new_n4578_ ) -new_n5120_ = NAND ( new_n5119_, new_n5113_ ) -new_n5121_ = NAND ( new_n5120_, new_n5075_ ) -new_n5122_ = OR ( new_n5119_, new_n5113_ ) -new_n5123_ = NAND ( new_n5122_, new_n4844_ ) -new_n5124_ = NAND ( new_n5123_, new_n5121_ ) -new_n5125_ = NAND ( new_n5124_, new_n5115_ ) -new_n5126_ = NOT ( new_n4697_ ) -new_n5127_ = OR ( new_n4457_, new_n5027_ ) -new_n5128_ = OR ( new_n4461_, new_n5029_ ) -new_n5129_ = OR ( new_n4467_, new_n5031_ ) -new_n5130_ = OR ( new_n4471_, new_n5033_ ) -new_n5131_ = NAND ( new_n5130_, new_n5129_, new_n5128_, new_n5127_ ) -new_n5132_ = OR ( new_n4477_, new_n5036_ ) -new_n5133_ = OR ( new_n4481_, new_n5038_ ) -new_n5134_ = OR ( new_n4484_, new_n5040_ ) -new_n5135_ = OR ( new_n4487_, new_n5042_ ) -new_n5136_ = NAND ( new_n5135_, new_n5134_, new_n5133_, new_n5132_ ) -new_n5137_ = NOR ( new_n5136_, new_n5131_ ) -new_n5138_ = OR ( new_n4492_, new_n5045_ ) -new_n5139_ = OR ( new_n4495_, new_n5047_ ) -new_n5140_ = OR ( new_n4498_, new_n5049_ ) -new_n5141_ = OR ( new_n4501_, new_n5051_ ) -new_n5142_ = NAND ( new_n5141_, new_n5140_, new_n5139_, new_n5138_ ) -new_n5143_ = OR ( new_n4505_, new_n5054_ ) -new_n5144_ = OR ( new_n4508_, new_n5056_ ) -new_n5145_ = OR ( new_n4512_, new_n5058_ ) -new_n5146_ = OR ( new_n4515_, new_n5060_ ) -new_n5147_ = NAND ( new_n5146_, new_n5145_, new_n5144_, new_n5143_ ) -new_n5148_ = NOR ( new_n5147_, new_n5142_ ) -new_n5149_ = NAND ( new_n5148_, new_n5137_ ) -new_n5150_ = NOR ( new_n5149_, new_n4610_ ) -new_n5151_ = OR ( new_n4457_, new_n5076_ ) -new_n5152_ = OR ( new_n4461_, new_n5078_ ) -new_n5153_ = OR ( new_n4467_, new_n5080_ ) -new_n5154_ = OR ( new_n4471_, new_n5082_ ) -new_n5155_ = NAND ( new_n5154_, new_n5153_, new_n5152_, new_n5151_ ) -new_n5156_ = OR ( new_n4477_, new_n5085_ ) -new_n5157_ = OR ( new_n4481_, new_n5087_ ) -new_n5158_ = OR ( new_n4484_, new_n5089_ ) -new_n5159_ = OR ( new_n4487_, new_n5091_ ) -new_n5160_ = NAND ( new_n5159_, new_n5158_, new_n5157_, new_n5156_ ) -new_n5161_ = OR ( new_n4492_, new_n5094_ ) -new_n5162_ = OR ( new_n4495_, new_n5096_ ) -new_n5163_ = OR ( new_n4498_, new_n5098_ ) -new_n5164_ = OR ( new_n4501_, new_n5100_ ) -new_n5165_ = NAND ( new_n5164_, new_n5163_, new_n5162_, new_n5161_ ) -new_n5166_ = OR ( new_n4505_, new_n5103_ ) -new_n5167_ = OR ( new_n4508_, new_n5105_ ) -new_n5168_ = OR ( new_n4512_, new_n5107_ ) -new_n5169_ = OR ( new_n4515_, new_n5109_ ) -new_n5170_ = NAND ( new_n5169_, new_n5168_, new_n5167_, new_n5166_ ) -new_n5171_ = NOR ( new_n5170_, new_n5165_, new_n5160_, new_n5155_ ) -new_n5172_ = NOT ( new_n5171_ ) -new_n5173_ = AND ( new_n5172_, new_n5150_, new_n4558_ ) -new_n5174_ = NOR ( new_n4668_, new_n4519_ ) -new_n5175_ = NAND ( new_n5174_, new_n5173_, new_n5126_ ) -new_n5176_ = NOR ( new_n5175_, new_n4719_ ) -new_n5177_ = XOR ( NET_1039, NET_1038 ) -new_n5178_ = NOT ( new_n5177_ ) -new_n5179_ = NOR ( new_n5178_, NET_1040 ) -new_n5180_ = NAND ( new_n5179_, new_n5176_, NET_1076 ) -new_n5181_ = NOT ( new_n4877_ ) -new_n5182_ = OR ( new_n5171_, new_n4518_ ) -new_n5183_ = NOR ( new_n5182_, new_n5126_ ) -new_n5184_ = NOT ( new_n5183_ ) -new_n5185_ = NOT ( new_n4668_ ) -new_n5186_ = OR ( new_n5149_, new_n4718_ ) -new_n5187_ = OR ( new_n5186_, new_n5185_ ) -new_n5188_ = NOR ( new_n5187_, new_n5184_, new_n5181_ ) -new_n5189_ = NAND ( new_n5188_, new_n5177_, NET_1076 ) -new_n5190_ = OR ( new_n5189_, NET_1040 ) -new_n5191_ = NAND ( new_n5190_, new_n5180_ ) -new_n5192_ = NOR ( NET_1075, new_n4561_ ) -new_n5193_ = NAND ( new_n5192_, new_n5191_, new_n5125_ ) -new_n5194_ = OR ( new_n4569_, new_n4578_ ) -new_n5195_ = NAND ( new_n5194_, new_n5193_ ) -NET_10704 = NOR ( new_n5195_, new_n4453_ ) -new_n5197_ = NOT ( NET_396 ) -new_n5198_ = NAND ( new_n3706_, new_n3082_ ) -new_n5199_ = OR ( new_n5198_, new_n5197_ ) -new_n5200_ = NOR ( new_n3707_, new_n3082_ ) -new_n5201_ = NAND ( new_n5200_, NET_444 ) -new_n5202_ = NAND ( new_n3707_, NET_412 ) -NET_11342 = NAND ( new_n5202_, new_n5201_, new_n5199_ ) -new_n5204_ = NOT ( NET_395 ) -new_n5205_ = OR ( new_n5198_, new_n5204_ ) -new_n5206_ = NAND ( new_n5200_, NET_445 ) -new_n5207_ = NAND ( new_n3707_, NET_413 ) -NET_11343 = NAND ( new_n5207_, new_n5206_, new_n5205_ ) -new_n5209_ = NOT ( NET_394 ) -new_n5210_ = OR ( new_n5198_, new_n5209_ ) -new_n5211_ = NAND ( new_n5200_, NET_446 ) -new_n5212_ = NAND ( new_n3707_, NET_414 ) -NET_11344 = NAND ( new_n5212_, new_n5211_, new_n5210_ ) -new_n5214_ = NOT ( NET_393 ) -new_n5215_ = OR ( new_n5198_, new_n5214_ ) -new_n5216_ = NAND ( new_n5200_, NET_447 ) -new_n5217_ = NAND ( new_n3707_, NET_415 ) -NET_11345 = NAND ( new_n5217_, new_n5216_, new_n5215_ ) -new_n5219_ = NOT ( NET_392 ) -new_n5220_ = OR ( new_n5198_, new_n5219_ ) -new_n5221_ = NAND ( new_n5200_, NET_448 ) -new_n5222_ = NAND ( new_n3707_, NET_416 ) -NET_11346 = NAND ( new_n5222_, new_n5221_, new_n5220_ ) -new_n5224_ = NOT ( NET_391 ) -new_n5225_ = OR ( new_n5198_, new_n5224_ ) -new_n5226_ = NAND ( new_n5200_, NET_449 ) -new_n5227_ = NAND ( new_n3707_, NET_417 ) -NET_11347 = NAND ( new_n5227_, new_n5226_, new_n5225_ ) -new_n5229_ = NOT ( NET_390 ) -new_n5230_ = OR ( new_n5198_, new_n5229_ ) -new_n5231_ = NAND ( new_n5200_, NET_450 ) -new_n5232_ = NAND ( new_n3707_, NET_418 ) -NET_11348 = NAND ( new_n5232_, new_n5231_, new_n5230_ ) -new_n5234_ = NOT ( NET_389 ) -new_n5235_ = OR ( new_n5198_, new_n5234_ ) -new_n5236_ = NAND ( new_n5200_, NET_451 ) -new_n5237_ = NAND ( new_n3707_, NET_419 ) -NET_11349 = NAND ( new_n5237_, new_n5236_, new_n5235_ ) -new_n5239_ = NOT ( NET_388 ) -new_n5240_ = OR ( new_n5198_, new_n5239_ ) -new_n5241_ = NAND ( new_n5200_, NET_452 ) -new_n5242_ = NAND ( new_n3707_, NET_420 ) -NET_11350 = NAND ( new_n5242_, new_n5241_, new_n5240_ ) -new_n5244_ = NOT ( NET_387 ) -new_n5245_ = OR ( new_n5198_, new_n5244_ ) -new_n5246_ = NAND ( new_n5200_, NET_453 ) -new_n5247_ = NAND ( new_n3707_, NET_421 ) -NET_11351 = NAND ( new_n5247_, new_n5246_, new_n5245_ ) -new_n5249_ = NOT ( NET_386 ) -new_n5250_ = OR ( new_n5198_, new_n5249_ ) -new_n5251_ = NAND ( new_n5200_, NET_454 ) -new_n5252_ = NAND ( new_n3707_, NET_422 ) -NET_11352 = NAND ( new_n5252_, new_n5251_, new_n5250_ ) -new_n5254_ = NOT ( NET_385 ) -new_n5255_ = OR ( new_n5198_, new_n5254_ ) -new_n5256_ = NAND ( new_n5200_, NET_455 ) -new_n5257_ = NAND ( new_n3707_, NET_423 ) -NET_11353 = NAND ( new_n5257_, new_n5256_, new_n5255_ ) -new_n5259_ = NOT ( NET_384 ) -new_n5260_ = OR ( new_n5198_, new_n5259_ ) -new_n5261_ = NAND ( new_n5200_, NET_456 ) -new_n5262_ = NAND ( new_n3707_, NET_424 ) -NET_11354 = NAND ( new_n5262_, new_n5261_, new_n5260_ ) -new_n5264_ = NOT ( NET_383 ) -new_n5265_ = OR ( new_n5198_, new_n5264_ ) -new_n5266_ = NAND ( new_n5200_, NET_457 ) -new_n5267_ = NAND ( new_n3707_, NET_425 ) -NET_11355 = NAND ( new_n5267_, new_n5266_, new_n5265_ ) -new_n5269_ = NOT ( NET_382 ) -new_n5270_ = OR ( new_n5198_, new_n5269_ ) -new_n5271_ = NAND ( new_n5200_, NET_458 ) -new_n5272_ = NAND ( new_n3707_, NET_426 ) -NET_11356 = NAND ( new_n5272_, new_n5271_, new_n5270_ ) -new_n5274_ = NOT ( NET_381 ) -new_n5275_ = OR ( new_n5198_, new_n5274_ ) -new_n5276_ = NAND ( new_n5200_, NET_459 ) -new_n5277_ = NAND ( new_n3707_, NET_427 ) -NET_11357 = NAND ( new_n5277_, new_n5276_, new_n5275_ ) -new_n5279_ = NOT ( NET_845 ) -new_n5280_ = NAND ( new_n4451_, new_n3827_ ) -new_n5281_ = OR ( new_n5280_, new_n5279_ ) -new_n5282_ = NOT ( NET_893 ) -new_n5283_ = NAND ( new_n4451_, NET_627 ) -new_n5284_ = OR ( new_n5283_, new_n5282_ ) -new_n5285_ = NOT ( NET_861 ) -new_n5286_ = OR ( new_n4451_, new_n5285_ ) -NET_11635 = NAND ( new_n5286_, new_n5284_, new_n5281_ ) -new_n5288_ = NOT ( NET_844 ) -new_n5289_ = OR ( new_n5280_, new_n5288_ ) -new_n5290_ = NOT ( NET_894 ) -new_n5291_ = OR ( new_n5283_, new_n5290_ ) -new_n5292_ = NOT ( NET_862 ) -new_n5293_ = OR ( new_n4451_, new_n5292_ ) -NET_11636 = NAND ( new_n5293_, new_n5291_, new_n5289_ ) -new_n5295_ = NOT ( NET_843 ) -new_n5296_ = OR ( new_n5280_, new_n5295_ ) -new_n5297_ = NOT ( NET_895 ) -new_n5298_ = OR ( new_n5283_, new_n5297_ ) -new_n5299_ = NOT ( NET_863 ) -new_n5300_ = OR ( new_n4451_, new_n5299_ ) -NET_11637 = NAND ( new_n5300_, new_n5298_, new_n5296_ ) -new_n5302_ = NOT ( NET_842 ) -new_n5303_ = OR ( new_n5280_, new_n5302_ ) -new_n5304_ = NOT ( NET_896 ) -new_n5305_ = OR ( new_n5283_, new_n5304_ ) -new_n5306_ = NOT ( NET_864 ) -new_n5307_ = OR ( new_n4451_, new_n5306_ ) -NET_11638 = NAND ( new_n5307_, new_n5305_, new_n5303_ ) -new_n5309_ = NOT ( NET_841 ) -new_n5310_ = OR ( new_n5280_, new_n5309_ ) -new_n5311_ = NOT ( NET_897 ) -new_n5312_ = OR ( new_n5283_, new_n5311_ ) -new_n5313_ = NOT ( NET_865 ) -new_n5314_ = OR ( new_n4451_, new_n5313_ ) -NET_11639 = NAND ( new_n5314_, new_n5312_, new_n5310_ ) -new_n5316_ = NOT ( NET_840 ) -new_n5317_ = OR ( new_n5280_, new_n5316_ ) -new_n5318_ = NOT ( NET_898 ) -new_n5319_ = OR ( new_n5283_, new_n5318_ ) -new_n5320_ = NOT ( NET_866 ) -new_n5321_ = OR ( new_n4451_, new_n5320_ ) -NET_11640 = NAND ( new_n5321_, new_n5319_, new_n5317_ ) -new_n5323_ = NOT ( NET_839 ) -new_n5324_ = OR ( new_n5280_, new_n5323_ ) -new_n5325_ = NOT ( NET_899 ) -new_n5326_ = OR ( new_n5283_, new_n5325_ ) -new_n5327_ = NOT ( NET_867 ) -new_n5328_ = OR ( new_n4451_, new_n5327_ ) -NET_11641 = NAND ( new_n5328_, new_n5326_, new_n5324_ ) -new_n5330_ = NOT ( NET_838 ) -new_n5331_ = OR ( new_n5280_, new_n5330_ ) -new_n5332_ = NOT ( NET_900 ) -new_n5333_ = OR ( new_n5283_, new_n5332_ ) -new_n5334_ = NOT ( NET_868 ) -new_n5335_ = OR ( new_n4451_, new_n5334_ ) -NET_11642 = NAND ( new_n5335_, new_n5333_, new_n5331_ ) -new_n5337_ = NOT ( NET_837 ) -new_n5338_ = OR ( new_n5280_, new_n5337_ ) -new_n5339_ = NOT ( NET_901 ) -new_n5340_ = OR ( new_n5283_, new_n5339_ ) -new_n5341_ = NOT ( NET_869 ) -new_n5342_ = OR ( new_n4451_, new_n5341_ ) -NET_11643 = NAND ( new_n5342_, new_n5340_, new_n5338_ ) -new_n5344_ = NOT ( NET_836 ) -new_n5345_ = OR ( new_n5280_, new_n5344_ ) -new_n5346_ = NOT ( NET_902 ) -new_n5347_ = OR ( new_n5283_, new_n5346_ ) -new_n5348_ = NOT ( NET_870 ) -new_n5349_ = OR ( new_n4451_, new_n5348_ ) -NET_11644 = NAND ( new_n5349_, new_n5347_, new_n5345_ ) -new_n5351_ = NOT ( NET_835 ) -new_n5352_ = OR ( new_n5280_, new_n5351_ ) -new_n5353_ = NOT ( NET_903 ) -new_n5354_ = OR ( new_n5283_, new_n5353_ ) -new_n5355_ = NOT ( NET_871 ) -new_n5356_ = OR ( new_n4451_, new_n5355_ ) -NET_11645 = NAND ( new_n5356_, new_n5354_, new_n5352_ ) -new_n5358_ = NOT ( NET_834 ) -new_n5359_ = OR ( new_n5280_, new_n5358_ ) -new_n5360_ = NOT ( NET_904 ) -new_n5361_ = OR ( new_n5283_, new_n5360_ ) -new_n5362_ = NOT ( NET_872 ) -new_n5363_ = OR ( new_n4451_, new_n5362_ ) -NET_11646 = NAND ( new_n5363_, new_n5361_, new_n5359_ ) -new_n5365_ = NOT ( NET_833 ) -new_n5366_ = OR ( new_n5280_, new_n5365_ ) -new_n5367_ = NOT ( NET_905 ) -new_n5368_ = OR ( new_n5283_, new_n5367_ ) -new_n5369_ = NOT ( NET_873 ) -new_n5370_ = OR ( new_n4451_, new_n5369_ ) -NET_11647 = NAND ( new_n5370_, new_n5368_, new_n5366_ ) -new_n5372_ = NOT ( NET_832 ) -new_n5373_ = OR ( new_n5280_, new_n5372_ ) -new_n5374_ = NOT ( NET_906 ) -new_n5375_ = OR ( new_n5283_, new_n5374_ ) -new_n5376_ = NOT ( NET_874 ) -new_n5377_ = OR ( new_n4451_, new_n5376_ ) -NET_11648 = NAND ( new_n5377_, new_n5375_, new_n5373_ ) -new_n5379_ = NOT ( NET_831 ) -new_n5380_ = OR ( new_n5280_, new_n5379_ ) -new_n5381_ = NOT ( NET_907 ) -new_n5382_ = OR ( new_n5283_, new_n5381_ ) -new_n5383_ = NOT ( NET_875 ) -new_n5384_ = OR ( new_n4451_, new_n5383_ ) -NET_11649 = NAND ( new_n5384_, new_n5382_, new_n5380_ ) -new_n5386_ = NOT ( NET_830 ) -new_n5387_ = OR ( new_n5280_, new_n5386_ ) -new_n5388_ = NOT ( NET_908 ) -new_n5389_ = OR ( new_n5283_, new_n5388_ ) -new_n5390_ = NOT ( NET_876 ) -new_n5391_ = OR ( new_n4451_, new_n5390_ ) -NET_11650 = NAND ( new_n5391_, new_n5389_, new_n5387_ ) -new_n5393_ = NOT ( NET_1294 ) -new_n5394_ = NAND ( new_n5195_, new_n4571_ ) -new_n5395_ = OR ( new_n5394_, new_n5393_ ) -new_n5396_ = NOT ( NET_1342 ) -new_n5397_ = NAND ( new_n5195_, NET_1076 ) -new_n5398_ = OR ( new_n5397_, new_n5396_ ) -new_n5399_ = NOT ( NET_1310 ) -new_n5400_ = OR ( new_n5195_, new_n5399_ ) -NET_11926 = NAND ( new_n5400_, new_n5398_, new_n5395_ ) -new_n5402_ = NOT ( NET_1293 ) -new_n5403_ = OR ( new_n5394_, new_n5402_ ) -new_n5404_ = NOT ( NET_1343 ) -new_n5405_ = OR ( new_n5397_, new_n5404_ ) -new_n5406_ = NOT ( NET_1311 ) -new_n5407_ = OR ( new_n5195_, new_n5406_ ) -NET_11927 = NAND ( new_n5407_, new_n5405_, new_n5403_ ) -new_n5409_ = NOT ( NET_1292 ) -new_n5410_ = OR ( new_n5394_, new_n5409_ ) -new_n5411_ = NOT ( NET_1344 ) -new_n5412_ = OR ( new_n5397_, new_n5411_ ) -new_n5413_ = NOT ( NET_1312 ) -new_n5414_ = OR ( new_n5195_, new_n5413_ ) -NET_11928 = NAND ( new_n5414_, new_n5412_, new_n5410_ ) -new_n5416_ = NOT ( NET_1291 ) -new_n5417_ = OR ( new_n5394_, new_n5416_ ) -new_n5418_ = NOT ( NET_1345 ) -new_n5419_ = OR ( new_n5397_, new_n5418_ ) -new_n5420_ = NOT ( NET_1313 ) -new_n5421_ = OR ( new_n5195_, new_n5420_ ) -NET_11929 = NAND ( new_n5421_, new_n5419_, new_n5417_ ) -new_n5423_ = NOT ( NET_1290 ) -new_n5424_ = OR ( new_n5394_, new_n5423_ ) -new_n5425_ = NOT ( NET_1346 ) -new_n5426_ = OR ( new_n5397_, new_n5425_ ) -new_n5427_ = NOT ( NET_1314 ) -new_n5428_ = OR ( new_n5195_, new_n5427_ ) -NET_11930 = NAND ( new_n5428_, new_n5426_, new_n5424_ ) -new_n5430_ = NOT ( NET_1289 ) -new_n5431_ = OR ( new_n5394_, new_n5430_ ) -new_n5432_ = NOT ( NET_1347 ) -new_n5433_ = OR ( new_n5397_, new_n5432_ ) -new_n5434_ = NOT ( NET_1315 ) -new_n5435_ = OR ( new_n5195_, new_n5434_ ) -NET_11931 = NAND ( new_n5435_, new_n5433_, new_n5431_ ) -new_n5437_ = NOT ( NET_1288 ) -new_n5438_ = OR ( new_n5394_, new_n5437_ ) -new_n5439_ = NOT ( NET_1348 ) -new_n5440_ = OR ( new_n5397_, new_n5439_ ) -new_n5441_ = NOT ( NET_1316 ) -new_n5442_ = OR ( new_n5195_, new_n5441_ ) -NET_11932 = NAND ( new_n5442_, new_n5440_, new_n5438_ ) -new_n5444_ = NOT ( NET_1287 ) -new_n5445_ = OR ( new_n5394_, new_n5444_ ) -new_n5446_ = NOT ( NET_1349 ) -new_n5447_ = OR ( new_n5397_, new_n5446_ ) -new_n5448_ = NOT ( NET_1317 ) -new_n5449_ = OR ( new_n5195_, new_n5448_ ) -NET_11933 = NAND ( new_n5449_, new_n5447_, new_n5445_ ) -new_n5451_ = NOT ( NET_1286 ) -new_n5452_ = OR ( new_n5394_, new_n5451_ ) -new_n5453_ = NOT ( NET_1350 ) -new_n5454_ = OR ( new_n5397_, new_n5453_ ) -new_n5455_ = NOT ( NET_1318 ) -new_n5456_ = OR ( new_n5195_, new_n5455_ ) -NET_11934 = NAND ( new_n5456_, new_n5454_, new_n5452_ ) -new_n5458_ = NOT ( NET_1285 ) -new_n5459_ = OR ( new_n5394_, new_n5458_ ) -new_n5460_ = NOT ( NET_1351 ) -new_n5461_ = OR ( new_n5397_, new_n5460_ ) -new_n5462_ = NOT ( NET_1319 ) -new_n5463_ = OR ( new_n5195_, new_n5462_ ) -NET_11935 = NAND ( new_n5463_, new_n5461_, new_n5459_ ) -new_n5465_ = NOT ( NET_1284 ) -new_n5466_ = OR ( new_n5394_, new_n5465_ ) -new_n5467_ = NOT ( NET_1352 ) -new_n5468_ = OR ( new_n5397_, new_n5467_ ) -new_n5469_ = NOT ( NET_1320 ) -new_n5470_ = OR ( new_n5195_, new_n5469_ ) -NET_11936 = NAND ( new_n5470_, new_n5468_, new_n5466_ ) -new_n5472_ = NOT ( NET_1283 ) -new_n5473_ = OR ( new_n5394_, new_n5472_ ) -new_n5474_ = NOT ( NET_1353 ) -new_n5475_ = OR ( new_n5397_, new_n5474_ ) -new_n5476_ = NOT ( NET_1321 ) -new_n5477_ = OR ( new_n5195_, new_n5476_ ) -NET_11937 = NAND ( new_n5477_, new_n5475_, new_n5473_ ) -new_n5479_ = NOT ( NET_1282 ) -new_n5480_ = OR ( new_n5394_, new_n5479_ ) -new_n5481_ = NOT ( NET_1354 ) -new_n5482_ = OR ( new_n5397_, new_n5481_ ) -new_n5483_ = NOT ( NET_1322 ) -new_n5484_ = OR ( new_n5195_, new_n5483_ ) -NET_11938 = NAND ( new_n5484_, new_n5482_, new_n5480_ ) -new_n5486_ = NOT ( NET_1281 ) -new_n5487_ = OR ( new_n5394_, new_n5486_ ) -new_n5488_ = NOT ( NET_1355 ) -new_n5489_ = OR ( new_n5397_, new_n5488_ ) -new_n5490_ = NOT ( NET_1323 ) -new_n5491_ = OR ( new_n5195_, new_n5490_ ) -NET_11939 = NAND ( new_n5491_, new_n5489_, new_n5487_ ) -new_n5493_ = NOT ( NET_1280 ) -new_n5494_ = OR ( new_n5394_, new_n5493_ ) -new_n5495_ = NOT ( NET_1356 ) -new_n5496_ = OR ( new_n5397_, new_n5495_ ) -new_n5497_ = NOT ( NET_1324 ) -new_n5498_ = OR ( new_n5195_, new_n5497_ ) -NET_11940 = NAND ( new_n5498_, new_n5496_, new_n5494_ ) -new_n5500_ = NOT ( NET_1279 ) -new_n5501_ = OR ( new_n5394_, new_n5500_ ) -new_n5502_ = NOT ( NET_1357 ) -new_n5503_ = OR ( new_n5397_, new_n5502_ ) -new_n5504_ = NOT ( NET_1325 ) -new_n5505_ = OR ( new_n5195_, new_n5504_ ) -NET_11941 = NAND ( new_n5505_, new_n5503_, new_n5501_ ) -new_n5507_ = NOT ( NET_85 ) -new_n5508_ = NOT ( new_n3636_ ) -new_n5509_ = NOT ( new_n3703_ ) -new_n5510_ = NOR ( new_n5509_, new_n3082_ ) -new_n5511_ = NAND ( new_n5510_, new_n3699_ ) -new_n5512_ = OR ( new_n5511_, new_n5508_ ) -new_n5513_ = NAND ( NET_37, NET_104 ) -new_n5514_ = NOT ( new_n5513_ ) -new_n5515_ = NOT ( new_n3346_ ) -new_n5516_ = NOR ( new_n3150_, new_n3121_ ) -new_n5517_ = NAND ( new_n5516_, new_n3402_ ) -new_n5518_ = NAND ( new_n5517_, new_n3450_, new_n3231_ ) -new_n5519_ = OR ( new_n5516_, new_n3402_ ) -new_n5520_ = OR ( new_n3460_, new_n3150_ ) -new_n5521_ = NAND ( new_n5520_, new_n5519_, new_n5518_ ) -new_n5522_ = NAND ( new_n3460_, new_n3150_ ) -new_n5523_ = NAND ( new_n5522_, new_n5521_, new_n3534_, new_n3525_ ) -new_n5524_ = NOR ( new_n3660_, new_n3069_ ) -new_n5525_ = NOT ( new_n5524_ ) -new_n5526_ = OR ( new_n5525_, new_n3693_ ) -new_n5527_ = NOR ( new_n5526_, new_n3209_ ) -new_n5528_ = NOT ( new_n5527_ ) -new_n5529_ = NOR ( new_n5528_, new_n3082_ ) -new_n5530_ = NAND ( new_n5529_, new_n5523_, new_n5515_ ) -new_n5531_ = OR ( new_n5530_, new_n5509_ ) -new_n5532_ = OR ( new_n5531_, new_n5514_ ) -new_n5533_ = NAND ( new_n5532_, new_n5512_ ) -new_n5534_ = NAND ( new_n5533_, new_n3150_ ) -new_n5535_ = OR ( new_n5534_, new_n5507_ ) -new_n5536_ = NAND ( new_n5533_, new_n3230_, NET_459 ) -new_n5537_ = OR ( new_n5533_, new_n5274_ ) -NET_12204 = NAND ( new_n5537_, new_n5536_, new_n5535_ ) -new_n5539_ = NOT ( NET_84 ) -new_n5540_ = OR ( new_n5534_, new_n5539_ ) -new_n5541_ = NAND ( new_n5533_, new_n3230_, NET_458 ) -new_n5542_ = OR ( new_n5533_, new_n5269_ ) -NET_12205 = NAND ( new_n5542_, new_n5541_, new_n5540_ ) -new_n5544_ = NOT ( NET_83 ) -new_n5545_ = OR ( new_n5534_, new_n5544_ ) -new_n5546_ = NAND ( new_n5533_, new_n3230_, NET_457 ) -new_n5547_ = OR ( new_n5533_, new_n5264_ ) -NET_12206 = NAND ( new_n5547_, new_n5546_, new_n5545_ ) -new_n5549_ = NOT ( NET_82 ) -new_n5550_ = OR ( new_n5534_, new_n5549_ ) -new_n5551_ = NAND ( new_n5533_, new_n3230_, NET_456 ) -new_n5552_ = OR ( new_n5533_, new_n5259_ ) -NET_12207 = NAND ( new_n5552_, new_n5551_, new_n5550_ ) -new_n5554_ = NOT ( NET_81 ) -new_n5555_ = OR ( new_n5534_, new_n5554_ ) -new_n5556_ = NAND ( new_n5533_, new_n3230_, NET_455 ) -new_n5557_ = OR ( new_n5533_, new_n5254_ ) -NET_12208 = NAND ( new_n5557_, new_n5556_, new_n5555_ ) -new_n5559_ = NOT ( NET_80 ) -new_n5560_ = OR ( new_n5534_, new_n5559_ ) -new_n5561_ = NAND ( new_n5533_, new_n3230_, NET_454 ) -new_n5562_ = OR ( new_n5533_, new_n5249_ ) -NET_12209 = NAND ( new_n5562_, new_n5561_, new_n5560_ ) -new_n5564_ = NOT ( NET_79 ) -new_n5565_ = OR ( new_n5534_, new_n5564_ ) -new_n5566_ = NAND ( new_n5533_, new_n3230_, NET_453 ) -new_n5567_ = OR ( new_n5533_, new_n5244_ ) -NET_12210 = NAND ( new_n5567_, new_n5566_, new_n5565_ ) -new_n5569_ = NOT ( NET_78 ) -new_n5570_ = OR ( new_n5534_, new_n5569_ ) -new_n5571_ = NAND ( new_n5533_, new_n3230_, NET_452 ) -new_n5572_ = OR ( new_n5533_, new_n5239_ ) -NET_12211 = NAND ( new_n5572_, new_n5571_, new_n5570_ ) -new_n5574_ = NOT ( NET_77 ) -new_n5575_ = OR ( new_n5534_, new_n5574_ ) -new_n5576_ = OR ( new_n5533_, new_n5234_ ) -new_n5577_ = NAND ( new_n5533_, new_n3230_, NET_451 ) -NET_12212 = NAND ( new_n5577_, new_n5576_, new_n5575_ ) -new_n5579_ = NOT ( NET_76 ) -new_n5580_ = OR ( new_n5534_, new_n5579_ ) -new_n5581_ = OR ( new_n5533_, new_n5229_ ) -new_n5582_ = NAND ( new_n5533_, new_n3230_, NET_450 ) -NET_12213 = NAND ( new_n5582_, new_n5581_, new_n5580_ ) -new_n5584_ = NOT ( NET_75 ) -new_n5585_ = OR ( new_n5534_, new_n5584_ ) -new_n5586_ = OR ( new_n5533_, new_n5224_ ) -new_n5587_ = NAND ( new_n5533_, new_n3230_, NET_449 ) -NET_12214 = NAND ( new_n5587_, new_n5586_, new_n5585_ ) -new_n5589_ = NOT ( NET_74 ) -new_n5590_ = OR ( new_n5534_, new_n5589_ ) -new_n5591_ = OR ( new_n5533_, new_n5219_ ) -new_n5592_ = NAND ( new_n5533_, new_n3230_, NET_448 ) -NET_12215 = NAND ( new_n5592_, new_n5591_, new_n5590_ ) -new_n5594_ = NOT ( NET_73 ) -new_n5595_ = OR ( new_n5534_, new_n5594_ ) -new_n5596_ = OR ( new_n5533_, new_n5214_ ) -new_n5597_ = NAND ( new_n5533_, new_n3230_, NET_447 ) -NET_12216 = NAND ( new_n5597_, new_n5596_, new_n5595_ ) -new_n5599_ = NOT ( NET_72 ) -new_n5600_ = OR ( new_n5534_, new_n5599_ ) -new_n5601_ = OR ( new_n5533_, new_n5209_ ) -new_n5602_ = NAND ( new_n5533_, new_n3230_, NET_446 ) -NET_12217 = NAND ( new_n5602_, new_n5601_, new_n5600_ ) -new_n5604_ = NOT ( NET_71 ) -new_n5605_ = OR ( new_n5534_, new_n5604_ ) -new_n5606_ = OR ( new_n5533_, new_n5204_ ) -new_n5607_ = NAND ( new_n5533_, new_n3230_, NET_445 ) -NET_12218 = NAND ( new_n5607_, new_n5606_, new_n5605_ ) -new_n5609_ = NOT ( NET_70 ) -new_n5610_ = OR ( new_n5534_, new_n5609_ ) -new_n5611_ = OR ( new_n5533_, new_n5197_ ) -new_n5612_ = NAND ( new_n5533_, new_n3230_, NET_444 ) -NET_12219 = NAND ( new_n5612_, new_n5611_, new_n5610_ ) -new_n5614_ = NOT ( NET_474 ) -new_n5615_ = NAND ( new_n5533_, new_n3230_ ) -new_n5616_ = OR ( new_n5615_, new_n5614_ ) -new_n5617_ = NOT ( NET_397 ) -new_n5618_ = OR ( new_n5533_, new_n5617_ ) -NET_12220 = NAND ( new_n5618_, new_n5616_, new_n5540_ ) -new_n5620_ = NOT ( NET_473 ) -new_n5621_ = OR ( new_n5615_, new_n5620_ ) -new_n5622_ = NOT ( NET_398 ) -new_n5623_ = OR ( new_n5533_, new_n5622_ ) -NET_12221 = NAND ( new_n5623_, new_n5621_, new_n5545_ ) -new_n5625_ = NOT ( NET_472 ) -new_n5626_ = OR ( new_n5615_, new_n5625_ ) -new_n5627_ = NOT ( NET_399 ) -new_n5628_ = OR ( new_n5533_, new_n5627_ ) -NET_12222 = NAND ( new_n5628_, new_n5626_, new_n5550_ ) -new_n5630_ = NOT ( NET_471 ) -new_n5631_ = OR ( new_n5615_, new_n5630_ ) -new_n5632_ = NOT ( NET_400 ) -new_n5633_ = OR ( new_n5533_, new_n5632_ ) -NET_12223 = NAND ( new_n5633_, new_n5631_, new_n5555_ ) -new_n5635_ = NOT ( NET_470 ) -new_n5636_ = OR ( new_n5615_, new_n5635_ ) -new_n5637_ = NOT ( NET_401 ) -new_n5638_ = OR ( new_n5533_, new_n5637_ ) -NET_12224 = NAND ( new_n5638_, new_n5636_, new_n5560_ ) -new_n5640_ = NOT ( NET_469 ) -new_n5641_ = OR ( new_n5615_, new_n5640_ ) -new_n5642_ = NOT ( NET_402 ) -new_n5643_ = OR ( new_n5533_, new_n5642_ ) -NET_12225 = NAND ( new_n5643_, new_n5641_, new_n5565_ ) -new_n5645_ = NOT ( NET_468 ) -new_n5646_ = OR ( new_n5615_, new_n5645_ ) -new_n5647_ = NOT ( NET_403 ) -new_n5648_ = OR ( new_n5533_, new_n5647_ ) -NET_12226 = NAND ( new_n5648_, new_n5646_, new_n5570_ ) -new_n5650_ = NOT ( NET_467 ) -new_n5651_ = OR ( new_n5615_, new_n5650_ ) -new_n5652_ = NOT ( NET_404 ) -new_n5653_ = OR ( new_n5533_, new_n5652_ ) -NET_12227 = NAND ( new_n5653_, new_n5651_, new_n5575_ ) -new_n5655_ = NOT ( NET_466 ) -new_n5656_ = OR ( new_n5615_, new_n5655_ ) -new_n5657_ = NOT ( NET_405 ) -new_n5658_ = OR ( new_n5533_, new_n5657_ ) -NET_12228 = NAND ( new_n5658_, new_n5656_, new_n5580_ ) -new_n5660_ = NOT ( NET_465 ) -new_n5661_ = OR ( new_n5615_, new_n5660_ ) -new_n5662_ = NOT ( NET_406 ) -new_n5663_ = OR ( new_n5533_, new_n5662_ ) -NET_12229 = NAND ( new_n5663_, new_n5661_, new_n5585_ ) -new_n5665_ = NOT ( NET_464 ) -new_n5666_ = OR ( new_n5615_, new_n5665_ ) -new_n5667_ = NOT ( NET_407 ) -new_n5668_ = OR ( new_n5533_, new_n5667_ ) -NET_12230 = NAND ( new_n5668_, new_n5666_, new_n5590_ ) -new_n5670_ = NOT ( NET_463 ) -new_n5671_ = OR ( new_n5615_, new_n5670_ ) -new_n5672_ = NOT ( NET_408 ) -new_n5673_ = OR ( new_n5533_, new_n5672_ ) -NET_12231 = NAND ( new_n5673_, new_n5671_, new_n5595_ ) -new_n5675_ = NOT ( NET_462 ) -new_n5676_ = OR ( new_n5615_, new_n5675_ ) -new_n5677_ = NOT ( NET_409 ) -new_n5678_ = OR ( new_n5533_, new_n5677_ ) -NET_12232 = NAND ( new_n5678_, new_n5676_, new_n5600_ ) -new_n5680_ = NOT ( NET_461 ) -new_n5681_ = OR ( new_n5615_, new_n5680_ ) -new_n5682_ = NOT ( NET_410 ) -new_n5683_ = OR ( new_n5533_, new_n5682_ ) -NET_12233 = NAND ( new_n5683_, new_n5681_, new_n5605_ ) -new_n5685_ = NOT ( NET_460 ) -new_n5686_ = OR ( new_n5615_, new_n5685_ ) -new_n5687_ = NOT ( NET_411 ) -new_n5688_ = OR ( new_n5533_, new_n5687_ ) -NET_12234 = NAND ( new_n5688_, new_n5686_, new_n5610_ ) -new_n5690_ = NAND ( new_n5200_, new_n3179_ ) -new_n5691_ = OR ( new_n5690_, new_n5685_ ) -new_n5692_ = NAND ( new_n3707_, NET_428 ) -new_n5693_ = OR ( new_n5198_, new_n5687_ ) -NET_12235 = NAND ( new_n5693_, new_n5692_, new_n5691_ ) -new_n5695_ = OR ( new_n5690_, new_n5680_ ) -new_n5696_ = NAND ( new_n3707_, NET_429 ) -new_n5697_ = OR ( new_n5198_, new_n5682_ ) -NET_12236 = NAND ( new_n5697_, new_n5696_, new_n5695_ ) -new_n5699_ = OR ( new_n5690_, new_n5675_ ) -new_n5700_ = NAND ( new_n3707_, NET_430 ) -new_n5701_ = OR ( new_n5198_, new_n5677_ ) -NET_12237 = NAND ( new_n5701_, new_n5700_, new_n5699_ ) -new_n5703_ = OR ( new_n5690_, new_n5670_ ) -new_n5704_ = NAND ( new_n3707_, NET_431 ) -new_n5705_ = OR ( new_n5198_, new_n5672_ ) -NET_12238 = NAND ( new_n5705_, new_n5704_, new_n5703_ ) -new_n5707_ = OR ( new_n5690_, new_n5665_ ) -new_n5708_ = NAND ( new_n3707_, NET_432 ) -new_n5709_ = OR ( new_n5198_, new_n5667_ ) -NET_12239 = NAND ( new_n5709_, new_n5708_, new_n5707_ ) -new_n5711_ = OR ( new_n5690_, new_n5660_ ) -new_n5712_ = NAND ( new_n3707_, NET_433 ) -new_n5713_ = OR ( new_n5198_, new_n5662_ ) -NET_12240 = NAND ( new_n5713_, new_n5712_, new_n5711_ ) -new_n5715_ = OR ( new_n5690_, new_n5655_ ) -new_n5716_ = NAND ( new_n3707_, NET_434 ) -new_n5717_ = OR ( new_n5198_, new_n5657_ ) -NET_12241 = NAND ( new_n5717_, new_n5716_, new_n5715_ ) -new_n5719_ = OR ( new_n5690_, new_n5650_ ) -new_n5720_ = NAND ( new_n3707_, NET_435 ) -new_n5721_ = OR ( new_n5198_, new_n5652_ ) -NET_12242 = NAND ( new_n5721_, new_n5720_, new_n5719_ ) -new_n5723_ = OR ( new_n5690_, new_n5645_ ) -new_n5724_ = NAND ( new_n3707_, NET_436 ) -new_n5725_ = OR ( new_n5198_, new_n5647_ ) -NET_12243 = NAND ( new_n5725_, new_n5724_, new_n5723_ ) -new_n5727_ = OR ( new_n5690_, new_n5640_ ) -new_n5728_ = NAND ( new_n3707_, NET_437 ) -new_n5729_ = OR ( new_n5198_, new_n5642_ ) -NET_12244 = NAND ( new_n5729_, new_n5728_, new_n5727_ ) -new_n5731_ = OR ( new_n5690_, new_n5635_ ) -new_n5732_ = NAND ( new_n3707_, NET_438 ) -new_n5733_ = OR ( new_n5198_, new_n5637_ ) -NET_12245 = NAND ( new_n5733_, new_n5732_, new_n5731_ ) -new_n5735_ = OR ( new_n5690_, new_n5630_ ) -new_n5736_ = NAND ( new_n3707_, NET_439 ) -new_n5737_ = OR ( new_n5198_, new_n5632_ ) -NET_12246 = NAND ( new_n5737_, new_n5736_, new_n5735_ ) -new_n5739_ = OR ( new_n5690_, new_n5625_ ) -new_n5740_ = NAND ( new_n3707_, NET_440 ) -new_n5741_ = OR ( new_n5198_, new_n5627_ ) -NET_12247 = NAND ( new_n5741_, new_n5740_, new_n5739_ ) -new_n5743_ = OR ( new_n5690_, new_n5620_ ) -new_n5744_ = NAND ( new_n3707_, NET_441 ) -new_n5745_ = OR ( new_n5198_, new_n5622_ ) -NET_12248 = NAND ( new_n5745_, new_n5744_, new_n5743_ ) -new_n5747_ = OR ( new_n5690_, new_n5614_ ) -new_n5748_ = NOT ( NET_442 ) -new_n5749_ = OR ( new_n3706_, new_n5748_ ) -new_n5750_ = OR ( new_n5198_, new_n5617_ ) -NET_12249 = NAND ( new_n5750_, new_n5749_, new_n5747_ ) -new_n5752_ = NOR ( new_n3637_, new_n3230_ ) -new_n5753_ = OR ( new_n5752_, new_n3636_ ) -new_n5754_ = NAND ( new_n5523_, new_n5515_ ) -new_n5755_ = NAND ( new_n5754_, new_n3150_ ) -new_n5756_ = NAND ( new_n5755_, new_n5524_, new_n3121_ ) -new_n5757_ = AND ( new_n5756_, new_n3208_ ) -new_n5758_ = NAND ( new_n3685_, new_n3684_ ) -new_n5759_ = NAND ( new_n5758_, new_n3637_ ) -new_n5760_ = NOR ( new_n3637_, new_n3030_ ) -new_n5761_ = NOT ( new_n5760_ ) -new_n5762_ = NAND ( new_n5761_, new_n5759_, new_n3683_ ) -new_n5763_ = NOR ( new_n3637_, new_n3179_ ) -new_n5764_ = NOR ( new_n5763_, new_n5762_, new_n5757_ ) -new_n5765_ = NAND ( new_n5764_, new_n5753_, new_n5510_ ) -new_n5766_ = NAND ( new_n5765_, NET_551 ) -new_n5767_ = NOR ( NET_177, NET_176 ) -new_n5768_ = NAND ( new_n5767_, new_n3521_ ) -new_n5769_ = OR ( new_n5768_, new_n3082_ ) -NET_12250 = NAND ( new_n5769_, new_n5766_ ) -new_n5771_ = OR ( new_n3179_, new_n3072_ ) -new_n5772_ = NOT ( new_n3686_ ) -new_n5773_ = NAND ( new_n5772_, new_n3083_, NET_176 ) -new_n5774_ = NAND ( new_n5773_, new_n5511_ ) -new_n5775_ = NAND ( new_n5774_, new_n3636_ ) -new_n5776_ = AND ( new_n5775_, new_n5531_ ) -new_n5777_ = NAND ( new_n5776_, new_n5768_ ) -new_n5778_ = NAND ( new_n5777_, new_n5771_ ) -new_n5779_ = NAND ( new_n5776_, new_n5768_, NET_554 ) -NET_12266 = NAND ( new_n5779_, new_n5778_ ) -new_n5781_ = NOT ( new_n5516_ ) -new_n5782_ = NAND ( new_n5781_, new_n3209_, NET_176 ) -new_n5783_ = NAND ( new_n5782_, new_n5777_ ) -new_n5784_ = NAND ( new_n5776_, new_n5768_, NET_553 ) -NET_12267 = NAND ( new_n5784_, new_n5783_ ) -new_n5786_ = NOT ( new_n5767_ ) -new_n5787_ = NOR ( new_n3690_, new_n3179_ ) -new_n5788_ = OR ( new_n5787_, new_n3230_ ) -new_n5789_ = NAND ( new_n3690_, NET_547 ) -new_n5790_ = NAND ( new_n5789_, new_n5788_ ) -new_n5791_ = NAND ( new_n5790_, NET_176 ) -new_n5792_ = NOR ( new_n3150_, new_n3072_ ) -new_n5793_ = NAND ( new_n5792_, new_n3696_ ) -new_n5794_ = NAND ( new_n5793_, new_n5791_ ) -new_n5795_ = NAND ( new_n5794_, new_n5513_ ) -new_n5796_ = NAND ( new_n5795_, NET_178 ) -new_n5797_ = NAND ( new_n5796_, new_n5786_ ) -new_n5798_ = OR ( new_n5514_, new_n3705_ ) -new_n5799_ = NAND ( NET_178, NET_176 ) -new_n5800_ = NAND ( new_n5799_, new_n3091_, new_n3521_ ) -new_n5801_ = NAND ( new_n5800_, new_n5798_, new_n5776_ ) -new_n5802_ = NAND ( new_n5801_, new_n5797_ ) -new_n5803_ = NOT ( NET_548 ) -new_n5804_ = OR ( new_n5801_, new_n5803_ ) -NET_12268 = NAND ( new_n5804_, new_n5802_ ) -new_n5806_ = NOT ( new_n4381_ ) -new_n5807_ = NOT ( new_n4448_ ) -new_n5808_ = NOR ( new_n5807_, new_n3827_ ) -new_n5809_ = NAND ( new_n5808_, new_n4444_ ) -new_n5810_ = OR ( new_n5809_, new_n5806_ ) -new_n5811_ = NAND ( NET_103, NET_102 ) -new_n5812_ = NOT ( new_n5811_ ) -new_n5813_ = NOT ( new_n4091_ ) -new_n5814_ = NOR ( new_n3895_, new_n3866_ ) -new_n5815_ = NAND ( new_n5814_, new_n4147_ ) -new_n5816_ = NAND ( new_n5815_, new_n4195_, new_n3976_ ) -new_n5817_ = OR ( new_n5814_, new_n4147_ ) -new_n5818_ = OR ( new_n4205_, new_n3895_ ) -new_n5819_ = NAND ( new_n5818_, new_n5817_, new_n5816_ ) -new_n5820_ = NAND ( new_n4205_, new_n3895_ ) -new_n5821_ = NAND ( new_n5820_, new_n5819_, new_n4279_, new_n4270_ ) -new_n5822_ = NOR ( new_n4405_, new_n3814_ ) -new_n5823_ = NOT ( new_n5822_ ) -new_n5824_ = OR ( new_n5823_, new_n4438_ ) -new_n5825_ = NOR ( new_n5824_, new_n3954_ ) -new_n5826_ = NOT ( new_n5825_ ) -new_n5827_ = NOR ( new_n5826_, new_n3827_ ) -new_n5828_ = NAND ( new_n5827_, new_n5821_, new_n5813_ ) -new_n5829_ = OR ( new_n5828_, new_n5807_ ) -new_n5830_ = OR ( new_n5829_, new_n5812_ ) -new_n5831_ = NAND ( new_n5830_, new_n5810_ ) -new_n5832_ = AND ( new_n5831_, new_n3895_ ) -new_n5833_ = NOT ( NET_559 ) -new_n5834_ = NOT ( NET_574 ) -new_n5835_ = NOT ( NET_575 ) -new_n5836_ = NOR ( NET_581, NET_580, NET_579, NET_578 ) -new_n5837_ = NOR ( NET_577, NET_576 ) -new_n5838_ = NAND ( new_n5837_, new_n5836_, new_n5835_, new_n5834_ ) -new_n5839_ = NOT ( NET_586 ) -new_n5840_ = NOT ( NET_587 ) -new_n5841_ = NOT ( NET_588 ) -new_n5842_ = NOR ( NET_585, NET_584, NET_583, NET_582 ) -new_n5843_ = NAND ( new_n5842_, new_n5841_, new_n5840_, new_n5839_ ) -new_n5844_ = NOT ( NET_562 ) -new_n5845_ = NOT ( NET_563 ) -new_n5846_ = NOT ( NET_564 ) -new_n5847_ = NOT ( NET_565 ) -new_n5848_ = NAND ( new_n5847_, new_n5846_, new_n5845_, new_n5844_ ) -new_n5849_ = OR ( new_n5848_, NET_561, NET_560 ) -new_n5850_ = NOT ( NET_566 ) -new_n5851_ = NOT ( NET_567 ) -new_n5852_ = NOR ( NET_573, NET_572, NET_571, NET_570 ) -new_n5853_ = NOR ( NET_569, NET_568 ) -new_n5854_ = NAND ( new_n5853_, new_n5852_, new_n5851_, new_n5850_ ) -new_n5855_ = NOR ( new_n5854_, new_n5849_, new_n5843_, new_n5838_ ) -new_n5856_ = NOR ( new_n5855_, new_n5833_ ) -new_n5857_ = OR ( new_n5856_, new_n5507_ ) -new_n5858_ = NAND ( new_n5856_, NET_53 ) -new_n5859_ = NAND ( new_n5858_, new_n5857_ ) -new_n5860_ = NAND ( new_n5859_, new_n5832_ ) -new_n5861_ = NAND ( new_n5831_, new_n3975_ ) -new_n5862_ = OR ( new_n5861_, new_n5388_ ) -new_n5863_ = OR ( new_n5831_, new_n5386_ ) -NET_12381 = NAND ( new_n5863_, new_n5862_, new_n5860_ ) -new_n5865_ = OR ( new_n5856_, new_n5539_ ) -new_n5866_ = NAND ( new_n5856_, NET_52 ) -new_n5867_ = NAND ( new_n5866_, new_n5865_ ) -new_n5868_ = NAND ( new_n5867_, new_n5832_ ) -new_n5869_ = OR ( new_n5861_, new_n5381_ ) -new_n5870_ = OR ( new_n5831_, new_n5379_ ) -NET_12382 = NAND ( new_n5870_, new_n5869_, new_n5868_ ) -new_n5872_ = OR ( new_n5856_, new_n5544_ ) -new_n5873_ = NAND ( new_n5856_, NET_51 ) -new_n5874_ = NAND ( new_n5873_, new_n5872_ ) -new_n5875_ = NAND ( new_n5874_, new_n5832_ ) -new_n5876_ = OR ( new_n5861_, new_n5374_ ) -new_n5877_ = OR ( new_n5831_, new_n5372_ ) -NET_12383 = NAND ( new_n5877_, new_n5876_, new_n5875_ ) -new_n5879_ = OR ( new_n5856_, new_n5549_ ) -new_n5880_ = NAND ( new_n5856_, NET_50 ) -new_n5881_ = NAND ( new_n5880_, new_n5879_ ) -new_n5882_ = NAND ( new_n5881_, new_n5832_ ) -new_n5883_ = OR ( new_n5861_, new_n5367_ ) -new_n5884_ = OR ( new_n5831_, new_n5365_ ) -NET_12384 = NAND ( new_n5884_, new_n5883_, new_n5882_ ) -new_n5886_ = OR ( new_n5856_, new_n5554_ ) -new_n5887_ = NAND ( new_n5856_, NET_49 ) -new_n5888_ = NAND ( new_n5887_, new_n5886_ ) -new_n5889_ = NAND ( new_n5888_, new_n5832_ ) -new_n5890_ = OR ( new_n5861_, new_n5360_ ) -new_n5891_ = OR ( new_n5831_, new_n5358_ ) -NET_12385 = NAND ( new_n5891_, new_n5890_, new_n5889_ ) -new_n5893_ = OR ( new_n5856_, new_n5559_ ) -new_n5894_ = NAND ( new_n5856_, NET_48 ) -new_n5895_ = NAND ( new_n5894_, new_n5893_ ) -new_n5896_ = NAND ( new_n5895_, new_n5832_ ) -new_n5897_ = OR ( new_n5861_, new_n5353_ ) -new_n5898_ = OR ( new_n5831_, new_n5351_ ) -NET_12386 = NAND ( new_n5898_, new_n5897_, new_n5896_ ) -new_n5900_ = OR ( new_n5856_, new_n5564_ ) -new_n5901_ = NAND ( new_n5856_, NET_47 ) -new_n5902_ = NAND ( new_n5901_, new_n5900_ ) -new_n5903_ = NAND ( new_n5902_, new_n5832_ ) -new_n5904_ = OR ( new_n5861_, new_n5346_ ) -new_n5905_ = OR ( new_n5831_, new_n5344_ ) -NET_12387 = NAND ( new_n5905_, new_n5904_, new_n5903_ ) -new_n5907_ = OR ( new_n5856_, new_n5569_ ) -new_n5908_ = NAND ( new_n5856_, NET_46 ) -new_n5909_ = NAND ( new_n5908_, new_n5907_ ) -new_n5910_ = NAND ( new_n5909_, new_n5832_ ) -new_n5911_ = OR ( new_n5861_, new_n5339_ ) -new_n5912_ = OR ( new_n5831_, new_n5337_ ) -NET_12388 = NAND ( new_n5912_, new_n5911_, new_n5910_ ) -new_n5914_ = OR ( new_n5856_, new_n5574_ ) -new_n5915_ = NAND ( new_n5856_, NET_45 ) -new_n5916_ = NAND ( new_n5915_, new_n5914_ ) -new_n5917_ = NAND ( new_n5916_, new_n5832_ ) -new_n5918_ = OR ( new_n5831_, new_n5330_ ) -new_n5919_ = OR ( new_n5861_, new_n5332_ ) -NET_12389 = NAND ( new_n5919_, new_n5918_, new_n5917_ ) -new_n5921_ = OR ( new_n5856_, new_n5579_ ) -new_n5922_ = NAND ( new_n5856_, NET_44 ) -new_n5923_ = NAND ( new_n5922_, new_n5921_ ) -new_n5924_ = NAND ( new_n5923_, new_n5832_ ) -new_n5925_ = OR ( new_n5831_, new_n5323_ ) -new_n5926_ = OR ( new_n5861_, new_n5325_ ) -NET_12390 = NAND ( new_n5926_, new_n5925_, new_n5924_ ) -new_n5928_ = OR ( new_n5856_, new_n5584_ ) -new_n5929_ = NAND ( new_n5856_, NET_43 ) -new_n5930_ = NAND ( new_n5929_, new_n5928_ ) -new_n5931_ = NAND ( new_n5930_, new_n5832_ ) -new_n5932_ = OR ( new_n5831_, new_n5316_ ) -new_n5933_ = OR ( new_n5861_, new_n5318_ ) -NET_12391 = NAND ( new_n5933_, new_n5932_, new_n5931_ ) -new_n5935_ = OR ( new_n5856_, new_n5589_ ) -new_n5936_ = NAND ( new_n5856_, NET_42 ) -new_n5937_ = NAND ( new_n5936_, new_n5935_ ) -new_n5938_ = NAND ( new_n5937_, new_n5832_ ) -new_n5939_ = OR ( new_n5831_, new_n5309_ ) -new_n5940_ = OR ( new_n5861_, new_n5311_ ) -NET_12392 = NAND ( new_n5940_, new_n5939_, new_n5938_ ) -new_n5942_ = OR ( new_n5856_, new_n5594_ ) -new_n5943_ = NAND ( new_n5856_, NET_41 ) -new_n5944_ = NAND ( new_n5943_, new_n5942_ ) -new_n5945_ = NAND ( new_n5944_, new_n5832_ ) -new_n5946_ = OR ( new_n5831_, new_n5302_ ) -new_n5947_ = OR ( new_n5861_, new_n5304_ ) -NET_12393 = NAND ( new_n5947_, new_n5946_, new_n5945_ ) -new_n5949_ = OR ( new_n5856_, new_n5599_ ) -new_n5950_ = NAND ( new_n5856_, NET_40 ) -new_n5951_ = NAND ( new_n5950_, new_n5949_ ) -new_n5952_ = NAND ( new_n5951_, new_n5832_ ) -new_n5953_ = OR ( new_n5831_, new_n5295_ ) -new_n5954_ = OR ( new_n5861_, new_n5297_ ) -NET_12394 = NAND ( new_n5954_, new_n5953_, new_n5952_ ) -new_n5956_ = OR ( new_n5856_, new_n5604_ ) -new_n5957_ = NAND ( new_n5856_, NET_39 ) -new_n5958_ = NAND ( new_n5957_, new_n5956_ ) -new_n5959_ = NAND ( new_n5958_, new_n5832_ ) -new_n5960_ = OR ( new_n5831_, new_n5288_ ) -new_n5961_ = OR ( new_n5861_, new_n5290_ ) -NET_12395 = NAND ( new_n5961_, new_n5960_, new_n5959_ ) -new_n5963_ = OR ( new_n5856_, new_n5609_ ) -new_n5964_ = NAND ( new_n5856_, NET_38 ) -new_n5965_ = NAND ( new_n5964_, new_n5963_ ) -new_n5966_ = NAND ( new_n5965_, new_n5832_ ) -new_n5967_ = OR ( new_n5831_, new_n5279_ ) -new_n5968_ = OR ( new_n5861_, new_n5282_ ) -NET_12396 = NAND ( new_n5968_, new_n5967_, new_n5966_ ) -new_n5970_ = NOT ( NET_923 ) -new_n5971_ = OR ( new_n5861_, new_n5970_ ) -new_n5972_ = NOT ( NET_846 ) -new_n5973_ = OR ( new_n5831_, new_n5972_ ) -NET_12397 = NAND ( new_n5973_, new_n5971_, new_n5868_ ) -new_n5975_ = NOT ( NET_922 ) -new_n5976_ = OR ( new_n5861_, new_n5975_ ) -new_n5977_ = NOT ( NET_847 ) -new_n5978_ = OR ( new_n5831_, new_n5977_ ) -NET_12398 = NAND ( new_n5978_, new_n5976_, new_n5875_ ) -new_n5980_ = NOT ( NET_921 ) -new_n5981_ = OR ( new_n5861_, new_n5980_ ) -new_n5982_ = NOT ( NET_848 ) -new_n5983_ = OR ( new_n5831_, new_n5982_ ) -NET_12399 = NAND ( new_n5983_, new_n5981_, new_n5882_ ) -new_n5985_ = NOT ( NET_920 ) -new_n5986_ = OR ( new_n5861_, new_n5985_ ) -new_n5987_ = NOT ( NET_849 ) -new_n5988_ = OR ( new_n5831_, new_n5987_ ) -NET_12400 = NAND ( new_n5988_, new_n5986_, new_n5889_ ) -new_n5990_ = NOT ( NET_919 ) -new_n5991_ = OR ( new_n5861_, new_n5990_ ) -new_n5992_ = NOT ( NET_850 ) -new_n5993_ = OR ( new_n5831_, new_n5992_ ) -NET_12401 = NAND ( new_n5993_, new_n5991_, new_n5896_ ) -new_n5995_ = NOT ( NET_918 ) -new_n5996_ = OR ( new_n5861_, new_n5995_ ) -new_n5997_ = NOT ( NET_851 ) -new_n5998_ = OR ( new_n5831_, new_n5997_ ) -NET_12402 = NAND ( new_n5998_, new_n5996_, new_n5903_ ) -new_n6000_ = NOT ( NET_917 ) -new_n6001_ = OR ( new_n5861_, new_n6000_ ) -new_n6002_ = NOT ( NET_852 ) -new_n6003_ = OR ( new_n5831_, new_n6002_ ) -NET_12403 = NAND ( new_n6003_, new_n6001_, new_n5910_ ) -new_n6005_ = NOT ( NET_916 ) -new_n6006_ = OR ( new_n5861_, new_n6005_ ) -new_n6007_ = NOT ( NET_853 ) -new_n6008_ = OR ( new_n5831_, new_n6007_ ) -NET_12404 = NAND ( new_n6008_, new_n6006_, new_n5917_ ) -new_n6010_ = NOT ( NET_915 ) -new_n6011_ = OR ( new_n5861_, new_n6010_ ) -new_n6012_ = NOT ( NET_854 ) -new_n6013_ = OR ( new_n5831_, new_n6012_ ) -NET_12405 = NAND ( new_n6013_, new_n6011_, new_n5924_ ) -new_n6015_ = NOT ( NET_914 ) -new_n6016_ = OR ( new_n5861_, new_n6015_ ) -new_n6017_ = NOT ( NET_855 ) -new_n6018_ = OR ( new_n5831_, new_n6017_ ) -NET_12406 = NAND ( new_n6018_, new_n6016_, new_n5931_ ) -new_n6020_ = NOT ( NET_913 ) -new_n6021_ = OR ( new_n5861_, new_n6020_ ) -new_n6022_ = NOT ( NET_856 ) -new_n6023_ = OR ( new_n5831_, new_n6022_ ) -NET_12407 = NAND ( new_n6023_, new_n6021_, new_n5938_ ) -new_n6025_ = NOT ( NET_912 ) -new_n6026_ = OR ( new_n5861_, new_n6025_ ) -new_n6027_ = NOT ( NET_857 ) -new_n6028_ = OR ( new_n5831_, new_n6027_ ) -NET_12408 = NAND ( new_n6028_, new_n6026_, new_n5945_ ) -new_n6030_ = NOT ( NET_911 ) -new_n6031_ = OR ( new_n5861_, new_n6030_ ) -new_n6032_ = NOT ( NET_858 ) -new_n6033_ = OR ( new_n5831_, new_n6032_ ) -NET_12409 = NAND ( new_n6033_, new_n6031_, new_n5952_ ) -new_n6035_ = NOT ( NET_910 ) -new_n6036_ = OR ( new_n5861_, new_n6035_ ) -new_n6037_ = NOT ( NET_859 ) -new_n6038_ = OR ( new_n5831_, new_n6037_ ) -NET_12410 = NAND ( new_n6038_, new_n6036_, new_n5959_ ) -new_n6040_ = NOT ( NET_909 ) -new_n6041_ = OR ( new_n5861_, new_n6040_ ) -new_n6042_ = NOT ( NET_860 ) -new_n6043_ = OR ( new_n5831_, new_n6042_ ) -NET_12411 = NAND ( new_n6043_, new_n6041_, new_n5966_ ) -new_n6045_ = OR ( new_n5283_, new_n4441_ ) -new_n6046_ = OR ( new_n6045_, new_n6040_ ) -new_n6047_ = NOT ( NET_877 ) -new_n6048_ = OR ( new_n4451_, new_n6047_ ) -new_n6049_ = OR ( new_n5280_, new_n6042_ ) -NET_12412 = NAND ( new_n6049_, new_n6048_, new_n6046_ ) -new_n6051_ = OR ( new_n6045_, new_n6035_ ) -new_n6052_ = NOT ( NET_878 ) -new_n6053_ = OR ( new_n4451_, new_n6052_ ) -new_n6054_ = OR ( new_n5280_, new_n6037_ ) -NET_12413 = NAND ( new_n6054_, new_n6053_, new_n6051_ ) -new_n6056_ = OR ( new_n6045_, new_n6030_ ) -new_n6057_ = NOT ( NET_879 ) -new_n6058_ = OR ( new_n4451_, new_n6057_ ) -new_n6059_ = OR ( new_n5280_, new_n6032_ ) -NET_12414 = NAND ( new_n6059_, new_n6058_, new_n6056_ ) -new_n6061_ = OR ( new_n6045_, new_n6025_ ) -new_n6062_ = NOT ( NET_880 ) -new_n6063_ = OR ( new_n4451_, new_n6062_ ) -new_n6064_ = OR ( new_n5280_, new_n6027_ ) -NET_12415 = NAND ( new_n6064_, new_n6063_, new_n6061_ ) -new_n6066_ = OR ( new_n6045_, new_n6020_ ) -new_n6067_ = NOT ( NET_881 ) -new_n6068_ = OR ( new_n4451_, new_n6067_ ) -new_n6069_ = OR ( new_n5280_, new_n6022_ ) -NET_12416 = NAND ( new_n6069_, new_n6068_, new_n6066_ ) -new_n6071_ = OR ( new_n6045_, new_n6015_ ) -new_n6072_ = NOT ( NET_882 ) -new_n6073_ = OR ( new_n4451_, new_n6072_ ) -new_n6074_ = OR ( new_n5280_, new_n6017_ ) -NET_12417 = NAND ( new_n6074_, new_n6073_, new_n6071_ ) -new_n6076_ = OR ( new_n6045_, new_n6010_ ) -new_n6077_ = NOT ( NET_883 ) -new_n6078_ = OR ( new_n4451_, new_n6077_ ) -new_n6079_ = OR ( new_n5280_, new_n6012_ ) -NET_12418 = NAND ( new_n6079_, new_n6078_, new_n6076_ ) -new_n6081_ = OR ( new_n6045_, new_n6005_ ) -new_n6082_ = NOT ( NET_884 ) -new_n6083_ = OR ( new_n4451_, new_n6082_ ) -new_n6084_ = OR ( new_n5280_, new_n6007_ ) -NET_12419 = NAND ( new_n6084_, new_n6083_, new_n6081_ ) -new_n6086_ = OR ( new_n6045_, new_n6000_ ) -new_n6087_ = NOT ( NET_885 ) -new_n6088_ = OR ( new_n4451_, new_n6087_ ) -new_n6089_ = OR ( new_n5280_, new_n6002_ ) -NET_12420 = NAND ( new_n6089_, new_n6088_, new_n6086_ ) -new_n6091_ = OR ( new_n6045_, new_n5995_ ) -new_n6092_ = NOT ( NET_886 ) -new_n6093_ = OR ( new_n4451_, new_n6092_ ) -new_n6094_ = OR ( new_n5280_, new_n5997_ ) -NET_12421 = NAND ( new_n6094_, new_n6093_, new_n6091_ ) -new_n6096_ = OR ( new_n6045_, new_n5990_ ) -new_n6097_ = NOT ( NET_887 ) -new_n6098_ = OR ( new_n4451_, new_n6097_ ) -new_n6099_ = OR ( new_n5280_, new_n5992_ ) -NET_12422 = NAND ( new_n6099_, new_n6098_, new_n6096_ ) -new_n6101_ = OR ( new_n6045_, new_n5985_ ) -new_n6102_ = NOT ( NET_888 ) -new_n6103_ = OR ( new_n4451_, new_n6102_ ) -new_n6104_ = OR ( new_n5280_, new_n5987_ ) -NET_12423 = NAND ( new_n6104_, new_n6103_, new_n6101_ ) -new_n6106_ = OR ( new_n6045_, new_n5980_ ) -new_n6107_ = NOT ( NET_889 ) -new_n6108_ = OR ( new_n4451_, new_n6107_ ) -new_n6109_ = OR ( new_n5280_, new_n5982_ ) -NET_12424 = NAND ( new_n6109_, new_n6108_, new_n6106_ ) -new_n6111_ = OR ( new_n6045_, new_n5975_ ) -new_n6112_ = NOT ( NET_890 ) -new_n6113_ = OR ( new_n4451_, new_n6112_ ) -new_n6114_ = OR ( new_n5280_, new_n5977_ ) -NET_12425 = NAND ( new_n6114_, new_n6113_, new_n6111_ ) -new_n6116_ = OR ( new_n6045_, new_n5970_ ) -new_n6117_ = NOT ( NET_891 ) -new_n6118_ = OR ( new_n4451_, new_n6117_ ) -new_n6119_ = OR ( new_n5280_, new_n5972_ ) -NET_12426 = NAND ( new_n6119_, new_n6118_, new_n6116_ ) -new_n6121_ = NOR ( new_n4382_, new_n3975_ ) -new_n6122_ = OR ( new_n6121_, new_n4381_ ) -new_n6123_ = NAND ( new_n5821_, new_n5813_ ) -new_n6124_ = NAND ( new_n6123_, new_n3895_ ) -new_n6125_ = NAND ( new_n6124_, new_n5822_, new_n3866_ ) -new_n6126_ = AND ( new_n6125_, new_n3953_ ) -new_n6127_ = NAND ( new_n4430_, new_n4429_ ) -new_n6128_ = NAND ( new_n6127_, new_n4382_ ) -new_n6129_ = NOR ( new_n4382_, new_n3775_ ) -new_n6130_ = NOT ( new_n6129_ ) -new_n6131_ = NAND ( new_n6130_, new_n6128_, new_n4428_ ) -new_n6132_ = NOR ( new_n4382_, new_n3924_ ) -new_n6133_ = NOR ( new_n6132_, new_n6131_, new_n6126_ ) -new_n6134_ = NAND ( new_n6133_, new_n6122_, new_n5808_ ) -new_n6135_ = NAND ( new_n6134_, NET_1000 ) -new_n6136_ = NOR ( NET_626, NET_625 ) -new_n6137_ = NAND ( new_n6136_, new_n4266_ ) -new_n6138_ = OR ( new_n6137_, new_n3827_ ) -NET_12427 = NAND ( new_n6138_, new_n6135_ ) -new_n6140_ = OR ( new_n3924_, new_n3817_ ) -new_n6141_ = NOT ( new_n4431_ ) -new_n6142_ = NAND ( new_n6141_, new_n3828_, NET_625 ) -new_n6143_ = NAND ( new_n6142_, new_n5809_ ) -new_n6144_ = NAND ( new_n6143_, new_n4381_ ) -new_n6145_ = AND ( new_n6144_, new_n5829_ ) -new_n6146_ = NAND ( new_n6145_, new_n6137_ ) -new_n6147_ = NAND ( new_n6146_, new_n6140_ ) -new_n6148_ = NAND ( new_n6145_, new_n6137_, NET_1003 ) -NET_12443 = NAND ( new_n6148_, new_n6147_ ) -new_n6150_ = NOT ( new_n5814_ ) -new_n6151_ = NAND ( new_n6150_, new_n3954_, NET_625 ) -new_n6152_ = NAND ( new_n6151_, new_n6146_ ) -new_n6153_ = NAND ( new_n6145_, new_n6137_, NET_1002 ) -NET_12444 = NAND ( new_n6153_, new_n6152_ ) -new_n6155_ = NOT ( new_n6136_ ) -new_n6156_ = NOR ( new_n4435_, new_n3924_ ) -new_n6157_ = OR ( new_n6156_, new_n3975_ ) -new_n6158_ = NAND ( new_n4435_, NET_996 ) -new_n6159_ = NAND ( new_n6158_, new_n6157_ ) -new_n6160_ = NAND ( new_n6159_, NET_625 ) -new_n6161_ = NOR ( new_n3895_, new_n3817_ ) -new_n6162_ = NAND ( new_n6161_, new_n4441_ ) -new_n6163_ = NAND ( new_n6162_, new_n6160_ ) -new_n6164_ = NAND ( new_n6163_, new_n5811_ ) -new_n6165_ = NAND ( new_n6164_, NET_627 ) -new_n6166_ = NAND ( new_n6165_, new_n6155_ ) -new_n6167_ = OR ( new_n5812_, new_n4450_ ) -new_n6168_ = NAND ( NET_627, NET_625 ) -new_n6169_ = NAND ( new_n6168_, new_n3836_, new_n4266_ ) -new_n6170_ = NAND ( new_n6169_, new_n6167_, new_n6145_ ) -new_n6171_ = NAND ( new_n6170_, new_n6166_ ) -new_n6172_ = NOT ( NET_997 ) -new_n6173_ = OR ( new_n6170_, new_n6172_ ) -NET_12445 = NAND ( new_n6173_, new_n6171_ ) -new_n6175_ = NOT ( new_n5125_ ) -new_n6176_ = NOT ( new_n5192_ ) -new_n6177_ = NOR ( new_n6176_, new_n4571_ ) -new_n6178_ = NAND ( new_n6177_, new_n5188_ ) -new_n6179_ = OR ( new_n6178_, new_n6175_ ) -new_n6180_ = NAND ( NET_36, NET_105 ) -new_n6181_ = NOT ( new_n6180_ ) -new_n6182_ = NOT ( new_n4835_ ) -new_n6183_ = NOR ( new_n4639_, new_n4610_ ) -new_n6184_ = NAND ( new_n6183_, new_n4891_ ) -new_n6185_ = NAND ( new_n6184_, new_n4939_, new_n4720_ ) -new_n6186_ = OR ( new_n6183_, new_n4891_ ) -new_n6187_ = OR ( new_n4949_, new_n4639_ ) -new_n6188_ = NAND ( new_n6187_, new_n6186_, new_n6185_ ) -new_n6189_ = NAND ( new_n4949_, new_n4639_ ) -new_n6190_ = NAND ( new_n6189_, new_n6188_, new_n5023_, new_n5014_ ) -new_n6191_ = NOR ( new_n5149_, new_n4558_ ) -new_n6192_ = NOT ( new_n6191_ ) -new_n6193_ = OR ( new_n6192_, new_n5182_ ) -new_n6194_ = NOR ( new_n6193_, new_n4698_ ) -new_n6195_ = NOT ( new_n6194_ ) -new_n6196_ = NOR ( new_n6195_, new_n4571_ ) -new_n6197_ = NAND ( new_n6196_, new_n6190_, new_n6182_ ) -new_n6198_ = OR ( new_n6197_, new_n6176_ ) -new_n6199_ = OR ( new_n6198_, new_n6181_ ) -new_n6200_ = NAND ( new_n6199_, new_n6179_ ) -new_n6201_ = AND ( new_n6200_, new_n4639_ ) -new_n6202_ = NOT ( NET_17 ) -new_n6203_ = NOT ( NET_1008 ) -new_n6204_ = NOT ( NET_1023 ) -new_n6205_ = NOT ( NET_1024 ) -new_n6206_ = NOR ( NET_1030, NET_1029, NET_1028, NET_1027 ) -new_n6207_ = NOR ( NET_1026, NET_1025 ) -new_n6208_ = NAND ( new_n6207_, new_n6206_, new_n6205_, new_n6204_ ) -new_n6209_ = NOT ( NET_1035 ) -new_n6210_ = NOT ( NET_1036 ) -new_n6211_ = NOT ( NET_1037 ) -new_n6212_ = NOR ( NET_1034, NET_1033, NET_1032, NET_1031 ) -new_n6213_ = NAND ( new_n6212_, new_n6211_, new_n6210_, new_n6209_ ) -new_n6214_ = NOT ( NET_1011 ) -new_n6215_ = NOT ( NET_1012 ) -new_n6216_ = NOT ( NET_1013 ) -new_n6217_ = NOT ( NET_1014 ) -new_n6218_ = NAND ( new_n6217_, new_n6216_, new_n6215_, new_n6214_ ) -new_n6219_ = OR ( new_n6218_, NET_1010, NET_1009 ) -new_n6220_ = NOT ( NET_1015 ) -new_n6221_ = NOT ( NET_1016 ) -new_n6222_ = NOR ( NET_1022, NET_1021, NET_1020, NET_1019 ) -new_n6223_ = NOR ( NET_1018, NET_1017 ) -new_n6224_ = NAND ( new_n6223_, new_n6222_, new_n6221_, new_n6220_ ) -new_n6225_ = NOR ( new_n6224_, new_n6219_, new_n6213_, new_n6208_ ) -new_n6226_ = NOR ( new_n6225_, new_n6203_ ) -new_n6227_ = OR ( new_n6226_, new_n6202_ ) -new_n6228_ = NAND ( new_n6226_, NET_53 ) -new_n6229_ = NAND ( new_n6228_, new_n6227_ ) -new_n6230_ = NAND ( new_n6229_, new_n6201_ ) -new_n6231_ = NAND ( new_n6200_, new_n4719_ ) -new_n6232_ = OR ( new_n6231_, new_n5502_ ) -new_n6233_ = OR ( new_n6200_, new_n5500_ ) -NET_12556 = NAND ( new_n6233_, new_n6232_, new_n6230_ ) -new_n6235_ = NOT ( NET_18 ) -new_n6236_ = OR ( new_n6226_, new_n6235_ ) -new_n6237_ = NAND ( new_n6226_, NET_52 ) -new_n6238_ = NAND ( new_n6237_, new_n6236_ ) -new_n6239_ = NAND ( new_n6238_, new_n6201_ ) -new_n6240_ = OR ( new_n6231_, new_n5495_ ) -new_n6241_ = OR ( new_n6200_, new_n5493_ ) -NET_12557 = NAND ( new_n6241_, new_n6240_, new_n6239_ ) -new_n6243_ = NOT ( NET_19 ) -new_n6244_ = OR ( new_n6226_, new_n6243_ ) -new_n6245_ = NAND ( new_n6226_, NET_51 ) -new_n6246_ = NAND ( new_n6245_, new_n6244_ ) -new_n6247_ = NAND ( new_n6246_, new_n6201_ ) -new_n6248_ = OR ( new_n6231_, new_n5488_ ) -new_n6249_ = OR ( new_n6200_, new_n5486_ ) -NET_12558 = NAND ( new_n6249_, new_n6248_, new_n6247_ ) -new_n6251_ = NOT ( NET_20 ) -new_n6252_ = OR ( new_n6226_, new_n6251_ ) -new_n6253_ = NAND ( new_n6226_, NET_50 ) -new_n6254_ = NAND ( new_n6253_, new_n6252_ ) -new_n6255_ = NAND ( new_n6254_, new_n6201_ ) -new_n6256_ = OR ( new_n6231_, new_n5481_ ) -new_n6257_ = OR ( new_n6200_, new_n5479_ ) -NET_12559 = NAND ( new_n6257_, new_n6256_, new_n6255_ ) -new_n6259_ = NOT ( NET_21 ) -new_n6260_ = OR ( new_n6226_, new_n6259_ ) -new_n6261_ = NAND ( new_n6226_, NET_49 ) -new_n6262_ = NAND ( new_n6261_, new_n6260_ ) -new_n6263_ = NAND ( new_n6262_, new_n6201_ ) -new_n6264_ = OR ( new_n6231_, new_n5474_ ) -new_n6265_ = OR ( new_n6200_, new_n5472_ ) -NET_12560 = NAND ( new_n6265_, new_n6264_, new_n6263_ ) -new_n6267_ = NOT ( NET_22 ) -new_n6268_ = OR ( new_n6226_, new_n6267_ ) -new_n6269_ = NAND ( new_n6226_, NET_48 ) -new_n6270_ = NAND ( new_n6269_, new_n6268_ ) -new_n6271_ = NAND ( new_n6270_, new_n6201_ ) -new_n6272_ = OR ( new_n6231_, new_n5467_ ) -new_n6273_ = OR ( new_n6200_, new_n5465_ ) -NET_12561 = NAND ( new_n6273_, new_n6272_, new_n6271_ ) -new_n6275_ = NOT ( NET_23 ) -new_n6276_ = OR ( new_n6226_, new_n6275_ ) -new_n6277_ = NAND ( new_n6226_, NET_47 ) -new_n6278_ = NAND ( new_n6277_, new_n6276_ ) -new_n6279_ = NAND ( new_n6278_, new_n6201_ ) -new_n6280_ = OR ( new_n6231_, new_n5460_ ) -new_n6281_ = OR ( new_n6200_, new_n5458_ ) -NET_12562 = NAND ( new_n6281_, new_n6280_, new_n6279_ ) -new_n6283_ = NOT ( NET_24 ) -new_n6284_ = OR ( new_n6226_, new_n6283_ ) -new_n6285_ = NAND ( new_n6226_, NET_46 ) -new_n6286_ = NAND ( new_n6285_, new_n6284_ ) -new_n6287_ = NAND ( new_n6286_, new_n6201_ ) -new_n6288_ = OR ( new_n6231_, new_n5453_ ) -new_n6289_ = OR ( new_n6200_, new_n5451_ ) -NET_12563 = NAND ( new_n6289_, new_n6288_, new_n6287_ ) -new_n6291_ = NOT ( NET_25 ) -new_n6292_ = OR ( new_n6226_, new_n6291_ ) -new_n6293_ = NAND ( new_n6226_, NET_45 ) -new_n6294_ = NAND ( new_n6293_, new_n6292_ ) -new_n6295_ = NAND ( new_n6294_, new_n6201_ ) -new_n6296_ = OR ( new_n6200_, new_n5444_ ) -new_n6297_ = OR ( new_n6231_, new_n5446_ ) -NET_12564 = NAND ( new_n6297_, new_n6296_, new_n6295_ ) -new_n6299_ = NOT ( NET_26 ) -new_n6300_ = OR ( new_n6226_, new_n6299_ ) -new_n6301_ = NAND ( new_n6226_, NET_44 ) -new_n6302_ = NAND ( new_n6301_, new_n6300_ ) -new_n6303_ = NAND ( new_n6302_, new_n6201_ ) -new_n6304_ = OR ( new_n6200_, new_n5437_ ) -new_n6305_ = OR ( new_n6231_, new_n5439_ ) -NET_12565 = NAND ( new_n6305_, new_n6304_, new_n6303_ ) -new_n6307_ = NOT ( NET_27 ) -new_n6308_ = OR ( new_n6226_, new_n6307_ ) -new_n6309_ = NAND ( new_n6226_, NET_43 ) -new_n6310_ = NAND ( new_n6309_, new_n6308_ ) -new_n6311_ = NAND ( new_n6310_, new_n6201_ ) -new_n6312_ = OR ( new_n6200_, new_n5430_ ) -new_n6313_ = OR ( new_n6231_, new_n5432_ ) -NET_12566 = NAND ( new_n6313_, new_n6312_, new_n6311_ ) -new_n6315_ = NOT ( NET_28 ) -new_n6316_ = OR ( new_n6226_, new_n6315_ ) -new_n6317_ = NAND ( new_n6226_, NET_42 ) -new_n6318_ = NAND ( new_n6317_, new_n6316_ ) -new_n6319_ = NAND ( new_n6318_, new_n6201_ ) -new_n6320_ = OR ( new_n6200_, new_n5423_ ) -new_n6321_ = OR ( new_n6231_, new_n5425_ ) -NET_12567 = NAND ( new_n6321_, new_n6320_, new_n6319_ ) -new_n6323_ = NOT ( NET_29 ) -new_n6324_ = OR ( new_n6226_, new_n6323_ ) -new_n6325_ = NAND ( new_n6226_, NET_41 ) -new_n6326_ = NAND ( new_n6325_, new_n6324_ ) -new_n6327_ = NAND ( new_n6326_, new_n6201_ ) -new_n6328_ = OR ( new_n6200_, new_n5416_ ) -new_n6329_ = OR ( new_n6231_, new_n5418_ ) -NET_12568 = NAND ( new_n6329_, new_n6328_, new_n6327_ ) -new_n6331_ = NOT ( NET_30 ) -new_n6332_ = OR ( new_n6226_, new_n6331_ ) -new_n6333_ = NAND ( new_n6226_, NET_40 ) -new_n6334_ = NAND ( new_n6333_, new_n6332_ ) -new_n6335_ = NAND ( new_n6334_, new_n6201_ ) -new_n6336_ = OR ( new_n6200_, new_n5409_ ) -new_n6337_ = OR ( new_n6231_, new_n5411_ ) -NET_12569 = NAND ( new_n6337_, new_n6336_, new_n6335_ ) -new_n6339_ = NOT ( NET_31 ) -new_n6340_ = OR ( new_n6226_, new_n6339_ ) -new_n6341_ = NAND ( new_n6226_, NET_39 ) -new_n6342_ = NAND ( new_n6341_, new_n6340_ ) -new_n6343_ = NAND ( new_n6342_, new_n6201_ ) -new_n6344_ = OR ( new_n6200_, new_n5402_ ) -new_n6345_ = OR ( new_n6231_, new_n5404_ ) -NET_12570 = NAND ( new_n6345_, new_n6344_, new_n6343_ ) -new_n6347_ = NOT ( NET_32 ) -new_n6348_ = OR ( new_n6226_, new_n6347_ ) -new_n6349_ = NAND ( new_n6226_, NET_38 ) -new_n6350_ = NAND ( new_n6349_, new_n6348_ ) -new_n6351_ = NAND ( new_n6350_, new_n6201_ ) -new_n6352_ = OR ( new_n6200_, new_n5393_ ) -new_n6353_ = OR ( new_n6231_, new_n5396_ ) -NET_12571 = NAND ( new_n6353_, new_n6352_, new_n6351_ ) -new_n6355_ = NOT ( NET_1372 ) -new_n6356_ = OR ( new_n6231_, new_n6355_ ) -new_n6357_ = NOT ( NET_1295 ) -new_n6358_ = OR ( new_n6200_, new_n6357_ ) -NET_12572 = NAND ( new_n6358_, new_n6356_, new_n6239_ ) -new_n6360_ = NOT ( NET_1371 ) -new_n6361_ = OR ( new_n6231_, new_n6360_ ) -new_n6362_ = NOT ( NET_1296 ) -new_n6363_ = OR ( new_n6200_, new_n6362_ ) -NET_12573 = NAND ( new_n6363_, new_n6361_, new_n6247_ ) -new_n6365_ = NOT ( NET_1370 ) -new_n6366_ = OR ( new_n6231_, new_n6365_ ) -new_n6367_ = NOT ( NET_1297 ) -new_n6368_ = OR ( new_n6200_, new_n6367_ ) -NET_12574 = NAND ( new_n6368_, new_n6366_, new_n6255_ ) -new_n6370_ = NOT ( NET_1369 ) -new_n6371_ = OR ( new_n6231_, new_n6370_ ) -new_n6372_ = NOT ( NET_1298 ) -new_n6373_ = OR ( new_n6200_, new_n6372_ ) -NET_12575 = NAND ( new_n6373_, new_n6371_, new_n6263_ ) -new_n6375_ = NOT ( NET_1368 ) -new_n6376_ = OR ( new_n6231_, new_n6375_ ) -new_n6377_ = NOT ( NET_1299 ) -new_n6378_ = OR ( new_n6200_, new_n6377_ ) -NET_12576 = NAND ( new_n6378_, new_n6376_, new_n6271_ ) -new_n6380_ = NOT ( NET_1367 ) -new_n6381_ = OR ( new_n6231_, new_n6380_ ) -new_n6382_ = NOT ( NET_1300 ) -new_n6383_ = OR ( new_n6200_, new_n6382_ ) -NET_12577 = NAND ( new_n6383_, new_n6381_, new_n6279_ ) -new_n6385_ = NOT ( NET_1366 ) -new_n6386_ = OR ( new_n6231_, new_n6385_ ) -new_n6387_ = NOT ( NET_1301 ) -new_n6388_ = OR ( new_n6200_, new_n6387_ ) -NET_12578 = NAND ( new_n6388_, new_n6386_, new_n6287_ ) -new_n6390_ = NOT ( NET_1365 ) -new_n6391_ = OR ( new_n6231_, new_n6390_ ) -new_n6392_ = NOT ( NET_1302 ) -new_n6393_ = OR ( new_n6200_, new_n6392_ ) -NET_12579 = NAND ( new_n6393_, new_n6391_, new_n6295_ ) -new_n6395_ = NOT ( NET_1364 ) -new_n6396_ = OR ( new_n6231_, new_n6395_ ) -new_n6397_ = NOT ( NET_1303 ) -new_n6398_ = OR ( new_n6200_, new_n6397_ ) -NET_12580 = NAND ( new_n6398_, new_n6396_, new_n6303_ ) -new_n6400_ = NOT ( NET_1363 ) -new_n6401_ = OR ( new_n6231_, new_n6400_ ) -new_n6402_ = NOT ( NET_1304 ) -new_n6403_ = OR ( new_n6200_, new_n6402_ ) -NET_12581 = NAND ( new_n6403_, new_n6401_, new_n6311_ ) -new_n6405_ = NOT ( NET_1362 ) -new_n6406_ = OR ( new_n6231_, new_n6405_ ) -new_n6407_ = NOT ( NET_1305 ) -new_n6408_ = OR ( new_n6200_, new_n6407_ ) -NET_12582 = NAND ( new_n6408_, new_n6406_, new_n6319_ ) -new_n6410_ = NOT ( NET_1361 ) -new_n6411_ = OR ( new_n6231_, new_n6410_ ) -new_n6412_ = NOT ( NET_1306 ) -new_n6413_ = OR ( new_n6200_, new_n6412_ ) -NET_12583 = NAND ( new_n6413_, new_n6411_, new_n6327_ ) -new_n6415_ = NOT ( NET_1360 ) -new_n6416_ = OR ( new_n6231_, new_n6415_ ) -new_n6417_ = NOT ( NET_1307 ) -new_n6418_ = OR ( new_n6200_, new_n6417_ ) -NET_12584 = NAND ( new_n6418_, new_n6416_, new_n6335_ ) -new_n6420_ = NOT ( NET_1359 ) -new_n6421_ = OR ( new_n6231_, new_n6420_ ) -new_n6422_ = NOT ( NET_1308 ) -new_n6423_ = OR ( new_n6200_, new_n6422_ ) -NET_12585 = NAND ( new_n6423_, new_n6421_, new_n6343_ ) -new_n6425_ = NOT ( NET_1358 ) -new_n6426_ = OR ( new_n6231_, new_n6425_ ) -new_n6427_ = NOT ( NET_1309 ) -new_n6428_ = OR ( new_n6200_, new_n6427_ ) -NET_12586 = NAND ( new_n6428_, new_n6426_, new_n6351_ ) -new_n6430_ = OR ( new_n5397_, new_n5185_ ) -new_n6431_ = OR ( new_n6430_, new_n6425_ ) -new_n6432_ = NOT ( NET_1326 ) -new_n6433_ = OR ( new_n5195_, new_n6432_ ) -new_n6434_ = OR ( new_n5394_, new_n6427_ ) -NET_12587 = NAND ( new_n6434_, new_n6433_, new_n6431_ ) -new_n6436_ = OR ( new_n6430_, new_n6420_ ) -new_n6437_ = NOT ( NET_1327 ) -new_n6438_ = OR ( new_n5195_, new_n6437_ ) -new_n6439_ = OR ( new_n5394_, new_n6422_ ) -NET_12588 = NAND ( new_n6439_, new_n6438_, new_n6436_ ) -new_n6441_ = OR ( new_n6430_, new_n6415_ ) -new_n6442_ = NOT ( NET_1328 ) -new_n6443_ = OR ( new_n5195_, new_n6442_ ) -new_n6444_ = OR ( new_n5394_, new_n6417_ ) -NET_12589 = NAND ( new_n6444_, new_n6443_, new_n6441_ ) -new_n6446_ = OR ( new_n6430_, new_n6410_ ) -new_n6447_ = NOT ( NET_1329 ) -new_n6448_ = OR ( new_n5195_, new_n6447_ ) -new_n6449_ = OR ( new_n5394_, new_n6412_ ) -NET_12590 = NAND ( new_n6449_, new_n6448_, new_n6446_ ) -new_n6451_ = OR ( new_n6430_, new_n6405_ ) -new_n6452_ = NOT ( NET_1330 ) -new_n6453_ = OR ( new_n5195_, new_n6452_ ) -new_n6454_ = OR ( new_n5394_, new_n6407_ ) -NET_12591 = NAND ( new_n6454_, new_n6453_, new_n6451_ ) -new_n6456_ = OR ( new_n6430_, new_n6400_ ) -new_n6457_ = NOT ( NET_1331 ) -new_n6458_ = OR ( new_n5195_, new_n6457_ ) -new_n6459_ = OR ( new_n5394_, new_n6402_ ) -NET_12592 = NAND ( new_n6459_, new_n6458_, new_n6456_ ) -new_n6461_ = OR ( new_n6430_, new_n6395_ ) -new_n6462_ = NOT ( NET_1332 ) -new_n6463_ = OR ( new_n5195_, new_n6462_ ) -new_n6464_ = OR ( new_n5394_, new_n6397_ ) -NET_12593 = NAND ( new_n6464_, new_n6463_, new_n6461_ ) -new_n6466_ = OR ( new_n6430_, new_n6390_ ) -new_n6467_ = NOT ( NET_1333 ) -new_n6468_ = OR ( new_n5195_, new_n6467_ ) -new_n6469_ = OR ( new_n5394_, new_n6392_ ) -NET_12594 = NAND ( new_n6469_, new_n6468_, new_n6466_ ) -new_n6471_ = OR ( new_n6430_, new_n6385_ ) -new_n6472_ = NOT ( NET_1334 ) -new_n6473_ = OR ( new_n5195_, new_n6472_ ) -new_n6474_ = OR ( new_n5394_, new_n6387_ ) -NET_12595 = NAND ( new_n6474_, new_n6473_, new_n6471_ ) -new_n6476_ = OR ( new_n6430_, new_n6380_ ) -new_n6477_ = NOT ( NET_1335 ) -new_n6478_ = OR ( new_n5195_, new_n6477_ ) -new_n6479_ = OR ( new_n5394_, new_n6382_ ) -NET_12596 = NAND ( new_n6479_, new_n6478_, new_n6476_ ) -new_n6481_ = OR ( new_n6430_, new_n6375_ ) -new_n6482_ = NOT ( NET_1336 ) -new_n6483_ = OR ( new_n5195_, new_n6482_ ) -new_n6484_ = OR ( new_n5394_, new_n6377_ ) -NET_12597 = NAND ( new_n6484_, new_n6483_, new_n6481_ ) -new_n6486_ = OR ( new_n6430_, new_n6370_ ) -new_n6487_ = NOT ( NET_1337 ) -new_n6488_ = OR ( new_n5195_, new_n6487_ ) -new_n6489_ = OR ( new_n5394_, new_n6372_ ) -NET_12598 = NAND ( new_n6489_, new_n6488_, new_n6486_ ) -new_n6491_ = OR ( new_n6430_, new_n6365_ ) -new_n6492_ = NOT ( NET_1338 ) -new_n6493_ = OR ( new_n5195_, new_n6492_ ) -new_n6494_ = OR ( new_n5394_, new_n6367_ ) -NET_12599 = NAND ( new_n6494_, new_n6493_, new_n6491_ ) -new_n6496_ = OR ( new_n6430_, new_n6360_ ) -new_n6497_ = NOT ( NET_1339 ) -new_n6498_ = OR ( new_n5195_, new_n6497_ ) -new_n6499_ = OR ( new_n5394_, new_n6362_ ) -NET_12600 = NAND ( new_n6499_, new_n6498_, new_n6496_ ) -new_n6501_ = OR ( new_n6430_, new_n6355_ ) -new_n6502_ = NOT ( NET_1340 ) -new_n6503_ = OR ( new_n5195_, new_n6502_ ) -new_n6504_ = OR ( new_n5394_, new_n6357_ ) -NET_12601 = NAND ( new_n6504_, new_n6503_, new_n6501_ ) -new_n6506_ = NOR ( new_n5126_, new_n4719_ ) -new_n6507_ = OR ( new_n6506_, new_n5125_ ) -new_n6508_ = NAND ( new_n6190_, new_n6182_ ) -new_n6509_ = NAND ( new_n6508_, new_n4639_ ) -new_n6510_ = NAND ( new_n6509_, new_n6191_, new_n4610_ ) -new_n6511_ = AND ( new_n6510_, new_n4697_ ) -new_n6512_ = NAND ( new_n5174_, new_n5173_ ) -new_n6513_ = NAND ( new_n6512_, new_n5126_ ) -new_n6514_ = NOR ( new_n5126_, new_n4519_ ) -new_n6515_ = NOT ( new_n6514_ ) -new_n6516_ = NAND ( new_n6515_, new_n6513_, new_n5172_ ) -new_n6517_ = NOR ( new_n5126_, new_n4668_ ) -new_n6518_ = NOR ( new_n6517_, new_n6516_, new_n6511_ ) -new_n6519_ = NAND ( new_n6518_, new_n6507_, new_n6177_ ) -new_n6520_ = NAND ( new_n6519_, NET_1449 ) -new_n6521_ = NOR ( NET_1075, NET_1074 ) -new_n6522_ = NAND ( new_n6521_, new_n5010_ ) -new_n6523_ = OR ( new_n6522_, new_n4571_ ) -NET_12602 = NAND ( new_n6523_, new_n6520_ ) -new_n6525_ = OR ( new_n4668_, new_n4561_ ) -new_n6526_ = NOT ( new_n5175_ ) -new_n6527_ = NAND ( new_n6526_, new_n4572_, NET_1074 ) -new_n6528_ = NAND ( new_n6527_, new_n6178_ ) -new_n6529_ = NAND ( new_n6528_, new_n5125_ ) -new_n6530_ = AND ( new_n6529_, new_n6198_ ) -new_n6531_ = NAND ( new_n6530_, new_n6522_ ) -new_n6532_ = NAND ( new_n6531_, new_n6525_ ) -new_n6533_ = NAND ( new_n6530_, new_n6522_, NET_1452 ) -NET_12618 = NAND ( new_n6533_, new_n6532_ ) -new_n6535_ = NOT ( new_n6183_ ) -new_n6536_ = NAND ( new_n6535_, new_n4698_, NET_1074 ) -new_n6537_ = NAND ( new_n6536_, new_n6531_ ) -new_n6538_ = NAND ( new_n6530_, new_n6522_, NET_1451 ) -NET_12619 = NAND ( new_n6538_, new_n6537_ ) -new_n6540_ = NOT ( new_n6521_ ) -new_n6541_ = NOR ( new_n5179_, new_n4668_ ) -new_n6542_ = OR ( new_n6541_, new_n4719_ ) -new_n6543_ = NAND ( new_n5179_, NET_1445 ) -new_n6544_ = NAND ( new_n6543_, new_n6542_ ) -new_n6545_ = NAND ( new_n6544_, NET_1074 ) -new_n6546_ = NOR ( new_n4639_, new_n4561_ ) -new_n6547_ = NAND ( new_n6546_, new_n5185_ ) -new_n6548_ = NAND ( new_n6547_, new_n6545_ ) -new_n6549_ = NAND ( new_n6548_, new_n6180_ ) -new_n6550_ = NAND ( new_n6549_, NET_1076 ) -new_n6551_ = NAND ( new_n6550_, new_n6540_ ) -new_n6552_ = OR ( new_n6181_, new_n5194_ ) -new_n6553_ = NAND ( NET_1076, NET_1074 ) -new_n6554_ = NAND ( new_n6553_, new_n4580_, new_n5010_ ) -new_n6555_ = NAND ( new_n6554_, new_n6552_, new_n6530_ ) -new_n6556_ = NAND ( new_n6555_, new_n6551_ ) -new_n6557_ = NOT ( NET_1446 ) -new_n6558_ = OR ( new_n6555_, new_n6557_ ) -NET_12620 = NAND ( new_n6558_, new_n6556_ ) -new_n6560_ = OR ( NET_178, new_n3521_ ) -new_n6561_ = OR ( new_n6560_, new_n5508_ ) -new_n6562_ = NAND ( new_n3080_, new_n3089_ ) -new_n6563_ = NOR ( NET_178, NET_176 ) -new_n6564_ = OR ( new_n6563_, new_n3089_ ) -new_n6565_ = NAND ( new_n6564_, new_n6562_ ) -new_n6566_ = NAND ( new_n6565_, new_n6561_ ) -new_n6567_ = NOT ( new_n6566_ ) -new_n6568_ = NAND ( new_n3090_, NET_178 ) -new_n6569_ = OR ( new_n6568_, new_n3636_ ) -new_n6570_ = OR ( new_n6568_, new_n3353_ ) -new_n6571_ = NAND ( new_n6570_, new_n6569_, new_n6567_ ) -NET_12858 = NOR ( new_n6571_, new_n3328_ ) -new_n6573_ = XOR ( new_n3208_, new_n3230_ ) -new_n6574_ = OR ( new_n6573_, new_n3690_ ) -new_n6575_ = NAND ( new_n6574_, new_n5513_ ) -new_n6576_ = NAND ( new_n6575_, new_n5764_, new_n5753_ ) -new_n6577_ = NAND ( new_n6576_, new_n5510_ ) -new_n6578_ = NAND ( new_n6577_, NET_545 ) -new_n6579_ = NAND ( new_n3684_, new_n3208_ ) -new_n6580_ = OR ( new_n3696_, new_n3029_ ) -new_n6581_ = NOR ( new_n6580_, new_n6579_ ) -new_n6582_ = NAND ( new_n6581_, new_n3083_, NET_176 ) -new_n6583_ = OR ( new_n6582_, new_n5754_ ) -NET_12859 = NAND ( new_n6583_, new_n6578_ ) -new_n6585_ = NAND ( new_n5529_, new_n3703_ ) -new_n6586_ = NAND ( new_n6585_, new_n6582_ ) -new_n6587_ = NAND ( new_n6586_, new_n5754_ ) -new_n6588_ = NOT ( new_n3660_ ) -new_n6589_ = NOR ( new_n6588_, new_n3637_ ) -new_n6590_ = NOR ( new_n3682_, new_n3069_ ) -new_n6591_ = NOR ( new_n3179_, new_n3029_ ) -new_n6592_ = NAND ( new_n6591_, new_n6590_, new_n6589_, new_n5516_ ) -new_n6593_ = NOR ( new_n6592_, new_n3082_ ) -new_n6594_ = NOR ( new_n6588_, new_n3696_ ) -new_n6595_ = NAND ( new_n6594_, new_n3694_, new_n3347_, new_n3229_ ) -new_n6596_ = NOR ( new_n6595_, new_n3082_ ) -new_n6597_ = NOR ( new_n6596_, new_n6593_ ) -new_n6598_ = NOR ( new_n6597_, new_n5509_ ) -new_n6599_ = NOR ( new_n6598_, new_n5774_ ) -new_n6600_ = OR ( new_n6599_, new_n3636_ ) -new_n6601_ = NAND ( new_n6600_, new_n6587_ ) -new_n6602_ = NAND ( new_n6601_, new_n6576_ ) -new_n6603_ = NAND ( new_n6577_, NET_546 ) -NET_12860 = NAND ( new_n6603_, new_n6602_ ) -new_n6605_ = OR ( NET_627, new_n4266_ ) -new_n6606_ = OR ( new_n6605_, new_n5806_ ) -new_n6607_ = NAND ( new_n3825_, new_n3834_ ) -new_n6608_ = NOR ( NET_627, NET_625 ) -new_n6609_ = OR ( new_n6608_, new_n3834_ ) -new_n6610_ = NAND ( new_n6609_, new_n6607_ ) -new_n6611_ = NAND ( new_n6610_, new_n6606_ ) -new_n6612_ = NOT ( new_n6611_ ) -new_n6613_ = NAND ( new_n3835_, NET_627 ) -new_n6614_ = OR ( new_n6613_, new_n4381_ ) -new_n6615_ = OR ( new_n6613_, new_n4098_ ) -new_n6616_ = NAND ( new_n6615_, new_n6614_, new_n6612_ ) -NET_13089 = NOR ( new_n6616_, new_n4073_ ) -new_n6618_ = XOR ( new_n3953_, new_n3975_ ) -new_n6619_ = OR ( new_n6618_, new_n4435_ ) -new_n6620_ = NAND ( new_n6619_, new_n5811_ ) -new_n6621_ = NAND ( new_n6620_, new_n6133_, new_n6122_ ) -new_n6622_ = NAND ( new_n6621_, new_n5808_ ) -new_n6623_ = NAND ( new_n6622_, NET_994 ) -new_n6624_ = NAND ( new_n4429_, new_n3953_ ) -new_n6625_ = OR ( new_n4441_, new_n3774_ ) -new_n6626_ = NOR ( new_n6625_, new_n6624_ ) -new_n6627_ = NAND ( new_n6626_, new_n3828_, NET_625 ) -new_n6628_ = OR ( new_n6627_, new_n6123_ ) -NET_13090 = NAND ( new_n6628_, new_n6623_ ) -new_n6630_ = NAND ( new_n5827_, new_n4448_ ) -new_n6631_ = NAND ( new_n6630_, new_n6627_ ) -new_n6632_ = NAND ( new_n6631_, new_n6123_ ) -new_n6633_ = NOT ( new_n4405_ ) -new_n6634_ = NOR ( new_n6633_, new_n4382_ ) -new_n6635_ = NOR ( new_n4427_, new_n3814_ ) -new_n6636_ = NOR ( new_n3924_, new_n3774_ ) -new_n6637_ = NAND ( new_n6636_, new_n6635_, new_n6634_, new_n5814_ ) -new_n6638_ = NOR ( new_n6637_, new_n3827_ ) -new_n6639_ = NOR ( new_n6633_, new_n4441_ ) -new_n6640_ = NAND ( new_n6639_, new_n4439_, new_n4092_, new_n3974_ ) -new_n6641_ = NOR ( new_n6640_, new_n3827_ ) -new_n6642_ = NOR ( new_n6641_, new_n6638_ ) -new_n6643_ = NOR ( new_n6642_, new_n5807_ ) -new_n6644_ = NOR ( new_n6643_, new_n6143_ ) -new_n6645_ = OR ( new_n6644_, new_n4381_ ) -new_n6646_ = NAND ( new_n6645_, new_n6632_ ) -new_n6647_ = NAND ( new_n6646_, new_n6621_ ) -new_n6648_ = NAND ( new_n6622_, NET_995 ) -NET_13091 = NAND ( new_n6648_, new_n6647_ ) -new_n6650_ = OR ( NET_1076, new_n5010_ ) -new_n6651_ = OR ( new_n6650_, new_n6175_ ) -new_n6652_ = NAND ( new_n4569_, new_n4578_ ) -new_n6653_ = NOR ( NET_1076, NET_1074 ) -new_n6654_ = OR ( new_n6653_, new_n4578_ ) -new_n6655_ = NAND ( new_n6654_, new_n6652_ ) -new_n6656_ = NAND ( new_n6655_, new_n6651_ ) -new_n6657_ = NOT ( new_n6656_ ) -new_n6658_ = NAND ( new_n4579_, NET_1076 ) -new_n6659_ = OR ( new_n6658_, new_n5125_ ) -new_n6660_ = OR ( new_n6658_, new_n4842_ ) -new_n6661_ = NAND ( new_n6660_, new_n6659_, new_n6657_ ) -NET_13321 = NOR ( new_n6661_, new_n4817_ ) -new_n6663_ = XOR ( new_n4697_, new_n4719_ ) -new_n6664_ = OR ( new_n6663_, new_n5179_ ) -new_n6665_ = NAND ( new_n6664_, new_n6180_ ) -new_n6666_ = NAND ( new_n6665_, new_n6518_, new_n6507_ ) -new_n6667_ = NAND ( new_n6666_, new_n6177_ ) -new_n6668_ = NAND ( new_n6667_, NET_1443 ) -new_n6669_ = NAND ( new_n5173_, new_n4697_ ) -new_n6670_ = OR ( new_n5185_, new_n4518_ ) -new_n6671_ = NOR ( new_n6670_, new_n6669_ ) -new_n6672_ = NAND ( new_n6671_, new_n4572_, NET_1074 ) -new_n6673_ = OR ( new_n6672_, new_n6508_ ) -NET_13322 = NAND ( new_n6673_, new_n6668_ ) -new_n6675_ = NAND ( new_n6196_, new_n5192_ ) -new_n6676_ = NAND ( new_n6675_, new_n6672_ ) -new_n6677_ = NAND ( new_n6676_, new_n6508_ ) -new_n6678_ = NOT ( new_n5149_ ) -new_n6679_ = NOR ( new_n6678_, new_n5126_ ) -new_n6680_ = NOR ( new_n5171_, new_n4558_ ) -new_n6681_ = NOR ( new_n4668_, new_n4518_ ) -new_n6682_ = NAND ( new_n6681_, new_n6680_, new_n6679_, new_n6183_ ) -new_n6683_ = NOR ( new_n6682_, new_n4571_ ) -new_n6684_ = NOR ( new_n6678_, new_n5185_ ) -new_n6685_ = NAND ( new_n6684_, new_n5183_, new_n4836_, new_n4718_ ) -new_n6686_ = NOR ( new_n6685_, new_n4571_ ) -new_n6687_ = NOR ( new_n6686_, new_n6683_ ) -new_n6688_ = NOR ( new_n6687_, new_n6176_ ) -new_n6689_ = NOR ( new_n6688_, new_n6528_ ) -new_n6690_ = OR ( new_n6689_, new_n5125_ ) -new_n6691_ = NAND ( new_n6690_, new_n6677_ ) -new_n6692_ = NAND ( new_n6691_, new_n6666_ ) -new_n6693_ = NAND ( new_n6667_, NET_1444 ) -NET_13323 = NAND ( new_n6693_, new_n6692_ ) -new_n6695_ = NOR ( NET_547, new_n3089_ ) -new_n6696_ = NAND ( new_n6695_, new_n3072_ ) -new_n6697_ = NAND ( new_n6696_, new_n6571_, new_n5799_ ) -new_n6698_ = AND ( new_n5760_, new_n3683_, new_n3696_ ) -new_n6699_ = NOR ( new_n3627_, new_n3082_ ) -new_n6700_ = NAND ( new_n6699_, new_n6698_, new_n3230_, new_n3121_ ) -new_n6701_ = NOR ( new_n3686_, new_n3150_ ) -new_n6702_ = NOT ( new_n6701_ ) -new_n6703_ = NOR ( new_n6702_, new_n3082_ ) -new_n6704_ = NOT ( new_n6703_ ) -new_n6705_ = NAND ( new_n6704_, new_n6700_ ) -new_n6706_ = NOT ( new_n6593_ ) -new_n6707_ = NOT ( new_n6695_ ) -new_n6708_ = NOR ( new_n3627_, new_n3030_ ) -new_n6709_ = NOR ( new_n3179_, new_n3230_ ) -new_n6710_ = NAND ( new_n6709_, new_n6708_, new_n3661_, new_n3637_ ) -new_n6711_ = OR ( new_n6710_, new_n3689_, new_n3082_ ) -new_n6712_ = NAND ( new_n6711_, new_n6707_, new_n6706_, new_n3700_ ) -new_n6713_ = NOR ( new_n6712_, new_n6705_ ) -new_n6714_ = NOT ( new_n6713_ ) -new_n6715_ = NOT ( new_n6581_ ) -new_n6716_ = NOR ( new_n6715_, new_n3082_ ) -new_n6717_ = NOT ( new_n6716_ ) -new_n6718_ = OR ( new_n6717_, new_n3636_ ) -new_n6719_ = NAND ( new_n6698_, new_n3660_, new_n3388_ ) -new_n6720_ = NAND ( new_n6698_, new_n3230_, new_n3121_ ) -new_n6721_ = OR ( new_n6720_, new_n6588_ ) -new_n6722_ = AND ( new_n6721_, new_n6719_ ) -new_n6723_ = NOR ( new_n6722_, new_n3082_ ) -new_n6724_ = NOR ( new_n6723_, new_n6703_ ) -new_n6725_ = NAND ( new_n3682_, new_n3637_, new_n3029_ ) -new_n6726_ = NOR ( new_n6725_, new_n3697_, new_n3692_ ) -new_n6727_ = NAND ( new_n6726_, NET_178 ) -new_n6728_ = NAND ( new_n6727_, new_n6724_, new_n6718_, new_n6711_ ) -new_n6729_ = NAND ( new_n6728_, NET_318 ) -new_n6730_ = NAND ( new_n6716_, new_n3636_ ) -new_n6731_ = NOT ( new_n6594_ ) -new_n6732_ = NOR ( new_n6731_, new_n3150_ ) -new_n6733_ = NOR ( new_n3208_, new_n3029_ ) -new_n6734_ = NOR ( new_n6733_, new_n6732_ ) -new_n6735_ = NAND ( new_n5781_, new_n6588_, new_n3029_ ) -new_n6736_ = NAND ( new_n6735_, new_n3682_ ) -new_n6737_ = NOR ( new_n3229_, new_n3627_ ) -new_n6738_ = NAND ( new_n6737_, new_n5761_ ) -new_n6739_ = NAND ( new_n6590_, new_n3637_ ) -new_n6740_ = AND ( new_n6739_, new_n6738_, new_n6736_, new_n6734_ ) -new_n6741_ = OR ( new_n6720_, new_n3660_ ) -new_n6742_ = NOR ( new_n6588_, new_n3627_ ) -new_n6743_ = NAND ( new_n6742_, new_n3229_ ) -new_n6744_ = NAND ( new_n5524_, new_n3229_ ) -new_n6745_ = NAND ( new_n3660_, new_n3121_, new_n3030_ ) -new_n6746_ = AND ( new_n6745_, new_n6744_, new_n6743_ ) -new_n6747_ = AND ( new_n6746_, new_n6741_, new_n6740_ ) -new_n6748_ = NAND ( new_n5760_, new_n3230_ ) -new_n6749_ = NAND ( new_n3229_, new_n3029_ ) -new_n6750_ = NAND ( new_n6737_, new_n3683_ ) -new_n6751_ = NAND ( new_n6750_, new_n6749_, new_n6748_ ) -new_n6752_ = NAND ( new_n6751_, new_n3179_ ) -new_n6753_ = NOT ( new_n6591_ ) -new_n6754_ = OR ( new_n6753_, new_n6579_ ) -new_n6755_ = NAND ( new_n5516_, new_n3069_ ) -new_n6756_ = NAND ( new_n6755_, new_n5525_ ) -new_n6757_ = NAND ( new_n6756_, new_n5763_ ) -new_n6758_ = NAND ( new_n6709_, new_n5760_ ) -new_n6759_ = NAND ( new_n6580_, new_n3347_ ) -new_n6760_ = AND ( new_n6759_, new_n6758_, new_n6757_ ) -new_n6761_ = NAND ( new_n6760_, new_n6754_, new_n6752_, new_n6747_ ) -new_n6762_ = NAND ( new_n6761_, NET_178 ) -new_n6763_ = AND ( new_n6762_, new_n3700_ ) -new_n6764_ = NAND ( new_n6763_, new_n6730_, new_n6706_ ) -new_n6765_ = NAND ( new_n6764_, NET_310 ) -new_n6766_ = NOT ( NET_547 ) -new_n6767_ = NOR ( new_n6766_, new_n3089_ ) -new_n6768_ = NOT ( new_n6767_ ) -new_n6769_ = NAND ( new_n6709_, new_n3688_ ) -new_n6770_ = NAND ( new_n6769_, new_n6580_ ) -new_n6771_ = NAND ( new_n6770_, NET_176 ) -new_n6772_ = NOT ( new_n5792_ ) -new_n6773_ = NAND ( new_n3179_, NET_176 ) -new_n6774_ = NAND ( new_n6773_, new_n6771_, new_n6772_ ) -new_n6775_ = NAND ( new_n6774_, NET_311 ) -new_n6776_ = OR ( new_n6775_, new_n3696_ ) -new_n6777_ = NAND ( new_n6776_, NET_176 ) -new_n6778_ = NAND ( new_n6775_, new_n3253_ ) -new_n6779_ = NAND ( new_n6778_, new_n6777_ ) -new_n6780_ = XOR ( new_n6779_, new_n6771_ ) -new_n6781_ = NAND ( new_n6774_, NET_310 ) -new_n6782_ = OR ( new_n3250_, NET_176 ) -new_n6783_ = NAND ( new_n6782_, new_n6781_ ) -new_n6784_ = NOT ( new_n6783_ ) -new_n6785_ = XOR ( new_n6784_, new_n6780_ ) -new_n6786_ = OR ( new_n6785_, new_n6768_ ) -new_n6787_ = NOR ( new_n3250_, new_n3080_ ) -new_n6788_ = NOT ( NET_477 ) -new_n6789_ = NAND ( new_n5760_, new_n3682_, new_n6588_ ) -new_n6790_ = OR ( new_n6789_, new_n3696_, new_n3231_, new_n3627_ ) -new_n6791_ = NOR ( new_n6790_, new_n3082_ ) -new_n6792_ = NOR ( new_n6791_, new_n5529_ ) -new_n6793_ = NOR ( new_n6792_, new_n6788_ ) -new_n6794_ = NOT ( new_n6596_ ) -new_n6795_ = NOR ( new_n3179_, new_n3442_ ) -new_n6796_ = NOT ( NET_318 ) -new_n6797_ = NOR ( new_n3179_, new_n6796_ ) -new_n6798_ = OR ( new_n6797_, new_n6795_ ) -new_n6799_ = NAND ( new_n6797_, new_n6795_ ) -new_n6800_ = NAND ( new_n6799_, new_n6798_ ) -new_n6801_ = OR ( new_n6800_, new_n6794_ ) -new_n6802_ = NAND ( new_n6737_, new_n3696_, new_n3230_ ) -new_n6803_ = OR ( new_n6802_, new_n6789_ ) -new_n6804_ = NOR ( new_n6803_, new_n3082_ ) -new_n6805_ = NAND ( new_n6804_, NET_445 ) -new_n6806_ = NAND ( new_n6695_, NET_350 ) -new_n6807_ = NAND ( new_n5767_, NET_315 ) -new_n6808_ = NAND ( new_n6807_, new_n6806_, new_n6805_, new_n6801_ ) -new_n6809_ = NOR ( new_n6808_, new_n6793_, new_n6787_ ) -new_n6810_ = NAND ( new_n6809_, new_n6786_, new_n6765_, new_n6729_ ) -new_n6811_ = XOR ( new_n6810_, new_n5529_ ) -new_n6812_ = XOR ( new_n6811_, new_n6714_ ) -new_n6813_ = NAND ( new_n5524_, new_n3696_ ) -new_n6814_ = NAND ( new_n3179_, new_n3029_ ) -new_n6815_ = OR ( new_n3208_, new_n3229_ ) -new_n6816_ = NAND ( new_n6815_, new_n6814_, new_n6813_, new_n6734_ ) -new_n6817_ = OR ( new_n3229_, new_n3069_ ) -new_n6818_ = AND ( new_n6817_, new_n6749_ ) -new_n6819_ = NOR ( new_n6818_, new_n6588_ ) -new_n6820_ = NAND ( new_n3661_, new_n3208_ ) -new_n6821_ = NAND ( new_n3682_, new_n3230_ ) -new_n6822_ = OR ( new_n6590_, new_n3029_ ) -new_n6823_ = NAND ( new_n5763_, new_n3150_ ) -new_n6824_ = NAND ( new_n6823_, new_n6822_, new_n6821_, new_n6820_ ) -new_n6825_ = NOR ( new_n6824_, new_n6819_, new_n6816_ ) -new_n6826_ = OR ( new_n6825_, new_n3082_ ) -new_n6827_ = NOT ( new_n3080_ ) -new_n6828_ = NOR ( new_n6767_, new_n6827_ ) -new_n6829_ = NOT ( new_n6828_ ) -new_n6830_ = NOR ( new_n6829_, new_n5767_ ) -new_n6831_ = NAND ( new_n6728_, NET_317 ) -new_n6832_ = NAND ( new_n6764_, NET_311 ) -new_n6833_ = NAND ( new_n6775_, new_n3696_, NET_176 ) -new_n6834_ = NAND ( new_n6833_, new_n6779_ ) -new_n6835_ = OR ( new_n6834_, new_n6768_ ) -new_n6836_ = NOR ( new_n3253_, new_n3080_ ) -new_n6837_ = NOT ( NET_476 ) -new_n6838_ = NOR ( new_n6792_, new_n6837_ ) -new_n6839_ = NAND ( new_n6596_, new_n3696_, new_n3442_ ) -new_n6840_ = NAND ( new_n6804_, NET_444 ) -new_n6841_ = NAND ( new_n6695_, NET_349 ) -new_n6842_ = NAND ( new_n5767_, NET_316 ) -new_n6843_ = NAND ( new_n6842_, new_n6841_, new_n6840_, new_n6839_ ) -new_n6844_ = NOR ( new_n6843_, new_n6838_, new_n6836_ ) -new_n6845_ = NAND ( new_n6844_, new_n6835_, new_n6832_, new_n6831_ ) -new_n6846_ = NAND ( new_n6845_, new_n6830_, new_n6826_, new_n6706_ ) -new_n6847_ = OR ( new_n6845_, new_n5529_ ) -new_n6848_ = NAND ( new_n6847_, new_n6846_ ) -new_n6849_ = XOR ( new_n6848_, new_n6812_ ) -new_n6850_ = OR ( new_n6849_, new_n6697_ ) -new_n6851_ = OR ( new_n6571_, new_n3073_ ) -new_n6852_ = NAND ( new_n6695_, new_n6571_, new_n3072_ ) -new_n6853_ = OR ( new_n6852_, new_n3250_ ) -NET_16157 = NAND ( new_n6853_, new_n6851_, new_n6850_ ) -new_n6855_ = NOR ( NET_996, new_n3834_ ) -new_n6856_ = NAND ( new_n6855_, new_n3817_ ) -new_n6857_ = NAND ( new_n6856_, new_n6616_, new_n6168_ ) -new_n6858_ = AND ( new_n6129_, new_n4428_, new_n4441_ ) -new_n6859_ = NOR ( new_n4372_, new_n3827_ ) -new_n6860_ = NAND ( new_n6859_, new_n6858_, new_n3975_, new_n3866_ ) -new_n6861_ = NOR ( new_n4431_, new_n3895_ ) -new_n6862_ = NOT ( new_n6861_ ) -new_n6863_ = NOR ( new_n6862_, new_n3827_ ) -new_n6864_ = NOT ( new_n6863_ ) -new_n6865_ = NAND ( new_n6864_, new_n6860_ ) -new_n6866_ = NOT ( new_n6638_ ) -new_n6867_ = NOT ( new_n6855_ ) -new_n6868_ = NOR ( new_n4372_, new_n3775_ ) -new_n6869_ = NOR ( new_n3924_, new_n3975_ ) -new_n6870_ = NAND ( new_n6869_, new_n6868_, new_n4406_, new_n4382_ ) -new_n6871_ = OR ( new_n6870_, new_n4434_, new_n3827_ ) -new_n6872_ = NAND ( new_n6871_, new_n6867_, new_n6866_, new_n4445_ ) -new_n6873_ = NOR ( new_n6872_, new_n6865_ ) -new_n6874_ = NOT ( new_n6873_ ) -new_n6875_ = NOT ( new_n6626_ ) -new_n6876_ = NOR ( new_n6875_, new_n3827_ ) -new_n6877_ = NOT ( new_n6876_ ) -new_n6878_ = OR ( new_n6877_, new_n4381_ ) -new_n6879_ = NAND ( new_n6858_, new_n4405_, new_n4133_ ) -new_n6880_ = NAND ( new_n6858_, new_n3975_, new_n3866_ ) -new_n6881_ = OR ( new_n6880_, new_n6633_ ) -new_n6882_ = AND ( new_n6881_, new_n6879_ ) -new_n6883_ = NOR ( new_n6882_, new_n3827_ ) -new_n6884_ = NOR ( new_n6883_, new_n6863_ ) -new_n6885_ = NAND ( new_n4427_, new_n4382_, new_n3774_ ) -new_n6886_ = NOR ( new_n6885_, new_n4442_, new_n4437_ ) -new_n6887_ = NAND ( new_n6886_, NET_627 ) -new_n6888_ = NAND ( new_n6887_, new_n6884_, new_n6878_, new_n6871_ ) -new_n6889_ = NAND ( new_n6888_, NET_767 ) -new_n6890_ = NAND ( new_n6876_, new_n4381_ ) -new_n6891_ = NOT ( new_n6639_ ) -new_n6892_ = NOR ( new_n6891_, new_n3895_ ) -new_n6893_ = NOR ( new_n3953_, new_n3774_ ) -new_n6894_ = NOR ( new_n6893_, new_n6892_ ) -new_n6895_ = NAND ( new_n6150_, new_n6633_, new_n3774_ ) -new_n6896_ = NAND ( new_n6895_, new_n4427_ ) -new_n6897_ = NOR ( new_n3974_, new_n4372_ ) -new_n6898_ = NAND ( new_n6897_, new_n6130_ ) -new_n6899_ = NAND ( new_n6635_, new_n4382_ ) -new_n6900_ = AND ( new_n6899_, new_n6898_, new_n6896_, new_n6894_ ) -new_n6901_ = OR ( new_n6880_, new_n4405_ ) -new_n6902_ = NOR ( new_n6633_, new_n4372_ ) -new_n6903_ = NAND ( new_n6902_, new_n3974_ ) -new_n6904_ = NAND ( new_n5822_, new_n3974_ ) -new_n6905_ = NAND ( new_n4405_, new_n3866_, new_n3775_ ) -new_n6906_ = AND ( new_n6905_, new_n6904_, new_n6903_ ) -new_n6907_ = AND ( new_n6906_, new_n6901_, new_n6900_ ) -new_n6908_ = NAND ( new_n6129_, new_n3975_ ) -new_n6909_ = NAND ( new_n3974_, new_n3774_ ) -new_n6910_ = NAND ( new_n6897_, new_n4428_ ) -new_n6911_ = NAND ( new_n6910_, new_n6909_, new_n6908_ ) -new_n6912_ = NAND ( new_n6911_, new_n3924_ ) -new_n6913_ = NOT ( new_n6636_ ) -new_n6914_ = OR ( new_n6913_, new_n6624_ ) -new_n6915_ = NAND ( new_n5814_, new_n3814_ ) -new_n6916_ = NAND ( new_n6915_, new_n5823_ ) -new_n6917_ = NAND ( new_n6916_, new_n6132_ ) -new_n6918_ = NAND ( new_n6869_, new_n6129_ ) -new_n6919_ = NAND ( new_n6625_, new_n4092_ ) -new_n6920_ = AND ( new_n6919_, new_n6918_, new_n6917_ ) -new_n6921_ = NAND ( new_n6920_, new_n6914_, new_n6912_, new_n6907_ ) -new_n6922_ = NAND ( new_n6921_, NET_627 ) -new_n6923_ = AND ( new_n6922_, new_n4445_ ) -new_n6924_ = NAND ( new_n6923_, new_n6890_, new_n6866_ ) -new_n6925_ = NAND ( new_n6924_, NET_759 ) -new_n6926_ = NOT ( NET_996 ) -new_n6927_ = NOR ( new_n6926_, new_n3834_ ) -new_n6928_ = NOT ( new_n6927_ ) -new_n6929_ = NAND ( new_n6869_, new_n4433_ ) -new_n6930_ = NAND ( new_n6929_, new_n6625_ ) -new_n6931_ = NAND ( new_n6930_, NET_625 ) -new_n6932_ = NOT ( new_n6161_ ) -new_n6933_ = NAND ( new_n3924_, NET_625 ) -new_n6934_ = NAND ( new_n6933_, new_n6931_, new_n6932_ ) -new_n6935_ = NAND ( new_n6934_, NET_760 ) -new_n6936_ = OR ( new_n6935_, new_n4441_ ) -new_n6937_ = NAND ( new_n6936_, NET_625 ) -new_n6938_ = NAND ( new_n6935_, new_n3998_ ) -new_n6939_ = NAND ( new_n6938_, new_n6937_ ) -new_n6940_ = XOR ( new_n6939_, new_n6931_ ) -new_n6941_ = NAND ( new_n6934_, NET_759 ) -new_n6942_ = OR ( new_n3995_, NET_625 ) -new_n6943_ = NAND ( new_n6942_, new_n6941_ ) -new_n6944_ = NOT ( new_n6943_ ) -new_n6945_ = XOR ( new_n6944_, new_n6940_ ) -new_n6946_ = OR ( new_n6945_, new_n6928_ ) -new_n6947_ = NOR ( new_n3995_, new_n3825_ ) -new_n6948_ = NOT ( NET_926 ) -new_n6949_ = NAND ( new_n6129_, new_n4427_, new_n6633_ ) -new_n6950_ = OR ( new_n6949_, new_n4441_, new_n3976_, new_n4372_ ) -new_n6951_ = NOR ( new_n6950_, new_n3827_ ) -new_n6952_ = NOR ( new_n6951_, new_n5827_ ) -new_n6953_ = NOR ( new_n6952_, new_n6948_ ) -new_n6954_ = NOT ( new_n6641_ ) -new_n6955_ = NOR ( new_n3924_, new_n4187_ ) -new_n6956_ = NOT ( NET_767 ) -new_n6957_ = NOR ( new_n3924_, new_n6956_ ) -new_n6958_ = OR ( new_n6957_, new_n6955_ ) -new_n6959_ = NAND ( new_n6957_, new_n6955_ ) -new_n6960_ = NAND ( new_n6959_, new_n6958_ ) -new_n6961_ = OR ( new_n6960_, new_n6954_ ) -new_n6962_ = NAND ( new_n6897_, new_n4441_, new_n3975_ ) -new_n6963_ = OR ( new_n6962_, new_n6949_ ) -new_n6964_ = NOR ( new_n6963_, new_n3827_ ) -new_n6965_ = NAND ( new_n6964_, NET_894 ) -new_n6966_ = NAND ( new_n6855_, NET_799 ) -new_n6967_ = NAND ( new_n6136_, NET_764 ) -new_n6968_ = NAND ( new_n6967_, new_n6966_, new_n6965_, new_n6961_ ) -new_n6969_ = NOR ( new_n6968_, new_n6953_, new_n6947_ ) -new_n6970_ = NAND ( new_n6969_, new_n6946_, new_n6925_, new_n6889_ ) -new_n6971_ = XOR ( new_n6970_, new_n5827_ ) -new_n6972_ = XOR ( new_n6971_, new_n6874_ ) -new_n6973_ = NAND ( new_n5822_, new_n4441_ ) -new_n6974_ = NAND ( new_n3924_, new_n3774_ ) -new_n6975_ = OR ( new_n3953_, new_n3974_ ) -new_n6976_ = NAND ( new_n6975_, new_n6974_, new_n6973_, new_n6894_ ) -new_n6977_ = OR ( new_n3974_, new_n3814_ ) -new_n6978_ = AND ( new_n6977_, new_n6909_ ) -new_n6979_ = NOR ( new_n6978_, new_n6633_ ) -new_n6980_ = NAND ( new_n4406_, new_n3953_ ) -new_n6981_ = NAND ( new_n4427_, new_n3975_ ) -new_n6982_ = OR ( new_n6635_, new_n3774_ ) -new_n6983_ = NAND ( new_n6132_, new_n3895_ ) -new_n6984_ = NAND ( new_n6983_, new_n6982_, new_n6981_, new_n6980_ ) -new_n6985_ = NOR ( new_n6984_, new_n6979_, new_n6976_ ) -new_n6986_ = OR ( new_n6985_, new_n3827_ ) -new_n6987_ = NOT ( new_n3825_ ) -new_n6988_ = NOR ( new_n6927_, new_n6987_ ) -new_n6989_ = NOT ( new_n6988_ ) -new_n6990_ = NOR ( new_n6989_, new_n6136_ ) -new_n6991_ = NAND ( new_n6888_, NET_766 ) -new_n6992_ = NAND ( new_n6924_, NET_760 ) -new_n6993_ = NAND ( new_n6935_, new_n4441_, NET_625 ) -new_n6994_ = NAND ( new_n6993_, new_n6939_ ) -new_n6995_ = OR ( new_n6994_, new_n6928_ ) -new_n6996_ = NOR ( new_n3998_, new_n3825_ ) -new_n6997_ = NOT ( NET_925 ) -new_n6998_ = NOR ( new_n6952_, new_n6997_ ) -new_n6999_ = NAND ( new_n6641_, new_n4441_, new_n4187_ ) -new_n7000_ = NAND ( new_n6964_, NET_893 ) -new_n7001_ = NAND ( new_n6855_, NET_798 ) -new_n7002_ = NAND ( new_n6136_, NET_765 ) -new_n7003_ = NAND ( new_n7002_, new_n7001_, new_n7000_, new_n6999_ ) -new_n7004_ = NOR ( new_n7003_, new_n6998_, new_n6996_ ) -new_n7005_ = NAND ( new_n7004_, new_n6995_, new_n6992_, new_n6991_ ) -new_n7006_ = NAND ( new_n7005_, new_n6990_, new_n6986_, new_n6866_ ) -new_n7007_ = OR ( new_n7005_, new_n5827_ ) -new_n7008_ = NAND ( new_n7007_, new_n7006_ ) -new_n7009_ = XOR ( new_n7008_, new_n6972_ ) -new_n7010_ = OR ( new_n7009_, new_n6857_ ) -new_n7011_ = OR ( new_n6616_, new_n3818_ ) -new_n7012_ = NAND ( new_n6855_, new_n6616_, new_n3817_ ) -new_n7013_ = OR ( new_n7012_, new_n3995_ ) -NET_16304 = NAND ( new_n7013_, new_n7011_, new_n7010_ ) -new_n7015_ = NOR ( NET_1445, new_n4578_ ) -new_n7016_ = NAND ( new_n7015_, new_n4561_ ) -new_n7017_ = NAND ( new_n7016_, new_n6661_, new_n6553_ ) -new_n7018_ = AND ( new_n6514_, new_n5172_, new_n5185_ ) -new_n7019_ = NOR ( new_n5116_, new_n4571_ ) -new_n7020_ = NAND ( new_n7019_, new_n7018_, new_n4719_, new_n4610_ ) -new_n7021_ = NOR ( new_n5175_, new_n4639_ ) -new_n7022_ = NOT ( new_n7021_ ) -new_n7023_ = NOR ( new_n7022_, new_n4571_ ) -new_n7024_ = NOT ( new_n7023_ ) -new_n7025_ = NAND ( new_n7024_, new_n7020_ ) -new_n7026_ = NOT ( new_n6683_ ) -new_n7027_ = NOT ( new_n7015_ ) -new_n7028_ = NOR ( new_n5116_, new_n4519_ ) -new_n7029_ = NOR ( new_n4668_, new_n4719_ ) -new_n7030_ = NAND ( new_n7029_, new_n7028_, new_n5150_, new_n5126_ ) -new_n7031_ = OR ( new_n7030_, new_n5178_, new_n4571_ ) -new_n7032_ = NAND ( new_n7031_, new_n7027_, new_n7026_, new_n5189_ ) -new_n7033_ = NOR ( new_n7032_, new_n7025_ ) -new_n7034_ = NOT ( new_n7033_ ) -new_n7035_ = NOT ( new_n6671_ ) -new_n7036_ = NOR ( new_n7035_, new_n4571_ ) -new_n7037_ = NOT ( new_n7036_ ) -new_n7038_ = OR ( new_n7037_, new_n5125_ ) -new_n7039_ = NAND ( new_n7018_, new_n5149_, new_n4877_ ) -new_n7040_ = NAND ( new_n7018_, new_n4719_, new_n4610_ ) -new_n7041_ = OR ( new_n7040_, new_n6678_ ) -new_n7042_ = AND ( new_n7041_, new_n7039_ ) -new_n7043_ = NOR ( new_n7042_, new_n4571_ ) -new_n7044_ = NOR ( new_n7043_, new_n7023_ ) -new_n7045_ = NAND ( new_n5171_, new_n5126_, new_n4518_ ) -new_n7046_ = NOR ( new_n7045_, new_n5186_, new_n5181_ ) -new_n7047_ = NAND ( new_n7046_, NET_1076 ) -new_n7048_ = NAND ( new_n7047_, new_n7044_, new_n7038_, new_n7031_ ) -new_n7049_ = NAND ( new_n7048_, NET_1216 ) -new_n7050_ = NAND ( new_n7036_, new_n5125_ ) -new_n7051_ = NOT ( new_n6684_ ) -new_n7052_ = NOR ( new_n7051_, new_n4639_ ) -new_n7053_ = NOR ( new_n4697_, new_n4518_ ) -new_n7054_ = NOR ( new_n7053_, new_n7052_ ) -new_n7055_ = NAND ( new_n6535_, new_n6678_, new_n4518_ ) -new_n7056_ = NAND ( new_n7055_, new_n5171_ ) -new_n7057_ = NOR ( new_n4718_, new_n5116_ ) -new_n7058_ = NAND ( new_n7057_, new_n6515_ ) -new_n7059_ = NAND ( new_n6680_, new_n5126_ ) -new_n7060_ = AND ( new_n7059_, new_n7058_, new_n7056_, new_n7054_ ) -new_n7061_ = OR ( new_n7040_, new_n5149_ ) -new_n7062_ = NOR ( new_n6678_, new_n5116_ ) -new_n7063_ = NAND ( new_n7062_, new_n4718_ ) -new_n7064_ = NAND ( new_n6191_, new_n4718_ ) -new_n7065_ = NAND ( new_n5149_, new_n4610_, new_n4519_ ) -new_n7066_ = AND ( new_n7065_, new_n7064_, new_n7063_ ) -new_n7067_ = AND ( new_n7066_, new_n7061_, new_n7060_ ) -new_n7068_ = NAND ( new_n6514_, new_n4719_ ) -new_n7069_ = NAND ( new_n4718_, new_n4518_ ) -new_n7070_ = NAND ( new_n7057_, new_n5172_ ) -new_n7071_ = NAND ( new_n7070_, new_n7069_, new_n7068_ ) -new_n7072_ = NAND ( new_n7071_, new_n4668_ ) -new_n7073_ = NOT ( new_n6681_ ) -new_n7074_ = OR ( new_n7073_, new_n6669_ ) -new_n7075_ = NAND ( new_n6183_, new_n4558_ ) -new_n7076_ = NAND ( new_n7075_, new_n6192_ ) -new_n7077_ = NAND ( new_n7076_, new_n6517_ ) -new_n7078_ = NAND ( new_n7029_, new_n6514_ ) -new_n7079_ = NAND ( new_n6670_, new_n4836_ ) -new_n7080_ = AND ( new_n7079_, new_n7078_, new_n7077_ ) -new_n7081_ = NAND ( new_n7080_, new_n7074_, new_n7072_, new_n7067_ ) -new_n7082_ = NAND ( new_n7081_, NET_1076 ) -new_n7083_ = AND ( new_n7082_, new_n5189_ ) -new_n7084_ = NAND ( new_n7083_, new_n7050_, new_n7026_ ) -new_n7085_ = NAND ( new_n7084_, NET_1208 ) -new_n7086_ = NOT ( NET_1445 ) -new_n7087_ = NOR ( new_n7086_, new_n4578_ ) -new_n7088_ = NOT ( new_n7087_ ) -new_n7089_ = NAND ( new_n7029_, new_n5177_ ) -new_n7090_ = NAND ( new_n7089_, new_n6670_ ) -new_n7091_ = NAND ( new_n7090_, NET_1074 ) -new_n7092_ = NOT ( new_n6546_ ) -new_n7093_ = NAND ( new_n4668_, NET_1074 ) -new_n7094_ = NAND ( new_n7093_, new_n7091_, new_n7092_ ) -new_n7095_ = NAND ( new_n7094_, NET_1209 ) -new_n7096_ = OR ( new_n7095_, new_n5185_ ) -new_n7097_ = NAND ( new_n7096_, NET_1074 ) -new_n7098_ = NAND ( new_n7095_, new_n4742_ ) -new_n7099_ = NAND ( new_n7098_, new_n7097_ ) -new_n7100_ = XOR ( new_n7099_, new_n7091_ ) -new_n7101_ = NAND ( new_n7094_, NET_1208 ) -new_n7102_ = OR ( new_n4739_, NET_1074 ) -new_n7103_ = NAND ( new_n7102_, new_n7101_ ) -new_n7104_ = NOT ( new_n7103_ ) -new_n7105_ = XOR ( new_n7104_, new_n7100_ ) -new_n7106_ = OR ( new_n7105_, new_n7088_ ) -new_n7107_ = NOR ( new_n4739_, new_n4569_ ) -new_n7108_ = NOT ( NET_1375 ) -new_n7109_ = NAND ( new_n6514_, new_n5171_, new_n6678_ ) -new_n7110_ = OR ( new_n7109_, new_n5185_, new_n4720_, new_n5116_ ) -new_n7111_ = NOR ( new_n7110_, new_n4571_ ) -new_n7112_ = NOR ( new_n7111_, new_n6196_ ) -new_n7113_ = NOR ( new_n7112_, new_n7108_ ) -new_n7114_ = NOT ( new_n6686_ ) -new_n7115_ = NOR ( new_n4668_, new_n4931_ ) -new_n7116_ = NOT ( NET_1216 ) -new_n7117_ = NOR ( new_n4668_, new_n7116_ ) -new_n7118_ = OR ( new_n7117_, new_n7115_ ) -new_n7119_ = NAND ( new_n7117_, new_n7115_ ) -new_n7120_ = NAND ( new_n7119_, new_n7118_ ) -new_n7121_ = OR ( new_n7120_, new_n7114_ ) -new_n7122_ = NAND ( new_n7057_, new_n5185_, new_n4719_ ) -new_n7123_ = OR ( new_n7122_, new_n7109_ ) -new_n7124_ = NOR ( new_n7123_, new_n4571_ ) -new_n7125_ = NAND ( new_n7124_, NET_1343 ) -new_n7126_ = NAND ( new_n7015_, NET_1248 ) -new_n7127_ = NAND ( new_n6521_, NET_1213 ) -new_n7128_ = NAND ( new_n7127_, new_n7126_, new_n7125_, new_n7121_ ) -new_n7129_ = NOR ( new_n7128_, new_n7113_, new_n7107_ ) -new_n7130_ = NAND ( new_n7129_, new_n7106_, new_n7085_, new_n7049_ ) -new_n7131_ = XOR ( new_n7130_, new_n6196_ ) -new_n7132_ = XOR ( new_n7131_, new_n7034_ ) -new_n7133_ = NAND ( new_n6191_, new_n5185_ ) -new_n7134_ = NAND ( new_n4668_, new_n4518_ ) -new_n7135_ = OR ( new_n4697_, new_n4718_ ) -new_n7136_ = NAND ( new_n7135_, new_n7134_, new_n7133_, new_n7054_ ) -new_n7137_ = OR ( new_n4718_, new_n4558_ ) -new_n7138_ = AND ( new_n7137_, new_n7069_ ) -new_n7139_ = NOR ( new_n7138_, new_n6678_ ) -new_n7140_ = NAND ( new_n5150_, new_n4697_ ) -new_n7141_ = NAND ( new_n5171_, new_n4719_ ) -new_n7142_ = OR ( new_n6680_, new_n4518_ ) -new_n7143_ = NAND ( new_n6517_, new_n4639_ ) -new_n7144_ = NAND ( new_n7143_, new_n7142_, new_n7141_, new_n7140_ ) -new_n7145_ = NOR ( new_n7144_, new_n7139_, new_n7136_ ) -new_n7146_ = OR ( new_n7145_, new_n4571_ ) -new_n7147_ = NOT ( new_n4569_ ) -new_n7148_ = NOR ( new_n7087_, new_n7147_ ) -new_n7149_ = NOT ( new_n7148_ ) -new_n7150_ = NOR ( new_n7149_, new_n6521_ ) -new_n7151_ = NAND ( new_n7048_, NET_1215 ) -new_n7152_ = NAND ( new_n7084_, NET_1209 ) -new_n7153_ = NAND ( new_n7095_, new_n5185_, NET_1074 ) -new_n7154_ = NAND ( new_n7153_, new_n7099_ ) -new_n7155_ = OR ( new_n7154_, new_n7088_ ) -new_n7156_ = NOR ( new_n4742_, new_n4569_ ) -new_n7157_ = NOT ( NET_1374 ) -new_n7158_ = NOR ( new_n7112_, new_n7157_ ) -new_n7159_ = NAND ( new_n6686_, new_n5185_, new_n4931_ ) -new_n7160_ = NAND ( new_n7124_, NET_1342 ) -new_n7161_ = NAND ( new_n7015_, NET_1247 ) -new_n7162_ = NAND ( new_n6521_, NET_1214 ) -new_n7163_ = NAND ( new_n7162_, new_n7161_, new_n7160_, new_n7159_ ) -new_n7164_ = NOR ( new_n7163_, new_n7158_, new_n7156_ ) -new_n7165_ = NAND ( new_n7164_, new_n7155_, new_n7152_, new_n7151_ ) -new_n7166_ = NAND ( new_n7165_, new_n7150_, new_n7146_, new_n7026_ ) -new_n7167_ = OR ( new_n7165_, new_n6196_ ) -new_n7168_ = NAND ( new_n7167_, new_n7166_ ) -new_n7169_ = XOR ( new_n7168_, new_n7132_ ) -new_n7170_ = OR ( new_n7169_, new_n7017_ ) -new_n7171_ = OR ( new_n6661_, new_n4562_ ) -new_n7172_ = NAND ( new_n7015_, new_n6661_, new_n4561_ ) -new_n7173_ = OR ( new_n7172_, new_n4739_ ) -NET_16447 = NAND ( new_n7173_, new_n7171_, new_n7170_ ) -new_n7175_ = NOT ( new_n3075_ ) -new_n7176_ = NAND ( NET_314, NET_313 ) -new_n7177_ = OR ( new_n7176_, new_n7175_ ) -new_n7178_ = NAND ( new_n3074_, NET_315, NET_314, NET_313 ) -new_n7179_ = NOR ( new_n6768_, new_n6567_ ) -new_n7180_ = OR ( new_n6784_, new_n6779_ ) -new_n7181_ = NAND ( new_n7180_, new_n6771_ ) -new_n7182_ = NAND ( new_n6784_, new_n6779_ ) -new_n7183_ = NAND ( new_n7182_, new_n7181_ ) -new_n7184_ = NAND ( new_n6774_, NET_309 ) -new_n7185_ = OR ( new_n3262_, NET_176 ) -new_n7186_ = NAND ( new_n7185_, new_n7184_ ) -new_n7187_ = NOR ( new_n7186_, new_n5792_ ) -new_n7188_ = NOT ( new_n7187_ ) -new_n7189_ = NAND ( new_n7186_, new_n5792_ ) -new_n7190_ = NAND ( new_n7189_, new_n7188_ ) -new_n7191_ = XNOR ( new_n7190_, new_n7183_ ) -new_n7192_ = NOR ( new_n7191_, new_n6834_ ) -new_n7193_ = NOT ( new_n6785_ ) -new_n7194_ = NAND ( new_n7189_, new_n7183_ ) -new_n7195_ = NAND ( new_n3263_, new_n3072_ ) -new_n7196_ = NAND ( new_n6774_, NET_308 ) -new_n7197_ = NAND ( new_n7196_, new_n7195_, new_n7194_, new_n7188_ ) -new_n7198_ = NAND ( new_n7196_, new_n7195_ ) -new_n7199_ = OR ( new_n7187_, new_n7183_ ) -new_n7200_ = NAND ( new_n7199_, new_n7198_, new_n7189_ ) -new_n7201_ = NAND ( new_n7200_, new_n7197_ ) -new_n7202_ = AND ( new_n7201_, new_n7193_ ) -new_n7203_ = NAND ( new_n7202_, new_n7192_ ) -new_n7204_ = NAND ( new_n7203_, new_n7179_, new_n3280_ ) -new_n7205_ = NAND ( new_n6695_, new_n6566_ ) -new_n7206_ = NAND ( new_n7205_, new_n7204_ ) -new_n7207_ = NAND ( new_n7206_, new_n7178_ ) -new_n7208_ = NAND ( new_n3280_, NET_176 ) -new_n7209_ = NAND ( new_n7208_, new_n7207_, new_n5786_ ) -new_n7210_ = NAND ( new_n7209_, new_n7177_ ) -new_n7211_ = NAND ( new_n7210_, new_n6566_ ) -new_n7212_ = NAND ( new_n7211_, NET_179 ) -new_n7213_ = NAND ( new_n7203_, new_n7179_ ) -new_n7214_ = OR ( new_n7213_, new_n7178_ ) -new_n7215_ = OR ( new_n7207_, new_n7177_ ) -new_n7216_ = NAND ( new_n7215_, new_n7214_ ) -new_n7217_ = NAND ( new_n7216_, NET_77 ) -new_n7218_ = NOT ( NET_93 ) -new_n7219_ = OR ( new_n7213_, new_n3280_ ) -new_n7220_ = OR ( new_n7219_, new_n7218_ ) -new_n7221_ = NOR ( new_n6567_, new_n5786_ ) -new_n7222_ = NAND ( new_n7221_, new_n3683_ ) -new_n7223_ = NOR ( new_n6567_, new_n5574_ ) -new_n7224_ = NAND ( new_n7223_, NET_176 ) -new_n7225_ = AND ( new_n7224_, new_n7222_ ) -new_n7226_ = OR ( new_n7225_, new_n7177_ ) -new_n7227_ = NOT ( NET_101 ) -new_n7228_ = NOT ( new_n7179_ ) -new_n7229_ = NOR ( new_n7228_, new_n7227_ ) -new_n7230_ = NOT ( new_n7229_ ) -new_n7231_ = OR ( new_n7230_, new_n7203_ ) -new_n7232_ = NOR ( new_n3280_, new_n3072_ ) -new_n7233_ = NOR ( new_n7178_, new_n6707_ ) -new_n7234_ = OR ( new_n7233_, new_n7232_ ) -new_n7235_ = NAND ( new_n7234_, new_n7223_ ) -new_n7236_ = AND ( new_n7235_, new_n7231_, new_n7226_ ) -NET_16606 = NAND ( new_n7236_, new_n7220_, new_n7217_, new_n7212_ ) -new_n7238_ = NAND ( new_n7211_, NET_180 ) -new_n7239_ = NAND ( new_n7216_, NET_76 ) -new_n7240_ = NOT ( NET_92 ) -new_n7241_ = OR ( new_n7219_, new_n7240_ ) -new_n7242_ = NAND ( new_n7221_, new_n3069_ ) -new_n7243_ = NOR ( new_n6567_, new_n5579_ ) -new_n7244_ = NAND ( new_n7243_, NET_176 ) -new_n7245_ = NAND ( new_n7244_, new_n7242_ ) -new_n7246_ = NOT ( new_n7245_ ) -new_n7247_ = OR ( new_n7246_, new_n7177_ ) -new_n7248_ = NOT ( NET_100 ) -new_n7249_ = NOR ( new_n7228_, new_n7248_ ) -new_n7250_ = NOT ( new_n7249_ ) -new_n7251_ = OR ( new_n7250_, new_n7203_ ) -new_n7252_ = NAND ( new_n7243_, new_n7234_ ) -new_n7253_ = AND ( new_n7252_, new_n7251_, new_n7247_ ) -NET_16607 = NAND ( new_n7253_, new_n7241_, new_n7239_, new_n7238_ ) -new_n7255_ = NAND ( new_n7211_, NET_181 ) -new_n7256_ = NAND ( new_n7216_, NET_75 ) -new_n7257_ = NOT ( NET_91 ) -new_n7258_ = OR ( new_n7219_, new_n7257_ ) -new_n7259_ = NAND ( new_n7221_, new_n3229_ ) -new_n7260_ = NOR ( new_n6567_, new_n5584_ ) -new_n7261_ = NAND ( new_n7260_, NET_176 ) -new_n7262_ = NAND ( new_n7261_, new_n7259_ ) -new_n7263_ = NOT ( new_n7262_ ) -new_n7264_ = OR ( new_n7263_, new_n7177_ ) -new_n7265_ = NOT ( NET_99 ) -new_n7266_ = NOR ( new_n7228_, new_n7265_ ) -new_n7267_ = NOT ( new_n7266_ ) -new_n7268_ = OR ( new_n7267_, new_n7203_ ) -new_n7269_ = NAND ( new_n7260_, new_n7234_ ) -new_n7270_ = AND ( new_n7269_, new_n7268_, new_n7264_ ) -NET_16608 = NAND ( new_n7270_, new_n7258_, new_n7256_, new_n7255_ ) -new_n7272_ = NAND ( new_n7211_, NET_182 ) -new_n7273_ = NAND ( new_n7216_, NET_74 ) -new_n7274_ = NOT ( NET_90 ) -new_n7275_ = OR ( new_n7219_, new_n7274_ ) -new_n7276_ = NAND ( new_n7221_, new_n3660_ ) -new_n7277_ = NOR ( new_n6567_, new_n5589_ ) -new_n7278_ = NAND ( new_n7277_, NET_176 ) -new_n7279_ = AND ( new_n7278_, new_n7276_ ) -new_n7280_ = OR ( new_n7279_, new_n7177_ ) -new_n7281_ = NOT ( NET_98 ) -new_n7282_ = NOR ( new_n7228_, new_n7281_ ) -new_n7283_ = NOT ( new_n7282_ ) -new_n7284_ = OR ( new_n7283_, new_n7203_ ) -new_n7285_ = NAND ( new_n7277_, new_n7234_ ) -new_n7286_ = AND ( new_n7285_, new_n7284_, new_n7280_ ) -NET_16609 = NAND ( new_n7286_, new_n7275_, new_n7273_, new_n7272_ ) -new_n7288_ = NAND ( new_n7211_, NET_183 ) -new_n7289_ = NAND ( new_n7216_, NET_73 ) -new_n7290_ = NOT ( NET_89 ) -new_n7291_ = OR ( new_n7219_, new_n7290_ ) -new_n7292_ = NAND ( new_n7221_, new_n3030_ ) -new_n7293_ = NOR ( new_n6567_, new_n5594_ ) -new_n7294_ = NAND ( new_n7293_, NET_176 ) -new_n7295_ = AND ( new_n7294_, new_n7292_ ) -new_n7296_ = OR ( new_n7295_, new_n7177_ ) -new_n7297_ = NOT ( NET_97 ) -new_n7298_ = NOR ( new_n7228_, new_n7297_ ) -new_n7299_ = NOT ( new_n7298_ ) -new_n7300_ = OR ( new_n7299_, new_n7203_ ) -new_n7301_ = NAND ( new_n7293_, new_n7234_ ) -new_n7302_ = AND ( new_n7301_, new_n7300_, new_n7296_ ) -NET_16610 = NAND ( new_n7302_, new_n7291_, new_n7289_, new_n7288_ ) -new_n7304_ = NAND ( new_n7211_, NET_184 ) -new_n7305_ = NAND ( new_n7216_, NET_72 ) -new_n7306_ = NOT ( NET_88 ) -new_n7307_ = OR ( new_n7219_, new_n7306_ ) -new_n7308_ = NAND ( new_n7221_, new_n3637_ ) -new_n7309_ = NOR ( new_n6567_, new_n5599_ ) -new_n7310_ = NAND ( new_n7309_, NET_176 ) -new_n7311_ = AND ( new_n7310_, new_n7308_ ) -new_n7312_ = OR ( new_n7311_, new_n7177_ ) -new_n7313_ = NOT ( NET_96 ) -new_n7314_ = NOR ( new_n7228_, new_n7313_ ) -new_n7315_ = NOT ( new_n7314_ ) -new_n7316_ = OR ( new_n7315_, new_n7203_ ) -new_n7317_ = NAND ( new_n7309_, new_n7234_ ) -new_n7318_ = AND ( new_n7317_, new_n7316_, new_n7312_ ) -NET_16611 = NAND ( new_n7318_, new_n7307_, new_n7305_, new_n7304_ ) -new_n7320_ = NAND ( new_n7211_, NET_185 ) -new_n7321_ = NAND ( new_n7216_, NET_71 ) -new_n7322_ = NOT ( NET_87 ) -new_n7323_ = OR ( new_n7219_, new_n7322_ ) -new_n7324_ = NAND ( new_n7221_, new_n3150_ ) -new_n7325_ = NOR ( new_n6567_, new_n5604_ ) -new_n7326_ = NAND ( new_n7325_, NET_176 ) -new_n7327_ = NAND ( new_n7326_, new_n7324_ ) -new_n7328_ = NOT ( new_n7327_ ) -new_n7329_ = OR ( new_n7328_, new_n7177_ ) -new_n7330_ = NOT ( NET_95 ) -new_n7331_ = NOR ( new_n7228_, new_n7330_ ) -new_n7332_ = NOT ( new_n7331_ ) -new_n7333_ = OR ( new_n7332_, new_n7203_ ) -new_n7334_ = NAND ( new_n7325_, new_n7234_ ) -new_n7335_ = AND ( new_n7334_, new_n7333_, new_n7329_ ) -NET_16612 = NAND ( new_n7335_, new_n7323_, new_n7321_, new_n7320_ ) -new_n7337_ = NAND ( new_n7211_, NET_186 ) -new_n7338_ = NAND ( new_n7216_, NET_70 ) -new_n7339_ = NOT ( NET_86 ) -new_n7340_ = OR ( new_n7219_, new_n7339_ ) -new_n7341_ = NAND ( new_n7221_, new_n3179_ ) -new_n7342_ = NOR ( new_n6567_, new_n5609_ ) -new_n7343_ = NAND ( new_n7342_, NET_176 ) -new_n7344_ = NAND ( new_n7343_, new_n7341_ ) -new_n7345_ = NOT ( new_n7344_ ) -new_n7346_ = OR ( new_n7345_, new_n7177_ ) -new_n7347_ = NOT ( NET_94 ) -new_n7348_ = NOR ( new_n7228_, new_n7347_ ) -new_n7349_ = NOT ( new_n7348_ ) -new_n7350_ = OR ( new_n7349_, new_n7203_ ) -new_n7351_ = NAND ( new_n7342_, new_n7234_ ) -new_n7352_ = AND ( new_n7351_, new_n7350_, new_n7346_ ) -NET_16613 = NAND ( new_n7352_, new_n7340_, new_n7338_, new_n7337_ ) -new_n7354_ = NAND ( new_n3214_, NET_314, NET_313 ) -new_n7355_ = NAND ( NET_316, new_n3073_, NET_314, NET_313 ) -new_n7356_ = NOT ( new_n6834_ ) -new_n7357_ = NOR ( new_n7191_, new_n7356_ ) -new_n7358_ = NAND ( new_n7357_, new_n7202_ ) -new_n7359_ = NAND ( new_n7358_, new_n7179_, new_n3278_ ) -new_n7360_ = NAND ( new_n7359_, new_n7205_ ) -new_n7361_ = NAND ( new_n7360_, new_n7355_ ) -new_n7362_ = NAND ( new_n3278_, NET_176 ) -new_n7363_ = NAND ( new_n7362_, new_n7361_, new_n5786_ ) -new_n7364_ = NAND ( new_n7363_, new_n7354_ ) -new_n7365_ = NAND ( new_n7364_, new_n6566_ ) -new_n7366_ = NAND ( new_n7365_, NET_187 ) -new_n7367_ = OR ( new_n7359_, new_n7355_ ) -new_n7368_ = OR ( new_n7361_, new_n7354_ ) -new_n7369_ = NAND ( new_n7368_, new_n7367_ ) -new_n7370_ = NAND ( new_n7369_, NET_77 ) -new_n7371_ = NOT ( new_n7358_ ) -new_n7372_ = OR ( new_n7371_, new_n7228_, new_n3278_ ) -new_n7373_ = OR ( new_n7372_, new_n7218_ ) -new_n7374_ = OR ( new_n7354_, new_n7225_ ) -new_n7375_ = NOR ( new_n3278_, new_n3072_ ) -new_n7376_ = NOR ( new_n7355_, new_n6707_ ) -new_n7377_ = OR ( new_n7376_, new_n7375_ ) -new_n7378_ = NAND ( new_n7377_, new_n7223_ ) -new_n7379_ = NAND ( new_n7371_, new_n7229_ ) -new_n7380_ = AND ( new_n7379_, new_n7378_, new_n7374_ ) -NET_16614 = NAND ( new_n7380_, new_n7373_, new_n7370_, new_n7366_ ) -new_n7382_ = NAND ( new_n7365_, NET_188 ) -new_n7383_ = NAND ( new_n7369_, NET_76 ) -new_n7384_ = OR ( new_n7372_, new_n7240_ ) -new_n7385_ = OR ( new_n7354_, new_n7246_ ) -new_n7386_ = NAND ( new_n7377_, new_n7243_ ) -new_n7387_ = NAND ( new_n7371_, new_n7249_ ) -new_n7388_ = AND ( new_n7387_, new_n7386_, new_n7385_ ) -NET_16615 = NAND ( new_n7388_, new_n7384_, new_n7383_, new_n7382_ ) -new_n7390_ = NAND ( new_n7365_, NET_189 ) -new_n7391_ = NAND ( new_n7369_, NET_75 ) -new_n7392_ = OR ( new_n7372_, new_n7257_ ) -new_n7393_ = OR ( new_n7354_, new_n7263_ ) -new_n7394_ = NAND ( new_n7377_, new_n7260_ ) -new_n7395_ = NAND ( new_n7371_, new_n7266_ ) -new_n7396_ = AND ( new_n7395_, new_n7394_, new_n7393_ ) -NET_16616 = NAND ( new_n7396_, new_n7392_, new_n7391_, new_n7390_ ) -new_n7398_ = NAND ( new_n7365_, NET_190 ) -new_n7399_ = NAND ( new_n7369_, NET_74 ) -new_n7400_ = OR ( new_n7372_, new_n7274_ ) -new_n7401_ = OR ( new_n7354_, new_n7279_ ) -new_n7402_ = NAND ( new_n7377_, new_n7277_ ) -new_n7403_ = NAND ( new_n7371_, new_n7282_ ) -new_n7404_ = AND ( new_n7403_, new_n7402_, new_n7401_ ) -NET_16617 = NAND ( new_n7404_, new_n7400_, new_n7399_, new_n7398_ ) -new_n7406_ = NAND ( new_n7365_, NET_191 ) -new_n7407_ = NAND ( new_n7369_, NET_73 ) -new_n7408_ = OR ( new_n7372_, new_n7290_ ) -new_n7409_ = OR ( new_n7354_, new_n7295_ ) -new_n7410_ = NAND ( new_n7377_, new_n7293_ ) -new_n7411_ = NAND ( new_n7371_, new_n7298_ ) -new_n7412_ = AND ( new_n7411_, new_n7410_, new_n7409_ ) -NET_16618 = NAND ( new_n7412_, new_n7408_, new_n7407_, new_n7406_ ) -new_n7414_ = NAND ( new_n7365_, NET_192 ) -new_n7415_ = NAND ( new_n7369_, NET_72 ) -new_n7416_ = OR ( new_n7372_, new_n7306_ ) -new_n7417_ = OR ( new_n7354_, new_n7311_ ) -new_n7418_ = NAND ( new_n7377_, new_n7309_ ) -new_n7419_ = NAND ( new_n7371_, new_n7314_ ) -new_n7420_ = AND ( new_n7419_, new_n7418_, new_n7417_ ) -NET_16619 = NAND ( new_n7420_, new_n7416_, new_n7415_, new_n7414_ ) -new_n7422_ = NAND ( new_n7365_, NET_193 ) -new_n7423_ = NAND ( new_n7369_, NET_71 ) -new_n7424_ = OR ( new_n7372_, new_n7322_ ) -new_n7425_ = OR ( new_n7354_, new_n7328_ ) -new_n7426_ = NAND ( new_n7377_, new_n7325_ ) -new_n7427_ = NAND ( new_n7371_, new_n7331_ ) -new_n7428_ = AND ( new_n7427_, new_n7426_, new_n7425_ ) -NET_16620 = NAND ( new_n7428_, new_n7424_, new_n7423_, new_n7422_ ) -new_n7430_ = NAND ( new_n7365_, NET_194 ) -new_n7431_ = NAND ( new_n7369_, NET_70 ) -new_n7432_ = OR ( new_n7372_, new_n7339_ ) -new_n7433_ = OR ( new_n7354_, new_n7345_ ) -new_n7434_ = NAND ( new_n7377_, new_n7342_ ) -new_n7435_ = NAND ( new_n7371_, new_n7348_ ) -new_n7436_ = AND ( new_n7435_, new_n7434_, new_n7433_ ) -NET_16621 = NAND ( new_n7436_, new_n7432_, new_n7431_, new_n7430_ ) -new_n7438_ = NAND ( new_n3213_, NET_314, NET_313 ) -new_n7439_ = NAND ( new_n3074_, new_n3073_, NET_314, NET_313 ) -new_n7440_ = AND ( new_n7201_, new_n6785_ ) -new_n7441_ = NAND ( new_n7440_, new_n7192_ ) -new_n7442_ = NAND ( new_n7441_, new_n7179_, new_n3276_ ) -new_n7443_ = NAND ( new_n7442_, new_n7205_ ) -new_n7444_ = NAND ( new_n7443_, new_n7439_ ) -new_n7445_ = NAND ( new_n3276_, NET_176 ) -new_n7446_ = NAND ( new_n7445_, new_n7444_, new_n5786_ ) -new_n7447_ = NAND ( new_n7446_, new_n7438_ ) -new_n7448_ = NAND ( new_n7447_, new_n6566_ ) -new_n7449_ = NAND ( new_n7448_, NET_195 ) -new_n7450_ = OR ( new_n7442_, new_n7439_ ) -new_n7451_ = OR ( new_n7444_, new_n7438_ ) -new_n7452_ = NAND ( new_n7451_, new_n7450_ ) -new_n7453_ = NAND ( new_n7452_, NET_77 ) -new_n7454_ = NOT ( new_n7441_ ) -new_n7455_ = OR ( new_n7454_, new_n7228_, new_n3276_ ) -new_n7456_ = OR ( new_n7455_, new_n7218_ ) -new_n7457_ = OR ( new_n7438_, new_n7225_ ) -new_n7458_ = NOR ( new_n3276_, new_n3072_ ) -new_n7459_ = NOR ( new_n7439_, new_n6707_ ) -new_n7460_ = OR ( new_n7459_, new_n7458_ ) -new_n7461_ = NAND ( new_n7460_, new_n7223_ ) -new_n7462_ = NAND ( new_n7454_, new_n7229_ ) -new_n7463_ = AND ( new_n7462_, new_n7461_, new_n7457_ ) -NET_16622 = NAND ( new_n7463_, new_n7456_, new_n7453_, new_n7449_ ) -new_n7465_ = NAND ( new_n7448_, NET_196 ) -new_n7466_ = NAND ( new_n7452_, NET_76 ) -new_n7467_ = OR ( new_n7455_, new_n7240_ ) -new_n7468_ = OR ( new_n7438_, new_n7246_ ) -new_n7469_ = NAND ( new_n7460_, new_n7243_ ) -new_n7470_ = NAND ( new_n7454_, new_n7249_ ) -new_n7471_ = AND ( new_n7470_, new_n7469_, new_n7468_ ) -NET_16623 = NAND ( new_n7471_, new_n7467_, new_n7466_, new_n7465_ ) -new_n7473_ = NAND ( new_n7448_, NET_197 ) -new_n7474_ = NAND ( new_n7452_, NET_75 ) -new_n7475_ = OR ( new_n7455_, new_n7257_ ) -new_n7476_ = OR ( new_n7438_, new_n7263_ ) -new_n7477_ = NAND ( new_n7460_, new_n7260_ ) -new_n7478_ = NAND ( new_n7454_, new_n7266_ ) -new_n7479_ = AND ( new_n7478_, new_n7477_, new_n7476_ ) -NET_16624 = NAND ( new_n7479_, new_n7475_, new_n7474_, new_n7473_ ) -new_n7481_ = NAND ( new_n7448_, NET_198 ) -new_n7482_ = NAND ( new_n7452_, NET_74 ) -new_n7483_ = OR ( new_n7455_, new_n7274_ ) -new_n7484_ = OR ( new_n7438_, new_n7279_ ) -new_n7485_ = NAND ( new_n7460_, new_n7277_ ) -new_n7486_ = NAND ( new_n7454_, new_n7282_ ) -new_n7487_ = AND ( new_n7486_, new_n7485_, new_n7484_ ) -NET_16625 = NAND ( new_n7487_, new_n7483_, new_n7482_, new_n7481_ ) -new_n7489_ = NAND ( new_n7448_, NET_199 ) -new_n7490_ = NAND ( new_n7452_, NET_73 ) -new_n7491_ = OR ( new_n7455_, new_n7290_ ) -new_n7492_ = OR ( new_n7438_, new_n7295_ ) -new_n7493_ = NAND ( new_n7460_, new_n7293_ ) -new_n7494_ = NAND ( new_n7454_, new_n7298_ ) -new_n7495_ = AND ( new_n7494_, new_n7493_, new_n7492_ ) -NET_16626 = NAND ( new_n7495_, new_n7491_, new_n7490_, new_n7489_ ) -new_n7497_ = NAND ( new_n7448_, NET_200 ) -new_n7498_ = NAND ( new_n7452_, NET_72 ) -new_n7499_ = OR ( new_n7455_, new_n7306_ ) -new_n7500_ = OR ( new_n7438_, new_n7311_ ) -new_n7501_ = NAND ( new_n7460_, new_n7309_ ) -new_n7502_ = NAND ( new_n7454_, new_n7314_ ) -new_n7503_ = AND ( new_n7502_, new_n7501_, new_n7500_ ) -NET_16627 = NAND ( new_n7503_, new_n7499_, new_n7498_, new_n7497_ ) -new_n7505_ = NAND ( new_n7448_, NET_201 ) -new_n7506_ = NAND ( new_n7452_, NET_71 ) -new_n7507_ = OR ( new_n7455_, new_n7322_ ) -new_n7508_ = OR ( new_n7438_, new_n7328_ ) -new_n7509_ = NAND ( new_n7460_, new_n7325_ ) -new_n7510_ = NAND ( new_n7454_, new_n7331_ ) -new_n7511_ = AND ( new_n7510_, new_n7509_, new_n7508_ ) -NET_16628 = NAND ( new_n7511_, new_n7507_, new_n7506_, new_n7505_ ) -new_n7513_ = NAND ( new_n7448_, NET_202 ) -new_n7514_ = NAND ( new_n7452_, NET_70 ) -new_n7515_ = OR ( new_n7455_, new_n7339_ ) -new_n7516_ = OR ( new_n7438_, new_n7345_ ) -new_n7517_ = NAND ( new_n7460_, new_n7342_ ) -new_n7518_ = NAND ( new_n7454_, new_n7348_ ) -new_n7519_ = AND ( new_n7518_, new_n7517_, new_n7516_ ) -NET_16629 = NAND ( new_n7519_, new_n7515_, new_n7514_, new_n7513_ ) -new_n7521_ = NOR ( NET_316, NET_315 ) -new_n7522_ = NOT ( new_n7521_ ) -new_n7523_ = NOR ( new_n7522_, new_n7176_ ) -new_n7524_ = NOT ( new_n7523_ ) -new_n7525_ = NAND ( new_n3075_, new_n3079_, NET_313 ) -new_n7526_ = NAND ( new_n7440_, new_n7357_ ) -new_n7527_ = NAND ( new_n7526_, new_n7179_, new_n3291_ ) -new_n7528_ = NAND ( new_n7527_, new_n7205_ ) -new_n7529_ = NAND ( new_n7528_, new_n7525_ ) -new_n7530_ = NAND ( new_n3291_, NET_176 ) -new_n7531_ = NAND ( new_n7530_, new_n7529_, new_n5786_ ) -new_n7532_ = NAND ( new_n7531_, new_n7524_ ) -new_n7533_ = NAND ( new_n7532_, new_n6566_ ) -new_n7534_ = NAND ( new_n7533_, NET_203 ) -new_n7535_ = OR ( new_n7527_, new_n7525_ ) -new_n7536_ = OR ( new_n7529_, new_n7524_ ) -new_n7537_ = NAND ( new_n7536_, new_n7535_ ) -new_n7538_ = NAND ( new_n7537_, NET_77 ) -new_n7539_ = NAND ( new_n7526_, new_n7179_ ) -new_n7540_ = OR ( new_n7539_, new_n3291_ ) -new_n7541_ = OR ( new_n7540_, new_n7218_ ) -new_n7542_ = OR ( new_n7524_, new_n7225_ ) -new_n7543_ = NOR ( new_n3291_, new_n3072_ ) -new_n7544_ = NOR ( new_n7525_, new_n6707_ ) -new_n7545_ = OR ( new_n7544_, new_n7543_ ) -new_n7546_ = NAND ( new_n7545_, new_n7223_ ) -new_n7547_ = OR ( new_n7526_, new_n7230_ ) -new_n7548_ = AND ( new_n7547_, new_n7546_, new_n7542_ ) -NET_16630 = NAND ( new_n7548_, new_n7541_, new_n7538_, new_n7534_ ) -new_n7550_ = NAND ( new_n7533_, NET_204 ) -new_n7551_ = NAND ( new_n7537_, NET_76 ) -new_n7552_ = OR ( new_n7540_, new_n7240_ ) -new_n7553_ = NAND ( new_n7523_, new_n7245_ ) -new_n7554_ = NAND ( new_n7545_, new_n7243_ ) -new_n7555_ = OR ( new_n7526_, new_n7250_ ) -new_n7556_ = AND ( new_n7555_, new_n7554_, new_n7553_ ) -NET_16631 = NAND ( new_n7556_, new_n7552_, new_n7551_, new_n7550_ ) -new_n7558_ = NAND ( new_n7533_, NET_205 ) -new_n7559_ = NAND ( new_n7537_, NET_75 ) -new_n7560_ = OR ( new_n7540_, new_n7257_ ) -new_n7561_ = NAND ( new_n7523_, new_n7262_ ) -new_n7562_ = NAND ( new_n7545_, new_n7260_ ) -new_n7563_ = OR ( new_n7526_, new_n7267_ ) -new_n7564_ = AND ( new_n7563_, new_n7562_, new_n7561_ ) -NET_16632 = NAND ( new_n7564_, new_n7560_, new_n7559_, new_n7558_ ) -new_n7566_ = NAND ( new_n7533_, NET_206 ) -new_n7567_ = NAND ( new_n7537_, NET_74 ) -new_n7568_ = OR ( new_n7540_, new_n7274_ ) -new_n7569_ = OR ( new_n7524_, new_n7279_ ) -new_n7570_ = NAND ( new_n7545_, new_n7277_ ) -new_n7571_ = OR ( new_n7526_, new_n7283_ ) -new_n7572_ = AND ( new_n7571_, new_n7570_, new_n7569_ ) -NET_16633 = NAND ( new_n7572_, new_n7568_, new_n7567_, new_n7566_ ) -new_n7574_ = NAND ( new_n7533_, NET_207 ) -new_n7575_ = NAND ( new_n7537_, NET_73 ) -new_n7576_ = OR ( new_n7540_, new_n7290_ ) -new_n7577_ = OR ( new_n7524_, new_n7295_ ) -new_n7578_ = NAND ( new_n7545_, new_n7293_ ) -new_n7579_ = OR ( new_n7526_, new_n7299_ ) -new_n7580_ = AND ( new_n7579_, new_n7578_, new_n7577_ ) -NET_16634 = NAND ( new_n7580_, new_n7576_, new_n7575_, new_n7574_ ) -new_n7582_ = NAND ( new_n7533_, NET_208 ) -new_n7583_ = NAND ( new_n7537_, NET_72 ) -new_n7584_ = OR ( new_n7540_, new_n7306_ ) -new_n7585_ = OR ( new_n7524_, new_n7311_ ) -new_n7586_ = NAND ( new_n7545_, new_n7309_ ) -new_n7587_ = OR ( new_n7526_, new_n7315_ ) -new_n7588_ = AND ( new_n7587_, new_n7586_, new_n7585_ ) -NET_16635 = NAND ( new_n7588_, new_n7584_, new_n7583_, new_n7582_ ) -new_n7590_ = NAND ( new_n7533_, NET_209 ) -new_n7591_ = NAND ( new_n7537_, NET_71 ) -new_n7592_ = OR ( new_n7540_, new_n7322_ ) -new_n7593_ = NAND ( new_n7523_, new_n7327_ ) -new_n7594_ = NAND ( new_n7545_, new_n7325_ ) -new_n7595_ = OR ( new_n7526_, new_n7332_ ) -new_n7596_ = AND ( new_n7595_, new_n7594_, new_n7593_ ) -NET_16636 = NAND ( new_n7596_, new_n7592_, new_n7591_, new_n7590_ ) -new_n7598_ = NAND ( new_n7533_, NET_210 ) -new_n7599_ = NAND ( new_n7537_, NET_70 ) -new_n7600_ = OR ( new_n7540_, new_n7339_ ) -new_n7601_ = NAND ( new_n7523_, new_n7344_ ) -new_n7602_ = NAND ( new_n7545_, new_n7342_ ) -new_n7603_ = OR ( new_n7526_, new_n7349_ ) -new_n7604_ = AND ( new_n7603_, new_n7602_, new_n7601_ ) -NET_16637 = NAND ( new_n7604_, new_n7600_, new_n7599_, new_n7598_ ) -new_n7606_ = OR ( new_n3241_, new_n7175_ ) -new_n7607_ = NAND ( new_n3074_, NET_315, new_n3079_, NET_313 ) -new_n7608_ = NOT ( new_n7191_ ) -new_n7609_ = NOR ( new_n7608_, new_n6834_ ) -new_n7610_ = NAND ( new_n7609_, new_n7202_ ) -new_n7611_ = NAND ( new_n7610_, new_n7179_, new_n3289_ ) -new_n7612_ = NAND ( new_n7611_, new_n7205_ ) -new_n7613_ = NAND ( new_n7612_, new_n7607_ ) -new_n7614_ = NAND ( new_n3289_, NET_176 ) -new_n7615_ = NAND ( new_n7614_, new_n7613_, new_n5786_ ) -new_n7616_ = NAND ( new_n7615_, new_n7606_ ) -new_n7617_ = NAND ( new_n7616_, new_n6566_ ) -new_n7618_ = NAND ( new_n7617_, NET_211 ) -new_n7619_ = NAND ( new_n7610_, new_n7179_ ) -new_n7620_ = OR ( new_n7619_, new_n7607_ ) -new_n7621_ = OR ( new_n7613_, new_n7606_ ) -new_n7622_ = NAND ( new_n7621_, new_n7620_ ) -new_n7623_ = NAND ( new_n7622_, NET_77 ) -new_n7624_ = OR ( new_n7619_, new_n3289_ ) -new_n7625_ = OR ( new_n7624_, new_n7218_ ) -new_n7626_ = OR ( new_n7606_, new_n7225_ ) -new_n7627_ = NOR ( new_n3289_, new_n3072_ ) -new_n7628_ = NOR ( new_n7607_, new_n6707_ ) -new_n7629_ = OR ( new_n7628_, new_n7627_ ) -new_n7630_ = NAND ( new_n7629_, new_n7223_ ) -new_n7631_ = OR ( new_n7610_, new_n7230_ ) -new_n7632_ = AND ( new_n7631_, new_n7630_, new_n7626_ ) -NET_16638 = NAND ( new_n7632_, new_n7625_, new_n7623_, new_n7618_ ) -new_n7634_ = NAND ( new_n7617_, NET_212 ) -new_n7635_ = NAND ( new_n7622_, NET_76 ) -new_n7636_ = OR ( new_n7624_, new_n7240_ ) -new_n7637_ = OR ( new_n7606_, new_n7246_ ) -new_n7638_ = NAND ( new_n7629_, new_n7243_ ) -new_n7639_ = OR ( new_n7610_, new_n7250_ ) -new_n7640_ = AND ( new_n7639_, new_n7638_, new_n7637_ ) -NET_16639 = NAND ( new_n7640_, new_n7636_, new_n7635_, new_n7634_ ) -new_n7642_ = NAND ( new_n7617_, NET_213 ) -new_n7643_ = NAND ( new_n7622_, NET_75 ) -new_n7644_ = OR ( new_n7624_, new_n7257_ ) -new_n7645_ = OR ( new_n7606_, new_n7263_ ) -new_n7646_ = NAND ( new_n7629_, new_n7260_ ) -new_n7647_ = OR ( new_n7610_, new_n7267_ ) -new_n7648_ = AND ( new_n7647_, new_n7646_, new_n7645_ ) -NET_16640 = NAND ( new_n7648_, new_n7644_, new_n7643_, new_n7642_ ) -new_n7650_ = NAND ( new_n7617_, NET_214 ) -new_n7651_ = NAND ( new_n7622_, NET_74 ) -new_n7652_ = OR ( new_n7624_, new_n7274_ ) -new_n7653_ = OR ( new_n7606_, new_n7279_ ) -new_n7654_ = NAND ( new_n7629_, new_n7277_ ) -new_n7655_ = OR ( new_n7610_, new_n7283_ ) -new_n7656_ = AND ( new_n7655_, new_n7654_, new_n7653_ ) -NET_16641 = NAND ( new_n7656_, new_n7652_, new_n7651_, new_n7650_ ) -new_n7658_ = NAND ( new_n7617_, NET_215 ) -new_n7659_ = NAND ( new_n7622_, NET_73 ) -new_n7660_ = OR ( new_n7624_, new_n7290_ ) -new_n7661_ = OR ( new_n7606_, new_n7295_ ) -new_n7662_ = NAND ( new_n7629_, new_n7293_ ) -new_n7663_ = OR ( new_n7610_, new_n7299_ ) -new_n7664_ = AND ( new_n7663_, new_n7662_, new_n7661_ ) -NET_16642 = NAND ( new_n7664_, new_n7660_, new_n7659_, new_n7658_ ) -new_n7666_ = NAND ( new_n7617_, NET_216 ) -new_n7667_ = NAND ( new_n7622_, NET_72 ) -new_n7668_ = OR ( new_n7624_, new_n7306_ ) -new_n7669_ = OR ( new_n7606_, new_n7311_ ) -new_n7670_ = NAND ( new_n7629_, new_n7309_ ) -new_n7671_ = OR ( new_n7610_, new_n7315_ ) -new_n7672_ = AND ( new_n7671_, new_n7670_, new_n7669_ ) -NET_16643 = NAND ( new_n7672_, new_n7668_, new_n7667_, new_n7666_ ) -new_n7674_ = NAND ( new_n7617_, NET_217 ) -new_n7675_ = NAND ( new_n7622_, NET_71 ) -new_n7676_ = OR ( new_n7624_, new_n7322_ ) -new_n7677_ = OR ( new_n7606_, new_n7328_ ) -new_n7678_ = NAND ( new_n7629_, new_n7325_ ) -new_n7679_ = OR ( new_n7610_, new_n7332_ ) -new_n7680_ = AND ( new_n7679_, new_n7678_, new_n7677_ ) -NET_16644 = NAND ( new_n7680_, new_n7676_, new_n7675_, new_n7674_ ) -new_n7682_ = NAND ( new_n7617_, NET_218 ) -new_n7683_ = NAND ( new_n7622_, NET_70 ) -new_n7684_ = OR ( new_n7624_, new_n7339_ ) -new_n7685_ = OR ( new_n7606_, new_n7345_ ) -new_n7686_ = NAND ( new_n7629_, new_n7342_ ) -new_n7687_ = OR ( new_n7610_, new_n7349_ ) -new_n7688_ = AND ( new_n7687_, new_n7686_, new_n7685_ ) -NET_16645 = NAND ( new_n7688_, new_n7684_, new_n7683_, new_n7682_ ) -new_n7690_ = NAND ( new_n3214_, new_n3079_, NET_313 ) -new_n7691_ = NAND ( NET_316, new_n3073_, new_n3079_, NET_313 ) -new_n7692_ = NOR ( new_n7608_, new_n7356_ ) -new_n7693_ = NAND ( new_n7692_, new_n7202_ ) -new_n7694_ = NAND ( new_n7693_, new_n7179_, new_n3287_ ) -new_n7695_ = NAND ( new_n7694_, new_n7205_ ) -new_n7696_ = NAND ( new_n7695_, new_n7691_ ) -new_n7697_ = NAND ( new_n3287_, NET_176 ) -new_n7698_ = NAND ( new_n7697_, new_n7696_, new_n5786_ ) -new_n7699_ = NAND ( new_n7698_, new_n7690_ ) -new_n7700_ = NAND ( new_n7699_, new_n6566_ ) -new_n7701_ = NAND ( new_n7700_, NET_219 ) -new_n7702_ = OR ( new_n7694_, new_n7691_ ) -new_n7703_ = OR ( new_n7696_, new_n7690_ ) -new_n7704_ = NAND ( new_n7703_, new_n7702_ ) -new_n7705_ = NAND ( new_n7704_, NET_77 ) -new_n7706_ = NOT ( new_n7693_ ) -new_n7707_ = OR ( new_n7706_, new_n7228_, new_n3287_ ) -new_n7708_ = OR ( new_n7707_, new_n7218_ ) -new_n7709_ = OR ( new_n7690_, new_n7225_ ) -new_n7710_ = NOR ( new_n3287_, new_n3072_ ) -new_n7711_ = NOR ( new_n7691_, new_n6707_ ) -new_n7712_ = OR ( new_n7711_, new_n7710_ ) -new_n7713_ = NAND ( new_n7712_, new_n7223_ ) -new_n7714_ = NAND ( new_n7706_, new_n7229_ ) -new_n7715_ = AND ( new_n7714_, new_n7713_, new_n7709_ ) -NET_16646 = NAND ( new_n7715_, new_n7708_, new_n7705_, new_n7701_ ) -new_n7717_ = NAND ( new_n7700_, NET_220 ) -new_n7718_ = NAND ( new_n7704_, NET_76 ) -new_n7719_ = OR ( new_n7707_, new_n7240_ ) -new_n7720_ = OR ( new_n7690_, new_n7246_ ) -new_n7721_ = NAND ( new_n7712_, new_n7243_ ) -new_n7722_ = NAND ( new_n7706_, new_n7249_ ) -new_n7723_ = AND ( new_n7722_, new_n7721_, new_n7720_ ) -NET_16647 = NAND ( new_n7723_, new_n7719_, new_n7718_, new_n7717_ ) -new_n7725_ = NAND ( new_n7700_, NET_221 ) -new_n7726_ = NAND ( new_n7704_, NET_75 ) -new_n7727_ = OR ( new_n7707_, new_n7257_ ) -new_n7728_ = OR ( new_n7690_, new_n7263_ ) -new_n7729_ = NAND ( new_n7712_, new_n7260_ ) -new_n7730_ = NAND ( new_n7706_, new_n7266_ ) -new_n7731_ = AND ( new_n7730_, new_n7729_, new_n7728_ ) -NET_16648 = NAND ( new_n7731_, new_n7727_, new_n7726_, new_n7725_ ) -new_n7733_ = NAND ( new_n7700_, NET_222 ) -new_n7734_ = NAND ( new_n7704_, NET_74 ) -new_n7735_ = OR ( new_n7707_, new_n7274_ ) -new_n7736_ = OR ( new_n7690_, new_n7279_ ) -new_n7737_ = NAND ( new_n7712_, new_n7277_ ) -new_n7738_ = NAND ( new_n7706_, new_n7282_ ) -new_n7739_ = AND ( new_n7738_, new_n7737_, new_n7736_ ) -NET_16649 = NAND ( new_n7739_, new_n7735_, new_n7734_, new_n7733_ ) -new_n7741_ = NAND ( new_n7700_, NET_223 ) -new_n7742_ = NAND ( new_n7704_, NET_73 ) -new_n7743_ = OR ( new_n7707_, new_n7290_ ) -new_n7744_ = OR ( new_n7690_, new_n7295_ ) -new_n7745_ = NAND ( new_n7712_, new_n7293_ ) -new_n7746_ = NAND ( new_n7706_, new_n7298_ ) -new_n7747_ = AND ( new_n7746_, new_n7745_, new_n7744_ ) -NET_16650 = NAND ( new_n7747_, new_n7743_, new_n7742_, new_n7741_ ) -new_n7749_ = NAND ( new_n7700_, NET_224 ) -new_n7750_ = NAND ( new_n7704_, NET_72 ) -new_n7751_ = OR ( new_n7707_, new_n7306_ ) -new_n7752_ = OR ( new_n7690_, new_n7311_ ) -new_n7753_ = NAND ( new_n7712_, new_n7309_ ) -new_n7754_ = NAND ( new_n7706_, new_n7314_ ) -new_n7755_ = AND ( new_n7754_, new_n7753_, new_n7752_ ) -NET_16651 = NAND ( new_n7755_, new_n7751_, new_n7750_, new_n7749_ ) -new_n7757_ = NAND ( new_n7700_, NET_225 ) -new_n7758_ = NAND ( new_n7704_, NET_71 ) -new_n7759_ = OR ( new_n7707_, new_n7322_ ) -new_n7760_ = OR ( new_n7690_, new_n7328_ ) -new_n7761_ = NAND ( new_n7712_, new_n7325_ ) -new_n7762_ = NAND ( new_n7706_, new_n7331_ ) -new_n7763_ = AND ( new_n7762_, new_n7761_, new_n7760_ ) -NET_16652 = NAND ( new_n7763_, new_n7759_, new_n7758_, new_n7757_ ) -new_n7765_ = NAND ( new_n7700_, NET_226 ) -new_n7766_ = NAND ( new_n7704_, NET_70 ) -new_n7767_ = OR ( new_n7707_, new_n7339_ ) -new_n7768_ = OR ( new_n7690_, new_n7345_ ) -new_n7769_ = NAND ( new_n7712_, new_n7342_ ) -new_n7770_ = NAND ( new_n7706_, new_n7348_ ) -new_n7771_ = AND ( new_n7770_, new_n7769_, new_n7768_ ) -NET_16653 = NAND ( new_n7771_, new_n7767_, new_n7766_, new_n7765_ ) -new_n7773_ = NAND ( new_n3213_, new_n3079_, NET_313 ) -new_n7774_ = NAND ( new_n3074_, new_n3073_, new_n3079_, NET_313 ) -new_n7775_ = NAND ( new_n7609_, new_n7440_ ) -new_n7776_ = NAND ( new_n7775_, new_n7179_, new_n3285_ ) -new_n7777_ = NAND ( new_n7776_, new_n7205_ ) -new_n7778_ = NAND ( new_n7777_, new_n7774_ ) -new_n7779_ = NAND ( new_n3285_, NET_176 ) -new_n7780_ = NAND ( new_n7779_, new_n7778_, new_n5786_ ) -new_n7781_ = NAND ( new_n7780_, new_n7773_ ) -new_n7782_ = NAND ( new_n7781_, new_n6566_ ) -new_n7783_ = NAND ( new_n7782_, NET_227 ) -new_n7784_ = OR ( new_n7776_, new_n7774_ ) -new_n7785_ = OR ( new_n7778_, new_n7773_ ) -new_n7786_ = NAND ( new_n7785_, new_n7784_ ) -new_n7787_ = NAND ( new_n7786_, NET_77 ) -new_n7788_ = NOT ( new_n7775_ ) -new_n7789_ = OR ( new_n7788_, new_n7228_, new_n3285_ ) -new_n7790_ = OR ( new_n7789_, new_n7218_ ) -new_n7791_ = OR ( new_n7773_, new_n7225_ ) -new_n7792_ = NOR ( new_n3285_, new_n3072_ ) -new_n7793_ = NOR ( new_n7774_, new_n6707_ ) -new_n7794_ = OR ( new_n7793_, new_n7792_ ) -new_n7795_ = NAND ( new_n7794_, new_n7223_ ) -new_n7796_ = NAND ( new_n7788_, new_n7229_ ) -new_n7797_ = AND ( new_n7796_, new_n7795_, new_n7791_ ) -NET_16654 = NAND ( new_n7797_, new_n7790_, new_n7787_, new_n7783_ ) -new_n7799_ = NAND ( new_n7782_, NET_228 ) -new_n7800_ = NAND ( new_n7786_, NET_76 ) -new_n7801_ = OR ( new_n7789_, new_n7240_ ) -new_n7802_ = OR ( new_n7773_, new_n7246_ ) -new_n7803_ = NAND ( new_n7794_, new_n7243_ ) -new_n7804_ = NAND ( new_n7788_, new_n7249_ ) -new_n7805_ = AND ( new_n7804_, new_n7803_, new_n7802_ ) -NET_16655 = NAND ( new_n7805_, new_n7801_, new_n7800_, new_n7799_ ) -new_n7807_ = NAND ( new_n7782_, NET_229 ) -new_n7808_ = NAND ( new_n7786_, NET_75 ) -new_n7809_ = OR ( new_n7789_, new_n7257_ ) -new_n7810_ = OR ( new_n7773_, new_n7263_ ) -new_n7811_ = NAND ( new_n7794_, new_n7260_ ) -new_n7812_ = NAND ( new_n7788_, new_n7266_ ) -new_n7813_ = AND ( new_n7812_, new_n7811_, new_n7810_ ) -NET_16656 = NAND ( new_n7813_, new_n7809_, new_n7808_, new_n7807_ ) -new_n7815_ = NAND ( new_n7782_, NET_230 ) -new_n7816_ = NAND ( new_n7786_, NET_74 ) -new_n7817_ = OR ( new_n7789_, new_n7274_ ) -new_n7818_ = OR ( new_n7773_, new_n7279_ ) -new_n7819_ = NAND ( new_n7794_, new_n7277_ ) -new_n7820_ = NAND ( new_n7788_, new_n7282_ ) -new_n7821_ = AND ( new_n7820_, new_n7819_, new_n7818_ ) -NET_16657 = NAND ( new_n7821_, new_n7817_, new_n7816_, new_n7815_ ) -new_n7823_ = NAND ( new_n7782_, NET_231 ) -new_n7824_ = NAND ( new_n7786_, NET_73 ) -new_n7825_ = OR ( new_n7789_, new_n7290_ ) -new_n7826_ = OR ( new_n7773_, new_n7295_ ) -new_n7827_ = NAND ( new_n7794_, new_n7293_ ) -new_n7828_ = NAND ( new_n7788_, new_n7298_ ) -new_n7829_ = AND ( new_n7828_, new_n7827_, new_n7826_ ) -NET_16658 = NAND ( new_n7829_, new_n7825_, new_n7824_, new_n7823_ ) -new_n7831_ = NAND ( new_n7782_, NET_232 ) -new_n7832_ = NAND ( new_n7786_, NET_72 ) -new_n7833_ = OR ( new_n7789_, new_n7306_ ) -new_n7834_ = OR ( new_n7773_, new_n7311_ ) -new_n7835_ = NAND ( new_n7794_, new_n7309_ ) -new_n7836_ = NAND ( new_n7788_, new_n7314_ ) -new_n7837_ = AND ( new_n7836_, new_n7835_, new_n7834_ ) -NET_16659 = NAND ( new_n7837_, new_n7833_, new_n7832_, new_n7831_ ) -new_n7839_ = NAND ( new_n7782_, NET_233 ) -new_n7840_ = NAND ( new_n7786_, NET_71 ) -new_n7841_ = OR ( new_n7789_, new_n7322_ ) -new_n7842_ = OR ( new_n7773_, new_n7328_ ) -new_n7843_ = NAND ( new_n7794_, new_n7325_ ) -new_n7844_ = NAND ( new_n7788_, new_n7331_ ) -new_n7845_ = AND ( new_n7844_, new_n7843_, new_n7842_ ) -NET_16660 = NAND ( new_n7845_, new_n7841_, new_n7840_, new_n7839_ ) -new_n7847_ = NAND ( new_n7782_, NET_234 ) -new_n7848_ = NAND ( new_n7786_, NET_70 ) -new_n7849_ = OR ( new_n7789_, new_n7339_ ) -new_n7850_ = OR ( new_n7773_, new_n7345_ ) -new_n7851_ = NAND ( new_n7794_, new_n7342_ ) -new_n7852_ = NAND ( new_n7788_, new_n7348_ ) -new_n7853_ = AND ( new_n7852_, new_n7851_, new_n7850_ ) -NET_16661 = NAND ( new_n7853_, new_n7849_, new_n7848_, new_n7847_ ) -new_n7855_ = OR ( new_n7522_, new_n3241_ ) -new_n7856_ = NAND ( new_n3075_, NET_314, new_n3238_ ) -new_n7857_ = NAND ( new_n7692_, new_n7440_ ) -new_n7858_ = NAND ( new_n7857_, new_n7179_, new_n3264_ ) -new_n7859_ = NAND ( new_n7858_, new_n7205_ ) -new_n7860_ = NAND ( new_n7859_, new_n7856_ ) -new_n7861_ = NAND ( new_n3264_, NET_176 ) -new_n7862_ = NAND ( new_n7861_, new_n7860_, new_n5786_ ) -new_n7863_ = NAND ( new_n7862_, new_n7855_ ) -new_n7864_ = NAND ( new_n7863_, new_n6566_ ) -new_n7865_ = NAND ( new_n7864_, NET_235 ) -new_n7866_ = OR ( new_n7858_, new_n7856_ ) -new_n7867_ = OR ( new_n7860_, new_n7855_ ) -new_n7868_ = NAND ( new_n7867_, new_n7866_ ) -new_n7869_ = NAND ( new_n7868_, NET_77 ) -new_n7870_ = NAND ( new_n7857_, new_n7179_ ) -new_n7871_ = OR ( new_n7870_, new_n3264_ ) -new_n7872_ = OR ( new_n7871_, new_n7218_ ) -new_n7873_ = OR ( new_n7855_, new_n7225_ ) -new_n7874_ = NOR ( new_n3264_, new_n3072_ ) -new_n7875_ = NOR ( new_n7856_, new_n6707_ ) -new_n7876_ = OR ( new_n7875_, new_n7874_ ) -new_n7877_ = NAND ( new_n7876_, new_n7223_ ) -new_n7878_ = OR ( new_n7857_, new_n7230_ ) -new_n7879_ = AND ( new_n7878_, new_n7877_, new_n7873_ ) -NET_16662 = NAND ( new_n7879_, new_n7872_, new_n7869_, new_n7865_ ) -new_n7881_ = NAND ( new_n7864_, NET_236 ) -new_n7882_ = NAND ( new_n7868_, NET_76 ) -new_n7883_ = OR ( new_n7871_, new_n7240_ ) -new_n7884_ = OR ( new_n7855_, new_n7246_ ) -new_n7885_ = NAND ( new_n7876_, new_n7243_ ) -new_n7886_ = OR ( new_n7857_, new_n7250_ ) -new_n7887_ = AND ( new_n7886_, new_n7885_, new_n7884_ ) -NET_16663 = NAND ( new_n7887_, new_n7883_, new_n7882_, new_n7881_ ) -new_n7889_ = NAND ( new_n7864_, NET_237 ) -new_n7890_ = NAND ( new_n7868_, NET_75 ) -new_n7891_ = OR ( new_n7871_, new_n7257_ ) -new_n7892_ = OR ( new_n7855_, new_n7263_ ) -new_n7893_ = NAND ( new_n7876_, new_n7260_ ) -new_n7894_ = OR ( new_n7857_, new_n7267_ ) -new_n7895_ = AND ( new_n7894_, new_n7893_, new_n7892_ ) -NET_16664 = NAND ( new_n7895_, new_n7891_, new_n7890_, new_n7889_ ) -new_n7897_ = NAND ( new_n7864_, NET_238 ) -new_n7898_ = NAND ( new_n7868_, NET_74 ) -new_n7899_ = OR ( new_n7871_, new_n7274_ ) -new_n7900_ = OR ( new_n7855_, new_n7279_ ) -new_n7901_ = NAND ( new_n7876_, new_n7277_ ) -new_n7902_ = OR ( new_n7857_, new_n7283_ ) -new_n7903_ = AND ( new_n7902_, new_n7901_, new_n7900_ ) -NET_16665 = NAND ( new_n7903_, new_n7899_, new_n7898_, new_n7897_ ) -new_n7905_ = NAND ( new_n7864_, NET_239 ) -new_n7906_ = NAND ( new_n7868_, NET_73 ) -new_n7907_ = OR ( new_n7871_, new_n7290_ ) -new_n7908_ = OR ( new_n7855_, new_n7295_ ) -new_n7909_ = NAND ( new_n7876_, new_n7293_ ) -new_n7910_ = OR ( new_n7857_, new_n7299_ ) -new_n7911_ = AND ( new_n7910_, new_n7909_, new_n7908_ ) -NET_16666 = NAND ( new_n7911_, new_n7907_, new_n7906_, new_n7905_ ) -new_n7913_ = NAND ( new_n7864_, NET_240 ) -new_n7914_ = NAND ( new_n7868_, NET_72 ) -new_n7915_ = OR ( new_n7871_, new_n7306_ ) -new_n7916_ = OR ( new_n7855_, new_n7311_ ) -new_n7917_ = NAND ( new_n7876_, new_n7309_ ) -new_n7918_ = OR ( new_n7857_, new_n7315_ ) -new_n7919_ = AND ( new_n7918_, new_n7917_, new_n7916_ ) -NET_16667 = NAND ( new_n7919_, new_n7915_, new_n7914_, new_n7913_ ) -new_n7921_ = NAND ( new_n7864_, NET_241 ) -new_n7922_ = NAND ( new_n7868_, NET_71 ) -new_n7923_ = OR ( new_n7871_, new_n7322_ ) -new_n7924_ = OR ( new_n7855_, new_n7328_ ) -new_n7925_ = NAND ( new_n7876_, new_n7325_ ) -new_n7926_ = OR ( new_n7857_, new_n7332_ ) -new_n7927_ = AND ( new_n7926_, new_n7925_, new_n7924_ ) -NET_16668 = NAND ( new_n7927_, new_n7923_, new_n7922_, new_n7921_ ) -new_n7929_ = NAND ( new_n7864_, NET_242 ) -new_n7930_ = NAND ( new_n7868_, NET_70 ) -new_n7931_ = OR ( new_n7871_, new_n7339_ ) -new_n7932_ = OR ( new_n7855_, new_n7345_ ) -new_n7933_ = NAND ( new_n7876_, new_n7342_ ) -new_n7934_ = OR ( new_n7857_, new_n7349_ ) -new_n7935_ = AND ( new_n7934_, new_n7933_, new_n7932_ ) -NET_16669 = NAND ( new_n7935_, new_n7931_, new_n7930_, new_n7929_ ) -new_n7937_ = NAND ( new_n3074_, NET_315, NET_314, new_n3238_ ) -new_n7938_ = NOR ( new_n7201_, new_n6785_ ) -new_n7939_ = NAND ( new_n7938_, new_n7192_ ) -new_n7940_ = NAND ( new_n7939_, new_n7179_, new_n3260_ ) -new_n7941_ = NAND ( new_n7940_, new_n7205_ ) -new_n7942_ = NAND ( new_n7941_, new_n7937_ ) -new_n7943_ = NAND ( new_n3260_, NET_176 ) -new_n7944_ = NAND ( new_n7943_, new_n7942_, new_n5786_ ) -new_n7945_ = NAND ( new_n7944_, new_n3239_ ) -new_n7946_ = NAND ( new_n7945_, new_n6566_ ) -new_n7947_ = NAND ( new_n7946_, NET_243 ) -new_n7948_ = NAND ( new_n7939_, new_n7179_ ) -new_n7949_ = OR ( new_n7948_, new_n7937_ ) -new_n7950_ = OR ( new_n7942_, new_n3239_ ) -new_n7951_ = NAND ( new_n7950_, new_n7949_ ) -new_n7952_ = NAND ( new_n7951_, NET_77 ) -new_n7953_ = OR ( new_n7948_, new_n3260_ ) -new_n7954_ = OR ( new_n7953_, new_n7218_ ) -new_n7955_ = OR ( new_n7225_, new_n3239_ ) -new_n7956_ = NOR ( new_n7937_, new_n6707_ ) -new_n7957_ = NOR ( new_n3260_, new_n3072_ ) -new_n7958_ = OR ( new_n7957_, new_n7956_ ) -new_n7959_ = NAND ( new_n7958_, new_n7223_ ) -new_n7960_ = OR ( new_n7939_, new_n7230_ ) -new_n7961_ = AND ( new_n7960_, new_n7959_, new_n7955_ ) -NET_16670 = NAND ( new_n7961_, new_n7954_, new_n7952_, new_n7947_ ) -new_n7963_ = NAND ( new_n7946_, NET_244 ) -new_n7964_ = NAND ( new_n7951_, NET_76 ) -new_n7965_ = OR ( new_n7953_, new_n7240_ ) -new_n7966_ = OR ( new_n7246_, new_n3239_ ) -new_n7967_ = NAND ( new_n7958_, new_n7243_ ) -new_n7968_ = OR ( new_n7939_, new_n7250_ ) -new_n7969_ = AND ( new_n7968_, new_n7967_, new_n7966_ ) -NET_16671 = NAND ( new_n7969_, new_n7965_, new_n7964_, new_n7963_ ) -new_n7971_ = NAND ( new_n7946_, NET_245 ) -new_n7972_ = NAND ( new_n7951_, NET_75 ) -new_n7973_ = OR ( new_n7953_, new_n7257_ ) -new_n7974_ = OR ( new_n7263_, new_n3239_ ) -new_n7975_ = NAND ( new_n7958_, new_n7260_ ) -new_n7976_ = OR ( new_n7939_, new_n7267_ ) -new_n7977_ = AND ( new_n7976_, new_n7975_, new_n7974_ ) -NET_16672 = NAND ( new_n7977_, new_n7973_, new_n7972_, new_n7971_ ) -new_n7979_ = NAND ( new_n7946_, NET_246 ) -new_n7980_ = NAND ( new_n7951_, NET_74 ) -new_n7981_ = OR ( new_n7953_, new_n7274_ ) -new_n7982_ = OR ( new_n7279_, new_n3239_ ) -new_n7983_ = NAND ( new_n7958_, new_n7277_ ) -new_n7984_ = OR ( new_n7939_, new_n7283_ ) -new_n7985_ = AND ( new_n7984_, new_n7983_, new_n7982_ ) -NET_16673 = NAND ( new_n7985_, new_n7981_, new_n7980_, new_n7979_ ) -new_n7987_ = NAND ( new_n7946_, NET_247 ) -new_n7988_ = NAND ( new_n7951_, NET_73 ) -new_n7989_ = OR ( new_n7953_, new_n7290_ ) -new_n7990_ = OR ( new_n7295_, new_n3239_ ) -new_n7991_ = NAND ( new_n7958_, new_n7293_ ) -new_n7992_ = OR ( new_n7939_, new_n7299_ ) -new_n7993_ = AND ( new_n7992_, new_n7991_, new_n7990_ ) -NET_16674 = NAND ( new_n7993_, new_n7989_, new_n7988_, new_n7987_ ) -new_n7995_ = NAND ( new_n7946_, NET_248 ) -new_n7996_ = NAND ( new_n7951_, NET_72 ) -new_n7997_ = OR ( new_n7953_, new_n7306_ ) -new_n7998_ = OR ( new_n7311_, new_n3239_ ) -new_n7999_ = NAND ( new_n7958_, new_n7309_ ) -new_n8000_ = OR ( new_n7939_, new_n7315_ ) -new_n8001_ = AND ( new_n8000_, new_n7999_, new_n7998_ ) -NET_16675 = NAND ( new_n8001_, new_n7997_, new_n7996_, new_n7995_ ) -new_n8003_ = NAND ( new_n7946_, NET_249 ) -new_n8004_ = NAND ( new_n7951_, NET_71 ) -new_n8005_ = OR ( new_n7953_, new_n7322_ ) -new_n8006_ = OR ( new_n7328_, new_n3239_ ) -new_n8007_ = NAND ( new_n7958_, new_n7325_ ) -new_n8008_ = OR ( new_n7939_, new_n7332_ ) -new_n8009_ = AND ( new_n8008_, new_n8007_, new_n8006_ ) -NET_16676 = NAND ( new_n8009_, new_n8005_, new_n8004_, new_n8003_ ) -new_n8011_ = NAND ( new_n7946_, NET_250 ) -new_n8012_ = NAND ( new_n7951_, NET_70 ) -new_n8013_ = OR ( new_n7953_, new_n7339_ ) -new_n8014_ = OR ( new_n7345_, new_n3239_ ) -new_n8015_ = NAND ( new_n7958_, new_n7342_ ) -new_n8016_ = OR ( new_n7939_, new_n7349_ ) -new_n8017_ = AND ( new_n8016_, new_n8015_, new_n8014_ ) -NET_16677 = NAND ( new_n8017_, new_n8013_, new_n8012_, new_n8011_ ) -new_n8019_ = NAND ( new_n3214_, NET_314, new_n3238_ ) -new_n8020_ = NAND ( NET_316, new_n3073_, NET_314, new_n3238_ ) -new_n8021_ = NAND ( new_n7938_, new_n7357_ ) -new_n8022_ = NAND ( new_n8021_, new_n7179_, new_n3258_ ) -new_n8023_ = NAND ( new_n8022_, new_n7205_ ) -new_n8024_ = NAND ( new_n8023_, new_n8020_ ) -new_n8025_ = NAND ( new_n3258_, NET_176 ) -new_n8026_ = NAND ( new_n8025_, new_n8024_, new_n5786_ ) -new_n8027_ = NAND ( new_n8026_, new_n8019_ ) -new_n8028_ = NAND ( new_n8027_, new_n6566_ ) -new_n8029_ = NAND ( new_n8028_, NET_251 ) -new_n8030_ = OR ( new_n8022_, new_n8020_ ) -new_n8031_ = OR ( new_n8024_, new_n8019_ ) -new_n8032_ = NAND ( new_n8031_, new_n8030_ ) -new_n8033_ = NAND ( new_n8032_, NET_77 ) -new_n8034_ = NAND ( new_n8021_, new_n7179_ ) -new_n8035_ = OR ( new_n8034_, new_n3258_ ) -new_n8036_ = OR ( new_n8035_, new_n7218_ ) -new_n8037_ = OR ( new_n8019_, new_n7225_ ) -new_n8038_ = NOR ( new_n8020_, new_n6707_ ) -new_n8039_ = NOR ( new_n3258_, new_n3072_ ) -new_n8040_ = OR ( new_n8039_, new_n8038_ ) -new_n8041_ = NAND ( new_n8040_, new_n7223_ ) -new_n8042_ = OR ( new_n8021_, new_n7230_ ) -new_n8043_ = AND ( new_n8042_, new_n8041_, new_n8037_ ) -NET_16678 = NAND ( new_n8043_, new_n8036_, new_n8033_, new_n8029_ ) -new_n8045_ = NAND ( new_n8028_, NET_252 ) -new_n8046_ = NAND ( new_n8032_, NET_76 ) -new_n8047_ = OR ( new_n8035_, new_n7240_ ) -new_n8048_ = OR ( new_n8019_, new_n7246_ ) -new_n8049_ = NAND ( new_n8040_, new_n7243_ ) -new_n8050_ = OR ( new_n8021_, new_n7250_ ) -new_n8051_ = AND ( new_n8050_, new_n8049_, new_n8048_ ) -NET_16679 = NAND ( new_n8051_, new_n8047_, new_n8046_, new_n8045_ ) -new_n8053_ = NAND ( new_n8028_, NET_253 ) -new_n8054_ = NAND ( new_n8032_, NET_75 ) -new_n8055_ = OR ( new_n8035_, new_n7257_ ) -new_n8056_ = OR ( new_n8019_, new_n7263_ ) -new_n8057_ = NAND ( new_n8040_, new_n7260_ ) -new_n8058_ = OR ( new_n8021_, new_n7267_ ) -new_n8059_ = AND ( new_n8058_, new_n8057_, new_n8056_ ) -NET_16680 = NAND ( new_n8059_, new_n8055_, new_n8054_, new_n8053_ ) -new_n8061_ = NAND ( new_n8028_, NET_254 ) -new_n8062_ = NAND ( new_n8032_, NET_74 ) -new_n8063_ = OR ( new_n8035_, new_n7274_ ) -new_n8064_ = OR ( new_n8019_, new_n7279_ ) -new_n8065_ = NAND ( new_n8040_, new_n7277_ ) -new_n8066_ = OR ( new_n8021_, new_n7283_ ) -new_n8067_ = AND ( new_n8066_, new_n8065_, new_n8064_ ) -NET_16681 = NAND ( new_n8067_, new_n8063_, new_n8062_, new_n8061_ ) -new_n8069_ = NAND ( new_n8028_, NET_255 ) -new_n8070_ = NAND ( new_n8032_, NET_73 ) -new_n8071_ = OR ( new_n8035_, new_n7290_ ) -new_n8072_ = OR ( new_n8019_, new_n7295_ ) -new_n8073_ = NAND ( new_n8040_, new_n7293_ ) -new_n8074_ = OR ( new_n8021_, new_n7299_ ) -new_n8075_ = AND ( new_n8074_, new_n8073_, new_n8072_ ) -NET_16682 = NAND ( new_n8075_, new_n8071_, new_n8070_, new_n8069_ ) -new_n8077_ = NAND ( new_n8028_, NET_256 ) -new_n8078_ = NAND ( new_n8032_, NET_72 ) -new_n8079_ = OR ( new_n8035_, new_n7306_ ) -new_n8080_ = OR ( new_n8019_, new_n7311_ ) -new_n8081_ = NAND ( new_n8040_, new_n7309_ ) -new_n8082_ = OR ( new_n8021_, new_n7315_ ) -new_n8083_ = AND ( new_n8082_, new_n8081_, new_n8080_ ) -NET_16683 = NAND ( new_n8083_, new_n8079_, new_n8078_, new_n8077_ ) -new_n8085_ = NAND ( new_n8028_, NET_257 ) -new_n8086_ = NAND ( new_n8032_, NET_71 ) -new_n8087_ = OR ( new_n8035_, new_n7322_ ) -new_n8088_ = OR ( new_n8019_, new_n7328_ ) -new_n8089_ = NAND ( new_n8040_, new_n7325_ ) -new_n8090_ = OR ( new_n8021_, new_n7332_ ) -new_n8091_ = AND ( new_n8090_, new_n8089_, new_n8088_ ) -NET_16684 = NAND ( new_n8091_, new_n8087_, new_n8086_, new_n8085_ ) -new_n8093_ = NAND ( new_n8028_, NET_258 ) -new_n8094_ = NAND ( new_n8032_, NET_70 ) -new_n8095_ = OR ( new_n8035_, new_n7339_ ) -new_n8096_ = OR ( new_n8019_, new_n7345_ ) -new_n8097_ = NAND ( new_n8040_, new_n7342_ ) -new_n8098_ = OR ( new_n8021_, new_n7349_ ) -new_n8099_ = AND ( new_n8098_, new_n8097_, new_n8096_ ) -NET_16685 = NAND ( new_n8099_, new_n8095_, new_n8094_, new_n8093_ ) -new_n8101_ = NAND ( new_n3213_, NET_314, new_n3238_ ) -new_n8102_ = NAND ( new_n3074_, new_n3073_, NET_314, new_n3238_ ) -new_n8103_ = NOR ( new_n7201_, new_n7193_ ) -new_n8104_ = NAND ( new_n8103_, new_n7192_ ) -new_n8105_ = NAND ( new_n8104_, new_n7179_, new_n3255_ ) -new_n8106_ = NAND ( new_n8105_, new_n7205_ ) -new_n8107_ = NAND ( new_n8106_, new_n8102_ ) -new_n8108_ = NAND ( new_n3255_, NET_176 ) -new_n8109_ = NAND ( new_n8108_, new_n8107_, new_n5786_ ) -new_n8110_ = NAND ( new_n8109_, new_n8101_ ) -new_n8111_ = NAND ( new_n8110_, new_n6566_ ) -new_n8112_ = NAND ( new_n8111_, NET_259 ) -new_n8113_ = NAND ( new_n8104_, new_n7179_ ) -new_n8114_ = OR ( new_n8113_, new_n8102_ ) -new_n8115_ = OR ( new_n8107_, new_n8101_ ) -new_n8116_ = NAND ( new_n8115_, new_n8114_ ) -new_n8117_ = NAND ( new_n8116_, NET_77 ) -new_n8118_ = OR ( new_n8113_, new_n3255_ ) -new_n8119_ = OR ( new_n8118_, new_n7218_ ) -new_n8120_ = OR ( new_n8101_, new_n7225_ ) -new_n8121_ = NOR ( new_n8102_, new_n6707_ ) -new_n8122_ = NOR ( new_n3255_, new_n3072_ ) -new_n8123_ = OR ( new_n8122_, new_n8121_ ) -new_n8124_ = NAND ( new_n8123_, new_n7223_ ) -new_n8125_ = OR ( new_n8104_, new_n7230_ ) -new_n8126_ = AND ( new_n8125_, new_n8124_, new_n8120_ ) -NET_16686 = NAND ( new_n8126_, new_n8119_, new_n8117_, new_n8112_ ) -new_n8128_ = NAND ( new_n8111_, NET_260 ) -new_n8129_ = NAND ( new_n8116_, NET_76 ) -new_n8130_ = OR ( new_n8118_, new_n7240_ ) -new_n8131_ = OR ( new_n8101_, new_n7246_ ) -new_n8132_ = NAND ( new_n8123_, new_n7243_ ) -new_n8133_ = OR ( new_n8104_, new_n7250_ ) -new_n8134_ = AND ( new_n8133_, new_n8132_, new_n8131_ ) -NET_16687 = NAND ( new_n8134_, new_n8130_, new_n8129_, new_n8128_ ) -new_n8136_ = NAND ( new_n8111_, NET_261 ) -new_n8137_ = NAND ( new_n8116_, NET_75 ) -new_n8138_ = OR ( new_n8118_, new_n7257_ ) -new_n8139_ = OR ( new_n8101_, new_n7263_ ) -new_n8140_ = NAND ( new_n8123_, new_n7260_ ) -new_n8141_ = OR ( new_n8104_, new_n7267_ ) -new_n8142_ = AND ( new_n8141_, new_n8140_, new_n8139_ ) -NET_16688 = NAND ( new_n8142_, new_n8138_, new_n8137_, new_n8136_ ) -new_n8144_ = NAND ( new_n8111_, NET_262 ) -new_n8145_ = NAND ( new_n8116_, NET_74 ) -new_n8146_ = OR ( new_n8118_, new_n7274_ ) -new_n8147_ = OR ( new_n8101_, new_n7279_ ) -new_n8148_ = NAND ( new_n8123_, new_n7277_ ) -new_n8149_ = OR ( new_n8104_, new_n7283_ ) -new_n8150_ = AND ( new_n8149_, new_n8148_, new_n8147_ ) -NET_16689 = NAND ( new_n8150_, new_n8146_, new_n8145_, new_n8144_ ) -new_n8152_ = NAND ( new_n8111_, NET_263 ) -new_n8153_ = NAND ( new_n8116_, NET_73 ) -new_n8154_ = OR ( new_n8118_, new_n7290_ ) -new_n8155_ = OR ( new_n8101_, new_n7295_ ) -new_n8156_ = NAND ( new_n8123_, new_n7293_ ) -new_n8157_ = OR ( new_n8104_, new_n7299_ ) -new_n8158_ = AND ( new_n8157_, new_n8156_, new_n8155_ ) -NET_16690 = NAND ( new_n8158_, new_n8154_, new_n8153_, new_n8152_ ) -new_n8160_ = NAND ( new_n8111_, NET_264 ) -new_n8161_ = NAND ( new_n8116_, NET_72 ) -new_n8162_ = OR ( new_n8118_, new_n7306_ ) -new_n8163_ = OR ( new_n8101_, new_n7311_ ) -new_n8164_ = NAND ( new_n8123_, new_n7309_ ) -new_n8165_ = OR ( new_n8104_, new_n7315_ ) -new_n8166_ = AND ( new_n8165_, new_n8164_, new_n8163_ ) -NET_16691 = NAND ( new_n8166_, new_n8162_, new_n8161_, new_n8160_ ) -new_n8168_ = NAND ( new_n8111_, NET_265 ) -new_n8169_ = NAND ( new_n8116_, NET_71 ) -new_n8170_ = OR ( new_n8118_, new_n7322_ ) -new_n8171_ = OR ( new_n8101_, new_n7328_ ) -new_n8172_ = NAND ( new_n8123_, new_n7325_ ) -new_n8173_ = OR ( new_n8104_, new_n7332_ ) -new_n8174_ = AND ( new_n8173_, new_n8172_, new_n8171_ ) -NET_16692 = NAND ( new_n8174_, new_n8170_, new_n8169_, new_n8168_ ) -new_n8176_ = NAND ( new_n8111_, NET_266 ) -new_n8177_ = NAND ( new_n8116_, NET_70 ) -new_n8178_ = OR ( new_n8118_, new_n7339_ ) -new_n8179_ = OR ( new_n8101_, new_n7345_ ) -new_n8180_ = NAND ( new_n8123_, new_n7342_ ) -new_n8181_ = OR ( new_n8104_, new_n7349_ ) -new_n8182_ = AND ( new_n8181_, new_n8180_, new_n8179_ ) -NET_16693 = NAND ( new_n8182_, new_n8178_, new_n8177_, new_n8176_ ) -new_n8184_ = NAND ( new_n7521_, NET_314, new_n3238_ ) -new_n8185_ = NAND ( new_n3075_, new_n3079_, new_n3238_ ) -new_n8186_ = NAND ( new_n8103_, new_n7357_ ) -new_n8187_ = NAND ( new_n8186_, new_n7179_, new_n3273_ ) -new_n8188_ = NAND ( new_n8187_, new_n7205_ ) -new_n8189_ = NAND ( new_n8188_, new_n8185_ ) -new_n8190_ = NAND ( new_n3273_, NET_176 ) -new_n8191_ = NAND ( new_n8190_, new_n8189_, new_n5786_ ) -new_n8192_ = NAND ( new_n8191_, new_n8184_ ) -new_n8193_ = NAND ( new_n8192_, new_n6566_ ) -new_n8194_ = NAND ( new_n8193_, NET_267 ) -new_n8195_ = OR ( new_n8187_, new_n8185_ ) -new_n8196_ = OR ( new_n8189_, new_n8184_ ) -new_n8197_ = NAND ( new_n8196_, new_n8195_ ) -new_n8198_ = NAND ( new_n8197_, NET_77 ) -new_n8199_ = NAND ( new_n8186_, new_n7179_ ) -new_n8200_ = OR ( new_n8199_, new_n3273_ ) -new_n8201_ = OR ( new_n8200_, new_n7218_ ) -new_n8202_ = OR ( new_n8184_, new_n7225_ ) -new_n8203_ = NOR ( new_n8185_, new_n6707_ ) -new_n8204_ = NOR ( new_n3273_, new_n3072_ ) -new_n8205_ = OR ( new_n8204_, new_n8203_ ) -new_n8206_ = NAND ( new_n8205_, new_n7223_ ) -new_n8207_ = OR ( new_n8186_, new_n7230_ ) -new_n8208_ = AND ( new_n8207_, new_n8206_, new_n8202_ ) -NET_16694 = NAND ( new_n8208_, new_n8201_, new_n8198_, new_n8194_ ) -new_n8210_ = NAND ( new_n8193_, NET_268 ) -new_n8211_ = NAND ( new_n8197_, NET_76 ) -new_n8212_ = OR ( new_n8200_, new_n7240_ ) -new_n8213_ = OR ( new_n8184_, new_n7246_ ) -new_n8214_ = NAND ( new_n8205_, new_n7243_ ) -new_n8215_ = OR ( new_n8186_, new_n7250_ ) -new_n8216_ = AND ( new_n8215_, new_n8214_, new_n8213_ ) -NET_16695 = NAND ( new_n8216_, new_n8212_, new_n8211_, new_n8210_ ) -new_n8218_ = NAND ( new_n8193_, NET_269 ) -new_n8219_ = NAND ( new_n8197_, NET_75 ) -new_n8220_ = OR ( new_n8200_, new_n7257_ ) -new_n8221_ = OR ( new_n8184_, new_n7263_ ) -new_n8222_ = NAND ( new_n8205_, new_n7260_ ) -new_n8223_ = OR ( new_n8186_, new_n7267_ ) -new_n8224_ = AND ( new_n8223_, new_n8222_, new_n8221_ ) -NET_16696 = NAND ( new_n8224_, new_n8220_, new_n8219_, new_n8218_ ) -new_n8226_ = NAND ( new_n8193_, NET_270 ) -new_n8227_ = NAND ( new_n8197_, NET_74 ) -new_n8228_ = OR ( new_n8200_, new_n7274_ ) -new_n8229_ = OR ( new_n8184_, new_n7279_ ) -new_n8230_ = NAND ( new_n8205_, new_n7277_ ) -new_n8231_ = OR ( new_n8186_, new_n7283_ ) -new_n8232_ = AND ( new_n8231_, new_n8230_, new_n8229_ ) -NET_16697 = NAND ( new_n8232_, new_n8228_, new_n8227_, new_n8226_ ) -new_n8234_ = NAND ( new_n8193_, NET_271 ) -new_n8235_ = NAND ( new_n8197_, NET_73 ) -new_n8236_ = OR ( new_n8200_, new_n7290_ ) -new_n8237_ = OR ( new_n8184_, new_n7295_ ) -new_n8238_ = NAND ( new_n8205_, new_n7293_ ) -new_n8239_ = OR ( new_n8186_, new_n7299_ ) -new_n8240_ = AND ( new_n8239_, new_n8238_, new_n8237_ ) -NET_16698 = NAND ( new_n8240_, new_n8236_, new_n8235_, new_n8234_ ) -new_n8242_ = NAND ( new_n8193_, NET_272 ) -new_n8243_ = NAND ( new_n8197_, NET_72 ) -new_n8244_ = OR ( new_n8200_, new_n7306_ ) -new_n8245_ = OR ( new_n8184_, new_n7311_ ) -new_n8246_ = NAND ( new_n8205_, new_n7309_ ) -new_n8247_ = OR ( new_n8186_, new_n7315_ ) -new_n8248_ = AND ( new_n8247_, new_n8246_, new_n8245_ ) -NET_16699 = NAND ( new_n8248_, new_n8244_, new_n8243_, new_n8242_ ) -new_n8250_ = NAND ( new_n8193_, NET_273 ) -new_n8251_ = NAND ( new_n8197_, NET_71 ) -new_n8252_ = OR ( new_n8200_, new_n7322_ ) -new_n8253_ = OR ( new_n8184_, new_n7328_ ) -new_n8254_ = NAND ( new_n8205_, new_n7325_ ) -new_n8255_ = OR ( new_n8186_, new_n7332_ ) -new_n8256_ = AND ( new_n8255_, new_n8254_, new_n8253_ ) -NET_16700 = NAND ( new_n8256_, new_n8252_, new_n8251_, new_n8250_ ) -new_n8258_ = NAND ( new_n8193_, NET_274 ) -new_n8259_ = NAND ( new_n8197_, NET_70 ) -new_n8260_ = OR ( new_n8200_, new_n7339_ ) -new_n8261_ = OR ( new_n8184_, new_n7345_ ) -new_n8262_ = NAND ( new_n8205_, new_n7342_ ) -new_n8263_ = OR ( new_n8186_, new_n7349_ ) -new_n8264_ = AND ( new_n8263_, new_n8262_, new_n8261_ ) -NET_16701 = NAND ( new_n8264_, new_n8260_, new_n8259_, new_n8258_ ) -new_n8266_ = OR ( NET_314, NET_313 ) -new_n8267_ = NOR ( new_n8266_, new_n7175_ ) -new_n8268_ = NOT ( new_n8267_ ) -new_n8269_ = NAND ( new_n3074_, NET_315, new_n3079_, new_n3238_ ) -new_n8270_ = NAND ( new_n7938_, new_n7609_ ) -new_n8271_ = NAND ( new_n8270_, new_n7179_, new_n3271_ ) -new_n8272_ = NAND ( new_n8271_, new_n7205_ ) -new_n8273_ = NAND ( new_n8272_, new_n8269_ ) -new_n8274_ = NAND ( new_n3271_, NET_176 ) -new_n8275_ = NAND ( new_n8274_, new_n8273_, new_n5786_ ) -new_n8276_ = NAND ( new_n8275_, new_n8268_ ) -new_n8277_ = NAND ( new_n8276_, new_n6566_ ) -new_n8278_ = NAND ( new_n8277_, NET_275 ) -new_n8279_ = NAND ( new_n8270_, new_n7179_ ) -new_n8280_ = OR ( new_n8279_, new_n8269_ ) -new_n8281_ = OR ( new_n8273_, new_n8268_ ) -new_n8282_ = NAND ( new_n8281_, new_n8280_ ) -new_n8283_ = NAND ( new_n8282_, NET_77 ) -new_n8284_ = OR ( new_n8279_, new_n3271_ ) -new_n8285_ = OR ( new_n8284_, new_n7218_ ) -new_n8286_ = OR ( new_n8268_, new_n7225_ ) -new_n8287_ = NOR ( new_n8269_, new_n6707_ ) -new_n8288_ = NOR ( new_n3271_, new_n3072_ ) -new_n8289_ = OR ( new_n8288_, new_n8287_ ) -new_n8290_ = NAND ( new_n8289_, new_n7223_ ) -new_n8291_ = OR ( new_n8270_, new_n7230_ ) -new_n8292_ = AND ( new_n8291_, new_n8290_, new_n8286_ ) -NET_16702 = NAND ( new_n8292_, new_n8285_, new_n8283_, new_n8278_ ) -new_n8294_ = NAND ( new_n8277_, NET_276 ) -new_n8295_ = NAND ( new_n8282_, NET_76 ) -new_n8296_ = OR ( new_n8284_, new_n7240_ ) -new_n8297_ = NAND ( new_n8267_, new_n7245_ ) -new_n8298_ = NAND ( new_n8289_, new_n7243_ ) -new_n8299_ = OR ( new_n8270_, new_n7250_ ) -new_n8300_ = AND ( new_n8299_, new_n8298_, new_n8297_ ) -NET_16703 = NAND ( new_n8300_, new_n8296_, new_n8295_, new_n8294_ ) -new_n8302_ = NAND ( new_n8277_, NET_277 ) -new_n8303_ = NAND ( new_n8282_, NET_75 ) -new_n8304_ = OR ( new_n8284_, new_n7257_ ) -new_n8305_ = NAND ( new_n8267_, new_n7262_ ) -new_n8306_ = NAND ( new_n8289_, new_n7260_ ) -new_n8307_ = OR ( new_n8270_, new_n7267_ ) -new_n8308_ = AND ( new_n8307_, new_n8306_, new_n8305_ ) -NET_16704 = NAND ( new_n8308_, new_n8304_, new_n8303_, new_n8302_ ) -new_n8310_ = NAND ( new_n8277_, NET_278 ) -new_n8311_ = NAND ( new_n8282_, NET_74 ) -new_n8312_ = OR ( new_n8284_, new_n7274_ ) -new_n8313_ = OR ( new_n8268_, new_n7279_ ) -new_n8314_ = NAND ( new_n8289_, new_n7277_ ) -new_n8315_ = OR ( new_n8270_, new_n7283_ ) -new_n8316_ = AND ( new_n8315_, new_n8314_, new_n8313_ ) -NET_16705 = NAND ( new_n8316_, new_n8312_, new_n8311_, new_n8310_ ) -new_n8318_ = NAND ( new_n8277_, NET_279 ) -new_n8319_ = NAND ( new_n8282_, NET_73 ) -new_n8320_ = OR ( new_n8284_, new_n7290_ ) -new_n8321_ = OR ( new_n8268_, new_n7295_ ) -new_n8322_ = NAND ( new_n8289_, new_n7293_ ) -new_n8323_ = OR ( new_n8270_, new_n7299_ ) -new_n8324_ = AND ( new_n8323_, new_n8322_, new_n8321_ ) -NET_16706 = NAND ( new_n8324_, new_n8320_, new_n8319_, new_n8318_ ) -new_n8326_ = NAND ( new_n8277_, NET_280 ) -new_n8327_ = NAND ( new_n8282_, NET_72 ) -new_n8328_ = OR ( new_n8284_, new_n7306_ ) -new_n8329_ = OR ( new_n8268_, new_n7311_ ) -new_n8330_ = NAND ( new_n8289_, new_n7309_ ) -new_n8331_ = OR ( new_n8270_, new_n7315_ ) -new_n8332_ = AND ( new_n8331_, new_n8330_, new_n8329_ ) -NET_16707 = NAND ( new_n8332_, new_n8328_, new_n8327_, new_n8326_ ) -new_n8334_ = NAND ( new_n8277_, NET_281 ) -new_n8335_ = NAND ( new_n8282_, NET_71 ) -new_n8336_ = OR ( new_n8284_, new_n7322_ ) -new_n8337_ = NAND ( new_n8267_, new_n7327_ ) -new_n8338_ = NAND ( new_n8289_, new_n7325_ ) -new_n8339_ = OR ( new_n8270_, new_n7332_ ) -new_n8340_ = AND ( new_n8339_, new_n8338_, new_n8337_ ) -NET_16708 = NAND ( new_n8340_, new_n8336_, new_n8335_, new_n8334_ ) -new_n8342_ = NAND ( new_n8277_, NET_282 ) -new_n8343_ = NAND ( new_n8282_, NET_70 ) -new_n8344_ = OR ( new_n8284_, new_n7339_ ) -new_n8345_ = NAND ( new_n8267_, new_n7344_ ) -new_n8346_ = NAND ( new_n8289_, new_n7342_ ) -new_n8347_ = OR ( new_n8270_, new_n7349_ ) -new_n8348_ = AND ( new_n8347_, new_n8346_, new_n8345_ ) -NET_16709 = NAND ( new_n8348_, new_n8344_, new_n8343_, new_n8342_ ) -new_n8350_ = NAND ( new_n3214_, new_n3079_, new_n3238_ ) -new_n8351_ = NAND ( NET_316, new_n3073_, new_n3079_, new_n3238_ ) -new_n8352_ = NAND ( new_n7938_, new_n7692_ ) -new_n8353_ = NAND ( new_n8352_, new_n7179_, new_n3269_ ) -new_n8354_ = NAND ( new_n8353_, new_n7205_ ) -new_n8355_ = NAND ( new_n8354_, new_n8351_ ) -new_n8356_ = NAND ( new_n3269_, NET_176 ) -new_n8357_ = NAND ( new_n8356_, new_n8355_, new_n5786_ ) -new_n8358_ = NAND ( new_n8357_, new_n8350_ ) -new_n8359_ = NAND ( new_n8358_, new_n6566_ ) -new_n8360_ = NAND ( new_n8359_, NET_283 ) -new_n8361_ = OR ( new_n8353_, new_n8351_ ) -new_n8362_ = OR ( new_n8355_, new_n8350_ ) -new_n8363_ = NAND ( new_n8362_, new_n8361_ ) -new_n8364_ = NAND ( new_n8363_, NET_77 ) -new_n8365_ = NAND ( new_n8352_, new_n7179_ ) -new_n8366_ = OR ( new_n8365_, new_n3269_ ) -new_n8367_ = OR ( new_n8366_, new_n7218_ ) -new_n8368_ = OR ( new_n8350_, new_n7225_ ) -new_n8369_ = NOR ( new_n8351_, new_n6707_ ) -new_n8370_ = NOR ( new_n3269_, new_n3072_ ) -new_n8371_ = OR ( new_n8370_, new_n8369_ ) -new_n8372_ = NAND ( new_n8371_, new_n7223_ ) -new_n8373_ = OR ( new_n8352_, new_n7230_ ) -new_n8374_ = AND ( new_n8373_, new_n8372_, new_n8368_ ) -NET_16710 = NAND ( new_n8374_, new_n8367_, new_n8364_, new_n8360_ ) -new_n8376_ = NAND ( new_n8359_, NET_284 ) -new_n8377_ = NAND ( new_n8363_, NET_76 ) -new_n8378_ = OR ( new_n8366_, new_n7240_ ) -new_n8379_ = OR ( new_n8350_, new_n7246_ ) -new_n8380_ = NAND ( new_n8371_, new_n7243_ ) -new_n8381_ = OR ( new_n8352_, new_n7250_ ) -new_n8382_ = AND ( new_n8381_, new_n8380_, new_n8379_ ) -NET_16711 = NAND ( new_n8382_, new_n8378_, new_n8377_, new_n8376_ ) -new_n8384_ = NAND ( new_n8359_, NET_285 ) -new_n8385_ = NAND ( new_n8363_, NET_75 ) -new_n8386_ = OR ( new_n8366_, new_n7257_ ) -new_n8387_ = OR ( new_n8350_, new_n7263_ ) -new_n8388_ = NAND ( new_n8371_, new_n7260_ ) -new_n8389_ = OR ( new_n8352_, new_n7267_ ) -new_n8390_ = AND ( new_n8389_, new_n8388_, new_n8387_ ) -NET_16712 = NAND ( new_n8390_, new_n8386_, new_n8385_, new_n8384_ ) -new_n8392_ = NAND ( new_n8359_, NET_286 ) -new_n8393_ = NAND ( new_n8363_, NET_74 ) -new_n8394_ = OR ( new_n8366_, new_n7274_ ) -new_n8395_ = OR ( new_n8350_, new_n7279_ ) -new_n8396_ = NAND ( new_n8371_, new_n7277_ ) -new_n8397_ = OR ( new_n8352_, new_n7283_ ) -new_n8398_ = AND ( new_n8397_, new_n8396_, new_n8395_ ) -NET_16713 = NAND ( new_n8398_, new_n8394_, new_n8393_, new_n8392_ ) -new_n8400_ = NAND ( new_n8359_, NET_287 ) -new_n8401_ = NAND ( new_n8363_, NET_73 ) -new_n8402_ = OR ( new_n8366_, new_n7290_ ) -new_n8403_ = OR ( new_n8350_, new_n7295_ ) -new_n8404_ = NAND ( new_n8371_, new_n7293_ ) -new_n8405_ = OR ( new_n8352_, new_n7299_ ) -new_n8406_ = AND ( new_n8405_, new_n8404_, new_n8403_ ) -NET_16714 = NAND ( new_n8406_, new_n8402_, new_n8401_, new_n8400_ ) -new_n8408_ = NAND ( new_n8359_, NET_288 ) -new_n8409_ = NAND ( new_n8363_, NET_72 ) -new_n8410_ = OR ( new_n8366_, new_n7306_ ) -new_n8411_ = OR ( new_n8350_, new_n7311_ ) -new_n8412_ = NAND ( new_n8371_, new_n7309_ ) -new_n8413_ = OR ( new_n8352_, new_n7315_ ) -new_n8414_ = AND ( new_n8413_, new_n8412_, new_n8411_ ) -NET_16715 = NAND ( new_n8414_, new_n8410_, new_n8409_, new_n8408_ ) -new_n8416_ = NAND ( new_n8359_, NET_289 ) -new_n8417_ = NAND ( new_n8363_, NET_71 ) -new_n8418_ = OR ( new_n8366_, new_n7322_ ) -new_n8419_ = OR ( new_n8350_, new_n7328_ ) -new_n8420_ = NAND ( new_n8371_, new_n7325_ ) -new_n8421_ = OR ( new_n8352_, new_n7332_ ) -new_n8422_ = AND ( new_n8421_, new_n8420_, new_n8419_ ) -NET_16716 = NAND ( new_n8422_, new_n8418_, new_n8417_, new_n8416_ ) -new_n8424_ = NAND ( new_n8359_, NET_290 ) -new_n8425_ = NAND ( new_n8363_, NET_70 ) -new_n8426_ = OR ( new_n8366_, new_n7339_ ) -new_n8427_ = OR ( new_n8350_, new_n7345_ ) -new_n8428_ = NAND ( new_n8371_, new_n7342_ ) -new_n8429_ = OR ( new_n8352_, new_n7349_ ) -new_n8430_ = AND ( new_n8429_, new_n8428_, new_n8427_ ) -NET_16717 = NAND ( new_n8430_, new_n8426_, new_n8425_, new_n8424_ ) -new_n8432_ = NAND ( new_n3213_, new_n3079_, new_n3238_ ) -new_n8433_ = NAND ( new_n3074_, new_n3073_, new_n3079_, new_n3238_ ) -new_n8434_ = NAND ( new_n8103_, new_n7609_ ) -new_n8435_ = NAND ( new_n8434_, new_n7179_, new_n3267_ ) -new_n8436_ = NAND ( new_n8435_, new_n7205_ ) -new_n8437_ = NAND ( new_n8436_, new_n8433_ ) -new_n8438_ = NAND ( new_n3267_, NET_176 ) -new_n8439_ = NAND ( new_n8438_, new_n8437_, new_n5786_ ) -new_n8440_ = NAND ( new_n8439_, new_n8432_ ) -new_n8441_ = NAND ( new_n8440_, new_n6566_ ) -new_n8442_ = NAND ( new_n8441_, NET_291 ) -new_n8443_ = OR ( new_n8435_, new_n8433_ ) -new_n8444_ = OR ( new_n8437_, new_n8432_ ) -new_n8445_ = NAND ( new_n8444_, new_n8443_ ) -new_n8446_ = NAND ( new_n8445_, NET_77 ) -new_n8447_ = NOT ( new_n3267_ ) -new_n8448_ = NAND ( new_n8434_, new_n7179_, new_n8447_ ) -new_n8449_ = OR ( new_n8448_, new_n7218_ ) -new_n8450_ = OR ( new_n8432_, new_n7225_ ) -new_n8451_ = OR ( new_n8433_, new_n6707_ ) -new_n8452_ = OR ( new_n3267_, new_n3072_ ) -new_n8453_ = NAND ( new_n8452_, new_n8451_ ) -new_n8454_ = NAND ( new_n8453_, new_n7223_ ) -new_n8455_ = OR ( new_n8434_, new_n7230_ ) -new_n8456_ = AND ( new_n8455_, new_n8454_, new_n8450_ ) -NET_16718 = NAND ( new_n8456_, new_n8449_, new_n8446_, new_n8442_ ) -new_n8458_ = NAND ( new_n8441_, NET_292 ) -new_n8459_ = NAND ( new_n8445_, NET_76 ) -new_n8460_ = OR ( new_n8448_, new_n7240_ ) -new_n8461_ = OR ( new_n8432_, new_n7246_ ) -new_n8462_ = NAND ( new_n8453_, new_n7243_ ) -new_n8463_ = OR ( new_n8434_, new_n7250_ ) -new_n8464_ = AND ( new_n8463_, new_n8462_, new_n8461_ ) -NET_16719 = NAND ( new_n8464_, new_n8460_, new_n8459_, new_n8458_ ) -new_n8466_ = NAND ( new_n8441_, NET_293 ) -new_n8467_ = NAND ( new_n8445_, NET_75 ) -new_n8468_ = OR ( new_n8448_, new_n7257_ ) -new_n8469_ = OR ( new_n8432_, new_n7263_ ) -new_n8470_ = NAND ( new_n8453_, new_n7260_ ) -new_n8471_ = OR ( new_n8434_, new_n7267_ ) -new_n8472_ = AND ( new_n8471_, new_n8470_, new_n8469_ ) -NET_16720 = NAND ( new_n8472_, new_n8468_, new_n8467_, new_n8466_ ) -new_n8474_ = NAND ( new_n8441_, NET_294 ) -new_n8475_ = NAND ( new_n8445_, NET_74 ) -new_n8476_ = OR ( new_n8448_, new_n7274_ ) -new_n8477_ = OR ( new_n8432_, new_n7279_ ) -new_n8478_ = NAND ( new_n8453_, new_n7277_ ) -new_n8479_ = OR ( new_n8434_, new_n7283_ ) -new_n8480_ = AND ( new_n8479_, new_n8478_, new_n8477_ ) -NET_16721 = NAND ( new_n8480_, new_n8476_, new_n8475_, new_n8474_ ) -new_n8482_ = NAND ( new_n8441_, NET_295 ) -new_n8483_ = NAND ( new_n8445_, NET_73 ) -new_n8484_ = OR ( new_n8448_, new_n7290_ ) -new_n8485_ = OR ( new_n8432_, new_n7295_ ) -new_n8486_ = NAND ( new_n8453_, new_n7293_ ) -new_n8487_ = OR ( new_n8434_, new_n7299_ ) -new_n8488_ = AND ( new_n8487_, new_n8486_, new_n8485_ ) -NET_16722 = NAND ( new_n8488_, new_n8484_, new_n8483_, new_n8482_ ) -new_n8490_ = NAND ( new_n8441_, NET_296 ) -new_n8491_ = NAND ( new_n8445_, NET_72 ) -new_n8492_ = OR ( new_n8448_, new_n7306_ ) -new_n8493_ = OR ( new_n8432_, new_n7311_ ) -new_n8494_ = NAND ( new_n8453_, new_n7309_ ) -new_n8495_ = OR ( new_n8434_, new_n7315_ ) -new_n8496_ = AND ( new_n8495_, new_n8494_, new_n8493_ ) -NET_16723 = NAND ( new_n8496_, new_n8492_, new_n8491_, new_n8490_ ) -new_n8498_ = NAND ( new_n8441_, NET_297 ) -new_n8499_ = NAND ( new_n8445_, NET_71 ) -new_n8500_ = OR ( new_n8448_, new_n7322_ ) -new_n8501_ = OR ( new_n8432_, new_n7328_ ) -new_n8502_ = NAND ( new_n8453_, new_n7325_ ) -new_n8503_ = OR ( new_n8434_, new_n7332_ ) -new_n8504_ = AND ( new_n8503_, new_n8502_, new_n8501_ ) -NET_16724 = NAND ( new_n8504_, new_n8500_, new_n8499_, new_n8498_ ) -new_n8506_ = NAND ( new_n8441_, NET_298 ) -new_n8507_ = NAND ( new_n8445_, NET_70 ) -new_n8508_ = OR ( new_n8448_, new_n7339_ ) -new_n8509_ = OR ( new_n8432_, new_n7345_ ) -new_n8510_ = NAND ( new_n8453_, new_n7342_ ) -new_n8511_ = OR ( new_n8434_, new_n7349_ ) -new_n8512_ = AND ( new_n8511_, new_n8510_, new_n8509_ ) -NET_16725 = NAND ( new_n8512_, new_n8508_, new_n8507_, new_n8506_ ) -new_n8514_ = OR ( new_n8266_, new_n7522_ ) -new_n8515_ = NAND ( new_n3075_, NET_314, NET_313 ) -new_n8516_ = NAND ( new_n8103_, new_n7692_ ) -new_n8517_ = NAND ( new_n8516_, new_n7179_, new_n3282_ ) -new_n8518_ = NAND ( new_n8517_, new_n7205_ ) -new_n8519_ = NAND ( new_n8518_, new_n8515_ ) -new_n8520_ = NAND ( new_n3282_, NET_176 ) -new_n8521_ = NAND ( new_n8520_, new_n8519_, new_n5786_ ) -new_n8522_ = NAND ( new_n8521_, new_n8514_ ) -new_n8523_ = NAND ( new_n8522_, new_n6566_ ) -new_n8524_ = NAND ( new_n8523_, NET_299 ) -new_n8525_ = OR ( new_n8517_, new_n8515_ ) -new_n8526_ = OR ( new_n8519_, new_n8514_ ) -new_n8527_ = NAND ( new_n8526_, new_n8525_ ) -new_n8528_ = NAND ( new_n8527_, NET_77 ) -new_n8529_ = NOT ( new_n3282_ ) -new_n8530_ = NAND ( new_n8516_, new_n7179_, new_n8529_ ) -new_n8531_ = OR ( new_n8530_, new_n7218_ ) -new_n8532_ = OR ( new_n8514_, new_n7225_ ) -new_n8533_ = OR ( new_n8515_, new_n6707_ ) -new_n8534_ = OR ( new_n3282_, new_n3072_ ) -new_n8535_ = NAND ( new_n8534_, new_n8533_ ) -new_n8536_ = NAND ( new_n8535_, new_n7223_ ) -new_n8537_ = OR ( new_n8516_, new_n7230_ ) -new_n8538_ = AND ( new_n8537_, new_n8536_, new_n8532_ ) -NET_16726 = NAND ( new_n8538_, new_n8531_, new_n8528_, new_n8524_ ) -new_n8540_ = NAND ( new_n8523_, NET_300 ) -new_n8541_ = NAND ( new_n8527_, NET_76 ) -new_n8542_ = OR ( new_n8530_, new_n7240_ ) -new_n8543_ = OR ( new_n8514_, new_n7246_ ) -new_n8544_ = NAND ( new_n8535_, new_n7243_ ) -new_n8545_ = OR ( new_n8516_, new_n7250_ ) -new_n8546_ = AND ( new_n8545_, new_n8544_, new_n8543_ ) -NET_16727 = NAND ( new_n8546_, new_n8542_, new_n8541_, new_n8540_ ) -new_n8548_ = NAND ( new_n8523_, NET_301 ) -new_n8549_ = NAND ( new_n8527_, NET_75 ) -new_n8550_ = OR ( new_n8530_, new_n7257_ ) -new_n8551_ = OR ( new_n8514_, new_n7263_ ) -new_n8552_ = NAND ( new_n8535_, new_n7260_ ) -new_n8553_ = OR ( new_n8516_, new_n7267_ ) -new_n8554_ = AND ( new_n8553_, new_n8552_, new_n8551_ ) -NET_16728 = NAND ( new_n8554_, new_n8550_, new_n8549_, new_n8548_ ) -new_n8556_ = NAND ( new_n8523_, NET_302 ) -new_n8557_ = NAND ( new_n8527_, NET_74 ) -new_n8558_ = OR ( new_n8530_, new_n7274_ ) -new_n8559_ = OR ( new_n8514_, new_n7279_ ) -new_n8560_ = NAND ( new_n8535_, new_n7277_ ) -new_n8561_ = OR ( new_n8516_, new_n7283_ ) -new_n8562_ = AND ( new_n8561_, new_n8560_, new_n8559_ ) -NET_16729 = NAND ( new_n8562_, new_n8558_, new_n8557_, new_n8556_ ) -new_n8564_ = NAND ( new_n8523_, NET_303 ) -new_n8565_ = NAND ( new_n8527_, NET_73 ) -new_n8566_ = OR ( new_n8530_, new_n7290_ ) -new_n8567_ = OR ( new_n8514_, new_n7295_ ) -new_n8568_ = NAND ( new_n8535_, new_n7293_ ) -new_n8569_ = OR ( new_n8516_, new_n7299_ ) -new_n8570_ = AND ( new_n8569_, new_n8568_, new_n8567_ ) -NET_16730 = NAND ( new_n8570_, new_n8566_, new_n8565_, new_n8564_ ) -new_n8572_ = NAND ( new_n8523_, NET_304 ) -new_n8573_ = NAND ( new_n8527_, NET_72 ) -new_n8574_ = OR ( new_n8530_, new_n7306_ ) -new_n8575_ = OR ( new_n8514_, new_n7311_ ) -new_n8576_ = NAND ( new_n8535_, new_n7309_ ) -new_n8577_ = OR ( new_n8516_, new_n7315_ ) -new_n8578_ = AND ( new_n8577_, new_n8576_, new_n8575_ ) -NET_16731 = NAND ( new_n8578_, new_n8574_, new_n8573_, new_n8572_ ) -new_n8580_ = NAND ( new_n8523_, NET_305 ) -new_n8581_ = NAND ( new_n8527_, NET_71 ) -new_n8582_ = OR ( new_n8530_, new_n7322_ ) -new_n8583_ = OR ( new_n8514_, new_n7328_ ) -new_n8584_ = NAND ( new_n8535_, new_n7325_ ) -new_n8585_ = OR ( new_n8516_, new_n7332_ ) -new_n8586_ = AND ( new_n8585_, new_n8584_, new_n8583_ ) -NET_16732 = NAND ( new_n8586_, new_n8582_, new_n8581_, new_n8580_ ) -new_n8588_ = NAND ( new_n8523_, NET_306 ) -new_n8589_ = NAND ( new_n8527_, NET_70 ) -new_n8590_ = OR ( new_n8530_, new_n7339_ ) -new_n8591_ = OR ( new_n8514_, new_n7345_ ) -new_n8592_ = NAND ( new_n8535_, new_n7342_ ) -new_n8593_ = OR ( new_n8516_, new_n7349_ ) -new_n8594_ = AND ( new_n8593_, new_n8592_, new_n8591_ ) -NET_16733 = NAND ( new_n8594_, new_n8590_, new_n8589_, new_n8588_ ) -new_n8596_ = NAND ( new_n6830_, new_n6826_, new_n6706_ ) -new_n8597_ = XNOR ( new_n6845_, new_n5529_ ) -new_n8598_ = XOR ( new_n8597_, new_n8596_ ) -new_n8599_ = XOR ( new_n8598_, new_n5529_ ) -new_n8600_ = OR ( new_n8599_, new_n6697_ ) -new_n8601_ = OR ( new_n6852_, new_n3253_ ) -new_n8602_ = NAND ( new_n6571_, new_n3636_, NET_178 ) -new_n8603_ = OR ( new_n6571_, new_n3074_ ) -NET_16734 = NAND ( new_n8603_, new_n8602_, new_n8601_, new_n8600_ ) -new_n8605_ = NOT ( new_n3820_ ) -new_n8606_ = NAND ( NET_763, NET_762 ) -new_n8607_ = OR ( new_n8606_, new_n8605_ ) -new_n8608_ = NAND ( new_n3819_, NET_764, NET_763, NET_762 ) -new_n8609_ = NOR ( new_n6928_, new_n6612_ ) -new_n8610_ = OR ( new_n6944_, new_n6939_ ) -new_n8611_ = NAND ( new_n8610_, new_n6931_ ) -new_n8612_ = NAND ( new_n6944_, new_n6939_ ) -new_n8613_ = NAND ( new_n8612_, new_n8611_ ) -new_n8614_ = NAND ( new_n6934_, NET_758 ) -new_n8615_ = OR ( new_n4007_, NET_625 ) -new_n8616_ = NAND ( new_n8615_, new_n8614_ ) -new_n8617_ = NOR ( new_n8616_, new_n6161_ ) -new_n8618_ = NOT ( new_n8617_ ) -new_n8619_ = NAND ( new_n8616_, new_n6161_ ) -new_n8620_ = NAND ( new_n8619_, new_n8618_ ) -new_n8621_ = XNOR ( new_n8620_, new_n8613_ ) -new_n8622_ = NOR ( new_n8621_, new_n6994_ ) -new_n8623_ = NOT ( new_n6945_ ) -new_n8624_ = NAND ( new_n8619_, new_n8613_ ) -new_n8625_ = NAND ( new_n4008_, new_n3817_ ) -new_n8626_ = NAND ( new_n6934_, NET_757 ) -new_n8627_ = NAND ( new_n8626_, new_n8625_, new_n8624_, new_n8618_ ) -new_n8628_ = NAND ( new_n8626_, new_n8625_ ) -new_n8629_ = OR ( new_n8617_, new_n8613_ ) -new_n8630_ = NAND ( new_n8629_, new_n8628_, new_n8619_ ) -new_n8631_ = NAND ( new_n8630_, new_n8627_ ) -new_n8632_ = AND ( new_n8631_, new_n8623_ ) -new_n8633_ = NAND ( new_n8632_, new_n8622_ ) -new_n8634_ = NAND ( new_n8633_, new_n8609_, new_n4025_ ) -new_n8635_ = NAND ( new_n6855_, new_n6611_ ) -new_n8636_ = NAND ( new_n8635_, new_n8634_ ) -new_n8637_ = NAND ( new_n8636_, new_n8608_ ) -new_n8638_ = NAND ( new_n4025_, NET_625 ) -new_n8639_ = NAND ( new_n8638_, new_n8637_, new_n6155_ ) -new_n8640_ = NAND ( new_n8639_, new_n8607_ ) -new_n8641_ = NAND ( new_n8640_, new_n6611_ ) -new_n8642_ = NAND ( new_n8641_, NET_628 ) -new_n8643_ = NAND ( new_n8633_, new_n8609_ ) -new_n8644_ = OR ( new_n8643_, new_n8608_ ) -new_n8645_ = OR ( new_n8637_, new_n8607_ ) -new_n8646_ = NAND ( new_n8645_, new_n8644_ ) -new_n8647_ = NAND ( new_n8646_, new_n5916_ ) -new_n8648_ = OR ( new_n8643_, new_n4025_ ) -new_n8649_ = OR ( new_n5856_, new_n7218_ ) -new_n8650_ = NAND ( new_n5856_, NET_61 ) -new_n8651_ = AND ( new_n8650_, new_n8649_ ) -new_n8652_ = OR ( new_n8651_, new_n8648_ ) -new_n8653_ = NOR ( new_n6612_, new_n6155_ ) -new_n8654_ = NOT ( new_n8653_ ) -new_n8655_ = NOR ( new_n8654_, new_n4427_ ) -new_n8656_ = NAND ( new_n6611_, new_n5916_ ) -new_n8657_ = NOR ( new_n8656_, new_n3817_ ) -new_n8658_ = NOR ( new_n8657_, new_n8655_ ) -new_n8659_ = OR ( new_n8658_, new_n8607_ ) -new_n8660_ = OR ( new_n5856_, NET_101 ) -new_n8661_ = NOT ( NET_69 ) -new_n8662_ = NAND ( new_n5856_, new_n8661_ ) -new_n8663_ = AND ( new_n8662_, new_n8660_ ) -new_n8664_ = NAND ( new_n8663_, new_n8609_ ) -new_n8665_ = OR ( new_n8664_, new_n8633_ ) -new_n8666_ = NOT ( new_n8656_ ) -new_n8667_ = NOR ( new_n4025_, new_n3817_ ) -new_n8668_ = NOR ( new_n8608_, new_n6867_ ) -new_n8669_ = OR ( new_n8668_, new_n8667_ ) -new_n8670_ = NAND ( new_n8669_, new_n8666_ ) -new_n8671_ = AND ( new_n8670_, new_n8665_, new_n8659_ ) -NET_16741 = NAND ( new_n8671_, new_n8652_, new_n8647_, new_n8642_ ) -new_n8673_ = NAND ( new_n8641_, NET_629 ) -new_n8674_ = NAND ( new_n8646_, new_n5923_ ) -new_n8675_ = OR ( new_n5856_, new_n7240_ ) -new_n8676_ = NAND ( new_n5856_, NET_60 ) -new_n8677_ = AND ( new_n8676_, new_n8675_ ) -new_n8678_ = OR ( new_n8677_, new_n8648_ ) -new_n8679_ = NAND ( new_n8653_, new_n3814_ ) -new_n8680_ = NAND ( new_n6611_, new_n5923_ ) -new_n8681_ = OR ( new_n8680_, new_n3817_ ) -new_n8682_ = NAND ( new_n8681_, new_n8679_ ) -new_n8683_ = NOT ( new_n8682_ ) -new_n8684_ = OR ( new_n8683_, new_n8607_ ) -new_n8685_ = OR ( new_n5856_, new_n7248_ ) -new_n8686_ = NAND ( new_n5856_, NET_68 ) -new_n8687_ = NAND ( new_n8686_, new_n8685_ ) -new_n8688_ = NAND ( new_n8687_, new_n8609_ ) -new_n8689_ = OR ( new_n8688_, new_n8633_ ) -new_n8690_ = NOT ( new_n8680_ ) -new_n8691_ = NAND ( new_n8690_, new_n8669_ ) -new_n8692_ = AND ( new_n8691_, new_n8689_, new_n8684_ ) -NET_16742 = NAND ( new_n8692_, new_n8678_, new_n8674_, new_n8673_ ) -new_n8694_ = NAND ( new_n8641_, NET_630 ) -new_n8695_ = NAND ( new_n8646_, new_n5930_ ) -new_n8696_ = OR ( new_n5856_, new_n7257_ ) -new_n8697_ = NAND ( new_n5856_, NET_59 ) -new_n8698_ = AND ( new_n8697_, new_n8696_ ) -new_n8699_ = OR ( new_n8698_, new_n8648_ ) -new_n8700_ = NOR ( new_n8654_, new_n3866_ ) -new_n8701_ = NAND ( new_n6611_, new_n5930_ ) -new_n8702_ = NOR ( new_n8701_, new_n3817_ ) -new_n8703_ = NOR ( new_n8702_, new_n8700_ ) -new_n8704_ = OR ( new_n8703_, new_n8607_ ) -new_n8705_ = OR ( new_n5856_, NET_99 ) -new_n8706_ = NOT ( NET_67 ) -new_n8707_ = NAND ( new_n5856_, new_n8706_ ) -new_n8708_ = AND ( new_n8707_, new_n8705_ ) -new_n8709_ = NAND ( new_n8708_, new_n8609_ ) -new_n8710_ = OR ( new_n8709_, new_n8633_ ) -new_n8711_ = NOT ( new_n8701_ ) -new_n8712_ = NAND ( new_n8711_, new_n8669_ ) -new_n8713_ = AND ( new_n8712_, new_n8710_, new_n8704_ ) -NET_16743 = NAND ( new_n8713_, new_n8699_, new_n8695_, new_n8694_ ) -new_n8715_ = NAND ( new_n8641_, NET_631 ) -new_n8716_ = NAND ( new_n8646_, new_n5937_ ) -new_n8717_ = OR ( new_n5856_, new_n7274_ ) -new_n8718_ = NAND ( new_n5856_, NET_58 ) -new_n8719_ = AND ( new_n8718_, new_n8717_ ) -new_n8720_ = OR ( new_n8719_, new_n8648_ ) -new_n8721_ = NOR ( new_n8654_, new_n6633_ ) -new_n8722_ = NAND ( new_n6611_, new_n5937_ ) -new_n8723_ = NOR ( new_n8722_, new_n3817_ ) -new_n8724_ = NOR ( new_n8723_, new_n8721_ ) -new_n8725_ = OR ( new_n8724_, new_n8607_ ) -new_n8726_ = OR ( new_n5856_, NET_98 ) -new_n8727_ = NOT ( NET_66 ) -new_n8728_ = NAND ( new_n5856_, new_n8727_ ) -new_n8729_ = AND ( new_n8728_, new_n8726_ ) -new_n8730_ = NAND ( new_n8729_, new_n8609_ ) -new_n8731_ = OR ( new_n8730_, new_n8633_ ) -new_n8732_ = NOT ( new_n8722_ ) -new_n8733_ = NAND ( new_n8732_, new_n8669_ ) -new_n8734_ = AND ( new_n8733_, new_n8731_, new_n8725_ ) -NET_16744 = NAND ( new_n8734_, new_n8720_, new_n8716_, new_n8715_ ) -new_n8736_ = NAND ( new_n8641_, NET_632 ) -new_n8737_ = NAND ( new_n8646_, new_n5944_ ) -new_n8738_ = OR ( new_n5856_, new_n7290_ ) -new_n8739_ = NAND ( new_n5856_, NET_57 ) -new_n8740_ = AND ( new_n8739_, new_n8738_ ) -new_n8741_ = OR ( new_n8740_, new_n8648_ ) -new_n8742_ = NOR ( new_n8654_, new_n3774_ ) -new_n8743_ = NAND ( new_n6611_, new_n5944_ ) -new_n8744_ = NOR ( new_n8743_, new_n3817_ ) -new_n8745_ = NOR ( new_n8744_, new_n8742_ ) -new_n8746_ = OR ( new_n8745_, new_n8607_ ) -new_n8747_ = OR ( new_n5856_, NET_97 ) -new_n8748_ = NOT ( NET_65 ) -new_n8749_ = NAND ( new_n5856_, new_n8748_ ) -new_n8750_ = AND ( new_n8749_, new_n8747_ ) -new_n8751_ = NAND ( new_n8750_, new_n8609_ ) -new_n8752_ = OR ( new_n8751_, new_n8633_ ) -new_n8753_ = NOT ( new_n8743_ ) -new_n8754_ = NAND ( new_n8753_, new_n8669_ ) -new_n8755_ = AND ( new_n8754_, new_n8752_, new_n8746_ ) -NET_16745 = NAND ( new_n8755_, new_n8741_, new_n8737_, new_n8736_ ) -new_n8757_ = NAND ( new_n8641_, NET_633 ) -new_n8758_ = NAND ( new_n8646_, new_n5951_ ) -new_n8759_ = OR ( new_n5856_, new_n7306_ ) -new_n8760_ = NAND ( new_n5856_, NET_56 ) -new_n8761_ = AND ( new_n8760_, new_n8759_ ) -new_n8762_ = OR ( new_n8761_, new_n8648_ ) -new_n8763_ = NOR ( new_n8654_, new_n3953_ ) -new_n8764_ = NAND ( new_n6611_, new_n5951_ ) -new_n8765_ = NOR ( new_n8764_, new_n3817_ ) -new_n8766_ = NOR ( new_n8765_, new_n8763_ ) -new_n8767_ = OR ( new_n8766_, new_n8607_ ) -new_n8768_ = OR ( new_n5856_, NET_96 ) -new_n8769_ = NOT ( NET_64 ) -new_n8770_ = NAND ( new_n5856_, new_n8769_ ) -new_n8771_ = AND ( new_n8770_, new_n8768_ ) -new_n8772_ = NAND ( new_n8771_, new_n8609_ ) -new_n8773_ = OR ( new_n8772_, new_n8633_ ) -new_n8774_ = NOT ( new_n8764_ ) -new_n8775_ = NAND ( new_n8774_, new_n8669_ ) -new_n8776_ = AND ( new_n8775_, new_n8773_, new_n8767_ ) -NET_16746 = NAND ( new_n8776_, new_n8762_, new_n8758_, new_n8757_ ) -new_n8778_ = NAND ( new_n8641_, NET_634 ) -new_n8779_ = NAND ( new_n8646_, new_n5958_ ) -new_n8780_ = OR ( new_n5856_, new_n7322_ ) -new_n8781_ = NAND ( new_n5856_, NET_55 ) -new_n8782_ = AND ( new_n8781_, new_n8780_ ) -new_n8783_ = OR ( new_n8782_, new_n8648_ ) -new_n8784_ = NAND ( new_n8653_, new_n3895_ ) -new_n8785_ = NAND ( new_n6611_, new_n5958_ ) -new_n8786_ = OR ( new_n8785_, new_n3817_ ) -new_n8787_ = NAND ( new_n8786_, new_n8784_ ) -new_n8788_ = NOT ( new_n8787_ ) -new_n8789_ = OR ( new_n8788_, new_n8607_ ) -new_n8790_ = OR ( new_n5856_, NET_95 ) -new_n8791_ = NOT ( NET_63 ) -new_n8792_ = NAND ( new_n5856_, new_n8791_ ) -new_n8793_ = AND ( new_n8792_, new_n8790_ ) -new_n8794_ = NAND ( new_n8793_, new_n8609_ ) -new_n8795_ = OR ( new_n8794_, new_n8633_ ) -new_n8796_ = NOT ( new_n8785_ ) -new_n8797_ = NAND ( new_n8796_, new_n8669_ ) -new_n8798_ = AND ( new_n8797_, new_n8795_, new_n8789_ ) -NET_16747 = NAND ( new_n8798_, new_n8783_, new_n8779_, new_n8778_ ) -new_n8800_ = NAND ( new_n8641_, NET_635 ) -new_n8801_ = NAND ( new_n8646_, new_n5965_ ) -new_n8802_ = OR ( new_n5856_, new_n7339_ ) -new_n8803_ = NAND ( new_n5856_, NET_54 ) -new_n8804_ = AND ( new_n8803_, new_n8802_ ) -new_n8805_ = OR ( new_n8804_, new_n8648_ ) -new_n8806_ = NAND ( new_n8653_, new_n3924_ ) -new_n8807_ = NAND ( new_n6611_, new_n5965_ ) -new_n8808_ = OR ( new_n8807_, new_n3817_ ) -new_n8809_ = NAND ( new_n8808_, new_n8806_ ) -new_n8810_ = NOT ( new_n8809_ ) -new_n8811_ = OR ( new_n8810_, new_n8607_ ) -new_n8812_ = OR ( new_n5856_, NET_94 ) -new_n8813_ = NOT ( NET_62 ) -new_n8814_ = NAND ( new_n5856_, new_n8813_ ) -new_n8815_ = AND ( new_n8814_, new_n8812_ ) -new_n8816_ = NAND ( new_n8815_, new_n8609_ ) -new_n8817_ = OR ( new_n8816_, new_n8633_ ) -new_n8818_ = NOT ( new_n8807_ ) -new_n8819_ = NAND ( new_n8818_, new_n8669_ ) -new_n8820_ = AND ( new_n8819_, new_n8817_, new_n8811_ ) -NET_16748 = NAND ( new_n8820_, new_n8805_, new_n8801_, new_n8800_ ) -new_n8822_ = NAND ( new_n3959_, NET_763, NET_762 ) -new_n8823_ = NAND ( NET_765, new_n3818_, NET_763, NET_762 ) -new_n8824_ = NOT ( new_n6994_ ) -new_n8825_ = NOR ( new_n8621_, new_n8824_ ) -new_n8826_ = NAND ( new_n8825_, new_n8632_ ) -new_n8827_ = NAND ( new_n8826_, new_n8609_, new_n4023_ ) -new_n8828_ = NAND ( new_n8827_, new_n8635_ ) -new_n8829_ = NAND ( new_n8828_, new_n8823_ ) -new_n8830_ = NAND ( new_n4023_, NET_625 ) -new_n8831_ = NAND ( new_n8830_, new_n8829_, new_n6155_ ) -new_n8832_ = NAND ( new_n8831_, new_n8822_ ) -new_n8833_ = NAND ( new_n8832_, new_n6611_ ) -new_n8834_ = NAND ( new_n8833_, NET_636 ) -new_n8835_ = OR ( new_n8827_, new_n8823_ ) -new_n8836_ = OR ( new_n8829_, new_n8822_ ) -new_n8837_ = NAND ( new_n8836_, new_n8835_ ) -new_n8838_ = NAND ( new_n8837_, new_n5916_ ) -new_n8839_ = NAND ( new_n8826_, new_n8609_ ) -new_n8840_ = OR ( new_n8839_, new_n4023_ ) -new_n8841_ = OR ( new_n8840_, new_n8651_ ) -new_n8842_ = OR ( new_n8822_, new_n8658_ ) -new_n8843_ = NOR ( new_n4023_, new_n3817_ ) -new_n8844_ = NOR ( new_n8823_, new_n6867_ ) -new_n8845_ = OR ( new_n8844_, new_n8843_ ) -new_n8846_ = NAND ( new_n8845_, new_n8666_ ) -new_n8847_ = OR ( new_n8826_, new_n8664_ ) -new_n8848_ = AND ( new_n8847_, new_n8846_, new_n8842_ ) -NET_16749 = NAND ( new_n8848_, new_n8841_, new_n8838_, new_n8834_ ) -new_n8850_ = NAND ( new_n8833_, NET_637 ) -new_n8851_ = NAND ( new_n8837_, new_n5923_ ) -new_n8852_ = OR ( new_n8840_, new_n8677_ ) -new_n8853_ = OR ( new_n8822_, new_n8683_ ) -new_n8854_ = NAND ( new_n8845_, new_n8690_ ) -new_n8855_ = OR ( new_n8826_, new_n8688_ ) -new_n8856_ = AND ( new_n8855_, new_n8854_, new_n8853_ ) -NET_16750 = NAND ( new_n8856_, new_n8852_, new_n8851_, new_n8850_ ) -new_n8858_ = NAND ( new_n8833_, NET_638 ) -new_n8859_ = NAND ( new_n8837_, new_n5930_ ) -new_n8860_ = OR ( new_n8840_, new_n8698_ ) -new_n8861_ = OR ( new_n8822_, new_n8703_ ) -new_n8862_ = NAND ( new_n8845_, new_n8711_ ) -new_n8863_ = OR ( new_n8826_, new_n8709_ ) -new_n8864_ = AND ( new_n8863_, new_n8862_, new_n8861_ ) -NET_16751 = NAND ( new_n8864_, new_n8860_, new_n8859_, new_n8858_ ) -new_n8866_ = NAND ( new_n8833_, NET_639 ) -new_n8867_ = NAND ( new_n8837_, new_n5937_ ) -new_n8868_ = OR ( new_n8840_, new_n8719_ ) -new_n8869_ = OR ( new_n8822_, new_n8724_ ) -new_n8870_ = NAND ( new_n8845_, new_n8732_ ) -new_n8871_ = OR ( new_n8826_, new_n8730_ ) -new_n8872_ = AND ( new_n8871_, new_n8870_, new_n8869_ ) -NET_16752 = NAND ( new_n8872_, new_n8868_, new_n8867_, new_n8866_ ) -new_n8874_ = NAND ( new_n8833_, NET_640 ) -new_n8875_ = NAND ( new_n8837_, new_n5944_ ) -new_n8876_ = OR ( new_n8840_, new_n8740_ ) -new_n8877_ = OR ( new_n8822_, new_n8745_ ) -new_n8878_ = NAND ( new_n8845_, new_n8753_ ) -new_n8879_ = OR ( new_n8826_, new_n8751_ ) -new_n8880_ = AND ( new_n8879_, new_n8878_, new_n8877_ ) -NET_16753 = NAND ( new_n8880_, new_n8876_, new_n8875_, new_n8874_ ) -new_n8882_ = NAND ( new_n8833_, NET_641 ) -new_n8883_ = NAND ( new_n8837_, new_n5951_ ) -new_n8884_ = OR ( new_n8840_, new_n8761_ ) -new_n8885_ = OR ( new_n8822_, new_n8766_ ) -new_n8886_ = NAND ( new_n8845_, new_n8774_ ) -new_n8887_ = OR ( new_n8826_, new_n8772_ ) -new_n8888_ = AND ( new_n8887_, new_n8886_, new_n8885_ ) -NET_16754 = NAND ( new_n8888_, new_n8884_, new_n8883_, new_n8882_ ) -new_n8890_ = NAND ( new_n8833_, NET_642 ) -new_n8891_ = NAND ( new_n8837_, new_n5958_ ) -new_n8892_ = OR ( new_n8840_, new_n8782_ ) -new_n8893_ = OR ( new_n8822_, new_n8788_ ) -new_n8894_ = NAND ( new_n8845_, new_n8796_ ) -new_n8895_ = OR ( new_n8826_, new_n8794_ ) -new_n8896_ = AND ( new_n8895_, new_n8894_, new_n8893_ ) -NET_16755 = NAND ( new_n8896_, new_n8892_, new_n8891_, new_n8890_ ) -new_n8898_ = NAND ( new_n8833_, NET_643 ) -new_n8899_ = NAND ( new_n8837_, new_n5965_ ) -new_n8900_ = OR ( new_n8840_, new_n8804_ ) -new_n8901_ = OR ( new_n8822_, new_n8810_ ) -new_n8902_ = NAND ( new_n8845_, new_n8818_ ) -new_n8903_ = OR ( new_n8826_, new_n8816_ ) -new_n8904_ = AND ( new_n8903_, new_n8902_, new_n8901_ ) -NET_16756 = NAND ( new_n8904_, new_n8900_, new_n8899_, new_n8898_ ) -new_n8906_ = NAND ( new_n3958_, NET_763, NET_762 ) -new_n8907_ = NAND ( new_n3819_, new_n3818_, NET_763, NET_762 ) -new_n8908_ = AND ( new_n8631_, new_n6945_ ) -new_n8909_ = NAND ( new_n8908_, new_n8622_ ) -new_n8910_ = NAND ( new_n8909_, new_n8609_, new_n4021_ ) -new_n8911_ = NAND ( new_n8910_, new_n8635_ ) -new_n8912_ = NAND ( new_n8911_, new_n8907_ ) -new_n8913_ = NAND ( new_n4021_, NET_625 ) -new_n8914_ = NAND ( new_n8913_, new_n8912_, new_n6155_ ) -new_n8915_ = NAND ( new_n8914_, new_n8906_ ) -new_n8916_ = NAND ( new_n8915_, new_n6611_ ) -new_n8917_ = NAND ( new_n8916_, NET_644 ) -new_n8918_ = OR ( new_n8910_, new_n8907_ ) -new_n8919_ = OR ( new_n8912_, new_n8906_ ) -new_n8920_ = NAND ( new_n8919_, new_n8918_ ) -new_n8921_ = NAND ( new_n8920_, new_n5916_ ) -new_n8922_ = NAND ( new_n8909_, new_n8609_ ) -new_n8923_ = OR ( new_n8922_, new_n4021_ ) -new_n8924_ = OR ( new_n8923_, new_n8651_ ) -new_n8925_ = OR ( new_n8906_, new_n8658_ ) -new_n8926_ = NOR ( new_n4021_, new_n3817_ ) -new_n8927_ = NOR ( new_n8907_, new_n6867_ ) -new_n8928_ = OR ( new_n8927_, new_n8926_ ) -new_n8929_ = NAND ( new_n8928_, new_n8666_ ) -new_n8930_ = OR ( new_n8909_, new_n8664_ ) -new_n8931_ = AND ( new_n8930_, new_n8929_, new_n8925_ ) -NET_16757 = NAND ( new_n8931_, new_n8924_, new_n8921_, new_n8917_ ) -new_n8933_ = NAND ( new_n8916_, NET_645 ) -new_n8934_ = NAND ( new_n8920_, new_n5923_ ) -new_n8935_ = OR ( new_n8923_, new_n8677_ ) -new_n8936_ = OR ( new_n8906_, new_n8683_ ) -new_n8937_ = NAND ( new_n8928_, new_n8690_ ) -new_n8938_ = OR ( new_n8909_, new_n8688_ ) -new_n8939_ = AND ( new_n8938_, new_n8937_, new_n8936_ ) -NET_16758 = NAND ( new_n8939_, new_n8935_, new_n8934_, new_n8933_ ) -new_n8941_ = NAND ( new_n8916_, NET_646 ) -new_n8942_ = NAND ( new_n8920_, new_n5930_ ) -new_n8943_ = OR ( new_n8923_, new_n8698_ ) -new_n8944_ = OR ( new_n8906_, new_n8703_ ) -new_n8945_ = NAND ( new_n8928_, new_n8711_ ) -new_n8946_ = OR ( new_n8909_, new_n8709_ ) -new_n8947_ = AND ( new_n8946_, new_n8945_, new_n8944_ ) -NET_16759 = NAND ( new_n8947_, new_n8943_, new_n8942_, new_n8941_ ) -new_n8949_ = NAND ( new_n8916_, NET_647 ) -new_n8950_ = NAND ( new_n8920_, new_n5937_ ) -new_n8951_ = OR ( new_n8923_, new_n8719_ ) -new_n8952_ = OR ( new_n8906_, new_n8724_ ) -new_n8953_ = NAND ( new_n8928_, new_n8732_ ) -new_n8954_ = OR ( new_n8909_, new_n8730_ ) -new_n8955_ = AND ( new_n8954_, new_n8953_, new_n8952_ ) -NET_16760 = NAND ( new_n8955_, new_n8951_, new_n8950_, new_n8949_ ) -new_n8957_ = NAND ( new_n8916_, NET_648 ) -new_n8958_ = NAND ( new_n8920_, new_n5944_ ) -new_n8959_ = OR ( new_n8923_, new_n8740_ ) -new_n8960_ = OR ( new_n8906_, new_n8745_ ) -new_n8961_ = NAND ( new_n8928_, new_n8753_ ) -new_n8962_ = OR ( new_n8909_, new_n8751_ ) -new_n8963_ = AND ( new_n8962_, new_n8961_, new_n8960_ ) -NET_16761 = NAND ( new_n8963_, new_n8959_, new_n8958_, new_n8957_ ) -new_n8965_ = NAND ( new_n8916_, NET_649 ) -new_n8966_ = NAND ( new_n8920_, new_n5951_ ) -new_n8967_ = OR ( new_n8923_, new_n8761_ ) -new_n8968_ = OR ( new_n8906_, new_n8766_ ) -new_n8969_ = NAND ( new_n8928_, new_n8774_ ) -new_n8970_ = OR ( new_n8909_, new_n8772_ ) -new_n8971_ = AND ( new_n8970_, new_n8969_, new_n8968_ ) -NET_16762 = NAND ( new_n8971_, new_n8967_, new_n8966_, new_n8965_ ) -new_n8973_ = NAND ( new_n8916_, NET_650 ) -new_n8974_ = NAND ( new_n8920_, new_n5958_ ) -new_n8975_ = OR ( new_n8923_, new_n8782_ ) -new_n8976_ = OR ( new_n8906_, new_n8788_ ) -new_n8977_ = NAND ( new_n8928_, new_n8796_ ) -new_n8978_ = OR ( new_n8909_, new_n8794_ ) -new_n8979_ = AND ( new_n8978_, new_n8977_, new_n8976_ ) -NET_16763 = NAND ( new_n8979_, new_n8975_, new_n8974_, new_n8973_ ) -new_n8981_ = NAND ( new_n8916_, NET_651 ) -new_n8982_ = NAND ( new_n8920_, new_n5965_ ) -new_n8983_ = OR ( new_n8923_, new_n8804_ ) -new_n8984_ = OR ( new_n8906_, new_n8810_ ) -new_n8985_ = NAND ( new_n8928_, new_n8818_ ) -new_n8986_ = OR ( new_n8909_, new_n8816_ ) -new_n8987_ = AND ( new_n8986_, new_n8985_, new_n8984_ ) -NET_16764 = NAND ( new_n8987_, new_n8983_, new_n8982_, new_n8981_ ) -new_n8989_ = NOR ( NET_765, NET_764 ) -new_n8990_ = NOT ( new_n8989_ ) -new_n8991_ = NOR ( new_n8990_, new_n8606_ ) -new_n8992_ = NOT ( new_n8991_ ) -new_n8993_ = NAND ( new_n3820_, new_n3824_, NET_762 ) -new_n8994_ = NAND ( new_n8908_, new_n8825_ ) -new_n8995_ = NAND ( new_n8994_, new_n8609_, new_n4036_ ) -new_n8996_ = NAND ( new_n8995_, new_n8635_ ) -new_n8997_ = NAND ( new_n8996_, new_n8993_ ) -new_n8998_ = NAND ( new_n4036_, NET_625 ) -new_n8999_ = NAND ( new_n8998_, new_n8997_, new_n6155_ ) -new_n9000_ = NAND ( new_n8999_, new_n8992_ ) -new_n9001_ = NAND ( new_n9000_, new_n6611_ ) -new_n9002_ = NAND ( new_n9001_, NET_652 ) -new_n9003_ = OR ( new_n8995_, new_n8993_ ) -new_n9004_ = OR ( new_n8997_, new_n8992_ ) -new_n9005_ = NAND ( new_n9004_, new_n9003_ ) -new_n9006_ = NAND ( new_n9005_, new_n5916_ ) -new_n9007_ = NAND ( new_n8994_, new_n8609_ ) -new_n9008_ = OR ( new_n9007_, new_n4036_ ) -new_n9009_ = OR ( new_n9008_, new_n8651_ ) -new_n9010_ = OR ( new_n8992_, new_n8658_ ) -new_n9011_ = NOR ( new_n4036_, new_n3817_ ) -new_n9012_ = NOR ( new_n8993_, new_n6867_ ) -new_n9013_ = OR ( new_n9012_, new_n9011_ ) -new_n9014_ = NAND ( new_n9013_, new_n8666_ ) -new_n9015_ = OR ( new_n8994_, new_n8664_ ) -new_n9016_ = AND ( new_n9015_, new_n9014_, new_n9010_ ) -NET_16765 = NAND ( new_n9016_, new_n9009_, new_n9006_, new_n9002_ ) -new_n9018_ = NAND ( new_n9001_, NET_653 ) -new_n9019_ = NAND ( new_n9005_, new_n5923_ ) -new_n9020_ = OR ( new_n9008_, new_n8677_ ) -new_n9021_ = NAND ( new_n8991_, new_n8682_ ) -new_n9022_ = NAND ( new_n9013_, new_n8690_ ) -new_n9023_ = OR ( new_n8994_, new_n8688_ ) -new_n9024_ = AND ( new_n9023_, new_n9022_, new_n9021_ ) -NET_16766 = NAND ( new_n9024_, new_n9020_, new_n9019_, new_n9018_ ) -new_n9026_ = NAND ( new_n9001_, NET_654 ) -new_n9027_ = NAND ( new_n9005_, new_n5930_ ) -new_n9028_ = OR ( new_n9008_, new_n8698_ ) -new_n9029_ = OR ( new_n8992_, new_n8703_ ) -new_n9030_ = NAND ( new_n9013_, new_n8711_ ) -new_n9031_ = OR ( new_n8994_, new_n8709_ ) -new_n9032_ = AND ( new_n9031_, new_n9030_, new_n9029_ ) -NET_16767 = NAND ( new_n9032_, new_n9028_, new_n9027_, new_n9026_ ) -new_n9034_ = NAND ( new_n9001_, NET_655 ) -new_n9035_ = NAND ( new_n9005_, new_n5937_ ) -new_n9036_ = OR ( new_n9008_, new_n8719_ ) -new_n9037_ = OR ( new_n8992_, new_n8724_ ) -new_n9038_ = NAND ( new_n9013_, new_n8732_ ) -new_n9039_ = OR ( new_n8994_, new_n8730_ ) -new_n9040_ = AND ( new_n9039_, new_n9038_, new_n9037_ ) -NET_16768 = NAND ( new_n9040_, new_n9036_, new_n9035_, new_n9034_ ) -new_n9042_ = NAND ( new_n9001_, NET_656 ) -new_n9043_ = NAND ( new_n9005_, new_n5944_ ) -new_n9044_ = OR ( new_n9008_, new_n8740_ ) -new_n9045_ = OR ( new_n8992_, new_n8745_ ) -new_n9046_ = NAND ( new_n9013_, new_n8753_ ) -new_n9047_ = OR ( new_n8994_, new_n8751_ ) -new_n9048_ = AND ( new_n9047_, new_n9046_, new_n9045_ ) -NET_16769 = NAND ( new_n9048_, new_n9044_, new_n9043_, new_n9042_ ) -new_n9050_ = NAND ( new_n9001_, NET_657 ) -new_n9051_ = NAND ( new_n9005_, new_n5951_ ) -new_n9052_ = OR ( new_n9008_, new_n8761_ ) -new_n9053_ = OR ( new_n8992_, new_n8766_ ) -new_n9054_ = NAND ( new_n9013_, new_n8774_ ) -new_n9055_ = OR ( new_n8994_, new_n8772_ ) -new_n9056_ = AND ( new_n9055_, new_n9054_, new_n9053_ ) -NET_16770 = NAND ( new_n9056_, new_n9052_, new_n9051_, new_n9050_ ) -new_n9058_ = NAND ( new_n9001_, NET_658 ) -new_n9059_ = NAND ( new_n9005_, new_n5958_ ) -new_n9060_ = OR ( new_n9008_, new_n8782_ ) -new_n9061_ = NAND ( new_n8991_, new_n8787_ ) -new_n9062_ = NAND ( new_n9013_, new_n8796_ ) -new_n9063_ = OR ( new_n8994_, new_n8794_ ) -new_n9064_ = AND ( new_n9063_, new_n9062_, new_n9061_ ) -NET_16771 = NAND ( new_n9064_, new_n9060_, new_n9059_, new_n9058_ ) -new_n9066_ = NAND ( new_n9001_, NET_659 ) -new_n9067_ = NAND ( new_n9005_, new_n5965_ ) -new_n9068_ = OR ( new_n9008_, new_n8804_ ) -new_n9069_ = NAND ( new_n8991_, new_n8809_ ) -new_n9070_ = NAND ( new_n9013_, new_n8818_ ) -new_n9071_ = OR ( new_n8994_, new_n8816_ ) -new_n9072_ = AND ( new_n9071_, new_n9070_, new_n9069_ ) -NET_16772 = NAND ( new_n9072_, new_n9068_, new_n9067_, new_n9066_ ) -new_n9074_ = OR ( new_n3986_, new_n8605_ ) -new_n9075_ = NAND ( new_n3819_, NET_764, new_n3824_, NET_762 ) -new_n9076_ = NOT ( new_n8621_ ) -new_n9077_ = NOR ( new_n9076_, new_n6994_ ) -new_n9078_ = NAND ( new_n9077_, new_n8632_ ) -new_n9079_ = NAND ( new_n9078_, new_n8609_, new_n4034_ ) -new_n9080_ = NAND ( new_n9079_, new_n8635_ ) -new_n9081_ = NAND ( new_n9080_, new_n9075_ ) -new_n9082_ = NAND ( new_n4034_, NET_625 ) -new_n9083_ = NAND ( new_n9082_, new_n9081_, new_n6155_ ) -new_n9084_ = NAND ( new_n9083_, new_n9074_ ) -new_n9085_ = NAND ( new_n9084_, new_n6611_ ) -new_n9086_ = NAND ( new_n9085_, NET_660 ) -new_n9087_ = NAND ( new_n9078_, new_n8609_ ) -new_n9088_ = OR ( new_n9087_, new_n9075_ ) -new_n9089_ = OR ( new_n9081_, new_n9074_ ) -new_n9090_ = NAND ( new_n9089_, new_n9088_ ) -new_n9091_ = NAND ( new_n9090_, new_n5916_ ) -new_n9092_ = OR ( new_n9087_, new_n4034_ ) -new_n9093_ = OR ( new_n9092_, new_n8651_ ) -new_n9094_ = OR ( new_n9074_, new_n8658_ ) -new_n9095_ = NOR ( new_n4034_, new_n3817_ ) -new_n9096_ = NOR ( new_n9075_, new_n6867_ ) -new_n9097_ = OR ( new_n9096_, new_n9095_ ) -new_n9098_ = NAND ( new_n9097_, new_n8666_ ) -new_n9099_ = OR ( new_n9078_, new_n8664_ ) -new_n9100_ = AND ( new_n9099_, new_n9098_, new_n9094_ ) -NET_16773 = NAND ( new_n9100_, new_n9093_, new_n9091_, new_n9086_ ) -new_n9102_ = NAND ( new_n9085_, NET_661 ) -new_n9103_ = NAND ( new_n9090_, new_n5923_ ) -new_n9104_ = OR ( new_n9092_, new_n8677_ ) -new_n9105_ = OR ( new_n9074_, new_n8683_ ) -new_n9106_ = NAND ( new_n9097_, new_n8690_ ) -new_n9107_ = OR ( new_n9078_, new_n8688_ ) -new_n9108_ = AND ( new_n9107_, new_n9106_, new_n9105_ ) -NET_16774 = NAND ( new_n9108_, new_n9104_, new_n9103_, new_n9102_ ) -new_n9110_ = NAND ( new_n9085_, NET_662 ) -new_n9111_ = NAND ( new_n9090_, new_n5930_ ) -new_n9112_ = OR ( new_n9092_, new_n8698_ ) -new_n9113_ = OR ( new_n9074_, new_n8703_ ) -new_n9114_ = NAND ( new_n9097_, new_n8711_ ) -new_n9115_ = OR ( new_n9078_, new_n8709_ ) -new_n9116_ = AND ( new_n9115_, new_n9114_, new_n9113_ ) -NET_16775 = NAND ( new_n9116_, new_n9112_, new_n9111_, new_n9110_ ) -new_n9118_ = NAND ( new_n9085_, NET_663 ) -new_n9119_ = NAND ( new_n9090_, new_n5937_ ) -new_n9120_ = OR ( new_n9092_, new_n8719_ ) -new_n9121_ = OR ( new_n9074_, new_n8724_ ) -new_n9122_ = NAND ( new_n9097_, new_n8732_ ) -new_n9123_ = OR ( new_n9078_, new_n8730_ ) -new_n9124_ = AND ( new_n9123_, new_n9122_, new_n9121_ ) -NET_16776 = NAND ( new_n9124_, new_n9120_, new_n9119_, new_n9118_ ) -new_n9126_ = NAND ( new_n9085_, NET_664 ) -new_n9127_ = NAND ( new_n9090_, new_n5944_ ) -new_n9128_ = OR ( new_n9092_, new_n8740_ ) -new_n9129_ = OR ( new_n9074_, new_n8745_ ) -new_n9130_ = NAND ( new_n9097_, new_n8753_ ) -new_n9131_ = OR ( new_n9078_, new_n8751_ ) -new_n9132_ = AND ( new_n9131_, new_n9130_, new_n9129_ ) -NET_16777 = NAND ( new_n9132_, new_n9128_, new_n9127_, new_n9126_ ) -new_n9134_ = NAND ( new_n9085_, NET_665 ) -new_n9135_ = NAND ( new_n9090_, new_n5951_ ) -new_n9136_ = OR ( new_n9092_, new_n8761_ ) -new_n9137_ = OR ( new_n9074_, new_n8766_ ) -new_n9138_ = NAND ( new_n9097_, new_n8774_ ) -new_n9139_ = OR ( new_n9078_, new_n8772_ ) -new_n9140_ = AND ( new_n9139_, new_n9138_, new_n9137_ ) -NET_16778 = NAND ( new_n9140_, new_n9136_, new_n9135_, new_n9134_ ) -new_n9142_ = NAND ( new_n9085_, NET_666 ) -new_n9143_ = NAND ( new_n9090_, new_n5958_ ) -new_n9144_ = OR ( new_n9092_, new_n8782_ ) -new_n9145_ = OR ( new_n9074_, new_n8788_ ) -new_n9146_ = NAND ( new_n9097_, new_n8796_ ) -new_n9147_ = OR ( new_n9078_, new_n8794_ ) -new_n9148_ = AND ( new_n9147_, new_n9146_, new_n9145_ ) -NET_16779 = NAND ( new_n9148_, new_n9144_, new_n9143_, new_n9142_ ) -new_n9150_ = NAND ( new_n9085_, NET_667 ) -new_n9151_ = NAND ( new_n9090_, new_n5965_ ) -new_n9152_ = OR ( new_n9092_, new_n8804_ ) -new_n9153_ = OR ( new_n9074_, new_n8810_ ) -new_n9154_ = NAND ( new_n9097_, new_n8818_ ) -new_n9155_ = OR ( new_n9078_, new_n8816_ ) -new_n9156_ = AND ( new_n9155_, new_n9154_, new_n9153_ ) -NET_16780 = NAND ( new_n9156_, new_n9152_, new_n9151_, new_n9150_ ) -new_n9158_ = NAND ( new_n3959_, new_n3824_, NET_762 ) -new_n9159_ = NAND ( NET_765, new_n3818_, new_n3824_, NET_762 ) -new_n9160_ = NOR ( new_n9076_, new_n8824_ ) -new_n9161_ = NAND ( new_n9160_, new_n8632_ ) -new_n9162_ = NAND ( new_n9161_, new_n8609_, new_n4032_ ) -new_n9163_ = NAND ( new_n9162_, new_n8635_ ) -new_n9164_ = NAND ( new_n9163_, new_n9159_ ) -new_n9165_ = NAND ( new_n4032_, NET_625 ) -new_n9166_ = NAND ( new_n9165_, new_n9164_, new_n6155_ ) -new_n9167_ = NAND ( new_n9166_, new_n9158_ ) -new_n9168_ = NAND ( new_n9167_, new_n6611_ ) -new_n9169_ = NAND ( new_n9168_, NET_668 ) -new_n9170_ = OR ( new_n9162_, new_n9159_ ) -new_n9171_ = OR ( new_n9164_, new_n9158_ ) -new_n9172_ = NAND ( new_n9171_, new_n9170_ ) -new_n9173_ = NAND ( new_n9172_, new_n5916_ ) -new_n9174_ = NAND ( new_n9161_, new_n8609_ ) -new_n9175_ = OR ( new_n9174_, new_n4032_ ) -new_n9176_ = OR ( new_n9175_, new_n8651_ ) -new_n9177_ = OR ( new_n9158_, new_n8658_ ) -new_n9178_ = NOR ( new_n4032_, new_n3817_ ) -new_n9179_ = NOR ( new_n9159_, new_n6867_ ) -new_n9180_ = OR ( new_n9179_, new_n9178_ ) -new_n9181_ = NAND ( new_n9180_, new_n8666_ ) -new_n9182_ = OR ( new_n9161_, new_n8664_ ) -new_n9183_ = AND ( new_n9182_, new_n9181_, new_n9177_ ) -NET_16781 = NAND ( new_n9183_, new_n9176_, new_n9173_, new_n9169_ ) -new_n9185_ = NAND ( new_n9168_, NET_669 ) -new_n9186_ = NAND ( new_n9172_, new_n5923_ ) -new_n9187_ = OR ( new_n9175_, new_n8677_ ) -new_n9188_ = OR ( new_n9158_, new_n8683_ ) -new_n9189_ = NAND ( new_n9180_, new_n8690_ ) -new_n9190_ = OR ( new_n9161_, new_n8688_ ) -new_n9191_ = AND ( new_n9190_, new_n9189_, new_n9188_ ) -NET_16782 = NAND ( new_n9191_, new_n9187_, new_n9186_, new_n9185_ ) -new_n9193_ = NAND ( new_n9168_, NET_670 ) -new_n9194_ = NAND ( new_n9172_, new_n5930_ ) -new_n9195_ = OR ( new_n9175_, new_n8698_ ) -new_n9196_ = OR ( new_n9158_, new_n8703_ ) -new_n9197_ = NAND ( new_n9180_, new_n8711_ ) -new_n9198_ = OR ( new_n9161_, new_n8709_ ) -new_n9199_ = AND ( new_n9198_, new_n9197_, new_n9196_ ) -NET_16783 = NAND ( new_n9199_, new_n9195_, new_n9194_, new_n9193_ ) -new_n9201_ = NAND ( new_n9168_, NET_671 ) -new_n9202_ = NAND ( new_n9172_, new_n5937_ ) -new_n9203_ = OR ( new_n9175_, new_n8719_ ) -new_n9204_ = OR ( new_n9158_, new_n8724_ ) -new_n9205_ = NAND ( new_n9180_, new_n8732_ ) -new_n9206_ = OR ( new_n9161_, new_n8730_ ) -new_n9207_ = AND ( new_n9206_, new_n9205_, new_n9204_ ) -NET_16784 = NAND ( new_n9207_, new_n9203_, new_n9202_, new_n9201_ ) -new_n9209_ = NAND ( new_n9168_, NET_672 ) -new_n9210_ = NAND ( new_n9172_, new_n5944_ ) -new_n9211_ = OR ( new_n9175_, new_n8740_ ) -new_n9212_ = OR ( new_n9158_, new_n8745_ ) -new_n9213_ = NAND ( new_n9180_, new_n8753_ ) -new_n9214_ = OR ( new_n9161_, new_n8751_ ) -new_n9215_ = AND ( new_n9214_, new_n9213_, new_n9212_ ) -NET_16785 = NAND ( new_n9215_, new_n9211_, new_n9210_, new_n9209_ ) -new_n9217_ = NAND ( new_n9168_, NET_673 ) -new_n9218_ = NAND ( new_n9172_, new_n5951_ ) -new_n9219_ = OR ( new_n9175_, new_n8761_ ) -new_n9220_ = OR ( new_n9158_, new_n8766_ ) -new_n9221_ = NAND ( new_n9180_, new_n8774_ ) -new_n9222_ = OR ( new_n9161_, new_n8772_ ) -new_n9223_ = AND ( new_n9222_, new_n9221_, new_n9220_ ) -NET_16786 = NAND ( new_n9223_, new_n9219_, new_n9218_, new_n9217_ ) -new_n9225_ = NAND ( new_n9168_, NET_674 ) -new_n9226_ = NAND ( new_n9172_, new_n5958_ ) -new_n9227_ = OR ( new_n9175_, new_n8782_ ) -new_n9228_ = OR ( new_n9158_, new_n8788_ ) -new_n9229_ = NAND ( new_n9180_, new_n8796_ ) -new_n9230_ = OR ( new_n9161_, new_n8794_ ) -new_n9231_ = AND ( new_n9230_, new_n9229_, new_n9228_ ) -NET_16787 = NAND ( new_n9231_, new_n9227_, new_n9226_, new_n9225_ ) -new_n9233_ = NAND ( new_n9168_, NET_675 ) -new_n9234_ = NAND ( new_n9172_, new_n5965_ ) -new_n9235_ = OR ( new_n9175_, new_n8804_ ) -new_n9236_ = OR ( new_n9158_, new_n8810_ ) -new_n9237_ = NAND ( new_n9180_, new_n8818_ ) -new_n9238_ = OR ( new_n9161_, new_n8816_ ) -new_n9239_ = AND ( new_n9238_, new_n9237_, new_n9236_ ) -NET_16788 = NAND ( new_n9239_, new_n9235_, new_n9234_, new_n9233_ ) -new_n9241_ = NAND ( new_n3958_, new_n3824_, NET_762 ) -new_n9242_ = NAND ( new_n3819_, new_n3818_, new_n3824_, NET_762 ) -new_n9243_ = NAND ( new_n9077_, new_n8908_ ) -new_n9244_ = NAND ( new_n9243_, new_n8609_, new_n4030_ ) -new_n9245_ = NAND ( new_n9244_, new_n8635_ ) -new_n9246_ = NAND ( new_n9245_, new_n9242_ ) -new_n9247_ = NAND ( new_n4030_, NET_625 ) -new_n9248_ = NAND ( new_n9247_, new_n9246_, new_n6155_ ) -new_n9249_ = NAND ( new_n9248_, new_n9241_ ) -new_n9250_ = NAND ( new_n9249_, new_n6611_ ) -new_n9251_ = NAND ( new_n9250_, NET_676 ) -new_n9252_ = OR ( new_n9244_, new_n9242_ ) -new_n9253_ = OR ( new_n9246_, new_n9241_ ) -new_n9254_ = NAND ( new_n9253_, new_n9252_ ) -new_n9255_ = NAND ( new_n9254_, new_n5916_ ) -new_n9256_ = NAND ( new_n9243_, new_n8609_ ) -new_n9257_ = OR ( new_n9256_, new_n4030_ ) -new_n9258_ = OR ( new_n9257_, new_n8651_ ) -new_n9259_ = OR ( new_n9241_, new_n8658_ ) -new_n9260_ = NOR ( new_n4030_, new_n3817_ ) -new_n9261_ = NOR ( new_n9242_, new_n6867_ ) -new_n9262_ = OR ( new_n9261_, new_n9260_ ) -new_n9263_ = NAND ( new_n9262_, new_n8666_ ) -new_n9264_ = OR ( new_n9243_, new_n8664_ ) -new_n9265_ = AND ( new_n9264_, new_n9263_, new_n9259_ ) -NET_16789 = NAND ( new_n9265_, new_n9258_, new_n9255_, new_n9251_ ) -new_n9267_ = NAND ( new_n9250_, NET_677 ) -new_n9268_ = NAND ( new_n9254_, new_n5923_ ) -new_n9269_ = OR ( new_n9257_, new_n8677_ ) -new_n9270_ = OR ( new_n9241_, new_n8683_ ) -new_n9271_ = NAND ( new_n9262_, new_n8690_ ) -new_n9272_ = OR ( new_n9243_, new_n8688_ ) -new_n9273_ = AND ( new_n9272_, new_n9271_, new_n9270_ ) -NET_16790 = NAND ( new_n9273_, new_n9269_, new_n9268_, new_n9267_ ) -new_n9275_ = NAND ( new_n9250_, NET_678 ) -new_n9276_ = NAND ( new_n9254_, new_n5930_ ) -new_n9277_ = OR ( new_n9257_, new_n8698_ ) -new_n9278_ = OR ( new_n9241_, new_n8703_ ) -new_n9279_ = NAND ( new_n9262_, new_n8711_ ) -new_n9280_ = OR ( new_n9243_, new_n8709_ ) -new_n9281_ = AND ( new_n9280_, new_n9279_, new_n9278_ ) -NET_16791 = NAND ( new_n9281_, new_n9277_, new_n9276_, new_n9275_ ) -new_n9283_ = NAND ( new_n9250_, NET_679 ) -new_n9284_ = NAND ( new_n9254_, new_n5937_ ) -new_n9285_ = OR ( new_n9257_, new_n8719_ ) -new_n9286_ = OR ( new_n9241_, new_n8724_ ) -new_n9287_ = NAND ( new_n9262_, new_n8732_ ) -new_n9288_ = OR ( new_n9243_, new_n8730_ ) -new_n9289_ = AND ( new_n9288_, new_n9287_, new_n9286_ ) -NET_16792 = NAND ( new_n9289_, new_n9285_, new_n9284_, new_n9283_ ) -new_n9291_ = NAND ( new_n9250_, NET_680 ) -new_n9292_ = NAND ( new_n9254_, new_n5944_ ) -new_n9293_ = OR ( new_n9257_, new_n8740_ ) -new_n9294_ = OR ( new_n9241_, new_n8745_ ) -new_n9295_ = NAND ( new_n9262_, new_n8753_ ) -new_n9296_ = OR ( new_n9243_, new_n8751_ ) -new_n9297_ = AND ( new_n9296_, new_n9295_, new_n9294_ ) -NET_16793 = NAND ( new_n9297_, new_n9293_, new_n9292_, new_n9291_ ) -new_n9299_ = NAND ( new_n9250_, NET_681 ) -new_n9300_ = NAND ( new_n9254_, new_n5951_ ) -new_n9301_ = OR ( new_n9257_, new_n8761_ ) -new_n9302_ = OR ( new_n9241_, new_n8766_ ) -new_n9303_ = NAND ( new_n9262_, new_n8774_ ) -new_n9304_ = OR ( new_n9243_, new_n8772_ ) -new_n9305_ = AND ( new_n9304_, new_n9303_, new_n9302_ ) -NET_16794 = NAND ( new_n9305_, new_n9301_, new_n9300_, new_n9299_ ) -new_n9307_ = NAND ( new_n9250_, NET_682 ) -new_n9308_ = NAND ( new_n9254_, new_n5958_ ) -new_n9309_ = OR ( new_n9257_, new_n8782_ ) -new_n9310_ = OR ( new_n9241_, new_n8788_ ) -new_n9311_ = NAND ( new_n9262_, new_n8796_ ) -new_n9312_ = OR ( new_n9243_, new_n8794_ ) -new_n9313_ = AND ( new_n9312_, new_n9311_, new_n9310_ ) -NET_16795 = NAND ( new_n9313_, new_n9309_, new_n9308_, new_n9307_ ) -new_n9315_ = NAND ( new_n9250_, NET_683 ) -new_n9316_ = NAND ( new_n9254_, new_n5965_ ) -new_n9317_ = OR ( new_n9257_, new_n8804_ ) -new_n9318_ = OR ( new_n9241_, new_n8810_ ) -new_n9319_ = NAND ( new_n9262_, new_n8818_ ) -new_n9320_ = OR ( new_n9243_, new_n8816_ ) -new_n9321_ = AND ( new_n9320_, new_n9319_, new_n9318_ ) -NET_16796 = NAND ( new_n9321_, new_n9317_, new_n9316_, new_n9315_ ) -new_n9323_ = OR ( new_n8990_, new_n3986_ ) -new_n9324_ = NAND ( new_n3820_, NET_763, new_n3983_ ) -new_n9325_ = NAND ( new_n9160_, new_n8908_ ) -new_n9326_ = NAND ( new_n9325_, new_n8609_, new_n4009_ ) -new_n9327_ = NAND ( new_n9326_, new_n8635_ ) -new_n9328_ = NAND ( new_n9327_, new_n9324_ ) -new_n9329_ = NAND ( new_n4009_, NET_625 ) -new_n9330_ = NAND ( new_n9329_, new_n9328_, new_n6155_ ) -new_n9331_ = NAND ( new_n9330_, new_n9323_ ) -new_n9332_ = NAND ( new_n9331_, new_n6611_ ) -new_n9333_ = NAND ( new_n9332_, NET_684 ) -new_n9334_ = OR ( new_n9326_, new_n9324_ ) -new_n9335_ = OR ( new_n9328_, new_n9323_ ) -new_n9336_ = NAND ( new_n9335_, new_n9334_ ) -new_n9337_ = NAND ( new_n9336_, new_n5916_ ) -new_n9338_ = NAND ( new_n9325_, new_n8609_ ) -new_n9339_ = OR ( new_n9338_, new_n4009_ ) -new_n9340_ = OR ( new_n9339_, new_n8651_ ) -new_n9341_ = OR ( new_n9323_, new_n8658_ ) -new_n9342_ = NOR ( new_n4009_, new_n3817_ ) -new_n9343_ = NOR ( new_n9324_, new_n6867_ ) -new_n9344_ = OR ( new_n9343_, new_n9342_ ) -new_n9345_ = NAND ( new_n9344_, new_n8666_ ) -new_n9346_ = OR ( new_n9325_, new_n8664_ ) -new_n9347_ = AND ( new_n9346_, new_n9345_, new_n9341_ ) -NET_16797 = NAND ( new_n9347_, new_n9340_, new_n9337_, new_n9333_ ) -new_n9349_ = NAND ( new_n9332_, NET_685 ) -new_n9350_ = NAND ( new_n9336_, new_n5923_ ) -new_n9351_ = OR ( new_n9339_, new_n8677_ ) -new_n9352_ = OR ( new_n9323_, new_n8683_ ) -new_n9353_ = NAND ( new_n9344_, new_n8690_ ) -new_n9354_ = OR ( new_n9325_, new_n8688_ ) -new_n9355_ = AND ( new_n9354_, new_n9353_, new_n9352_ ) -NET_16798 = NAND ( new_n9355_, new_n9351_, new_n9350_, new_n9349_ ) -new_n9357_ = NAND ( new_n9332_, NET_686 ) -new_n9358_ = NAND ( new_n9336_, new_n5930_ ) -new_n9359_ = OR ( new_n9339_, new_n8698_ ) -new_n9360_ = OR ( new_n9323_, new_n8703_ ) -new_n9361_ = NAND ( new_n9344_, new_n8711_ ) -new_n9362_ = OR ( new_n9325_, new_n8709_ ) -new_n9363_ = AND ( new_n9362_, new_n9361_, new_n9360_ ) -NET_16799 = NAND ( new_n9363_, new_n9359_, new_n9358_, new_n9357_ ) -new_n9365_ = NAND ( new_n9332_, NET_687 ) -new_n9366_ = NAND ( new_n9336_, new_n5937_ ) -new_n9367_ = OR ( new_n9339_, new_n8719_ ) -new_n9368_ = OR ( new_n9323_, new_n8724_ ) -new_n9369_ = NAND ( new_n9344_, new_n8732_ ) -new_n9370_ = OR ( new_n9325_, new_n8730_ ) -new_n9371_ = AND ( new_n9370_, new_n9369_, new_n9368_ ) -NET_16800 = NAND ( new_n9371_, new_n9367_, new_n9366_, new_n9365_ ) -new_n9373_ = NAND ( new_n9332_, NET_688 ) -new_n9374_ = NAND ( new_n9336_, new_n5944_ ) -new_n9375_ = OR ( new_n9339_, new_n8740_ ) -new_n9376_ = OR ( new_n9323_, new_n8745_ ) -new_n9377_ = NAND ( new_n9344_, new_n8753_ ) -new_n9378_ = OR ( new_n9325_, new_n8751_ ) -new_n9379_ = AND ( new_n9378_, new_n9377_, new_n9376_ ) -NET_16801 = NAND ( new_n9379_, new_n9375_, new_n9374_, new_n9373_ ) -new_n9381_ = NAND ( new_n9332_, NET_689 ) -new_n9382_ = NAND ( new_n9336_, new_n5951_ ) -new_n9383_ = OR ( new_n9339_, new_n8761_ ) -new_n9384_ = OR ( new_n9323_, new_n8766_ ) -new_n9385_ = NAND ( new_n9344_, new_n8774_ ) -new_n9386_ = OR ( new_n9325_, new_n8772_ ) -new_n9387_ = AND ( new_n9386_, new_n9385_, new_n9384_ ) -NET_16802 = NAND ( new_n9387_, new_n9383_, new_n9382_, new_n9381_ ) -new_n9389_ = NAND ( new_n9332_, NET_690 ) -new_n9390_ = NAND ( new_n9336_, new_n5958_ ) -new_n9391_ = OR ( new_n9339_, new_n8782_ ) -new_n9392_ = OR ( new_n9323_, new_n8788_ ) -new_n9393_ = NAND ( new_n9344_, new_n8796_ ) -new_n9394_ = OR ( new_n9325_, new_n8794_ ) -new_n9395_ = AND ( new_n9394_, new_n9393_, new_n9392_ ) -NET_16803 = NAND ( new_n9395_, new_n9391_, new_n9390_, new_n9389_ ) -new_n9397_ = NAND ( new_n9332_, NET_691 ) -new_n9398_ = NAND ( new_n9336_, new_n5965_ ) -new_n9399_ = OR ( new_n9339_, new_n8804_ ) -new_n9400_ = OR ( new_n9323_, new_n8810_ ) -new_n9401_ = NAND ( new_n9344_, new_n8818_ ) -new_n9402_ = OR ( new_n9325_, new_n8816_ ) -new_n9403_ = AND ( new_n9402_, new_n9401_, new_n9400_ ) -NET_16804 = NAND ( new_n9403_, new_n9399_, new_n9398_, new_n9397_ ) -new_n9405_ = NAND ( new_n3819_, NET_764, NET_763, new_n3983_ ) -new_n9406_ = NOR ( new_n8631_, new_n6945_ ) -new_n9407_ = NAND ( new_n9406_, new_n8622_ ) -new_n9408_ = NAND ( new_n9407_, new_n8609_, new_n4005_ ) -new_n9409_ = NAND ( new_n9408_, new_n8635_ ) -new_n9410_ = NAND ( new_n9409_, new_n9405_ ) -new_n9411_ = NAND ( new_n4005_, NET_625 ) -new_n9412_ = NAND ( new_n9411_, new_n9410_, new_n6155_ ) -new_n9413_ = NAND ( new_n9412_, new_n3984_ ) -new_n9414_ = NAND ( new_n9413_, new_n6611_ ) -new_n9415_ = NAND ( new_n9414_, NET_692 ) -new_n9416_ = NAND ( new_n9407_, new_n8609_ ) -new_n9417_ = OR ( new_n9416_, new_n9405_ ) -new_n9418_ = OR ( new_n9410_, new_n3984_ ) -new_n9419_ = NAND ( new_n9418_, new_n9417_ ) -new_n9420_ = NAND ( new_n9419_, new_n5916_ ) -new_n9421_ = OR ( new_n9416_, new_n4005_ ) -new_n9422_ = OR ( new_n9421_, new_n8651_ ) -new_n9423_ = OR ( new_n8658_, new_n3984_ ) -new_n9424_ = NOR ( new_n9405_, new_n6867_ ) -new_n9425_ = NOR ( new_n4005_, new_n3817_ ) -new_n9426_ = OR ( new_n9425_, new_n9424_ ) -new_n9427_ = NAND ( new_n9426_, new_n8666_ ) -new_n9428_ = OR ( new_n9407_, new_n8664_ ) -new_n9429_ = AND ( new_n9428_, new_n9427_, new_n9423_ ) -NET_16805 = NAND ( new_n9429_, new_n9422_, new_n9420_, new_n9415_ ) -new_n9431_ = NAND ( new_n9414_, NET_693 ) -new_n9432_ = NAND ( new_n9419_, new_n5923_ ) -new_n9433_ = OR ( new_n9421_, new_n8677_ ) -new_n9434_ = OR ( new_n8683_, new_n3984_ ) -new_n9435_ = NAND ( new_n9426_, new_n8690_ ) -new_n9436_ = OR ( new_n9407_, new_n8688_ ) -new_n9437_ = AND ( new_n9436_, new_n9435_, new_n9434_ ) -NET_16806 = NAND ( new_n9437_, new_n9433_, new_n9432_, new_n9431_ ) -new_n9439_ = NAND ( new_n9414_, NET_694 ) -new_n9440_ = NAND ( new_n9419_, new_n5930_ ) -new_n9441_ = OR ( new_n9421_, new_n8698_ ) -new_n9442_ = OR ( new_n8703_, new_n3984_ ) -new_n9443_ = NAND ( new_n9426_, new_n8711_ ) -new_n9444_ = OR ( new_n9407_, new_n8709_ ) -new_n9445_ = AND ( new_n9444_, new_n9443_, new_n9442_ ) -NET_16807 = NAND ( new_n9445_, new_n9441_, new_n9440_, new_n9439_ ) -new_n9447_ = NAND ( new_n9414_, NET_695 ) -new_n9448_ = NAND ( new_n9419_, new_n5937_ ) -new_n9449_ = OR ( new_n9421_, new_n8719_ ) -new_n9450_ = OR ( new_n8724_, new_n3984_ ) -new_n9451_ = NAND ( new_n9426_, new_n8732_ ) -new_n9452_ = OR ( new_n9407_, new_n8730_ ) -new_n9453_ = AND ( new_n9452_, new_n9451_, new_n9450_ ) -NET_16808 = NAND ( new_n9453_, new_n9449_, new_n9448_, new_n9447_ ) -new_n9455_ = NAND ( new_n9414_, NET_696 ) -new_n9456_ = NAND ( new_n9419_, new_n5944_ ) -new_n9457_ = OR ( new_n9421_, new_n8740_ ) -new_n9458_ = OR ( new_n8745_, new_n3984_ ) -new_n9459_ = NAND ( new_n9426_, new_n8753_ ) -new_n9460_ = OR ( new_n9407_, new_n8751_ ) -new_n9461_ = AND ( new_n9460_, new_n9459_, new_n9458_ ) -NET_16809 = NAND ( new_n9461_, new_n9457_, new_n9456_, new_n9455_ ) -new_n9463_ = NAND ( new_n9414_, NET_697 ) -new_n9464_ = NAND ( new_n9419_, new_n5951_ ) -new_n9465_ = OR ( new_n9421_, new_n8761_ ) -new_n9466_ = OR ( new_n8766_, new_n3984_ ) -new_n9467_ = NAND ( new_n9426_, new_n8774_ ) -new_n9468_ = OR ( new_n9407_, new_n8772_ ) -new_n9469_ = AND ( new_n9468_, new_n9467_, new_n9466_ ) -NET_16810 = NAND ( new_n9469_, new_n9465_, new_n9464_, new_n9463_ ) -new_n9471_ = NAND ( new_n9414_, NET_698 ) -new_n9472_ = NAND ( new_n9419_, new_n5958_ ) -new_n9473_ = OR ( new_n9421_, new_n8782_ ) -new_n9474_ = OR ( new_n8788_, new_n3984_ ) -new_n9475_ = NAND ( new_n9426_, new_n8796_ ) -new_n9476_ = OR ( new_n9407_, new_n8794_ ) -new_n9477_ = AND ( new_n9476_, new_n9475_, new_n9474_ ) -NET_16811 = NAND ( new_n9477_, new_n9473_, new_n9472_, new_n9471_ ) -new_n9479_ = NAND ( new_n9414_, NET_699 ) -new_n9480_ = NAND ( new_n9419_, new_n5965_ ) -new_n9481_ = OR ( new_n9421_, new_n8804_ ) -new_n9482_ = OR ( new_n8810_, new_n3984_ ) -new_n9483_ = NAND ( new_n9426_, new_n8818_ ) -new_n9484_ = OR ( new_n9407_, new_n8816_ ) -new_n9485_ = AND ( new_n9484_, new_n9483_, new_n9482_ ) -NET_16812 = NAND ( new_n9485_, new_n9481_, new_n9480_, new_n9479_ ) -new_n9487_ = NAND ( new_n3959_, NET_763, new_n3983_ ) -new_n9488_ = NAND ( NET_765, new_n3818_, NET_763, new_n3983_ ) -new_n9489_ = NAND ( new_n9406_, new_n8825_ ) -new_n9490_ = NAND ( new_n9489_, new_n8609_, new_n4003_ ) -new_n9491_ = NAND ( new_n9490_, new_n8635_ ) -new_n9492_ = NAND ( new_n9491_, new_n9488_ ) -new_n9493_ = NAND ( new_n4003_, NET_625 ) -new_n9494_ = NAND ( new_n9493_, new_n9492_, new_n6155_ ) -new_n9495_ = NAND ( new_n9494_, new_n9487_ ) -new_n9496_ = NAND ( new_n9495_, new_n6611_ ) -new_n9497_ = NAND ( new_n9496_, NET_700 ) -new_n9498_ = OR ( new_n9490_, new_n9488_ ) -new_n9499_ = OR ( new_n9492_, new_n9487_ ) -new_n9500_ = NAND ( new_n9499_, new_n9498_ ) -new_n9501_ = NAND ( new_n9500_, new_n5916_ ) -new_n9502_ = NAND ( new_n9489_, new_n8609_ ) -new_n9503_ = OR ( new_n9502_, new_n4003_ ) -new_n9504_ = OR ( new_n9503_, new_n8651_ ) -new_n9505_ = OR ( new_n9487_, new_n8658_ ) -new_n9506_ = NOR ( new_n9488_, new_n6867_ ) -new_n9507_ = NOR ( new_n4003_, new_n3817_ ) -new_n9508_ = OR ( new_n9507_, new_n9506_ ) -new_n9509_ = NAND ( new_n9508_, new_n8666_ ) -new_n9510_ = OR ( new_n9489_, new_n8664_ ) -new_n9511_ = AND ( new_n9510_, new_n9509_, new_n9505_ ) -NET_16813 = NAND ( new_n9511_, new_n9504_, new_n9501_, new_n9497_ ) -new_n9513_ = NAND ( new_n9496_, NET_701 ) -new_n9514_ = NAND ( new_n9500_, new_n5923_ ) -new_n9515_ = OR ( new_n9503_, new_n8677_ ) -new_n9516_ = OR ( new_n9487_, new_n8683_ ) -new_n9517_ = NAND ( new_n9508_, new_n8690_ ) -new_n9518_ = OR ( new_n9489_, new_n8688_ ) -new_n9519_ = AND ( new_n9518_, new_n9517_, new_n9516_ ) -NET_16814 = NAND ( new_n9519_, new_n9515_, new_n9514_, new_n9513_ ) -new_n9521_ = NAND ( new_n9496_, NET_702 ) -new_n9522_ = NAND ( new_n9500_, new_n5930_ ) -new_n9523_ = OR ( new_n9503_, new_n8698_ ) -new_n9524_ = OR ( new_n9487_, new_n8703_ ) -new_n9525_ = NAND ( new_n9508_, new_n8711_ ) -new_n9526_ = OR ( new_n9489_, new_n8709_ ) -new_n9527_ = AND ( new_n9526_, new_n9525_, new_n9524_ ) -NET_16815 = NAND ( new_n9527_, new_n9523_, new_n9522_, new_n9521_ ) -new_n9529_ = NAND ( new_n9496_, NET_703 ) -new_n9530_ = NAND ( new_n9500_, new_n5937_ ) -new_n9531_ = OR ( new_n9503_, new_n8719_ ) -new_n9532_ = OR ( new_n9487_, new_n8724_ ) -new_n9533_ = NAND ( new_n9508_, new_n8732_ ) -new_n9534_ = OR ( new_n9489_, new_n8730_ ) -new_n9535_ = AND ( new_n9534_, new_n9533_, new_n9532_ ) -NET_16816 = NAND ( new_n9535_, new_n9531_, new_n9530_, new_n9529_ ) -new_n9537_ = NAND ( new_n9496_, NET_704 ) -new_n9538_ = NAND ( new_n9500_, new_n5944_ ) -new_n9539_ = OR ( new_n9503_, new_n8740_ ) -new_n9540_ = OR ( new_n9487_, new_n8745_ ) -new_n9541_ = NAND ( new_n9508_, new_n8753_ ) -new_n9542_ = OR ( new_n9489_, new_n8751_ ) -new_n9543_ = AND ( new_n9542_, new_n9541_, new_n9540_ ) -NET_16817 = NAND ( new_n9543_, new_n9539_, new_n9538_, new_n9537_ ) -new_n9545_ = NAND ( new_n9496_, NET_705 ) -new_n9546_ = NAND ( new_n9500_, new_n5951_ ) -new_n9547_ = OR ( new_n9503_, new_n8761_ ) -new_n9548_ = OR ( new_n9487_, new_n8766_ ) -new_n9549_ = NAND ( new_n9508_, new_n8774_ ) -new_n9550_ = OR ( new_n9489_, new_n8772_ ) -new_n9551_ = AND ( new_n9550_, new_n9549_, new_n9548_ ) -NET_16818 = NAND ( new_n9551_, new_n9547_, new_n9546_, new_n9545_ ) -new_n9553_ = NAND ( new_n9496_, NET_706 ) -new_n9554_ = NAND ( new_n9500_, new_n5958_ ) -new_n9555_ = OR ( new_n9503_, new_n8782_ ) -new_n9556_ = OR ( new_n9487_, new_n8788_ ) -new_n9557_ = NAND ( new_n9508_, new_n8796_ ) -new_n9558_ = OR ( new_n9489_, new_n8794_ ) -new_n9559_ = AND ( new_n9558_, new_n9557_, new_n9556_ ) -NET_16819 = NAND ( new_n9559_, new_n9555_, new_n9554_, new_n9553_ ) -new_n9561_ = NAND ( new_n9496_, NET_707 ) -new_n9562_ = NAND ( new_n9500_, new_n5965_ ) -new_n9563_ = OR ( new_n9503_, new_n8804_ ) -new_n9564_ = OR ( new_n9487_, new_n8810_ ) -new_n9565_ = NAND ( new_n9508_, new_n8818_ ) -new_n9566_ = OR ( new_n9489_, new_n8816_ ) -new_n9567_ = AND ( new_n9566_, new_n9565_, new_n9564_ ) -NET_16820 = NAND ( new_n9567_, new_n9563_, new_n9562_, new_n9561_ ) -new_n9569_ = NAND ( new_n3958_, NET_763, new_n3983_ ) -new_n9570_ = NAND ( new_n3819_, new_n3818_, NET_763, new_n3983_ ) -new_n9571_ = NOR ( new_n8631_, new_n8623_ ) -new_n9572_ = NAND ( new_n9571_, new_n8622_ ) -new_n9573_ = NAND ( new_n9572_, new_n8609_, new_n4000_ ) -new_n9574_ = NAND ( new_n9573_, new_n8635_ ) -new_n9575_ = NAND ( new_n9574_, new_n9570_ ) -new_n9576_ = NAND ( new_n4000_, NET_625 ) -new_n9577_ = NAND ( new_n9576_, new_n9575_, new_n6155_ ) -new_n9578_ = NAND ( new_n9577_, new_n9569_ ) -new_n9579_ = NAND ( new_n9578_, new_n6611_ ) -new_n9580_ = NAND ( new_n9579_, NET_708 ) -new_n9581_ = NAND ( new_n9572_, new_n8609_ ) -new_n9582_ = OR ( new_n9581_, new_n9570_ ) -new_n9583_ = OR ( new_n9575_, new_n9569_ ) -new_n9584_ = NAND ( new_n9583_, new_n9582_ ) -new_n9585_ = NAND ( new_n9584_, new_n5916_ ) -new_n9586_ = OR ( new_n9581_, new_n4000_ ) -new_n9587_ = OR ( new_n9586_, new_n8651_ ) -new_n9588_ = OR ( new_n9569_, new_n8658_ ) -new_n9589_ = NOR ( new_n9570_, new_n6867_ ) -new_n9590_ = NOR ( new_n4000_, new_n3817_ ) -new_n9591_ = OR ( new_n9590_, new_n9589_ ) -new_n9592_ = NAND ( new_n9591_, new_n8666_ ) -new_n9593_ = OR ( new_n9572_, new_n8664_ ) -new_n9594_ = AND ( new_n9593_, new_n9592_, new_n9588_ ) -NET_16821 = NAND ( new_n9594_, new_n9587_, new_n9585_, new_n9580_ ) -new_n9596_ = NAND ( new_n9579_, NET_709 ) -new_n9597_ = NAND ( new_n9584_, new_n5923_ ) -new_n9598_ = OR ( new_n9586_, new_n8677_ ) -new_n9599_ = OR ( new_n9569_, new_n8683_ ) -new_n9600_ = NAND ( new_n9591_, new_n8690_ ) -new_n9601_ = OR ( new_n9572_, new_n8688_ ) -new_n9602_ = AND ( new_n9601_, new_n9600_, new_n9599_ ) -NET_16822 = NAND ( new_n9602_, new_n9598_, new_n9597_, new_n9596_ ) -new_n9604_ = NAND ( new_n9579_, NET_710 ) -new_n9605_ = NAND ( new_n9584_, new_n5930_ ) -new_n9606_ = OR ( new_n9586_, new_n8698_ ) -new_n9607_ = OR ( new_n9569_, new_n8703_ ) -new_n9608_ = NAND ( new_n9591_, new_n8711_ ) -new_n9609_ = OR ( new_n9572_, new_n8709_ ) -new_n9610_ = AND ( new_n9609_, new_n9608_, new_n9607_ ) -NET_16823 = NAND ( new_n9610_, new_n9606_, new_n9605_, new_n9604_ ) -new_n9612_ = NAND ( new_n9579_, NET_711 ) -new_n9613_ = NAND ( new_n9584_, new_n5937_ ) -new_n9614_ = OR ( new_n9586_, new_n8719_ ) -new_n9615_ = OR ( new_n9569_, new_n8724_ ) -new_n9616_ = NAND ( new_n9591_, new_n8732_ ) -new_n9617_ = OR ( new_n9572_, new_n8730_ ) -new_n9618_ = AND ( new_n9617_, new_n9616_, new_n9615_ ) -NET_16824 = NAND ( new_n9618_, new_n9614_, new_n9613_, new_n9612_ ) -new_n9620_ = NAND ( new_n9579_, NET_712 ) -new_n9621_ = NAND ( new_n9584_, new_n5944_ ) -new_n9622_ = OR ( new_n9586_, new_n8740_ ) -new_n9623_ = OR ( new_n9569_, new_n8745_ ) -new_n9624_ = NAND ( new_n9591_, new_n8753_ ) -new_n9625_ = OR ( new_n9572_, new_n8751_ ) -new_n9626_ = AND ( new_n9625_, new_n9624_, new_n9623_ ) -NET_16825 = NAND ( new_n9626_, new_n9622_, new_n9621_, new_n9620_ ) -new_n9628_ = NAND ( new_n9579_, NET_713 ) -new_n9629_ = NAND ( new_n9584_, new_n5951_ ) -new_n9630_ = OR ( new_n9586_, new_n8761_ ) -new_n9631_ = OR ( new_n9569_, new_n8766_ ) -new_n9632_ = NAND ( new_n9591_, new_n8774_ ) -new_n9633_ = OR ( new_n9572_, new_n8772_ ) -new_n9634_ = AND ( new_n9633_, new_n9632_, new_n9631_ ) -NET_16826 = NAND ( new_n9634_, new_n9630_, new_n9629_, new_n9628_ ) -new_n9636_ = NAND ( new_n9579_, NET_714 ) -new_n9637_ = NAND ( new_n9584_, new_n5958_ ) -new_n9638_ = OR ( new_n9586_, new_n8782_ ) -new_n9639_ = OR ( new_n9569_, new_n8788_ ) -new_n9640_ = NAND ( new_n9591_, new_n8796_ ) -new_n9641_ = OR ( new_n9572_, new_n8794_ ) -new_n9642_ = AND ( new_n9641_, new_n9640_, new_n9639_ ) -NET_16827 = NAND ( new_n9642_, new_n9638_, new_n9637_, new_n9636_ ) -new_n9644_ = NAND ( new_n9579_, NET_715 ) -new_n9645_ = NAND ( new_n9584_, new_n5965_ ) -new_n9646_ = OR ( new_n9586_, new_n8804_ ) -new_n9647_ = OR ( new_n9569_, new_n8810_ ) -new_n9648_ = NAND ( new_n9591_, new_n8818_ ) -new_n9649_ = OR ( new_n9572_, new_n8816_ ) -new_n9650_ = AND ( new_n9649_, new_n9648_, new_n9647_ ) -NET_16828 = NAND ( new_n9650_, new_n9646_, new_n9645_, new_n9644_ ) -new_n9652_ = NAND ( new_n8989_, NET_763, new_n3983_ ) -new_n9653_ = NAND ( new_n3820_, new_n3824_, new_n3983_ ) -new_n9654_ = NAND ( new_n9571_, new_n8825_ ) -new_n9655_ = NAND ( new_n9654_, new_n8609_, new_n4018_ ) -new_n9656_ = NAND ( new_n9655_, new_n8635_ ) -new_n9657_ = NAND ( new_n9656_, new_n9653_ ) -new_n9658_ = NAND ( new_n4018_, NET_625 ) -new_n9659_ = NAND ( new_n9658_, new_n9657_, new_n6155_ ) -new_n9660_ = NAND ( new_n9659_, new_n9652_ ) -new_n9661_ = NAND ( new_n9660_, new_n6611_ ) -new_n9662_ = NAND ( new_n9661_, NET_716 ) -new_n9663_ = OR ( new_n9655_, new_n9653_ ) -new_n9664_ = OR ( new_n9657_, new_n9652_ ) -new_n9665_ = NAND ( new_n9664_, new_n9663_ ) -new_n9666_ = NAND ( new_n9665_, new_n5916_ ) -new_n9667_ = NAND ( new_n9654_, new_n8609_ ) -new_n9668_ = OR ( new_n9667_, new_n4018_ ) -new_n9669_ = OR ( new_n9668_, new_n8651_ ) -new_n9670_ = OR ( new_n9652_, new_n8658_ ) -new_n9671_ = NOR ( new_n9653_, new_n6867_ ) -new_n9672_ = NOR ( new_n4018_, new_n3817_ ) -new_n9673_ = OR ( new_n9672_, new_n9671_ ) -new_n9674_ = NAND ( new_n9673_, new_n8666_ ) -new_n9675_ = OR ( new_n9654_, new_n8664_ ) -new_n9676_ = AND ( new_n9675_, new_n9674_, new_n9670_ ) -NET_16829 = NAND ( new_n9676_, new_n9669_, new_n9666_, new_n9662_ ) -new_n9678_ = NAND ( new_n9661_, NET_717 ) -new_n9679_ = NAND ( new_n9665_, new_n5923_ ) -new_n9680_ = OR ( new_n9668_, new_n8677_ ) -new_n9681_ = OR ( new_n9652_, new_n8683_ ) -new_n9682_ = NAND ( new_n9673_, new_n8690_ ) -new_n9683_ = OR ( new_n9654_, new_n8688_ ) -new_n9684_ = AND ( new_n9683_, new_n9682_, new_n9681_ ) -NET_16830 = NAND ( new_n9684_, new_n9680_, new_n9679_, new_n9678_ ) -new_n9686_ = NAND ( new_n9661_, NET_718 ) -new_n9687_ = NAND ( new_n9665_, new_n5930_ ) -new_n9688_ = OR ( new_n9668_, new_n8698_ ) -new_n9689_ = OR ( new_n9652_, new_n8703_ ) -new_n9690_ = NAND ( new_n9673_, new_n8711_ ) -new_n9691_ = OR ( new_n9654_, new_n8709_ ) -new_n9692_ = AND ( new_n9691_, new_n9690_, new_n9689_ ) -NET_16831 = NAND ( new_n9692_, new_n9688_, new_n9687_, new_n9686_ ) -new_n9694_ = NAND ( new_n9661_, NET_719 ) -new_n9695_ = NAND ( new_n9665_, new_n5937_ ) -new_n9696_ = OR ( new_n9668_, new_n8719_ ) -new_n9697_ = OR ( new_n9652_, new_n8724_ ) -new_n9698_ = NAND ( new_n9673_, new_n8732_ ) -new_n9699_ = OR ( new_n9654_, new_n8730_ ) -new_n9700_ = AND ( new_n9699_, new_n9698_, new_n9697_ ) -NET_16832 = NAND ( new_n9700_, new_n9696_, new_n9695_, new_n9694_ ) -new_n9702_ = NAND ( new_n9661_, NET_720 ) -new_n9703_ = NAND ( new_n9665_, new_n5944_ ) -new_n9704_ = OR ( new_n9668_, new_n8740_ ) -new_n9705_ = OR ( new_n9652_, new_n8745_ ) -new_n9706_ = NAND ( new_n9673_, new_n8753_ ) -new_n9707_ = OR ( new_n9654_, new_n8751_ ) -new_n9708_ = AND ( new_n9707_, new_n9706_, new_n9705_ ) -NET_16833 = NAND ( new_n9708_, new_n9704_, new_n9703_, new_n9702_ ) -new_n9710_ = NAND ( new_n9661_, NET_721 ) -new_n9711_ = NAND ( new_n9665_, new_n5951_ ) -new_n9712_ = OR ( new_n9668_, new_n8761_ ) -new_n9713_ = OR ( new_n9652_, new_n8766_ ) -new_n9714_ = NAND ( new_n9673_, new_n8774_ ) -new_n9715_ = OR ( new_n9654_, new_n8772_ ) -new_n9716_ = AND ( new_n9715_, new_n9714_, new_n9713_ ) -NET_16834 = NAND ( new_n9716_, new_n9712_, new_n9711_, new_n9710_ ) -new_n9718_ = NAND ( new_n9661_, NET_722 ) -new_n9719_ = NAND ( new_n9665_, new_n5958_ ) -new_n9720_ = OR ( new_n9668_, new_n8782_ ) -new_n9721_ = OR ( new_n9652_, new_n8788_ ) -new_n9722_ = NAND ( new_n9673_, new_n8796_ ) -new_n9723_ = OR ( new_n9654_, new_n8794_ ) -new_n9724_ = AND ( new_n9723_, new_n9722_, new_n9721_ ) -NET_16835 = NAND ( new_n9724_, new_n9720_, new_n9719_, new_n9718_ ) -new_n9726_ = NAND ( new_n9661_, NET_723 ) -new_n9727_ = NAND ( new_n9665_, new_n5965_ ) -new_n9728_ = OR ( new_n9668_, new_n8804_ ) -new_n9729_ = OR ( new_n9652_, new_n8810_ ) -new_n9730_ = NAND ( new_n9673_, new_n8818_ ) -new_n9731_ = OR ( new_n9654_, new_n8816_ ) -new_n9732_ = AND ( new_n9731_, new_n9730_, new_n9729_ ) -NET_16836 = NAND ( new_n9732_, new_n9728_, new_n9727_, new_n9726_ ) -new_n9734_ = OR ( NET_763, NET_762 ) -new_n9735_ = NOR ( new_n9734_, new_n8605_ ) -new_n9736_ = NOT ( new_n9735_ ) -new_n9737_ = NAND ( new_n3819_, NET_764, new_n3824_, new_n3983_ ) -new_n9738_ = NAND ( new_n9406_, new_n9077_ ) -new_n9739_ = NAND ( new_n9738_, new_n8609_, new_n4016_ ) -new_n9740_ = NAND ( new_n9739_, new_n8635_ ) -new_n9741_ = NAND ( new_n9740_, new_n9737_ ) -new_n9742_ = NAND ( new_n4016_, NET_625 ) -new_n9743_ = NAND ( new_n9742_, new_n9741_, new_n6155_ ) -new_n9744_ = NAND ( new_n9743_, new_n9736_ ) -new_n9745_ = NAND ( new_n9744_, new_n6611_ ) -new_n9746_ = NAND ( new_n9745_, NET_724 ) -new_n9747_ = NAND ( new_n9738_, new_n8609_ ) -new_n9748_ = OR ( new_n9747_, new_n9737_ ) -new_n9749_ = OR ( new_n9741_, new_n9736_ ) -new_n9750_ = NAND ( new_n9749_, new_n9748_ ) -new_n9751_ = NAND ( new_n9750_, new_n5916_ ) -new_n9752_ = OR ( new_n9747_, new_n4016_ ) -new_n9753_ = OR ( new_n9752_, new_n8651_ ) -new_n9754_ = OR ( new_n9736_, new_n8658_ ) -new_n9755_ = NOR ( new_n9737_, new_n6867_ ) -new_n9756_ = NOR ( new_n4016_, new_n3817_ ) -new_n9757_ = OR ( new_n9756_, new_n9755_ ) -new_n9758_ = NAND ( new_n9757_, new_n8666_ ) -new_n9759_ = OR ( new_n9738_, new_n8664_ ) -new_n9760_ = AND ( new_n9759_, new_n9758_, new_n9754_ ) -NET_16837 = NAND ( new_n9760_, new_n9753_, new_n9751_, new_n9746_ ) -new_n9762_ = NAND ( new_n9745_, NET_725 ) -new_n9763_ = NAND ( new_n9750_, new_n5923_ ) -new_n9764_ = OR ( new_n9752_, new_n8677_ ) -new_n9765_ = NAND ( new_n9735_, new_n8682_ ) -new_n9766_ = NAND ( new_n9757_, new_n8690_ ) -new_n9767_ = OR ( new_n9738_, new_n8688_ ) -new_n9768_ = AND ( new_n9767_, new_n9766_, new_n9765_ ) -NET_16838 = NAND ( new_n9768_, new_n9764_, new_n9763_, new_n9762_ ) -new_n9770_ = NAND ( new_n9745_, NET_726 ) -new_n9771_ = NAND ( new_n9750_, new_n5930_ ) -new_n9772_ = OR ( new_n9752_, new_n8698_ ) -new_n9773_ = OR ( new_n9736_, new_n8703_ ) -new_n9774_ = NAND ( new_n9757_, new_n8711_ ) -new_n9775_ = OR ( new_n9738_, new_n8709_ ) -new_n9776_ = AND ( new_n9775_, new_n9774_, new_n9773_ ) -NET_16839 = NAND ( new_n9776_, new_n9772_, new_n9771_, new_n9770_ ) -new_n9778_ = NAND ( new_n9745_, NET_727 ) -new_n9779_ = NAND ( new_n9750_, new_n5937_ ) -new_n9780_ = OR ( new_n9752_, new_n8719_ ) -new_n9781_ = OR ( new_n9736_, new_n8724_ ) -new_n9782_ = NAND ( new_n9757_, new_n8732_ ) -new_n9783_ = OR ( new_n9738_, new_n8730_ ) -new_n9784_ = AND ( new_n9783_, new_n9782_, new_n9781_ ) -NET_16840 = NAND ( new_n9784_, new_n9780_, new_n9779_, new_n9778_ ) -new_n9786_ = NAND ( new_n9745_, NET_728 ) -new_n9787_ = NAND ( new_n9750_, new_n5944_ ) -new_n9788_ = OR ( new_n9752_, new_n8740_ ) -new_n9789_ = OR ( new_n9736_, new_n8745_ ) -new_n9790_ = NAND ( new_n9757_, new_n8753_ ) -new_n9791_ = OR ( new_n9738_, new_n8751_ ) -new_n9792_ = AND ( new_n9791_, new_n9790_, new_n9789_ ) -NET_16841 = NAND ( new_n9792_, new_n9788_, new_n9787_, new_n9786_ ) -new_n9794_ = NAND ( new_n9745_, NET_729 ) -new_n9795_ = NAND ( new_n9750_, new_n5951_ ) -new_n9796_ = OR ( new_n9752_, new_n8761_ ) -new_n9797_ = OR ( new_n9736_, new_n8766_ ) -new_n9798_ = NAND ( new_n9757_, new_n8774_ ) -new_n9799_ = OR ( new_n9738_, new_n8772_ ) -new_n9800_ = AND ( new_n9799_, new_n9798_, new_n9797_ ) -NET_16842 = NAND ( new_n9800_, new_n9796_, new_n9795_, new_n9794_ ) -new_n9802_ = NAND ( new_n9745_, NET_730 ) -new_n9803_ = NAND ( new_n9750_, new_n5958_ ) -new_n9804_ = OR ( new_n9752_, new_n8782_ ) -new_n9805_ = NAND ( new_n9735_, new_n8787_ ) -new_n9806_ = NAND ( new_n9757_, new_n8796_ ) -new_n9807_ = OR ( new_n9738_, new_n8794_ ) -new_n9808_ = AND ( new_n9807_, new_n9806_, new_n9805_ ) -NET_16843 = NAND ( new_n9808_, new_n9804_, new_n9803_, new_n9802_ ) -new_n9810_ = NAND ( new_n9745_, NET_731 ) -new_n9811_ = NAND ( new_n9750_, new_n5965_ ) -new_n9812_ = OR ( new_n9752_, new_n8804_ ) -new_n9813_ = NAND ( new_n9735_, new_n8809_ ) -new_n9814_ = NAND ( new_n9757_, new_n8818_ ) -new_n9815_ = OR ( new_n9738_, new_n8816_ ) -new_n9816_ = AND ( new_n9815_, new_n9814_, new_n9813_ ) -NET_16844 = NAND ( new_n9816_, new_n9812_, new_n9811_, new_n9810_ ) -new_n9818_ = NAND ( new_n3959_, new_n3824_, new_n3983_ ) -new_n9819_ = NAND ( NET_765, new_n3818_, new_n3824_, new_n3983_ ) -new_n9820_ = NAND ( new_n9406_, new_n9160_ ) -new_n9821_ = NAND ( new_n9820_, new_n8609_, new_n4014_ ) -new_n9822_ = NAND ( new_n9821_, new_n8635_ ) -new_n9823_ = NAND ( new_n9822_, new_n9819_ ) -new_n9824_ = NAND ( new_n4014_, NET_625 ) -new_n9825_ = NAND ( new_n9824_, new_n9823_, new_n6155_ ) -new_n9826_ = NAND ( new_n9825_, new_n9818_ ) -new_n9827_ = NAND ( new_n9826_, new_n6611_ ) -new_n9828_ = NAND ( new_n9827_, NET_732 ) -new_n9829_ = OR ( new_n9821_, new_n9819_ ) -new_n9830_ = OR ( new_n9823_, new_n9818_ ) -new_n9831_ = NAND ( new_n9830_, new_n9829_ ) -new_n9832_ = NAND ( new_n9831_, new_n5916_ ) -new_n9833_ = NAND ( new_n9820_, new_n8609_ ) -new_n9834_ = OR ( new_n9833_, new_n4014_ ) -new_n9835_ = OR ( new_n9834_, new_n8651_ ) -new_n9836_ = OR ( new_n9818_, new_n8658_ ) -new_n9837_ = NOR ( new_n9819_, new_n6867_ ) -new_n9838_ = NOR ( new_n4014_, new_n3817_ ) -new_n9839_ = OR ( new_n9838_, new_n9837_ ) -new_n9840_ = NAND ( new_n9839_, new_n8666_ ) -new_n9841_ = OR ( new_n9820_, new_n8664_ ) -new_n9842_ = AND ( new_n9841_, new_n9840_, new_n9836_ ) -NET_16845 = NAND ( new_n9842_, new_n9835_, new_n9832_, new_n9828_ ) -new_n9844_ = NAND ( new_n9827_, NET_733 ) -new_n9845_ = NAND ( new_n9831_, new_n5923_ ) -new_n9846_ = OR ( new_n9834_, new_n8677_ ) -new_n9847_ = OR ( new_n9818_, new_n8683_ ) -new_n9848_ = NAND ( new_n9839_, new_n8690_ ) -new_n9849_ = OR ( new_n9820_, new_n8688_ ) -new_n9850_ = AND ( new_n9849_, new_n9848_, new_n9847_ ) -NET_16846 = NAND ( new_n9850_, new_n9846_, new_n9845_, new_n9844_ ) -new_n9852_ = NAND ( new_n9827_, NET_734 ) -new_n9853_ = NAND ( new_n9831_, new_n5930_ ) -new_n9854_ = OR ( new_n9834_, new_n8698_ ) -new_n9855_ = OR ( new_n9818_, new_n8703_ ) -new_n9856_ = NAND ( new_n9839_, new_n8711_ ) -new_n9857_ = OR ( new_n9820_, new_n8709_ ) -new_n9858_ = AND ( new_n9857_, new_n9856_, new_n9855_ ) -NET_16847 = NAND ( new_n9858_, new_n9854_, new_n9853_, new_n9852_ ) -new_n9860_ = NAND ( new_n9827_, NET_735 ) -new_n9861_ = NAND ( new_n9831_, new_n5937_ ) -new_n9862_ = OR ( new_n9834_, new_n8719_ ) -new_n9863_ = OR ( new_n9818_, new_n8724_ ) -new_n9864_ = NAND ( new_n9839_, new_n8732_ ) -new_n9865_ = OR ( new_n9820_, new_n8730_ ) -new_n9866_ = AND ( new_n9865_, new_n9864_, new_n9863_ ) -NET_16848 = NAND ( new_n9866_, new_n9862_, new_n9861_, new_n9860_ ) -new_n9868_ = NAND ( new_n9827_, NET_736 ) -new_n9869_ = NAND ( new_n9831_, new_n5944_ ) -new_n9870_ = OR ( new_n9834_, new_n8740_ ) -new_n9871_ = OR ( new_n9818_, new_n8745_ ) -new_n9872_ = NAND ( new_n9839_, new_n8753_ ) -new_n9873_ = OR ( new_n9820_, new_n8751_ ) -new_n9874_ = AND ( new_n9873_, new_n9872_, new_n9871_ ) -NET_16849 = NAND ( new_n9874_, new_n9870_, new_n9869_, new_n9868_ ) -new_n9876_ = NAND ( new_n9827_, NET_737 ) -new_n9877_ = NAND ( new_n9831_, new_n5951_ ) -new_n9878_ = OR ( new_n9834_, new_n8761_ ) -new_n9879_ = OR ( new_n9818_, new_n8766_ ) -new_n9880_ = NAND ( new_n9839_, new_n8774_ ) -new_n9881_ = OR ( new_n9820_, new_n8772_ ) -new_n9882_ = AND ( new_n9881_, new_n9880_, new_n9879_ ) -NET_16850 = NAND ( new_n9882_, new_n9878_, new_n9877_, new_n9876_ ) -new_n9884_ = NAND ( new_n9827_, NET_738 ) -new_n9885_ = NAND ( new_n9831_, new_n5958_ ) -new_n9886_ = OR ( new_n9834_, new_n8782_ ) -new_n9887_ = OR ( new_n9818_, new_n8788_ ) -new_n9888_ = NAND ( new_n9839_, new_n8796_ ) -new_n9889_ = OR ( new_n9820_, new_n8794_ ) -new_n9890_ = AND ( new_n9889_, new_n9888_, new_n9887_ ) -NET_16851 = NAND ( new_n9890_, new_n9886_, new_n9885_, new_n9884_ ) -new_n9892_ = NAND ( new_n9827_, NET_739 ) -new_n9893_ = NAND ( new_n9831_, new_n5965_ ) -new_n9894_ = OR ( new_n9834_, new_n8804_ ) -new_n9895_ = OR ( new_n9818_, new_n8810_ ) -new_n9896_ = NAND ( new_n9839_, new_n8818_ ) -new_n9897_ = OR ( new_n9820_, new_n8816_ ) -new_n9898_ = AND ( new_n9897_, new_n9896_, new_n9895_ ) -NET_16852 = NAND ( new_n9898_, new_n9894_, new_n9893_, new_n9892_ ) -new_n9900_ = NAND ( new_n3958_, new_n3824_, new_n3983_ ) -new_n9901_ = NAND ( new_n3819_, new_n3818_, new_n3824_, new_n3983_ ) -new_n9902_ = NAND ( new_n9571_, new_n9077_ ) -new_n9903_ = NAND ( new_n9902_, new_n8609_, new_n4012_ ) -new_n9904_ = NAND ( new_n9903_, new_n8635_ ) -new_n9905_ = NAND ( new_n9904_, new_n9901_ ) -new_n9906_ = NAND ( new_n4012_, NET_625 ) -new_n9907_ = NAND ( new_n9906_, new_n9905_, new_n6155_ ) -new_n9908_ = NAND ( new_n9907_, new_n9900_ ) -new_n9909_ = NAND ( new_n9908_, new_n6611_ ) -new_n9910_ = NAND ( new_n9909_, NET_740 ) -new_n9911_ = OR ( new_n9903_, new_n9901_ ) -new_n9912_ = OR ( new_n9905_, new_n9900_ ) -new_n9913_ = NAND ( new_n9912_, new_n9911_ ) -new_n9914_ = NAND ( new_n9913_, new_n5916_ ) -new_n9915_ = NOT ( new_n4012_ ) -new_n9916_ = NAND ( new_n9902_, new_n8609_, new_n9915_ ) -new_n9917_ = OR ( new_n9916_, new_n8651_ ) -new_n9918_ = OR ( new_n9900_, new_n8658_ ) -new_n9919_ = OR ( new_n9901_, new_n6867_ ) -new_n9920_ = OR ( new_n4012_, new_n3817_ ) -new_n9921_ = NAND ( new_n9920_, new_n9919_ ) -new_n9922_ = NAND ( new_n9921_, new_n8666_ ) -new_n9923_ = OR ( new_n9902_, new_n8664_ ) -new_n9924_ = AND ( new_n9923_, new_n9922_, new_n9918_ ) -NET_16853 = NAND ( new_n9924_, new_n9917_, new_n9914_, new_n9910_ ) -new_n9926_ = NAND ( new_n9909_, NET_741 ) -new_n9927_ = NAND ( new_n9913_, new_n5923_ ) -new_n9928_ = OR ( new_n9916_, new_n8677_ ) -new_n9929_ = OR ( new_n9900_, new_n8683_ ) -new_n9930_ = NAND ( new_n9921_, new_n8690_ ) -new_n9931_ = OR ( new_n9902_, new_n8688_ ) -new_n9932_ = AND ( new_n9931_, new_n9930_, new_n9929_ ) -NET_16854 = NAND ( new_n9932_, new_n9928_, new_n9927_, new_n9926_ ) -new_n9934_ = NAND ( new_n9909_, NET_742 ) -new_n9935_ = NAND ( new_n9913_, new_n5930_ ) -new_n9936_ = OR ( new_n9916_, new_n8698_ ) -new_n9937_ = OR ( new_n9900_, new_n8703_ ) -new_n9938_ = NAND ( new_n9921_, new_n8711_ ) -new_n9939_ = OR ( new_n9902_, new_n8709_ ) -new_n9940_ = AND ( new_n9939_, new_n9938_, new_n9937_ ) -NET_16855 = NAND ( new_n9940_, new_n9936_, new_n9935_, new_n9934_ ) -new_n9942_ = NAND ( new_n9909_, NET_743 ) -new_n9943_ = NAND ( new_n9913_, new_n5937_ ) -new_n9944_ = OR ( new_n9916_, new_n8719_ ) -new_n9945_ = OR ( new_n9900_, new_n8724_ ) -new_n9946_ = NAND ( new_n9921_, new_n8732_ ) -new_n9947_ = OR ( new_n9902_, new_n8730_ ) -new_n9948_ = AND ( new_n9947_, new_n9946_, new_n9945_ ) -NET_16856 = NAND ( new_n9948_, new_n9944_, new_n9943_, new_n9942_ ) -new_n9950_ = NAND ( new_n9909_, NET_744 ) -new_n9951_ = NAND ( new_n9913_, new_n5944_ ) -new_n9952_ = OR ( new_n9916_, new_n8740_ ) -new_n9953_ = OR ( new_n9900_, new_n8745_ ) -new_n9954_ = NAND ( new_n9921_, new_n8753_ ) -new_n9955_ = OR ( new_n9902_, new_n8751_ ) -new_n9956_ = AND ( new_n9955_, new_n9954_, new_n9953_ ) -NET_16857 = NAND ( new_n9956_, new_n9952_, new_n9951_, new_n9950_ ) -new_n9958_ = NAND ( new_n9909_, NET_745 ) -new_n9959_ = NAND ( new_n9913_, new_n5951_ ) -new_n9960_ = OR ( new_n9916_, new_n8761_ ) -new_n9961_ = OR ( new_n9900_, new_n8766_ ) -new_n9962_ = NAND ( new_n9921_, new_n8774_ ) -new_n9963_ = OR ( new_n9902_, new_n8772_ ) -new_n9964_ = AND ( new_n9963_, new_n9962_, new_n9961_ ) -NET_16858 = NAND ( new_n9964_, new_n9960_, new_n9959_, new_n9958_ ) -new_n9966_ = NAND ( new_n9909_, NET_746 ) -new_n9967_ = NAND ( new_n9913_, new_n5958_ ) -new_n9968_ = OR ( new_n9916_, new_n8782_ ) -new_n9969_ = OR ( new_n9900_, new_n8788_ ) -new_n9970_ = NAND ( new_n9921_, new_n8796_ ) -new_n9971_ = OR ( new_n9902_, new_n8794_ ) -new_n9972_ = AND ( new_n9971_, new_n9970_, new_n9969_ ) -NET_16859 = NAND ( new_n9972_, new_n9968_, new_n9967_, new_n9966_ ) -new_n9974_ = NAND ( new_n9909_, NET_747 ) -new_n9975_ = NAND ( new_n9913_, new_n5965_ ) -new_n9976_ = OR ( new_n9916_, new_n8804_ ) -new_n9977_ = OR ( new_n9900_, new_n8810_ ) -new_n9978_ = NAND ( new_n9921_, new_n8818_ ) -new_n9979_ = OR ( new_n9902_, new_n8816_ ) -new_n9980_ = AND ( new_n9979_, new_n9978_, new_n9977_ ) -NET_16860 = NAND ( new_n9980_, new_n9976_, new_n9975_, new_n9974_ ) -new_n9982_ = OR ( new_n9734_, new_n8990_ ) -new_n9983_ = NAND ( new_n3820_, NET_763, NET_762 ) -new_n9984_ = NAND ( new_n9571_, new_n9160_ ) -new_n9985_ = NAND ( new_n9984_, new_n8609_, new_n4027_ ) -new_n9986_ = NAND ( new_n9985_, new_n8635_ ) -new_n9987_ = NAND ( new_n9986_, new_n9983_ ) -new_n9988_ = NAND ( new_n4027_, NET_625 ) -new_n9989_ = NAND ( new_n9988_, new_n9987_, new_n6155_ ) -new_n9990_ = NAND ( new_n9989_, new_n9982_ ) -new_n9991_ = NAND ( new_n9990_, new_n6611_ ) -new_n9992_ = NAND ( new_n9991_, NET_748 ) -new_n9993_ = OR ( new_n9985_, new_n9983_ ) -new_n9994_ = OR ( new_n9987_, new_n9982_ ) -new_n9995_ = NAND ( new_n9994_, new_n9993_ ) -new_n9996_ = NAND ( new_n9995_, new_n5916_ ) -new_n9997_ = NOT ( new_n4027_ ) -new_n9998_ = NAND ( new_n9984_, new_n8609_, new_n9997_ ) -new_n9999_ = OR ( new_n9998_, new_n8651_ ) -new_n10000_ = OR ( new_n9982_, new_n8658_ ) -new_n10001_ = OR ( new_n9983_, new_n6867_ ) -new_n10002_ = OR ( new_n4027_, new_n3817_ ) -new_n10003_ = NAND ( new_n10002_, new_n10001_ ) -new_n10004_ = NAND ( new_n10003_, new_n8666_ ) -new_n10005_ = OR ( new_n9984_, new_n8664_ ) -new_n10006_ = AND ( new_n10005_, new_n10004_, new_n10000_ ) -NET_16861 = NAND ( new_n10006_, new_n9999_, new_n9996_, new_n9992_ ) -new_n10008_ = NAND ( new_n9991_, NET_749 ) -new_n10009_ = NAND ( new_n9995_, new_n5923_ ) -new_n10010_ = OR ( new_n9998_, new_n8677_ ) -new_n10011_ = OR ( new_n9982_, new_n8683_ ) -new_n10012_ = NAND ( new_n10003_, new_n8690_ ) -new_n10013_ = OR ( new_n9984_, new_n8688_ ) -new_n10014_ = AND ( new_n10013_, new_n10012_, new_n10011_ ) -NET_16862 = NAND ( new_n10014_, new_n10010_, new_n10009_, new_n10008_ ) -new_n10016_ = NAND ( new_n9991_, NET_750 ) -new_n10017_ = NAND ( new_n9995_, new_n5930_ ) -new_n10018_ = OR ( new_n9998_, new_n8698_ ) -new_n10019_ = OR ( new_n9982_, new_n8703_ ) -new_n10020_ = NAND ( new_n10003_, new_n8711_ ) -new_n10021_ = OR ( new_n9984_, new_n8709_ ) -new_n10022_ = AND ( new_n10021_, new_n10020_, new_n10019_ ) -NET_16863 = NAND ( new_n10022_, new_n10018_, new_n10017_, new_n10016_ ) -new_n10024_ = NAND ( new_n9991_, NET_751 ) -new_n10025_ = NAND ( new_n9995_, new_n5937_ ) -new_n10026_ = OR ( new_n9998_, new_n8719_ ) -new_n10027_ = OR ( new_n9982_, new_n8724_ ) -new_n10028_ = NAND ( new_n10003_, new_n8732_ ) -new_n10029_ = OR ( new_n9984_, new_n8730_ ) -new_n10030_ = AND ( new_n10029_, new_n10028_, new_n10027_ ) -NET_16864 = NAND ( new_n10030_, new_n10026_, new_n10025_, new_n10024_ ) -new_n10032_ = NAND ( new_n9991_, NET_752 ) -new_n10033_ = NAND ( new_n9995_, new_n5944_ ) -new_n10034_ = OR ( new_n9998_, new_n8740_ ) -new_n10035_ = OR ( new_n9982_, new_n8745_ ) -new_n10036_ = NAND ( new_n10003_, new_n8753_ ) -new_n10037_ = OR ( new_n9984_, new_n8751_ ) -new_n10038_ = AND ( new_n10037_, new_n10036_, new_n10035_ ) -NET_16865 = NAND ( new_n10038_, new_n10034_, new_n10033_, new_n10032_ ) -new_n10040_ = NAND ( new_n9991_, NET_753 ) -new_n10041_ = NAND ( new_n9995_, new_n5951_ ) -new_n10042_ = OR ( new_n9998_, new_n8761_ ) -new_n10043_ = OR ( new_n9982_, new_n8766_ ) -new_n10044_ = NAND ( new_n10003_, new_n8774_ ) -new_n10045_ = OR ( new_n9984_, new_n8772_ ) -new_n10046_ = AND ( new_n10045_, new_n10044_, new_n10043_ ) -NET_16866 = NAND ( new_n10046_, new_n10042_, new_n10041_, new_n10040_ ) -new_n10048_ = NAND ( new_n9991_, NET_754 ) -new_n10049_ = NAND ( new_n9995_, new_n5958_ ) -new_n10050_ = OR ( new_n9998_, new_n8782_ ) -new_n10051_ = OR ( new_n9982_, new_n8788_ ) -new_n10052_ = NAND ( new_n10003_, new_n8796_ ) -new_n10053_ = OR ( new_n9984_, new_n8794_ ) -new_n10054_ = AND ( new_n10053_, new_n10052_, new_n10051_ ) -NET_16867 = NAND ( new_n10054_, new_n10050_, new_n10049_, new_n10048_ ) -new_n10056_ = NAND ( new_n9991_, NET_755 ) -new_n10057_ = NAND ( new_n9995_, new_n5965_ ) -new_n10058_ = OR ( new_n9998_, new_n8804_ ) -new_n10059_ = OR ( new_n9982_, new_n8810_ ) -new_n10060_ = NAND ( new_n10003_, new_n8818_ ) -new_n10061_ = OR ( new_n9984_, new_n8816_ ) -new_n10062_ = AND ( new_n10061_, new_n10060_, new_n10059_ ) -NET_16868 = NAND ( new_n10062_, new_n10058_, new_n10057_, new_n10056_ ) -new_n10064_ = NAND ( new_n6990_, new_n6986_, new_n6866_ ) -new_n10065_ = XNOR ( new_n7005_, new_n5827_ ) -new_n10066_ = XOR ( new_n10065_, new_n10064_ ) -new_n10067_ = XOR ( new_n10066_, new_n5827_ ) -new_n10068_ = OR ( new_n10067_, new_n6857_ ) -new_n10069_ = OR ( new_n7012_, new_n3998_ ) -new_n10070_ = NAND ( new_n6616_, new_n4381_, NET_627 ) -new_n10071_ = OR ( new_n6616_, new_n3819_ ) -NET_16869 = NAND ( new_n10071_, new_n10070_, new_n10069_, new_n10068_ ) -new_n10073_ = NOT ( new_n4564_ ) -new_n10074_ = NAND ( NET_1212, NET_1211 ) -new_n10075_ = OR ( new_n10074_, new_n10073_ ) -new_n10076_ = NAND ( new_n4563_, NET_1213, NET_1212, NET_1211 ) -new_n10077_ = NOR ( new_n7088_, new_n6657_ ) -new_n10078_ = OR ( new_n7104_, new_n7099_ ) -new_n10079_ = NAND ( new_n10078_, new_n7091_ ) -new_n10080_ = NAND ( new_n7104_, new_n7099_ ) -new_n10081_ = NAND ( new_n10080_, new_n10079_ ) -new_n10082_ = NAND ( new_n7094_, NET_1207 ) -new_n10083_ = OR ( new_n4751_, NET_1074 ) -new_n10084_ = NAND ( new_n10083_, new_n10082_ ) -new_n10085_ = NOR ( new_n10084_, new_n6546_ ) -new_n10086_ = NOT ( new_n10085_ ) -new_n10087_ = NAND ( new_n10084_, new_n6546_ ) -new_n10088_ = NAND ( new_n10087_, new_n10086_ ) -new_n10089_ = XNOR ( new_n10088_, new_n10081_ ) -new_n10090_ = NOR ( new_n10089_, new_n7154_ ) -new_n10091_ = NOT ( new_n7105_ ) -new_n10092_ = NAND ( new_n10087_, new_n10081_ ) -new_n10093_ = NAND ( new_n4752_, new_n4561_ ) -new_n10094_ = NAND ( new_n7094_, NET_1206 ) -new_n10095_ = NAND ( new_n10094_, new_n10093_, new_n10092_, new_n10086_ ) -new_n10096_ = NAND ( new_n10094_, new_n10093_ ) -new_n10097_ = OR ( new_n10085_, new_n10081_ ) -new_n10098_ = NAND ( new_n10097_, new_n10096_, new_n10087_ ) -new_n10099_ = NAND ( new_n10098_, new_n10095_ ) -new_n10100_ = AND ( new_n10099_, new_n10091_ ) -new_n10101_ = NAND ( new_n10100_, new_n10090_ ) -new_n10102_ = NAND ( new_n10101_, new_n10077_, new_n4769_ ) -new_n10103_ = NAND ( new_n7015_, new_n6656_ ) -new_n10104_ = NAND ( new_n10103_, new_n10102_ ) -new_n10105_ = NAND ( new_n10104_, new_n10076_ ) -new_n10106_ = NAND ( new_n4769_, NET_1074 ) -new_n10107_ = NAND ( new_n10106_, new_n10105_, new_n6540_ ) -new_n10108_ = NAND ( new_n10107_, new_n10075_ ) -new_n10109_ = NAND ( new_n10108_, new_n6656_ ) -new_n10110_ = NAND ( new_n10109_, NET_1077 ) -new_n10111_ = NAND ( new_n10101_, new_n10077_ ) -new_n10112_ = OR ( new_n10111_, new_n10076_ ) -new_n10113_ = OR ( new_n10105_, new_n10075_ ) -new_n10114_ = NAND ( new_n10113_, new_n10112_ ) -new_n10115_ = NAND ( new_n10114_, new_n6294_ ) -new_n10116_ = OR ( new_n10111_, new_n4769_ ) -new_n10117_ = NOT ( NET_9 ) -new_n10118_ = OR ( new_n6226_, new_n10117_ ) -new_n10119_ = NAND ( new_n6226_, NET_61 ) -new_n10120_ = AND ( new_n10119_, new_n10118_ ) -new_n10121_ = OR ( new_n10120_, new_n10116_ ) -new_n10122_ = NOR ( new_n6657_, new_n6540_ ) -new_n10123_ = NOT ( new_n10122_ ) -new_n10124_ = NOR ( new_n10123_, new_n5171_ ) -new_n10125_ = NAND ( new_n6656_, new_n6294_ ) -new_n10126_ = NOR ( new_n10125_, new_n4561_ ) -new_n10127_ = NOR ( new_n10126_, new_n10124_ ) -new_n10128_ = OR ( new_n10127_, new_n10075_ ) -new_n10129_ = OR ( new_n6226_, NET_1 ) -new_n10130_ = NAND ( new_n6226_, new_n8661_ ) -new_n10131_ = AND ( new_n10130_, new_n10129_ ) -new_n10132_ = NAND ( new_n10131_, new_n10077_ ) -new_n10133_ = OR ( new_n10132_, new_n10101_ ) -new_n10134_ = NOT ( new_n10125_ ) -new_n10135_ = NOR ( new_n4769_, new_n4561_ ) -new_n10136_ = NOR ( new_n10076_, new_n7027_ ) -new_n10137_ = OR ( new_n10136_, new_n10135_ ) -new_n10138_ = NAND ( new_n10137_, new_n10134_ ) -new_n10139_ = AND ( new_n10138_, new_n10133_, new_n10128_ ) -NET_16874 = NAND ( new_n10139_, new_n10121_, new_n10115_, new_n10110_ ) -new_n10141_ = NAND ( new_n10109_, NET_1078 ) -new_n10142_ = NAND ( new_n10114_, new_n6302_ ) -new_n10143_ = NOT ( NET_10 ) -new_n10144_ = OR ( new_n6226_, new_n10143_ ) -new_n10145_ = NAND ( new_n6226_, NET_60 ) -new_n10146_ = AND ( new_n10145_, new_n10144_ ) -new_n10147_ = OR ( new_n10146_, new_n10116_ ) -new_n10148_ = NAND ( new_n10122_, new_n4558_ ) -new_n10149_ = NAND ( new_n6656_, new_n6302_ ) -new_n10150_ = OR ( new_n10149_, new_n4561_ ) -new_n10151_ = NAND ( new_n10150_, new_n10148_ ) -new_n10152_ = NOT ( new_n10151_ ) -new_n10153_ = OR ( new_n10152_, new_n10075_ ) -new_n10154_ = NOT ( NET_2 ) -new_n10155_ = OR ( new_n6226_, new_n10154_ ) -new_n10156_ = NAND ( new_n6226_, NET_68 ) -new_n10157_ = NAND ( new_n10156_, new_n10155_ ) -new_n10158_ = NAND ( new_n10157_, new_n10077_ ) -new_n10159_ = OR ( new_n10158_, new_n10101_ ) -new_n10160_ = NOT ( new_n10149_ ) -new_n10161_ = NAND ( new_n10160_, new_n10137_ ) -new_n10162_ = AND ( new_n10161_, new_n10159_, new_n10153_ ) -NET_16875 = NAND ( new_n10162_, new_n10147_, new_n10142_, new_n10141_ ) -new_n10164_ = NAND ( new_n10109_, NET_1079 ) -new_n10165_ = NAND ( new_n10114_, new_n6310_ ) -new_n10166_ = NOT ( NET_11 ) -new_n10167_ = OR ( new_n6226_, new_n10166_ ) -new_n10168_ = NAND ( new_n6226_, NET_59 ) -new_n10169_ = AND ( new_n10168_, new_n10167_ ) -new_n10170_ = OR ( new_n10169_, new_n10116_ ) -new_n10171_ = NOR ( new_n10123_, new_n4610_ ) -new_n10172_ = NAND ( new_n6656_, new_n6310_ ) -new_n10173_ = NOR ( new_n10172_, new_n4561_ ) -new_n10174_ = NOR ( new_n10173_, new_n10171_ ) -new_n10175_ = OR ( new_n10174_, new_n10075_ ) -new_n10176_ = OR ( new_n6226_, NET_3 ) -new_n10177_ = NAND ( new_n6226_, new_n8706_ ) -new_n10178_ = AND ( new_n10177_, new_n10176_ ) -new_n10179_ = NAND ( new_n10178_, new_n10077_ ) -new_n10180_ = OR ( new_n10179_, new_n10101_ ) -new_n10181_ = NOT ( new_n10172_ ) -new_n10182_ = NAND ( new_n10181_, new_n10137_ ) -new_n10183_ = AND ( new_n10182_, new_n10180_, new_n10175_ ) -NET_16876 = NAND ( new_n10183_, new_n10170_, new_n10165_, new_n10164_ ) -new_n10185_ = NAND ( new_n10109_, NET_1080 ) -new_n10186_ = NAND ( new_n10114_, new_n6318_ ) -new_n10187_ = NOT ( NET_12 ) -new_n10188_ = OR ( new_n6226_, new_n10187_ ) -new_n10189_ = NAND ( new_n6226_, NET_58 ) -new_n10190_ = AND ( new_n10189_, new_n10188_ ) -new_n10191_ = OR ( new_n10190_, new_n10116_ ) -new_n10192_ = NOR ( new_n10123_, new_n6678_ ) -new_n10193_ = NAND ( new_n6656_, new_n6318_ ) -new_n10194_ = NOR ( new_n10193_, new_n4561_ ) -new_n10195_ = NOR ( new_n10194_, new_n10192_ ) -new_n10196_ = OR ( new_n10195_, new_n10075_ ) -new_n10197_ = OR ( new_n6226_, NET_4 ) -new_n10198_ = NAND ( new_n6226_, new_n8727_ ) -new_n10199_ = AND ( new_n10198_, new_n10197_ ) -new_n10200_ = NAND ( new_n10199_, new_n10077_ ) -new_n10201_ = OR ( new_n10200_, new_n10101_ ) -new_n10202_ = NOT ( new_n10193_ ) -new_n10203_ = NAND ( new_n10202_, new_n10137_ ) -new_n10204_ = AND ( new_n10203_, new_n10201_, new_n10196_ ) -NET_16877 = NAND ( new_n10204_, new_n10191_, new_n10186_, new_n10185_ ) -new_n10206_ = NAND ( new_n10109_, NET_1081 ) -new_n10207_ = NAND ( new_n10114_, new_n6326_ ) -new_n10208_ = NOT ( NET_13 ) -new_n10209_ = OR ( new_n6226_, new_n10208_ ) -new_n10210_ = NAND ( new_n6226_, NET_57 ) -new_n10211_ = AND ( new_n10210_, new_n10209_ ) -new_n10212_ = OR ( new_n10211_, new_n10116_ ) -new_n10213_ = NOR ( new_n10123_, new_n4518_ ) -new_n10214_ = NAND ( new_n6656_, new_n6326_ ) -new_n10215_ = NOR ( new_n10214_, new_n4561_ ) -new_n10216_ = NOR ( new_n10215_, new_n10213_ ) -new_n10217_ = OR ( new_n10216_, new_n10075_ ) -new_n10218_ = OR ( new_n6226_, NET_5 ) -new_n10219_ = NAND ( new_n6226_, new_n8748_ ) -new_n10220_ = AND ( new_n10219_, new_n10218_ ) -new_n10221_ = NAND ( new_n10220_, new_n10077_ ) -new_n10222_ = OR ( new_n10221_, new_n10101_ ) -new_n10223_ = NOT ( new_n10214_ ) -new_n10224_ = NAND ( new_n10223_, new_n10137_ ) -new_n10225_ = AND ( new_n10224_, new_n10222_, new_n10217_ ) -NET_16878 = NAND ( new_n10225_, new_n10212_, new_n10207_, new_n10206_ ) -new_n10227_ = NAND ( new_n10109_, NET_1082 ) -new_n10228_ = NAND ( new_n10114_, new_n6334_ ) -new_n10229_ = NOT ( NET_14 ) -new_n10230_ = OR ( new_n6226_, new_n10229_ ) -new_n10231_ = NAND ( new_n6226_, NET_56 ) -new_n10232_ = AND ( new_n10231_, new_n10230_ ) -new_n10233_ = OR ( new_n10232_, new_n10116_ ) -new_n10234_ = NOR ( new_n10123_, new_n4697_ ) -new_n10235_ = NAND ( new_n6656_, new_n6334_ ) -new_n10236_ = NOR ( new_n10235_, new_n4561_ ) -new_n10237_ = NOR ( new_n10236_, new_n10234_ ) -new_n10238_ = OR ( new_n10237_, new_n10075_ ) -new_n10239_ = OR ( new_n6226_, NET_6 ) -new_n10240_ = NAND ( new_n6226_, new_n8769_ ) -new_n10241_ = AND ( new_n10240_, new_n10239_ ) -new_n10242_ = NAND ( new_n10241_, new_n10077_ ) -new_n10243_ = OR ( new_n10242_, new_n10101_ ) -new_n10244_ = NOT ( new_n10235_ ) -new_n10245_ = NAND ( new_n10244_, new_n10137_ ) -new_n10246_ = AND ( new_n10245_, new_n10243_, new_n10238_ ) -NET_16879 = NAND ( new_n10246_, new_n10233_, new_n10228_, new_n10227_ ) -new_n10248_ = NAND ( new_n10109_, NET_1083 ) -new_n10249_ = NAND ( new_n10114_, new_n6342_ ) -new_n10250_ = NOT ( NET_15 ) -new_n10251_ = OR ( new_n6226_, new_n10250_ ) -new_n10252_ = NAND ( new_n6226_, NET_55 ) -new_n10253_ = AND ( new_n10252_, new_n10251_ ) -new_n10254_ = OR ( new_n10253_, new_n10116_ ) -new_n10255_ = NAND ( new_n10122_, new_n4639_ ) -new_n10256_ = NAND ( new_n6656_, new_n6342_ ) -new_n10257_ = OR ( new_n10256_, new_n4561_ ) -new_n10258_ = NAND ( new_n10257_, new_n10255_ ) -new_n10259_ = NOT ( new_n10258_ ) -new_n10260_ = OR ( new_n10259_, new_n10075_ ) -new_n10261_ = OR ( new_n6226_, NET_7 ) -new_n10262_ = NAND ( new_n6226_, new_n8791_ ) -new_n10263_ = AND ( new_n10262_, new_n10261_ ) -new_n10264_ = NAND ( new_n10263_, new_n10077_ ) -new_n10265_ = OR ( new_n10264_, new_n10101_ ) -new_n10266_ = NOT ( new_n10256_ ) -new_n10267_ = NAND ( new_n10266_, new_n10137_ ) -new_n10268_ = AND ( new_n10267_, new_n10265_, new_n10260_ ) -NET_16880 = NAND ( new_n10268_, new_n10254_, new_n10249_, new_n10248_ ) -new_n10270_ = NAND ( new_n10109_, NET_1084 ) -new_n10271_ = NAND ( new_n10114_, new_n6350_ ) -new_n10272_ = NOT ( NET_16 ) -new_n10273_ = OR ( new_n6226_, new_n10272_ ) -new_n10274_ = NAND ( new_n6226_, NET_54 ) -new_n10275_ = AND ( new_n10274_, new_n10273_ ) -new_n10276_ = OR ( new_n10275_, new_n10116_ ) -new_n10277_ = NAND ( new_n10122_, new_n4668_ ) -new_n10278_ = NAND ( new_n6656_, new_n6350_ ) -new_n10279_ = OR ( new_n10278_, new_n4561_ ) -new_n10280_ = NAND ( new_n10279_, new_n10277_ ) -new_n10281_ = NOT ( new_n10280_ ) -new_n10282_ = OR ( new_n10281_, new_n10075_ ) -new_n10283_ = OR ( new_n6226_, NET_8 ) -new_n10284_ = NAND ( new_n6226_, new_n8813_ ) -new_n10285_ = AND ( new_n10284_, new_n10283_ ) -new_n10286_ = NAND ( new_n10285_, new_n10077_ ) -new_n10287_ = OR ( new_n10286_, new_n10101_ ) -new_n10288_ = NOT ( new_n10278_ ) -new_n10289_ = NAND ( new_n10288_, new_n10137_ ) -new_n10290_ = AND ( new_n10289_, new_n10287_, new_n10282_ ) -NET_16881 = NAND ( new_n10290_, new_n10276_, new_n10271_, new_n10270_ ) -new_n10292_ = NAND ( new_n4703_, NET_1212, NET_1211 ) -new_n10293_ = NAND ( NET_1214, new_n4562_, NET_1212, NET_1211 ) -new_n10294_ = NOT ( new_n7154_ ) -new_n10295_ = NOR ( new_n10089_, new_n10294_ ) -new_n10296_ = NAND ( new_n10295_, new_n10100_ ) -new_n10297_ = NAND ( new_n10296_, new_n10077_, new_n4767_ ) -new_n10298_ = NAND ( new_n10297_, new_n10103_ ) -new_n10299_ = NAND ( new_n10298_, new_n10293_ ) -new_n10300_ = NAND ( new_n4767_, NET_1074 ) -new_n10301_ = NAND ( new_n10300_, new_n10299_, new_n6540_ ) -new_n10302_ = NAND ( new_n10301_, new_n10292_ ) -new_n10303_ = NAND ( new_n10302_, new_n6656_ ) -new_n10304_ = NAND ( new_n10303_, NET_1085 ) -new_n10305_ = OR ( new_n10297_, new_n10293_ ) -new_n10306_ = OR ( new_n10299_, new_n10292_ ) -new_n10307_ = NAND ( new_n10306_, new_n10305_ ) -new_n10308_ = NAND ( new_n10307_, new_n6294_ ) -new_n10309_ = NAND ( new_n10296_, new_n10077_ ) -new_n10310_ = OR ( new_n10309_, new_n4767_ ) -new_n10311_ = OR ( new_n10310_, new_n10120_ ) -new_n10312_ = OR ( new_n10292_, new_n10127_ ) -new_n10313_ = NOR ( new_n4767_, new_n4561_ ) -new_n10314_ = NOR ( new_n10293_, new_n7027_ ) -new_n10315_ = OR ( new_n10314_, new_n10313_ ) -new_n10316_ = NAND ( new_n10315_, new_n10134_ ) -new_n10317_ = OR ( new_n10296_, new_n10132_ ) -new_n10318_ = AND ( new_n10317_, new_n10316_, new_n10312_ ) -NET_16882 = NAND ( new_n10318_, new_n10311_, new_n10308_, new_n10304_ ) -new_n10320_ = NAND ( new_n10303_, NET_1086 ) -new_n10321_ = NAND ( new_n10307_, new_n6302_ ) -new_n10322_ = OR ( new_n10310_, new_n10146_ ) -new_n10323_ = OR ( new_n10292_, new_n10152_ ) -new_n10324_ = NAND ( new_n10315_, new_n10160_ ) -new_n10325_ = OR ( new_n10296_, new_n10158_ ) -new_n10326_ = AND ( new_n10325_, new_n10324_, new_n10323_ ) -NET_16883 = NAND ( new_n10326_, new_n10322_, new_n10321_, new_n10320_ ) -new_n10328_ = NAND ( new_n10303_, NET_1087 ) -new_n10329_ = NAND ( new_n10307_, new_n6310_ ) -new_n10330_ = OR ( new_n10310_, new_n10169_ ) -new_n10331_ = OR ( new_n10292_, new_n10174_ ) -new_n10332_ = NAND ( new_n10315_, new_n10181_ ) -new_n10333_ = OR ( new_n10296_, new_n10179_ ) -new_n10334_ = AND ( new_n10333_, new_n10332_, new_n10331_ ) -NET_16884 = NAND ( new_n10334_, new_n10330_, new_n10329_, new_n10328_ ) -new_n10336_ = NAND ( new_n10303_, NET_1088 ) -new_n10337_ = NAND ( new_n10307_, new_n6318_ ) -new_n10338_ = OR ( new_n10310_, new_n10190_ ) -new_n10339_ = OR ( new_n10292_, new_n10195_ ) -new_n10340_ = NAND ( new_n10315_, new_n10202_ ) -new_n10341_ = OR ( new_n10296_, new_n10200_ ) -new_n10342_ = AND ( new_n10341_, new_n10340_, new_n10339_ ) -NET_16885 = NAND ( new_n10342_, new_n10338_, new_n10337_, new_n10336_ ) -new_n10344_ = NAND ( new_n10303_, NET_1089 ) -new_n10345_ = NAND ( new_n10307_, new_n6326_ ) -new_n10346_ = OR ( new_n10310_, new_n10211_ ) -new_n10347_ = OR ( new_n10292_, new_n10216_ ) -new_n10348_ = NAND ( new_n10315_, new_n10223_ ) -new_n10349_ = OR ( new_n10296_, new_n10221_ ) -new_n10350_ = AND ( new_n10349_, new_n10348_, new_n10347_ ) -NET_16886 = NAND ( new_n10350_, new_n10346_, new_n10345_, new_n10344_ ) -new_n10352_ = NAND ( new_n10303_, NET_1090 ) -new_n10353_ = NAND ( new_n10307_, new_n6334_ ) -new_n10354_ = OR ( new_n10310_, new_n10232_ ) -new_n10355_ = OR ( new_n10292_, new_n10237_ ) -new_n10356_ = NAND ( new_n10315_, new_n10244_ ) -new_n10357_ = OR ( new_n10296_, new_n10242_ ) -new_n10358_ = AND ( new_n10357_, new_n10356_, new_n10355_ ) -NET_16887 = NAND ( new_n10358_, new_n10354_, new_n10353_, new_n10352_ ) -new_n10360_ = NAND ( new_n10303_, NET_1091 ) -new_n10361_ = NAND ( new_n10307_, new_n6342_ ) -new_n10362_ = OR ( new_n10310_, new_n10253_ ) -new_n10363_ = OR ( new_n10292_, new_n10259_ ) -new_n10364_ = NAND ( new_n10315_, new_n10266_ ) -new_n10365_ = OR ( new_n10296_, new_n10264_ ) -new_n10366_ = AND ( new_n10365_, new_n10364_, new_n10363_ ) -NET_16888 = NAND ( new_n10366_, new_n10362_, new_n10361_, new_n10360_ ) -new_n10368_ = NAND ( new_n10303_, NET_1092 ) -new_n10369_ = NAND ( new_n10307_, new_n6350_ ) -new_n10370_ = OR ( new_n10310_, new_n10275_ ) -new_n10371_ = OR ( new_n10292_, new_n10281_ ) -new_n10372_ = NAND ( new_n10315_, new_n10288_ ) -new_n10373_ = OR ( new_n10296_, new_n10286_ ) -new_n10374_ = AND ( new_n10373_, new_n10372_, new_n10371_ ) -NET_16889 = NAND ( new_n10374_, new_n10370_, new_n10369_, new_n10368_ ) -new_n10376_ = NAND ( new_n4702_, NET_1212, NET_1211 ) -new_n10377_ = NAND ( new_n4563_, new_n4562_, NET_1212, NET_1211 ) -new_n10378_ = AND ( new_n10099_, new_n7105_ ) -new_n10379_ = NAND ( new_n10378_, new_n10090_ ) -new_n10380_ = NAND ( new_n10379_, new_n10077_, new_n4765_ ) -new_n10381_ = NAND ( new_n10380_, new_n10103_ ) -new_n10382_ = NAND ( new_n10381_, new_n10377_ ) -new_n10383_ = NAND ( new_n4765_, NET_1074 ) -new_n10384_ = NAND ( new_n10383_, new_n10382_, new_n6540_ ) -new_n10385_ = NAND ( new_n10384_, new_n10376_ ) -new_n10386_ = NAND ( new_n10385_, new_n6656_ ) -new_n10387_ = NAND ( new_n10386_, NET_1093 ) -new_n10388_ = OR ( new_n10380_, new_n10377_ ) -new_n10389_ = OR ( new_n10382_, new_n10376_ ) -new_n10390_ = NAND ( new_n10389_, new_n10388_ ) -new_n10391_ = NAND ( new_n10390_, new_n6294_ ) -new_n10392_ = NAND ( new_n10379_, new_n10077_ ) -new_n10393_ = OR ( new_n10392_, new_n4765_ ) -new_n10394_ = OR ( new_n10393_, new_n10120_ ) -new_n10395_ = OR ( new_n10376_, new_n10127_ ) -new_n10396_ = NOR ( new_n4765_, new_n4561_ ) -new_n10397_ = NOR ( new_n10377_, new_n7027_ ) -new_n10398_ = OR ( new_n10397_, new_n10396_ ) -new_n10399_ = NAND ( new_n10398_, new_n10134_ ) -new_n10400_ = OR ( new_n10379_, new_n10132_ ) -new_n10401_ = AND ( new_n10400_, new_n10399_, new_n10395_ ) -NET_16890 = NAND ( new_n10401_, new_n10394_, new_n10391_, new_n10387_ ) -new_n10403_ = NAND ( new_n10386_, NET_1094 ) -new_n10404_ = NAND ( new_n10390_, new_n6302_ ) -new_n10405_ = OR ( new_n10393_, new_n10146_ ) -new_n10406_ = OR ( new_n10376_, new_n10152_ ) -new_n10407_ = NAND ( new_n10398_, new_n10160_ ) -new_n10408_ = OR ( new_n10379_, new_n10158_ ) -new_n10409_ = AND ( new_n10408_, new_n10407_, new_n10406_ ) -NET_16891 = NAND ( new_n10409_, new_n10405_, new_n10404_, new_n10403_ ) -new_n10411_ = NAND ( new_n10386_, NET_1095 ) -new_n10412_ = NAND ( new_n10390_, new_n6310_ ) -new_n10413_ = OR ( new_n10393_, new_n10169_ ) -new_n10414_ = OR ( new_n10376_, new_n10174_ ) -new_n10415_ = NAND ( new_n10398_, new_n10181_ ) -new_n10416_ = OR ( new_n10379_, new_n10179_ ) -new_n10417_ = AND ( new_n10416_, new_n10415_, new_n10414_ ) -NET_16892 = NAND ( new_n10417_, new_n10413_, new_n10412_, new_n10411_ ) -new_n10419_ = NAND ( new_n10386_, NET_1096 ) -new_n10420_ = NAND ( new_n10390_, new_n6318_ ) -new_n10421_ = OR ( new_n10393_, new_n10190_ ) -new_n10422_ = OR ( new_n10376_, new_n10195_ ) -new_n10423_ = NAND ( new_n10398_, new_n10202_ ) -new_n10424_ = OR ( new_n10379_, new_n10200_ ) -new_n10425_ = AND ( new_n10424_, new_n10423_, new_n10422_ ) -NET_16893 = NAND ( new_n10425_, new_n10421_, new_n10420_, new_n10419_ ) -new_n10427_ = NAND ( new_n10386_, NET_1097 ) -new_n10428_ = NAND ( new_n10390_, new_n6326_ ) -new_n10429_ = OR ( new_n10393_, new_n10211_ ) -new_n10430_ = OR ( new_n10376_, new_n10216_ ) -new_n10431_ = NAND ( new_n10398_, new_n10223_ ) -new_n10432_ = OR ( new_n10379_, new_n10221_ ) -new_n10433_ = AND ( new_n10432_, new_n10431_, new_n10430_ ) -NET_16894 = NAND ( new_n10433_, new_n10429_, new_n10428_, new_n10427_ ) -new_n10435_ = NAND ( new_n10386_, NET_1098 ) -new_n10436_ = NAND ( new_n10390_, new_n6334_ ) -new_n10437_ = OR ( new_n10393_, new_n10232_ ) -new_n10438_ = OR ( new_n10376_, new_n10237_ ) -new_n10439_ = NAND ( new_n10398_, new_n10244_ ) -new_n10440_ = OR ( new_n10379_, new_n10242_ ) -new_n10441_ = AND ( new_n10440_, new_n10439_, new_n10438_ ) -NET_16895 = NAND ( new_n10441_, new_n10437_, new_n10436_, new_n10435_ ) -new_n10443_ = NAND ( new_n10386_, NET_1099 ) -new_n10444_ = NAND ( new_n10390_, new_n6342_ ) -new_n10445_ = OR ( new_n10393_, new_n10253_ ) -new_n10446_ = OR ( new_n10376_, new_n10259_ ) -new_n10447_ = NAND ( new_n10398_, new_n10266_ ) -new_n10448_ = OR ( new_n10379_, new_n10264_ ) -new_n10449_ = AND ( new_n10448_, new_n10447_, new_n10446_ ) -NET_16896 = NAND ( new_n10449_, new_n10445_, new_n10444_, new_n10443_ ) -new_n10451_ = NAND ( new_n10386_, NET_1100 ) -new_n10452_ = NAND ( new_n10390_, new_n6350_ ) -new_n10453_ = OR ( new_n10393_, new_n10275_ ) -new_n10454_ = OR ( new_n10376_, new_n10281_ ) -new_n10455_ = NAND ( new_n10398_, new_n10288_ ) -new_n10456_ = OR ( new_n10379_, new_n10286_ ) -new_n10457_ = AND ( new_n10456_, new_n10455_, new_n10454_ ) -NET_16897 = NAND ( new_n10457_, new_n10453_, new_n10452_, new_n10451_ ) -new_n10459_ = NOR ( NET_1214, NET_1213 ) -new_n10460_ = NOT ( new_n10459_ ) -new_n10461_ = NOR ( new_n10460_, new_n10074_ ) -new_n10462_ = NOT ( new_n10461_ ) -new_n10463_ = NAND ( new_n4564_, new_n4568_, NET_1211 ) -new_n10464_ = NAND ( new_n10378_, new_n10295_ ) -new_n10465_ = NAND ( new_n10464_, new_n10077_, new_n4780_ ) -new_n10466_ = NAND ( new_n10465_, new_n10103_ ) -new_n10467_ = NAND ( new_n10466_, new_n10463_ ) -new_n10468_ = NAND ( new_n4780_, NET_1074 ) -new_n10469_ = NAND ( new_n10468_, new_n10467_, new_n6540_ ) -new_n10470_ = NAND ( new_n10469_, new_n10462_ ) -new_n10471_ = NAND ( new_n10470_, new_n6656_ ) -new_n10472_ = NAND ( new_n10471_, NET_1101 ) -new_n10473_ = OR ( new_n10465_, new_n10463_ ) -new_n10474_ = OR ( new_n10467_, new_n10462_ ) -new_n10475_ = NAND ( new_n10474_, new_n10473_ ) -new_n10476_ = NAND ( new_n10475_, new_n6294_ ) -new_n10477_ = NAND ( new_n10464_, new_n10077_ ) -new_n10478_ = OR ( new_n10477_, new_n4780_ ) -new_n10479_ = OR ( new_n10478_, new_n10120_ ) -new_n10480_ = OR ( new_n10462_, new_n10127_ ) -new_n10481_ = NOR ( new_n4780_, new_n4561_ ) -new_n10482_ = NOR ( new_n10463_, new_n7027_ ) -new_n10483_ = OR ( new_n10482_, new_n10481_ ) -new_n10484_ = NAND ( new_n10483_, new_n10134_ ) -new_n10485_ = OR ( new_n10464_, new_n10132_ ) -new_n10486_ = AND ( new_n10485_, new_n10484_, new_n10480_ ) -NET_16898 = NAND ( new_n10486_, new_n10479_, new_n10476_, new_n10472_ ) -new_n10488_ = NAND ( new_n10471_, NET_1102 ) -new_n10489_ = NAND ( new_n10475_, new_n6302_ ) -new_n10490_ = OR ( new_n10478_, new_n10146_ ) -new_n10491_ = NAND ( new_n10461_, new_n10151_ ) -new_n10492_ = NAND ( new_n10483_, new_n10160_ ) -new_n10493_ = OR ( new_n10464_, new_n10158_ ) -new_n10494_ = AND ( new_n10493_, new_n10492_, new_n10491_ ) -NET_16899 = NAND ( new_n10494_, new_n10490_, new_n10489_, new_n10488_ ) -new_n10496_ = NAND ( new_n10471_, NET_1103 ) -new_n10497_ = NAND ( new_n10475_, new_n6310_ ) -new_n10498_ = OR ( new_n10478_, new_n10169_ ) -new_n10499_ = OR ( new_n10462_, new_n10174_ ) -new_n10500_ = NAND ( new_n10483_, new_n10181_ ) -new_n10501_ = OR ( new_n10464_, new_n10179_ ) -new_n10502_ = AND ( new_n10501_, new_n10500_, new_n10499_ ) -NET_16900 = NAND ( new_n10502_, new_n10498_, new_n10497_, new_n10496_ ) -new_n10504_ = NAND ( new_n10471_, NET_1104 ) -new_n10505_ = NAND ( new_n10475_, new_n6318_ ) -new_n10506_ = OR ( new_n10478_, new_n10190_ ) -new_n10507_ = OR ( new_n10462_, new_n10195_ ) -new_n10508_ = NAND ( new_n10483_, new_n10202_ ) -new_n10509_ = OR ( new_n10464_, new_n10200_ ) -new_n10510_ = AND ( new_n10509_, new_n10508_, new_n10507_ ) -NET_16901 = NAND ( new_n10510_, new_n10506_, new_n10505_, new_n10504_ ) -new_n10512_ = NAND ( new_n10471_, NET_1105 ) -new_n10513_ = NAND ( new_n10475_, new_n6326_ ) -new_n10514_ = OR ( new_n10478_, new_n10211_ ) -new_n10515_ = OR ( new_n10462_, new_n10216_ ) -new_n10516_ = NAND ( new_n10483_, new_n10223_ ) -new_n10517_ = OR ( new_n10464_, new_n10221_ ) -new_n10518_ = AND ( new_n10517_, new_n10516_, new_n10515_ ) -NET_16902 = NAND ( new_n10518_, new_n10514_, new_n10513_, new_n10512_ ) -new_n10520_ = NAND ( new_n10471_, NET_1106 ) -new_n10521_ = NAND ( new_n10475_, new_n6334_ ) -new_n10522_ = OR ( new_n10478_, new_n10232_ ) -new_n10523_ = OR ( new_n10462_, new_n10237_ ) -new_n10524_ = NAND ( new_n10483_, new_n10244_ ) -new_n10525_ = OR ( new_n10464_, new_n10242_ ) -new_n10526_ = AND ( new_n10525_, new_n10524_, new_n10523_ ) -NET_16903 = NAND ( new_n10526_, new_n10522_, new_n10521_, new_n10520_ ) -new_n10528_ = NAND ( new_n10471_, NET_1107 ) -new_n10529_ = NAND ( new_n10475_, new_n6342_ ) -new_n10530_ = OR ( new_n10478_, new_n10253_ ) -new_n10531_ = NAND ( new_n10461_, new_n10258_ ) -new_n10532_ = NAND ( new_n10483_, new_n10266_ ) -new_n10533_ = OR ( new_n10464_, new_n10264_ ) -new_n10534_ = AND ( new_n10533_, new_n10532_, new_n10531_ ) -NET_16904 = NAND ( new_n10534_, new_n10530_, new_n10529_, new_n10528_ ) -new_n10536_ = NAND ( new_n10471_, NET_1108 ) -new_n10537_ = NAND ( new_n10475_, new_n6350_ ) -new_n10538_ = OR ( new_n10478_, new_n10275_ ) -new_n10539_ = NAND ( new_n10461_, new_n10280_ ) -new_n10540_ = NAND ( new_n10483_, new_n10288_ ) -new_n10541_ = OR ( new_n10464_, new_n10286_ ) -new_n10542_ = AND ( new_n10541_, new_n10540_, new_n10539_ ) -NET_16905 = NAND ( new_n10542_, new_n10538_, new_n10537_, new_n10536_ ) -new_n10544_ = OR ( new_n4730_, new_n10073_ ) -new_n10545_ = NAND ( new_n4563_, NET_1213, new_n4568_, NET_1211 ) -new_n10546_ = NOT ( new_n10089_ ) -new_n10547_ = NOR ( new_n10546_, new_n7154_ ) -new_n10548_ = NAND ( new_n10547_, new_n10100_ ) -new_n10549_ = NAND ( new_n10548_, new_n10077_, new_n4778_ ) -new_n10550_ = NAND ( new_n10549_, new_n10103_ ) -new_n10551_ = NAND ( new_n10550_, new_n10545_ ) -new_n10552_ = NAND ( new_n4778_, NET_1074 ) -new_n10553_ = NAND ( new_n10552_, new_n10551_, new_n6540_ ) -new_n10554_ = NAND ( new_n10553_, new_n10544_ ) -new_n10555_ = NAND ( new_n10554_, new_n6656_ ) -new_n10556_ = NAND ( new_n10555_, NET_1109 ) -new_n10557_ = NAND ( new_n10548_, new_n10077_ ) -new_n10558_ = OR ( new_n10557_, new_n10545_ ) -new_n10559_ = OR ( new_n10551_, new_n10544_ ) -new_n10560_ = NAND ( new_n10559_, new_n10558_ ) -new_n10561_ = NAND ( new_n10560_, new_n6294_ ) -new_n10562_ = OR ( new_n10557_, new_n4778_ ) -new_n10563_ = OR ( new_n10562_, new_n10120_ ) -new_n10564_ = OR ( new_n10544_, new_n10127_ ) -new_n10565_ = NOR ( new_n4778_, new_n4561_ ) -new_n10566_ = NOR ( new_n10545_, new_n7027_ ) -new_n10567_ = OR ( new_n10566_, new_n10565_ ) -new_n10568_ = NAND ( new_n10567_, new_n10134_ ) -new_n10569_ = OR ( new_n10548_, new_n10132_ ) -new_n10570_ = AND ( new_n10569_, new_n10568_, new_n10564_ ) -NET_16906 = NAND ( new_n10570_, new_n10563_, new_n10561_, new_n10556_ ) -new_n10572_ = NAND ( new_n10555_, NET_1110 ) -new_n10573_ = NAND ( new_n10560_, new_n6302_ ) -new_n10574_ = OR ( new_n10562_, new_n10146_ ) -new_n10575_ = OR ( new_n10544_, new_n10152_ ) -new_n10576_ = NAND ( new_n10567_, new_n10160_ ) -new_n10577_ = OR ( new_n10548_, new_n10158_ ) -new_n10578_ = AND ( new_n10577_, new_n10576_, new_n10575_ ) -NET_16907 = NAND ( new_n10578_, new_n10574_, new_n10573_, new_n10572_ ) -new_n10580_ = NAND ( new_n10555_, NET_1111 ) -new_n10581_ = NAND ( new_n10560_, new_n6310_ ) -new_n10582_ = OR ( new_n10562_, new_n10169_ ) -new_n10583_ = OR ( new_n10544_, new_n10174_ ) -new_n10584_ = NAND ( new_n10567_, new_n10181_ ) -new_n10585_ = OR ( new_n10548_, new_n10179_ ) -new_n10586_ = AND ( new_n10585_, new_n10584_, new_n10583_ ) -NET_16908 = NAND ( new_n10586_, new_n10582_, new_n10581_, new_n10580_ ) -new_n10588_ = NAND ( new_n10555_, NET_1112 ) -new_n10589_ = NAND ( new_n10560_, new_n6318_ ) -new_n10590_ = OR ( new_n10562_, new_n10190_ ) -new_n10591_ = OR ( new_n10544_, new_n10195_ ) -new_n10592_ = NAND ( new_n10567_, new_n10202_ ) -new_n10593_ = OR ( new_n10548_, new_n10200_ ) -new_n10594_ = AND ( new_n10593_, new_n10592_, new_n10591_ ) -NET_16909 = NAND ( new_n10594_, new_n10590_, new_n10589_, new_n10588_ ) -new_n10596_ = NAND ( new_n10555_, NET_1113 ) -new_n10597_ = NAND ( new_n10560_, new_n6326_ ) -new_n10598_ = OR ( new_n10562_, new_n10211_ ) -new_n10599_ = OR ( new_n10544_, new_n10216_ ) -new_n10600_ = NAND ( new_n10567_, new_n10223_ ) -new_n10601_ = OR ( new_n10548_, new_n10221_ ) -new_n10602_ = AND ( new_n10601_, new_n10600_, new_n10599_ ) -NET_16910 = NAND ( new_n10602_, new_n10598_, new_n10597_, new_n10596_ ) -new_n10604_ = NAND ( new_n10555_, NET_1114 ) -new_n10605_ = NAND ( new_n10560_, new_n6334_ ) -new_n10606_ = OR ( new_n10562_, new_n10232_ ) -new_n10607_ = OR ( new_n10544_, new_n10237_ ) -new_n10608_ = NAND ( new_n10567_, new_n10244_ ) -new_n10609_ = OR ( new_n10548_, new_n10242_ ) -new_n10610_ = AND ( new_n10609_, new_n10608_, new_n10607_ ) -NET_16911 = NAND ( new_n10610_, new_n10606_, new_n10605_, new_n10604_ ) -new_n10612_ = NAND ( new_n10555_, NET_1115 ) -new_n10613_ = NAND ( new_n10560_, new_n6342_ ) -new_n10614_ = OR ( new_n10562_, new_n10253_ ) -new_n10615_ = OR ( new_n10544_, new_n10259_ ) -new_n10616_ = NAND ( new_n10567_, new_n10266_ ) -new_n10617_ = OR ( new_n10548_, new_n10264_ ) -new_n10618_ = AND ( new_n10617_, new_n10616_, new_n10615_ ) -NET_16912 = NAND ( new_n10618_, new_n10614_, new_n10613_, new_n10612_ ) -new_n10620_ = NAND ( new_n10555_, NET_1116 ) -new_n10621_ = NAND ( new_n10560_, new_n6350_ ) -new_n10622_ = OR ( new_n10562_, new_n10275_ ) -new_n10623_ = OR ( new_n10544_, new_n10281_ ) -new_n10624_ = NAND ( new_n10567_, new_n10288_ ) -new_n10625_ = OR ( new_n10548_, new_n10286_ ) -new_n10626_ = AND ( new_n10625_, new_n10624_, new_n10623_ ) -NET_16913 = NAND ( new_n10626_, new_n10622_, new_n10621_, new_n10620_ ) -new_n10628_ = NAND ( new_n4703_, new_n4568_, NET_1211 ) -new_n10629_ = NAND ( NET_1214, new_n4562_, new_n4568_, NET_1211 ) -new_n10630_ = NOR ( new_n10546_, new_n10294_ ) -new_n10631_ = NAND ( new_n10630_, new_n10100_ ) -new_n10632_ = NAND ( new_n10631_, new_n10077_, new_n4776_ ) -new_n10633_ = NAND ( new_n10632_, new_n10103_ ) -new_n10634_ = NAND ( new_n10633_, new_n10629_ ) -new_n10635_ = NAND ( new_n4776_, NET_1074 ) -new_n10636_ = NAND ( new_n10635_, new_n10634_, new_n6540_ ) -new_n10637_ = NAND ( new_n10636_, new_n10628_ ) -new_n10638_ = NAND ( new_n10637_, new_n6656_ ) -new_n10639_ = NAND ( new_n10638_, NET_1117 ) -new_n10640_ = OR ( new_n10632_, new_n10629_ ) -new_n10641_ = OR ( new_n10634_, new_n10628_ ) -new_n10642_ = NAND ( new_n10641_, new_n10640_ ) -new_n10643_ = NAND ( new_n10642_, new_n6294_ ) -new_n10644_ = NAND ( new_n10631_, new_n10077_ ) -new_n10645_ = OR ( new_n10644_, new_n4776_ ) -new_n10646_ = OR ( new_n10645_, new_n10120_ ) -new_n10647_ = OR ( new_n10628_, new_n10127_ ) -new_n10648_ = NOR ( new_n4776_, new_n4561_ ) -new_n10649_ = NOR ( new_n10629_, new_n7027_ ) -new_n10650_ = OR ( new_n10649_, new_n10648_ ) -new_n10651_ = NAND ( new_n10650_, new_n10134_ ) -new_n10652_ = OR ( new_n10631_, new_n10132_ ) -new_n10653_ = AND ( new_n10652_, new_n10651_, new_n10647_ ) -NET_16914 = NAND ( new_n10653_, new_n10646_, new_n10643_, new_n10639_ ) -new_n10655_ = NAND ( new_n10638_, NET_1118 ) -new_n10656_ = NAND ( new_n10642_, new_n6302_ ) -new_n10657_ = OR ( new_n10645_, new_n10146_ ) -new_n10658_ = OR ( new_n10628_, new_n10152_ ) -new_n10659_ = NAND ( new_n10650_, new_n10160_ ) -new_n10660_ = OR ( new_n10631_, new_n10158_ ) -new_n10661_ = AND ( new_n10660_, new_n10659_, new_n10658_ ) -NET_16915 = NAND ( new_n10661_, new_n10657_, new_n10656_, new_n10655_ ) -new_n10663_ = NAND ( new_n10638_, NET_1119 ) -new_n10664_ = NAND ( new_n10642_, new_n6310_ ) -new_n10665_ = OR ( new_n10645_, new_n10169_ ) -new_n10666_ = OR ( new_n10628_, new_n10174_ ) -new_n10667_ = NAND ( new_n10650_, new_n10181_ ) -new_n10668_ = OR ( new_n10631_, new_n10179_ ) -new_n10669_ = AND ( new_n10668_, new_n10667_, new_n10666_ ) -NET_16916 = NAND ( new_n10669_, new_n10665_, new_n10664_, new_n10663_ ) -new_n10671_ = NAND ( new_n10638_, NET_1120 ) -new_n10672_ = NAND ( new_n10642_, new_n6318_ ) -new_n10673_ = OR ( new_n10645_, new_n10190_ ) -new_n10674_ = OR ( new_n10628_, new_n10195_ ) -new_n10675_ = NAND ( new_n10650_, new_n10202_ ) -new_n10676_ = OR ( new_n10631_, new_n10200_ ) -new_n10677_ = AND ( new_n10676_, new_n10675_, new_n10674_ ) -NET_16917 = NAND ( new_n10677_, new_n10673_, new_n10672_, new_n10671_ ) -new_n10679_ = NAND ( new_n10638_, NET_1121 ) -new_n10680_ = NAND ( new_n10642_, new_n6326_ ) -new_n10681_ = OR ( new_n10645_, new_n10211_ ) -new_n10682_ = OR ( new_n10628_, new_n10216_ ) -new_n10683_ = NAND ( new_n10650_, new_n10223_ ) -new_n10684_ = OR ( new_n10631_, new_n10221_ ) -new_n10685_ = AND ( new_n10684_, new_n10683_, new_n10682_ ) -NET_16918 = NAND ( new_n10685_, new_n10681_, new_n10680_, new_n10679_ ) -new_n10687_ = NAND ( new_n10638_, NET_1122 ) -new_n10688_ = NAND ( new_n10642_, new_n6334_ ) -new_n10689_ = OR ( new_n10645_, new_n10232_ ) -new_n10690_ = OR ( new_n10628_, new_n10237_ ) -new_n10691_ = NAND ( new_n10650_, new_n10244_ ) -new_n10692_ = OR ( new_n10631_, new_n10242_ ) -new_n10693_ = AND ( new_n10692_, new_n10691_, new_n10690_ ) -NET_16919 = NAND ( new_n10693_, new_n10689_, new_n10688_, new_n10687_ ) -new_n10695_ = NAND ( new_n10638_, NET_1123 ) -new_n10696_ = NAND ( new_n10642_, new_n6342_ ) -new_n10697_ = OR ( new_n10645_, new_n10253_ ) -new_n10698_ = OR ( new_n10628_, new_n10259_ ) -new_n10699_ = NAND ( new_n10650_, new_n10266_ ) -new_n10700_ = OR ( new_n10631_, new_n10264_ ) -new_n10701_ = AND ( new_n10700_, new_n10699_, new_n10698_ ) -NET_16920 = NAND ( new_n10701_, new_n10697_, new_n10696_, new_n10695_ ) -new_n10703_ = NAND ( new_n10638_, NET_1124 ) -new_n10704_ = NAND ( new_n10642_, new_n6350_ ) -new_n10705_ = OR ( new_n10645_, new_n10275_ ) -new_n10706_ = OR ( new_n10628_, new_n10281_ ) -new_n10707_ = NAND ( new_n10650_, new_n10288_ ) -new_n10708_ = OR ( new_n10631_, new_n10286_ ) -new_n10709_ = AND ( new_n10708_, new_n10707_, new_n10706_ ) -NET_16921 = NAND ( new_n10709_, new_n10705_, new_n10704_, new_n10703_ ) -new_n10711_ = NAND ( new_n4702_, new_n4568_, NET_1211 ) -new_n10712_ = NAND ( new_n4563_, new_n4562_, new_n4568_, NET_1211 ) -new_n10713_ = NAND ( new_n10547_, new_n10378_ ) -new_n10714_ = NAND ( new_n10713_, new_n10077_, new_n4774_ ) -new_n10715_ = NAND ( new_n10714_, new_n10103_ ) -new_n10716_ = NAND ( new_n10715_, new_n10712_ ) -new_n10717_ = NAND ( new_n4774_, NET_1074 ) -new_n10718_ = NAND ( new_n10717_, new_n10716_, new_n6540_ ) -new_n10719_ = NAND ( new_n10718_, new_n10711_ ) -new_n10720_ = NAND ( new_n10719_, new_n6656_ ) -new_n10721_ = NAND ( new_n10720_, NET_1125 ) -new_n10722_ = OR ( new_n10714_, new_n10712_ ) -new_n10723_ = OR ( new_n10716_, new_n10711_ ) -new_n10724_ = NAND ( new_n10723_, new_n10722_ ) -new_n10725_ = NAND ( new_n10724_, new_n6294_ ) -new_n10726_ = NAND ( new_n10713_, new_n10077_ ) -new_n10727_ = OR ( new_n10726_, new_n4774_ ) -new_n10728_ = OR ( new_n10727_, new_n10120_ ) -new_n10729_ = OR ( new_n10711_, new_n10127_ ) -new_n10730_ = NOR ( new_n4774_, new_n4561_ ) -new_n10731_ = NOR ( new_n10712_, new_n7027_ ) -new_n10732_ = OR ( new_n10731_, new_n10730_ ) -new_n10733_ = NAND ( new_n10732_, new_n10134_ ) -new_n10734_ = OR ( new_n10713_, new_n10132_ ) -new_n10735_ = AND ( new_n10734_, new_n10733_, new_n10729_ ) -NET_16922 = NAND ( new_n10735_, new_n10728_, new_n10725_, new_n10721_ ) -new_n10737_ = NAND ( new_n10720_, NET_1126 ) -new_n10738_ = NAND ( new_n10724_, new_n6302_ ) -new_n10739_ = OR ( new_n10727_, new_n10146_ ) -new_n10740_ = OR ( new_n10711_, new_n10152_ ) -new_n10741_ = NAND ( new_n10732_, new_n10160_ ) -new_n10742_ = OR ( new_n10713_, new_n10158_ ) -new_n10743_ = AND ( new_n10742_, new_n10741_, new_n10740_ ) -NET_16923 = NAND ( new_n10743_, new_n10739_, new_n10738_, new_n10737_ ) -new_n10745_ = NAND ( new_n10720_, NET_1127 ) -new_n10746_ = NAND ( new_n10724_, new_n6310_ ) -new_n10747_ = OR ( new_n10727_, new_n10169_ ) -new_n10748_ = OR ( new_n10711_, new_n10174_ ) -new_n10749_ = NAND ( new_n10732_, new_n10181_ ) -new_n10750_ = OR ( new_n10713_, new_n10179_ ) -new_n10751_ = AND ( new_n10750_, new_n10749_, new_n10748_ ) -NET_16924 = NAND ( new_n10751_, new_n10747_, new_n10746_, new_n10745_ ) -new_n10753_ = NAND ( new_n10720_, NET_1128 ) -new_n10754_ = NAND ( new_n10724_, new_n6318_ ) -new_n10755_ = OR ( new_n10727_, new_n10190_ ) -new_n10756_ = OR ( new_n10711_, new_n10195_ ) -new_n10757_ = NAND ( new_n10732_, new_n10202_ ) -new_n10758_ = OR ( new_n10713_, new_n10200_ ) -new_n10759_ = AND ( new_n10758_, new_n10757_, new_n10756_ ) -NET_16925 = NAND ( new_n10759_, new_n10755_, new_n10754_, new_n10753_ ) -new_n10761_ = NAND ( new_n10720_, NET_1129 ) -new_n10762_ = NAND ( new_n10724_, new_n6326_ ) -new_n10763_ = OR ( new_n10727_, new_n10211_ ) -new_n10764_ = OR ( new_n10711_, new_n10216_ ) -new_n10765_ = NAND ( new_n10732_, new_n10223_ ) -new_n10766_ = OR ( new_n10713_, new_n10221_ ) -new_n10767_ = AND ( new_n10766_, new_n10765_, new_n10764_ ) -NET_16926 = NAND ( new_n10767_, new_n10763_, new_n10762_, new_n10761_ ) -new_n10769_ = NAND ( new_n10720_, NET_1130 ) -new_n10770_ = NAND ( new_n10724_, new_n6334_ ) -new_n10771_ = OR ( new_n10727_, new_n10232_ ) -new_n10772_ = OR ( new_n10711_, new_n10237_ ) -new_n10773_ = NAND ( new_n10732_, new_n10244_ ) -new_n10774_ = OR ( new_n10713_, new_n10242_ ) -new_n10775_ = AND ( new_n10774_, new_n10773_, new_n10772_ ) -NET_16927 = NAND ( new_n10775_, new_n10771_, new_n10770_, new_n10769_ ) -new_n10777_ = NAND ( new_n10720_, NET_1131 ) -new_n10778_ = NAND ( new_n10724_, new_n6342_ ) -new_n10779_ = OR ( new_n10727_, new_n10253_ ) -new_n10780_ = OR ( new_n10711_, new_n10259_ ) -new_n10781_ = NAND ( new_n10732_, new_n10266_ ) -new_n10782_ = OR ( new_n10713_, new_n10264_ ) -new_n10783_ = AND ( new_n10782_, new_n10781_, new_n10780_ ) -NET_16928 = NAND ( new_n10783_, new_n10779_, new_n10778_, new_n10777_ ) -new_n10785_ = NAND ( new_n10720_, NET_1132 ) -new_n10786_ = NAND ( new_n10724_, new_n6350_ ) -new_n10787_ = OR ( new_n10727_, new_n10275_ ) -new_n10788_ = OR ( new_n10711_, new_n10281_ ) -new_n10789_ = NAND ( new_n10732_, new_n10288_ ) -new_n10790_ = OR ( new_n10713_, new_n10286_ ) -new_n10791_ = AND ( new_n10790_, new_n10789_, new_n10788_ ) -NET_16929 = NAND ( new_n10791_, new_n10787_, new_n10786_, new_n10785_ ) -new_n10793_ = OR ( new_n10460_, new_n4730_ ) -new_n10794_ = NAND ( new_n4564_, NET_1212, new_n4727_ ) -new_n10795_ = NAND ( new_n10630_, new_n10378_ ) -new_n10796_ = NAND ( new_n10795_, new_n10077_, new_n4753_ ) -new_n10797_ = NAND ( new_n10796_, new_n10103_ ) -new_n10798_ = NAND ( new_n10797_, new_n10794_ ) -new_n10799_ = NAND ( new_n4753_, NET_1074 ) -new_n10800_ = NAND ( new_n10799_, new_n10798_, new_n6540_ ) -new_n10801_ = NAND ( new_n10800_, new_n10793_ ) -new_n10802_ = NAND ( new_n10801_, new_n6656_ ) -new_n10803_ = NAND ( new_n10802_, NET_1133 ) -new_n10804_ = OR ( new_n10796_, new_n10794_ ) -new_n10805_ = OR ( new_n10798_, new_n10793_ ) -new_n10806_ = NAND ( new_n10805_, new_n10804_ ) -new_n10807_ = NAND ( new_n10806_, new_n6294_ ) -new_n10808_ = NAND ( new_n10795_, new_n10077_ ) -new_n10809_ = OR ( new_n10808_, new_n4753_ ) -new_n10810_ = OR ( new_n10809_, new_n10120_ ) -new_n10811_ = OR ( new_n10793_, new_n10127_ ) -new_n10812_ = NOR ( new_n4753_, new_n4561_ ) -new_n10813_ = NOR ( new_n10794_, new_n7027_ ) -new_n10814_ = OR ( new_n10813_, new_n10812_ ) -new_n10815_ = NAND ( new_n10814_, new_n10134_ ) -new_n10816_ = OR ( new_n10795_, new_n10132_ ) -new_n10817_ = AND ( new_n10816_, new_n10815_, new_n10811_ ) -NET_16930 = NAND ( new_n10817_, new_n10810_, new_n10807_, new_n10803_ ) -new_n10819_ = NAND ( new_n10802_, NET_1134 ) -new_n10820_ = NAND ( new_n10806_, new_n6302_ ) -new_n10821_ = OR ( new_n10809_, new_n10146_ ) -new_n10822_ = OR ( new_n10793_, new_n10152_ ) -new_n10823_ = NAND ( new_n10814_, new_n10160_ ) -new_n10824_ = OR ( new_n10795_, new_n10158_ ) -new_n10825_ = AND ( new_n10824_, new_n10823_, new_n10822_ ) -NET_16931 = NAND ( new_n10825_, new_n10821_, new_n10820_, new_n10819_ ) -new_n10827_ = NAND ( new_n10802_, NET_1135 ) -new_n10828_ = NAND ( new_n10806_, new_n6310_ ) -new_n10829_ = OR ( new_n10809_, new_n10169_ ) -new_n10830_ = OR ( new_n10793_, new_n10174_ ) -new_n10831_ = NAND ( new_n10814_, new_n10181_ ) -new_n10832_ = OR ( new_n10795_, new_n10179_ ) -new_n10833_ = AND ( new_n10832_, new_n10831_, new_n10830_ ) -NET_16932 = NAND ( new_n10833_, new_n10829_, new_n10828_, new_n10827_ ) -new_n10835_ = NAND ( new_n10802_, NET_1136 ) -new_n10836_ = NAND ( new_n10806_, new_n6318_ ) -new_n10837_ = OR ( new_n10809_, new_n10190_ ) -new_n10838_ = OR ( new_n10793_, new_n10195_ ) -new_n10839_ = NAND ( new_n10814_, new_n10202_ ) -new_n10840_ = OR ( new_n10795_, new_n10200_ ) -new_n10841_ = AND ( new_n10840_, new_n10839_, new_n10838_ ) -NET_16933 = NAND ( new_n10841_, new_n10837_, new_n10836_, new_n10835_ ) -new_n10843_ = NAND ( new_n10802_, NET_1137 ) -new_n10844_ = NAND ( new_n10806_, new_n6326_ ) -new_n10845_ = OR ( new_n10809_, new_n10211_ ) -new_n10846_ = OR ( new_n10793_, new_n10216_ ) -new_n10847_ = NAND ( new_n10814_, new_n10223_ ) -new_n10848_ = OR ( new_n10795_, new_n10221_ ) -new_n10849_ = AND ( new_n10848_, new_n10847_, new_n10846_ ) -NET_16934 = NAND ( new_n10849_, new_n10845_, new_n10844_, new_n10843_ ) -new_n10851_ = NAND ( new_n10802_, NET_1138 ) -new_n10852_ = NAND ( new_n10806_, new_n6334_ ) -new_n10853_ = OR ( new_n10809_, new_n10232_ ) -new_n10854_ = OR ( new_n10793_, new_n10237_ ) -new_n10855_ = NAND ( new_n10814_, new_n10244_ ) -new_n10856_ = OR ( new_n10795_, new_n10242_ ) -new_n10857_ = AND ( new_n10856_, new_n10855_, new_n10854_ ) -NET_16935 = NAND ( new_n10857_, new_n10853_, new_n10852_, new_n10851_ ) -new_n10859_ = NAND ( new_n10802_, NET_1139 ) -new_n10860_ = NAND ( new_n10806_, new_n6342_ ) -new_n10861_ = OR ( new_n10809_, new_n10253_ ) -new_n10862_ = OR ( new_n10793_, new_n10259_ ) -new_n10863_ = NAND ( new_n10814_, new_n10266_ ) -new_n10864_ = OR ( new_n10795_, new_n10264_ ) -new_n10865_ = AND ( new_n10864_, new_n10863_, new_n10862_ ) -NET_16936 = NAND ( new_n10865_, new_n10861_, new_n10860_, new_n10859_ ) -new_n10867_ = NAND ( new_n10802_, NET_1140 ) -new_n10868_ = NAND ( new_n10806_, new_n6350_ ) -new_n10869_ = OR ( new_n10809_, new_n10275_ ) -new_n10870_ = OR ( new_n10793_, new_n10281_ ) -new_n10871_ = NAND ( new_n10814_, new_n10288_ ) -new_n10872_ = OR ( new_n10795_, new_n10286_ ) -new_n10873_ = AND ( new_n10872_, new_n10871_, new_n10870_ ) -NET_16937 = NAND ( new_n10873_, new_n10869_, new_n10868_, new_n10867_ ) -new_n10875_ = NAND ( new_n4563_, NET_1213, NET_1212, new_n4727_ ) -new_n10876_ = NOR ( new_n10099_, new_n7105_ ) -new_n10877_ = NAND ( new_n10876_, new_n10090_ ) -new_n10878_ = NAND ( new_n10877_, new_n10077_, new_n4749_ ) -new_n10879_ = NAND ( new_n10878_, new_n10103_ ) -new_n10880_ = NAND ( new_n10879_, new_n10875_ ) -new_n10881_ = NAND ( new_n4749_, NET_1074 ) -new_n10882_ = NAND ( new_n10881_, new_n10880_, new_n6540_ ) -new_n10883_ = NAND ( new_n10882_, new_n4728_ ) -new_n10884_ = NAND ( new_n10883_, new_n6656_ ) -new_n10885_ = NAND ( new_n10884_, NET_1141 ) -new_n10886_ = NAND ( new_n10877_, new_n10077_ ) -new_n10887_ = OR ( new_n10886_, new_n10875_ ) -new_n10888_ = OR ( new_n10880_, new_n4728_ ) -new_n10889_ = NAND ( new_n10888_, new_n10887_ ) -new_n10890_ = NAND ( new_n10889_, new_n6294_ ) -new_n10891_ = OR ( new_n10886_, new_n4749_ ) -new_n10892_ = OR ( new_n10891_, new_n10120_ ) -new_n10893_ = OR ( new_n10127_, new_n4728_ ) -new_n10894_ = NOR ( new_n10875_, new_n7027_ ) -new_n10895_ = NOR ( new_n4749_, new_n4561_ ) -new_n10896_ = OR ( new_n10895_, new_n10894_ ) -new_n10897_ = NAND ( new_n10896_, new_n10134_ ) -new_n10898_ = OR ( new_n10877_, new_n10132_ ) -new_n10899_ = AND ( new_n10898_, new_n10897_, new_n10893_ ) -NET_16938 = NAND ( new_n10899_, new_n10892_, new_n10890_, new_n10885_ ) -new_n10901_ = NAND ( new_n10884_, NET_1142 ) -new_n10902_ = NAND ( new_n10889_, new_n6302_ ) -new_n10903_ = OR ( new_n10891_, new_n10146_ ) -new_n10904_ = OR ( new_n10152_, new_n4728_ ) -new_n10905_ = NAND ( new_n10896_, new_n10160_ ) -new_n10906_ = OR ( new_n10877_, new_n10158_ ) -new_n10907_ = AND ( new_n10906_, new_n10905_, new_n10904_ ) -NET_16939 = NAND ( new_n10907_, new_n10903_, new_n10902_, new_n10901_ ) -new_n10909_ = NAND ( new_n10884_, NET_1143 ) -new_n10910_ = NAND ( new_n10889_, new_n6310_ ) -new_n10911_ = OR ( new_n10891_, new_n10169_ ) -new_n10912_ = OR ( new_n10174_, new_n4728_ ) -new_n10913_ = NAND ( new_n10896_, new_n10181_ ) -new_n10914_ = OR ( new_n10877_, new_n10179_ ) -new_n10915_ = AND ( new_n10914_, new_n10913_, new_n10912_ ) -NET_16940 = NAND ( new_n10915_, new_n10911_, new_n10910_, new_n10909_ ) -new_n10917_ = NAND ( new_n10884_, NET_1144 ) -new_n10918_ = NAND ( new_n10889_, new_n6318_ ) -new_n10919_ = OR ( new_n10891_, new_n10190_ ) -new_n10920_ = OR ( new_n10195_, new_n4728_ ) -new_n10921_ = NAND ( new_n10896_, new_n10202_ ) -new_n10922_ = OR ( new_n10877_, new_n10200_ ) -new_n10923_ = AND ( new_n10922_, new_n10921_, new_n10920_ ) -NET_16941 = NAND ( new_n10923_, new_n10919_, new_n10918_, new_n10917_ ) -new_n10925_ = NAND ( new_n10884_, NET_1145 ) -new_n10926_ = NAND ( new_n10889_, new_n6326_ ) -new_n10927_ = OR ( new_n10891_, new_n10211_ ) -new_n10928_ = OR ( new_n10216_, new_n4728_ ) -new_n10929_ = NAND ( new_n10896_, new_n10223_ ) -new_n10930_ = OR ( new_n10877_, new_n10221_ ) -new_n10931_ = AND ( new_n10930_, new_n10929_, new_n10928_ ) -NET_16942 = NAND ( new_n10931_, new_n10927_, new_n10926_, new_n10925_ ) -new_n10933_ = NAND ( new_n10884_, NET_1146 ) -new_n10934_ = NAND ( new_n10889_, new_n6334_ ) -new_n10935_ = OR ( new_n10891_, new_n10232_ ) -new_n10936_ = OR ( new_n10237_, new_n4728_ ) -new_n10937_ = NAND ( new_n10896_, new_n10244_ ) -new_n10938_ = OR ( new_n10877_, new_n10242_ ) -new_n10939_ = AND ( new_n10938_, new_n10937_, new_n10936_ ) -NET_16943 = NAND ( new_n10939_, new_n10935_, new_n10934_, new_n10933_ ) -new_n10941_ = NAND ( new_n10884_, NET_1147 ) -new_n10942_ = NAND ( new_n10889_, new_n6342_ ) -new_n10943_ = OR ( new_n10891_, new_n10253_ ) -new_n10944_ = OR ( new_n10259_, new_n4728_ ) -new_n10945_ = NAND ( new_n10896_, new_n10266_ ) -new_n10946_ = OR ( new_n10877_, new_n10264_ ) -new_n10947_ = AND ( new_n10946_, new_n10945_, new_n10944_ ) -NET_16944 = NAND ( new_n10947_, new_n10943_, new_n10942_, new_n10941_ ) -new_n10949_ = NAND ( new_n10884_, NET_1148 ) -new_n10950_ = NAND ( new_n10889_, new_n6350_ ) -new_n10951_ = OR ( new_n10891_, new_n10275_ ) -new_n10952_ = OR ( new_n10281_, new_n4728_ ) -new_n10953_ = NAND ( new_n10896_, new_n10288_ ) -new_n10954_ = OR ( new_n10877_, new_n10286_ ) -new_n10955_ = AND ( new_n10954_, new_n10953_, new_n10952_ ) -NET_16945 = NAND ( new_n10955_, new_n10951_, new_n10950_, new_n10949_ ) -new_n10957_ = NAND ( new_n4703_, NET_1212, new_n4727_ ) -new_n10958_ = NAND ( NET_1214, new_n4562_, NET_1212, new_n4727_ ) -new_n10959_ = NAND ( new_n10876_, new_n10295_ ) -new_n10960_ = NAND ( new_n10959_, new_n10077_, new_n4747_ ) -new_n10961_ = NAND ( new_n10960_, new_n10103_ ) -new_n10962_ = NAND ( new_n10961_, new_n10958_ ) -new_n10963_ = NAND ( new_n4747_, NET_1074 ) -new_n10964_ = NAND ( new_n10963_, new_n10962_, new_n6540_ ) -new_n10965_ = NAND ( new_n10964_, new_n10957_ ) -new_n10966_ = NAND ( new_n10965_, new_n6656_ ) -new_n10967_ = NAND ( new_n10966_, NET_1149 ) -new_n10968_ = OR ( new_n10960_, new_n10958_ ) -new_n10969_ = OR ( new_n10962_, new_n10957_ ) -new_n10970_ = NAND ( new_n10969_, new_n10968_ ) -new_n10971_ = NAND ( new_n10970_, new_n6294_ ) -new_n10972_ = NAND ( new_n10959_, new_n10077_ ) -new_n10973_ = OR ( new_n10972_, new_n4747_ ) -new_n10974_ = OR ( new_n10973_, new_n10120_ ) -new_n10975_ = OR ( new_n10957_, new_n10127_ ) -new_n10976_ = NOR ( new_n10958_, new_n7027_ ) -new_n10977_ = NOR ( new_n4747_, new_n4561_ ) -new_n10978_ = OR ( new_n10977_, new_n10976_ ) -new_n10979_ = NAND ( new_n10978_, new_n10134_ ) -new_n10980_ = OR ( new_n10959_, new_n10132_ ) -new_n10981_ = AND ( new_n10980_, new_n10979_, new_n10975_ ) -NET_16946 = NAND ( new_n10981_, new_n10974_, new_n10971_, new_n10967_ ) -new_n10983_ = NAND ( new_n10966_, NET_1150 ) -new_n10984_ = NAND ( new_n10970_, new_n6302_ ) -new_n10985_ = OR ( new_n10973_, new_n10146_ ) -new_n10986_ = OR ( new_n10957_, new_n10152_ ) -new_n10987_ = NAND ( new_n10978_, new_n10160_ ) -new_n10988_ = OR ( new_n10959_, new_n10158_ ) -new_n10989_ = AND ( new_n10988_, new_n10987_, new_n10986_ ) -NET_16947 = NAND ( new_n10989_, new_n10985_, new_n10984_, new_n10983_ ) -new_n10991_ = NAND ( new_n10966_, NET_1151 ) -new_n10992_ = NAND ( new_n10970_, new_n6310_ ) -new_n10993_ = OR ( new_n10973_, new_n10169_ ) -new_n10994_ = OR ( new_n10957_, new_n10174_ ) -new_n10995_ = NAND ( new_n10978_, new_n10181_ ) -new_n10996_ = OR ( new_n10959_, new_n10179_ ) -new_n10997_ = AND ( new_n10996_, new_n10995_, new_n10994_ ) -NET_16948 = NAND ( new_n10997_, new_n10993_, new_n10992_, new_n10991_ ) -new_n10999_ = NAND ( new_n10966_, NET_1152 ) -new_n11000_ = NAND ( new_n10970_, new_n6318_ ) -new_n11001_ = OR ( new_n10973_, new_n10190_ ) -new_n11002_ = OR ( new_n10957_, new_n10195_ ) -new_n11003_ = NAND ( new_n10978_, new_n10202_ ) -new_n11004_ = OR ( new_n10959_, new_n10200_ ) -new_n11005_ = AND ( new_n11004_, new_n11003_, new_n11002_ ) -NET_16949 = NAND ( new_n11005_, new_n11001_, new_n11000_, new_n10999_ ) -new_n11007_ = NAND ( new_n10966_, NET_1153 ) -new_n11008_ = NAND ( new_n10970_, new_n6326_ ) -new_n11009_ = OR ( new_n10973_, new_n10211_ ) -new_n11010_ = OR ( new_n10957_, new_n10216_ ) -new_n11011_ = NAND ( new_n10978_, new_n10223_ ) -new_n11012_ = OR ( new_n10959_, new_n10221_ ) -new_n11013_ = AND ( new_n11012_, new_n11011_, new_n11010_ ) -NET_16950 = NAND ( new_n11013_, new_n11009_, new_n11008_, new_n11007_ ) -new_n11015_ = NAND ( new_n10966_, NET_1154 ) -new_n11016_ = NAND ( new_n10970_, new_n6334_ ) -new_n11017_ = OR ( new_n10973_, new_n10232_ ) -new_n11018_ = OR ( new_n10957_, new_n10237_ ) -new_n11019_ = NAND ( new_n10978_, new_n10244_ ) -new_n11020_ = OR ( new_n10959_, new_n10242_ ) -new_n11021_ = AND ( new_n11020_, new_n11019_, new_n11018_ ) -NET_16951 = NAND ( new_n11021_, new_n11017_, new_n11016_, new_n11015_ ) -new_n11023_ = NAND ( new_n10966_, NET_1155 ) -new_n11024_ = NAND ( new_n10970_, new_n6342_ ) -new_n11025_ = OR ( new_n10973_, new_n10253_ ) -new_n11026_ = OR ( new_n10957_, new_n10259_ ) -new_n11027_ = NAND ( new_n10978_, new_n10266_ ) -new_n11028_ = OR ( new_n10959_, new_n10264_ ) -new_n11029_ = AND ( new_n11028_, new_n11027_, new_n11026_ ) -NET_16952 = NAND ( new_n11029_, new_n11025_, new_n11024_, new_n11023_ ) -new_n11031_ = NAND ( new_n10966_, NET_1156 ) -new_n11032_ = NAND ( new_n10970_, new_n6350_ ) -new_n11033_ = OR ( new_n10973_, new_n10275_ ) -new_n11034_ = OR ( new_n10957_, new_n10281_ ) -new_n11035_ = NAND ( new_n10978_, new_n10288_ ) -new_n11036_ = OR ( new_n10959_, new_n10286_ ) -new_n11037_ = AND ( new_n11036_, new_n11035_, new_n11034_ ) -NET_16953 = NAND ( new_n11037_, new_n11033_, new_n11032_, new_n11031_ ) -new_n11039_ = NAND ( new_n4702_, NET_1212, new_n4727_ ) -new_n11040_ = NAND ( new_n4563_, new_n4562_, NET_1212, new_n4727_ ) -new_n11041_ = NOR ( new_n10099_, new_n10091_ ) -new_n11042_ = NAND ( new_n11041_, new_n10090_ ) -new_n11043_ = NAND ( new_n11042_, new_n10077_, new_n4744_ ) -new_n11044_ = NAND ( new_n11043_, new_n10103_ ) -new_n11045_ = NAND ( new_n11044_, new_n11040_ ) -new_n11046_ = NAND ( new_n4744_, NET_1074 ) -new_n11047_ = NAND ( new_n11046_, new_n11045_, new_n6540_ ) -new_n11048_ = NAND ( new_n11047_, new_n11039_ ) -new_n11049_ = NAND ( new_n11048_, new_n6656_ ) -new_n11050_ = NAND ( new_n11049_, NET_1157 ) -new_n11051_ = NAND ( new_n11042_, new_n10077_ ) -new_n11052_ = OR ( new_n11051_, new_n11040_ ) -new_n11053_ = OR ( new_n11045_, new_n11039_ ) -new_n11054_ = NAND ( new_n11053_, new_n11052_ ) -new_n11055_ = NAND ( new_n11054_, new_n6294_ ) -new_n11056_ = OR ( new_n11051_, new_n4744_ ) -new_n11057_ = OR ( new_n11056_, new_n10120_ ) -new_n11058_ = OR ( new_n11039_, new_n10127_ ) -new_n11059_ = NOR ( new_n11040_, new_n7027_ ) -new_n11060_ = NOR ( new_n4744_, new_n4561_ ) -new_n11061_ = OR ( new_n11060_, new_n11059_ ) -new_n11062_ = NAND ( new_n11061_, new_n10134_ ) -new_n11063_ = OR ( new_n11042_, new_n10132_ ) -new_n11064_ = AND ( new_n11063_, new_n11062_, new_n11058_ ) -NET_16954 = NAND ( new_n11064_, new_n11057_, new_n11055_, new_n11050_ ) -new_n11066_ = NAND ( new_n11049_, NET_1158 ) -new_n11067_ = NAND ( new_n11054_, new_n6302_ ) -new_n11068_ = OR ( new_n11056_, new_n10146_ ) -new_n11069_ = OR ( new_n11039_, new_n10152_ ) -new_n11070_ = NAND ( new_n11061_, new_n10160_ ) -new_n11071_ = OR ( new_n11042_, new_n10158_ ) -new_n11072_ = AND ( new_n11071_, new_n11070_, new_n11069_ ) -NET_16955 = NAND ( new_n11072_, new_n11068_, new_n11067_, new_n11066_ ) -new_n11074_ = NAND ( new_n11049_, NET_1159 ) -new_n11075_ = NAND ( new_n11054_, new_n6310_ ) -new_n11076_ = OR ( new_n11056_, new_n10169_ ) -new_n11077_ = OR ( new_n11039_, new_n10174_ ) -new_n11078_ = NAND ( new_n11061_, new_n10181_ ) -new_n11079_ = OR ( new_n11042_, new_n10179_ ) -new_n11080_ = AND ( new_n11079_, new_n11078_, new_n11077_ ) -NET_16956 = NAND ( new_n11080_, new_n11076_, new_n11075_, new_n11074_ ) -new_n11082_ = NAND ( new_n11049_, NET_1160 ) -new_n11083_ = NAND ( new_n11054_, new_n6318_ ) -new_n11084_ = OR ( new_n11056_, new_n10190_ ) -new_n11085_ = OR ( new_n11039_, new_n10195_ ) -new_n11086_ = NAND ( new_n11061_, new_n10202_ ) -new_n11087_ = OR ( new_n11042_, new_n10200_ ) -new_n11088_ = AND ( new_n11087_, new_n11086_, new_n11085_ ) -NET_16957 = NAND ( new_n11088_, new_n11084_, new_n11083_, new_n11082_ ) -new_n11090_ = NAND ( new_n11049_, NET_1161 ) -new_n11091_ = NAND ( new_n11054_, new_n6326_ ) -new_n11092_ = OR ( new_n11056_, new_n10211_ ) -new_n11093_ = OR ( new_n11039_, new_n10216_ ) -new_n11094_ = NAND ( new_n11061_, new_n10223_ ) -new_n11095_ = OR ( new_n11042_, new_n10221_ ) -new_n11096_ = AND ( new_n11095_, new_n11094_, new_n11093_ ) -NET_16958 = NAND ( new_n11096_, new_n11092_, new_n11091_, new_n11090_ ) -new_n11098_ = NAND ( new_n11049_, NET_1162 ) -new_n11099_ = NAND ( new_n11054_, new_n6334_ ) -new_n11100_ = OR ( new_n11056_, new_n10232_ ) -new_n11101_ = OR ( new_n11039_, new_n10237_ ) -new_n11102_ = NAND ( new_n11061_, new_n10244_ ) -new_n11103_ = OR ( new_n11042_, new_n10242_ ) -new_n11104_ = AND ( new_n11103_, new_n11102_, new_n11101_ ) -NET_16959 = NAND ( new_n11104_, new_n11100_, new_n11099_, new_n11098_ ) -new_n11106_ = NAND ( new_n11049_, NET_1163 ) -new_n11107_ = NAND ( new_n11054_, new_n6342_ ) -new_n11108_ = OR ( new_n11056_, new_n10253_ ) -new_n11109_ = OR ( new_n11039_, new_n10259_ ) -new_n11110_ = NAND ( new_n11061_, new_n10266_ ) -new_n11111_ = OR ( new_n11042_, new_n10264_ ) -new_n11112_ = AND ( new_n11111_, new_n11110_, new_n11109_ ) -NET_16960 = NAND ( new_n11112_, new_n11108_, new_n11107_, new_n11106_ ) -new_n11114_ = NAND ( new_n11049_, NET_1164 ) -new_n11115_ = NAND ( new_n11054_, new_n6350_ ) -new_n11116_ = OR ( new_n11056_, new_n10275_ ) -new_n11117_ = OR ( new_n11039_, new_n10281_ ) -new_n11118_ = NAND ( new_n11061_, new_n10288_ ) -new_n11119_ = OR ( new_n11042_, new_n10286_ ) -new_n11120_ = AND ( new_n11119_, new_n11118_, new_n11117_ ) -NET_16961 = NAND ( new_n11120_, new_n11116_, new_n11115_, new_n11114_ ) -new_n11122_ = NAND ( new_n10459_, NET_1212, new_n4727_ ) -new_n11123_ = NAND ( new_n4564_, new_n4568_, new_n4727_ ) -new_n11124_ = NAND ( new_n11041_, new_n10295_ ) -new_n11125_ = NAND ( new_n11124_, new_n10077_, new_n4762_ ) -new_n11126_ = NAND ( new_n11125_, new_n10103_ ) -new_n11127_ = NAND ( new_n11126_, new_n11123_ ) -new_n11128_ = NAND ( new_n4762_, NET_1074 ) -new_n11129_ = NAND ( new_n11128_, new_n11127_, new_n6540_ ) -new_n11130_ = NAND ( new_n11129_, new_n11122_ ) -new_n11131_ = NAND ( new_n11130_, new_n6656_ ) -new_n11132_ = NAND ( new_n11131_, NET_1165 ) -new_n11133_ = OR ( new_n11125_, new_n11123_ ) -new_n11134_ = OR ( new_n11127_, new_n11122_ ) -new_n11135_ = NAND ( new_n11134_, new_n11133_ ) -new_n11136_ = NAND ( new_n11135_, new_n6294_ ) -new_n11137_ = NAND ( new_n11124_, new_n10077_ ) -new_n11138_ = OR ( new_n11137_, new_n4762_ ) -new_n11139_ = OR ( new_n11138_, new_n10120_ ) -new_n11140_ = OR ( new_n11122_, new_n10127_ ) -new_n11141_ = NOR ( new_n11123_, new_n7027_ ) -new_n11142_ = NOR ( new_n4762_, new_n4561_ ) -new_n11143_ = OR ( new_n11142_, new_n11141_ ) -new_n11144_ = NAND ( new_n11143_, new_n10134_ ) -new_n11145_ = OR ( new_n11124_, new_n10132_ ) -new_n11146_ = AND ( new_n11145_, new_n11144_, new_n11140_ ) -NET_16962 = NAND ( new_n11146_, new_n11139_, new_n11136_, new_n11132_ ) -new_n11148_ = NAND ( new_n11131_, NET_1166 ) -new_n11149_ = NAND ( new_n11135_, new_n6302_ ) -new_n11150_ = OR ( new_n11138_, new_n10146_ ) -new_n11151_ = OR ( new_n11122_, new_n10152_ ) -new_n11152_ = NAND ( new_n11143_, new_n10160_ ) -new_n11153_ = OR ( new_n11124_, new_n10158_ ) -new_n11154_ = AND ( new_n11153_, new_n11152_, new_n11151_ ) -NET_16963 = NAND ( new_n11154_, new_n11150_, new_n11149_, new_n11148_ ) -new_n11156_ = NAND ( new_n11131_, NET_1167 ) -new_n11157_ = NAND ( new_n11135_, new_n6310_ ) -new_n11158_ = OR ( new_n11138_, new_n10169_ ) -new_n11159_ = OR ( new_n11122_, new_n10174_ ) -new_n11160_ = NAND ( new_n11143_, new_n10181_ ) -new_n11161_ = OR ( new_n11124_, new_n10179_ ) -new_n11162_ = AND ( new_n11161_, new_n11160_, new_n11159_ ) -NET_16964 = NAND ( new_n11162_, new_n11158_, new_n11157_, new_n11156_ ) -new_n11164_ = NAND ( new_n11131_, NET_1168 ) -new_n11165_ = NAND ( new_n11135_, new_n6318_ ) -new_n11166_ = OR ( new_n11138_, new_n10190_ ) -new_n11167_ = OR ( new_n11122_, new_n10195_ ) -new_n11168_ = NAND ( new_n11143_, new_n10202_ ) -new_n11169_ = OR ( new_n11124_, new_n10200_ ) -new_n11170_ = AND ( new_n11169_, new_n11168_, new_n11167_ ) -NET_16965 = NAND ( new_n11170_, new_n11166_, new_n11165_, new_n11164_ ) -new_n11172_ = NAND ( new_n11131_, NET_1169 ) -new_n11173_ = NAND ( new_n11135_, new_n6326_ ) -new_n11174_ = OR ( new_n11138_, new_n10211_ ) -new_n11175_ = OR ( new_n11122_, new_n10216_ ) -new_n11176_ = NAND ( new_n11143_, new_n10223_ ) -new_n11177_ = OR ( new_n11124_, new_n10221_ ) -new_n11178_ = AND ( new_n11177_, new_n11176_, new_n11175_ ) -NET_16966 = NAND ( new_n11178_, new_n11174_, new_n11173_, new_n11172_ ) -new_n11180_ = NAND ( new_n11131_, NET_1170 ) -new_n11181_ = NAND ( new_n11135_, new_n6334_ ) -new_n11182_ = OR ( new_n11138_, new_n10232_ ) -new_n11183_ = OR ( new_n11122_, new_n10237_ ) -new_n11184_ = NAND ( new_n11143_, new_n10244_ ) -new_n11185_ = OR ( new_n11124_, new_n10242_ ) -new_n11186_ = AND ( new_n11185_, new_n11184_, new_n11183_ ) -NET_16967 = NAND ( new_n11186_, new_n11182_, new_n11181_, new_n11180_ ) -new_n11188_ = NAND ( new_n11131_, NET_1171 ) -new_n11189_ = NAND ( new_n11135_, new_n6342_ ) -new_n11190_ = OR ( new_n11138_, new_n10253_ ) -new_n11191_ = OR ( new_n11122_, new_n10259_ ) -new_n11192_ = NAND ( new_n11143_, new_n10266_ ) -new_n11193_ = OR ( new_n11124_, new_n10264_ ) -new_n11194_ = AND ( new_n11193_, new_n11192_, new_n11191_ ) -NET_16968 = NAND ( new_n11194_, new_n11190_, new_n11189_, new_n11188_ ) -new_n11196_ = NAND ( new_n11131_, NET_1172 ) -new_n11197_ = NAND ( new_n11135_, new_n6350_ ) -new_n11198_ = OR ( new_n11138_, new_n10275_ ) -new_n11199_ = OR ( new_n11122_, new_n10281_ ) -new_n11200_ = NAND ( new_n11143_, new_n10288_ ) -new_n11201_ = OR ( new_n11124_, new_n10286_ ) -new_n11202_ = AND ( new_n11201_, new_n11200_, new_n11199_ ) -NET_16969 = NAND ( new_n11202_, new_n11198_, new_n11197_, new_n11196_ ) -new_n11204_ = OR ( NET_1212, NET_1211 ) -new_n11205_ = NOR ( new_n11204_, new_n10073_ ) -new_n11206_ = NOT ( new_n11205_ ) -new_n11207_ = NAND ( new_n4563_, NET_1213, new_n4568_, new_n4727_ ) -new_n11208_ = NAND ( new_n10876_, new_n10547_ ) -new_n11209_ = NAND ( new_n11208_, new_n10077_, new_n4760_ ) -new_n11210_ = NAND ( new_n11209_, new_n10103_ ) -new_n11211_ = NAND ( new_n11210_, new_n11207_ ) -new_n11212_ = NAND ( new_n4760_, NET_1074 ) -new_n11213_ = NAND ( new_n11212_, new_n11211_, new_n6540_ ) -new_n11214_ = NAND ( new_n11213_, new_n11206_ ) -new_n11215_ = NAND ( new_n11214_, new_n6656_ ) -new_n11216_ = NAND ( new_n11215_, NET_1173 ) -new_n11217_ = NAND ( new_n11208_, new_n10077_ ) -new_n11218_ = OR ( new_n11217_, new_n11207_ ) -new_n11219_ = OR ( new_n11211_, new_n11206_ ) -new_n11220_ = NAND ( new_n11219_, new_n11218_ ) -new_n11221_ = NAND ( new_n11220_, new_n6294_ ) -new_n11222_ = OR ( new_n11217_, new_n4760_ ) -new_n11223_ = OR ( new_n11222_, new_n10120_ ) -new_n11224_ = OR ( new_n11206_, new_n10127_ ) -new_n11225_ = NOR ( new_n11207_, new_n7027_ ) -new_n11226_ = NOR ( new_n4760_, new_n4561_ ) -new_n11227_ = OR ( new_n11226_, new_n11225_ ) -new_n11228_ = NAND ( new_n11227_, new_n10134_ ) -new_n11229_ = OR ( new_n11208_, new_n10132_ ) -new_n11230_ = AND ( new_n11229_, new_n11228_, new_n11224_ ) -NET_16970 = NAND ( new_n11230_, new_n11223_, new_n11221_, new_n11216_ ) -new_n11232_ = NAND ( new_n11215_, NET_1174 ) -new_n11233_ = NAND ( new_n11220_, new_n6302_ ) -new_n11234_ = OR ( new_n11222_, new_n10146_ ) -new_n11235_ = NAND ( new_n11205_, new_n10151_ ) -new_n11236_ = NAND ( new_n11227_, new_n10160_ ) -new_n11237_ = OR ( new_n11208_, new_n10158_ ) -new_n11238_ = AND ( new_n11237_, new_n11236_, new_n11235_ ) -NET_16971 = NAND ( new_n11238_, new_n11234_, new_n11233_, new_n11232_ ) -new_n11240_ = NAND ( new_n11215_, NET_1175 ) -new_n11241_ = NAND ( new_n11220_, new_n6310_ ) -new_n11242_ = OR ( new_n11222_, new_n10169_ ) -new_n11243_ = OR ( new_n11206_, new_n10174_ ) -new_n11244_ = NAND ( new_n11227_, new_n10181_ ) -new_n11245_ = OR ( new_n11208_, new_n10179_ ) -new_n11246_ = AND ( new_n11245_, new_n11244_, new_n11243_ ) -NET_16972 = NAND ( new_n11246_, new_n11242_, new_n11241_, new_n11240_ ) -new_n11248_ = NAND ( new_n11215_, NET_1176 ) -new_n11249_ = NAND ( new_n11220_, new_n6318_ ) -new_n11250_ = OR ( new_n11222_, new_n10190_ ) -new_n11251_ = OR ( new_n11206_, new_n10195_ ) -new_n11252_ = NAND ( new_n11227_, new_n10202_ ) -new_n11253_ = OR ( new_n11208_, new_n10200_ ) -new_n11254_ = AND ( new_n11253_, new_n11252_, new_n11251_ ) -NET_16973 = NAND ( new_n11254_, new_n11250_, new_n11249_, new_n11248_ ) -new_n11256_ = NAND ( new_n11215_, NET_1177 ) -new_n11257_ = NAND ( new_n11220_, new_n6326_ ) -new_n11258_ = OR ( new_n11222_, new_n10211_ ) -new_n11259_ = OR ( new_n11206_, new_n10216_ ) -new_n11260_ = NAND ( new_n11227_, new_n10223_ ) -new_n11261_ = OR ( new_n11208_, new_n10221_ ) -new_n11262_ = AND ( new_n11261_, new_n11260_, new_n11259_ ) -NET_16974 = NAND ( new_n11262_, new_n11258_, new_n11257_, new_n11256_ ) -new_n11264_ = NAND ( new_n11215_, NET_1178 ) -new_n11265_ = NAND ( new_n11220_, new_n6334_ ) -new_n11266_ = OR ( new_n11222_, new_n10232_ ) -new_n11267_ = OR ( new_n11206_, new_n10237_ ) -new_n11268_ = NAND ( new_n11227_, new_n10244_ ) -new_n11269_ = OR ( new_n11208_, new_n10242_ ) -new_n11270_ = AND ( new_n11269_, new_n11268_, new_n11267_ ) -NET_16975 = NAND ( new_n11270_, new_n11266_, new_n11265_, new_n11264_ ) -new_n11272_ = NAND ( new_n11215_, NET_1179 ) -new_n11273_ = NAND ( new_n11220_, new_n6342_ ) -new_n11274_ = OR ( new_n11222_, new_n10253_ ) -new_n11275_ = NAND ( new_n11205_, new_n10258_ ) -new_n11276_ = NAND ( new_n11227_, new_n10266_ ) -new_n11277_ = OR ( new_n11208_, new_n10264_ ) -new_n11278_ = AND ( new_n11277_, new_n11276_, new_n11275_ ) -NET_16976 = NAND ( new_n11278_, new_n11274_, new_n11273_, new_n11272_ ) -new_n11280_ = NAND ( new_n11215_, NET_1180 ) -new_n11281_ = NAND ( new_n11220_, new_n6350_ ) -new_n11282_ = OR ( new_n11222_, new_n10275_ ) -new_n11283_ = NAND ( new_n11205_, new_n10280_ ) -new_n11284_ = NAND ( new_n11227_, new_n10288_ ) -new_n11285_ = OR ( new_n11208_, new_n10286_ ) -new_n11286_ = AND ( new_n11285_, new_n11284_, new_n11283_ ) -NET_16977 = NAND ( new_n11286_, new_n11282_, new_n11281_, new_n11280_ ) -new_n11288_ = NAND ( new_n4703_, new_n4568_, new_n4727_ ) -new_n11289_ = NAND ( NET_1214, new_n4562_, new_n4568_, new_n4727_ ) -new_n11290_ = NAND ( new_n10876_, new_n10630_ ) -new_n11291_ = NAND ( new_n11290_, new_n10077_, new_n4758_ ) -new_n11292_ = NAND ( new_n11291_, new_n10103_ ) -new_n11293_ = NAND ( new_n11292_, new_n11289_ ) -new_n11294_ = NAND ( new_n4758_, NET_1074 ) -new_n11295_ = NAND ( new_n11294_, new_n11293_, new_n6540_ ) -new_n11296_ = NAND ( new_n11295_, new_n11288_ ) -new_n11297_ = NAND ( new_n11296_, new_n6656_ ) -new_n11298_ = NAND ( new_n11297_, NET_1181 ) -new_n11299_ = OR ( new_n11291_, new_n11289_ ) -new_n11300_ = OR ( new_n11293_, new_n11288_ ) -new_n11301_ = NAND ( new_n11300_, new_n11299_ ) -new_n11302_ = NAND ( new_n11301_, new_n6294_ ) -new_n11303_ = NAND ( new_n11290_, new_n10077_ ) -new_n11304_ = OR ( new_n11303_, new_n4758_ ) -new_n11305_ = OR ( new_n11304_, new_n10120_ ) -new_n11306_ = OR ( new_n11288_, new_n10127_ ) -new_n11307_ = NOR ( new_n11289_, new_n7027_ ) -new_n11308_ = NOR ( new_n4758_, new_n4561_ ) -new_n11309_ = OR ( new_n11308_, new_n11307_ ) -new_n11310_ = NAND ( new_n11309_, new_n10134_ ) -new_n11311_ = OR ( new_n11290_, new_n10132_ ) -new_n11312_ = AND ( new_n11311_, new_n11310_, new_n11306_ ) -NET_16978 = NAND ( new_n11312_, new_n11305_, new_n11302_, new_n11298_ ) -new_n11314_ = NAND ( new_n11297_, NET_1182 ) -new_n11315_ = NAND ( new_n11301_, new_n6302_ ) -new_n11316_ = OR ( new_n11304_, new_n10146_ ) -new_n11317_ = OR ( new_n11288_, new_n10152_ ) -new_n11318_ = NAND ( new_n11309_, new_n10160_ ) -new_n11319_ = OR ( new_n11290_, new_n10158_ ) -new_n11320_ = AND ( new_n11319_, new_n11318_, new_n11317_ ) -NET_16979 = NAND ( new_n11320_, new_n11316_, new_n11315_, new_n11314_ ) -new_n11322_ = NAND ( new_n11297_, NET_1183 ) -new_n11323_ = NAND ( new_n11301_, new_n6310_ ) -new_n11324_ = OR ( new_n11304_, new_n10169_ ) -new_n11325_ = OR ( new_n11288_, new_n10174_ ) -new_n11326_ = NAND ( new_n11309_, new_n10181_ ) -new_n11327_ = OR ( new_n11290_, new_n10179_ ) -new_n11328_ = AND ( new_n11327_, new_n11326_, new_n11325_ ) -NET_16980 = NAND ( new_n11328_, new_n11324_, new_n11323_, new_n11322_ ) -new_n11330_ = NAND ( new_n11297_, NET_1184 ) -new_n11331_ = NAND ( new_n11301_, new_n6318_ ) -new_n11332_ = OR ( new_n11304_, new_n10190_ ) -new_n11333_ = OR ( new_n11288_, new_n10195_ ) -new_n11334_ = NAND ( new_n11309_, new_n10202_ ) -new_n11335_ = OR ( new_n11290_, new_n10200_ ) -new_n11336_ = AND ( new_n11335_, new_n11334_, new_n11333_ ) -NET_16981 = NAND ( new_n11336_, new_n11332_, new_n11331_, new_n11330_ ) -new_n11338_ = NAND ( new_n11297_, NET_1185 ) -new_n11339_ = NAND ( new_n11301_, new_n6326_ ) -new_n11340_ = OR ( new_n11304_, new_n10211_ ) -new_n11341_ = OR ( new_n11288_, new_n10216_ ) -new_n11342_ = NAND ( new_n11309_, new_n10223_ ) -new_n11343_ = OR ( new_n11290_, new_n10221_ ) -new_n11344_ = AND ( new_n11343_, new_n11342_, new_n11341_ ) -NET_16982 = NAND ( new_n11344_, new_n11340_, new_n11339_, new_n11338_ ) -new_n11346_ = NAND ( new_n11297_, NET_1186 ) -new_n11347_ = NAND ( new_n11301_, new_n6334_ ) -new_n11348_ = OR ( new_n11304_, new_n10232_ ) -new_n11349_ = OR ( new_n11288_, new_n10237_ ) -new_n11350_ = NAND ( new_n11309_, new_n10244_ ) -new_n11351_ = OR ( new_n11290_, new_n10242_ ) -new_n11352_ = AND ( new_n11351_, new_n11350_, new_n11349_ ) -NET_16983 = NAND ( new_n11352_, new_n11348_, new_n11347_, new_n11346_ ) -new_n11354_ = NAND ( new_n11297_, NET_1187 ) -new_n11355_ = NAND ( new_n11301_, new_n6342_ ) -new_n11356_ = OR ( new_n11304_, new_n10253_ ) -new_n11357_ = OR ( new_n11288_, new_n10259_ ) -new_n11358_ = NAND ( new_n11309_, new_n10266_ ) -new_n11359_ = OR ( new_n11290_, new_n10264_ ) -new_n11360_ = AND ( new_n11359_, new_n11358_, new_n11357_ ) -NET_16984 = NAND ( new_n11360_, new_n11356_, new_n11355_, new_n11354_ ) -new_n11362_ = NAND ( new_n11297_, NET_1188 ) -new_n11363_ = NAND ( new_n11301_, new_n6350_ ) -new_n11364_ = OR ( new_n11304_, new_n10275_ ) -new_n11365_ = OR ( new_n11288_, new_n10281_ ) -new_n11366_ = NAND ( new_n11309_, new_n10288_ ) -new_n11367_ = OR ( new_n11290_, new_n10286_ ) -new_n11368_ = AND ( new_n11367_, new_n11366_, new_n11365_ ) -NET_16985 = NAND ( new_n11368_, new_n11364_, new_n11363_, new_n11362_ ) -new_n11370_ = NAND ( new_n4702_, new_n4568_, new_n4727_ ) -new_n11371_ = NAND ( new_n4563_, new_n4562_, new_n4568_, new_n4727_ ) -new_n11372_ = NAND ( new_n11041_, new_n10547_ ) -new_n11373_ = NAND ( new_n11372_, new_n10077_, new_n4756_ ) -new_n11374_ = NAND ( new_n11373_, new_n10103_ ) -new_n11375_ = NAND ( new_n11374_, new_n11371_ ) -new_n11376_ = NAND ( new_n4756_, NET_1074 ) -new_n11377_ = NAND ( new_n11376_, new_n11375_, new_n6540_ ) -new_n11378_ = NAND ( new_n11377_, new_n11370_ ) -new_n11379_ = NAND ( new_n11378_, new_n6656_ ) -new_n11380_ = NAND ( new_n11379_, NET_1189 ) -new_n11381_ = OR ( new_n11373_, new_n11371_ ) -new_n11382_ = OR ( new_n11375_, new_n11370_ ) -new_n11383_ = NAND ( new_n11382_, new_n11381_ ) -new_n11384_ = NAND ( new_n11383_, new_n6294_ ) -new_n11385_ = NOT ( new_n4756_ ) -new_n11386_ = NAND ( new_n11372_, new_n10077_, new_n11385_ ) -new_n11387_ = OR ( new_n11386_, new_n10120_ ) -new_n11388_ = OR ( new_n11370_, new_n10127_ ) -new_n11389_ = OR ( new_n11371_, new_n7027_ ) -new_n11390_ = OR ( new_n4756_, new_n4561_ ) -new_n11391_ = NAND ( new_n11390_, new_n11389_ ) -new_n11392_ = NAND ( new_n11391_, new_n10134_ ) -new_n11393_ = OR ( new_n11372_, new_n10132_ ) -new_n11394_ = AND ( new_n11393_, new_n11392_, new_n11388_ ) -NET_16986 = NAND ( new_n11394_, new_n11387_, new_n11384_, new_n11380_ ) -new_n11396_ = NAND ( new_n11379_, NET_1190 ) -new_n11397_ = NAND ( new_n11383_, new_n6302_ ) -new_n11398_ = OR ( new_n11386_, new_n10146_ ) -new_n11399_ = OR ( new_n11370_, new_n10152_ ) -new_n11400_ = NAND ( new_n11391_, new_n10160_ ) -new_n11401_ = OR ( new_n11372_, new_n10158_ ) -new_n11402_ = AND ( new_n11401_, new_n11400_, new_n11399_ ) -NET_16987 = NAND ( new_n11402_, new_n11398_, new_n11397_, new_n11396_ ) -new_n11404_ = NAND ( new_n11379_, NET_1191 ) -new_n11405_ = NAND ( new_n11383_, new_n6310_ ) -new_n11406_ = OR ( new_n11386_, new_n10169_ ) -new_n11407_ = OR ( new_n11370_, new_n10174_ ) -new_n11408_ = NAND ( new_n11391_, new_n10181_ ) -new_n11409_ = OR ( new_n11372_, new_n10179_ ) -new_n11410_ = AND ( new_n11409_, new_n11408_, new_n11407_ ) -NET_16988 = NAND ( new_n11410_, new_n11406_, new_n11405_, new_n11404_ ) -new_n11412_ = NAND ( new_n11379_, NET_1192 ) -new_n11413_ = NAND ( new_n11383_, new_n6318_ ) -new_n11414_ = OR ( new_n11386_, new_n10190_ ) -new_n11415_ = OR ( new_n11370_, new_n10195_ ) -new_n11416_ = NAND ( new_n11391_, new_n10202_ ) -new_n11417_ = OR ( new_n11372_, new_n10200_ ) -new_n11418_ = AND ( new_n11417_, new_n11416_, new_n11415_ ) -NET_16989 = NAND ( new_n11418_, new_n11414_, new_n11413_, new_n11412_ ) -new_n11420_ = NAND ( new_n11379_, NET_1193 ) -new_n11421_ = NAND ( new_n11383_, new_n6326_ ) -new_n11422_ = OR ( new_n11386_, new_n10211_ ) -new_n11423_ = OR ( new_n11370_, new_n10216_ ) -new_n11424_ = NAND ( new_n11391_, new_n10223_ ) -new_n11425_ = OR ( new_n11372_, new_n10221_ ) -new_n11426_ = AND ( new_n11425_, new_n11424_, new_n11423_ ) -NET_16990 = NAND ( new_n11426_, new_n11422_, new_n11421_, new_n11420_ ) -new_n11428_ = NAND ( new_n11379_, NET_1194 ) -new_n11429_ = NAND ( new_n11383_, new_n6334_ ) -new_n11430_ = OR ( new_n11386_, new_n10232_ ) -new_n11431_ = OR ( new_n11370_, new_n10237_ ) -new_n11432_ = NAND ( new_n11391_, new_n10244_ ) -new_n11433_ = OR ( new_n11372_, new_n10242_ ) -new_n11434_ = AND ( new_n11433_, new_n11432_, new_n11431_ ) -NET_16991 = NAND ( new_n11434_, new_n11430_, new_n11429_, new_n11428_ ) -new_n11436_ = NAND ( new_n11379_, NET_1195 ) -new_n11437_ = NAND ( new_n11383_, new_n6342_ ) -new_n11438_ = OR ( new_n11386_, new_n10253_ ) -new_n11439_ = OR ( new_n11370_, new_n10259_ ) -new_n11440_ = NAND ( new_n11391_, new_n10266_ ) -new_n11441_ = OR ( new_n11372_, new_n10264_ ) -new_n11442_ = AND ( new_n11441_, new_n11440_, new_n11439_ ) -NET_16992 = NAND ( new_n11442_, new_n11438_, new_n11437_, new_n11436_ ) -new_n11444_ = NAND ( new_n11379_, NET_1196 ) -new_n11445_ = NAND ( new_n11383_, new_n6350_ ) -new_n11446_ = OR ( new_n11386_, new_n10275_ ) -new_n11447_ = OR ( new_n11370_, new_n10281_ ) -new_n11448_ = NAND ( new_n11391_, new_n10288_ ) -new_n11449_ = OR ( new_n11372_, new_n10286_ ) -new_n11450_ = AND ( new_n11449_, new_n11448_, new_n11447_ ) -NET_16993 = NAND ( new_n11450_, new_n11446_, new_n11445_, new_n11444_ ) -new_n11452_ = OR ( new_n11204_, new_n10460_ ) -new_n11453_ = NAND ( new_n4564_, NET_1212, NET_1211 ) -new_n11454_ = NAND ( new_n11041_, new_n10630_ ) -new_n11455_ = NAND ( new_n11454_, new_n10077_, new_n4771_ ) -new_n11456_ = NAND ( new_n11455_, new_n10103_ ) -new_n11457_ = NAND ( new_n11456_, new_n11453_ ) -new_n11458_ = NAND ( new_n4771_, NET_1074 ) -new_n11459_ = NAND ( new_n11458_, new_n11457_, new_n6540_ ) -new_n11460_ = NAND ( new_n11459_, new_n11452_ ) -new_n11461_ = NAND ( new_n11460_, new_n6656_ ) -new_n11462_ = NAND ( new_n11461_, NET_1197 ) -new_n11463_ = OR ( new_n11455_, new_n11453_ ) -new_n11464_ = OR ( new_n11457_, new_n11452_ ) -new_n11465_ = NAND ( new_n11464_, new_n11463_ ) -new_n11466_ = NAND ( new_n11465_, new_n6294_ ) -new_n11467_ = NOT ( new_n4771_ ) -new_n11468_ = NAND ( new_n11454_, new_n10077_, new_n11467_ ) -new_n11469_ = OR ( new_n11468_, new_n10120_ ) -new_n11470_ = OR ( new_n11452_, new_n10127_ ) -new_n11471_ = OR ( new_n11453_, new_n7027_ ) -new_n11472_ = OR ( new_n4771_, new_n4561_ ) -new_n11473_ = NAND ( new_n11472_, new_n11471_ ) -new_n11474_ = NAND ( new_n11473_, new_n10134_ ) -new_n11475_ = OR ( new_n11454_, new_n10132_ ) -new_n11476_ = AND ( new_n11475_, new_n11474_, new_n11470_ ) -NET_16994 = NAND ( new_n11476_, new_n11469_, new_n11466_, new_n11462_ ) -new_n11478_ = NAND ( new_n11461_, NET_1198 ) -new_n11479_ = NAND ( new_n11465_, new_n6302_ ) -new_n11480_ = OR ( new_n11468_, new_n10146_ ) -new_n11481_ = OR ( new_n11452_, new_n10152_ ) -new_n11482_ = NAND ( new_n11473_, new_n10160_ ) -new_n11483_ = OR ( new_n11454_, new_n10158_ ) -new_n11484_ = AND ( new_n11483_, new_n11482_, new_n11481_ ) -NET_16995 = NAND ( new_n11484_, new_n11480_, new_n11479_, new_n11478_ ) -new_n11486_ = NAND ( new_n11461_, NET_1199 ) -new_n11487_ = NAND ( new_n11465_, new_n6310_ ) -new_n11488_ = OR ( new_n11468_, new_n10169_ ) -new_n11489_ = OR ( new_n11452_, new_n10174_ ) -new_n11490_ = NAND ( new_n11473_, new_n10181_ ) -new_n11491_ = OR ( new_n11454_, new_n10179_ ) -new_n11492_ = AND ( new_n11491_, new_n11490_, new_n11489_ ) -NET_16996 = NAND ( new_n11492_, new_n11488_, new_n11487_, new_n11486_ ) -new_n11494_ = NAND ( new_n11461_, NET_1200 ) -new_n11495_ = NAND ( new_n11465_, new_n6318_ ) -new_n11496_ = OR ( new_n11468_, new_n10190_ ) -new_n11497_ = OR ( new_n11452_, new_n10195_ ) -new_n11498_ = NAND ( new_n11473_, new_n10202_ ) -new_n11499_ = OR ( new_n11454_, new_n10200_ ) -new_n11500_ = AND ( new_n11499_, new_n11498_, new_n11497_ ) -NET_16997 = NAND ( new_n11500_, new_n11496_, new_n11495_, new_n11494_ ) -new_n11502_ = NAND ( new_n11461_, NET_1201 ) -new_n11503_ = NAND ( new_n11465_, new_n6326_ ) -new_n11504_ = OR ( new_n11468_, new_n10211_ ) -new_n11505_ = OR ( new_n11452_, new_n10216_ ) -new_n11506_ = NAND ( new_n11473_, new_n10223_ ) -new_n11507_ = OR ( new_n11454_, new_n10221_ ) -new_n11508_ = AND ( new_n11507_, new_n11506_, new_n11505_ ) -NET_16998 = NAND ( new_n11508_, new_n11504_, new_n11503_, new_n11502_ ) -new_n11510_ = NAND ( new_n11461_, NET_1202 ) -new_n11511_ = NAND ( new_n11465_, new_n6334_ ) -new_n11512_ = OR ( new_n11468_, new_n10232_ ) -new_n11513_ = OR ( new_n11452_, new_n10237_ ) -new_n11514_ = NAND ( new_n11473_, new_n10244_ ) -new_n11515_ = OR ( new_n11454_, new_n10242_ ) -new_n11516_ = AND ( new_n11515_, new_n11514_, new_n11513_ ) -NET_16999 = NAND ( new_n11516_, new_n11512_, new_n11511_, new_n11510_ ) -new_n11518_ = NAND ( new_n11461_, NET_1203 ) -new_n11519_ = NAND ( new_n11465_, new_n6342_ ) -new_n11520_ = OR ( new_n11468_, new_n10253_ ) -new_n11521_ = OR ( new_n11452_, new_n10259_ ) -new_n11522_ = NAND ( new_n11473_, new_n10266_ ) -new_n11523_ = OR ( new_n11454_, new_n10264_ ) -new_n11524_ = AND ( new_n11523_, new_n11522_, new_n11521_ ) -NET_17000 = NAND ( new_n11524_, new_n11520_, new_n11519_, new_n11518_ ) -new_n11526_ = NAND ( new_n11461_, NET_1204 ) -new_n11527_ = NAND ( new_n11465_, new_n6350_ ) -new_n11528_ = OR ( new_n11468_, new_n10275_ ) -new_n11529_ = OR ( new_n11452_, new_n10281_ ) -new_n11530_ = NAND ( new_n11473_, new_n10288_ ) -new_n11531_ = OR ( new_n11454_, new_n10286_ ) -new_n11532_ = AND ( new_n11531_, new_n11530_, new_n11529_ ) -NET_17001 = NAND ( new_n11532_, new_n11528_, new_n11527_, new_n11526_ ) -new_n11534_ = NAND ( new_n7150_, new_n7146_, new_n7026_ ) -new_n11535_ = XNOR ( new_n7165_, new_n6196_ ) -new_n11536_ = XOR ( new_n11535_, new_n11534_ ) -new_n11537_ = XOR ( new_n11536_, new_n6196_ ) -new_n11538_ = OR ( new_n11537_, new_n7017_ ) -new_n11539_ = OR ( new_n7172_, new_n4742_ ) -new_n11540_ = NAND ( new_n6661_, new_n5125_, NET_1076 ) -new_n11541_ = OR ( new_n6661_, new_n4563_ ) -NET_17002 = NAND ( new_n11541_, new_n11540_, new_n11539_, new_n11538_ ) -new_n11543_ = NAND ( new_n6728_, NET_320 ) -new_n11544_ = NAND ( new_n6764_, NET_308 ) -new_n11545_ = NAND ( new_n7201_, new_n6767_ ) -new_n11546_ = AND ( new_n3263_, new_n6827_ ) -new_n11547_ = NOT ( NET_319 ) -new_n11548_ = OR ( new_n3179_, new_n11547_ ) -new_n11549_ = NAND ( new_n11548_, new_n6799_ ) -new_n11550_ = NAND ( new_n11549_, new_n3696_ ) -new_n11551_ = NOT ( NET_320 ) -new_n11552_ = OR ( new_n3179_, new_n11551_ ) -new_n11553_ = NAND ( new_n11552_, new_n11550_ ) -new_n11554_ = OR ( new_n11552_, new_n11550_ ) -new_n11555_ = NAND ( new_n11554_, new_n11553_ ) -new_n11556_ = NOR ( new_n11555_, new_n6794_ ) -new_n11557_ = NOT ( NET_479 ) -new_n11558_ = OR ( new_n6792_, new_n11557_ ) -new_n11559_ = NAND ( new_n6804_, NET_447 ) -new_n11560_ = NAND ( new_n6695_, NET_352 ) -new_n11561_ = NAND ( new_n5767_, NET_313 ) -new_n11562_ = NAND ( new_n11561_, new_n11560_, new_n11559_, new_n11558_ ) -new_n11563_ = NOR ( new_n11562_, new_n11556_, new_n11546_ ) -new_n11564_ = NAND ( new_n11563_, new_n11545_, new_n11544_, new_n11543_ ) -new_n11565_ = XOR ( new_n11564_, new_n5529_ ) -new_n11566_ = NAND ( new_n6811_, new_n6714_ ) -new_n11567_ = NOR ( new_n6811_, new_n6714_ ) -new_n11568_ = OR ( new_n6848_, new_n11567_ ) -new_n11569_ = NAND ( new_n11568_, new_n11566_ ) -new_n11570_ = NAND ( new_n6728_, NET_319 ) -new_n11571_ = NAND ( new_n6764_, NET_309 ) -new_n11572_ = OR ( new_n7191_, new_n6768_ ) -new_n11573_ = NOR ( new_n3262_, new_n3080_ ) -new_n11574_ = NOT ( NET_478 ) -new_n11575_ = NOR ( new_n6792_, new_n11574_ ) -new_n11576_ = NAND ( new_n6799_, new_n3696_ ) -new_n11577_ = XNOR ( new_n11576_, new_n11548_ ) -new_n11578_ = OR ( new_n11577_, new_n6794_ ) -new_n11579_ = NAND ( new_n6804_, NET_446 ) -new_n11580_ = NAND ( new_n6695_, NET_351 ) -new_n11581_ = NAND ( new_n5767_, NET_314 ) -new_n11582_ = NAND ( new_n11581_, new_n11580_, new_n11579_, new_n11578_ ) -new_n11583_ = NOR ( new_n11582_, new_n11575_, new_n11573_ ) -new_n11584_ = NAND ( new_n11583_, new_n11572_, new_n11571_, new_n11570_ ) -new_n11585_ = XOR ( new_n11584_, new_n5529_ ) -new_n11586_ = AND ( new_n11585_, new_n11569_ ) -new_n11587_ = NAND ( new_n11586_, new_n11565_ ) -new_n11588_ = OR ( new_n11586_, new_n11565_ ) -new_n11589_ = NAND ( new_n11588_, new_n11587_ ) -new_n11590_ = OR ( new_n11589_, new_n6697_ ) -new_n11591_ = OR ( new_n6571_, new_n3238_ ) -new_n11592_ = NAND ( new_n6695_, new_n6571_, new_n3263_, new_n3072_ ) -NET_17121 = NAND ( new_n11592_, new_n11591_, new_n11590_ ) -new_n11594_ = XNOR ( new_n11585_, new_n11569_ ) -new_n11595_ = OR ( new_n11594_, new_n6697_ ) -new_n11596_ = OR ( new_n6571_, new_n3079_ ) -new_n11597_ = OR ( new_n6852_, new_n3262_ ) -NET_17122 = NAND ( new_n11597_, new_n11596_, new_n11595_ ) -new_n11599_ = NAND ( new_n6888_, NET_769 ) -new_n11600_ = NAND ( new_n6924_, NET_757 ) -new_n11601_ = NAND ( new_n8631_, new_n6927_ ) -new_n11602_ = AND ( new_n4008_, new_n6987_ ) -new_n11603_ = NOT ( NET_768 ) -new_n11604_ = OR ( new_n3924_, new_n11603_ ) -new_n11605_ = NAND ( new_n11604_, new_n6959_ ) -new_n11606_ = NAND ( new_n11605_, new_n4441_ ) -new_n11607_ = NOT ( NET_769 ) -new_n11608_ = OR ( new_n3924_, new_n11607_ ) -new_n11609_ = NAND ( new_n11608_, new_n11606_ ) -new_n11610_ = OR ( new_n11608_, new_n11606_ ) -new_n11611_ = NAND ( new_n11610_, new_n11609_ ) -new_n11612_ = NOR ( new_n11611_, new_n6954_ ) -new_n11613_ = NOT ( NET_928 ) -new_n11614_ = OR ( new_n6952_, new_n11613_ ) -new_n11615_ = NAND ( new_n6964_, NET_896 ) -new_n11616_ = NAND ( new_n6855_, NET_801 ) -new_n11617_ = NAND ( new_n6136_, NET_762 ) -new_n11618_ = NAND ( new_n11617_, new_n11616_, new_n11615_, new_n11614_ ) -new_n11619_ = NOR ( new_n11618_, new_n11612_, new_n11602_ ) -new_n11620_ = NAND ( new_n11619_, new_n11601_, new_n11600_, new_n11599_ ) -new_n11621_ = XOR ( new_n11620_, new_n5827_ ) -new_n11622_ = NAND ( new_n6971_, new_n6874_ ) -new_n11623_ = NOR ( new_n6971_, new_n6874_ ) -new_n11624_ = OR ( new_n7008_, new_n11623_ ) -new_n11625_ = NAND ( new_n11624_, new_n11622_ ) -new_n11626_ = NAND ( new_n6888_, NET_768 ) -new_n11627_ = NAND ( new_n6924_, NET_758 ) -new_n11628_ = OR ( new_n8621_, new_n6928_ ) -new_n11629_ = NOR ( new_n4007_, new_n3825_ ) -new_n11630_ = NOT ( NET_927 ) -new_n11631_ = NOR ( new_n6952_, new_n11630_ ) -new_n11632_ = NAND ( new_n6959_, new_n4441_ ) -new_n11633_ = XNOR ( new_n11632_, new_n11604_ ) -new_n11634_ = OR ( new_n11633_, new_n6954_ ) -new_n11635_ = NAND ( new_n6964_, NET_895 ) -new_n11636_ = NAND ( new_n6855_, NET_800 ) -new_n11637_ = NAND ( new_n6136_, NET_763 ) -new_n11638_ = NAND ( new_n11637_, new_n11636_, new_n11635_, new_n11634_ ) -new_n11639_ = NOR ( new_n11638_, new_n11631_, new_n11629_ ) -new_n11640_ = NAND ( new_n11639_, new_n11628_, new_n11627_, new_n11626_ ) -new_n11641_ = XOR ( new_n11640_, new_n5827_ ) -new_n11642_ = AND ( new_n11641_, new_n11625_ ) -new_n11643_ = NAND ( new_n11642_, new_n11621_ ) -new_n11644_ = OR ( new_n11642_, new_n11621_ ) -new_n11645_ = NAND ( new_n11644_, new_n11643_ ) -new_n11646_ = OR ( new_n11645_, new_n6857_ ) -new_n11647_ = OR ( new_n6616_, new_n3983_ ) -new_n11648_ = NAND ( new_n6855_, new_n6616_, new_n4008_, new_n3817_ ) -NET_17137 = NAND ( new_n11648_, new_n11647_, new_n11646_ ) -new_n11650_ = XNOR ( new_n11641_, new_n11625_ ) -new_n11651_ = OR ( new_n11650_, new_n6857_ ) -new_n11652_ = OR ( new_n6616_, new_n3824_ ) -new_n11653_ = OR ( new_n7012_, new_n4007_ ) -NET_17138 = NAND ( new_n11653_, new_n11652_, new_n11651_ ) -new_n11655_ = NAND ( new_n7048_, NET_1218 ) -new_n11656_ = NAND ( new_n7084_, NET_1206 ) -new_n11657_ = NAND ( new_n10099_, new_n7087_ ) -new_n11658_ = AND ( new_n4752_, new_n7147_ ) -new_n11659_ = NOT ( NET_1217 ) -new_n11660_ = OR ( new_n4668_, new_n11659_ ) -new_n11661_ = NAND ( new_n11660_, new_n7119_ ) -new_n11662_ = NAND ( new_n11661_, new_n5185_ ) -new_n11663_ = NOT ( NET_1218 ) -new_n11664_ = OR ( new_n4668_, new_n11663_ ) -new_n11665_ = NAND ( new_n11664_, new_n11662_ ) -new_n11666_ = OR ( new_n11664_, new_n11662_ ) -new_n11667_ = NAND ( new_n11666_, new_n11665_ ) -new_n11668_ = NOR ( new_n11667_, new_n7114_ ) -new_n11669_ = NOT ( NET_1377 ) -new_n11670_ = OR ( new_n7112_, new_n11669_ ) -new_n11671_ = NAND ( new_n7124_, NET_1345 ) -new_n11672_ = NAND ( new_n7015_, NET_1250 ) -new_n11673_ = NAND ( new_n6521_, NET_1211 ) -new_n11674_ = NAND ( new_n11673_, new_n11672_, new_n11671_, new_n11670_ ) -new_n11675_ = NOR ( new_n11674_, new_n11668_, new_n11658_ ) -new_n11676_ = NAND ( new_n11675_, new_n11657_, new_n11656_, new_n11655_ ) -new_n11677_ = XOR ( new_n11676_, new_n6196_ ) -new_n11678_ = NAND ( new_n7131_, new_n7034_ ) -new_n11679_ = NOR ( new_n7131_, new_n7034_ ) -new_n11680_ = OR ( new_n7168_, new_n11679_ ) -new_n11681_ = NAND ( new_n11680_, new_n11678_ ) -new_n11682_ = NAND ( new_n7048_, NET_1217 ) -new_n11683_ = NAND ( new_n7084_, NET_1207 ) -new_n11684_ = OR ( new_n10089_, new_n7088_ ) -new_n11685_ = NOR ( new_n4751_, new_n4569_ ) -new_n11686_ = NOT ( NET_1376 ) -new_n11687_ = NOR ( new_n7112_, new_n11686_ ) -new_n11688_ = NAND ( new_n7119_, new_n5185_ ) -new_n11689_ = XNOR ( new_n11688_, new_n11660_ ) -new_n11690_ = OR ( new_n11689_, new_n7114_ ) -new_n11691_ = NAND ( new_n7124_, NET_1344 ) -new_n11692_ = NAND ( new_n7015_, NET_1249 ) -new_n11693_ = NAND ( new_n6521_, NET_1212 ) -new_n11694_ = NAND ( new_n11693_, new_n11692_, new_n11691_, new_n11690_ ) -new_n11695_ = NOR ( new_n11694_, new_n11687_, new_n11685_ ) -new_n11696_ = NAND ( new_n11695_, new_n11684_, new_n11683_, new_n11682_ ) -new_n11697_ = XOR ( new_n11696_, new_n6196_ ) -new_n11698_ = AND ( new_n11697_, new_n11681_ ) -new_n11699_ = NAND ( new_n11698_, new_n11677_ ) -new_n11700_ = OR ( new_n11698_, new_n11677_ ) -new_n11701_ = NAND ( new_n11700_, new_n11699_ ) -new_n11702_ = OR ( new_n11701_, new_n7017_ ) -new_n11703_ = OR ( new_n6661_, new_n4727_ ) -new_n11704_ = NAND ( new_n7015_, new_n6661_, new_n4752_, new_n4561_ ) -NET_17149 = NAND ( new_n11704_, new_n11703_, new_n11702_ ) -new_n11706_ = XNOR ( new_n11697_, new_n11681_ ) -new_n11707_ = OR ( new_n11706_, new_n7017_ ) -new_n11708_ = OR ( new_n6661_, new_n4568_ ) -new_n11709_ = OR ( new_n7172_, new_n4751_ ) -NET_17150 = NAND ( new_n11709_, new_n11708_, new_n11707_ ) -new_n11711_ = NOR ( new_n6794_, new_n5508_ ) -new_n11712_ = OR ( new_n11711_, new_n6791_ ) -new_n11713_ = NAND ( new_n11712_, new_n3703_ ) -new_n11714_ = NOR ( new_n11713_, new_n3029_ ) -new_n11715_ = NOT ( new_n11714_ ) -new_n11716_ = NOT ( new_n6705_ ) -new_n11717_ = NAND ( new_n6716_, new_n3636_, new_n3150_ ) -new_n11718_ = NAND ( new_n6596_, NET_305 ) -new_n11719_ = NAND ( new_n3688_, new_n3179_, new_n3121_ ) -new_n11720_ = NOR ( new_n11719_, new_n5525_, new_n3695_, new_n3082_ ) -new_n11721_ = NOR ( new_n11720_, new_n5529_, new_n6827_ ) -new_n11722_ = NAND ( new_n11721_, new_n11718_, new_n11717_, new_n11716_ ) -new_n11723_ = NOR ( new_n6695_, new_n6596_ ) -new_n11724_ = NOR ( new_n11723_, new_n6849_ ) -new_n11725_ = NOR ( new_n3636_, new_n3230_ ) -new_n11726_ = NAND ( new_n11725_, new_n6716_ ) -new_n11727_ = NOT ( new_n3687_ ) -new_n11728_ = NAND ( new_n6726_, new_n3696_ ) -new_n11729_ = NAND ( new_n11728_, new_n11727_ ) -new_n11730_ = NAND ( new_n11729_, NET_178 ) -new_n11731_ = NOR ( new_n6804_, new_n5767_ ) -new_n11732_ = NAND ( new_n11731_, new_n11730_, new_n11726_, new_n6724_ ) -new_n11733_ = NAND ( new_n11732_, NET_310 ) -new_n11734_ = NOR ( new_n5781_, new_n3696_ ) -new_n11735_ = NAND ( new_n11734_, new_n6699_, new_n3694_, new_n6588_ ) -new_n11736_ = NAND ( new_n6726_, new_n3179_ ) -new_n11737_ = OR ( new_n6710_, new_n3683_ ) -new_n11738_ = NAND ( new_n11737_, new_n11736_, new_n6790_ ) -new_n11739_ = NAND ( new_n11738_, NET_178 ) -new_n11740_ = NAND ( new_n11739_, new_n11735_, new_n11717_, new_n6763_ ) -new_n11741_ = NAND ( new_n11740_, NET_318 ) -new_n11742_ = NOT ( NET_350 ) -new_n11743_ = OR ( new_n6828_, new_n11742_ ) -new_n11744_ = NAND ( new_n5529_, NET_509 ) -new_n11745_ = NAND ( new_n11744_, new_n11743_, new_n11741_, new_n11733_ ) -new_n11746_ = NOR ( new_n11745_, new_n11724_ ) -new_n11747_ = XOR ( new_n11746_, new_n6707_ ) -new_n11748_ = AND ( new_n11747_, new_n11722_ ) -new_n11749_ = NOR ( new_n11747_, new_n11722_ ) -new_n11750_ = OR ( new_n11749_, new_n11748_ ) -new_n11751_ = NOT ( new_n6816_ ) -new_n11752_ = NAND ( new_n11725_, new_n3069_ ) -new_n11753_ = NOR ( new_n3069_, new_n3030_ ) -new_n11754_ = NOR ( new_n11753_, new_n6709_, new_n3682_ ) -new_n11755_ = NAND ( new_n5763_, new_n3661_ ) -new_n11756_ = NAND ( new_n6737_, new_n3030_ ) -new_n11757_ = AND ( new_n11756_, new_n11755_, new_n11754_ ) -new_n11758_ = NAND ( new_n11757_, new_n11752_, new_n11751_, new_n6746_ ) -new_n11759_ = NAND ( new_n11758_, NET_178 ) -new_n11760_ = NAND ( new_n6596_, NET_306 ) -new_n11761_ = NAND ( new_n11760_, new_n11759_, new_n11735_, new_n5786_ ) -new_n11762_ = NOR ( new_n11723_, new_n8599_ ) -new_n11763_ = NAND ( new_n11732_, NET_311 ) -new_n11764_ = NAND ( new_n11740_, NET_317 ) -new_n11765_ = NOT ( NET_349 ) -new_n11766_ = OR ( new_n6828_, new_n11765_ ) -new_n11767_ = NAND ( new_n5529_, NET_508 ) -new_n11768_ = NAND ( new_n11767_, new_n11766_, new_n11764_, new_n11763_ ) -new_n11769_ = NOR ( new_n11768_, new_n11762_ ) -new_n11770_ = NOR ( new_n11769_, new_n11761_ ) -new_n11771_ = AND ( new_n11769_, new_n6707_ ) -new_n11772_ = OR ( new_n11771_, new_n11770_ ) -new_n11773_ = XNOR ( new_n11772_, new_n11750_ ) -new_n11774_ = OR ( new_n11773_, new_n11715_ ) -new_n11775_ = OR ( new_n11713_, new_n3030_ ) -new_n11776_ = OR ( new_n11775_, new_n6849_ ) -new_n11777_ = NAND ( new_n11713_, NET_477 ) -NET_18198 = NAND ( new_n11777_, new_n11776_, new_n11774_ ) -new_n11779_ = NOR ( new_n6954_, new_n5806_ ) -new_n11780_ = OR ( new_n11779_, new_n6951_ ) -new_n11781_ = NAND ( new_n11780_, new_n4448_ ) -new_n11782_ = NOR ( new_n11781_, new_n3774_ ) -new_n11783_ = NOT ( new_n11782_ ) -new_n11784_ = NOT ( new_n6865_ ) -new_n11785_ = NAND ( new_n6876_, new_n4381_, new_n3895_ ) -new_n11786_ = NAND ( new_n6641_, NET_754 ) -new_n11787_ = NAND ( new_n4433_, new_n3924_, new_n3866_ ) -new_n11788_ = NOR ( new_n11787_, new_n5823_, new_n4440_, new_n3827_ ) -new_n11789_ = NOR ( new_n11788_, new_n5827_, new_n6987_ ) -new_n11790_ = NAND ( new_n11789_, new_n11786_, new_n11785_, new_n11784_ ) -new_n11791_ = NOR ( new_n6855_, new_n6641_ ) -new_n11792_ = NOR ( new_n11791_, new_n7009_ ) -new_n11793_ = NOR ( new_n4381_, new_n3975_ ) -new_n11794_ = NAND ( new_n11793_, new_n6876_ ) -new_n11795_ = NOT ( new_n4432_ ) -new_n11796_ = NAND ( new_n6886_, new_n4441_ ) -new_n11797_ = NAND ( new_n11796_, new_n11795_ ) -new_n11798_ = NAND ( new_n11797_, NET_627 ) -new_n11799_ = NOR ( new_n6964_, new_n6136_ ) -new_n11800_ = NAND ( new_n11799_, new_n11798_, new_n11794_, new_n6884_ ) -new_n11801_ = NAND ( new_n11800_, NET_759 ) -new_n11802_ = NOR ( new_n6150_, new_n4441_ ) -new_n11803_ = NAND ( new_n11802_, new_n6859_, new_n4439_, new_n6633_ ) -new_n11804_ = NAND ( new_n6886_, new_n3924_ ) -new_n11805_ = OR ( new_n6870_, new_n4428_ ) -new_n11806_ = NAND ( new_n11805_, new_n11804_, new_n6950_ ) -new_n11807_ = NAND ( new_n11806_, NET_627 ) -new_n11808_ = NAND ( new_n11807_, new_n11803_, new_n11785_, new_n6923_ ) -new_n11809_ = NAND ( new_n11808_, NET_767 ) -new_n11810_ = NOT ( NET_799 ) -new_n11811_ = OR ( new_n6988_, new_n11810_ ) -new_n11812_ = NAND ( new_n5827_, NET_958 ) -new_n11813_ = NAND ( new_n11812_, new_n11811_, new_n11809_, new_n11801_ ) -new_n11814_ = NOR ( new_n11813_, new_n11792_ ) -new_n11815_ = XOR ( new_n11814_, new_n6867_ ) -new_n11816_ = AND ( new_n11815_, new_n11790_ ) -new_n11817_ = NOR ( new_n11815_, new_n11790_ ) -new_n11818_ = OR ( new_n11817_, new_n11816_ ) -new_n11819_ = NOT ( new_n6976_ ) -new_n11820_ = NAND ( new_n11793_, new_n3814_ ) -new_n11821_ = NOR ( new_n3814_, new_n3775_ ) -new_n11822_ = NOR ( new_n11821_, new_n6869_, new_n4427_ ) -new_n11823_ = NAND ( new_n6132_, new_n4406_ ) -new_n11824_ = NAND ( new_n6897_, new_n3775_ ) -new_n11825_ = AND ( new_n11824_, new_n11823_, new_n11822_ ) -new_n11826_ = NAND ( new_n11825_, new_n11820_, new_n11819_, new_n6906_ ) -new_n11827_ = NAND ( new_n11826_, NET_627 ) -new_n11828_ = NAND ( new_n6641_, NET_755 ) -new_n11829_ = NAND ( new_n11828_, new_n11827_, new_n11803_, new_n6155_ ) -new_n11830_ = NOR ( new_n11791_, new_n10067_ ) -new_n11831_ = NAND ( new_n11800_, NET_760 ) -new_n11832_ = NAND ( new_n11808_, NET_766 ) -new_n11833_ = NOT ( NET_798 ) -new_n11834_ = OR ( new_n6988_, new_n11833_ ) -new_n11835_ = NAND ( new_n5827_, NET_957 ) -new_n11836_ = NAND ( new_n11835_, new_n11834_, new_n11832_, new_n11831_ ) -new_n11837_ = NOR ( new_n11836_, new_n11830_ ) -new_n11838_ = NOR ( new_n11837_, new_n11829_ ) -new_n11839_ = AND ( new_n11837_, new_n6867_ ) -new_n11840_ = OR ( new_n11839_, new_n11838_ ) -new_n11841_ = XNOR ( new_n11840_, new_n11818_ ) -new_n11842_ = OR ( new_n11841_, new_n11783_ ) -new_n11843_ = OR ( new_n11781_, new_n3775_ ) -new_n11844_ = OR ( new_n11843_, new_n7009_ ) -new_n11845_ = NAND ( new_n11781_, NET_926 ) -NET_18221 = NAND ( new_n11845_, new_n11844_, new_n11842_ ) -new_n11847_ = NOR ( new_n7114_, new_n6175_ ) -new_n11848_ = OR ( new_n11847_, new_n7111_ ) -new_n11849_ = NAND ( new_n11848_, new_n5192_ ) -new_n11850_ = NOR ( new_n11849_, new_n4518_ ) -new_n11851_ = NOT ( new_n11850_ ) -new_n11852_ = NOT ( new_n7025_ ) -new_n11853_ = NAND ( new_n7036_, new_n5125_, new_n4639_ ) -new_n11854_ = NAND ( new_n6686_, NET_1203 ) -new_n11855_ = NAND ( new_n5177_, new_n4668_, new_n4610_ ) -new_n11856_ = NOR ( new_n11855_, new_n6192_, new_n5184_, new_n4571_ ) -new_n11857_ = NOR ( new_n11856_, new_n6196_, new_n7147_ ) -new_n11858_ = NAND ( new_n11857_, new_n11854_, new_n11853_, new_n11852_ ) -new_n11859_ = NOR ( new_n7015_, new_n6686_ ) -new_n11860_ = NOR ( new_n11859_, new_n7169_ ) -new_n11861_ = NOR ( new_n5125_, new_n4719_ ) -new_n11862_ = NAND ( new_n11861_, new_n7036_ ) -new_n11863_ = NOT ( new_n5176_ ) -new_n11864_ = NAND ( new_n7046_, new_n5185_ ) -new_n11865_ = NAND ( new_n11864_, new_n11863_ ) -new_n11866_ = NAND ( new_n11865_, NET_1076 ) -new_n11867_ = NOR ( new_n7124_, new_n6521_ ) -new_n11868_ = NAND ( new_n11867_, new_n11866_, new_n11862_, new_n7044_ ) -new_n11869_ = NAND ( new_n11868_, NET_1208 ) -new_n11870_ = NOR ( new_n6535_, new_n5185_ ) -new_n11871_ = NAND ( new_n11870_, new_n7019_, new_n5183_, new_n6678_ ) -new_n11872_ = NAND ( new_n7046_, new_n4668_ ) -new_n11873_ = OR ( new_n7030_, new_n5172_ ) -new_n11874_ = NAND ( new_n11873_, new_n11872_, new_n7110_ ) -new_n11875_ = NAND ( new_n11874_, NET_1076 ) -new_n11876_ = NAND ( new_n11875_, new_n11871_, new_n11853_, new_n7083_ ) -new_n11877_ = NAND ( new_n11876_, NET_1216 ) -new_n11878_ = NOT ( NET_1248 ) -new_n11879_ = OR ( new_n7148_, new_n11878_ ) -new_n11880_ = NAND ( new_n6196_, NET_1407 ) -new_n11881_ = NAND ( new_n11880_, new_n11879_, new_n11877_, new_n11869_ ) -new_n11882_ = NOR ( new_n11881_, new_n11860_ ) -new_n11883_ = XOR ( new_n11882_, new_n7027_ ) -new_n11884_ = AND ( new_n11883_, new_n11858_ ) -new_n11885_ = NOR ( new_n11883_, new_n11858_ ) -new_n11886_ = OR ( new_n11885_, new_n11884_ ) -new_n11887_ = NOT ( new_n7136_ ) -new_n11888_ = NAND ( new_n11861_, new_n4558_ ) -new_n11889_ = NOR ( new_n4558_, new_n4519_ ) -new_n11890_ = NOR ( new_n11889_, new_n7029_, new_n5171_ ) -new_n11891_ = NAND ( new_n6517_, new_n5150_ ) -new_n11892_ = NAND ( new_n7057_, new_n4519_ ) -new_n11893_ = AND ( new_n11892_, new_n11891_, new_n11890_ ) -new_n11894_ = NAND ( new_n11893_, new_n11888_, new_n11887_, new_n7066_ ) -new_n11895_ = NAND ( new_n11894_, NET_1076 ) -new_n11896_ = NAND ( new_n6686_, NET_1204 ) -new_n11897_ = NAND ( new_n11896_, new_n11895_, new_n11871_, new_n6540_ ) -new_n11898_ = NOR ( new_n11859_, new_n11537_ ) -new_n11899_ = NAND ( new_n11868_, NET_1209 ) -new_n11900_ = NAND ( new_n11876_, NET_1215 ) -new_n11901_ = NOT ( NET_1247 ) -new_n11902_ = OR ( new_n7148_, new_n11901_ ) -new_n11903_ = NAND ( new_n6196_, NET_1406 ) -new_n11904_ = NAND ( new_n11903_, new_n11902_, new_n11900_, new_n11899_ ) -new_n11905_ = NOR ( new_n11904_, new_n11898_ ) -new_n11906_ = NOR ( new_n11905_, new_n11897_ ) -new_n11907_ = AND ( new_n11905_, new_n7027_ ) -new_n11908_ = OR ( new_n11907_, new_n11906_ ) -new_n11909_ = XNOR ( new_n11908_, new_n11886_ ) -new_n11910_ = OR ( new_n11909_, new_n11851_ ) -new_n11911_ = OR ( new_n11849_, new_n4519_ ) -new_n11912_ = OR ( new_n11911_, new_n7169_ ) -new_n11913_ = NAND ( new_n11849_, NET_1375 ) -NET_18243 = NAND ( new_n11913_, new_n11912_, new_n11910_ ) -new_n11915_ = NOR ( new_n11769_, new_n6707_ ) -new_n11916_ = OR ( new_n11915_, new_n11771_ ) -new_n11917_ = XOR ( new_n11916_, new_n11761_ ) -new_n11918_ = XNOR ( new_n11917_, new_n6707_ ) -new_n11919_ = OR ( new_n11918_, new_n11715_ ) -new_n11920_ = NAND ( new_n11713_, NET_476 ) -new_n11921_ = OR ( new_n11775_, new_n8599_ ) -NET_18315 = NAND ( new_n11921_, new_n11920_, new_n11919_ ) -new_n11923_ = NOR ( new_n11837_, new_n6867_ ) -new_n11924_ = OR ( new_n11923_, new_n11839_ ) -new_n11925_ = XOR ( new_n11924_, new_n11829_ ) -new_n11926_ = XNOR ( new_n11925_, new_n6867_ ) -new_n11927_ = OR ( new_n11926_, new_n11783_ ) -new_n11928_ = NAND ( new_n11781_, NET_925 ) -new_n11929_ = OR ( new_n11843_, new_n10067_ ) -NET_18330 = NAND ( new_n11929_, new_n11928_, new_n11927_ ) -new_n11931_ = NOR ( new_n11905_, new_n7027_ ) -new_n11932_ = OR ( new_n11931_, new_n11907_ ) -new_n11933_ = XOR ( new_n11932_, new_n11897_ ) -new_n11934_ = XNOR ( new_n11933_, new_n7027_ ) -new_n11935_ = OR ( new_n11934_, new_n11851_ ) -new_n11936_ = NAND ( new_n11849_, NET_1374 ) -new_n11937_ = OR ( new_n11911_, new_n11537_ ) -NET_18342 = NAND ( new_n11937_, new_n11936_, new_n11935_ ) -new_n11939_ = NOR ( new_n11723_, new_n11594_ ) -new_n11940_ = NAND ( new_n11732_, NET_309 ) -new_n11941_ = NAND ( new_n11740_, NET_319 ) -new_n11942_ = NOT ( NET_351 ) -new_n11943_ = OR ( new_n6828_, new_n11942_ ) -new_n11944_ = NAND ( new_n5529_, NET_510 ) -new_n11945_ = NAND ( new_n11944_, new_n11943_, new_n11941_, new_n11940_ ) -new_n11946_ = NOR ( new_n11945_, new_n11939_ ) -new_n11947_ = XOR ( new_n11946_, new_n6707_ ) -new_n11948_ = NAND ( new_n6596_, NET_304 ) -new_n11949_ = NAND ( new_n11948_, new_n11735_, new_n6768_ ) -new_n11950_ = NAND ( new_n11949_, new_n11947_ ) -new_n11951_ = NOR ( new_n11946_, new_n6695_ ) -new_n11952_ = AND ( new_n11946_, new_n6695_ ) -new_n11953_ = OR ( new_n11949_, new_n11952_, new_n11951_ ) -new_n11954_ = AND ( new_n11953_, new_n11950_ ) -new_n11955_ = NOR ( new_n11772_, new_n11749_ ) -new_n11956_ = OR ( new_n11955_, new_n11748_ ) -new_n11957_ = OR ( new_n11956_, new_n11954_ ) -new_n11958_ = NAND ( new_n11956_, new_n11953_, new_n11950_ ) -new_n11959_ = NAND ( new_n11958_, new_n11957_ ) -new_n11960_ = OR ( new_n11959_, new_n11715_ ) -new_n11961_ = NAND ( new_n11713_, NET_478 ) -new_n11962_ = OR ( new_n11775_, new_n11594_ ) -NET_18522 = NAND ( new_n11962_, new_n11961_, new_n11960_ ) -new_n11964_ = NOR ( new_n11791_, new_n11650_ ) -new_n11965_ = NAND ( new_n11800_, NET_758 ) -new_n11966_ = NAND ( new_n11808_, NET_768 ) -new_n11967_ = NOT ( NET_800 ) -new_n11968_ = OR ( new_n6988_, new_n11967_ ) -new_n11969_ = NAND ( new_n5827_, NET_959 ) -new_n11970_ = NAND ( new_n11969_, new_n11968_, new_n11966_, new_n11965_ ) -new_n11971_ = NOR ( new_n11970_, new_n11964_ ) -new_n11972_ = XOR ( new_n11971_, new_n6867_ ) -new_n11973_ = NAND ( new_n6641_, NET_753 ) -new_n11974_ = NAND ( new_n11973_, new_n11803_, new_n6928_ ) -new_n11975_ = NAND ( new_n11974_, new_n11972_ ) -new_n11976_ = NOR ( new_n11971_, new_n6855_ ) -new_n11977_ = AND ( new_n11971_, new_n6855_ ) -new_n11978_ = OR ( new_n11974_, new_n11977_, new_n11976_ ) -new_n11979_ = AND ( new_n11978_, new_n11975_ ) -new_n11980_ = NOR ( new_n11840_, new_n11817_ ) -new_n11981_ = OR ( new_n11980_, new_n11816_ ) -new_n11982_ = OR ( new_n11981_, new_n11979_ ) -new_n11983_ = NAND ( new_n11981_, new_n11978_, new_n11975_ ) -new_n11984_ = NAND ( new_n11983_, new_n11982_ ) -new_n11985_ = OR ( new_n11984_, new_n11783_ ) -new_n11986_ = NAND ( new_n11781_, NET_927 ) -new_n11987_ = OR ( new_n11843_, new_n11650_ ) -NET_18535 = NAND ( new_n11987_, new_n11986_, new_n11985_ ) -new_n11989_ = NOR ( new_n11859_, new_n11706_ ) -new_n11990_ = NAND ( new_n11868_, NET_1207 ) -new_n11991_ = NAND ( new_n11876_, NET_1217 ) -new_n11992_ = NOT ( NET_1249 ) -new_n11993_ = OR ( new_n7148_, new_n11992_ ) -new_n11994_ = NAND ( new_n6196_, NET_1408 ) -new_n11995_ = NAND ( new_n11994_, new_n11993_, new_n11991_, new_n11990_ ) -new_n11996_ = NOR ( new_n11995_, new_n11989_ ) -new_n11997_ = XOR ( new_n11996_, new_n7027_ ) -new_n11998_ = NAND ( new_n6686_, NET_1202 ) -new_n11999_ = NAND ( new_n11998_, new_n11871_, new_n7088_ ) -new_n12000_ = NAND ( new_n11999_, new_n11997_ ) -new_n12001_ = NOR ( new_n11996_, new_n7015_ ) -new_n12002_ = AND ( new_n11996_, new_n7015_ ) -new_n12003_ = OR ( new_n11999_, new_n12002_, new_n12001_ ) -new_n12004_ = AND ( new_n12003_, new_n12000_ ) -new_n12005_ = NOR ( new_n11908_, new_n11885_ ) -new_n12006_ = OR ( new_n12005_, new_n11884_ ) -new_n12007_ = OR ( new_n12006_, new_n12004_ ) -new_n12008_ = NAND ( new_n12006_, new_n12003_, new_n12000_ ) -new_n12009_ = NAND ( new_n12008_, new_n12007_ ) -new_n12010_ = OR ( new_n12009_, new_n11851_ ) -new_n12011_ = NAND ( new_n11849_, NET_1376 ) -new_n12012_ = OR ( new_n11911_, new_n11706_ ) -NET_18548 = NAND ( new_n12012_, new_n12011_, new_n12010_ ) -new_n12014_ = NOT ( new_n11773_ ) -new_n12015_ = NAND ( new_n6698_, new_n3388_ ) -new_n12016_ = NAND ( new_n12015_, new_n6720_ ) -new_n12017_ = NAND ( new_n12016_, new_n3660_ ) -new_n12018_ = NAND ( new_n12017_, new_n11728_, new_n6803_, new_n6702_ ) -new_n12019_ = NAND ( new_n12018_, new_n12014_ ) -new_n12020_ = NOT ( new_n6849_ ) -new_n12021_ = NOR ( new_n6579_, new_n3230_ ) -new_n12022_ = NOR ( new_n3179_, new_n3232_ ) -new_n12023_ = AND ( new_n6573_, new_n3682_ ) -new_n12024_ = NOR ( new_n12023_, new_n3030_ ) -new_n12025_ = NOR ( new_n12024_, new_n3696_ ) -new_n12026_ = NOR ( new_n12025_, new_n12022_ ) -new_n12027_ = NOT ( new_n3699_ ) -new_n12028_ = NOR ( new_n6737_, new_n5761_ ) -new_n12029_ = NOR ( new_n12028_, new_n6591_ ) -new_n12030_ = OR ( new_n12029_, new_n3660_ ) -new_n12031_ = NAND ( new_n6709_, new_n3660_ ) -new_n12032_ = NAND ( new_n12031_, new_n12030_, new_n6747_, new_n12027_ ) -new_n12033_ = OR ( new_n12032_, new_n12026_, new_n12021_ ) -new_n12034_ = NAND ( new_n12033_, new_n12020_ ) -new_n12035_ = NAND ( new_n6790_, new_n11727_ ) -new_n12036_ = NAND ( new_n12035_, new_n7193_ ) -new_n12037_ = NAND ( new_n11737_, new_n11736_, new_n5528_ ) -new_n12038_ = NAND ( new_n12037_, new_n3257_ ) -new_n12039_ = NOR ( new_n2991_, new_n2986_ ) -new_n12040_ = OR ( new_n12039_, new_n6595_ ) -new_n12041_ = NOT ( new_n2981_ ) -new_n12042_ = NOT ( new_n6592_ ) -new_n12043_ = NOR ( new_n3179_, new_n2971_ ) -new_n12044_ = NAND ( new_n12043_, NET_310 ) -new_n12045_ = NAND ( new_n12044_, new_n12042_, new_n12041_ ) -new_n12046_ = AND ( new_n12045_, new_n12040_, new_n12038_ ) -new_n12047_ = NAND ( new_n12046_, new_n12036_, new_n12034_, new_n12019_ ) -new_n12048_ = NAND ( new_n12047_, new_n3703_ ) -new_n12049_ = OR ( new_n3250_, new_n3211_ ) -new_n12050_ = NAND ( new_n3636_, new_n3072_ ) -new_n12051_ = OR ( new_n12050_, new_n11773_ ) -new_n12052_ = NAND ( new_n12051_, new_n12049_, new_n12048_ ) -new_n12053_ = OR ( new_n3699_, new_n3687_ ) -new_n12054_ = NAND ( new_n12053_, new_n3690_ ) -new_n12055_ = NAND ( new_n12054_, new_n6702_ ) -new_n12056_ = NAND ( new_n12055_, new_n3636_ ) -new_n12057_ = OR ( new_n5528_, new_n5754_ ) -new_n12058_ = NAND ( new_n12057_, new_n12056_ ) -new_n12059_ = NAND ( new_n12058_, new_n5513_ ) -new_n12060_ = NAND ( new_n6595_, new_n6592_ ) -new_n12061_ = NAND ( new_n12060_, new_n3636_ ) -new_n12062_ = OR ( new_n5524_, new_n3229_ ) -new_n12063_ = NAND ( new_n3660_, new_n3230_ ) -new_n12064_ = NAND ( new_n12063_, new_n5763_ ) -new_n12065_ = NAND ( new_n12064_, new_n12062_, new_n6744_ ) -new_n12066_ = NOR ( new_n12065_, new_n6742_, new_n6732_, new_n5762_ ) -new_n12067_ = NAND ( new_n12066_, new_n12061_, new_n12059_ ) -new_n12068_ = NAND ( new_n12067_, new_n5510_ ) -new_n12069_ = NAND ( new_n12068_, new_n6570_, new_n6560_ ) -new_n12070_ = NAND ( new_n12069_, new_n12052_ ) -new_n12071_ = OR ( new_n12069_, new_n2967_ ) -NET_18604 = NAND ( new_n12071_, new_n12070_ ) -new_n12073_ = NOT ( new_n11841_ ) -new_n12074_ = NAND ( new_n6858_, new_n4133_ ) -new_n12075_ = NAND ( new_n12074_, new_n6880_ ) -new_n12076_ = NAND ( new_n12075_, new_n4405_ ) -new_n12077_ = NAND ( new_n12076_, new_n11796_, new_n6963_, new_n6862_ ) -new_n12078_ = NAND ( new_n12077_, new_n12073_ ) -new_n12079_ = NOT ( new_n7009_ ) -new_n12080_ = NOR ( new_n6624_, new_n3975_ ) -new_n12081_ = NOR ( new_n3924_, new_n3977_ ) -new_n12082_ = AND ( new_n6618_, new_n4427_ ) -new_n12083_ = NOR ( new_n12082_, new_n3775_ ) -new_n12084_ = NOR ( new_n12083_, new_n4441_ ) -new_n12085_ = NOR ( new_n12084_, new_n12081_ ) -new_n12086_ = NOT ( new_n4444_ ) -new_n12087_ = NOR ( new_n6897_, new_n6130_ ) -new_n12088_ = NOR ( new_n12087_, new_n6636_ ) -new_n12089_ = OR ( new_n12088_, new_n4405_ ) -new_n12090_ = NAND ( new_n6869_, new_n4405_ ) -new_n12091_ = NAND ( new_n12090_, new_n12089_, new_n6907_, new_n12086_ ) -new_n12092_ = OR ( new_n12091_, new_n12085_, new_n12080_ ) -new_n12093_ = NAND ( new_n12092_, new_n12079_ ) -new_n12094_ = NAND ( new_n6950_, new_n11795_ ) -new_n12095_ = NAND ( new_n12094_, new_n8623_ ) -new_n12096_ = NAND ( new_n11805_, new_n11804_, new_n5826_ ) -new_n12097_ = NAND ( new_n12096_, new_n4002_ ) -new_n12098_ = NOR ( new_n3736_, new_n3731_ ) -new_n12099_ = OR ( new_n12098_, new_n6640_ ) -new_n12100_ = NOT ( new_n3726_ ) -new_n12101_ = NOT ( new_n6637_ ) -new_n12102_ = NOR ( new_n3924_, new_n3716_ ) -new_n12103_ = NAND ( new_n12102_, NET_759 ) -new_n12104_ = NAND ( new_n12103_, new_n12101_, new_n12100_ ) -new_n12105_ = AND ( new_n12104_, new_n12099_, new_n12097_ ) -new_n12106_ = NAND ( new_n12105_, new_n12095_, new_n12093_, new_n12078_ ) -new_n12107_ = NAND ( new_n12106_, new_n4448_ ) -new_n12108_ = OR ( new_n3995_, new_n3956_ ) -new_n12109_ = NAND ( new_n4381_, new_n3817_ ) -new_n12110_ = OR ( new_n12109_, new_n11841_ ) -new_n12111_ = NAND ( new_n12110_, new_n12108_, new_n12107_ ) -new_n12112_ = OR ( new_n4444_, new_n4432_ ) -new_n12113_ = NAND ( new_n12112_, new_n4435_ ) -new_n12114_ = NAND ( new_n12113_, new_n6862_ ) -new_n12115_ = NAND ( new_n12114_, new_n4381_ ) -new_n12116_ = OR ( new_n5826_, new_n6123_ ) -new_n12117_ = NAND ( new_n12116_, new_n12115_ ) -new_n12118_ = NAND ( new_n12117_, new_n5811_ ) -new_n12119_ = NAND ( new_n6640_, new_n6637_ ) -new_n12120_ = NAND ( new_n12119_, new_n4381_ ) -new_n12121_ = OR ( new_n5822_, new_n3974_ ) -new_n12122_ = NAND ( new_n4405_, new_n3975_ ) -new_n12123_ = NAND ( new_n12122_, new_n6132_ ) -new_n12124_ = NAND ( new_n12123_, new_n12121_, new_n6904_ ) -new_n12125_ = NOR ( new_n12124_, new_n6902_, new_n6892_, new_n6131_ ) -new_n12126_ = NAND ( new_n12125_, new_n12120_, new_n12118_ ) -new_n12127_ = NAND ( new_n12126_, new_n5808_ ) -new_n12128_ = NAND ( new_n12127_, new_n6615_, new_n6605_ ) -new_n12129_ = NAND ( new_n12128_, new_n12111_ ) -new_n12130_ = OR ( new_n12128_, new_n3712_ ) -NET_18619 = NAND ( new_n12130_, new_n12129_ ) -new_n12132_ = NOT ( new_n11909_ ) -new_n12133_ = NAND ( new_n7018_, new_n4877_ ) -new_n12134_ = NAND ( new_n12133_, new_n7040_ ) -new_n12135_ = NAND ( new_n12134_, new_n5149_ ) -new_n12136_ = NAND ( new_n12135_, new_n11864_, new_n7123_, new_n7022_ ) -new_n12137_ = NAND ( new_n12136_, new_n12132_ ) -new_n12138_ = NOT ( new_n7169_ ) -new_n12139_ = NOR ( new_n6669_, new_n4719_ ) -new_n12140_ = NOR ( new_n4668_, new_n4721_ ) -new_n12141_ = AND ( new_n6663_, new_n5171_ ) -new_n12142_ = NOR ( new_n12141_, new_n4519_ ) -new_n12143_ = NOR ( new_n12142_, new_n5185_ ) -new_n12144_ = NOR ( new_n12143_, new_n12140_ ) -new_n12145_ = NOT ( new_n5188_ ) -new_n12146_ = NOR ( new_n7057_, new_n6515_ ) -new_n12147_ = NOR ( new_n12146_, new_n6681_ ) -new_n12148_ = OR ( new_n12147_, new_n5149_ ) -new_n12149_ = NAND ( new_n7029_, new_n5149_ ) -new_n12150_ = NAND ( new_n12149_, new_n12148_, new_n7067_, new_n12145_ ) -new_n12151_ = OR ( new_n12150_, new_n12144_, new_n12139_ ) -new_n12152_ = NAND ( new_n12151_, new_n12138_ ) -new_n12153_ = NAND ( new_n7110_, new_n11863_ ) -new_n12154_ = NAND ( new_n12153_, new_n10091_ ) -new_n12155_ = NAND ( new_n11873_, new_n11872_, new_n6195_ ) -new_n12156_ = NAND ( new_n12155_, new_n4746_ ) -new_n12157_ = NOR ( new_n4480_, new_n4475_ ) -new_n12158_ = OR ( new_n12157_, new_n6685_ ) -new_n12159_ = NOT ( new_n4470_ ) -new_n12160_ = NOT ( new_n6682_ ) -new_n12161_ = NOR ( new_n4668_, new_n4460_ ) -new_n12162_ = NAND ( new_n12161_, NET_1208 ) -new_n12163_ = NAND ( new_n12162_, new_n12160_, new_n12159_ ) -new_n12164_ = AND ( new_n12163_, new_n12158_, new_n12156_ ) -new_n12165_ = NAND ( new_n12164_, new_n12154_, new_n12152_, new_n12137_ ) -new_n12166_ = NAND ( new_n12165_, new_n5192_ ) -new_n12167_ = OR ( new_n4739_, new_n4700_ ) -new_n12168_ = NAND ( new_n5125_, new_n4561_ ) -new_n12169_ = OR ( new_n12168_, new_n11909_ ) -new_n12170_ = NAND ( new_n12169_, new_n12167_, new_n12166_ ) -new_n12171_ = OR ( new_n5188_, new_n5176_ ) -new_n12172_ = NAND ( new_n12171_, new_n5179_ ) -new_n12173_ = NAND ( new_n12172_, new_n7022_ ) -new_n12174_ = NAND ( new_n12173_, new_n5125_ ) -new_n12175_ = OR ( new_n6195_, new_n6508_ ) -new_n12176_ = NAND ( new_n12175_, new_n12174_ ) -new_n12177_ = NAND ( new_n12176_, new_n6180_ ) -new_n12178_ = NAND ( new_n6685_, new_n6682_ ) -new_n12179_ = NAND ( new_n12178_, new_n5125_ ) -new_n12180_ = OR ( new_n6191_, new_n4718_ ) -new_n12181_ = NAND ( new_n5149_, new_n4719_ ) -new_n12182_ = NAND ( new_n12181_, new_n6517_ ) -new_n12183_ = NAND ( new_n12182_, new_n12180_, new_n7064_ ) -new_n12184_ = NOR ( new_n12183_, new_n7062_, new_n7052_, new_n6516_ ) -new_n12185_ = NAND ( new_n12184_, new_n12179_, new_n12177_ ) -new_n12186_ = NAND ( new_n12185_, new_n6177_ ) -new_n12187_ = NAND ( new_n12186_, new_n6660_, new_n6650_ ) -new_n12188_ = NAND ( new_n12187_, new_n12170_ ) -new_n12189_ = OR ( new_n12187_, new_n4456_ ) -NET_18634 = NAND ( new_n12189_, new_n12188_ ) -new_n12191_ = NOR ( new_n11723_, new_n11589_ ) -new_n12192_ = NAND ( new_n11732_, NET_308 ) -new_n12193_ = NAND ( new_n11740_, NET_320 ) -new_n12194_ = NOT ( NET_352 ) -new_n12195_ = OR ( new_n6828_, new_n12194_ ) -new_n12196_ = NAND ( new_n5529_, NET_511 ) -new_n12197_ = NAND ( new_n12196_, new_n12195_, new_n12193_, new_n12192_ ) -new_n12198_ = NOR ( new_n12197_, new_n12191_ ) -new_n12199_ = XOR ( new_n12198_, new_n6707_ ) -new_n12200_ = NOR ( new_n6794_, new_n3011_ ) -new_n12201_ = XNOR ( new_n12200_, new_n12199_ ) -new_n12202_ = NAND ( new_n11956_, new_n11953_ ) -new_n12203_ = NAND ( new_n12202_, new_n11950_ ) -new_n12204_ = XOR ( new_n12203_, new_n12201_ ) -new_n12205_ = OR ( new_n12204_, new_n11715_ ) -new_n12206_ = NAND ( new_n11713_, NET_479 ) -new_n12207_ = OR ( new_n11775_, new_n11589_ ) -NET_18697 = NAND ( new_n12207_, new_n12206_, new_n12205_ ) -new_n12209_ = NOT ( new_n11918_ ) -new_n12210_ = AND ( new_n12018_, new_n12209_ ) -new_n12211_ = NOT ( new_n8599_ ) -new_n12212_ = NAND ( new_n12033_, new_n12211_ ) -new_n12213_ = NAND ( new_n12035_, new_n7356_ ) -new_n12214_ = NAND ( new_n12037_, new_n3254_ ) -new_n12215_ = NAND ( new_n12060_, new_n2971_ ) -new_n12216_ = NAND ( new_n12215_, new_n12214_, new_n12213_, new_n12212_ ) -new_n12217_ = NOR ( new_n12216_, new_n12210_ ) -new_n12218_ = OR ( new_n12217_, new_n5509_ ) -new_n12219_ = OR ( new_n12050_, new_n11918_ ) -new_n12220_ = NAND ( new_n3446_, NET_177 ) -new_n12221_ = NAND ( new_n12220_, new_n12219_, new_n12218_ ) -new_n12222_ = NAND ( new_n12221_, new_n12069_ ) -new_n12223_ = OR ( new_n12069_, new_n2971_ ) -NET_18708 = NAND ( new_n12223_, new_n12222_ ) -new_n12225_ = NOR ( new_n11791_, new_n11645_ ) -new_n12226_ = NAND ( new_n11800_, NET_757 ) -new_n12227_ = NAND ( new_n11808_, NET_769 ) -new_n12228_ = NOT ( NET_801 ) -new_n12229_ = OR ( new_n6988_, new_n12228_ ) -new_n12230_ = NAND ( new_n5827_, NET_960 ) -new_n12231_ = NAND ( new_n12230_, new_n12229_, new_n12227_, new_n12226_ ) -new_n12232_ = NOR ( new_n12231_, new_n12225_ ) -new_n12233_ = XOR ( new_n12232_, new_n6867_ ) -new_n12234_ = NOR ( new_n6954_, new_n3756_ ) -new_n12235_ = XNOR ( new_n12234_, new_n12233_ ) -new_n12236_ = NAND ( new_n11981_, new_n11978_ ) -new_n12237_ = NAND ( new_n12236_, new_n11975_ ) -new_n12238_ = XOR ( new_n12237_, new_n12235_ ) -new_n12239_ = OR ( new_n12238_, new_n11783_ ) -new_n12240_ = NAND ( new_n11781_, NET_928 ) -new_n12241_ = OR ( new_n11843_, new_n11645_ ) -NET_18719 = NAND ( new_n12241_, new_n12240_, new_n12239_ ) -new_n12243_ = NOT ( new_n11926_ ) -new_n12244_ = AND ( new_n12077_, new_n12243_ ) -new_n12245_ = NOT ( new_n10067_ ) -new_n12246_ = NAND ( new_n12092_, new_n12245_ ) -new_n12247_ = NAND ( new_n12094_, new_n8824_ ) -new_n12248_ = NAND ( new_n12096_, new_n3999_ ) -new_n12249_ = NAND ( new_n12119_, new_n3716_ ) -new_n12250_ = NAND ( new_n12249_, new_n12248_, new_n12247_, new_n12246_ ) -new_n12251_ = NOR ( new_n12250_, new_n12244_ ) -new_n12252_ = OR ( new_n12251_, new_n5807_ ) -new_n12253_ = OR ( new_n12109_, new_n11926_ ) -new_n12254_ = NAND ( new_n4191_, NET_626 ) -new_n12255_ = NAND ( new_n12254_, new_n12253_, new_n12252_ ) -new_n12256_ = NAND ( new_n12255_, new_n12128_ ) -new_n12257_ = OR ( new_n12128_, new_n3716_ ) -NET_18730 = NAND ( new_n12257_, new_n12256_ ) -new_n12259_ = NOR ( new_n11859_, new_n11701_ ) -new_n12260_ = NAND ( new_n11868_, NET_1206 ) -new_n12261_ = NAND ( new_n11876_, NET_1218 ) -new_n12262_ = NOT ( NET_1250 ) -new_n12263_ = OR ( new_n7148_, new_n12262_ ) -new_n12264_ = NAND ( new_n6196_, NET_1409 ) -new_n12265_ = NAND ( new_n12264_, new_n12263_, new_n12261_, new_n12260_ ) -new_n12266_ = NOR ( new_n12265_, new_n12259_ ) -new_n12267_ = XOR ( new_n12266_, new_n7027_ ) -new_n12268_ = NOR ( new_n7114_, new_n4500_ ) -new_n12269_ = XNOR ( new_n12268_, new_n12267_ ) -new_n12270_ = NAND ( new_n12006_, new_n12003_ ) -new_n12271_ = NAND ( new_n12270_, new_n12000_ ) -new_n12272_ = XOR ( new_n12271_, new_n12269_ ) -new_n12273_ = OR ( new_n12272_, new_n11851_ ) -new_n12274_ = NAND ( new_n11849_, NET_1377 ) -new_n12275_ = OR ( new_n11911_, new_n11701_ ) -NET_18741 = NAND ( new_n12275_, new_n12274_, new_n12273_ ) -new_n12277_ = NOT ( new_n11934_ ) -new_n12278_ = AND ( new_n12136_, new_n12277_ ) -new_n12279_ = NOT ( new_n11537_ ) -new_n12280_ = NAND ( new_n12151_, new_n12279_ ) -new_n12281_ = NAND ( new_n12153_, new_n10294_ ) -new_n12282_ = NAND ( new_n12155_, new_n4743_ ) -new_n12283_ = NAND ( new_n12178_, new_n4460_ ) -new_n12284_ = NAND ( new_n12283_, new_n12282_, new_n12281_, new_n12280_ ) -new_n12285_ = NOR ( new_n12284_, new_n12278_ ) -new_n12286_ = OR ( new_n12285_, new_n6176_ ) -new_n12287_ = OR ( new_n12168_, new_n11934_ ) -new_n12288_ = NAND ( new_n4935_, NET_1075 ) -new_n12289_ = NAND ( new_n12288_, new_n12287_, new_n12286_ ) -new_n12290_ = NAND ( new_n12289_, new_n12187_ ) -new_n12291_ = OR ( new_n12187_, new_n4460_ ) -NET_18752 = NAND ( new_n12291_, new_n12290_ ) -new_n12293_ = NOT ( NET_321 ) -new_n12294_ = NOT ( new_n6728_ ) -new_n12295_ = NOR ( new_n12294_, new_n12293_ ) -new_n12296_ = NOR ( new_n3179_, new_n12293_ ) -new_n12297_ = XOR ( new_n12296_, new_n11554_ ) -new_n12298_ = OR ( new_n12297_, new_n6794_ ) -new_n12299_ = NOT ( NET_480 ) -new_n12300_ = OR ( new_n6792_, new_n12299_ ) -new_n12301_ = NAND ( new_n6695_, NET_353 ) -new_n12302_ = NAND ( new_n6804_, NET_448 ) -new_n12303_ = NAND ( new_n12302_, new_n12301_, new_n12300_, new_n12298_ ) -new_n12304_ = NOR ( new_n12303_, new_n12295_ ) -new_n12305_ = XNOR ( new_n12304_, new_n5529_ ) -new_n12306_ = NOT ( new_n12305_ ) -new_n12307_ = NOR ( new_n12306_, new_n11587_ ) -new_n12308_ = AND ( new_n12306_, new_n11587_ ) -new_n12309_ = OR ( new_n12308_, new_n12307_ ) -new_n12310_ = NOR ( new_n12309_, new_n11723_ ) -new_n12311_ = NAND ( new_n11740_, NET_321 ) -new_n12312_ = NOR ( new_n11727_, new_n3082_ ) -new_n12313_ = OR ( new_n12312_, new_n6703_ ) -new_n12314_ = NAND ( new_n12313_, NET_307 ) -new_n12315_ = NOT ( NET_353 ) -new_n12316_ = OR ( new_n6828_, new_n12315_ ) -new_n12317_ = NAND ( new_n5529_, NET_512 ) -new_n12318_ = NAND ( new_n12317_, new_n12316_, new_n12314_, new_n12311_ ) -new_n12319_ = NOR ( new_n12318_, new_n12310_ ) -new_n12320_ = XOR ( new_n12319_, new_n6707_ ) -new_n12321_ = NOR ( new_n6794_, new_n3562_ ) -new_n12322_ = OR ( new_n12321_, new_n12320_ ) -new_n12323_ = NAND ( new_n12321_, new_n12320_ ) -new_n12324_ = NAND ( new_n12323_, new_n12322_ ) -new_n12325_ = NAND ( new_n12200_, new_n12199_ ) -new_n12326_ = OR ( new_n12200_, new_n12199_ ) -new_n12327_ = NAND ( new_n12203_, new_n12326_ ) -new_n12328_ = NAND ( new_n12327_, new_n12325_ ) -new_n12329_ = XNOR ( new_n12328_, new_n12324_ ) -new_n12330_ = NAND ( new_n12329_, new_n11714_ ) -new_n12331_ = OR ( new_n12309_, new_n11775_ ) -new_n12332_ = NAND ( new_n11713_, NET_480 ) -NET_19069 = NAND ( new_n12332_, new_n12331_, new_n12330_ ) -new_n12334_ = NOT ( new_n11959_ ) -new_n12335_ = NAND ( new_n12018_, new_n12334_ ) -new_n12336_ = NOT ( new_n11594_ ) -new_n12337_ = NAND ( new_n12033_, new_n12336_ ) -new_n12338_ = NAND ( new_n12035_, new_n7608_ ) -new_n12339_ = NAND ( new_n12037_, new_n3252_ ) -new_n12340_ = XOR ( new_n3179_, new_n2975_ ) -new_n12341_ = XOR ( new_n12340_, new_n2977_ ) -new_n12342_ = OR ( new_n12341_, new_n6595_ ) -new_n12343_ = NOT ( new_n2977_ ) -new_n12344_ = NOR ( new_n3179_, new_n12343_ ) -new_n12345_ = NOR ( new_n12344_, NET_309 ) -new_n12346_ = AND ( new_n12344_, NET_309 ) -new_n12347_ = NOR ( new_n12346_, new_n12345_ ) -new_n12348_ = OR ( new_n12347_, new_n6592_ ) -new_n12349_ = AND ( new_n12348_, new_n12342_, new_n12339_ ) -new_n12350_ = NAND ( new_n12349_, new_n12338_, new_n12337_, new_n12335_ ) -new_n12351_ = NAND ( new_n12350_, new_n3703_ ) -new_n12352_ = OR ( new_n3262_, new_n3211_ ) -new_n12353_ = OR ( new_n12050_, new_n11959_ ) -new_n12354_ = NAND ( new_n12353_, new_n12352_, new_n12351_ ) -new_n12355_ = NAND ( new_n12354_, new_n12069_ ) -new_n12356_ = OR ( new_n12069_, new_n2975_ ) -NET_19070 = NAND ( new_n12356_, new_n12355_ ) -new_n12358_ = NAND ( new_n12329_, new_n12069_, new_n6701_, new_n3703_ ) -new_n12359_ = OR ( new_n12069_, new_n3329_ ) -NET_19071 = NAND ( new_n12359_, new_n12358_ ) -new_n12361_ = NOT ( NET_770 ) -new_n12362_ = NOT ( new_n6888_ ) -new_n12363_ = NOR ( new_n12362_, new_n12361_ ) -new_n12364_ = NOR ( new_n3924_, new_n12361_ ) -new_n12365_ = XOR ( new_n12364_, new_n11610_ ) -new_n12366_ = OR ( new_n12365_, new_n6954_ ) -new_n12367_ = NOT ( NET_929 ) -new_n12368_ = OR ( new_n6952_, new_n12367_ ) -new_n12369_ = NAND ( new_n6855_, NET_802 ) -new_n12370_ = NAND ( new_n6964_, NET_897 ) -new_n12371_ = NAND ( new_n12370_, new_n12369_, new_n12368_, new_n12366_ ) -new_n12372_ = NOR ( new_n12371_, new_n12363_ ) -new_n12373_ = XNOR ( new_n12372_, new_n5827_ ) -new_n12374_ = NOT ( new_n12373_ ) -new_n12375_ = NOR ( new_n12374_, new_n11643_ ) -new_n12376_ = AND ( new_n12374_, new_n11643_ ) -new_n12377_ = OR ( new_n12376_, new_n12375_ ) -new_n12378_ = NOR ( new_n12377_, new_n11791_ ) -new_n12379_ = NAND ( new_n11808_, NET_770 ) -new_n12380_ = NOR ( new_n11795_, new_n3827_ ) -new_n12381_ = OR ( new_n12380_, new_n6863_ ) -new_n12382_ = NAND ( new_n12381_, NET_756 ) -new_n12383_ = NOT ( NET_802 ) -new_n12384_ = OR ( new_n6988_, new_n12383_ ) -new_n12385_ = NAND ( new_n5827_, NET_961 ) -new_n12386_ = NAND ( new_n12385_, new_n12384_, new_n12382_, new_n12379_ ) -new_n12387_ = NOR ( new_n12386_, new_n12378_ ) -new_n12388_ = XOR ( new_n12387_, new_n6867_ ) -new_n12389_ = NOR ( new_n6954_, new_n4307_ ) -new_n12390_ = OR ( new_n12389_, new_n12388_ ) -new_n12391_ = NAND ( new_n12389_, new_n12388_ ) -new_n12392_ = NAND ( new_n12391_, new_n12390_ ) -new_n12393_ = NAND ( new_n12234_, new_n12233_ ) -new_n12394_ = OR ( new_n12234_, new_n12233_ ) -new_n12395_ = NAND ( new_n12237_, new_n12394_ ) -new_n12396_ = NAND ( new_n12395_, new_n12393_ ) -new_n12397_ = XNOR ( new_n12396_, new_n12392_ ) -new_n12398_ = NAND ( new_n12397_, new_n11782_ ) -new_n12399_ = OR ( new_n12377_, new_n11843_ ) -new_n12400_ = NAND ( new_n11781_, NET_929 ) -NET_19158 = NAND ( new_n12400_, new_n12399_, new_n12398_ ) -new_n12402_ = NOT ( new_n11984_ ) -new_n12403_ = NAND ( new_n12077_, new_n12402_ ) -new_n12404_ = NOT ( new_n11650_ ) -new_n12405_ = NAND ( new_n12092_, new_n12404_ ) -new_n12406_ = NAND ( new_n12094_, new_n9076_ ) -new_n12407_ = NAND ( new_n12096_, new_n3997_ ) -new_n12408_ = XOR ( new_n3924_, new_n3720_ ) -new_n12409_ = XOR ( new_n12408_, new_n3722_ ) -new_n12410_ = OR ( new_n12409_, new_n6640_ ) -new_n12411_ = NOT ( new_n3722_ ) -new_n12412_ = NOR ( new_n3924_, new_n12411_ ) -new_n12413_ = NOR ( new_n12412_, NET_758 ) -new_n12414_ = AND ( new_n12412_, NET_758 ) -new_n12415_ = NOR ( new_n12414_, new_n12413_ ) -new_n12416_ = OR ( new_n12415_, new_n6637_ ) -new_n12417_ = AND ( new_n12416_, new_n12410_, new_n12407_ ) -new_n12418_ = NAND ( new_n12417_, new_n12406_, new_n12405_, new_n12403_ ) -new_n12419_ = NAND ( new_n12418_, new_n4448_ ) -new_n12420_ = OR ( new_n4007_, new_n3956_ ) -new_n12421_ = OR ( new_n12109_, new_n11984_ ) -new_n12422_ = NAND ( new_n12421_, new_n12420_, new_n12419_ ) -new_n12423_ = NAND ( new_n12422_, new_n12128_ ) -new_n12424_ = OR ( new_n12128_, new_n3720_ ) -NET_19159 = NAND ( new_n12424_, new_n12423_ ) -new_n12426_ = NAND ( new_n12397_, new_n12128_, new_n6861_, new_n4448_ ) -new_n12427_ = OR ( new_n12128_, new_n4074_ ) -NET_19160 = NAND ( new_n12427_, new_n12426_ ) -new_n12429_ = NOT ( NET_1219 ) -new_n12430_ = NOT ( new_n7048_ ) -new_n12431_ = NOR ( new_n12430_, new_n12429_ ) -new_n12432_ = NOR ( new_n4668_, new_n12429_ ) -new_n12433_ = XOR ( new_n12432_, new_n11666_ ) -new_n12434_ = OR ( new_n12433_, new_n7114_ ) -new_n12435_ = NOT ( NET_1378 ) -new_n12436_ = OR ( new_n7112_, new_n12435_ ) -new_n12437_ = NAND ( new_n7015_, NET_1251 ) -new_n12438_ = NAND ( new_n7124_, NET_1346 ) -new_n12439_ = NAND ( new_n12438_, new_n12437_, new_n12436_, new_n12434_ ) -new_n12440_ = NOR ( new_n12439_, new_n12431_ ) -new_n12441_ = XNOR ( new_n12440_, new_n6196_ ) -new_n12442_ = NOT ( new_n12441_ ) -new_n12443_ = NOR ( new_n12442_, new_n11699_ ) -new_n12444_ = AND ( new_n12442_, new_n11699_ ) -new_n12445_ = OR ( new_n12444_, new_n12443_ ) -new_n12446_ = NOR ( new_n12445_, new_n11859_ ) -new_n12447_ = NAND ( new_n11876_, NET_1219 ) -new_n12448_ = NOR ( new_n11863_, new_n4571_ ) -new_n12449_ = OR ( new_n12448_, new_n7023_ ) -new_n12450_ = NAND ( new_n12449_, NET_1205 ) -new_n12451_ = NOT ( NET_1251 ) -new_n12452_ = OR ( new_n7148_, new_n12451_ ) -new_n12453_ = NAND ( new_n6196_, NET_1410 ) -new_n12454_ = NAND ( new_n12453_, new_n12452_, new_n12450_, new_n12447_ ) -new_n12455_ = NOR ( new_n12454_, new_n12446_ ) -new_n12456_ = XOR ( new_n12455_, new_n7027_ ) -new_n12457_ = NOR ( new_n7114_, new_n5051_ ) -new_n12458_ = OR ( new_n12457_, new_n12456_ ) -new_n12459_ = NAND ( new_n12457_, new_n12456_ ) -new_n12460_ = NAND ( new_n12459_, new_n12458_ ) -new_n12461_ = NAND ( new_n12268_, new_n12267_ ) -new_n12462_ = OR ( new_n12268_, new_n12267_ ) -new_n12463_ = NAND ( new_n12271_, new_n12462_ ) -new_n12464_ = NAND ( new_n12463_, new_n12461_ ) -new_n12465_ = XNOR ( new_n12464_, new_n12460_ ) -new_n12466_ = NAND ( new_n12465_, new_n11850_ ) -new_n12467_ = OR ( new_n12445_, new_n11911_ ) -new_n12468_ = NAND ( new_n11849_, NET_1378 ) -NET_19247 = NAND ( new_n12468_, new_n12467_, new_n12466_ ) -new_n12470_ = NOT ( new_n12009_ ) -new_n12471_ = NAND ( new_n12136_, new_n12470_ ) -new_n12472_ = NOT ( new_n11706_ ) -new_n12473_ = NAND ( new_n12151_, new_n12472_ ) -new_n12474_ = NAND ( new_n12153_, new_n10546_ ) -new_n12475_ = NAND ( new_n12155_, new_n4741_ ) -new_n12476_ = XOR ( new_n4668_, new_n4464_ ) -new_n12477_ = XOR ( new_n12476_, new_n4466_ ) -new_n12478_ = OR ( new_n12477_, new_n6685_ ) -new_n12479_ = NOT ( new_n4466_ ) -new_n12480_ = NOR ( new_n4668_, new_n12479_ ) -new_n12481_ = NOR ( new_n12480_, NET_1207 ) -new_n12482_ = AND ( new_n12480_, NET_1207 ) -new_n12483_ = NOR ( new_n12482_, new_n12481_ ) -new_n12484_ = OR ( new_n12483_, new_n6682_ ) -new_n12485_ = AND ( new_n12484_, new_n12478_, new_n12475_ ) -new_n12486_ = NAND ( new_n12485_, new_n12474_, new_n12473_, new_n12471_ ) -new_n12487_ = NAND ( new_n12486_, new_n5192_ ) -new_n12488_ = OR ( new_n4751_, new_n4700_ ) -new_n12489_ = OR ( new_n12168_, new_n12009_ ) -new_n12490_ = NAND ( new_n12489_, new_n12488_, new_n12487_ ) -new_n12491_ = NAND ( new_n12490_, new_n12187_ ) -new_n12492_ = OR ( new_n12187_, new_n4464_ ) -NET_19248 = NAND ( new_n12492_, new_n12491_ ) -new_n12494_ = NAND ( new_n12465_, new_n12187_, new_n7021_, new_n5192_ ) -new_n12495_ = OR ( new_n12187_, new_n4818_ ) -NET_19249 = NAND ( new_n12495_, new_n12494_ ) -new_n12497_ = NOR ( new_n6794_, new_n3111_ ) -new_n12498_ = NOT ( NET_322 ) -new_n12499_ = NOR ( new_n12294_, new_n12498_ ) -new_n12500_ = NAND ( new_n11549_, new_n3696_, NET_321, NET_320 ) -new_n12501_ = OR ( new_n3179_, new_n12498_ ) -new_n12502_ = AND ( new_n12501_, new_n12500_ ) -new_n12503_ = NOR ( new_n12501_, new_n12500_ ) -new_n12504_ = OR ( new_n12503_, new_n12502_ ) -new_n12505_ = OR ( new_n12504_, new_n6794_ ) -new_n12506_ = NOT ( NET_481 ) -new_n12507_ = OR ( new_n6792_, new_n12506_ ) -new_n12508_ = NAND ( new_n6695_, NET_354 ) -new_n12509_ = NAND ( new_n6804_, NET_449 ) -new_n12510_ = NAND ( new_n12509_, new_n12508_, new_n12507_, new_n12505_ ) -new_n12511_ = NOR ( new_n12510_, new_n12499_ ) -new_n12512_ = XNOR ( new_n12511_, new_n5529_ ) -new_n12513_ = NOR ( new_n12512_, new_n12307_ ) -new_n12514_ = AND ( new_n12512_, new_n12307_ ) -new_n12515_ = OR ( new_n12514_, new_n12513_ ) -new_n12516_ = OR ( new_n12515_, new_n11723_ ) -new_n12517_ = NAND ( new_n11740_, NET_322 ) -new_n12518_ = NOT ( NET_354 ) -new_n12519_ = OR ( new_n6828_, new_n12518_ ) -new_n12520_ = NAND ( new_n5529_, NET_513 ) -new_n12521_ = NAND ( new_n12520_, new_n12519_, new_n12517_, new_n12516_ ) -new_n12522_ = XNOR ( new_n12521_, new_n6707_ ) -new_n12523_ = NAND ( new_n12522_, new_n12497_ ) -new_n12524_ = OR ( new_n12522_, new_n12497_ ) -new_n12525_ = NAND ( new_n12524_, new_n12523_ ) -new_n12526_ = NAND ( new_n12328_, new_n12322_ ) -new_n12527_ = NAND ( new_n12526_, new_n12323_ ) -new_n12528_ = XOR ( new_n12527_, new_n12525_ ) -new_n12529_ = OR ( new_n12528_, new_n11715_ ) -new_n12530_ = OR ( new_n12515_, new_n11775_ ) -new_n12531_ = NAND ( new_n11713_, NET_481 ) -NET_19479 = NAND ( new_n12531_, new_n12530_, new_n12529_ ) -new_n12533_ = OR ( new_n12204_, new_n12050_ ) -new_n12534_ = XNOR ( new_n12203_, new_n12201_ ) -new_n12535_ = NAND ( new_n12534_, new_n12018_ ) -new_n12536_ = NOT ( new_n11589_ ) -new_n12537_ = NAND ( new_n12033_, new_n12536_ ) -new_n12538_ = NAND ( new_n12035_, new_n7201_ ) -new_n12539_ = NAND ( new_n12037_, new_n3263_ ) -new_n12540_ = NOT ( new_n2987_ ) -new_n12541_ = OR ( new_n12344_, new_n12540_ ) -new_n12542_ = OR ( new_n12345_, new_n2966_ ) -new_n12543_ = NAND ( new_n12542_, new_n12541_ ) -new_n12544_ = OR ( new_n12543_, new_n6592_ ) -new_n12545_ = NAND ( new_n3179_, new_n3002_ ) -new_n12546_ = OR ( new_n12340_, new_n12343_ ) -new_n12547_ = OR ( new_n3179_, NET_308 ) -new_n12548_ = NAND ( new_n12547_, new_n12546_, new_n12540_ ) -new_n12549_ = OR ( new_n12546_, NET_308 ) -new_n12550_ = NAND ( new_n12549_, new_n12548_ ) -new_n12551_ = NAND ( new_n12550_, new_n12545_ ) -new_n12552_ = OR ( new_n12551_, new_n6595_ ) -new_n12553_ = AND ( new_n12552_, new_n12544_, new_n12539_ ) -new_n12554_ = NAND ( new_n12553_, new_n12538_, new_n12537_, new_n12535_ ) -new_n12555_ = NAND ( new_n12554_, new_n3703_ ) -new_n12556_ = NAND ( new_n12555_, new_n12533_ ) -new_n12557_ = NAND ( new_n12556_, new_n12069_ ) -new_n12558_ = OR ( new_n12069_, new_n2966_ ) -NET_19480 = NAND ( new_n12558_, new_n12557_ ) -new_n12560_ = NOR ( new_n6954_, new_n3856_ ) -new_n12561_ = NOT ( NET_771 ) -new_n12562_ = NOR ( new_n12362_, new_n12561_ ) -new_n12563_ = NAND ( new_n11605_, new_n4441_, NET_770, NET_769 ) -new_n12564_ = OR ( new_n3924_, new_n12561_ ) -new_n12565_ = AND ( new_n12564_, new_n12563_ ) -new_n12566_ = NOR ( new_n12564_, new_n12563_ ) -new_n12567_ = OR ( new_n12566_, new_n12565_ ) -new_n12568_ = OR ( new_n12567_, new_n6954_ ) -new_n12569_ = NOT ( NET_930 ) -new_n12570_ = OR ( new_n6952_, new_n12569_ ) -new_n12571_ = NAND ( new_n6855_, NET_803 ) -new_n12572_ = NAND ( new_n6964_, NET_898 ) -new_n12573_ = NAND ( new_n12572_, new_n12571_, new_n12570_, new_n12568_ ) -new_n12574_ = NOR ( new_n12573_, new_n12562_ ) -new_n12575_ = XNOR ( new_n12574_, new_n5827_ ) -new_n12576_ = NOR ( new_n12575_, new_n12375_ ) -new_n12577_ = AND ( new_n12575_, new_n12375_ ) -new_n12578_ = OR ( new_n12577_, new_n12576_ ) -new_n12579_ = OR ( new_n12578_, new_n11791_ ) -new_n12580_ = NAND ( new_n11808_, NET_771 ) -new_n12581_ = NOT ( NET_803 ) -new_n12582_ = OR ( new_n6988_, new_n12581_ ) -new_n12583_ = NAND ( new_n5827_, NET_962 ) -new_n12584_ = NAND ( new_n12583_, new_n12582_, new_n12580_, new_n12579_ ) -new_n12585_ = XNOR ( new_n12584_, new_n6867_ ) -new_n12586_ = NAND ( new_n12585_, new_n12560_ ) -new_n12587_ = OR ( new_n12585_, new_n12560_ ) -new_n12588_ = NAND ( new_n12587_, new_n12586_ ) -new_n12589_ = NAND ( new_n12396_, new_n12390_ ) -new_n12590_ = NAND ( new_n12589_, new_n12391_ ) -new_n12591_ = XOR ( new_n12590_, new_n12588_ ) -new_n12592_ = OR ( new_n12591_, new_n11783_ ) -new_n12593_ = OR ( new_n12578_, new_n11843_ ) -new_n12594_ = NAND ( new_n11781_, NET_930 ) -NET_19497 = NAND ( new_n12594_, new_n12593_, new_n12592_ ) -new_n12596_ = OR ( new_n12238_, new_n12109_ ) -new_n12597_ = XNOR ( new_n12237_, new_n12235_ ) -new_n12598_ = NAND ( new_n12597_, new_n12077_ ) -new_n12599_ = NOT ( new_n11645_ ) -new_n12600_ = NAND ( new_n12092_, new_n12599_ ) -new_n12601_ = NAND ( new_n12094_, new_n8631_ ) -new_n12602_ = NAND ( new_n12096_, new_n4008_ ) -new_n12603_ = NOT ( new_n3732_ ) -new_n12604_ = OR ( new_n12412_, new_n12603_ ) -new_n12605_ = OR ( new_n12413_, new_n3711_ ) -new_n12606_ = NAND ( new_n12605_, new_n12604_ ) -new_n12607_ = OR ( new_n12606_, new_n6637_ ) -new_n12608_ = NAND ( new_n3924_, new_n3747_ ) -new_n12609_ = OR ( new_n12408_, new_n12411_ ) -new_n12610_ = OR ( new_n3924_, NET_757 ) -new_n12611_ = NAND ( new_n12610_, new_n12609_, new_n12603_ ) -new_n12612_ = OR ( new_n12609_, NET_757 ) -new_n12613_ = NAND ( new_n12612_, new_n12611_ ) -new_n12614_ = NAND ( new_n12613_, new_n12608_ ) -new_n12615_ = OR ( new_n12614_, new_n6640_ ) -new_n12616_ = AND ( new_n12615_, new_n12607_, new_n12602_ ) -new_n12617_ = NAND ( new_n12616_, new_n12601_, new_n12600_, new_n12598_ ) -new_n12618_ = NAND ( new_n12617_, new_n4448_ ) -new_n12619_ = NAND ( new_n12618_, new_n12596_ ) -new_n12620_ = NAND ( new_n12619_, new_n12128_ ) -new_n12621_ = OR ( new_n12128_, new_n3711_ ) -NET_19498 = NAND ( new_n12621_, new_n12620_ ) -new_n12623_ = NOR ( new_n7114_, new_n4600_ ) -new_n12624_ = NOT ( NET_1220 ) -new_n12625_ = NOR ( new_n12430_, new_n12624_ ) -new_n12626_ = NAND ( new_n11661_, new_n5185_, NET_1219, NET_1218 ) -new_n12627_ = OR ( new_n4668_, new_n12624_ ) -new_n12628_ = AND ( new_n12627_, new_n12626_ ) -new_n12629_ = NOR ( new_n12627_, new_n12626_ ) -new_n12630_ = OR ( new_n12629_, new_n12628_ ) -new_n12631_ = OR ( new_n12630_, new_n7114_ ) -new_n12632_ = NOT ( NET_1379 ) -new_n12633_ = OR ( new_n7112_, new_n12632_ ) -new_n12634_ = NAND ( new_n7015_, NET_1252 ) -new_n12635_ = NAND ( new_n7124_, NET_1347 ) -new_n12636_ = NAND ( new_n12635_, new_n12634_, new_n12633_, new_n12631_ ) -new_n12637_ = NOR ( new_n12636_, new_n12625_ ) -new_n12638_ = XNOR ( new_n12637_, new_n6196_ ) -new_n12639_ = NOR ( new_n12638_, new_n12443_ ) -new_n12640_ = AND ( new_n12638_, new_n12443_ ) -new_n12641_ = OR ( new_n12640_, new_n12639_ ) -new_n12642_ = OR ( new_n12641_, new_n11859_ ) -new_n12643_ = NAND ( new_n11876_, NET_1220 ) -new_n12644_ = NOT ( NET_1252 ) -new_n12645_ = OR ( new_n7148_, new_n12644_ ) -new_n12646_ = NAND ( new_n6196_, NET_1411 ) -new_n12647_ = NAND ( new_n12646_, new_n12645_, new_n12643_, new_n12642_ ) -new_n12648_ = XNOR ( new_n12647_, new_n7027_ ) -new_n12649_ = NAND ( new_n12648_, new_n12623_ ) -new_n12650_ = OR ( new_n12648_, new_n12623_ ) -new_n12651_ = NAND ( new_n12650_, new_n12649_ ) -new_n12652_ = NAND ( new_n12464_, new_n12458_ ) -new_n12653_ = NAND ( new_n12652_, new_n12459_ ) -new_n12654_ = XOR ( new_n12653_, new_n12651_ ) -new_n12655_ = OR ( new_n12654_, new_n11851_ ) -new_n12656_ = OR ( new_n12641_, new_n11911_ ) -new_n12657_ = NAND ( new_n11849_, NET_1379 ) -NET_19515 = NAND ( new_n12657_, new_n12656_, new_n12655_ ) -new_n12659_ = OR ( new_n12272_, new_n12168_ ) -new_n12660_ = XNOR ( new_n12271_, new_n12269_ ) -new_n12661_ = NAND ( new_n12660_, new_n12136_ ) -new_n12662_ = NOT ( new_n11701_ ) -new_n12663_ = NAND ( new_n12151_, new_n12662_ ) -new_n12664_ = NAND ( new_n12153_, new_n10099_ ) -new_n12665_ = NAND ( new_n12155_, new_n4752_ ) -new_n12666_ = NOT ( new_n4476_ ) -new_n12667_ = OR ( new_n12480_, new_n12666_ ) -new_n12668_ = OR ( new_n12481_, new_n4455_ ) -new_n12669_ = NAND ( new_n12668_, new_n12667_ ) -new_n12670_ = OR ( new_n12669_, new_n6682_ ) -new_n12671_ = NAND ( new_n4668_, new_n4491_ ) -new_n12672_ = OR ( new_n12476_, new_n12479_ ) -new_n12673_ = OR ( new_n4668_, NET_1206 ) -new_n12674_ = NAND ( new_n12673_, new_n12672_, new_n12666_ ) -new_n12675_ = OR ( new_n12672_, NET_1206 ) -new_n12676_ = NAND ( new_n12675_, new_n12674_ ) -new_n12677_ = NAND ( new_n12676_, new_n12671_ ) -new_n12678_ = OR ( new_n12677_, new_n6685_ ) -new_n12679_ = AND ( new_n12678_, new_n12670_, new_n12665_ ) -new_n12680_ = NAND ( new_n12679_, new_n12664_, new_n12663_, new_n12661_ ) -new_n12681_ = NAND ( new_n12680_, new_n5192_ ) -new_n12682_ = NAND ( new_n12681_, new_n12659_ ) -new_n12683_ = NAND ( new_n12682_, new_n12187_ ) -new_n12684_ = OR ( new_n12187_, new_n4455_ ) -NET_19516 = NAND ( new_n12684_, new_n12683_ ) -new_n12686_ = NOT ( NET_323 ) -new_n12687_ = NOR ( new_n12294_, new_n12686_ ) -new_n12688_ = NOR ( new_n3179_, new_n12686_ ) -new_n12689_ = OR ( new_n12688_, new_n12503_ ) -new_n12690_ = NAND ( new_n12688_, new_n12503_ ) -new_n12691_ = NAND ( new_n12690_, new_n12689_ ) -new_n12692_ = OR ( new_n12691_, new_n6794_ ) -new_n12693_ = NOT ( NET_482 ) -new_n12694_ = OR ( new_n6792_, new_n12693_ ) -new_n12695_ = NAND ( new_n6695_, NET_355 ) -new_n12696_ = NAND ( new_n6804_, NET_450 ) -new_n12697_ = NAND ( new_n12696_, new_n12695_, new_n12694_, new_n12692_ ) -new_n12698_ = NOR ( new_n12697_, new_n12687_ ) -new_n12699_ = XNOR ( new_n12698_, new_n5529_ ) -new_n12700_ = NAND ( new_n12699_, new_n12512_, new_n12307_ ) -new_n12701_ = OR ( new_n12699_, new_n12514_ ) -new_n12702_ = NAND ( new_n12701_, new_n12700_ ) -new_n12703_ = OR ( new_n12702_, new_n11723_ ) -new_n12704_ = NAND ( new_n11740_, NET_323 ) -new_n12705_ = NOT ( NET_355 ) -new_n12706_ = OR ( new_n6828_, new_n12705_ ) -new_n12707_ = NAND ( new_n5529_, NET_514 ) -new_n12708_ = NAND ( new_n12707_, new_n12706_, new_n12704_, new_n12703_ ) -new_n12709_ = NAND ( new_n12708_, new_n6707_ ) -new_n12710_ = OR ( new_n12708_, new_n6707_ ) -new_n12711_ = NAND ( new_n12710_, new_n12709_ ) -new_n12712_ = NAND ( new_n12711_, new_n6596_, NET_300 ) -new_n12713_ = NAND ( new_n6596_, NET_300 ) -new_n12714_ = NAND ( new_n12713_, new_n12710_, new_n12709_ ) -new_n12715_ = NAND ( new_n12714_, new_n12712_ ) -new_n12716_ = NAND ( new_n12527_, new_n12524_ ) -new_n12717_ = NAND ( new_n12716_, new_n12715_, new_n12523_ ) -new_n12718_ = NAND ( new_n12716_, new_n12523_ ) -new_n12719_ = NAND ( new_n12718_, new_n12714_, new_n12712_ ) -new_n12720_ = NAND ( new_n12719_, new_n12717_ ) -new_n12721_ = OR ( new_n12720_, new_n11715_ ) -new_n12722_ = OR ( new_n12702_, new_n11775_ ) -new_n12723_ = NAND ( new_n11713_, NET_482 ) -NET_19702 = NAND ( new_n12723_, new_n12722_, new_n12721_ ) -new_n12725_ = NOT ( NET_772 ) -new_n12726_ = NOR ( new_n12362_, new_n12725_ ) -new_n12727_ = NOR ( new_n3924_, new_n12725_ ) -new_n12728_ = OR ( new_n12727_, new_n12566_ ) -new_n12729_ = NAND ( new_n12727_, new_n12566_ ) -new_n12730_ = NAND ( new_n12729_, new_n12728_ ) -new_n12731_ = OR ( new_n12730_, new_n6954_ ) -new_n12732_ = NOT ( NET_931 ) -new_n12733_ = OR ( new_n6952_, new_n12732_ ) -new_n12734_ = NAND ( new_n6855_, NET_804 ) -new_n12735_ = NAND ( new_n6964_, NET_899 ) -new_n12736_ = NAND ( new_n12735_, new_n12734_, new_n12733_, new_n12731_ ) -new_n12737_ = NOR ( new_n12736_, new_n12726_ ) -new_n12738_ = XNOR ( new_n12737_, new_n5827_ ) -new_n12739_ = NAND ( new_n12738_, new_n12575_, new_n12375_ ) -new_n12740_ = OR ( new_n12738_, new_n12577_ ) -new_n12741_ = NAND ( new_n12740_, new_n12739_ ) -new_n12742_ = OR ( new_n12741_, new_n11791_ ) -new_n12743_ = NAND ( new_n11808_, NET_772 ) -new_n12744_ = NOT ( NET_804 ) -new_n12745_ = OR ( new_n6988_, new_n12744_ ) -new_n12746_ = NAND ( new_n5827_, NET_963 ) -new_n12747_ = NAND ( new_n12746_, new_n12745_, new_n12743_, new_n12742_ ) -new_n12748_ = NAND ( new_n12747_, new_n6867_ ) -new_n12749_ = OR ( new_n12747_, new_n6867_ ) -new_n12750_ = NAND ( new_n12749_, new_n12748_ ) -new_n12751_ = NAND ( new_n12750_, new_n6641_, NET_749 ) -new_n12752_ = NAND ( new_n6641_, NET_749 ) -new_n12753_ = NAND ( new_n12752_, new_n12749_, new_n12748_ ) -new_n12754_ = NAND ( new_n12753_, new_n12751_ ) -new_n12755_ = NAND ( new_n12590_, new_n12587_ ) -new_n12756_ = NAND ( new_n12755_, new_n12754_, new_n12586_ ) -new_n12757_ = NAND ( new_n12755_, new_n12586_ ) -new_n12758_ = NAND ( new_n12757_, new_n12753_, new_n12751_ ) -new_n12759_ = NAND ( new_n12758_, new_n12756_ ) -new_n12760_ = OR ( new_n12759_, new_n11783_ ) -new_n12761_ = OR ( new_n12741_, new_n11843_ ) -new_n12762_ = NAND ( new_n11781_, NET_931 ) -NET_19714 = NAND ( new_n12762_, new_n12761_, new_n12760_ ) -new_n12764_ = NOT ( NET_1221 ) -new_n12765_ = NOR ( new_n12430_, new_n12764_ ) -new_n12766_ = NOR ( new_n4668_, new_n12764_ ) -new_n12767_ = OR ( new_n12766_, new_n12629_ ) -new_n12768_ = NAND ( new_n12766_, new_n12629_ ) -new_n12769_ = NAND ( new_n12768_, new_n12767_ ) -new_n12770_ = OR ( new_n12769_, new_n7114_ ) -new_n12771_ = NOT ( NET_1380 ) -new_n12772_ = OR ( new_n7112_, new_n12771_ ) -new_n12773_ = NAND ( new_n7015_, NET_1253 ) -new_n12774_ = NAND ( new_n7124_, NET_1348 ) -new_n12775_ = NAND ( new_n12774_, new_n12773_, new_n12772_, new_n12770_ ) -new_n12776_ = NOR ( new_n12775_, new_n12765_ ) -new_n12777_ = XNOR ( new_n12776_, new_n6196_ ) -new_n12778_ = NAND ( new_n12777_, new_n12638_, new_n12443_ ) -new_n12779_ = OR ( new_n12777_, new_n12640_ ) -new_n12780_ = NAND ( new_n12779_, new_n12778_ ) -new_n12781_ = OR ( new_n12780_, new_n11859_ ) -new_n12782_ = NAND ( new_n11876_, NET_1221 ) -new_n12783_ = NOT ( NET_1253 ) -new_n12784_ = OR ( new_n7148_, new_n12783_ ) -new_n12785_ = NAND ( new_n6196_, NET_1412 ) -new_n12786_ = NAND ( new_n12785_, new_n12784_, new_n12782_, new_n12781_ ) -new_n12787_ = NAND ( new_n12786_, new_n7027_ ) -new_n12788_ = OR ( new_n12786_, new_n7027_ ) -new_n12789_ = NAND ( new_n12788_, new_n12787_ ) -new_n12790_ = NAND ( new_n12789_, new_n6686_, NET_1198 ) -new_n12791_ = NAND ( new_n6686_, NET_1198 ) -new_n12792_ = NAND ( new_n12791_, new_n12788_, new_n12787_ ) -new_n12793_ = NAND ( new_n12792_, new_n12790_ ) -new_n12794_ = NAND ( new_n12653_, new_n12650_ ) -new_n12795_ = NAND ( new_n12794_, new_n12793_, new_n12649_ ) -new_n12796_ = NAND ( new_n12794_, new_n12649_ ) -new_n12797_ = NAND ( new_n12796_, new_n12792_, new_n12790_ ) -new_n12798_ = NAND ( new_n12797_, new_n12795_ ) -new_n12799_ = OR ( new_n12798_, new_n11851_ ) -new_n12800_ = OR ( new_n12780_, new_n11911_ ) -new_n12801_ = NAND ( new_n11849_, NET_1380 ) -NET_19726 = NAND ( new_n12801_, new_n12800_, new_n12799_ ) -new_n12803_ = NOT ( NET_324 ) -new_n12804_ = NOR ( new_n12294_, new_n12803_ ) -new_n12805_ = NOT ( new_n12690_ ) -new_n12806_ = NOR ( new_n3179_, new_n12803_ ) -new_n12807_ = NAND ( new_n12806_, new_n12805_ ) -new_n12808_ = OR ( new_n12806_, new_n12805_ ) -new_n12809_ = NAND ( new_n12808_, new_n12807_ ) -new_n12810_ = OR ( new_n12809_, new_n6794_ ) -new_n12811_ = NOT ( NET_483 ) -new_n12812_ = OR ( new_n6792_, new_n12811_ ) -new_n12813_ = NAND ( new_n6695_, NET_356 ) -new_n12814_ = NAND ( new_n6804_, NET_451 ) -new_n12815_ = NAND ( new_n12814_, new_n12813_, new_n12812_, new_n12810_ ) -new_n12816_ = NOR ( new_n12815_, new_n12804_ ) -new_n12817_ = XNOR ( new_n12816_, new_n5529_ ) -new_n12818_ = NOT ( new_n12817_ ) -new_n12819_ = NOR ( new_n12818_, new_n12700_ ) -new_n12820_ = AND ( new_n12818_, new_n12700_ ) -new_n12821_ = OR ( new_n12820_, new_n12819_ ) -new_n12822_ = OR ( new_n12821_, new_n11723_ ) -new_n12823_ = NAND ( new_n11740_, NET_324 ) -new_n12824_ = NOT ( NET_356 ) -new_n12825_ = OR ( new_n6828_, new_n12824_ ) -new_n12826_ = NAND ( new_n5529_, NET_515 ) -new_n12827_ = NAND ( new_n12826_, new_n12825_, new_n12823_, new_n12822_ ) -new_n12828_ = XNOR ( new_n12827_, new_n6707_ ) -new_n12829_ = NOR ( new_n6794_, new_n3611_ ) -new_n12830_ = OR ( new_n12829_, new_n12828_ ) -new_n12831_ = NAND ( new_n12829_, new_n12828_ ) -new_n12832_ = NAND ( new_n12831_, new_n12830_ ) -new_n12833_ = NAND ( new_n12718_, new_n12714_ ) -new_n12834_ = NAND ( new_n12833_, new_n12712_ ) -new_n12835_ = XOR ( new_n12834_, new_n12832_ ) -new_n12836_ = OR ( new_n12835_, new_n11715_ ) -new_n12837_ = OR ( new_n12821_, new_n11775_ ) -new_n12838_ = NAND ( new_n11713_, NET_483 ) -NET_19837 = NAND ( new_n12838_, new_n12837_, new_n12836_ ) -new_n12840_ = NOT ( NET_773 ) -new_n12841_ = NOR ( new_n12362_, new_n12840_ ) -new_n12842_ = NOT ( new_n12729_ ) -new_n12843_ = NOR ( new_n3924_, new_n12840_ ) -new_n12844_ = NAND ( new_n12843_, new_n12842_ ) -new_n12845_ = OR ( new_n12843_, new_n12842_ ) -new_n12846_ = NAND ( new_n12845_, new_n12844_ ) -new_n12847_ = OR ( new_n12846_, new_n6954_ ) -new_n12848_ = NOT ( NET_932 ) -new_n12849_ = OR ( new_n6952_, new_n12848_ ) -new_n12850_ = NAND ( new_n6855_, NET_805 ) -new_n12851_ = NAND ( new_n6964_, NET_900 ) -new_n12852_ = NAND ( new_n12851_, new_n12850_, new_n12849_, new_n12847_ ) -new_n12853_ = NOR ( new_n12852_, new_n12841_ ) -new_n12854_ = XNOR ( new_n12853_, new_n5827_ ) -new_n12855_ = NOT ( new_n12854_ ) -new_n12856_ = NOR ( new_n12855_, new_n12739_ ) -new_n12857_ = AND ( new_n12855_, new_n12739_ ) -new_n12858_ = OR ( new_n12857_, new_n12856_ ) -new_n12859_ = OR ( new_n12858_, new_n11791_ ) -new_n12860_ = NAND ( new_n11808_, NET_773 ) -new_n12861_ = NOT ( NET_805 ) -new_n12862_ = OR ( new_n6988_, new_n12861_ ) -new_n12863_ = NAND ( new_n5827_, NET_964 ) -new_n12864_ = NAND ( new_n12863_, new_n12862_, new_n12860_, new_n12859_ ) -new_n12865_ = XNOR ( new_n12864_, new_n6867_ ) -new_n12866_ = NOR ( new_n6954_, new_n4356_ ) -new_n12867_ = OR ( new_n12866_, new_n12865_ ) -new_n12868_ = NAND ( new_n12866_, new_n12865_ ) -new_n12869_ = NAND ( new_n12868_, new_n12867_ ) -new_n12870_ = NAND ( new_n12757_, new_n12753_ ) -new_n12871_ = NAND ( new_n12870_, new_n12751_ ) -new_n12872_ = XOR ( new_n12871_, new_n12869_ ) -new_n12873_ = OR ( new_n12872_, new_n11783_ ) -new_n12874_ = OR ( new_n12858_, new_n11843_ ) -new_n12875_ = NAND ( new_n11781_, NET_932 ) -NET_19847 = NAND ( new_n12875_, new_n12874_, new_n12873_ ) -new_n12877_ = NOT ( NET_1222 ) -new_n12878_ = NOR ( new_n12430_, new_n12877_ ) -new_n12879_ = NOT ( new_n12768_ ) -new_n12880_ = NOR ( new_n4668_, new_n12877_ ) -new_n12881_ = NAND ( new_n12880_, new_n12879_ ) -new_n12882_ = OR ( new_n12880_, new_n12879_ ) -new_n12883_ = NAND ( new_n12882_, new_n12881_ ) -new_n12884_ = OR ( new_n12883_, new_n7114_ ) -new_n12885_ = NOT ( NET_1381 ) -new_n12886_ = OR ( new_n7112_, new_n12885_ ) -new_n12887_ = NAND ( new_n7015_, NET_1254 ) -new_n12888_ = NAND ( new_n7124_, NET_1349 ) -new_n12889_ = NAND ( new_n12888_, new_n12887_, new_n12886_, new_n12884_ ) -new_n12890_ = NOR ( new_n12889_, new_n12878_ ) -new_n12891_ = XNOR ( new_n12890_, new_n6196_ ) -new_n12892_ = NOT ( new_n12891_ ) -new_n12893_ = NOR ( new_n12892_, new_n12778_ ) -new_n12894_ = AND ( new_n12892_, new_n12778_ ) -new_n12895_ = OR ( new_n12894_, new_n12893_ ) -new_n12896_ = OR ( new_n12895_, new_n11859_ ) -new_n12897_ = NAND ( new_n11876_, NET_1222 ) -new_n12898_ = NOT ( NET_1254 ) -new_n12899_ = OR ( new_n7148_, new_n12898_ ) -new_n12900_ = NAND ( new_n6196_, NET_1413 ) -new_n12901_ = NAND ( new_n12900_, new_n12899_, new_n12897_, new_n12896_ ) -new_n12902_ = XNOR ( new_n12901_, new_n7027_ ) -new_n12903_ = NOR ( new_n7114_, new_n5100_ ) -new_n12904_ = OR ( new_n12903_, new_n12902_ ) -new_n12905_ = NAND ( new_n12903_, new_n12902_ ) -new_n12906_ = NAND ( new_n12905_, new_n12904_ ) -new_n12907_ = NAND ( new_n12796_, new_n12792_ ) -new_n12908_ = NAND ( new_n12907_, new_n12790_ ) -new_n12909_ = XOR ( new_n12908_, new_n12906_ ) -new_n12910_ = OR ( new_n12909_, new_n11851_ ) -new_n12911_ = OR ( new_n12895_, new_n11911_ ) -new_n12912_ = NAND ( new_n11849_, NET_1381 ) -NET_19857 = NAND ( new_n12912_, new_n12911_, new_n12910_ ) -new_n12914_ = NAND ( new_n12834_, new_n12830_ ) -new_n12915_ = NAND ( new_n12914_, new_n12831_ ) -new_n12916_ = NOT ( NET_325 ) -new_n12917_ = NOR ( new_n12294_, new_n12916_ ) -new_n12918_ = NOR ( new_n3179_, new_n12916_ ) -new_n12919_ = XOR ( new_n12918_, new_n12807_ ) -new_n12920_ = OR ( new_n12919_, new_n6794_ ) -new_n12921_ = NOT ( NET_484 ) -new_n12922_ = OR ( new_n6792_, new_n12921_ ) -new_n12923_ = NAND ( new_n6695_, NET_357 ) -new_n12924_ = NAND ( new_n6804_, NET_452 ) -new_n12925_ = NAND ( new_n12924_, new_n12923_, new_n12922_, new_n12920_ ) -new_n12926_ = NOR ( new_n12925_, new_n12917_ ) -new_n12927_ = XNOR ( new_n12926_, new_n5529_ ) -new_n12928_ = NAND ( new_n2971_, NET_310, new_n2975_, new_n2966_ ) -new_n12929_ = OR ( new_n12928_, new_n3151_ ) -new_n12930_ = NAND ( NET_311, NET_310, new_n2975_, new_n2966_ ) -new_n12931_ = OR ( new_n12930_, new_n3153_ ) -new_n12932_ = NAND ( new_n2971_, new_n2967_, NET_309, new_n2966_ ) -new_n12933_ = OR ( new_n12932_, new_n3155_ ) -new_n12934_ = NAND ( NET_311, new_n2967_, NET_309, new_n2966_ ) -new_n12935_ = OR ( new_n12934_, new_n3409_ ) -new_n12936_ = NAND ( new_n12935_, new_n12933_, new_n12931_, new_n12929_ ) -new_n12937_ = NAND ( new_n2971_, NET_310, NET_309, NET_308 ) -new_n12938_ = OR ( new_n12937_, new_n3159_ ) -new_n12939_ = NAND ( NET_311, NET_310, NET_309, NET_308 ) -new_n12940_ = OR ( new_n12939_, new_n3413_ ) -new_n12941_ = NAND ( new_n2971_, new_n2967_, new_n2975_, new_n2966_ ) -new_n12942_ = OR ( new_n12941_, new_n3415_ ) -new_n12943_ = NAND ( NET_311, new_n2967_, new_n2975_, new_n2966_ ) -new_n12944_ = OR ( new_n12943_, new_n3417_ ) -new_n12945_ = NAND ( new_n12944_, new_n12942_, new_n12940_, new_n12938_ ) -new_n12946_ = NAND ( new_n2971_, NET_310, new_n2975_, NET_308 ) -new_n12947_ = OR ( new_n12946_, new_n3420_ ) -new_n12948_ = NAND ( NET_311, NET_310, new_n2975_, NET_308 ) -new_n12949_ = OR ( new_n12948_, new_n3422_ ) -new_n12950_ = NAND ( new_n2971_, new_n2967_, NET_309, NET_308 ) -new_n12951_ = OR ( new_n12950_, new_n3424_ ) -new_n12952_ = NAND ( NET_311, new_n2967_, NET_309, NET_308 ) -new_n12953_ = OR ( new_n12952_, new_n3168_ ) -new_n12954_ = NAND ( new_n12953_, new_n12951_, new_n12949_, new_n12947_ ) -new_n12955_ = NAND ( new_n2971_, NET_310, NET_309, new_n2966_ ) -new_n12956_ = OR ( new_n12955_, new_n3171_ ) -new_n12957_ = NAND ( NET_311, NET_310, NET_309, new_n2966_ ) -new_n12958_ = OR ( new_n12957_, new_n3173_ ) -new_n12959_ = NAND ( new_n2971_, new_n2967_, new_n2975_, NET_308 ) -new_n12960_ = OR ( new_n12959_, new_n3175_ ) -new_n12961_ = NAND ( NET_311, new_n2967_, new_n2975_, NET_308 ) -new_n12962_ = OR ( new_n12961_, new_n3431_ ) -new_n12963_ = NAND ( new_n12962_, new_n12960_, new_n12958_, new_n12956_ ) -new_n12964_ = NOR ( new_n12963_, new_n12954_, new_n12945_, new_n12936_ ) -new_n12965_ = NOR ( new_n12964_, new_n6794_ ) -new_n12966_ = OR ( new_n12965_, new_n12927_ ) -new_n12967_ = NAND ( new_n12965_, new_n12927_ ) -new_n12968_ = NAND ( new_n12967_, new_n12966_ ) -new_n12969_ = XOR ( new_n12968_, new_n12819_ ) -new_n12970_ = OR ( new_n12969_, new_n11723_ ) -new_n12971_ = NAND ( new_n11740_, NET_325 ) -new_n12972_ = NOT ( NET_357 ) -new_n12973_ = OR ( new_n6828_, new_n12972_ ) -new_n12974_ = NAND ( new_n5529_, NET_516 ) -new_n12975_ = NAND ( new_n12974_, new_n12973_, new_n12971_, new_n12970_ ) -new_n12976_ = XNOR ( new_n12975_, new_n6707_ ) -new_n12977_ = XNOR ( new_n12976_, new_n12915_ ) -new_n12978_ = OR ( new_n12977_, new_n11715_ ) -new_n12979_ = OR ( new_n12969_, new_n11775_ ) -new_n12980_ = NAND ( new_n11713_, NET_484 ) -NET_20013 = NAND ( new_n12980_, new_n12979_, new_n12978_ ) -new_n12982_ = NAND ( new_n12871_, new_n12867_ ) -new_n12983_ = NAND ( new_n12982_, new_n12868_ ) -new_n12984_ = NOT ( NET_774 ) -new_n12985_ = NOR ( new_n12362_, new_n12984_ ) -new_n12986_ = NOR ( new_n3924_, new_n12984_ ) -new_n12987_ = XOR ( new_n12986_, new_n12844_ ) -new_n12988_ = OR ( new_n12987_, new_n6954_ ) -new_n12989_ = NOT ( NET_933 ) -new_n12990_ = OR ( new_n6952_, new_n12989_ ) -new_n12991_ = NAND ( new_n6855_, NET_806 ) -new_n12992_ = NAND ( new_n6964_, NET_901 ) -new_n12993_ = NAND ( new_n12992_, new_n12991_, new_n12990_, new_n12988_ ) -new_n12994_ = NOR ( new_n12993_, new_n12985_ ) -new_n12995_ = XNOR ( new_n12994_, new_n5827_ ) -new_n12996_ = NAND ( new_n3716_, NET_759, new_n3720_, new_n3711_ ) -new_n12997_ = OR ( new_n12996_, new_n3896_ ) -new_n12998_ = NAND ( NET_760, NET_759, new_n3720_, new_n3711_ ) -new_n12999_ = OR ( new_n12998_, new_n3898_ ) -new_n13000_ = NAND ( new_n3716_, new_n3712_, NET_758, new_n3711_ ) -new_n13001_ = OR ( new_n13000_, new_n3900_ ) -new_n13002_ = NAND ( NET_760, new_n3712_, NET_758, new_n3711_ ) -new_n13003_ = OR ( new_n13002_, new_n4154_ ) -new_n13004_ = NAND ( new_n13003_, new_n13001_, new_n12999_, new_n12997_ ) -new_n13005_ = NAND ( new_n3716_, NET_759, NET_758, NET_757 ) -new_n13006_ = OR ( new_n13005_, new_n3904_ ) -new_n13007_ = NAND ( NET_760, NET_759, NET_758, NET_757 ) -new_n13008_ = OR ( new_n13007_, new_n4158_ ) -new_n13009_ = NAND ( new_n3716_, new_n3712_, new_n3720_, new_n3711_ ) -new_n13010_ = OR ( new_n13009_, new_n4160_ ) -new_n13011_ = NAND ( NET_760, new_n3712_, new_n3720_, new_n3711_ ) -new_n13012_ = OR ( new_n13011_, new_n4162_ ) -new_n13013_ = NAND ( new_n13012_, new_n13010_, new_n13008_, new_n13006_ ) -new_n13014_ = NAND ( new_n3716_, NET_759, new_n3720_, NET_757 ) -new_n13015_ = OR ( new_n13014_, new_n4165_ ) -new_n13016_ = NAND ( NET_760, NET_759, new_n3720_, NET_757 ) -new_n13017_ = OR ( new_n13016_, new_n4167_ ) -new_n13018_ = NAND ( new_n3716_, new_n3712_, NET_758, NET_757 ) -new_n13019_ = OR ( new_n13018_, new_n4169_ ) -new_n13020_ = NAND ( NET_760, new_n3712_, NET_758, NET_757 ) -new_n13021_ = OR ( new_n13020_, new_n3913_ ) -new_n13022_ = NAND ( new_n13021_, new_n13019_, new_n13017_, new_n13015_ ) -new_n13023_ = NAND ( new_n3716_, NET_759, NET_758, new_n3711_ ) -new_n13024_ = OR ( new_n13023_, new_n3916_ ) -new_n13025_ = NAND ( NET_760, NET_759, NET_758, new_n3711_ ) -new_n13026_ = OR ( new_n13025_, new_n3918_ ) -new_n13027_ = NAND ( new_n3716_, new_n3712_, new_n3720_, NET_757 ) -new_n13028_ = OR ( new_n13027_, new_n3920_ ) -new_n13029_ = NAND ( NET_760, new_n3712_, new_n3720_, NET_757 ) -new_n13030_ = OR ( new_n13029_, new_n4176_ ) -new_n13031_ = NAND ( new_n13030_, new_n13028_, new_n13026_, new_n13024_ ) -new_n13032_ = NOR ( new_n13031_, new_n13022_, new_n13013_, new_n13004_ ) -new_n13033_ = NOR ( new_n13032_, new_n6954_ ) -new_n13034_ = OR ( new_n13033_, new_n12995_ ) -new_n13035_ = NAND ( new_n13033_, new_n12995_ ) -new_n13036_ = NAND ( new_n13035_, new_n13034_ ) -new_n13037_ = XOR ( new_n13036_, new_n12856_ ) -new_n13038_ = OR ( new_n13037_, new_n11791_ ) -new_n13039_ = NAND ( new_n11808_, NET_774 ) -new_n13040_ = NOT ( NET_806 ) -new_n13041_ = OR ( new_n6988_, new_n13040_ ) -new_n13042_ = NAND ( new_n5827_, NET_965 ) -new_n13043_ = NAND ( new_n13042_, new_n13041_, new_n13039_, new_n13038_ ) -new_n13044_ = XNOR ( new_n13043_, new_n6867_ ) -new_n13045_ = XNOR ( new_n13044_, new_n12983_ ) -new_n13046_ = OR ( new_n13045_, new_n11783_ ) -new_n13047_ = OR ( new_n13037_, new_n11843_ ) -new_n13048_ = NAND ( new_n11781_, NET_933 ) -NET_20027 = NAND ( new_n13048_, new_n13047_, new_n13046_ ) -new_n13050_ = NAND ( new_n12908_, new_n12904_ ) -new_n13051_ = NAND ( new_n13050_, new_n12905_ ) -new_n13052_ = NOT ( NET_1223 ) -new_n13053_ = NOR ( new_n12430_, new_n13052_ ) -new_n13054_ = NOR ( new_n4668_, new_n13052_ ) -new_n13055_ = XOR ( new_n13054_, new_n12881_ ) -new_n13056_ = OR ( new_n13055_, new_n7114_ ) -new_n13057_ = NOT ( NET_1382 ) -new_n13058_ = OR ( new_n7112_, new_n13057_ ) -new_n13059_ = NAND ( new_n7015_, NET_1255 ) -new_n13060_ = NAND ( new_n7124_, NET_1350 ) -new_n13061_ = NAND ( new_n13060_, new_n13059_, new_n13058_, new_n13056_ ) -new_n13062_ = NOR ( new_n13061_, new_n13053_ ) -new_n13063_ = XNOR ( new_n13062_, new_n6196_ ) -new_n13064_ = NAND ( new_n4460_, NET_1208, new_n4464_, new_n4455_ ) -new_n13065_ = OR ( new_n13064_, new_n4640_ ) -new_n13066_ = NAND ( NET_1209, NET_1208, new_n4464_, new_n4455_ ) -new_n13067_ = OR ( new_n13066_, new_n4642_ ) -new_n13068_ = NAND ( new_n4460_, new_n4456_, NET_1207, new_n4455_ ) -new_n13069_ = OR ( new_n13068_, new_n4644_ ) -new_n13070_ = NAND ( NET_1209, new_n4456_, NET_1207, new_n4455_ ) -new_n13071_ = OR ( new_n13070_, new_n4898_ ) -new_n13072_ = NAND ( new_n13071_, new_n13069_, new_n13067_, new_n13065_ ) -new_n13073_ = NAND ( new_n4460_, NET_1208, NET_1207, NET_1206 ) -new_n13074_ = OR ( new_n13073_, new_n4648_ ) -new_n13075_ = NAND ( NET_1209, NET_1208, NET_1207, NET_1206 ) -new_n13076_ = OR ( new_n13075_, new_n4902_ ) -new_n13077_ = NAND ( new_n4460_, new_n4456_, new_n4464_, new_n4455_ ) -new_n13078_ = OR ( new_n13077_, new_n4904_ ) -new_n13079_ = NAND ( NET_1209, new_n4456_, new_n4464_, new_n4455_ ) -new_n13080_ = OR ( new_n13079_, new_n4906_ ) -new_n13081_ = NAND ( new_n13080_, new_n13078_, new_n13076_, new_n13074_ ) -new_n13082_ = NAND ( new_n4460_, NET_1208, new_n4464_, NET_1206 ) -new_n13083_ = OR ( new_n13082_, new_n4909_ ) -new_n13084_ = NAND ( NET_1209, NET_1208, new_n4464_, NET_1206 ) -new_n13085_ = OR ( new_n13084_, new_n4911_ ) -new_n13086_ = NAND ( new_n4460_, new_n4456_, NET_1207, NET_1206 ) -new_n13087_ = OR ( new_n13086_, new_n4913_ ) -new_n13088_ = NAND ( NET_1209, new_n4456_, NET_1207, NET_1206 ) -new_n13089_ = OR ( new_n13088_, new_n4657_ ) -new_n13090_ = NAND ( new_n13089_, new_n13087_, new_n13085_, new_n13083_ ) -new_n13091_ = NAND ( new_n4460_, NET_1208, NET_1207, new_n4455_ ) -new_n13092_ = OR ( new_n13091_, new_n4660_ ) -new_n13093_ = NAND ( NET_1209, NET_1208, NET_1207, new_n4455_ ) -new_n13094_ = OR ( new_n13093_, new_n4662_ ) -new_n13095_ = NAND ( new_n4460_, new_n4456_, new_n4464_, NET_1206 ) -new_n13096_ = OR ( new_n13095_, new_n4664_ ) -new_n13097_ = NAND ( NET_1209, new_n4456_, new_n4464_, NET_1206 ) -new_n13098_ = OR ( new_n13097_, new_n4920_ ) -new_n13099_ = NAND ( new_n13098_, new_n13096_, new_n13094_, new_n13092_ ) -new_n13100_ = NOR ( new_n13099_, new_n13090_, new_n13081_, new_n13072_ ) -new_n13101_ = NOR ( new_n13100_, new_n7114_ ) -new_n13102_ = OR ( new_n13101_, new_n13063_ ) -new_n13103_ = NAND ( new_n13101_, new_n13063_ ) -new_n13104_ = NAND ( new_n13103_, new_n13102_ ) -new_n13105_ = XOR ( new_n13104_, new_n12893_ ) -new_n13106_ = OR ( new_n13105_, new_n11859_ ) -new_n13107_ = NAND ( new_n11876_, NET_1223 ) -new_n13108_ = NOT ( NET_1255 ) -new_n13109_ = OR ( new_n7148_, new_n13108_ ) -new_n13110_ = NAND ( new_n6196_, NET_1414 ) -new_n13111_ = NAND ( new_n13110_, new_n13109_, new_n13107_, new_n13106_ ) -new_n13112_ = XNOR ( new_n13111_, new_n7027_ ) -new_n13113_ = XNOR ( new_n13112_, new_n13051_ ) -new_n13114_ = OR ( new_n13113_, new_n11851_ ) -new_n13115_ = OR ( new_n13105_, new_n11911_ ) -new_n13116_ = NAND ( new_n11849_, NET_1382 ) -NET_20045 = NAND ( new_n13116_, new_n13115_, new_n13114_ ) -new_n13118_ = NAND ( new_n12976_, new_n12915_ ) -new_n13119_ = OR ( new_n12928_, new_n3122_ ) -new_n13120_ = OR ( new_n12930_, new_n3124_ ) -new_n13121_ = OR ( new_n12932_, new_n3126_ ) -new_n13122_ = OR ( new_n12934_, new_n3361_ ) -new_n13123_ = NAND ( new_n13122_, new_n13121_, new_n13120_, new_n13119_ ) -new_n13124_ = OR ( new_n12937_, new_n3130_ ) -new_n13125_ = OR ( new_n12939_, new_n3365_ ) -new_n13126_ = OR ( new_n12941_, new_n3367_ ) -new_n13127_ = OR ( new_n12943_, new_n3369_ ) -new_n13128_ = NAND ( new_n13127_, new_n13126_, new_n13125_, new_n13124_ ) -new_n13129_ = OR ( new_n12946_, new_n3372_ ) -new_n13130_ = OR ( new_n12948_, new_n3374_ ) -new_n13131_ = OR ( new_n12950_, new_n3376_ ) -new_n13132_ = OR ( new_n12952_, new_n3139_ ) -new_n13133_ = NAND ( new_n13132_, new_n13131_, new_n13130_, new_n13129_ ) -new_n13134_ = OR ( new_n12955_, new_n3142_ ) -new_n13135_ = OR ( new_n12957_, new_n3144_ ) -new_n13136_ = OR ( new_n12959_, new_n3146_ ) -new_n13137_ = OR ( new_n12961_, new_n3383_ ) -new_n13138_ = NAND ( new_n13137_, new_n13136_, new_n13135_, new_n13134_ ) -new_n13139_ = NOR ( new_n13138_, new_n13133_, new_n13128_, new_n13123_ ) -new_n13140_ = OR ( new_n13139_, new_n6794_ ) -new_n13141_ = NOT ( NET_326 ) -new_n13142_ = NOR ( new_n12294_, new_n13141_ ) -new_n13143_ = NAND ( new_n12918_, new_n12806_, new_n12805_ ) -new_n13144_ = NOR ( new_n3179_, new_n13141_ ) -new_n13145_ = XOR ( new_n13144_, new_n13143_ ) -new_n13146_ = OR ( new_n13145_, new_n6794_ ) -new_n13147_ = NOT ( NET_485 ) -new_n13148_ = OR ( new_n6792_, new_n13147_ ) -new_n13149_ = NAND ( new_n6695_, NET_358 ) -new_n13150_ = NAND ( new_n6804_, NET_453 ) -new_n13151_ = NAND ( new_n13150_, new_n13149_, new_n13148_, new_n13146_ ) -new_n13152_ = NOR ( new_n13151_, new_n13142_ ) -new_n13153_ = XOR ( new_n13152_, new_n5529_ ) -new_n13154_ = OR ( new_n13153_, new_n13140_ ) -new_n13155_ = NAND ( new_n13153_, new_n13140_ ) -new_n13156_ = NAND ( new_n13155_, new_n13154_ ) -new_n13157_ = NAND ( new_n12966_, new_n12819_ ) -new_n13158_ = NAND ( new_n13157_, new_n12967_ ) -new_n13159_ = XOR ( new_n13158_, new_n13156_ ) -new_n13160_ = OR ( new_n13159_, new_n11723_ ) -new_n13161_ = NAND ( new_n11740_, NET_326 ) -new_n13162_ = NOT ( NET_358 ) -new_n13163_ = OR ( new_n6828_, new_n13162_ ) -new_n13164_ = NAND ( new_n5529_, NET_517 ) -new_n13165_ = NAND ( new_n13164_, new_n13163_, new_n13161_, new_n13160_ ) -new_n13166_ = XNOR ( new_n13165_, new_n6707_ ) -new_n13167_ = NOT ( new_n13166_ ) -new_n13168_ = NAND ( new_n13167_, new_n13118_ ) -new_n13169_ = OR ( new_n13167_, new_n13118_ ) -new_n13170_ = NAND ( new_n13169_, new_n13168_ ) -new_n13171_ = OR ( new_n13170_, new_n11715_ ) -new_n13172_ = OR ( new_n13159_, new_n11775_ ) -new_n13173_ = NAND ( new_n11713_, NET_485 ) -NET_20128 = NAND ( new_n13173_, new_n13172_, new_n13171_ ) -new_n13175_ = NAND ( new_n13044_, new_n12983_ ) -new_n13176_ = OR ( new_n12996_, new_n3867_ ) -new_n13177_ = OR ( new_n12998_, new_n3869_ ) -new_n13178_ = OR ( new_n13000_, new_n3871_ ) -new_n13179_ = OR ( new_n13002_, new_n4106_ ) -new_n13180_ = NAND ( new_n13179_, new_n13178_, new_n13177_, new_n13176_ ) -new_n13181_ = OR ( new_n13005_, new_n3875_ ) -new_n13182_ = OR ( new_n13007_, new_n4110_ ) -new_n13183_ = OR ( new_n13009_, new_n4112_ ) -new_n13184_ = OR ( new_n13011_, new_n4114_ ) -new_n13185_ = NAND ( new_n13184_, new_n13183_, new_n13182_, new_n13181_ ) -new_n13186_ = OR ( new_n13014_, new_n4117_ ) -new_n13187_ = OR ( new_n13016_, new_n4119_ ) -new_n13188_ = OR ( new_n13018_, new_n4121_ ) -new_n13189_ = OR ( new_n13020_, new_n3884_ ) -new_n13190_ = NAND ( new_n13189_, new_n13188_, new_n13187_, new_n13186_ ) -new_n13191_ = OR ( new_n13023_, new_n3887_ ) -new_n13192_ = OR ( new_n13025_, new_n3889_ ) -new_n13193_ = OR ( new_n13027_, new_n3891_ ) -new_n13194_ = OR ( new_n13029_, new_n4128_ ) -new_n13195_ = NAND ( new_n13194_, new_n13193_, new_n13192_, new_n13191_ ) -new_n13196_ = NOR ( new_n13195_, new_n13190_, new_n13185_, new_n13180_ ) -new_n13197_ = OR ( new_n13196_, new_n6954_ ) -new_n13198_ = NOT ( NET_775 ) -new_n13199_ = NOR ( new_n12362_, new_n13198_ ) -new_n13200_ = NAND ( new_n12986_, new_n12843_, new_n12842_ ) -new_n13201_ = NOR ( new_n3924_, new_n13198_ ) -new_n13202_ = XOR ( new_n13201_, new_n13200_ ) -new_n13203_ = OR ( new_n13202_, new_n6954_ ) -new_n13204_ = NOT ( NET_934 ) -new_n13205_ = OR ( new_n6952_, new_n13204_ ) -new_n13206_ = NAND ( new_n6855_, NET_807 ) -new_n13207_ = NAND ( new_n6964_, NET_902 ) -new_n13208_ = NAND ( new_n13207_, new_n13206_, new_n13205_, new_n13203_ ) -new_n13209_ = NOR ( new_n13208_, new_n13199_ ) -new_n13210_ = XOR ( new_n13209_, new_n5827_ ) -new_n13211_ = OR ( new_n13210_, new_n13197_ ) -new_n13212_ = NAND ( new_n13210_, new_n13197_ ) -new_n13213_ = NAND ( new_n13212_, new_n13211_ ) -new_n13214_ = NAND ( new_n13034_, new_n12856_ ) -new_n13215_ = NAND ( new_n13214_, new_n13035_ ) -new_n13216_ = XOR ( new_n13215_, new_n13213_ ) -new_n13217_ = OR ( new_n13216_, new_n11791_ ) -new_n13218_ = NAND ( new_n11808_, NET_775 ) -new_n13219_ = NOT ( NET_807 ) -new_n13220_ = OR ( new_n6988_, new_n13219_ ) -new_n13221_ = NAND ( new_n5827_, NET_966 ) -new_n13222_ = NAND ( new_n13221_, new_n13220_, new_n13218_, new_n13217_ ) -new_n13223_ = XNOR ( new_n13222_, new_n6867_ ) -new_n13224_ = NOT ( new_n13223_ ) -new_n13225_ = NAND ( new_n13224_, new_n13175_ ) -new_n13226_ = OR ( new_n13224_, new_n13175_ ) -new_n13227_ = NAND ( new_n13226_, new_n13225_ ) -new_n13228_ = OR ( new_n13227_, new_n11783_ ) -new_n13229_ = OR ( new_n13216_, new_n11843_ ) -new_n13230_ = NAND ( new_n11781_, NET_934 ) -NET_20140 = NAND ( new_n13230_, new_n13229_, new_n13228_ ) -new_n13232_ = NAND ( new_n13112_, new_n13051_ ) -new_n13233_ = OR ( new_n13064_, new_n4611_ ) -new_n13234_ = OR ( new_n13066_, new_n4613_ ) -new_n13235_ = OR ( new_n13068_, new_n4615_ ) -new_n13236_ = OR ( new_n13070_, new_n4850_ ) -new_n13237_ = NAND ( new_n13236_, new_n13235_, new_n13234_, new_n13233_ ) -new_n13238_ = OR ( new_n13073_, new_n4619_ ) -new_n13239_ = OR ( new_n13075_, new_n4854_ ) -new_n13240_ = OR ( new_n13077_, new_n4856_ ) -new_n13241_ = OR ( new_n13079_, new_n4858_ ) -new_n13242_ = NAND ( new_n13241_, new_n13240_, new_n13239_, new_n13238_ ) -new_n13243_ = OR ( new_n13082_, new_n4861_ ) -new_n13244_ = OR ( new_n13084_, new_n4863_ ) -new_n13245_ = OR ( new_n13086_, new_n4865_ ) -new_n13246_ = OR ( new_n13088_, new_n4628_ ) -new_n13247_ = NAND ( new_n13246_, new_n13245_, new_n13244_, new_n13243_ ) -new_n13248_ = OR ( new_n13091_, new_n4631_ ) -new_n13249_ = OR ( new_n13093_, new_n4633_ ) -new_n13250_ = OR ( new_n13095_, new_n4635_ ) -new_n13251_ = OR ( new_n13097_, new_n4872_ ) -new_n13252_ = NAND ( new_n13251_, new_n13250_, new_n13249_, new_n13248_ ) -new_n13253_ = NOR ( new_n13252_, new_n13247_, new_n13242_, new_n13237_ ) -new_n13254_ = OR ( new_n13253_, new_n7114_ ) -new_n13255_ = NOT ( NET_1224 ) -new_n13256_ = NOR ( new_n12430_, new_n13255_ ) -new_n13257_ = NAND ( new_n13054_, new_n12880_, new_n12879_ ) -new_n13258_ = NOR ( new_n4668_, new_n13255_ ) -new_n13259_ = XOR ( new_n13258_, new_n13257_ ) -new_n13260_ = OR ( new_n13259_, new_n7114_ ) -new_n13261_ = NOT ( NET_1383 ) -new_n13262_ = OR ( new_n7112_, new_n13261_ ) -new_n13263_ = NAND ( new_n7015_, NET_1256 ) -new_n13264_ = NAND ( new_n7124_, NET_1351 ) -new_n13265_ = NAND ( new_n13264_, new_n13263_, new_n13262_, new_n13260_ ) -new_n13266_ = NOR ( new_n13265_, new_n13256_ ) -new_n13267_ = XOR ( new_n13266_, new_n6196_ ) -new_n13268_ = OR ( new_n13267_, new_n13254_ ) -new_n13269_ = NAND ( new_n13267_, new_n13254_ ) -new_n13270_ = NAND ( new_n13269_, new_n13268_ ) -new_n13271_ = NAND ( new_n13102_, new_n12893_ ) -new_n13272_ = NAND ( new_n13271_, new_n13103_ ) -new_n13273_ = XOR ( new_n13272_, new_n13270_ ) -new_n13274_ = OR ( new_n13273_, new_n11859_ ) -new_n13275_ = NAND ( new_n11876_, NET_1224 ) -new_n13276_ = NOT ( NET_1256 ) -new_n13277_ = OR ( new_n7148_, new_n13276_ ) -new_n13278_ = NAND ( new_n6196_, NET_1415 ) -new_n13279_ = NAND ( new_n13278_, new_n13277_, new_n13275_, new_n13274_ ) -new_n13280_ = XNOR ( new_n13279_, new_n7027_ ) -new_n13281_ = NOT ( new_n13280_ ) -new_n13282_ = NAND ( new_n13281_, new_n13232_ ) -new_n13283_ = OR ( new_n13281_, new_n13232_ ) -new_n13284_ = NAND ( new_n13283_, new_n13282_ ) -new_n13285_ = OR ( new_n13284_, new_n11851_ ) -new_n13286_ = OR ( new_n13273_, new_n11911_ ) -new_n13287_ = NAND ( new_n11849_, NET_1383 ) -NET_20156 = NAND ( new_n13287_, new_n13286_, new_n13285_ ) -new_n13289_ = NAND ( new_n13158_, new_n13155_ ) -new_n13290_ = NOT ( NET_327 ) -new_n13291_ = NOR ( new_n12294_, new_n13290_ ) -new_n13292_ = NAND ( new_n13144_, new_n12918_, new_n12806_, new_n12805_ ) -new_n13293_ = NOR ( new_n3179_, new_n13290_ ) -new_n13294_ = NOT ( new_n13293_ ) -new_n13295_ = AND ( new_n13294_, new_n13292_ ) -new_n13296_ = NOR ( new_n13294_, new_n13292_ ) -new_n13297_ = OR ( new_n13296_, new_n13295_ ) -new_n13298_ = OR ( new_n13297_, new_n6794_ ) -new_n13299_ = NOT ( NET_486 ) -new_n13300_ = OR ( new_n6792_, new_n13299_ ) -new_n13301_ = NAND ( new_n6695_, NET_359 ) -new_n13302_ = NAND ( new_n6804_, NET_454 ) -new_n13303_ = NAND ( new_n13302_, new_n13301_, new_n13300_, new_n13298_ ) -new_n13304_ = NOR ( new_n13303_, new_n13291_ ) -new_n13305_ = OR ( new_n13304_, new_n5529_ ) -new_n13306_ = NAND ( new_n13304_, new_n5529_ ) -new_n13307_ = AND ( new_n13306_, new_n13305_ ) -new_n13308_ = OR ( new_n12928_, new_n3180_ ) -new_n13309_ = OR ( new_n12930_, new_n3182_ ) -new_n13310_ = OR ( new_n12932_, new_n3184_ ) -new_n13311_ = OR ( new_n12934_, new_n3466_ ) -new_n13312_ = NAND ( new_n13311_, new_n13310_, new_n13309_, new_n13308_ ) -new_n13313_ = OR ( new_n12937_, new_n3188_ ) -new_n13314_ = OR ( new_n12939_, new_n3470_ ) -new_n13315_ = OR ( new_n12941_, new_n3472_ ) -new_n13316_ = OR ( new_n12943_, new_n3474_ ) -new_n13317_ = NAND ( new_n13316_, new_n13315_, new_n13314_, new_n13313_ ) -new_n13318_ = OR ( new_n12946_, new_n3477_ ) -new_n13319_ = OR ( new_n12948_, new_n3479_ ) -new_n13320_ = OR ( new_n12950_, new_n3481_ ) -new_n13321_ = OR ( new_n12952_, new_n3197_ ) -new_n13322_ = NAND ( new_n13321_, new_n13320_, new_n13319_, new_n13318_ ) -new_n13323_ = OR ( new_n12955_, new_n3200_ ) -new_n13324_ = OR ( new_n12957_, new_n3202_ ) -new_n13325_ = OR ( new_n12959_, new_n3204_ ) -new_n13326_ = OR ( new_n12961_, new_n3488_ ) -new_n13327_ = NAND ( new_n13326_, new_n13325_, new_n13324_, new_n13323_ ) -new_n13328_ = NOR ( new_n13327_, new_n13322_, new_n13317_, new_n13312_ ) -new_n13329_ = OR ( new_n13328_, new_n6794_ ) -new_n13330_ = NOR ( new_n13329_, new_n13307_ ) -new_n13331_ = NOT ( new_n13330_ ) -new_n13332_ = NAND ( new_n13329_, new_n13306_, new_n13305_ ) -new_n13333_ = NAND ( new_n13332_, new_n13331_ ) -new_n13334_ = NAND ( new_n13333_, new_n13289_, new_n13154_ ) -new_n13335_ = NAND ( new_n13289_, new_n13154_ ) -new_n13336_ = NAND ( new_n13335_, new_n13332_ ) -new_n13337_ = OR ( new_n13336_, new_n13330_ ) -new_n13338_ = NAND ( new_n13337_, new_n13334_ ) -new_n13339_ = OR ( new_n13338_, new_n11723_ ) -new_n13340_ = NAND ( new_n11740_, NET_327 ) -new_n13341_ = NOT ( NET_359 ) -new_n13342_ = OR ( new_n6828_, new_n13341_ ) -new_n13343_ = NAND ( new_n5529_, NET_518 ) -new_n13344_ = NAND ( new_n13343_, new_n13342_, new_n13340_, new_n13339_ ) -new_n13345_ = XOR ( new_n13344_, new_n6707_ ) -new_n13346_ = OR ( new_n13345_, new_n13167_, new_n13118_ ) -new_n13347_ = NAND ( new_n13345_, new_n13169_ ) -new_n13348_ = AND ( new_n13347_, new_n13346_ ) -new_n13349_ = NAND ( new_n13348_, new_n11714_ ) -new_n13350_ = OR ( new_n13338_, new_n11775_ ) -new_n13351_ = NAND ( new_n11713_, NET_486 ) -NET_20238 = NAND ( new_n13351_, new_n13350_, new_n13349_ ) -new_n13353_ = NOT ( NET_328 ) -new_n13354_ = NOR ( new_n12294_, new_n13353_ ) -new_n13355_ = NOR ( new_n3179_, new_n13353_ ) -new_n13356_ = OR ( new_n13355_, new_n13296_ ) -new_n13357_ = NAND ( new_n13355_, new_n13296_ ) -new_n13358_ = NAND ( new_n13357_, new_n13356_ ) -new_n13359_ = OR ( new_n13358_, new_n6794_ ) -new_n13360_ = NOT ( NET_487 ) -new_n13361_ = OR ( new_n6792_, new_n13360_ ) -new_n13362_ = NAND ( new_n6695_, NET_360 ) -new_n13363_ = NAND ( new_n6804_, NET_455 ) -new_n13364_ = NAND ( new_n13363_, new_n13362_, new_n13361_, new_n13359_ ) -new_n13365_ = NOR ( new_n13364_, new_n13354_ ) -new_n13366_ = XNOR ( new_n13365_, new_n5529_ ) -new_n13367_ = OR ( new_n12930_, new_n2965_ ) -new_n13368_ = OR ( new_n12932_, new_n2970_ ) -new_n13369_ = OR ( new_n12934_, new_n2974_ ) -new_n13370_ = OR ( new_n12955_, new_n2980_ ) -new_n13371_ = NAND ( new_n13370_, new_n13369_, new_n13368_, new_n13367_ ) -new_n13372_ = OR ( new_n12939_, new_n2985_ ) -new_n13373_ = OR ( new_n12941_, new_n2990_ ) -new_n13374_ = OR ( new_n12943_, new_n2994_ ) -new_n13375_ = OR ( new_n12928_, new_n2997_ ) -new_n13376_ = NAND ( new_n13375_, new_n13374_, new_n13373_, new_n13372_ ) -new_n13377_ = OR ( new_n12948_, new_n3001_ ) -new_n13378_ = OR ( new_n12950_, new_n3005_ ) -new_n13379_ = OR ( new_n12952_, new_n3008_ ) -new_n13380_ = OR ( new_n12937_, new_n3011_ ) -new_n13381_ = NAND ( new_n13380_, new_n13379_, new_n13378_, new_n13377_ ) -new_n13382_ = OR ( new_n12957_, new_n3015_ ) -new_n13383_ = OR ( new_n12959_, new_n3018_ ) -new_n13384_ = OR ( new_n12961_, new_n3021_ ) -new_n13385_ = OR ( new_n12946_, new_n3025_ ) -new_n13386_ = NAND ( new_n13385_, new_n13384_, new_n13383_, new_n13382_ ) -new_n13387_ = NOR ( new_n13386_, new_n13381_, new_n13376_, new_n13371_ ) -new_n13388_ = NOR ( new_n13387_, new_n6794_ ) -new_n13389_ = OR ( new_n13388_, new_n13366_ ) -new_n13390_ = NAND ( new_n13388_, new_n13366_ ) -new_n13391_ = NAND ( new_n13390_, new_n13389_ ) -new_n13392_ = NAND ( new_n13336_, new_n13331_ ) -new_n13393_ = XOR ( new_n13392_, new_n13391_ ) -new_n13394_ = OR ( new_n13393_, new_n11723_ ) -new_n13395_ = NAND ( new_n11740_, NET_328 ) -new_n13396_ = NOT ( NET_360 ) -new_n13397_ = OR ( new_n6828_, new_n13396_ ) -new_n13398_ = NAND ( new_n5529_, NET_519 ) -new_n13399_ = NAND ( new_n13398_, new_n13397_, new_n13395_, new_n13394_ ) -new_n13400_ = XNOR ( new_n13399_, new_n6707_ ) -new_n13401_ = NOT ( new_n13400_ ) -new_n13402_ = OR ( new_n13401_, new_n13346_ ) -new_n13403_ = NAND ( new_n13401_, new_n13346_ ) -new_n13404_ = AND ( new_n13403_, new_n13402_ ) -new_n13405_ = NAND ( new_n13404_, new_n11714_ ) -new_n13406_ = OR ( new_n13393_, new_n11775_ ) -new_n13407_ = NAND ( new_n11713_, NET_487 ) -NET_20239 = NAND ( new_n13407_, new_n13406_, new_n13405_ ) -new_n13409_ = NAND ( new_n13215_, new_n13212_ ) -new_n13410_ = NOT ( NET_776 ) -new_n13411_ = NOR ( new_n12362_, new_n13410_ ) -new_n13412_ = NAND ( new_n13201_, new_n12986_, new_n12843_, new_n12842_ ) -new_n13413_ = NOR ( new_n3924_, new_n13410_ ) -new_n13414_ = NOT ( new_n13413_ ) -new_n13415_ = AND ( new_n13414_, new_n13412_ ) -new_n13416_ = NOR ( new_n13414_, new_n13412_ ) -new_n13417_ = OR ( new_n13416_, new_n13415_ ) -new_n13418_ = OR ( new_n13417_, new_n6954_ ) -new_n13419_ = NOT ( NET_935 ) -new_n13420_ = OR ( new_n6952_, new_n13419_ ) -new_n13421_ = NAND ( new_n6855_, NET_808 ) -new_n13422_ = NAND ( new_n6964_, NET_903 ) -new_n13423_ = NAND ( new_n13422_, new_n13421_, new_n13420_, new_n13418_ ) -new_n13424_ = NOR ( new_n13423_, new_n13411_ ) -new_n13425_ = OR ( new_n13424_, new_n5827_ ) -new_n13426_ = NAND ( new_n13424_, new_n5827_ ) -new_n13427_ = AND ( new_n13426_, new_n13425_ ) -new_n13428_ = OR ( new_n12996_, new_n3925_ ) -new_n13429_ = OR ( new_n12998_, new_n3927_ ) -new_n13430_ = OR ( new_n13000_, new_n3929_ ) -new_n13431_ = OR ( new_n13002_, new_n4211_ ) -new_n13432_ = NAND ( new_n13431_, new_n13430_, new_n13429_, new_n13428_ ) -new_n13433_ = OR ( new_n13005_, new_n3933_ ) -new_n13434_ = OR ( new_n13007_, new_n4215_ ) -new_n13435_ = OR ( new_n13009_, new_n4217_ ) -new_n13436_ = OR ( new_n13011_, new_n4219_ ) -new_n13437_ = NAND ( new_n13436_, new_n13435_, new_n13434_, new_n13433_ ) -new_n13438_ = OR ( new_n13014_, new_n4222_ ) -new_n13439_ = OR ( new_n13016_, new_n4224_ ) -new_n13440_ = OR ( new_n13018_, new_n4226_ ) -new_n13441_ = OR ( new_n13020_, new_n3942_ ) -new_n13442_ = NAND ( new_n13441_, new_n13440_, new_n13439_, new_n13438_ ) -new_n13443_ = OR ( new_n13023_, new_n3945_ ) -new_n13444_ = OR ( new_n13025_, new_n3947_ ) -new_n13445_ = OR ( new_n13027_, new_n3949_ ) -new_n13446_ = OR ( new_n13029_, new_n4233_ ) -new_n13447_ = NAND ( new_n13446_, new_n13445_, new_n13444_, new_n13443_ ) -new_n13448_ = NOR ( new_n13447_, new_n13442_, new_n13437_, new_n13432_ ) -new_n13449_ = OR ( new_n13448_, new_n6954_ ) -new_n13450_ = NOR ( new_n13449_, new_n13427_ ) -new_n13451_ = NOT ( new_n13450_ ) -new_n13452_ = NAND ( new_n13449_, new_n13426_, new_n13425_ ) -new_n13453_ = NAND ( new_n13452_, new_n13451_ ) -new_n13454_ = NAND ( new_n13453_, new_n13409_, new_n13211_ ) -new_n13455_ = NAND ( new_n13409_, new_n13211_ ) -new_n13456_ = NAND ( new_n13455_, new_n13452_ ) -new_n13457_ = OR ( new_n13456_, new_n13450_ ) -new_n13458_ = NAND ( new_n13457_, new_n13454_ ) -new_n13459_ = OR ( new_n13458_, new_n11791_ ) -new_n13460_ = NAND ( new_n11808_, NET_776 ) -new_n13461_ = NOT ( NET_808 ) -new_n13462_ = OR ( new_n6988_, new_n13461_ ) -new_n13463_ = NAND ( new_n5827_, NET_967 ) -new_n13464_ = NAND ( new_n13463_, new_n13462_, new_n13460_, new_n13459_ ) -new_n13465_ = XOR ( new_n13464_, new_n6867_ ) -new_n13466_ = OR ( new_n13465_, new_n13224_, new_n13175_ ) -new_n13467_ = NAND ( new_n13465_, new_n13226_ ) -new_n13468_ = AND ( new_n13467_, new_n13466_ ) -new_n13469_ = NAND ( new_n13468_, new_n11782_ ) -new_n13470_ = OR ( new_n13458_, new_n11843_ ) -new_n13471_ = NAND ( new_n11781_, NET_935 ) -NET_20254 = NAND ( new_n13471_, new_n13470_, new_n13469_ ) -new_n13473_ = NOT ( NET_777 ) -new_n13474_ = NOR ( new_n12362_, new_n13473_ ) -new_n13475_ = NOR ( new_n3924_, new_n13473_ ) -new_n13476_ = OR ( new_n13475_, new_n13416_ ) -new_n13477_ = NAND ( new_n13475_, new_n13416_ ) -new_n13478_ = NAND ( new_n13477_, new_n13476_ ) -new_n13479_ = OR ( new_n13478_, new_n6954_ ) -new_n13480_ = NOT ( NET_936 ) -new_n13481_ = OR ( new_n6952_, new_n13480_ ) -new_n13482_ = NAND ( new_n6855_, NET_809 ) -new_n13483_ = NAND ( new_n6964_, NET_904 ) -new_n13484_ = NAND ( new_n13483_, new_n13482_, new_n13481_, new_n13479_ ) -new_n13485_ = NOR ( new_n13484_, new_n13474_ ) -new_n13486_ = XNOR ( new_n13485_, new_n5827_ ) -new_n13487_ = OR ( new_n12998_, new_n3710_ ) -new_n13488_ = OR ( new_n13000_, new_n3715_ ) -new_n13489_ = OR ( new_n13002_, new_n3719_ ) -new_n13490_ = OR ( new_n13023_, new_n3725_ ) -new_n13491_ = NAND ( new_n13490_, new_n13489_, new_n13488_, new_n13487_ ) -new_n13492_ = OR ( new_n13007_, new_n3730_ ) -new_n13493_ = OR ( new_n13009_, new_n3735_ ) -new_n13494_ = OR ( new_n13011_, new_n3739_ ) -new_n13495_ = OR ( new_n12996_, new_n3742_ ) -new_n13496_ = NAND ( new_n13495_, new_n13494_, new_n13493_, new_n13492_ ) -new_n13497_ = OR ( new_n13016_, new_n3746_ ) -new_n13498_ = OR ( new_n13018_, new_n3750_ ) -new_n13499_ = OR ( new_n13020_, new_n3753_ ) -new_n13500_ = OR ( new_n13005_, new_n3756_ ) -new_n13501_ = NAND ( new_n13500_, new_n13499_, new_n13498_, new_n13497_ ) -new_n13502_ = OR ( new_n13025_, new_n3760_ ) -new_n13503_ = OR ( new_n13027_, new_n3763_ ) -new_n13504_ = OR ( new_n13029_, new_n3766_ ) -new_n13505_ = OR ( new_n13014_, new_n3770_ ) -new_n13506_ = NAND ( new_n13505_, new_n13504_, new_n13503_, new_n13502_ ) -new_n13507_ = NOR ( new_n13506_, new_n13501_, new_n13496_, new_n13491_ ) -new_n13508_ = NOR ( new_n13507_, new_n6954_ ) -new_n13509_ = OR ( new_n13508_, new_n13486_ ) -new_n13510_ = NAND ( new_n13508_, new_n13486_ ) -new_n13511_ = NAND ( new_n13510_, new_n13509_ ) -new_n13512_ = NAND ( new_n13456_, new_n13451_ ) -new_n13513_ = XOR ( new_n13512_, new_n13511_ ) -new_n13514_ = OR ( new_n13513_, new_n11791_ ) -new_n13515_ = NAND ( new_n11808_, NET_777 ) -new_n13516_ = NOT ( NET_809 ) -new_n13517_ = OR ( new_n6988_, new_n13516_ ) -new_n13518_ = NAND ( new_n5827_, NET_968 ) -new_n13519_ = NAND ( new_n13518_, new_n13517_, new_n13515_, new_n13514_ ) -new_n13520_ = XNOR ( new_n13519_, new_n6867_ ) -new_n13521_ = NOT ( new_n13520_ ) -new_n13522_ = OR ( new_n13521_, new_n13466_ ) -new_n13523_ = NAND ( new_n13521_, new_n13466_ ) -new_n13524_ = AND ( new_n13523_, new_n13522_ ) -new_n13525_ = NAND ( new_n13524_, new_n11782_ ) -new_n13526_ = OR ( new_n13513_, new_n11843_ ) -new_n13527_ = NAND ( new_n11781_, NET_936 ) -NET_20255 = NAND ( new_n13527_, new_n13526_, new_n13525_ ) -new_n13529_ = NAND ( new_n13272_, new_n13269_ ) -new_n13530_ = NOT ( NET_1225 ) -new_n13531_ = NOR ( new_n12430_, new_n13530_ ) -new_n13532_ = NAND ( new_n13258_, new_n13054_, new_n12880_, new_n12879_ ) -new_n13533_ = NOR ( new_n4668_, new_n13530_ ) -new_n13534_ = NOT ( new_n13533_ ) -new_n13535_ = AND ( new_n13534_, new_n13532_ ) -new_n13536_ = NOR ( new_n13534_, new_n13532_ ) -new_n13537_ = OR ( new_n13536_, new_n13535_ ) -new_n13538_ = OR ( new_n13537_, new_n7114_ ) -new_n13539_ = NOT ( NET_1384 ) -new_n13540_ = OR ( new_n7112_, new_n13539_ ) -new_n13541_ = NAND ( new_n7015_, NET_1257 ) -new_n13542_ = NAND ( new_n7124_, NET_1352 ) -new_n13543_ = NAND ( new_n13542_, new_n13541_, new_n13540_, new_n13538_ ) -new_n13544_ = NOR ( new_n13543_, new_n13531_ ) -new_n13545_ = OR ( new_n13544_, new_n6196_ ) -new_n13546_ = NAND ( new_n13544_, new_n6196_ ) -new_n13547_ = AND ( new_n13546_, new_n13545_ ) -new_n13548_ = OR ( new_n13064_, new_n4669_ ) -new_n13549_ = OR ( new_n13066_, new_n4671_ ) -new_n13550_ = OR ( new_n13068_, new_n4673_ ) -new_n13551_ = OR ( new_n13070_, new_n4955_ ) -new_n13552_ = NAND ( new_n13551_, new_n13550_, new_n13549_, new_n13548_ ) -new_n13553_ = OR ( new_n13073_, new_n4677_ ) -new_n13554_ = OR ( new_n13075_, new_n4959_ ) -new_n13555_ = OR ( new_n13077_, new_n4961_ ) -new_n13556_ = OR ( new_n13079_, new_n4963_ ) -new_n13557_ = NAND ( new_n13556_, new_n13555_, new_n13554_, new_n13553_ ) -new_n13558_ = OR ( new_n13082_, new_n4966_ ) -new_n13559_ = OR ( new_n13084_, new_n4968_ ) -new_n13560_ = OR ( new_n13086_, new_n4970_ ) -new_n13561_ = OR ( new_n13088_, new_n4686_ ) -new_n13562_ = NAND ( new_n13561_, new_n13560_, new_n13559_, new_n13558_ ) -new_n13563_ = OR ( new_n13091_, new_n4689_ ) -new_n13564_ = OR ( new_n13093_, new_n4691_ ) -new_n13565_ = OR ( new_n13095_, new_n4693_ ) -new_n13566_ = OR ( new_n13097_, new_n4977_ ) -new_n13567_ = NAND ( new_n13566_, new_n13565_, new_n13564_, new_n13563_ ) -new_n13568_ = NOR ( new_n13567_, new_n13562_, new_n13557_, new_n13552_ ) -new_n13569_ = OR ( new_n13568_, new_n7114_ ) -new_n13570_ = NOR ( new_n13569_, new_n13547_ ) -new_n13571_ = NOT ( new_n13570_ ) -new_n13572_ = NAND ( new_n13569_, new_n13546_, new_n13545_ ) -new_n13573_ = NAND ( new_n13572_, new_n13571_ ) -new_n13574_ = NAND ( new_n13573_, new_n13529_, new_n13268_ ) -new_n13575_ = NAND ( new_n13529_, new_n13268_ ) -new_n13576_ = NAND ( new_n13575_, new_n13572_ ) -new_n13577_ = OR ( new_n13576_, new_n13570_ ) -new_n13578_ = NAND ( new_n13577_, new_n13574_ ) -new_n13579_ = OR ( new_n13578_, new_n11859_ ) -new_n13580_ = NAND ( new_n11876_, NET_1225 ) -new_n13581_ = NOT ( NET_1257 ) -new_n13582_ = OR ( new_n7148_, new_n13581_ ) -new_n13583_ = NAND ( new_n6196_, NET_1416 ) -new_n13584_ = NAND ( new_n13583_, new_n13582_, new_n13580_, new_n13579_ ) -new_n13585_ = XOR ( new_n13584_, new_n7027_ ) -new_n13586_ = OR ( new_n13585_, new_n13281_, new_n13232_ ) -new_n13587_ = NAND ( new_n13585_, new_n13283_ ) -new_n13588_ = AND ( new_n13587_, new_n13586_ ) -new_n13589_ = NAND ( new_n13588_, new_n11850_ ) -new_n13590_ = OR ( new_n13578_, new_n11911_ ) -new_n13591_ = NAND ( new_n11849_, NET_1384 ) -NET_20272 = NAND ( new_n13591_, new_n13590_, new_n13589_ ) -new_n13593_ = NOT ( NET_1226 ) -new_n13594_ = NOR ( new_n12430_, new_n13593_ ) -new_n13595_ = NOR ( new_n4668_, new_n13593_ ) -new_n13596_ = OR ( new_n13595_, new_n13536_ ) -new_n13597_ = NAND ( new_n13595_, new_n13536_ ) -new_n13598_ = NAND ( new_n13597_, new_n13596_ ) -new_n13599_ = OR ( new_n13598_, new_n7114_ ) -new_n13600_ = NOT ( NET_1385 ) -new_n13601_ = OR ( new_n7112_, new_n13600_ ) -new_n13602_ = NAND ( new_n7015_, NET_1258 ) -new_n13603_ = NAND ( new_n7124_, NET_1353 ) -new_n13604_ = NAND ( new_n13603_, new_n13602_, new_n13601_, new_n13599_ ) -new_n13605_ = NOR ( new_n13604_, new_n13594_ ) -new_n13606_ = XNOR ( new_n13605_, new_n6196_ ) -new_n13607_ = OR ( new_n13066_, new_n4454_ ) -new_n13608_ = OR ( new_n13068_, new_n4459_ ) -new_n13609_ = OR ( new_n13070_, new_n4463_ ) -new_n13610_ = OR ( new_n13091_, new_n4469_ ) -new_n13611_ = NAND ( new_n13610_, new_n13609_, new_n13608_, new_n13607_ ) -new_n13612_ = OR ( new_n13075_, new_n4474_ ) -new_n13613_ = OR ( new_n13077_, new_n4479_ ) -new_n13614_ = OR ( new_n13079_, new_n4483_ ) -new_n13615_ = OR ( new_n13064_, new_n4486_ ) -new_n13616_ = NAND ( new_n13615_, new_n13614_, new_n13613_, new_n13612_ ) -new_n13617_ = OR ( new_n13084_, new_n4490_ ) -new_n13618_ = OR ( new_n13086_, new_n4494_ ) -new_n13619_ = OR ( new_n13088_, new_n4497_ ) -new_n13620_ = OR ( new_n13073_, new_n4500_ ) -new_n13621_ = NAND ( new_n13620_, new_n13619_, new_n13618_, new_n13617_ ) -new_n13622_ = OR ( new_n13093_, new_n4504_ ) -new_n13623_ = OR ( new_n13095_, new_n4507_ ) -new_n13624_ = OR ( new_n13097_, new_n4510_ ) -new_n13625_ = OR ( new_n13082_, new_n4514_ ) -new_n13626_ = NAND ( new_n13625_, new_n13624_, new_n13623_, new_n13622_ ) -new_n13627_ = NOR ( new_n13626_, new_n13621_, new_n13616_, new_n13611_ ) -new_n13628_ = NOR ( new_n13627_, new_n7114_ ) -new_n13629_ = OR ( new_n13628_, new_n13606_ ) -new_n13630_ = NAND ( new_n13628_, new_n13606_ ) -new_n13631_ = NAND ( new_n13630_, new_n13629_ ) -new_n13632_ = NAND ( new_n13576_, new_n13571_ ) -new_n13633_ = XOR ( new_n13632_, new_n13631_ ) -new_n13634_ = OR ( new_n13633_, new_n11859_ ) -new_n13635_ = NAND ( new_n11876_, NET_1226 ) -new_n13636_ = NOT ( NET_1258 ) -new_n13637_ = OR ( new_n7148_, new_n13636_ ) -new_n13638_ = NAND ( new_n6196_, NET_1417 ) -new_n13639_ = NAND ( new_n13638_, new_n13637_, new_n13635_, new_n13634_ ) -new_n13640_ = XNOR ( new_n13639_, new_n7027_ ) -new_n13641_ = NOT ( new_n13640_ ) -new_n13642_ = OR ( new_n13641_, new_n13586_ ) -new_n13643_ = NAND ( new_n13641_, new_n13586_ ) -new_n13644_ = AND ( new_n13643_, new_n13642_ ) -new_n13645_ = NAND ( new_n13644_, new_n11850_ ) -new_n13646_ = OR ( new_n13633_, new_n11911_ ) -new_n13647_ = NAND ( new_n11849_, NET_1385 ) -NET_20273 = NAND ( new_n13647_, new_n13646_, new_n13645_ ) -new_n13649_ = NOT ( new_n12067_ ) -new_n13650_ = OR ( new_n12554_, new_n13649_ ) -new_n13651_ = OR ( new_n12067_, NET_308 ) -new_n13652_ = NAND ( new_n13651_, new_n13650_ ) -new_n13653_ = OR ( new_n13652_, NET_313 ) -new_n13654_ = OR ( new_n12350_, new_n13649_ ) -new_n13655_ = OR ( new_n12067_, NET_309 ) -new_n13656_ = NAND ( new_n13655_, new_n13654_ ) -new_n13657_ = OR ( new_n13656_, NET_314 ) -new_n13658_ = NAND ( new_n13656_, NET_314 ) -new_n13659_ = OR ( new_n13649_, new_n12047_ ) -new_n13660_ = OR ( new_n12067_, NET_310 ) -new_n13661_ = NAND ( new_n13660_, new_n13659_ ) -new_n13662_ = NAND ( new_n13661_, NET_315 ) -new_n13663_ = OR ( new_n13661_, NET_315 ) -new_n13664_ = NAND ( new_n12217_, new_n12067_ ) -new_n13665_ = OR ( new_n12067_, NET_311 ) -new_n13666_ = NAND ( new_n13665_, new_n13664_ ) -new_n13667_ = NAND ( new_n13666_, new_n13663_, NET_316 ) -new_n13668_ = NAND ( new_n13667_, new_n13662_, new_n13658_ ) -new_n13669_ = NAND ( new_n13668_, new_n13657_, new_n13653_ ) -new_n13670_ = NAND ( new_n13652_, NET_313 ) -new_n13671_ = NAND ( new_n12329_, new_n12067_, new_n6701_ ) -new_n13672_ = OR ( new_n12067_, new_n3329_ ) -new_n13673_ = NAND ( new_n13672_, new_n13671_ ) -new_n13674_ = OR ( new_n13673_, new_n3328_ ) -new_n13675_ = NAND ( new_n13674_, new_n13670_, new_n13669_ ) -new_n13676_ = OR ( new_n13656_, new_n13652_ ) -new_n13677_ = NAND ( new_n13673_, new_n3328_ ) -new_n13678_ = NOR ( NET_546, NET_545 ) -new_n13679_ = OR ( new_n13678_, new_n6576_ ) -new_n13680_ = NOR ( new_n12060_, new_n3699_, new_n5772_ ) -new_n13681_ = OR ( new_n13680_, new_n3636_ ) -new_n13682_ = NAND ( new_n5527_, new_n5754_ ) -new_n13683_ = NAND ( new_n13682_, new_n13681_, new_n13679_, new_n6715_ ) -new_n13684_ = NOR ( new_n13683_, new_n13673_ ) -new_n13685_ = NAND ( new_n13684_, new_n13677_, new_n13676_, new_n13675_ ) -new_n13686_ = OR ( new_n13685_, NET_177 ) -new_n13687_ = NAND ( new_n13686_, NET_178 ) -new_n13688_ = NOT ( new_n3690_ ) -new_n13689_ = NOR ( new_n5514_, NET_547 ) -new_n13690_ = NOT ( new_n13689_ ) -new_n13691_ = NOR ( new_n13690_, new_n13688_ ) -new_n13692_ = NAND ( new_n13691_, new_n3699_ ) -new_n13693_ = OR ( new_n5513_, new_n3089_ ) -new_n13694_ = NAND ( new_n13693_, new_n3082_ ) -new_n13695_ = NAND ( new_n13694_, new_n13692_, new_n13687_, NET_176 ) -new_n13696_ = OR ( new_n13695_, new_n3521_ ) -NET_20348 = NAND ( new_n13696_, new_n6568_, new_n6560_ ) -new_n13698_ = NAND ( new_n13685_, new_n3703_ ) -new_n13699_ = NAND ( new_n3636_, new_n3090_ ) -new_n13700_ = NAND ( new_n5767_, new_n3636_, NET_175 ) -new_n13701_ = NAND ( new_n13700_, new_n3082_ ) -new_n13702_ = NAND ( new_n13701_, new_n13699_, new_n13698_ ) -new_n13703_ = NAND ( new_n13702_, new_n13695_ ) -new_n13704_ = OR ( new_n13695_, new_n3082_ ) -new_n13705_ = NAND ( new_n5514_, NET_178, new_n3072_ ) -new_n13706_ = NAND ( new_n5767_, NET_178, NET_175 ) -NET_20349 = NAND ( new_n13706_, new_n13705_, new_n13704_, new_n13703_ ) -new_n13708_ = NOT ( new_n12126_ ) -new_n13709_ = OR ( new_n12617_, new_n13708_ ) -new_n13710_ = OR ( new_n12126_, NET_757 ) -new_n13711_ = NAND ( new_n13710_, new_n13709_ ) -new_n13712_ = OR ( new_n13711_, NET_762 ) -new_n13713_ = OR ( new_n12418_, new_n13708_ ) -new_n13714_ = OR ( new_n12126_, NET_758 ) -new_n13715_ = NAND ( new_n13714_, new_n13713_ ) -new_n13716_ = OR ( new_n13715_, NET_763 ) -new_n13717_ = NAND ( new_n13715_, NET_763 ) -new_n13718_ = OR ( new_n13708_, new_n12106_ ) -new_n13719_ = OR ( new_n12126_, NET_759 ) -new_n13720_ = NAND ( new_n13719_, new_n13718_ ) -new_n13721_ = NAND ( new_n13720_, NET_764 ) -new_n13722_ = OR ( new_n13720_, NET_764 ) -new_n13723_ = NAND ( new_n12251_, new_n12126_ ) -new_n13724_ = OR ( new_n12126_, NET_760 ) -new_n13725_ = NAND ( new_n13724_, new_n13723_ ) -new_n13726_ = NAND ( new_n13725_, new_n13722_, NET_765 ) -new_n13727_ = NAND ( new_n13726_, new_n13721_, new_n13717_ ) -new_n13728_ = NAND ( new_n13727_, new_n13716_, new_n13712_ ) -new_n13729_ = NAND ( new_n13711_, NET_762 ) -new_n13730_ = NAND ( new_n12397_, new_n12126_, new_n6861_ ) -new_n13731_ = OR ( new_n12126_, new_n4074_ ) -new_n13732_ = NAND ( new_n13731_, new_n13730_ ) -new_n13733_ = OR ( new_n13732_, new_n4073_ ) -new_n13734_ = NAND ( new_n13733_, new_n13729_, new_n13728_ ) -new_n13735_ = OR ( new_n13715_, new_n13711_ ) -new_n13736_ = NAND ( new_n13732_, new_n4073_ ) -new_n13737_ = NOR ( NET_995, NET_994 ) -new_n13738_ = OR ( new_n13737_, new_n6621_ ) -new_n13739_ = NOR ( new_n12119_, new_n4444_, new_n6141_ ) -new_n13740_ = OR ( new_n13739_, new_n4381_ ) -new_n13741_ = NAND ( new_n5825_, new_n6123_ ) -new_n13742_ = NAND ( new_n13741_, new_n13740_, new_n13738_, new_n6875_ ) -new_n13743_ = NOR ( new_n13742_, new_n13732_ ) -new_n13744_ = NAND ( new_n13743_, new_n13736_, new_n13735_, new_n13734_ ) -new_n13745_ = OR ( new_n13744_, NET_626 ) -new_n13746_ = NAND ( new_n13745_, NET_627 ) -new_n13747_ = NOT ( new_n4435_ ) -new_n13748_ = NOR ( new_n5812_, NET_996 ) -new_n13749_ = NOT ( new_n13748_ ) -new_n13750_ = NOR ( new_n13749_, new_n13747_ ) -new_n13751_ = NAND ( new_n13750_, new_n4444_ ) -new_n13752_ = OR ( new_n5811_, new_n3834_ ) -new_n13753_ = NAND ( new_n13752_, new_n3827_ ) -new_n13754_ = NAND ( new_n13753_, new_n13751_, new_n13746_, NET_625 ) -new_n13755_ = OR ( new_n13754_, new_n4266_ ) -NET_20363 = NAND ( new_n13755_, new_n6613_, new_n6605_ ) -new_n13757_ = NAND ( new_n13744_, new_n4448_ ) -new_n13758_ = NAND ( new_n4381_, new_n3835_ ) -new_n13759_ = NAND ( new_n6136_, new_n4381_, NET_624 ) -new_n13760_ = NAND ( new_n13759_, new_n3827_ ) -new_n13761_ = NAND ( new_n13760_, new_n13758_, new_n13757_ ) -new_n13762_ = NAND ( new_n13761_, new_n13754_ ) -new_n13763_ = OR ( new_n13754_, new_n3827_ ) -new_n13764_ = NAND ( new_n5812_, NET_627, new_n3817_ ) -new_n13765_ = NAND ( new_n6136_, NET_627, NET_624 ) -NET_20364 = NAND ( new_n13765_, new_n13764_, new_n13763_, new_n13762_ ) -new_n13767_ = NOT ( new_n12185_ ) -new_n13768_ = OR ( new_n12680_, new_n13767_ ) -new_n13769_ = OR ( new_n12185_, NET_1206 ) -new_n13770_ = NAND ( new_n13769_, new_n13768_ ) -new_n13771_ = OR ( new_n13770_, NET_1211 ) -new_n13772_ = OR ( new_n12486_, new_n13767_ ) -new_n13773_ = OR ( new_n12185_, NET_1207 ) -new_n13774_ = NAND ( new_n13773_, new_n13772_ ) -new_n13775_ = OR ( new_n13774_, NET_1212 ) -new_n13776_ = NAND ( new_n13774_, NET_1212 ) -new_n13777_ = OR ( new_n13767_, new_n12165_ ) -new_n13778_ = OR ( new_n12185_, NET_1208 ) -new_n13779_ = NAND ( new_n13778_, new_n13777_ ) -new_n13780_ = NAND ( new_n13779_, NET_1213 ) -new_n13781_ = OR ( new_n13779_, NET_1213 ) -new_n13782_ = NAND ( new_n12285_, new_n12185_ ) -new_n13783_ = OR ( new_n12185_, NET_1209 ) -new_n13784_ = NAND ( new_n13783_, new_n13782_ ) -new_n13785_ = NAND ( new_n13784_, new_n13781_, NET_1214 ) -new_n13786_ = NAND ( new_n13785_, new_n13780_, new_n13776_ ) -new_n13787_ = NAND ( new_n13786_, new_n13775_, new_n13771_ ) -new_n13788_ = NAND ( new_n13770_, NET_1211 ) -new_n13789_ = NAND ( new_n12465_, new_n12185_, new_n7021_ ) -new_n13790_ = OR ( new_n12185_, new_n4818_ ) -new_n13791_ = NAND ( new_n13790_, new_n13789_ ) -new_n13792_ = OR ( new_n13791_, new_n4817_ ) -new_n13793_ = NAND ( new_n13792_, new_n13788_, new_n13787_ ) -new_n13794_ = OR ( new_n13774_, new_n13770_ ) -new_n13795_ = NAND ( new_n13791_, new_n4817_ ) -new_n13796_ = NOR ( NET_1444, NET_1443 ) -new_n13797_ = OR ( new_n13796_, new_n6666_ ) -new_n13798_ = NOR ( new_n12178_, new_n5188_, new_n6526_ ) -new_n13799_ = OR ( new_n13798_, new_n5125_ ) -new_n13800_ = NAND ( new_n6194_, new_n6508_ ) -new_n13801_ = NAND ( new_n13800_, new_n13799_, new_n13797_, new_n7035_ ) -new_n13802_ = NOR ( new_n13801_, new_n13791_ ) -new_n13803_ = NAND ( new_n13802_, new_n13795_, new_n13794_, new_n13793_ ) -new_n13804_ = OR ( new_n13803_, NET_1075 ) -new_n13805_ = NAND ( new_n13804_, NET_1076 ) -new_n13806_ = NOT ( new_n5179_ ) -new_n13807_ = NOR ( new_n6181_, NET_1445 ) -new_n13808_ = NOT ( new_n13807_ ) -new_n13809_ = NOR ( new_n13808_, new_n13806_ ) -new_n13810_ = NAND ( new_n13809_, new_n5188_ ) -new_n13811_ = OR ( new_n6180_, new_n4578_ ) -new_n13812_ = NAND ( new_n13811_, new_n4571_ ) -new_n13813_ = NAND ( new_n13812_, new_n13810_, new_n13805_, NET_1074 ) -new_n13814_ = OR ( new_n13813_, new_n5010_ ) -NET_20382 = NAND ( new_n13814_, new_n6658_, new_n6650_ ) -new_n13816_ = NAND ( new_n13803_, new_n5192_ ) -new_n13817_ = NAND ( new_n5125_, new_n4579_ ) -new_n13818_ = NAND ( new_n6521_, new_n5125_, NET_1073 ) -new_n13819_ = NAND ( new_n13818_, new_n4571_ ) -new_n13820_ = NAND ( new_n13819_, new_n13817_, new_n13816_ ) -new_n13821_ = NAND ( new_n13820_, new_n13813_ ) -new_n13822_ = OR ( new_n13813_, new_n4571_ ) -new_n13823_ = NAND ( new_n6181_, NET_1076, new_n4561_ ) -new_n13824_ = NAND ( new_n6521_, NET_1076, NET_1073 ) -NET_20383 = NAND ( new_n13824_, new_n13823_, new_n13822_, new_n13821_ ) -new_n13826_ = NAND ( new_n13705_, new_n13695_ ) -new_n13827_ = NAND ( new_n13826_, NET_177 ) -new_n13828_ = AND ( new_n5513_, new_n3070_, NET_178 ) -new_n13829_ = OR ( new_n13828_, new_n5510_ ) -new_n13830_ = NAND ( new_n13829_, new_n13695_ ) -new_n13831_ = NAND ( new_n6695_, new_n6563_ ) -NET_20446 = NAND ( new_n13831_, new_n13830_, new_n13827_ ) -new_n13833_ = NOT ( NET_329 ) -new_n13834_ = NOR ( new_n12294_, new_n13833_ ) -new_n13835_ = NOR ( new_n3179_, new_n13833_ ) -new_n13836_ = XOR ( new_n13835_, new_n13357_ ) -new_n13837_ = OR ( new_n13836_, new_n6794_ ) -new_n13838_ = NOT ( NET_488 ) -new_n13839_ = OR ( new_n6792_, new_n13838_ ) -new_n13840_ = NAND ( new_n6695_, NET_361 ) -new_n13841_ = NAND ( new_n6804_, NET_456 ) -new_n13842_ = NAND ( new_n13841_, new_n13840_, new_n13839_, new_n13837_ ) -new_n13843_ = NOR ( new_n13842_, new_n13834_ ) -new_n13844_ = XNOR ( new_n13843_, new_n5529_ ) -new_n13845_ = OR ( new_n12930_, new_n3538_ ) -new_n13846_ = OR ( new_n12932_, new_n3540_ ) -new_n13847_ = OR ( new_n12934_, new_n3542_ ) -new_n13848_ = OR ( new_n12955_, new_n3544_ ) -new_n13849_ = NAND ( new_n13848_, new_n13847_, new_n13846_, new_n13845_ ) -new_n13850_ = OR ( new_n12939_, new_n3547_ ) -new_n13851_ = OR ( new_n12941_, new_n3549_ ) -new_n13852_ = OR ( new_n12943_, new_n3551_ ) -new_n13853_ = OR ( new_n12928_, new_n3553_ ) -new_n13854_ = NAND ( new_n13853_, new_n13852_, new_n13851_, new_n13850_ ) -new_n13855_ = OR ( new_n12948_, new_n3556_ ) -new_n13856_ = OR ( new_n12950_, new_n3558_ ) -new_n13857_ = OR ( new_n12952_, new_n3560_ ) -new_n13858_ = OR ( new_n12937_, new_n3562_ ) -new_n13859_ = NAND ( new_n13858_, new_n13857_, new_n13856_, new_n13855_ ) -new_n13860_ = OR ( new_n12957_, new_n3565_ ) -new_n13861_ = OR ( new_n12959_, new_n3567_ ) -new_n13862_ = OR ( new_n12961_, new_n3569_ ) -new_n13863_ = OR ( new_n12946_, new_n3571_ ) -new_n13864_ = NAND ( new_n13863_, new_n13862_, new_n13861_, new_n13860_ ) -new_n13865_ = NOR ( new_n13864_, new_n13859_, new_n13854_, new_n13849_ ) -new_n13866_ = NOR ( new_n13865_, new_n6794_ ) -new_n13867_ = OR ( new_n13866_, new_n13844_ ) -new_n13868_ = NAND ( new_n13866_, new_n13844_ ) -new_n13869_ = NAND ( new_n13868_, new_n13867_ ) -new_n13870_ = NAND ( new_n13392_, new_n13389_ ) -new_n13871_ = NAND ( new_n13870_, new_n13390_ ) -new_n13872_ = XOR ( new_n13871_, new_n13869_ ) -new_n13873_ = OR ( new_n13872_, new_n11723_ ) -new_n13874_ = NAND ( new_n11740_, NET_329 ) -new_n13875_ = NOT ( NET_361 ) -new_n13876_ = OR ( new_n6828_, new_n13875_ ) -new_n13877_ = NAND ( new_n5529_, NET_520 ) -new_n13878_ = NAND ( new_n13877_, new_n13876_, new_n13874_, new_n13873_ ) -new_n13879_ = XNOR ( new_n13878_, new_n6707_ ) -new_n13880_ = NOT ( new_n13879_ ) -new_n13881_ = NOR ( new_n13880_, new_n13402_ ) -new_n13882_ = AND ( new_n13880_, new_n13402_ ) -new_n13883_ = NOR ( new_n13882_, new_n13881_ ) -new_n13884_ = NAND ( new_n13883_, new_n11714_ ) -new_n13885_ = OR ( new_n13872_, new_n11775_ ) -new_n13886_ = NAND ( new_n11713_, NET_488 ) -NET_20447 = NAND ( new_n13886_, new_n13885_, new_n13884_ ) -new_n13888_ = NAND ( new_n13764_, new_n13754_ ) -new_n13889_ = NAND ( new_n13888_, NET_626 ) -new_n13890_ = AND ( new_n5811_, new_n3815_, NET_627 ) -new_n13891_ = OR ( new_n13890_, new_n5808_ ) -new_n13892_ = NAND ( new_n13891_, new_n13754_ ) -new_n13893_ = NAND ( new_n6855_, new_n6608_ ) -NET_20467 = NAND ( new_n13893_, new_n13892_, new_n13889_ ) -new_n13895_ = NOT ( NET_778 ) -new_n13896_ = NOR ( new_n12362_, new_n13895_ ) -new_n13897_ = NOR ( new_n3924_, new_n13895_ ) -new_n13898_ = XOR ( new_n13897_, new_n13477_ ) -new_n13899_ = OR ( new_n13898_, new_n6954_ ) -new_n13900_ = NOT ( NET_937 ) -new_n13901_ = OR ( new_n6952_, new_n13900_ ) -new_n13902_ = NAND ( new_n6855_, NET_810 ) -new_n13903_ = NAND ( new_n6964_, NET_905 ) -new_n13904_ = NAND ( new_n13903_, new_n13902_, new_n13901_, new_n13899_ ) -new_n13905_ = NOR ( new_n13904_, new_n13896_ ) -new_n13906_ = XNOR ( new_n13905_, new_n5827_ ) -new_n13907_ = OR ( new_n12998_, new_n4283_ ) -new_n13908_ = OR ( new_n13000_, new_n4285_ ) -new_n13909_ = OR ( new_n13002_, new_n4287_ ) -new_n13910_ = OR ( new_n13023_, new_n4289_ ) -new_n13911_ = NAND ( new_n13910_, new_n13909_, new_n13908_, new_n13907_ ) -new_n13912_ = OR ( new_n13007_, new_n4292_ ) -new_n13913_ = OR ( new_n13009_, new_n4294_ ) -new_n13914_ = OR ( new_n13011_, new_n4296_ ) -new_n13915_ = OR ( new_n12996_, new_n4298_ ) -new_n13916_ = NAND ( new_n13915_, new_n13914_, new_n13913_, new_n13912_ ) -new_n13917_ = OR ( new_n13016_, new_n4301_ ) -new_n13918_ = OR ( new_n13018_, new_n4303_ ) -new_n13919_ = OR ( new_n13020_, new_n4305_ ) -new_n13920_ = OR ( new_n13005_, new_n4307_ ) -new_n13921_ = NAND ( new_n13920_, new_n13919_, new_n13918_, new_n13917_ ) -new_n13922_ = OR ( new_n13025_, new_n4310_ ) -new_n13923_ = OR ( new_n13027_, new_n4312_ ) -new_n13924_ = OR ( new_n13029_, new_n4314_ ) -new_n13925_ = OR ( new_n13014_, new_n4316_ ) -new_n13926_ = NAND ( new_n13925_, new_n13924_, new_n13923_, new_n13922_ ) -new_n13927_ = NOR ( new_n13926_, new_n13921_, new_n13916_, new_n13911_ ) -new_n13928_ = NOR ( new_n13927_, new_n6954_ ) -new_n13929_ = OR ( new_n13928_, new_n13906_ ) -new_n13930_ = NAND ( new_n13928_, new_n13906_ ) -new_n13931_ = NAND ( new_n13930_, new_n13929_ ) -new_n13932_ = NAND ( new_n13512_, new_n13509_ ) -new_n13933_ = NAND ( new_n13932_, new_n13510_ ) -new_n13934_ = XOR ( new_n13933_, new_n13931_ ) -new_n13935_ = OR ( new_n13934_, new_n11791_ ) -new_n13936_ = NAND ( new_n11808_, NET_778 ) -new_n13937_ = NOT ( NET_810 ) -new_n13938_ = OR ( new_n6988_, new_n13937_ ) -new_n13939_ = NAND ( new_n5827_, NET_969 ) -new_n13940_ = NAND ( new_n13939_, new_n13938_, new_n13936_, new_n13935_ ) -new_n13941_ = XNOR ( new_n13940_, new_n6867_ ) -new_n13942_ = NOT ( new_n13941_ ) -new_n13943_ = NOR ( new_n13942_, new_n13522_ ) -new_n13944_ = AND ( new_n13942_, new_n13522_ ) -new_n13945_ = NOR ( new_n13944_, new_n13943_ ) -new_n13946_ = NAND ( new_n13945_, new_n11782_ ) -new_n13947_ = OR ( new_n13934_, new_n11843_ ) -new_n13948_ = NAND ( new_n11781_, NET_937 ) -NET_20468 = NAND ( new_n13948_, new_n13947_, new_n13946_ ) -new_n13950_ = NAND ( new_n13823_, new_n13813_ ) -new_n13951_ = NAND ( new_n13950_, NET_1075 ) -new_n13952_ = AND ( new_n6180_, new_n4559_, NET_1076 ) -new_n13953_ = OR ( new_n13952_, new_n6177_ ) -new_n13954_ = NAND ( new_n13953_, new_n13813_ ) -new_n13955_ = NAND ( new_n7015_, new_n6653_ ) -NET_20488 = NAND ( new_n13955_, new_n13954_, new_n13951_ ) -new_n13957_ = NOT ( NET_1227 ) -new_n13958_ = NOR ( new_n12430_, new_n13957_ ) -new_n13959_ = NOR ( new_n4668_, new_n13957_ ) -new_n13960_ = XOR ( new_n13959_, new_n13597_ ) -new_n13961_ = OR ( new_n13960_, new_n7114_ ) -new_n13962_ = NOT ( NET_1386 ) -new_n13963_ = OR ( new_n7112_, new_n13962_ ) -new_n13964_ = NAND ( new_n7015_, NET_1259 ) -new_n13965_ = NAND ( new_n7124_, NET_1354 ) -new_n13966_ = NAND ( new_n13965_, new_n13964_, new_n13963_, new_n13961_ ) -new_n13967_ = NOR ( new_n13966_, new_n13958_ ) -new_n13968_ = XNOR ( new_n13967_, new_n6196_ ) -new_n13969_ = OR ( new_n13066_, new_n5027_ ) -new_n13970_ = OR ( new_n13068_, new_n5029_ ) -new_n13971_ = OR ( new_n13070_, new_n5031_ ) -new_n13972_ = OR ( new_n13091_, new_n5033_ ) -new_n13973_ = NAND ( new_n13972_, new_n13971_, new_n13970_, new_n13969_ ) -new_n13974_ = OR ( new_n13075_, new_n5036_ ) -new_n13975_ = OR ( new_n13077_, new_n5038_ ) -new_n13976_ = OR ( new_n13079_, new_n5040_ ) -new_n13977_ = OR ( new_n13064_, new_n5042_ ) -new_n13978_ = NAND ( new_n13977_, new_n13976_, new_n13975_, new_n13974_ ) -new_n13979_ = OR ( new_n13084_, new_n5045_ ) -new_n13980_ = OR ( new_n13086_, new_n5047_ ) -new_n13981_ = OR ( new_n13088_, new_n5049_ ) -new_n13982_ = OR ( new_n13073_, new_n5051_ ) -new_n13983_ = NAND ( new_n13982_, new_n13981_, new_n13980_, new_n13979_ ) -new_n13984_ = OR ( new_n13093_, new_n5054_ ) -new_n13985_ = OR ( new_n13095_, new_n5056_ ) -new_n13986_ = OR ( new_n13097_, new_n5058_ ) -new_n13987_ = OR ( new_n13082_, new_n5060_ ) -new_n13988_ = NAND ( new_n13987_, new_n13986_, new_n13985_, new_n13984_ ) -new_n13989_ = NOR ( new_n13988_, new_n13983_, new_n13978_, new_n13973_ ) -new_n13990_ = NOR ( new_n13989_, new_n7114_ ) -new_n13991_ = OR ( new_n13990_, new_n13968_ ) -new_n13992_ = NAND ( new_n13990_, new_n13968_ ) -new_n13993_ = NAND ( new_n13992_, new_n13991_ ) -new_n13994_ = NAND ( new_n13632_, new_n13629_ ) -new_n13995_ = NAND ( new_n13994_, new_n13630_ ) -new_n13996_ = XOR ( new_n13995_, new_n13993_ ) -new_n13997_ = OR ( new_n13996_, new_n11859_ ) -new_n13998_ = NAND ( new_n11876_, NET_1227 ) -new_n13999_ = NOT ( NET_1259 ) -new_n14000_ = OR ( new_n7148_, new_n13999_ ) -new_n14001_ = NAND ( new_n6196_, NET_1418 ) -new_n14002_ = NAND ( new_n14001_, new_n14000_, new_n13998_, new_n13997_ ) -new_n14003_ = XNOR ( new_n14002_, new_n7027_ ) -new_n14004_ = NOT ( new_n14003_ ) -new_n14005_ = NOR ( new_n14004_, new_n13642_ ) -new_n14006_ = AND ( new_n14004_, new_n13642_ ) -new_n14007_ = NOR ( new_n14006_, new_n14005_ ) -new_n14008_ = NAND ( new_n14007_, new_n11850_ ) -new_n14009_ = OR ( new_n13996_, new_n11911_ ) -new_n14010_ = NAND ( new_n11849_, NET_1386 ) -NET_20489 = NAND ( new_n14010_, new_n14009_, new_n14008_ ) -new_n14012_ = NOT ( new_n11734_ ) -new_n14013_ = NAND ( new_n3661_, new_n3636_, new_n3150_ ) -new_n14014_ = NAND ( new_n14013_, new_n14012_ ) -new_n14015_ = NOT ( new_n14014_ ) -new_n14016_ = OR ( new_n14015_, new_n11773_ ) -new_n14017_ = OR ( new_n11773_, new_n6753_ ) -new_n14018_ = NOT ( new_n3661_ ) -new_n14019_ = NOT ( new_n11725_ ) -new_n14020_ = NOR ( new_n14019_, new_n14018_ ) -new_n14021_ = NOT ( new_n14020_ ) -new_n14022_ = OR ( new_n14021_, new_n6849_ ) -new_n14023_ = NOT ( NET_509 ) -new_n14024_ = OR ( new_n11719_, new_n3150_ ) -new_n14025_ = OR ( new_n14024_, new_n14023_ ) -new_n14026_ = NAND ( new_n6731_, new_n5761_, new_n3231_ ) -new_n14027_ = NAND ( new_n14026_, NET_318 ) -new_n14028_ = AND ( new_n14027_, new_n14025_, new_n14022_ ) -new_n14029_ = NAND ( new_n14028_, new_n14017_, new_n14016_ ) -new_n14030_ = NAND ( new_n11959_, new_n11773_ ) -new_n14031_ = NAND ( new_n12204_, new_n11918_ ) -new_n14032_ = OR ( new_n14031_, new_n14030_ ) -new_n14033_ = NOR ( new_n14032_, new_n3130_ ) -new_n14034_ = OR ( new_n12534_, new_n11918_ ) -new_n14035_ = OR ( new_n14034_, new_n14030_ ) -new_n14036_ = OR ( new_n14035_, new_n3365_ ) -new_n14037_ = NAND ( new_n11959_, new_n12014_ ) -new_n14038_ = OR ( new_n14037_, new_n14031_ ) -new_n14039_ = OR ( new_n14038_, new_n3367_ ) -new_n14040_ = OR ( new_n14037_, new_n14034_ ) -new_n14041_ = OR ( new_n14040_, new_n3369_ ) -new_n14042_ = NOR ( new_n12534_, new_n12209_ ) -new_n14043_ = NOR ( new_n11959_, new_n12014_ ) -new_n14044_ = NAND ( new_n14043_, new_n14042_ ) -new_n14045_ = OR ( new_n14044_, new_n3122_ ) -new_n14046_ = NAND ( new_n14045_, new_n14041_, new_n14039_, new_n14036_ ) -new_n14047_ = NOR ( new_n11959_, new_n11773_ ) -new_n14048_ = NOR ( new_n12204_, new_n11918_ ) -new_n14049_ = NAND ( new_n14048_, new_n14047_, NET_185 ) -new_n14050_ = NAND ( new_n14048_, new_n14043_, NET_201 ) -new_n14051_ = NOR ( new_n12204_, new_n12209_ ) -new_n14052_ = NAND ( new_n14051_, new_n14047_, NET_193 ) -new_n14053_ = NAND ( new_n14052_, new_n14050_, new_n14049_ ) -new_n14054_ = NAND ( new_n12534_, new_n11959_, new_n12209_, new_n11773_ ) -new_n14055_ = OR ( new_n14054_, new_n3144_ ) -new_n14056_ = NAND ( new_n12534_, new_n11959_, new_n11918_, new_n12014_ ) -new_n14057_ = OR ( new_n14056_, new_n3146_ ) -new_n14058_ = NAND ( new_n12534_, new_n11959_, new_n12209_, new_n12014_ ) -new_n14059_ = OR ( new_n14058_, new_n3383_ ) -new_n14060_ = NAND ( new_n14051_, new_n14043_, NET_209 ) -new_n14061_ = NAND ( new_n14060_, new_n14059_, new_n14057_, new_n14055_ ) -new_n14062_ = NOR ( new_n12534_, new_n11918_ ) -new_n14063_ = NAND ( new_n14043_, new_n14062_, NET_265 ) -new_n14064_ = NAND ( new_n14047_, new_n14042_, NET_257 ) -new_n14065_ = NAND ( new_n14047_, new_n14062_, NET_249 ) -new_n14066_ = NAND ( new_n12534_, new_n11959_, new_n11918_, new_n11773_ ) -new_n14067_ = OR ( new_n14066_, new_n3142_ ) -new_n14068_ = NAND ( new_n14067_, new_n14065_, new_n14064_, new_n14063_ ) -new_n14069_ = OR ( new_n14068_, new_n14061_, new_n14053_ ) -new_n14070_ = NOR ( new_n14069_, new_n14046_, new_n14033_, new_n14021_ ) -new_n14071_ = NOR ( new_n12211_, new_n12020_ ) -new_n14072_ = NOR ( new_n11594_, new_n12536_ ) -new_n14073_ = NAND ( new_n14072_, new_n14071_ ) -new_n14074_ = OR ( new_n14073_, new_n3122_ ) -new_n14075_ = NOR ( new_n8599_, new_n12020_ ) -new_n14076_ = NAND ( new_n14075_, new_n14072_ ) -new_n14077_ = OR ( new_n14076_, new_n3124_ ) -new_n14078_ = NOR ( new_n12211_, new_n6849_ ) -new_n14079_ = NAND ( new_n14078_, new_n14072_ ) -new_n14080_ = OR ( new_n14079_, new_n3126_ ) -new_n14081_ = NOR ( new_n8599_, new_n6849_ ) -new_n14082_ = NAND ( new_n14081_, new_n14072_ ) -new_n14083_ = OR ( new_n14082_, new_n3361_ ) -new_n14084_ = NAND ( new_n14083_, new_n14080_, new_n14077_, new_n14074_ ) -new_n14085_ = NOR ( new_n12336_, new_n12536_ ) -new_n14086_ = NAND ( new_n14085_, new_n14071_ ) -new_n14087_ = OR ( new_n14086_, new_n3130_ ) -new_n14088_ = NAND ( new_n14085_, new_n14075_ ) -new_n14089_ = OR ( new_n14088_, new_n3365_ ) -new_n14090_ = NAND ( new_n14085_, new_n14078_ ) -new_n14091_ = OR ( new_n14090_, new_n3367_ ) -new_n14092_ = NAND ( new_n14085_, new_n14081_ ) -new_n14093_ = OR ( new_n14092_, new_n3369_ ) -new_n14094_ = NAND ( new_n14093_, new_n14091_, new_n14089_, new_n14087_ ) -new_n14095_ = NOR ( new_n11594_, new_n11589_ ) -new_n14096_ = NAND ( new_n14095_, new_n14071_ ) -new_n14097_ = OR ( new_n14096_, new_n3372_ ) -new_n14098_ = NAND ( new_n14095_, new_n14075_ ) -new_n14099_ = OR ( new_n14098_, new_n3374_ ) -new_n14100_ = NAND ( new_n14095_, new_n14078_ ) -new_n14101_ = OR ( new_n14100_, new_n3376_ ) -new_n14102_ = NAND ( new_n14095_, new_n14081_ ) -new_n14103_ = OR ( new_n14102_, new_n3139_ ) -new_n14104_ = NAND ( new_n14103_, new_n14101_, new_n14099_, new_n14097_ ) -new_n14105_ = NOR ( new_n12336_, new_n11589_ ) -new_n14106_ = NAND ( new_n14105_, new_n14071_ ) -new_n14107_ = OR ( new_n14106_, new_n3142_ ) -new_n14108_ = NAND ( new_n14105_, new_n14075_ ) -new_n14109_ = OR ( new_n14108_, new_n3144_ ) -new_n14110_ = NAND ( new_n14105_, new_n14078_ ) -new_n14111_ = OR ( new_n14110_, new_n3146_ ) -new_n14112_ = NAND ( new_n14105_, new_n14081_ ) -new_n14113_ = OR ( new_n14112_, new_n3383_ ) -new_n14114_ = NAND ( new_n14113_, new_n14111_, new_n14109_, new_n14107_ ) -new_n14115_ = NOR ( new_n14114_, new_n14104_, new_n14094_, new_n14084_ ) -new_n14116_ = NOR ( new_n14115_, new_n14013_ ) -new_n14117_ = NOR ( new_n14012_, new_n3386_ ) -new_n14118_ = NOR ( new_n12341_, new_n2971_ ) -new_n14119_ = NAND ( new_n14118_, new_n12551_, new_n12039_ ) -new_n14120_ = OR ( new_n14119_, new_n3122_ ) -new_n14121_ = NOR ( new_n12341_, NET_311 ) -new_n14122_ = NAND ( new_n14121_, new_n12551_, new_n12039_ ) -new_n14123_ = OR ( new_n14122_, new_n3124_ ) -new_n14124_ = NOT ( new_n12039_ ) -new_n14125_ = NAND ( new_n14118_, new_n12551_, new_n14124_ ) -new_n14126_ = OR ( new_n14125_, new_n3126_ ) -new_n14127_ = NAND ( new_n14121_, new_n12551_, new_n14124_ ) -new_n14128_ = OR ( new_n14127_, new_n3361_ ) -new_n14129_ = NAND ( new_n14128_, new_n14126_, new_n14123_, new_n14120_ ) -new_n14130_ = NOT ( new_n12341_ ) -new_n14131_ = NOR ( new_n14130_, new_n2971_ ) -new_n14132_ = NAND ( new_n14131_, new_n12551_, new_n12039_ ) -new_n14133_ = OR ( new_n14132_, new_n3130_ ) -new_n14134_ = NOR ( new_n14130_, NET_311 ) -new_n14135_ = NAND ( new_n14134_, new_n12551_, new_n12039_ ) -new_n14136_ = OR ( new_n14135_, new_n3365_ ) -new_n14137_ = NAND ( new_n14131_, new_n12551_, new_n14124_ ) -new_n14138_ = OR ( new_n14137_, new_n3367_ ) -new_n14139_ = NAND ( new_n14134_, new_n12551_, new_n14124_ ) -new_n14140_ = OR ( new_n14139_, new_n3369_ ) -new_n14141_ = NAND ( new_n14140_, new_n14138_, new_n14136_, new_n14133_ ) -new_n14142_ = NOR ( new_n12551_, new_n14124_ ) -new_n14143_ = NAND ( new_n14142_, new_n14118_ ) -new_n14144_ = OR ( new_n14143_, new_n3372_ ) -new_n14145_ = NAND ( new_n14142_, new_n14121_ ) -new_n14146_ = OR ( new_n14145_, new_n3374_ ) -new_n14147_ = NOR ( new_n12551_, new_n12039_ ) -new_n14148_ = NAND ( new_n14147_, new_n14118_ ) -new_n14149_ = OR ( new_n14148_, new_n3376_ ) -new_n14150_ = NAND ( new_n14147_, new_n14121_ ) -new_n14151_ = OR ( new_n14150_, new_n3139_ ) -new_n14152_ = NAND ( new_n14151_, new_n14149_, new_n14146_, new_n14144_ ) -new_n14153_ = NAND ( new_n14142_, new_n14131_ ) -new_n14154_ = OR ( new_n14153_, new_n3142_ ) -new_n14155_ = NAND ( new_n14142_, new_n14134_ ) -new_n14156_ = OR ( new_n14155_, new_n3144_ ) -new_n14157_ = NAND ( new_n14147_, new_n14131_ ) -new_n14158_ = OR ( new_n14157_, new_n3146_ ) -new_n14159_ = NAND ( new_n14147_, new_n14134_ ) -new_n14160_ = OR ( new_n14159_, new_n3383_ ) -new_n14161_ = NAND ( new_n14160_, new_n14158_, new_n14156_, new_n14154_ ) -new_n14162_ = NOR ( new_n14161_, new_n14152_, new_n14141_, new_n14129_ ) -new_n14163_ = OR ( new_n14162_, new_n6753_ ) -new_n14164_ = OR ( new_n3208_, new_n2967_ ) -new_n14165_ = NAND ( new_n14164_, new_n14163_, new_n11719_, new_n3231_ ) -new_n14166_ = NOR ( new_n14165_, new_n14117_, new_n14116_, new_n14070_ ) -new_n14167_ = XOR ( new_n14166_, new_n14021_ ) -new_n14168_ = NAND ( new_n14167_, new_n14029_ ) -new_n14169_ = OR ( new_n14167_, new_n14029_ ) -new_n14170_ = AND ( new_n14169_, new_n14168_ ) -new_n14171_ = OR ( new_n14015_, new_n11918_ ) -new_n14172_ = OR ( new_n11918_, new_n6753_ ) -new_n14173_ = OR ( new_n14021_, new_n8599_ ) -new_n14174_ = NAND ( new_n14026_, NET_317 ) -new_n14175_ = NOT ( NET_508 ) -new_n14176_ = OR ( new_n14024_, new_n14175_ ) -new_n14177_ = AND ( new_n14176_, new_n14174_, new_n3208_ ) -new_n14178_ = NAND ( new_n14177_, new_n14173_, new_n14172_, new_n14171_ ) -new_n14179_ = NOR ( new_n14032_, new_n3159_ ) -new_n14180_ = OR ( new_n14035_, new_n3413_ ) -new_n14181_ = OR ( new_n14038_, new_n3415_ ) -new_n14182_ = OR ( new_n14040_, new_n3417_ ) -new_n14183_ = OR ( new_n14044_, new_n3151_ ) -new_n14184_ = NAND ( new_n14183_, new_n14182_, new_n14181_, new_n14180_ ) -new_n14185_ = NAND ( new_n14048_, new_n14047_ ) -new_n14186_ = OR ( new_n14185_, new_n3168_ ) -new_n14187_ = NAND ( new_n14048_, new_n14043_ ) -new_n14188_ = OR ( new_n14187_, new_n3422_ ) -new_n14189_ = NAND ( new_n14051_, new_n14047_ ) -new_n14190_ = OR ( new_n14189_, new_n3424_ ) -new_n14191_ = NAND ( new_n14190_, new_n14188_, new_n14186_ ) -new_n14192_ = OR ( new_n14054_, new_n3173_ ) -new_n14193_ = OR ( new_n14056_, new_n3175_ ) -new_n14194_ = OR ( new_n14058_, new_n3431_ ) -new_n14195_ = NAND ( new_n14051_, new_n14043_ ) -new_n14196_ = OR ( new_n14195_, new_n3420_ ) -new_n14197_ = NAND ( new_n14196_, new_n14194_, new_n14193_, new_n14192_ ) -new_n14198_ = NAND ( new_n14043_, new_n14062_ ) -new_n14199_ = OR ( new_n14198_, new_n3153_ ) -new_n14200_ = NAND ( new_n14047_, new_n14042_ ) -new_n14201_ = OR ( new_n14200_, new_n3155_ ) -new_n14202_ = NAND ( new_n14047_, new_n14062_ ) -new_n14203_ = OR ( new_n14202_, new_n3409_ ) -new_n14204_ = OR ( new_n14066_, new_n3171_ ) -new_n14205_ = NAND ( new_n14204_, new_n14203_, new_n14201_, new_n14199_ ) -new_n14206_ = OR ( new_n14205_, new_n14197_, new_n14191_ ) -new_n14207_ = NOR ( new_n14206_, new_n14184_, new_n14179_, new_n14021_ ) -new_n14208_ = OR ( new_n14073_, new_n3151_ ) -new_n14209_ = OR ( new_n14076_, new_n3153_ ) -new_n14210_ = OR ( new_n14079_, new_n3155_ ) -new_n14211_ = OR ( new_n14082_, new_n3409_ ) -new_n14212_ = NAND ( new_n14211_, new_n14210_, new_n14209_, new_n14208_ ) -new_n14213_ = OR ( new_n14086_, new_n3159_ ) -new_n14214_ = OR ( new_n14088_, new_n3413_ ) -new_n14215_ = OR ( new_n14090_, new_n3415_ ) -new_n14216_ = OR ( new_n14092_, new_n3417_ ) -new_n14217_ = NAND ( new_n14216_, new_n14215_, new_n14214_, new_n14213_ ) -new_n14218_ = OR ( new_n14096_, new_n3420_ ) -new_n14219_ = OR ( new_n14098_, new_n3422_ ) -new_n14220_ = OR ( new_n14100_, new_n3424_ ) -new_n14221_ = OR ( new_n14102_, new_n3168_ ) -new_n14222_ = NAND ( new_n14221_, new_n14220_, new_n14219_, new_n14218_ ) -new_n14223_ = OR ( new_n14106_, new_n3171_ ) -new_n14224_ = OR ( new_n14108_, new_n3173_ ) -new_n14225_ = OR ( new_n14110_, new_n3175_ ) -new_n14226_ = OR ( new_n14112_, new_n3431_ ) -new_n14227_ = NAND ( new_n14226_, new_n14225_, new_n14224_, new_n14223_ ) -new_n14228_ = NOR ( new_n14227_, new_n14222_, new_n14217_, new_n14212_ ) -new_n14229_ = NOR ( new_n14228_, new_n14013_ ) -new_n14230_ = NOR ( new_n14012_, new_n3434_ ) -new_n14231_ = OR ( new_n14119_, new_n3151_ ) -new_n14232_ = OR ( new_n14122_, new_n3153_ ) -new_n14233_ = OR ( new_n14125_, new_n3155_ ) -new_n14234_ = OR ( new_n14127_, new_n3409_ ) -new_n14235_ = NAND ( new_n14234_, new_n14233_, new_n14232_, new_n14231_ ) -new_n14236_ = OR ( new_n14132_, new_n3159_ ) -new_n14237_ = OR ( new_n14135_, new_n3413_ ) -new_n14238_ = OR ( new_n14137_, new_n3415_ ) -new_n14239_ = OR ( new_n14139_, new_n3417_ ) -new_n14240_ = NAND ( new_n14239_, new_n14238_, new_n14237_, new_n14236_ ) -new_n14241_ = OR ( new_n14143_, new_n3420_ ) -new_n14242_ = OR ( new_n14145_, new_n3422_ ) -new_n14243_ = OR ( new_n14148_, new_n3424_ ) -new_n14244_ = OR ( new_n14150_, new_n3168_ ) -new_n14245_ = NAND ( new_n14244_, new_n14243_, new_n14242_, new_n14241_ ) -new_n14246_ = OR ( new_n14153_, new_n3171_ ) -new_n14247_ = OR ( new_n14155_, new_n3173_ ) -new_n14248_ = OR ( new_n14157_, new_n3175_ ) -new_n14249_ = OR ( new_n14159_, new_n3431_ ) -new_n14250_ = NAND ( new_n14249_, new_n14248_, new_n14247_, new_n14246_ ) -new_n14251_ = NOR ( new_n14250_, new_n14245_, new_n14240_, new_n14235_ ) -new_n14252_ = OR ( new_n14251_, new_n6753_ ) -new_n14253_ = OR ( new_n3208_, new_n2971_ ) -new_n14254_ = NAND ( new_n14253_, new_n14252_, new_n6731_, new_n5761_ ) -new_n14255_ = NOR ( new_n14254_, new_n14230_, new_n14229_, new_n14207_ ) -new_n14256_ = OR ( new_n14255_, new_n14178_ ) -new_n14257_ = NAND ( new_n14255_, new_n14021_ ) -new_n14258_ = NAND ( new_n14257_, new_n14256_ ) -new_n14259_ = XNOR ( new_n14258_, new_n14170_ ) -new_n14260_ = NOT ( new_n14259_ ) -new_n14261_ = NOR ( new_n13688_, new_n3229_ ) -new_n14262_ = NOR ( new_n14261_, new_n3637_ ) -new_n14263_ = NOR ( new_n14262_, new_n3150_ ) -new_n14264_ = NOR ( new_n13688_, new_n3208_ ) -new_n14265_ = OR ( new_n14264_, new_n14263_ ) -new_n14266_ = NAND ( new_n14265_, new_n5513_ ) -new_n14267_ = NAND ( new_n14266_, new_n6588_ ) -new_n14268_ = NAND ( new_n14267_, new_n3636_ ) -new_n14269_ = NAND ( new_n5513_, new_n6588_, new_n3150_ ) -new_n14270_ = NAND ( new_n14269_, new_n3627_ ) -new_n14271_ = NAND ( new_n14270_, new_n5523_, new_n5515_, new_n3208_ ) -new_n14272_ = NAND ( new_n14271_, new_n14268_, new_n12066_ ) -new_n14273_ = NAND ( new_n14272_, new_n5510_ ) -new_n14274_ = OR ( new_n5768_, NET_178 ) -new_n14275_ = NAND ( new_n14274_, new_n14273_ ) -new_n14276_ = AND ( new_n14275_, NET_176 ) -new_n14277_ = NAND ( new_n6803_, new_n6595_, new_n6715_, new_n5528_ ) -new_n14278_ = NAND ( new_n14277_, new_n14276_ ) -new_n14279_ = NOR ( new_n14278_, new_n14260_ ) -new_n14280_ = OR ( new_n12032_, new_n12026_, new_n11738_ ) -new_n14281_ = NAND ( new_n14280_, new_n14276_ ) -new_n14282_ = NOR ( new_n14281_, new_n11773_ ) -new_n14283_ = NAND ( new_n11728_, new_n6722_, new_n6702_, new_n11727_ ) -new_n14284_ = NAND ( new_n14283_, new_n14276_ ) -new_n14285_ = OR ( new_n14284_, new_n6849_ ) -new_n14286_ = NAND ( new_n14276_, new_n12042_ ) -new_n14287_ = OR ( new_n14286_, new_n6800_ ) -new_n14288_ = OR ( new_n14275_, new_n6796_ ) -new_n14289_ = NAND ( new_n14275_, new_n3072_ ) -new_n14290_ = OR ( new_n14289_, new_n14023_ ) -new_n14291_ = NAND ( new_n14290_, new_n14288_, new_n14287_, new_n14285_ ) -NET_20556 = OR ( new_n14291_, new_n14282_, new_n14279_ ) -new_n14293_ = NAND ( new_n3091_, new_n3082_, new_n3521_ ) -new_n14294_ = NAND ( new_n14293_, new_n6583_ ) -new_n14295_ = NAND ( new_n14294_, NET_178 ) -new_n14296_ = NOR ( new_n14295_, new_n14260_ ) -new_n14297_ = NAND ( new_n14294_, new_n6829_ ) -new_n14298_ = OR ( new_n14297_, new_n11773_ ) -new_n14299_ = NAND ( new_n14294_, new_n6695_ ) -new_n14300_ = OR ( new_n14299_, new_n6849_ ) -new_n14301_ = NAND ( new_n14294_, new_n5767_ ) -new_n14302_ = OR ( new_n14301_, new_n14023_ ) -new_n14303_ = OR ( new_n14294_, new_n11742_ ) -new_n14304_ = NAND ( new_n14303_, new_n14302_, new_n14300_, new_n14298_ ) -NET_20557 = OR ( new_n14304_, new_n14296_ ) -new_n14306_ = NAND ( new_n6703_, new_n3636_ ) -new_n14307_ = NAND ( new_n14306_, new_n5530_ ) -new_n14308_ = AND ( new_n14307_, new_n5513_ ) -new_n14309_ = NOR ( new_n6706_, new_n5508_ ) -new_n14310_ = OR ( new_n14309_, new_n14308_, new_n6804_ ) -new_n14311_ = NAND ( new_n14310_, new_n3703_ ) -new_n14312_ = OR ( new_n14311_, new_n6753_ ) -new_n14313_ = OR ( new_n14312_, new_n14260_ ) -new_n14314_ = OR ( new_n14311_, new_n5761_ ) -new_n14315_ = OR ( new_n14314_, new_n6849_ ) -new_n14316_ = NAND ( new_n14311_, NET_445 ) -new_n14317_ = OR ( new_n14311_, new_n5763_ ) -new_n14318_ = OR ( new_n14317_, new_n5604_ ) -NET_20558 = NAND ( new_n14318_, new_n14316_, new_n14315_, new_n14313_ ) -new_n14320_ = NOT ( new_n11802_ ) -new_n14321_ = NAND ( new_n4406_, new_n4381_, new_n3895_ ) -new_n14322_ = NAND ( new_n14321_, new_n14320_ ) -new_n14323_ = NOT ( new_n14322_ ) -new_n14324_ = OR ( new_n14323_, new_n11841_ ) -new_n14325_ = OR ( new_n11841_, new_n6913_ ) -new_n14326_ = NOT ( new_n4406_ ) -new_n14327_ = NOT ( new_n11793_ ) -new_n14328_ = NOR ( new_n14327_, new_n14326_ ) -new_n14329_ = NOT ( new_n14328_ ) -new_n14330_ = OR ( new_n14329_, new_n7009_ ) -new_n14331_ = NOT ( NET_958 ) -new_n14332_ = OR ( new_n11787_, new_n3895_ ) -new_n14333_ = OR ( new_n14332_, new_n14331_ ) -new_n14334_ = NAND ( new_n6891_, new_n6130_, new_n3976_ ) -new_n14335_ = NAND ( new_n14334_, NET_767 ) -new_n14336_ = AND ( new_n14335_, new_n14333_, new_n14330_ ) -new_n14337_ = NAND ( new_n14336_, new_n14325_, new_n14324_ ) -new_n14338_ = NAND ( new_n11984_, new_n11841_ ) -new_n14339_ = NAND ( new_n12238_, new_n11926_ ) -new_n14340_ = OR ( new_n14339_, new_n14338_ ) -new_n14341_ = NOR ( new_n14340_, new_n3875_ ) -new_n14342_ = OR ( new_n12597_, new_n11926_ ) -new_n14343_ = OR ( new_n14342_, new_n14338_ ) -new_n14344_ = OR ( new_n14343_, new_n4110_ ) -new_n14345_ = NAND ( new_n11984_, new_n12073_ ) -new_n14346_ = OR ( new_n14345_, new_n14339_ ) -new_n14347_ = OR ( new_n14346_, new_n4112_ ) -new_n14348_ = OR ( new_n14345_, new_n14342_ ) -new_n14349_ = OR ( new_n14348_, new_n4114_ ) -new_n14350_ = NOR ( new_n12597_, new_n12243_ ) -new_n14351_ = NOR ( new_n11984_, new_n12073_ ) -new_n14352_ = NAND ( new_n14351_, new_n14350_ ) -new_n14353_ = OR ( new_n14352_, new_n3867_ ) -new_n14354_ = NAND ( new_n14353_, new_n14349_, new_n14347_, new_n14344_ ) -new_n14355_ = NOR ( new_n11984_, new_n11841_ ) -new_n14356_ = NOR ( new_n12238_, new_n11926_ ) -new_n14357_ = NAND ( new_n14356_, new_n14355_, NET_634 ) -new_n14358_ = NAND ( new_n14356_, new_n14351_, NET_650 ) -new_n14359_ = NOR ( new_n12238_, new_n12243_ ) -new_n14360_ = NAND ( new_n14359_, new_n14355_, NET_642 ) -new_n14361_ = NAND ( new_n14360_, new_n14358_, new_n14357_ ) -new_n14362_ = NAND ( new_n12597_, new_n11984_, new_n12243_, new_n11841_ ) -new_n14363_ = OR ( new_n14362_, new_n3889_ ) -new_n14364_ = NAND ( new_n12597_, new_n11984_, new_n11926_, new_n12073_ ) -new_n14365_ = OR ( new_n14364_, new_n3891_ ) -new_n14366_ = NAND ( new_n12597_, new_n11984_, new_n12243_, new_n12073_ ) -new_n14367_ = OR ( new_n14366_, new_n4128_ ) -new_n14368_ = NAND ( new_n14359_, new_n14351_, NET_658 ) -new_n14369_ = NAND ( new_n14368_, new_n14367_, new_n14365_, new_n14363_ ) -new_n14370_ = NOR ( new_n12597_, new_n11926_ ) -new_n14371_ = NAND ( new_n14351_, new_n14370_, NET_714 ) -new_n14372_ = NAND ( new_n14355_, new_n14350_, NET_706 ) -new_n14373_ = NAND ( new_n14355_, new_n14370_, NET_698 ) -new_n14374_ = NAND ( new_n12597_, new_n11984_, new_n11926_, new_n11841_ ) -new_n14375_ = OR ( new_n14374_, new_n3887_ ) -new_n14376_ = NAND ( new_n14375_, new_n14373_, new_n14372_, new_n14371_ ) -new_n14377_ = OR ( new_n14376_, new_n14369_, new_n14361_ ) -new_n14378_ = NOR ( new_n14377_, new_n14354_, new_n14341_, new_n14329_ ) -new_n14379_ = NOR ( new_n12245_, new_n12079_ ) -new_n14380_ = NOR ( new_n11650_, new_n12599_ ) -new_n14381_ = NAND ( new_n14380_, new_n14379_ ) -new_n14382_ = OR ( new_n14381_, new_n3867_ ) -new_n14383_ = NOR ( new_n10067_, new_n12079_ ) -new_n14384_ = NAND ( new_n14383_, new_n14380_ ) -new_n14385_ = OR ( new_n14384_, new_n3869_ ) -new_n14386_ = NOR ( new_n12245_, new_n7009_ ) -new_n14387_ = NAND ( new_n14386_, new_n14380_ ) -new_n14388_ = OR ( new_n14387_, new_n3871_ ) -new_n14389_ = NOR ( new_n10067_, new_n7009_ ) -new_n14390_ = NAND ( new_n14389_, new_n14380_ ) -new_n14391_ = OR ( new_n14390_, new_n4106_ ) -new_n14392_ = NAND ( new_n14391_, new_n14388_, new_n14385_, new_n14382_ ) -new_n14393_ = NOR ( new_n12404_, new_n12599_ ) -new_n14394_ = NAND ( new_n14393_, new_n14379_ ) -new_n14395_ = OR ( new_n14394_, new_n3875_ ) -new_n14396_ = NAND ( new_n14393_, new_n14383_ ) -new_n14397_ = OR ( new_n14396_, new_n4110_ ) -new_n14398_ = NAND ( new_n14393_, new_n14386_ ) -new_n14399_ = OR ( new_n14398_, new_n4112_ ) -new_n14400_ = NAND ( new_n14393_, new_n14389_ ) -new_n14401_ = OR ( new_n14400_, new_n4114_ ) -new_n14402_ = NAND ( new_n14401_, new_n14399_, new_n14397_, new_n14395_ ) -new_n14403_ = NOR ( new_n11650_, new_n11645_ ) -new_n14404_ = NAND ( new_n14403_, new_n14379_ ) -new_n14405_ = OR ( new_n14404_, new_n4117_ ) -new_n14406_ = NAND ( new_n14403_, new_n14383_ ) -new_n14407_ = OR ( new_n14406_, new_n4119_ ) -new_n14408_ = NAND ( new_n14403_, new_n14386_ ) -new_n14409_ = OR ( new_n14408_, new_n4121_ ) -new_n14410_ = NAND ( new_n14403_, new_n14389_ ) -new_n14411_ = OR ( new_n14410_, new_n3884_ ) -new_n14412_ = NAND ( new_n14411_, new_n14409_, new_n14407_, new_n14405_ ) -new_n14413_ = NOR ( new_n12404_, new_n11645_ ) -new_n14414_ = NAND ( new_n14413_, new_n14379_ ) -new_n14415_ = OR ( new_n14414_, new_n3887_ ) -new_n14416_ = NAND ( new_n14413_, new_n14383_ ) -new_n14417_ = OR ( new_n14416_, new_n3889_ ) -new_n14418_ = NAND ( new_n14413_, new_n14386_ ) -new_n14419_ = OR ( new_n14418_, new_n3891_ ) -new_n14420_ = NAND ( new_n14413_, new_n14389_ ) -new_n14421_ = OR ( new_n14420_, new_n4128_ ) -new_n14422_ = NAND ( new_n14421_, new_n14419_, new_n14417_, new_n14415_ ) -new_n14423_ = NOR ( new_n14422_, new_n14412_, new_n14402_, new_n14392_ ) -new_n14424_ = NOR ( new_n14423_, new_n14321_ ) -new_n14425_ = NOR ( new_n14320_, new_n4131_ ) -new_n14426_ = NOR ( new_n12409_, new_n3716_ ) -new_n14427_ = NAND ( new_n14426_, new_n12614_, new_n12098_ ) -new_n14428_ = OR ( new_n14427_, new_n3867_ ) -new_n14429_ = NOR ( new_n12409_, NET_760 ) -new_n14430_ = NAND ( new_n14429_, new_n12614_, new_n12098_ ) -new_n14431_ = OR ( new_n14430_, new_n3869_ ) -new_n14432_ = NOT ( new_n12098_ ) -new_n14433_ = NAND ( new_n14426_, new_n12614_, new_n14432_ ) -new_n14434_ = OR ( new_n14433_, new_n3871_ ) -new_n14435_ = NAND ( new_n14429_, new_n12614_, new_n14432_ ) -new_n14436_ = OR ( new_n14435_, new_n4106_ ) -new_n14437_ = NAND ( new_n14436_, new_n14434_, new_n14431_, new_n14428_ ) -new_n14438_ = NOT ( new_n12409_ ) -new_n14439_ = NOR ( new_n14438_, new_n3716_ ) -new_n14440_ = NAND ( new_n14439_, new_n12614_, new_n12098_ ) -new_n14441_ = OR ( new_n14440_, new_n3875_ ) -new_n14442_ = NOR ( new_n14438_, NET_760 ) -new_n14443_ = NAND ( new_n14442_, new_n12614_, new_n12098_ ) -new_n14444_ = OR ( new_n14443_, new_n4110_ ) -new_n14445_ = NAND ( new_n14439_, new_n12614_, new_n14432_ ) -new_n14446_ = OR ( new_n14445_, new_n4112_ ) -new_n14447_ = NAND ( new_n14442_, new_n12614_, new_n14432_ ) -new_n14448_ = OR ( new_n14447_, new_n4114_ ) -new_n14449_ = NAND ( new_n14448_, new_n14446_, new_n14444_, new_n14441_ ) -new_n14450_ = NOR ( new_n12614_, new_n14432_ ) -new_n14451_ = NAND ( new_n14450_, new_n14426_ ) -new_n14452_ = OR ( new_n14451_, new_n4117_ ) -new_n14453_ = NAND ( new_n14450_, new_n14429_ ) -new_n14454_ = OR ( new_n14453_, new_n4119_ ) -new_n14455_ = NOR ( new_n12614_, new_n12098_ ) -new_n14456_ = NAND ( new_n14455_, new_n14426_ ) -new_n14457_ = OR ( new_n14456_, new_n4121_ ) -new_n14458_ = NAND ( new_n14455_, new_n14429_ ) -new_n14459_ = OR ( new_n14458_, new_n3884_ ) -new_n14460_ = NAND ( new_n14459_, new_n14457_, new_n14454_, new_n14452_ ) -new_n14461_ = NAND ( new_n14450_, new_n14439_ ) -new_n14462_ = OR ( new_n14461_, new_n3887_ ) -new_n14463_ = NAND ( new_n14450_, new_n14442_ ) -new_n14464_ = OR ( new_n14463_, new_n3889_ ) -new_n14465_ = NAND ( new_n14455_, new_n14439_ ) -new_n14466_ = OR ( new_n14465_, new_n3891_ ) -new_n14467_ = NAND ( new_n14455_, new_n14442_ ) -new_n14468_ = OR ( new_n14467_, new_n4128_ ) -new_n14469_ = NAND ( new_n14468_, new_n14466_, new_n14464_, new_n14462_ ) -new_n14470_ = NOR ( new_n14469_, new_n14460_, new_n14449_, new_n14437_ ) -new_n14471_ = OR ( new_n14470_, new_n6913_ ) -new_n14472_ = OR ( new_n3953_, new_n3712_ ) -new_n14473_ = NAND ( new_n14472_, new_n14471_, new_n11787_, new_n3976_ ) -new_n14474_ = NOR ( new_n14473_, new_n14425_, new_n14424_, new_n14378_ ) -new_n14475_ = XOR ( new_n14474_, new_n14329_ ) -new_n14476_ = NAND ( new_n14475_, new_n14337_ ) -new_n14477_ = OR ( new_n14475_, new_n14337_ ) -new_n14478_ = AND ( new_n14477_, new_n14476_ ) -new_n14479_ = OR ( new_n14323_, new_n11926_ ) -new_n14480_ = OR ( new_n11926_, new_n6913_ ) -new_n14481_ = OR ( new_n14329_, new_n10067_ ) -new_n14482_ = NAND ( new_n14334_, NET_766 ) -new_n14483_ = NOT ( NET_957 ) -new_n14484_ = OR ( new_n14332_, new_n14483_ ) -new_n14485_ = AND ( new_n14484_, new_n14482_, new_n3953_ ) -new_n14486_ = NAND ( new_n14485_, new_n14481_, new_n14480_, new_n14479_ ) -new_n14487_ = NOR ( new_n14340_, new_n3904_ ) -new_n14488_ = OR ( new_n14343_, new_n4158_ ) -new_n14489_ = OR ( new_n14346_, new_n4160_ ) -new_n14490_ = OR ( new_n14348_, new_n4162_ ) -new_n14491_ = OR ( new_n14352_, new_n3896_ ) -new_n14492_ = NAND ( new_n14491_, new_n14490_, new_n14489_, new_n14488_ ) -new_n14493_ = NAND ( new_n14356_, new_n14355_ ) -new_n14494_ = OR ( new_n14493_, new_n3913_ ) -new_n14495_ = NAND ( new_n14356_, new_n14351_ ) -new_n14496_ = OR ( new_n14495_, new_n4167_ ) -new_n14497_ = NAND ( new_n14359_, new_n14355_ ) -new_n14498_ = OR ( new_n14497_, new_n4169_ ) -new_n14499_ = NAND ( new_n14498_, new_n14496_, new_n14494_ ) -new_n14500_ = OR ( new_n14362_, new_n3918_ ) -new_n14501_ = OR ( new_n14364_, new_n3920_ ) -new_n14502_ = OR ( new_n14366_, new_n4176_ ) -new_n14503_ = NAND ( new_n14359_, new_n14351_ ) -new_n14504_ = OR ( new_n14503_, new_n4165_ ) -new_n14505_ = NAND ( new_n14504_, new_n14502_, new_n14501_, new_n14500_ ) -new_n14506_ = NAND ( new_n14351_, new_n14370_ ) -new_n14507_ = OR ( new_n14506_, new_n3898_ ) -new_n14508_ = NAND ( new_n14355_, new_n14350_ ) -new_n14509_ = OR ( new_n14508_, new_n3900_ ) -new_n14510_ = NAND ( new_n14355_, new_n14370_ ) -new_n14511_ = OR ( new_n14510_, new_n4154_ ) -new_n14512_ = OR ( new_n14374_, new_n3916_ ) -new_n14513_ = NAND ( new_n14512_, new_n14511_, new_n14509_, new_n14507_ ) -new_n14514_ = OR ( new_n14513_, new_n14505_, new_n14499_ ) -new_n14515_ = NOR ( new_n14514_, new_n14492_, new_n14487_, new_n14329_ ) -new_n14516_ = OR ( new_n14381_, new_n3896_ ) -new_n14517_ = OR ( new_n14384_, new_n3898_ ) -new_n14518_ = OR ( new_n14387_, new_n3900_ ) -new_n14519_ = OR ( new_n14390_, new_n4154_ ) -new_n14520_ = NAND ( new_n14519_, new_n14518_, new_n14517_, new_n14516_ ) -new_n14521_ = OR ( new_n14394_, new_n3904_ ) -new_n14522_ = OR ( new_n14396_, new_n4158_ ) -new_n14523_ = OR ( new_n14398_, new_n4160_ ) -new_n14524_ = OR ( new_n14400_, new_n4162_ ) -new_n14525_ = NAND ( new_n14524_, new_n14523_, new_n14522_, new_n14521_ ) -new_n14526_ = OR ( new_n14404_, new_n4165_ ) -new_n14527_ = OR ( new_n14406_, new_n4167_ ) -new_n14528_ = OR ( new_n14408_, new_n4169_ ) -new_n14529_ = OR ( new_n14410_, new_n3913_ ) -new_n14530_ = NAND ( new_n14529_, new_n14528_, new_n14527_, new_n14526_ ) -new_n14531_ = OR ( new_n14414_, new_n3916_ ) -new_n14532_ = OR ( new_n14416_, new_n3918_ ) -new_n14533_ = OR ( new_n14418_, new_n3920_ ) -new_n14534_ = OR ( new_n14420_, new_n4176_ ) -new_n14535_ = NAND ( new_n14534_, new_n14533_, new_n14532_, new_n14531_ ) -new_n14536_ = NOR ( new_n14535_, new_n14530_, new_n14525_, new_n14520_ ) -new_n14537_ = NOR ( new_n14536_, new_n14321_ ) -new_n14538_ = NOR ( new_n14320_, new_n4179_ ) -new_n14539_ = OR ( new_n14427_, new_n3896_ ) -new_n14540_ = OR ( new_n14430_, new_n3898_ ) -new_n14541_ = OR ( new_n14433_, new_n3900_ ) -new_n14542_ = OR ( new_n14435_, new_n4154_ ) -new_n14543_ = NAND ( new_n14542_, new_n14541_, new_n14540_, new_n14539_ ) -new_n14544_ = OR ( new_n14440_, new_n3904_ ) -new_n14545_ = OR ( new_n14443_, new_n4158_ ) -new_n14546_ = OR ( new_n14445_, new_n4160_ ) -new_n14547_ = OR ( new_n14447_, new_n4162_ ) -new_n14548_ = NAND ( new_n14547_, new_n14546_, new_n14545_, new_n14544_ ) -new_n14549_ = OR ( new_n14451_, new_n4165_ ) -new_n14550_ = OR ( new_n14453_, new_n4167_ ) -new_n14551_ = OR ( new_n14456_, new_n4169_ ) -new_n14552_ = OR ( new_n14458_, new_n3913_ ) -new_n14553_ = NAND ( new_n14552_, new_n14551_, new_n14550_, new_n14549_ ) -new_n14554_ = OR ( new_n14461_, new_n3916_ ) -new_n14555_ = OR ( new_n14463_, new_n3918_ ) -new_n14556_ = OR ( new_n14465_, new_n3920_ ) -new_n14557_ = OR ( new_n14467_, new_n4176_ ) -new_n14558_ = NAND ( new_n14557_, new_n14556_, new_n14555_, new_n14554_ ) -new_n14559_ = NOR ( new_n14558_, new_n14553_, new_n14548_, new_n14543_ ) -new_n14560_ = OR ( new_n14559_, new_n6913_ ) -new_n14561_ = OR ( new_n3953_, new_n3716_ ) -new_n14562_ = NAND ( new_n14561_, new_n14560_, new_n6891_, new_n6130_ ) -new_n14563_ = NOR ( new_n14562_, new_n14538_, new_n14537_, new_n14515_ ) -new_n14564_ = OR ( new_n14563_, new_n14486_ ) -new_n14565_ = NAND ( new_n14563_, new_n14329_ ) -new_n14566_ = NAND ( new_n14565_, new_n14564_ ) -new_n14567_ = XNOR ( new_n14566_, new_n14478_ ) -new_n14568_ = NOT ( new_n14567_ ) -new_n14569_ = NOR ( new_n13747_, new_n3974_ ) -new_n14570_ = NOR ( new_n14569_, new_n4382_ ) -new_n14571_ = NOR ( new_n14570_, new_n3895_ ) -new_n14572_ = NOR ( new_n13747_, new_n3953_ ) -new_n14573_ = OR ( new_n14572_, new_n14571_ ) -new_n14574_ = NAND ( new_n14573_, new_n5811_ ) -new_n14575_ = NAND ( new_n14574_, new_n6633_ ) -new_n14576_ = NAND ( new_n14575_, new_n4381_ ) -new_n14577_ = NAND ( new_n5811_, new_n6633_, new_n3895_ ) -new_n14578_ = NAND ( new_n14577_, new_n4372_ ) -new_n14579_ = NAND ( new_n14578_, new_n5821_, new_n5813_, new_n3953_ ) -new_n14580_ = NAND ( new_n14579_, new_n14576_, new_n12125_ ) -new_n14581_ = NAND ( new_n14580_, new_n5808_ ) -new_n14582_ = OR ( new_n6137_, NET_627 ) -new_n14583_ = NAND ( new_n14582_, new_n14581_ ) -new_n14584_ = AND ( new_n14583_, NET_625 ) -new_n14585_ = NAND ( new_n6963_, new_n6640_, new_n6875_, new_n5826_ ) -new_n14586_ = NAND ( new_n14585_, new_n14584_ ) -new_n14587_ = NOR ( new_n14586_, new_n14568_ ) -new_n14588_ = OR ( new_n12091_, new_n12085_, new_n11806_ ) -new_n14589_ = NAND ( new_n14588_, new_n14584_ ) -new_n14590_ = NOR ( new_n14589_, new_n11841_ ) -new_n14591_ = NAND ( new_n11796_, new_n6882_, new_n6862_, new_n11795_ ) -new_n14592_ = NAND ( new_n14591_, new_n14584_ ) -new_n14593_ = OR ( new_n14592_, new_n7009_ ) -new_n14594_ = NAND ( new_n14584_, new_n12101_ ) -new_n14595_ = OR ( new_n14594_, new_n6960_ ) -new_n14596_ = OR ( new_n14583_, new_n6956_ ) -new_n14597_ = NAND ( new_n14583_, new_n3817_ ) -new_n14598_ = OR ( new_n14597_, new_n14331_ ) -new_n14599_ = NAND ( new_n14598_, new_n14596_, new_n14595_, new_n14593_ ) -NET_20572 = OR ( new_n14599_, new_n14590_, new_n14587_ ) -new_n14601_ = NAND ( new_n3836_, new_n3827_, new_n4266_ ) -new_n14602_ = NAND ( new_n14601_, new_n6628_ ) -new_n14603_ = NAND ( new_n14602_, NET_627 ) -new_n14604_ = NOR ( new_n14603_, new_n14568_ ) -new_n14605_ = NAND ( new_n14602_, new_n6989_ ) -new_n14606_ = OR ( new_n14605_, new_n11841_ ) -new_n14607_ = NAND ( new_n14602_, new_n6855_ ) -new_n14608_ = OR ( new_n14607_, new_n7009_ ) -new_n14609_ = NAND ( new_n14602_, new_n6136_ ) -new_n14610_ = OR ( new_n14609_, new_n14331_ ) -new_n14611_ = OR ( new_n14602_, new_n11810_ ) -new_n14612_ = NAND ( new_n14611_, new_n14610_, new_n14608_, new_n14606_ ) -NET_20573 = OR ( new_n14612_, new_n14604_ ) -new_n14614_ = NAND ( new_n6863_, new_n4381_ ) -new_n14615_ = NAND ( new_n14614_, new_n5828_ ) -new_n14616_ = AND ( new_n14615_, new_n5811_ ) -new_n14617_ = NOR ( new_n6866_, new_n5806_ ) -new_n14618_ = OR ( new_n14617_, new_n14616_, new_n6964_ ) -new_n14619_ = NAND ( new_n14618_, new_n4448_ ) -new_n14620_ = OR ( new_n14619_, new_n6913_ ) -new_n14621_ = OR ( new_n14620_, new_n14568_ ) -new_n14622_ = OR ( new_n14619_, new_n6130_ ) -new_n14623_ = OR ( new_n14622_, new_n7009_ ) -new_n14624_ = NAND ( new_n14619_, NET_894 ) -new_n14625_ = NOR ( new_n14619_, new_n6132_ ) -new_n14626_ = NAND ( new_n14625_, new_n5958_ ) -NET_20574 = NAND ( new_n14626_, new_n14624_, new_n14623_, new_n14621_ ) -new_n14628_ = NOT ( new_n11870_ ) -new_n14629_ = NAND ( new_n5150_, new_n5125_, new_n4639_ ) -new_n14630_ = NAND ( new_n14629_, new_n14628_ ) -new_n14631_ = NOT ( new_n14630_ ) -new_n14632_ = OR ( new_n14631_, new_n11909_ ) -new_n14633_ = OR ( new_n11909_, new_n7073_ ) -new_n14634_ = NOT ( new_n5150_ ) -new_n14635_ = NOT ( new_n11861_ ) -new_n14636_ = NOR ( new_n14635_, new_n14634_ ) -new_n14637_ = NOT ( new_n14636_ ) -new_n14638_ = OR ( new_n14637_, new_n7169_ ) -new_n14639_ = NOT ( NET_1407 ) -new_n14640_ = OR ( new_n11855_, new_n4639_ ) -new_n14641_ = OR ( new_n14640_, new_n14639_ ) -new_n14642_ = NAND ( new_n7051_, new_n6515_, new_n4720_ ) -new_n14643_ = NAND ( new_n14642_, NET_1216 ) -new_n14644_ = AND ( new_n14643_, new_n14641_, new_n14638_ ) -new_n14645_ = NAND ( new_n14644_, new_n14633_, new_n14632_ ) -new_n14646_ = NAND ( new_n12009_, new_n11909_ ) -new_n14647_ = NAND ( new_n12272_, new_n11934_ ) -new_n14648_ = OR ( new_n14647_, new_n14646_ ) -new_n14649_ = NOR ( new_n14648_, new_n4619_ ) -new_n14650_ = OR ( new_n12660_, new_n11934_ ) -new_n14651_ = OR ( new_n14650_, new_n14646_ ) -new_n14652_ = OR ( new_n14651_, new_n4854_ ) -new_n14653_ = NAND ( new_n12009_, new_n12132_ ) -new_n14654_ = OR ( new_n14653_, new_n14647_ ) -new_n14655_ = OR ( new_n14654_, new_n4856_ ) -new_n14656_ = OR ( new_n14653_, new_n14650_ ) -new_n14657_ = OR ( new_n14656_, new_n4858_ ) -new_n14658_ = NOR ( new_n12660_, new_n12277_ ) -new_n14659_ = NOR ( new_n12009_, new_n12132_ ) -new_n14660_ = NAND ( new_n14659_, new_n14658_ ) -new_n14661_ = OR ( new_n14660_, new_n4611_ ) -new_n14662_ = NAND ( new_n14661_, new_n14657_, new_n14655_, new_n14652_ ) -new_n14663_ = NOR ( new_n12009_, new_n11909_ ) -new_n14664_ = NOR ( new_n12272_, new_n11934_ ) -new_n14665_ = NAND ( new_n14664_, new_n14663_, NET_1083 ) -new_n14666_ = NAND ( new_n14664_, new_n14659_, NET_1099 ) -new_n14667_ = NOR ( new_n12272_, new_n12277_ ) -new_n14668_ = NAND ( new_n14667_, new_n14663_, NET_1091 ) -new_n14669_ = NAND ( new_n14668_, new_n14666_, new_n14665_ ) -new_n14670_ = NAND ( new_n12660_, new_n12009_, new_n12277_, new_n11909_ ) -new_n14671_ = OR ( new_n14670_, new_n4633_ ) -new_n14672_ = NAND ( new_n12660_, new_n12009_, new_n11934_, new_n12132_ ) -new_n14673_ = OR ( new_n14672_, new_n4635_ ) -new_n14674_ = NAND ( new_n12660_, new_n12009_, new_n12277_, new_n12132_ ) -new_n14675_ = OR ( new_n14674_, new_n4872_ ) -new_n14676_ = NAND ( new_n14667_, new_n14659_, NET_1107 ) -new_n14677_ = NAND ( new_n14676_, new_n14675_, new_n14673_, new_n14671_ ) -new_n14678_ = NOR ( new_n12660_, new_n11934_ ) -new_n14679_ = NAND ( new_n14659_, new_n14678_, NET_1163 ) -new_n14680_ = NAND ( new_n14663_, new_n14658_, NET_1155 ) -new_n14681_ = NAND ( new_n14663_, new_n14678_, NET_1147 ) -new_n14682_ = NAND ( new_n12660_, new_n12009_, new_n11934_, new_n11909_ ) -new_n14683_ = OR ( new_n14682_, new_n4631_ ) -new_n14684_ = NAND ( new_n14683_, new_n14681_, new_n14680_, new_n14679_ ) -new_n14685_ = OR ( new_n14684_, new_n14677_, new_n14669_ ) -new_n14686_ = NOR ( new_n14685_, new_n14662_, new_n14649_, new_n14637_ ) -new_n14687_ = NOR ( new_n12279_, new_n12138_ ) -new_n14688_ = NOR ( new_n11706_, new_n12662_ ) -new_n14689_ = NAND ( new_n14688_, new_n14687_ ) -new_n14690_ = OR ( new_n14689_, new_n4611_ ) -new_n14691_ = NOR ( new_n11537_, new_n12138_ ) -new_n14692_ = NAND ( new_n14691_, new_n14688_ ) -new_n14693_ = OR ( new_n14692_, new_n4613_ ) -new_n14694_ = NOR ( new_n12279_, new_n7169_ ) -new_n14695_ = NAND ( new_n14694_, new_n14688_ ) -new_n14696_ = OR ( new_n14695_, new_n4615_ ) -new_n14697_ = NOR ( new_n11537_, new_n7169_ ) -new_n14698_ = NAND ( new_n14697_, new_n14688_ ) -new_n14699_ = OR ( new_n14698_, new_n4850_ ) -new_n14700_ = NAND ( new_n14699_, new_n14696_, new_n14693_, new_n14690_ ) -new_n14701_ = NOR ( new_n12472_, new_n12662_ ) -new_n14702_ = NAND ( new_n14701_, new_n14687_ ) -new_n14703_ = OR ( new_n14702_, new_n4619_ ) -new_n14704_ = NAND ( new_n14701_, new_n14691_ ) -new_n14705_ = OR ( new_n14704_, new_n4854_ ) -new_n14706_ = NAND ( new_n14701_, new_n14694_ ) -new_n14707_ = OR ( new_n14706_, new_n4856_ ) -new_n14708_ = NAND ( new_n14701_, new_n14697_ ) -new_n14709_ = OR ( new_n14708_, new_n4858_ ) -new_n14710_ = NAND ( new_n14709_, new_n14707_, new_n14705_, new_n14703_ ) -new_n14711_ = NOR ( new_n11706_, new_n11701_ ) -new_n14712_ = NAND ( new_n14711_, new_n14687_ ) -new_n14713_ = OR ( new_n14712_, new_n4861_ ) -new_n14714_ = NAND ( new_n14711_, new_n14691_ ) -new_n14715_ = OR ( new_n14714_, new_n4863_ ) -new_n14716_ = NAND ( new_n14711_, new_n14694_ ) -new_n14717_ = OR ( new_n14716_, new_n4865_ ) -new_n14718_ = NAND ( new_n14711_, new_n14697_ ) -new_n14719_ = OR ( new_n14718_, new_n4628_ ) -new_n14720_ = NAND ( new_n14719_, new_n14717_, new_n14715_, new_n14713_ ) -new_n14721_ = NOR ( new_n12472_, new_n11701_ ) -new_n14722_ = NAND ( new_n14721_, new_n14687_ ) -new_n14723_ = OR ( new_n14722_, new_n4631_ ) -new_n14724_ = NAND ( new_n14721_, new_n14691_ ) -new_n14725_ = OR ( new_n14724_, new_n4633_ ) -new_n14726_ = NAND ( new_n14721_, new_n14694_ ) -new_n14727_ = OR ( new_n14726_, new_n4635_ ) -new_n14728_ = NAND ( new_n14721_, new_n14697_ ) -new_n14729_ = OR ( new_n14728_, new_n4872_ ) -new_n14730_ = NAND ( new_n14729_, new_n14727_, new_n14725_, new_n14723_ ) -new_n14731_ = NOR ( new_n14730_, new_n14720_, new_n14710_, new_n14700_ ) -new_n14732_ = NOR ( new_n14731_, new_n14629_ ) -new_n14733_ = NOR ( new_n14628_, new_n4875_ ) -new_n14734_ = NOR ( new_n12477_, new_n4460_ ) -new_n14735_ = NAND ( new_n14734_, new_n12677_, new_n12157_ ) -new_n14736_ = OR ( new_n14735_, new_n4611_ ) -new_n14737_ = NOR ( new_n12477_, NET_1209 ) -new_n14738_ = NAND ( new_n14737_, new_n12677_, new_n12157_ ) -new_n14739_ = OR ( new_n14738_, new_n4613_ ) -new_n14740_ = NOT ( new_n12157_ ) -new_n14741_ = NAND ( new_n14734_, new_n12677_, new_n14740_ ) -new_n14742_ = OR ( new_n14741_, new_n4615_ ) -new_n14743_ = NAND ( new_n14737_, new_n12677_, new_n14740_ ) -new_n14744_ = OR ( new_n14743_, new_n4850_ ) -new_n14745_ = NAND ( new_n14744_, new_n14742_, new_n14739_, new_n14736_ ) -new_n14746_ = NOT ( new_n12477_ ) -new_n14747_ = NOR ( new_n14746_, new_n4460_ ) -new_n14748_ = NAND ( new_n14747_, new_n12677_, new_n12157_ ) -new_n14749_ = OR ( new_n14748_, new_n4619_ ) -new_n14750_ = NOR ( new_n14746_, NET_1209 ) -new_n14751_ = NAND ( new_n14750_, new_n12677_, new_n12157_ ) -new_n14752_ = OR ( new_n14751_, new_n4854_ ) -new_n14753_ = NAND ( new_n14747_, new_n12677_, new_n14740_ ) -new_n14754_ = OR ( new_n14753_, new_n4856_ ) -new_n14755_ = NAND ( new_n14750_, new_n12677_, new_n14740_ ) -new_n14756_ = OR ( new_n14755_, new_n4858_ ) -new_n14757_ = NAND ( new_n14756_, new_n14754_, new_n14752_, new_n14749_ ) -new_n14758_ = NOR ( new_n12677_, new_n14740_ ) -new_n14759_ = NAND ( new_n14758_, new_n14734_ ) -new_n14760_ = OR ( new_n14759_, new_n4861_ ) -new_n14761_ = NAND ( new_n14758_, new_n14737_ ) -new_n14762_ = OR ( new_n14761_, new_n4863_ ) -new_n14763_ = NOR ( new_n12677_, new_n12157_ ) -new_n14764_ = NAND ( new_n14763_, new_n14734_ ) -new_n14765_ = OR ( new_n14764_, new_n4865_ ) -new_n14766_ = NAND ( new_n14763_, new_n14737_ ) -new_n14767_ = OR ( new_n14766_, new_n4628_ ) -new_n14768_ = NAND ( new_n14767_, new_n14765_, new_n14762_, new_n14760_ ) -new_n14769_ = NAND ( new_n14758_, new_n14747_ ) -new_n14770_ = OR ( new_n14769_, new_n4631_ ) -new_n14771_ = NAND ( new_n14758_, new_n14750_ ) -new_n14772_ = OR ( new_n14771_, new_n4633_ ) -new_n14773_ = NAND ( new_n14763_, new_n14747_ ) -new_n14774_ = OR ( new_n14773_, new_n4635_ ) -new_n14775_ = NAND ( new_n14763_, new_n14750_ ) -new_n14776_ = OR ( new_n14775_, new_n4872_ ) -new_n14777_ = NAND ( new_n14776_, new_n14774_, new_n14772_, new_n14770_ ) -new_n14778_ = NOR ( new_n14777_, new_n14768_, new_n14757_, new_n14745_ ) -new_n14779_ = OR ( new_n14778_, new_n7073_ ) -new_n14780_ = OR ( new_n4697_, new_n4456_ ) -new_n14781_ = NAND ( new_n14780_, new_n14779_, new_n11855_, new_n4720_ ) -new_n14782_ = NOR ( new_n14781_, new_n14733_, new_n14732_, new_n14686_ ) -new_n14783_ = XOR ( new_n14782_, new_n14637_ ) -new_n14784_ = NAND ( new_n14783_, new_n14645_ ) -new_n14785_ = OR ( new_n14783_, new_n14645_ ) -new_n14786_ = AND ( new_n14785_, new_n14784_ ) -new_n14787_ = OR ( new_n14631_, new_n11934_ ) -new_n14788_ = OR ( new_n11934_, new_n7073_ ) -new_n14789_ = OR ( new_n14637_, new_n11537_ ) -new_n14790_ = NAND ( new_n14642_, NET_1215 ) -new_n14791_ = NOT ( NET_1406 ) -new_n14792_ = OR ( new_n14640_, new_n14791_ ) -new_n14793_ = AND ( new_n14792_, new_n14790_, new_n4697_ ) -new_n14794_ = NAND ( new_n14793_, new_n14789_, new_n14788_, new_n14787_ ) -new_n14795_ = NOR ( new_n14648_, new_n4648_ ) -new_n14796_ = OR ( new_n14651_, new_n4902_ ) -new_n14797_ = OR ( new_n14654_, new_n4904_ ) -new_n14798_ = OR ( new_n14656_, new_n4906_ ) -new_n14799_ = OR ( new_n14660_, new_n4640_ ) -new_n14800_ = NAND ( new_n14799_, new_n14798_, new_n14797_, new_n14796_ ) -new_n14801_ = NAND ( new_n14664_, new_n14663_ ) -new_n14802_ = OR ( new_n14801_, new_n4657_ ) -new_n14803_ = NAND ( new_n14664_, new_n14659_ ) -new_n14804_ = OR ( new_n14803_, new_n4911_ ) -new_n14805_ = NAND ( new_n14667_, new_n14663_ ) -new_n14806_ = OR ( new_n14805_, new_n4913_ ) -new_n14807_ = NAND ( new_n14806_, new_n14804_, new_n14802_ ) -new_n14808_ = OR ( new_n14670_, new_n4662_ ) -new_n14809_ = OR ( new_n14672_, new_n4664_ ) -new_n14810_ = OR ( new_n14674_, new_n4920_ ) -new_n14811_ = NAND ( new_n14667_, new_n14659_ ) -new_n14812_ = OR ( new_n14811_, new_n4909_ ) -new_n14813_ = NAND ( new_n14812_, new_n14810_, new_n14809_, new_n14808_ ) -new_n14814_ = NAND ( new_n14659_, new_n14678_ ) -new_n14815_ = OR ( new_n14814_, new_n4642_ ) -new_n14816_ = NAND ( new_n14663_, new_n14658_ ) -new_n14817_ = OR ( new_n14816_, new_n4644_ ) -new_n14818_ = NAND ( new_n14663_, new_n14678_ ) -new_n14819_ = OR ( new_n14818_, new_n4898_ ) -new_n14820_ = OR ( new_n14682_, new_n4660_ ) -new_n14821_ = NAND ( new_n14820_, new_n14819_, new_n14817_, new_n14815_ ) -new_n14822_ = OR ( new_n14821_, new_n14813_, new_n14807_ ) -new_n14823_ = NOR ( new_n14822_, new_n14800_, new_n14795_, new_n14637_ ) -new_n14824_ = OR ( new_n14689_, new_n4640_ ) -new_n14825_ = OR ( new_n14692_, new_n4642_ ) -new_n14826_ = OR ( new_n14695_, new_n4644_ ) -new_n14827_ = OR ( new_n14698_, new_n4898_ ) -new_n14828_ = NAND ( new_n14827_, new_n14826_, new_n14825_, new_n14824_ ) -new_n14829_ = OR ( new_n14702_, new_n4648_ ) -new_n14830_ = OR ( new_n14704_, new_n4902_ ) -new_n14831_ = OR ( new_n14706_, new_n4904_ ) -new_n14832_ = OR ( new_n14708_, new_n4906_ ) -new_n14833_ = NAND ( new_n14832_, new_n14831_, new_n14830_, new_n14829_ ) -new_n14834_ = OR ( new_n14712_, new_n4909_ ) -new_n14835_ = OR ( new_n14714_, new_n4911_ ) -new_n14836_ = OR ( new_n14716_, new_n4913_ ) -new_n14837_ = OR ( new_n14718_, new_n4657_ ) -new_n14838_ = NAND ( new_n14837_, new_n14836_, new_n14835_, new_n14834_ ) -new_n14839_ = OR ( new_n14722_, new_n4660_ ) -new_n14840_ = OR ( new_n14724_, new_n4662_ ) -new_n14841_ = OR ( new_n14726_, new_n4664_ ) -new_n14842_ = OR ( new_n14728_, new_n4920_ ) -new_n14843_ = NAND ( new_n14842_, new_n14841_, new_n14840_, new_n14839_ ) -new_n14844_ = NOR ( new_n14843_, new_n14838_, new_n14833_, new_n14828_ ) -new_n14845_ = NOR ( new_n14844_, new_n14629_ ) -new_n14846_ = NOR ( new_n14628_, new_n4923_ ) -new_n14847_ = OR ( new_n14735_, new_n4640_ ) -new_n14848_ = OR ( new_n14738_, new_n4642_ ) -new_n14849_ = OR ( new_n14741_, new_n4644_ ) -new_n14850_ = OR ( new_n14743_, new_n4898_ ) -new_n14851_ = NAND ( new_n14850_, new_n14849_, new_n14848_, new_n14847_ ) -new_n14852_ = OR ( new_n14748_, new_n4648_ ) -new_n14853_ = OR ( new_n14751_, new_n4902_ ) -new_n14854_ = OR ( new_n14753_, new_n4904_ ) -new_n14855_ = OR ( new_n14755_, new_n4906_ ) -new_n14856_ = NAND ( new_n14855_, new_n14854_, new_n14853_, new_n14852_ ) -new_n14857_ = OR ( new_n14759_, new_n4909_ ) -new_n14858_ = OR ( new_n14761_, new_n4911_ ) -new_n14859_ = OR ( new_n14764_, new_n4913_ ) -new_n14860_ = OR ( new_n14766_, new_n4657_ ) -new_n14861_ = NAND ( new_n14860_, new_n14859_, new_n14858_, new_n14857_ ) -new_n14862_ = OR ( new_n14769_, new_n4660_ ) -new_n14863_ = OR ( new_n14771_, new_n4662_ ) -new_n14864_ = OR ( new_n14773_, new_n4664_ ) -new_n14865_ = OR ( new_n14775_, new_n4920_ ) -new_n14866_ = NAND ( new_n14865_, new_n14864_, new_n14863_, new_n14862_ ) -new_n14867_ = NOR ( new_n14866_, new_n14861_, new_n14856_, new_n14851_ ) -new_n14868_ = OR ( new_n14867_, new_n7073_ ) -new_n14869_ = OR ( new_n4697_, new_n4460_ ) -new_n14870_ = NAND ( new_n14869_, new_n14868_, new_n7051_, new_n6515_ ) -new_n14871_ = NOR ( new_n14870_, new_n14846_, new_n14845_, new_n14823_ ) -new_n14872_ = OR ( new_n14871_, new_n14794_ ) -new_n14873_ = NAND ( new_n14871_, new_n14637_ ) -new_n14874_ = NAND ( new_n14873_, new_n14872_ ) -new_n14875_ = XNOR ( new_n14874_, new_n14786_ ) -new_n14876_ = NOT ( new_n14875_ ) -new_n14877_ = NOR ( new_n13806_, new_n4718_ ) -new_n14878_ = NOR ( new_n14877_, new_n5126_ ) -new_n14879_ = NOR ( new_n14878_, new_n4639_ ) -new_n14880_ = NOR ( new_n13806_, new_n4697_ ) -new_n14881_ = OR ( new_n14880_, new_n14879_ ) -new_n14882_ = NAND ( new_n14881_, new_n6180_ ) -new_n14883_ = NAND ( new_n14882_, new_n6678_ ) -new_n14884_ = NAND ( new_n14883_, new_n5125_ ) -new_n14885_ = NAND ( new_n6180_, new_n6678_, new_n4639_ ) -new_n14886_ = NAND ( new_n14885_, new_n5116_ ) -new_n14887_ = NAND ( new_n14886_, new_n6190_, new_n6182_, new_n4697_ ) -new_n14888_ = NAND ( new_n14887_, new_n14884_, new_n12184_ ) -new_n14889_ = NAND ( new_n14888_, new_n6177_ ) -new_n14890_ = OR ( new_n6522_, NET_1076 ) -new_n14891_ = NAND ( new_n14890_, new_n14889_ ) -new_n14892_ = AND ( new_n14891_, NET_1074 ) -new_n14893_ = NAND ( new_n7123_, new_n6685_, new_n7035_, new_n6195_ ) -new_n14894_ = NAND ( new_n14893_, new_n14892_ ) -new_n14895_ = NOR ( new_n14894_, new_n14876_ ) -new_n14896_ = OR ( new_n12150_, new_n12144_, new_n11874_ ) -new_n14897_ = NAND ( new_n14896_, new_n14892_ ) -new_n14898_ = NOR ( new_n14897_, new_n11909_ ) -new_n14899_ = NAND ( new_n11864_, new_n7042_, new_n7022_, new_n11863_ ) -new_n14900_ = NAND ( new_n14899_, new_n14892_ ) -new_n14901_ = OR ( new_n14900_, new_n7169_ ) -new_n14902_ = NAND ( new_n14892_, new_n12160_ ) -new_n14903_ = OR ( new_n14902_, new_n7120_ ) -new_n14904_ = OR ( new_n14891_, new_n7116_ ) -new_n14905_ = NAND ( new_n14891_, new_n4561_ ) -new_n14906_ = OR ( new_n14905_, new_n14639_ ) -new_n14907_ = NAND ( new_n14906_, new_n14904_, new_n14903_, new_n14901_ ) -NET_20590 = OR ( new_n14907_, new_n14898_, new_n14895_ ) -new_n14909_ = NAND ( new_n4580_, new_n4571_, new_n5010_ ) -new_n14910_ = NAND ( new_n14909_, new_n6673_ ) -new_n14911_ = NAND ( new_n14910_, NET_1076 ) -new_n14912_ = NOR ( new_n14911_, new_n14876_ ) -new_n14913_ = NAND ( new_n14910_, new_n7149_ ) -new_n14914_ = OR ( new_n14913_, new_n11909_ ) -new_n14915_ = NAND ( new_n14910_, new_n7015_ ) -new_n14916_ = OR ( new_n14915_, new_n7169_ ) -new_n14917_ = NAND ( new_n14910_, new_n6521_ ) -new_n14918_ = OR ( new_n14917_, new_n14639_ ) -new_n14919_ = OR ( new_n14910_, new_n11878_ ) -new_n14920_ = NAND ( new_n14919_, new_n14918_, new_n14916_, new_n14914_ ) -NET_20591 = OR ( new_n14920_, new_n14912_ ) -new_n14922_ = NAND ( new_n7023_, new_n5125_ ) -new_n14923_ = NAND ( new_n14922_, new_n6197_ ) -new_n14924_ = AND ( new_n14923_, new_n6180_ ) -new_n14925_ = NOR ( new_n7026_, new_n6175_ ) -new_n14926_ = OR ( new_n14925_, new_n14924_, new_n7124_ ) -new_n14927_ = NAND ( new_n14926_, new_n5192_ ) -new_n14928_ = OR ( new_n14927_, new_n7073_ ) -new_n14929_ = OR ( new_n14928_, new_n14876_ ) -new_n14930_ = OR ( new_n14927_, new_n6515_ ) -new_n14931_ = OR ( new_n14930_, new_n7169_ ) -new_n14932_ = NAND ( new_n14927_, NET_1343 ) -new_n14933_ = NOR ( new_n14927_, new_n6517_ ) -new_n14934_ = NAND ( new_n14933_, new_n6342_ ) -NET_20592 = NAND ( new_n14934_, new_n14932_, new_n14931_, new_n14929_ ) -new_n14936_ = OR ( new_n14255_, new_n14021_ ) -new_n14937_ = AND ( new_n14936_, new_n14257_ ) -new_n14938_ = XNOR ( new_n14937_, new_n14178_ ) -new_n14939_ = XOR ( new_n14938_, new_n14021_ ) -new_n14940_ = NOT ( new_n14939_ ) -new_n14941_ = NOR ( new_n14940_, new_n14278_ ) -new_n14942_ = NOR ( new_n14281_, new_n11918_ ) -new_n14943_ = OR ( new_n14284_, new_n8599_ ) -new_n14944_ = NOT ( new_n14286_ ) -new_n14945_ = NAND ( new_n14944_, new_n3696_, new_n3442_ ) -new_n14946_ = OR ( new_n14289_, new_n14175_ ) -new_n14947_ = OR ( new_n14275_, new_n3442_ ) -new_n14948_ = NAND ( new_n14947_, new_n14946_, new_n14945_, new_n14943_ ) -NET_20650 = OR ( new_n14948_, new_n14942_, new_n14941_ ) -new_n14950_ = NOR ( new_n14940_, new_n14295_ ) -new_n14951_ = OR ( new_n14297_, new_n11918_ ) -new_n14952_ = OR ( new_n14299_, new_n8599_ ) -new_n14953_ = OR ( new_n14301_, new_n14175_ ) -new_n14954_ = OR ( new_n14294_, new_n11765_ ) -new_n14955_ = NAND ( new_n14954_, new_n14953_, new_n14952_, new_n14951_ ) -NET_20651 = OR ( new_n14955_, new_n14950_ ) -new_n14957_ = OR ( new_n14940_, new_n14312_ ) -new_n14958_ = OR ( new_n14314_, new_n8599_ ) -new_n14959_ = NAND ( new_n14311_, NET_444 ) -new_n14960_ = OR ( new_n14317_, new_n5609_ ) -NET_20652 = NAND ( new_n14960_, new_n14959_, new_n14958_, new_n14957_ ) -new_n14962_ = NOT ( NET_330 ) -new_n14963_ = NOR ( new_n12294_, new_n14962_ ) -new_n14964_ = NAND ( new_n13835_, new_n13355_, new_n13296_ ) -new_n14965_ = NOR ( new_n3179_, new_n14962_ ) -new_n14966_ = NOT ( new_n14965_ ) -new_n14967_ = AND ( new_n14966_, new_n14964_ ) -new_n14968_ = NOR ( new_n14966_, new_n14964_ ) -new_n14969_ = OR ( new_n14968_, new_n14967_ ) -new_n14970_ = OR ( new_n14969_, new_n6794_ ) -new_n14971_ = NOT ( NET_489 ) -new_n14972_ = OR ( new_n6792_, new_n14971_ ) -new_n14973_ = NAND ( new_n6695_, NET_362 ) -new_n14974_ = NAND ( new_n6804_, NET_457 ) -new_n14975_ = NAND ( new_n14974_, new_n14973_, new_n14972_, new_n14970_ ) -new_n14976_ = NOR ( new_n14975_, new_n14963_ ) -new_n14977_ = XNOR ( new_n14976_, new_n5529_ ) -new_n14978_ = OR ( new_n12930_, new_n3093_ ) -new_n14979_ = OR ( new_n12932_, new_n3095_ ) -new_n14980_ = OR ( new_n12934_, new_n3298_ ) -new_n14981_ = OR ( new_n12955_, new_n3098_ ) -new_n14982_ = NAND ( new_n14981_, new_n14980_, new_n14979_, new_n14978_ ) -new_n14983_ = OR ( new_n12939_, new_n3302_ ) -new_n14984_ = OR ( new_n12941_, new_n3304_ ) -new_n14985_ = OR ( new_n12943_, new_n3306_ ) -new_n14986_ = OR ( new_n12928_, new_n3104_ ) -new_n14987_ = NAND ( new_n14986_, new_n14985_, new_n14984_, new_n14983_ ) -new_n14988_ = OR ( new_n12948_, new_n3310_ ) -new_n14989_ = OR ( new_n12950_, new_n3312_ ) -new_n14990_ = OR ( new_n12952_, new_n3109_ ) -new_n14991_ = OR ( new_n12937_, new_n3111_ ) -new_n14992_ = NAND ( new_n14991_, new_n14990_, new_n14989_, new_n14988_ ) -new_n14993_ = OR ( new_n12957_, new_n3114_ ) -new_n14994_ = OR ( new_n12959_, new_n3116_ ) -new_n14995_ = OR ( new_n12961_, new_n3319_ ) -new_n14996_ = OR ( new_n12946_, new_n3321_ ) -new_n14997_ = NAND ( new_n14996_, new_n14995_, new_n14994_, new_n14993_ ) -new_n14998_ = NOR ( new_n14997_, new_n14992_, new_n14987_, new_n14982_ ) -new_n14999_ = NOR ( new_n14998_, new_n6794_ ) -new_n15000_ = NAND ( new_n14999_, new_n14977_ ) -new_n15001_ = OR ( new_n14999_, new_n14977_ ) -new_n15002_ = NAND ( new_n15001_, new_n15000_ ) -new_n15003_ = NAND ( new_n13871_, new_n13867_ ) -new_n15004_ = NAND ( new_n15003_, new_n13868_ ) -new_n15005_ = XOR ( new_n15004_, new_n15002_ ) -new_n15006_ = OR ( new_n15005_, new_n11723_ ) -new_n15007_ = NAND ( new_n11740_, NET_330 ) -new_n15008_ = NOT ( NET_362 ) -new_n15009_ = OR ( new_n6828_, new_n15008_ ) -new_n15010_ = NAND ( new_n5529_, NET_521 ) -new_n15011_ = NAND ( new_n15010_, new_n15009_, new_n15007_, new_n15006_ ) -new_n15012_ = XNOR ( new_n15011_, new_n6707_ ) -new_n15013_ = OR ( new_n15012_, new_n13881_ ) -new_n15014_ = NAND ( new_n15012_, new_n13881_ ) -new_n15015_ = AND ( new_n15014_, new_n15013_ ) -new_n15016_ = NAND ( new_n15015_, new_n11714_ ) -new_n15017_ = OR ( new_n15005_, new_n11775_ ) -new_n15018_ = NAND ( new_n11713_, NET_489 ) -NET_20653 = NAND ( new_n15018_, new_n15017_, new_n15016_ ) -new_n15020_ = OR ( new_n14563_, new_n14329_ ) -new_n15021_ = AND ( new_n15020_, new_n14565_ ) -new_n15022_ = XNOR ( new_n15021_, new_n14486_ ) -new_n15023_ = XOR ( new_n15022_, new_n14329_ ) -new_n15024_ = NOT ( new_n15023_ ) -new_n15025_ = NOR ( new_n15024_, new_n14586_ ) -new_n15026_ = NOR ( new_n14589_, new_n11926_ ) -new_n15027_ = OR ( new_n14592_, new_n10067_ ) -new_n15028_ = NOT ( new_n14594_ ) -new_n15029_ = NAND ( new_n15028_, new_n4441_, new_n4187_ ) -new_n15030_ = OR ( new_n14597_, new_n14483_ ) -new_n15031_ = OR ( new_n14583_, new_n4187_ ) -new_n15032_ = NAND ( new_n15031_, new_n15030_, new_n15029_, new_n15027_ ) -NET_20663 = OR ( new_n15032_, new_n15026_, new_n15025_ ) -new_n15034_ = NOR ( new_n15024_, new_n14603_ ) -new_n15035_ = OR ( new_n14605_, new_n11926_ ) -new_n15036_ = OR ( new_n14607_, new_n10067_ ) -new_n15037_ = OR ( new_n14609_, new_n14483_ ) -new_n15038_ = OR ( new_n14602_, new_n11833_ ) -new_n15039_ = NAND ( new_n15038_, new_n15037_, new_n15036_, new_n15035_ ) -NET_20664 = OR ( new_n15039_, new_n15034_ ) -new_n15041_ = OR ( new_n15024_, new_n14620_ ) -new_n15042_ = OR ( new_n14622_, new_n10067_ ) -new_n15043_ = NAND ( new_n14619_, NET_893 ) -new_n15044_ = NAND ( new_n14625_, new_n5965_ ) -NET_20665 = NAND ( new_n15044_, new_n15043_, new_n15042_, new_n15041_ ) -new_n15046_ = NOT ( NET_779 ) -new_n15047_ = NOR ( new_n12362_, new_n15046_ ) -new_n15048_ = NAND ( new_n13897_, new_n13475_, new_n13416_ ) -new_n15049_ = NOR ( new_n3924_, new_n15046_ ) -new_n15050_ = NOT ( new_n15049_ ) -new_n15051_ = AND ( new_n15050_, new_n15048_ ) -new_n15052_ = NOR ( new_n15050_, new_n15048_ ) -new_n15053_ = OR ( new_n15052_, new_n15051_ ) -new_n15054_ = OR ( new_n15053_, new_n6954_ ) -new_n15055_ = NOT ( NET_938 ) -new_n15056_ = OR ( new_n6952_, new_n15055_ ) -new_n15057_ = NAND ( new_n6855_, NET_811 ) -new_n15058_ = NAND ( new_n6964_, NET_906 ) -new_n15059_ = NAND ( new_n15058_, new_n15057_, new_n15056_, new_n15054_ ) -new_n15060_ = NOR ( new_n15059_, new_n15047_ ) -new_n15061_ = XNOR ( new_n15060_, new_n5827_ ) -new_n15062_ = OR ( new_n12998_, new_n3838_ ) -new_n15063_ = OR ( new_n13000_, new_n3840_ ) -new_n15064_ = OR ( new_n13002_, new_n4043_ ) -new_n15065_ = OR ( new_n13023_, new_n3843_ ) -new_n15066_ = NAND ( new_n15065_, new_n15064_, new_n15063_, new_n15062_ ) -new_n15067_ = OR ( new_n13007_, new_n4047_ ) -new_n15068_ = OR ( new_n13009_, new_n4049_ ) -new_n15069_ = OR ( new_n13011_, new_n4051_ ) -new_n15070_ = OR ( new_n12996_, new_n3849_ ) -new_n15071_ = NAND ( new_n15070_, new_n15069_, new_n15068_, new_n15067_ ) -new_n15072_ = OR ( new_n13016_, new_n4055_ ) -new_n15073_ = OR ( new_n13018_, new_n4057_ ) -new_n15074_ = OR ( new_n13020_, new_n3854_ ) -new_n15075_ = OR ( new_n13005_, new_n3856_ ) -new_n15076_ = NAND ( new_n15075_, new_n15074_, new_n15073_, new_n15072_ ) -new_n15077_ = OR ( new_n13025_, new_n3859_ ) -new_n15078_ = OR ( new_n13027_, new_n3861_ ) -new_n15079_ = OR ( new_n13029_, new_n4064_ ) -new_n15080_ = OR ( new_n13014_, new_n4066_ ) -new_n15081_ = NAND ( new_n15080_, new_n15079_, new_n15078_, new_n15077_ ) -new_n15082_ = NOR ( new_n15081_, new_n15076_, new_n15071_, new_n15066_ ) -new_n15083_ = NOR ( new_n15082_, new_n6954_ ) -new_n15084_ = NAND ( new_n15083_, new_n15061_ ) -new_n15085_ = OR ( new_n15083_, new_n15061_ ) -new_n15086_ = NAND ( new_n15085_, new_n15084_ ) -new_n15087_ = NAND ( new_n13933_, new_n13929_ ) -new_n15088_ = NAND ( new_n15087_, new_n13930_ ) -new_n15089_ = XOR ( new_n15088_, new_n15086_ ) -new_n15090_ = OR ( new_n15089_, new_n11791_ ) -new_n15091_ = NAND ( new_n11808_, NET_779 ) -new_n15092_ = NOT ( NET_811 ) -new_n15093_ = OR ( new_n6988_, new_n15092_ ) -new_n15094_ = NAND ( new_n5827_, NET_970 ) -new_n15095_ = NAND ( new_n15094_, new_n15093_, new_n15091_, new_n15090_ ) -new_n15096_ = XNOR ( new_n15095_, new_n6867_ ) -new_n15097_ = OR ( new_n15096_, new_n13943_ ) -new_n15098_ = NAND ( new_n15096_, new_n13943_ ) -new_n15099_ = AND ( new_n15098_, new_n15097_ ) -new_n15100_ = NAND ( new_n15099_, new_n11782_ ) -new_n15101_ = OR ( new_n15089_, new_n11843_ ) -new_n15102_ = NAND ( new_n11781_, NET_938 ) -NET_20666 = NAND ( new_n15102_, new_n15101_, new_n15100_ ) -new_n15104_ = OR ( new_n14871_, new_n14637_ ) -new_n15105_ = AND ( new_n15104_, new_n14873_ ) -new_n15106_ = XNOR ( new_n15105_, new_n14794_ ) -new_n15107_ = XOR ( new_n15106_, new_n14637_ ) -new_n15108_ = NOT ( new_n15107_ ) -new_n15109_ = NOR ( new_n15108_, new_n14894_ ) -new_n15110_ = NOR ( new_n14897_, new_n11934_ ) -new_n15111_ = OR ( new_n14900_, new_n11537_ ) -new_n15112_ = NOT ( new_n14902_ ) -new_n15113_ = NAND ( new_n15112_, new_n5185_, new_n4931_ ) -new_n15114_ = OR ( new_n14905_, new_n14791_ ) -new_n15115_ = OR ( new_n14891_, new_n4931_ ) -new_n15116_ = NAND ( new_n15115_, new_n15114_, new_n15113_, new_n15111_ ) -NET_20679 = OR ( new_n15116_, new_n15110_, new_n15109_ ) -new_n15118_ = NOR ( new_n15108_, new_n14911_ ) -new_n15119_ = OR ( new_n14913_, new_n11934_ ) -new_n15120_ = OR ( new_n14915_, new_n11537_ ) -new_n15121_ = OR ( new_n14917_, new_n14791_ ) -new_n15122_ = OR ( new_n14910_, new_n11901_ ) -new_n15123_ = NAND ( new_n15122_, new_n15121_, new_n15120_, new_n15119_ ) -NET_20680 = OR ( new_n15123_, new_n15118_ ) -new_n15125_ = OR ( new_n15108_, new_n14928_ ) -new_n15126_ = OR ( new_n14930_, new_n11537_ ) -new_n15127_ = NAND ( new_n14927_, NET_1342 ) -new_n15128_ = NAND ( new_n14933_, new_n6350_ ) -NET_20681 = NAND ( new_n15128_, new_n15127_, new_n15126_, new_n15125_ ) -new_n15130_ = NOT ( NET_1228 ) -new_n15131_ = NOR ( new_n12430_, new_n15130_ ) -new_n15132_ = NAND ( new_n13959_, new_n13595_, new_n13536_ ) -new_n15133_ = NOR ( new_n4668_, new_n15130_ ) -new_n15134_ = NOT ( new_n15133_ ) -new_n15135_ = AND ( new_n15134_, new_n15132_ ) -new_n15136_ = NOR ( new_n15134_, new_n15132_ ) -new_n15137_ = OR ( new_n15136_, new_n15135_ ) -new_n15138_ = OR ( new_n15137_, new_n7114_ ) -new_n15139_ = NOT ( NET_1387 ) -new_n15140_ = OR ( new_n7112_, new_n15139_ ) -new_n15141_ = NAND ( new_n7015_, NET_1260 ) -new_n15142_ = NAND ( new_n7124_, NET_1355 ) -new_n15143_ = NAND ( new_n15142_, new_n15141_, new_n15140_, new_n15138_ ) -new_n15144_ = NOR ( new_n15143_, new_n15131_ ) -new_n15145_ = XNOR ( new_n15144_, new_n6196_ ) -new_n15146_ = OR ( new_n13066_, new_n4582_ ) -new_n15147_ = OR ( new_n13068_, new_n4584_ ) -new_n15148_ = OR ( new_n13070_, new_n4787_ ) -new_n15149_ = OR ( new_n13091_, new_n4587_ ) -new_n15150_ = NAND ( new_n15149_, new_n15148_, new_n15147_, new_n15146_ ) -new_n15151_ = OR ( new_n13075_, new_n4791_ ) -new_n15152_ = OR ( new_n13077_, new_n4793_ ) -new_n15153_ = OR ( new_n13079_, new_n4795_ ) -new_n15154_ = OR ( new_n13064_, new_n4593_ ) -new_n15155_ = NAND ( new_n15154_, new_n15153_, new_n15152_, new_n15151_ ) -new_n15156_ = OR ( new_n13084_, new_n4799_ ) -new_n15157_ = OR ( new_n13086_, new_n4801_ ) -new_n15158_ = OR ( new_n13088_, new_n4598_ ) -new_n15159_ = OR ( new_n13073_, new_n4600_ ) -new_n15160_ = NAND ( new_n15159_, new_n15158_, new_n15157_, new_n15156_ ) -new_n15161_ = OR ( new_n13093_, new_n4603_ ) -new_n15162_ = OR ( new_n13095_, new_n4605_ ) -new_n15163_ = OR ( new_n13097_, new_n4808_ ) -new_n15164_ = OR ( new_n13082_, new_n4810_ ) -new_n15165_ = NAND ( new_n15164_, new_n15163_, new_n15162_, new_n15161_ ) -new_n15166_ = NOR ( new_n15165_, new_n15160_, new_n15155_, new_n15150_ ) -new_n15167_ = NOR ( new_n15166_, new_n7114_ ) -new_n15168_ = NAND ( new_n15167_, new_n15145_ ) -new_n15169_ = OR ( new_n15167_, new_n15145_ ) -new_n15170_ = NAND ( new_n15169_, new_n15168_ ) -new_n15171_ = NAND ( new_n13995_, new_n13991_ ) -new_n15172_ = NAND ( new_n15171_, new_n13992_ ) -new_n15173_ = XOR ( new_n15172_, new_n15170_ ) -new_n15174_ = OR ( new_n15173_, new_n11859_ ) -new_n15175_ = NAND ( new_n11876_, NET_1228 ) -new_n15176_ = NOT ( NET_1260 ) -new_n15177_ = OR ( new_n7148_, new_n15176_ ) -new_n15178_ = NAND ( new_n6196_, NET_1419 ) -new_n15179_ = NAND ( new_n15178_, new_n15177_, new_n15175_, new_n15174_ ) -new_n15180_ = XNOR ( new_n15179_, new_n7027_ ) -new_n15181_ = OR ( new_n15180_, new_n14005_ ) -new_n15182_ = NAND ( new_n15180_, new_n14005_ ) -new_n15183_ = AND ( new_n15182_, new_n15181_ ) -new_n15184_ = NAND ( new_n15183_, new_n11850_ ) -new_n15185_ = OR ( new_n15173_, new_n11911_ ) -new_n15186_ = NAND ( new_n11849_, NET_1387 ) -NET_20682 = NAND ( new_n15186_, new_n15185_, new_n15184_ ) -new_n15188_ = NOR ( new_n14032_, new_n3188_ ) -new_n15189_ = OR ( new_n14035_, new_n3470_ ) -new_n15190_ = OR ( new_n14038_, new_n3472_ ) -new_n15191_ = OR ( new_n14040_, new_n3474_ ) -new_n15192_ = OR ( new_n14044_, new_n3180_ ) -new_n15193_ = NAND ( new_n15192_, new_n15191_, new_n15190_, new_n15189_ ) -new_n15194_ = OR ( new_n14185_, new_n3197_ ) -new_n15195_ = OR ( new_n14187_, new_n3479_ ) -new_n15196_ = OR ( new_n14189_, new_n3481_ ) -new_n15197_ = OR ( new_n14054_, new_n3202_ ) -new_n15198_ = OR ( new_n14056_, new_n3204_ ) -new_n15199_ = OR ( new_n14058_, new_n3488_ ) -new_n15200_ = OR ( new_n14195_, new_n3477_ ) -new_n15201_ = NAND ( new_n15200_, new_n15199_, new_n15198_, new_n15197_ ) -new_n15202_ = OR ( new_n14198_, new_n3182_ ) -new_n15203_ = OR ( new_n14200_, new_n3184_ ) -new_n15204_ = OR ( new_n14202_, new_n3466_ ) -new_n15205_ = OR ( new_n14066_, new_n3200_ ) -new_n15206_ = NAND ( new_n15205_, new_n15204_, new_n15203_, new_n15202_ ) -new_n15207_ = NOR ( new_n15206_, new_n15201_ ) -new_n15208_ = NAND ( new_n15207_, new_n15196_, new_n15195_, new_n15194_ ) -new_n15209_ = NOR ( new_n15208_, new_n15193_, new_n15188_, new_n14021_ ) -new_n15210_ = OR ( new_n14073_, new_n3180_ ) -new_n15211_ = OR ( new_n14076_, new_n3182_ ) -new_n15212_ = OR ( new_n14079_, new_n3184_ ) -new_n15213_ = OR ( new_n14082_, new_n3466_ ) -new_n15214_ = NAND ( new_n15213_, new_n15212_, new_n15211_, new_n15210_ ) -new_n15215_ = OR ( new_n14086_, new_n3188_ ) -new_n15216_ = OR ( new_n14088_, new_n3470_ ) -new_n15217_ = OR ( new_n14090_, new_n3472_ ) -new_n15218_ = OR ( new_n14092_, new_n3474_ ) -new_n15219_ = NAND ( new_n15218_, new_n15217_, new_n15216_, new_n15215_ ) -new_n15220_ = OR ( new_n14096_, new_n3477_ ) -new_n15221_ = OR ( new_n14098_, new_n3479_ ) -new_n15222_ = OR ( new_n14100_, new_n3481_ ) -new_n15223_ = OR ( new_n14102_, new_n3197_ ) -new_n15224_ = NAND ( new_n15223_, new_n15222_, new_n15221_, new_n15220_ ) -new_n15225_ = OR ( new_n14106_, new_n3200_ ) -new_n15226_ = OR ( new_n14108_, new_n3202_ ) -new_n15227_ = OR ( new_n14110_, new_n3204_ ) -new_n15228_ = OR ( new_n14112_, new_n3488_ ) -new_n15229_ = NAND ( new_n15228_, new_n15227_, new_n15226_, new_n15225_ ) -new_n15230_ = NOR ( new_n15229_, new_n15224_, new_n15219_, new_n15214_ ) -new_n15231_ = NOR ( new_n15230_, new_n14013_ ) -new_n15232_ = OR ( new_n14012_, new_n3491_ ) -new_n15233_ = OR ( new_n14119_, new_n3180_ ) -new_n15234_ = OR ( new_n14122_, new_n3182_ ) -new_n15235_ = OR ( new_n14125_, new_n3184_ ) -new_n15236_ = OR ( new_n14127_, new_n3466_ ) -new_n15237_ = NAND ( new_n15236_, new_n15235_, new_n15234_, new_n15233_ ) -new_n15238_ = OR ( new_n14132_, new_n3188_ ) -new_n15239_ = OR ( new_n14135_, new_n3470_ ) -new_n15240_ = OR ( new_n14137_, new_n3472_ ) -new_n15241_ = OR ( new_n14139_, new_n3474_ ) -new_n15242_ = NAND ( new_n15241_, new_n15240_, new_n15239_, new_n15238_ ) -new_n15243_ = OR ( new_n14143_, new_n3477_ ) -new_n15244_ = OR ( new_n14145_, new_n3479_ ) -new_n15245_ = OR ( new_n14148_, new_n3481_ ) -new_n15246_ = OR ( new_n14150_, new_n3197_ ) -new_n15247_ = NAND ( new_n15246_, new_n15245_, new_n15244_, new_n15243_ ) -new_n15248_ = OR ( new_n14153_, new_n3200_ ) -new_n15249_ = OR ( new_n14155_, new_n3202_ ) -new_n15250_ = OR ( new_n14157_, new_n3204_ ) -new_n15251_ = OR ( new_n14159_, new_n3488_ ) -new_n15252_ = NAND ( new_n15251_, new_n15250_, new_n15249_, new_n15248_ ) -new_n15253_ = NOR ( new_n15252_, new_n15247_, new_n15242_, new_n15237_ ) -new_n15254_ = OR ( new_n15253_, new_n6753_ ) -new_n15255_ = OR ( new_n3208_, new_n2975_ ) -new_n15256_ = NAND ( new_n15255_, new_n15254_, new_n15232_, new_n6731_ ) -new_n15257_ = OR ( new_n15256_, new_n15231_, new_n15209_ ) -new_n15258_ = NAND ( new_n15257_, new_n14021_ ) -new_n15259_ = OR ( new_n15257_, new_n14021_ ) -new_n15260_ = NAND ( new_n15259_, new_n15258_ ) -new_n15261_ = OR ( new_n14015_, new_n11959_ ) -new_n15262_ = OR ( new_n11959_, new_n6753_ ) -new_n15263_ = OR ( new_n14021_, new_n11594_ ) -new_n15264_ = NOT ( NET_510 ) -new_n15265_ = OR ( new_n14024_, new_n15264_ ) -new_n15266_ = NAND ( new_n14026_, NET_319 ) -new_n15267_ = AND ( new_n15266_, new_n15265_, new_n15263_ ) -new_n15268_ = NAND ( new_n15267_, new_n15262_, new_n15261_ ) -new_n15269_ = NAND ( new_n15268_, new_n15260_ ) -new_n15270_ = NOT ( new_n15268_ ) -new_n15271_ = NAND ( new_n15270_, new_n15259_, new_n15258_ ) -new_n15272_ = AND ( new_n15271_, new_n15269_ ) -new_n15273_ = NAND ( new_n14257_, new_n14256_, new_n14169_ ) -new_n15274_ = NAND ( new_n15273_, new_n14168_ ) -new_n15275_ = OR ( new_n15274_, new_n15272_ ) -new_n15276_ = NAND ( new_n15274_, new_n15271_, new_n15269_ ) -new_n15277_ = NAND ( new_n15276_, new_n15275_ ) -new_n15278_ = OR ( new_n15277_, new_n14278_ ) -new_n15279_ = OR ( new_n14281_, new_n11959_ ) -new_n15280_ = OR ( new_n14284_, new_n11594_ ) -new_n15281_ = OR ( new_n14286_, new_n11577_ ) -new_n15282_ = OR ( new_n14289_, new_n15264_ ) -new_n15283_ = OR ( new_n14275_, new_n11547_ ) -new_n15284_ = AND ( new_n15283_, new_n15282_, new_n15281_ ) -NET_20868 = NAND ( new_n15284_, new_n15280_, new_n15279_, new_n15278_ ) -new_n15286_ = OR ( new_n15277_, new_n14295_ ) -new_n15287_ = OR ( new_n14297_, new_n11959_ ) -new_n15288_ = OR ( new_n14299_, new_n11594_ ) -new_n15289_ = OR ( new_n14301_, new_n15264_ ) -new_n15290_ = OR ( new_n14294_, new_n11942_ ) -new_n15291_ = AND ( new_n15290_, new_n15289_, new_n15288_ ) -NET_20869 = NAND ( new_n15291_, new_n15287_, new_n15286_ ) -new_n15293_ = OR ( new_n15277_, new_n14312_ ) -new_n15294_ = OR ( new_n14314_, new_n11594_ ) -new_n15295_ = NAND ( new_n14311_, NET_446 ) -new_n15296_ = OR ( new_n14317_, new_n5599_ ) -NET_20870 = NAND ( new_n15296_, new_n15295_, new_n15294_, new_n15293_ ) -new_n15298_ = NOT ( NET_331 ) -new_n15299_ = NOR ( new_n12294_, new_n15298_ ) -new_n15300_ = NOR ( new_n3179_, new_n15298_ ) -new_n15301_ = OR ( new_n15300_, new_n14968_ ) -new_n15302_ = NAND ( new_n15300_, new_n14968_ ) -new_n15303_ = NAND ( new_n15302_, new_n15301_ ) -new_n15304_ = OR ( new_n15303_, new_n6794_ ) -new_n15305_ = NOT ( NET_490 ) -new_n15306_ = OR ( new_n6792_, new_n15305_ ) -new_n15307_ = NAND ( new_n6695_, NET_363 ) -new_n15308_ = NAND ( new_n6804_, NET_458 ) -new_n15309_ = NAND ( new_n15308_, new_n15307_, new_n15306_, new_n15304_ ) -new_n15310_ = NOR ( new_n15309_, new_n15299_ ) -new_n15311_ = OR ( new_n15310_, new_n5529_ ) -new_n15312_ = NAND ( new_n15310_, new_n5529_ ) -new_n15313_ = OR ( new_n12930_, new_n3031_ ) -new_n15314_ = OR ( new_n12932_, new_n3033_ ) -new_n15315_ = OR ( new_n12934_, new_n3035_ ) -new_n15316_ = OR ( new_n12955_, new_n3037_ ) -new_n15317_ = NAND ( new_n15316_, new_n15315_, new_n15314_, new_n15313_ ) -new_n15318_ = OR ( new_n12939_, new_n3040_ ) -new_n15319_ = OR ( new_n12941_, new_n3042_ ) -new_n15320_ = OR ( new_n12943_, new_n3044_ ) -new_n15321_ = OR ( new_n12928_, new_n3046_ ) -new_n15322_ = NAND ( new_n15321_, new_n15320_, new_n15319_, new_n15318_ ) -new_n15323_ = OR ( new_n12948_, new_n3050_ ) -new_n15324_ = OR ( new_n12950_, new_n3052_ ) -new_n15325_ = OR ( new_n12952_, new_n3054_ ) -new_n15326_ = OR ( new_n12937_, new_n3056_ ) -new_n15327_ = NAND ( new_n15326_, new_n15325_, new_n15324_, new_n15323_ ) -new_n15328_ = OR ( new_n12957_, new_n3059_ ) -new_n15329_ = OR ( new_n12959_, new_n3061_ ) -new_n15330_ = OR ( new_n12961_, new_n3063_ ) -new_n15331_ = OR ( new_n12946_, new_n3065_ ) -new_n15332_ = NAND ( new_n15331_, new_n15330_, new_n15329_, new_n15328_ ) -new_n15333_ = NOR ( new_n15332_, new_n15327_, new_n15322_, new_n15317_ ) -new_n15334_ = NOT ( new_n15333_ ) -new_n15335_ = NAND ( new_n15334_, new_n6596_ ) -new_n15336_ = NAND ( new_n15335_, new_n15312_, new_n15311_ ) -new_n15337_ = AND ( new_n15312_, new_n15311_ ) -new_n15338_ = OR ( new_n15337_, new_n15335_ ) -new_n15339_ = NAND ( new_n15338_, new_n15336_ ) -new_n15340_ = NAND ( new_n15004_, new_n15001_ ) -new_n15341_ = NAND ( new_n15340_, new_n15000_ ) -new_n15342_ = XOR ( new_n15341_, new_n15339_ ) -new_n15343_ = OR ( new_n15342_, new_n11723_ ) -new_n15344_ = NAND ( new_n11740_, NET_331 ) -new_n15345_ = NOT ( NET_363 ) -new_n15346_ = OR ( new_n6828_, new_n15345_ ) -new_n15347_ = NAND ( new_n5529_, NET_522 ) -new_n15348_ = NAND ( new_n15347_, new_n15346_, new_n15344_, new_n15343_ ) -new_n15349_ = XNOR ( new_n15348_, new_n6707_ ) -new_n15350_ = NAND ( new_n15349_, new_n15012_, new_n13881_ ) -new_n15351_ = NOT ( new_n15349_ ) -new_n15352_ = NAND ( new_n15351_, new_n15014_ ) -new_n15353_ = NAND ( new_n15352_, new_n15350_ ) -new_n15354_ = OR ( new_n15353_, new_n11715_ ) -new_n15355_ = OR ( new_n15342_, new_n11775_ ) -new_n15356_ = NAND ( new_n11713_, NET_490 ) -NET_20871 = NAND ( new_n15356_, new_n15355_, new_n15354_ ) -new_n15358_ = NOT ( NET_332 ) -new_n15359_ = NOR ( new_n12294_, new_n15358_ ) -new_n15360_ = NOT ( new_n15302_ ) -new_n15361_ = NOR ( new_n3179_, new_n15358_ ) -new_n15362_ = OR ( new_n15361_, new_n15360_ ) -new_n15363_ = NAND ( new_n15361_, new_n15360_ ) -new_n15364_ = NAND ( new_n15363_, new_n15362_ ) -new_n15365_ = OR ( new_n15364_, new_n6794_ ) -new_n15366_ = NOT ( NET_491 ) -new_n15367_ = OR ( new_n6792_, new_n15366_ ) -new_n15368_ = NAND ( new_n6695_, NET_364 ) -new_n15369_ = NAND ( new_n6804_, NET_459 ) -new_n15370_ = NAND ( new_n15369_, new_n15368_, new_n15367_, new_n15365_ ) -new_n15371_ = NOR ( new_n15370_, new_n15359_ ) -new_n15372_ = XNOR ( new_n15371_, new_n5529_ ) -new_n15373_ = OR ( new_n12930_, new_n3587_ ) -new_n15374_ = OR ( new_n12932_, new_n3589_ ) -new_n15375_ = OR ( new_n12934_, new_n3591_ ) -new_n15376_ = OR ( new_n12955_, new_n3593_ ) -new_n15377_ = NAND ( new_n15376_, new_n15375_, new_n15374_, new_n15373_ ) -new_n15378_ = OR ( new_n12939_, new_n3596_ ) -new_n15379_ = OR ( new_n12941_, new_n3598_ ) -new_n15380_ = OR ( new_n12943_, new_n3600_ ) -new_n15381_ = OR ( new_n12928_, new_n3602_ ) -new_n15382_ = NAND ( new_n15381_, new_n15380_, new_n15379_, new_n15378_ ) -new_n15383_ = OR ( new_n12948_, new_n3605_ ) -new_n15384_ = OR ( new_n12950_, new_n3607_ ) -new_n15385_ = OR ( new_n12952_, new_n3609_ ) -new_n15386_ = OR ( new_n12937_, new_n3611_ ) -new_n15387_ = NAND ( new_n15386_, new_n15385_, new_n15384_, new_n15383_ ) -new_n15388_ = OR ( new_n12957_, new_n3614_ ) -new_n15389_ = OR ( new_n12959_, new_n3616_ ) -new_n15390_ = OR ( new_n12961_, new_n3618_ ) -new_n15391_ = OR ( new_n12946_, new_n3620_ ) -new_n15392_ = NAND ( new_n15391_, new_n15390_, new_n15389_, new_n15388_ ) -new_n15393_ = NOR ( new_n15392_, new_n15387_, new_n15382_, new_n15377_ ) -new_n15394_ = NOR ( new_n15393_, new_n6794_ ) -new_n15395_ = OR ( new_n15394_, new_n15372_ ) -new_n15396_ = NAND ( new_n15394_, new_n15372_ ) -new_n15397_ = NAND ( new_n15396_, new_n15395_ ) -new_n15398_ = NAND ( new_n15341_, new_n15336_ ) -new_n15399_ = NAND ( new_n15398_, new_n15338_ ) -new_n15400_ = XOR ( new_n15399_, new_n15397_ ) -new_n15401_ = OR ( new_n15400_, new_n11723_ ) -new_n15402_ = NAND ( new_n11740_, NET_332 ) -new_n15403_ = NOT ( NET_364 ) -new_n15404_ = OR ( new_n6828_, new_n15403_ ) -new_n15405_ = NAND ( new_n5529_, NET_523 ) -new_n15406_ = NAND ( new_n15405_, new_n15404_, new_n15402_, new_n15401_ ) -new_n15407_ = XOR ( new_n15406_, new_n6707_ ) -new_n15408_ = OR ( new_n15407_, new_n15350_ ) -new_n15409_ = NAND ( new_n15407_, new_n15350_ ) -new_n15410_ = AND ( new_n15409_, new_n15408_ ) -new_n15411_ = NAND ( new_n15410_, new_n11714_ ) -new_n15412_ = OR ( new_n15400_, new_n11775_ ) -new_n15413_ = NAND ( new_n11713_, NET_491 ) -NET_20872 = NAND ( new_n15413_, new_n15412_, new_n15411_ ) -new_n15415_ = NOR ( new_n14340_, new_n3933_ ) -new_n15416_ = OR ( new_n14343_, new_n4215_ ) -new_n15417_ = OR ( new_n14346_, new_n4217_ ) -new_n15418_ = OR ( new_n14348_, new_n4219_ ) -new_n15419_ = OR ( new_n14352_, new_n3925_ ) -new_n15420_ = NAND ( new_n15419_, new_n15418_, new_n15417_, new_n15416_ ) -new_n15421_ = OR ( new_n14493_, new_n3942_ ) -new_n15422_ = OR ( new_n14495_, new_n4224_ ) -new_n15423_ = OR ( new_n14497_, new_n4226_ ) -new_n15424_ = OR ( new_n14362_, new_n3947_ ) -new_n15425_ = OR ( new_n14364_, new_n3949_ ) -new_n15426_ = OR ( new_n14366_, new_n4233_ ) -new_n15427_ = OR ( new_n14503_, new_n4222_ ) -new_n15428_ = NAND ( new_n15427_, new_n15426_, new_n15425_, new_n15424_ ) -new_n15429_ = OR ( new_n14506_, new_n3927_ ) -new_n15430_ = OR ( new_n14508_, new_n3929_ ) -new_n15431_ = OR ( new_n14510_, new_n4211_ ) -new_n15432_ = OR ( new_n14374_, new_n3945_ ) -new_n15433_ = NAND ( new_n15432_, new_n15431_, new_n15430_, new_n15429_ ) -new_n15434_ = NOR ( new_n15433_, new_n15428_ ) -new_n15435_ = NAND ( new_n15434_, new_n15423_, new_n15422_, new_n15421_ ) -new_n15436_ = NOR ( new_n15435_, new_n15420_, new_n15415_, new_n14329_ ) -new_n15437_ = OR ( new_n14381_, new_n3925_ ) -new_n15438_ = OR ( new_n14384_, new_n3927_ ) -new_n15439_ = OR ( new_n14387_, new_n3929_ ) -new_n15440_ = OR ( new_n14390_, new_n4211_ ) -new_n15441_ = NAND ( new_n15440_, new_n15439_, new_n15438_, new_n15437_ ) -new_n15442_ = OR ( new_n14394_, new_n3933_ ) -new_n15443_ = OR ( new_n14396_, new_n4215_ ) -new_n15444_ = OR ( new_n14398_, new_n4217_ ) -new_n15445_ = OR ( new_n14400_, new_n4219_ ) -new_n15446_ = NAND ( new_n15445_, new_n15444_, new_n15443_, new_n15442_ ) -new_n15447_ = OR ( new_n14404_, new_n4222_ ) -new_n15448_ = OR ( new_n14406_, new_n4224_ ) -new_n15449_ = OR ( new_n14408_, new_n4226_ ) -new_n15450_ = OR ( new_n14410_, new_n3942_ ) -new_n15451_ = NAND ( new_n15450_, new_n15449_, new_n15448_, new_n15447_ ) -new_n15452_ = OR ( new_n14414_, new_n3945_ ) -new_n15453_ = OR ( new_n14416_, new_n3947_ ) -new_n15454_ = OR ( new_n14418_, new_n3949_ ) -new_n15455_ = OR ( new_n14420_, new_n4233_ ) -new_n15456_ = NAND ( new_n15455_, new_n15454_, new_n15453_, new_n15452_ ) -new_n15457_ = NOR ( new_n15456_, new_n15451_, new_n15446_, new_n15441_ ) -new_n15458_ = NOR ( new_n15457_, new_n14321_ ) -new_n15459_ = OR ( new_n14320_, new_n4236_ ) -new_n15460_ = OR ( new_n14427_, new_n3925_ ) -new_n15461_ = OR ( new_n14430_, new_n3927_ ) -new_n15462_ = OR ( new_n14433_, new_n3929_ ) -new_n15463_ = OR ( new_n14435_, new_n4211_ ) -new_n15464_ = NAND ( new_n15463_, new_n15462_, new_n15461_, new_n15460_ ) -new_n15465_ = OR ( new_n14440_, new_n3933_ ) -new_n15466_ = OR ( new_n14443_, new_n4215_ ) -new_n15467_ = OR ( new_n14445_, new_n4217_ ) -new_n15468_ = OR ( new_n14447_, new_n4219_ ) -new_n15469_ = NAND ( new_n15468_, new_n15467_, new_n15466_, new_n15465_ ) -new_n15470_ = OR ( new_n14451_, new_n4222_ ) -new_n15471_ = OR ( new_n14453_, new_n4224_ ) -new_n15472_ = OR ( new_n14456_, new_n4226_ ) -new_n15473_ = OR ( new_n14458_, new_n3942_ ) -new_n15474_ = NAND ( new_n15473_, new_n15472_, new_n15471_, new_n15470_ ) -new_n15475_ = OR ( new_n14461_, new_n3945_ ) -new_n15476_ = OR ( new_n14463_, new_n3947_ ) -new_n15477_ = OR ( new_n14465_, new_n3949_ ) -new_n15478_ = OR ( new_n14467_, new_n4233_ ) -new_n15479_ = NAND ( new_n15478_, new_n15477_, new_n15476_, new_n15475_ ) -new_n15480_ = NOR ( new_n15479_, new_n15474_, new_n15469_, new_n15464_ ) -new_n15481_ = OR ( new_n15480_, new_n6913_ ) -new_n15482_ = OR ( new_n3953_, new_n3720_ ) -new_n15483_ = NAND ( new_n15482_, new_n15481_, new_n15459_, new_n6891_ ) -new_n15484_ = OR ( new_n15483_, new_n15458_, new_n15436_ ) -new_n15485_ = NAND ( new_n15484_, new_n14329_ ) -new_n15486_ = OR ( new_n15484_, new_n14329_ ) -new_n15487_ = NAND ( new_n15486_, new_n15485_ ) -new_n15488_ = OR ( new_n14323_, new_n11984_ ) -new_n15489_ = OR ( new_n11984_, new_n6913_ ) -new_n15490_ = OR ( new_n14329_, new_n11650_ ) -new_n15491_ = NOT ( NET_959 ) -new_n15492_ = OR ( new_n14332_, new_n15491_ ) -new_n15493_ = NAND ( new_n14334_, NET_768 ) -new_n15494_ = AND ( new_n15493_, new_n15492_, new_n15490_ ) -new_n15495_ = NAND ( new_n15494_, new_n15489_, new_n15488_ ) -new_n15496_ = NAND ( new_n15495_, new_n15487_ ) -new_n15497_ = NOT ( new_n15495_ ) -new_n15498_ = NAND ( new_n15497_, new_n15486_, new_n15485_ ) -new_n15499_ = AND ( new_n15498_, new_n15496_ ) -new_n15500_ = NAND ( new_n14565_, new_n14564_, new_n14477_ ) -new_n15501_ = NAND ( new_n15500_, new_n14476_ ) -new_n15502_ = OR ( new_n15501_, new_n15499_ ) -new_n15503_ = NAND ( new_n15501_, new_n15498_, new_n15496_ ) -new_n15504_ = NAND ( new_n15503_, new_n15502_ ) -new_n15505_ = OR ( new_n15504_, new_n14586_ ) -new_n15506_ = OR ( new_n14589_, new_n11984_ ) -new_n15507_ = OR ( new_n14592_, new_n11650_ ) -new_n15508_ = OR ( new_n14594_, new_n11633_ ) -new_n15509_ = OR ( new_n14597_, new_n15491_ ) -new_n15510_ = OR ( new_n14583_, new_n11603_ ) -new_n15511_ = AND ( new_n15510_, new_n15509_, new_n15508_ ) -NET_20888 = NAND ( new_n15511_, new_n15507_, new_n15506_, new_n15505_ ) -new_n15513_ = OR ( new_n15504_, new_n14603_ ) -new_n15514_ = OR ( new_n14605_, new_n11984_ ) -new_n15515_ = OR ( new_n14607_, new_n11650_ ) -new_n15516_ = OR ( new_n14609_, new_n15491_ ) -new_n15517_ = OR ( new_n14602_, new_n11967_ ) -new_n15518_ = AND ( new_n15517_, new_n15516_, new_n15515_ ) -NET_20889 = NAND ( new_n15518_, new_n15514_, new_n15513_ ) -new_n15520_ = OR ( new_n15504_, new_n14620_ ) -new_n15521_ = OR ( new_n14622_, new_n11650_ ) -new_n15522_ = NAND ( new_n14619_, NET_895 ) -new_n15523_ = NAND ( new_n14625_, new_n5951_ ) -NET_20890 = NAND ( new_n15523_, new_n15522_, new_n15521_, new_n15520_ ) -new_n15525_ = NOT ( NET_780 ) -new_n15526_ = NOR ( new_n12362_, new_n15525_ ) -new_n15527_ = NOR ( new_n3924_, new_n15525_ ) -new_n15528_ = OR ( new_n15527_, new_n15052_ ) -new_n15529_ = NAND ( new_n15527_, new_n15052_ ) -new_n15530_ = NAND ( new_n15529_, new_n15528_ ) -new_n15531_ = OR ( new_n15530_, new_n6954_ ) -new_n15532_ = NOT ( NET_939 ) -new_n15533_ = OR ( new_n6952_, new_n15532_ ) -new_n15534_ = NAND ( new_n6855_, NET_812 ) -new_n15535_ = NAND ( new_n6964_, NET_907 ) -new_n15536_ = NAND ( new_n15535_, new_n15534_, new_n15533_, new_n15531_ ) -new_n15537_ = NOR ( new_n15536_, new_n15526_ ) -new_n15538_ = OR ( new_n15537_, new_n5827_ ) -new_n15539_ = NAND ( new_n15537_, new_n5827_ ) -new_n15540_ = OR ( new_n12998_, new_n3776_ ) -new_n15541_ = OR ( new_n13000_, new_n3778_ ) -new_n15542_ = OR ( new_n13002_, new_n3780_ ) -new_n15543_ = OR ( new_n13023_, new_n3782_ ) -new_n15544_ = NAND ( new_n15543_, new_n15542_, new_n15541_, new_n15540_ ) -new_n15545_ = OR ( new_n13007_, new_n3785_ ) -new_n15546_ = OR ( new_n13009_, new_n3787_ ) -new_n15547_ = OR ( new_n13011_, new_n3789_ ) -new_n15548_ = OR ( new_n12996_, new_n3791_ ) -new_n15549_ = NAND ( new_n15548_, new_n15547_, new_n15546_, new_n15545_ ) -new_n15550_ = OR ( new_n13016_, new_n3795_ ) -new_n15551_ = OR ( new_n13018_, new_n3797_ ) -new_n15552_ = OR ( new_n13020_, new_n3799_ ) -new_n15553_ = OR ( new_n13005_, new_n3801_ ) -new_n15554_ = NAND ( new_n15553_, new_n15552_, new_n15551_, new_n15550_ ) -new_n15555_ = OR ( new_n13025_, new_n3804_ ) -new_n15556_ = OR ( new_n13027_, new_n3806_ ) -new_n15557_ = OR ( new_n13029_, new_n3808_ ) -new_n15558_ = OR ( new_n13014_, new_n3810_ ) -new_n15559_ = NAND ( new_n15558_, new_n15557_, new_n15556_, new_n15555_ ) -new_n15560_ = NOR ( new_n15559_, new_n15554_, new_n15549_, new_n15544_ ) -new_n15561_ = NOT ( new_n15560_ ) -new_n15562_ = NAND ( new_n15561_, new_n6641_ ) -new_n15563_ = NAND ( new_n15562_, new_n15539_, new_n15538_ ) -new_n15564_ = AND ( new_n15539_, new_n15538_ ) -new_n15565_ = OR ( new_n15564_, new_n15562_ ) -new_n15566_ = NAND ( new_n15565_, new_n15563_ ) -new_n15567_ = NAND ( new_n15088_, new_n15085_ ) -new_n15568_ = NAND ( new_n15567_, new_n15084_ ) -new_n15569_ = XOR ( new_n15568_, new_n15566_ ) -new_n15570_ = OR ( new_n15569_, new_n11791_ ) -new_n15571_ = NAND ( new_n11808_, NET_780 ) -new_n15572_ = NOT ( NET_812 ) -new_n15573_ = OR ( new_n6988_, new_n15572_ ) -new_n15574_ = NAND ( new_n5827_, NET_971 ) -new_n15575_ = NAND ( new_n15574_, new_n15573_, new_n15571_, new_n15570_ ) -new_n15576_ = XNOR ( new_n15575_, new_n6867_ ) -new_n15577_ = NAND ( new_n15576_, new_n15096_, new_n13943_ ) -new_n15578_ = NOT ( new_n15576_ ) -new_n15579_ = NAND ( new_n15578_, new_n15098_ ) -new_n15580_ = NAND ( new_n15579_, new_n15577_ ) -new_n15581_ = OR ( new_n15580_, new_n11783_ ) -new_n15582_ = OR ( new_n15569_, new_n11843_ ) -new_n15583_ = NAND ( new_n11781_, NET_939 ) -NET_20891 = NAND ( new_n15583_, new_n15582_, new_n15581_ ) -new_n15585_ = NOT ( NET_781 ) -new_n15586_ = NOR ( new_n12362_, new_n15585_ ) -new_n15587_ = NOT ( new_n15529_ ) -new_n15588_ = NOR ( new_n3924_, new_n15585_ ) -new_n15589_ = OR ( new_n15588_, new_n15587_ ) -new_n15590_ = NAND ( new_n15588_, new_n15587_ ) -new_n15591_ = NAND ( new_n15590_, new_n15589_ ) -new_n15592_ = OR ( new_n15591_, new_n6954_ ) -new_n15593_ = NOT ( NET_940 ) -new_n15594_ = OR ( new_n6952_, new_n15593_ ) -new_n15595_ = NAND ( new_n6855_, NET_813 ) -new_n15596_ = NAND ( new_n6964_, NET_908 ) -new_n15597_ = NAND ( new_n15596_, new_n15595_, new_n15594_, new_n15592_ ) -new_n15598_ = NOR ( new_n15597_, new_n15586_ ) -new_n15599_ = XNOR ( new_n15598_, new_n5827_ ) -new_n15600_ = OR ( new_n12998_, new_n4332_ ) -new_n15601_ = OR ( new_n13000_, new_n4334_ ) -new_n15602_ = OR ( new_n13002_, new_n4336_ ) -new_n15603_ = OR ( new_n13023_, new_n4338_ ) -new_n15604_ = NAND ( new_n15603_, new_n15602_, new_n15601_, new_n15600_ ) -new_n15605_ = OR ( new_n13007_, new_n4341_ ) -new_n15606_ = OR ( new_n13009_, new_n4343_ ) -new_n15607_ = OR ( new_n13011_, new_n4345_ ) -new_n15608_ = OR ( new_n12996_, new_n4347_ ) -new_n15609_ = NAND ( new_n15608_, new_n15607_, new_n15606_, new_n15605_ ) -new_n15610_ = OR ( new_n13016_, new_n4350_ ) -new_n15611_ = OR ( new_n13018_, new_n4352_ ) -new_n15612_ = OR ( new_n13020_, new_n4354_ ) -new_n15613_ = OR ( new_n13005_, new_n4356_ ) -new_n15614_ = NAND ( new_n15613_, new_n15612_, new_n15611_, new_n15610_ ) -new_n15615_ = OR ( new_n13025_, new_n4359_ ) -new_n15616_ = OR ( new_n13027_, new_n4361_ ) -new_n15617_ = OR ( new_n13029_, new_n4363_ ) -new_n15618_ = OR ( new_n13014_, new_n4365_ ) -new_n15619_ = NAND ( new_n15618_, new_n15617_, new_n15616_, new_n15615_ ) -new_n15620_ = NOR ( new_n15619_, new_n15614_, new_n15609_, new_n15604_ ) -new_n15621_ = NOR ( new_n15620_, new_n6954_ ) -new_n15622_ = OR ( new_n15621_, new_n15599_ ) -new_n15623_ = NAND ( new_n15621_, new_n15599_ ) -new_n15624_ = NAND ( new_n15623_, new_n15622_ ) -new_n15625_ = NAND ( new_n15568_, new_n15563_ ) -new_n15626_ = NAND ( new_n15625_, new_n15565_ ) -new_n15627_ = XOR ( new_n15626_, new_n15624_ ) -new_n15628_ = OR ( new_n15627_, new_n11791_ ) -new_n15629_ = NAND ( new_n11808_, NET_781 ) -new_n15630_ = NOT ( NET_813 ) -new_n15631_ = OR ( new_n6988_, new_n15630_ ) -new_n15632_ = NAND ( new_n5827_, NET_972 ) -new_n15633_ = NAND ( new_n15632_, new_n15631_, new_n15629_, new_n15628_ ) -new_n15634_ = XOR ( new_n15633_, new_n6867_ ) -new_n15635_ = OR ( new_n15634_, new_n15577_ ) -new_n15636_ = NAND ( new_n15634_, new_n15577_ ) -new_n15637_ = AND ( new_n15636_, new_n15635_ ) -new_n15638_ = NAND ( new_n15637_, new_n11782_ ) -new_n15639_ = OR ( new_n15627_, new_n11843_ ) -new_n15640_ = NAND ( new_n11781_, NET_940 ) -NET_20892 = NAND ( new_n15640_, new_n15639_, new_n15638_ ) -new_n15642_ = NOR ( new_n14648_, new_n4677_ ) -new_n15643_ = OR ( new_n14651_, new_n4959_ ) -new_n15644_ = OR ( new_n14654_, new_n4961_ ) -new_n15645_ = OR ( new_n14656_, new_n4963_ ) -new_n15646_ = OR ( new_n14660_, new_n4669_ ) -new_n15647_ = NAND ( new_n15646_, new_n15645_, new_n15644_, new_n15643_ ) -new_n15648_ = OR ( new_n14801_, new_n4686_ ) -new_n15649_ = OR ( new_n14803_, new_n4968_ ) -new_n15650_ = OR ( new_n14805_, new_n4970_ ) -new_n15651_ = OR ( new_n14670_, new_n4691_ ) -new_n15652_ = OR ( new_n14672_, new_n4693_ ) -new_n15653_ = OR ( new_n14674_, new_n4977_ ) -new_n15654_ = OR ( new_n14811_, new_n4966_ ) -new_n15655_ = NAND ( new_n15654_, new_n15653_, new_n15652_, new_n15651_ ) -new_n15656_ = OR ( new_n14814_, new_n4671_ ) -new_n15657_ = OR ( new_n14816_, new_n4673_ ) -new_n15658_ = OR ( new_n14818_, new_n4955_ ) -new_n15659_ = OR ( new_n14682_, new_n4689_ ) -new_n15660_ = NAND ( new_n15659_, new_n15658_, new_n15657_, new_n15656_ ) -new_n15661_ = NOR ( new_n15660_, new_n15655_ ) -new_n15662_ = NAND ( new_n15661_, new_n15650_, new_n15649_, new_n15648_ ) -new_n15663_ = NOR ( new_n15662_, new_n15647_, new_n15642_, new_n14637_ ) -new_n15664_ = OR ( new_n14689_, new_n4669_ ) -new_n15665_ = OR ( new_n14692_, new_n4671_ ) -new_n15666_ = OR ( new_n14695_, new_n4673_ ) -new_n15667_ = OR ( new_n14698_, new_n4955_ ) -new_n15668_ = NAND ( new_n15667_, new_n15666_, new_n15665_, new_n15664_ ) -new_n15669_ = OR ( new_n14702_, new_n4677_ ) -new_n15670_ = OR ( new_n14704_, new_n4959_ ) -new_n15671_ = OR ( new_n14706_, new_n4961_ ) -new_n15672_ = OR ( new_n14708_, new_n4963_ ) -new_n15673_ = NAND ( new_n15672_, new_n15671_, new_n15670_, new_n15669_ ) -new_n15674_ = OR ( new_n14712_, new_n4966_ ) -new_n15675_ = OR ( new_n14714_, new_n4968_ ) -new_n15676_ = OR ( new_n14716_, new_n4970_ ) -new_n15677_ = OR ( new_n14718_, new_n4686_ ) -new_n15678_ = NAND ( new_n15677_, new_n15676_, new_n15675_, new_n15674_ ) -new_n15679_ = OR ( new_n14722_, new_n4689_ ) -new_n15680_ = OR ( new_n14724_, new_n4691_ ) -new_n15681_ = OR ( new_n14726_, new_n4693_ ) -new_n15682_ = OR ( new_n14728_, new_n4977_ ) -new_n15683_ = NAND ( new_n15682_, new_n15681_, new_n15680_, new_n15679_ ) -new_n15684_ = NOR ( new_n15683_, new_n15678_, new_n15673_, new_n15668_ ) -new_n15685_ = NOR ( new_n15684_, new_n14629_ ) -new_n15686_ = OR ( new_n14628_, new_n4980_ ) -new_n15687_ = OR ( new_n14735_, new_n4669_ ) -new_n15688_ = OR ( new_n14738_, new_n4671_ ) -new_n15689_ = OR ( new_n14741_, new_n4673_ ) -new_n15690_ = OR ( new_n14743_, new_n4955_ ) -new_n15691_ = NAND ( new_n15690_, new_n15689_, new_n15688_, new_n15687_ ) -new_n15692_ = OR ( new_n14748_, new_n4677_ ) -new_n15693_ = OR ( new_n14751_, new_n4959_ ) -new_n15694_ = OR ( new_n14753_, new_n4961_ ) -new_n15695_ = OR ( new_n14755_, new_n4963_ ) -new_n15696_ = NAND ( new_n15695_, new_n15694_, new_n15693_, new_n15692_ ) -new_n15697_ = OR ( new_n14759_, new_n4966_ ) -new_n15698_ = OR ( new_n14761_, new_n4968_ ) -new_n15699_ = OR ( new_n14764_, new_n4970_ ) -new_n15700_ = OR ( new_n14766_, new_n4686_ ) -new_n15701_ = NAND ( new_n15700_, new_n15699_, new_n15698_, new_n15697_ ) -new_n15702_ = OR ( new_n14769_, new_n4689_ ) -new_n15703_ = OR ( new_n14771_, new_n4691_ ) -new_n15704_ = OR ( new_n14773_, new_n4693_ ) -new_n15705_ = OR ( new_n14775_, new_n4977_ ) -new_n15706_ = NAND ( new_n15705_, new_n15704_, new_n15703_, new_n15702_ ) -new_n15707_ = NOR ( new_n15706_, new_n15701_, new_n15696_, new_n15691_ ) -new_n15708_ = OR ( new_n15707_, new_n7073_ ) -new_n15709_ = OR ( new_n4697_, new_n4464_ ) -new_n15710_ = NAND ( new_n15709_, new_n15708_, new_n15686_, new_n7051_ ) -new_n15711_ = OR ( new_n15710_, new_n15685_, new_n15663_ ) -new_n15712_ = NAND ( new_n15711_, new_n14637_ ) -new_n15713_ = OR ( new_n15711_, new_n14637_ ) -new_n15714_ = NAND ( new_n15713_, new_n15712_ ) -new_n15715_ = OR ( new_n14631_, new_n12009_ ) -new_n15716_ = OR ( new_n12009_, new_n7073_ ) -new_n15717_ = OR ( new_n14637_, new_n11706_ ) -new_n15718_ = NOT ( NET_1408 ) -new_n15719_ = OR ( new_n14640_, new_n15718_ ) -new_n15720_ = NAND ( new_n14642_, NET_1217 ) -new_n15721_ = AND ( new_n15720_, new_n15719_, new_n15717_ ) -new_n15722_ = NAND ( new_n15721_, new_n15716_, new_n15715_ ) -new_n15723_ = NAND ( new_n15722_, new_n15714_ ) -new_n15724_ = NOT ( new_n15722_ ) -new_n15725_ = NAND ( new_n15724_, new_n15713_, new_n15712_ ) -new_n15726_ = AND ( new_n15725_, new_n15723_ ) -new_n15727_ = NAND ( new_n14873_, new_n14872_, new_n14785_ ) -new_n15728_ = NAND ( new_n15727_, new_n14784_ ) -new_n15729_ = OR ( new_n15728_, new_n15726_ ) -new_n15730_ = NAND ( new_n15728_, new_n15725_, new_n15723_ ) -new_n15731_ = NAND ( new_n15730_, new_n15729_ ) -new_n15732_ = OR ( new_n15731_, new_n14894_ ) -new_n15733_ = OR ( new_n14897_, new_n12009_ ) -new_n15734_ = OR ( new_n14900_, new_n11706_ ) -new_n15735_ = OR ( new_n14902_, new_n11689_ ) -new_n15736_ = OR ( new_n14905_, new_n15718_ ) -new_n15737_ = OR ( new_n14891_, new_n11659_ ) -new_n15738_ = AND ( new_n15737_, new_n15736_, new_n15735_ ) -NET_20911 = NAND ( new_n15738_, new_n15734_, new_n15733_, new_n15732_ ) -new_n15740_ = OR ( new_n15731_, new_n14911_ ) -new_n15741_ = OR ( new_n14913_, new_n12009_ ) -new_n15742_ = OR ( new_n14915_, new_n11706_ ) -new_n15743_ = OR ( new_n14917_, new_n15718_ ) -new_n15744_ = OR ( new_n14910_, new_n11992_ ) -new_n15745_ = AND ( new_n15744_, new_n15743_, new_n15742_ ) -NET_20912 = NAND ( new_n15745_, new_n15741_, new_n15740_ ) -new_n15747_ = OR ( new_n15731_, new_n14928_ ) -new_n15748_ = OR ( new_n14930_, new_n11706_ ) -new_n15749_ = NAND ( new_n14927_, NET_1344 ) -new_n15750_ = NAND ( new_n14933_, new_n6334_ ) -NET_20913 = NAND ( new_n15750_, new_n15749_, new_n15748_, new_n15747_ ) -new_n15752_ = NOT ( NET_1229 ) -new_n15753_ = NOR ( new_n12430_, new_n15752_ ) -new_n15754_ = NOR ( new_n4668_, new_n15752_ ) -new_n15755_ = OR ( new_n15754_, new_n15136_ ) -new_n15756_ = NAND ( new_n15754_, new_n15136_ ) -new_n15757_ = NAND ( new_n15756_, new_n15755_ ) -new_n15758_ = OR ( new_n15757_, new_n7114_ ) -new_n15759_ = NOT ( NET_1388 ) -new_n15760_ = OR ( new_n7112_, new_n15759_ ) -new_n15761_ = NAND ( new_n7015_, NET_1261 ) -new_n15762_ = NAND ( new_n7124_, NET_1356 ) -new_n15763_ = NAND ( new_n15762_, new_n15761_, new_n15760_, new_n15758_ ) -new_n15764_ = NOR ( new_n15763_, new_n15753_ ) -new_n15765_ = OR ( new_n15764_, new_n6196_ ) -new_n15766_ = NAND ( new_n15764_, new_n6196_ ) -new_n15767_ = OR ( new_n13066_, new_n4520_ ) -new_n15768_ = OR ( new_n13068_, new_n4522_ ) -new_n15769_ = OR ( new_n13070_, new_n4524_ ) -new_n15770_ = OR ( new_n13091_, new_n4526_ ) -new_n15771_ = NAND ( new_n15770_, new_n15769_, new_n15768_, new_n15767_ ) -new_n15772_ = OR ( new_n13075_, new_n4529_ ) -new_n15773_ = OR ( new_n13077_, new_n4531_ ) -new_n15774_ = OR ( new_n13079_, new_n4533_ ) -new_n15775_ = OR ( new_n13064_, new_n4535_ ) -new_n15776_ = NAND ( new_n15775_, new_n15774_, new_n15773_, new_n15772_ ) -new_n15777_ = OR ( new_n13084_, new_n4539_ ) -new_n15778_ = OR ( new_n13086_, new_n4541_ ) -new_n15779_ = OR ( new_n13088_, new_n4543_ ) -new_n15780_ = OR ( new_n13073_, new_n4545_ ) -new_n15781_ = NAND ( new_n15780_, new_n15779_, new_n15778_, new_n15777_ ) -new_n15782_ = OR ( new_n13093_, new_n4548_ ) -new_n15783_ = OR ( new_n13095_, new_n4550_ ) -new_n15784_ = OR ( new_n13097_, new_n4552_ ) -new_n15785_ = OR ( new_n13082_, new_n4554_ ) -new_n15786_ = NAND ( new_n15785_, new_n15784_, new_n15783_, new_n15782_ ) -new_n15787_ = NOR ( new_n15786_, new_n15781_, new_n15776_, new_n15771_ ) -new_n15788_ = NOT ( new_n15787_ ) -new_n15789_ = NAND ( new_n15788_, new_n6686_ ) -new_n15790_ = NAND ( new_n15789_, new_n15766_, new_n15765_ ) -new_n15791_ = AND ( new_n15766_, new_n15765_ ) -new_n15792_ = OR ( new_n15791_, new_n15789_ ) -new_n15793_ = NAND ( new_n15792_, new_n15790_ ) -new_n15794_ = NAND ( new_n15172_, new_n15169_ ) -new_n15795_ = NAND ( new_n15794_, new_n15168_ ) -new_n15796_ = XOR ( new_n15795_, new_n15793_ ) -new_n15797_ = OR ( new_n15796_, new_n11859_ ) -new_n15798_ = NAND ( new_n11876_, NET_1229 ) -new_n15799_ = NOT ( NET_1261 ) -new_n15800_ = OR ( new_n7148_, new_n15799_ ) -new_n15801_ = NAND ( new_n6196_, NET_1420 ) -new_n15802_ = NAND ( new_n15801_, new_n15800_, new_n15798_, new_n15797_ ) -new_n15803_ = XNOR ( new_n15802_, new_n7027_ ) -new_n15804_ = NAND ( new_n15803_, new_n15180_, new_n14005_ ) -new_n15805_ = NOT ( new_n15803_ ) -new_n15806_ = NAND ( new_n15805_, new_n15182_ ) -new_n15807_ = NAND ( new_n15806_, new_n15804_ ) -new_n15808_ = OR ( new_n15807_, new_n11851_ ) -new_n15809_ = OR ( new_n15796_, new_n11911_ ) -new_n15810_ = NAND ( new_n11849_, NET_1388 ) -NET_20914 = NAND ( new_n15810_, new_n15809_, new_n15808_ ) -new_n15812_ = NOT ( NET_1230 ) -new_n15813_ = NOR ( new_n12430_, new_n15812_ ) -new_n15814_ = NOT ( new_n15756_ ) -new_n15815_ = NOR ( new_n4668_, new_n15812_ ) -new_n15816_ = OR ( new_n15815_, new_n15814_ ) -new_n15817_ = NAND ( new_n15815_, new_n15814_ ) -new_n15818_ = NAND ( new_n15817_, new_n15816_ ) -new_n15819_ = OR ( new_n15818_, new_n7114_ ) -new_n15820_ = NOT ( NET_1389 ) -new_n15821_ = OR ( new_n7112_, new_n15820_ ) -new_n15822_ = NAND ( new_n7015_, NET_1262 ) -new_n15823_ = NAND ( new_n7124_, NET_1357 ) -new_n15824_ = NAND ( new_n15823_, new_n15822_, new_n15821_, new_n15819_ ) -new_n15825_ = NOR ( new_n15824_, new_n15813_ ) -new_n15826_ = XNOR ( new_n15825_, new_n6196_ ) -new_n15827_ = OR ( new_n13066_, new_n5076_ ) -new_n15828_ = OR ( new_n13068_, new_n5078_ ) -new_n15829_ = OR ( new_n13070_, new_n5080_ ) -new_n15830_ = OR ( new_n13091_, new_n5082_ ) -new_n15831_ = NAND ( new_n15830_, new_n15829_, new_n15828_, new_n15827_ ) -new_n15832_ = OR ( new_n13075_, new_n5085_ ) -new_n15833_ = OR ( new_n13077_, new_n5087_ ) -new_n15834_ = OR ( new_n13079_, new_n5089_ ) -new_n15835_ = OR ( new_n13064_, new_n5091_ ) -new_n15836_ = NAND ( new_n15835_, new_n15834_, new_n15833_, new_n15832_ ) -new_n15837_ = OR ( new_n13084_, new_n5094_ ) -new_n15838_ = OR ( new_n13086_, new_n5096_ ) -new_n15839_ = OR ( new_n13088_, new_n5098_ ) -new_n15840_ = OR ( new_n13073_, new_n5100_ ) -new_n15841_ = NAND ( new_n15840_, new_n15839_, new_n15838_, new_n15837_ ) -new_n15842_ = OR ( new_n13093_, new_n5103_ ) -new_n15843_ = OR ( new_n13095_, new_n5105_ ) -new_n15844_ = OR ( new_n13097_, new_n5107_ ) -new_n15845_ = OR ( new_n13082_, new_n5109_ ) -new_n15846_ = NAND ( new_n15845_, new_n15844_, new_n15843_, new_n15842_ ) -new_n15847_ = NOR ( new_n15846_, new_n15841_, new_n15836_, new_n15831_ ) -new_n15848_ = NOR ( new_n15847_, new_n7114_ ) -new_n15849_ = OR ( new_n15848_, new_n15826_ ) -new_n15850_ = NAND ( new_n15848_, new_n15826_ ) -new_n15851_ = NAND ( new_n15850_, new_n15849_ ) -new_n15852_ = NAND ( new_n15795_, new_n15790_ ) -new_n15853_ = NAND ( new_n15852_, new_n15792_ ) -new_n15854_ = XOR ( new_n15853_, new_n15851_ ) -new_n15855_ = OR ( new_n15854_, new_n11859_ ) -new_n15856_ = NAND ( new_n11876_, NET_1230 ) -new_n15857_ = NOT ( NET_1262 ) -new_n15858_ = OR ( new_n7148_, new_n15857_ ) -new_n15859_ = NAND ( new_n6196_, NET_1421 ) -new_n15860_ = NAND ( new_n15859_, new_n15858_, new_n15856_, new_n15855_ ) -new_n15861_ = XOR ( new_n15860_, new_n7027_ ) -new_n15862_ = OR ( new_n15861_, new_n15804_ ) -new_n15863_ = NAND ( new_n15861_, new_n15804_ ) -new_n15864_ = AND ( new_n15863_, new_n15862_ ) -new_n15865_ = NAND ( new_n15864_, new_n11850_ ) -new_n15866_ = OR ( new_n15854_, new_n11911_ ) -new_n15867_ = NAND ( new_n11849_, NET_1389 ) -NET_20915 = NAND ( new_n15867_, new_n15866_, new_n15865_ ) -new_n15869_ = NOR ( new_n14035_, new_n2985_ ) -new_n15870_ = OR ( new_n14038_, new_n2990_ ) -new_n15871_ = OR ( new_n14040_, new_n2994_ ) -new_n15872_ = OR ( new_n14044_, new_n2997_ ) -new_n15873_ = OR ( new_n14198_, new_n2965_ ) -new_n15874_ = NAND ( new_n15873_, new_n15872_, new_n15871_, new_n15870_ ) -new_n15875_ = OR ( new_n14032_, new_n3011_ ) -new_n15876_ = OR ( new_n14189_, new_n3005_ ) -new_n15877_ = OR ( new_n14185_, new_n3008_ ) -new_n15878_ = OR ( new_n14056_, new_n3018_ ) -new_n15879_ = OR ( new_n14058_, new_n3021_ ) -new_n15880_ = OR ( new_n14195_, new_n3025_ ) -new_n15881_ = OR ( new_n14187_, new_n3001_ ) -new_n15882_ = NAND ( new_n15881_, new_n15880_, new_n15879_, new_n15878_ ) -new_n15883_ = OR ( new_n14200_, new_n2970_ ) -new_n15884_ = OR ( new_n14202_, new_n2974_ ) -new_n15885_ = OR ( new_n14066_, new_n2980_ ) -new_n15886_ = OR ( new_n14054_, new_n3015_ ) -new_n15887_ = NAND ( new_n15886_, new_n15885_, new_n15884_, new_n15883_ ) -new_n15888_ = NOR ( new_n15887_, new_n15882_ ) -new_n15889_ = NAND ( new_n15888_, new_n15877_, new_n15876_, new_n15875_ ) -new_n15890_ = NOR ( new_n15889_, new_n15874_, new_n15869_, new_n14021_ ) -new_n15891_ = OR ( new_n14076_, new_n2965_ ) -new_n15892_ = OR ( new_n14079_, new_n2970_ ) -new_n15893_ = OR ( new_n14082_, new_n2974_ ) -new_n15894_ = OR ( new_n14106_, new_n2980_ ) -new_n15895_ = NAND ( new_n15894_, new_n15893_, new_n15892_, new_n15891_ ) -new_n15896_ = OR ( new_n14088_, new_n2985_ ) -new_n15897_ = OR ( new_n14090_, new_n2990_ ) -new_n15898_ = OR ( new_n14092_, new_n2994_ ) -new_n15899_ = OR ( new_n14073_, new_n2997_ ) -new_n15900_ = NAND ( new_n15899_, new_n15898_, new_n15897_, new_n15896_ ) -new_n15901_ = OR ( new_n14098_, new_n3001_ ) -new_n15902_ = OR ( new_n14100_, new_n3005_ ) -new_n15903_ = OR ( new_n14102_, new_n3008_ ) -new_n15904_ = OR ( new_n14086_, new_n3011_ ) -new_n15905_ = NAND ( new_n15904_, new_n15903_, new_n15902_, new_n15901_ ) -new_n15906_ = OR ( new_n14108_, new_n3015_ ) -new_n15907_ = OR ( new_n14110_, new_n3018_ ) -new_n15908_ = OR ( new_n14112_, new_n3021_ ) -new_n15909_ = OR ( new_n14096_, new_n3025_ ) -new_n15910_ = NAND ( new_n15909_, new_n15908_, new_n15907_, new_n15906_ ) -new_n15911_ = NOR ( new_n15910_, new_n15905_, new_n15900_, new_n15895_ ) -new_n15912_ = OR ( new_n15911_, new_n14013_ ) -new_n15913_ = OR ( new_n14012_, new_n3519_ ) -new_n15914_ = OR ( new_n3208_, new_n2966_ ) -new_n15915_ = OR ( new_n14122_, new_n2965_ ) -new_n15916_ = OR ( new_n14125_, new_n2970_ ) -new_n15917_ = OR ( new_n14127_, new_n2974_ ) -new_n15918_ = OR ( new_n14153_, new_n2980_ ) -new_n15919_ = NAND ( new_n15918_, new_n15917_, new_n15916_, new_n15915_ ) -new_n15920_ = OR ( new_n14135_, new_n2985_ ) -new_n15921_ = OR ( new_n14137_, new_n2990_ ) -new_n15922_ = OR ( new_n14139_, new_n2994_ ) -new_n15923_ = OR ( new_n14119_, new_n2997_ ) -new_n15924_ = NAND ( new_n15923_, new_n15922_, new_n15921_, new_n15920_ ) -new_n15925_ = OR ( new_n14145_, new_n3001_ ) -new_n15926_ = OR ( new_n14148_, new_n3005_ ) -new_n15927_ = OR ( new_n14150_, new_n3008_ ) -new_n15928_ = OR ( new_n14132_, new_n3011_ ) -new_n15929_ = NAND ( new_n15928_, new_n15927_, new_n15926_, new_n15925_ ) -new_n15930_ = OR ( new_n14155_, new_n3015_ ) -new_n15931_ = OR ( new_n14157_, new_n3018_ ) -new_n15932_ = OR ( new_n14159_, new_n3021_ ) -new_n15933_ = OR ( new_n14143_, new_n3025_ ) -new_n15934_ = NAND ( new_n15933_, new_n15932_, new_n15931_, new_n15930_ ) -new_n15935_ = NOR ( new_n15934_, new_n15929_, new_n15924_, new_n15919_ ) -new_n15936_ = OR ( new_n15935_, new_n6753_ ) -new_n15937_ = NAND ( new_n15936_, new_n15914_, new_n15913_, new_n15912_ ) -new_n15938_ = NOR ( new_n15937_, new_n15890_ ) -new_n15939_ = XOR ( new_n15938_, new_n14021_ ) -new_n15940_ = NAND ( new_n14014_, new_n12534_ ) -new_n15941_ = NAND ( new_n12534_, new_n6591_ ) -new_n15942_ = OR ( new_n14021_, new_n11589_ ) -new_n15943_ = NOT ( NET_511 ) -new_n15944_ = OR ( new_n14024_, new_n15943_ ) -new_n15945_ = NAND ( new_n14026_, NET_320 ) -new_n15946_ = AND ( new_n15945_, new_n15944_, new_n15942_ ) -new_n15947_ = NAND ( new_n15946_, new_n15941_, new_n15940_ ) -new_n15948_ = OR ( new_n15947_, new_n15939_ ) -new_n15949_ = NAND ( new_n15947_, new_n15939_ ) -new_n15950_ = NAND ( new_n15949_, new_n15948_ ) -new_n15951_ = NAND ( new_n15274_, new_n15271_ ) -new_n15952_ = NAND ( new_n15951_, new_n15269_ ) -new_n15953_ = XNOR ( new_n15952_, new_n15950_ ) -new_n15954_ = NOT ( new_n15953_ ) -new_n15955_ = NOR ( new_n15954_, new_n14278_ ) -new_n15956_ = NOR ( new_n14281_, new_n12204_ ) -new_n15957_ = OR ( new_n14284_, new_n11589_ ) -new_n15958_ = OR ( new_n14286_, new_n11555_ ) -new_n15959_ = OR ( new_n14289_, new_n15943_ ) -new_n15960_ = OR ( new_n14275_, new_n11551_ ) -new_n15961_ = NAND ( new_n15960_, new_n15959_, new_n15958_, new_n15957_ ) -NET_21072 = OR ( new_n15961_, new_n15956_, new_n15955_ ) -new_n15963_ = NOR ( new_n15954_, new_n14295_ ) -new_n15964_ = OR ( new_n14297_, new_n12204_ ) -new_n15965_ = OR ( new_n14299_, new_n11589_ ) -new_n15966_ = OR ( new_n14301_, new_n15943_ ) -new_n15967_ = OR ( new_n14294_, new_n12194_ ) -new_n15968_ = NAND ( new_n15967_, new_n15966_, new_n15965_, new_n15964_ ) -NET_21073 = OR ( new_n15968_, new_n15963_ ) -new_n15970_ = OR ( new_n15954_, new_n14312_ ) -new_n15971_ = OR ( new_n14314_, new_n11589_ ) -new_n15972_ = NAND ( new_n14311_, NET_447 ) -new_n15973_ = OR ( new_n14317_, new_n5594_ ) -NET_21074 = NAND ( new_n15973_, new_n15972_, new_n15971_, new_n15970_ ) -new_n15975_ = NOR ( new_n14343_, new_n3730_ ) -new_n15976_ = OR ( new_n14346_, new_n3735_ ) -new_n15977_ = OR ( new_n14348_, new_n3739_ ) -new_n15978_ = OR ( new_n14352_, new_n3742_ ) -new_n15979_ = OR ( new_n14506_, new_n3710_ ) -new_n15980_ = NAND ( new_n15979_, new_n15978_, new_n15977_, new_n15976_ ) -new_n15981_ = OR ( new_n14340_, new_n3756_ ) -new_n15982_ = OR ( new_n14497_, new_n3750_ ) -new_n15983_ = OR ( new_n14493_, new_n3753_ ) -new_n15984_ = OR ( new_n14364_, new_n3763_ ) -new_n15985_ = OR ( new_n14366_, new_n3766_ ) -new_n15986_ = OR ( new_n14503_, new_n3770_ ) -new_n15987_ = OR ( new_n14495_, new_n3746_ ) -new_n15988_ = NAND ( new_n15987_, new_n15986_, new_n15985_, new_n15984_ ) -new_n15989_ = OR ( new_n14508_, new_n3715_ ) -new_n15990_ = OR ( new_n14510_, new_n3719_ ) -new_n15991_ = OR ( new_n14374_, new_n3725_ ) -new_n15992_ = OR ( new_n14362_, new_n3760_ ) -new_n15993_ = NAND ( new_n15992_, new_n15991_, new_n15990_, new_n15989_ ) -new_n15994_ = NOR ( new_n15993_, new_n15988_ ) -new_n15995_ = NAND ( new_n15994_, new_n15983_, new_n15982_, new_n15981_ ) -new_n15996_ = NOR ( new_n15995_, new_n15980_, new_n15975_, new_n14329_ ) -new_n15997_ = OR ( new_n14384_, new_n3710_ ) -new_n15998_ = OR ( new_n14387_, new_n3715_ ) -new_n15999_ = OR ( new_n14390_, new_n3719_ ) -new_n16000_ = OR ( new_n14414_, new_n3725_ ) -new_n16001_ = NAND ( new_n16000_, new_n15999_, new_n15998_, new_n15997_ ) -new_n16002_ = OR ( new_n14396_, new_n3730_ ) -new_n16003_ = OR ( new_n14398_, new_n3735_ ) -new_n16004_ = OR ( new_n14400_, new_n3739_ ) -new_n16005_ = OR ( new_n14381_, new_n3742_ ) -new_n16006_ = NAND ( new_n16005_, new_n16004_, new_n16003_, new_n16002_ ) -new_n16007_ = OR ( new_n14406_, new_n3746_ ) -new_n16008_ = OR ( new_n14408_, new_n3750_ ) -new_n16009_ = OR ( new_n14410_, new_n3753_ ) -new_n16010_ = OR ( new_n14394_, new_n3756_ ) -new_n16011_ = NAND ( new_n16010_, new_n16009_, new_n16008_, new_n16007_ ) -new_n16012_ = OR ( new_n14416_, new_n3760_ ) -new_n16013_ = OR ( new_n14418_, new_n3763_ ) -new_n16014_ = OR ( new_n14420_, new_n3766_ ) -new_n16015_ = OR ( new_n14404_, new_n3770_ ) -new_n16016_ = NAND ( new_n16015_, new_n16014_, new_n16013_, new_n16012_ ) -new_n16017_ = NOR ( new_n16016_, new_n16011_, new_n16006_, new_n16001_ ) -new_n16018_ = OR ( new_n16017_, new_n14321_ ) -new_n16019_ = OR ( new_n14320_, new_n4264_ ) -new_n16020_ = OR ( new_n3953_, new_n3711_ ) -new_n16021_ = OR ( new_n14430_, new_n3710_ ) -new_n16022_ = OR ( new_n14433_, new_n3715_ ) -new_n16023_ = OR ( new_n14435_, new_n3719_ ) -new_n16024_ = OR ( new_n14461_, new_n3725_ ) -new_n16025_ = NAND ( new_n16024_, new_n16023_, new_n16022_, new_n16021_ ) -new_n16026_ = OR ( new_n14443_, new_n3730_ ) -new_n16027_ = OR ( new_n14445_, new_n3735_ ) -new_n16028_ = OR ( new_n14447_, new_n3739_ ) -new_n16029_ = OR ( new_n14427_, new_n3742_ ) -new_n16030_ = NAND ( new_n16029_, new_n16028_, new_n16027_, new_n16026_ ) -new_n16031_ = OR ( new_n14453_, new_n3746_ ) -new_n16032_ = OR ( new_n14456_, new_n3750_ ) -new_n16033_ = OR ( new_n14458_, new_n3753_ ) -new_n16034_ = OR ( new_n14440_, new_n3756_ ) -new_n16035_ = NAND ( new_n16034_, new_n16033_, new_n16032_, new_n16031_ ) -new_n16036_ = OR ( new_n14463_, new_n3760_ ) -new_n16037_ = OR ( new_n14465_, new_n3763_ ) -new_n16038_ = OR ( new_n14467_, new_n3766_ ) -new_n16039_ = OR ( new_n14451_, new_n3770_ ) -new_n16040_ = NAND ( new_n16039_, new_n16038_, new_n16037_, new_n16036_ ) -new_n16041_ = NOR ( new_n16040_, new_n16035_, new_n16030_, new_n16025_ ) -new_n16042_ = OR ( new_n16041_, new_n6913_ ) -new_n16043_ = NAND ( new_n16042_, new_n16020_, new_n16019_, new_n16018_ ) -new_n16044_ = NOR ( new_n16043_, new_n15996_ ) -new_n16045_ = XOR ( new_n16044_, new_n14329_ ) -new_n16046_ = NAND ( new_n14322_, new_n12597_ ) -new_n16047_ = NAND ( new_n12597_, new_n6636_ ) -new_n16048_ = OR ( new_n14329_, new_n11645_ ) -new_n16049_ = NOT ( NET_960 ) -new_n16050_ = OR ( new_n14332_, new_n16049_ ) -new_n16051_ = NAND ( new_n14334_, NET_769 ) -new_n16052_ = AND ( new_n16051_, new_n16050_, new_n16048_ ) -new_n16053_ = NAND ( new_n16052_, new_n16047_, new_n16046_ ) -new_n16054_ = OR ( new_n16053_, new_n16045_ ) -new_n16055_ = NAND ( new_n16053_, new_n16045_ ) -new_n16056_ = NAND ( new_n16055_, new_n16054_ ) -new_n16057_ = NAND ( new_n15501_, new_n15498_ ) -new_n16058_ = NAND ( new_n16057_, new_n15496_ ) -new_n16059_ = XNOR ( new_n16058_, new_n16056_ ) -new_n16060_ = NOT ( new_n16059_ ) -new_n16061_ = NOR ( new_n16060_, new_n14586_ ) -new_n16062_ = NOR ( new_n14589_, new_n12238_ ) -new_n16063_ = OR ( new_n14592_, new_n11645_ ) -new_n16064_ = OR ( new_n14594_, new_n11611_ ) -new_n16065_ = OR ( new_n14597_, new_n16049_ ) -new_n16066_ = OR ( new_n14583_, new_n11607_ ) -new_n16067_ = NAND ( new_n16066_, new_n16065_, new_n16064_, new_n16063_ ) -NET_21085 = OR ( new_n16067_, new_n16062_, new_n16061_ ) -new_n16069_ = NOR ( new_n16060_, new_n14603_ ) -new_n16070_ = OR ( new_n14605_, new_n12238_ ) -new_n16071_ = OR ( new_n14607_, new_n11645_ ) -new_n16072_ = OR ( new_n14609_, new_n16049_ ) -new_n16073_ = OR ( new_n14602_, new_n12228_ ) -new_n16074_ = NAND ( new_n16073_, new_n16072_, new_n16071_, new_n16070_ ) -NET_21086 = OR ( new_n16074_, new_n16069_ ) -new_n16076_ = OR ( new_n16060_, new_n14620_ ) -new_n16077_ = OR ( new_n14622_, new_n11645_ ) -new_n16078_ = NAND ( new_n14619_, NET_896 ) -new_n16079_ = NAND ( new_n14625_, new_n5944_ ) -NET_21087 = NAND ( new_n16079_, new_n16078_, new_n16077_, new_n16076_ ) -new_n16081_ = NOR ( new_n14651_, new_n4474_ ) -new_n16082_ = OR ( new_n14654_, new_n4479_ ) -new_n16083_ = OR ( new_n14656_, new_n4483_ ) -new_n16084_ = OR ( new_n14660_, new_n4486_ ) -new_n16085_ = OR ( new_n14814_, new_n4454_ ) -new_n16086_ = NAND ( new_n16085_, new_n16084_, new_n16083_, new_n16082_ ) -new_n16087_ = OR ( new_n14648_, new_n4500_ ) -new_n16088_ = OR ( new_n14805_, new_n4494_ ) -new_n16089_ = OR ( new_n14801_, new_n4497_ ) -new_n16090_ = OR ( new_n14672_, new_n4507_ ) -new_n16091_ = OR ( new_n14674_, new_n4510_ ) -new_n16092_ = OR ( new_n14811_, new_n4514_ ) -new_n16093_ = OR ( new_n14803_, new_n4490_ ) -new_n16094_ = NAND ( new_n16093_, new_n16092_, new_n16091_, new_n16090_ ) -new_n16095_ = OR ( new_n14816_, new_n4459_ ) -new_n16096_ = OR ( new_n14818_, new_n4463_ ) -new_n16097_ = OR ( new_n14682_, new_n4469_ ) -new_n16098_ = OR ( new_n14670_, new_n4504_ ) -new_n16099_ = NAND ( new_n16098_, new_n16097_, new_n16096_, new_n16095_ ) -new_n16100_ = NOR ( new_n16099_, new_n16094_ ) -new_n16101_ = NAND ( new_n16100_, new_n16089_, new_n16088_, new_n16087_ ) -new_n16102_ = NOR ( new_n16101_, new_n16086_, new_n16081_, new_n14637_ ) -new_n16103_ = OR ( new_n14692_, new_n4454_ ) -new_n16104_ = OR ( new_n14695_, new_n4459_ ) -new_n16105_ = OR ( new_n14698_, new_n4463_ ) -new_n16106_ = OR ( new_n14722_, new_n4469_ ) -new_n16107_ = NAND ( new_n16106_, new_n16105_, new_n16104_, new_n16103_ ) -new_n16108_ = OR ( new_n14704_, new_n4474_ ) -new_n16109_ = OR ( new_n14706_, new_n4479_ ) -new_n16110_ = OR ( new_n14708_, new_n4483_ ) -new_n16111_ = OR ( new_n14689_, new_n4486_ ) -new_n16112_ = NAND ( new_n16111_, new_n16110_, new_n16109_, new_n16108_ ) -new_n16113_ = OR ( new_n14714_, new_n4490_ ) -new_n16114_ = OR ( new_n14716_, new_n4494_ ) -new_n16115_ = OR ( new_n14718_, new_n4497_ ) -new_n16116_ = OR ( new_n14702_, new_n4500_ ) -new_n16117_ = NAND ( new_n16116_, new_n16115_, new_n16114_, new_n16113_ ) -new_n16118_ = OR ( new_n14724_, new_n4504_ ) -new_n16119_ = OR ( new_n14726_, new_n4507_ ) -new_n16120_ = OR ( new_n14728_, new_n4510_ ) -new_n16121_ = OR ( new_n14712_, new_n4514_ ) -new_n16122_ = NAND ( new_n16121_, new_n16120_, new_n16119_, new_n16118_ ) -new_n16123_ = NOR ( new_n16122_, new_n16117_, new_n16112_, new_n16107_ ) -new_n16124_ = OR ( new_n16123_, new_n14629_ ) -new_n16125_ = OR ( new_n14628_, new_n5008_ ) -new_n16126_ = OR ( new_n4697_, new_n4455_ ) -new_n16127_ = OR ( new_n14738_, new_n4454_ ) -new_n16128_ = OR ( new_n14741_, new_n4459_ ) -new_n16129_ = OR ( new_n14743_, new_n4463_ ) -new_n16130_ = OR ( new_n14769_, new_n4469_ ) -new_n16131_ = NAND ( new_n16130_, new_n16129_, new_n16128_, new_n16127_ ) -new_n16132_ = OR ( new_n14751_, new_n4474_ ) -new_n16133_ = OR ( new_n14753_, new_n4479_ ) -new_n16134_ = OR ( new_n14755_, new_n4483_ ) -new_n16135_ = OR ( new_n14735_, new_n4486_ ) -new_n16136_ = NAND ( new_n16135_, new_n16134_, new_n16133_, new_n16132_ ) -new_n16137_ = OR ( new_n14761_, new_n4490_ ) -new_n16138_ = OR ( new_n14764_, new_n4494_ ) -new_n16139_ = OR ( new_n14766_, new_n4497_ ) -new_n16140_ = OR ( new_n14748_, new_n4500_ ) -new_n16141_ = NAND ( new_n16140_, new_n16139_, new_n16138_, new_n16137_ ) -new_n16142_ = OR ( new_n14771_, new_n4504_ ) -new_n16143_ = OR ( new_n14773_, new_n4507_ ) -new_n16144_ = OR ( new_n14775_, new_n4510_ ) -new_n16145_ = OR ( new_n14759_, new_n4514_ ) -new_n16146_ = NAND ( new_n16145_, new_n16144_, new_n16143_, new_n16142_ ) -new_n16147_ = NOR ( new_n16146_, new_n16141_, new_n16136_, new_n16131_ ) -new_n16148_ = OR ( new_n16147_, new_n7073_ ) -new_n16149_ = NAND ( new_n16148_, new_n16126_, new_n16125_, new_n16124_ ) -new_n16150_ = NOR ( new_n16149_, new_n16102_ ) -new_n16151_ = XOR ( new_n16150_, new_n14637_ ) -new_n16152_ = NAND ( new_n14630_, new_n12660_ ) -new_n16153_ = NAND ( new_n12660_, new_n6681_ ) -new_n16154_ = OR ( new_n14637_, new_n11701_ ) -new_n16155_ = NOT ( NET_1409 ) -new_n16156_ = OR ( new_n14640_, new_n16155_ ) -new_n16157_ = NAND ( new_n14642_, NET_1218 ) -new_n16158_ = AND ( new_n16157_, new_n16156_, new_n16154_ ) -new_n16159_ = NAND ( new_n16158_, new_n16153_, new_n16152_ ) -new_n16160_ = OR ( new_n16159_, new_n16151_ ) -new_n16161_ = NAND ( new_n16159_, new_n16151_ ) -new_n16162_ = NAND ( new_n16161_, new_n16160_ ) -new_n16163_ = NAND ( new_n15728_, new_n15725_ ) -new_n16164_ = NAND ( new_n16163_, new_n15723_ ) -new_n16165_ = XNOR ( new_n16164_, new_n16162_ ) -new_n16166_ = NOT ( new_n16165_ ) -new_n16167_ = NOR ( new_n16166_, new_n14894_ ) -new_n16168_ = NOR ( new_n14897_, new_n12272_ ) -new_n16169_ = OR ( new_n14900_, new_n11701_ ) -new_n16170_ = OR ( new_n14902_, new_n11667_ ) -new_n16171_ = OR ( new_n14905_, new_n16155_ ) -new_n16172_ = OR ( new_n14891_, new_n11663_ ) -new_n16173_ = NAND ( new_n16172_, new_n16171_, new_n16170_, new_n16169_ ) -NET_21099 = OR ( new_n16173_, new_n16168_, new_n16167_ ) -new_n16175_ = NOR ( new_n16166_, new_n14911_ ) -new_n16176_ = OR ( new_n14913_, new_n12272_ ) -new_n16177_ = OR ( new_n14915_, new_n11701_ ) -new_n16178_ = OR ( new_n14917_, new_n16155_ ) -new_n16179_ = OR ( new_n14910_, new_n12262_ ) -new_n16180_ = NAND ( new_n16179_, new_n16178_, new_n16177_, new_n16176_ ) -NET_21100 = OR ( new_n16180_, new_n16175_ ) -new_n16182_ = OR ( new_n16166_, new_n14928_ ) -new_n16183_ = OR ( new_n14930_, new_n11701_ ) -new_n16184_ = NAND ( new_n14927_, NET_1345 ) -new_n16185_ = NAND ( new_n14933_, new_n6326_ ) -NET_21101 = NAND ( new_n16185_, new_n16184_, new_n16183_, new_n16182_ ) -new_n16187_ = NOR ( new_n14035_, new_n3547_ ) -new_n16188_ = OR ( new_n14038_, new_n3549_ ) -new_n16189_ = OR ( new_n14040_, new_n3551_ ) -new_n16190_ = OR ( new_n14044_, new_n3553_ ) -new_n16191_ = OR ( new_n14198_, new_n3538_ ) -new_n16192_ = NAND ( new_n16191_, new_n16190_, new_n16189_, new_n16188_ ) -new_n16193_ = OR ( new_n14032_, new_n3562_ ) -new_n16194_ = OR ( new_n14189_, new_n3558_ ) -new_n16195_ = OR ( new_n14185_, new_n3560_ ) -new_n16196_ = OR ( new_n14056_, new_n3567_ ) -new_n16197_ = OR ( new_n14058_, new_n3569_ ) -new_n16198_ = OR ( new_n14195_, new_n3571_ ) -new_n16199_ = OR ( new_n14187_, new_n3556_ ) -new_n16200_ = NAND ( new_n16199_, new_n16198_, new_n16197_, new_n16196_ ) -new_n16201_ = OR ( new_n14200_, new_n3540_ ) -new_n16202_ = OR ( new_n14202_, new_n3542_ ) -new_n16203_ = OR ( new_n14066_, new_n3544_ ) -new_n16204_ = OR ( new_n14054_, new_n3565_ ) -new_n16205_ = NAND ( new_n16204_, new_n16203_, new_n16202_, new_n16201_ ) -new_n16206_ = NOR ( new_n16205_, new_n16200_ ) -new_n16207_ = NAND ( new_n16206_, new_n16195_, new_n16194_, new_n16193_ ) -new_n16208_ = NOR ( new_n16207_, new_n16192_, new_n16187_, new_n14021_ ) -new_n16209_ = OR ( new_n14076_, new_n3538_ ) -new_n16210_ = OR ( new_n14079_, new_n3540_ ) -new_n16211_ = OR ( new_n14082_, new_n3542_ ) -new_n16212_ = OR ( new_n14106_, new_n3544_ ) -new_n16213_ = NAND ( new_n16212_, new_n16211_, new_n16210_, new_n16209_ ) -new_n16214_ = OR ( new_n14088_, new_n3547_ ) -new_n16215_ = OR ( new_n14090_, new_n3549_ ) -new_n16216_ = OR ( new_n14092_, new_n3551_ ) -new_n16217_ = OR ( new_n14073_, new_n3553_ ) -new_n16218_ = NAND ( new_n16217_, new_n16216_, new_n16215_, new_n16214_ ) -new_n16219_ = OR ( new_n14098_, new_n3556_ ) -new_n16220_ = OR ( new_n14100_, new_n3558_ ) -new_n16221_ = OR ( new_n14102_, new_n3560_ ) -new_n16222_ = OR ( new_n14086_, new_n3562_ ) -new_n16223_ = NAND ( new_n16222_, new_n16221_, new_n16220_, new_n16219_ ) -new_n16224_ = OR ( new_n14108_, new_n3565_ ) -new_n16225_ = OR ( new_n14110_, new_n3567_ ) -new_n16226_ = OR ( new_n14112_, new_n3569_ ) -new_n16227_ = OR ( new_n14096_, new_n3571_ ) -new_n16228_ = NAND ( new_n16227_, new_n16226_, new_n16225_, new_n16224_ ) -new_n16229_ = NOR ( new_n16228_, new_n16223_, new_n16218_, new_n16213_ ) -new_n16230_ = OR ( new_n16229_, new_n14013_ ) -new_n16231_ = OR ( new_n14012_, new_n3574_ ) -new_n16232_ = OR ( new_n14122_, new_n3538_ ) -new_n16233_ = OR ( new_n14125_, new_n3540_ ) -new_n16234_ = OR ( new_n14127_, new_n3542_ ) -new_n16235_ = OR ( new_n14153_, new_n3544_ ) -new_n16236_ = NAND ( new_n16235_, new_n16234_, new_n16233_, new_n16232_ ) -new_n16237_ = OR ( new_n14135_, new_n3547_ ) -new_n16238_ = OR ( new_n14137_, new_n3549_ ) -new_n16239_ = OR ( new_n14139_, new_n3551_ ) -new_n16240_ = OR ( new_n14119_, new_n3553_ ) -new_n16241_ = NAND ( new_n16240_, new_n16239_, new_n16238_, new_n16237_ ) -new_n16242_ = OR ( new_n14145_, new_n3556_ ) -new_n16243_ = OR ( new_n14148_, new_n3558_ ) -new_n16244_ = OR ( new_n14150_, new_n3560_ ) -new_n16245_ = OR ( new_n14132_, new_n3562_ ) -new_n16246_ = NAND ( new_n16245_, new_n16244_, new_n16243_, new_n16242_ ) -new_n16247_ = OR ( new_n14155_, new_n3565_ ) -new_n16248_ = OR ( new_n14157_, new_n3567_ ) -new_n16249_ = OR ( new_n14159_, new_n3569_ ) -new_n16250_ = OR ( new_n14143_, new_n3571_ ) -new_n16251_ = NAND ( new_n16250_, new_n16249_, new_n16248_, new_n16247_ ) -new_n16252_ = NOR ( new_n16251_, new_n16246_, new_n16241_, new_n16236_ ) -new_n16253_ = OR ( new_n16252_, new_n6753_ ) -new_n16254_ = OR ( new_n3208_, new_n3329_ ) -new_n16255_ = NAND ( new_n16254_, new_n16253_, new_n16231_, new_n16230_ ) -new_n16256_ = NOR ( new_n16255_, new_n16208_ ) -new_n16257_ = XOR ( new_n16256_, new_n14021_ ) -new_n16258_ = NAND ( new_n14014_, new_n12329_ ) -new_n16259_ = NAND ( new_n12329_, new_n6591_ ) -new_n16260_ = OR ( new_n14021_, new_n12309_ ) -new_n16261_ = NOT ( NET_512 ) -new_n16262_ = OR ( new_n14024_, new_n16261_ ) -new_n16263_ = NAND ( new_n14026_, NET_321 ) -new_n16264_ = AND ( new_n16263_, new_n16262_, new_n16260_ ) -new_n16265_ = NAND ( new_n16264_, new_n16259_, new_n16258_ ) -new_n16266_ = OR ( new_n16265_, new_n16257_ ) -new_n16267_ = NAND ( new_n16265_, new_n16257_ ) -new_n16268_ = NAND ( new_n16267_, new_n16266_ ) -new_n16269_ = NAND ( new_n15952_, new_n15948_ ) -new_n16270_ = NAND ( new_n16269_, new_n15949_ ) -new_n16271_ = XNOR ( new_n16270_, new_n16268_ ) -new_n16272_ = NOT ( new_n16271_ ) -new_n16273_ = NOR ( new_n16272_, new_n14278_ ) -new_n16274_ = AND ( new_n14280_, new_n14276_, new_n12329_ ) -new_n16275_ = OR ( new_n14284_, new_n12309_ ) -new_n16276_ = OR ( new_n14286_, new_n12297_ ) -new_n16277_ = OR ( new_n14275_, new_n12293_ ) -new_n16278_ = OR ( new_n14289_, new_n16261_ ) -new_n16279_ = NAND ( new_n16278_, new_n16277_, new_n16276_, new_n16275_ ) -NET_21184 = OR ( new_n16279_, new_n16274_, new_n16273_ ) -new_n16281_ = NOR ( new_n16272_, new_n14295_ ) -new_n16282_ = NOT ( new_n14297_ ) -new_n16283_ = NAND ( new_n16282_, new_n12329_ ) -new_n16284_ = OR ( new_n14299_, new_n12309_ ) -new_n16285_ = OR ( new_n14301_, new_n16261_ ) -new_n16286_ = OR ( new_n14294_, new_n12315_ ) -new_n16287_ = NAND ( new_n16286_, new_n16285_, new_n16284_, new_n16283_ ) -NET_21185 = OR ( new_n16287_, new_n16281_ ) -new_n16289_ = OR ( new_n16272_, new_n14312_ ) -new_n16290_ = OR ( new_n14314_, new_n12309_ ) -new_n16291_ = NAND ( new_n14311_, NET_448 ) -new_n16292_ = OR ( new_n14317_, new_n5589_ ) -NET_21186 = NAND ( new_n16292_, new_n16291_, new_n16290_, new_n16289_ ) -new_n16294_ = NOR ( new_n14343_, new_n4292_ ) -new_n16295_ = OR ( new_n14346_, new_n4294_ ) -new_n16296_ = OR ( new_n14348_, new_n4296_ ) -new_n16297_ = OR ( new_n14352_, new_n4298_ ) -new_n16298_ = OR ( new_n14506_, new_n4283_ ) -new_n16299_ = NAND ( new_n16298_, new_n16297_, new_n16296_, new_n16295_ ) -new_n16300_ = OR ( new_n14340_, new_n4307_ ) -new_n16301_ = OR ( new_n14497_, new_n4303_ ) -new_n16302_ = OR ( new_n14493_, new_n4305_ ) -new_n16303_ = OR ( new_n14364_, new_n4312_ ) -new_n16304_ = OR ( new_n14366_, new_n4314_ ) -new_n16305_ = OR ( new_n14503_, new_n4316_ ) -new_n16306_ = OR ( new_n14495_, new_n4301_ ) -new_n16307_ = NAND ( new_n16306_, new_n16305_, new_n16304_, new_n16303_ ) -new_n16308_ = OR ( new_n14508_, new_n4285_ ) -new_n16309_ = OR ( new_n14510_, new_n4287_ ) -new_n16310_ = OR ( new_n14374_, new_n4289_ ) -new_n16311_ = OR ( new_n14362_, new_n4310_ ) -new_n16312_ = NAND ( new_n16311_, new_n16310_, new_n16309_, new_n16308_ ) -new_n16313_ = NOR ( new_n16312_, new_n16307_ ) -new_n16314_ = NAND ( new_n16313_, new_n16302_, new_n16301_, new_n16300_ ) -new_n16315_ = NOR ( new_n16314_, new_n16299_, new_n16294_, new_n14329_ ) -new_n16316_ = OR ( new_n14384_, new_n4283_ ) -new_n16317_ = OR ( new_n14387_, new_n4285_ ) -new_n16318_ = OR ( new_n14390_, new_n4287_ ) -new_n16319_ = OR ( new_n14414_, new_n4289_ ) -new_n16320_ = NAND ( new_n16319_, new_n16318_, new_n16317_, new_n16316_ ) -new_n16321_ = OR ( new_n14396_, new_n4292_ ) -new_n16322_ = OR ( new_n14398_, new_n4294_ ) -new_n16323_ = OR ( new_n14400_, new_n4296_ ) -new_n16324_ = OR ( new_n14381_, new_n4298_ ) -new_n16325_ = NAND ( new_n16324_, new_n16323_, new_n16322_, new_n16321_ ) -new_n16326_ = OR ( new_n14406_, new_n4301_ ) -new_n16327_ = OR ( new_n14408_, new_n4303_ ) -new_n16328_ = OR ( new_n14410_, new_n4305_ ) -new_n16329_ = OR ( new_n14394_, new_n4307_ ) -new_n16330_ = NAND ( new_n16329_, new_n16328_, new_n16327_, new_n16326_ ) -new_n16331_ = OR ( new_n14416_, new_n4310_ ) -new_n16332_ = OR ( new_n14418_, new_n4312_ ) -new_n16333_ = OR ( new_n14420_, new_n4314_ ) -new_n16334_ = OR ( new_n14404_, new_n4316_ ) -new_n16335_ = NAND ( new_n16334_, new_n16333_, new_n16332_, new_n16331_ ) -new_n16336_ = NOR ( new_n16335_, new_n16330_, new_n16325_, new_n16320_ ) -new_n16337_ = OR ( new_n16336_, new_n14321_ ) -new_n16338_ = OR ( new_n14320_, new_n4319_ ) -new_n16339_ = OR ( new_n14430_, new_n4283_ ) -new_n16340_ = OR ( new_n14433_, new_n4285_ ) -new_n16341_ = OR ( new_n14435_, new_n4287_ ) -new_n16342_ = OR ( new_n14461_, new_n4289_ ) -new_n16343_ = NAND ( new_n16342_, new_n16341_, new_n16340_, new_n16339_ ) -new_n16344_ = OR ( new_n14443_, new_n4292_ ) -new_n16345_ = OR ( new_n14445_, new_n4294_ ) -new_n16346_ = OR ( new_n14447_, new_n4296_ ) -new_n16347_ = OR ( new_n14427_, new_n4298_ ) -new_n16348_ = NAND ( new_n16347_, new_n16346_, new_n16345_, new_n16344_ ) -new_n16349_ = OR ( new_n14453_, new_n4301_ ) -new_n16350_ = OR ( new_n14456_, new_n4303_ ) -new_n16351_ = OR ( new_n14458_, new_n4305_ ) -new_n16352_ = OR ( new_n14440_, new_n4307_ ) -new_n16353_ = NAND ( new_n16352_, new_n16351_, new_n16350_, new_n16349_ ) -new_n16354_ = OR ( new_n14463_, new_n4310_ ) -new_n16355_ = OR ( new_n14465_, new_n4312_ ) -new_n16356_ = OR ( new_n14467_, new_n4314_ ) -new_n16357_ = OR ( new_n14451_, new_n4316_ ) -new_n16358_ = NAND ( new_n16357_, new_n16356_, new_n16355_, new_n16354_ ) -new_n16359_ = NOR ( new_n16358_, new_n16353_, new_n16348_, new_n16343_ ) -new_n16360_ = OR ( new_n16359_, new_n6913_ ) -new_n16361_ = OR ( new_n3953_, new_n4074_ ) -new_n16362_ = NAND ( new_n16361_, new_n16360_, new_n16338_, new_n16337_ ) -new_n16363_ = NOR ( new_n16362_, new_n16315_ ) -new_n16364_ = XOR ( new_n16363_, new_n14329_ ) -new_n16365_ = NAND ( new_n14322_, new_n12397_ ) -new_n16366_ = NAND ( new_n12397_, new_n6636_ ) -new_n16367_ = OR ( new_n14329_, new_n12377_ ) -new_n16368_ = NOT ( NET_961 ) -new_n16369_ = OR ( new_n14332_, new_n16368_ ) -new_n16370_ = NAND ( new_n14334_, NET_770 ) -new_n16371_ = AND ( new_n16370_, new_n16369_, new_n16367_ ) -new_n16372_ = NAND ( new_n16371_, new_n16366_, new_n16365_ ) -new_n16373_ = OR ( new_n16372_, new_n16364_ ) -new_n16374_ = NAND ( new_n16372_, new_n16364_ ) -new_n16375_ = NAND ( new_n16374_, new_n16373_ ) -new_n16376_ = NAND ( new_n16058_, new_n16054_ ) -new_n16377_ = NAND ( new_n16376_, new_n16055_ ) -new_n16378_ = XNOR ( new_n16377_, new_n16375_ ) -new_n16379_ = NOT ( new_n16378_ ) -new_n16380_ = NOR ( new_n16379_, new_n14586_ ) -new_n16381_ = AND ( new_n14588_, new_n14584_, new_n12397_ ) -new_n16382_ = OR ( new_n14592_, new_n12377_ ) -new_n16383_ = OR ( new_n14594_, new_n12365_ ) -new_n16384_ = OR ( new_n14583_, new_n12361_ ) -new_n16385_ = OR ( new_n14597_, new_n16368_ ) -new_n16386_ = NAND ( new_n16385_, new_n16384_, new_n16383_, new_n16382_ ) -NET_21194 = OR ( new_n16386_, new_n16381_, new_n16380_ ) -new_n16388_ = NOR ( new_n16379_, new_n14603_ ) -new_n16389_ = NOT ( new_n14605_ ) -new_n16390_ = NAND ( new_n16389_, new_n12397_ ) -new_n16391_ = OR ( new_n14607_, new_n12377_ ) -new_n16392_ = OR ( new_n14609_, new_n16368_ ) -new_n16393_ = OR ( new_n14602_, new_n12383_ ) -new_n16394_ = NAND ( new_n16393_, new_n16392_, new_n16391_, new_n16390_ ) -NET_21195 = OR ( new_n16394_, new_n16388_ ) -new_n16396_ = OR ( new_n16379_, new_n14620_ ) -new_n16397_ = OR ( new_n14622_, new_n12377_ ) -new_n16398_ = NAND ( new_n14619_, NET_897 ) -new_n16399_ = NAND ( new_n14625_, new_n5937_ ) -NET_21196 = NAND ( new_n16399_, new_n16398_, new_n16397_, new_n16396_ ) -new_n16401_ = NOR ( new_n14651_, new_n5036_ ) -new_n16402_ = OR ( new_n14654_, new_n5038_ ) -new_n16403_ = OR ( new_n14656_, new_n5040_ ) -new_n16404_ = OR ( new_n14660_, new_n5042_ ) -new_n16405_ = OR ( new_n14814_, new_n5027_ ) -new_n16406_ = NAND ( new_n16405_, new_n16404_, new_n16403_, new_n16402_ ) -new_n16407_ = OR ( new_n14648_, new_n5051_ ) -new_n16408_ = OR ( new_n14805_, new_n5047_ ) -new_n16409_ = OR ( new_n14801_, new_n5049_ ) -new_n16410_ = OR ( new_n14672_, new_n5056_ ) -new_n16411_ = OR ( new_n14674_, new_n5058_ ) -new_n16412_ = OR ( new_n14811_, new_n5060_ ) -new_n16413_ = OR ( new_n14803_, new_n5045_ ) -new_n16414_ = NAND ( new_n16413_, new_n16412_, new_n16411_, new_n16410_ ) -new_n16415_ = OR ( new_n14816_, new_n5029_ ) -new_n16416_ = OR ( new_n14818_, new_n5031_ ) -new_n16417_ = OR ( new_n14682_, new_n5033_ ) -new_n16418_ = OR ( new_n14670_, new_n5054_ ) -new_n16419_ = NAND ( new_n16418_, new_n16417_, new_n16416_, new_n16415_ ) -new_n16420_ = NOR ( new_n16419_, new_n16414_ ) -new_n16421_ = NAND ( new_n16420_, new_n16409_, new_n16408_, new_n16407_ ) -new_n16422_ = NOR ( new_n16421_, new_n16406_, new_n16401_, new_n14637_ ) -new_n16423_ = OR ( new_n14692_, new_n5027_ ) -new_n16424_ = OR ( new_n14695_, new_n5029_ ) -new_n16425_ = OR ( new_n14698_, new_n5031_ ) -new_n16426_ = OR ( new_n14722_, new_n5033_ ) -new_n16427_ = NAND ( new_n16426_, new_n16425_, new_n16424_, new_n16423_ ) -new_n16428_ = OR ( new_n14704_, new_n5036_ ) -new_n16429_ = OR ( new_n14706_, new_n5038_ ) -new_n16430_ = OR ( new_n14708_, new_n5040_ ) -new_n16431_ = OR ( new_n14689_, new_n5042_ ) -new_n16432_ = NAND ( new_n16431_, new_n16430_, new_n16429_, new_n16428_ ) -new_n16433_ = OR ( new_n14714_, new_n5045_ ) -new_n16434_ = OR ( new_n14716_, new_n5047_ ) -new_n16435_ = OR ( new_n14718_, new_n5049_ ) -new_n16436_ = OR ( new_n14702_, new_n5051_ ) -new_n16437_ = NAND ( new_n16436_, new_n16435_, new_n16434_, new_n16433_ ) -new_n16438_ = OR ( new_n14724_, new_n5054_ ) -new_n16439_ = OR ( new_n14726_, new_n5056_ ) -new_n16440_ = OR ( new_n14728_, new_n5058_ ) -new_n16441_ = OR ( new_n14712_, new_n5060_ ) -new_n16442_ = NAND ( new_n16441_, new_n16440_, new_n16439_, new_n16438_ ) -new_n16443_ = NOR ( new_n16442_, new_n16437_, new_n16432_, new_n16427_ ) -new_n16444_ = OR ( new_n16443_, new_n14629_ ) -new_n16445_ = OR ( new_n14628_, new_n5063_ ) -new_n16446_ = OR ( new_n14738_, new_n5027_ ) -new_n16447_ = OR ( new_n14741_, new_n5029_ ) -new_n16448_ = OR ( new_n14743_, new_n5031_ ) -new_n16449_ = OR ( new_n14769_, new_n5033_ ) -new_n16450_ = NAND ( new_n16449_, new_n16448_, new_n16447_, new_n16446_ ) -new_n16451_ = OR ( new_n14751_, new_n5036_ ) -new_n16452_ = OR ( new_n14753_, new_n5038_ ) -new_n16453_ = OR ( new_n14755_, new_n5040_ ) -new_n16454_ = OR ( new_n14735_, new_n5042_ ) -new_n16455_ = NAND ( new_n16454_, new_n16453_, new_n16452_, new_n16451_ ) -new_n16456_ = OR ( new_n14761_, new_n5045_ ) -new_n16457_ = OR ( new_n14764_, new_n5047_ ) -new_n16458_ = OR ( new_n14766_, new_n5049_ ) -new_n16459_ = OR ( new_n14748_, new_n5051_ ) -new_n16460_ = NAND ( new_n16459_, new_n16458_, new_n16457_, new_n16456_ ) -new_n16461_ = OR ( new_n14771_, new_n5054_ ) -new_n16462_ = OR ( new_n14773_, new_n5056_ ) -new_n16463_ = OR ( new_n14775_, new_n5058_ ) -new_n16464_ = OR ( new_n14759_, new_n5060_ ) -new_n16465_ = NAND ( new_n16464_, new_n16463_, new_n16462_, new_n16461_ ) -new_n16466_ = NOR ( new_n16465_, new_n16460_, new_n16455_, new_n16450_ ) -new_n16467_ = OR ( new_n16466_, new_n7073_ ) -new_n16468_ = OR ( new_n4697_, new_n4818_ ) -new_n16469_ = NAND ( new_n16468_, new_n16467_, new_n16445_, new_n16444_ ) -new_n16470_ = NOR ( new_n16469_, new_n16422_ ) -new_n16471_ = XOR ( new_n16470_, new_n14637_ ) -new_n16472_ = NAND ( new_n14630_, new_n12465_ ) -new_n16473_ = NAND ( new_n12465_, new_n6681_ ) -new_n16474_ = OR ( new_n14637_, new_n12445_ ) -new_n16475_ = NOT ( NET_1410 ) -new_n16476_ = OR ( new_n14640_, new_n16475_ ) -new_n16477_ = NAND ( new_n14642_, NET_1219 ) -new_n16478_ = AND ( new_n16477_, new_n16476_, new_n16474_ ) -new_n16479_ = NAND ( new_n16478_, new_n16473_, new_n16472_ ) -new_n16480_ = OR ( new_n16479_, new_n16471_ ) -new_n16481_ = NAND ( new_n16479_, new_n16471_ ) -new_n16482_ = NAND ( new_n16481_, new_n16480_ ) -new_n16483_ = NAND ( new_n16164_, new_n16160_ ) -new_n16484_ = NAND ( new_n16483_, new_n16161_ ) -new_n16485_ = XNOR ( new_n16484_, new_n16482_ ) -new_n16486_ = NOT ( new_n16485_ ) -new_n16487_ = NOR ( new_n16486_, new_n14894_ ) -new_n16488_ = AND ( new_n14896_, new_n14892_, new_n12465_ ) -new_n16489_ = OR ( new_n14900_, new_n12445_ ) -new_n16490_ = OR ( new_n14902_, new_n12433_ ) -new_n16491_ = OR ( new_n14891_, new_n12429_ ) -new_n16492_ = OR ( new_n14905_, new_n16475_ ) -new_n16493_ = NAND ( new_n16492_, new_n16491_, new_n16490_, new_n16489_ ) -NET_21204 = OR ( new_n16493_, new_n16488_, new_n16487_ ) -new_n16495_ = NOR ( new_n16486_, new_n14911_ ) -new_n16496_ = NOT ( new_n14913_ ) -new_n16497_ = NAND ( new_n16496_, new_n12465_ ) -new_n16498_ = OR ( new_n14915_, new_n12445_ ) -new_n16499_ = OR ( new_n14917_, new_n16475_ ) -new_n16500_ = OR ( new_n14910_, new_n12451_ ) -new_n16501_ = NAND ( new_n16500_, new_n16499_, new_n16498_, new_n16497_ ) -NET_21205 = OR ( new_n16501_, new_n16495_ ) -new_n16503_ = OR ( new_n16486_, new_n14928_ ) -new_n16504_ = OR ( new_n14930_, new_n12445_ ) -new_n16505_ = NAND ( new_n14927_, NET_1346 ) -new_n16506_ = NAND ( new_n14933_, new_n6318_ ) -NET_21206 = NAND ( new_n16506_, new_n16505_, new_n16504_, new_n16503_ ) -new_n16508_ = NAND ( new_n15399_, new_n15395_ ) -new_n16509_ = NAND ( new_n16508_, new_n15396_ ) -new_n16510_ = NOT ( NET_333 ) -new_n16511_ = NOR ( new_n12294_, new_n16510_ ) -new_n16512_ = NOR ( new_n3179_, new_n16510_ ) -new_n16513_ = XOR ( new_n16512_, new_n15363_ ) -new_n16514_ = OR ( new_n8186_, new_n3151_ ) -new_n16515_ = OR ( new_n8104_, new_n3153_ ) -new_n16516_ = OR ( new_n8021_, new_n3155_ ) -new_n16517_ = OR ( new_n7939_, new_n3409_ ) -new_n16518_ = NAND ( new_n16517_, new_n16516_, new_n16515_, new_n16514_ ) -new_n16519_ = OR ( new_n8516_, new_n3159_ ) -new_n16520_ = OR ( new_n8434_, new_n3413_ ) -new_n16521_ = OR ( new_n8352_, new_n3415_ ) -new_n16522_ = OR ( new_n8270_, new_n3417_ ) -new_n16523_ = NAND ( new_n16522_, new_n16521_, new_n16520_, new_n16519_ ) -new_n16524_ = OR ( new_n7526_, new_n3420_ ) -new_n16525_ = OR ( new_n7441_, new_n3422_ ) -new_n16526_ = OR ( new_n7358_, new_n3424_ ) -new_n16527_ = OR ( new_n7203_, new_n3168_ ) -new_n16528_ = NAND ( new_n16527_, new_n16526_, new_n16525_, new_n16524_ ) -new_n16529_ = OR ( new_n7857_, new_n3171_ ) -new_n16530_ = OR ( new_n7775_, new_n3173_ ) -new_n16531_ = OR ( new_n7693_, new_n3175_ ) -new_n16532_ = OR ( new_n7610_, new_n3431_ ) -new_n16533_ = NAND ( new_n16532_, new_n16531_, new_n16530_, new_n16529_ ) -new_n16534_ = NOR ( new_n16533_, new_n16528_, new_n16523_, new_n16518_ ) -new_n16535_ = NOR ( new_n16534_, new_n3696_ ) -new_n16536_ = XOR ( new_n16535_, new_n16513_ ) -new_n16537_ = OR ( new_n16536_, new_n6794_ ) -new_n16538_ = NOT ( NET_492 ) -new_n16539_ = OR ( new_n6792_, new_n16538_ ) -new_n16540_ = NAND ( new_n6695_, NET_365 ) -new_n16541_ = NAND ( new_n6804_, NET_460 ) -new_n16542_ = NAND ( new_n16541_, new_n16540_, new_n16539_, new_n16537_ ) -new_n16543_ = NOR ( new_n16542_, new_n16511_ ) -new_n16544_ = XNOR ( new_n16543_, new_n5529_ ) -new_n16545_ = XNOR ( new_n16544_, new_n16509_ ) -new_n16546_ = OR ( new_n16545_, new_n11723_ ) -new_n16547_ = NAND ( new_n11740_, NET_333 ) -new_n16548_ = NOT ( NET_365 ) -new_n16549_ = OR ( new_n6828_, new_n16548_ ) -new_n16550_ = NAND ( new_n5529_, NET_524 ) -new_n16551_ = NAND ( new_n16550_, new_n16549_, new_n16547_, new_n16546_ ) -new_n16552_ = XNOR ( new_n16551_, new_n6707_ ) -new_n16553_ = NOR ( new_n14228_, new_n6706_ ) -new_n16554_ = NOR ( new_n16553_, new_n16552_ ) -new_n16555_ = AND ( new_n16553_, new_n16552_ ) -new_n16556_ = NOR ( new_n16555_, new_n16554_ ) -new_n16557_ = XOR ( new_n16556_, new_n15408_ ) -new_n16558_ = OR ( new_n16557_, new_n11715_ ) -new_n16559_ = OR ( new_n16545_, new_n11775_ ) -new_n16560_ = NAND ( new_n11713_, NET_492 ) -NET_21262 = NAND ( new_n16560_, new_n16559_, new_n16558_ ) -new_n16562_ = NAND ( new_n15626_, new_n15622_ ) -new_n16563_ = NAND ( new_n16562_, new_n15623_ ) -new_n16564_ = NOT ( NET_782 ) -new_n16565_ = NOR ( new_n12362_, new_n16564_ ) -new_n16566_ = NOR ( new_n3924_, new_n16564_ ) -new_n16567_ = XOR ( new_n16566_, new_n15590_ ) -new_n16568_ = OR ( new_n9654_, new_n3896_ ) -new_n16569_ = OR ( new_n9572_, new_n3898_ ) -new_n16570_ = OR ( new_n9489_, new_n3900_ ) -new_n16571_ = OR ( new_n9407_, new_n4154_ ) -new_n16572_ = NAND ( new_n16571_, new_n16570_, new_n16569_, new_n16568_ ) -new_n16573_ = OR ( new_n9984_, new_n3904_ ) -new_n16574_ = OR ( new_n9902_, new_n4158_ ) -new_n16575_ = OR ( new_n9820_, new_n4160_ ) -new_n16576_ = OR ( new_n9738_, new_n4162_ ) -new_n16577_ = NAND ( new_n16576_, new_n16575_, new_n16574_, new_n16573_ ) -new_n16578_ = OR ( new_n8994_, new_n4165_ ) -new_n16579_ = OR ( new_n8909_, new_n4167_ ) -new_n16580_ = OR ( new_n8826_, new_n4169_ ) -new_n16581_ = OR ( new_n8633_, new_n3913_ ) -new_n16582_ = NAND ( new_n16581_, new_n16580_, new_n16579_, new_n16578_ ) -new_n16583_ = OR ( new_n9325_, new_n3916_ ) -new_n16584_ = OR ( new_n9243_, new_n3918_ ) -new_n16585_ = OR ( new_n9161_, new_n3920_ ) -new_n16586_ = OR ( new_n9078_, new_n4176_ ) -new_n16587_ = NAND ( new_n16586_, new_n16585_, new_n16584_, new_n16583_ ) -new_n16588_ = NOR ( new_n16587_, new_n16582_, new_n16577_, new_n16572_ ) -new_n16589_ = NOR ( new_n16588_, new_n4441_ ) -new_n16590_ = XOR ( new_n16589_, new_n16567_ ) -new_n16591_ = OR ( new_n16590_, new_n6954_ ) -new_n16592_ = NOT ( NET_941 ) -new_n16593_ = OR ( new_n6952_, new_n16592_ ) -new_n16594_ = NAND ( new_n6855_, NET_814 ) -new_n16595_ = NAND ( new_n6964_, NET_909 ) -new_n16596_ = NAND ( new_n16595_, new_n16594_, new_n16593_, new_n16591_ ) -new_n16597_ = NOR ( new_n16596_, new_n16565_ ) -new_n16598_ = XNOR ( new_n16597_, new_n5827_ ) -new_n16599_ = XNOR ( new_n16598_, new_n16563_ ) -new_n16600_ = OR ( new_n16599_, new_n11791_ ) -new_n16601_ = NAND ( new_n11808_, NET_782 ) -new_n16602_ = NOT ( NET_814 ) -new_n16603_ = OR ( new_n6988_, new_n16602_ ) -new_n16604_ = NAND ( new_n5827_, NET_973 ) -new_n16605_ = NAND ( new_n16604_, new_n16603_, new_n16601_, new_n16600_ ) -new_n16606_ = XNOR ( new_n16605_, new_n6867_ ) -new_n16607_ = NOR ( new_n14536_, new_n6866_ ) -new_n16608_ = NOR ( new_n16607_, new_n16606_ ) -new_n16609_ = AND ( new_n16607_, new_n16606_ ) -new_n16610_ = NOR ( new_n16609_, new_n16608_ ) -new_n16611_ = XOR ( new_n16610_, new_n15635_ ) -new_n16612_ = OR ( new_n16611_, new_n11783_ ) -new_n16613_ = OR ( new_n16599_, new_n11843_ ) -new_n16614_ = NAND ( new_n11781_, NET_941 ) -NET_21285 = NAND ( new_n16614_, new_n16613_, new_n16612_ ) -new_n16616_ = NAND ( new_n15853_, new_n15849_ ) -new_n16617_ = NAND ( new_n16616_, new_n15850_ ) -new_n16618_ = NOT ( NET_1231 ) -new_n16619_ = NOR ( new_n12430_, new_n16618_ ) -new_n16620_ = NOR ( new_n4668_, new_n16618_ ) -new_n16621_ = XOR ( new_n16620_, new_n15817_ ) -new_n16622_ = OR ( new_n11124_, new_n4640_ ) -new_n16623_ = OR ( new_n11042_, new_n4642_ ) -new_n16624_ = OR ( new_n10959_, new_n4644_ ) -new_n16625_ = OR ( new_n10877_, new_n4898_ ) -new_n16626_ = NAND ( new_n16625_, new_n16624_, new_n16623_, new_n16622_ ) -new_n16627_ = OR ( new_n11454_, new_n4648_ ) -new_n16628_ = OR ( new_n11372_, new_n4902_ ) -new_n16629_ = OR ( new_n11290_, new_n4904_ ) -new_n16630_ = OR ( new_n11208_, new_n4906_ ) -new_n16631_ = NAND ( new_n16630_, new_n16629_, new_n16628_, new_n16627_ ) -new_n16632_ = OR ( new_n10464_, new_n4909_ ) -new_n16633_ = OR ( new_n10379_, new_n4911_ ) -new_n16634_ = OR ( new_n10296_, new_n4913_ ) -new_n16635_ = OR ( new_n10101_, new_n4657_ ) -new_n16636_ = NAND ( new_n16635_, new_n16634_, new_n16633_, new_n16632_ ) -new_n16637_ = OR ( new_n10795_, new_n4660_ ) -new_n16638_ = OR ( new_n10713_, new_n4662_ ) -new_n16639_ = OR ( new_n10631_, new_n4664_ ) -new_n16640_ = OR ( new_n10548_, new_n4920_ ) -new_n16641_ = NAND ( new_n16640_, new_n16639_, new_n16638_, new_n16637_ ) -new_n16642_ = NOR ( new_n16641_, new_n16636_, new_n16631_, new_n16626_ ) -new_n16643_ = NOR ( new_n16642_, new_n5185_ ) -new_n16644_ = XOR ( new_n16643_, new_n16621_ ) -new_n16645_ = OR ( new_n16644_, new_n7114_ ) -new_n16646_ = NOT ( NET_1390 ) -new_n16647_ = OR ( new_n7112_, new_n16646_ ) -new_n16648_ = NAND ( new_n7015_, NET_1263 ) -new_n16649_ = NAND ( new_n7124_, NET_1358 ) -new_n16650_ = NAND ( new_n16649_, new_n16648_, new_n16647_, new_n16645_ ) -new_n16651_ = NOR ( new_n16650_, new_n16619_ ) -new_n16652_ = XNOR ( new_n16651_, new_n6196_ ) -new_n16653_ = XNOR ( new_n16652_, new_n16617_ ) -new_n16654_ = OR ( new_n16653_, new_n11859_ ) -new_n16655_ = NAND ( new_n11876_, NET_1231 ) -new_n16656_ = NOT ( NET_1263 ) -new_n16657_ = OR ( new_n7148_, new_n16656_ ) -new_n16658_ = NAND ( new_n6196_, NET_1422 ) -new_n16659_ = NAND ( new_n16658_, new_n16657_, new_n16655_, new_n16654_ ) -new_n16660_ = XNOR ( new_n16659_, new_n7027_ ) -new_n16661_ = NOR ( new_n14844_, new_n7026_ ) -new_n16662_ = NOR ( new_n16661_, new_n16660_ ) -new_n16663_ = AND ( new_n16661_, new_n16660_ ) -new_n16664_ = NOR ( new_n16663_, new_n16662_ ) -new_n16665_ = XOR ( new_n16664_, new_n15862_ ) -new_n16666_ = OR ( new_n16665_, new_n11851_ ) -new_n16667_ = OR ( new_n16653_, new_n11911_ ) -new_n16668_ = NAND ( new_n11849_, NET_1390 ) -NET_21312 = NAND ( new_n16668_, new_n16667_, new_n16666_ ) -new_n16670_ = OR ( new_n14015_, new_n12528_ ) -new_n16671_ = OR ( new_n12528_, new_n6753_ ) -new_n16672_ = OR ( new_n14021_, new_n12515_ ) -new_n16673_ = NOT ( NET_513 ) -new_n16674_ = OR ( new_n14024_, new_n16673_ ) -new_n16675_ = NAND ( new_n14026_, NET_322 ) -new_n16676_ = AND ( new_n16675_, new_n16674_, new_n16672_ ) -new_n16677_ = NAND ( new_n16676_, new_n16671_, new_n16670_ ) -new_n16678_ = NOR ( new_n14035_, new_n3302_ ) -new_n16679_ = OR ( new_n14038_, new_n3304_ ) -new_n16680_ = OR ( new_n14040_, new_n3306_ ) -new_n16681_ = OR ( new_n14044_, new_n3104_ ) -new_n16682_ = OR ( new_n14198_, new_n3093_ ) -new_n16683_ = NAND ( new_n16682_, new_n16681_, new_n16680_, new_n16679_ ) -new_n16684_ = OR ( new_n14032_, new_n3111_ ) -new_n16685_ = OR ( new_n14189_, new_n3312_ ) -new_n16686_ = OR ( new_n14185_, new_n3109_ ) -new_n16687_ = OR ( new_n14056_, new_n3116_ ) -new_n16688_ = OR ( new_n14058_, new_n3319_ ) -new_n16689_ = OR ( new_n14195_, new_n3321_ ) -new_n16690_ = OR ( new_n14187_, new_n3310_ ) -new_n16691_ = NAND ( new_n16690_, new_n16689_, new_n16688_, new_n16687_ ) -new_n16692_ = OR ( new_n14200_, new_n3095_ ) -new_n16693_ = OR ( new_n14202_, new_n3298_ ) -new_n16694_ = OR ( new_n14066_, new_n3098_ ) -new_n16695_ = OR ( new_n14054_, new_n3114_ ) -new_n16696_ = NAND ( new_n16695_, new_n16694_, new_n16693_, new_n16692_ ) -new_n16697_ = NOR ( new_n16696_, new_n16691_ ) -new_n16698_ = NAND ( new_n16697_, new_n16686_, new_n16685_, new_n16684_ ) -new_n16699_ = OR ( new_n16698_, new_n16683_, new_n16678_, new_n14021_ ) -new_n16700_ = OR ( new_n14076_, new_n3093_ ) -new_n16701_ = OR ( new_n14079_, new_n3095_ ) -new_n16702_ = OR ( new_n14082_, new_n3298_ ) -new_n16703_ = OR ( new_n14106_, new_n3098_ ) -new_n16704_ = NAND ( new_n16703_, new_n16702_, new_n16701_, new_n16700_ ) -new_n16705_ = OR ( new_n14088_, new_n3302_ ) -new_n16706_ = OR ( new_n14090_, new_n3304_ ) -new_n16707_ = OR ( new_n14092_, new_n3306_ ) -new_n16708_ = OR ( new_n14073_, new_n3104_ ) -new_n16709_ = NAND ( new_n16708_, new_n16707_, new_n16706_, new_n16705_ ) -new_n16710_ = OR ( new_n14098_, new_n3310_ ) -new_n16711_ = OR ( new_n14100_, new_n3312_ ) -new_n16712_ = OR ( new_n14102_, new_n3109_ ) -new_n16713_ = OR ( new_n14086_, new_n3111_ ) -new_n16714_ = NAND ( new_n16713_, new_n16712_, new_n16711_, new_n16710_ ) -new_n16715_ = OR ( new_n14108_, new_n3114_ ) -new_n16716_ = OR ( new_n14110_, new_n3116_ ) -new_n16717_ = OR ( new_n14112_, new_n3319_ ) -new_n16718_ = OR ( new_n14096_, new_n3321_ ) -new_n16719_ = NAND ( new_n16718_, new_n16717_, new_n16716_, new_n16715_ ) -new_n16720_ = NOR ( new_n16719_, new_n16714_, new_n16709_, new_n16704_ ) -new_n16721_ = OR ( new_n16720_, new_n14013_ ) -new_n16722_ = OR ( new_n14122_, new_n3093_ ) -new_n16723_ = OR ( new_n14125_, new_n3095_ ) -new_n16724_ = OR ( new_n14127_, new_n3298_ ) -new_n16725_ = OR ( new_n14153_, new_n3098_ ) -new_n16726_ = NAND ( new_n16725_, new_n16724_, new_n16723_, new_n16722_ ) -new_n16727_ = OR ( new_n14135_, new_n3302_ ) -new_n16728_ = OR ( new_n14137_, new_n3304_ ) -new_n16729_ = OR ( new_n14139_, new_n3306_ ) -new_n16730_ = OR ( new_n14119_, new_n3104_ ) -new_n16731_ = NAND ( new_n16730_, new_n16729_, new_n16728_, new_n16727_ ) -new_n16732_ = OR ( new_n14145_, new_n3310_ ) -new_n16733_ = OR ( new_n14148_, new_n3312_ ) -new_n16734_ = OR ( new_n14150_, new_n3109_ ) -new_n16735_ = OR ( new_n14132_, new_n3111_ ) -new_n16736_ = NAND ( new_n16735_, new_n16734_, new_n16733_, new_n16732_ ) -new_n16737_ = OR ( new_n14155_, new_n3114_ ) -new_n16738_ = OR ( new_n14157_, new_n3116_ ) -new_n16739_ = OR ( new_n14159_, new_n3319_ ) -new_n16740_ = OR ( new_n14143_, new_n3321_ ) -new_n16741_ = NAND ( new_n16740_, new_n16739_, new_n16738_, new_n16737_ ) -new_n16742_ = NOR ( new_n16741_, new_n16736_, new_n16731_, new_n16726_ ) -new_n16743_ = OR ( new_n16742_, new_n6753_ ) -new_n16744_ = OR ( new_n14012_, new_n3324_ ) -new_n16745_ = NAND ( new_n16744_, new_n16743_, new_n16721_, new_n16699_ ) -new_n16746_ = XNOR ( new_n16745_, new_n14021_ ) -new_n16747_ = NAND ( new_n16746_, new_n16677_ ) -new_n16748_ = OR ( new_n16746_, new_n16677_ ) -new_n16749_ = NAND ( new_n16748_, new_n16747_ ) -new_n16750_ = NAND ( new_n16270_, new_n16266_ ) -new_n16751_ = NAND ( new_n16750_, new_n16267_ ) -new_n16752_ = XNOR ( new_n16751_, new_n16749_ ) -new_n16753_ = NOT ( new_n16752_ ) -new_n16754_ = NOR ( new_n16753_, new_n14278_ ) -new_n16755_ = NOR ( new_n14281_, new_n12528_ ) -new_n16756_ = OR ( new_n14284_, new_n12515_ ) -new_n16757_ = OR ( new_n14286_, new_n12504_ ) -new_n16758_ = OR ( new_n14275_, new_n12498_ ) -new_n16759_ = OR ( new_n14289_, new_n16673_ ) -new_n16760_ = NAND ( new_n16759_, new_n16758_, new_n16757_, new_n16756_ ) -NET_21389 = OR ( new_n16760_, new_n16755_, new_n16754_ ) -new_n16762_ = NOR ( new_n16753_, new_n14295_ ) -new_n16763_ = OR ( new_n14297_, new_n12528_ ) -new_n16764_ = OR ( new_n14299_, new_n12515_ ) -new_n16765_ = OR ( new_n14301_, new_n16673_ ) -new_n16766_ = OR ( new_n14294_, new_n12518_ ) -new_n16767_ = NAND ( new_n16766_, new_n16765_, new_n16764_, new_n16763_ ) -NET_21390 = OR ( new_n16767_, new_n16762_ ) -new_n16769_ = OR ( new_n16753_, new_n14312_ ) -new_n16770_ = OR ( new_n14314_, new_n12515_ ) -new_n16771_ = NAND ( new_n14311_, NET_449 ) -new_n16772_ = OR ( new_n14317_, new_n5584_ ) -NET_21391 = NAND ( new_n16772_, new_n16771_, new_n16770_, new_n16769_ ) -new_n16774_ = NAND ( new_n16544_, new_n16509_ ) -new_n16775_ = NOT ( new_n16774_ ) -new_n16776_ = NOT ( NET_334 ) -new_n16777_ = NOR ( new_n12294_, new_n16776_ ) -new_n16778_ = NOR ( new_n3179_, new_n16776_ ) -new_n16779_ = OR ( new_n8186_, new_n3122_ ) -new_n16780_ = OR ( new_n8104_, new_n3124_ ) -new_n16781_ = OR ( new_n8021_, new_n3126_ ) -new_n16782_ = OR ( new_n7939_, new_n3361_ ) -new_n16783_ = NAND ( new_n16782_, new_n16781_, new_n16780_, new_n16779_ ) -new_n16784_ = OR ( new_n8516_, new_n3130_ ) -new_n16785_ = OR ( new_n8434_, new_n3365_ ) -new_n16786_ = OR ( new_n8352_, new_n3367_ ) -new_n16787_ = OR ( new_n8270_, new_n3369_ ) -new_n16788_ = NAND ( new_n16787_, new_n16786_, new_n16785_, new_n16784_ ) -new_n16789_ = OR ( new_n7526_, new_n3372_ ) -new_n16790_ = OR ( new_n7441_, new_n3374_ ) -new_n16791_ = OR ( new_n7358_, new_n3376_ ) -new_n16792_ = OR ( new_n7203_, new_n3139_ ) -new_n16793_ = NAND ( new_n16792_, new_n16791_, new_n16790_, new_n16789_ ) -new_n16794_ = OR ( new_n7857_, new_n3142_ ) -new_n16795_ = OR ( new_n7775_, new_n3144_ ) -new_n16796_ = OR ( new_n7693_, new_n3146_ ) -new_n16797_ = OR ( new_n7610_, new_n3383_ ) -new_n16798_ = NAND ( new_n16797_, new_n16796_, new_n16795_, new_n16794_ ) -new_n16799_ = NOR ( new_n16798_, new_n16793_, new_n16788_, new_n16783_ ) -new_n16800_ = NOR ( new_n16799_, new_n3696_ ) -new_n16801_ = XOR ( new_n16800_, new_n16778_ ) -new_n16802_ = NAND ( new_n15360_, new_n3696_, NET_333, NET_332 ) -new_n16803_ = XOR ( new_n16802_, new_n16801_ ) -new_n16804_ = OR ( new_n16803_, new_n6794_ ) -new_n16805_ = NOT ( NET_493 ) -new_n16806_ = OR ( new_n6792_, new_n16805_ ) -new_n16807_ = NAND ( new_n6695_, NET_366 ) -new_n16808_ = NAND ( new_n6804_, NET_461 ) -new_n16809_ = NAND ( new_n16808_, new_n16807_, new_n16806_, new_n16804_ ) -new_n16810_ = NOR ( new_n16809_, new_n16777_ ) -new_n16811_ = XNOR ( new_n16810_, new_n5529_ ) -new_n16812_ = NAND ( new_n16811_, new_n16775_ ) -new_n16813_ = OR ( new_n16811_, new_n16775_ ) -new_n16814_ = NAND ( new_n16813_, new_n16812_ ) -new_n16815_ = OR ( new_n16814_, new_n11723_ ) -new_n16816_ = NAND ( new_n11740_, NET_334 ) -new_n16817_ = NOT ( NET_366 ) -new_n16818_ = OR ( new_n6828_, new_n16817_ ) -new_n16819_ = NAND ( new_n5529_, NET_525 ) -new_n16820_ = NAND ( new_n16819_, new_n16818_, new_n16816_, new_n16815_ ) -new_n16821_ = XNOR ( new_n16820_, new_n6707_ ) -new_n16822_ = NOR ( new_n14115_, new_n6706_ ) -new_n16823_ = NOR ( new_n16822_, new_n16821_ ) -new_n16824_ = AND ( new_n16822_, new_n16821_ ) -new_n16825_ = NOR ( new_n16824_, new_n16823_ ) -new_n16826_ = NOR ( new_n16554_, new_n15408_ ) -new_n16827_ = NOR ( new_n16826_, new_n16555_ ) -new_n16828_ = XOR ( new_n16827_, new_n16825_ ) -new_n16829_ = OR ( new_n16828_, new_n11715_ ) -new_n16830_ = OR ( new_n16814_, new_n11775_ ) -new_n16831_ = NAND ( new_n11713_, NET_493 ) -NET_21392 = NAND ( new_n16831_, new_n16830_, new_n16829_ ) -new_n16833_ = OR ( new_n14323_, new_n12591_ ) -new_n16834_ = OR ( new_n12591_, new_n6913_ ) -new_n16835_ = OR ( new_n14329_, new_n12578_ ) -new_n16836_ = NOT ( NET_962 ) -new_n16837_ = OR ( new_n14332_, new_n16836_ ) -new_n16838_ = NAND ( new_n14334_, NET_771 ) -new_n16839_ = AND ( new_n16838_, new_n16837_, new_n16835_ ) -new_n16840_ = NAND ( new_n16839_, new_n16834_, new_n16833_ ) -new_n16841_ = NOR ( new_n14343_, new_n4047_ ) -new_n16842_ = OR ( new_n14346_, new_n4049_ ) -new_n16843_ = OR ( new_n14348_, new_n4051_ ) -new_n16844_ = OR ( new_n14352_, new_n3849_ ) -new_n16845_ = OR ( new_n14506_, new_n3838_ ) -new_n16846_ = NAND ( new_n16845_, new_n16844_, new_n16843_, new_n16842_ ) -new_n16847_ = OR ( new_n14340_, new_n3856_ ) -new_n16848_ = OR ( new_n14497_, new_n4057_ ) -new_n16849_ = OR ( new_n14493_, new_n3854_ ) -new_n16850_ = OR ( new_n14364_, new_n3861_ ) -new_n16851_ = OR ( new_n14366_, new_n4064_ ) -new_n16852_ = OR ( new_n14503_, new_n4066_ ) -new_n16853_ = OR ( new_n14495_, new_n4055_ ) -new_n16854_ = NAND ( new_n16853_, new_n16852_, new_n16851_, new_n16850_ ) -new_n16855_ = OR ( new_n14508_, new_n3840_ ) -new_n16856_ = OR ( new_n14510_, new_n4043_ ) -new_n16857_ = OR ( new_n14374_, new_n3843_ ) -new_n16858_ = OR ( new_n14362_, new_n3859_ ) -new_n16859_ = NAND ( new_n16858_, new_n16857_, new_n16856_, new_n16855_ ) -new_n16860_ = NOR ( new_n16859_, new_n16854_ ) -new_n16861_ = NAND ( new_n16860_, new_n16849_, new_n16848_, new_n16847_ ) -new_n16862_ = OR ( new_n16861_, new_n16846_, new_n16841_, new_n14329_ ) -new_n16863_ = OR ( new_n14384_, new_n3838_ ) -new_n16864_ = OR ( new_n14387_, new_n3840_ ) -new_n16865_ = OR ( new_n14390_, new_n4043_ ) -new_n16866_ = OR ( new_n14414_, new_n3843_ ) -new_n16867_ = NAND ( new_n16866_, new_n16865_, new_n16864_, new_n16863_ ) -new_n16868_ = OR ( new_n14396_, new_n4047_ ) -new_n16869_ = OR ( new_n14398_, new_n4049_ ) -new_n16870_ = OR ( new_n14400_, new_n4051_ ) -new_n16871_ = OR ( new_n14381_, new_n3849_ ) -new_n16872_ = NAND ( new_n16871_, new_n16870_, new_n16869_, new_n16868_ ) -new_n16873_ = OR ( new_n14406_, new_n4055_ ) -new_n16874_ = OR ( new_n14408_, new_n4057_ ) -new_n16875_ = OR ( new_n14410_, new_n3854_ ) -new_n16876_ = OR ( new_n14394_, new_n3856_ ) -new_n16877_ = NAND ( new_n16876_, new_n16875_, new_n16874_, new_n16873_ ) -new_n16878_ = OR ( new_n14416_, new_n3859_ ) -new_n16879_ = OR ( new_n14418_, new_n3861_ ) -new_n16880_ = OR ( new_n14420_, new_n4064_ ) -new_n16881_ = OR ( new_n14404_, new_n4066_ ) -new_n16882_ = NAND ( new_n16881_, new_n16880_, new_n16879_, new_n16878_ ) -new_n16883_ = NOR ( new_n16882_, new_n16877_, new_n16872_, new_n16867_ ) -new_n16884_ = OR ( new_n16883_, new_n14321_ ) -new_n16885_ = OR ( new_n14430_, new_n3838_ ) -new_n16886_ = OR ( new_n14433_, new_n3840_ ) -new_n16887_ = OR ( new_n14435_, new_n4043_ ) -new_n16888_ = OR ( new_n14461_, new_n3843_ ) -new_n16889_ = NAND ( new_n16888_, new_n16887_, new_n16886_, new_n16885_ ) -new_n16890_ = OR ( new_n14443_, new_n4047_ ) -new_n16891_ = OR ( new_n14445_, new_n4049_ ) -new_n16892_ = OR ( new_n14447_, new_n4051_ ) -new_n16893_ = OR ( new_n14427_, new_n3849_ ) -new_n16894_ = NAND ( new_n16893_, new_n16892_, new_n16891_, new_n16890_ ) -new_n16895_ = OR ( new_n14453_, new_n4055_ ) -new_n16896_ = OR ( new_n14456_, new_n4057_ ) -new_n16897_ = OR ( new_n14458_, new_n3854_ ) -new_n16898_ = OR ( new_n14440_, new_n3856_ ) -new_n16899_ = NAND ( new_n16898_, new_n16897_, new_n16896_, new_n16895_ ) -new_n16900_ = OR ( new_n14463_, new_n3859_ ) -new_n16901_ = OR ( new_n14465_, new_n3861_ ) -new_n16902_ = OR ( new_n14467_, new_n4064_ ) -new_n16903_ = OR ( new_n14451_, new_n4066_ ) -new_n16904_ = NAND ( new_n16903_, new_n16902_, new_n16901_, new_n16900_ ) -new_n16905_ = NOR ( new_n16904_, new_n16899_, new_n16894_, new_n16889_ ) -new_n16906_ = OR ( new_n16905_, new_n6913_ ) -new_n16907_ = OR ( new_n14320_, new_n4069_ ) -new_n16908_ = NAND ( new_n16907_, new_n16906_, new_n16884_, new_n16862_ ) -new_n16909_ = XNOR ( new_n16908_, new_n14329_ ) -new_n16910_ = NAND ( new_n16909_, new_n16840_ ) -new_n16911_ = OR ( new_n16909_, new_n16840_ ) -new_n16912_ = NAND ( new_n16911_, new_n16910_ ) -new_n16913_ = NAND ( new_n16377_, new_n16373_ ) -new_n16914_ = NAND ( new_n16913_, new_n16374_ ) -new_n16915_ = XNOR ( new_n16914_, new_n16912_ ) -new_n16916_ = NOT ( new_n16915_ ) -new_n16917_ = NOR ( new_n16916_, new_n14586_ ) -new_n16918_ = NOR ( new_n14589_, new_n12591_ ) -new_n16919_ = OR ( new_n14592_, new_n12578_ ) -new_n16920_ = OR ( new_n14594_, new_n12567_ ) -new_n16921_ = OR ( new_n14583_, new_n12561_ ) -new_n16922_ = OR ( new_n14597_, new_n16836_ ) -new_n16923_ = NAND ( new_n16922_, new_n16921_, new_n16920_, new_n16919_ ) -NET_21401 = OR ( new_n16923_, new_n16918_, new_n16917_ ) -new_n16925_ = NOR ( new_n16916_, new_n14603_ ) -new_n16926_ = OR ( new_n14605_, new_n12591_ ) -new_n16927_ = OR ( new_n14607_, new_n12578_ ) -new_n16928_ = OR ( new_n14609_, new_n16836_ ) -new_n16929_ = OR ( new_n14602_, new_n12581_ ) -new_n16930_ = NAND ( new_n16929_, new_n16928_, new_n16927_, new_n16926_ ) -NET_21402 = OR ( new_n16930_, new_n16925_ ) -new_n16932_ = OR ( new_n16916_, new_n14620_ ) -new_n16933_ = OR ( new_n14622_, new_n12578_ ) -new_n16934_ = NAND ( new_n14619_, NET_898 ) -new_n16935_ = NAND ( new_n14625_, new_n5930_ ) -NET_21403 = NAND ( new_n16935_, new_n16934_, new_n16933_, new_n16932_ ) -new_n16937_ = NAND ( new_n16598_, new_n16563_ ) -new_n16938_ = NOT ( new_n16937_ ) -new_n16939_ = NOT ( NET_783 ) -new_n16940_ = NOR ( new_n12362_, new_n16939_ ) -new_n16941_ = NOR ( new_n3924_, new_n16939_ ) -new_n16942_ = OR ( new_n9654_, new_n3867_ ) -new_n16943_ = OR ( new_n9572_, new_n3869_ ) -new_n16944_ = OR ( new_n9489_, new_n3871_ ) -new_n16945_ = OR ( new_n9407_, new_n4106_ ) -new_n16946_ = NAND ( new_n16945_, new_n16944_, new_n16943_, new_n16942_ ) -new_n16947_ = OR ( new_n9984_, new_n3875_ ) -new_n16948_ = OR ( new_n9902_, new_n4110_ ) -new_n16949_ = OR ( new_n9820_, new_n4112_ ) -new_n16950_ = OR ( new_n9738_, new_n4114_ ) -new_n16951_ = NAND ( new_n16950_, new_n16949_, new_n16948_, new_n16947_ ) -new_n16952_ = OR ( new_n8994_, new_n4117_ ) -new_n16953_ = OR ( new_n8909_, new_n4119_ ) -new_n16954_ = OR ( new_n8826_, new_n4121_ ) -new_n16955_ = OR ( new_n8633_, new_n3884_ ) -new_n16956_ = NAND ( new_n16955_, new_n16954_, new_n16953_, new_n16952_ ) -new_n16957_ = OR ( new_n9325_, new_n3887_ ) -new_n16958_ = OR ( new_n9243_, new_n3889_ ) -new_n16959_ = OR ( new_n9161_, new_n3891_ ) -new_n16960_ = OR ( new_n9078_, new_n4128_ ) -new_n16961_ = NAND ( new_n16960_, new_n16959_, new_n16958_, new_n16957_ ) -new_n16962_ = NOR ( new_n16961_, new_n16956_, new_n16951_, new_n16946_ ) -new_n16963_ = NOR ( new_n16962_, new_n4441_ ) -new_n16964_ = XOR ( new_n16963_, new_n16941_ ) -new_n16965_ = NAND ( new_n15587_, new_n4441_, NET_782, NET_781 ) -new_n16966_ = XOR ( new_n16965_, new_n16964_ ) -new_n16967_ = OR ( new_n16966_, new_n6954_ ) -new_n16968_ = NOT ( NET_942 ) -new_n16969_ = OR ( new_n6952_, new_n16968_ ) -new_n16970_ = NAND ( new_n6855_, NET_815 ) -new_n16971_ = NAND ( new_n6964_, NET_910 ) -new_n16972_ = NAND ( new_n16971_, new_n16970_, new_n16969_, new_n16967_ ) -new_n16973_ = NOR ( new_n16972_, new_n16940_ ) -new_n16974_ = XNOR ( new_n16973_, new_n5827_ ) -new_n16975_ = NAND ( new_n16974_, new_n16938_ ) -new_n16976_ = OR ( new_n16974_, new_n16938_ ) -new_n16977_ = NAND ( new_n16976_, new_n16975_ ) -new_n16978_ = OR ( new_n16977_, new_n11791_ ) -new_n16979_ = NAND ( new_n11808_, NET_783 ) -new_n16980_ = NOT ( NET_815 ) -new_n16981_ = OR ( new_n6988_, new_n16980_ ) -new_n16982_ = NAND ( new_n5827_, NET_974 ) -new_n16983_ = NAND ( new_n16982_, new_n16981_, new_n16979_, new_n16978_ ) -new_n16984_ = XNOR ( new_n16983_, new_n6867_ ) -new_n16985_ = NOR ( new_n14423_, new_n6866_ ) -new_n16986_ = NOR ( new_n16985_, new_n16984_ ) -new_n16987_ = AND ( new_n16985_, new_n16984_ ) -new_n16988_ = NOR ( new_n16987_, new_n16986_ ) -new_n16989_ = NOR ( new_n16608_, new_n15635_ ) -new_n16990_ = NOR ( new_n16989_, new_n16609_ ) -new_n16991_ = XOR ( new_n16990_, new_n16988_ ) -new_n16992_ = OR ( new_n16991_, new_n11783_ ) -new_n16993_ = OR ( new_n16977_, new_n11843_ ) -new_n16994_ = NAND ( new_n11781_, NET_942 ) -NET_21404 = NAND ( new_n16994_, new_n16993_, new_n16992_ ) -new_n16996_ = OR ( new_n14631_, new_n12654_ ) -new_n16997_ = OR ( new_n12654_, new_n7073_ ) -new_n16998_ = OR ( new_n14637_, new_n12641_ ) -new_n16999_ = NOT ( NET_1411 ) -new_n17000_ = OR ( new_n14640_, new_n16999_ ) -new_n17001_ = NAND ( new_n14642_, NET_1220 ) -new_n17002_ = AND ( new_n17001_, new_n17000_, new_n16998_ ) -new_n17003_ = NAND ( new_n17002_, new_n16997_, new_n16996_ ) -new_n17004_ = NOR ( new_n14651_, new_n4791_ ) -new_n17005_ = OR ( new_n14654_, new_n4793_ ) -new_n17006_ = OR ( new_n14656_, new_n4795_ ) -new_n17007_ = OR ( new_n14660_, new_n4593_ ) -new_n17008_ = OR ( new_n14814_, new_n4582_ ) -new_n17009_ = NAND ( new_n17008_, new_n17007_, new_n17006_, new_n17005_ ) -new_n17010_ = OR ( new_n14648_, new_n4600_ ) -new_n17011_ = OR ( new_n14805_, new_n4801_ ) -new_n17012_ = OR ( new_n14801_, new_n4598_ ) -new_n17013_ = OR ( new_n14672_, new_n4605_ ) -new_n17014_ = OR ( new_n14674_, new_n4808_ ) -new_n17015_ = OR ( new_n14811_, new_n4810_ ) -new_n17016_ = OR ( new_n14803_, new_n4799_ ) -new_n17017_ = NAND ( new_n17016_, new_n17015_, new_n17014_, new_n17013_ ) -new_n17018_ = OR ( new_n14816_, new_n4584_ ) -new_n17019_ = OR ( new_n14818_, new_n4787_ ) -new_n17020_ = OR ( new_n14682_, new_n4587_ ) -new_n17021_ = OR ( new_n14670_, new_n4603_ ) -new_n17022_ = NAND ( new_n17021_, new_n17020_, new_n17019_, new_n17018_ ) -new_n17023_ = NOR ( new_n17022_, new_n17017_ ) -new_n17024_ = NAND ( new_n17023_, new_n17012_, new_n17011_, new_n17010_ ) -new_n17025_ = OR ( new_n17024_, new_n17009_, new_n17004_, new_n14637_ ) -new_n17026_ = OR ( new_n14692_, new_n4582_ ) -new_n17027_ = OR ( new_n14695_, new_n4584_ ) -new_n17028_ = OR ( new_n14698_, new_n4787_ ) -new_n17029_ = OR ( new_n14722_, new_n4587_ ) -new_n17030_ = NAND ( new_n17029_, new_n17028_, new_n17027_, new_n17026_ ) -new_n17031_ = OR ( new_n14704_, new_n4791_ ) -new_n17032_ = OR ( new_n14706_, new_n4793_ ) -new_n17033_ = OR ( new_n14708_, new_n4795_ ) -new_n17034_ = OR ( new_n14689_, new_n4593_ ) -new_n17035_ = NAND ( new_n17034_, new_n17033_, new_n17032_, new_n17031_ ) -new_n17036_ = OR ( new_n14714_, new_n4799_ ) -new_n17037_ = OR ( new_n14716_, new_n4801_ ) -new_n17038_ = OR ( new_n14718_, new_n4598_ ) -new_n17039_ = OR ( new_n14702_, new_n4600_ ) -new_n17040_ = NAND ( new_n17039_, new_n17038_, new_n17037_, new_n17036_ ) -new_n17041_ = OR ( new_n14724_, new_n4603_ ) -new_n17042_ = OR ( new_n14726_, new_n4605_ ) -new_n17043_ = OR ( new_n14728_, new_n4808_ ) -new_n17044_ = OR ( new_n14712_, new_n4810_ ) -new_n17045_ = NAND ( new_n17044_, new_n17043_, new_n17042_, new_n17041_ ) -new_n17046_ = NOR ( new_n17045_, new_n17040_, new_n17035_, new_n17030_ ) -new_n17047_ = OR ( new_n17046_, new_n14629_ ) -new_n17048_ = OR ( new_n14738_, new_n4582_ ) -new_n17049_ = OR ( new_n14741_, new_n4584_ ) -new_n17050_ = OR ( new_n14743_, new_n4787_ ) -new_n17051_ = OR ( new_n14769_, new_n4587_ ) -new_n17052_ = NAND ( new_n17051_, new_n17050_, new_n17049_, new_n17048_ ) -new_n17053_ = OR ( new_n14751_, new_n4791_ ) -new_n17054_ = OR ( new_n14753_, new_n4793_ ) -new_n17055_ = OR ( new_n14755_, new_n4795_ ) -new_n17056_ = OR ( new_n14735_, new_n4593_ ) -new_n17057_ = NAND ( new_n17056_, new_n17055_, new_n17054_, new_n17053_ ) -new_n17058_ = OR ( new_n14761_, new_n4799_ ) -new_n17059_ = OR ( new_n14764_, new_n4801_ ) -new_n17060_ = OR ( new_n14766_, new_n4598_ ) -new_n17061_ = OR ( new_n14748_, new_n4600_ ) -new_n17062_ = NAND ( new_n17061_, new_n17060_, new_n17059_, new_n17058_ ) -new_n17063_ = OR ( new_n14771_, new_n4603_ ) -new_n17064_ = OR ( new_n14773_, new_n4605_ ) -new_n17065_ = OR ( new_n14775_, new_n4808_ ) -new_n17066_ = OR ( new_n14759_, new_n4810_ ) -new_n17067_ = NAND ( new_n17066_, new_n17065_, new_n17064_, new_n17063_ ) -new_n17068_ = NOR ( new_n17067_, new_n17062_, new_n17057_, new_n17052_ ) -new_n17069_ = OR ( new_n17068_, new_n7073_ ) -new_n17070_ = OR ( new_n14628_, new_n4813_ ) -new_n17071_ = NAND ( new_n17070_, new_n17069_, new_n17047_, new_n17025_ ) -new_n17072_ = XNOR ( new_n17071_, new_n14637_ ) -new_n17073_ = NAND ( new_n17072_, new_n17003_ ) -new_n17074_ = OR ( new_n17072_, new_n17003_ ) -new_n17075_ = NAND ( new_n17074_, new_n17073_ ) -new_n17076_ = NAND ( new_n16484_, new_n16480_ ) -new_n17077_ = NAND ( new_n17076_, new_n16481_ ) -new_n17078_ = XNOR ( new_n17077_, new_n17075_ ) -new_n17079_ = NOT ( new_n17078_ ) -new_n17080_ = NOR ( new_n17079_, new_n14894_ ) -new_n17081_ = NOR ( new_n14897_, new_n12654_ ) -new_n17082_ = OR ( new_n14900_, new_n12641_ ) -new_n17083_ = OR ( new_n14902_, new_n12630_ ) -new_n17084_ = OR ( new_n14891_, new_n12624_ ) -new_n17085_ = OR ( new_n14905_, new_n16999_ ) -new_n17086_ = NAND ( new_n17085_, new_n17084_, new_n17083_, new_n17082_ ) -NET_21414 = OR ( new_n17086_, new_n17081_, new_n17080_ ) -new_n17088_ = NOR ( new_n17079_, new_n14911_ ) -new_n17089_ = OR ( new_n14913_, new_n12654_ ) -new_n17090_ = OR ( new_n14915_, new_n12641_ ) -new_n17091_ = OR ( new_n14917_, new_n16999_ ) -new_n17092_ = OR ( new_n14910_, new_n12644_ ) -new_n17093_ = NAND ( new_n17092_, new_n17091_, new_n17090_, new_n17089_ ) -NET_21415 = OR ( new_n17093_, new_n17088_ ) -new_n17095_ = OR ( new_n17079_, new_n14928_ ) -new_n17096_ = OR ( new_n14930_, new_n12641_ ) -new_n17097_ = NAND ( new_n14927_, NET_1347 ) -new_n17098_ = NAND ( new_n14933_, new_n6310_ ) -NET_21416 = NAND ( new_n17098_, new_n17097_, new_n17096_, new_n17095_ ) -new_n17100_ = NAND ( new_n16652_, new_n16617_ ) -new_n17101_ = NOT ( new_n17100_ ) -new_n17102_ = NOT ( NET_1232 ) -new_n17103_ = NOR ( new_n12430_, new_n17102_ ) -new_n17104_ = NOR ( new_n4668_, new_n17102_ ) -new_n17105_ = OR ( new_n11124_, new_n4611_ ) -new_n17106_ = OR ( new_n11042_, new_n4613_ ) -new_n17107_ = OR ( new_n10959_, new_n4615_ ) -new_n17108_ = OR ( new_n10877_, new_n4850_ ) -new_n17109_ = NAND ( new_n17108_, new_n17107_, new_n17106_, new_n17105_ ) -new_n17110_ = OR ( new_n11454_, new_n4619_ ) -new_n17111_ = OR ( new_n11372_, new_n4854_ ) -new_n17112_ = OR ( new_n11290_, new_n4856_ ) -new_n17113_ = OR ( new_n11208_, new_n4858_ ) -new_n17114_ = NAND ( new_n17113_, new_n17112_, new_n17111_, new_n17110_ ) -new_n17115_ = OR ( new_n10464_, new_n4861_ ) -new_n17116_ = OR ( new_n10379_, new_n4863_ ) -new_n17117_ = OR ( new_n10296_, new_n4865_ ) -new_n17118_ = OR ( new_n10101_, new_n4628_ ) -new_n17119_ = NAND ( new_n17118_, new_n17117_, new_n17116_, new_n17115_ ) -new_n17120_ = OR ( new_n10795_, new_n4631_ ) -new_n17121_ = OR ( new_n10713_, new_n4633_ ) -new_n17122_ = OR ( new_n10631_, new_n4635_ ) -new_n17123_ = OR ( new_n10548_, new_n4872_ ) -new_n17124_ = NAND ( new_n17123_, new_n17122_, new_n17121_, new_n17120_ ) -new_n17125_ = NOR ( new_n17124_, new_n17119_, new_n17114_, new_n17109_ ) -new_n17126_ = NOR ( new_n17125_, new_n5185_ ) -new_n17127_ = XOR ( new_n17126_, new_n17104_ ) -new_n17128_ = NAND ( new_n15814_, new_n5185_, NET_1231, NET_1230 ) -new_n17129_ = XOR ( new_n17128_, new_n17127_ ) -new_n17130_ = OR ( new_n17129_, new_n7114_ ) -new_n17131_ = NOT ( NET_1391 ) -new_n17132_ = OR ( new_n7112_, new_n17131_ ) -new_n17133_ = NAND ( new_n7015_, NET_1264 ) -new_n17134_ = NAND ( new_n7124_, NET_1359 ) -new_n17135_ = NAND ( new_n17134_, new_n17133_, new_n17132_, new_n17130_ ) -new_n17136_ = NOR ( new_n17135_, new_n17103_ ) -new_n17137_ = XNOR ( new_n17136_, new_n6196_ ) -new_n17138_ = NAND ( new_n17137_, new_n17101_ ) -new_n17139_ = OR ( new_n17137_, new_n17101_ ) -new_n17140_ = NAND ( new_n17139_, new_n17138_ ) -new_n17141_ = OR ( new_n17140_, new_n11859_ ) -new_n17142_ = NAND ( new_n11876_, NET_1232 ) -new_n17143_ = NOT ( NET_1264 ) -new_n17144_ = OR ( new_n7148_, new_n17143_ ) -new_n17145_ = NAND ( new_n6196_, NET_1423 ) -new_n17146_ = NAND ( new_n17145_, new_n17144_, new_n17142_, new_n17141_ ) -new_n17147_ = XNOR ( new_n17146_, new_n7027_ ) -new_n17148_ = NOR ( new_n14731_, new_n7026_ ) -new_n17149_ = NOR ( new_n17148_, new_n17147_ ) -new_n17150_ = AND ( new_n17148_, new_n17147_ ) -new_n17151_ = NOR ( new_n17150_, new_n17149_ ) -new_n17152_ = NOR ( new_n16662_, new_n15862_ ) -new_n17153_ = NOR ( new_n17152_, new_n16663_ ) -new_n17154_ = XOR ( new_n17153_, new_n17151_ ) -new_n17155_ = OR ( new_n17154_, new_n11851_ ) -new_n17156_ = OR ( new_n17140_, new_n11911_ ) -new_n17157_ = NAND ( new_n11849_, NET_1391 ) -NET_21417 = NAND ( new_n17157_, new_n17156_, new_n17155_ ) -new_n17159_ = NOT ( NET_335 ) -new_n17160_ = NOR ( new_n12294_, new_n17159_ ) -new_n17161_ = NOR ( new_n3179_, new_n17159_ ) -new_n17162_ = OR ( new_n8186_, new_n3180_ ) -new_n17163_ = OR ( new_n8104_, new_n3182_ ) -new_n17164_ = OR ( new_n8021_, new_n3184_ ) -new_n17165_ = OR ( new_n7939_, new_n3466_ ) -new_n17166_ = NAND ( new_n17165_, new_n17164_, new_n17163_, new_n17162_ ) -new_n17167_ = OR ( new_n8516_, new_n3188_ ) -new_n17168_ = OR ( new_n8434_, new_n3470_ ) -new_n17169_ = OR ( new_n8352_, new_n3472_ ) -new_n17170_ = OR ( new_n8270_, new_n3474_ ) -new_n17171_ = NAND ( new_n17170_, new_n17169_, new_n17168_, new_n17167_ ) -new_n17172_ = OR ( new_n7526_, new_n3477_ ) -new_n17173_ = OR ( new_n7441_, new_n3479_ ) -new_n17174_ = OR ( new_n7358_, new_n3481_ ) -new_n17175_ = OR ( new_n7203_, new_n3197_ ) -new_n17176_ = NAND ( new_n17175_, new_n17174_, new_n17173_, new_n17172_ ) -new_n17177_ = OR ( new_n7857_, new_n3200_ ) -new_n17178_ = OR ( new_n7775_, new_n3202_ ) -new_n17179_ = OR ( new_n7693_, new_n3204_ ) -new_n17180_ = OR ( new_n7610_, new_n3488_ ) -new_n17181_ = NAND ( new_n17180_, new_n17179_, new_n17178_, new_n17177_ ) -new_n17182_ = NOR ( new_n17181_, new_n17176_, new_n17171_, new_n17166_ ) -new_n17183_ = NOR ( new_n17182_, new_n3696_ ) -new_n17184_ = XNOR ( new_n17183_, new_n17161_ ) -new_n17185_ = NOT ( new_n16800_ ) -new_n17186_ = NAND ( new_n16802_, new_n17185_ ) -new_n17187_ = NAND ( new_n17186_, new_n16778_ ) -new_n17188_ = OR ( new_n16802_, new_n17185_ ) -new_n17189_ = NAND ( new_n17188_, new_n17187_ ) -new_n17190_ = XOR ( new_n17189_, new_n17184_ ) -new_n17191_ = OR ( new_n17190_, new_n6794_ ) -new_n17192_ = NOT ( NET_494 ) -new_n17193_ = OR ( new_n6792_, new_n17192_ ) -new_n17194_ = NAND ( new_n6695_, NET_367 ) -new_n17195_ = NAND ( new_n6804_, NET_462 ) -new_n17196_ = NAND ( new_n17195_, new_n17194_, new_n17193_, new_n17191_ ) -new_n17197_ = NOR ( new_n17196_, new_n17160_ ) -new_n17198_ = XNOR ( new_n17197_, new_n5529_ ) -new_n17199_ = XOR ( new_n17198_, new_n16812_ ) -new_n17200_ = OR ( new_n17199_, new_n11723_ ) -new_n17201_ = NAND ( new_n11740_, NET_335 ) -new_n17202_ = NOT ( NET_367 ) -new_n17203_ = OR ( new_n6828_, new_n17202_ ) -new_n17204_ = NAND ( new_n5529_, NET_526 ) -new_n17205_ = NAND ( new_n17204_, new_n17203_, new_n17201_, new_n17200_ ) -new_n17206_ = XNOR ( new_n17205_, new_n6707_ ) -new_n17207_ = NOR ( new_n15230_, new_n6706_ ) -new_n17208_ = NOR ( new_n17207_, new_n17206_ ) -new_n17209_ = AND ( new_n17207_, new_n17206_ ) -new_n17210_ = NOR ( new_n17209_, new_n17208_ ) -new_n17211_ = NOR ( new_n16827_, new_n16823_ ) -new_n17212_ = NOR ( new_n17211_, new_n16824_ ) -new_n17213_ = XOR ( new_n17212_, new_n17210_ ) -new_n17214_ = OR ( new_n17213_, new_n11715_ ) -new_n17215_ = OR ( new_n17199_, new_n11775_ ) -new_n17216_ = NAND ( new_n11713_, NET_494 ) -NET_21471 = NAND ( new_n17216_, new_n17215_, new_n17214_ ) -new_n17218_ = NOT ( NET_784 ) -new_n17219_ = NOR ( new_n12362_, new_n17218_ ) -new_n17220_ = NOR ( new_n3924_, new_n17218_ ) -new_n17221_ = OR ( new_n9654_, new_n3925_ ) -new_n17222_ = OR ( new_n9572_, new_n3927_ ) -new_n17223_ = OR ( new_n9489_, new_n3929_ ) -new_n17224_ = OR ( new_n9407_, new_n4211_ ) -new_n17225_ = NAND ( new_n17224_, new_n17223_, new_n17222_, new_n17221_ ) -new_n17226_ = OR ( new_n9984_, new_n3933_ ) -new_n17227_ = OR ( new_n9902_, new_n4215_ ) -new_n17228_ = OR ( new_n9820_, new_n4217_ ) -new_n17229_ = OR ( new_n9738_, new_n4219_ ) -new_n17230_ = NAND ( new_n17229_, new_n17228_, new_n17227_, new_n17226_ ) -new_n17231_ = OR ( new_n8994_, new_n4222_ ) -new_n17232_ = OR ( new_n8909_, new_n4224_ ) -new_n17233_ = OR ( new_n8826_, new_n4226_ ) -new_n17234_ = OR ( new_n8633_, new_n3942_ ) -new_n17235_ = NAND ( new_n17234_, new_n17233_, new_n17232_, new_n17231_ ) -new_n17236_ = OR ( new_n9325_, new_n3945_ ) -new_n17237_ = OR ( new_n9243_, new_n3947_ ) -new_n17238_ = OR ( new_n9161_, new_n3949_ ) -new_n17239_ = OR ( new_n9078_, new_n4233_ ) -new_n17240_ = NAND ( new_n17239_, new_n17238_, new_n17237_, new_n17236_ ) -new_n17241_ = NOR ( new_n17240_, new_n17235_, new_n17230_, new_n17225_ ) -new_n17242_ = NOR ( new_n17241_, new_n4441_ ) -new_n17243_ = XNOR ( new_n17242_, new_n17220_ ) -new_n17244_ = NOT ( new_n16963_ ) -new_n17245_ = NAND ( new_n16965_, new_n17244_ ) -new_n17246_ = NAND ( new_n17245_, new_n16941_ ) -new_n17247_ = OR ( new_n16965_, new_n17244_ ) -new_n17248_ = NAND ( new_n17247_, new_n17246_ ) -new_n17249_ = XOR ( new_n17248_, new_n17243_ ) -new_n17250_ = OR ( new_n17249_, new_n6954_ ) -new_n17251_ = NOT ( NET_943 ) -new_n17252_ = OR ( new_n6952_, new_n17251_ ) -new_n17253_ = NAND ( new_n6855_, NET_816 ) -new_n17254_ = NAND ( new_n6964_, NET_911 ) -new_n17255_ = NAND ( new_n17254_, new_n17253_, new_n17252_, new_n17250_ ) -new_n17256_ = NOR ( new_n17255_, new_n17219_ ) -new_n17257_ = XNOR ( new_n17256_, new_n5827_ ) -new_n17258_ = XOR ( new_n17257_, new_n16975_ ) -new_n17259_ = OR ( new_n17258_, new_n11791_ ) -new_n17260_ = NAND ( new_n11808_, NET_784 ) -new_n17261_ = NOT ( NET_816 ) -new_n17262_ = OR ( new_n6988_, new_n17261_ ) -new_n17263_ = NAND ( new_n5827_, NET_975 ) -new_n17264_ = NAND ( new_n17263_, new_n17262_, new_n17260_, new_n17259_ ) -new_n17265_ = XNOR ( new_n17264_, new_n6867_ ) -new_n17266_ = NOR ( new_n15457_, new_n6866_ ) -new_n17267_ = NOR ( new_n17266_, new_n17265_ ) -new_n17268_ = AND ( new_n17266_, new_n17265_ ) -new_n17269_ = NOR ( new_n17268_, new_n17267_ ) -new_n17270_ = NOR ( new_n16990_, new_n16986_ ) -new_n17271_ = NOR ( new_n17270_, new_n16987_ ) -new_n17272_ = XOR ( new_n17271_, new_n17269_ ) -new_n17273_ = OR ( new_n17272_, new_n11783_ ) -new_n17274_ = OR ( new_n17258_, new_n11843_ ) -new_n17275_ = NAND ( new_n11781_, NET_943 ) -NET_21480 = NAND ( new_n17275_, new_n17274_, new_n17273_ ) -new_n17277_ = NOT ( NET_1233 ) -new_n17278_ = NOR ( new_n12430_, new_n17277_ ) -new_n17279_ = NOR ( new_n4668_, new_n17277_ ) -new_n17280_ = OR ( new_n11124_, new_n4669_ ) -new_n17281_ = OR ( new_n11042_, new_n4671_ ) -new_n17282_ = OR ( new_n10959_, new_n4673_ ) -new_n17283_ = OR ( new_n10877_, new_n4955_ ) -new_n17284_ = NAND ( new_n17283_, new_n17282_, new_n17281_, new_n17280_ ) -new_n17285_ = OR ( new_n11454_, new_n4677_ ) -new_n17286_ = OR ( new_n11372_, new_n4959_ ) -new_n17287_ = OR ( new_n11290_, new_n4961_ ) -new_n17288_ = OR ( new_n11208_, new_n4963_ ) -new_n17289_ = NAND ( new_n17288_, new_n17287_, new_n17286_, new_n17285_ ) -new_n17290_ = OR ( new_n10464_, new_n4966_ ) -new_n17291_ = OR ( new_n10379_, new_n4968_ ) -new_n17292_ = OR ( new_n10296_, new_n4970_ ) -new_n17293_ = OR ( new_n10101_, new_n4686_ ) -new_n17294_ = NAND ( new_n17293_, new_n17292_, new_n17291_, new_n17290_ ) -new_n17295_ = OR ( new_n10795_, new_n4689_ ) -new_n17296_ = OR ( new_n10713_, new_n4691_ ) -new_n17297_ = OR ( new_n10631_, new_n4693_ ) -new_n17298_ = OR ( new_n10548_, new_n4977_ ) -new_n17299_ = NAND ( new_n17298_, new_n17297_, new_n17296_, new_n17295_ ) -new_n17300_ = NOR ( new_n17299_, new_n17294_, new_n17289_, new_n17284_ ) -new_n17301_ = NOR ( new_n17300_, new_n5185_ ) -new_n17302_ = XNOR ( new_n17301_, new_n17279_ ) -new_n17303_ = NOT ( new_n17126_ ) -new_n17304_ = NAND ( new_n17128_, new_n17303_ ) -new_n17305_ = NAND ( new_n17304_, new_n17104_ ) -new_n17306_ = OR ( new_n17128_, new_n17303_ ) -new_n17307_ = NAND ( new_n17306_, new_n17305_ ) -new_n17308_ = XOR ( new_n17307_, new_n17302_ ) -new_n17309_ = OR ( new_n17308_, new_n7114_ ) -new_n17310_ = NOT ( NET_1392 ) -new_n17311_ = OR ( new_n7112_, new_n17310_ ) -new_n17312_ = NAND ( new_n7015_, NET_1265 ) -new_n17313_ = NAND ( new_n7124_, NET_1360 ) -new_n17314_ = NAND ( new_n17313_, new_n17312_, new_n17311_, new_n17309_ ) -new_n17315_ = NOR ( new_n17314_, new_n17278_ ) -new_n17316_ = XNOR ( new_n17315_, new_n6196_ ) -new_n17317_ = XOR ( new_n17316_, new_n17138_ ) -new_n17318_ = OR ( new_n17317_, new_n11859_ ) -new_n17319_ = NAND ( new_n11876_, NET_1233 ) -new_n17320_ = NOT ( NET_1265 ) -new_n17321_ = OR ( new_n7148_, new_n17320_ ) -new_n17322_ = NAND ( new_n6196_, NET_1424 ) -new_n17323_ = NAND ( new_n17322_, new_n17321_, new_n17319_, new_n17318_ ) -new_n17324_ = XNOR ( new_n17323_, new_n7027_ ) -new_n17325_ = NOR ( new_n15684_, new_n7026_ ) -new_n17326_ = NOR ( new_n17325_, new_n17324_ ) -new_n17327_ = AND ( new_n17325_, new_n17324_ ) -new_n17328_ = NOR ( new_n17327_, new_n17326_ ) -new_n17329_ = NOR ( new_n17153_, new_n17149_ ) -new_n17330_ = NOR ( new_n17329_, new_n17150_ ) -new_n17331_ = XOR ( new_n17330_, new_n17328_ ) -new_n17332_ = OR ( new_n17331_, new_n11851_ ) -new_n17333_ = OR ( new_n17317_, new_n11911_ ) -new_n17334_ = NAND ( new_n11849_, NET_1392 ) -NET_21489 = NAND ( new_n17334_, new_n17333_, new_n17332_ ) -new_n17336_ = NOR ( new_n14035_, new_n3040_ ) -new_n17337_ = OR ( new_n14038_, new_n3042_ ) -new_n17338_ = OR ( new_n14040_, new_n3044_ ) -new_n17339_ = OR ( new_n14044_, new_n3046_ ) -new_n17340_ = OR ( new_n14198_, new_n3031_ ) -new_n17341_ = NAND ( new_n17340_, new_n17339_, new_n17338_, new_n17337_ ) -new_n17342_ = OR ( new_n14032_, new_n3056_ ) -new_n17343_ = OR ( new_n14189_, new_n3052_ ) -new_n17344_ = OR ( new_n14185_, new_n3054_ ) -new_n17345_ = OR ( new_n14056_, new_n3061_ ) -new_n17346_ = OR ( new_n14058_, new_n3063_ ) -new_n17347_ = OR ( new_n14195_, new_n3065_ ) -new_n17348_ = OR ( new_n14187_, new_n3050_ ) -new_n17349_ = NAND ( new_n17348_, new_n17347_, new_n17346_, new_n17345_ ) -new_n17350_ = OR ( new_n14200_, new_n3033_ ) -new_n17351_ = OR ( new_n14202_, new_n3035_ ) -new_n17352_ = OR ( new_n14066_, new_n3037_ ) -new_n17353_ = OR ( new_n14054_, new_n3059_ ) -new_n17354_ = NAND ( new_n17353_, new_n17352_, new_n17351_, new_n17350_ ) -new_n17355_ = NOR ( new_n17354_, new_n17349_ ) -new_n17356_ = NAND ( new_n17355_, new_n17344_, new_n17343_, new_n17342_ ) -new_n17357_ = OR ( new_n17356_, new_n17341_, new_n17336_, new_n14021_ ) -new_n17358_ = OR ( new_n14076_, new_n3031_ ) -new_n17359_ = OR ( new_n14079_, new_n3033_ ) -new_n17360_ = OR ( new_n14082_, new_n3035_ ) -new_n17361_ = OR ( new_n14106_, new_n3037_ ) -new_n17362_ = NAND ( new_n17361_, new_n17360_, new_n17359_, new_n17358_ ) -new_n17363_ = OR ( new_n14088_, new_n3040_ ) -new_n17364_ = OR ( new_n14090_, new_n3042_ ) -new_n17365_ = OR ( new_n14092_, new_n3044_ ) -new_n17366_ = OR ( new_n14073_, new_n3046_ ) -new_n17367_ = NAND ( new_n17366_, new_n17365_, new_n17364_, new_n17363_ ) -new_n17368_ = OR ( new_n14098_, new_n3050_ ) -new_n17369_ = OR ( new_n14100_, new_n3052_ ) -new_n17370_ = OR ( new_n14102_, new_n3054_ ) -new_n17371_ = OR ( new_n14086_, new_n3056_ ) -new_n17372_ = NAND ( new_n17371_, new_n17370_, new_n17369_, new_n17368_ ) -new_n17373_ = OR ( new_n14108_, new_n3059_ ) -new_n17374_ = OR ( new_n14110_, new_n3061_ ) -new_n17375_ = OR ( new_n14112_, new_n3063_ ) -new_n17376_ = OR ( new_n14096_, new_n3065_ ) -new_n17377_ = NAND ( new_n17376_, new_n17375_, new_n17374_, new_n17373_ ) -new_n17378_ = NOR ( new_n17377_, new_n17372_, new_n17367_, new_n17362_ ) -new_n17379_ = OR ( new_n17378_, new_n14013_ ) -new_n17380_ = OR ( new_n14122_, new_n3031_ ) -new_n17381_ = OR ( new_n14125_, new_n3033_ ) -new_n17382_ = OR ( new_n14127_, new_n3035_ ) -new_n17383_ = OR ( new_n14153_, new_n3037_ ) -new_n17384_ = NAND ( new_n17383_, new_n17382_, new_n17381_, new_n17380_ ) -new_n17385_ = OR ( new_n14135_, new_n3040_ ) -new_n17386_ = OR ( new_n14137_, new_n3042_ ) -new_n17387_ = OR ( new_n14139_, new_n3044_ ) -new_n17388_ = OR ( new_n14119_, new_n3046_ ) -new_n17389_ = NAND ( new_n17388_, new_n17387_, new_n17386_, new_n17385_ ) -new_n17390_ = OR ( new_n14145_, new_n3050_ ) -new_n17391_ = OR ( new_n14148_, new_n3052_ ) -new_n17392_ = OR ( new_n14150_, new_n3054_ ) -new_n17393_ = OR ( new_n14132_, new_n3056_ ) -new_n17394_ = NAND ( new_n17393_, new_n17392_, new_n17391_, new_n17390_ ) -new_n17395_ = OR ( new_n14155_, new_n3059_ ) -new_n17396_ = OR ( new_n14157_, new_n3061_ ) -new_n17397_ = OR ( new_n14159_, new_n3063_ ) -new_n17398_ = OR ( new_n14143_, new_n3065_ ) -new_n17399_ = NAND ( new_n17398_, new_n17397_, new_n17396_, new_n17395_ ) -new_n17400_ = NOR ( new_n17399_, new_n17394_, new_n17389_, new_n17384_ ) -new_n17401_ = OR ( new_n17400_, new_n6753_ ) -new_n17402_ = OR ( new_n14012_, new_n3294_ ) -new_n17403_ = NAND ( new_n17402_, new_n17401_, new_n17379_, new_n17357_ ) -new_n17404_ = XOR ( new_n17403_, new_n14021_ ) -new_n17405_ = NOR ( new_n14015_, new_n12720_ ) -new_n17406_ = NOR ( new_n12720_, new_n6753_ ) -new_n17407_ = OR ( new_n14021_, new_n12702_ ) -new_n17408_ = NOT ( NET_514 ) -new_n17409_ = OR ( new_n14024_, new_n17408_ ) -new_n17410_ = NAND ( new_n14026_, NET_323 ) -new_n17411_ = NAND ( new_n17410_, new_n17409_, new_n17407_ ) -new_n17412_ = NOR ( new_n17411_, new_n17406_, new_n17405_ ) -new_n17413_ = NOR ( new_n17412_, new_n17404_ ) -new_n17414_ = NOT ( new_n17413_ ) -new_n17415_ = NAND ( new_n17412_, new_n17404_ ) -new_n17416_ = NAND ( new_n17415_, new_n17414_ ) -new_n17417_ = NAND ( new_n16751_, new_n16748_ ) -new_n17418_ = NAND ( new_n17417_, new_n17416_, new_n16747_ ) -new_n17419_ = NAND ( new_n17417_, new_n16747_ ) -new_n17420_ = NAND ( new_n17419_, new_n17415_ ) -new_n17421_ = OR ( new_n17420_, new_n17413_ ) -new_n17422_ = NAND ( new_n17421_, new_n17418_ ) -new_n17423_ = OR ( new_n17422_, new_n14278_ ) -new_n17424_ = OR ( new_n14281_, new_n12720_ ) -new_n17425_ = OR ( new_n14284_, new_n12702_ ) -new_n17426_ = OR ( new_n14286_, new_n12691_ ) -new_n17427_ = OR ( new_n14275_, new_n12686_ ) -new_n17428_ = OR ( new_n14289_, new_n17408_ ) -new_n17429_ = AND ( new_n17428_, new_n17427_, new_n17426_ ) -NET_21642 = NAND ( new_n17429_, new_n17425_, new_n17424_, new_n17423_ ) -new_n17431_ = OR ( new_n17422_, new_n14295_ ) -new_n17432_ = OR ( new_n14297_, new_n12720_ ) -new_n17433_ = OR ( new_n14299_, new_n12702_ ) -new_n17434_ = OR ( new_n14301_, new_n17408_ ) -new_n17435_ = OR ( new_n14294_, new_n12705_ ) -new_n17436_ = AND ( new_n17435_, new_n17434_, new_n17433_ ) -NET_21643 = NAND ( new_n17436_, new_n17432_, new_n17431_ ) -new_n17438_ = OR ( new_n17422_, new_n14312_ ) -new_n17439_ = OR ( new_n14314_, new_n12702_ ) -new_n17440_ = NAND ( new_n14311_, NET_450 ) -new_n17441_ = OR ( new_n14317_, new_n5579_ ) -NET_21644 = NAND ( new_n17441_, new_n17440_, new_n17439_, new_n17438_ ) -new_n17443_ = NOT ( NET_336 ) -new_n17444_ = NOR ( new_n3179_, new_n17443_ ) -new_n17445_ = OR ( new_n8104_, new_n2965_ ) -new_n17446_ = OR ( new_n8021_, new_n2970_ ) -new_n17447_ = OR ( new_n7939_, new_n2974_ ) -new_n17448_ = OR ( new_n7857_, new_n2980_ ) -new_n17449_ = NAND ( new_n17448_, new_n17447_, new_n17446_, new_n17445_ ) -new_n17450_ = OR ( new_n8434_, new_n2985_ ) -new_n17451_ = OR ( new_n8352_, new_n2990_ ) -new_n17452_ = OR ( new_n8270_, new_n2994_ ) -new_n17453_ = OR ( new_n8186_, new_n2997_ ) -new_n17454_ = NAND ( new_n17453_, new_n17452_, new_n17451_, new_n17450_ ) -new_n17455_ = OR ( new_n7441_, new_n3001_ ) -new_n17456_ = OR ( new_n7358_, new_n3005_ ) -new_n17457_ = OR ( new_n7203_, new_n3008_ ) -new_n17458_ = OR ( new_n8516_, new_n3011_ ) -new_n17459_ = NAND ( new_n17458_, new_n17457_, new_n17456_, new_n17455_ ) -new_n17460_ = OR ( new_n7775_, new_n3015_ ) -new_n17461_ = OR ( new_n7693_, new_n3018_ ) -new_n17462_ = OR ( new_n7610_, new_n3021_ ) -new_n17463_ = OR ( new_n7526_, new_n3025_ ) -new_n17464_ = NAND ( new_n17463_, new_n17462_, new_n17461_, new_n17460_ ) -new_n17465_ = NOR ( new_n17464_, new_n17459_, new_n17454_, new_n17449_ ) -new_n17466_ = NOR ( new_n17465_, new_n3696_ ) -new_n17467_ = XNOR ( new_n17466_, new_n17444_ ) -new_n17468_ = OR ( new_n17189_, new_n17183_ ) -new_n17469_ = NAND ( new_n17468_, new_n17161_ ) -new_n17470_ = NAND ( new_n17189_, new_n17183_ ) -new_n17471_ = NAND ( new_n17470_, new_n17469_ ) -new_n17472_ = XOR ( new_n17471_, new_n17467_ ) -new_n17473_ = NOR ( new_n17472_, new_n6794_ ) -new_n17474_ = NAND ( new_n6728_, NET_336 ) -new_n17475_ = NOT ( NET_495 ) -new_n17476_ = OR ( new_n6792_, new_n17475_ ) -new_n17477_ = NAND ( new_n6695_, NET_368 ) -new_n17478_ = NAND ( new_n6804_, NET_463 ) -new_n17479_ = NAND ( new_n17478_, new_n17477_, new_n17476_, new_n17474_ ) -new_n17480_ = NOR ( new_n17479_, new_n17473_ ) -new_n17481_ = XNOR ( new_n17480_, new_n5529_ ) -new_n17482_ = NOT ( new_n17481_ ) -new_n17483_ = NAND ( new_n17198_, new_n16811_, new_n16775_ ) -new_n17484_ = NOR ( new_n17483_, new_n17482_ ) -new_n17485_ = NOT ( new_n17484_ ) -new_n17486_ = NAND ( new_n17483_, new_n17482_ ) -new_n17487_ = NAND ( new_n17486_, new_n17485_ ) -new_n17488_ = OR ( new_n17487_, new_n11723_ ) -new_n17489_ = NAND ( new_n11740_, NET_336 ) -new_n17490_ = NOT ( NET_368 ) -new_n17491_ = OR ( new_n6828_, new_n17490_ ) -new_n17492_ = NAND ( new_n5529_, NET_527 ) -new_n17493_ = NAND ( new_n17492_, new_n17491_, new_n17489_, new_n17488_ ) -new_n17494_ = XNOR ( new_n17493_, new_n6707_ ) -new_n17495_ = NOR ( new_n15911_, new_n6706_ ) -new_n17496_ = NOR ( new_n17495_, new_n17494_ ) -new_n17497_ = AND ( new_n17495_, new_n17494_ ) -new_n17498_ = NOR ( new_n17497_, new_n17496_ ) -new_n17499_ = NOR ( new_n17212_, new_n17208_ ) -new_n17500_ = NOR ( new_n17499_, new_n17209_ ) -new_n17501_ = XOR ( new_n17500_, new_n17498_ ) -new_n17502_ = OR ( new_n17501_, new_n11715_ ) -new_n17503_ = OR ( new_n17487_, new_n11775_ ) -new_n17504_ = NAND ( new_n11713_, NET_495 ) -NET_21645 = NAND ( new_n17504_, new_n17503_, new_n17502_ ) -new_n17506_ = NOR ( new_n14343_, new_n3785_ ) -new_n17507_ = OR ( new_n14346_, new_n3787_ ) -new_n17508_ = OR ( new_n14348_, new_n3789_ ) -new_n17509_ = OR ( new_n14352_, new_n3791_ ) -new_n17510_ = OR ( new_n14506_, new_n3776_ ) -new_n17511_ = NAND ( new_n17510_, new_n17509_, new_n17508_, new_n17507_ ) -new_n17512_ = OR ( new_n14340_, new_n3801_ ) -new_n17513_ = OR ( new_n14497_, new_n3797_ ) -new_n17514_ = OR ( new_n14493_, new_n3799_ ) -new_n17515_ = OR ( new_n14364_, new_n3806_ ) -new_n17516_ = OR ( new_n14366_, new_n3808_ ) -new_n17517_ = OR ( new_n14503_, new_n3810_ ) -new_n17518_ = OR ( new_n14495_, new_n3795_ ) -new_n17519_ = NAND ( new_n17518_, new_n17517_, new_n17516_, new_n17515_ ) -new_n17520_ = OR ( new_n14508_, new_n3778_ ) -new_n17521_ = OR ( new_n14510_, new_n3780_ ) -new_n17522_ = OR ( new_n14374_, new_n3782_ ) -new_n17523_ = OR ( new_n14362_, new_n3804_ ) -new_n17524_ = NAND ( new_n17523_, new_n17522_, new_n17521_, new_n17520_ ) -new_n17525_ = NOR ( new_n17524_, new_n17519_ ) -new_n17526_ = NAND ( new_n17525_, new_n17514_, new_n17513_, new_n17512_ ) -new_n17527_ = OR ( new_n17526_, new_n17511_, new_n17506_, new_n14329_ ) -new_n17528_ = OR ( new_n14384_, new_n3776_ ) -new_n17529_ = OR ( new_n14387_, new_n3778_ ) -new_n17530_ = OR ( new_n14390_, new_n3780_ ) -new_n17531_ = OR ( new_n14414_, new_n3782_ ) -new_n17532_ = NAND ( new_n17531_, new_n17530_, new_n17529_, new_n17528_ ) -new_n17533_ = OR ( new_n14396_, new_n3785_ ) -new_n17534_ = OR ( new_n14398_, new_n3787_ ) -new_n17535_ = OR ( new_n14400_, new_n3789_ ) -new_n17536_ = OR ( new_n14381_, new_n3791_ ) -new_n17537_ = NAND ( new_n17536_, new_n17535_, new_n17534_, new_n17533_ ) -new_n17538_ = OR ( new_n14406_, new_n3795_ ) -new_n17539_ = OR ( new_n14408_, new_n3797_ ) -new_n17540_ = OR ( new_n14410_, new_n3799_ ) -new_n17541_ = OR ( new_n14394_, new_n3801_ ) -new_n17542_ = NAND ( new_n17541_, new_n17540_, new_n17539_, new_n17538_ ) -new_n17543_ = OR ( new_n14416_, new_n3804_ ) -new_n17544_ = OR ( new_n14418_, new_n3806_ ) -new_n17545_ = OR ( new_n14420_, new_n3808_ ) -new_n17546_ = OR ( new_n14404_, new_n3810_ ) -new_n17547_ = NAND ( new_n17546_, new_n17545_, new_n17544_, new_n17543_ ) -new_n17548_ = NOR ( new_n17547_, new_n17542_, new_n17537_, new_n17532_ ) -new_n17549_ = OR ( new_n17548_, new_n14321_ ) -new_n17550_ = OR ( new_n14430_, new_n3776_ ) -new_n17551_ = OR ( new_n14433_, new_n3778_ ) -new_n17552_ = OR ( new_n14435_, new_n3780_ ) -new_n17553_ = OR ( new_n14461_, new_n3782_ ) -new_n17554_ = NAND ( new_n17553_, new_n17552_, new_n17551_, new_n17550_ ) -new_n17555_ = OR ( new_n14443_, new_n3785_ ) -new_n17556_ = OR ( new_n14445_, new_n3787_ ) -new_n17557_ = OR ( new_n14447_, new_n3789_ ) -new_n17558_ = OR ( new_n14427_, new_n3791_ ) -new_n17559_ = NAND ( new_n17558_, new_n17557_, new_n17556_, new_n17555_ ) -new_n17560_ = OR ( new_n14453_, new_n3795_ ) -new_n17561_ = OR ( new_n14456_, new_n3797_ ) -new_n17562_ = OR ( new_n14458_, new_n3799_ ) -new_n17563_ = OR ( new_n14440_, new_n3801_ ) -new_n17564_ = NAND ( new_n17563_, new_n17562_, new_n17561_, new_n17560_ ) -new_n17565_ = OR ( new_n14463_, new_n3804_ ) -new_n17566_ = OR ( new_n14465_, new_n3806_ ) -new_n17567_ = OR ( new_n14467_, new_n3808_ ) -new_n17568_ = OR ( new_n14451_, new_n3810_ ) -new_n17569_ = NAND ( new_n17568_, new_n17567_, new_n17566_, new_n17565_ ) -new_n17570_ = NOR ( new_n17569_, new_n17564_, new_n17559_, new_n17554_ ) -new_n17571_ = OR ( new_n17570_, new_n6913_ ) -new_n17572_ = OR ( new_n14320_, new_n4039_ ) -new_n17573_ = NAND ( new_n17572_, new_n17571_, new_n17549_, new_n17527_ ) -new_n17574_ = XOR ( new_n17573_, new_n14329_ ) -new_n17575_ = NOR ( new_n14323_, new_n12759_ ) -new_n17576_ = NOR ( new_n12759_, new_n6913_ ) -new_n17577_ = OR ( new_n14329_, new_n12741_ ) -new_n17578_ = NOT ( NET_963 ) -new_n17579_ = OR ( new_n14332_, new_n17578_ ) -new_n17580_ = NAND ( new_n14334_, NET_772 ) -new_n17581_ = NAND ( new_n17580_, new_n17579_, new_n17577_ ) -new_n17582_ = NOR ( new_n17581_, new_n17576_, new_n17575_ ) -new_n17583_ = NOR ( new_n17582_, new_n17574_ ) -new_n17584_ = NOT ( new_n17583_ ) -new_n17585_ = NAND ( new_n17582_, new_n17574_ ) -new_n17586_ = NAND ( new_n17585_, new_n17584_ ) -new_n17587_ = NAND ( new_n16914_, new_n16911_ ) -new_n17588_ = NAND ( new_n17587_, new_n17586_, new_n16910_ ) -new_n17589_ = NAND ( new_n17587_, new_n16910_ ) -new_n17590_ = NAND ( new_n17589_, new_n17585_ ) -new_n17591_ = OR ( new_n17590_, new_n17583_ ) -new_n17592_ = NAND ( new_n17591_, new_n17588_ ) -new_n17593_ = OR ( new_n17592_, new_n14586_ ) -new_n17594_ = OR ( new_n14589_, new_n12759_ ) -new_n17595_ = OR ( new_n14592_, new_n12741_ ) -new_n17596_ = OR ( new_n14594_, new_n12730_ ) -new_n17597_ = OR ( new_n14583_, new_n12725_ ) -new_n17598_ = OR ( new_n14597_, new_n17578_ ) -new_n17599_ = AND ( new_n17598_, new_n17597_, new_n17596_ ) -NET_21660 = NAND ( new_n17599_, new_n17595_, new_n17594_, new_n17593_ ) -new_n17601_ = OR ( new_n17592_, new_n14603_ ) -new_n17602_ = OR ( new_n14605_, new_n12759_ ) -new_n17603_ = OR ( new_n14607_, new_n12741_ ) -new_n17604_ = OR ( new_n14609_, new_n17578_ ) -new_n17605_ = OR ( new_n14602_, new_n12744_ ) -new_n17606_ = AND ( new_n17605_, new_n17604_, new_n17603_ ) -NET_21661 = NAND ( new_n17606_, new_n17602_, new_n17601_ ) -new_n17608_ = OR ( new_n17592_, new_n14620_ ) -new_n17609_ = OR ( new_n14622_, new_n12741_ ) -new_n17610_ = NAND ( new_n14619_, NET_899 ) -new_n17611_ = NAND ( new_n14625_, new_n5923_ ) -NET_21662 = NAND ( new_n17611_, new_n17610_, new_n17609_, new_n17608_ ) -new_n17613_ = NOT ( NET_785 ) -new_n17614_ = NOR ( new_n3924_, new_n17613_ ) -new_n17615_ = OR ( new_n9572_, new_n3710_ ) -new_n17616_ = OR ( new_n9489_, new_n3715_ ) -new_n17617_ = OR ( new_n9407_, new_n3719_ ) -new_n17618_ = OR ( new_n9325_, new_n3725_ ) -new_n17619_ = NAND ( new_n17618_, new_n17617_, new_n17616_, new_n17615_ ) -new_n17620_ = OR ( new_n9902_, new_n3730_ ) -new_n17621_ = OR ( new_n9820_, new_n3735_ ) -new_n17622_ = OR ( new_n9738_, new_n3739_ ) -new_n17623_ = OR ( new_n9654_, new_n3742_ ) -new_n17624_ = NAND ( new_n17623_, new_n17622_, new_n17621_, new_n17620_ ) -new_n17625_ = OR ( new_n8909_, new_n3746_ ) -new_n17626_ = OR ( new_n8826_, new_n3750_ ) -new_n17627_ = OR ( new_n8633_, new_n3753_ ) -new_n17628_ = OR ( new_n9984_, new_n3756_ ) -new_n17629_ = NAND ( new_n17628_, new_n17627_, new_n17626_, new_n17625_ ) -new_n17630_ = OR ( new_n9243_, new_n3760_ ) -new_n17631_ = OR ( new_n9161_, new_n3763_ ) -new_n17632_ = OR ( new_n9078_, new_n3766_ ) -new_n17633_ = OR ( new_n8994_, new_n3770_ ) -new_n17634_ = NAND ( new_n17633_, new_n17632_, new_n17631_, new_n17630_ ) -new_n17635_ = NOR ( new_n17634_, new_n17629_, new_n17624_, new_n17619_ ) -new_n17636_ = NOR ( new_n17635_, new_n4441_ ) -new_n17637_ = XNOR ( new_n17636_, new_n17614_ ) -new_n17638_ = OR ( new_n17248_, new_n17242_ ) -new_n17639_ = NAND ( new_n17638_, new_n17220_ ) -new_n17640_ = NAND ( new_n17248_, new_n17242_ ) -new_n17641_ = NAND ( new_n17640_, new_n17639_ ) -new_n17642_ = XOR ( new_n17641_, new_n17637_ ) -new_n17643_ = NOR ( new_n17642_, new_n6954_ ) -new_n17644_ = NAND ( new_n6888_, NET_785 ) -new_n17645_ = NOT ( NET_944 ) -new_n17646_ = OR ( new_n6952_, new_n17645_ ) -new_n17647_ = NAND ( new_n6855_, NET_817 ) -new_n17648_ = NAND ( new_n6964_, NET_912 ) -new_n17649_ = NAND ( new_n17648_, new_n17647_, new_n17646_, new_n17644_ ) -new_n17650_ = NOR ( new_n17649_, new_n17643_ ) -new_n17651_ = XNOR ( new_n17650_, new_n5827_ ) -new_n17652_ = NOT ( new_n17651_ ) -new_n17653_ = NAND ( new_n17257_, new_n16974_, new_n16938_ ) -new_n17654_ = NOR ( new_n17653_, new_n17652_ ) -new_n17655_ = NOT ( new_n17654_ ) -new_n17656_ = NAND ( new_n17653_, new_n17652_ ) -new_n17657_ = NAND ( new_n17656_, new_n17655_ ) -new_n17658_ = OR ( new_n17657_, new_n11791_ ) -new_n17659_ = NAND ( new_n11808_, NET_785 ) -new_n17660_ = NOT ( NET_817 ) -new_n17661_ = OR ( new_n6988_, new_n17660_ ) -new_n17662_ = NAND ( new_n5827_, NET_976 ) -new_n17663_ = NAND ( new_n17662_, new_n17661_, new_n17659_, new_n17658_ ) -new_n17664_ = XNOR ( new_n17663_, new_n6867_ ) -new_n17665_ = NOR ( new_n16017_, new_n6866_ ) -new_n17666_ = NOR ( new_n17665_, new_n17664_ ) -new_n17667_ = AND ( new_n17665_, new_n17664_ ) -new_n17668_ = NOR ( new_n17667_, new_n17666_ ) -new_n17669_ = NOR ( new_n17271_, new_n17267_ ) -new_n17670_ = NOR ( new_n17669_, new_n17268_ ) -new_n17671_ = XOR ( new_n17670_, new_n17668_ ) -new_n17672_ = OR ( new_n17671_, new_n11783_ ) -new_n17673_ = OR ( new_n17657_, new_n11843_ ) -new_n17674_ = NAND ( new_n11781_, NET_944 ) -NET_21663 = NAND ( new_n17674_, new_n17673_, new_n17672_ ) -new_n17676_ = NOR ( new_n14651_, new_n4529_ ) -new_n17677_ = OR ( new_n14654_, new_n4531_ ) -new_n17678_ = OR ( new_n14656_, new_n4533_ ) -new_n17679_ = OR ( new_n14660_, new_n4535_ ) -new_n17680_ = OR ( new_n14814_, new_n4520_ ) -new_n17681_ = NAND ( new_n17680_, new_n17679_, new_n17678_, new_n17677_ ) -new_n17682_ = OR ( new_n14648_, new_n4545_ ) -new_n17683_ = OR ( new_n14805_, new_n4541_ ) -new_n17684_ = OR ( new_n14801_, new_n4543_ ) -new_n17685_ = OR ( new_n14672_, new_n4550_ ) -new_n17686_ = OR ( new_n14674_, new_n4552_ ) -new_n17687_ = OR ( new_n14811_, new_n4554_ ) -new_n17688_ = OR ( new_n14803_, new_n4539_ ) -new_n17689_ = NAND ( new_n17688_, new_n17687_, new_n17686_, new_n17685_ ) -new_n17690_ = OR ( new_n14816_, new_n4522_ ) -new_n17691_ = OR ( new_n14818_, new_n4524_ ) -new_n17692_ = OR ( new_n14682_, new_n4526_ ) -new_n17693_ = OR ( new_n14670_, new_n4548_ ) -new_n17694_ = NAND ( new_n17693_, new_n17692_, new_n17691_, new_n17690_ ) -new_n17695_ = NOR ( new_n17694_, new_n17689_ ) -new_n17696_ = NAND ( new_n17695_, new_n17684_, new_n17683_, new_n17682_ ) -new_n17697_ = OR ( new_n17696_, new_n17681_, new_n17676_, new_n14637_ ) -new_n17698_ = OR ( new_n14692_, new_n4520_ ) -new_n17699_ = OR ( new_n14695_, new_n4522_ ) -new_n17700_ = OR ( new_n14698_, new_n4524_ ) -new_n17701_ = OR ( new_n14722_, new_n4526_ ) -new_n17702_ = NAND ( new_n17701_, new_n17700_, new_n17699_, new_n17698_ ) -new_n17703_ = OR ( new_n14704_, new_n4529_ ) -new_n17704_ = OR ( new_n14706_, new_n4531_ ) -new_n17705_ = OR ( new_n14708_, new_n4533_ ) -new_n17706_ = OR ( new_n14689_, new_n4535_ ) -new_n17707_ = NAND ( new_n17706_, new_n17705_, new_n17704_, new_n17703_ ) -new_n17708_ = OR ( new_n14714_, new_n4539_ ) -new_n17709_ = OR ( new_n14716_, new_n4541_ ) -new_n17710_ = OR ( new_n14718_, new_n4543_ ) -new_n17711_ = OR ( new_n14702_, new_n4545_ ) -new_n17712_ = NAND ( new_n17711_, new_n17710_, new_n17709_, new_n17708_ ) -new_n17713_ = OR ( new_n14724_, new_n4548_ ) -new_n17714_ = OR ( new_n14726_, new_n4550_ ) -new_n17715_ = OR ( new_n14728_, new_n4552_ ) -new_n17716_ = OR ( new_n14712_, new_n4554_ ) -new_n17717_ = NAND ( new_n17716_, new_n17715_, new_n17714_, new_n17713_ ) -new_n17718_ = NOR ( new_n17717_, new_n17712_, new_n17707_, new_n17702_ ) -new_n17719_ = OR ( new_n17718_, new_n14629_ ) -new_n17720_ = OR ( new_n14738_, new_n4520_ ) -new_n17721_ = OR ( new_n14741_, new_n4522_ ) -new_n17722_ = OR ( new_n14743_, new_n4524_ ) -new_n17723_ = OR ( new_n14769_, new_n4526_ ) -new_n17724_ = NAND ( new_n17723_, new_n17722_, new_n17721_, new_n17720_ ) -new_n17725_ = OR ( new_n14751_, new_n4529_ ) -new_n17726_ = OR ( new_n14753_, new_n4531_ ) -new_n17727_ = OR ( new_n14755_, new_n4533_ ) -new_n17728_ = OR ( new_n14735_, new_n4535_ ) -new_n17729_ = NAND ( new_n17728_, new_n17727_, new_n17726_, new_n17725_ ) -new_n17730_ = OR ( new_n14761_, new_n4539_ ) -new_n17731_ = OR ( new_n14764_, new_n4541_ ) -new_n17732_ = OR ( new_n14766_, new_n4543_ ) -new_n17733_ = OR ( new_n14748_, new_n4545_ ) -new_n17734_ = NAND ( new_n17733_, new_n17732_, new_n17731_, new_n17730_ ) -new_n17735_ = OR ( new_n14771_, new_n4548_ ) -new_n17736_ = OR ( new_n14773_, new_n4550_ ) -new_n17737_ = OR ( new_n14775_, new_n4552_ ) -new_n17738_ = OR ( new_n14759_, new_n4554_ ) -new_n17739_ = NAND ( new_n17738_, new_n17737_, new_n17736_, new_n17735_ ) -new_n17740_ = NOR ( new_n17739_, new_n17734_, new_n17729_, new_n17724_ ) -new_n17741_ = OR ( new_n17740_, new_n7073_ ) -new_n17742_ = OR ( new_n14628_, new_n4783_ ) -new_n17743_ = NAND ( new_n17742_, new_n17741_, new_n17719_, new_n17697_ ) -new_n17744_ = XOR ( new_n17743_, new_n14637_ ) -new_n17745_ = NOR ( new_n14631_, new_n12798_ ) -new_n17746_ = NOR ( new_n12798_, new_n7073_ ) -new_n17747_ = OR ( new_n14637_, new_n12780_ ) -new_n17748_ = NOT ( NET_1412 ) -new_n17749_ = OR ( new_n14640_, new_n17748_ ) -new_n17750_ = NAND ( new_n14642_, NET_1221 ) -new_n17751_ = NAND ( new_n17750_, new_n17749_, new_n17747_ ) -new_n17752_ = NOR ( new_n17751_, new_n17746_, new_n17745_ ) -new_n17753_ = NOR ( new_n17752_, new_n17744_ ) -new_n17754_ = NOT ( new_n17753_ ) -new_n17755_ = NAND ( new_n17752_, new_n17744_ ) -new_n17756_ = NAND ( new_n17755_, new_n17754_ ) -new_n17757_ = NAND ( new_n17077_, new_n17074_ ) -new_n17758_ = NAND ( new_n17757_, new_n17756_, new_n17073_ ) -new_n17759_ = NAND ( new_n17757_, new_n17073_ ) -new_n17760_ = NAND ( new_n17759_, new_n17755_ ) -new_n17761_ = OR ( new_n17760_, new_n17753_ ) -new_n17762_ = NAND ( new_n17761_, new_n17758_ ) -new_n17763_ = OR ( new_n17762_, new_n14894_ ) -new_n17764_ = OR ( new_n14897_, new_n12798_ ) -new_n17765_ = OR ( new_n14900_, new_n12780_ ) -new_n17766_ = OR ( new_n14902_, new_n12769_ ) -new_n17767_ = OR ( new_n14891_, new_n12764_ ) -new_n17768_ = OR ( new_n14905_, new_n17748_ ) -new_n17769_ = AND ( new_n17768_, new_n17767_, new_n17766_ ) -NET_21680 = NAND ( new_n17769_, new_n17765_, new_n17764_, new_n17763_ ) -new_n17771_ = OR ( new_n17762_, new_n14911_ ) -new_n17772_ = OR ( new_n14913_, new_n12798_ ) -new_n17773_ = OR ( new_n14915_, new_n12780_ ) -new_n17774_ = OR ( new_n14917_, new_n17748_ ) -new_n17775_ = OR ( new_n14910_, new_n12783_ ) -new_n17776_ = AND ( new_n17775_, new_n17774_, new_n17773_ ) -NET_21681 = NAND ( new_n17776_, new_n17772_, new_n17771_ ) -new_n17778_ = OR ( new_n17762_, new_n14928_ ) -new_n17779_ = OR ( new_n14930_, new_n12780_ ) -new_n17780_ = NAND ( new_n14927_, NET_1348 ) -new_n17781_ = NAND ( new_n14933_, new_n6302_ ) -NET_21682 = NAND ( new_n17781_, new_n17780_, new_n17779_, new_n17778_ ) -new_n17783_ = NOT ( NET_1234 ) -new_n17784_ = NOR ( new_n4668_, new_n17783_ ) -new_n17785_ = OR ( new_n11042_, new_n4454_ ) -new_n17786_ = OR ( new_n10959_, new_n4459_ ) -new_n17787_ = OR ( new_n10877_, new_n4463_ ) -new_n17788_ = OR ( new_n10795_, new_n4469_ ) -new_n17789_ = NAND ( new_n17788_, new_n17787_, new_n17786_, new_n17785_ ) -new_n17790_ = OR ( new_n11372_, new_n4474_ ) -new_n17791_ = OR ( new_n11290_, new_n4479_ ) -new_n17792_ = OR ( new_n11208_, new_n4483_ ) -new_n17793_ = OR ( new_n11124_, new_n4486_ ) -new_n17794_ = NAND ( new_n17793_, new_n17792_, new_n17791_, new_n17790_ ) -new_n17795_ = OR ( new_n10379_, new_n4490_ ) -new_n17796_ = OR ( new_n10296_, new_n4494_ ) -new_n17797_ = OR ( new_n10101_, new_n4497_ ) -new_n17798_ = OR ( new_n11454_, new_n4500_ ) -new_n17799_ = NAND ( new_n17798_, new_n17797_, new_n17796_, new_n17795_ ) -new_n17800_ = OR ( new_n10713_, new_n4504_ ) -new_n17801_ = OR ( new_n10631_, new_n4507_ ) -new_n17802_ = OR ( new_n10548_, new_n4510_ ) -new_n17803_ = OR ( new_n10464_, new_n4514_ ) -new_n17804_ = NAND ( new_n17803_, new_n17802_, new_n17801_, new_n17800_ ) -new_n17805_ = NOR ( new_n17804_, new_n17799_, new_n17794_, new_n17789_ ) -new_n17806_ = NOR ( new_n17805_, new_n5185_ ) -new_n17807_ = XNOR ( new_n17806_, new_n17784_ ) -new_n17808_ = OR ( new_n17307_, new_n17301_ ) -new_n17809_ = NAND ( new_n17808_, new_n17279_ ) -new_n17810_ = NAND ( new_n17307_, new_n17301_ ) -new_n17811_ = NAND ( new_n17810_, new_n17809_ ) -new_n17812_ = XOR ( new_n17811_, new_n17807_ ) -new_n17813_ = NOR ( new_n17812_, new_n7114_ ) -new_n17814_ = NAND ( new_n7048_, NET_1234 ) -new_n17815_ = NOT ( NET_1393 ) -new_n17816_ = OR ( new_n7112_, new_n17815_ ) -new_n17817_ = NAND ( new_n7015_, NET_1266 ) -new_n17818_ = NAND ( new_n7124_, NET_1361 ) -new_n17819_ = NAND ( new_n17818_, new_n17817_, new_n17816_, new_n17814_ ) -new_n17820_ = NOR ( new_n17819_, new_n17813_ ) -new_n17821_ = XNOR ( new_n17820_, new_n6196_ ) -new_n17822_ = NOT ( new_n17821_ ) -new_n17823_ = NAND ( new_n17316_, new_n17137_, new_n17101_ ) -new_n17824_ = NOR ( new_n17823_, new_n17822_ ) -new_n17825_ = NOT ( new_n17824_ ) -new_n17826_ = NAND ( new_n17823_, new_n17822_ ) -new_n17827_ = NAND ( new_n17826_, new_n17825_ ) -new_n17828_ = OR ( new_n17827_, new_n11859_ ) -new_n17829_ = NAND ( new_n11876_, NET_1234 ) -new_n17830_ = NOT ( NET_1266 ) -new_n17831_ = OR ( new_n7148_, new_n17830_ ) -new_n17832_ = NAND ( new_n6196_, NET_1425 ) -new_n17833_ = NAND ( new_n17832_, new_n17831_, new_n17829_, new_n17828_ ) -new_n17834_ = XNOR ( new_n17833_, new_n7027_ ) -new_n17835_ = NOR ( new_n16123_, new_n7026_ ) -new_n17836_ = NOR ( new_n17835_, new_n17834_ ) -new_n17837_ = AND ( new_n17835_, new_n17834_ ) -new_n17838_ = NOR ( new_n17837_, new_n17836_ ) -new_n17839_ = NOR ( new_n17330_, new_n17326_ ) -new_n17840_ = NOR ( new_n17839_, new_n17327_ ) -new_n17841_ = XOR ( new_n17840_, new_n17838_ ) -new_n17842_ = OR ( new_n17841_, new_n11851_ ) -new_n17843_ = OR ( new_n17827_, new_n11911_ ) -new_n17844_ = NAND ( new_n11849_, NET_1393 ) -NET_21683 = NAND ( new_n17844_, new_n17843_, new_n17842_ ) -new_n17846_ = NOR ( new_n14035_, new_n3596_ ) -new_n17847_ = OR ( new_n14038_, new_n3598_ ) -new_n17848_ = OR ( new_n14040_, new_n3600_ ) -new_n17849_ = OR ( new_n14044_, new_n3602_ ) -new_n17850_ = OR ( new_n14198_, new_n3587_ ) -new_n17851_ = NAND ( new_n17850_, new_n17849_, new_n17848_, new_n17847_ ) -new_n17852_ = OR ( new_n14032_, new_n3611_ ) -new_n17853_ = OR ( new_n14189_, new_n3607_ ) -new_n17854_ = OR ( new_n14185_, new_n3609_ ) -new_n17855_ = OR ( new_n14056_, new_n3616_ ) -new_n17856_ = OR ( new_n14058_, new_n3618_ ) -new_n17857_ = OR ( new_n14195_, new_n3620_ ) -new_n17858_ = OR ( new_n14187_, new_n3605_ ) -new_n17859_ = NAND ( new_n17858_, new_n17857_, new_n17856_, new_n17855_ ) -new_n17860_ = OR ( new_n14200_, new_n3589_ ) -new_n17861_ = OR ( new_n14202_, new_n3591_ ) -new_n17862_ = OR ( new_n14066_, new_n3593_ ) -new_n17863_ = OR ( new_n14054_, new_n3614_ ) -new_n17864_ = NAND ( new_n17863_, new_n17862_, new_n17861_, new_n17860_ ) -new_n17865_ = NOR ( new_n17864_, new_n17859_ ) -new_n17866_ = NAND ( new_n17865_, new_n17854_, new_n17853_, new_n17852_ ) -new_n17867_ = OR ( new_n17866_, new_n17851_, new_n17846_, new_n14021_ ) -new_n17868_ = OR ( new_n14076_, new_n3587_ ) -new_n17869_ = OR ( new_n14079_, new_n3589_ ) -new_n17870_ = OR ( new_n14082_, new_n3591_ ) -new_n17871_ = OR ( new_n14106_, new_n3593_ ) -new_n17872_ = NAND ( new_n17871_, new_n17870_, new_n17869_, new_n17868_ ) -new_n17873_ = OR ( new_n14088_, new_n3596_ ) -new_n17874_ = OR ( new_n14090_, new_n3598_ ) -new_n17875_ = OR ( new_n14092_, new_n3600_ ) -new_n17876_ = OR ( new_n14073_, new_n3602_ ) -new_n17877_ = NAND ( new_n17876_, new_n17875_, new_n17874_, new_n17873_ ) -new_n17878_ = OR ( new_n14098_, new_n3605_ ) -new_n17879_ = OR ( new_n14100_, new_n3607_ ) -new_n17880_ = OR ( new_n14102_, new_n3609_ ) -new_n17881_ = OR ( new_n14086_, new_n3611_ ) -new_n17882_ = NAND ( new_n17881_, new_n17880_, new_n17879_, new_n17878_ ) -new_n17883_ = OR ( new_n14108_, new_n3614_ ) -new_n17884_ = OR ( new_n14110_, new_n3616_ ) -new_n17885_ = OR ( new_n14112_, new_n3618_ ) -new_n17886_ = OR ( new_n14096_, new_n3620_ ) -new_n17887_ = NAND ( new_n17886_, new_n17885_, new_n17884_, new_n17883_ ) -new_n17888_ = NOR ( new_n17887_, new_n17882_, new_n17877_, new_n17872_ ) -new_n17889_ = OR ( new_n17888_, new_n14013_ ) -new_n17890_ = OR ( new_n14122_, new_n3587_ ) -new_n17891_ = OR ( new_n14125_, new_n3589_ ) -new_n17892_ = OR ( new_n14127_, new_n3591_ ) -new_n17893_ = OR ( new_n14153_, new_n3593_ ) -new_n17894_ = NAND ( new_n17893_, new_n17892_, new_n17891_, new_n17890_ ) -new_n17895_ = OR ( new_n14135_, new_n3596_ ) -new_n17896_ = OR ( new_n14137_, new_n3598_ ) -new_n17897_ = OR ( new_n14139_, new_n3600_ ) -new_n17898_ = OR ( new_n14119_, new_n3602_ ) -new_n17899_ = NAND ( new_n17898_, new_n17897_, new_n17896_, new_n17895_ ) -new_n17900_ = OR ( new_n14145_, new_n3605_ ) -new_n17901_ = OR ( new_n14148_, new_n3607_ ) -new_n17902_ = OR ( new_n14150_, new_n3609_ ) -new_n17903_ = OR ( new_n14132_, new_n3611_ ) -new_n17904_ = NAND ( new_n17903_, new_n17902_, new_n17901_, new_n17900_ ) -new_n17905_ = OR ( new_n14155_, new_n3614_ ) -new_n17906_ = OR ( new_n14157_, new_n3616_ ) -new_n17907_ = OR ( new_n14159_, new_n3618_ ) -new_n17908_ = OR ( new_n14143_, new_n3620_ ) -new_n17909_ = NAND ( new_n17908_, new_n17907_, new_n17906_, new_n17905_ ) -new_n17910_ = NOR ( new_n17909_, new_n17904_, new_n17899_, new_n17894_ ) -new_n17911_ = OR ( new_n17910_, new_n6753_ ) -new_n17912_ = OR ( new_n14012_, new_n3623_ ) -new_n17913_ = NAND ( new_n17912_, new_n17911_, new_n17889_, new_n17867_ ) -new_n17914_ = XNOR ( new_n17913_, new_n14021_ ) -new_n17915_ = OR ( new_n14015_, new_n12835_ ) -new_n17916_ = OR ( new_n12835_, new_n6753_ ) -new_n17917_ = OR ( new_n14021_, new_n12821_ ) -new_n17918_ = NOT ( NET_515 ) -new_n17919_ = OR ( new_n14024_, new_n17918_ ) -new_n17920_ = NAND ( new_n14026_, NET_324 ) -new_n17921_ = AND ( new_n17920_, new_n17919_, new_n17917_ ) -new_n17922_ = NAND ( new_n17921_, new_n17916_, new_n17915_ ) -new_n17923_ = OR ( new_n17922_, new_n17914_ ) -new_n17924_ = NAND ( new_n17922_, new_n17914_ ) -new_n17925_ = NAND ( new_n17924_, new_n17923_ ) -new_n17926_ = NAND ( new_n17420_, new_n17414_ ) -new_n17927_ = XOR ( new_n17926_, new_n17925_ ) -new_n17928_ = NOR ( new_n17927_, new_n14278_ ) -new_n17929_ = NOR ( new_n14281_, new_n12835_ ) -new_n17930_ = OR ( new_n14284_, new_n12821_ ) -new_n17931_ = OR ( new_n14286_, new_n12809_ ) -new_n17932_ = OR ( new_n14275_, new_n12803_ ) -new_n17933_ = OR ( new_n14289_, new_n17918_ ) -new_n17934_ = NAND ( new_n17933_, new_n17932_, new_n17931_, new_n17930_ ) -NET_21823 = OR ( new_n17934_, new_n17929_, new_n17928_ ) -new_n17936_ = NOR ( new_n17927_, new_n14295_ ) -new_n17937_ = OR ( new_n14297_, new_n12835_ ) -new_n17938_ = OR ( new_n14299_, new_n12821_ ) -new_n17939_ = OR ( new_n14301_, new_n17918_ ) -new_n17940_ = OR ( new_n14294_, new_n12824_ ) -new_n17941_ = NAND ( new_n17940_, new_n17939_, new_n17938_, new_n17937_ ) -NET_21824 = OR ( new_n17941_, new_n17936_ ) -new_n17943_ = OR ( new_n17927_, new_n14312_ ) -new_n17944_ = OR ( new_n14314_, new_n12821_ ) -new_n17945_ = NAND ( new_n14311_, NET_451 ) -new_n17946_ = OR ( new_n14317_, new_n5574_ ) -NET_21825 = NAND ( new_n17946_, new_n17945_, new_n17944_, new_n17943_ ) -new_n17948_ = NOT ( NET_337 ) -new_n17949_ = NOR ( new_n3179_, new_n17948_ ) -new_n17950_ = OR ( new_n8104_, new_n3538_ ) -new_n17951_ = OR ( new_n8021_, new_n3540_ ) -new_n17952_ = OR ( new_n7939_, new_n3542_ ) -new_n17953_ = OR ( new_n7857_, new_n3544_ ) -new_n17954_ = NAND ( new_n17953_, new_n17952_, new_n17951_, new_n17950_ ) -new_n17955_ = OR ( new_n8434_, new_n3547_ ) -new_n17956_ = OR ( new_n8352_, new_n3549_ ) -new_n17957_ = OR ( new_n8270_, new_n3551_ ) -new_n17958_ = OR ( new_n8186_, new_n3553_ ) -new_n17959_ = NAND ( new_n17958_, new_n17957_, new_n17956_, new_n17955_ ) -new_n17960_ = OR ( new_n7441_, new_n3556_ ) -new_n17961_ = OR ( new_n7358_, new_n3558_ ) -new_n17962_ = OR ( new_n7203_, new_n3560_ ) -new_n17963_ = OR ( new_n8516_, new_n3562_ ) -new_n17964_ = NAND ( new_n17963_, new_n17962_, new_n17961_, new_n17960_ ) -new_n17965_ = OR ( new_n7775_, new_n3565_ ) -new_n17966_ = OR ( new_n7693_, new_n3567_ ) -new_n17967_ = OR ( new_n7610_, new_n3569_ ) -new_n17968_ = OR ( new_n7526_, new_n3571_ ) -new_n17969_ = NAND ( new_n17968_, new_n17967_, new_n17966_, new_n17965_ ) -new_n17970_ = NOR ( new_n17969_, new_n17964_, new_n17959_, new_n17954_ ) -new_n17971_ = NOR ( new_n17970_, new_n3696_ ) -new_n17972_ = XNOR ( new_n17971_, new_n17949_ ) -new_n17973_ = OR ( new_n17471_, new_n17466_ ) -new_n17974_ = NAND ( new_n17973_, new_n17444_ ) -new_n17975_ = NAND ( new_n17471_, new_n17466_ ) -new_n17976_ = NAND ( new_n17975_, new_n17974_ ) -new_n17977_ = XOR ( new_n17976_, new_n17972_ ) -new_n17978_ = NOR ( new_n17977_, new_n6794_ ) -new_n17979_ = NAND ( new_n6728_, NET_337 ) -new_n17980_ = NOT ( NET_496 ) -new_n17981_ = OR ( new_n6792_, new_n17980_ ) -new_n17982_ = NAND ( new_n6695_, NET_369 ) -new_n17983_ = NAND ( new_n6804_, NET_464 ) -new_n17984_ = NAND ( new_n17983_, new_n17982_, new_n17981_, new_n17979_ ) -new_n17985_ = NOR ( new_n17984_, new_n17978_ ) -new_n17986_ = XOR ( new_n17985_, new_n5529_ ) -new_n17987_ = OR ( new_n17986_, new_n17485_ ) -new_n17988_ = NAND ( new_n17986_, new_n17485_ ) -new_n17989_ = NAND ( new_n17988_, new_n17987_ ) -new_n17990_ = OR ( new_n17989_, new_n11723_ ) -new_n17991_ = NAND ( new_n11740_, NET_337 ) -new_n17992_ = NOT ( NET_369 ) -new_n17993_ = OR ( new_n6828_, new_n17992_ ) -new_n17994_ = NAND ( new_n5529_, NET_528 ) -new_n17995_ = NAND ( new_n17994_, new_n17993_, new_n17991_, new_n17990_ ) -new_n17996_ = XNOR ( new_n17995_, new_n6707_ ) -new_n17997_ = NOR ( new_n16229_, new_n6706_ ) -new_n17998_ = NOR ( new_n17997_, new_n17996_ ) -new_n17999_ = AND ( new_n17997_, new_n17996_ ) -new_n18000_ = NOR ( new_n17999_, new_n17998_ ) -new_n18001_ = NOR ( new_n17500_, new_n17496_ ) -new_n18002_ = NOR ( new_n18001_, new_n17497_ ) -new_n18003_ = XOR ( new_n18002_, new_n18000_ ) -new_n18004_ = OR ( new_n18003_, new_n11715_ ) -new_n18005_ = OR ( new_n17989_, new_n11775_ ) -new_n18006_ = NAND ( new_n11713_, NET_496 ) -NET_21826 = NAND ( new_n18006_, new_n18005_, new_n18004_ ) -new_n18008_ = NOR ( new_n14343_, new_n4341_ ) -new_n18009_ = OR ( new_n14346_, new_n4343_ ) -new_n18010_ = OR ( new_n14348_, new_n4345_ ) -new_n18011_ = OR ( new_n14352_, new_n4347_ ) -new_n18012_ = OR ( new_n14506_, new_n4332_ ) -new_n18013_ = NAND ( new_n18012_, new_n18011_, new_n18010_, new_n18009_ ) -new_n18014_ = OR ( new_n14340_, new_n4356_ ) -new_n18015_ = OR ( new_n14497_, new_n4352_ ) -new_n18016_ = OR ( new_n14493_, new_n4354_ ) -new_n18017_ = OR ( new_n14364_, new_n4361_ ) -new_n18018_ = OR ( new_n14366_, new_n4363_ ) -new_n18019_ = OR ( new_n14503_, new_n4365_ ) -new_n18020_ = OR ( new_n14495_, new_n4350_ ) -new_n18021_ = NAND ( new_n18020_, new_n18019_, new_n18018_, new_n18017_ ) -new_n18022_ = OR ( new_n14508_, new_n4334_ ) -new_n18023_ = OR ( new_n14510_, new_n4336_ ) -new_n18024_ = OR ( new_n14374_, new_n4338_ ) -new_n18025_ = OR ( new_n14362_, new_n4359_ ) -new_n18026_ = NAND ( new_n18025_, new_n18024_, new_n18023_, new_n18022_ ) -new_n18027_ = NOR ( new_n18026_, new_n18021_ ) -new_n18028_ = NAND ( new_n18027_, new_n18016_, new_n18015_, new_n18014_ ) -new_n18029_ = OR ( new_n18028_, new_n18013_, new_n18008_, new_n14329_ ) -new_n18030_ = OR ( new_n14384_, new_n4332_ ) -new_n18031_ = OR ( new_n14387_, new_n4334_ ) -new_n18032_ = OR ( new_n14390_, new_n4336_ ) -new_n18033_ = OR ( new_n14414_, new_n4338_ ) -new_n18034_ = NAND ( new_n18033_, new_n18032_, new_n18031_, new_n18030_ ) -new_n18035_ = OR ( new_n14396_, new_n4341_ ) -new_n18036_ = OR ( new_n14398_, new_n4343_ ) -new_n18037_ = OR ( new_n14400_, new_n4345_ ) -new_n18038_ = OR ( new_n14381_, new_n4347_ ) -new_n18039_ = NAND ( new_n18038_, new_n18037_, new_n18036_, new_n18035_ ) -new_n18040_ = OR ( new_n14406_, new_n4350_ ) -new_n18041_ = OR ( new_n14408_, new_n4352_ ) -new_n18042_ = OR ( new_n14410_, new_n4354_ ) -new_n18043_ = OR ( new_n14394_, new_n4356_ ) -new_n18044_ = NAND ( new_n18043_, new_n18042_, new_n18041_, new_n18040_ ) -new_n18045_ = OR ( new_n14416_, new_n4359_ ) -new_n18046_ = OR ( new_n14418_, new_n4361_ ) -new_n18047_ = OR ( new_n14420_, new_n4363_ ) -new_n18048_ = OR ( new_n14404_, new_n4365_ ) -new_n18049_ = NAND ( new_n18048_, new_n18047_, new_n18046_, new_n18045_ ) -new_n18050_ = NOR ( new_n18049_, new_n18044_, new_n18039_, new_n18034_ ) -new_n18051_ = OR ( new_n18050_, new_n14321_ ) -new_n18052_ = OR ( new_n14430_, new_n4332_ ) -new_n18053_ = OR ( new_n14433_, new_n4334_ ) -new_n18054_ = OR ( new_n14435_, new_n4336_ ) -new_n18055_ = OR ( new_n14461_, new_n4338_ ) -new_n18056_ = NAND ( new_n18055_, new_n18054_, new_n18053_, new_n18052_ ) -new_n18057_ = OR ( new_n14443_, new_n4341_ ) -new_n18058_ = OR ( new_n14445_, new_n4343_ ) -new_n18059_ = OR ( new_n14447_, new_n4345_ ) -new_n18060_ = OR ( new_n14427_, new_n4347_ ) -new_n18061_ = NAND ( new_n18060_, new_n18059_, new_n18058_, new_n18057_ ) -new_n18062_ = OR ( new_n14453_, new_n4350_ ) -new_n18063_ = OR ( new_n14456_, new_n4352_ ) -new_n18064_ = OR ( new_n14458_, new_n4354_ ) -new_n18065_ = OR ( new_n14440_, new_n4356_ ) -new_n18066_ = NAND ( new_n18065_, new_n18064_, new_n18063_, new_n18062_ ) -new_n18067_ = OR ( new_n14463_, new_n4359_ ) -new_n18068_ = OR ( new_n14465_, new_n4361_ ) -new_n18069_ = OR ( new_n14467_, new_n4363_ ) -new_n18070_ = OR ( new_n14451_, new_n4365_ ) -new_n18071_ = NAND ( new_n18070_, new_n18069_, new_n18068_, new_n18067_ ) -new_n18072_ = NOR ( new_n18071_, new_n18066_, new_n18061_, new_n18056_ ) -new_n18073_ = OR ( new_n18072_, new_n6913_ ) -new_n18074_ = OR ( new_n14320_, new_n4368_ ) -new_n18075_ = NAND ( new_n18074_, new_n18073_, new_n18051_, new_n18029_ ) -new_n18076_ = XNOR ( new_n18075_, new_n14329_ ) -new_n18077_ = OR ( new_n14323_, new_n12872_ ) -new_n18078_ = OR ( new_n12872_, new_n6913_ ) -new_n18079_ = OR ( new_n14329_, new_n12858_ ) -new_n18080_ = NOT ( NET_964 ) -new_n18081_ = OR ( new_n14332_, new_n18080_ ) -new_n18082_ = NAND ( new_n14334_, NET_773 ) -new_n18083_ = AND ( new_n18082_, new_n18081_, new_n18079_ ) -new_n18084_ = NAND ( new_n18083_, new_n18078_, new_n18077_ ) -new_n18085_ = OR ( new_n18084_, new_n18076_ ) -new_n18086_ = NAND ( new_n18084_, new_n18076_ ) -new_n18087_ = NAND ( new_n18086_, new_n18085_ ) -new_n18088_ = NAND ( new_n17590_, new_n17584_ ) -new_n18089_ = XOR ( new_n18088_, new_n18087_ ) -new_n18090_ = NOR ( new_n18089_, new_n14586_ ) -new_n18091_ = NOR ( new_n14589_, new_n12872_ ) -new_n18092_ = OR ( new_n14592_, new_n12858_ ) -new_n18093_ = OR ( new_n14594_, new_n12846_ ) -new_n18094_ = OR ( new_n14583_, new_n12840_ ) -new_n18095_ = OR ( new_n14597_, new_n18080_ ) -new_n18096_ = NAND ( new_n18095_, new_n18094_, new_n18093_, new_n18092_ ) -NET_21840 = OR ( new_n18096_, new_n18091_, new_n18090_ ) -new_n18098_ = NOR ( new_n18089_, new_n14603_ ) -new_n18099_ = OR ( new_n14605_, new_n12872_ ) -new_n18100_ = OR ( new_n14607_, new_n12858_ ) -new_n18101_ = OR ( new_n14609_, new_n18080_ ) -new_n18102_ = OR ( new_n14602_, new_n12861_ ) -new_n18103_ = NAND ( new_n18102_, new_n18101_, new_n18100_, new_n18099_ ) -NET_21841 = OR ( new_n18103_, new_n18098_ ) -new_n18105_ = OR ( new_n18089_, new_n14620_ ) -new_n18106_ = OR ( new_n14622_, new_n12858_ ) -new_n18107_ = NAND ( new_n14619_, NET_900 ) -new_n18108_ = NAND ( new_n14625_, new_n5916_ ) -NET_21842 = NAND ( new_n18108_, new_n18107_, new_n18106_, new_n18105_ ) -new_n18110_ = NOT ( NET_786 ) -new_n18111_ = NOR ( new_n3924_, new_n18110_ ) -new_n18112_ = OR ( new_n9572_, new_n4283_ ) -new_n18113_ = OR ( new_n9489_, new_n4285_ ) -new_n18114_ = OR ( new_n9407_, new_n4287_ ) -new_n18115_ = OR ( new_n9325_, new_n4289_ ) -new_n18116_ = NAND ( new_n18115_, new_n18114_, new_n18113_, new_n18112_ ) -new_n18117_ = OR ( new_n9902_, new_n4292_ ) -new_n18118_ = OR ( new_n9820_, new_n4294_ ) -new_n18119_ = OR ( new_n9738_, new_n4296_ ) -new_n18120_ = OR ( new_n9654_, new_n4298_ ) -new_n18121_ = NAND ( new_n18120_, new_n18119_, new_n18118_, new_n18117_ ) -new_n18122_ = OR ( new_n8909_, new_n4301_ ) -new_n18123_ = OR ( new_n8826_, new_n4303_ ) -new_n18124_ = OR ( new_n8633_, new_n4305_ ) -new_n18125_ = OR ( new_n9984_, new_n4307_ ) -new_n18126_ = NAND ( new_n18125_, new_n18124_, new_n18123_, new_n18122_ ) -new_n18127_ = OR ( new_n9243_, new_n4310_ ) -new_n18128_ = OR ( new_n9161_, new_n4312_ ) -new_n18129_ = OR ( new_n9078_, new_n4314_ ) -new_n18130_ = OR ( new_n8994_, new_n4316_ ) -new_n18131_ = NAND ( new_n18130_, new_n18129_, new_n18128_, new_n18127_ ) -new_n18132_ = NOR ( new_n18131_, new_n18126_, new_n18121_, new_n18116_ ) -new_n18133_ = NOR ( new_n18132_, new_n4441_ ) -new_n18134_ = XNOR ( new_n18133_, new_n18111_ ) -new_n18135_ = OR ( new_n17641_, new_n17636_ ) -new_n18136_ = NAND ( new_n18135_, new_n17614_ ) -new_n18137_ = NAND ( new_n17641_, new_n17636_ ) -new_n18138_ = NAND ( new_n18137_, new_n18136_ ) -new_n18139_ = XOR ( new_n18138_, new_n18134_ ) -new_n18140_ = NOR ( new_n18139_, new_n6954_ ) -new_n18141_ = NAND ( new_n6888_, NET_786 ) -new_n18142_ = NOT ( NET_945 ) -new_n18143_ = OR ( new_n6952_, new_n18142_ ) -new_n18144_ = NAND ( new_n6855_, NET_818 ) -new_n18145_ = NAND ( new_n6964_, NET_913 ) -new_n18146_ = NAND ( new_n18145_, new_n18144_, new_n18143_, new_n18141_ ) -new_n18147_ = NOR ( new_n18146_, new_n18140_ ) -new_n18148_ = XOR ( new_n18147_, new_n5827_ ) -new_n18149_ = OR ( new_n18148_, new_n17655_ ) -new_n18150_ = NAND ( new_n18148_, new_n17655_ ) -new_n18151_ = NAND ( new_n18150_, new_n18149_ ) -new_n18152_ = OR ( new_n18151_, new_n11791_ ) -new_n18153_ = NAND ( new_n11808_, NET_786 ) -new_n18154_ = NOT ( NET_818 ) -new_n18155_ = OR ( new_n6988_, new_n18154_ ) -new_n18156_ = NAND ( new_n5827_, NET_977 ) -new_n18157_ = NAND ( new_n18156_, new_n18155_, new_n18153_, new_n18152_ ) -new_n18158_ = XNOR ( new_n18157_, new_n6867_ ) -new_n18159_ = NOR ( new_n16336_, new_n6866_ ) -new_n18160_ = NOR ( new_n18159_, new_n18158_ ) -new_n18161_ = AND ( new_n18159_, new_n18158_ ) -new_n18162_ = NOR ( new_n18161_, new_n18160_ ) -new_n18163_ = NOR ( new_n17670_, new_n17666_ ) -new_n18164_ = NOR ( new_n18163_, new_n17667_ ) -new_n18165_ = XOR ( new_n18164_, new_n18162_ ) -new_n18166_ = OR ( new_n18165_, new_n11783_ ) -new_n18167_ = OR ( new_n18151_, new_n11843_ ) -new_n18168_ = NAND ( new_n11781_, NET_945 ) -NET_21843 = NAND ( new_n18168_, new_n18167_, new_n18166_ ) -new_n18170_ = NOR ( new_n14651_, new_n5085_ ) -new_n18171_ = OR ( new_n14654_, new_n5087_ ) -new_n18172_ = OR ( new_n14656_, new_n5089_ ) -new_n18173_ = OR ( new_n14660_, new_n5091_ ) -new_n18174_ = OR ( new_n14814_, new_n5076_ ) -new_n18175_ = NAND ( new_n18174_, new_n18173_, new_n18172_, new_n18171_ ) -new_n18176_ = OR ( new_n14648_, new_n5100_ ) -new_n18177_ = OR ( new_n14805_, new_n5096_ ) -new_n18178_ = OR ( new_n14801_, new_n5098_ ) -new_n18179_ = OR ( new_n14672_, new_n5105_ ) -new_n18180_ = OR ( new_n14674_, new_n5107_ ) -new_n18181_ = OR ( new_n14811_, new_n5109_ ) -new_n18182_ = OR ( new_n14803_, new_n5094_ ) -new_n18183_ = NAND ( new_n18182_, new_n18181_, new_n18180_, new_n18179_ ) -new_n18184_ = OR ( new_n14816_, new_n5078_ ) -new_n18185_ = OR ( new_n14818_, new_n5080_ ) -new_n18186_ = OR ( new_n14682_, new_n5082_ ) -new_n18187_ = OR ( new_n14670_, new_n5103_ ) -new_n18188_ = NAND ( new_n18187_, new_n18186_, new_n18185_, new_n18184_ ) -new_n18189_ = NOR ( new_n18188_, new_n18183_ ) -new_n18190_ = NAND ( new_n18189_, new_n18178_, new_n18177_, new_n18176_ ) -new_n18191_ = OR ( new_n18190_, new_n18175_, new_n18170_, new_n14637_ ) -new_n18192_ = OR ( new_n14692_, new_n5076_ ) -new_n18193_ = OR ( new_n14695_, new_n5078_ ) -new_n18194_ = OR ( new_n14698_, new_n5080_ ) -new_n18195_ = OR ( new_n14722_, new_n5082_ ) -new_n18196_ = NAND ( new_n18195_, new_n18194_, new_n18193_, new_n18192_ ) -new_n18197_ = OR ( new_n14704_, new_n5085_ ) -new_n18198_ = OR ( new_n14706_, new_n5087_ ) -new_n18199_ = OR ( new_n14708_, new_n5089_ ) -new_n18200_ = OR ( new_n14689_, new_n5091_ ) -new_n18201_ = NAND ( new_n18200_, new_n18199_, new_n18198_, new_n18197_ ) -new_n18202_ = OR ( new_n14714_, new_n5094_ ) -new_n18203_ = OR ( new_n14716_, new_n5096_ ) -new_n18204_ = OR ( new_n14718_, new_n5098_ ) -new_n18205_ = OR ( new_n14702_, new_n5100_ ) -new_n18206_ = NAND ( new_n18205_, new_n18204_, new_n18203_, new_n18202_ ) -new_n18207_ = OR ( new_n14724_, new_n5103_ ) -new_n18208_ = OR ( new_n14726_, new_n5105_ ) -new_n18209_ = OR ( new_n14728_, new_n5107_ ) -new_n18210_ = OR ( new_n14712_, new_n5109_ ) -new_n18211_ = NAND ( new_n18210_, new_n18209_, new_n18208_, new_n18207_ ) -new_n18212_ = NOR ( new_n18211_, new_n18206_, new_n18201_, new_n18196_ ) -new_n18213_ = OR ( new_n18212_, new_n14629_ ) -new_n18214_ = OR ( new_n14738_, new_n5076_ ) -new_n18215_ = OR ( new_n14741_, new_n5078_ ) -new_n18216_ = OR ( new_n14743_, new_n5080_ ) -new_n18217_ = OR ( new_n14769_, new_n5082_ ) -new_n18218_ = NAND ( new_n18217_, new_n18216_, new_n18215_, new_n18214_ ) -new_n18219_ = OR ( new_n14751_, new_n5085_ ) -new_n18220_ = OR ( new_n14753_, new_n5087_ ) -new_n18221_ = OR ( new_n14755_, new_n5089_ ) -new_n18222_ = OR ( new_n14735_, new_n5091_ ) -new_n18223_ = NAND ( new_n18222_, new_n18221_, new_n18220_, new_n18219_ ) -new_n18224_ = OR ( new_n14761_, new_n5094_ ) -new_n18225_ = OR ( new_n14764_, new_n5096_ ) -new_n18226_ = OR ( new_n14766_, new_n5098_ ) -new_n18227_ = OR ( new_n14748_, new_n5100_ ) -new_n18228_ = NAND ( new_n18227_, new_n18226_, new_n18225_, new_n18224_ ) -new_n18229_ = OR ( new_n14771_, new_n5103_ ) -new_n18230_ = OR ( new_n14773_, new_n5105_ ) -new_n18231_ = OR ( new_n14775_, new_n5107_ ) -new_n18232_ = OR ( new_n14759_, new_n5109_ ) -new_n18233_ = NAND ( new_n18232_, new_n18231_, new_n18230_, new_n18229_ ) -new_n18234_ = NOR ( new_n18233_, new_n18228_, new_n18223_, new_n18218_ ) -new_n18235_ = OR ( new_n18234_, new_n7073_ ) -new_n18236_ = OR ( new_n14628_, new_n5112_ ) -new_n18237_ = NAND ( new_n18236_, new_n18235_, new_n18213_, new_n18191_ ) -new_n18238_ = XNOR ( new_n18237_, new_n14637_ ) -new_n18239_ = OR ( new_n14631_, new_n12909_ ) -new_n18240_ = OR ( new_n12909_, new_n7073_ ) -new_n18241_ = OR ( new_n14637_, new_n12895_ ) -new_n18242_ = NOT ( NET_1413 ) -new_n18243_ = OR ( new_n14640_, new_n18242_ ) -new_n18244_ = NAND ( new_n14642_, NET_1222 ) -new_n18245_ = AND ( new_n18244_, new_n18243_, new_n18241_ ) -new_n18246_ = NAND ( new_n18245_, new_n18240_, new_n18239_ ) -new_n18247_ = OR ( new_n18246_, new_n18238_ ) -new_n18248_ = NAND ( new_n18246_, new_n18238_ ) -new_n18249_ = NAND ( new_n18248_, new_n18247_ ) -new_n18250_ = NAND ( new_n17760_, new_n17754_ ) -new_n18251_ = XOR ( new_n18250_, new_n18249_ ) -new_n18252_ = NOR ( new_n18251_, new_n14894_ ) -new_n18253_ = NOR ( new_n14897_, new_n12909_ ) -new_n18254_ = OR ( new_n14900_, new_n12895_ ) -new_n18255_ = OR ( new_n14902_, new_n12883_ ) -new_n18256_ = OR ( new_n14891_, new_n12877_ ) -new_n18257_ = OR ( new_n14905_, new_n18242_ ) -new_n18258_ = NAND ( new_n18257_, new_n18256_, new_n18255_, new_n18254_ ) -NET_21858 = OR ( new_n18258_, new_n18253_, new_n18252_ ) -new_n18260_ = NOR ( new_n18251_, new_n14911_ ) -new_n18261_ = OR ( new_n14913_, new_n12909_ ) -new_n18262_ = OR ( new_n14915_, new_n12895_ ) -new_n18263_ = OR ( new_n14917_, new_n18242_ ) -new_n18264_ = OR ( new_n14910_, new_n12898_ ) -new_n18265_ = NAND ( new_n18264_, new_n18263_, new_n18262_, new_n18261_ ) -NET_21859 = OR ( new_n18265_, new_n18260_ ) -new_n18267_ = OR ( new_n18251_, new_n14928_ ) -new_n18268_ = OR ( new_n14930_, new_n12895_ ) -new_n18269_ = NAND ( new_n14927_, NET_1349 ) -new_n18270_ = NAND ( new_n14933_, new_n6294_ ) -NET_21860 = NAND ( new_n18270_, new_n18269_, new_n18268_, new_n18267_ ) -new_n18272_ = NOT ( NET_1235 ) -new_n18273_ = NOR ( new_n4668_, new_n18272_ ) -new_n18274_ = OR ( new_n11042_, new_n5027_ ) -new_n18275_ = OR ( new_n10959_, new_n5029_ ) -new_n18276_ = OR ( new_n10877_, new_n5031_ ) -new_n18277_ = OR ( new_n10795_, new_n5033_ ) -new_n18278_ = NAND ( new_n18277_, new_n18276_, new_n18275_, new_n18274_ ) -new_n18279_ = OR ( new_n11372_, new_n5036_ ) -new_n18280_ = OR ( new_n11290_, new_n5038_ ) -new_n18281_ = OR ( new_n11208_, new_n5040_ ) -new_n18282_ = OR ( new_n11124_, new_n5042_ ) -new_n18283_ = NAND ( new_n18282_, new_n18281_, new_n18280_, new_n18279_ ) -new_n18284_ = OR ( new_n10379_, new_n5045_ ) -new_n18285_ = OR ( new_n10296_, new_n5047_ ) -new_n18286_ = OR ( new_n10101_, new_n5049_ ) -new_n18287_ = OR ( new_n11454_, new_n5051_ ) -new_n18288_ = NAND ( new_n18287_, new_n18286_, new_n18285_, new_n18284_ ) -new_n18289_ = OR ( new_n10713_, new_n5054_ ) -new_n18290_ = OR ( new_n10631_, new_n5056_ ) -new_n18291_ = OR ( new_n10548_, new_n5058_ ) -new_n18292_ = OR ( new_n10464_, new_n5060_ ) -new_n18293_ = NAND ( new_n18292_, new_n18291_, new_n18290_, new_n18289_ ) -new_n18294_ = NOR ( new_n18293_, new_n18288_, new_n18283_, new_n18278_ ) -new_n18295_ = NOR ( new_n18294_, new_n5185_ ) -new_n18296_ = XNOR ( new_n18295_, new_n18273_ ) -new_n18297_ = OR ( new_n17811_, new_n17806_ ) -new_n18298_ = NAND ( new_n18297_, new_n17784_ ) -new_n18299_ = NAND ( new_n17811_, new_n17806_ ) -new_n18300_ = NAND ( new_n18299_, new_n18298_ ) -new_n18301_ = XOR ( new_n18300_, new_n18296_ ) -new_n18302_ = NOR ( new_n18301_, new_n7114_ ) -new_n18303_ = NAND ( new_n7048_, NET_1235 ) -new_n18304_ = NOT ( NET_1394 ) -new_n18305_ = OR ( new_n7112_, new_n18304_ ) -new_n18306_ = NAND ( new_n7015_, NET_1267 ) -new_n18307_ = NAND ( new_n7124_, NET_1362 ) -new_n18308_ = NAND ( new_n18307_, new_n18306_, new_n18305_, new_n18303_ ) -new_n18309_ = NOR ( new_n18308_, new_n18302_ ) -new_n18310_ = XOR ( new_n18309_, new_n6196_ ) -new_n18311_ = OR ( new_n18310_, new_n17825_ ) -new_n18312_ = NAND ( new_n18310_, new_n17825_ ) -new_n18313_ = NAND ( new_n18312_, new_n18311_ ) -new_n18314_ = OR ( new_n18313_, new_n11859_ ) -new_n18315_ = NAND ( new_n11876_, NET_1235 ) -new_n18316_ = NOT ( NET_1267 ) -new_n18317_ = OR ( new_n7148_, new_n18316_ ) -new_n18318_ = NAND ( new_n6196_, NET_1426 ) -new_n18319_ = NAND ( new_n18318_, new_n18317_, new_n18315_, new_n18314_ ) -new_n18320_ = XNOR ( new_n18319_, new_n7027_ ) -new_n18321_ = NOR ( new_n16443_, new_n7026_ ) -new_n18322_ = NOR ( new_n18321_, new_n18320_ ) -new_n18323_ = AND ( new_n18321_, new_n18320_ ) -new_n18324_ = NOR ( new_n18323_, new_n18322_ ) -new_n18325_ = NOR ( new_n17840_, new_n17836_ ) -new_n18326_ = NOR ( new_n18325_, new_n17837_ ) -new_n18327_ = XOR ( new_n18326_, new_n18324_ ) -new_n18328_ = OR ( new_n18327_, new_n11851_ ) -new_n18329_ = OR ( new_n18313_, new_n11911_ ) -new_n18330_ = NAND ( new_n11849_, NET_1394 ) -NET_21861 = NAND ( new_n18330_, new_n18329_, new_n18328_ ) -new_n18332_ = OR ( new_n12977_, new_n12964_ ) -new_n18333_ = NAND ( new_n12977_, new_n12964_ ) -new_n18334_ = NAND ( new_n18333_, new_n18332_, new_n6591_ ) -new_n18335_ = NOT ( new_n18334_ ) -new_n18336_ = OR ( new_n14015_, new_n12977_ ) -new_n18337_ = OR ( new_n14021_, new_n12969_ ) -new_n18338_ = NOT ( NET_516 ) -new_n18339_ = OR ( new_n14024_, new_n18338_ ) -new_n18340_ = NAND ( new_n14026_, NET_325 ) -new_n18341_ = NAND ( new_n18340_, new_n18339_, new_n18337_, new_n18336_ ) -new_n18342_ = NOR ( new_n18341_, new_n18335_ ) -new_n18343_ = XOR ( new_n18342_, new_n14020_ ) -new_n18344_ = NAND ( new_n17926_, new_n17923_ ) -new_n18345_ = NAND ( new_n18344_, new_n17924_ ) -new_n18346_ = XOR ( new_n18345_, new_n18343_ ) -new_n18347_ = NOR ( new_n18346_, new_n14278_ ) -new_n18348_ = NOR ( new_n14281_, new_n12977_ ) -new_n18349_ = OR ( new_n14284_, new_n12969_ ) -new_n18350_ = OR ( new_n14286_, new_n12919_ ) -new_n18351_ = OR ( new_n14275_, new_n12916_ ) -new_n18352_ = OR ( new_n14289_, new_n18338_ ) -new_n18353_ = NAND ( new_n18352_, new_n18351_, new_n18350_, new_n18349_ ) -NET_21910 = OR ( new_n18353_, new_n18348_, new_n18347_ ) -new_n18355_ = NOR ( new_n18346_, new_n14295_ ) -new_n18356_ = OR ( new_n14297_, new_n12977_ ) -new_n18357_ = OR ( new_n14299_, new_n12969_ ) -new_n18358_ = OR ( new_n14301_, new_n18338_ ) -new_n18359_ = OR ( new_n14294_, new_n12972_ ) -new_n18360_ = NAND ( new_n18359_, new_n18358_, new_n18357_, new_n18356_ ) -NET_21911 = OR ( new_n18360_, new_n18355_ ) -new_n18362_ = OR ( new_n18346_, new_n14312_ ) -new_n18363_ = OR ( new_n14314_, new_n12969_ ) -new_n18364_ = OR ( new_n14317_, new_n5569_ ) -new_n18365_ = NAND ( new_n14311_, NET_452 ) -NET_21912 = NAND ( new_n18365_, new_n18364_, new_n18363_, new_n18362_ ) -new_n18367_ = OR ( new_n13045_, new_n13032_ ) -new_n18368_ = NAND ( new_n13045_, new_n13032_ ) -new_n18369_ = NAND ( new_n18368_, new_n18367_, new_n6636_ ) -new_n18370_ = NOT ( new_n18369_ ) -new_n18371_ = OR ( new_n14323_, new_n13045_ ) -new_n18372_ = OR ( new_n14329_, new_n13037_ ) -new_n18373_ = NOT ( NET_965 ) -new_n18374_ = OR ( new_n14332_, new_n18373_ ) -new_n18375_ = NAND ( new_n14334_, NET_774 ) -new_n18376_ = NAND ( new_n18375_, new_n18374_, new_n18372_, new_n18371_ ) -new_n18377_ = NOR ( new_n18376_, new_n18370_ ) -new_n18378_ = XOR ( new_n18377_, new_n14328_ ) -new_n18379_ = NAND ( new_n18088_, new_n18085_ ) -new_n18380_ = NAND ( new_n18379_, new_n18086_ ) -new_n18381_ = XOR ( new_n18380_, new_n18378_ ) -new_n18382_ = NOR ( new_n18381_, new_n14586_ ) -new_n18383_ = NOR ( new_n14589_, new_n13045_ ) -new_n18384_ = OR ( new_n14592_, new_n13037_ ) -new_n18385_ = OR ( new_n14594_, new_n12987_ ) -new_n18386_ = OR ( new_n14583_, new_n12984_ ) -new_n18387_ = OR ( new_n14597_, new_n18373_ ) -new_n18388_ = NAND ( new_n18387_, new_n18386_, new_n18385_, new_n18384_ ) -NET_21925 = OR ( new_n18388_, new_n18383_, new_n18382_ ) -new_n18390_ = NOR ( new_n18381_, new_n14603_ ) -new_n18391_ = OR ( new_n14605_, new_n13045_ ) -new_n18392_ = OR ( new_n14607_, new_n13037_ ) -new_n18393_ = OR ( new_n14609_, new_n18373_ ) -new_n18394_ = OR ( new_n14602_, new_n13040_ ) -new_n18395_ = NAND ( new_n18394_, new_n18393_, new_n18392_, new_n18391_ ) -NET_21926 = OR ( new_n18395_, new_n18390_ ) -new_n18397_ = OR ( new_n18381_, new_n14620_ ) -new_n18398_ = OR ( new_n14622_, new_n13037_ ) -new_n18399_ = NAND ( new_n14625_, new_n5909_ ) -new_n18400_ = NAND ( new_n14619_, NET_901 ) -NET_21927 = NAND ( new_n18400_, new_n18399_, new_n18398_, new_n18397_ ) -new_n18402_ = OR ( new_n13113_, new_n13100_ ) -new_n18403_ = NAND ( new_n13113_, new_n13100_ ) -new_n18404_ = NAND ( new_n18403_, new_n18402_, new_n6681_ ) -new_n18405_ = NOT ( new_n18404_ ) -new_n18406_ = OR ( new_n14631_, new_n13113_ ) -new_n18407_ = OR ( new_n14637_, new_n13105_ ) -new_n18408_ = NOT ( NET_1414 ) -new_n18409_ = OR ( new_n14640_, new_n18408_ ) -new_n18410_ = NAND ( new_n14642_, NET_1223 ) -new_n18411_ = NAND ( new_n18410_, new_n18409_, new_n18407_, new_n18406_ ) -new_n18412_ = NOR ( new_n18411_, new_n18405_ ) -new_n18413_ = XOR ( new_n18412_, new_n14636_ ) -new_n18414_ = NAND ( new_n18250_, new_n18247_ ) -new_n18415_ = NAND ( new_n18414_, new_n18248_ ) -new_n18416_ = XOR ( new_n18415_, new_n18413_ ) -new_n18417_ = NOR ( new_n18416_, new_n14894_ ) -new_n18418_ = NOR ( new_n14897_, new_n13113_ ) -new_n18419_ = OR ( new_n14900_, new_n13105_ ) -new_n18420_ = OR ( new_n14902_, new_n13055_ ) -new_n18421_ = OR ( new_n14891_, new_n13052_ ) -new_n18422_ = OR ( new_n14905_, new_n18408_ ) -new_n18423_ = NAND ( new_n18422_, new_n18421_, new_n18420_, new_n18419_ ) -NET_21941 = OR ( new_n18423_, new_n18418_, new_n18417_ ) -new_n18425_ = NOR ( new_n18416_, new_n14911_ ) -new_n18426_ = OR ( new_n14913_, new_n13113_ ) -new_n18427_ = OR ( new_n14915_, new_n13105_ ) -new_n18428_ = OR ( new_n14917_, new_n18408_ ) -new_n18429_ = OR ( new_n14910_, new_n13108_ ) -new_n18430_ = NAND ( new_n18429_, new_n18428_, new_n18427_, new_n18426_ ) -NET_21942 = OR ( new_n18430_, new_n18425_ ) -new_n18432_ = OR ( new_n18416_, new_n14928_ ) -new_n18433_ = OR ( new_n14930_, new_n13105_ ) -new_n18434_ = NAND ( new_n14933_, new_n6286_ ) -new_n18435_ = NAND ( new_n14927_, NET_1350 ) -NET_21943 = NAND ( new_n18435_, new_n18434_, new_n18433_, new_n18432_ ) -new_n18437_ = NOT ( NET_338 ) -new_n18438_ = OR ( new_n3179_, new_n18437_ ) -new_n18439_ = OR ( new_n8104_, new_n3093_ ) -new_n18440_ = OR ( new_n8021_, new_n3095_ ) -new_n18441_ = OR ( new_n7939_, new_n3298_ ) -new_n18442_ = OR ( new_n7857_, new_n3098_ ) -new_n18443_ = NAND ( new_n18442_, new_n18441_, new_n18440_, new_n18439_ ) -new_n18444_ = OR ( new_n8434_, new_n3302_ ) -new_n18445_ = OR ( new_n8352_, new_n3304_ ) -new_n18446_ = OR ( new_n8270_, new_n3306_ ) -new_n18447_ = OR ( new_n8186_, new_n3104_ ) -new_n18448_ = NAND ( new_n18447_, new_n18446_, new_n18445_, new_n18444_ ) -new_n18449_ = OR ( new_n7441_, new_n3310_ ) -new_n18450_ = OR ( new_n7358_, new_n3312_ ) -new_n18451_ = OR ( new_n7203_, new_n3109_ ) -new_n18452_ = OR ( new_n8516_, new_n3111_ ) -new_n18453_ = NAND ( new_n18452_, new_n18451_, new_n18450_, new_n18449_ ) -new_n18454_ = OR ( new_n7775_, new_n3114_ ) -new_n18455_ = OR ( new_n7693_, new_n3116_ ) -new_n18456_ = OR ( new_n7610_, new_n3319_ ) -new_n18457_ = OR ( new_n7526_, new_n3321_ ) -new_n18458_ = NAND ( new_n18457_, new_n18456_, new_n18455_, new_n18454_ ) -new_n18459_ = NOR ( new_n18458_, new_n18453_, new_n18448_, new_n18443_ ) -new_n18460_ = NOR ( new_n18459_, new_n3696_ ) -new_n18461_ = XOR ( new_n18460_, new_n18438_ ) -new_n18462_ = OR ( new_n17976_, new_n17971_ ) -new_n18463_ = NAND ( new_n18462_, new_n17949_ ) -new_n18464_ = NAND ( new_n17976_, new_n17971_ ) -new_n18465_ = NAND ( new_n18464_, new_n18463_ ) -new_n18466_ = XOR ( new_n18465_, new_n18461_ ) -new_n18467_ = NOR ( new_n18466_, new_n6794_ ) -new_n18468_ = NAND ( new_n6728_, NET_338 ) -new_n18469_ = NOT ( NET_497 ) -new_n18470_ = OR ( new_n6792_, new_n18469_ ) -new_n18471_ = NAND ( new_n6695_, NET_370 ) -new_n18472_ = NAND ( new_n6804_, NET_465 ) -new_n18473_ = NAND ( new_n18472_, new_n18471_, new_n18470_, new_n18468_ ) -new_n18474_ = NOR ( new_n18473_, new_n18467_ ) -new_n18475_ = XNOR ( new_n18474_, new_n5529_ ) -new_n18476_ = XOR ( new_n18475_, new_n17987_ ) -new_n18477_ = OR ( new_n18476_, new_n11723_ ) -new_n18478_ = NAND ( new_n11740_, NET_338 ) -new_n18479_ = NOT ( NET_370 ) -new_n18480_ = OR ( new_n6828_, new_n18479_ ) -new_n18481_ = NAND ( new_n5529_, NET_529 ) -new_n18482_ = NAND ( new_n18481_, new_n18480_, new_n18478_, new_n18477_ ) -new_n18483_ = XNOR ( new_n18482_, new_n6707_ ) -new_n18484_ = NOR ( new_n16720_, new_n6706_ ) -new_n18485_ = NOR ( new_n18484_, new_n18483_ ) -new_n18486_ = AND ( new_n18484_, new_n18483_ ) -new_n18487_ = NOR ( new_n18486_, new_n18485_ ) -new_n18488_ = NOR ( new_n18002_, new_n17998_ ) -new_n18489_ = NOR ( new_n18488_, new_n17999_ ) -new_n18490_ = XOR ( new_n18489_, new_n18487_ ) -new_n18491_ = OR ( new_n18490_, new_n11715_ ) -new_n18492_ = OR ( new_n18476_, new_n11775_ ) -new_n18493_ = NAND ( new_n11713_, NET_497 ) -NET_21997 = NAND ( new_n18493_, new_n18492_, new_n18491_ ) -new_n18495_ = NOT ( NET_787 ) -new_n18496_ = OR ( new_n3924_, new_n18495_ ) -new_n18497_ = OR ( new_n9572_, new_n3838_ ) -new_n18498_ = OR ( new_n9489_, new_n3840_ ) -new_n18499_ = OR ( new_n9407_, new_n4043_ ) -new_n18500_ = OR ( new_n9325_, new_n3843_ ) -new_n18501_ = NAND ( new_n18500_, new_n18499_, new_n18498_, new_n18497_ ) -new_n18502_ = OR ( new_n9902_, new_n4047_ ) -new_n18503_ = OR ( new_n9820_, new_n4049_ ) -new_n18504_ = OR ( new_n9738_, new_n4051_ ) -new_n18505_ = OR ( new_n9654_, new_n3849_ ) -new_n18506_ = NAND ( new_n18505_, new_n18504_, new_n18503_, new_n18502_ ) -new_n18507_ = OR ( new_n8909_, new_n4055_ ) -new_n18508_ = OR ( new_n8826_, new_n4057_ ) -new_n18509_ = OR ( new_n8633_, new_n3854_ ) -new_n18510_ = OR ( new_n9984_, new_n3856_ ) -new_n18511_ = NAND ( new_n18510_, new_n18509_, new_n18508_, new_n18507_ ) -new_n18512_ = OR ( new_n9243_, new_n3859_ ) -new_n18513_ = OR ( new_n9161_, new_n3861_ ) -new_n18514_ = OR ( new_n9078_, new_n4064_ ) -new_n18515_ = OR ( new_n8994_, new_n4066_ ) -new_n18516_ = NAND ( new_n18515_, new_n18514_, new_n18513_, new_n18512_ ) -new_n18517_ = NOR ( new_n18516_, new_n18511_, new_n18506_, new_n18501_ ) -new_n18518_ = NOR ( new_n18517_, new_n4441_ ) -new_n18519_ = XOR ( new_n18518_, new_n18496_ ) -new_n18520_ = OR ( new_n18138_, new_n18133_ ) -new_n18521_ = NAND ( new_n18520_, new_n18111_ ) -new_n18522_ = NAND ( new_n18138_, new_n18133_ ) -new_n18523_ = NAND ( new_n18522_, new_n18521_ ) -new_n18524_ = XOR ( new_n18523_, new_n18519_ ) -new_n18525_ = NOR ( new_n18524_, new_n6954_ ) -new_n18526_ = NAND ( new_n6888_, NET_787 ) -new_n18527_ = NOT ( NET_946 ) -new_n18528_ = OR ( new_n6952_, new_n18527_ ) -new_n18529_ = NAND ( new_n6855_, NET_819 ) -new_n18530_ = NAND ( new_n6964_, NET_914 ) -new_n18531_ = NAND ( new_n18530_, new_n18529_, new_n18528_, new_n18526_ ) -new_n18532_ = NOR ( new_n18531_, new_n18525_ ) -new_n18533_ = XNOR ( new_n18532_, new_n5827_ ) -new_n18534_ = XOR ( new_n18533_, new_n18149_ ) -new_n18535_ = OR ( new_n18534_, new_n11791_ ) -new_n18536_ = NAND ( new_n11808_, NET_787 ) -new_n18537_ = NOT ( NET_819 ) -new_n18538_ = OR ( new_n6988_, new_n18537_ ) -new_n18539_ = NAND ( new_n5827_, NET_978 ) -new_n18540_ = NAND ( new_n18539_, new_n18538_, new_n18536_, new_n18535_ ) -new_n18541_ = XNOR ( new_n18540_, new_n6867_ ) -new_n18542_ = NOR ( new_n16883_, new_n6866_ ) -new_n18543_ = NOR ( new_n18542_, new_n18541_ ) -new_n18544_ = AND ( new_n18542_, new_n18541_ ) -new_n18545_ = NOR ( new_n18544_, new_n18543_ ) -new_n18546_ = NOR ( new_n18164_, new_n18160_ ) -new_n18547_ = NOR ( new_n18546_, new_n18161_ ) -new_n18548_ = XOR ( new_n18547_, new_n18545_ ) -new_n18549_ = OR ( new_n18548_, new_n11783_ ) -new_n18550_ = OR ( new_n18534_, new_n11843_ ) -new_n18551_ = NAND ( new_n11781_, NET_946 ) -NET_22008 = NAND ( new_n18551_, new_n18550_, new_n18549_ ) -new_n18553_ = NOT ( NET_1236 ) -new_n18554_ = OR ( new_n4668_, new_n18553_ ) -new_n18555_ = OR ( new_n11042_, new_n4582_ ) -new_n18556_ = OR ( new_n10959_, new_n4584_ ) -new_n18557_ = OR ( new_n10877_, new_n4787_ ) -new_n18558_ = OR ( new_n10795_, new_n4587_ ) -new_n18559_ = NAND ( new_n18558_, new_n18557_, new_n18556_, new_n18555_ ) -new_n18560_ = OR ( new_n11372_, new_n4791_ ) -new_n18561_ = OR ( new_n11290_, new_n4793_ ) -new_n18562_ = OR ( new_n11208_, new_n4795_ ) -new_n18563_ = OR ( new_n11124_, new_n4593_ ) -new_n18564_ = NAND ( new_n18563_, new_n18562_, new_n18561_, new_n18560_ ) -new_n18565_ = OR ( new_n10379_, new_n4799_ ) -new_n18566_ = OR ( new_n10296_, new_n4801_ ) -new_n18567_ = OR ( new_n10101_, new_n4598_ ) -new_n18568_ = OR ( new_n11454_, new_n4600_ ) -new_n18569_ = NAND ( new_n18568_, new_n18567_, new_n18566_, new_n18565_ ) -new_n18570_ = OR ( new_n10713_, new_n4603_ ) -new_n18571_ = OR ( new_n10631_, new_n4605_ ) -new_n18572_ = OR ( new_n10548_, new_n4808_ ) -new_n18573_ = OR ( new_n10464_, new_n4810_ ) -new_n18574_ = NAND ( new_n18573_, new_n18572_, new_n18571_, new_n18570_ ) -new_n18575_ = NOR ( new_n18574_, new_n18569_, new_n18564_, new_n18559_ ) -new_n18576_ = NOR ( new_n18575_, new_n5185_ ) -new_n18577_ = XOR ( new_n18576_, new_n18554_ ) -new_n18578_ = OR ( new_n18300_, new_n18295_ ) -new_n18579_ = NAND ( new_n18578_, new_n18273_ ) -new_n18580_ = NAND ( new_n18300_, new_n18295_ ) -new_n18581_ = NAND ( new_n18580_, new_n18579_ ) -new_n18582_ = XOR ( new_n18581_, new_n18577_ ) -new_n18583_ = NOR ( new_n18582_, new_n7114_ ) -new_n18584_ = NAND ( new_n7048_, NET_1236 ) -new_n18585_ = NOT ( NET_1395 ) -new_n18586_ = OR ( new_n7112_, new_n18585_ ) -new_n18587_ = NAND ( new_n7015_, NET_1268 ) -new_n18588_ = NAND ( new_n7124_, NET_1363 ) -new_n18589_ = NAND ( new_n18588_, new_n18587_, new_n18586_, new_n18584_ ) -new_n18590_ = NOR ( new_n18589_, new_n18583_ ) -new_n18591_ = XNOR ( new_n18590_, new_n6196_ ) -new_n18592_ = XOR ( new_n18591_, new_n18311_ ) -new_n18593_ = OR ( new_n18592_, new_n11859_ ) -new_n18594_ = NAND ( new_n11876_, NET_1236 ) -new_n18595_ = NOT ( NET_1268 ) -new_n18596_ = OR ( new_n7148_, new_n18595_ ) -new_n18597_ = NAND ( new_n6196_, NET_1427 ) -new_n18598_ = NAND ( new_n18597_, new_n18596_, new_n18594_, new_n18593_ ) -new_n18599_ = XNOR ( new_n18598_, new_n7027_ ) -new_n18600_ = NOR ( new_n17046_, new_n7026_ ) -new_n18601_ = NOR ( new_n18600_, new_n18599_ ) -new_n18602_ = AND ( new_n18600_, new_n18599_ ) -new_n18603_ = NOR ( new_n18602_, new_n18601_ ) -new_n18604_ = NOR ( new_n18326_, new_n18322_ ) -new_n18605_ = NOR ( new_n18604_, new_n18323_ ) -new_n18606_ = XOR ( new_n18605_, new_n18603_ ) -new_n18607_ = OR ( new_n18606_, new_n11851_ ) -new_n18608_ = OR ( new_n18592_, new_n11911_ ) -new_n18609_ = NAND ( new_n11849_, NET_1395 ) -NET_22020 = NAND ( new_n18609_, new_n18608_, new_n18607_ ) -new_n18611_ = OR ( new_n3179_, NET_347 ) -new_n18612_ = NOR ( new_n12043_, new_n2967_ ) -new_n18613_ = NOR ( new_n18612_, new_n2971_ ) -new_n18614_ = NAND ( new_n12543_, new_n12347_ ) -new_n18615_ = NOT ( new_n18614_ ) -new_n18616_ = NAND ( new_n18615_, new_n18613_ ) -new_n18617_ = OR ( new_n18616_, new_n3596_ ) -new_n18618_ = NOT ( new_n2991_ ) -new_n18619_ = OR ( new_n18614_, new_n18618_ ) -new_n18620_ = OR ( new_n18619_, new_n3598_ ) -new_n18621_ = AND ( new_n18612_, NET_311 ) -new_n18622_ = NAND ( new_n18621_, new_n18615_ ) -new_n18623_ = OR ( new_n18622_, new_n3600_ ) -new_n18624_ = NOT ( new_n12347_ ) -new_n18625_ = NAND ( new_n12543_, new_n18624_ ) -new_n18626_ = OR ( new_n18625_, new_n12041_ ) -new_n18627_ = OR ( new_n18626_, new_n3602_ ) -new_n18628_ = NOT ( new_n18625_ ) -new_n18629_ = NAND ( new_n18628_, new_n18613_ ) -new_n18630_ = OR ( new_n18629_, new_n3587_ ) -new_n18631_ = AND ( new_n18630_, new_n18627_, new_n18623_, new_n18620_ ) -new_n18632_ = OR ( new_n18614_, new_n12041_ ) -new_n18633_ = OR ( new_n18632_, new_n3611_ ) -new_n18634_ = NOR ( new_n12543_, new_n12347_ ) -new_n18635_ = NAND ( new_n18634_, new_n2991_ ) -new_n18636_ = OR ( new_n18635_, new_n3607_ ) -new_n18637_ = NAND ( new_n18634_, new_n18621_ ) -new_n18638_ = OR ( new_n18637_, new_n3609_ ) -new_n18639_ = NAND ( new_n18638_, new_n18636_, new_n18633_ ) -new_n18640_ = NOR ( new_n12543_, new_n18624_ ) -new_n18641_ = NAND ( new_n18640_, new_n2991_ ) -new_n18642_ = OR ( new_n18641_, new_n3616_ ) -new_n18643_ = NAND ( new_n18640_, new_n18621_ ) -new_n18644_ = OR ( new_n18643_, new_n3618_ ) -new_n18645_ = NAND ( new_n18634_, new_n2981_ ) -new_n18646_ = OR ( new_n18645_, new_n3620_ ) -new_n18647_ = NAND ( new_n18634_, new_n18613_ ) -new_n18648_ = OR ( new_n18647_, new_n3605_ ) -new_n18649_ = NAND ( new_n18648_, new_n18646_, new_n18644_, new_n18642_ ) -new_n18650_ = OR ( new_n18625_, new_n18618_ ) -new_n18651_ = OR ( new_n18650_, new_n3589_ ) -new_n18652_ = NAND ( new_n18628_, new_n18621_ ) -new_n18653_ = OR ( new_n18652_, new_n3591_ ) -new_n18654_ = NAND ( new_n18640_, new_n2981_ ) -new_n18655_ = OR ( new_n18654_, new_n3593_ ) -new_n18656_ = NAND ( new_n18640_, new_n18613_ ) -new_n18657_ = OR ( new_n18656_, new_n3614_ ) -new_n18658_ = NAND ( new_n18657_, new_n18655_, new_n18653_, new_n18651_ ) -new_n18659_ = NOR ( new_n18658_, new_n18649_, new_n18639_ ) -new_n18660_ = NAND ( new_n18659_, new_n18631_, new_n18617_, new_n3179_ ) -new_n18661_ = NAND ( new_n18660_, new_n18611_ ) -new_n18662_ = OR ( new_n3179_, NET_346 ) -new_n18663_ = OR ( new_n18616_, new_n3040_ ) -new_n18664_ = OR ( new_n18619_, new_n3042_ ) -new_n18665_ = OR ( new_n18622_, new_n3044_ ) -new_n18666_ = OR ( new_n18626_, new_n3046_ ) -new_n18667_ = OR ( new_n18629_, new_n3031_ ) -new_n18668_ = AND ( new_n18667_, new_n18666_, new_n18665_, new_n18664_ ) -new_n18669_ = OR ( new_n18632_, new_n3056_ ) -new_n18670_ = OR ( new_n18635_, new_n3052_ ) -new_n18671_ = OR ( new_n18637_, new_n3054_ ) -new_n18672_ = NAND ( new_n18671_, new_n18670_, new_n18669_ ) -new_n18673_ = OR ( new_n18641_, new_n3061_ ) -new_n18674_ = OR ( new_n18643_, new_n3063_ ) -new_n18675_ = OR ( new_n18645_, new_n3065_ ) -new_n18676_ = OR ( new_n18647_, new_n3050_ ) -new_n18677_ = NAND ( new_n18676_, new_n18675_, new_n18674_, new_n18673_ ) -new_n18678_ = OR ( new_n18650_, new_n3033_ ) -new_n18679_ = OR ( new_n18652_, new_n3035_ ) -new_n18680_ = OR ( new_n18654_, new_n3037_ ) -new_n18681_ = OR ( new_n18656_, new_n3059_ ) -new_n18682_ = NAND ( new_n18681_, new_n18680_, new_n18679_, new_n18678_ ) -new_n18683_ = NOR ( new_n18682_, new_n18677_, new_n18672_ ) -new_n18684_ = NAND ( new_n18683_, new_n18668_, new_n18663_, new_n3179_ ) -new_n18685_ = NAND ( new_n18684_, new_n18662_ ) -new_n18686_ = NOR ( new_n3179_, NET_343 ) -new_n18687_ = NOR ( new_n18616_, new_n2985_ ) -new_n18688_ = OR ( new_n18619_, new_n2990_ ) -new_n18689_ = OR ( new_n18622_, new_n2994_ ) -new_n18690_ = OR ( new_n18626_, new_n2997_ ) -new_n18691_ = OR ( new_n18629_, new_n2965_ ) -new_n18692_ = NAND ( new_n18691_, new_n18690_, new_n18689_, new_n18688_ ) -new_n18693_ = OR ( new_n18692_, new_n18687_, new_n3696_ ) -new_n18694_ = OR ( new_n18632_, new_n3011_ ) -new_n18695_ = OR ( new_n18635_, new_n3005_ ) -new_n18696_ = OR ( new_n18637_, new_n3008_ ) -new_n18697_ = NAND ( new_n18696_, new_n18695_, new_n18694_ ) -new_n18698_ = OR ( new_n18641_, new_n3018_ ) -new_n18699_ = OR ( new_n18643_, new_n3021_ ) -new_n18700_ = OR ( new_n18645_, new_n3025_ ) -new_n18701_ = OR ( new_n18647_, new_n3001_ ) -new_n18702_ = NAND ( new_n18701_, new_n18700_, new_n18699_, new_n18698_ ) -new_n18703_ = OR ( new_n18650_, new_n2970_ ) -new_n18704_ = OR ( new_n18652_, new_n2974_ ) -new_n18705_ = OR ( new_n18654_, new_n2980_ ) -new_n18706_ = OR ( new_n18656_, new_n3015_ ) -new_n18707_ = NAND ( new_n18706_, new_n18705_, new_n18704_, new_n18703_ ) -new_n18708_ = NOR ( new_n18707_, new_n18702_, new_n18697_, new_n18693_ ) -new_n18709_ = NOR ( new_n18708_, new_n18686_ ) -new_n18710_ = NOR ( new_n3179_, NET_342 ) -new_n18711_ = NOR ( new_n18632_, new_n3188_ ) -new_n18712_ = OR ( new_n18616_, new_n3470_ ) -new_n18713_ = OR ( new_n18619_, new_n3472_ ) -new_n18714_ = OR ( new_n18622_, new_n3474_ ) -new_n18715_ = OR ( new_n18626_, new_n3180_ ) -new_n18716_ = NAND ( new_n18715_, new_n18714_, new_n18713_, new_n18712_ ) -new_n18717_ = OR ( new_n18637_, new_n3197_ ) -new_n18718_ = OR ( new_n18647_, new_n3479_ ) -new_n18719_ = OR ( new_n18635_, new_n3481_ ) -new_n18720_ = OR ( new_n18656_, new_n3202_ ) -new_n18721_ = OR ( new_n18641_, new_n3204_ ) -new_n18722_ = OR ( new_n18643_, new_n3488_ ) -new_n18723_ = OR ( new_n18645_, new_n3477_ ) -new_n18724_ = NAND ( new_n18723_, new_n18722_, new_n18721_, new_n18720_ ) -new_n18725_ = OR ( new_n18629_, new_n3182_ ) -new_n18726_ = OR ( new_n18650_, new_n3184_ ) -new_n18727_ = OR ( new_n18652_, new_n3466_ ) -new_n18728_ = OR ( new_n18654_, new_n3200_ ) -new_n18729_ = NAND ( new_n18728_, new_n18727_, new_n18726_, new_n18725_ ) -new_n18730_ = NOR ( new_n18729_, new_n18724_ ) -new_n18731_ = NAND ( new_n18730_, new_n18719_, new_n18718_, new_n18717_ ) -new_n18732_ = NOR ( new_n18731_, new_n18716_, new_n18711_, new_n3696_ ) -new_n18733_ = NOR ( new_n18732_, new_n18710_ ) -new_n18734_ = NOR ( new_n18465_, new_n18460_ ) -new_n18735_ = OR ( new_n18734_, new_n18438_ ) -new_n18736_ = NAND ( new_n18465_, new_n18460_ ) -new_n18737_ = NAND ( new_n18736_, new_n18735_ ) -new_n18738_ = OR ( new_n8104_, new_n3031_ ) -new_n18739_ = OR ( new_n8021_, new_n3033_ ) -new_n18740_ = OR ( new_n7939_, new_n3035_ ) -new_n18741_ = OR ( new_n7857_, new_n3037_ ) -new_n18742_ = NAND ( new_n18741_, new_n18740_, new_n18739_, new_n18738_ ) -new_n18743_ = OR ( new_n8434_, new_n3040_ ) -new_n18744_ = OR ( new_n8352_, new_n3042_ ) -new_n18745_ = OR ( new_n8270_, new_n3044_ ) -new_n18746_ = OR ( new_n8186_, new_n3046_ ) -new_n18747_ = NAND ( new_n18746_, new_n18745_, new_n18744_, new_n18743_ ) -new_n18748_ = OR ( new_n7441_, new_n3050_ ) -new_n18749_ = OR ( new_n7358_, new_n3052_ ) -new_n18750_ = OR ( new_n7203_, new_n3054_ ) -new_n18751_ = OR ( new_n8516_, new_n3056_ ) -new_n18752_ = NAND ( new_n18751_, new_n18750_, new_n18749_, new_n18748_ ) -new_n18753_ = OR ( new_n7775_, new_n3059_ ) -new_n18754_ = OR ( new_n7693_, new_n3061_ ) -new_n18755_ = OR ( new_n7610_, new_n3063_ ) -new_n18756_ = OR ( new_n7526_, new_n3065_ ) -new_n18757_ = NAND ( new_n18756_, new_n18755_, new_n18754_, new_n18753_ ) -new_n18758_ = NOR ( new_n18757_, new_n18752_, new_n18747_, new_n18742_ ) -new_n18759_ = NAND ( new_n18737_, new_n3696_, NET_339 ) -new_n18760_ = NOR ( new_n18758_, new_n3696_ ) -new_n18761_ = NAND ( new_n18760_, new_n18737_ ) -new_n18762_ = NAND ( new_n18761_, new_n18759_ ) -new_n18763_ = OR ( new_n8104_, new_n3587_ ) -new_n18764_ = OR ( new_n8021_, new_n3589_ ) -new_n18765_ = OR ( new_n7939_, new_n3591_ ) -new_n18766_ = OR ( new_n7857_, new_n3593_ ) -new_n18767_ = NAND ( new_n18766_, new_n18765_, new_n18764_, new_n18763_ ) -new_n18768_ = OR ( new_n8434_, new_n3596_ ) -new_n18769_ = OR ( new_n8352_, new_n3598_ ) -new_n18770_ = OR ( new_n8270_, new_n3600_ ) -new_n18771_ = OR ( new_n8186_, new_n3602_ ) -new_n18772_ = NAND ( new_n18771_, new_n18770_, new_n18769_, new_n18768_ ) -new_n18773_ = OR ( new_n7441_, new_n3605_ ) -new_n18774_ = OR ( new_n7358_, new_n3607_ ) -new_n18775_ = OR ( new_n7203_, new_n3609_ ) -new_n18776_ = OR ( new_n8516_, new_n3611_ ) -new_n18777_ = NAND ( new_n18776_, new_n18775_, new_n18774_, new_n18773_ ) -new_n18778_ = OR ( new_n7775_, new_n3614_ ) -new_n18779_ = OR ( new_n7693_, new_n3616_ ) -new_n18780_ = OR ( new_n7610_, new_n3618_ ) -new_n18781_ = OR ( new_n7526_, new_n3620_ ) -new_n18782_ = NAND ( new_n18781_, new_n18780_, new_n18779_, new_n18778_ ) -new_n18783_ = NOR ( new_n18782_, new_n18777_, new_n18772_, new_n18767_ ) -new_n18784_ = NOR ( new_n18783_, new_n3696_ ) -new_n18785_ = NAND ( new_n18784_, new_n18762_ ) -new_n18786_ = OR ( new_n18784_, new_n18762_ ) -new_n18787_ = NOR ( new_n3179_, NET_340 ) -new_n18788_ = NOR ( new_n18632_, new_n3159_ ) -new_n18789_ = OR ( new_n18616_, new_n3413_ ) -new_n18790_ = OR ( new_n18619_, new_n3415_ ) -new_n18791_ = OR ( new_n18622_, new_n3417_ ) -new_n18792_ = OR ( new_n18626_, new_n3151_ ) -new_n18793_ = NAND ( new_n18792_, new_n18791_, new_n18790_, new_n18789_ ) -new_n18794_ = OR ( new_n18637_, new_n3168_ ) -new_n18795_ = OR ( new_n18647_, new_n3422_ ) -new_n18796_ = OR ( new_n18635_, new_n3424_ ) -new_n18797_ = OR ( new_n18656_, new_n3173_ ) -new_n18798_ = OR ( new_n18641_, new_n3175_ ) -new_n18799_ = OR ( new_n18643_, new_n3431_ ) -new_n18800_ = OR ( new_n18645_, new_n3420_ ) -new_n18801_ = NAND ( new_n18800_, new_n18799_, new_n18798_, new_n18797_ ) -new_n18802_ = OR ( new_n18629_, new_n3153_ ) -new_n18803_ = OR ( new_n18650_, new_n3155_ ) -new_n18804_ = OR ( new_n18652_, new_n3409_ ) -new_n18805_ = OR ( new_n18654_, new_n3171_ ) -new_n18806_ = NAND ( new_n18805_, new_n18804_, new_n18803_, new_n18802_ ) -new_n18807_ = NOR ( new_n18806_, new_n18801_ ) -new_n18808_ = NAND ( new_n18807_, new_n18796_, new_n18795_, new_n18794_ ) -new_n18809_ = NOR ( new_n18808_, new_n18793_, new_n18788_, new_n3696_ ) -new_n18810_ = NOR ( new_n18809_, new_n18787_ ) -new_n18811_ = NAND ( new_n18810_, new_n18786_ ) -new_n18812_ = NAND ( new_n18811_, new_n18785_ ) -new_n18813_ = NOR ( new_n3179_, NET_341 ) -new_n18814_ = NOR ( new_n18632_, new_n3130_ ) -new_n18815_ = OR ( new_n18616_, new_n3365_ ) -new_n18816_ = OR ( new_n18619_, new_n3367_ ) -new_n18817_ = OR ( new_n18622_, new_n3369_ ) -new_n18818_ = OR ( new_n18626_, new_n3122_ ) -new_n18819_ = NAND ( new_n18818_, new_n18817_, new_n18816_, new_n18815_ ) -new_n18820_ = OR ( new_n18637_, new_n3139_ ) -new_n18821_ = OR ( new_n18647_, new_n3374_ ) -new_n18822_ = OR ( new_n18635_, new_n3376_ ) -new_n18823_ = OR ( new_n18656_, new_n3144_ ) -new_n18824_ = OR ( new_n18641_, new_n3146_ ) -new_n18825_ = OR ( new_n18643_, new_n3383_ ) -new_n18826_ = OR ( new_n18645_, new_n3372_ ) -new_n18827_ = NAND ( new_n18826_, new_n18825_, new_n18824_, new_n18823_ ) -new_n18828_ = OR ( new_n18629_, new_n3124_ ) -new_n18829_ = OR ( new_n18650_, new_n3126_ ) -new_n18830_ = OR ( new_n18652_, new_n3361_ ) -new_n18831_ = OR ( new_n18654_, new_n3142_ ) -new_n18832_ = NAND ( new_n18831_, new_n18830_, new_n18829_, new_n18828_ ) -new_n18833_ = NOR ( new_n18832_, new_n18827_ ) -new_n18834_ = NAND ( new_n18833_, new_n18822_, new_n18821_, new_n18820_ ) -new_n18835_ = NOR ( new_n18834_, new_n18819_, new_n18814_, new_n3696_ ) -new_n18836_ = NOR ( new_n18835_, new_n18813_ ) -new_n18837_ = NAND ( new_n18836_, new_n18812_, new_n18733_, new_n18709_ ) -new_n18838_ = OR ( new_n3179_, NET_344 ) -new_n18839_ = OR ( new_n18616_, new_n3547_ ) -new_n18840_ = OR ( new_n18619_, new_n3549_ ) -new_n18841_ = OR ( new_n18622_, new_n3551_ ) -new_n18842_ = OR ( new_n18626_, new_n3553_ ) -new_n18843_ = OR ( new_n18629_, new_n3538_ ) -new_n18844_ = AND ( new_n18843_, new_n18842_, new_n18841_, new_n18840_ ) -new_n18845_ = OR ( new_n18632_, new_n3562_ ) -new_n18846_ = OR ( new_n18635_, new_n3558_ ) -new_n18847_ = OR ( new_n18637_, new_n3560_ ) -new_n18848_ = NAND ( new_n18847_, new_n18846_, new_n18845_ ) -new_n18849_ = OR ( new_n18641_, new_n3567_ ) -new_n18850_ = OR ( new_n18643_, new_n3569_ ) -new_n18851_ = OR ( new_n18645_, new_n3571_ ) -new_n18852_ = OR ( new_n18647_, new_n3556_ ) -new_n18853_ = NAND ( new_n18852_, new_n18851_, new_n18850_, new_n18849_ ) -new_n18854_ = OR ( new_n18650_, new_n3540_ ) -new_n18855_ = OR ( new_n18652_, new_n3542_ ) -new_n18856_ = OR ( new_n18654_, new_n3544_ ) -new_n18857_ = OR ( new_n18656_, new_n3565_ ) -new_n18858_ = NAND ( new_n18857_, new_n18856_, new_n18855_, new_n18854_ ) -new_n18859_ = NOR ( new_n18858_, new_n18853_, new_n18848_ ) -new_n18860_ = NAND ( new_n18859_, new_n18844_, new_n18839_, new_n3179_ ) -new_n18861_ = NAND ( new_n18860_, new_n18838_ ) -new_n18862_ = OR ( new_n3179_, NET_345 ) -new_n18863_ = OR ( new_n18616_, new_n3302_ ) -new_n18864_ = OR ( new_n18619_, new_n3304_ ) -new_n18865_ = OR ( new_n18622_, new_n3306_ ) -new_n18866_ = OR ( new_n18626_, new_n3104_ ) -new_n18867_ = OR ( new_n18629_, new_n3093_ ) -new_n18868_ = AND ( new_n18867_, new_n18866_, new_n18865_, new_n18864_ ) -new_n18869_ = OR ( new_n18632_, new_n3111_ ) -new_n18870_ = OR ( new_n18635_, new_n3312_ ) -new_n18871_ = OR ( new_n18637_, new_n3109_ ) -new_n18872_ = NAND ( new_n18871_, new_n18870_, new_n18869_ ) -new_n18873_ = OR ( new_n18641_, new_n3116_ ) -new_n18874_ = OR ( new_n18643_, new_n3319_ ) -new_n18875_ = OR ( new_n18645_, new_n3321_ ) -new_n18876_ = OR ( new_n18647_, new_n3310_ ) -new_n18877_ = NAND ( new_n18876_, new_n18875_, new_n18874_, new_n18873_ ) -new_n18878_ = OR ( new_n18650_, new_n3095_ ) -new_n18879_ = OR ( new_n18652_, new_n3298_ ) -new_n18880_ = OR ( new_n18654_, new_n3098_ ) -new_n18881_ = OR ( new_n18656_, new_n3114_ ) -new_n18882_ = NAND ( new_n18881_, new_n18880_, new_n18879_, new_n18878_ ) -new_n18883_ = NOR ( new_n18882_, new_n18877_, new_n18872_ ) -new_n18884_ = NAND ( new_n18883_, new_n18868_, new_n18863_, new_n3179_ ) -new_n18885_ = NAND ( new_n18884_, new_n18862_ ) -new_n18886_ = OR ( new_n18885_, new_n18861_, new_n18837_ ) -new_n18887_ = OR ( new_n18886_, new_n18685_ ) -new_n18888_ = NOR ( new_n18887_, new_n18661_ ) -new_n18889_ = AND ( new_n18887_, new_n18661_ ) -new_n18890_ = OR ( new_n18889_, new_n18888_ ) -new_n18891_ = NOR ( new_n18890_, new_n6794_ ) -new_n18892_ = NAND ( new_n6728_, NET_347 ) -new_n18893_ = NOT ( NET_506 ) -new_n18894_ = OR ( new_n6792_, new_n18893_ ) -new_n18895_ = NAND ( new_n6695_, NET_379 ) -new_n18896_ = NAND ( new_n6804_, NET_474 ) -new_n18897_ = NAND ( new_n18896_, new_n18895_, new_n18894_, new_n18892_ ) -new_n18898_ = NOR ( new_n18897_, new_n18891_ ) -new_n18899_ = XOR ( new_n18898_, new_n5529_ ) -new_n18900_ = NAND ( new_n18836_, new_n18812_ ) -new_n18901_ = XOR ( new_n18900_, new_n18733_ ) -new_n18902_ = NOR ( new_n18901_, new_n6794_ ) -new_n18903_ = NAND ( new_n6728_, NET_342 ) -new_n18904_ = NOT ( NET_501 ) -new_n18905_ = OR ( new_n6792_, new_n18904_ ) -new_n18906_ = NAND ( new_n6695_, NET_374 ) -new_n18907_ = NAND ( new_n6804_, NET_469 ) -new_n18908_ = NAND ( new_n18907_, new_n18906_, new_n18905_, new_n18903_ ) -new_n18909_ = NOR ( new_n18908_, new_n18902_ ) -new_n18910_ = XNOR ( new_n18909_, new_n5529_ ) -new_n18911_ = NOT ( NET_339 ) -new_n18912_ = OR ( new_n3179_, new_n18911_ ) -new_n18913_ = XOR ( new_n18912_, new_n18760_ ) -new_n18914_ = XOR ( new_n18913_, new_n18737_ ) -new_n18915_ = NOR ( new_n18914_, new_n6794_ ) -new_n18916_ = NAND ( new_n6728_, NET_339 ) -new_n18917_ = NOT ( NET_498 ) -new_n18918_ = OR ( new_n6792_, new_n18917_ ) -new_n18919_ = NAND ( new_n6695_, NET_371 ) -new_n18920_ = NAND ( new_n6804_, NET_466 ) -new_n18921_ = NAND ( new_n18920_, new_n18919_, new_n18918_, new_n18916_ ) -new_n18922_ = NOR ( new_n18921_, new_n18915_ ) -new_n18923_ = XNOR ( new_n18922_, new_n5529_ ) -new_n18924_ = NOT ( new_n18923_ ) -new_n18925_ = NOT ( new_n18475_ ) -new_n18926_ = OR ( new_n18925_, new_n17986_, new_n17485_ ) -new_n18927_ = OR ( new_n18926_, new_n18924_ ) -new_n18928_ = XNOR ( new_n18810_, new_n18784_ ) -new_n18929_ = XOR ( new_n18928_, new_n18762_ ) -new_n18930_ = NOR ( new_n18929_, new_n6794_ ) -new_n18931_ = NAND ( new_n6728_, NET_340 ) -new_n18932_ = NOT ( NET_499 ) -new_n18933_ = OR ( new_n6792_, new_n18932_ ) -new_n18934_ = NAND ( new_n6695_, NET_372 ) -new_n18935_ = NAND ( new_n6804_, NET_467 ) -new_n18936_ = NAND ( new_n18935_, new_n18934_, new_n18933_, new_n18931_ ) -new_n18937_ = NOR ( new_n18936_, new_n18930_ ) -new_n18938_ = XNOR ( new_n18937_, new_n5529_ ) -new_n18939_ = NOT ( new_n18938_ ) -new_n18940_ = XNOR ( new_n18836_, new_n18812_ ) -new_n18941_ = NOR ( new_n18940_, new_n6794_ ) -new_n18942_ = NAND ( new_n6728_, NET_341 ) -new_n18943_ = NOT ( NET_500 ) -new_n18944_ = OR ( new_n6792_, new_n18943_ ) -new_n18945_ = NAND ( new_n6695_, NET_373 ) -new_n18946_ = NAND ( new_n6804_, NET_468 ) -new_n18947_ = NAND ( new_n18946_, new_n18945_, new_n18944_, new_n18942_ ) -new_n18948_ = NOR ( new_n18947_, new_n18941_ ) -new_n18949_ = XOR ( new_n18948_, new_n5529_ ) -new_n18950_ = NOR ( new_n18949_, new_n18939_, new_n18927_ ) -new_n18951_ = NAND ( new_n18836_, new_n18812_, new_n18733_ ) -new_n18952_ = XOR ( new_n18951_, new_n18709_ ) -new_n18953_ = NOR ( new_n18952_, new_n6794_ ) -new_n18954_ = NAND ( new_n6728_, NET_343 ) -new_n18955_ = NOT ( NET_502 ) -new_n18956_ = OR ( new_n6792_, new_n18955_ ) -new_n18957_ = NAND ( new_n6695_, NET_375 ) -new_n18958_ = NAND ( new_n6804_, NET_470 ) -new_n18959_ = NAND ( new_n18958_, new_n18957_, new_n18956_, new_n18954_ ) -new_n18960_ = NOR ( new_n18959_, new_n18953_ ) -new_n18961_ = XNOR ( new_n18960_, new_n5529_ ) -new_n18962_ = OR ( new_n18861_, new_n18837_ ) -new_n18963_ = NAND ( new_n18861_, new_n18837_ ) -new_n18964_ = NAND ( new_n18963_, new_n18962_ ) -new_n18965_ = NOR ( new_n18964_, new_n6794_ ) -new_n18966_ = NAND ( new_n6728_, NET_344 ) -new_n18967_ = NOT ( NET_503 ) -new_n18968_ = OR ( new_n6792_, new_n18967_ ) -new_n18969_ = NAND ( new_n6695_, NET_376 ) -new_n18970_ = NAND ( new_n6804_, NET_471 ) -new_n18971_ = NAND ( new_n18970_, new_n18969_, new_n18968_, new_n18966_ ) -new_n18972_ = NOR ( new_n18971_, new_n18965_ ) -new_n18973_ = XNOR ( new_n18972_, new_n5529_ ) -new_n18974_ = NAND ( new_n18973_, new_n18961_, new_n18950_, new_n18910_ ) -new_n18975_ = XNOR ( new_n18886_, new_n18685_ ) -new_n18976_ = NOR ( new_n18975_, new_n6794_ ) -new_n18977_ = NAND ( new_n6728_, NET_346 ) -new_n18978_ = NOT ( NET_505 ) -new_n18979_ = OR ( new_n6792_, new_n18978_ ) -new_n18980_ = NAND ( new_n6695_, NET_378 ) -new_n18981_ = NAND ( new_n6804_, NET_473 ) -new_n18982_ = NAND ( new_n18981_, new_n18980_, new_n18979_, new_n18977_ ) -new_n18983_ = NOR ( new_n18982_, new_n18976_ ) -new_n18984_ = XOR ( new_n18983_, new_n5529_ ) -new_n18985_ = NAND ( new_n18962_, new_n18885_ ) -new_n18986_ = NAND ( new_n18985_, new_n18886_ ) -new_n18987_ = OR ( new_n18986_, new_n6794_ ) -new_n18988_ = NAND ( new_n6728_, NET_345 ) -new_n18989_ = NOT ( NET_504 ) -new_n18990_ = OR ( new_n6792_, new_n18989_ ) -new_n18991_ = NAND ( new_n6695_, NET_377 ) -new_n18992_ = NAND ( new_n6804_, NET_472 ) -new_n18993_ = AND ( new_n18992_, new_n18991_, new_n18990_ ) -new_n18994_ = NAND ( new_n18993_, new_n18988_, new_n18987_ ) -new_n18995_ = XOR ( new_n18994_, new_n5529_ ) -new_n18996_ = NOT ( new_n18995_ ) -new_n18997_ = OR ( new_n18996_, new_n18984_, new_n18974_ ) -new_n18998_ = NOR ( new_n18997_, new_n18899_ ) -new_n18999_ = NAND ( new_n6728_, NET_348 ) -new_n19000_ = OR ( new_n6792_, new_n3221_ ) -new_n19001_ = NAND ( new_n6804_, NET_475 ) -new_n19002_ = NAND ( new_n6695_, NET_380 ) -new_n19003_ = NAND ( new_n19002_, new_n19001_, new_n19000_, new_n18999_ ) -new_n19004_ = XOR ( new_n19003_, new_n5529_ ) -new_n19005_ = XOR ( new_n19004_, new_n18998_ ) -new_n19006_ = NOT ( new_n19005_ ) -new_n19007_ = OR ( new_n19006_, new_n14314_ ) -new_n19008_ = OR ( new_n14311_, new_n3208_ ) -new_n19009_ = OR ( new_n19008_, new_n7227_ ) -new_n19010_ = NAND ( new_n14311_, NET_475 ) -NET_22069 = NAND ( new_n19010_, new_n19009_, new_n19007_ ) -new_n19012_ = NAND ( new_n11713_, NET_507 ) -new_n19013_ = OR ( new_n19006_, new_n11775_ ) -NET_22070 = NAND ( new_n19013_, new_n19012_ ) -new_n19015_ = OR ( new_n3924_, NET_796 ) -new_n19016_ = NOR ( new_n12102_, new_n3712_ ) -new_n19017_ = NOR ( new_n19016_, new_n3716_ ) -new_n19018_ = NAND ( new_n12606_, new_n12415_ ) -new_n19019_ = NOT ( new_n19018_ ) -new_n19020_ = NAND ( new_n19019_, new_n19017_ ) -new_n19021_ = OR ( new_n19020_, new_n4341_ ) -new_n19022_ = NOT ( new_n3736_ ) -new_n19023_ = OR ( new_n19018_, new_n19022_ ) -new_n19024_ = OR ( new_n19023_, new_n4343_ ) -new_n19025_ = AND ( new_n19016_, NET_760 ) -new_n19026_ = NAND ( new_n19025_, new_n19019_ ) -new_n19027_ = OR ( new_n19026_, new_n4345_ ) -new_n19028_ = NOT ( new_n12415_ ) -new_n19029_ = NAND ( new_n12606_, new_n19028_ ) -new_n19030_ = OR ( new_n19029_, new_n12100_ ) -new_n19031_ = OR ( new_n19030_, new_n4347_ ) -new_n19032_ = NOT ( new_n19029_ ) -new_n19033_ = NAND ( new_n19032_, new_n19017_ ) -new_n19034_ = OR ( new_n19033_, new_n4332_ ) -new_n19035_ = AND ( new_n19034_, new_n19031_, new_n19027_, new_n19024_ ) -new_n19036_ = OR ( new_n19018_, new_n12100_ ) -new_n19037_ = OR ( new_n19036_, new_n4356_ ) -new_n19038_ = NOR ( new_n12606_, new_n12415_ ) -new_n19039_ = NAND ( new_n19038_, new_n3736_ ) -new_n19040_ = OR ( new_n19039_, new_n4352_ ) -new_n19041_ = NAND ( new_n19038_, new_n19025_ ) -new_n19042_ = OR ( new_n19041_, new_n4354_ ) -new_n19043_ = NAND ( new_n19042_, new_n19040_, new_n19037_ ) -new_n19044_ = NOR ( new_n12606_, new_n19028_ ) -new_n19045_ = NAND ( new_n19044_, new_n3736_ ) -new_n19046_ = OR ( new_n19045_, new_n4361_ ) -new_n19047_ = NAND ( new_n19044_, new_n19025_ ) -new_n19048_ = OR ( new_n19047_, new_n4363_ ) -new_n19049_ = NAND ( new_n19038_, new_n3726_ ) -new_n19050_ = OR ( new_n19049_, new_n4365_ ) -new_n19051_ = NAND ( new_n19038_, new_n19017_ ) -new_n19052_ = OR ( new_n19051_, new_n4350_ ) -new_n19053_ = NAND ( new_n19052_, new_n19050_, new_n19048_, new_n19046_ ) -new_n19054_ = OR ( new_n19029_, new_n19022_ ) -new_n19055_ = OR ( new_n19054_, new_n4334_ ) -new_n19056_ = NAND ( new_n19032_, new_n19025_ ) -new_n19057_ = OR ( new_n19056_, new_n4336_ ) -new_n19058_ = NAND ( new_n19044_, new_n3726_ ) -new_n19059_ = OR ( new_n19058_, new_n4338_ ) -new_n19060_ = NAND ( new_n19044_, new_n19017_ ) -new_n19061_ = OR ( new_n19060_, new_n4359_ ) -new_n19062_ = NAND ( new_n19061_, new_n19059_, new_n19057_, new_n19055_ ) -new_n19063_ = NOR ( new_n19062_, new_n19053_, new_n19043_ ) -new_n19064_ = NAND ( new_n19063_, new_n19035_, new_n19021_, new_n3924_ ) -new_n19065_ = NAND ( new_n19064_, new_n19015_ ) -new_n19066_ = OR ( new_n3924_, NET_795 ) -new_n19067_ = OR ( new_n19020_, new_n3785_ ) -new_n19068_ = OR ( new_n19023_, new_n3787_ ) -new_n19069_ = OR ( new_n19026_, new_n3789_ ) -new_n19070_ = OR ( new_n19030_, new_n3791_ ) -new_n19071_ = OR ( new_n19033_, new_n3776_ ) -new_n19072_ = AND ( new_n19071_, new_n19070_, new_n19069_, new_n19068_ ) -new_n19073_ = OR ( new_n19036_, new_n3801_ ) -new_n19074_ = OR ( new_n19039_, new_n3797_ ) -new_n19075_ = OR ( new_n19041_, new_n3799_ ) -new_n19076_ = NAND ( new_n19075_, new_n19074_, new_n19073_ ) -new_n19077_ = OR ( new_n19045_, new_n3806_ ) -new_n19078_ = OR ( new_n19047_, new_n3808_ ) -new_n19079_ = OR ( new_n19049_, new_n3810_ ) -new_n19080_ = OR ( new_n19051_, new_n3795_ ) -new_n19081_ = NAND ( new_n19080_, new_n19079_, new_n19078_, new_n19077_ ) -new_n19082_ = OR ( new_n19054_, new_n3778_ ) -new_n19083_ = OR ( new_n19056_, new_n3780_ ) -new_n19084_ = OR ( new_n19058_, new_n3782_ ) -new_n19085_ = OR ( new_n19060_, new_n3804_ ) -new_n19086_ = NAND ( new_n19085_, new_n19084_, new_n19083_, new_n19082_ ) -new_n19087_ = NOR ( new_n19086_, new_n19081_, new_n19076_ ) -new_n19088_ = NAND ( new_n19087_, new_n19072_, new_n19067_, new_n3924_ ) -new_n19089_ = NAND ( new_n19088_, new_n19066_ ) -new_n19090_ = NOR ( new_n3924_, NET_792 ) -new_n19091_ = NOR ( new_n19020_, new_n3730_ ) -new_n19092_ = OR ( new_n19023_, new_n3735_ ) -new_n19093_ = OR ( new_n19026_, new_n3739_ ) -new_n19094_ = OR ( new_n19030_, new_n3742_ ) -new_n19095_ = OR ( new_n19033_, new_n3710_ ) -new_n19096_ = NAND ( new_n19095_, new_n19094_, new_n19093_, new_n19092_ ) -new_n19097_ = OR ( new_n19096_, new_n19091_, new_n4441_ ) -new_n19098_ = OR ( new_n19036_, new_n3756_ ) -new_n19099_ = OR ( new_n19039_, new_n3750_ ) -new_n19100_ = OR ( new_n19041_, new_n3753_ ) -new_n19101_ = NAND ( new_n19100_, new_n19099_, new_n19098_ ) -new_n19102_ = OR ( new_n19045_, new_n3763_ ) -new_n19103_ = OR ( new_n19047_, new_n3766_ ) -new_n19104_ = OR ( new_n19049_, new_n3770_ ) -new_n19105_ = OR ( new_n19051_, new_n3746_ ) -new_n19106_ = NAND ( new_n19105_, new_n19104_, new_n19103_, new_n19102_ ) -new_n19107_ = OR ( new_n19054_, new_n3715_ ) -new_n19108_ = OR ( new_n19056_, new_n3719_ ) -new_n19109_ = OR ( new_n19058_, new_n3725_ ) -new_n19110_ = OR ( new_n19060_, new_n3760_ ) -new_n19111_ = NAND ( new_n19110_, new_n19109_, new_n19108_, new_n19107_ ) -new_n19112_ = NOR ( new_n19111_, new_n19106_, new_n19101_, new_n19097_ ) -new_n19113_ = NOR ( new_n19112_, new_n19090_ ) -new_n19114_ = NOR ( new_n3924_, NET_791 ) -new_n19115_ = NOR ( new_n19036_, new_n3933_ ) -new_n19116_ = OR ( new_n19020_, new_n4215_ ) -new_n19117_ = OR ( new_n19023_, new_n4217_ ) -new_n19118_ = OR ( new_n19026_, new_n4219_ ) -new_n19119_ = OR ( new_n19030_, new_n3925_ ) -new_n19120_ = NAND ( new_n19119_, new_n19118_, new_n19117_, new_n19116_ ) -new_n19121_ = OR ( new_n19041_, new_n3942_ ) -new_n19122_ = OR ( new_n19051_, new_n4224_ ) -new_n19123_ = OR ( new_n19039_, new_n4226_ ) -new_n19124_ = OR ( new_n19060_, new_n3947_ ) -new_n19125_ = OR ( new_n19045_, new_n3949_ ) -new_n19126_ = OR ( new_n19047_, new_n4233_ ) -new_n19127_ = OR ( new_n19049_, new_n4222_ ) -new_n19128_ = NAND ( new_n19127_, new_n19126_, new_n19125_, new_n19124_ ) -new_n19129_ = OR ( new_n19033_, new_n3927_ ) -new_n19130_ = OR ( new_n19054_, new_n3929_ ) -new_n19131_ = OR ( new_n19056_, new_n4211_ ) -new_n19132_ = OR ( new_n19058_, new_n3945_ ) -new_n19133_ = NAND ( new_n19132_, new_n19131_, new_n19130_, new_n19129_ ) -new_n19134_ = NOR ( new_n19133_, new_n19128_ ) -new_n19135_ = NAND ( new_n19134_, new_n19123_, new_n19122_, new_n19121_ ) -new_n19136_ = NOR ( new_n19135_, new_n19120_, new_n19115_, new_n4441_ ) -new_n19137_ = NOR ( new_n19136_, new_n19114_ ) -new_n19138_ = NOR ( new_n18523_, new_n18518_ ) -new_n19139_ = OR ( new_n19138_, new_n18496_ ) -new_n19140_ = NAND ( new_n18523_, new_n18518_ ) -new_n19141_ = NAND ( new_n19140_, new_n19139_ ) -new_n19142_ = OR ( new_n9572_, new_n3776_ ) -new_n19143_ = OR ( new_n9489_, new_n3778_ ) -new_n19144_ = OR ( new_n9407_, new_n3780_ ) -new_n19145_ = OR ( new_n9325_, new_n3782_ ) -new_n19146_ = NAND ( new_n19145_, new_n19144_, new_n19143_, new_n19142_ ) -new_n19147_ = OR ( new_n9902_, new_n3785_ ) -new_n19148_ = OR ( new_n9820_, new_n3787_ ) -new_n19149_ = OR ( new_n9738_, new_n3789_ ) -new_n19150_ = OR ( new_n9654_, new_n3791_ ) -new_n19151_ = NAND ( new_n19150_, new_n19149_, new_n19148_, new_n19147_ ) -new_n19152_ = OR ( new_n8909_, new_n3795_ ) -new_n19153_ = OR ( new_n8826_, new_n3797_ ) -new_n19154_ = OR ( new_n8633_, new_n3799_ ) -new_n19155_ = OR ( new_n9984_, new_n3801_ ) -new_n19156_ = NAND ( new_n19155_, new_n19154_, new_n19153_, new_n19152_ ) -new_n19157_ = OR ( new_n9243_, new_n3804_ ) -new_n19158_ = OR ( new_n9161_, new_n3806_ ) -new_n19159_ = OR ( new_n9078_, new_n3808_ ) -new_n19160_ = OR ( new_n8994_, new_n3810_ ) -new_n19161_ = NAND ( new_n19160_, new_n19159_, new_n19158_, new_n19157_ ) -new_n19162_ = NOR ( new_n19161_, new_n19156_, new_n19151_, new_n19146_ ) -new_n19163_ = NAND ( new_n19141_, new_n4441_, NET_788 ) -new_n19164_ = NOR ( new_n19162_, new_n4441_ ) -new_n19165_ = NAND ( new_n19164_, new_n19141_ ) -new_n19166_ = NAND ( new_n19165_, new_n19163_ ) -new_n19167_ = OR ( new_n9572_, new_n4332_ ) -new_n19168_ = OR ( new_n9489_, new_n4334_ ) -new_n19169_ = OR ( new_n9407_, new_n4336_ ) -new_n19170_ = OR ( new_n9325_, new_n4338_ ) -new_n19171_ = NAND ( new_n19170_, new_n19169_, new_n19168_, new_n19167_ ) -new_n19172_ = OR ( new_n9902_, new_n4341_ ) -new_n19173_ = OR ( new_n9820_, new_n4343_ ) -new_n19174_ = OR ( new_n9738_, new_n4345_ ) -new_n19175_ = OR ( new_n9654_, new_n4347_ ) -new_n19176_ = NAND ( new_n19175_, new_n19174_, new_n19173_, new_n19172_ ) -new_n19177_ = OR ( new_n8909_, new_n4350_ ) -new_n19178_ = OR ( new_n8826_, new_n4352_ ) -new_n19179_ = OR ( new_n8633_, new_n4354_ ) -new_n19180_ = OR ( new_n9984_, new_n4356_ ) -new_n19181_ = NAND ( new_n19180_, new_n19179_, new_n19178_, new_n19177_ ) -new_n19182_ = OR ( new_n9243_, new_n4359_ ) -new_n19183_ = OR ( new_n9161_, new_n4361_ ) -new_n19184_ = OR ( new_n9078_, new_n4363_ ) -new_n19185_ = OR ( new_n8994_, new_n4365_ ) -new_n19186_ = NAND ( new_n19185_, new_n19184_, new_n19183_, new_n19182_ ) -new_n19187_ = NOR ( new_n19186_, new_n19181_, new_n19176_, new_n19171_ ) -new_n19188_ = NOR ( new_n19187_, new_n4441_ ) -new_n19189_ = NAND ( new_n19188_, new_n19166_ ) -new_n19190_ = OR ( new_n19188_, new_n19166_ ) -new_n19191_ = NOR ( new_n3924_, NET_789 ) -new_n19192_ = NOR ( new_n19036_, new_n3904_ ) -new_n19193_ = OR ( new_n19020_, new_n4158_ ) -new_n19194_ = OR ( new_n19023_, new_n4160_ ) -new_n19195_ = OR ( new_n19026_, new_n4162_ ) -new_n19196_ = OR ( new_n19030_, new_n3896_ ) -new_n19197_ = NAND ( new_n19196_, new_n19195_, new_n19194_, new_n19193_ ) -new_n19198_ = OR ( new_n19041_, new_n3913_ ) -new_n19199_ = OR ( new_n19051_, new_n4167_ ) -new_n19200_ = OR ( new_n19039_, new_n4169_ ) -new_n19201_ = OR ( new_n19060_, new_n3918_ ) -new_n19202_ = OR ( new_n19045_, new_n3920_ ) -new_n19203_ = OR ( new_n19047_, new_n4176_ ) -new_n19204_ = OR ( new_n19049_, new_n4165_ ) -new_n19205_ = NAND ( new_n19204_, new_n19203_, new_n19202_, new_n19201_ ) -new_n19206_ = OR ( new_n19033_, new_n3898_ ) -new_n19207_ = OR ( new_n19054_, new_n3900_ ) -new_n19208_ = OR ( new_n19056_, new_n4154_ ) -new_n19209_ = OR ( new_n19058_, new_n3916_ ) -new_n19210_ = NAND ( new_n19209_, new_n19208_, new_n19207_, new_n19206_ ) -new_n19211_ = NOR ( new_n19210_, new_n19205_ ) -new_n19212_ = NAND ( new_n19211_, new_n19200_, new_n19199_, new_n19198_ ) -new_n19213_ = NOR ( new_n19212_, new_n19197_, new_n19192_, new_n4441_ ) -new_n19214_ = NOR ( new_n19213_, new_n19191_ ) -new_n19215_ = NAND ( new_n19214_, new_n19190_ ) -new_n19216_ = NAND ( new_n19215_, new_n19189_ ) -new_n19217_ = NOR ( new_n3924_, NET_790 ) -new_n19218_ = NOR ( new_n19036_, new_n3875_ ) -new_n19219_ = OR ( new_n19020_, new_n4110_ ) -new_n19220_ = OR ( new_n19023_, new_n4112_ ) -new_n19221_ = OR ( new_n19026_, new_n4114_ ) -new_n19222_ = OR ( new_n19030_, new_n3867_ ) -new_n19223_ = NAND ( new_n19222_, new_n19221_, new_n19220_, new_n19219_ ) -new_n19224_ = OR ( new_n19041_, new_n3884_ ) -new_n19225_ = OR ( new_n19051_, new_n4119_ ) -new_n19226_ = OR ( new_n19039_, new_n4121_ ) -new_n19227_ = OR ( new_n19060_, new_n3889_ ) -new_n19228_ = OR ( new_n19045_, new_n3891_ ) -new_n19229_ = OR ( new_n19047_, new_n4128_ ) -new_n19230_ = OR ( new_n19049_, new_n4117_ ) -new_n19231_ = NAND ( new_n19230_, new_n19229_, new_n19228_, new_n19227_ ) -new_n19232_ = OR ( new_n19033_, new_n3869_ ) -new_n19233_ = OR ( new_n19054_, new_n3871_ ) -new_n19234_ = OR ( new_n19056_, new_n4106_ ) -new_n19235_ = OR ( new_n19058_, new_n3887_ ) -new_n19236_ = NAND ( new_n19235_, new_n19234_, new_n19233_, new_n19232_ ) -new_n19237_ = NOR ( new_n19236_, new_n19231_ ) -new_n19238_ = NAND ( new_n19237_, new_n19226_, new_n19225_, new_n19224_ ) -new_n19239_ = NOR ( new_n19238_, new_n19223_, new_n19218_, new_n4441_ ) -new_n19240_ = NOR ( new_n19239_, new_n19217_ ) -new_n19241_ = NAND ( new_n19240_, new_n19216_, new_n19137_, new_n19113_ ) -new_n19242_ = OR ( new_n3924_, NET_793 ) -new_n19243_ = OR ( new_n19020_, new_n4292_ ) -new_n19244_ = OR ( new_n19023_, new_n4294_ ) -new_n19245_ = OR ( new_n19026_, new_n4296_ ) -new_n19246_ = OR ( new_n19030_, new_n4298_ ) -new_n19247_ = OR ( new_n19033_, new_n4283_ ) -new_n19248_ = AND ( new_n19247_, new_n19246_, new_n19245_, new_n19244_ ) -new_n19249_ = OR ( new_n19036_, new_n4307_ ) -new_n19250_ = OR ( new_n19039_, new_n4303_ ) -new_n19251_ = OR ( new_n19041_, new_n4305_ ) -new_n19252_ = NAND ( new_n19251_, new_n19250_, new_n19249_ ) -new_n19253_ = OR ( new_n19045_, new_n4312_ ) -new_n19254_ = OR ( new_n19047_, new_n4314_ ) -new_n19255_ = OR ( new_n19049_, new_n4316_ ) -new_n19256_ = OR ( new_n19051_, new_n4301_ ) -new_n19257_ = NAND ( new_n19256_, new_n19255_, new_n19254_, new_n19253_ ) -new_n19258_ = OR ( new_n19054_, new_n4285_ ) -new_n19259_ = OR ( new_n19056_, new_n4287_ ) -new_n19260_ = OR ( new_n19058_, new_n4289_ ) -new_n19261_ = OR ( new_n19060_, new_n4310_ ) -new_n19262_ = NAND ( new_n19261_, new_n19260_, new_n19259_, new_n19258_ ) -new_n19263_ = NOR ( new_n19262_, new_n19257_, new_n19252_ ) -new_n19264_ = NAND ( new_n19263_, new_n19248_, new_n19243_, new_n3924_ ) -new_n19265_ = NAND ( new_n19264_, new_n19242_ ) -new_n19266_ = OR ( new_n3924_, NET_794 ) -new_n19267_ = OR ( new_n19020_, new_n4047_ ) -new_n19268_ = OR ( new_n19023_, new_n4049_ ) -new_n19269_ = OR ( new_n19026_, new_n4051_ ) -new_n19270_ = OR ( new_n19030_, new_n3849_ ) -new_n19271_ = OR ( new_n19033_, new_n3838_ ) -new_n19272_ = AND ( new_n19271_, new_n19270_, new_n19269_, new_n19268_ ) -new_n19273_ = OR ( new_n19036_, new_n3856_ ) -new_n19274_ = OR ( new_n19039_, new_n4057_ ) -new_n19275_ = OR ( new_n19041_, new_n3854_ ) -new_n19276_ = NAND ( new_n19275_, new_n19274_, new_n19273_ ) -new_n19277_ = OR ( new_n19045_, new_n3861_ ) -new_n19278_ = OR ( new_n19047_, new_n4064_ ) -new_n19279_ = OR ( new_n19049_, new_n4066_ ) -new_n19280_ = OR ( new_n19051_, new_n4055_ ) -new_n19281_ = NAND ( new_n19280_, new_n19279_, new_n19278_, new_n19277_ ) -new_n19282_ = OR ( new_n19054_, new_n3840_ ) -new_n19283_ = OR ( new_n19056_, new_n4043_ ) -new_n19284_ = OR ( new_n19058_, new_n3843_ ) -new_n19285_ = OR ( new_n19060_, new_n3859_ ) -new_n19286_ = NAND ( new_n19285_, new_n19284_, new_n19283_, new_n19282_ ) -new_n19287_ = NOR ( new_n19286_, new_n19281_, new_n19276_ ) -new_n19288_ = NAND ( new_n19287_, new_n19272_, new_n19267_, new_n3924_ ) -new_n19289_ = NAND ( new_n19288_, new_n19266_ ) -new_n19290_ = OR ( new_n19289_, new_n19265_, new_n19241_ ) -new_n19291_ = OR ( new_n19290_, new_n19089_ ) -new_n19292_ = NOR ( new_n19291_, new_n19065_ ) -new_n19293_ = AND ( new_n19291_, new_n19065_ ) -new_n19294_ = OR ( new_n19293_, new_n19292_ ) -new_n19295_ = NOR ( new_n19294_, new_n6954_ ) -new_n19296_ = NAND ( new_n6888_, NET_796 ) -new_n19297_ = NOT ( NET_955 ) -new_n19298_ = OR ( new_n6952_, new_n19297_ ) -new_n19299_ = NAND ( new_n6855_, NET_828 ) -new_n19300_ = NAND ( new_n6964_, NET_923 ) -new_n19301_ = NAND ( new_n19300_, new_n19299_, new_n19298_, new_n19296_ ) -new_n19302_ = NOR ( new_n19301_, new_n19295_ ) -new_n19303_ = XOR ( new_n19302_, new_n5827_ ) -new_n19304_ = NAND ( new_n19240_, new_n19216_ ) -new_n19305_ = XOR ( new_n19304_, new_n19137_ ) -new_n19306_ = NOR ( new_n19305_, new_n6954_ ) -new_n19307_ = NAND ( new_n6888_, NET_791 ) -new_n19308_ = NOT ( NET_950 ) -new_n19309_ = OR ( new_n6952_, new_n19308_ ) -new_n19310_ = NAND ( new_n6855_, NET_823 ) -new_n19311_ = NAND ( new_n6964_, NET_918 ) -new_n19312_ = NAND ( new_n19311_, new_n19310_, new_n19309_, new_n19307_ ) -new_n19313_ = NOR ( new_n19312_, new_n19306_ ) -new_n19314_ = XNOR ( new_n19313_, new_n5827_ ) -new_n19315_ = NOT ( NET_788 ) -new_n19316_ = OR ( new_n3924_, new_n19315_ ) -new_n19317_ = XOR ( new_n19316_, new_n19164_ ) -new_n19318_ = XOR ( new_n19317_, new_n19141_ ) -new_n19319_ = NOR ( new_n19318_, new_n6954_ ) -new_n19320_ = NAND ( new_n6888_, NET_788 ) -new_n19321_ = NOT ( NET_947 ) -new_n19322_ = OR ( new_n6952_, new_n19321_ ) -new_n19323_ = NAND ( new_n6855_, NET_820 ) -new_n19324_ = NAND ( new_n6964_, NET_915 ) -new_n19325_ = NAND ( new_n19324_, new_n19323_, new_n19322_, new_n19320_ ) -new_n19326_ = NOR ( new_n19325_, new_n19319_ ) -new_n19327_ = XNOR ( new_n19326_, new_n5827_ ) -new_n19328_ = NOT ( new_n19327_ ) -new_n19329_ = NOT ( new_n18533_ ) -new_n19330_ = OR ( new_n19329_, new_n18148_, new_n17655_ ) -new_n19331_ = OR ( new_n19330_, new_n19328_ ) -new_n19332_ = XNOR ( new_n19214_, new_n19188_ ) -new_n19333_ = XOR ( new_n19332_, new_n19166_ ) -new_n19334_ = NOR ( new_n19333_, new_n6954_ ) -new_n19335_ = NAND ( new_n6888_, NET_789 ) -new_n19336_ = NOT ( NET_948 ) -new_n19337_ = OR ( new_n6952_, new_n19336_ ) -new_n19338_ = NAND ( new_n6855_, NET_821 ) -new_n19339_ = NAND ( new_n6964_, NET_916 ) -new_n19340_ = NAND ( new_n19339_, new_n19338_, new_n19337_, new_n19335_ ) -new_n19341_ = NOR ( new_n19340_, new_n19334_ ) -new_n19342_ = XNOR ( new_n19341_, new_n5827_ ) -new_n19343_ = NOT ( new_n19342_ ) -new_n19344_ = XNOR ( new_n19240_, new_n19216_ ) -new_n19345_ = NOR ( new_n19344_, new_n6954_ ) -new_n19346_ = NAND ( new_n6888_, NET_790 ) -new_n19347_ = NOT ( NET_949 ) -new_n19348_ = OR ( new_n6952_, new_n19347_ ) -new_n19349_ = NAND ( new_n6855_, NET_822 ) -new_n19350_ = NAND ( new_n6964_, NET_917 ) -new_n19351_ = NAND ( new_n19350_, new_n19349_, new_n19348_, new_n19346_ ) -new_n19352_ = NOR ( new_n19351_, new_n19345_ ) -new_n19353_ = XOR ( new_n19352_, new_n5827_ ) -new_n19354_ = NOR ( new_n19353_, new_n19343_, new_n19331_ ) -new_n19355_ = NAND ( new_n19240_, new_n19216_, new_n19137_ ) -new_n19356_ = XOR ( new_n19355_, new_n19113_ ) -new_n19357_ = NOR ( new_n19356_, new_n6954_ ) -new_n19358_ = NAND ( new_n6888_, NET_792 ) -new_n19359_ = NOT ( NET_951 ) -new_n19360_ = OR ( new_n6952_, new_n19359_ ) -new_n19361_ = NAND ( new_n6855_, NET_824 ) -new_n19362_ = NAND ( new_n6964_, NET_919 ) -new_n19363_ = NAND ( new_n19362_, new_n19361_, new_n19360_, new_n19358_ ) -new_n19364_ = NOR ( new_n19363_, new_n19357_ ) -new_n19365_ = XNOR ( new_n19364_, new_n5827_ ) -new_n19366_ = OR ( new_n19265_, new_n19241_ ) -new_n19367_ = NAND ( new_n19265_, new_n19241_ ) -new_n19368_ = NAND ( new_n19367_, new_n19366_ ) -new_n19369_ = NOR ( new_n19368_, new_n6954_ ) -new_n19370_ = NAND ( new_n6888_, NET_793 ) -new_n19371_ = NOT ( NET_952 ) -new_n19372_ = OR ( new_n6952_, new_n19371_ ) -new_n19373_ = NAND ( new_n6855_, NET_825 ) -new_n19374_ = NAND ( new_n6964_, NET_920 ) -new_n19375_ = NAND ( new_n19374_, new_n19373_, new_n19372_, new_n19370_ ) -new_n19376_ = NOR ( new_n19375_, new_n19369_ ) -new_n19377_ = XNOR ( new_n19376_, new_n5827_ ) -new_n19378_ = NAND ( new_n19377_, new_n19365_, new_n19354_, new_n19314_ ) -new_n19379_ = XNOR ( new_n19290_, new_n19089_ ) -new_n19380_ = NOR ( new_n19379_, new_n6954_ ) -new_n19381_ = NAND ( new_n6888_, NET_795 ) -new_n19382_ = NOT ( NET_954 ) -new_n19383_ = OR ( new_n6952_, new_n19382_ ) -new_n19384_ = NAND ( new_n6855_, NET_827 ) -new_n19385_ = NAND ( new_n6964_, NET_922 ) -new_n19386_ = NAND ( new_n19385_, new_n19384_, new_n19383_, new_n19381_ ) -new_n19387_ = NOR ( new_n19386_, new_n19380_ ) -new_n19388_ = XOR ( new_n19387_, new_n5827_ ) -new_n19389_ = NAND ( new_n19366_, new_n19289_ ) -new_n19390_ = NAND ( new_n19389_, new_n19290_ ) -new_n19391_ = OR ( new_n19390_, new_n6954_ ) -new_n19392_ = NAND ( new_n6888_, NET_794 ) -new_n19393_ = NOT ( NET_953 ) -new_n19394_ = OR ( new_n6952_, new_n19393_ ) -new_n19395_ = NAND ( new_n6855_, NET_826 ) -new_n19396_ = NAND ( new_n6964_, NET_921 ) -new_n19397_ = AND ( new_n19396_, new_n19395_, new_n19394_ ) -new_n19398_ = NAND ( new_n19397_, new_n19392_, new_n19391_ ) -new_n19399_ = XOR ( new_n19398_, new_n5827_ ) -new_n19400_ = NOT ( new_n19399_ ) -new_n19401_ = OR ( new_n19400_, new_n19388_, new_n19378_ ) -new_n19402_ = NOR ( new_n19401_, new_n19303_ ) -new_n19403_ = NAND ( new_n6888_, NET_797 ) -new_n19404_ = OR ( new_n6952_, new_n3966_ ) -new_n19405_ = NAND ( new_n6964_, NET_924 ) -new_n19406_ = NAND ( new_n6855_, NET_829 ) -new_n19407_ = NAND ( new_n19406_, new_n19405_, new_n19404_, new_n19403_ ) -new_n19408_ = XOR ( new_n19407_, new_n5827_ ) -new_n19409_ = XOR ( new_n19408_, new_n19402_ ) -new_n19410_ = NOT ( new_n19409_ ) -new_n19411_ = OR ( new_n19410_, new_n14622_ ) -new_n19412_ = NOR ( new_n14619_, new_n3953_ ) -new_n19413_ = NAND ( new_n19412_, new_n8663_ ) -new_n19414_ = NAND ( new_n14619_, NET_924 ) -NET_22083 = NAND ( new_n19414_, new_n19413_, new_n19411_ ) -new_n19416_ = NAND ( new_n11781_, NET_956 ) -new_n19417_ = OR ( new_n19410_, new_n11843_ ) -NET_22084 = NAND ( new_n19417_, new_n19416_ ) -new_n19419_ = OR ( new_n4668_, NET_1245 ) -new_n19420_ = NOR ( new_n12161_, new_n4456_ ) -new_n19421_ = NOR ( new_n19420_, new_n4460_ ) -new_n19422_ = NAND ( new_n12669_, new_n12483_ ) -new_n19423_ = NOT ( new_n19422_ ) -new_n19424_ = NAND ( new_n19423_, new_n19421_ ) -new_n19425_ = OR ( new_n19424_, new_n5085_ ) -new_n19426_ = NOT ( new_n4480_ ) -new_n19427_ = OR ( new_n19422_, new_n19426_ ) -new_n19428_ = OR ( new_n19427_, new_n5087_ ) -new_n19429_ = AND ( new_n19420_, NET_1209 ) -new_n19430_ = NAND ( new_n19429_, new_n19423_ ) -new_n19431_ = OR ( new_n19430_, new_n5089_ ) -new_n19432_ = NOT ( new_n12483_ ) -new_n19433_ = NAND ( new_n12669_, new_n19432_ ) -new_n19434_ = OR ( new_n19433_, new_n12159_ ) -new_n19435_ = OR ( new_n19434_, new_n5091_ ) -new_n19436_ = NOT ( new_n19433_ ) -new_n19437_ = NAND ( new_n19436_, new_n19421_ ) -new_n19438_ = OR ( new_n19437_, new_n5076_ ) -new_n19439_ = AND ( new_n19438_, new_n19435_, new_n19431_, new_n19428_ ) -new_n19440_ = OR ( new_n19422_, new_n12159_ ) -new_n19441_ = OR ( new_n19440_, new_n5100_ ) -new_n19442_ = NOR ( new_n12669_, new_n12483_ ) -new_n19443_ = NAND ( new_n19442_, new_n4480_ ) -new_n19444_ = OR ( new_n19443_, new_n5096_ ) -new_n19445_ = NAND ( new_n19442_, new_n19429_ ) -new_n19446_ = OR ( new_n19445_, new_n5098_ ) -new_n19447_ = NAND ( new_n19446_, new_n19444_, new_n19441_ ) -new_n19448_ = NOR ( new_n12669_, new_n19432_ ) -new_n19449_ = NAND ( new_n19448_, new_n4480_ ) -new_n19450_ = OR ( new_n19449_, new_n5105_ ) -new_n19451_ = NAND ( new_n19448_, new_n19429_ ) -new_n19452_ = OR ( new_n19451_, new_n5107_ ) -new_n19453_ = NAND ( new_n19442_, new_n4470_ ) -new_n19454_ = OR ( new_n19453_, new_n5109_ ) -new_n19455_ = NAND ( new_n19442_, new_n19421_ ) -new_n19456_ = OR ( new_n19455_, new_n5094_ ) -new_n19457_ = NAND ( new_n19456_, new_n19454_, new_n19452_, new_n19450_ ) -new_n19458_ = OR ( new_n19433_, new_n19426_ ) -new_n19459_ = OR ( new_n19458_, new_n5078_ ) -new_n19460_ = NAND ( new_n19436_, new_n19429_ ) -new_n19461_ = OR ( new_n19460_, new_n5080_ ) -new_n19462_ = NAND ( new_n19448_, new_n4470_ ) -new_n19463_ = OR ( new_n19462_, new_n5082_ ) -new_n19464_ = NAND ( new_n19448_, new_n19421_ ) -new_n19465_ = OR ( new_n19464_, new_n5103_ ) -new_n19466_ = NAND ( new_n19465_, new_n19463_, new_n19461_, new_n19459_ ) -new_n19467_ = NOR ( new_n19466_, new_n19457_, new_n19447_ ) -new_n19468_ = NAND ( new_n19467_, new_n19439_, new_n19425_, new_n4668_ ) -new_n19469_ = NAND ( new_n19468_, new_n19419_ ) -new_n19470_ = OR ( new_n4668_, NET_1244 ) -new_n19471_ = OR ( new_n19424_, new_n4529_ ) -new_n19472_ = OR ( new_n19427_, new_n4531_ ) -new_n19473_ = OR ( new_n19430_, new_n4533_ ) -new_n19474_ = OR ( new_n19434_, new_n4535_ ) -new_n19475_ = OR ( new_n19437_, new_n4520_ ) -new_n19476_ = AND ( new_n19475_, new_n19474_, new_n19473_, new_n19472_ ) -new_n19477_ = OR ( new_n19440_, new_n4545_ ) -new_n19478_ = OR ( new_n19443_, new_n4541_ ) -new_n19479_ = OR ( new_n19445_, new_n4543_ ) -new_n19480_ = NAND ( new_n19479_, new_n19478_, new_n19477_ ) -new_n19481_ = OR ( new_n19449_, new_n4550_ ) -new_n19482_ = OR ( new_n19451_, new_n4552_ ) -new_n19483_ = OR ( new_n19453_, new_n4554_ ) -new_n19484_ = OR ( new_n19455_, new_n4539_ ) -new_n19485_ = NAND ( new_n19484_, new_n19483_, new_n19482_, new_n19481_ ) -new_n19486_ = OR ( new_n19458_, new_n4522_ ) -new_n19487_ = OR ( new_n19460_, new_n4524_ ) -new_n19488_ = OR ( new_n19462_, new_n4526_ ) -new_n19489_ = OR ( new_n19464_, new_n4548_ ) -new_n19490_ = NAND ( new_n19489_, new_n19488_, new_n19487_, new_n19486_ ) -new_n19491_ = NOR ( new_n19490_, new_n19485_, new_n19480_ ) -new_n19492_ = NAND ( new_n19491_, new_n19476_, new_n19471_, new_n4668_ ) -new_n19493_ = NAND ( new_n19492_, new_n19470_ ) -new_n19494_ = NOR ( new_n4668_, NET_1241 ) -new_n19495_ = NOR ( new_n19424_, new_n4474_ ) -new_n19496_ = OR ( new_n19427_, new_n4479_ ) -new_n19497_ = OR ( new_n19430_, new_n4483_ ) -new_n19498_ = OR ( new_n19434_, new_n4486_ ) -new_n19499_ = OR ( new_n19437_, new_n4454_ ) -new_n19500_ = NAND ( new_n19499_, new_n19498_, new_n19497_, new_n19496_ ) -new_n19501_ = OR ( new_n19500_, new_n19495_, new_n5185_ ) -new_n19502_ = OR ( new_n19440_, new_n4500_ ) -new_n19503_ = OR ( new_n19443_, new_n4494_ ) -new_n19504_ = OR ( new_n19445_, new_n4497_ ) -new_n19505_ = NAND ( new_n19504_, new_n19503_, new_n19502_ ) -new_n19506_ = OR ( new_n19449_, new_n4507_ ) -new_n19507_ = OR ( new_n19451_, new_n4510_ ) -new_n19508_ = OR ( new_n19453_, new_n4514_ ) -new_n19509_ = OR ( new_n19455_, new_n4490_ ) -new_n19510_ = NAND ( new_n19509_, new_n19508_, new_n19507_, new_n19506_ ) -new_n19511_ = OR ( new_n19458_, new_n4459_ ) -new_n19512_ = OR ( new_n19460_, new_n4463_ ) -new_n19513_ = OR ( new_n19462_, new_n4469_ ) -new_n19514_ = OR ( new_n19464_, new_n4504_ ) -new_n19515_ = NAND ( new_n19514_, new_n19513_, new_n19512_, new_n19511_ ) -new_n19516_ = NOR ( new_n19515_, new_n19510_, new_n19505_, new_n19501_ ) -new_n19517_ = NOR ( new_n19516_, new_n19494_ ) -new_n19518_ = NOR ( new_n4668_, NET_1240 ) -new_n19519_ = NOR ( new_n19440_, new_n4677_ ) -new_n19520_ = OR ( new_n19424_, new_n4959_ ) -new_n19521_ = OR ( new_n19427_, new_n4961_ ) -new_n19522_ = OR ( new_n19430_, new_n4963_ ) -new_n19523_ = OR ( new_n19434_, new_n4669_ ) -new_n19524_ = NAND ( new_n19523_, new_n19522_, new_n19521_, new_n19520_ ) -new_n19525_ = OR ( new_n19445_, new_n4686_ ) -new_n19526_ = OR ( new_n19455_, new_n4968_ ) -new_n19527_ = OR ( new_n19443_, new_n4970_ ) -new_n19528_ = OR ( new_n19464_, new_n4691_ ) -new_n19529_ = OR ( new_n19449_, new_n4693_ ) -new_n19530_ = OR ( new_n19451_, new_n4977_ ) -new_n19531_ = OR ( new_n19453_, new_n4966_ ) -new_n19532_ = NAND ( new_n19531_, new_n19530_, new_n19529_, new_n19528_ ) -new_n19533_ = OR ( new_n19437_, new_n4671_ ) -new_n19534_ = OR ( new_n19458_, new_n4673_ ) -new_n19535_ = OR ( new_n19460_, new_n4955_ ) -new_n19536_ = OR ( new_n19462_, new_n4689_ ) -new_n19537_ = NAND ( new_n19536_, new_n19535_, new_n19534_, new_n19533_ ) -new_n19538_ = NOR ( new_n19537_, new_n19532_ ) -new_n19539_ = NAND ( new_n19538_, new_n19527_, new_n19526_, new_n19525_ ) -new_n19540_ = NOR ( new_n19539_, new_n19524_, new_n19519_, new_n5185_ ) -new_n19541_ = NOR ( new_n19540_, new_n19518_ ) -new_n19542_ = NOR ( new_n18581_, new_n18576_ ) -new_n19543_ = OR ( new_n19542_, new_n18554_ ) -new_n19544_ = NAND ( new_n18581_, new_n18576_ ) -new_n19545_ = NAND ( new_n19544_, new_n19543_ ) -new_n19546_ = OR ( new_n11042_, new_n4520_ ) -new_n19547_ = OR ( new_n10959_, new_n4522_ ) -new_n19548_ = OR ( new_n10877_, new_n4524_ ) -new_n19549_ = OR ( new_n10795_, new_n4526_ ) -new_n19550_ = NAND ( new_n19549_, new_n19548_, new_n19547_, new_n19546_ ) -new_n19551_ = OR ( new_n11372_, new_n4529_ ) -new_n19552_ = OR ( new_n11290_, new_n4531_ ) -new_n19553_ = OR ( new_n11208_, new_n4533_ ) -new_n19554_ = OR ( new_n11124_, new_n4535_ ) -new_n19555_ = NAND ( new_n19554_, new_n19553_, new_n19552_, new_n19551_ ) -new_n19556_ = OR ( new_n10379_, new_n4539_ ) -new_n19557_ = OR ( new_n10296_, new_n4541_ ) -new_n19558_ = OR ( new_n10101_, new_n4543_ ) -new_n19559_ = OR ( new_n11454_, new_n4545_ ) -new_n19560_ = NAND ( new_n19559_, new_n19558_, new_n19557_, new_n19556_ ) -new_n19561_ = OR ( new_n10713_, new_n4548_ ) -new_n19562_ = OR ( new_n10631_, new_n4550_ ) -new_n19563_ = OR ( new_n10548_, new_n4552_ ) -new_n19564_ = OR ( new_n10464_, new_n4554_ ) -new_n19565_ = NAND ( new_n19564_, new_n19563_, new_n19562_, new_n19561_ ) -new_n19566_ = NOR ( new_n19565_, new_n19560_, new_n19555_, new_n19550_ ) -new_n19567_ = NAND ( new_n19545_, new_n5185_, NET_1237 ) -new_n19568_ = NOR ( new_n19566_, new_n5185_ ) -new_n19569_ = NAND ( new_n19568_, new_n19545_ ) -new_n19570_ = NAND ( new_n19569_, new_n19567_ ) -new_n19571_ = OR ( new_n11042_, new_n5076_ ) -new_n19572_ = OR ( new_n10959_, new_n5078_ ) -new_n19573_ = OR ( new_n10877_, new_n5080_ ) -new_n19574_ = OR ( new_n10795_, new_n5082_ ) -new_n19575_ = NAND ( new_n19574_, new_n19573_, new_n19572_, new_n19571_ ) -new_n19576_ = OR ( new_n11372_, new_n5085_ ) -new_n19577_ = OR ( new_n11290_, new_n5087_ ) -new_n19578_ = OR ( new_n11208_, new_n5089_ ) -new_n19579_ = OR ( new_n11124_, new_n5091_ ) -new_n19580_ = NAND ( new_n19579_, new_n19578_, new_n19577_, new_n19576_ ) -new_n19581_ = OR ( new_n10379_, new_n5094_ ) -new_n19582_ = OR ( new_n10296_, new_n5096_ ) -new_n19583_ = OR ( new_n10101_, new_n5098_ ) -new_n19584_ = OR ( new_n11454_, new_n5100_ ) -new_n19585_ = NAND ( new_n19584_, new_n19583_, new_n19582_, new_n19581_ ) -new_n19586_ = OR ( new_n10713_, new_n5103_ ) -new_n19587_ = OR ( new_n10631_, new_n5105_ ) -new_n19588_ = OR ( new_n10548_, new_n5107_ ) -new_n19589_ = OR ( new_n10464_, new_n5109_ ) -new_n19590_ = NAND ( new_n19589_, new_n19588_, new_n19587_, new_n19586_ ) -new_n19591_ = NOR ( new_n19590_, new_n19585_, new_n19580_, new_n19575_ ) -new_n19592_ = NOR ( new_n19591_, new_n5185_ ) -new_n19593_ = NAND ( new_n19592_, new_n19570_ ) -new_n19594_ = OR ( new_n19592_, new_n19570_ ) -new_n19595_ = NOR ( new_n4668_, NET_1238 ) -new_n19596_ = NOR ( new_n19440_, new_n4648_ ) -new_n19597_ = OR ( new_n19424_, new_n4902_ ) -new_n19598_ = OR ( new_n19427_, new_n4904_ ) -new_n19599_ = OR ( new_n19430_, new_n4906_ ) -new_n19600_ = OR ( new_n19434_, new_n4640_ ) -new_n19601_ = NAND ( new_n19600_, new_n19599_, new_n19598_, new_n19597_ ) -new_n19602_ = OR ( new_n19445_, new_n4657_ ) -new_n19603_ = OR ( new_n19455_, new_n4911_ ) -new_n19604_ = OR ( new_n19443_, new_n4913_ ) -new_n19605_ = OR ( new_n19464_, new_n4662_ ) -new_n19606_ = OR ( new_n19449_, new_n4664_ ) -new_n19607_ = OR ( new_n19451_, new_n4920_ ) -new_n19608_ = OR ( new_n19453_, new_n4909_ ) -new_n19609_ = NAND ( new_n19608_, new_n19607_, new_n19606_, new_n19605_ ) -new_n19610_ = OR ( new_n19437_, new_n4642_ ) -new_n19611_ = OR ( new_n19458_, new_n4644_ ) -new_n19612_ = OR ( new_n19460_, new_n4898_ ) -new_n19613_ = OR ( new_n19462_, new_n4660_ ) -new_n19614_ = NAND ( new_n19613_, new_n19612_, new_n19611_, new_n19610_ ) -new_n19615_ = NOR ( new_n19614_, new_n19609_ ) -new_n19616_ = NAND ( new_n19615_, new_n19604_, new_n19603_, new_n19602_ ) -new_n19617_ = NOR ( new_n19616_, new_n19601_, new_n19596_, new_n5185_ ) -new_n19618_ = NOR ( new_n19617_, new_n19595_ ) -new_n19619_ = NAND ( new_n19618_, new_n19594_ ) -new_n19620_ = NAND ( new_n19619_, new_n19593_ ) -new_n19621_ = NOR ( new_n4668_, NET_1239 ) -new_n19622_ = NOR ( new_n19440_, new_n4619_ ) -new_n19623_ = OR ( new_n19424_, new_n4854_ ) -new_n19624_ = OR ( new_n19427_, new_n4856_ ) -new_n19625_ = OR ( new_n19430_, new_n4858_ ) -new_n19626_ = OR ( new_n19434_, new_n4611_ ) -new_n19627_ = NAND ( new_n19626_, new_n19625_, new_n19624_, new_n19623_ ) -new_n19628_ = OR ( new_n19445_, new_n4628_ ) -new_n19629_ = OR ( new_n19455_, new_n4863_ ) -new_n19630_ = OR ( new_n19443_, new_n4865_ ) -new_n19631_ = OR ( new_n19464_, new_n4633_ ) -new_n19632_ = OR ( new_n19449_, new_n4635_ ) -new_n19633_ = OR ( new_n19451_, new_n4872_ ) -new_n19634_ = OR ( new_n19453_, new_n4861_ ) -new_n19635_ = NAND ( new_n19634_, new_n19633_, new_n19632_, new_n19631_ ) -new_n19636_ = OR ( new_n19437_, new_n4613_ ) -new_n19637_ = OR ( new_n19458_, new_n4615_ ) -new_n19638_ = OR ( new_n19460_, new_n4850_ ) -new_n19639_ = OR ( new_n19462_, new_n4631_ ) -new_n19640_ = NAND ( new_n19639_, new_n19638_, new_n19637_, new_n19636_ ) -new_n19641_ = NOR ( new_n19640_, new_n19635_ ) -new_n19642_ = NAND ( new_n19641_, new_n19630_, new_n19629_, new_n19628_ ) -new_n19643_ = NOR ( new_n19642_, new_n19627_, new_n19622_, new_n5185_ ) -new_n19644_ = NOR ( new_n19643_, new_n19621_ ) -new_n19645_ = NAND ( new_n19644_, new_n19620_, new_n19541_, new_n19517_ ) -new_n19646_ = OR ( new_n4668_, NET_1242 ) -new_n19647_ = OR ( new_n19424_, new_n5036_ ) -new_n19648_ = OR ( new_n19427_, new_n5038_ ) -new_n19649_ = OR ( new_n19430_, new_n5040_ ) -new_n19650_ = OR ( new_n19434_, new_n5042_ ) -new_n19651_ = OR ( new_n19437_, new_n5027_ ) -new_n19652_ = AND ( new_n19651_, new_n19650_, new_n19649_, new_n19648_ ) -new_n19653_ = OR ( new_n19440_, new_n5051_ ) -new_n19654_ = OR ( new_n19443_, new_n5047_ ) -new_n19655_ = OR ( new_n19445_, new_n5049_ ) -new_n19656_ = NAND ( new_n19655_, new_n19654_, new_n19653_ ) -new_n19657_ = OR ( new_n19449_, new_n5056_ ) -new_n19658_ = OR ( new_n19451_, new_n5058_ ) -new_n19659_ = OR ( new_n19453_, new_n5060_ ) -new_n19660_ = OR ( new_n19455_, new_n5045_ ) -new_n19661_ = NAND ( new_n19660_, new_n19659_, new_n19658_, new_n19657_ ) -new_n19662_ = OR ( new_n19458_, new_n5029_ ) -new_n19663_ = OR ( new_n19460_, new_n5031_ ) -new_n19664_ = OR ( new_n19462_, new_n5033_ ) -new_n19665_ = OR ( new_n19464_, new_n5054_ ) -new_n19666_ = NAND ( new_n19665_, new_n19664_, new_n19663_, new_n19662_ ) -new_n19667_ = NOR ( new_n19666_, new_n19661_, new_n19656_ ) -new_n19668_ = NAND ( new_n19667_, new_n19652_, new_n19647_, new_n4668_ ) -new_n19669_ = NAND ( new_n19668_, new_n19646_ ) -new_n19670_ = OR ( new_n4668_, NET_1243 ) -new_n19671_ = OR ( new_n19424_, new_n4791_ ) -new_n19672_ = OR ( new_n19427_, new_n4793_ ) -new_n19673_ = OR ( new_n19430_, new_n4795_ ) -new_n19674_ = OR ( new_n19434_, new_n4593_ ) -new_n19675_ = OR ( new_n19437_, new_n4582_ ) -new_n19676_ = AND ( new_n19675_, new_n19674_, new_n19673_, new_n19672_ ) -new_n19677_ = OR ( new_n19440_, new_n4600_ ) -new_n19678_ = OR ( new_n19443_, new_n4801_ ) -new_n19679_ = OR ( new_n19445_, new_n4598_ ) -new_n19680_ = NAND ( new_n19679_, new_n19678_, new_n19677_ ) -new_n19681_ = OR ( new_n19449_, new_n4605_ ) -new_n19682_ = OR ( new_n19451_, new_n4808_ ) -new_n19683_ = OR ( new_n19453_, new_n4810_ ) -new_n19684_ = OR ( new_n19455_, new_n4799_ ) -new_n19685_ = NAND ( new_n19684_, new_n19683_, new_n19682_, new_n19681_ ) -new_n19686_ = OR ( new_n19458_, new_n4584_ ) -new_n19687_ = OR ( new_n19460_, new_n4787_ ) -new_n19688_ = OR ( new_n19462_, new_n4587_ ) -new_n19689_ = OR ( new_n19464_, new_n4603_ ) -new_n19690_ = NAND ( new_n19689_, new_n19688_, new_n19687_, new_n19686_ ) -new_n19691_ = NOR ( new_n19690_, new_n19685_, new_n19680_ ) -new_n19692_ = NAND ( new_n19691_, new_n19676_, new_n19671_, new_n4668_ ) -new_n19693_ = NAND ( new_n19692_, new_n19670_ ) -new_n19694_ = OR ( new_n19693_, new_n19669_, new_n19645_ ) -new_n19695_ = OR ( new_n19694_, new_n19493_ ) -new_n19696_ = NOR ( new_n19695_, new_n19469_ ) -new_n19697_ = AND ( new_n19695_, new_n19469_ ) -new_n19698_ = OR ( new_n19697_, new_n19696_ ) -new_n19699_ = NOR ( new_n19698_, new_n7114_ ) -new_n19700_ = NAND ( new_n7048_, NET_1245 ) -new_n19701_ = NOT ( NET_1404 ) -new_n19702_ = OR ( new_n7112_, new_n19701_ ) -new_n19703_ = NAND ( new_n7015_, NET_1277 ) -new_n19704_ = NAND ( new_n7124_, NET_1372 ) -new_n19705_ = NAND ( new_n19704_, new_n19703_, new_n19702_, new_n19700_ ) -new_n19706_ = NOR ( new_n19705_, new_n19699_ ) -new_n19707_ = XOR ( new_n19706_, new_n6196_ ) -new_n19708_ = NAND ( new_n19644_, new_n19620_ ) -new_n19709_ = XOR ( new_n19708_, new_n19541_ ) -new_n19710_ = NOR ( new_n19709_, new_n7114_ ) -new_n19711_ = NAND ( new_n7048_, NET_1240 ) -new_n19712_ = NOT ( NET_1399 ) -new_n19713_ = OR ( new_n7112_, new_n19712_ ) -new_n19714_ = NAND ( new_n7015_, NET_1272 ) -new_n19715_ = NAND ( new_n7124_, NET_1367 ) -new_n19716_ = NAND ( new_n19715_, new_n19714_, new_n19713_, new_n19711_ ) -new_n19717_ = NOR ( new_n19716_, new_n19710_ ) -new_n19718_ = XNOR ( new_n19717_, new_n6196_ ) -new_n19719_ = NOT ( NET_1237 ) -new_n19720_ = OR ( new_n4668_, new_n19719_ ) -new_n19721_ = XOR ( new_n19720_, new_n19568_ ) -new_n19722_ = XOR ( new_n19721_, new_n19545_ ) -new_n19723_ = NOR ( new_n19722_, new_n7114_ ) -new_n19724_ = NAND ( new_n7048_, NET_1237 ) -new_n19725_ = NOT ( NET_1396 ) -new_n19726_ = OR ( new_n7112_, new_n19725_ ) -new_n19727_ = NAND ( new_n7015_, NET_1269 ) -new_n19728_ = NAND ( new_n7124_, NET_1364 ) -new_n19729_ = NAND ( new_n19728_, new_n19727_, new_n19726_, new_n19724_ ) -new_n19730_ = NOR ( new_n19729_, new_n19723_ ) -new_n19731_ = XNOR ( new_n19730_, new_n6196_ ) -new_n19732_ = NOT ( new_n19731_ ) -new_n19733_ = NOT ( new_n18591_ ) -new_n19734_ = OR ( new_n19733_, new_n18310_, new_n17825_ ) -new_n19735_ = OR ( new_n19734_, new_n19732_ ) -new_n19736_ = XNOR ( new_n19618_, new_n19592_ ) -new_n19737_ = XOR ( new_n19736_, new_n19570_ ) -new_n19738_ = NOR ( new_n19737_, new_n7114_ ) -new_n19739_ = NAND ( new_n7048_, NET_1238 ) -new_n19740_ = NOT ( NET_1397 ) -new_n19741_ = OR ( new_n7112_, new_n19740_ ) -new_n19742_ = NAND ( new_n7015_, NET_1270 ) -new_n19743_ = NAND ( new_n7124_, NET_1365 ) -new_n19744_ = NAND ( new_n19743_, new_n19742_, new_n19741_, new_n19739_ ) -new_n19745_ = NOR ( new_n19744_, new_n19738_ ) -new_n19746_ = XNOR ( new_n19745_, new_n6196_ ) -new_n19747_ = NOT ( new_n19746_ ) -new_n19748_ = XNOR ( new_n19644_, new_n19620_ ) -new_n19749_ = NOR ( new_n19748_, new_n7114_ ) -new_n19750_ = NAND ( new_n7048_, NET_1239 ) -new_n19751_ = NOT ( NET_1398 ) -new_n19752_ = OR ( new_n7112_, new_n19751_ ) -new_n19753_ = NAND ( new_n7015_, NET_1271 ) -new_n19754_ = NAND ( new_n7124_, NET_1366 ) -new_n19755_ = NAND ( new_n19754_, new_n19753_, new_n19752_, new_n19750_ ) -new_n19756_ = NOR ( new_n19755_, new_n19749_ ) -new_n19757_ = XOR ( new_n19756_, new_n6196_ ) -new_n19758_ = NOR ( new_n19757_, new_n19747_, new_n19735_ ) -new_n19759_ = NAND ( new_n19644_, new_n19620_, new_n19541_ ) -new_n19760_ = XOR ( new_n19759_, new_n19517_ ) -new_n19761_ = NOR ( new_n19760_, new_n7114_ ) -new_n19762_ = NAND ( new_n7048_, NET_1241 ) -new_n19763_ = NOT ( NET_1400 ) -new_n19764_ = OR ( new_n7112_, new_n19763_ ) -new_n19765_ = NAND ( new_n7015_, NET_1273 ) -new_n19766_ = NAND ( new_n7124_, NET_1368 ) -new_n19767_ = NAND ( new_n19766_, new_n19765_, new_n19764_, new_n19762_ ) -new_n19768_ = NOR ( new_n19767_, new_n19761_ ) -new_n19769_ = XNOR ( new_n19768_, new_n6196_ ) -new_n19770_ = OR ( new_n19669_, new_n19645_ ) -new_n19771_ = NAND ( new_n19669_, new_n19645_ ) -new_n19772_ = NAND ( new_n19771_, new_n19770_ ) -new_n19773_ = NOR ( new_n19772_, new_n7114_ ) -new_n19774_ = NAND ( new_n7048_, NET_1242 ) -new_n19775_ = NOT ( NET_1401 ) -new_n19776_ = OR ( new_n7112_, new_n19775_ ) -new_n19777_ = NAND ( new_n7015_, NET_1274 ) -new_n19778_ = NAND ( new_n7124_, NET_1369 ) -new_n19779_ = NAND ( new_n19778_, new_n19777_, new_n19776_, new_n19774_ ) -new_n19780_ = NOR ( new_n19779_, new_n19773_ ) -new_n19781_ = XNOR ( new_n19780_, new_n6196_ ) -new_n19782_ = NAND ( new_n19781_, new_n19769_, new_n19758_, new_n19718_ ) -new_n19783_ = XNOR ( new_n19694_, new_n19493_ ) -new_n19784_ = NOR ( new_n19783_, new_n7114_ ) -new_n19785_ = NAND ( new_n7048_, NET_1244 ) -new_n19786_ = NOT ( NET_1403 ) -new_n19787_ = OR ( new_n7112_, new_n19786_ ) -new_n19788_ = NAND ( new_n7015_, NET_1276 ) -new_n19789_ = NAND ( new_n7124_, NET_1371 ) -new_n19790_ = NAND ( new_n19789_, new_n19788_, new_n19787_, new_n19785_ ) -new_n19791_ = NOR ( new_n19790_, new_n19784_ ) -new_n19792_ = XOR ( new_n19791_, new_n6196_ ) -new_n19793_ = NAND ( new_n19770_, new_n19693_ ) -new_n19794_ = NAND ( new_n19793_, new_n19694_ ) -new_n19795_ = OR ( new_n19794_, new_n7114_ ) -new_n19796_ = NAND ( new_n7048_, NET_1243 ) -new_n19797_ = NOT ( NET_1402 ) -new_n19798_ = OR ( new_n7112_, new_n19797_ ) -new_n19799_ = NAND ( new_n7015_, NET_1275 ) -new_n19800_ = NAND ( new_n7124_, NET_1370 ) -new_n19801_ = AND ( new_n19800_, new_n19799_, new_n19798_ ) -new_n19802_ = NAND ( new_n19801_, new_n19796_, new_n19795_ ) -new_n19803_ = XOR ( new_n19802_, new_n6196_ ) -new_n19804_ = NOT ( new_n19803_ ) -new_n19805_ = OR ( new_n19804_, new_n19792_, new_n19782_ ) -new_n19806_ = NOR ( new_n19805_, new_n19707_ ) -new_n19807_ = NAND ( new_n7048_, NET_1246 ) -new_n19808_ = OR ( new_n7112_, new_n4710_ ) -new_n19809_ = NAND ( new_n7124_, NET_1373 ) -new_n19810_ = NAND ( new_n7015_, NET_1278 ) -new_n19811_ = NAND ( new_n19810_, new_n19809_, new_n19808_, new_n19807_ ) -new_n19812_ = XOR ( new_n19811_, new_n6196_ ) -new_n19813_ = XOR ( new_n19812_, new_n19806_ ) -new_n19814_ = NOT ( new_n19813_ ) -new_n19815_ = OR ( new_n19814_, new_n14930_ ) -new_n19816_ = NOR ( new_n14927_, new_n4697_ ) -new_n19817_ = NAND ( new_n19816_, new_n10131_ ) -new_n19818_ = NAND ( new_n14927_, NET_1373 ) -NET_22100 = NAND ( new_n19818_, new_n19817_, new_n19815_ ) -new_n19820_ = NAND ( new_n11849_, NET_1405 ) -new_n19821_ = OR ( new_n19814_, new_n11911_ ) -NET_22101 = NAND ( new_n19821_, new_n19820_ ) -new_n19823_ = NOR ( new_n13170_, new_n13139_ ) -new_n19824_ = AND ( new_n13170_, new_n13139_ ) -new_n19825_ = OR ( new_n19824_, new_n19823_ ) -new_n19826_ = NAND ( new_n19825_, new_n18332_ ) -new_n19827_ = OR ( new_n19825_, new_n18332_ ) -new_n19828_ = NAND ( new_n19827_, new_n19826_, new_n6591_ ) -new_n19829_ = OR ( new_n14015_, new_n13170_ ) -new_n19830_ = OR ( new_n14021_, new_n13159_ ) -new_n19831_ = NOT ( NET_517 ) -new_n19832_ = OR ( new_n14024_, new_n19831_ ) -new_n19833_ = NAND ( new_n14026_, NET_326 ) -new_n19834_ = AND ( new_n19833_, new_n19832_, new_n19830_ ) -new_n19835_ = NAND ( new_n19834_, new_n19829_, new_n19828_ ) -new_n19836_ = NAND ( new_n19835_, new_n14020_ ) -new_n19837_ = OR ( new_n19835_, new_n14020_ ) -new_n19838_ = NAND ( new_n19837_, new_n19836_ ) -new_n19839_ = NAND ( new_n18344_, new_n18342_, new_n17924_ ) -new_n19840_ = NAND ( new_n19839_, new_n14020_ ) -new_n19841_ = NOT ( new_n18342_ ) -new_n19842_ = NAND ( new_n18345_, new_n19841_ ) -new_n19843_ = NAND ( new_n19842_, new_n19840_ ) -new_n19844_ = XOR ( new_n19843_, new_n19838_ ) -new_n19845_ = NOR ( new_n19844_, new_n14278_ ) -new_n19846_ = NOR ( new_n14281_, new_n13170_ ) -new_n19847_ = OR ( new_n14284_, new_n13159_ ) -new_n19848_ = OR ( new_n14286_, new_n13145_ ) -new_n19849_ = OR ( new_n14275_, new_n13141_ ) -new_n19850_ = OR ( new_n14289_, new_n19831_ ) -new_n19851_ = NAND ( new_n19850_, new_n19849_, new_n19848_, new_n19847_ ) -NET_22159 = OR ( new_n19851_, new_n19846_, new_n19845_ ) -new_n19853_ = NOR ( new_n19844_, new_n14295_ ) -new_n19854_ = OR ( new_n14297_, new_n13170_ ) -new_n19855_ = OR ( new_n14299_, new_n13159_ ) -new_n19856_ = OR ( new_n14301_, new_n19831_ ) -new_n19857_ = OR ( new_n14294_, new_n13162_ ) -new_n19858_ = NAND ( new_n19857_, new_n19856_, new_n19855_, new_n19854_ ) -NET_22160 = OR ( new_n19858_, new_n19853_ ) -new_n19860_ = OR ( new_n19844_, new_n14312_ ) -new_n19861_ = OR ( new_n14314_, new_n13159_ ) -new_n19862_ = OR ( new_n14317_, new_n5564_ ) -new_n19863_ = NAND ( new_n14311_, NET_453 ) -NET_22161 = NAND ( new_n19863_, new_n19862_, new_n19861_, new_n19860_ ) -new_n19865_ = NAND ( new_n18926_, new_n18924_ ) -new_n19866_ = NAND ( new_n19865_, new_n18927_ ) -new_n19867_ = OR ( new_n19866_, new_n11723_ ) -new_n19868_ = NAND ( new_n11740_, NET_339 ) -new_n19869_ = NOT ( NET_371 ) -new_n19870_ = OR ( new_n6828_, new_n19869_ ) -new_n19871_ = NAND ( new_n5529_, NET_530 ) -new_n19872_ = NAND ( new_n19871_, new_n19870_, new_n19868_, new_n19867_ ) -new_n19873_ = XNOR ( new_n19872_, new_n6707_ ) -new_n19874_ = NOR ( new_n17378_, new_n6706_ ) -new_n19875_ = NOR ( new_n19874_, new_n19873_ ) -new_n19876_ = AND ( new_n19874_, new_n19873_ ) -new_n19877_ = NOR ( new_n19876_, new_n19875_ ) -new_n19878_ = NOR ( new_n18489_, new_n18485_ ) -new_n19879_ = NOR ( new_n19878_, new_n18486_ ) -new_n19880_ = XOR ( new_n19879_, new_n19877_ ) -new_n19881_ = OR ( new_n19880_, new_n11715_ ) -new_n19882_ = OR ( new_n19866_, new_n11775_ ) -new_n19883_ = NAND ( new_n11713_, NET_498 ) -NET_22162 = NAND ( new_n19883_, new_n19882_, new_n19881_ ) -new_n19885_ = NOR ( new_n13227_, new_n13196_ ) -new_n19886_ = AND ( new_n13227_, new_n13196_ ) -new_n19887_ = OR ( new_n19886_, new_n19885_ ) -new_n19888_ = NAND ( new_n19887_, new_n18367_ ) -new_n19889_ = OR ( new_n19887_, new_n18367_ ) -new_n19890_ = NAND ( new_n19889_, new_n19888_, new_n6636_ ) -new_n19891_ = OR ( new_n14323_, new_n13227_ ) -new_n19892_ = OR ( new_n14329_, new_n13216_ ) -new_n19893_ = NOT ( NET_966 ) -new_n19894_ = OR ( new_n14332_, new_n19893_ ) -new_n19895_ = NAND ( new_n14334_, NET_775 ) -new_n19896_ = AND ( new_n19895_, new_n19894_, new_n19892_ ) -new_n19897_ = NAND ( new_n19896_, new_n19891_, new_n19890_ ) -new_n19898_ = NAND ( new_n19897_, new_n14328_ ) -new_n19899_ = OR ( new_n19897_, new_n14328_ ) -new_n19900_ = NAND ( new_n19899_, new_n19898_ ) -new_n19901_ = NAND ( new_n18379_, new_n18377_, new_n18086_ ) -new_n19902_ = NAND ( new_n19901_, new_n14328_ ) -new_n19903_ = NOT ( new_n18377_ ) -new_n19904_ = NAND ( new_n18380_, new_n19903_ ) -new_n19905_ = NAND ( new_n19904_, new_n19902_ ) -new_n19906_ = XOR ( new_n19905_, new_n19900_ ) -new_n19907_ = NOR ( new_n19906_, new_n14586_ ) -new_n19908_ = NOR ( new_n14589_, new_n13227_ ) -new_n19909_ = OR ( new_n14592_, new_n13216_ ) -new_n19910_ = OR ( new_n14594_, new_n13202_ ) -new_n19911_ = OR ( new_n14583_, new_n13198_ ) -new_n19912_ = OR ( new_n14597_, new_n19893_ ) -new_n19913_ = NAND ( new_n19912_, new_n19911_, new_n19910_, new_n19909_ ) -NET_22215 = OR ( new_n19913_, new_n19908_, new_n19907_ ) -new_n19915_ = NOR ( new_n19906_, new_n14603_ ) -new_n19916_ = OR ( new_n14605_, new_n13227_ ) -new_n19917_ = OR ( new_n14607_, new_n13216_ ) -new_n19918_ = OR ( new_n14609_, new_n19893_ ) -new_n19919_ = OR ( new_n14602_, new_n13219_ ) -new_n19920_ = NAND ( new_n19919_, new_n19918_, new_n19917_, new_n19916_ ) -NET_22216 = OR ( new_n19920_, new_n19915_ ) -new_n19922_ = OR ( new_n19906_, new_n14620_ ) -new_n19923_ = OR ( new_n14622_, new_n13216_ ) -new_n19924_ = NAND ( new_n14625_, new_n5902_ ) -new_n19925_ = NAND ( new_n14619_, NET_902 ) -NET_22217 = NAND ( new_n19925_, new_n19924_, new_n19923_, new_n19922_ ) -new_n19927_ = NAND ( new_n19330_, new_n19328_ ) -new_n19928_ = NAND ( new_n19927_, new_n19331_ ) -new_n19929_ = OR ( new_n19928_, new_n11791_ ) -new_n19930_ = NAND ( new_n11808_, NET_788 ) -new_n19931_ = NOT ( NET_820 ) -new_n19932_ = OR ( new_n6988_, new_n19931_ ) -new_n19933_ = NAND ( new_n5827_, NET_979 ) -new_n19934_ = NAND ( new_n19933_, new_n19932_, new_n19930_, new_n19929_ ) -new_n19935_ = XNOR ( new_n19934_, new_n6867_ ) -new_n19936_ = NOR ( new_n17548_, new_n6866_ ) -new_n19937_ = NOR ( new_n19936_, new_n19935_ ) -new_n19938_ = AND ( new_n19936_, new_n19935_ ) -new_n19939_ = NOR ( new_n19938_, new_n19937_ ) -new_n19940_ = NOR ( new_n18547_, new_n18543_ ) -new_n19941_ = NOR ( new_n19940_, new_n18544_ ) -new_n19942_ = XOR ( new_n19941_, new_n19939_ ) -new_n19943_ = OR ( new_n19942_, new_n11783_ ) -new_n19944_ = OR ( new_n19928_, new_n11843_ ) -new_n19945_ = NAND ( new_n11781_, NET_947 ) -NET_22218 = NAND ( new_n19945_, new_n19944_, new_n19943_ ) -new_n19947_ = NOR ( new_n13284_, new_n13253_ ) -new_n19948_ = AND ( new_n13284_, new_n13253_ ) -new_n19949_ = OR ( new_n19948_, new_n19947_ ) -new_n19950_ = NAND ( new_n19949_, new_n18402_ ) -new_n19951_ = OR ( new_n19949_, new_n18402_ ) -new_n19952_ = NAND ( new_n19951_, new_n19950_, new_n6681_ ) -new_n19953_ = OR ( new_n14631_, new_n13284_ ) -new_n19954_ = OR ( new_n14637_, new_n13273_ ) -new_n19955_ = NOT ( NET_1415 ) -new_n19956_ = OR ( new_n14640_, new_n19955_ ) -new_n19957_ = NAND ( new_n14642_, NET_1224 ) -new_n19958_ = AND ( new_n19957_, new_n19956_, new_n19954_ ) -new_n19959_ = NAND ( new_n19958_, new_n19953_, new_n19952_ ) -new_n19960_ = NAND ( new_n19959_, new_n14636_ ) -new_n19961_ = OR ( new_n19959_, new_n14636_ ) -new_n19962_ = NAND ( new_n19961_, new_n19960_ ) -new_n19963_ = NAND ( new_n18414_, new_n18412_, new_n18248_ ) -new_n19964_ = NAND ( new_n19963_, new_n14636_ ) -new_n19965_ = NOT ( new_n18412_ ) -new_n19966_ = NAND ( new_n18415_, new_n19965_ ) -new_n19967_ = NAND ( new_n19966_, new_n19964_ ) -new_n19968_ = XOR ( new_n19967_, new_n19962_ ) -new_n19969_ = NOR ( new_n19968_, new_n14894_ ) -new_n19970_ = NOR ( new_n14897_, new_n13284_ ) -new_n19971_ = OR ( new_n14900_, new_n13273_ ) -new_n19972_ = OR ( new_n14902_, new_n13259_ ) -new_n19973_ = OR ( new_n14891_, new_n13255_ ) -new_n19974_ = OR ( new_n14905_, new_n19955_ ) -new_n19975_ = NAND ( new_n19974_, new_n19973_, new_n19972_, new_n19971_ ) -NET_22276 = OR ( new_n19975_, new_n19970_, new_n19969_ ) -new_n19977_ = NOR ( new_n19968_, new_n14911_ ) -new_n19978_ = OR ( new_n14913_, new_n13284_ ) -new_n19979_ = OR ( new_n14915_, new_n13273_ ) -new_n19980_ = OR ( new_n14917_, new_n19955_ ) -new_n19981_ = OR ( new_n14910_, new_n13276_ ) -new_n19982_ = NAND ( new_n19981_, new_n19980_, new_n19979_, new_n19978_ ) -NET_22277 = OR ( new_n19982_, new_n19977_ ) -new_n19984_ = OR ( new_n19968_, new_n14928_ ) -new_n19985_ = OR ( new_n14930_, new_n13273_ ) -new_n19986_ = NAND ( new_n14933_, new_n6278_ ) -new_n19987_ = NAND ( new_n14927_, NET_1351 ) -NET_22278 = NAND ( new_n19987_, new_n19986_, new_n19985_, new_n19984_ ) -new_n19989_ = NAND ( new_n19734_, new_n19732_ ) -new_n19990_ = NAND ( new_n19989_, new_n19735_ ) -new_n19991_ = OR ( new_n19990_, new_n11859_ ) -new_n19992_ = NAND ( new_n11876_, NET_1237 ) -new_n19993_ = NOT ( NET_1269 ) -new_n19994_ = OR ( new_n7148_, new_n19993_ ) -new_n19995_ = NAND ( new_n6196_, NET_1428 ) -new_n19996_ = NAND ( new_n19995_, new_n19994_, new_n19992_, new_n19991_ ) -new_n19997_ = XNOR ( new_n19996_, new_n7027_ ) -new_n19998_ = NOR ( new_n17718_, new_n7026_ ) -new_n19999_ = NOR ( new_n19998_, new_n19997_ ) -new_n20000_ = AND ( new_n19998_, new_n19997_ ) -new_n20001_ = NOR ( new_n20000_, new_n19999_ ) -new_n20002_ = NOR ( new_n18605_, new_n18601_ ) -new_n20003_ = NOR ( new_n20002_, new_n18602_ ) -new_n20004_ = XOR ( new_n20003_, new_n20001_ ) -new_n20005_ = OR ( new_n20004_, new_n11851_ ) -new_n20006_ = OR ( new_n19990_, new_n11911_ ) -new_n20007_ = NAND ( new_n11849_, NET_1396 ) -NET_22279 = NAND ( new_n20007_, new_n20006_, new_n20005_ ) -new_n20009_ = NAND ( new_n14274_, new_n13831_, new_n13706_, new_n5776_ ) -new_n20010_ = AND ( new_n20009_, NET_176 ) -new_n20011_ = NAND ( new_n20010_, new_n13691_, new_n3388_ ) -new_n20012_ = OR ( new_n20011_, new_n17422_ ) -new_n20013_ = NAND ( new_n20010_, new_n13690_, new_n3347_, new_n3224_ ) -new_n20014_ = NAND ( new_n20009_, new_n19006_, NET_177 ) -new_n20015_ = NAND ( new_n20014_, new_n20013_ ) -new_n20016_ = NOT ( new_n20015_ ) -new_n20017_ = OR ( new_n20016_, new_n12702_ ) -new_n20018_ = NAND ( new_n20010_, new_n13689_, new_n3347_ ) -new_n20019_ = NAND ( new_n20009_, new_n19005_, NET_177 ) -new_n20020_ = NAND ( new_n20019_, new_n20018_ ) -new_n20021_ = NOT ( new_n20020_ ) -new_n20022_ = OR ( new_n20021_, new_n12720_ ) -new_n20023_ = NAND ( new_n13690_, new_n3347_, new_n3395_ ) -new_n20024_ = OR ( new_n13691_, new_n3692_ ) -new_n20025_ = NAND ( new_n20024_, new_n20023_ ) -new_n20026_ = NAND ( new_n20025_, new_n20010_ ) -new_n20027_ = OR ( new_n20026_, new_n12693_ ) -new_n20028_ = NAND ( new_n20009_, NET_178, new_n3072_ ) -new_n20029_ = OR ( new_n20028_, new_n12705_ ) -new_n20030_ = OR ( new_n20009_, new_n17408_ ) -new_n20031_ = NAND ( new_n20009_, new_n3082_, new_n3089_ ) -new_n20032_ = AND ( new_n20031_, new_n20030_, new_n20029_, new_n20027_ ) -NET_22371 = NAND ( new_n20032_, new_n20022_, new_n20017_, new_n20012_ ) -new_n20034_ = OR ( new_n20011_, new_n17927_ ) -new_n20035_ = OR ( new_n20016_, new_n12821_ ) -new_n20036_ = OR ( new_n20021_, new_n12835_ ) -new_n20037_ = OR ( new_n20026_, new_n12811_ ) -new_n20038_ = OR ( new_n20028_, new_n12824_ ) -new_n20039_ = OR ( new_n20009_, new_n17918_ ) -new_n20040_ = AND ( new_n20039_, new_n20038_, new_n20037_, new_n20031_ ) -NET_22372 = NAND ( new_n20040_, new_n20036_, new_n20035_, new_n20034_ ) -new_n20042_ = OR ( new_n20011_, new_n18346_ ) -new_n20043_ = OR ( new_n20016_, new_n12969_ ) -new_n20044_ = OR ( new_n20021_, new_n12977_ ) -new_n20045_ = OR ( new_n20026_, new_n12921_ ) -new_n20046_ = OR ( new_n20028_, new_n12972_ ) -new_n20047_ = OR ( new_n20009_, new_n18338_ ) -new_n20048_ = AND ( new_n20047_, new_n20046_, new_n20045_, new_n20031_ ) -NET_22373 = NAND ( new_n20048_, new_n20044_, new_n20043_, new_n20042_ ) -new_n20050_ = OR ( new_n20011_, new_n19844_ ) -new_n20051_ = OR ( new_n20016_, new_n13159_ ) -new_n20052_ = OR ( new_n20021_, new_n13170_ ) -new_n20053_ = OR ( new_n20026_, new_n13147_ ) -new_n20054_ = OR ( new_n20028_, new_n13162_ ) -new_n20055_ = OR ( new_n20009_, new_n19831_ ) -new_n20056_ = AND ( new_n20055_, new_n20054_, new_n20053_, new_n20031_ ) -NET_22374 = NAND ( new_n20056_, new_n20052_, new_n20051_, new_n20050_ ) -new_n20058_ = NAND ( new_n14582_, new_n13893_, new_n13765_, new_n6145_ ) -new_n20059_ = AND ( new_n20058_, NET_625 ) -new_n20060_ = NAND ( new_n20059_, new_n13750_, new_n4133_ ) -new_n20061_ = OR ( new_n20060_, new_n17592_ ) -new_n20062_ = NAND ( new_n20059_, new_n13749_, new_n4092_, new_n3969_ ) -new_n20063_ = NAND ( new_n20058_, new_n19410_, NET_626 ) -new_n20064_ = NAND ( new_n20063_, new_n20062_ ) -new_n20065_ = NOT ( new_n20064_ ) -new_n20066_ = OR ( new_n20065_, new_n12741_ ) -new_n20067_ = NAND ( new_n20059_, new_n13748_, new_n4092_ ) -new_n20068_ = NAND ( new_n20058_, new_n19409_, NET_626 ) -new_n20069_ = NAND ( new_n20068_, new_n20067_ ) -new_n20070_ = NOT ( new_n20069_ ) -new_n20071_ = OR ( new_n20070_, new_n12759_ ) -new_n20072_ = NAND ( new_n13749_, new_n4092_, new_n4140_ ) -new_n20073_ = OR ( new_n13750_, new_n4437_ ) -new_n20074_ = NAND ( new_n20073_, new_n20072_ ) -new_n20075_ = NAND ( new_n20074_, new_n20059_ ) -new_n20076_ = OR ( new_n20075_, new_n12732_ ) -new_n20077_ = NAND ( new_n20058_, NET_627, new_n3817_ ) -new_n20078_ = OR ( new_n20077_, new_n12744_ ) -new_n20079_ = OR ( new_n20058_, new_n17578_ ) -new_n20080_ = NAND ( new_n20058_, new_n3827_, new_n3834_ ) -new_n20081_ = AND ( new_n20080_, new_n20079_, new_n20078_, new_n20076_ ) -NET_22401 = NAND ( new_n20081_, new_n20071_, new_n20066_, new_n20061_ ) -new_n20083_ = OR ( new_n20060_, new_n18089_ ) -new_n20084_ = OR ( new_n20065_, new_n12858_ ) -new_n20085_ = OR ( new_n20070_, new_n12872_ ) -new_n20086_ = OR ( new_n20075_, new_n12848_ ) -new_n20087_ = OR ( new_n20077_, new_n12861_ ) -new_n20088_ = OR ( new_n20058_, new_n18080_ ) -new_n20089_ = AND ( new_n20088_, new_n20087_, new_n20086_, new_n20080_ ) -NET_22402 = NAND ( new_n20089_, new_n20085_, new_n20084_, new_n20083_ ) -new_n20091_ = OR ( new_n20060_, new_n18381_ ) -new_n20092_ = OR ( new_n20065_, new_n13037_ ) -new_n20093_ = OR ( new_n20070_, new_n13045_ ) -new_n20094_ = OR ( new_n20075_, new_n12989_ ) -new_n20095_ = OR ( new_n20077_, new_n13040_ ) -new_n20096_ = OR ( new_n20058_, new_n18373_ ) -new_n20097_ = AND ( new_n20096_, new_n20095_, new_n20094_, new_n20080_ ) -NET_22403 = NAND ( new_n20097_, new_n20093_, new_n20092_, new_n20091_ ) -new_n20099_ = OR ( new_n20060_, new_n19906_ ) -new_n20100_ = OR ( new_n20065_, new_n13216_ ) -new_n20101_ = OR ( new_n20070_, new_n13227_ ) -new_n20102_ = OR ( new_n20075_, new_n13204_ ) -new_n20103_ = OR ( new_n20077_, new_n13219_ ) -new_n20104_ = OR ( new_n20058_, new_n19893_ ) -new_n20105_ = AND ( new_n20104_, new_n20103_, new_n20102_, new_n20080_ ) -NET_22404 = NAND ( new_n20105_, new_n20101_, new_n20100_, new_n20099_ ) -new_n20107_ = NAND ( new_n14890_, new_n13955_, new_n13824_, new_n6530_ ) -new_n20108_ = AND ( new_n20107_, NET_1074 ) -new_n20109_ = NAND ( new_n20108_, new_n13809_, new_n4877_ ) -new_n20110_ = OR ( new_n20109_, new_n17762_ ) -new_n20111_ = NAND ( new_n20108_, new_n13808_, new_n4836_, new_n4713_ ) -new_n20112_ = NAND ( new_n20107_, new_n19814_, NET_1075 ) -new_n20113_ = NAND ( new_n20112_, new_n20111_ ) -new_n20114_ = NOT ( new_n20113_ ) -new_n20115_ = OR ( new_n20114_, new_n12780_ ) -new_n20116_ = NAND ( new_n20108_, new_n13807_, new_n4836_ ) -new_n20117_ = NAND ( new_n20107_, new_n19813_, NET_1075 ) -new_n20118_ = NAND ( new_n20117_, new_n20116_ ) -new_n20119_ = NOT ( new_n20118_ ) -new_n20120_ = OR ( new_n20119_, new_n12798_ ) -new_n20121_ = NAND ( new_n13808_, new_n4836_, new_n4884_ ) -new_n20122_ = OR ( new_n13809_, new_n5181_ ) -new_n20123_ = NAND ( new_n20122_, new_n20121_ ) -new_n20124_ = NAND ( new_n20123_, new_n20108_ ) -new_n20125_ = OR ( new_n20124_, new_n12771_ ) -new_n20126_ = NAND ( new_n20107_, NET_1076, new_n4561_ ) -new_n20127_ = OR ( new_n20126_, new_n12783_ ) -new_n20128_ = OR ( new_n20107_, new_n17748_ ) -new_n20129_ = NAND ( new_n20107_, new_n4571_, new_n4578_ ) -new_n20130_ = AND ( new_n20129_, new_n20128_, new_n20127_, new_n20125_ ) -NET_22431 = NAND ( new_n20130_, new_n20120_, new_n20115_, new_n20110_ ) -new_n20132_ = OR ( new_n20109_, new_n18251_ ) -new_n20133_ = OR ( new_n20114_, new_n12895_ ) -new_n20134_ = OR ( new_n20119_, new_n12909_ ) -new_n20135_ = OR ( new_n20124_, new_n12885_ ) -new_n20136_ = OR ( new_n20126_, new_n12898_ ) -new_n20137_ = OR ( new_n20107_, new_n18242_ ) -new_n20138_ = AND ( new_n20137_, new_n20136_, new_n20135_, new_n20129_ ) -NET_22432 = NAND ( new_n20138_, new_n20134_, new_n20133_, new_n20132_ ) -new_n20140_ = OR ( new_n20109_, new_n18416_ ) -new_n20141_ = OR ( new_n20114_, new_n13105_ ) -new_n20142_ = OR ( new_n20119_, new_n13113_ ) -new_n20143_ = OR ( new_n20124_, new_n13057_ ) -new_n20144_ = OR ( new_n20126_, new_n13108_ ) -new_n20145_ = OR ( new_n20107_, new_n18408_ ) -new_n20146_ = AND ( new_n20145_, new_n20144_, new_n20143_, new_n20129_ ) -NET_22433 = NAND ( new_n20146_, new_n20142_, new_n20141_, new_n20140_ ) -new_n20148_ = OR ( new_n20109_, new_n19968_ ) -new_n20149_ = OR ( new_n20114_, new_n13273_ ) -new_n20150_ = OR ( new_n20119_, new_n13284_ ) -new_n20151_ = OR ( new_n20124_, new_n13261_ ) -new_n20152_ = OR ( new_n20126_, new_n13276_ ) -new_n20153_ = OR ( new_n20107_, new_n19955_ ) -new_n20154_ = AND ( new_n20153_, new_n20152_, new_n20151_, new_n20129_ ) -NET_22434 = NAND ( new_n20154_, new_n20150_, new_n20149_, new_n20148_ ) -new_n20156_ = NAND ( new_n18939_, new_n18927_ ) -new_n20157_ = OR ( new_n18939_, new_n18927_ ) -new_n20158_ = NAND ( new_n20157_, new_n20156_ ) -new_n20159_ = NOR ( new_n20158_, new_n11723_ ) -new_n20160_ = NAND ( new_n11740_, NET_340 ) -new_n20161_ = OR ( new_n16534_, new_n6706_ ) -new_n20162_ = NAND ( new_n5529_, NET_531 ) -new_n20163_ = NOT ( NET_372 ) -new_n20164_ = OR ( new_n6828_, new_n20163_ ) -new_n20165_ = NAND ( new_n20164_, new_n20162_, new_n20161_, new_n20160_ ) -new_n20166_ = NOR ( new_n20165_, new_n20159_ ) -new_n20167_ = XOR ( new_n20166_, new_n6707_ ) -new_n20168_ = NOR ( new_n17888_, new_n6706_ ) -new_n20169_ = NOR ( new_n20168_, new_n20167_ ) -new_n20170_ = AND ( new_n20168_, new_n20167_ ) -new_n20171_ = NOR ( new_n20170_, new_n20169_ ) -new_n20172_ = NOR ( new_n19879_, new_n19875_ ) -new_n20173_ = NOR ( new_n20172_, new_n19876_ ) -new_n20174_ = XOR ( new_n20173_, new_n20171_ ) -new_n20175_ = OR ( new_n20174_, new_n11715_ ) -new_n20176_ = OR ( new_n20158_, new_n11775_ ) -new_n20177_ = NAND ( new_n11713_, NET_499 ) -NET_22499 = NAND ( new_n20177_, new_n20176_, new_n20175_ ) -new_n20179_ = NAND ( new_n20010_, new_n3150_, new_n3069_ ) -new_n20180_ = NAND ( new_n20179_, new_n20021_ ) -new_n20181_ = NAND ( new_n20180_, new_n12209_ ) -new_n20182_ = NAND ( new_n20015_, new_n12211_ ) -new_n20183_ = NAND ( new_n20009_, new_n5792_, new_n3069_ ) -new_n20184_ = NAND ( new_n20183_, new_n20011_ ) -new_n20185_ = NAND ( new_n20184_, new_n14939_ ) -new_n20186_ = OR ( new_n20026_, new_n6837_ ) -new_n20187_ = OR ( new_n20009_, new_n14175_ ) -new_n20188_ = OR ( new_n20028_, new_n11765_ ) -new_n20189_ = AND ( new_n20188_, new_n20187_, new_n20186_ ) -NET_22500 = NAND ( new_n20189_, new_n20185_, new_n20182_, new_n20181_ ) -new_n20191_ = NAND ( new_n20180_, new_n12014_ ) -new_n20192_ = NAND ( new_n20015_, new_n12020_ ) -new_n20193_ = NAND ( new_n20184_, new_n14259_ ) -new_n20194_ = OR ( new_n20026_, new_n6788_ ) -new_n20195_ = OR ( new_n20009_, new_n14023_ ) -new_n20196_ = OR ( new_n20028_, new_n11742_ ) -new_n20197_ = AND ( new_n20196_, new_n20195_, new_n20194_ ) -NET_22501 = NAND ( new_n20197_, new_n20193_, new_n20192_, new_n20191_ ) -new_n20199_ = NAND ( new_n20180_, new_n12334_ ) -new_n20200_ = NAND ( new_n20015_, new_n12336_ ) -new_n20201_ = NAND ( new_n20184_, new_n15276_, new_n15275_ ) -new_n20202_ = OR ( new_n20026_, new_n11574_ ) -new_n20203_ = OR ( new_n20028_, new_n11942_ ) -new_n20204_ = OR ( new_n20009_, new_n15264_ ) -new_n20205_ = AND ( new_n20204_, new_n20203_, new_n20202_ ) -NET_22502 = NAND ( new_n20205_, new_n20201_, new_n20200_, new_n20199_ ) -new_n20207_ = NAND ( new_n20180_, new_n12534_ ) -new_n20208_ = NAND ( new_n20015_, new_n12536_ ) -new_n20209_ = NAND ( new_n20184_, new_n15953_ ) -new_n20210_ = OR ( new_n20026_, new_n11557_ ) -new_n20211_ = OR ( new_n20028_, new_n12194_ ) -new_n20212_ = OR ( new_n20009_, new_n15943_ ) -new_n20213_ = AND ( new_n20212_, new_n20211_, new_n20210_ ) -NET_22503 = NAND ( new_n20213_, new_n20209_, new_n20208_, new_n20207_ ) -new_n20215_ = NAND ( new_n20180_, new_n12329_ ) -new_n20216_ = OR ( new_n20016_, new_n12309_ ) -new_n20217_ = NAND ( new_n20184_, new_n16271_ ) -new_n20218_ = OR ( new_n20026_, new_n12299_ ) -new_n20219_ = OR ( new_n20028_, new_n12315_ ) -new_n20220_ = OR ( new_n20009_, new_n16261_ ) -new_n20221_ = AND ( new_n20220_, new_n20219_, new_n20218_, new_n20031_ ) -NET_22504 = NAND ( new_n20221_, new_n20217_, new_n20216_, new_n20215_ ) -new_n20223_ = NOT ( new_n12528_ ) -new_n20224_ = NAND ( new_n20180_, new_n20223_ ) -new_n20225_ = OR ( new_n20016_, new_n12515_ ) -new_n20226_ = NAND ( new_n20184_, new_n16752_ ) -new_n20227_ = OR ( new_n20026_, new_n12506_ ) -new_n20228_ = OR ( new_n20028_, new_n12518_ ) -new_n20229_ = OR ( new_n20009_, new_n16673_ ) -new_n20230_ = AND ( new_n20229_, new_n20228_, new_n20227_, new_n20031_ ) -NET_22505 = NAND ( new_n20230_, new_n20226_, new_n20225_, new_n20224_ ) -new_n20232_ = NAND ( new_n19343_, new_n19331_ ) -new_n20233_ = OR ( new_n19343_, new_n19331_ ) -new_n20234_ = NAND ( new_n20233_, new_n20232_ ) -new_n20235_ = NOR ( new_n20234_, new_n11791_ ) -new_n20236_ = NAND ( new_n11808_, NET_789 ) -new_n20237_ = OR ( new_n16588_, new_n6866_ ) -new_n20238_ = NAND ( new_n5827_, NET_980 ) -new_n20239_ = NOT ( NET_821 ) -new_n20240_ = OR ( new_n6988_, new_n20239_ ) -new_n20241_ = NAND ( new_n20240_, new_n20238_, new_n20237_, new_n20236_ ) -new_n20242_ = NOR ( new_n20241_, new_n20235_ ) -new_n20243_ = XOR ( new_n20242_, new_n6867_ ) -new_n20244_ = NOR ( new_n18050_, new_n6866_ ) -new_n20245_ = NOR ( new_n20244_, new_n20243_ ) -new_n20246_ = AND ( new_n20244_, new_n20243_ ) -new_n20247_ = NOR ( new_n20246_, new_n20245_ ) -new_n20248_ = NOR ( new_n19941_, new_n19937_ ) -new_n20249_ = NOR ( new_n20248_, new_n19938_ ) -new_n20250_ = XOR ( new_n20249_, new_n20247_ ) -new_n20251_ = OR ( new_n20250_, new_n11783_ ) -new_n20252_ = OR ( new_n20234_, new_n11843_ ) -new_n20253_ = NAND ( new_n11781_, NET_948 ) -NET_22512 = NAND ( new_n20253_, new_n20252_, new_n20251_ ) -new_n20255_ = NAND ( new_n20059_, new_n3895_, new_n3814_ ) -new_n20256_ = NAND ( new_n20255_, new_n20070_ ) -new_n20257_ = NAND ( new_n20256_, new_n12243_ ) -new_n20258_ = NAND ( new_n20064_, new_n12245_ ) -new_n20259_ = NAND ( new_n20058_, new_n6161_, new_n3814_ ) -new_n20260_ = NAND ( new_n20259_, new_n20060_ ) -new_n20261_ = NAND ( new_n20260_, new_n15023_ ) -new_n20262_ = OR ( new_n20075_, new_n6997_ ) -new_n20263_ = OR ( new_n20058_, new_n14483_ ) -new_n20264_ = OR ( new_n20077_, new_n11833_ ) -new_n20265_ = AND ( new_n20264_, new_n20263_, new_n20262_ ) -NET_22513 = NAND ( new_n20265_, new_n20261_, new_n20258_, new_n20257_ ) -new_n20267_ = NAND ( new_n20256_, new_n12073_ ) -new_n20268_ = NAND ( new_n20064_, new_n12079_ ) -new_n20269_ = NAND ( new_n20260_, new_n14567_ ) -new_n20270_ = OR ( new_n20075_, new_n6948_ ) -new_n20271_ = OR ( new_n20058_, new_n14331_ ) -new_n20272_ = OR ( new_n20077_, new_n11810_ ) -new_n20273_ = AND ( new_n20272_, new_n20271_, new_n20270_ ) -NET_22514 = NAND ( new_n20273_, new_n20269_, new_n20268_, new_n20267_ ) -new_n20275_ = NAND ( new_n20256_, new_n12402_ ) -new_n20276_ = NAND ( new_n20064_, new_n12404_ ) -new_n20277_ = NAND ( new_n20260_, new_n15503_, new_n15502_ ) -new_n20278_ = OR ( new_n20075_, new_n11630_ ) -new_n20279_ = OR ( new_n20077_, new_n11967_ ) -new_n20280_ = OR ( new_n20058_, new_n15491_ ) -new_n20281_ = AND ( new_n20280_, new_n20279_, new_n20278_ ) -NET_22515 = NAND ( new_n20281_, new_n20277_, new_n20276_, new_n20275_ ) -new_n20283_ = NAND ( new_n20256_, new_n12597_ ) -new_n20284_ = NAND ( new_n20064_, new_n12599_ ) -new_n20285_ = NAND ( new_n20260_, new_n16059_ ) -new_n20286_ = OR ( new_n20075_, new_n11613_ ) -new_n20287_ = OR ( new_n20077_, new_n12228_ ) -new_n20288_ = OR ( new_n20058_, new_n16049_ ) -new_n20289_ = AND ( new_n20288_, new_n20287_, new_n20286_ ) -NET_22516 = NAND ( new_n20289_, new_n20285_, new_n20284_, new_n20283_ ) -new_n20291_ = NAND ( new_n20256_, new_n12397_ ) -new_n20292_ = OR ( new_n20065_, new_n12377_ ) -new_n20293_ = NAND ( new_n20260_, new_n16378_ ) -new_n20294_ = OR ( new_n20075_, new_n12367_ ) -new_n20295_ = OR ( new_n20077_, new_n12383_ ) -new_n20296_ = OR ( new_n20058_, new_n16368_ ) -new_n20297_ = AND ( new_n20296_, new_n20295_, new_n20294_, new_n20080_ ) -NET_22517 = NAND ( new_n20297_, new_n20293_, new_n20292_, new_n20291_ ) -new_n20299_ = NOT ( new_n12591_ ) -new_n20300_ = NAND ( new_n20256_, new_n20299_ ) -new_n20301_ = OR ( new_n20065_, new_n12578_ ) -new_n20302_ = NAND ( new_n20260_, new_n16915_ ) -new_n20303_ = OR ( new_n20075_, new_n12569_ ) -new_n20304_ = OR ( new_n20077_, new_n12581_ ) -new_n20305_ = OR ( new_n20058_, new_n16836_ ) -new_n20306_ = AND ( new_n20305_, new_n20304_, new_n20303_, new_n20080_ ) -NET_22518 = NAND ( new_n20306_, new_n20302_, new_n20301_, new_n20300_ ) -new_n20308_ = NAND ( new_n19747_, new_n19735_ ) -new_n20309_ = OR ( new_n19747_, new_n19735_ ) -new_n20310_ = NAND ( new_n20309_, new_n20308_ ) -new_n20311_ = NOR ( new_n20310_, new_n11859_ ) -new_n20312_ = NAND ( new_n11876_, NET_1238 ) -new_n20313_ = OR ( new_n16642_, new_n7026_ ) -new_n20314_ = NAND ( new_n6196_, NET_1429 ) -new_n20315_ = NOT ( NET_1270 ) -new_n20316_ = OR ( new_n7148_, new_n20315_ ) -new_n20317_ = NAND ( new_n20316_, new_n20314_, new_n20313_, new_n20312_ ) -new_n20318_ = NOR ( new_n20317_, new_n20311_ ) -new_n20319_ = XOR ( new_n20318_, new_n7027_ ) -new_n20320_ = NOR ( new_n18212_, new_n7026_ ) -new_n20321_ = NOR ( new_n20320_, new_n20319_ ) -new_n20322_ = AND ( new_n20320_, new_n20319_ ) -new_n20323_ = NOR ( new_n20322_, new_n20321_ ) -new_n20324_ = NOR ( new_n20003_, new_n19999_ ) -new_n20325_ = NOR ( new_n20324_, new_n20000_ ) -new_n20326_ = XOR ( new_n20325_, new_n20323_ ) -new_n20327_ = OR ( new_n20326_, new_n11851_ ) -new_n20328_ = OR ( new_n20310_, new_n11911_ ) -new_n20329_ = NAND ( new_n11849_, NET_1397 ) -NET_22527 = NAND ( new_n20329_, new_n20328_, new_n20327_ ) -new_n20331_ = NAND ( new_n20108_, new_n4639_, new_n4558_ ) -new_n20332_ = NAND ( new_n20331_, new_n20119_ ) -new_n20333_ = NAND ( new_n20332_, new_n12277_ ) -new_n20334_ = NAND ( new_n20113_, new_n12279_ ) -new_n20335_ = NAND ( new_n20107_, new_n6546_, new_n4558_ ) -new_n20336_ = NAND ( new_n20335_, new_n20109_ ) -new_n20337_ = NAND ( new_n20336_, new_n15107_ ) -new_n20338_ = OR ( new_n20124_, new_n7157_ ) -new_n20339_ = OR ( new_n20107_, new_n14791_ ) -new_n20340_ = OR ( new_n20126_, new_n11901_ ) -new_n20341_ = AND ( new_n20340_, new_n20339_, new_n20338_ ) -NET_22528 = NAND ( new_n20341_, new_n20337_, new_n20334_, new_n20333_ ) -new_n20343_ = NAND ( new_n20332_, new_n12132_ ) -new_n20344_ = NAND ( new_n20113_, new_n12138_ ) -new_n20345_ = NAND ( new_n20336_, new_n14875_ ) -new_n20346_ = OR ( new_n20124_, new_n7108_ ) -new_n20347_ = OR ( new_n20107_, new_n14639_ ) -new_n20348_ = OR ( new_n20126_, new_n11878_ ) -new_n20349_ = AND ( new_n20348_, new_n20347_, new_n20346_ ) -NET_22529 = NAND ( new_n20349_, new_n20345_, new_n20344_, new_n20343_ ) -new_n20351_ = NAND ( new_n20332_, new_n12470_ ) -new_n20352_ = NAND ( new_n20113_, new_n12472_ ) -new_n20353_ = NAND ( new_n20336_, new_n15730_, new_n15729_ ) -new_n20354_ = OR ( new_n20124_, new_n11686_ ) -new_n20355_ = OR ( new_n20126_, new_n11992_ ) -new_n20356_ = OR ( new_n20107_, new_n15718_ ) -new_n20357_ = AND ( new_n20356_, new_n20355_, new_n20354_ ) -NET_22530 = NAND ( new_n20357_, new_n20353_, new_n20352_, new_n20351_ ) -new_n20359_ = NAND ( new_n20332_, new_n12660_ ) -new_n20360_ = NAND ( new_n20113_, new_n12662_ ) -new_n20361_ = NAND ( new_n20336_, new_n16165_ ) -new_n20362_ = OR ( new_n20124_, new_n11669_ ) -new_n20363_ = OR ( new_n20126_, new_n12262_ ) -new_n20364_ = OR ( new_n20107_, new_n16155_ ) -new_n20365_ = AND ( new_n20364_, new_n20363_, new_n20362_ ) -NET_22531 = NAND ( new_n20365_, new_n20361_, new_n20360_, new_n20359_ ) -new_n20367_ = NAND ( new_n20332_, new_n12465_ ) -new_n20368_ = OR ( new_n20114_, new_n12445_ ) -new_n20369_ = NAND ( new_n20336_, new_n16485_ ) -new_n20370_ = OR ( new_n20124_, new_n12435_ ) -new_n20371_ = OR ( new_n20126_, new_n12451_ ) -new_n20372_ = OR ( new_n20107_, new_n16475_ ) -new_n20373_ = AND ( new_n20372_, new_n20371_, new_n20370_, new_n20129_ ) -NET_22532 = NAND ( new_n20373_, new_n20369_, new_n20368_, new_n20367_ ) -new_n20375_ = NOT ( new_n12654_ ) -new_n20376_ = NAND ( new_n20332_, new_n20375_ ) -new_n20377_ = OR ( new_n20114_, new_n12641_ ) -new_n20378_ = NAND ( new_n20336_, new_n17078_ ) -new_n20379_ = OR ( new_n20124_, new_n12632_ ) -new_n20380_ = OR ( new_n20126_, new_n12644_ ) -new_n20381_ = OR ( new_n20107_, new_n16999_ ) -new_n20382_ = AND ( new_n20381_, new_n20380_, new_n20379_, new_n20129_ ) -NET_22533 = NAND ( new_n20382_, new_n20378_, new_n20377_, new_n20376_ ) -new_n20384_ = NOR ( new_n20173_, new_n20169_ ) -new_n20385_ = OR ( new_n20384_, new_n20170_ ) -new_n20386_ = XNOR ( new_n20157_, new_n18949_ ) -new_n20387_ = NOR ( new_n20386_, new_n11723_ ) -new_n20388_ = NAND ( new_n11740_, NET_341 ) -new_n20389_ = OR ( new_n16799_, new_n6706_ ) -new_n20390_ = NAND ( new_n5529_, NET_532 ) -new_n20391_ = NOT ( NET_373 ) -new_n20392_ = OR ( new_n6828_, new_n20391_ ) -new_n20393_ = NAND ( new_n20392_, new_n20390_, new_n20389_, new_n20388_ ) -new_n20394_ = NOR ( new_n20393_, new_n20387_ ) -new_n20395_ = XOR ( new_n20394_, new_n6707_ ) -new_n20396_ = XNOR ( new_n20395_, new_n20385_ ) -new_n20397_ = OR ( new_n20396_, new_n11715_ ) -new_n20398_ = OR ( new_n20386_, new_n11775_ ) -new_n20399_ = NAND ( new_n11713_, NET_500 ) -NET_22677 = NAND ( new_n20399_, new_n20398_, new_n20397_ ) -new_n20401_ = NOR ( new_n20249_, new_n20245_ ) -new_n20402_ = OR ( new_n20401_, new_n20246_ ) -new_n20403_ = XNOR ( new_n20233_, new_n19353_ ) -new_n20404_ = NOR ( new_n20403_, new_n11791_ ) -new_n20405_ = NAND ( new_n11808_, NET_790 ) -new_n20406_ = OR ( new_n16962_, new_n6866_ ) -new_n20407_ = NAND ( new_n5827_, NET_981 ) -new_n20408_ = NOT ( NET_822 ) -new_n20409_ = OR ( new_n6988_, new_n20408_ ) -new_n20410_ = NAND ( new_n20409_, new_n20407_, new_n20406_, new_n20405_ ) -new_n20411_ = NOR ( new_n20410_, new_n20404_ ) -new_n20412_ = XOR ( new_n20411_, new_n6867_ ) -new_n20413_ = XNOR ( new_n20412_, new_n20402_ ) -new_n20414_ = OR ( new_n20413_, new_n11783_ ) -new_n20415_ = OR ( new_n20403_, new_n11843_ ) -new_n20416_ = NAND ( new_n11781_, NET_949 ) -NET_22694 = NAND ( new_n20416_, new_n20415_, new_n20414_ ) -new_n20418_ = NOR ( new_n20325_, new_n20321_ ) -new_n20419_ = OR ( new_n20418_, new_n20322_ ) -new_n20420_ = XNOR ( new_n20309_, new_n19757_ ) -new_n20421_ = NOR ( new_n20420_, new_n11859_ ) -new_n20422_ = NAND ( new_n11876_, NET_1239 ) -new_n20423_ = OR ( new_n17125_, new_n7026_ ) -new_n20424_ = NAND ( new_n6196_, NET_1430 ) -new_n20425_ = NOT ( NET_1271 ) -new_n20426_ = OR ( new_n7148_, new_n20425_ ) -new_n20427_ = NAND ( new_n20426_, new_n20424_, new_n20423_, new_n20422_ ) -new_n20428_ = NOR ( new_n20427_, new_n20421_ ) -new_n20429_ = XOR ( new_n20428_, new_n7027_ ) -new_n20430_ = XNOR ( new_n20429_, new_n20419_ ) -new_n20431_ = OR ( new_n20430_, new_n11851_ ) -new_n20432_ = OR ( new_n20420_, new_n11911_ ) -new_n20433_ = NAND ( new_n11849_, NET_1398 ) -NET_22711 = NAND ( new_n20433_, new_n20432_, new_n20431_ ) -new_n20435_ = NAND ( new_n19843_, new_n19837_ ) -new_n20436_ = XOR ( new_n13348_, new_n13328_ ) -new_n20437_ = NOR ( new_n19824_, new_n18332_ ) -new_n20438_ = NOR ( new_n20437_, new_n19823_ ) -new_n20439_ = NAND ( new_n20438_, new_n20436_ ) -new_n20440_ = OR ( new_n20438_, new_n20436_ ) -new_n20441_ = NAND ( new_n20440_, new_n20439_, new_n6591_ ) -new_n20442_ = NAND ( new_n14014_, new_n13348_ ) -new_n20443_ = OR ( new_n14021_, new_n13338_ ) -new_n20444_ = NOT ( NET_518 ) -new_n20445_ = OR ( new_n14024_, new_n20444_ ) -new_n20446_ = NAND ( new_n14026_, NET_327 ) -new_n20447_ = AND ( new_n20446_, new_n20445_, new_n20443_ ) -new_n20448_ = NAND ( new_n20447_, new_n20442_, new_n20441_ ) -new_n20449_ = NAND ( new_n20448_, new_n14021_ ) -new_n20450_ = NAND ( new_n20448_, new_n14020_ ) -new_n20451_ = OR ( new_n20450_, new_n19835_ ) -new_n20452_ = NAND ( new_n20451_, new_n14020_ ) -new_n20453_ = NAND ( new_n20452_, new_n20449_, new_n20435_ ) -new_n20454_ = NAND ( new_n20448_, new_n19843_, new_n19837_ ) -new_n20455_ = NAND ( new_n20454_, new_n14021_ ) -new_n20456_ = NOT ( new_n19835_ ) -new_n20457_ = NAND ( new_n20435_, new_n20456_ ) -new_n20458_ = NAND ( new_n20457_, new_n20455_, new_n20450_ ) -new_n20459_ = NAND ( new_n20458_, new_n20453_ ) -new_n20460_ = OR ( new_n20459_, new_n14278_ ) -new_n20461_ = NAND ( new_n14280_, new_n14276_, new_n13348_ ) -new_n20462_ = OR ( new_n14284_, new_n13338_ ) -new_n20463_ = OR ( new_n14286_, new_n13297_ ) -new_n20464_ = OR ( new_n14275_, new_n13290_ ) -new_n20465_ = OR ( new_n14289_, new_n20444_ ) -new_n20466_ = AND ( new_n20465_, new_n20464_, new_n20463_ ) -NET_22777 = NAND ( new_n20466_, new_n20462_, new_n20461_, new_n20460_ ) -new_n20468_ = XNOR ( new_n13883_, new_n13865_ ) -new_n20469_ = NOT ( new_n13387_ ) -new_n20470_ = NAND ( new_n20438_, new_n13328_ ) -new_n20471_ = NAND ( new_n20470_, new_n13348_ ) -new_n20472_ = OR ( new_n20438_, new_n13328_ ) -new_n20473_ = NAND ( new_n20472_, new_n20471_ ) -new_n20474_ = OR ( new_n20473_, new_n20469_ ) -new_n20475_ = NAND ( new_n20474_, new_n13404_ ) -new_n20476_ = NAND ( new_n20473_, new_n20469_ ) -new_n20477_ = NAND ( new_n20476_, new_n20475_ ) -new_n20478_ = OR ( new_n20477_, new_n20468_ ) -new_n20479_ = NAND ( new_n20477_, new_n20468_ ) -new_n20480_ = AND ( new_n20479_, new_n20478_, new_n6591_ ) -new_n20481_ = NAND ( new_n14014_, new_n13883_ ) -new_n20482_ = OR ( new_n14021_, new_n13872_ ) -new_n20483_ = NOT ( NET_520 ) -new_n20484_ = OR ( new_n14024_, new_n20483_ ) -new_n20485_ = NAND ( new_n14026_, NET_329 ) -new_n20486_ = NAND ( new_n20485_, new_n20484_, new_n20482_, new_n20481_ ) -new_n20487_ = NOR ( new_n20486_, new_n20480_ ) -new_n20488_ = XOR ( new_n20487_, new_n14020_ ) -new_n20489_ = XNOR ( new_n13404_, new_n13387_ ) -new_n20490_ = OR ( new_n20489_, new_n20473_ ) -new_n20491_ = NAND ( new_n20489_, new_n20473_ ) -new_n20492_ = AND ( new_n20491_, new_n20490_, new_n6591_ ) -new_n20493_ = NAND ( new_n14014_, new_n13404_ ) -new_n20494_ = OR ( new_n14021_, new_n13393_ ) -new_n20495_ = NOT ( NET_519 ) -new_n20496_ = OR ( new_n14024_, new_n20495_ ) -new_n20497_ = NAND ( new_n14026_, NET_328 ) -new_n20498_ = NAND ( new_n20497_, new_n20496_, new_n20494_, new_n20493_ ) -new_n20499_ = NOR ( new_n20498_, new_n20492_ ) -new_n20500_ = OR ( new_n20499_, new_n20454_ ) -new_n20501_ = NAND ( new_n20499_, new_n20450_, new_n20435_, new_n20456_ ) -new_n20502_ = NAND ( new_n20501_, new_n14020_ ) -new_n20503_ = NAND ( new_n20502_, new_n20500_ ) -new_n20504_ = XOR ( new_n20503_, new_n20488_ ) -new_n20505_ = OR ( new_n20504_, new_n14278_ ) -new_n20506_ = NAND ( new_n14280_, new_n14276_, new_n13883_ ) -new_n20507_ = OR ( new_n14284_, new_n13872_ ) -new_n20508_ = OR ( new_n14286_, new_n13836_ ) -new_n20509_ = OR ( new_n14275_, new_n13833_ ) -new_n20510_ = OR ( new_n14289_, new_n20483_ ) -new_n20511_ = AND ( new_n20510_, new_n20509_, new_n20508_ ) -NET_22778 = NAND ( new_n20511_, new_n20507_, new_n20506_, new_n20505_ ) -new_n20513_ = OR ( new_n20459_, new_n14295_ ) -new_n20514_ = NAND ( new_n16282_, new_n13348_ ) -new_n20515_ = OR ( new_n14299_, new_n13338_ ) -new_n20516_ = OR ( new_n14301_, new_n20444_ ) -new_n20517_ = OR ( new_n14294_, new_n13341_ ) -new_n20518_ = AND ( new_n20517_, new_n20516_, new_n20515_ ) -NET_22779 = NAND ( new_n20518_, new_n20514_, new_n20513_ ) -new_n20520_ = NOR ( new_n20504_, new_n14295_ ) -new_n20521_ = NAND ( new_n16282_, new_n13883_ ) -new_n20522_ = OR ( new_n14299_, new_n13872_ ) -new_n20523_ = OR ( new_n14301_, new_n20483_ ) -new_n20524_ = OR ( new_n14294_, new_n13875_ ) -new_n20525_ = NAND ( new_n20524_, new_n20523_, new_n20522_, new_n20521_ ) -NET_22780 = OR ( new_n20525_, new_n20520_ ) -new_n20527_ = OR ( new_n20459_, new_n14312_ ) -new_n20528_ = OR ( new_n14314_, new_n13338_ ) -new_n20529_ = OR ( new_n14317_, new_n5559_ ) -new_n20530_ = NAND ( new_n14311_, NET_454 ) -NET_22781 = NAND ( new_n20530_, new_n20529_, new_n20528_, new_n20527_ ) -new_n20532_ = OR ( new_n20504_, new_n14312_ ) -new_n20533_ = OR ( new_n14314_, new_n13872_ ) -new_n20534_ = OR ( new_n14317_, new_n5549_ ) -new_n20535_ = NAND ( new_n14311_, NET_456 ) -NET_22782 = NAND ( new_n20535_, new_n20534_, new_n20533_, new_n20532_ ) -new_n20537_ = NAND ( new_n20395_, new_n20385_ ) -new_n20538_ = NAND ( new_n18950_, new_n18910_ ) -new_n20539_ = OR ( new_n18950_, new_n18910_ ) -new_n20540_ = NAND ( new_n20539_, new_n20538_ ) -new_n20541_ = NOR ( new_n20540_, new_n11723_ ) -new_n20542_ = NAND ( new_n11740_, NET_342 ) -new_n20543_ = OR ( new_n17182_, new_n6706_ ) -new_n20544_ = NAND ( new_n5529_, NET_533 ) -new_n20545_ = NOT ( NET_374 ) -new_n20546_ = OR ( new_n6828_, new_n20545_ ) -new_n20547_ = NAND ( new_n20546_, new_n20544_, new_n20543_, new_n20542_ ) -new_n20548_ = NOR ( new_n20547_, new_n20541_ ) -new_n20549_ = XNOR ( new_n20548_, new_n6707_ ) -new_n20550_ = OR ( new_n20549_, new_n20537_ ) -new_n20551_ = NAND ( new_n20549_, new_n20537_ ) -new_n20552_ = AND ( new_n20551_, new_n20550_ ) -new_n20553_ = NAND ( new_n20552_, new_n11714_ ) -new_n20554_ = OR ( new_n20540_, new_n11775_ ) -new_n20555_ = NAND ( new_n11713_, NET_501 ) -NET_22783 = NAND ( new_n20555_, new_n20554_, new_n20553_ ) -new_n20557_ = OR ( new_n20459_, new_n20011_ ) -new_n20558_ = OR ( new_n20016_, new_n13338_ ) -new_n20559_ = NAND ( new_n20020_, new_n13348_ ) -new_n20560_ = OR ( new_n20026_, new_n13299_ ) -new_n20561_ = OR ( new_n20028_, new_n13341_ ) -new_n20562_ = OR ( new_n20009_, new_n20444_ ) -new_n20563_ = AND ( new_n20562_, new_n20561_, new_n20560_, new_n20031_ ) -NET_22784 = NAND ( new_n20563_, new_n20559_, new_n20558_, new_n20557_ ) -new_n20565_ = OR ( new_n20504_, new_n20011_ ) -new_n20566_ = OR ( new_n20016_, new_n13872_ ) -new_n20567_ = NAND ( new_n20020_, new_n13883_ ) -new_n20568_ = OR ( new_n20026_, new_n13838_ ) -new_n20569_ = OR ( new_n20028_, new_n13875_ ) -new_n20570_ = OR ( new_n20009_, new_n20483_ ) -new_n20571_ = AND ( new_n20570_, new_n20569_, new_n20568_, new_n20031_ ) -NET_22785 = NAND ( new_n20571_, new_n20567_, new_n20566_, new_n20565_ ) -new_n20573_ = NAND ( new_n19905_, new_n19899_ ) -new_n20574_ = XOR ( new_n13468_, new_n13448_ ) -new_n20575_ = NOR ( new_n19886_, new_n18367_ ) -new_n20576_ = NOR ( new_n20575_, new_n19885_ ) -new_n20577_ = NAND ( new_n20576_, new_n20574_ ) -new_n20578_ = OR ( new_n20576_, new_n20574_ ) -new_n20579_ = NAND ( new_n20578_, new_n20577_, new_n6636_ ) -new_n20580_ = NAND ( new_n14322_, new_n13468_ ) -new_n20581_ = OR ( new_n14329_, new_n13458_ ) -new_n20582_ = NOT ( NET_967 ) -new_n20583_ = OR ( new_n14332_, new_n20582_ ) -new_n20584_ = NAND ( new_n14334_, NET_776 ) -new_n20585_ = AND ( new_n20584_, new_n20583_, new_n20581_ ) -new_n20586_ = NAND ( new_n20585_, new_n20580_, new_n20579_ ) -new_n20587_ = NAND ( new_n20586_, new_n14329_ ) -new_n20588_ = NAND ( new_n20586_, new_n14328_ ) -new_n20589_ = OR ( new_n20588_, new_n19897_ ) -new_n20590_ = NAND ( new_n20589_, new_n14328_ ) -new_n20591_ = NAND ( new_n20590_, new_n20587_, new_n20573_ ) -new_n20592_ = NAND ( new_n20586_, new_n19905_, new_n19899_ ) -new_n20593_ = NAND ( new_n20592_, new_n14329_ ) -new_n20594_ = NOT ( new_n19897_ ) -new_n20595_ = NAND ( new_n20573_, new_n20594_ ) -new_n20596_ = NAND ( new_n20595_, new_n20593_, new_n20588_ ) -new_n20597_ = NAND ( new_n20596_, new_n20591_ ) -new_n20598_ = OR ( new_n20597_, new_n14586_ ) -new_n20599_ = NAND ( new_n14588_, new_n14584_, new_n13468_ ) -new_n20600_ = OR ( new_n14592_, new_n13458_ ) -new_n20601_ = OR ( new_n14594_, new_n13417_ ) -new_n20602_ = OR ( new_n14583_, new_n13410_ ) -new_n20603_ = OR ( new_n14597_, new_n20582_ ) -new_n20604_ = AND ( new_n20603_, new_n20602_, new_n20601_ ) -NET_22805 = NAND ( new_n20604_, new_n20600_, new_n20599_, new_n20598_ ) -new_n20606_ = XNOR ( new_n13945_, new_n13927_ ) -new_n20607_ = NOT ( new_n13507_ ) -new_n20608_ = NAND ( new_n20576_, new_n13448_ ) -new_n20609_ = NAND ( new_n20608_, new_n13468_ ) -new_n20610_ = OR ( new_n20576_, new_n13448_ ) -new_n20611_ = NAND ( new_n20610_, new_n20609_ ) -new_n20612_ = OR ( new_n20611_, new_n20607_ ) -new_n20613_ = NAND ( new_n20612_, new_n13524_ ) -new_n20614_ = NAND ( new_n20611_, new_n20607_ ) -new_n20615_ = NAND ( new_n20614_, new_n20613_ ) -new_n20616_ = OR ( new_n20615_, new_n20606_ ) -new_n20617_ = NAND ( new_n20615_, new_n20606_ ) -new_n20618_ = AND ( new_n20617_, new_n20616_, new_n6636_ ) -new_n20619_ = NAND ( new_n14322_, new_n13945_ ) -new_n20620_ = OR ( new_n14329_, new_n13934_ ) -new_n20621_ = NOT ( NET_969 ) -new_n20622_ = OR ( new_n14332_, new_n20621_ ) -new_n20623_ = NAND ( new_n14334_, NET_778 ) -new_n20624_ = NAND ( new_n20623_, new_n20622_, new_n20620_, new_n20619_ ) -new_n20625_ = NOR ( new_n20624_, new_n20618_ ) -new_n20626_ = XOR ( new_n20625_, new_n14328_ ) -new_n20627_ = XNOR ( new_n13524_, new_n13507_ ) -new_n20628_ = OR ( new_n20627_, new_n20611_ ) -new_n20629_ = NAND ( new_n20627_, new_n20611_ ) -new_n20630_ = AND ( new_n20629_, new_n20628_, new_n6636_ ) -new_n20631_ = NAND ( new_n14322_, new_n13524_ ) -new_n20632_ = OR ( new_n14329_, new_n13513_ ) -new_n20633_ = NOT ( NET_968 ) -new_n20634_ = OR ( new_n14332_, new_n20633_ ) -new_n20635_ = NAND ( new_n14334_, NET_777 ) -new_n20636_ = NAND ( new_n20635_, new_n20634_, new_n20632_, new_n20631_ ) -new_n20637_ = NOR ( new_n20636_, new_n20630_ ) -new_n20638_ = OR ( new_n20637_, new_n20592_ ) -new_n20639_ = NAND ( new_n20637_, new_n20588_, new_n20573_, new_n20594_ ) -new_n20640_ = NAND ( new_n20639_, new_n14328_ ) -new_n20641_ = NAND ( new_n20640_, new_n20638_ ) -new_n20642_ = XOR ( new_n20641_, new_n20626_ ) -new_n20643_ = OR ( new_n20642_, new_n14586_ ) -new_n20644_ = NAND ( new_n14588_, new_n14584_, new_n13945_ ) -new_n20645_ = OR ( new_n14592_, new_n13934_ ) -new_n20646_ = OR ( new_n14594_, new_n13898_ ) -new_n20647_ = OR ( new_n14583_, new_n13895_ ) -new_n20648_ = OR ( new_n14597_, new_n20621_ ) -new_n20649_ = AND ( new_n20648_, new_n20647_, new_n20646_ ) -NET_22806 = NAND ( new_n20649_, new_n20645_, new_n20644_, new_n20643_ ) -new_n20651_ = OR ( new_n20597_, new_n14603_ ) -new_n20652_ = NAND ( new_n16389_, new_n13468_ ) -new_n20653_ = OR ( new_n14607_, new_n13458_ ) -new_n20654_ = OR ( new_n14609_, new_n20582_ ) -new_n20655_ = OR ( new_n14602_, new_n13461_ ) -new_n20656_ = AND ( new_n20655_, new_n20654_, new_n20653_ ) -NET_22807 = NAND ( new_n20656_, new_n20652_, new_n20651_ ) -new_n20658_ = NOR ( new_n20642_, new_n14603_ ) -new_n20659_ = NAND ( new_n16389_, new_n13945_ ) -new_n20660_ = OR ( new_n14607_, new_n13934_ ) -new_n20661_ = OR ( new_n14609_, new_n20621_ ) -new_n20662_ = OR ( new_n14602_, new_n13937_ ) -new_n20663_ = NAND ( new_n20662_, new_n20661_, new_n20660_, new_n20659_ ) -NET_22808 = OR ( new_n20663_, new_n20658_ ) -new_n20665_ = OR ( new_n20597_, new_n14620_ ) -new_n20666_ = OR ( new_n14622_, new_n13458_ ) -new_n20667_ = NAND ( new_n14625_, new_n5895_ ) -new_n20668_ = NAND ( new_n14619_, NET_903 ) -NET_22809 = NAND ( new_n20668_, new_n20667_, new_n20666_, new_n20665_ ) -new_n20670_ = OR ( new_n20642_, new_n14620_ ) -new_n20671_ = OR ( new_n14622_, new_n13934_ ) -new_n20672_ = NAND ( new_n14625_, new_n5881_ ) -new_n20673_ = NAND ( new_n14619_, NET_905 ) -NET_22810 = NAND ( new_n20673_, new_n20672_, new_n20671_, new_n20670_ ) -new_n20675_ = NAND ( new_n20412_, new_n20402_ ) -new_n20676_ = NAND ( new_n19354_, new_n19314_ ) -new_n20677_ = OR ( new_n19354_, new_n19314_ ) -new_n20678_ = NAND ( new_n20677_, new_n20676_ ) -new_n20679_ = NOR ( new_n20678_, new_n11791_ ) -new_n20680_ = NAND ( new_n11808_, NET_791 ) -new_n20681_ = OR ( new_n17241_, new_n6866_ ) -new_n20682_ = NAND ( new_n5827_, NET_982 ) -new_n20683_ = NOT ( NET_823 ) -new_n20684_ = OR ( new_n6988_, new_n20683_ ) -new_n20685_ = NAND ( new_n20684_, new_n20682_, new_n20681_, new_n20680_ ) -new_n20686_ = NOR ( new_n20685_, new_n20679_ ) -new_n20687_ = XNOR ( new_n20686_, new_n6867_ ) -new_n20688_ = OR ( new_n20687_, new_n20675_ ) -new_n20689_ = NAND ( new_n20687_, new_n20675_ ) -new_n20690_ = AND ( new_n20689_, new_n20688_ ) -new_n20691_ = NAND ( new_n20690_, new_n11782_ ) -new_n20692_ = OR ( new_n20678_, new_n11843_ ) -new_n20693_ = NAND ( new_n11781_, NET_950 ) -NET_22811 = NAND ( new_n20693_, new_n20692_, new_n20691_ ) -new_n20695_ = OR ( new_n20597_, new_n20060_ ) -new_n20696_ = OR ( new_n20065_, new_n13458_ ) -new_n20697_ = NAND ( new_n20069_, new_n13468_ ) -new_n20698_ = OR ( new_n20075_, new_n13419_ ) -new_n20699_ = OR ( new_n20077_, new_n13461_ ) -new_n20700_ = OR ( new_n20058_, new_n20582_ ) -new_n20701_ = AND ( new_n20700_, new_n20699_, new_n20698_, new_n20080_ ) -NET_22812 = NAND ( new_n20701_, new_n20697_, new_n20696_, new_n20695_ ) -new_n20703_ = OR ( new_n20642_, new_n20060_ ) -new_n20704_ = OR ( new_n20065_, new_n13934_ ) -new_n20705_ = NAND ( new_n20069_, new_n13945_ ) -new_n20706_ = OR ( new_n20075_, new_n13900_ ) -new_n20707_ = OR ( new_n20077_, new_n13937_ ) -new_n20708_ = OR ( new_n20058_, new_n20621_ ) -new_n20709_ = AND ( new_n20708_, new_n20707_, new_n20706_, new_n20080_ ) -NET_22813 = NAND ( new_n20709_, new_n20705_, new_n20704_, new_n20703_ ) -new_n20711_ = NAND ( new_n19967_, new_n19961_ ) -new_n20712_ = XOR ( new_n13588_, new_n13568_ ) -new_n20713_ = NOR ( new_n19948_, new_n18402_ ) -new_n20714_ = NOR ( new_n20713_, new_n19947_ ) -new_n20715_ = NAND ( new_n20714_, new_n20712_ ) -new_n20716_ = OR ( new_n20714_, new_n20712_ ) -new_n20717_ = NAND ( new_n20716_, new_n20715_, new_n6681_ ) -new_n20718_ = NAND ( new_n14630_, new_n13588_ ) -new_n20719_ = OR ( new_n14637_, new_n13578_ ) -new_n20720_ = NOT ( NET_1416 ) -new_n20721_ = OR ( new_n14640_, new_n20720_ ) -new_n20722_ = NAND ( new_n14642_, NET_1225 ) -new_n20723_ = AND ( new_n20722_, new_n20721_, new_n20719_ ) -new_n20724_ = NAND ( new_n20723_, new_n20718_, new_n20717_ ) -new_n20725_ = NAND ( new_n20724_, new_n14637_ ) -new_n20726_ = NAND ( new_n20724_, new_n14636_ ) -new_n20727_ = OR ( new_n20726_, new_n19959_ ) -new_n20728_ = NAND ( new_n20727_, new_n14636_ ) -new_n20729_ = NAND ( new_n20728_, new_n20725_, new_n20711_ ) -new_n20730_ = NAND ( new_n20724_, new_n19967_, new_n19961_ ) -new_n20731_ = NAND ( new_n20730_, new_n14637_ ) -new_n20732_ = NOT ( new_n19959_ ) -new_n20733_ = NAND ( new_n20711_, new_n20732_ ) -new_n20734_ = NAND ( new_n20733_, new_n20731_, new_n20726_ ) -new_n20735_ = NAND ( new_n20734_, new_n20729_ ) -new_n20736_ = OR ( new_n20735_, new_n14894_ ) -new_n20737_ = NAND ( new_n14896_, new_n14892_, new_n13588_ ) -new_n20738_ = OR ( new_n14900_, new_n13578_ ) -new_n20739_ = OR ( new_n14902_, new_n13537_ ) -new_n20740_ = OR ( new_n14891_, new_n13530_ ) -new_n20741_ = OR ( new_n14905_, new_n20720_ ) -new_n20742_ = AND ( new_n20741_, new_n20740_, new_n20739_ ) -NET_22835 = NAND ( new_n20742_, new_n20738_, new_n20737_, new_n20736_ ) -new_n20744_ = XNOR ( new_n14007_, new_n13989_ ) -new_n20745_ = NOT ( new_n13627_ ) -new_n20746_ = NAND ( new_n20714_, new_n13568_ ) -new_n20747_ = NAND ( new_n20746_, new_n13588_ ) -new_n20748_ = OR ( new_n20714_, new_n13568_ ) -new_n20749_ = NAND ( new_n20748_, new_n20747_ ) -new_n20750_ = OR ( new_n20749_, new_n20745_ ) -new_n20751_ = NAND ( new_n20750_, new_n13644_ ) -new_n20752_ = NAND ( new_n20749_, new_n20745_ ) -new_n20753_ = NAND ( new_n20752_, new_n20751_ ) -new_n20754_ = OR ( new_n20753_, new_n20744_ ) -new_n20755_ = NAND ( new_n20753_, new_n20744_ ) -new_n20756_ = AND ( new_n20755_, new_n20754_, new_n6681_ ) -new_n20757_ = NAND ( new_n14630_, new_n14007_ ) -new_n20758_ = OR ( new_n14637_, new_n13996_ ) -new_n20759_ = NOT ( NET_1418 ) -new_n20760_ = OR ( new_n14640_, new_n20759_ ) -new_n20761_ = NAND ( new_n14642_, NET_1227 ) -new_n20762_ = NAND ( new_n20761_, new_n20760_, new_n20758_, new_n20757_ ) -new_n20763_ = NOR ( new_n20762_, new_n20756_ ) -new_n20764_ = XOR ( new_n20763_, new_n14636_ ) -new_n20765_ = XNOR ( new_n13644_, new_n13627_ ) -new_n20766_ = OR ( new_n20765_, new_n20749_ ) -new_n20767_ = NAND ( new_n20765_, new_n20749_ ) -new_n20768_ = AND ( new_n20767_, new_n20766_, new_n6681_ ) -new_n20769_ = NAND ( new_n14630_, new_n13644_ ) -new_n20770_ = OR ( new_n14637_, new_n13633_ ) -new_n20771_ = NOT ( NET_1417 ) -new_n20772_ = OR ( new_n14640_, new_n20771_ ) -new_n20773_ = NAND ( new_n14642_, NET_1226 ) -new_n20774_ = NAND ( new_n20773_, new_n20772_, new_n20770_, new_n20769_ ) -new_n20775_ = NOR ( new_n20774_, new_n20768_ ) -new_n20776_ = OR ( new_n20775_, new_n20730_ ) -new_n20777_ = NAND ( new_n20775_, new_n20726_, new_n20711_, new_n20732_ ) -new_n20778_ = NAND ( new_n20777_, new_n14636_ ) -new_n20779_ = NAND ( new_n20778_, new_n20776_ ) -new_n20780_ = XOR ( new_n20779_, new_n20764_ ) -new_n20781_ = OR ( new_n20780_, new_n14894_ ) -new_n20782_ = NAND ( new_n14896_, new_n14892_, new_n14007_ ) -new_n20783_ = OR ( new_n14900_, new_n13996_ ) -new_n20784_ = OR ( new_n14902_, new_n13960_ ) -new_n20785_ = OR ( new_n14891_, new_n13957_ ) -new_n20786_ = OR ( new_n14905_, new_n20759_ ) -new_n20787_ = AND ( new_n20786_, new_n20785_, new_n20784_ ) -NET_22836 = NAND ( new_n20787_, new_n20783_, new_n20782_, new_n20781_ ) -new_n20789_ = OR ( new_n20735_, new_n14911_ ) -new_n20790_ = NAND ( new_n16496_, new_n13588_ ) -new_n20791_ = OR ( new_n14915_, new_n13578_ ) -new_n20792_ = OR ( new_n14917_, new_n20720_ ) -new_n20793_ = OR ( new_n14910_, new_n13581_ ) -new_n20794_ = AND ( new_n20793_, new_n20792_, new_n20791_ ) -NET_22837 = NAND ( new_n20794_, new_n20790_, new_n20789_ ) -new_n20796_ = NOR ( new_n20780_, new_n14911_ ) -new_n20797_ = NAND ( new_n16496_, new_n14007_ ) -new_n20798_ = OR ( new_n14915_, new_n13996_ ) -new_n20799_ = OR ( new_n14917_, new_n20759_ ) -new_n20800_ = OR ( new_n14910_, new_n13999_ ) -new_n20801_ = NAND ( new_n20800_, new_n20799_, new_n20798_, new_n20797_ ) -NET_22838 = OR ( new_n20801_, new_n20796_ ) -new_n20803_ = OR ( new_n20735_, new_n14928_ ) -new_n20804_ = OR ( new_n14930_, new_n13578_ ) -new_n20805_ = NAND ( new_n14933_, new_n6270_ ) -new_n20806_ = NAND ( new_n14927_, NET_1352 ) -NET_22839 = NAND ( new_n20806_, new_n20805_, new_n20804_, new_n20803_ ) -new_n20808_ = OR ( new_n20780_, new_n14928_ ) -new_n20809_ = OR ( new_n14930_, new_n13996_ ) -new_n20810_ = NAND ( new_n14933_, new_n6254_ ) -new_n20811_ = NAND ( new_n14927_, NET_1354 ) -NET_22840 = NAND ( new_n20811_, new_n20810_, new_n20809_, new_n20808_ ) -new_n20813_ = NAND ( new_n20429_, new_n20419_ ) -new_n20814_ = NAND ( new_n19758_, new_n19718_ ) -new_n20815_ = OR ( new_n19758_, new_n19718_ ) -new_n20816_ = NAND ( new_n20815_, new_n20814_ ) -new_n20817_ = NOR ( new_n20816_, new_n11859_ ) -new_n20818_ = NAND ( new_n11876_, NET_1240 ) -new_n20819_ = OR ( new_n17300_, new_n7026_ ) -new_n20820_ = NAND ( new_n6196_, NET_1431 ) -new_n20821_ = NOT ( NET_1272 ) -new_n20822_ = OR ( new_n7148_, new_n20821_ ) -new_n20823_ = NAND ( new_n20822_, new_n20820_, new_n20819_, new_n20818_ ) -new_n20824_ = NOR ( new_n20823_, new_n20817_ ) -new_n20825_ = XNOR ( new_n20824_, new_n7027_ ) -new_n20826_ = OR ( new_n20825_, new_n20813_ ) -new_n20827_ = NAND ( new_n20825_, new_n20813_ ) -new_n20828_ = AND ( new_n20827_, new_n20826_ ) -new_n20829_ = NAND ( new_n20828_, new_n11850_ ) -new_n20830_ = OR ( new_n20816_, new_n11911_ ) -new_n20831_ = NAND ( new_n11849_, NET_1399 ) -NET_22841 = NAND ( new_n20831_, new_n20830_, new_n20829_ ) -new_n20833_ = OR ( new_n20735_, new_n20109_ ) -new_n20834_ = OR ( new_n20114_, new_n13578_ ) -new_n20835_ = NAND ( new_n20118_, new_n13588_ ) -new_n20836_ = OR ( new_n20124_, new_n13539_ ) -new_n20837_ = OR ( new_n20126_, new_n13581_ ) -new_n20838_ = OR ( new_n20107_, new_n20720_ ) -new_n20839_ = AND ( new_n20838_, new_n20837_, new_n20836_, new_n20129_ ) -NET_22842 = NAND ( new_n20839_, new_n20835_, new_n20834_, new_n20833_ ) -new_n20841_ = OR ( new_n20780_, new_n20109_ ) -new_n20842_ = OR ( new_n20114_, new_n13996_ ) -new_n20843_ = NAND ( new_n20118_, new_n14007_ ) -new_n20844_ = OR ( new_n20124_, new_n13962_ ) -new_n20845_ = OR ( new_n20126_, new_n13999_ ) -new_n20846_ = OR ( new_n20107_, new_n20759_ ) -new_n20847_ = AND ( new_n20846_, new_n20845_, new_n20844_, new_n20129_ ) -NET_22843 = NAND ( new_n20847_, new_n20843_, new_n20842_, new_n20841_ ) -new_n20849_ = NAND ( new_n20457_, new_n20455_ ) -new_n20850_ = NAND ( new_n20849_, new_n20450_ ) -new_n20851_ = XOR ( new_n20499_, new_n14020_ ) -new_n20852_ = XOR ( new_n20851_, new_n20850_ ) -new_n20853_ = OR ( new_n20852_, new_n14278_ ) -new_n20854_ = NAND ( new_n14280_, new_n14276_, new_n13404_ ) -new_n20855_ = OR ( new_n14284_, new_n13393_ ) -new_n20856_ = OR ( new_n14286_, new_n13358_ ) -new_n20857_ = OR ( new_n14275_, new_n13353_ ) -new_n20858_ = OR ( new_n14289_, new_n20495_ ) -new_n20859_ = AND ( new_n20858_, new_n20857_, new_n20856_ ) -NET_22901 = NAND ( new_n20859_, new_n20855_, new_n20854_, new_n20853_ ) -new_n20861_ = NOR ( new_n20852_, new_n14295_ ) -new_n20862_ = NAND ( new_n16282_, new_n13404_ ) -new_n20863_ = OR ( new_n14299_, new_n13393_ ) -new_n20864_ = OR ( new_n14301_, new_n20495_ ) -new_n20865_ = OR ( new_n14294_, new_n13396_ ) -new_n20866_ = NAND ( new_n20865_, new_n20864_, new_n20863_, new_n20862_ ) -NET_22902 = OR ( new_n20866_, new_n20861_ ) -new_n20868_ = OR ( new_n20852_, new_n14312_ ) -new_n20869_ = OR ( new_n14314_, new_n13393_ ) -new_n20870_ = OR ( new_n14317_, new_n5554_ ) -new_n20871_ = NAND ( new_n14311_, NET_455 ) -NET_22903 = NAND ( new_n20871_, new_n20870_, new_n20869_, new_n20868_ ) -new_n20873_ = XOR ( new_n18961_, new_n20538_ ) -new_n20874_ = NOR ( new_n20873_, new_n11723_ ) -new_n20875_ = NAND ( new_n11740_, NET_343 ) -new_n20876_ = OR ( new_n17465_, new_n6706_ ) -new_n20877_ = NAND ( new_n5529_, NET_534 ) -new_n20878_ = NOT ( NET_375 ) -new_n20879_ = OR ( new_n6828_, new_n20878_ ) -new_n20880_ = NAND ( new_n20879_, new_n20877_, new_n20876_, new_n20875_ ) -new_n20881_ = NOR ( new_n20880_, new_n20874_ ) -new_n20882_ = XOR ( new_n20881_, new_n6707_ ) -new_n20883_ = NOT ( new_n20882_ ) -new_n20884_ = XOR ( new_n20883_, new_n20550_ ) -new_n20885_ = NAND ( new_n20884_, new_n11714_ ) -new_n20886_ = OR ( new_n20873_, new_n11775_ ) -new_n20887_ = NAND ( new_n11713_, NET_502 ) -NET_22904 = NAND ( new_n20887_, new_n20886_, new_n20885_ ) -new_n20889_ = NAND ( new_n18961_, new_n18950_, new_n18910_ ) -new_n20890_ = XOR ( new_n20889_, new_n18973_ ) -new_n20891_ = NOR ( new_n20890_, new_n11723_ ) -new_n20892_ = NAND ( new_n11740_, NET_344 ) -new_n20893_ = OR ( new_n17970_, new_n6706_ ) -new_n20894_ = NAND ( new_n5529_, NET_535 ) -new_n20895_ = NOT ( NET_376 ) -new_n20896_ = OR ( new_n6828_, new_n20895_ ) -new_n20897_ = NAND ( new_n20896_, new_n20894_, new_n20893_, new_n20892_ ) -new_n20898_ = NOR ( new_n20897_, new_n20891_ ) -new_n20899_ = XOR ( new_n20898_, new_n6707_ ) -new_n20900_ = NOT ( new_n20899_ ) -new_n20901_ = OR ( new_n20883_, new_n20549_, new_n20537_ ) -new_n20902_ = OR ( new_n20901_, new_n20900_ ) -new_n20903_ = NAND ( new_n20901_, new_n20900_ ) -new_n20904_ = NAND ( new_n20903_, new_n20902_ ) -new_n20905_ = OR ( new_n20904_, new_n11715_ ) -new_n20906_ = OR ( new_n20890_, new_n11775_ ) -new_n20907_ = NAND ( new_n11713_, NET_503 ) -NET_22905 = NAND ( new_n20907_, new_n20906_, new_n20905_ ) -new_n20909_ = OR ( new_n20852_, new_n20011_ ) -new_n20910_ = OR ( new_n20016_, new_n13393_ ) -new_n20911_ = NAND ( new_n20020_, new_n13404_ ) -new_n20912_ = OR ( new_n20026_, new_n13360_ ) -new_n20913_ = OR ( new_n20028_, new_n13396_ ) -new_n20914_ = OR ( new_n20009_, new_n20495_ ) -new_n20915_ = AND ( new_n20914_, new_n20913_, new_n20912_, new_n20031_ ) -NET_22906 = NAND ( new_n20915_, new_n20911_, new_n20910_, new_n20909_ ) -new_n20917_ = NAND ( new_n20595_, new_n20593_ ) -new_n20918_ = NAND ( new_n20917_, new_n20588_ ) -new_n20919_ = XOR ( new_n20637_, new_n14328_ ) -new_n20920_ = XOR ( new_n20919_, new_n20918_ ) -new_n20921_ = OR ( new_n20920_, new_n14586_ ) -new_n20922_ = NAND ( new_n14588_, new_n14584_, new_n13524_ ) -new_n20923_ = OR ( new_n14592_, new_n13513_ ) -new_n20924_ = OR ( new_n14594_, new_n13478_ ) -new_n20925_ = OR ( new_n14583_, new_n13473_ ) -new_n20926_ = OR ( new_n14597_, new_n20633_ ) -new_n20927_ = AND ( new_n20926_, new_n20925_, new_n20924_ ) -NET_22918 = NAND ( new_n20927_, new_n20923_, new_n20922_, new_n20921_ ) -new_n20929_ = NOR ( new_n20920_, new_n14603_ ) -new_n20930_ = NAND ( new_n16389_, new_n13524_ ) -new_n20931_ = OR ( new_n14607_, new_n13513_ ) -new_n20932_ = OR ( new_n14609_, new_n20633_ ) -new_n20933_ = OR ( new_n14602_, new_n13516_ ) -new_n20934_ = NAND ( new_n20933_, new_n20932_, new_n20931_, new_n20930_ ) -NET_22919 = OR ( new_n20934_, new_n20929_ ) -new_n20936_ = OR ( new_n20920_, new_n14620_ ) -new_n20937_ = OR ( new_n14622_, new_n13513_ ) -new_n20938_ = NAND ( new_n14625_, new_n5888_ ) -new_n20939_ = NAND ( new_n14619_, NET_904 ) -NET_22920 = NAND ( new_n20939_, new_n20938_, new_n20937_, new_n20936_ ) -new_n20941_ = XOR ( new_n19365_, new_n20676_ ) -new_n20942_ = NOR ( new_n20941_, new_n11791_ ) -new_n20943_ = NAND ( new_n11808_, NET_792 ) -new_n20944_ = OR ( new_n17635_, new_n6866_ ) -new_n20945_ = NAND ( new_n5827_, NET_983 ) -new_n20946_ = NOT ( NET_824 ) -new_n20947_ = OR ( new_n6988_, new_n20946_ ) -new_n20948_ = NAND ( new_n20947_, new_n20945_, new_n20944_, new_n20943_ ) -new_n20949_ = NOR ( new_n20948_, new_n20942_ ) -new_n20950_ = XOR ( new_n20949_, new_n6867_ ) -new_n20951_ = NOT ( new_n20950_ ) -new_n20952_ = XOR ( new_n20951_, new_n20688_ ) -new_n20953_ = NAND ( new_n20952_, new_n11782_ ) -new_n20954_ = OR ( new_n20941_, new_n11843_ ) -new_n20955_ = NAND ( new_n11781_, NET_951 ) -NET_22921 = NAND ( new_n20955_, new_n20954_, new_n20953_ ) -new_n20957_ = NAND ( new_n19365_, new_n19354_, new_n19314_ ) -new_n20958_ = XOR ( new_n20957_, new_n19377_ ) -new_n20959_ = NOR ( new_n20958_, new_n11791_ ) -new_n20960_ = NAND ( new_n11808_, NET_793 ) -new_n20961_ = OR ( new_n18132_, new_n6866_ ) -new_n20962_ = NAND ( new_n5827_, NET_984 ) -new_n20963_ = NOT ( NET_825 ) -new_n20964_ = OR ( new_n6988_, new_n20963_ ) -new_n20965_ = NAND ( new_n20964_, new_n20962_, new_n20961_, new_n20960_ ) -new_n20966_ = NOR ( new_n20965_, new_n20959_ ) -new_n20967_ = XOR ( new_n20966_, new_n6867_ ) -new_n20968_ = NOT ( new_n20967_ ) -new_n20969_ = OR ( new_n20951_, new_n20687_, new_n20675_ ) -new_n20970_ = OR ( new_n20969_, new_n20968_ ) -new_n20971_ = NAND ( new_n20969_, new_n20968_ ) -new_n20972_ = NAND ( new_n20971_, new_n20970_ ) -new_n20973_ = OR ( new_n20972_, new_n11783_ ) -new_n20974_ = OR ( new_n20958_, new_n11843_ ) -new_n20975_ = NAND ( new_n11781_, NET_952 ) -NET_22922 = NAND ( new_n20975_, new_n20974_, new_n20973_ ) -new_n20977_ = OR ( new_n20920_, new_n20060_ ) -new_n20978_ = OR ( new_n20065_, new_n13513_ ) -new_n20979_ = NAND ( new_n20069_, new_n13524_ ) -new_n20980_ = OR ( new_n20075_, new_n13480_ ) -new_n20981_ = OR ( new_n20077_, new_n13516_ ) -new_n20982_ = OR ( new_n20058_, new_n20633_ ) -new_n20983_ = AND ( new_n20982_, new_n20981_, new_n20980_, new_n20080_ ) -NET_22923 = NAND ( new_n20983_, new_n20979_, new_n20978_, new_n20977_ ) -new_n20985_ = NAND ( new_n20733_, new_n20731_ ) -new_n20986_ = NAND ( new_n20985_, new_n20726_ ) -new_n20987_ = XOR ( new_n20775_, new_n14636_ ) -new_n20988_ = XOR ( new_n20987_, new_n20986_ ) -new_n20989_ = OR ( new_n20988_, new_n14894_ ) -new_n20990_ = NAND ( new_n14896_, new_n14892_, new_n13644_ ) -new_n20991_ = OR ( new_n14900_, new_n13633_ ) -new_n20992_ = OR ( new_n14902_, new_n13598_ ) -new_n20993_ = OR ( new_n14891_, new_n13593_ ) -new_n20994_ = OR ( new_n14905_, new_n20771_ ) -new_n20995_ = AND ( new_n20994_, new_n20993_, new_n20992_ ) -NET_22939 = NAND ( new_n20995_, new_n20991_, new_n20990_, new_n20989_ ) -new_n20997_ = NOR ( new_n20988_, new_n14911_ ) -new_n20998_ = NAND ( new_n16496_, new_n13644_ ) -new_n20999_ = OR ( new_n14915_, new_n13633_ ) -new_n21000_ = OR ( new_n14917_, new_n20771_ ) -new_n21001_ = OR ( new_n14910_, new_n13636_ ) -new_n21002_ = NAND ( new_n21001_, new_n21000_, new_n20999_, new_n20998_ ) -NET_22940 = OR ( new_n21002_, new_n20997_ ) -new_n21004_ = OR ( new_n20988_, new_n14928_ ) -new_n21005_ = OR ( new_n14930_, new_n13633_ ) -new_n21006_ = NAND ( new_n14933_, new_n6262_ ) -new_n21007_ = NAND ( new_n14927_, NET_1353 ) -NET_22941 = NAND ( new_n21007_, new_n21006_, new_n21005_, new_n21004_ ) -new_n21009_ = XOR ( new_n19769_, new_n20814_ ) -new_n21010_ = NOR ( new_n21009_, new_n11859_ ) -new_n21011_ = NAND ( new_n11876_, NET_1241 ) -new_n21012_ = OR ( new_n17805_, new_n7026_ ) -new_n21013_ = NAND ( new_n6196_, NET_1432 ) -new_n21014_ = NOT ( NET_1273 ) -new_n21015_ = OR ( new_n7148_, new_n21014_ ) -new_n21016_ = NAND ( new_n21015_, new_n21013_, new_n21012_, new_n21011_ ) -new_n21017_ = NOR ( new_n21016_, new_n21010_ ) -new_n21018_ = XOR ( new_n21017_, new_n7027_ ) -new_n21019_ = NOT ( new_n21018_ ) -new_n21020_ = XOR ( new_n21019_, new_n20826_ ) -new_n21021_ = NAND ( new_n21020_, new_n11850_ ) -new_n21022_ = OR ( new_n21009_, new_n11911_ ) -new_n21023_ = NAND ( new_n11849_, NET_1400 ) -NET_22942 = NAND ( new_n21023_, new_n21022_, new_n21021_ ) -new_n21025_ = NAND ( new_n19769_, new_n19758_, new_n19718_ ) -new_n21026_ = XOR ( new_n21025_, new_n19781_ ) -new_n21027_ = NOR ( new_n21026_, new_n11859_ ) -new_n21028_ = NAND ( new_n11876_, NET_1242 ) -new_n21029_ = OR ( new_n18294_, new_n7026_ ) -new_n21030_ = NAND ( new_n6196_, NET_1433 ) -new_n21031_ = NOT ( NET_1274 ) -new_n21032_ = OR ( new_n7148_, new_n21031_ ) -new_n21033_ = NAND ( new_n21032_, new_n21030_, new_n21029_, new_n21028_ ) -new_n21034_ = NOR ( new_n21033_, new_n21027_ ) -new_n21035_ = XOR ( new_n21034_, new_n7027_ ) -new_n21036_ = NOT ( new_n21035_ ) -new_n21037_ = OR ( new_n21019_, new_n20825_, new_n20813_ ) -new_n21038_ = OR ( new_n21037_, new_n21036_ ) -new_n21039_ = NAND ( new_n21037_, new_n21036_ ) -new_n21040_ = NAND ( new_n21039_, new_n21038_ ) -new_n21041_ = OR ( new_n21040_, new_n11851_ ) -new_n21042_ = OR ( new_n21026_, new_n11911_ ) -new_n21043_ = NAND ( new_n11849_, NET_1401 ) -NET_22943 = NAND ( new_n21043_, new_n21042_, new_n21041_ ) -new_n21045_ = OR ( new_n20988_, new_n20109_ ) -new_n21046_ = OR ( new_n20114_, new_n13633_ ) -new_n21047_ = NAND ( new_n20118_, new_n13644_ ) -new_n21048_ = OR ( new_n20124_, new_n13600_ ) -new_n21049_ = OR ( new_n20126_, new_n13636_ ) -new_n21050_ = OR ( new_n20107_, new_n20771_ ) -new_n21051_ = AND ( new_n21050_, new_n21049_, new_n21048_, new_n20129_ ) -NET_22944 = NAND ( new_n21051_, new_n21047_, new_n21046_, new_n21045_ ) -new_n21053_ = NAND ( new_n18996_, new_n18974_ ) -new_n21054_ = OR ( new_n18996_, new_n18974_ ) -new_n21055_ = NAND ( new_n21054_, new_n21053_ ) -new_n21056_ = NOR ( new_n21055_, new_n11723_ ) -new_n21057_ = NAND ( new_n11740_, NET_345 ) -new_n21058_ = OR ( new_n18459_, new_n6706_ ) -new_n21059_ = NAND ( new_n5529_, NET_536 ) -new_n21060_ = NOT ( NET_377 ) -new_n21061_ = OR ( new_n6828_, new_n21060_ ) -new_n21062_ = NAND ( new_n21061_, new_n21059_, new_n21058_, new_n21057_ ) -new_n21063_ = NOR ( new_n21062_, new_n21056_ ) -new_n21064_ = XOR ( new_n21063_, new_n6707_ ) -new_n21065_ = NOT ( new_n21064_ ) -new_n21066_ = AND ( new_n21065_, new_n20902_ ) -new_n21067_ = NOR ( new_n21065_, new_n20902_ ) -new_n21068_ = OR ( new_n21067_, new_n21066_ ) -new_n21069_ = OR ( new_n21068_, new_n11715_ ) -new_n21070_ = OR ( new_n21055_, new_n11775_ ) -new_n21071_ = NAND ( new_n11713_, NET_504 ) -NET_23004 = NAND ( new_n21071_, new_n21070_, new_n21069_ ) -new_n21073_ = NAND ( new_n19400_, new_n19378_ ) -new_n21074_ = OR ( new_n19400_, new_n19378_ ) -new_n21075_ = NAND ( new_n21074_, new_n21073_ ) -new_n21076_ = NOR ( new_n21075_, new_n11791_ ) -new_n21077_ = NAND ( new_n11808_, NET_794 ) -new_n21078_ = OR ( new_n18517_, new_n6866_ ) -new_n21079_ = NAND ( new_n5827_, NET_985 ) -new_n21080_ = NOT ( NET_826 ) -new_n21081_ = OR ( new_n6988_, new_n21080_ ) -new_n21082_ = NAND ( new_n21081_, new_n21079_, new_n21078_, new_n21077_ ) -new_n21083_ = NOR ( new_n21082_, new_n21076_ ) -new_n21084_ = XOR ( new_n21083_, new_n6867_ ) -new_n21085_ = NOT ( new_n21084_ ) -new_n21086_ = AND ( new_n21085_, new_n20970_ ) -new_n21087_ = NOR ( new_n21085_, new_n20970_ ) -new_n21088_ = OR ( new_n21087_, new_n21086_ ) -new_n21089_ = OR ( new_n21088_, new_n11783_ ) -new_n21090_ = OR ( new_n21075_, new_n11843_ ) -new_n21091_ = NAND ( new_n11781_, NET_953 ) -NET_23008 = NAND ( new_n21091_, new_n21090_, new_n21089_ ) -new_n21093_ = NAND ( new_n19804_, new_n19782_ ) -new_n21094_ = OR ( new_n19804_, new_n19782_ ) -new_n21095_ = NAND ( new_n21094_, new_n21093_ ) -new_n21096_ = NOR ( new_n21095_, new_n11859_ ) -new_n21097_ = NAND ( new_n11876_, NET_1243 ) -new_n21098_ = OR ( new_n18575_, new_n7026_ ) -new_n21099_ = NAND ( new_n6196_, NET_1434 ) -new_n21100_ = NOT ( NET_1275 ) -new_n21101_ = OR ( new_n7148_, new_n21100_ ) -new_n21102_ = NAND ( new_n21101_, new_n21099_, new_n21098_, new_n21097_ ) -new_n21103_ = NOR ( new_n21102_, new_n21096_ ) -new_n21104_ = XOR ( new_n21103_, new_n7027_ ) -new_n21105_ = NOT ( new_n21104_ ) -new_n21106_ = AND ( new_n21105_, new_n21038_ ) -new_n21107_ = NOR ( new_n21105_, new_n21038_ ) -new_n21108_ = OR ( new_n21107_, new_n21106_ ) -new_n21109_ = OR ( new_n21108_, new_n11851_ ) -new_n21110_ = OR ( new_n21095_, new_n11911_ ) -new_n21111_ = NAND ( new_n11849_, NET_1402 ) -NET_23012 = NAND ( new_n21111_, new_n21110_, new_n21109_ ) -new_n21113_ = XNOR ( new_n15015_, new_n14998_ ) -new_n21114_ = NOT ( new_n13865_ ) -new_n21115_ = OR ( new_n20477_, new_n21114_ ) -new_n21116_ = NAND ( new_n21115_, new_n13883_ ) -new_n21117_ = NAND ( new_n20477_, new_n21114_ ) -new_n21118_ = NAND ( new_n21117_, new_n21116_ ) -new_n21119_ = OR ( new_n21118_, new_n21113_ ) -new_n21120_ = NAND ( new_n21118_, new_n21113_ ) -new_n21121_ = NAND ( new_n21120_, new_n21119_, new_n6591_ ) -new_n21122_ = NAND ( new_n15015_, new_n14014_ ) -new_n21123_ = OR ( new_n15005_, new_n14021_ ) -new_n21124_ = NOT ( NET_521 ) -new_n21125_ = OR ( new_n14024_, new_n21124_ ) -new_n21126_ = NAND ( new_n14026_, NET_330 ) -new_n21127_ = AND ( new_n21126_, new_n21125_, new_n21123_ ) -new_n21128_ = NAND ( new_n21127_, new_n21122_, new_n21121_ ) -new_n21129_ = XOR ( new_n21128_, new_n14021_ ) -new_n21130_ = NAND ( new_n20502_, new_n20500_, new_n20487_ ) -new_n21131_ = NAND ( new_n21130_, new_n14020_ ) -new_n21132_ = NOT ( new_n20487_ ) -new_n21133_ = NAND ( new_n20503_, new_n21132_ ) -new_n21134_ = NAND ( new_n21133_, new_n21131_ ) -new_n21135_ = XOR ( new_n21134_, new_n21129_ ) -new_n21136_ = OR ( new_n21135_, new_n14278_ ) -new_n21137_ = NAND ( new_n15015_, new_n14280_, new_n14276_ ) -new_n21138_ = OR ( new_n15005_, new_n14284_ ) -new_n21139_ = OR ( new_n14969_, new_n14286_ ) -new_n21140_ = OR ( new_n14275_, new_n14962_ ) -new_n21141_ = OR ( new_n14289_, new_n21124_ ) -new_n21142_ = AND ( new_n21141_, new_n21140_, new_n21139_ ) -NET_23138 = NAND ( new_n21142_, new_n21138_, new_n21137_, new_n21136_ ) -new_n21144_ = NOR ( new_n21135_, new_n14295_ ) -new_n21145_ = NAND ( new_n15015_, new_n16282_ ) -new_n21146_ = OR ( new_n15005_, new_n14299_ ) -new_n21147_ = OR ( new_n14301_, new_n21124_ ) -new_n21148_ = OR ( new_n14294_, new_n15008_ ) -new_n21149_ = NAND ( new_n21148_, new_n21147_, new_n21146_, new_n21145_ ) -NET_23139 = OR ( new_n21149_, new_n21144_ ) -new_n21151_ = OR ( new_n21135_, new_n14312_ ) -new_n21152_ = OR ( new_n15005_, new_n14314_ ) -new_n21153_ = OR ( new_n14317_, new_n5544_ ) -new_n21154_ = NAND ( new_n14311_, NET_457 ) -NET_23140 = NAND ( new_n21154_, new_n21153_, new_n21152_, new_n21151_ ) -new_n21156_ = XNOR ( new_n21054_, new_n18984_ ) -new_n21157_ = NOR ( new_n21156_, new_n11723_ ) -new_n21158_ = NAND ( new_n11740_, NET_346 ) -new_n21159_ = OR ( new_n18758_, new_n6706_ ) -new_n21160_ = NAND ( new_n5529_, NET_537 ) -new_n21161_ = NOT ( NET_378 ) -new_n21162_ = OR ( new_n6828_, new_n21161_ ) -new_n21163_ = NAND ( new_n21162_, new_n21160_, new_n21159_, new_n21158_ ) -new_n21164_ = NOR ( new_n21163_, new_n21157_ ) -new_n21165_ = XOR ( new_n21164_, new_n6707_ ) -new_n21166_ = OR ( new_n21165_, new_n21067_ ) -new_n21167_ = NAND ( new_n21165_, new_n21067_ ) -new_n21168_ = AND ( new_n21167_, new_n21166_ ) -new_n21169_ = NAND ( new_n21168_, new_n11714_ ) -new_n21170_ = OR ( new_n21156_, new_n11775_ ) -new_n21171_ = NAND ( new_n11713_, NET_505 ) -NET_23141 = NAND ( new_n21171_, new_n21170_, new_n21169_ ) -new_n21173_ = OR ( new_n21135_, new_n20011_ ) -new_n21174_ = OR ( new_n20016_, new_n15005_ ) -new_n21175_ = NAND ( new_n20020_, new_n15015_ ) -new_n21176_ = OR ( new_n20026_, new_n14971_ ) -new_n21177_ = OR ( new_n20028_, new_n15008_ ) -new_n21178_ = OR ( new_n20009_, new_n21124_ ) -new_n21179_ = AND ( new_n21178_, new_n21177_, new_n21176_, new_n20031_ ) -NET_23142 = NAND ( new_n21179_, new_n21175_, new_n21174_, new_n21173_ ) -new_n21181_ = XNOR ( new_n15099_, new_n15082_ ) -new_n21182_ = NOT ( new_n13927_ ) -new_n21183_ = OR ( new_n20615_, new_n21182_ ) -new_n21184_ = NAND ( new_n21183_, new_n13945_ ) -new_n21185_ = NAND ( new_n20615_, new_n21182_ ) -new_n21186_ = NAND ( new_n21185_, new_n21184_ ) -new_n21187_ = OR ( new_n21186_, new_n21181_ ) -new_n21188_ = NAND ( new_n21186_, new_n21181_ ) -new_n21189_ = NAND ( new_n21188_, new_n21187_, new_n6636_ ) -new_n21190_ = NAND ( new_n15099_, new_n14322_ ) -new_n21191_ = OR ( new_n15089_, new_n14329_ ) -new_n21192_ = NOT ( NET_970 ) -new_n21193_ = OR ( new_n14332_, new_n21192_ ) -new_n21194_ = NAND ( new_n14334_, NET_779 ) -new_n21195_ = AND ( new_n21194_, new_n21193_, new_n21191_ ) -new_n21196_ = NAND ( new_n21195_, new_n21190_, new_n21189_ ) -new_n21197_ = XOR ( new_n21196_, new_n14329_ ) -new_n21198_ = NAND ( new_n20640_, new_n20638_, new_n20625_ ) -new_n21199_ = NAND ( new_n21198_, new_n14328_ ) -new_n21200_ = NOT ( new_n20625_ ) -new_n21201_ = NAND ( new_n20641_, new_n21200_ ) -new_n21202_ = NAND ( new_n21201_, new_n21199_ ) -new_n21203_ = XOR ( new_n21202_, new_n21197_ ) -new_n21204_ = OR ( new_n21203_, new_n14586_ ) -new_n21205_ = NAND ( new_n15099_, new_n14588_, new_n14584_ ) -new_n21206_ = OR ( new_n15089_, new_n14592_ ) -new_n21207_ = OR ( new_n15053_, new_n14594_ ) -new_n21208_ = OR ( new_n14583_, new_n15046_ ) -new_n21209_ = OR ( new_n14597_, new_n21192_ ) -new_n21210_ = AND ( new_n21209_, new_n21208_, new_n21207_ ) -NET_23147 = NAND ( new_n21210_, new_n21206_, new_n21205_, new_n21204_ ) -new_n21212_ = NOR ( new_n21203_, new_n14603_ ) -new_n21213_ = NAND ( new_n15099_, new_n16389_ ) -new_n21214_ = OR ( new_n15089_, new_n14607_ ) -new_n21215_ = OR ( new_n14609_, new_n21192_ ) -new_n21216_ = OR ( new_n14602_, new_n15092_ ) -new_n21217_ = NAND ( new_n21216_, new_n21215_, new_n21214_, new_n21213_ ) -NET_23148 = OR ( new_n21217_, new_n21212_ ) -new_n21219_ = OR ( new_n21203_, new_n14620_ ) -new_n21220_ = OR ( new_n15089_, new_n14622_ ) -new_n21221_ = NAND ( new_n14625_, new_n5874_ ) -new_n21222_ = NAND ( new_n14619_, NET_906 ) -NET_23149 = NAND ( new_n21222_, new_n21221_, new_n21220_, new_n21219_ ) -new_n21224_ = XNOR ( new_n21074_, new_n19388_ ) -new_n21225_ = NOR ( new_n21224_, new_n11791_ ) -new_n21226_ = NAND ( new_n11808_, NET_795 ) -new_n21227_ = OR ( new_n19162_, new_n6866_ ) -new_n21228_ = NAND ( new_n5827_, NET_986 ) -new_n21229_ = NOT ( NET_827 ) -new_n21230_ = OR ( new_n6988_, new_n21229_ ) -new_n21231_ = NAND ( new_n21230_, new_n21228_, new_n21227_, new_n21226_ ) -new_n21232_ = NOR ( new_n21231_, new_n21225_ ) -new_n21233_ = XOR ( new_n21232_, new_n6867_ ) -new_n21234_ = OR ( new_n21233_, new_n21087_ ) -new_n21235_ = NAND ( new_n21233_, new_n21087_ ) -new_n21236_ = AND ( new_n21235_, new_n21234_ ) -new_n21237_ = NAND ( new_n21236_, new_n11782_ ) -new_n21238_ = OR ( new_n21224_, new_n11843_ ) -new_n21239_ = NAND ( new_n11781_, NET_954 ) -NET_23150 = NAND ( new_n21239_, new_n21238_, new_n21237_ ) -new_n21241_ = OR ( new_n21203_, new_n20060_ ) -new_n21242_ = OR ( new_n20065_, new_n15089_ ) -new_n21243_ = NAND ( new_n20069_, new_n15099_ ) -new_n21244_ = OR ( new_n20075_, new_n15055_ ) -new_n21245_ = OR ( new_n20077_, new_n15092_ ) -new_n21246_ = OR ( new_n20058_, new_n21192_ ) -new_n21247_ = AND ( new_n21246_, new_n21245_, new_n21244_, new_n20080_ ) -NET_23151 = NAND ( new_n21247_, new_n21243_, new_n21242_, new_n21241_ ) -new_n21249_ = XNOR ( new_n15183_, new_n15166_ ) -new_n21250_ = NOT ( new_n13989_ ) -new_n21251_ = OR ( new_n20753_, new_n21250_ ) -new_n21252_ = NAND ( new_n21251_, new_n14007_ ) -new_n21253_ = NAND ( new_n20753_, new_n21250_ ) -new_n21254_ = NAND ( new_n21253_, new_n21252_ ) -new_n21255_ = OR ( new_n21254_, new_n21249_ ) -new_n21256_ = NAND ( new_n21254_, new_n21249_ ) -new_n21257_ = NAND ( new_n21256_, new_n21255_, new_n6681_ ) -new_n21258_ = NAND ( new_n15183_, new_n14630_ ) -new_n21259_ = OR ( new_n15173_, new_n14637_ ) -new_n21260_ = NOT ( NET_1419 ) -new_n21261_ = OR ( new_n14640_, new_n21260_ ) -new_n21262_ = NAND ( new_n14642_, NET_1228 ) -new_n21263_ = AND ( new_n21262_, new_n21261_, new_n21259_ ) -new_n21264_ = NAND ( new_n21263_, new_n21258_, new_n21257_ ) -new_n21265_ = XOR ( new_n21264_, new_n14637_ ) -new_n21266_ = NAND ( new_n20778_, new_n20776_, new_n20763_ ) -new_n21267_ = NAND ( new_n21266_, new_n14636_ ) -new_n21268_ = NOT ( new_n20763_ ) -new_n21269_ = NAND ( new_n20779_, new_n21268_ ) -new_n21270_ = NAND ( new_n21269_, new_n21267_ ) -new_n21271_ = XOR ( new_n21270_, new_n21265_ ) -new_n21272_ = OR ( new_n21271_, new_n14894_ ) -new_n21273_ = NAND ( new_n15183_, new_n14896_, new_n14892_ ) -new_n21274_ = OR ( new_n15173_, new_n14900_ ) -new_n21275_ = OR ( new_n15137_, new_n14902_ ) -new_n21276_ = OR ( new_n14891_, new_n15130_ ) -new_n21277_ = OR ( new_n14905_, new_n21260_ ) -new_n21278_ = AND ( new_n21277_, new_n21276_, new_n21275_ ) -NET_23156 = NAND ( new_n21278_, new_n21274_, new_n21273_, new_n21272_ ) -new_n21280_ = NOR ( new_n21271_, new_n14911_ ) -new_n21281_ = NAND ( new_n15183_, new_n16496_ ) -new_n21282_ = OR ( new_n15173_, new_n14915_ ) -new_n21283_ = OR ( new_n14917_, new_n21260_ ) -new_n21284_ = OR ( new_n14910_, new_n15176_ ) -new_n21285_ = NAND ( new_n21284_, new_n21283_, new_n21282_, new_n21281_ ) -NET_23157 = OR ( new_n21285_, new_n21280_ ) -new_n21287_ = OR ( new_n21271_, new_n14928_ ) -new_n21288_ = OR ( new_n15173_, new_n14930_ ) -new_n21289_ = NAND ( new_n14933_, new_n6246_ ) -new_n21290_ = NAND ( new_n14927_, NET_1355 ) -NET_23158 = NAND ( new_n21290_, new_n21289_, new_n21288_, new_n21287_ ) -new_n21292_ = XNOR ( new_n21094_, new_n19792_ ) -new_n21293_ = NOR ( new_n21292_, new_n11859_ ) -new_n21294_ = NAND ( new_n11876_, NET_1244 ) -new_n21295_ = OR ( new_n19566_, new_n7026_ ) -new_n21296_ = NAND ( new_n6196_, NET_1435 ) -new_n21297_ = NOT ( NET_1276 ) -new_n21298_ = OR ( new_n7148_, new_n21297_ ) -new_n21299_ = NAND ( new_n21298_, new_n21296_, new_n21295_, new_n21294_ ) -new_n21300_ = NOR ( new_n21299_, new_n21293_ ) -new_n21301_ = XOR ( new_n21300_, new_n7027_ ) -new_n21302_ = OR ( new_n21301_, new_n21107_ ) -new_n21303_ = NAND ( new_n21301_, new_n21107_ ) -new_n21304_ = AND ( new_n21303_, new_n21302_ ) -new_n21305_ = NAND ( new_n21304_, new_n11850_ ) -new_n21306_ = OR ( new_n21292_, new_n11911_ ) -new_n21307_ = NAND ( new_n11849_, NET_1403 ) -NET_23159 = NAND ( new_n21307_, new_n21306_, new_n21305_ ) -new_n21309_ = OR ( new_n21271_, new_n20109_ ) -new_n21310_ = OR ( new_n20114_, new_n15173_ ) -new_n21311_ = NAND ( new_n20118_, new_n15183_ ) -new_n21312_ = OR ( new_n20124_, new_n15139_ ) -new_n21313_ = OR ( new_n20126_, new_n15176_ ) -new_n21314_ = OR ( new_n20107_, new_n21260_ ) -new_n21315_ = AND ( new_n21314_, new_n21313_, new_n21312_, new_n20129_ ) -NET_23160 = NAND ( new_n21315_, new_n21311_, new_n21310_, new_n21309_ ) -new_n21317_ = XNOR ( new_n18997_, new_n18899_ ) -new_n21318_ = NOR ( new_n21317_, new_n11723_ ) -new_n21319_ = NAND ( new_n11740_, NET_347 ) -new_n21320_ = OR ( new_n18783_, new_n6706_ ) -new_n21321_ = NAND ( new_n5529_, NET_538 ) -new_n21322_ = NOT ( NET_379 ) -new_n21323_ = OR ( new_n6828_, new_n21322_ ) -new_n21324_ = NAND ( new_n21323_, new_n21321_, new_n21320_, new_n21319_ ) -new_n21325_ = NOR ( new_n21324_, new_n21318_ ) -new_n21326_ = XOR ( new_n21325_, new_n6707_ ) -new_n21327_ = XOR ( new_n21326_, new_n21167_ ) -new_n21328_ = OR ( new_n21327_, new_n11715_ ) -new_n21329_ = OR ( new_n21317_, new_n11775_ ) -new_n21330_ = NAND ( new_n11713_, NET_506 ) -NET_23255 = NAND ( new_n21330_, new_n21329_, new_n21328_ ) -new_n21332_ = XNOR ( new_n19401_, new_n19303_ ) -new_n21333_ = NOR ( new_n21332_, new_n11791_ ) -new_n21334_ = NAND ( new_n11808_, NET_796 ) -new_n21335_ = OR ( new_n19187_, new_n6866_ ) -new_n21336_ = NAND ( new_n5827_, NET_987 ) -new_n21337_ = NOT ( NET_828 ) -new_n21338_ = OR ( new_n6988_, new_n21337_ ) -new_n21339_ = NAND ( new_n21338_, new_n21336_, new_n21335_, new_n21334_ ) -new_n21340_ = NOR ( new_n21339_, new_n21333_ ) -new_n21341_ = XOR ( new_n21340_, new_n6867_ ) -new_n21342_ = XOR ( new_n21341_, new_n21235_ ) -new_n21343_ = OR ( new_n21342_, new_n11783_ ) -new_n21344_ = OR ( new_n21332_, new_n11843_ ) -new_n21345_ = NAND ( new_n11781_, NET_955 ) -NET_23268 = NAND ( new_n21345_, new_n21344_, new_n21343_ ) -new_n21347_ = XNOR ( new_n19805_, new_n19707_ ) -new_n21348_ = NOR ( new_n21347_, new_n11859_ ) -new_n21349_ = NAND ( new_n11876_, NET_1245 ) -new_n21350_ = OR ( new_n19591_, new_n7026_ ) -new_n21351_ = NAND ( new_n6196_, NET_1436 ) -new_n21352_ = NOT ( NET_1277 ) -new_n21353_ = OR ( new_n7148_, new_n21352_ ) -new_n21354_ = NAND ( new_n21353_, new_n21351_, new_n21350_, new_n21349_ ) -new_n21355_ = NOR ( new_n21354_, new_n21348_ ) -new_n21356_ = XOR ( new_n21355_, new_n7027_ ) -new_n21357_ = XOR ( new_n21356_, new_n21303_ ) -new_n21358_ = OR ( new_n21357_, new_n11851_ ) -new_n21359_ = OR ( new_n21347_, new_n11911_ ) -new_n21360_ = NAND ( new_n11849_, NET_1404 ) -NET_23283 = NAND ( new_n21360_, new_n21359_, new_n21358_ ) -new_n21362_ = XOR ( new_n15353_, new_n15333_ ) -new_n21363_ = NOT ( new_n14998_ ) -new_n21364_ = OR ( new_n21118_, new_n21363_ ) -new_n21365_ = NAND ( new_n21364_, new_n15015_ ) -new_n21366_ = NAND ( new_n21118_, new_n21363_ ) -new_n21367_ = NAND ( new_n21366_, new_n21365_ ) -new_n21368_ = OR ( new_n21367_, new_n21362_ ) -new_n21369_ = NAND ( new_n21367_, new_n21362_ ) -new_n21370_ = AND ( new_n21369_, new_n21368_, new_n6591_ ) -new_n21371_ = OR ( new_n15353_, new_n14015_ ) -new_n21372_ = OR ( new_n15342_, new_n14021_ ) -new_n21373_ = NOT ( NET_522 ) -new_n21374_ = OR ( new_n14024_, new_n21373_ ) -new_n21375_ = NAND ( new_n14026_, NET_331 ) -new_n21376_ = NAND ( new_n21375_, new_n21374_, new_n21372_, new_n21371_ ) -new_n21377_ = NOR ( new_n21376_, new_n21370_ ) -new_n21378_ = XOR ( new_n21377_, new_n14021_ ) -new_n21379_ = NAND ( new_n21134_, new_n21128_ ) -new_n21380_ = NAND ( new_n21379_, new_n14021_ ) -new_n21381_ = OR ( new_n21134_, new_n21128_ ) -new_n21382_ = NAND ( new_n21381_, new_n21380_ ) -new_n21383_ = XOR ( new_n21382_, new_n21378_ ) -new_n21384_ = OR ( new_n21383_, new_n14278_ ) -new_n21385_ = OR ( new_n15353_, new_n14281_ ) -new_n21386_ = OR ( new_n15342_, new_n14284_ ) -new_n21387_ = OR ( new_n15303_, new_n14286_ ) -new_n21388_ = OR ( new_n14275_, new_n15298_ ) -new_n21389_ = OR ( new_n14289_, new_n21373_ ) -new_n21390_ = AND ( new_n21389_, new_n21388_, new_n21387_ ) -NET_23326 = NAND ( new_n21390_, new_n21386_, new_n21385_, new_n21384_ ) -new_n21392_ = NOR ( new_n21383_, new_n14295_ ) -new_n21393_ = OR ( new_n15353_, new_n14297_ ) -new_n21394_ = OR ( new_n15342_, new_n14299_ ) -new_n21395_ = OR ( new_n14301_, new_n21373_ ) -new_n21396_ = OR ( new_n14294_, new_n15345_ ) -new_n21397_ = NAND ( new_n21396_, new_n21395_, new_n21394_, new_n21393_ ) -NET_23327 = OR ( new_n21397_, new_n21392_ ) -new_n21399_ = OR ( new_n21383_, new_n14312_ ) -new_n21400_ = OR ( new_n15342_, new_n14314_ ) -new_n21401_ = OR ( new_n14317_, new_n5539_ ) -new_n21402_ = NAND ( new_n14311_, NET_458 ) -NET_23328 = NAND ( new_n21402_, new_n21401_, new_n21400_, new_n21399_ ) -new_n21404_ = OR ( new_n21383_, new_n20011_ ) -new_n21405_ = OR ( new_n20016_, new_n15342_ ) -new_n21406_ = OR ( new_n20021_, new_n15353_ ) -new_n21407_ = OR ( new_n20026_, new_n15305_ ) -new_n21408_ = OR ( new_n20028_, new_n15345_ ) -new_n21409_ = OR ( new_n20009_, new_n21373_ ) -new_n21410_ = AND ( new_n21409_, new_n21408_, new_n21407_, new_n20031_ ) -NET_23329 = NAND ( new_n21410_, new_n21406_, new_n21405_, new_n21404_ ) -new_n21412_ = XOR ( new_n15580_, new_n15560_ ) -new_n21413_ = NOT ( new_n15082_ ) -new_n21414_ = OR ( new_n21186_, new_n21413_ ) -new_n21415_ = NAND ( new_n21414_, new_n15099_ ) -new_n21416_ = NAND ( new_n21186_, new_n21413_ ) -new_n21417_ = NAND ( new_n21416_, new_n21415_ ) -new_n21418_ = OR ( new_n21417_, new_n21412_ ) -new_n21419_ = NAND ( new_n21417_, new_n21412_ ) -new_n21420_ = AND ( new_n21419_, new_n21418_, new_n6636_ ) -new_n21421_ = OR ( new_n15580_, new_n14323_ ) -new_n21422_ = OR ( new_n15569_, new_n14329_ ) -new_n21423_ = NOT ( NET_971 ) -new_n21424_ = OR ( new_n14332_, new_n21423_ ) -new_n21425_ = NAND ( new_n14334_, NET_780 ) -new_n21426_ = NAND ( new_n21425_, new_n21424_, new_n21422_, new_n21421_ ) -new_n21427_ = NOR ( new_n21426_, new_n21420_ ) -new_n21428_ = XOR ( new_n21427_, new_n14329_ ) -new_n21429_ = NAND ( new_n21202_, new_n21196_ ) -new_n21430_ = NAND ( new_n21429_, new_n14329_ ) -new_n21431_ = OR ( new_n21202_, new_n21196_ ) -new_n21432_ = NAND ( new_n21431_, new_n21430_ ) -new_n21433_ = XOR ( new_n21432_, new_n21428_ ) -new_n21434_ = OR ( new_n21433_, new_n14586_ ) -new_n21435_ = OR ( new_n15580_, new_n14589_ ) -new_n21436_ = OR ( new_n15569_, new_n14592_ ) -new_n21437_ = OR ( new_n15530_, new_n14594_ ) -new_n21438_ = OR ( new_n14583_, new_n15525_ ) -new_n21439_ = OR ( new_n14597_, new_n21423_ ) -new_n21440_ = AND ( new_n21439_, new_n21438_, new_n21437_ ) -NET_23334 = NAND ( new_n21440_, new_n21436_, new_n21435_, new_n21434_ ) -new_n21442_ = NOR ( new_n21433_, new_n14603_ ) -new_n21443_ = OR ( new_n15580_, new_n14605_ ) -new_n21444_ = OR ( new_n15569_, new_n14607_ ) -new_n21445_ = OR ( new_n14609_, new_n21423_ ) -new_n21446_ = OR ( new_n14602_, new_n15572_ ) -new_n21447_ = NAND ( new_n21446_, new_n21445_, new_n21444_, new_n21443_ ) -NET_23335 = OR ( new_n21447_, new_n21442_ ) -new_n21449_ = OR ( new_n21433_, new_n14620_ ) -new_n21450_ = OR ( new_n15569_, new_n14622_ ) -new_n21451_ = NAND ( new_n14625_, new_n5867_ ) -new_n21452_ = NAND ( new_n14619_, NET_907 ) -NET_23336 = NAND ( new_n21452_, new_n21451_, new_n21450_, new_n21449_ ) -new_n21454_ = OR ( new_n21433_, new_n20060_ ) -new_n21455_ = OR ( new_n20065_, new_n15569_ ) -new_n21456_ = OR ( new_n20070_, new_n15580_ ) -new_n21457_ = OR ( new_n20075_, new_n15532_ ) -new_n21458_ = OR ( new_n20077_, new_n15572_ ) -new_n21459_ = OR ( new_n20058_, new_n21423_ ) -new_n21460_ = AND ( new_n21459_, new_n21458_, new_n21457_, new_n20080_ ) -NET_23337 = NAND ( new_n21460_, new_n21456_, new_n21455_, new_n21454_ ) -new_n21462_ = XOR ( new_n15807_, new_n15787_ ) -new_n21463_ = NOT ( new_n15166_ ) -new_n21464_ = OR ( new_n21254_, new_n21463_ ) -new_n21465_ = NAND ( new_n21464_, new_n15183_ ) -new_n21466_ = NAND ( new_n21254_, new_n21463_ ) -new_n21467_ = NAND ( new_n21466_, new_n21465_ ) -new_n21468_ = OR ( new_n21467_, new_n21462_ ) -new_n21469_ = NAND ( new_n21467_, new_n21462_ ) -new_n21470_ = AND ( new_n21469_, new_n21468_, new_n6681_ ) -new_n21471_ = OR ( new_n15807_, new_n14631_ ) -new_n21472_ = OR ( new_n15796_, new_n14637_ ) -new_n21473_ = NOT ( NET_1420 ) -new_n21474_ = OR ( new_n14640_, new_n21473_ ) -new_n21475_ = NAND ( new_n14642_, NET_1229 ) -new_n21476_ = NAND ( new_n21475_, new_n21474_, new_n21472_, new_n21471_ ) -new_n21477_ = NOR ( new_n21476_, new_n21470_ ) -new_n21478_ = XOR ( new_n21477_, new_n14637_ ) -new_n21479_ = NAND ( new_n21270_, new_n21264_ ) -new_n21480_ = NAND ( new_n21479_, new_n14637_ ) -new_n21481_ = OR ( new_n21270_, new_n21264_ ) -new_n21482_ = NAND ( new_n21481_, new_n21480_ ) -new_n21483_ = XOR ( new_n21482_, new_n21478_ ) -new_n21484_ = OR ( new_n21483_, new_n14894_ ) -new_n21485_ = OR ( new_n15807_, new_n14897_ ) -new_n21486_ = OR ( new_n15796_, new_n14900_ ) -new_n21487_ = OR ( new_n15757_, new_n14902_ ) -new_n21488_ = OR ( new_n14891_, new_n15752_ ) -new_n21489_ = OR ( new_n14905_, new_n21473_ ) -new_n21490_ = AND ( new_n21489_, new_n21488_, new_n21487_ ) -NET_23344 = NAND ( new_n21490_, new_n21486_, new_n21485_, new_n21484_ ) -new_n21492_ = NOR ( new_n21483_, new_n14911_ ) -new_n21493_ = OR ( new_n15807_, new_n14913_ ) -new_n21494_ = OR ( new_n15796_, new_n14915_ ) -new_n21495_ = OR ( new_n14917_, new_n21473_ ) -new_n21496_ = OR ( new_n14910_, new_n15799_ ) -new_n21497_ = NAND ( new_n21496_, new_n21495_, new_n21494_, new_n21493_ ) -NET_23345 = OR ( new_n21497_, new_n21492_ ) -new_n21499_ = OR ( new_n21483_, new_n14928_ ) -new_n21500_ = OR ( new_n15796_, new_n14930_ ) -new_n21501_ = NAND ( new_n14933_, new_n6238_ ) -new_n21502_ = NAND ( new_n14927_, NET_1356 ) -NET_23346 = NAND ( new_n21502_, new_n21501_, new_n21500_, new_n21499_ ) -new_n21504_ = OR ( new_n21483_, new_n20109_ ) -new_n21505_ = OR ( new_n20114_, new_n15796_ ) -new_n21506_ = OR ( new_n20119_, new_n15807_ ) -new_n21507_ = OR ( new_n20124_, new_n15759_ ) -new_n21508_ = OR ( new_n20126_, new_n15799_ ) -new_n21509_ = OR ( new_n20107_, new_n21473_ ) -new_n21510_ = AND ( new_n21509_, new_n21508_, new_n21507_, new_n20129_ ) -NET_23347 = NAND ( new_n21510_, new_n21506_, new_n21505_, new_n21504_ ) -new_n21512_ = NOT ( new_n15410_ ) -new_n21513_ = NOR ( new_n21512_, new_n15393_ ) -new_n21514_ = NAND ( new_n21512_, new_n15393_ ) -new_n21515_ = NAND ( new_n21367_, new_n15334_ ) -new_n21516_ = NAND ( new_n21515_, new_n15353_ ) -new_n21517_ = OR ( new_n21367_, new_n15334_ ) -new_n21518_ = NAND ( new_n21517_, new_n21516_, new_n21514_ ) -new_n21519_ = OR ( new_n21518_, new_n21513_ ) -new_n21520_ = NAND ( new_n21517_, new_n21516_ ) -new_n21521_ = NOT ( new_n21513_ ) -new_n21522_ = NAND ( new_n21514_, new_n21521_ ) -new_n21523_ = NAND ( new_n21522_, new_n21520_ ) -new_n21524_ = AND ( new_n21523_, new_n21519_, new_n6591_ ) -new_n21525_ = NAND ( new_n15410_, new_n14014_ ) -new_n21526_ = OR ( new_n15400_, new_n14021_ ) -new_n21527_ = NOT ( NET_523 ) -new_n21528_ = OR ( new_n14024_, new_n21527_ ) -new_n21529_ = NAND ( new_n14026_, NET_332 ) -new_n21530_ = NAND ( new_n21529_, new_n21528_, new_n21526_, new_n21525_ ) -new_n21531_ = NOR ( new_n21530_, new_n21524_ ) -new_n21532_ = XOR ( new_n21531_, new_n14020_ ) -new_n21533_ = NAND ( new_n21382_, new_n21377_ ) -new_n21534_ = NAND ( new_n21533_, new_n14020_ ) -new_n21535_ = OR ( new_n21382_, new_n21377_ ) -new_n21536_ = NAND ( new_n21535_, new_n21534_ ) -new_n21537_ = XOR ( new_n21536_, new_n21532_ ) -new_n21538_ = NOR ( new_n21537_, new_n14278_ ) -new_n21539_ = NOR ( new_n21512_, new_n14281_ ) -new_n21540_ = OR ( new_n15400_, new_n14284_ ) -new_n21541_ = OR ( new_n15364_, new_n14286_ ) -new_n21542_ = OR ( new_n14275_, new_n15358_ ) -new_n21543_ = OR ( new_n14289_, new_n21527_ ) -new_n21544_ = NAND ( new_n21543_, new_n21542_, new_n21541_, new_n21540_ ) -NET_23416 = OR ( new_n21544_, new_n21539_, new_n21538_ ) -new_n21546_ = NOR ( new_n21537_, new_n14295_ ) -new_n21547_ = NAND ( new_n15410_, new_n16282_ ) -new_n21548_ = OR ( new_n15400_, new_n14299_ ) -new_n21549_ = OR ( new_n14301_, new_n21527_ ) -new_n21550_ = OR ( new_n14294_, new_n15403_ ) -new_n21551_ = NAND ( new_n21550_, new_n21549_, new_n21548_, new_n21547_ ) -NET_23417 = OR ( new_n21551_, new_n21546_ ) -new_n21553_ = OR ( new_n21537_, new_n14312_ ) -new_n21554_ = OR ( new_n15400_, new_n14314_ ) -new_n21555_ = OR ( new_n14317_, new_n5507_ ) -new_n21556_ = NAND ( new_n14311_, NET_459 ) -NET_23418 = NAND ( new_n21556_, new_n21555_, new_n21554_, new_n21553_ ) -new_n21558_ = OR ( new_n21537_, new_n20011_ ) -new_n21559_ = OR ( new_n20016_, new_n15400_ ) -new_n21560_ = NAND ( new_n20020_, new_n15410_ ) -new_n21561_ = OR ( new_n20026_, new_n15366_ ) -new_n21562_ = OR ( new_n20028_, new_n15403_ ) -new_n21563_ = OR ( new_n20009_, new_n21527_ ) -new_n21564_ = AND ( new_n21563_, new_n21562_, new_n21561_, new_n20031_ ) -NET_23419 = NAND ( new_n21564_, new_n21560_, new_n21559_, new_n21558_ ) -new_n21566_ = NOT ( new_n15637_ ) -new_n21567_ = NOR ( new_n21566_, new_n15620_ ) -new_n21568_ = NAND ( new_n21566_, new_n15620_ ) -new_n21569_ = NAND ( new_n21417_, new_n15561_ ) -new_n21570_ = NAND ( new_n21569_, new_n15580_ ) -new_n21571_ = OR ( new_n21417_, new_n15561_ ) -new_n21572_ = NAND ( new_n21571_, new_n21570_, new_n21568_ ) -new_n21573_ = OR ( new_n21572_, new_n21567_ ) -new_n21574_ = NAND ( new_n21571_, new_n21570_ ) -new_n21575_ = NOT ( new_n21567_ ) -new_n21576_ = NAND ( new_n21568_, new_n21575_ ) -new_n21577_ = NAND ( new_n21576_, new_n21574_ ) -new_n21578_ = AND ( new_n21577_, new_n21573_, new_n6636_ ) -new_n21579_ = NAND ( new_n15637_, new_n14322_ ) -new_n21580_ = OR ( new_n15627_, new_n14329_ ) -new_n21581_ = NOT ( NET_972 ) -new_n21582_ = OR ( new_n14332_, new_n21581_ ) -new_n21583_ = NAND ( new_n14334_, NET_781 ) -new_n21584_ = NAND ( new_n21583_, new_n21582_, new_n21580_, new_n21579_ ) -new_n21585_ = NOR ( new_n21584_, new_n21578_ ) -new_n21586_ = XOR ( new_n21585_, new_n14328_ ) -new_n21587_ = NAND ( new_n21432_, new_n21427_ ) -new_n21588_ = NAND ( new_n21587_, new_n14328_ ) -new_n21589_ = OR ( new_n21432_, new_n21427_ ) -new_n21590_ = NAND ( new_n21589_, new_n21588_ ) -new_n21591_ = XOR ( new_n21590_, new_n21586_ ) -new_n21592_ = NOR ( new_n21591_, new_n14586_ ) -new_n21593_ = NOR ( new_n21566_, new_n14589_ ) -new_n21594_ = OR ( new_n15627_, new_n14592_ ) -new_n21595_ = OR ( new_n15591_, new_n14594_ ) -new_n21596_ = OR ( new_n14583_, new_n15585_ ) -new_n21597_ = OR ( new_n14597_, new_n21581_ ) -new_n21598_ = NAND ( new_n21597_, new_n21596_, new_n21595_, new_n21594_ ) -NET_23422 = OR ( new_n21598_, new_n21593_, new_n21592_ ) -new_n21600_ = NOR ( new_n21591_, new_n14603_ ) -new_n21601_ = NAND ( new_n15637_, new_n16389_ ) -new_n21602_ = OR ( new_n15627_, new_n14607_ ) -new_n21603_ = OR ( new_n14609_, new_n21581_ ) -new_n21604_ = OR ( new_n14602_, new_n15630_ ) -new_n21605_ = NAND ( new_n21604_, new_n21603_, new_n21602_, new_n21601_ ) -NET_23423 = OR ( new_n21605_, new_n21600_ ) -new_n21607_ = OR ( new_n21591_, new_n14620_ ) -new_n21608_ = OR ( new_n15627_, new_n14622_ ) -new_n21609_ = NAND ( new_n14625_, new_n5859_ ) -new_n21610_ = NAND ( new_n14619_, NET_908 ) -NET_23424 = NAND ( new_n21610_, new_n21609_, new_n21608_, new_n21607_ ) -new_n21612_ = OR ( new_n21591_, new_n20060_ ) -new_n21613_ = OR ( new_n20065_, new_n15627_ ) -new_n21614_ = NAND ( new_n20069_, new_n15637_ ) -new_n21615_ = OR ( new_n20075_, new_n15593_ ) -new_n21616_ = OR ( new_n20077_, new_n15630_ ) -new_n21617_ = OR ( new_n20058_, new_n21581_ ) -new_n21618_ = AND ( new_n21617_, new_n21616_, new_n21615_, new_n20080_ ) -NET_23425 = NAND ( new_n21618_, new_n21614_, new_n21613_, new_n21612_ ) -new_n21620_ = NOT ( new_n15864_ ) -new_n21621_ = NOR ( new_n21620_, new_n15847_ ) -new_n21622_ = NAND ( new_n21620_, new_n15847_ ) -new_n21623_ = NAND ( new_n21467_, new_n15788_ ) -new_n21624_ = NAND ( new_n21623_, new_n15807_ ) -new_n21625_ = OR ( new_n21467_, new_n15788_ ) -new_n21626_ = NAND ( new_n21625_, new_n21624_, new_n21622_ ) -new_n21627_ = OR ( new_n21626_, new_n21621_ ) -new_n21628_ = NAND ( new_n21625_, new_n21624_ ) -new_n21629_ = NOT ( new_n21621_ ) -new_n21630_ = NAND ( new_n21622_, new_n21629_ ) -new_n21631_ = NAND ( new_n21630_, new_n21628_ ) -new_n21632_ = AND ( new_n21631_, new_n21627_, new_n6681_ ) -new_n21633_ = NAND ( new_n15864_, new_n14630_ ) -new_n21634_ = OR ( new_n15854_, new_n14637_ ) -new_n21635_ = NOT ( NET_1421 ) -new_n21636_ = OR ( new_n14640_, new_n21635_ ) -new_n21637_ = NAND ( new_n14642_, NET_1230 ) -new_n21638_ = NAND ( new_n21637_, new_n21636_, new_n21634_, new_n21633_ ) -new_n21639_ = NOR ( new_n21638_, new_n21632_ ) -new_n21640_ = XOR ( new_n21639_, new_n14636_ ) -new_n21641_ = NAND ( new_n21482_, new_n21477_ ) -new_n21642_ = NAND ( new_n21641_, new_n14636_ ) -new_n21643_ = OR ( new_n21482_, new_n21477_ ) -new_n21644_ = NAND ( new_n21643_, new_n21642_ ) -new_n21645_ = XOR ( new_n21644_, new_n21640_ ) -new_n21646_ = NOR ( new_n21645_, new_n14894_ ) -new_n21647_ = NOR ( new_n21620_, new_n14897_ ) -new_n21648_ = OR ( new_n15854_, new_n14900_ ) -new_n21649_ = OR ( new_n15818_, new_n14902_ ) -new_n21650_ = OR ( new_n14891_, new_n15812_ ) -new_n21651_ = OR ( new_n14905_, new_n21635_ ) -new_n21652_ = NAND ( new_n21651_, new_n21650_, new_n21649_, new_n21648_ ) -NET_23428 = OR ( new_n21652_, new_n21647_, new_n21646_ ) -new_n21654_ = NOR ( new_n21645_, new_n14911_ ) -new_n21655_ = NAND ( new_n15864_, new_n16496_ ) -new_n21656_ = OR ( new_n15854_, new_n14915_ ) -new_n21657_ = OR ( new_n14917_, new_n21635_ ) -new_n21658_ = OR ( new_n14910_, new_n15857_ ) -new_n21659_ = NAND ( new_n21658_, new_n21657_, new_n21656_, new_n21655_ ) -NET_23429 = OR ( new_n21659_, new_n21654_ ) -new_n21661_ = OR ( new_n21645_, new_n14928_ ) -new_n21662_ = OR ( new_n15854_, new_n14930_ ) -new_n21663_ = NAND ( new_n14933_, new_n6229_ ) -new_n21664_ = NAND ( new_n14927_, NET_1357 ) -NET_23430 = NAND ( new_n21664_, new_n21663_, new_n21662_, new_n21661_ ) -new_n21666_ = OR ( new_n21645_, new_n20109_ ) -new_n21667_ = OR ( new_n20114_, new_n15854_ ) -new_n21668_ = NAND ( new_n20118_, new_n15864_ ) -new_n21669_ = OR ( new_n20124_, new_n15820_ ) -new_n21670_ = OR ( new_n20126_, new_n15857_ ) -new_n21671_ = OR ( new_n20107_, new_n21635_ ) -new_n21672_ = AND ( new_n21671_, new_n21670_, new_n21669_, new_n20129_ ) -NET_23431 = NAND ( new_n21672_, new_n21668_, new_n21667_, new_n21666_ ) -new_n21674_ = NOT ( new_n16557_ ) -new_n21675_ = NAND ( new_n21518_, new_n21521_ ) -new_n21676_ = OR ( new_n21675_, new_n21674_ ) -new_n21677_ = NAND ( new_n21675_, new_n21674_ ) -new_n21678_ = AND ( new_n21677_, new_n21676_, new_n6591_ ) -new_n21679_ = OR ( new_n16557_, new_n14015_ ) -new_n21680_ = OR ( new_n16545_, new_n14021_ ) -new_n21681_ = NOT ( NET_524 ) -new_n21682_ = OR ( new_n14024_, new_n21681_ ) -new_n21683_ = NAND ( new_n14026_, NET_333 ) -new_n21684_ = NAND ( new_n21683_, new_n21682_, new_n21680_, new_n21679_ ) -new_n21685_ = NOR ( new_n21684_, new_n21678_ ) -new_n21686_ = XOR ( new_n21685_, new_n14020_ ) -new_n21687_ = NAND ( new_n21535_, new_n21534_, new_n21531_ ) -new_n21688_ = NAND ( new_n21687_, new_n14020_ ) -new_n21689_ = NOT ( new_n21531_ ) -new_n21690_ = NAND ( new_n21536_, new_n21689_ ) -new_n21691_ = NAND ( new_n21690_, new_n21688_ ) -new_n21692_ = XOR ( new_n21691_, new_n21686_ ) -new_n21693_ = NOR ( new_n21692_, new_n14278_ ) -new_n21694_ = NOR ( new_n16557_, new_n14281_ ) -new_n21695_ = OR ( new_n16545_, new_n14284_ ) -new_n21696_ = OR ( new_n16536_, new_n14286_ ) -new_n21697_ = OR ( new_n14275_, new_n16510_ ) -new_n21698_ = OR ( new_n14289_, new_n21681_ ) -new_n21699_ = NAND ( new_n21698_, new_n21697_, new_n21696_, new_n21695_ ) -NET_23502 = OR ( new_n21699_, new_n21694_, new_n21693_ ) -new_n21701_ = NOR ( new_n21692_, new_n14295_ ) -new_n21702_ = OR ( new_n16557_, new_n14297_ ) -new_n21703_ = OR ( new_n16545_, new_n14299_ ) -new_n21704_ = OR ( new_n14301_, new_n21681_ ) -new_n21705_ = OR ( new_n14294_, new_n16548_ ) -new_n21706_ = NAND ( new_n21705_, new_n21704_, new_n21703_, new_n21702_ ) -NET_23503 = OR ( new_n21706_, new_n21701_ ) -new_n21708_ = NOR ( new_n21692_, new_n14312_ ) -new_n21709_ = OR ( new_n16545_, new_n14314_ ) -new_n21710_ = OR ( new_n14311_, new_n3696_ ) -new_n21711_ = OR ( new_n21710_, new_n5609_ ) -new_n21712_ = OR ( new_n19008_, new_n7339_ ) -new_n21713_ = NAND ( new_n14311_, NET_460 ) -new_n21714_ = NAND ( new_n21713_, new_n21712_, new_n21711_, new_n21709_ ) -NET_23504 = OR ( new_n21714_, new_n21708_ ) -new_n21716_ = OR ( new_n21692_, new_n20011_ ) -new_n21717_ = OR ( new_n20016_, new_n16545_ ) -new_n21718_ = NAND ( new_n20020_, new_n21674_ ) -new_n21719_ = OR ( new_n20026_, new_n16538_ ) -new_n21720_ = OR ( new_n20028_, new_n16548_ ) -new_n21721_ = OR ( new_n20009_, new_n21681_ ) -new_n21722_ = AND ( new_n21721_, new_n21720_, new_n21719_, new_n20031_ ) -NET_23505 = NAND ( new_n21722_, new_n21718_, new_n21717_, new_n21716_ ) -new_n21724_ = NOT ( new_n16611_ ) -new_n21725_ = NAND ( new_n21572_, new_n21575_ ) -new_n21726_ = OR ( new_n21725_, new_n21724_ ) -new_n21727_ = NAND ( new_n21725_, new_n21724_ ) -new_n21728_ = AND ( new_n21727_, new_n21726_, new_n6636_ ) -new_n21729_ = OR ( new_n16611_, new_n14323_ ) -new_n21730_ = OR ( new_n16599_, new_n14329_ ) -new_n21731_ = NOT ( NET_973 ) -new_n21732_ = OR ( new_n14332_, new_n21731_ ) -new_n21733_ = NAND ( new_n14334_, NET_782 ) -new_n21734_ = NAND ( new_n21733_, new_n21732_, new_n21730_, new_n21729_ ) -new_n21735_ = NOR ( new_n21734_, new_n21728_ ) -new_n21736_ = XOR ( new_n21735_, new_n14328_ ) -new_n21737_ = NAND ( new_n21589_, new_n21588_, new_n21585_ ) -new_n21738_ = NAND ( new_n21737_, new_n14328_ ) -new_n21739_ = NOT ( new_n21585_ ) -new_n21740_ = NAND ( new_n21590_, new_n21739_ ) -new_n21741_ = NAND ( new_n21740_, new_n21738_ ) -new_n21742_ = XOR ( new_n21741_, new_n21736_ ) -new_n21743_ = NOR ( new_n21742_, new_n14586_ ) -new_n21744_ = NOR ( new_n16611_, new_n14589_ ) -new_n21745_ = OR ( new_n16599_, new_n14592_ ) -new_n21746_ = OR ( new_n16590_, new_n14594_ ) -new_n21747_ = OR ( new_n14583_, new_n16564_ ) -new_n21748_ = OR ( new_n14597_, new_n21731_ ) -new_n21749_ = NAND ( new_n21748_, new_n21747_, new_n21746_, new_n21745_ ) -NET_23506 = OR ( new_n21749_, new_n21744_, new_n21743_ ) -new_n21751_ = NOR ( new_n21742_, new_n14603_ ) -new_n21752_ = OR ( new_n16611_, new_n14605_ ) -new_n21753_ = OR ( new_n16599_, new_n14607_ ) -new_n21754_ = OR ( new_n14609_, new_n21731_ ) -new_n21755_ = OR ( new_n14602_, new_n16602_ ) -new_n21756_ = NAND ( new_n21755_, new_n21754_, new_n21753_, new_n21752_ ) -NET_23507 = OR ( new_n21756_, new_n21751_ ) -new_n21758_ = NOR ( new_n21742_, new_n14620_ ) -new_n21759_ = OR ( new_n16599_, new_n14622_ ) -new_n21760_ = NOR ( new_n14619_, new_n4441_ ) -new_n21761_ = NAND ( new_n21760_, new_n5965_ ) -new_n21762_ = NOT ( new_n19412_ ) -new_n21763_ = OR ( new_n21762_, new_n8804_ ) -new_n21764_ = NAND ( new_n14619_, NET_909 ) -new_n21765_ = NAND ( new_n21764_, new_n21763_, new_n21761_, new_n21759_ ) -NET_23508 = OR ( new_n21765_, new_n21758_ ) -new_n21767_ = OR ( new_n21742_, new_n20060_ ) -new_n21768_ = OR ( new_n20065_, new_n16599_ ) -new_n21769_ = NAND ( new_n20069_, new_n21724_ ) -new_n21770_ = OR ( new_n20075_, new_n16592_ ) -new_n21771_ = OR ( new_n20077_, new_n16602_ ) -new_n21772_ = OR ( new_n20058_, new_n21731_ ) -new_n21773_ = AND ( new_n21772_, new_n21771_, new_n21770_, new_n20080_ ) -NET_23509 = NAND ( new_n21773_, new_n21769_, new_n21768_, new_n21767_ ) -new_n21775_ = NOT ( new_n16665_ ) -new_n21776_ = NAND ( new_n21626_, new_n21629_ ) -new_n21777_ = OR ( new_n21776_, new_n21775_ ) -new_n21778_ = NAND ( new_n21776_, new_n21775_ ) -new_n21779_ = AND ( new_n21778_, new_n21777_, new_n6681_ ) -new_n21780_ = OR ( new_n16665_, new_n14631_ ) -new_n21781_ = OR ( new_n16653_, new_n14637_ ) -new_n21782_ = NOT ( NET_1422 ) -new_n21783_ = OR ( new_n14640_, new_n21782_ ) -new_n21784_ = NAND ( new_n14642_, NET_1231 ) -new_n21785_ = NAND ( new_n21784_, new_n21783_, new_n21781_, new_n21780_ ) -new_n21786_ = NOR ( new_n21785_, new_n21779_ ) -new_n21787_ = XOR ( new_n21786_, new_n14636_ ) -new_n21788_ = NAND ( new_n21643_, new_n21642_, new_n21639_ ) -new_n21789_ = NAND ( new_n21788_, new_n14636_ ) -new_n21790_ = NOT ( new_n21639_ ) -new_n21791_ = NAND ( new_n21644_, new_n21790_ ) -new_n21792_ = NAND ( new_n21791_, new_n21789_ ) -new_n21793_ = XOR ( new_n21792_, new_n21787_ ) -new_n21794_ = NOR ( new_n21793_, new_n14894_ ) -new_n21795_ = NOR ( new_n16665_, new_n14897_ ) -new_n21796_ = OR ( new_n16653_, new_n14900_ ) -new_n21797_ = OR ( new_n16644_, new_n14902_ ) -new_n21798_ = OR ( new_n14891_, new_n16618_ ) -new_n21799_ = OR ( new_n14905_, new_n21782_ ) -new_n21800_ = NAND ( new_n21799_, new_n21798_, new_n21797_, new_n21796_ ) -NET_23510 = OR ( new_n21800_, new_n21795_, new_n21794_ ) -new_n21802_ = NOR ( new_n21793_, new_n14911_ ) -new_n21803_ = OR ( new_n16665_, new_n14913_ ) -new_n21804_ = OR ( new_n16653_, new_n14915_ ) -new_n21805_ = OR ( new_n14917_, new_n21782_ ) -new_n21806_ = OR ( new_n14910_, new_n16656_ ) -new_n21807_ = NAND ( new_n21806_, new_n21805_, new_n21804_, new_n21803_ ) -NET_23511 = OR ( new_n21807_, new_n21802_ ) -new_n21809_ = NOR ( new_n21793_, new_n14928_ ) -new_n21810_ = OR ( new_n16653_, new_n14930_ ) -new_n21811_ = NOR ( new_n14927_, new_n5185_ ) -new_n21812_ = NAND ( new_n21811_, new_n6350_ ) -new_n21813_ = NOT ( new_n19816_ ) -new_n21814_ = OR ( new_n21813_, new_n10275_ ) -new_n21815_ = NAND ( new_n14927_, NET_1358 ) -new_n21816_ = NAND ( new_n21815_, new_n21814_, new_n21812_, new_n21810_ ) -NET_23512 = OR ( new_n21816_, new_n21809_ ) -new_n21818_ = OR ( new_n21793_, new_n20109_ ) -new_n21819_ = OR ( new_n20114_, new_n16653_ ) -new_n21820_ = NAND ( new_n20118_, new_n21775_ ) -new_n21821_ = OR ( new_n20124_, new_n16646_ ) -new_n21822_ = OR ( new_n20126_, new_n16656_ ) -new_n21823_ = OR ( new_n20107_, new_n21782_ ) -new_n21824_ = AND ( new_n21823_, new_n21822_, new_n21821_, new_n20129_ ) -NET_23513 = NAND ( new_n21824_, new_n21820_, new_n21819_, new_n21818_ ) -new_n21826_ = OR ( new_n21677_, new_n16828_ ) -new_n21827_ = NAND ( new_n21677_, new_n16828_ ) -new_n21828_ = AND ( new_n21827_, new_n21826_, new_n6591_ ) -new_n21829_ = OR ( new_n16828_, new_n14015_ ) -new_n21830_ = OR ( new_n16814_, new_n14021_ ) -new_n21831_ = NOT ( NET_525 ) -new_n21832_ = OR ( new_n14024_, new_n21831_ ) -new_n21833_ = NAND ( new_n14026_, NET_334 ) -new_n21834_ = NAND ( new_n21833_, new_n21832_, new_n21830_, new_n21829_ ) -new_n21835_ = NOR ( new_n21834_, new_n21828_ ) -new_n21836_ = XOR ( new_n21835_, new_n14020_ ) -new_n21837_ = NAND ( new_n21690_, new_n21688_, new_n21685_ ) -new_n21838_ = NAND ( new_n21837_, new_n14020_ ) -new_n21839_ = NOT ( new_n21685_ ) -new_n21840_ = NAND ( new_n21691_, new_n21839_ ) -new_n21841_ = NAND ( new_n21840_, new_n21838_ ) -new_n21842_ = XOR ( new_n21841_, new_n21836_ ) -new_n21843_ = NOR ( new_n21842_, new_n14278_ ) -new_n21844_ = NOR ( new_n16828_, new_n14281_ ) -new_n21845_ = OR ( new_n16814_, new_n14284_ ) -new_n21846_ = OR ( new_n16803_, new_n14286_ ) -new_n21847_ = OR ( new_n14275_, new_n16776_ ) -new_n21848_ = OR ( new_n14289_, new_n21831_ ) -new_n21849_ = NAND ( new_n21848_, new_n21847_, new_n21846_, new_n21845_ ) -NET_23556 = OR ( new_n21849_, new_n21844_, new_n21843_ ) -new_n21851_ = NOR ( new_n21842_, new_n14295_ ) -new_n21852_ = OR ( new_n16828_, new_n14297_ ) -new_n21853_ = OR ( new_n16814_, new_n14299_ ) -new_n21854_ = OR ( new_n14301_, new_n21831_ ) -new_n21855_ = OR ( new_n14294_, new_n16817_ ) -new_n21856_ = NAND ( new_n21855_, new_n21854_, new_n21853_, new_n21852_ ) -NET_23557 = OR ( new_n21856_, new_n21851_ ) -new_n21858_ = NOR ( new_n21842_, new_n14312_ ) -new_n21859_ = OR ( new_n16814_, new_n14314_ ) -new_n21860_ = OR ( new_n21710_, new_n5604_ ) -new_n21861_ = OR ( new_n19008_, new_n7322_ ) -new_n21862_ = NAND ( new_n14311_, NET_461 ) -new_n21863_ = NAND ( new_n21862_, new_n21861_, new_n21860_, new_n21859_ ) -NET_23558 = OR ( new_n21863_, new_n21858_ ) -new_n21865_ = OR ( new_n21842_, new_n20011_ ) -new_n21866_ = OR ( new_n20016_, new_n16814_ ) -new_n21867_ = OR ( new_n20021_, new_n16828_ ) -new_n21868_ = OR ( new_n20026_, new_n16805_ ) -new_n21869_ = OR ( new_n20028_, new_n16817_ ) -new_n21870_ = OR ( new_n20009_, new_n21831_ ) -new_n21871_ = AND ( new_n21870_, new_n21869_, new_n21868_, new_n20031_ ) -NET_23559 = NAND ( new_n21871_, new_n21867_, new_n21866_, new_n21865_ ) -new_n21873_ = OR ( new_n21727_, new_n16991_ ) -new_n21874_ = NAND ( new_n21727_, new_n16991_ ) -new_n21875_ = AND ( new_n21874_, new_n21873_, new_n6636_ ) -new_n21876_ = OR ( new_n16991_, new_n14323_ ) -new_n21877_ = OR ( new_n16977_, new_n14329_ ) -new_n21878_ = NOT ( NET_974 ) -new_n21879_ = OR ( new_n14332_, new_n21878_ ) -new_n21880_ = NAND ( new_n14334_, NET_783 ) -new_n21881_ = NAND ( new_n21880_, new_n21879_, new_n21877_, new_n21876_ ) -new_n21882_ = NOR ( new_n21881_, new_n21875_ ) -new_n21883_ = XOR ( new_n21882_, new_n14328_ ) -new_n21884_ = NAND ( new_n21740_, new_n21738_, new_n21735_ ) -new_n21885_ = NAND ( new_n21884_, new_n14328_ ) -new_n21886_ = NOT ( new_n21735_ ) -new_n21887_ = NAND ( new_n21741_, new_n21886_ ) -new_n21888_ = NAND ( new_n21887_, new_n21885_ ) -new_n21889_ = XOR ( new_n21888_, new_n21883_ ) -new_n21890_ = NOR ( new_n21889_, new_n14586_ ) -new_n21891_ = NOR ( new_n16991_, new_n14589_ ) -new_n21892_ = OR ( new_n16977_, new_n14592_ ) -new_n21893_ = OR ( new_n16966_, new_n14594_ ) -new_n21894_ = OR ( new_n14583_, new_n16939_ ) -new_n21895_ = OR ( new_n14597_, new_n21878_ ) -new_n21896_ = NAND ( new_n21895_, new_n21894_, new_n21893_, new_n21892_ ) -NET_23560 = OR ( new_n21896_, new_n21891_, new_n21890_ ) -new_n21898_ = NOR ( new_n21889_, new_n14603_ ) -new_n21899_ = OR ( new_n16991_, new_n14605_ ) -new_n21900_ = OR ( new_n16977_, new_n14607_ ) -new_n21901_ = OR ( new_n14609_, new_n21878_ ) -new_n21902_ = OR ( new_n14602_, new_n16980_ ) -new_n21903_ = NAND ( new_n21902_, new_n21901_, new_n21900_, new_n21899_ ) -NET_23561 = OR ( new_n21903_, new_n21898_ ) -new_n21905_ = NOR ( new_n21889_, new_n14620_ ) -new_n21906_ = OR ( new_n16977_, new_n14622_ ) -new_n21907_ = NAND ( new_n21760_, new_n5958_ ) -new_n21908_ = OR ( new_n21762_, new_n8782_ ) -new_n21909_ = NAND ( new_n14619_, NET_910 ) -new_n21910_ = NAND ( new_n21909_, new_n21908_, new_n21907_, new_n21906_ ) -NET_23562 = OR ( new_n21910_, new_n21905_ ) -new_n21912_ = OR ( new_n21889_, new_n20060_ ) -new_n21913_ = OR ( new_n20065_, new_n16977_ ) -new_n21914_ = OR ( new_n20070_, new_n16991_ ) -new_n21915_ = OR ( new_n20075_, new_n16968_ ) -new_n21916_ = OR ( new_n20077_, new_n16980_ ) -new_n21917_ = OR ( new_n20058_, new_n21878_ ) -new_n21918_ = AND ( new_n21917_, new_n21916_, new_n21915_, new_n20080_ ) -NET_23563 = NAND ( new_n21918_, new_n21914_, new_n21913_, new_n21912_ ) -new_n21920_ = OR ( new_n21778_, new_n17154_ ) -new_n21921_ = NAND ( new_n21778_, new_n17154_ ) -new_n21922_ = AND ( new_n21921_, new_n21920_, new_n6681_ ) -new_n21923_ = OR ( new_n17154_, new_n14631_ ) -new_n21924_ = OR ( new_n17140_, new_n14637_ ) -new_n21925_ = NOT ( NET_1423 ) -new_n21926_ = OR ( new_n14640_, new_n21925_ ) -new_n21927_ = NAND ( new_n14642_, NET_1232 ) -new_n21928_ = NAND ( new_n21927_, new_n21926_, new_n21924_, new_n21923_ ) -new_n21929_ = NOR ( new_n21928_, new_n21922_ ) -new_n21930_ = XOR ( new_n21929_, new_n14636_ ) -new_n21931_ = NAND ( new_n21791_, new_n21789_, new_n21786_ ) -new_n21932_ = NAND ( new_n21931_, new_n14636_ ) -new_n21933_ = NOT ( new_n21786_ ) -new_n21934_ = NAND ( new_n21792_, new_n21933_ ) -new_n21935_ = NAND ( new_n21934_, new_n21932_ ) -new_n21936_ = XOR ( new_n21935_, new_n21930_ ) -new_n21937_ = NOR ( new_n21936_, new_n14894_ ) -new_n21938_ = NOR ( new_n17154_, new_n14897_ ) -new_n21939_ = OR ( new_n17140_, new_n14900_ ) -new_n21940_ = OR ( new_n17129_, new_n14902_ ) -new_n21941_ = OR ( new_n14891_, new_n17102_ ) -new_n21942_ = OR ( new_n14905_, new_n21925_ ) -new_n21943_ = NAND ( new_n21942_, new_n21941_, new_n21940_, new_n21939_ ) -NET_23564 = OR ( new_n21943_, new_n21938_, new_n21937_ ) -new_n21945_ = NOR ( new_n21936_, new_n14911_ ) -new_n21946_ = OR ( new_n17154_, new_n14913_ ) -new_n21947_ = OR ( new_n17140_, new_n14915_ ) -new_n21948_ = OR ( new_n14917_, new_n21925_ ) -new_n21949_ = OR ( new_n14910_, new_n17143_ ) -new_n21950_ = NAND ( new_n21949_, new_n21948_, new_n21947_, new_n21946_ ) -NET_23565 = OR ( new_n21950_, new_n21945_ ) -new_n21952_ = NOR ( new_n21936_, new_n14928_ ) -new_n21953_ = OR ( new_n17140_, new_n14930_ ) -new_n21954_ = NAND ( new_n21811_, new_n6342_ ) -new_n21955_ = OR ( new_n21813_, new_n10253_ ) -new_n21956_ = NAND ( new_n14927_, NET_1359 ) -new_n21957_ = NAND ( new_n21956_, new_n21955_, new_n21954_, new_n21953_ ) -NET_23566 = OR ( new_n21957_, new_n21952_ ) -new_n21959_ = OR ( new_n21936_, new_n20109_ ) -new_n21960_ = OR ( new_n20114_, new_n17140_ ) -new_n21961_ = OR ( new_n20119_, new_n17154_ ) -new_n21962_ = OR ( new_n20124_, new_n17131_ ) -new_n21963_ = OR ( new_n20126_, new_n17143_ ) -new_n21964_ = OR ( new_n20107_, new_n21925_ ) -new_n21965_ = AND ( new_n21964_, new_n21963_, new_n21962_, new_n20129_ ) -NET_23567 = NAND ( new_n21965_, new_n21961_, new_n21960_, new_n21959_ ) -new_n21967_ = NAND ( new_n21826_, new_n17213_ ) -new_n21968_ = OR ( new_n21826_, new_n17213_ ) -new_n21969_ = NAND ( new_n21968_, new_n21967_, new_n6591_ ) -new_n21970_ = NOT ( new_n21969_ ) -new_n21971_ = OR ( new_n17213_, new_n14015_ ) -new_n21972_ = OR ( new_n17199_, new_n14021_ ) -new_n21973_ = NOT ( NET_526 ) -new_n21974_ = OR ( new_n14024_, new_n21973_ ) -new_n21975_ = NAND ( new_n14026_, NET_335 ) -new_n21976_ = NAND ( new_n21975_, new_n21974_, new_n21972_, new_n21971_ ) -new_n21977_ = NOR ( new_n21976_, new_n21970_ ) -new_n21978_ = XOR ( new_n21977_, new_n14020_ ) -new_n21979_ = NAND ( new_n21840_, new_n21838_, new_n21835_ ) -new_n21980_ = NAND ( new_n21979_, new_n14020_ ) -new_n21981_ = NOT ( new_n21835_ ) -new_n21982_ = NAND ( new_n21841_, new_n21981_ ) -new_n21983_ = NAND ( new_n21982_, new_n21980_ ) -new_n21984_ = XOR ( new_n21983_, new_n21978_ ) -new_n21985_ = NOR ( new_n21984_, new_n14278_ ) -new_n21986_ = NOR ( new_n17213_, new_n14281_ ) -new_n21987_ = OR ( new_n17199_, new_n14284_ ) -new_n21988_ = OR ( new_n17190_, new_n14286_ ) -new_n21989_ = OR ( new_n14275_, new_n17159_ ) -new_n21990_ = OR ( new_n14289_, new_n21973_ ) -new_n21991_ = NAND ( new_n21990_, new_n21989_, new_n21988_, new_n21987_ ) -NET_23601 = OR ( new_n21991_, new_n21986_, new_n21985_ ) -new_n21993_ = NOR ( new_n21984_, new_n14295_ ) -new_n21994_ = OR ( new_n17213_, new_n14297_ ) -new_n21995_ = OR ( new_n17199_, new_n14299_ ) -new_n21996_ = OR ( new_n14301_, new_n21973_ ) -new_n21997_ = OR ( new_n14294_, new_n17202_ ) -new_n21998_ = NAND ( new_n21997_, new_n21996_, new_n21995_, new_n21994_ ) -NET_23602 = OR ( new_n21998_, new_n21993_ ) -new_n22000_ = NOR ( new_n21984_, new_n14312_ ) -new_n22001_ = OR ( new_n17199_, new_n14314_ ) -new_n22002_ = OR ( new_n21710_, new_n5599_ ) -new_n22003_ = OR ( new_n19008_, new_n7306_ ) -new_n22004_ = NAND ( new_n14311_, NET_462 ) -new_n22005_ = NAND ( new_n22004_, new_n22003_, new_n22002_, new_n22001_ ) -NET_23603 = OR ( new_n22005_, new_n22000_ ) -new_n22007_ = OR ( new_n21984_, new_n20011_ ) -new_n22008_ = OR ( new_n20016_, new_n17199_ ) -new_n22009_ = OR ( new_n20021_, new_n17213_ ) -new_n22010_ = OR ( new_n20026_, new_n17192_ ) -new_n22011_ = OR ( new_n20028_, new_n17202_ ) -new_n22012_ = OR ( new_n20009_, new_n21973_ ) -new_n22013_ = AND ( new_n22012_, new_n22011_, new_n22010_, new_n20031_ ) -NET_23604 = NAND ( new_n22013_, new_n22009_, new_n22008_, new_n22007_ ) -new_n22015_ = NAND ( new_n21873_, new_n17272_ ) -new_n22016_ = OR ( new_n21873_, new_n17272_ ) -new_n22017_ = NAND ( new_n22016_, new_n22015_, new_n6636_ ) -new_n22018_ = NOT ( new_n22017_ ) -new_n22019_ = OR ( new_n17272_, new_n14323_ ) -new_n22020_ = OR ( new_n17258_, new_n14329_ ) -new_n22021_ = NOT ( NET_975 ) -new_n22022_ = OR ( new_n14332_, new_n22021_ ) -new_n22023_ = NAND ( new_n14334_, NET_784 ) -new_n22024_ = NAND ( new_n22023_, new_n22022_, new_n22020_, new_n22019_ ) -new_n22025_ = NOR ( new_n22024_, new_n22018_ ) -new_n22026_ = XOR ( new_n22025_, new_n14328_ ) -new_n22027_ = NAND ( new_n21887_, new_n21885_, new_n21882_ ) -new_n22028_ = NAND ( new_n22027_, new_n14328_ ) -new_n22029_ = NOT ( new_n21882_ ) -new_n22030_ = NAND ( new_n21888_, new_n22029_ ) -new_n22031_ = NAND ( new_n22030_, new_n22028_ ) -new_n22032_ = XOR ( new_n22031_, new_n22026_ ) -new_n22033_ = NOR ( new_n22032_, new_n14586_ ) -new_n22034_ = NOR ( new_n17272_, new_n14589_ ) -new_n22035_ = OR ( new_n17258_, new_n14592_ ) -new_n22036_ = OR ( new_n17249_, new_n14594_ ) -new_n22037_ = OR ( new_n14583_, new_n17218_ ) -new_n22038_ = OR ( new_n14597_, new_n22021_ ) -new_n22039_ = NAND ( new_n22038_, new_n22037_, new_n22036_, new_n22035_ ) -NET_23605 = OR ( new_n22039_, new_n22034_, new_n22033_ ) -new_n22041_ = NOR ( new_n22032_, new_n14603_ ) -new_n22042_ = OR ( new_n17272_, new_n14605_ ) -new_n22043_ = OR ( new_n17258_, new_n14607_ ) -new_n22044_ = OR ( new_n14609_, new_n22021_ ) -new_n22045_ = OR ( new_n14602_, new_n17261_ ) -new_n22046_ = NAND ( new_n22045_, new_n22044_, new_n22043_, new_n22042_ ) -NET_23606 = OR ( new_n22046_, new_n22041_ ) -new_n22048_ = NOR ( new_n22032_, new_n14620_ ) -new_n22049_ = OR ( new_n17258_, new_n14622_ ) -new_n22050_ = NAND ( new_n21760_, new_n5951_ ) -new_n22051_ = OR ( new_n21762_, new_n8761_ ) -new_n22052_ = NAND ( new_n14619_, NET_911 ) -new_n22053_ = NAND ( new_n22052_, new_n22051_, new_n22050_, new_n22049_ ) -NET_23607 = OR ( new_n22053_, new_n22048_ ) -new_n22055_ = OR ( new_n22032_, new_n20060_ ) -new_n22056_ = OR ( new_n20065_, new_n17258_ ) -new_n22057_ = OR ( new_n20070_, new_n17272_ ) -new_n22058_ = OR ( new_n20075_, new_n17251_ ) -new_n22059_ = OR ( new_n20077_, new_n17261_ ) -new_n22060_ = OR ( new_n20058_, new_n22021_ ) -new_n22061_ = AND ( new_n22060_, new_n22059_, new_n22058_, new_n20080_ ) -NET_23608 = NAND ( new_n22061_, new_n22057_, new_n22056_, new_n22055_ ) -new_n22063_ = NAND ( new_n21920_, new_n17331_ ) -new_n22064_ = OR ( new_n21920_, new_n17331_ ) -new_n22065_ = NAND ( new_n22064_, new_n22063_, new_n6681_ ) -new_n22066_ = NOT ( new_n22065_ ) -new_n22067_ = OR ( new_n17331_, new_n14631_ ) -new_n22068_ = OR ( new_n17317_, new_n14637_ ) -new_n22069_ = NOT ( NET_1424 ) -new_n22070_ = OR ( new_n14640_, new_n22069_ ) -new_n22071_ = NAND ( new_n14642_, NET_1233 ) -new_n22072_ = NAND ( new_n22071_, new_n22070_, new_n22068_, new_n22067_ ) -new_n22073_ = NOR ( new_n22072_, new_n22066_ ) -new_n22074_ = XOR ( new_n22073_, new_n14636_ ) -new_n22075_ = NAND ( new_n21934_, new_n21932_, new_n21929_ ) -new_n22076_ = NAND ( new_n22075_, new_n14636_ ) -new_n22077_ = NOT ( new_n21929_ ) -new_n22078_ = NAND ( new_n21935_, new_n22077_ ) -new_n22079_ = NAND ( new_n22078_, new_n22076_ ) -new_n22080_ = XOR ( new_n22079_, new_n22074_ ) -new_n22081_ = NOR ( new_n22080_, new_n14894_ ) -new_n22082_ = NOR ( new_n17331_, new_n14897_ ) -new_n22083_ = OR ( new_n17317_, new_n14900_ ) -new_n22084_ = OR ( new_n17308_, new_n14902_ ) -new_n22085_ = OR ( new_n14891_, new_n17277_ ) -new_n22086_ = OR ( new_n14905_, new_n22069_ ) -new_n22087_ = NAND ( new_n22086_, new_n22085_, new_n22084_, new_n22083_ ) -NET_23609 = OR ( new_n22087_, new_n22082_, new_n22081_ ) -new_n22089_ = NOR ( new_n22080_, new_n14911_ ) -new_n22090_ = OR ( new_n17331_, new_n14913_ ) -new_n22091_ = OR ( new_n17317_, new_n14915_ ) -new_n22092_ = OR ( new_n14917_, new_n22069_ ) -new_n22093_ = OR ( new_n14910_, new_n17320_ ) -new_n22094_ = NAND ( new_n22093_, new_n22092_, new_n22091_, new_n22090_ ) -NET_23610 = OR ( new_n22094_, new_n22089_ ) -new_n22096_ = NOR ( new_n22080_, new_n14928_ ) -new_n22097_ = OR ( new_n17317_, new_n14930_ ) -new_n22098_ = NAND ( new_n21811_, new_n6334_ ) -new_n22099_ = OR ( new_n21813_, new_n10232_ ) -new_n22100_ = NAND ( new_n14927_, NET_1360 ) -new_n22101_ = NAND ( new_n22100_, new_n22099_, new_n22098_, new_n22097_ ) -NET_23611 = OR ( new_n22101_, new_n22096_ ) -new_n22103_ = OR ( new_n22080_, new_n20109_ ) -new_n22104_ = OR ( new_n20114_, new_n17317_ ) -new_n22105_ = OR ( new_n20119_, new_n17331_ ) -new_n22106_ = OR ( new_n20124_, new_n17310_ ) -new_n22107_ = OR ( new_n20126_, new_n17320_ ) -new_n22108_ = OR ( new_n20107_, new_n22069_ ) -new_n22109_ = AND ( new_n22108_, new_n22107_, new_n22106_, new_n20129_ ) -NET_23612 = NAND ( new_n22109_, new_n22105_, new_n22104_, new_n22103_ ) -new_n22111_ = OR ( new_n21677_, new_n17213_, new_n16828_ ) -new_n22112_ = OR ( new_n22111_, new_n17501_ ) -new_n22113_ = NAND ( new_n22111_, new_n17501_ ) -new_n22114_ = NAND ( new_n22113_, new_n22112_, new_n6591_ ) -new_n22115_ = NOT ( new_n22114_ ) -new_n22116_ = OR ( new_n17501_, new_n14015_ ) -new_n22117_ = OR ( new_n17487_, new_n14021_ ) -new_n22118_ = NOT ( NET_527 ) -new_n22119_ = OR ( new_n14024_, new_n22118_ ) -new_n22120_ = NAND ( new_n14026_, NET_336 ) -new_n22121_ = NAND ( new_n22120_, new_n22119_, new_n22117_, new_n22116_ ) -new_n22122_ = NOR ( new_n22121_, new_n22115_ ) -new_n22123_ = XOR ( new_n22122_, new_n14020_ ) -new_n22124_ = NAND ( new_n21982_, new_n21980_, new_n21977_ ) -new_n22125_ = NAND ( new_n22124_, new_n14020_ ) -new_n22126_ = NOT ( new_n21977_ ) -new_n22127_ = NAND ( new_n21983_, new_n22126_ ) -new_n22128_ = NAND ( new_n22127_, new_n22125_ ) -new_n22129_ = XOR ( new_n22128_, new_n22123_ ) -new_n22130_ = NOR ( new_n22129_, new_n14278_ ) -new_n22131_ = NOR ( new_n17501_, new_n14281_ ) -new_n22132_ = OR ( new_n17487_, new_n14284_ ) -new_n22133_ = OR ( new_n17472_, new_n14286_ ) -new_n22134_ = OR ( new_n14275_, new_n17443_ ) -new_n22135_ = OR ( new_n14289_, new_n22118_ ) -new_n22136_ = NAND ( new_n22135_, new_n22134_, new_n22133_, new_n22132_ ) -NET_23646 = OR ( new_n22136_, new_n22131_, new_n22130_ ) -new_n22138_ = NOR ( new_n22129_, new_n14295_ ) -new_n22139_ = OR ( new_n17501_, new_n14297_ ) -new_n22140_ = OR ( new_n17487_, new_n14299_ ) -new_n22141_ = OR ( new_n14301_, new_n22118_ ) -new_n22142_ = OR ( new_n14294_, new_n17490_ ) -new_n22143_ = NAND ( new_n22142_, new_n22141_, new_n22140_, new_n22139_ ) -NET_23647 = OR ( new_n22143_, new_n22138_ ) -new_n22145_ = NOR ( new_n22129_, new_n14312_ ) -new_n22146_ = OR ( new_n17487_, new_n14314_ ) -new_n22147_ = OR ( new_n21710_, new_n5594_ ) -new_n22148_ = OR ( new_n19008_, new_n7290_ ) -new_n22149_ = NAND ( new_n14311_, NET_463 ) -new_n22150_ = NAND ( new_n22149_, new_n22148_, new_n22147_, new_n22146_ ) -NET_23648 = OR ( new_n22150_, new_n22145_ ) -new_n22152_ = OR ( new_n22129_, new_n20011_ ) -new_n22153_ = OR ( new_n20021_, new_n17501_ ) -new_n22154_ = OR ( new_n20016_, new_n17487_ ) -new_n22155_ = OR ( new_n20026_, new_n17475_ ) -new_n22156_ = OR ( new_n20028_, new_n17490_ ) -new_n22157_ = OR ( new_n20009_, new_n22118_ ) -new_n22158_ = AND ( new_n22157_, new_n22156_, new_n22155_, new_n20031_ ) -NET_23649 = NAND ( new_n22158_, new_n22154_, new_n22153_, new_n22152_ ) -new_n22160_ = OR ( new_n21727_, new_n17272_, new_n16991_ ) -new_n22161_ = OR ( new_n22160_, new_n17671_ ) -new_n22162_ = NAND ( new_n22160_, new_n17671_ ) -new_n22163_ = NAND ( new_n22162_, new_n22161_, new_n6636_ ) -new_n22164_ = NOT ( new_n22163_ ) -new_n22165_ = OR ( new_n17671_, new_n14323_ ) -new_n22166_ = OR ( new_n17657_, new_n14329_ ) -new_n22167_ = NOT ( NET_976 ) -new_n22168_ = OR ( new_n14332_, new_n22167_ ) -new_n22169_ = NAND ( new_n14334_, NET_785 ) -new_n22170_ = NAND ( new_n22169_, new_n22168_, new_n22166_, new_n22165_ ) -new_n22171_ = NOR ( new_n22170_, new_n22164_ ) -new_n22172_ = XOR ( new_n22171_, new_n14328_ ) -new_n22173_ = NAND ( new_n22030_, new_n22028_, new_n22025_ ) -new_n22174_ = NAND ( new_n22173_, new_n14328_ ) -new_n22175_ = NOT ( new_n22025_ ) -new_n22176_ = NAND ( new_n22031_, new_n22175_ ) -new_n22177_ = NAND ( new_n22176_, new_n22174_ ) -new_n22178_ = XOR ( new_n22177_, new_n22172_ ) -new_n22179_ = NOR ( new_n22178_, new_n14586_ ) -new_n22180_ = NOR ( new_n17671_, new_n14589_ ) -new_n22181_ = OR ( new_n17657_, new_n14592_ ) -new_n22182_ = OR ( new_n17642_, new_n14594_ ) -new_n22183_ = OR ( new_n14583_, new_n17613_ ) -new_n22184_ = OR ( new_n14597_, new_n22167_ ) -new_n22185_ = NAND ( new_n22184_, new_n22183_, new_n22182_, new_n22181_ ) -NET_23650 = OR ( new_n22185_, new_n22180_, new_n22179_ ) -new_n22187_ = NOR ( new_n22178_, new_n14603_ ) -new_n22188_ = OR ( new_n17671_, new_n14605_ ) -new_n22189_ = OR ( new_n17657_, new_n14607_ ) -new_n22190_ = OR ( new_n14609_, new_n22167_ ) -new_n22191_ = OR ( new_n14602_, new_n17660_ ) -new_n22192_ = NAND ( new_n22191_, new_n22190_, new_n22189_, new_n22188_ ) -NET_23651 = OR ( new_n22192_, new_n22187_ ) -new_n22194_ = NOR ( new_n22178_, new_n14620_ ) -new_n22195_ = OR ( new_n17657_, new_n14622_ ) -new_n22196_ = NAND ( new_n21760_, new_n5944_ ) -new_n22197_ = OR ( new_n21762_, new_n8740_ ) -new_n22198_ = NAND ( new_n14619_, NET_912 ) -new_n22199_ = NAND ( new_n22198_, new_n22197_, new_n22196_, new_n22195_ ) -NET_23652 = OR ( new_n22199_, new_n22194_ ) -new_n22201_ = OR ( new_n22178_, new_n20060_ ) -new_n22202_ = OR ( new_n20070_, new_n17671_ ) -new_n22203_ = OR ( new_n20065_, new_n17657_ ) -new_n22204_ = OR ( new_n20075_, new_n17645_ ) -new_n22205_ = OR ( new_n20077_, new_n17660_ ) -new_n22206_ = OR ( new_n20058_, new_n22167_ ) -new_n22207_ = AND ( new_n22206_, new_n22205_, new_n22204_, new_n20080_ ) -NET_23653 = NAND ( new_n22207_, new_n22203_, new_n22202_, new_n22201_ ) -new_n22209_ = OR ( new_n21778_, new_n17331_, new_n17154_ ) -new_n22210_ = OR ( new_n22209_, new_n17841_ ) -new_n22211_ = NAND ( new_n22209_, new_n17841_ ) -new_n22212_ = NAND ( new_n22211_, new_n22210_, new_n6681_ ) -new_n22213_ = NOT ( new_n22212_ ) -new_n22214_ = OR ( new_n17841_, new_n14631_ ) -new_n22215_ = OR ( new_n17827_, new_n14637_ ) -new_n22216_ = NOT ( NET_1425 ) -new_n22217_ = OR ( new_n14640_, new_n22216_ ) -new_n22218_ = NAND ( new_n14642_, NET_1234 ) -new_n22219_ = NAND ( new_n22218_, new_n22217_, new_n22215_, new_n22214_ ) -new_n22220_ = NOR ( new_n22219_, new_n22213_ ) -new_n22221_ = XOR ( new_n22220_, new_n14636_ ) -new_n22222_ = NAND ( new_n22078_, new_n22076_, new_n22073_ ) -new_n22223_ = NAND ( new_n22222_, new_n14636_ ) -new_n22224_ = NOT ( new_n22073_ ) -new_n22225_ = NAND ( new_n22079_, new_n22224_ ) -new_n22226_ = NAND ( new_n22225_, new_n22223_ ) -new_n22227_ = XOR ( new_n22226_, new_n22221_ ) -new_n22228_ = NOR ( new_n22227_, new_n14894_ ) -new_n22229_ = NOR ( new_n17841_, new_n14897_ ) -new_n22230_ = OR ( new_n17827_, new_n14900_ ) -new_n22231_ = OR ( new_n17812_, new_n14902_ ) -new_n22232_ = OR ( new_n14891_, new_n17783_ ) -new_n22233_ = OR ( new_n14905_, new_n22216_ ) -new_n22234_ = NAND ( new_n22233_, new_n22232_, new_n22231_, new_n22230_ ) -NET_23654 = OR ( new_n22234_, new_n22229_, new_n22228_ ) -new_n22236_ = NOR ( new_n22227_, new_n14911_ ) -new_n22237_ = OR ( new_n17841_, new_n14913_ ) -new_n22238_ = OR ( new_n17827_, new_n14915_ ) -new_n22239_ = OR ( new_n14917_, new_n22216_ ) -new_n22240_ = OR ( new_n14910_, new_n17830_ ) -new_n22241_ = NAND ( new_n22240_, new_n22239_, new_n22238_, new_n22237_ ) -NET_23655 = OR ( new_n22241_, new_n22236_ ) -new_n22243_ = NOR ( new_n22227_, new_n14928_ ) -new_n22244_ = OR ( new_n17827_, new_n14930_ ) -new_n22245_ = NAND ( new_n21811_, new_n6326_ ) -new_n22246_ = OR ( new_n21813_, new_n10211_ ) -new_n22247_ = NAND ( new_n14927_, NET_1361 ) -new_n22248_ = NAND ( new_n22247_, new_n22246_, new_n22245_, new_n22244_ ) -NET_23656 = OR ( new_n22248_, new_n22243_ ) -new_n22250_ = OR ( new_n22227_, new_n20109_ ) -new_n22251_ = OR ( new_n20119_, new_n17841_ ) -new_n22252_ = OR ( new_n20114_, new_n17827_ ) -new_n22253_ = OR ( new_n20124_, new_n17815_ ) -new_n22254_ = OR ( new_n20126_, new_n17830_ ) -new_n22255_ = OR ( new_n20107_, new_n22216_ ) -new_n22256_ = AND ( new_n22255_, new_n22254_, new_n22253_, new_n20129_ ) -NET_23657 = NAND ( new_n22256_, new_n22252_, new_n22251_, new_n22250_ ) -new_n22258_ = NAND ( new_n22112_, new_n18003_ ) -new_n22259_ = OR ( new_n22112_, new_n18003_ ) -new_n22260_ = NAND ( new_n22259_, new_n22258_, new_n6591_ ) -new_n22261_ = NOT ( new_n22260_ ) -new_n22262_ = OR ( new_n18003_, new_n14015_ ) -new_n22263_ = OR ( new_n17989_, new_n14021_ ) -new_n22264_ = NOT ( NET_528 ) -new_n22265_ = OR ( new_n14024_, new_n22264_ ) -new_n22266_ = NAND ( new_n14026_, NET_337 ) -new_n22267_ = NAND ( new_n22266_, new_n22265_, new_n22263_, new_n22262_ ) -new_n22268_ = NOR ( new_n22267_, new_n22261_ ) -new_n22269_ = XOR ( new_n22268_, new_n14020_ ) -new_n22270_ = NAND ( new_n22127_, new_n22125_, new_n22122_ ) -new_n22271_ = NAND ( new_n22270_, new_n14020_ ) -new_n22272_ = NOT ( new_n22122_ ) -new_n22273_ = NAND ( new_n22128_, new_n22272_ ) -new_n22274_ = NAND ( new_n22273_, new_n22271_ ) -new_n22275_ = XOR ( new_n22274_, new_n22269_ ) -new_n22276_ = NOR ( new_n22275_, new_n14278_ ) -new_n22277_ = NOR ( new_n18003_, new_n14281_ ) -new_n22278_ = OR ( new_n17989_, new_n14284_ ) -new_n22279_ = OR ( new_n17977_, new_n14286_ ) -new_n22280_ = OR ( new_n14275_, new_n17948_ ) -new_n22281_ = OR ( new_n14289_, new_n22264_ ) -new_n22282_ = NAND ( new_n22281_, new_n22280_, new_n22279_, new_n22278_ ) -NET_23691 = OR ( new_n22282_, new_n22277_, new_n22276_ ) -new_n22284_ = NOR ( new_n22275_, new_n14295_ ) -new_n22285_ = OR ( new_n18003_, new_n14297_ ) -new_n22286_ = OR ( new_n17989_, new_n14299_ ) -new_n22287_ = OR ( new_n14301_, new_n22264_ ) -new_n22288_ = OR ( new_n14294_, new_n17992_ ) -new_n22289_ = NAND ( new_n22288_, new_n22287_, new_n22286_, new_n22285_ ) -NET_23692 = OR ( new_n22289_, new_n22284_ ) -new_n22291_ = NOR ( new_n22275_, new_n14312_ ) -new_n22292_ = OR ( new_n17989_, new_n14314_ ) -new_n22293_ = OR ( new_n21710_, new_n5589_ ) -new_n22294_ = OR ( new_n19008_, new_n7274_ ) -new_n22295_ = NAND ( new_n14311_, NET_464 ) -new_n22296_ = NAND ( new_n22295_, new_n22294_, new_n22293_, new_n22292_ ) -NET_23693 = OR ( new_n22296_, new_n22291_ ) -new_n22298_ = OR ( new_n22275_, new_n20011_ ) -new_n22299_ = OR ( new_n20021_, new_n18003_ ) -new_n22300_ = OR ( new_n20016_, new_n17989_ ) -new_n22301_ = OR ( new_n20026_, new_n17980_ ) -new_n22302_ = OR ( new_n20009_, new_n22264_ ) -new_n22303_ = OR ( new_n20028_, new_n17992_ ) -new_n22304_ = AND ( new_n22303_, new_n22302_, new_n22301_ ) -NET_23694 = NAND ( new_n22304_, new_n22300_, new_n22299_, new_n22298_ ) -new_n22306_ = NAND ( new_n22161_, new_n18165_ ) -new_n22307_ = OR ( new_n22161_, new_n18165_ ) -new_n22308_ = NAND ( new_n22307_, new_n22306_, new_n6636_ ) -new_n22309_ = NOT ( new_n22308_ ) -new_n22310_ = OR ( new_n18165_, new_n14323_ ) -new_n22311_ = OR ( new_n18151_, new_n14329_ ) -new_n22312_ = NOT ( NET_977 ) -new_n22313_ = OR ( new_n14332_, new_n22312_ ) -new_n22314_ = NAND ( new_n14334_, NET_786 ) -new_n22315_ = NAND ( new_n22314_, new_n22313_, new_n22311_, new_n22310_ ) -new_n22316_ = NOR ( new_n22315_, new_n22309_ ) -new_n22317_ = XOR ( new_n22316_, new_n14328_ ) -new_n22318_ = NAND ( new_n22176_, new_n22174_, new_n22171_ ) -new_n22319_ = NAND ( new_n22318_, new_n14328_ ) -new_n22320_ = NOT ( new_n22171_ ) -new_n22321_ = NAND ( new_n22177_, new_n22320_ ) -new_n22322_ = NAND ( new_n22321_, new_n22319_ ) -new_n22323_ = XOR ( new_n22322_, new_n22317_ ) -new_n22324_ = NOR ( new_n22323_, new_n14586_ ) -new_n22325_ = NOR ( new_n18165_, new_n14589_ ) -new_n22326_ = OR ( new_n18151_, new_n14592_ ) -new_n22327_ = OR ( new_n18139_, new_n14594_ ) -new_n22328_ = OR ( new_n14583_, new_n18110_ ) -new_n22329_ = OR ( new_n14597_, new_n22312_ ) -new_n22330_ = NAND ( new_n22329_, new_n22328_, new_n22327_, new_n22326_ ) -NET_23695 = OR ( new_n22330_, new_n22325_, new_n22324_ ) -new_n22332_ = NOR ( new_n22323_, new_n14603_ ) -new_n22333_ = OR ( new_n18165_, new_n14605_ ) -new_n22334_ = OR ( new_n18151_, new_n14607_ ) -new_n22335_ = OR ( new_n14609_, new_n22312_ ) -new_n22336_ = OR ( new_n14602_, new_n18154_ ) -new_n22337_ = NAND ( new_n22336_, new_n22335_, new_n22334_, new_n22333_ ) -NET_23696 = OR ( new_n22337_, new_n22332_ ) -new_n22339_ = NOR ( new_n22323_, new_n14620_ ) -new_n22340_ = OR ( new_n18151_, new_n14622_ ) -new_n22341_ = NAND ( new_n21760_, new_n5937_ ) -new_n22342_ = OR ( new_n21762_, new_n8719_ ) -new_n22343_ = NAND ( new_n14619_, NET_913 ) -new_n22344_ = NAND ( new_n22343_, new_n22342_, new_n22341_, new_n22340_ ) -NET_23697 = OR ( new_n22344_, new_n22339_ ) -new_n22346_ = OR ( new_n22323_, new_n20060_ ) -new_n22347_ = OR ( new_n20070_, new_n18165_ ) -new_n22348_ = OR ( new_n20065_, new_n18151_ ) -new_n22349_ = OR ( new_n20075_, new_n18142_ ) -new_n22350_ = OR ( new_n20058_, new_n22312_ ) -new_n22351_ = OR ( new_n20077_, new_n18154_ ) -new_n22352_ = AND ( new_n22351_, new_n22350_, new_n22349_ ) -NET_23698 = NAND ( new_n22352_, new_n22348_, new_n22347_, new_n22346_ ) -new_n22354_ = NAND ( new_n22210_, new_n18327_ ) -new_n22355_ = OR ( new_n22210_, new_n18327_ ) -new_n22356_ = NAND ( new_n22355_, new_n22354_, new_n6681_ ) -new_n22357_ = NOT ( new_n22356_ ) -new_n22358_ = OR ( new_n18327_, new_n14631_ ) -new_n22359_ = OR ( new_n18313_, new_n14637_ ) -new_n22360_ = NOT ( NET_1426 ) -new_n22361_ = OR ( new_n14640_, new_n22360_ ) -new_n22362_ = NAND ( new_n14642_, NET_1235 ) -new_n22363_ = NAND ( new_n22362_, new_n22361_, new_n22359_, new_n22358_ ) -new_n22364_ = NOR ( new_n22363_, new_n22357_ ) -new_n22365_ = XOR ( new_n22364_, new_n14636_ ) -new_n22366_ = NAND ( new_n22225_, new_n22223_, new_n22220_ ) -new_n22367_ = NAND ( new_n22366_, new_n14636_ ) -new_n22368_ = NOT ( new_n22220_ ) -new_n22369_ = NAND ( new_n22226_, new_n22368_ ) -new_n22370_ = NAND ( new_n22369_, new_n22367_ ) -new_n22371_ = XOR ( new_n22370_, new_n22365_ ) -new_n22372_ = NOR ( new_n22371_, new_n14894_ ) -new_n22373_ = NOR ( new_n18327_, new_n14897_ ) -new_n22374_ = OR ( new_n18313_, new_n14900_ ) -new_n22375_ = OR ( new_n18301_, new_n14902_ ) -new_n22376_ = OR ( new_n14891_, new_n18272_ ) -new_n22377_ = OR ( new_n14905_, new_n22360_ ) -new_n22378_ = NAND ( new_n22377_, new_n22376_, new_n22375_, new_n22374_ ) -NET_23699 = OR ( new_n22378_, new_n22373_, new_n22372_ ) -new_n22380_ = NOR ( new_n22371_, new_n14911_ ) -new_n22381_ = OR ( new_n18327_, new_n14913_ ) -new_n22382_ = OR ( new_n18313_, new_n14915_ ) -new_n22383_ = OR ( new_n14917_, new_n22360_ ) -new_n22384_ = OR ( new_n14910_, new_n18316_ ) -new_n22385_ = NAND ( new_n22384_, new_n22383_, new_n22382_, new_n22381_ ) -NET_23700 = OR ( new_n22385_, new_n22380_ ) -new_n22387_ = NOR ( new_n22371_, new_n14928_ ) -new_n22388_ = OR ( new_n18313_, new_n14930_ ) -new_n22389_ = NAND ( new_n21811_, new_n6318_ ) -new_n22390_ = OR ( new_n21813_, new_n10190_ ) -new_n22391_ = NAND ( new_n14927_, NET_1362 ) -new_n22392_ = NAND ( new_n22391_, new_n22390_, new_n22389_, new_n22388_ ) -NET_23701 = OR ( new_n22392_, new_n22387_ ) -new_n22394_ = OR ( new_n22371_, new_n20109_ ) -new_n22395_ = OR ( new_n20119_, new_n18327_ ) -new_n22396_ = OR ( new_n20114_, new_n18313_ ) -new_n22397_ = OR ( new_n20124_, new_n18304_ ) -new_n22398_ = OR ( new_n20107_, new_n22360_ ) -new_n22399_ = OR ( new_n20126_, new_n18316_ ) -new_n22400_ = AND ( new_n22399_, new_n22398_, new_n22397_ ) -NET_23702 = NAND ( new_n22400_, new_n22396_, new_n22395_, new_n22394_ ) -new_n22402_ = NAND ( new_n5513_, NET_178, NET_177, new_n3072_ ) -new_n22403_ = NAND ( new_n6767_, new_n3082_ ) -NET_2371 = NAND ( new_n22403_, new_n22402_, new_n5509_, new_n3080_ ) -new_n22405_ = OR ( new_n22259_, new_n18490_ ) -new_n22406_ = NAND ( new_n22259_, new_n18490_ ) -new_n22407_ = NAND ( new_n22406_, new_n22405_, new_n6591_ ) -new_n22408_ = NOT ( new_n22407_ ) -new_n22409_ = OR ( new_n18490_, new_n14015_ ) -new_n22410_ = OR ( new_n18476_, new_n14021_ ) -new_n22411_ = NOT ( NET_529 ) -new_n22412_ = OR ( new_n14024_, new_n22411_ ) -new_n22413_ = NAND ( new_n14026_, NET_338 ) -new_n22414_ = NAND ( new_n22413_, new_n22412_, new_n22410_, new_n22409_ ) -new_n22415_ = NOR ( new_n22414_, new_n22408_ ) -new_n22416_ = XOR ( new_n22415_, new_n14020_ ) -new_n22417_ = NAND ( new_n22273_, new_n22271_, new_n22268_ ) -new_n22418_ = NAND ( new_n22417_, new_n14020_ ) -new_n22419_ = NOT ( new_n22268_ ) -new_n22420_ = NAND ( new_n22274_, new_n22419_ ) -new_n22421_ = NAND ( new_n22420_, new_n22418_ ) -new_n22422_ = XOR ( new_n22421_, new_n22416_ ) -new_n22423_ = NOR ( new_n22422_, new_n14278_ ) -new_n22424_ = NOR ( new_n18490_, new_n14281_ ) -new_n22425_ = OR ( new_n18476_, new_n14284_ ) -new_n22426_ = OR ( new_n18466_, new_n14286_ ) -new_n22427_ = OR ( new_n14275_, new_n18437_ ) -new_n22428_ = OR ( new_n14289_, new_n22411_ ) -new_n22429_ = NAND ( new_n22428_, new_n22427_, new_n22426_, new_n22425_ ) -NET_23736 = OR ( new_n22429_, new_n22424_, new_n22423_ ) -new_n22431_ = NOR ( new_n22422_, new_n14295_ ) -new_n22432_ = OR ( new_n18490_, new_n14297_ ) -new_n22433_ = OR ( new_n18476_, new_n14299_ ) -new_n22434_ = OR ( new_n14301_, new_n22411_ ) -new_n22435_ = OR ( new_n14294_, new_n18479_ ) -new_n22436_ = NAND ( new_n22435_, new_n22434_, new_n22433_, new_n22432_ ) -NET_23737 = OR ( new_n22436_, new_n22431_ ) -new_n22438_ = NOR ( new_n22422_, new_n14312_ ) -new_n22439_ = OR ( new_n18476_, new_n14314_ ) -new_n22440_ = OR ( new_n21710_, new_n5584_ ) -new_n22441_ = OR ( new_n19008_, new_n7257_ ) -new_n22442_ = NAND ( new_n14311_, NET_465 ) -new_n22443_ = NAND ( new_n22442_, new_n22441_, new_n22440_, new_n22439_ ) -NET_23738 = OR ( new_n22443_, new_n22438_ ) -new_n22445_ = OR ( new_n22422_, new_n20011_ ) -new_n22446_ = OR ( new_n20021_, new_n18490_ ) -new_n22447_ = OR ( new_n20016_, new_n18476_ ) -new_n22448_ = OR ( new_n20026_, new_n18469_ ) -new_n22449_ = OR ( new_n20009_, new_n22411_ ) -new_n22450_ = OR ( new_n20028_, new_n18479_ ) -new_n22451_ = AND ( new_n22450_, new_n22449_, new_n22448_ ) -NET_23739 = NAND ( new_n22451_, new_n22447_, new_n22446_, new_n22445_ ) -new_n22453_ = OR ( new_n22307_, new_n18548_ ) -new_n22454_ = NAND ( new_n22307_, new_n18548_ ) -new_n22455_ = NAND ( new_n22454_, new_n22453_, new_n6636_ ) -new_n22456_ = NOT ( new_n22455_ ) -new_n22457_ = OR ( new_n18548_, new_n14323_ ) -new_n22458_ = OR ( new_n18534_, new_n14329_ ) -new_n22459_ = NOT ( NET_978 ) -new_n22460_ = OR ( new_n14332_, new_n22459_ ) -new_n22461_ = NAND ( new_n14334_, NET_787 ) -new_n22462_ = NAND ( new_n22461_, new_n22460_, new_n22458_, new_n22457_ ) -new_n22463_ = NOR ( new_n22462_, new_n22456_ ) -new_n22464_ = XOR ( new_n22463_, new_n14328_ ) -new_n22465_ = NAND ( new_n22321_, new_n22319_, new_n22316_ ) -new_n22466_ = NAND ( new_n22465_, new_n14328_ ) -new_n22467_ = NOT ( new_n22316_ ) -new_n22468_ = NAND ( new_n22322_, new_n22467_ ) -new_n22469_ = NAND ( new_n22468_, new_n22466_ ) -new_n22470_ = XOR ( new_n22469_, new_n22464_ ) -new_n22471_ = NOR ( new_n22470_, new_n14586_ ) -new_n22472_ = NOR ( new_n18548_, new_n14589_ ) -new_n22473_ = OR ( new_n18534_, new_n14592_ ) -new_n22474_ = OR ( new_n18524_, new_n14594_ ) -new_n22475_ = OR ( new_n14583_, new_n18495_ ) -new_n22476_ = OR ( new_n14597_, new_n22459_ ) -new_n22477_ = NAND ( new_n22476_, new_n22475_, new_n22474_, new_n22473_ ) -NET_23740 = OR ( new_n22477_, new_n22472_, new_n22471_ ) -new_n22479_ = NOR ( new_n22470_, new_n14603_ ) -new_n22480_ = OR ( new_n18548_, new_n14605_ ) -new_n22481_ = OR ( new_n18534_, new_n14607_ ) -new_n22482_ = OR ( new_n14609_, new_n22459_ ) -new_n22483_ = OR ( new_n14602_, new_n18537_ ) -new_n22484_ = NAND ( new_n22483_, new_n22482_, new_n22481_, new_n22480_ ) -NET_23741 = OR ( new_n22484_, new_n22479_ ) -new_n22486_ = NOR ( new_n22470_, new_n14620_ ) -new_n22487_ = OR ( new_n18534_, new_n14622_ ) -new_n22488_ = NAND ( new_n21760_, new_n5930_ ) -new_n22489_ = OR ( new_n21762_, new_n8698_ ) -new_n22490_ = NAND ( new_n14619_, NET_914 ) -new_n22491_ = NAND ( new_n22490_, new_n22489_, new_n22488_, new_n22487_ ) -NET_23742 = OR ( new_n22491_, new_n22486_ ) -new_n22493_ = OR ( new_n22470_, new_n20060_ ) -new_n22494_ = OR ( new_n20070_, new_n18548_ ) -new_n22495_ = OR ( new_n20065_, new_n18534_ ) -new_n22496_ = OR ( new_n20075_, new_n18527_ ) -new_n22497_ = OR ( new_n20058_, new_n22459_ ) -new_n22498_ = OR ( new_n20077_, new_n18537_ ) -new_n22499_ = AND ( new_n22498_, new_n22497_, new_n22496_ ) -NET_23743 = NAND ( new_n22499_, new_n22495_, new_n22494_, new_n22493_ ) -new_n22501_ = OR ( new_n22355_, new_n18606_ ) -new_n22502_ = NAND ( new_n22355_, new_n18606_ ) -new_n22503_ = NAND ( new_n22502_, new_n22501_, new_n6681_ ) -new_n22504_ = NOT ( new_n22503_ ) -new_n22505_ = OR ( new_n18606_, new_n14631_ ) -new_n22506_ = OR ( new_n18592_, new_n14637_ ) -new_n22507_ = NOT ( NET_1427 ) -new_n22508_ = OR ( new_n14640_, new_n22507_ ) -new_n22509_ = NAND ( new_n14642_, NET_1236 ) -new_n22510_ = NAND ( new_n22509_, new_n22508_, new_n22506_, new_n22505_ ) -new_n22511_ = NOR ( new_n22510_, new_n22504_ ) -new_n22512_ = XOR ( new_n22511_, new_n14636_ ) -new_n22513_ = NAND ( new_n22369_, new_n22367_, new_n22364_ ) -new_n22514_ = NAND ( new_n22513_, new_n14636_ ) -new_n22515_ = NOT ( new_n22364_ ) -new_n22516_ = NAND ( new_n22370_, new_n22515_ ) -new_n22517_ = NAND ( new_n22516_, new_n22514_ ) -new_n22518_ = XOR ( new_n22517_, new_n22512_ ) -new_n22519_ = NOR ( new_n22518_, new_n14894_ ) -new_n22520_ = NOR ( new_n18606_, new_n14897_ ) -new_n22521_ = OR ( new_n18592_, new_n14900_ ) -new_n22522_ = OR ( new_n18582_, new_n14902_ ) -new_n22523_ = OR ( new_n14891_, new_n18553_ ) -new_n22524_ = OR ( new_n14905_, new_n22507_ ) -new_n22525_ = NAND ( new_n22524_, new_n22523_, new_n22522_, new_n22521_ ) -NET_23744 = OR ( new_n22525_, new_n22520_, new_n22519_ ) -new_n22527_ = NOR ( new_n22518_, new_n14911_ ) -new_n22528_ = OR ( new_n18606_, new_n14913_ ) -new_n22529_ = OR ( new_n18592_, new_n14915_ ) -new_n22530_ = OR ( new_n14917_, new_n22507_ ) -new_n22531_ = OR ( new_n14910_, new_n18595_ ) -new_n22532_ = NAND ( new_n22531_, new_n22530_, new_n22529_, new_n22528_ ) -NET_23745 = OR ( new_n22532_, new_n22527_ ) -new_n22534_ = NOR ( new_n22518_, new_n14928_ ) -new_n22535_ = OR ( new_n18592_, new_n14930_ ) -new_n22536_ = NAND ( new_n21811_, new_n6310_ ) -new_n22537_ = OR ( new_n21813_, new_n10169_ ) -new_n22538_ = NAND ( new_n14927_, NET_1363 ) -new_n22539_ = NAND ( new_n22538_, new_n22537_, new_n22536_, new_n22535_ ) -NET_23746 = OR ( new_n22539_, new_n22534_ ) -new_n22541_ = OR ( new_n22518_, new_n20109_ ) -new_n22542_ = OR ( new_n20119_, new_n18606_ ) -new_n22543_ = OR ( new_n20114_, new_n18592_ ) -new_n22544_ = OR ( new_n20124_, new_n18585_ ) -new_n22545_ = OR ( new_n20107_, new_n22507_ ) -new_n22546_ = OR ( new_n20126_, new_n18595_ ) -new_n22547_ = AND ( new_n22546_, new_n22545_, new_n22544_ ) -NET_23747 = NAND ( new_n22547_, new_n22543_, new_n22542_, new_n22541_ ) -new_n22549_ = OR ( new_n22112_, new_n18490_, new_n18003_ ) -new_n22550_ = OR ( new_n22549_, new_n19880_ ) -new_n22551_ = NAND ( new_n22549_, new_n19880_ ) -new_n22552_ = NAND ( new_n22551_, new_n22550_, new_n6591_ ) -new_n22553_ = NOT ( new_n22552_ ) -new_n22554_ = OR ( new_n19880_, new_n14015_ ) -new_n22555_ = OR ( new_n19866_, new_n14021_ ) -new_n22556_ = NOT ( NET_530 ) -new_n22557_ = OR ( new_n14024_, new_n22556_ ) -new_n22558_ = NAND ( new_n14026_, NET_339 ) -new_n22559_ = NAND ( new_n22558_, new_n22557_, new_n22555_, new_n22554_ ) -new_n22560_ = NOR ( new_n22559_, new_n22553_ ) -new_n22561_ = XOR ( new_n22560_, new_n14020_ ) -new_n22562_ = NAND ( new_n22420_, new_n22418_, new_n22415_ ) -new_n22563_ = NAND ( new_n22562_, new_n14020_ ) -new_n22564_ = NOT ( new_n22415_ ) -new_n22565_ = NAND ( new_n22421_, new_n22564_ ) -new_n22566_ = NAND ( new_n22565_, new_n22563_ ) -new_n22567_ = XOR ( new_n22566_, new_n22561_ ) -new_n22568_ = NOR ( new_n22567_, new_n14278_ ) -new_n22569_ = NOR ( new_n19880_, new_n14281_ ) -new_n22570_ = OR ( new_n19866_, new_n14284_ ) -new_n22571_ = OR ( new_n18914_, new_n14286_ ) -new_n22572_ = OR ( new_n14275_, new_n18911_ ) -new_n22573_ = OR ( new_n14289_, new_n22556_ ) -new_n22574_ = NAND ( new_n22573_, new_n22572_, new_n22571_, new_n22570_ ) -NET_23781 = OR ( new_n22574_, new_n22569_, new_n22568_ ) -new_n22576_ = NOR ( new_n22567_, new_n14295_ ) -new_n22577_ = OR ( new_n19880_, new_n14297_ ) -new_n22578_ = OR ( new_n19866_, new_n14299_ ) -new_n22579_ = OR ( new_n14301_, new_n22556_ ) -new_n22580_ = OR ( new_n14294_, new_n19869_ ) -new_n22581_ = NAND ( new_n22580_, new_n22579_, new_n22578_, new_n22577_ ) -NET_23782 = OR ( new_n22581_, new_n22576_ ) -new_n22583_ = NOR ( new_n22567_, new_n14312_ ) -new_n22584_ = OR ( new_n19866_, new_n14314_ ) -new_n22585_ = OR ( new_n21710_, new_n5579_ ) -new_n22586_ = OR ( new_n19008_, new_n7240_ ) -new_n22587_ = NAND ( new_n14311_, NET_466 ) -new_n22588_ = NAND ( new_n22587_, new_n22586_, new_n22585_, new_n22584_ ) -NET_23783 = OR ( new_n22588_, new_n22583_ ) -new_n22590_ = OR ( new_n22567_, new_n20011_ ) -new_n22591_ = OR ( new_n20021_, new_n19880_ ) -new_n22592_ = OR ( new_n20016_, new_n19866_ ) -new_n22593_ = OR ( new_n20026_, new_n18917_ ) -new_n22594_ = OR ( new_n20009_, new_n22556_ ) -new_n22595_ = OR ( new_n20028_, new_n19869_ ) -new_n22596_ = AND ( new_n22595_, new_n22594_, new_n22593_ ) -NET_23784 = NAND ( new_n22596_, new_n22592_, new_n22591_, new_n22590_ ) -new_n22598_ = OR ( new_n22161_, new_n18548_, new_n18165_ ) -new_n22599_ = OR ( new_n22598_, new_n19942_ ) -new_n22600_ = NAND ( new_n22598_, new_n19942_ ) -new_n22601_ = NAND ( new_n22600_, new_n22599_, new_n6636_ ) -new_n22602_ = NOT ( new_n22601_ ) -new_n22603_ = OR ( new_n19942_, new_n14323_ ) -new_n22604_ = OR ( new_n19928_, new_n14329_ ) -new_n22605_ = NOT ( NET_979 ) -new_n22606_ = OR ( new_n14332_, new_n22605_ ) -new_n22607_ = NAND ( new_n14334_, NET_788 ) -new_n22608_ = NAND ( new_n22607_, new_n22606_, new_n22604_, new_n22603_ ) -new_n22609_ = NOR ( new_n22608_, new_n22602_ ) -new_n22610_ = XOR ( new_n22609_, new_n14328_ ) -new_n22611_ = NAND ( new_n22468_, new_n22466_, new_n22463_ ) -new_n22612_ = NAND ( new_n22611_, new_n14328_ ) -new_n22613_ = NOT ( new_n22463_ ) -new_n22614_ = NAND ( new_n22469_, new_n22613_ ) -new_n22615_ = NAND ( new_n22614_, new_n22612_ ) -new_n22616_ = XOR ( new_n22615_, new_n22610_ ) -new_n22617_ = NOR ( new_n22616_, new_n14586_ ) -new_n22618_ = NOR ( new_n19942_, new_n14589_ ) -new_n22619_ = OR ( new_n19928_, new_n14592_ ) -new_n22620_ = OR ( new_n19318_, new_n14594_ ) -new_n22621_ = OR ( new_n14583_, new_n19315_ ) -new_n22622_ = OR ( new_n14597_, new_n22605_ ) -new_n22623_ = NAND ( new_n22622_, new_n22621_, new_n22620_, new_n22619_ ) -NET_23785 = OR ( new_n22623_, new_n22618_, new_n22617_ ) -new_n22625_ = NOR ( new_n22616_, new_n14603_ ) -new_n22626_ = OR ( new_n19942_, new_n14605_ ) -new_n22627_ = OR ( new_n19928_, new_n14607_ ) -new_n22628_ = OR ( new_n14609_, new_n22605_ ) -new_n22629_ = OR ( new_n14602_, new_n19931_ ) -new_n22630_ = NAND ( new_n22629_, new_n22628_, new_n22627_, new_n22626_ ) -NET_23786 = OR ( new_n22630_, new_n22625_ ) -new_n22632_ = NOR ( new_n22616_, new_n14620_ ) -new_n22633_ = OR ( new_n19928_, new_n14622_ ) -new_n22634_ = NAND ( new_n21760_, new_n5923_ ) -new_n22635_ = OR ( new_n21762_, new_n8677_ ) -new_n22636_ = NAND ( new_n14619_, NET_915 ) -new_n22637_ = NAND ( new_n22636_, new_n22635_, new_n22634_, new_n22633_ ) -NET_23787 = OR ( new_n22637_, new_n22632_ ) -new_n22639_ = OR ( new_n22616_, new_n20060_ ) -new_n22640_ = OR ( new_n20070_, new_n19942_ ) -new_n22641_ = OR ( new_n20065_, new_n19928_ ) -new_n22642_ = OR ( new_n20075_, new_n19321_ ) -new_n22643_ = OR ( new_n20058_, new_n22605_ ) -new_n22644_ = OR ( new_n20077_, new_n19931_ ) -new_n22645_ = AND ( new_n22644_, new_n22643_, new_n22642_ ) -NET_23788 = NAND ( new_n22645_, new_n22641_, new_n22640_, new_n22639_ ) -new_n22647_ = OR ( new_n22210_, new_n18606_, new_n18327_ ) -new_n22648_ = OR ( new_n22647_, new_n20004_ ) -new_n22649_ = NAND ( new_n22647_, new_n20004_ ) -new_n22650_ = NAND ( new_n22649_, new_n22648_, new_n6681_ ) -new_n22651_ = NOT ( new_n22650_ ) -new_n22652_ = OR ( new_n20004_, new_n14631_ ) -new_n22653_ = OR ( new_n19990_, new_n14637_ ) -new_n22654_ = NOT ( NET_1428 ) -new_n22655_ = OR ( new_n14640_, new_n22654_ ) -new_n22656_ = NAND ( new_n14642_, NET_1237 ) -new_n22657_ = NAND ( new_n22656_, new_n22655_, new_n22653_, new_n22652_ ) -new_n22658_ = NOR ( new_n22657_, new_n22651_ ) -new_n22659_ = XOR ( new_n22658_, new_n14636_ ) -new_n22660_ = NAND ( new_n22516_, new_n22514_, new_n22511_ ) -new_n22661_ = NAND ( new_n22660_, new_n14636_ ) -new_n22662_ = NOT ( new_n22511_ ) -new_n22663_ = NAND ( new_n22517_, new_n22662_ ) -new_n22664_ = NAND ( new_n22663_, new_n22661_ ) -new_n22665_ = XOR ( new_n22664_, new_n22659_ ) -new_n22666_ = NOR ( new_n22665_, new_n14894_ ) -new_n22667_ = NOR ( new_n20004_, new_n14897_ ) -new_n22668_ = OR ( new_n19990_, new_n14900_ ) -new_n22669_ = OR ( new_n19722_, new_n14902_ ) -new_n22670_ = OR ( new_n14891_, new_n19719_ ) -new_n22671_ = OR ( new_n14905_, new_n22654_ ) -new_n22672_ = NAND ( new_n22671_, new_n22670_, new_n22669_, new_n22668_ ) -NET_23789 = OR ( new_n22672_, new_n22667_, new_n22666_ ) -new_n22674_ = NOR ( new_n22665_, new_n14911_ ) -new_n22675_ = OR ( new_n20004_, new_n14913_ ) -new_n22676_ = OR ( new_n19990_, new_n14915_ ) -new_n22677_ = OR ( new_n14917_, new_n22654_ ) -new_n22678_ = OR ( new_n14910_, new_n19993_ ) -new_n22679_ = NAND ( new_n22678_, new_n22677_, new_n22676_, new_n22675_ ) -NET_23790 = OR ( new_n22679_, new_n22674_ ) -new_n22681_ = NOR ( new_n22665_, new_n14928_ ) -new_n22682_ = OR ( new_n19990_, new_n14930_ ) -new_n22683_ = NAND ( new_n21811_, new_n6302_ ) -new_n22684_ = OR ( new_n21813_, new_n10146_ ) -new_n22685_ = NAND ( new_n14927_, NET_1364 ) -new_n22686_ = NAND ( new_n22685_, new_n22684_, new_n22683_, new_n22682_ ) -NET_23791 = OR ( new_n22686_, new_n22681_ ) -new_n22688_ = OR ( new_n22665_, new_n20109_ ) -new_n22689_ = OR ( new_n20119_, new_n20004_ ) -new_n22690_ = OR ( new_n20114_, new_n19990_ ) -new_n22691_ = OR ( new_n20124_, new_n19725_ ) -new_n22692_ = OR ( new_n20107_, new_n22654_ ) -new_n22693_ = OR ( new_n20126_, new_n19993_ ) -new_n22694_ = AND ( new_n22693_, new_n22692_, new_n22691_ ) -NET_23792 = NAND ( new_n22694_, new_n22690_, new_n22689_, new_n22688_ ) -new_n22696_ = NAND ( new_n22550_, new_n20174_ ) -new_n22697_ = OR ( new_n22550_, new_n20174_ ) -new_n22698_ = NAND ( new_n22697_, new_n22696_, new_n6591_ ) -new_n22699_ = NOT ( new_n22698_ ) -new_n22700_ = OR ( new_n20174_, new_n14015_ ) -new_n22701_ = OR ( new_n20158_, new_n14021_ ) -new_n22702_ = NOT ( NET_531 ) -new_n22703_ = OR ( new_n14024_, new_n22702_ ) -new_n22704_ = NAND ( new_n14026_, NET_340 ) -new_n22705_ = NAND ( new_n22704_, new_n22703_, new_n22701_, new_n22700_ ) -new_n22706_ = NOR ( new_n22705_, new_n22699_ ) -new_n22707_ = XOR ( new_n22706_, new_n14020_ ) -new_n22708_ = NAND ( new_n22565_, new_n22563_, new_n22560_ ) -new_n22709_ = NAND ( new_n22708_, new_n14020_ ) -new_n22710_ = NOT ( new_n22560_ ) -new_n22711_ = NAND ( new_n22566_, new_n22710_ ) -new_n22712_ = NAND ( new_n22711_, new_n22709_ ) -new_n22713_ = XOR ( new_n22712_, new_n22707_ ) -new_n22714_ = NOR ( new_n22713_, new_n14278_ ) -new_n22715_ = NOR ( new_n20174_, new_n14281_ ) -new_n22716_ = OR ( new_n20158_, new_n14284_ ) -new_n22717_ = OR ( new_n18929_, new_n14286_ ) -new_n22718_ = NAND ( new_n14274_, new_n14273_, NET_340 ) -new_n22719_ = OR ( new_n14289_, new_n22702_ ) -new_n22720_ = NAND ( new_n22719_, new_n22718_, new_n22717_, new_n22716_ ) -NET_23826 = OR ( new_n22720_, new_n22715_, new_n22714_ ) -new_n22722_ = NOR ( new_n22713_, new_n14295_ ) -new_n22723_ = OR ( new_n20174_, new_n14297_ ) -new_n22724_ = OR ( new_n20158_, new_n14299_ ) -new_n22725_ = OR ( new_n14301_, new_n22702_ ) -new_n22726_ = OR ( new_n14294_, new_n20163_ ) -new_n22727_ = NAND ( new_n22726_, new_n22725_, new_n22724_, new_n22723_ ) -NET_23827 = OR ( new_n22727_, new_n22722_ ) -new_n22729_ = NOR ( new_n22713_, new_n14312_ ) -new_n22730_ = OR ( new_n20158_, new_n14314_ ) -new_n22731_ = OR ( new_n21710_, new_n5574_ ) -new_n22732_ = OR ( new_n19008_, new_n7218_ ) -new_n22733_ = NAND ( new_n14311_, NET_467 ) -new_n22734_ = NAND ( new_n22733_, new_n22732_, new_n22731_, new_n22730_ ) -NET_23828 = OR ( new_n22734_, new_n22729_ ) -new_n22736_ = OR ( new_n22713_, new_n20011_ ) -new_n22737_ = OR ( new_n20174_, new_n20021_ ) -new_n22738_ = OR ( new_n20158_, new_n20016_ ) -new_n22739_ = OR ( new_n20026_, new_n18932_ ) -new_n22740_ = OR ( new_n20009_, new_n22702_ ) -new_n22741_ = OR ( new_n20028_, new_n20163_ ) -new_n22742_ = AND ( new_n22741_, new_n22740_, new_n22739_ ) -NET_23829 = NAND ( new_n22742_, new_n22738_, new_n22737_, new_n22736_ ) -new_n22744_ = NAND ( new_n22599_, new_n20250_ ) -new_n22745_ = OR ( new_n22599_, new_n20250_ ) -new_n22746_ = NAND ( new_n22745_, new_n22744_, new_n6636_ ) -new_n22747_ = NOT ( new_n22746_ ) -new_n22748_ = OR ( new_n20250_, new_n14323_ ) -new_n22749_ = OR ( new_n20234_, new_n14329_ ) -new_n22750_ = NOT ( NET_980 ) -new_n22751_ = OR ( new_n14332_, new_n22750_ ) -new_n22752_ = NAND ( new_n14334_, NET_789 ) -new_n22753_ = NAND ( new_n22752_, new_n22751_, new_n22749_, new_n22748_ ) -new_n22754_ = NOR ( new_n22753_, new_n22747_ ) -new_n22755_ = XOR ( new_n22754_, new_n14328_ ) -new_n22756_ = NAND ( new_n22614_, new_n22612_, new_n22609_ ) -new_n22757_ = NAND ( new_n22756_, new_n14328_ ) -new_n22758_ = NOT ( new_n22609_ ) -new_n22759_ = NAND ( new_n22615_, new_n22758_ ) -new_n22760_ = NAND ( new_n22759_, new_n22757_ ) -new_n22761_ = XOR ( new_n22760_, new_n22755_ ) -new_n22762_ = NOR ( new_n22761_, new_n14586_ ) -new_n22763_ = NOR ( new_n20250_, new_n14589_ ) -new_n22764_ = OR ( new_n20234_, new_n14592_ ) -new_n22765_ = OR ( new_n19333_, new_n14594_ ) -new_n22766_ = NAND ( new_n14582_, new_n14581_, NET_789 ) -new_n22767_ = OR ( new_n14597_, new_n22750_ ) -new_n22768_ = NAND ( new_n22767_, new_n22766_, new_n22765_, new_n22764_ ) -NET_23830 = OR ( new_n22768_, new_n22763_, new_n22762_ ) -new_n22770_ = NOR ( new_n22761_, new_n14603_ ) -new_n22771_ = OR ( new_n20250_, new_n14605_ ) -new_n22772_ = OR ( new_n20234_, new_n14607_ ) -new_n22773_ = OR ( new_n14609_, new_n22750_ ) -new_n22774_ = OR ( new_n14602_, new_n20239_ ) -new_n22775_ = NAND ( new_n22774_, new_n22773_, new_n22772_, new_n22771_ ) -NET_23831 = OR ( new_n22775_, new_n22770_ ) -new_n22777_ = NOR ( new_n22761_, new_n14620_ ) -new_n22778_ = OR ( new_n20234_, new_n14622_ ) -new_n22779_ = NAND ( new_n21760_, new_n5916_ ) -new_n22780_ = OR ( new_n21762_, new_n8651_ ) -new_n22781_ = NAND ( new_n14619_, NET_916 ) -new_n22782_ = NAND ( new_n22781_, new_n22780_, new_n22779_, new_n22778_ ) -NET_23832 = OR ( new_n22782_, new_n22777_ ) -new_n22784_ = OR ( new_n22761_, new_n20060_ ) -new_n22785_ = OR ( new_n20250_, new_n20070_ ) -new_n22786_ = OR ( new_n20234_, new_n20065_ ) -new_n22787_ = OR ( new_n20075_, new_n19336_ ) -new_n22788_ = OR ( new_n20058_, new_n22750_ ) -new_n22789_ = OR ( new_n20077_, new_n20239_ ) -new_n22790_ = AND ( new_n22789_, new_n22788_, new_n22787_ ) -NET_23833 = NAND ( new_n22790_, new_n22786_, new_n22785_, new_n22784_ ) -new_n22792_ = NAND ( new_n22648_, new_n20326_ ) -new_n22793_ = OR ( new_n22648_, new_n20326_ ) -new_n22794_ = NAND ( new_n22793_, new_n22792_, new_n6681_ ) -new_n22795_ = NOT ( new_n22794_ ) -new_n22796_ = OR ( new_n20326_, new_n14631_ ) -new_n22797_ = OR ( new_n20310_, new_n14637_ ) -new_n22798_ = NOT ( NET_1429 ) -new_n22799_ = OR ( new_n14640_, new_n22798_ ) -new_n22800_ = NAND ( new_n14642_, NET_1238 ) -new_n22801_ = NAND ( new_n22800_, new_n22799_, new_n22797_, new_n22796_ ) -new_n22802_ = NOR ( new_n22801_, new_n22795_ ) -new_n22803_ = XOR ( new_n22802_, new_n14636_ ) -new_n22804_ = NAND ( new_n22663_, new_n22661_, new_n22658_ ) -new_n22805_ = NAND ( new_n22804_, new_n14636_ ) -new_n22806_ = NOT ( new_n22658_ ) -new_n22807_ = NAND ( new_n22664_, new_n22806_ ) -new_n22808_ = NAND ( new_n22807_, new_n22805_ ) -new_n22809_ = XOR ( new_n22808_, new_n22803_ ) -new_n22810_ = NOR ( new_n22809_, new_n14894_ ) -new_n22811_ = NOR ( new_n20326_, new_n14897_ ) -new_n22812_ = OR ( new_n20310_, new_n14900_ ) -new_n22813_ = OR ( new_n19737_, new_n14902_ ) -new_n22814_ = NAND ( new_n14890_, new_n14889_, NET_1238 ) -new_n22815_ = OR ( new_n14905_, new_n22798_ ) -new_n22816_ = NAND ( new_n22815_, new_n22814_, new_n22813_, new_n22812_ ) -NET_23834 = OR ( new_n22816_, new_n22811_, new_n22810_ ) -new_n22818_ = NOR ( new_n22809_, new_n14911_ ) -new_n22819_ = OR ( new_n20326_, new_n14913_ ) -new_n22820_ = OR ( new_n20310_, new_n14915_ ) -new_n22821_ = OR ( new_n14917_, new_n22798_ ) -new_n22822_ = OR ( new_n14910_, new_n20315_ ) -new_n22823_ = NAND ( new_n22822_, new_n22821_, new_n22820_, new_n22819_ ) -NET_23835 = OR ( new_n22823_, new_n22818_ ) -new_n22825_ = NOR ( new_n22809_, new_n14928_ ) -new_n22826_ = OR ( new_n20310_, new_n14930_ ) -new_n22827_ = NAND ( new_n21811_, new_n6294_ ) -new_n22828_ = OR ( new_n21813_, new_n10120_ ) -new_n22829_ = NAND ( new_n14927_, NET_1365 ) -new_n22830_ = NAND ( new_n22829_, new_n22828_, new_n22827_, new_n22826_ ) -NET_23836 = OR ( new_n22830_, new_n22825_ ) -new_n22832_ = OR ( new_n22809_, new_n20109_ ) -new_n22833_ = OR ( new_n20326_, new_n20119_ ) -new_n22834_ = OR ( new_n20310_, new_n20114_ ) -new_n22835_ = OR ( new_n20124_, new_n19740_ ) -new_n22836_ = OR ( new_n20107_, new_n22798_ ) -new_n22837_ = OR ( new_n20126_, new_n20315_ ) -new_n22838_ = AND ( new_n22837_, new_n22836_, new_n22835_ ) -NET_23837 = NAND ( new_n22838_, new_n22834_, new_n22833_, new_n22832_ ) -new_n22840_ = OR ( new_n22697_, new_n20396_ ) -new_n22841_ = NAND ( new_n22697_, new_n20396_ ) -new_n22842_ = NAND ( new_n22841_, new_n22840_, new_n6591_ ) -new_n22843_ = NOT ( new_n22842_ ) -new_n22844_ = OR ( new_n20396_, new_n14015_ ) -new_n22845_ = OR ( new_n20386_, new_n14021_ ) -new_n22846_ = NOT ( NET_532 ) -new_n22847_ = OR ( new_n14024_, new_n22846_ ) -new_n22848_ = NAND ( new_n14026_, NET_341 ) -new_n22849_ = NAND ( new_n22848_, new_n22847_, new_n22845_, new_n22844_ ) -new_n22850_ = NOR ( new_n22849_, new_n22843_ ) -new_n22851_ = XOR ( new_n22850_, new_n14020_ ) -new_n22852_ = NAND ( new_n22711_, new_n22709_, new_n22706_ ) -new_n22853_ = NAND ( new_n22852_, new_n14020_ ) -new_n22854_ = NOT ( new_n22706_ ) -new_n22855_ = NAND ( new_n22712_, new_n22854_ ) -new_n22856_ = NAND ( new_n22855_, new_n22853_ ) -new_n22857_ = XOR ( new_n22856_, new_n22851_ ) -new_n22858_ = NOR ( new_n22857_, new_n14278_ ) -new_n22859_ = NOR ( new_n20396_, new_n14281_ ) -new_n22860_ = OR ( new_n20386_, new_n14284_ ) -new_n22861_ = OR ( new_n18940_, new_n14286_ ) -new_n22862_ = NAND ( new_n14274_, new_n14273_, NET_341 ) -new_n22863_ = OR ( new_n14289_, new_n22846_ ) -new_n22864_ = NAND ( new_n22863_, new_n22862_, new_n22861_, new_n22860_ ) -NET_23871 = OR ( new_n22864_, new_n22859_, new_n22858_ ) -new_n22866_ = NOR ( new_n22857_, new_n14295_ ) -new_n22867_ = OR ( new_n20396_, new_n14297_ ) -new_n22868_ = OR ( new_n20386_, new_n14299_ ) -new_n22869_ = OR ( new_n14301_, new_n22846_ ) -new_n22870_ = OR ( new_n14294_, new_n20391_ ) -new_n22871_ = NAND ( new_n22870_, new_n22869_, new_n22868_, new_n22867_ ) -NET_23872 = OR ( new_n22871_, new_n22866_ ) -new_n22873_ = NOR ( new_n22857_, new_n14312_ ) -new_n22874_ = OR ( new_n20386_, new_n14314_ ) -new_n22875_ = OR ( new_n21710_, new_n5569_ ) -new_n22876_ = OR ( new_n19008_, new_n7347_ ) -new_n22877_ = NAND ( new_n14311_, NET_468 ) -new_n22878_ = NAND ( new_n22877_, new_n22876_, new_n22875_, new_n22874_ ) -NET_23873 = OR ( new_n22878_, new_n22873_ ) -new_n22880_ = OR ( new_n22857_, new_n20011_ ) -new_n22881_ = OR ( new_n20396_, new_n20021_ ) -new_n22882_ = OR ( new_n20386_, new_n20016_ ) -new_n22883_ = OR ( new_n20026_, new_n18943_ ) -new_n22884_ = OR ( new_n20009_, new_n22846_ ) -new_n22885_ = OR ( new_n20028_, new_n20391_ ) -new_n22886_ = AND ( new_n22885_, new_n22884_, new_n22883_ ) -NET_23874 = NAND ( new_n22886_, new_n22882_, new_n22881_, new_n22880_ ) -new_n22888_ = OR ( new_n22745_, new_n20413_ ) -new_n22889_ = NAND ( new_n22745_, new_n20413_ ) -new_n22890_ = NAND ( new_n22889_, new_n22888_, new_n6636_ ) -new_n22891_ = NOT ( new_n22890_ ) -new_n22892_ = OR ( new_n20413_, new_n14323_ ) -new_n22893_ = OR ( new_n20403_, new_n14329_ ) -new_n22894_ = NOT ( NET_981 ) -new_n22895_ = OR ( new_n14332_, new_n22894_ ) -new_n22896_ = NAND ( new_n14334_, NET_790 ) -new_n22897_ = NAND ( new_n22896_, new_n22895_, new_n22893_, new_n22892_ ) -new_n22898_ = NOR ( new_n22897_, new_n22891_ ) -new_n22899_ = XOR ( new_n22898_, new_n14328_ ) -new_n22900_ = NAND ( new_n22759_, new_n22757_, new_n22754_ ) -new_n22901_ = NAND ( new_n22900_, new_n14328_ ) -new_n22902_ = NOT ( new_n22754_ ) -new_n22903_ = NAND ( new_n22760_, new_n22902_ ) -new_n22904_ = NAND ( new_n22903_, new_n22901_ ) -new_n22905_ = XOR ( new_n22904_, new_n22899_ ) -new_n22906_ = NOR ( new_n22905_, new_n14586_ ) -new_n22907_ = NOR ( new_n20413_, new_n14589_ ) -new_n22908_ = OR ( new_n20403_, new_n14592_ ) -new_n22909_ = OR ( new_n19344_, new_n14594_ ) -new_n22910_ = NAND ( new_n14582_, new_n14581_, NET_790 ) -new_n22911_ = OR ( new_n14597_, new_n22894_ ) -new_n22912_ = NAND ( new_n22911_, new_n22910_, new_n22909_, new_n22908_ ) -NET_23875 = OR ( new_n22912_, new_n22907_, new_n22906_ ) -new_n22914_ = NOR ( new_n22905_, new_n14603_ ) -new_n22915_ = OR ( new_n20413_, new_n14605_ ) -new_n22916_ = OR ( new_n20403_, new_n14607_ ) -new_n22917_ = OR ( new_n14609_, new_n22894_ ) -new_n22918_ = OR ( new_n14602_, new_n20408_ ) -new_n22919_ = NAND ( new_n22918_, new_n22917_, new_n22916_, new_n22915_ ) -NET_23876 = OR ( new_n22919_, new_n22914_ ) -new_n22921_ = NOR ( new_n22905_, new_n14620_ ) -new_n22922_ = OR ( new_n20403_, new_n14622_ ) -new_n22923_ = NAND ( new_n21760_, new_n5909_ ) -new_n22924_ = NAND ( new_n19412_, new_n8815_ ) -new_n22925_ = NAND ( new_n14619_, NET_917 ) -new_n22926_ = NAND ( new_n22925_, new_n22924_, new_n22923_, new_n22922_ ) -NET_23877 = OR ( new_n22926_, new_n22921_ ) -new_n22928_ = OR ( new_n22905_, new_n20060_ ) -new_n22929_ = OR ( new_n20413_, new_n20070_ ) -new_n22930_ = OR ( new_n20403_, new_n20065_ ) -new_n22931_ = OR ( new_n20075_, new_n19347_ ) -new_n22932_ = OR ( new_n20058_, new_n22894_ ) -new_n22933_ = OR ( new_n20077_, new_n20408_ ) -new_n22934_ = AND ( new_n22933_, new_n22932_, new_n22931_ ) -NET_23878 = NAND ( new_n22934_, new_n22930_, new_n22929_, new_n22928_ ) -new_n22936_ = OR ( new_n22793_, new_n20430_ ) -new_n22937_ = NAND ( new_n22793_, new_n20430_ ) -new_n22938_ = NAND ( new_n22937_, new_n22936_, new_n6681_ ) -new_n22939_ = NOT ( new_n22938_ ) -new_n22940_ = OR ( new_n20430_, new_n14631_ ) -new_n22941_ = OR ( new_n20420_, new_n14637_ ) -new_n22942_ = NOT ( NET_1430 ) -new_n22943_ = OR ( new_n14640_, new_n22942_ ) -new_n22944_ = NAND ( new_n14642_, NET_1239 ) -new_n22945_ = NAND ( new_n22944_, new_n22943_, new_n22941_, new_n22940_ ) -new_n22946_ = NOR ( new_n22945_, new_n22939_ ) -new_n22947_ = XOR ( new_n22946_, new_n14636_ ) -new_n22948_ = NAND ( new_n22807_, new_n22805_, new_n22802_ ) -new_n22949_ = NAND ( new_n22948_, new_n14636_ ) -new_n22950_ = NOT ( new_n22802_ ) -new_n22951_ = NAND ( new_n22808_, new_n22950_ ) -new_n22952_ = NAND ( new_n22951_, new_n22949_ ) -new_n22953_ = XOR ( new_n22952_, new_n22947_ ) -new_n22954_ = NOR ( new_n22953_, new_n14894_ ) -new_n22955_ = NOR ( new_n20430_, new_n14897_ ) -new_n22956_ = OR ( new_n20420_, new_n14900_ ) -new_n22957_ = OR ( new_n19748_, new_n14902_ ) -new_n22958_ = NAND ( new_n14890_, new_n14889_, NET_1239 ) -new_n22959_ = OR ( new_n14905_, new_n22942_ ) -new_n22960_ = NAND ( new_n22959_, new_n22958_, new_n22957_, new_n22956_ ) -NET_23879 = OR ( new_n22960_, new_n22955_, new_n22954_ ) -new_n22962_ = NOR ( new_n22953_, new_n14911_ ) -new_n22963_ = OR ( new_n20430_, new_n14913_ ) -new_n22964_ = OR ( new_n20420_, new_n14915_ ) -new_n22965_ = OR ( new_n14917_, new_n22942_ ) -new_n22966_ = OR ( new_n14910_, new_n20425_ ) -new_n22967_ = NAND ( new_n22966_, new_n22965_, new_n22964_, new_n22963_ ) -NET_23880 = OR ( new_n22967_, new_n22962_ ) -new_n22969_ = NOR ( new_n22953_, new_n14928_ ) -new_n22970_ = OR ( new_n20420_, new_n14930_ ) -new_n22971_ = NAND ( new_n21811_, new_n6286_ ) -new_n22972_ = NAND ( new_n19816_, new_n10285_ ) -new_n22973_ = NAND ( new_n14927_, NET_1366 ) -new_n22974_ = NAND ( new_n22973_, new_n22972_, new_n22971_, new_n22970_ ) -NET_23881 = OR ( new_n22974_, new_n22969_ ) -new_n22976_ = OR ( new_n22953_, new_n20109_ ) -new_n22977_ = OR ( new_n20430_, new_n20119_ ) -new_n22978_ = OR ( new_n20420_, new_n20114_ ) -new_n22979_ = OR ( new_n20124_, new_n19751_ ) -new_n22980_ = OR ( new_n20107_, new_n22942_ ) -new_n22981_ = OR ( new_n20126_, new_n20425_ ) -new_n22982_ = AND ( new_n22981_, new_n22980_, new_n22979_ ) -NET_23882 = NAND ( new_n22982_, new_n22978_, new_n22977_, new_n22976_ ) -new_n22984_ = NOR ( new_n22550_, new_n20396_, new_n20174_ ) -new_n22985_ = NAND ( new_n22984_, new_n20552_ ) -new_n22986_ = OR ( new_n22984_, new_n20552_ ) -new_n22987_ = NAND ( new_n22986_, new_n22985_, new_n6591_ ) -new_n22988_ = NOT ( new_n22987_ ) -new_n22989_ = NAND ( new_n20552_, new_n14014_ ) -new_n22990_ = OR ( new_n20540_, new_n14021_ ) -new_n22991_ = NOT ( NET_533 ) -new_n22992_ = OR ( new_n14024_, new_n22991_ ) -new_n22993_ = NAND ( new_n14026_, NET_342 ) -new_n22994_ = NAND ( new_n22993_, new_n22992_, new_n22990_, new_n22989_ ) -new_n22995_ = NOR ( new_n22994_, new_n22988_ ) -new_n22996_ = XOR ( new_n22995_, new_n14020_ ) -new_n22997_ = NAND ( new_n22855_, new_n22853_, new_n22850_ ) -new_n22998_ = NAND ( new_n22997_, new_n14020_ ) -new_n22999_ = NOT ( new_n22850_ ) -new_n23000_ = NAND ( new_n22856_, new_n22999_ ) -new_n23001_ = NAND ( new_n23000_, new_n22998_ ) -new_n23002_ = XOR ( new_n23001_, new_n22996_ ) -new_n23003_ = NOR ( new_n23002_, new_n14278_ ) -new_n23004_ = AND ( new_n20552_, new_n14280_, new_n14276_ ) -new_n23005_ = OR ( new_n20540_, new_n14284_ ) -new_n23006_ = OR ( new_n18901_, new_n14286_ ) -new_n23007_ = NAND ( new_n14274_, new_n14273_, NET_342 ) -new_n23008_ = OR ( new_n14289_, new_n22991_ ) -new_n23009_ = NAND ( new_n23008_, new_n23007_, new_n23006_, new_n23005_ ) -NET_23916 = OR ( new_n23009_, new_n23004_, new_n23003_ ) -new_n23011_ = NOR ( new_n23002_, new_n14295_ ) -new_n23012_ = NAND ( new_n20552_, new_n16282_ ) -new_n23013_ = OR ( new_n20540_, new_n14299_ ) -new_n23014_ = OR ( new_n14301_, new_n22991_ ) -new_n23015_ = OR ( new_n14294_, new_n20545_ ) -new_n23016_ = NAND ( new_n23015_, new_n23014_, new_n23013_, new_n23012_ ) -NET_23917 = OR ( new_n23016_, new_n23011_ ) -new_n23018_ = NOR ( new_n23002_, new_n14312_ ) -new_n23019_ = OR ( new_n20540_, new_n14314_ ) -new_n23020_ = OR ( new_n21710_, new_n5564_ ) -new_n23021_ = OR ( new_n19008_, new_n7330_ ) -new_n23022_ = NAND ( new_n14311_, NET_469 ) -new_n23023_ = NAND ( new_n23022_, new_n23021_, new_n23020_, new_n23019_ ) -NET_23918 = OR ( new_n23023_, new_n23018_ ) -new_n23025_ = OR ( new_n23002_, new_n20011_ ) -new_n23026_ = NAND ( new_n20552_, new_n20020_ ) -new_n23027_ = OR ( new_n20540_, new_n20016_ ) -new_n23028_ = OR ( new_n20026_, new_n18904_ ) -new_n23029_ = OR ( new_n20009_, new_n22991_ ) -new_n23030_ = OR ( new_n20028_, new_n20545_ ) -new_n23031_ = AND ( new_n23030_, new_n23029_, new_n23028_ ) -NET_23919 = NAND ( new_n23031_, new_n23027_, new_n23026_, new_n23025_ ) -new_n23033_ = NOR ( new_n22599_, new_n20413_, new_n20250_ ) -new_n23034_ = NAND ( new_n23033_, new_n20690_ ) -new_n23035_ = OR ( new_n23033_, new_n20690_ ) -new_n23036_ = NAND ( new_n23035_, new_n23034_, new_n6636_ ) -new_n23037_ = NOT ( new_n23036_ ) -new_n23038_ = NAND ( new_n20690_, new_n14322_ ) -new_n23039_ = OR ( new_n20678_, new_n14329_ ) -new_n23040_ = NOT ( NET_982 ) -new_n23041_ = OR ( new_n14332_, new_n23040_ ) -new_n23042_ = NAND ( new_n14334_, NET_791 ) -new_n23043_ = NAND ( new_n23042_, new_n23041_, new_n23039_, new_n23038_ ) -new_n23044_ = NOR ( new_n23043_, new_n23037_ ) -new_n23045_ = XOR ( new_n23044_, new_n14328_ ) -new_n23046_ = NAND ( new_n22903_, new_n22901_, new_n22898_ ) -new_n23047_ = NAND ( new_n23046_, new_n14328_ ) -new_n23048_ = NOT ( new_n22898_ ) -new_n23049_ = NAND ( new_n22904_, new_n23048_ ) -new_n23050_ = NAND ( new_n23049_, new_n23047_ ) -new_n23051_ = XOR ( new_n23050_, new_n23045_ ) -new_n23052_ = NOR ( new_n23051_, new_n14586_ ) -new_n23053_ = AND ( new_n20690_, new_n14588_, new_n14584_ ) -new_n23054_ = OR ( new_n20678_, new_n14592_ ) -new_n23055_ = OR ( new_n19305_, new_n14594_ ) -new_n23056_ = NAND ( new_n14582_, new_n14581_, NET_791 ) -new_n23057_ = OR ( new_n14597_, new_n23040_ ) -new_n23058_ = NAND ( new_n23057_, new_n23056_, new_n23055_, new_n23054_ ) -NET_23920 = OR ( new_n23058_, new_n23053_, new_n23052_ ) -new_n23060_ = NOR ( new_n23051_, new_n14603_ ) -new_n23061_ = NAND ( new_n20690_, new_n16389_ ) -new_n23062_ = OR ( new_n20678_, new_n14607_ ) -new_n23063_ = OR ( new_n14609_, new_n23040_ ) -new_n23064_ = OR ( new_n14602_, new_n20683_ ) -new_n23065_ = NAND ( new_n23064_, new_n23063_, new_n23062_, new_n23061_ ) -NET_23921 = OR ( new_n23065_, new_n23060_ ) -new_n23067_ = NOR ( new_n23051_, new_n14620_ ) -new_n23068_ = OR ( new_n20678_, new_n14622_ ) -new_n23069_ = NAND ( new_n21760_, new_n5902_ ) -new_n23070_ = NAND ( new_n19412_, new_n8793_ ) -new_n23071_ = NAND ( new_n14619_, NET_918 ) -new_n23072_ = NAND ( new_n23071_, new_n23070_, new_n23069_, new_n23068_ ) -NET_23922 = OR ( new_n23072_, new_n23067_ ) -new_n23074_ = OR ( new_n23051_, new_n20060_ ) -new_n23075_ = NAND ( new_n20690_, new_n20069_ ) -new_n23076_ = OR ( new_n20678_, new_n20065_ ) -new_n23077_ = OR ( new_n20075_, new_n19308_ ) -new_n23078_ = OR ( new_n20058_, new_n23040_ ) -new_n23079_ = OR ( new_n20077_, new_n20683_ ) -new_n23080_ = AND ( new_n23079_, new_n23078_, new_n23077_ ) -NET_23923 = NAND ( new_n23080_, new_n23076_, new_n23075_, new_n23074_ ) -new_n23082_ = NOR ( new_n22648_, new_n20430_, new_n20326_ ) -new_n23083_ = NAND ( new_n23082_, new_n20828_ ) -new_n23084_ = OR ( new_n23082_, new_n20828_ ) -new_n23085_ = NAND ( new_n23084_, new_n23083_, new_n6681_ ) -new_n23086_ = NOT ( new_n23085_ ) -new_n23087_ = NAND ( new_n20828_, new_n14630_ ) -new_n23088_ = OR ( new_n20816_, new_n14637_ ) -new_n23089_ = NOT ( NET_1431 ) -new_n23090_ = OR ( new_n14640_, new_n23089_ ) -new_n23091_ = NAND ( new_n14642_, NET_1240 ) -new_n23092_ = NAND ( new_n23091_, new_n23090_, new_n23088_, new_n23087_ ) -new_n23093_ = NOR ( new_n23092_, new_n23086_ ) -new_n23094_ = XOR ( new_n23093_, new_n14636_ ) -new_n23095_ = NAND ( new_n22951_, new_n22949_, new_n22946_ ) -new_n23096_ = NAND ( new_n23095_, new_n14636_ ) -new_n23097_ = NOT ( new_n22946_ ) -new_n23098_ = NAND ( new_n22952_, new_n23097_ ) -new_n23099_ = NAND ( new_n23098_, new_n23096_ ) -new_n23100_ = XOR ( new_n23099_, new_n23094_ ) -new_n23101_ = NOR ( new_n23100_, new_n14894_ ) -new_n23102_ = AND ( new_n20828_, new_n14896_, new_n14892_ ) -new_n23103_ = OR ( new_n20816_, new_n14900_ ) -new_n23104_ = OR ( new_n19709_, new_n14902_ ) -new_n23105_ = NAND ( new_n14890_, new_n14889_, NET_1240 ) -new_n23106_ = OR ( new_n14905_, new_n23089_ ) -new_n23107_ = NAND ( new_n23106_, new_n23105_, new_n23104_, new_n23103_ ) -NET_23924 = OR ( new_n23107_, new_n23102_, new_n23101_ ) -new_n23109_ = NOR ( new_n23100_, new_n14911_ ) -new_n23110_ = NAND ( new_n20828_, new_n16496_ ) -new_n23111_ = OR ( new_n20816_, new_n14915_ ) -new_n23112_ = OR ( new_n14917_, new_n23089_ ) -new_n23113_ = OR ( new_n14910_, new_n20821_ ) -new_n23114_ = NAND ( new_n23113_, new_n23112_, new_n23111_, new_n23110_ ) -NET_23925 = OR ( new_n23114_, new_n23109_ ) -new_n23116_ = NOR ( new_n23100_, new_n14928_ ) -new_n23117_ = OR ( new_n20816_, new_n14930_ ) -new_n23118_ = NAND ( new_n21811_, new_n6278_ ) -new_n23119_ = NAND ( new_n19816_, new_n10263_ ) -new_n23120_ = NAND ( new_n14927_, NET_1367 ) -new_n23121_ = NAND ( new_n23120_, new_n23119_, new_n23118_, new_n23117_ ) -NET_23926 = OR ( new_n23121_, new_n23116_ ) -new_n23123_ = OR ( new_n23100_, new_n20109_ ) -new_n23124_ = NAND ( new_n20828_, new_n20118_ ) -new_n23125_ = OR ( new_n20816_, new_n20114_ ) -new_n23126_ = OR ( new_n20124_, new_n19712_ ) -new_n23127_ = OR ( new_n20107_, new_n23089_ ) -new_n23128_ = OR ( new_n20126_, new_n20821_ ) -new_n23129_ = AND ( new_n23128_, new_n23127_, new_n23126_ ) -NET_23927 = NAND ( new_n23129_, new_n23125_, new_n23124_, new_n23123_ ) -new_n23131_ = NOT ( new_n20884_ ) -new_n23132_ = OR ( new_n22985_, new_n23131_ ) -new_n23133_ = NAND ( new_n22985_, new_n23131_ ) -new_n23134_ = NAND ( new_n23133_, new_n23132_, new_n6591_ ) -new_n23135_ = NOT ( new_n23134_ ) -new_n23136_ = NAND ( new_n20884_, new_n14014_ ) -new_n23137_ = OR ( new_n20873_, new_n14021_ ) -new_n23138_ = NOT ( NET_534 ) -new_n23139_ = OR ( new_n14024_, new_n23138_ ) -new_n23140_ = NAND ( new_n14026_, NET_343 ) -new_n23141_ = NAND ( new_n23140_, new_n23139_, new_n23137_, new_n23136_ ) -new_n23142_ = NOR ( new_n23141_, new_n23135_ ) -new_n23143_ = XOR ( new_n23142_, new_n14020_ ) -new_n23144_ = NAND ( new_n23000_, new_n22998_, new_n22995_ ) -new_n23145_ = NAND ( new_n23144_, new_n14020_ ) -new_n23146_ = NOT ( new_n22995_ ) -new_n23147_ = NAND ( new_n23001_, new_n23146_ ) -new_n23148_ = NAND ( new_n23147_, new_n23145_ ) -new_n23149_ = XOR ( new_n23148_, new_n23143_ ) -new_n23150_ = NOR ( new_n23149_, new_n14278_ ) -new_n23151_ = NOR ( new_n23131_, new_n14281_ ) -new_n23152_ = OR ( new_n20873_, new_n14284_ ) -new_n23153_ = OR ( new_n18952_, new_n14286_ ) -new_n23154_ = NAND ( new_n14274_, new_n14273_, NET_343 ) -new_n23155_ = OR ( new_n14289_, new_n23138_ ) -new_n23156_ = NAND ( new_n23155_, new_n23154_, new_n23153_, new_n23152_ ) -NET_23961 = OR ( new_n23156_, new_n23151_, new_n23150_ ) -new_n23158_ = NOR ( new_n23149_, new_n14295_ ) -new_n23159_ = NAND ( new_n20884_, new_n16282_ ) -new_n23160_ = OR ( new_n20873_, new_n14299_ ) -new_n23161_ = OR ( new_n14301_, new_n23138_ ) -new_n23162_ = OR ( new_n14294_, new_n20878_ ) -new_n23163_ = NAND ( new_n23162_, new_n23161_, new_n23160_, new_n23159_ ) -NET_23962 = OR ( new_n23163_, new_n23158_ ) -new_n23165_ = NOR ( new_n23149_, new_n14312_ ) -new_n23166_ = OR ( new_n20873_, new_n14314_ ) -new_n23167_ = OR ( new_n21710_, new_n5559_ ) -new_n23168_ = OR ( new_n19008_, new_n7313_ ) -new_n23169_ = NAND ( new_n14311_, NET_470 ) -new_n23170_ = NAND ( new_n23169_, new_n23168_, new_n23167_, new_n23166_ ) -NET_23963 = OR ( new_n23170_, new_n23165_ ) -new_n23172_ = OR ( new_n23149_, new_n20011_ ) -new_n23173_ = NAND ( new_n20884_, new_n20020_ ) -new_n23174_ = OR ( new_n20873_, new_n20016_ ) -new_n23175_ = OR ( new_n20026_, new_n18955_ ) -new_n23176_ = OR ( new_n20009_, new_n23138_ ) -new_n23177_ = OR ( new_n20028_, new_n20878_ ) -new_n23178_ = AND ( new_n23177_, new_n23176_, new_n23175_ ) -NET_23964 = NAND ( new_n23178_, new_n23174_, new_n23173_, new_n23172_ ) -new_n23180_ = NOT ( new_n20952_ ) -new_n23181_ = OR ( new_n23034_, new_n23180_ ) -new_n23182_ = NAND ( new_n23034_, new_n23180_ ) -new_n23183_ = NAND ( new_n23182_, new_n23181_, new_n6636_ ) -new_n23184_ = NOT ( new_n23183_ ) -new_n23185_ = NAND ( new_n20952_, new_n14322_ ) -new_n23186_ = OR ( new_n20941_, new_n14329_ ) -new_n23187_ = NOT ( NET_983 ) -new_n23188_ = OR ( new_n14332_, new_n23187_ ) -new_n23189_ = NAND ( new_n14334_, NET_792 ) -new_n23190_ = NAND ( new_n23189_, new_n23188_, new_n23186_, new_n23185_ ) -new_n23191_ = NOR ( new_n23190_, new_n23184_ ) -new_n23192_ = XOR ( new_n23191_, new_n14328_ ) -new_n23193_ = NAND ( new_n23049_, new_n23047_, new_n23044_ ) -new_n23194_ = NAND ( new_n23193_, new_n14328_ ) -new_n23195_ = NOT ( new_n23044_ ) -new_n23196_ = NAND ( new_n23050_, new_n23195_ ) -new_n23197_ = NAND ( new_n23196_, new_n23194_ ) -new_n23198_ = XOR ( new_n23197_, new_n23192_ ) -new_n23199_ = NOR ( new_n23198_, new_n14586_ ) -new_n23200_ = NOR ( new_n23180_, new_n14589_ ) -new_n23201_ = OR ( new_n20941_, new_n14592_ ) -new_n23202_ = OR ( new_n19356_, new_n14594_ ) -new_n23203_ = NAND ( new_n14582_, new_n14581_, NET_792 ) -new_n23204_ = OR ( new_n14597_, new_n23187_ ) -new_n23205_ = NAND ( new_n23204_, new_n23203_, new_n23202_, new_n23201_ ) -NET_23965 = OR ( new_n23205_, new_n23200_, new_n23199_ ) -new_n23207_ = NOR ( new_n23198_, new_n14603_ ) -new_n23208_ = NAND ( new_n20952_, new_n16389_ ) -new_n23209_ = OR ( new_n20941_, new_n14607_ ) -new_n23210_ = OR ( new_n14609_, new_n23187_ ) -new_n23211_ = OR ( new_n14602_, new_n20946_ ) -new_n23212_ = NAND ( new_n23211_, new_n23210_, new_n23209_, new_n23208_ ) -NET_23966 = OR ( new_n23212_, new_n23207_ ) -new_n23214_ = NOR ( new_n23198_, new_n14620_ ) -new_n23215_ = OR ( new_n20941_, new_n14622_ ) -new_n23216_ = NAND ( new_n21760_, new_n5895_ ) -new_n23217_ = NAND ( new_n19412_, new_n8771_ ) -new_n23218_ = NAND ( new_n14619_, NET_919 ) -new_n23219_ = NAND ( new_n23218_, new_n23217_, new_n23216_, new_n23215_ ) -NET_23967 = OR ( new_n23219_, new_n23214_ ) -new_n23221_ = OR ( new_n23198_, new_n20060_ ) -new_n23222_ = NAND ( new_n20952_, new_n20069_ ) -new_n23223_ = OR ( new_n20941_, new_n20065_ ) -new_n23224_ = OR ( new_n20075_, new_n19359_ ) -new_n23225_ = OR ( new_n20058_, new_n23187_ ) -new_n23226_ = OR ( new_n20077_, new_n20946_ ) -new_n23227_ = AND ( new_n23226_, new_n23225_, new_n23224_ ) -NET_23968 = NAND ( new_n23227_, new_n23223_, new_n23222_, new_n23221_ ) -new_n23229_ = NOT ( new_n21020_ ) -new_n23230_ = OR ( new_n23083_, new_n23229_ ) -new_n23231_ = NAND ( new_n23083_, new_n23229_ ) -new_n23232_ = NAND ( new_n23231_, new_n23230_, new_n6681_ ) -new_n23233_ = NOT ( new_n23232_ ) -new_n23234_ = NAND ( new_n21020_, new_n14630_ ) -new_n23235_ = OR ( new_n21009_, new_n14637_ ) -new_n23236_ = NOT ( NET_1432 ) -new_n23237_ = OR ( new_n14640_, new_n23236_ ) -new_n23238_ = NAND ( new_n14642_, NET_1241 ) -new_n23239_ = NAND ( new_n23238_, new_n23237_, new_n23235_, new_n23234_ ) -new_n23240_ = NOR ( new_n23239_, new_n23233_ ) -new_n23241_ = XOR ( new_n23240_, new_n14636_ ) -new_n23242_ = NAND ( new_n23098_, new_n23096_, new_n23093_ ) -new_n23243_ = NAND ( new_n23242_, new_n14636_ ) -new_n23244_ = NOT ( new_n23093_ ) -new_n23245_ = NAND ( new_n23099_, new_n23244_ ) -new_n23246_ = NAND ( new_n23245_, new_n23243_ ) -new_n23247_ = XOR ( new_n23246_, new_n23241_ ) -new_n23248_ = NOR ( new_n23247_, new_n14894_ ) -new_n23249_ = NOR ( new_n23229_, new_n14897_ ) -new_n23250_ = OR ( new_n21009_, new_n14900_ ) -new_n23251_ = OR ( new_n19760_, new_n14902_ ) -new_n23252_ = NAND ( new_n14890_, new_n14889_, NET_1241 ) -new_n23253_ = OR ( new_n14905_, new_n23236_ ) -new_n23254_ = NAND ( new_n23253_, new_n23252_, new_n23251_, new_n23250_ ) -NET_23969 = OR ( new_n23254_, new_n23249_, new_n23248_ ) -new_n23256_ = NOR ( new_n23247_, new_n14911_ ) -new_n23257_ = NAND ( new_n21020_, new_n16496_ ) -new_n23258_ = OR ( new_n21009_, new_n14915_ ) -new_n23259_ = OR ( new_n14917_, new_n23236_ ) -new_n23260_ = OR ( new_n14910_, new_n21014_ ) -new_n23261_ = NAND ( new_n23260_, new_n23259_, new_n23258_, new_n23257_ ) -NET_23970 = OR ( new_n23261_, new_n23256_ ) -new_n23263_ = NOR ( new_n23247_, new_n14928_ ) -new_n23264_ = OR ( new_n21009_, new_n14930_ ) -new_n23265_ = NAND ( new_n21811_, new_n6270_ ) -new_n23266_ = NAND ( new_n19816_, new_n10241_ ) -new_n23267_ = NAND ( new_n14927_, NET_1368 ) -new_n23268_ = NAND ( new_n23267_, new_n23266_, new_n23265_, new_n23264_ ) -NET_23971 = OR ( new_n23268_, new_n23263_ ) -new_n23270_ = OR ( new_n23247_, new_n20109_ ) -new_n23271_ = NAND ( new_n21020_, new_n20118_ ) -new_n23272_ = OR ( new_n21009_, new_n20114_ ) -new_n23273_ = OR ( new_n20124_, new_n19763_ ) -new_n23274_ = OR ( new_n20107_, new_n23236_ ) -new_n23275_ = OR ( new_n20126_, new_n21014_ ) -new_n23276_ = AND ( new_n23275_, new_n23274_, new_n23273_ ) -NET_23972 = NAND ( new_n23276_, new_n23272_, new_n23271_, new_n23270_ ) -new_n23278_ = NAND ( new_n22984_, new_n20884_, new_n20552_ ) -new_n23279_ = NAND ( new_n23278_, new_n20904_ ) -new_n23280_ = OR ( new_n23278_, new_n20904_ ) -new_n23281_ = NAND ( new_n23280_, new_n23279_, new_n6591_ ) -new_n23282_ = NOT ( new_n23281_ ) -new_n23283_ = OR ( new_n20904_, new_n14015_ ) -new_n23284_ = OR ( new_n20890_, new_n14021_ ) -new_n23285_ = NOT ( NET_535 ) -new_n23286_ = OR ( new_n14024_, new_n23285_ ) -new_n23287_ = NAND ( new_n14026_, NET_344 ) -new_n23288_ = NAND ( new_n23287_, new_n23286_, new_n23284_, new_n23283_ ) -new_n23289_ = NOR ( new_n23288_, new_n23282_ ) -new_n23290_ = XOR ( new_n23289_, new_n14020_ ) -new_n23291_ = NAND ( new_n23147_, new_n23145_, new_n23142_ ) -new_n23292_ = NAND ( new_n23291_, new_n14020_ ) -new_n23293_ = NOT ( new_n23142_ ) -new_n23294_ = NAND ( new_n23148_, new_n23293_ ) -new_n23295_ = NAND ( new_n23294_, new_n23292_ ) -new_n23296_ = XOR ( new_n23295_, new_n23290_ ) -new_n23297_ = NOR ( new_n23296_, new_n14278_ ) -new_n23298_ = NOR ( new_n20904_, new_n14281_ ) -new_n23299_ = OR ( new_n20890_, new_n14284_ ) -new_n23300_ = OR ( new_n18964_, new_n14286_ ) -new_n23301_ = NAND ( new_n14274_, new_n14273_, NET_344 ) -new_n23302_ = OR ( new_n14289_, new_n23285_ ) -new_n23303_ = NAND ( new_n23302_, new_n23301_, new_n23300_, new_n23299_ ) -NET_24006 = OR ( new_n23303_, new_n23298_, new_n23297_ ) -new_n23305_ = NOR ( new_n23296_, new_n14295_ ) -new_n23306_ = OR ( new_n20904_, new_n14297_ ) -new_n23307_ = OR ( new_n20890_, new_n14299_ ) -new_n23308_ = OR ( new_n14301_, new_n23285_ ) -new_n23309_ = OR ( new_n14294_, new_n20895_ ) -new_n23310_ = NAND ( new_n23309_, new_n23308_, new_n23307_, new_n23306_ ) -NET_24007 = OR ( new_n23310_, new_n23305_ ) -new_n23312_ = NOR ( new_n23296_, new_n14312_ ) -new_n23313_ = OR ( new_n20890_, new_n14314_ ) -new_n23314_ = OR ( new_n21710_, new_n5554_ ) -new_n23315_ = OR ( new_n19008_, new_n7297_ ) -new_n23316_ = NAND ( new_n14311_, NET_471 ) -new_n23317_ = NAND ( new_n23316_, new_n23315_, new_n23314_, new_n23313_ ) -NET_24008 = OR ( new_n23317_, new_n23312_ ) -new_n23319_ = OR ( new_n23296_, new_n20011_ ) -new_n23320_ = OR ( new_n20904_, new_n20021_ ) -new_n23321_ = OR ( new_n20890_, new_n20016_ ) -new_n23322_ = OR ( new_n20026_, new_n18967_ ) -new_n23323_ = OR ( new_n20009_, new_n23285_ ) -new_n23324_ = OR ( new_n20028_, new_n20895_ ) -new_n23325_ = AND ( new_n23324_, new_n23323_, new_n23322_ ) -NET_24009 = NAND ( new_n23325_, new_n23321_, new_n23320_, new_n23319_ ) -new_n23327_ = NAND ( new_n23033_, new_n20952_, new_n20690_ ) -new_n23328_ = NAND ( new_n23327_, new_n20972_ ) -new_n23329_ = OR ( new_n23327_, new_n20972_ ) -new_n23330_ = NAND ( new_n23329_, new_n23328_, new_n6636_ ) -new_n23331_ = NOT ( new_n23330_ ) -new_n23332_ = OR ( new_n20972_, new_n14323_ ) -new_n23333_ = OR ( new_n20958_, new_n14329_ ) -new_n23334_ = NOT ( NET_984 ) -new_n23335_ = OR ( new_n14332_, new_n23334_ ) -new_n23336_ = NAND ( new_n14334_, NET_793 ) -new_n23337_ = NAND ( new_n23336_, new_n23335_, new_n23333_, new_n23332_ ) -new_n23338_ = NOR ( new_n23337_, new_n23331_ ) -new_n23339_ = XOR ( new_n23338_, new_n14328_ ) -new_n23340_ = NAND ( new_n23196_, new_n23194_, new_n23191_ ) -new_n23341_ = NAND ( new_n23340_, new_n14328_ ) -new_n23342_ = NOT ( new_n23191_ ) -new_n23343_ = NAND ( new_n23197_, new_n23342_ ) -new_n23344_ = NAND ( new_n23343_, new_n23341_ ) -new_n23345_ = XOR ( new_n23344_, new_n23339_ ) -new_n23346_ = NOR ( new_n23345_, new_n14586_ ) -new_n23347_ = NOR ( new_n20972_, new_n14589_ ) -new_n23348_ = OR ( new_n20958_, new_n14592_ ) -new_n23349_ = OR ( new_n19368_, new_n14594_ ) -new_n23350_ = NAND ( new_n14582_, new_n14581_, NET_793 ) -new_n23351_ = OR ( new_n14597_, new_n23334_ ) -new_n23352_ = NAND ( new_n23351_, new_n23350_, new_n23349_, new_n23348_ ) -NET_24010 = OR ( new_n23352_, new_n23347_, new_n23346_ ) -new_n23354_ = NOR ( new_n23345_, new_n14603_ ) -new_n23355_ = OR ( new_n20972_, new_n14605_ ) -new_n23356_ = OR ( new_n20958_, new_n14607_ ) -new_n23357_ = OR ( new_n14609_, new_n23334_ ) -new_n23358_ = OR ( new_n14602_, new_n20963_ ) -new_n23359_ = NAND ( new_n23358_, new_n23357_, new_n23356_, new_n23355_ ) -NET_24011 = OR ( new_n23359_, new_n23354_ ) -new_n23361_ = NOR ( new_n23345_, new_n14620_ ) -new_n23362_ = OR ( new_n20958_, new_n14622_ ) -new_n23363_ = NAND ( new_n21760_, new_n5888_ ) -new_n23364_ = NAND ( new_n19412_, new_n8750_ ) -new_n23365_ = NAND ( new_n14619_, NET_920 ) -new_n23366_ = NAND ( new_n23365_, new_n23364_, new_n23363_, new_n23362_ ) -NET_24012 = OR ( new_n23366_, new_n23361_ ) -new_n23368_ = OR ( new_n23345_, new_n20060_ ) -new_n23369_ = OR ( new_n20972_, new_n20070_ ) -new_n23370_ = OR ( new_n20958_, new_n20065_ ) -new_n23371_ = OR ( new_n20075_, new_n19371_ ) -new_n23372_ = OR ( new_n20058_, new_n23334_ ) -new_n23373_ = OR ( new_n20077_, new_n20963_ ) -new_n23374_ = AND ( new_n23373_, new_n23372_, new_n23371_ ) -NET_24013 = NAND ( new_n23374_, new_n23370_, new_n23369_, new_n23368_ ) -new_n23376_ = NAND ( new_n23082_, new_n21020_, new_n20828_ ) -new_n23377_ = NAND ( new_n23376_, new_n21040_ ) -new_n23378_ = OR ( new_n23376_, new_n21040_ ) -new_n23379_ = NAND ( new_n23378_, new_n23377_, new_n6681_ ) -new_n23380_ = NOT ( new_n23379_ ) -new_n23381_ = OR ( new_n21040_, new_n14631_ ) -new_n23382_ = OR ( new_n21026_, new_n14637_ ) -new_n23383_ = NOT ( NET_1433 ) -new_n23384_ = OR ( new_n14640_, new_n23383_ ) -new_n23385_ = NAND ( new_n14642_, NET_1242 ) -new_n23386_ = NAND ( new_n23385_, new_n23384_, new_n23382_, new_n23381_ ) -new_n23387_ = NOR ( new_n23386_, new_n23380_ ) -new_n23388_ = XOR ( new_n23387_, new_n14636_ ) -new_n23389_ = NAND ( new_n23245_, new_n23243_, new_n23240_ ) -new_n23390_ = NAND ( new_n23389_, new_n14636_ ) -new_n23391_ = NOT ( new_n23240_ ) -new_n23392_ = NAND ( new_n23246_, new_n23391_ ) -new_n23393_ = NAND ( new_n23392_, new_n23390_ ) -new_n23394_ = XOR ( new_n23393_, new_n23388_ ) -new_n23395_ = NOR ( new_n23394_, new_n14894_ ) -new_n23396_ = NOR ( new_n21040_, new_n14897_ ) -new_n23397_ = OR ( new_n21026_, new_n14900_ ) -new_n23398_ = OR ( new_n19772_, new_n14902_ ) -new_n23399_ = NAND ( new_n14890_, new_n14889_, NET_1242 ) -new_n23400_ = OR ( new_n14905_, new_n23383_ ) -new_n23401_ = NAND ( new_n23400_, new_n23399_, new_n23398_, new_n23397_ ) -NET_24014 = OR ( new_n23401_, new_n23396_, new_n23395_ ) -new_n23403_ = NOR ( new_n23394_, new_n14911_ ) -new_n23404_ = OR ( new_n21040_, new_n14913_ ) -new_n23405_ = OR ( new_n21026_, new_n14915_ ) -new_n23406_ = OR ( new_n14917_, new_n23383_ ) -new_n23407_ = OR ( new_n14910_, new_n21031_ ) -new_n23408_ = NAND ( new_n23407_, new_n23406_, new_n23405_, new_n23404_ ) -NET_24015 = OR ( new_n23408_, new_n23403_ ) -new_n23410_ = NOR ( new_n23394_, new_n14928_ ) -new_n23411_ = OR ( new_n21026_, new_n14930_ ) -new_n23412_ = NAND ( new_n21811_, new_n6262_ ) -new_n23413_ = NAND ( new_n19816_, new_n10220_ ) -new_n23414_ = NAND ( new_n14927_, NET_1369 ) -new_n23415_ = NAND ( new_n23414_, new_n23413_, new_n23412_, new_n23411_ ) -NET_24016 = OR ( new_n23415_, new_n23410_ ) -new_n23417_ = OR ( new_n23394_, new_n20109_ ) -new_n23418_ = OR ( new_n21040_, new_n20119_ ) -new_n23419_ = OR ( new_n21026_, new_n20114_ ) -new_n23420_ = OR ( new_n20124_, new_n19775_ ) -new_n23421_ = OR ( new_n20107_, new_n23383_ ) -new_n23422_ = OR ( new_n20126_, new_n21031_ ) -new_n23423_ = AND ( new_n23422_, new_n23421_, new_n23420_ ) -NET_24017 = NAND ( new_n23423_, new_n23419_, new_n23418_, new_n23417_ ) -new_n23425_ = OR ( new_n23280_, new_n21068_ ) -new_n23426_ = NAND ( new_n23280_, new_n21068_ ) -new_n23427_ = NAND ( new_n23426_, new_n23425_, new_n6591_ ) -new_n23428_ = NOT ( new_n23427_ ) -new_n23429_ = OR ( new_n21068_, new_n14015_ ) -new_n23430_ = OR ( new_n21055_, new_n14021_ ) -new_n23431_ = NOT ( NET_536 ) -new_n23432_ = OR ( new_n14024_, new_n23431_ ) -new_n23433_ = NAND ( new_n14026_, NET_345 ) -new_n23434_ = NAND ( new_n23433_, new_n23432_, new_n23430_, new_n23429_ ) -new_n23435_ = NOR ( new_n23434_, new_n23428_ ) -new_n23436_ = XOR ( new_n23435_, new_n14020_ ) -new_n23437_ = NAND ( new_n23294_, new_n23292_, new_n23289_ ) -new_n23438_ = NAND ( new_n23437_, new_n14020_ ) -new_n23439_ = NOT ( new_n23289_ ) -new_n23440_ = NAND ( new_n23295_, new_n23439_ ) -new_n23441_ = NAND ( new_n23440_, new_n23438_ ) -new_n23442_ = XOR ( new_n23441_, new_n23436_ ) -new_n23443_ = NOR ( new_n23442_, new_n14278_ ) -new_n23444_ = NOR ( new_n21068_, new_n14281_ ) -new_n23445_ = OR ( new_n21055_, new_n14284_ ) -new_n23446_ = OR ( new_n18986_, new_n14286_ ) -new_n23447_ = NAND ( new_n14274_, new_n14273_, NET_345 ) -new_n23448_ = OR ( new_n14289_, new_n23431_ ) -new_n23449_ = NAND ( new_n23448_, new_n23447_, new_n23446_, new_n23445_ ) -NET_24051 = OR ( new_n23449_, new_n23444_, new_n23443_ ) -new_n23451_ = NOR ( new_n23442_, new_n14295_ ) -new_n23452_ = OR ( new_n21068_, new_n14297_ ) -new_n23453_ = OR ( new_n21055_, new_n14299_ ) -new_n23454_ = OR ( new_n14301_, new_n23431_ ) -new_n23455_ = OR ( new_n14294_, new_n21060_ ) -new_n23456_ = NAND ( new_n23455_, new_n23454_, new_n23453_, new_n23452_ ) -NET_24052 = OR ( new_n23456_, new_n23451_ ) -new_n23458_ = NOR ( new_n23442_, new_n14312_ ) -new_n23459_ = OR ( new_n21055_, new_n14314_ ) -new_n23460_ = OR ( new_n21710_, new_n5549_ ) -new_n23461_ = OR ( new_n19008_, new_n7281_ ) -new_n23462_ = NAND ( new_n14311_, NET_472 ) -new_n23463_ = NAND ( new_n23462_, new_n23461_, new_n23460_, new_n23459_ ) -NET_24053 = OR ( new_n23463_, new_n23458_ ) -new_n23465_ = OR ( new_n23442_, new_n20011_ ) -new_n23466_ = OR ( new_n21068_, new_n20021_ ) -new_n23467_ = OR ( new_n21055_, new_n20016_ ) -new_n23468_ = OR ( new_n20026_, new_n18989_ ) -new_n23469_ = OR ( new_n20009_, new_n23431_ ) -new_n23470_ = OR ( new_n20028_, new_n21060_ ) -new_n23471_ = AND ( new_n23470_, new_n23469_, new_n23468_ ) -NET_24054 = NAND ( new_n23471_, new_n23467_, new_n23466_, new_n23465_ ) -new_n23473_ = OR ( new_n23329_, new_n21088_ ) -new_n23474_ = NAND ( new_n23329_, new_n21088_ ) -new_n23475_ = NAND ( new_n23474_, new_n23473_, new_n6636_ ) -new_n23476_ = NOT ( new_n23475_ ) -new_n23477_ = OR ( new_n21088_, new_n14323_ ) -new_n23478_ = OR ( new_n21075_, new_n14329_ ) -new_n23479_ = NOT ( NET_985 ) -new_n23480_ = OR ( new_n14332_, new_n23479_ ) -new_n23481_ = NAND ( new_n14334_, NET_794 ) -new_n23482_ = NAND ( new_n23481_, new_n23480_, new_n23478_, new_n23477_ ) -new_n23483_ = NOR ( new_n23482_, new_n23476_ ) -new_n23484_ = XOR ( new_n23483_, new_n14328_ ) -new_n23485_ = NAND ( new_n23343_, new_n23341_, new_n23338_ ) -new_n23486_ = NAND ( new_n23485_, new_n14328_ ) -new_n23487_ = NOT ( new_n23338_ ) -new_n23488_ = NAND ( new_n23344_, new_n23487_ ) -new_n23489_ = NAND ( new_n23488_, new_n23486_ ) -new_n23490_ = XOR ( new_n23489_, new_n23484_ ) -new_n23491_ = NOR ( new_n23490_, new_n14586_ ) -new_n23492_ = NOR ( new_n21088_, new_n14589_ ) -new_n23493_ = OR ( new_n21075_, new_n14592_ ) -new_n23494_ = OR ( new_n19390_, new_n14594_ ) -new_n23495_ = NAND ( new_n14582_, new_n14581_, NET_794 ) -new_n23496_ = OR ( new_n14597_, new_n23479_ ) -new_n23497_ = NAND ( new_n23496_, new_n23495_, new_n23494_, new_n23493_ ) -NET_24055 = OR ( new_n23497_, new_n23492_, new_n23491_ ) -new_n23499_ = NOR ( new_n23490_, new_n14603_ ) -new_n23500_ = OR ( new_n21088_, new_n14605_ ) -new_n23501_ = OR ( new_n21075_, new_n14607_ ) -new_n23502_ = OR ( new_n14609_, new_n23479_ ) -new_n23503_ = OR ( new_n14602_, new_n21080_ ) -new_n23504_ = NAND ( new_n23503_, new_n23502_, new_n23501_, new_n23500_ ) -NET_24056 = OR ( new_n23504_, new_n23499_ ) -new_n23506_ = NOR ( new_n23490_, new_n14620_ ) -new_n23507_ = OR ( new_n21075_, new_n14622_ ) -new_n23508_ = NAND ( new_n21760_, new_n5881_ ) -new_n23509_ = NAND ( new_n19412_, new_n8729_ ) -new_n23510_ = NAND ( new_n14619_, NET_921 ) -new_n23511_ = NAND ( new_n23510_, new_n23509_, new_n23508_, new_n23507_ ) -NET_24057 = OR ( new_n23511_, new_n23506_ ) -new_n23513_ = OR ( new_n23490_, new_n20060_ ) -new_n23514_ = OR ( new_n21088_, new_n20070_ ) -new_n23515_ = OR ( new_n21075_, new_n20065_ ) -new_n23516_ = OR ( new_n20075_, new_n19393_ ) -new_n23517_ = OR ( new_n20058_, new_n23479_ ) -new_n23518_ = OR ( new_n20077_, new_n21080_ ) -new_n23519_ = AND ( new_n23518_, new_n23517_, new_n23516_ ) -NET_24058 = NAND ( new_n23519_, new_n23515_, new_n23514_, new_n23513_ ) -new_n23521_ = OR ( new_n23378_, new_n21108_ ) -new_n23522_ = NAND ( new_n23378_, new_n21108_ ) -new_n23523_ = NAND ( new_n23522_, new_n23521_, new_n6681_ ) -new_n23524_ = NOT ( new_n23523_ ) -new_n23525_ = OR ( new_n21108_, new_n14631_ ) -new_n23526_ = OR ( new_n21095_, new_n14637_ ) -new_n23527_ = NOT ( NET_1434 ) -new_n23528_ = OR ( new_n14640_, new_n23527_ ) -new_n23529_ = NAND ( new_n14642_, NET_1243 ) -new_n23530_ = NAND ( new_n23529_, new_n23528_, new_n23526_, new_n23525_ ) -new_n23531_ = NOR ( new_n23530_, new_n23524_ ) -new_n23532_ = XOR ( new_n23531_, new_n14636_ ) -new_n23533_ = NAND ( new_n23392_, new_n23390_, new_n23387_ ) -new_n23534_ = NAND ( new_n23533_, new_n14636_ ) -new_n23535_ = NOT ( new_n23387_ ) -new_n23536_ = NAND ( new_n23393_, new_n23535_ ) -new_n23537_ = NAND ( new_n23536_, new_n23534_ ) -new_n23538_ = XOR ( new_n23537_, new_n23532_ ) -new_n23539_ = NOR ( new_n23538_, new_n14894_ ) -new_n23540_ = NOR ( new_n21108_, new_n14897_ ) -new_n23541_ = OR ( new_n21095_, new_n14900_ ) -new_n23542_ = OR ( new_n19794_, new_n14902_ ) -new_n23543_ = NAND ( new_n14890_, new_n14889_, NET_1243 ) -new_n23544_ = OR ( new_n14905_, new_n23527_ ) -new_n23545_ = NAND ( new_n23544_, new_n23543_, new_n23542_, new_n23541_ ) -NET_24059 = OR ( new_n23545_, new_n23540_, new_n23539_ ) -new_n23547_ = NOR ( new_n23538_, new_n14911_ ) -new_n23548_ = OR ( new_n21108_, new_n14913_ ) -new_n23549_ = OR ( new_n21095_, new_n14915_ ) -new_n23550_ = OR ( new_n14917_, new_n23527_ ) -new_n23551_ = OR ( new_n14910_, new_n21100_ ) -new_n23552_ = NAND ( new_n23551_, new_n23550_, new_n23549_, new_n23548_ ) -NET_24060 = OR ( new_n23552_, new_n23547_ ) -new_n23554_ = NOR ( new_n23538_, new_n14928_ ) -new_n23555_ = OR ( new_n21095_, new_n14930_ ) -new_n23556_ = NAND ( new_n21811_, new_n6254_ ) -new_n23557_ = NAND ( new_n19816_, new_n10199_ ) -new_n23558_ = NAND ( new_n14927_, NET_1370 ) -new_n23559_ = NAND ( new_n23558_, new_n23557_, new_n23556_, new_n23555_ ) -NET_24061 = OR ( new_n23559_, new_n23554_ ) -new_n23561_ = OR ( new_n23538_, new_n20109_ ) -new_n23562_ = OR ( new_n21108_, new_n20119_ ) -new_n23563_ = OR ( new_n21095_, new_n20114_ ) -new_n23564_ = OR ( new_n20124_, new_n19797_ ) -new_n23565_ = OR ( new_n20107_, new_n23527_ ) -new_n23566_ = OR ( new_n20126_, new_n21100_ ) -new_n23567_ = AND ( new_n23566_, new_n23565_, new_n23564_ ) -NET_24062 = NAND ( new_n23567_, new_n23563_, new_n23562_, new_n23561_ ) -new_n23569_ = NOT ( new_n21168_ ) -new_n23570_ = OR ( new_n23425_, new_n23569_ ) -new_n23571_ = NAND ( new_n23425_, new_n23569_ ) -new_n23572_ = NAND ( new_n23571_, new_n23570_, new_n6591_ ) -new_n23573_ = NAND ( new_n21168_, new_n14014_ ) -new_n23574_ = OR ( new_n21156_, new_n14021_ ) -new_n23575_ = NOT ( NET_537 ) -new_n23576_ = OR ( new_n14024_, new_n23575_ ) -new_n23577_ = NAND ( new_n14026_, NET_346 ) -new_n23578_ = AND ( new_n23577_, new_n23576_, new_n23574_ ) -new_n23579_ = NAND ( new_n23578_, new_n23573_, new_n23572_ ) -new_n23580_ = XOR ( new_n23579_, new_n14021_ ) -new_n23581_ = NAND ( new_n23440_, new_n23438_, new_n23435_ ) -new_n23582_ = NAND ( new_n23581_, new_n14020_ ) -new_n23583_ = NOT ( new_n23435_ ) -new_n23584_ = NAND ( new_n23441_, new_n23583_ ) -new_n23585_ = NAND ( new_n23584_, new_n23582_ ) -new_n23586_ = XOR ( new_n23585_, new_n23580_ ) -new_n23587_ = NOR ( new_n23586_, new_n14278_ ) -new_n23588_ = NOR ( new_n23569_, new_n14281_ ) -new_n23589_ = OR ( new_n21156_, new_n14284_ ) -new_n23590_ = OR ( new_n18975_, new_n14286_ ) -new_n23591_ = NAND ( new_n14274_, new_n14273_, NET_346 ) -new_n23592_ = OR ( new_n14289_, new_n23575_ ) -new_n23593_ = NAND ( new_n23592_, new_n23591_, new_n23590_, new_n23589_ ) -NET_24108 = OR ( new_n23593_, new_n23588_, new_n23587_ ) -new_n23595_ = NOR ( new_n23586_, new_n14295_ ) -new_n23596_ = NAND ( new_n21168_, new_n16282_ ) -new_n23597_ = OR ( new_n21156_, new_n14299_ ) -new_n23598_ = OR ( new_n14301_, new_n23575_ ) -new_n23599_ = OR ( new_n14294_, new_n21161_ ) -new_n23600_ = NAND ( new_n23599_, new_n23598_, new_n23597_, new_n23596_ ) -NET_24109 = OR ( new_n23600_, new_n23595_ ) -new_n23602_ = NOR ( new_n23586_, new_n14312_ ) -new_n23603_ = OR ( new_n21156_, new_n14314_ ) -new_n23604_ = OR ( new_n21710_, new_n5544_ ) -new_n23605_ = OR ( new_n19008_, new_n7265_ ) -new_n23606_ = NAND ( new_n14311_, NET_473 ) -new_n23607_ = NAND ( new_n23606_, new_n23605_, new_n23604_, new_n23603_ ) -NET_24110 = OR ( new_n23607_, new_n23602_ ) -new_n23609_ = OR ( new_n23586_, new_n20011_ ) -new_n23610_ = NAND ( new_n21168_, new_n20020_ ) -new_n23611_ = OR ( new_n21156_, new_n20016_ ) -new_n23612_ = OR ( new_n20026_, new_n18978_ ) -new_n23613_ = OR ( new_n20009_, new_n23575_ ) -new_n23614_ = OR ( new_n20028_, new_n21161_ ) -new_n23615_ = AND ( new_n23614_, new_n23613_, new_n23612_ ) -NET_24111 = NAND ( new_n23615_, new_n23611_, new_n23610_, new_n23609_ ) -new_n23617_ = NOT ( new_n21236_ ) -new_n23618_ = OR ( new_n23473_, new_n23617_ ) -new_n23619_ = NAND ( new_n23473_, new_n23617_ ) -new_n23620_ = NAND ( new_n23619_, new_n23618_, new_n6636_ ) -new_n23621_ = NAND ( new_n21236_, new_n14322_ ) -new_n23622_ = OR ( new_n21224_, new_n14329_ ) -new_n23623_ = NOT ( NET_986 ) -new_n23624_ = OR ( new_n14332_, new_n23623_ ) -new_n23625_ = NAND ( new_n14334_, NET_795 ) -new_n23626_ = AND ( new_n23625_, new_n23624_, new_n23622_ ) -new_n23627_ = NAND ( new_n23626_, new_n23621_, new_n23620_ ) -new_n23628_ = XOR ( new_n23627_, new_n14329_ ) -new_n23629_ = NAND ( new_n23488_, new_n23486_, new_n23483_ ) -new_n23630_ = NAND ( new_n23629_, new_n14328_ ) -new_n23631_ = NOT ( new_n23483_ ) -new_n23632_ = NAND ( new_n23489_, new_n23631_ ) -new_n23633_ = NAND ( new_n23632_, new_n23630_ ) -new_n23634_ = XOR ( new_n23633_, new_n23628_ ) -new_n23635_ = NOR ( new_n23634_, new_n14586_ ) -new_n23636_ = NOR ( new_n23617_, new_n14589_ ) -new_n23637_ = OR ( new_n21224_, new_n14592_ ) -new_n23638_ = OR ( new_n19379_, new_n14594_ ) -new_n23639_ = NAND ( new_n14582_, new_n14581_, NET_795 ) -new_n23640_ = OR ( new_n14597_, new_n23623_ ) -new_n23641_ = NAND ( new_n23640_, new_n23639_, new_n23638_, new_n23637_ ) -NET_24112 = OR ( new_n23641_, new_n23636_, new_n23635_ ) -new_n23643_ = NOR ( new_n23634_, new_n14603_ ) -new_n23644_ = NAND ( new_n21236_, new_n16389_ ) -new_n23645_ = OR ( new_n21224_, new_n14607_ ) -new_n23646_ = OR ( new_n14609_, new_n23623_ ) -new_n23647_ = OR ( new_n14602_, new_n21229_ ) -new_n23648_ = NAND ( new_n23647_, new_n23646_, new_n23645_, new_n23644_ ) -NET_24113 = OR ( new_n23648_, new_n23643_ ) -new_n23650_ = NOR ( new_n23634_, new_n14620_ ) -new_n23651_ = OR ( new_n21224_, new_n14622_ ) -new_n23652_ = NAND ( new_n21760_, new_n5874_ ) -new_n23653_ = NAND ( new_n19412_, new_n8708_ ) -new_n23654_ = NAND ( new_n14619_, NET_922 ) -new_n23655_ = NAND ( new_n23654_, new_n23653_, new_n23652_, new_n23651_ ) -NET_24114 = OR ( new_n23655_, new_n23650_ ) -new_n23657_ = OR ( new_n23634_, new_n20060_ ) -new_n23658_ = NAND ( new_n21236_, new_n20069_ ) -new_n23659_ = OR ( new_n21224_, new_n20065_ ) -new_n23660_ = OR ( new_n20075_, new_n19382_ ) -new_n23661_ = OR ( new_n20058_, new_n23623_ ) -new_n23662_ = OR ( new_n20077_, new_n21229_ ) -new_n23663_ = AND ( new_n23662_, new_n23661_, new_n23660_ ) -NET_24115 = NAND ( new_n23663_, new_n23659_, new_n23658_, new_n23657_ ) -new_n23665_ = NOT ( new_n21304_ ) -new_n23666_ = OR ( new_n23521_, new_n23665_ ) -new_n23667_ = NAND ( new_n23521_, new_n23665_ ) -new_n23668_ = NAND ( new_n23667_, new_n23666_, new_n6681_ ) -new_n23669_ = NAND ( new_n21304_, new_n14630_ ) -new_n23670_ = OR ( new_n21292_, new_n14637_ ) -new_n23671_ = NOT ( NET_1435 ) -new_n23672_ = OR ( new_n14640_, new_n23671_ ) -new_n23673_ = NAND ( new_n14642_, NET_1244 ) -new_n23674_ = AND ( new_n23673_, new_n23672_, new_n23670_ ) -new_n23675_ = NAND ( new_n23674_, new_n23669_, new_n23668_ ) -new_n23676_ = XOR ( new_n23675_, new_n14637_ ) -new_n23677_ = NAND ( new_n23536_, new_n23534_, new_n23531_ ) -new_n23678_ = NAND ( new_n23677_, new_n14636_ ) -new_n23679_ = NOT ( new_n23531_ ) -new_n23680_ = NAND ( new_n23537_, new_n23679_ ) -new_n23681_ = NAND ( new_n23680_, new_n23678_ ) -new_n23682_ = XOR ( new_n23681_, new_n23676_ ) -new_n23683_ = NOR ( new_n23682_, new_n14894_ ) -new_n23684_ = NOR ( new_n23665_, new_n14897_ ) -new_n23685_ = OR ( new_n21292_, new_n14900_ ) -new_n23686_ = OR ( new_n19783_, new_n14902_ ) -new_n23687_ = NAND ( new_n14890_, new_n14889_, NET_1244 ) -new_n23688_ = OR ( new_n14905_, new_n23671_ ) -new_n23689_ = NAND ( new_n23688_, new_n23687_, new_n23686_, new_n23685_ ) -NET_24116 = OR ( new_n23689_, new_n23684_, new_n23683_ ) -new_n23691_ = NOR ( new_n23682_, new_n14911_ ) -new_n23692_ = NAND ( new_n21304_, new_n16496_ ) -new_n23693_ = OR ( new_n21292_, new_n14915_ ) -new_n23694_ = OR ( new_n14917_, new_n23671_ ) -new_n23695_ = OR ( new_n14910_, new_n21297_ ) -new_n23696_ = NAND ( new_n23695_, new_n23694_, new_n23693_, new_n23692_ ) -NET_24117 = OR ( new_n23696_, new_n23691_ ) -new_n23698_ = NOR ( new_n23682_, new_n14928_ ) -new_n23699_ = OR ( new_n21292_, new_n14930_ ) -new_n23700_ = NAND ( new_n21811_, new_n6246_ ) -new_n23701_ = NAND ( new_n19816_, new_n10178_ ) -new_n23702_ = NAND ( new_n14927_, NET_1371 ) -new_n23703_ = NAND ( new_n23702_, new_n23701_, new_n23700_, new_n23699_ ) -NET_24118 = OR ( new_n23703_, new_n23698_ ) -new_n23705_ = OR ( new_n23682_, new_n20109_ ) -new_n23706_ = NAND ( new_n21304_, new_n20118_ ) -new_n23707_ = OR ( new_n21292_, new_n20114_ ) -new_n23708_ = OR ( new_n20124_, new_n19786_ ) -new_n23709_ = OR ( new_n20107_, new_n23671_ ) -new_n23710_ = OR ( new_n20126_, new_n21297_ ) -new_n23711_ = AND ( new_n23710_, new_n23709_, new_n23708_ ) -NET_24119 = NAND ( new_n23711_, new_n23707_, new_n23706_, new_n23705_ ) -new_n23713_ = NAND ( new_n23570_, new_n21327_ ) -new_n23714_ = OR ( new_n23570_, new_n21327_ ) -new_n23715_ = NAND ( new_n23714_, new_n23713_, new_n6591_ ) -new_n23716_ = OR ( new_n21327_, new_n14015_ ) -new_n23717_ = OR ( new_n21317_, new_n14021_ ) -new_n23718_ = NOT ( NET_538 ) -new_n23719_ = OR ( new_n14024_, new_n23718_ ) -new_n23720_ = NAND ( new_n14026_, NET_347 ) -new_n23721_ = AND ( new_n23720_, new_n23719_, new_n23717_ ) -new_n23722_ = AND ( new_n23721_, new_n23716_, new_n23715_ ) -new_n23723_ = XOR ( new_n23722_, new_n14021_ ) -new_n23724_ = NAND ( new_n23585_, new_n23579_ ) -new_n23725_ = NAND ( new_n23724_, new_n14021_ ) -new_n23726_ = OR ( new_n23585_, new_n23579_ ) -new_n23727_ = NAND ( new_n23726_, new_n23725_ ) -new_n23728_ = XOR ( new_n23727_, new_n23723_ ) -new_n23729_ = NOR ( new_n23728_, new_n14278_ ) -new_n23730_ = NOR ( new_n21327_, new_n14281_ ) -new_n23731_ = OR ( new_n21317_, new_n14284_ ) -new_n23732_ = OR ( new_n18890_, new_n14286_ ) -new_n23733_ = NAND ( new_n14274_, new_n14273_, NET_347 ) -new_n23734_ = OR ( new_n14289_, new_n23718_ ) -new_n23735_ = NAND ( new_n23734_, new_n23733_, new_n23732_, new_n23731_ ) -NET_24153 = OR ( new_n23735_, new_n23730_, new_n23729_ ) -new_n23737_ = NOR ( new_n23728_, new_n14295_ ) -new_n23738_ = OR ( new_n21327_, new_n14297_ ) -new_n23739_ = OR ( new_n21317_, new_n14299_ ) -new_n23740_ = OR ( new_n14301_, new_n23718_ ) -new_n23741_ = OR ( new_n14294_, new_n21322_ ) -new_n23742_ = NAND ( new_n23741_, new_n23740_, new_n23739_, new_n23738_ ) -NET_24154 = OR ( new_n23742_, new_n23737_ ) -new_n23744_ = NOR ( new_n23728_, new_n14312_ ) -new_n23745_ = OR ( new_n21317_, new_n14314_ ) -new_n23746_ = OR ( new_n21710_, new_n5539_ ) -new_n23747_ = OR ( new_n19008_, new_n7248_ ) -new_n23748_ = NAND ( new_n14311_, NET_474 ) -new_n23749_ = NAND ( new_n23748_, new_n23747_, new_n23746_, new_n23745_ ) -NET_24155 = OR ( new_n23749_, new_n23744_ ) -new_n23751_ = OR ( new_n23728_, new_n20011_ ) -new_n23752_ = OR ( new_n21327_, new_n20021_ ) -new_n23753_ = OR ( new_n21317_, new_n20016_ ) -new_n23754_ = OR ( new_n20026_, new_n18893_ ) -new_n23755_ = OR ( new_n20009_, new_n23718_ ) -new_n23756_ = OR ( new_n20028_, new_n21322_ ) -new_n23757_ = AND ( new_n23756_, new_n23755_, new_n23754_ ) -NET_24156 = NAND ( new_n23757_, new_n23753_, new_n23752_, new_n23751_ ) -new_n23759_ = NAND ( new_n23618_, new_n21342_ ) -new_n23760_ = OR ( new_n23618_, new_n21342_ ) -new_n23761_ = NAND ( new_n23760_, new_n23759_, new_n6636_ ) -new_n23762_ = OR ( new_n21342_, new_n14323_ ) -new_n23763_ = OR ( new_n21332_, new_n14329_ ) -new_n23764_ = NOT ( NET_987 ) -new_n23765_ = OR ( new_n14332_, new_n23764_ ) -new_n23766_ = NAND ( new_n14334_, NET_796 ) -new_n23767_ = AND ( new_n23766_, new_n23765_, new_n23763_ ) -new_n23768_ = AND ( new_n23767_, new_n23762_, new_n23761_ ) -new_n23769_ = XOR ( new_n23768_, new_n14329_ ) -new_n23770_ = NAND ( new_n23633_, new_n23627_ ) -new_n23771_ = NAND ( new_n23770_, new_n14329_ ) -new_n23772_ = OR ( new_n23633_, new_n23627_ ) -new_n23773_ = NAND ( new_n23772_, new_n23771_ ) -new_n23774_ = XOR ( new_n23773_, new_n23769_ ) -new_n23775_ = NOR ( new_n23774_, new_n14586_ ) -new_n23776_ = NOR ( new_n21342_, new_n14589_ ) -new_n23777_ = OR ( new_n21332_, new_n14592_ ) -new_n23778_ = OR ( new_n19294_, new_n14594_ ) -new_n23779_ = NAND ( new_n14582_, new_n14581_, NET_796 ) -new_n23780_ = OR ( new_n14597_, new_n23764_ ) -new_n23781_ = NAND ( new_n23780_, new_n23779_, new_n23778_, new_n23777_ ) -NET_24157 = OR ( new_n23781_, new_n23776_, new_n23775_ ) -new_n23783_ = NOR ( new_n23774_, new_n14603_ ) -new_n23784_ = OR ( new_n21342_, new_n14605_ ) -new_n23785_ = OR ( new_n21332_, new_n14607_ ) -new_n23786_ = OR ( new_n14609_, new_n23764_ ) -new_n23787_ = OR ( new_n14602_, new_n21337_ ) -new_n23788_ = NAND ( new_n23787_, new_n23786_, new_n23785_, new_n23784_ ) -NET_24158 = OR ( new_n23788_, new_n23783_ ) -new_n23790_ = NOR ( new_n23774_, new_n14620_ ) -new_n23791_ = OR ( new_n21332_, new_n14622_ ) -new_n23792_ = NAND ( new_n21760_, new_n5867_ ) -new_n23793_ = NAND ( new_n19412_, new_n8687_ ) -new_n23794_ = NAND ( new_n14619_, NET_923 ) -new_n23795_ = NAND ( new_n23794_, new_n23793_, new_n23792_, new_n23791_ ) -NET_24159 = OR ( new_n23795_, new_n23790_ ) -new_n23797_ = OR ( new_n23774_, new_n20060_ ) -new_n23798_ = OR ( new_n21342_, new_n20070_ ) -new_n23799_ = OR ( new_n21332_, new_n20065_ ) -new_n23800_ = OR ( new_n20075_, new_n19297_ ) -new_n23801_ = OR ( new_n20058_, new_n23764_ ) -new_n23802_ = OR ( new_n20077_, new_n21337_ ) -new_n23803_ = AND ( new_n23802_, new_n23801_, new_n23800_ ) -NET_24160 = NAND ( new_n23803_, new_n23799_, new_n23798_, new_n23797_ ) -new_n23805_ = NAND ( new_n23666_, new_n21357_ ) -new_n23806_ = OR ( new_n23666_, new_n21357_ ) -new_n23807_ = NAND ( new_n23806_, new_n23805_, new_n6681_ ) -new_n23808_ = OR ( new_n21357_, new_n14631_ ) -new_n23809_ = OR ( new_n21347_, new_n14637_ ) -new_n23810_ = NOT ( NET_1436 ) -new_n23811_ = OR ( new_n14640_, new_n23810_ ) -new_n23812_ = NAND ( new_n14642_, NET_1245 ) -new_n23813_ = AND ( new_n23812_, new_n23811_, new_n23809_ ) -new_n23814_ = AND ( new_n23813_, new_n23808_, new_n23807_ ) -new_n23815_ = XOR ( new_n23814_, new_n14637_ ) -new_n23816_ = NAND ( new_n23681_, new_n23675_ ) -new_n23817_ = NAND ( new_n23816_, new_n14637_ ) -new_n23818_ = OR ( new_n23681_, new_n23675_ ) -new_n23819_ = NAND ( new_n23818_, new_n23817_ ) -new_n23820_ = XOR ( new_n23819_, new_n23815_ ) -new_n23821_ = NOR ( new_n23820_, new_n14894_ ) -new_n23822_ = NOR ( new_n21357_, new_n14897_ ) -new_n23823_ = OR ( new_n21347_, new_n14900_ ) -new_n23824_ = OR ( new_n19698_, new_n14902_ ) -new_n23825_ = NAND ( new_n14890_, new_n14889_, NET_1245 ) -new_n23826_ = OR ( new_n14905_, new_n23810_ ) -new_n23827_ = NAND ( new_n23826_, new_n23825_, new_n23824_, new_n23823_ ) -NET_24161 = OR ( new_n23827_, new_n23822_, new_n23821_ ) -new_n23829_ = NOR ( new_n23820_, new_n14911_ ) -new_n23830_ = OR ( new_n21357_, new_n14913_ ) -new_n23831_ = OR ( new_n21347_, new_n14915_ ) -new_n23832_ = OR ( new_n14917_, new_n23810_ ) -new_n23833_ = OR ( new_n14910_, new_n21352_ ) -new_n23834_ = NAND ( new_n23833_, new_n23832_, new_n23831_, new_n23830_ ) -NET_24162 = OR ( new_n23834_, new_n23829_ ) -new_n23836_ = NOR ( new_n23820_, new_n14928_ ) -new_n23837_ = OR ( new_n21347_, new_n14930_ ) -new_n23838_ = NAND ( new_n21811_, new_n6238_ ) -new_n23839_ = NAND ( new_n19816_, new_n10157_ ) -new_n23840_ = NAND ( new_n14927_, NET_1372 ) -new_n23841_ = NAND ( new_n23840_, new_n23839_, new_n23838_, new_n23837_ ) -NET_24163 = OR ( new_n23841_, new_n23836_ ) -new_n23843_ = OR ( new_n23820_, new_n20109_ ) -new_n23844_ = OR ( new_n21357_, new_n20119_ ) -new_n23845_ = OR ( new_n21347_, new_n20114_ ) -new_n23846_ = OR ( new_n20124_, new_n19701_ ) -new_n23847_ = OR ( new_n20107_, new_n23810_ ) -new_n23848_ = OR ( new_n20126_, new_n21352_ ) -new_n23849_ = AND ( new_n23848_, new_n23847_, new_n23846_ ) -NET_24164 = NAND ( new_n23849_, new_n23845_, new_n23844_, new_n23843_ ) -new_n23851_ = OR ( new_n23727_, new_n23722_ ) -new_n23852_ = NAND ( new_n23851_, new_n14021_ ) -new_n23853_ = NAND ( new_n23727_, new_n23722_ ) -new_n23854_ = NAND ( new_n19005_, new_n6695_ ) -new_n23855_ = NAND ( new_n11740_, NET_348 ) -new_n23856_ = NOT ( NET_380 ) -new_n23857_ = OR ( new_n6828_, new_n23856_ ) -new_n23858_ = NAND ( new_n5529_, NET_539 ) -new_n23859_ = NAND ( new_n23858_, new_n23857_, new_n23855_, new_n23854_ ) -new_n23860_ = XNOR ( new_n23859_, new_n6707_ ) -new_n23861_ = NAND ( new_n21326_, new_n21165_, new_n21067_ ) -new_n23862_ = XNOR ( new_n23861_, new_n23860_ ) -new_n23863_ = NAND ( new_n23862_, new_n14014_ ) -new_n23864_ = NAND ( new_n19005_, new_n14020_ ) -new_n23865_ = NAND ( new_n14026_, NET_348 ) -new_n23866_ = NOT ( NET_539 ) -new_n23867_ = OR ( new_n14024_, new_n23866_ ) -new_n23868_ = NAND ( new_n23867_, new_n23865_, new_n23864_, new_n23863_ ) -new_n23869_ = NAND ( new_n23868_, new_n23853_, new_n23852_ ) -new_n23870_ = NOT ( new_n23868_ ) -new_n23871_ = NAND ( new_n23853_, new_n14020_ ) -new_n23872_ = NAND ( new_n23871_, new_n23870_, new_n23851_ ) -new_n23873_ = NAND ( new_n23872_, new_n23869_ ) -new_n23874_ = XNOR ( new_n23873_, new_n14021_ ) -new_n23875_ = NOR ( new_n23874_, new_n14278_ ) -new_n23876_ = AND ( new_n23862_, new_n14280_, new_n14276_ ) -new_n23877_ = OR ( new_n19006_, new_n14284_ ) -new_n23878_ = NOT ( NET_348 ) -new_n23879_ = NOR ( new_n3179_, new_n23878_ ) -new_n23880_ = NAND ( new_n23879_, new_n18888_ ) -new_n23881_ = OR ( new_n23879_, new_n18888_ ) -new_n23882_ = NAND ( new_n23881_, new_n23880_, new_n14944_ ) -new_n23883_ = OR ( new_n14275_, new_n23878_ ) -new_n23884_ = OR ( new_n14289_, new_n23866_ ) -new_n23885_ = NAND ( new_n23884_, new_n23883_, new_n23882_, new_n23877_ ) -NET_24186 = OR ( new_n23885_, new_n23876_, new_n23875_ ) -new_n23887_ = NOR ( new_n23874_, new_n14295_ ) -new_n23888_ = NAND ( new_n23862_, new_n16282_ ) -new_n23889_ = OR ( new_n19006_, new_n14299_ ) -new_n23890_ = OR ( new_n14301_, new_n23866_ ) -new_n23891_ = OR ( new_n14294_, new_n23856_ ) -new_n23892_ = NAND ( new_n23891_, new_n23890_, new_n23889_, new_n23888_ ) -NET_24187 = OR ( new_n23892_, new_n23887_ ) -new_n23894_ = OR ( new_n23874_, new_n20011_ ) -new_n23895_ = NAND ( new_n23862_, new_n20020_ ) -new_n23896_ = NAND ( new_n20015_, new_n19005_ ) -new_n23897_ = OR ( new_n20026_, new_n3221_ ) -new_n23898_ = OR ( new_n20009_, new_n23866_ ) -new_n23899_ = OR ( new_n20028_, new_n23856_ ) -new_n23900_ = AND ( new_n23899_, new_n23898_, new_n23897_ ) -NET_24188 = NAND ( new_n23900_, new_n23896_, new_n23895_, new_n23894_ ) -new_n23902_ = OR ( new_n23773_, new_n23768_ ) -new_n23903_ = NAND ( new_n23902_, new_n14329_ ) -new_n23904_ = NAND ( new_n23773_, new_n23768_ ) -new_n23905_ = NAND ( new_n19409_, new_n6855_ ) -new_n23906_ = NAND ( new_n11808_, NET_797 ) -new_n23907_ = NOT ( NET_829 ) -new_n23908_ = OR ( new_n6988_, new_n23907_ ) -new_n23909_ = NAND ( new_n5827_, NET_988 ) -new_n23910_ = NAND ( new_n23909_, new_n23908_, new_n23906_, new_n23905_ ) -new_n23911_ = XNOR ( new_n23910_, new_n6867_ ) -new_n23912_ = NAND ( new_n21341_, new_n21233_, new_n21087_ ) -new_n23913_ = XNOR ( new_n23912_, new_n23911_ ) -new_n23914_ = NAND ( new_n23913_, new_n14322_ ) -new_n23915_ = NAND ( new_n19409_, new_n14328_ ) -new_n23916_ = NAND ( new_n14334_, NET_797 ) -new_n23917_ = NOT ( NET_988 ) -new_n23918_ = OR ( new_n14332_, new_n23917_ ) -new_n23919_ = NAND ( new_n23918_, new_n23916_, new_n23915_, new_n23914_ ) -new_n23920_ = NAND ( new_n23919_, new_n23904_, new_n23903_ ) -new_n23921_ = NOT ( new_n23919_ ) -new_n23922_ = NAND ( new_n23904_, new_n14328_ ) -new_n23923_ = NAND ( new_n23922_, new_n23921_, new_n23902_ ) -new_n23924_ = NAND ( new_n23923_, new_n23920_ ) -new_n23925_ = XNOR ( new_n23924_, new_n14329_ ) -new_n23926_ = NOR ( new_n23925_, new_n14586_ ) -new_n23927_ = AND ( new_n23913_, new_n14588_, new_n14584_ ) -new_n23928_ = OR ( new_n19410_, new_n14592_ ) -new_n23929_ = NOT ( NET_797 ) -new_n23930_ = NOR ( new_n3924_, new_n23929_ ) -new_n23931_ = NAND ( new_n23930_, new_n19292_ ) -new_n23932_ = OR ( new_n23930_, new_n19292_ ) -new_n23933_ = NAND ( new_n23932_, new_n23931_, new_n15028_ ) -new_n23934_ = OR ( new_n14583_, new_n23929_ ) -new_n23935_ = OR ( new_n14597_, new_n23917_ ) -new_n23936_ = NAND ( new_n23935_, new_n23934_, new_n23933_, new_n23928_ ) -NET_24189 = OR ( new_n23936_, new_n23927_, new_n23926_ ) -new_n23938_ = NOR ( new_n23925_, new_n14603_ ) -new_n23939_ = NAND ( new_n23913_, new_n16389_ ) -new_n23940_ = OR ( new_n19410_, new_n14607_ ) -new_n23941_ = OR ( new_n14609_, new_n23917_ ) -new_n23942_ = OR ( new_n14602_, new_n23907_ ) -new_n23943_ = NAND ( new_n23942_, new_n23941_, new_n23940_, new_n23939_ ) -NET_24190 = OR ( new_n23943_, new_n23938_ ) -new_n23945_ = OR ( new_n23925_, new_n20060_ ) -new_n23946_ = NAND ( new_n23913_, new_n20069_ ) -new_n23947_ = NAND ( new_n20064_, new_n19409_ ) -new_n23948_ = OR ( new_n20075_, new_n3966_ ) -new_n23949_ = OR ( new_n20058_, new_n23917_ ) -new_n23950_ = OR ( new_n20077_, new_n23907_ ) -new_n23951_ = AND ( new_n23950_, new_n23949_, new_n23948_ ) -NET_24191 = NAND ( new_n23951_, new_n23947_, new_n23946_, new_n23945_ ) -new_n23953_ = OR ( new_n23819_, new_n23814_ ) -new_n23954_ = NAND ( new_n23953_, new_n14637_ ) -new_n23955_ = NAND ( new_n23819_, new_n23814_ ) -new_n23956_ = NAND ( new_n19813_, new_n7015_ ) -new_n23957_ = NAND ( new_n11876_, NET_1246 ) -new_n23958_ = NOT ( NET_1278 ) -new_n23959_ = OR ( new_n7148_, new_n23958_ ) -new_n23960_ = NAND ( new_n6196_, NET_1437 ) -new_n23961_ = NAND ( new_n23960_, new_n23959_, new_n23957_, new_n23956_ ) -new_n23962_ = XNOR ( new_n23961_, new_n7027_ ) -new_n23963_ = NAND ( new_n21356_, new_n21301_, new_n21107_ ) -new_n23964_ = XNOR ( new_n23963_, new_n23962_ ) -new_n23965_ = NAND ( new_n23964_, new_n14630_ ) -new_n23966_ = NAND ( new_n19813_, new_n14636_ ) -new_n23967_ = NAND ( new_n14642_, NET_1246 ) -new_n23968_ = NOT ( NET_1437 ) -new_n23969_ = OR ( new_n14640_, new_n23968_ ) -new_n23970_ = NAND ( new_n23969_, new_n23967_, new_n23966_, new_n23965_ ) -new_n23971_ = NAND ( new_n23970_, new_n23955_, new_n23954_ ) -new_n23972_ = NOT ( new_n23970_ ) -new_n23973_ = NAND ( new_n23955_, new_n14636_ ) -new_n23974_ = NAND ( new_n23973_, new_n23972_, new_n23953_ ) -new_n23975_ = NAND ( new_n23974_, new_n23971_ ) -new_n23976_ = XNOR ( new_n23975_, new_n14637_ ) -new_n23977_ = NOR ( new_n23976_, new_n14894_ ) -new_n23978_ = AND ( new_n23964_, new_n14896_, new_n14892_ ) -new_n23979_ = OR ( new_n19814_, new_n14900_ ) -new_n23980_ = NOT ( NET_1246 ) -new_n23981_ = NOR ( new_n4668_, new_n23980_ ) -new_n23982_ = NAND ( new_n23981_, new_n19696_ ) -new_n23983_ = OR ( new_n23981_, new_n19696_ ) -new_n23984_ = NAND ( new_n23983_, new_n23982_, new_n15112_ ) -new_n23985_ = OR ( new_n14891_, new_n23980_ ) -new_n23986_ = OR ( new_n14905_, new_n23968_ ) -new_n23987_ = NAND ( new_n23986_, new_n23985_, new_n23984_, new_n23979_ ) -NET_24192 = OR ( new_n23987_, new_n23978_, new_n23977_ ) -new_n23989_ = NOR ( new_n23976_, new_n14911_ ) -new_n23990_ = NAND ( new_n23964_, new_n16496_ ) -new_n23991_ = OR ( new_n19814_, new_n14915_ ) -new_n23992_ = OR ( new_n14917_, new_n23968_ ) -new_n23993_ = OR ( new_n14910_, new_n23958_ ) -new_n23994_ = NAND ( new_n23993_, new_n23992_, new_n23991_, new_n23990_ ) -NET_24193 = OR ( new_n23994_, new_n23989_ ) -new_n23996_ = OR ( new_n23976_, new_n20109_ ) -new_n23997_ = NAND ( new_n23964_, new_n20118_ ) -new_n23998_ = NAND ( new_n20113_, new_n19813_ ) -new_n23999_ = OR ( new_n20124_, new_n4710_ ) -new_n24000_ = OR ( new_n20107_, new_n23968_ ) -new_n24001_ = OR ( new_n20126_, new_n23958_ ) -new_n24002_ = AND ( new_n24001_, new_n24000_, new_n23999_ ) -NET_24194 = NAND ( new_n24002_, new_n23998_, new_n23997_, new_n23996_ ) -new_n24004_ = NAND ( new_n5811_, NET_627, NET_626, new_n3817_ ) -new_n24005_ = NAND ( new_n6927_, new_n3827_ ) -NET_2627 = NAND ( new_n24005_, new_n24004_, new_n5807_, new_n3825_ ) -new_n24007_ = NAND ( new_n6180_, NET_1076, NET_1075, new_n4561_ ) -new_n24008_ = NAND ( new_n7087_, new_n4571_ ) -NET_2883 = NAND ( new_n24008_, new_n24007_, new_n6176_, new_n4569_ ) -new_n24010_ = NOT ( NET_558 ) -new_n24011_ = NOT ( NET_998 ) -new_n24012_ = NAND ( NET_999, new_n24011_, NET_993, new_n24010_ ) -new_n24013_ = OR ( NET_557, NET_556, NET_555, NET_1001 ) -new_n24014_ = NOR ( new_n24013_, new_n24012_ ) -NET_58839 = NAND ( new_n24014_, new_n5833_ ) -new_n24016_ = NOT ( NET_550 ) -new_n24017_ = NOR ( NET_552, new_n24016_, NET_549, NET_544 ) -new_n24018_ = NOR ( NET_109, NET_108, NET_107, NET_106 ) -NET_3153 = NAND ( new_n24018_, new_n24017_, NET_58839 ) -new_n24020_ = NOT ( NET_141 ) -new_n24021_ = NOR ( NET_142, new_n24020_ ) -new_n24022_ = NAND ( new_n24021_, NET_140 ) -new_n24023_ = OR ( new_n24022_, new_n23718_ ) -new_n24024_ = NOT ( NET_140 ) -new_n24025_ = NAND ( new_n24021_, new_n24024_ ) -new_n24026_ = OR ( new_n24025_, new_n23866_ ) -new_n24027_ = NOT ( NET_110 ) -new_n24028_ = OR ( new_n24021_, new_n24027_ ) -NET_3283 = NAND ( new_n24028_, new_n24026_, new_n24023_ ) -new_n24030_ = OR ( new_n24022_, new_n23575_ ) -new_n24031_ = OR ( new_n24025_, new_n23718_ ) -new_n24032_ = NOT ( NET_111 ) -new_n24033_ = OR ( new_n24021_, new_n24032_ ) -NET_3284 = NAND ( new_n24033_, new_n24031_, new_n24030_ ) -new_n24035_ = OR ( new_n24022_, new_n23431_ ) -new_n24036_ = OR ( new_n24025_, new_n23575_ ) -new_n24037_ = NOT ( NET_112 ) -new_n24038_ = OR ( new_n24021_, new_n24037_ ) -NET_3285 = NAND ( new_n24038_, new_n24036_, new_n24035_ ) -new_n24040_ = OR ( new_n24022_, new_n23285_ ) -new_n24041_ = OR ( new_n24025_, new_n23431_ ) -new_n24042_ = NOT ( NET_113 ) -new_n24043_ = OR ( new_n24021_, new_n24042_ ) -NET_3286 = NAND ( new_n24043_, new_n24041_, new_n24040_ ) -new_n24045_ = OR ( new_n24022_, new_n23138_ ) -new_n24046_ = OR ( new_n24025_, new_n23285_ ) -new_n24047_ = NOT ( NET_114 ) -new_n24048_ = OR ( new_n24021_, new_n24047_ ) -NET_3287 = NAND ( new_n24048_, new_n24046_, new_n24045_ ) -new_n24050_ = OR ( new_n24022_, new_n22991_ ) -new_n24051_ = OR ( new_n24025_, new_n23138_ ) -new_n24052_ = NOT ( NET_115 ) -new_n24053_ = OR ( new_n24021_, new_n24052_ ) -NET_3288 = NAND ( new_n24053_, new_n24051_, new_n24050_ ) -new_n24055_ = OR ( new_n24022_, new_n22846_ ) -new_n24056_ = OR ( new_n24025_, new_n22991_ ) -new_n24057_ = NOT ( NET_116 ) -new_n24058_ = OR ( new_n24021_, new_n24057_ ) -NET_3289 = NAND ( new_n24058_, new_n24056_, new_n24055_ ) -new_n24060_ = OR ( new_n24022_, new_n22702_ ) -new_n24061_ = OR ( new_n24025_, new_n22846_ ) -new_n24062_ = NOT ( NET_117 ) -new_n24063_ = OR ( new_n24021_, new_n24062_ ) -NET_3290 = NAND ( new_n24063_, new_n24061_, new_n24060_ ) -new_n24065_ = OR ( new_n24022_, new_n22556_ ) -new_n24066_ = OR ( new_n24025_, new_n22702_ ) -new_n24067_ = NOT ( NET_118 ) -new_n24068_ = OR ( new_n24021_, new_n24067_ ) -NET_3291 = NAND ( new_n24068_, new_n24066_, new_n24065_ ) -new_n24070_ = OR ( new_n24022_, new_n22411_ ) -new_n24071_ = OR ( new_n24025_, new_n22556_ ) -new_n24072_ = NOT ( NET_119 ) -new_n24073_ = OR ( new_n24021_, new_n24072_ ) -NET_3292 = NAND ( new_n24073_, new_n24071_, new_n24070_ ) -new_n24075_ = OR ( new_n24022_, new_n22264_ ) -new_n24076_ = OR ( new_n24025_, new_n22411_ ) -new_n24077_ = NOT ( NET_120 ) -new_n24078_ = OR ( new_n24021_, new_n24077_ ) -NET_3293 = NAND ( new_n24078_, new_n24076_, new_n24075_ ) -new_n24080_ = OR ( new_n24022_, new_n22118_ ) -new_n24081_ = OR ( new_n24025_, new_n22264_ ) -new_n24082_ = NOT ( NET_121 ) -new_n24083_ = OR ( new_n24021_, new_n24082_ ) -NET_3294 = NAND ( new_n24083_, new_n24081_, new_n24080_ ) -new_n24085_ = OR ( new_n24022_, new_n21973_ ) -new_n24086_ = OR ( new_n24025_, new_n22118_ ) -new_n24087_ = NOT ( NET_122 ) -new_n24088_ = OR ( new_n24021_, new_n24087_ ) -NET_3295 = NAND ( new_n24088_, new_n24086_, new_n24085_ ) -new_n24090_ = OR ( new_n24022_, new_n21831_ ) -new_n24091_ = OR ( new_n24025_, new_n21973_ ) -new_n24092_ = NOT ( NET_123 ) -new_n24093_ = OR ( new_n24021_, new_n24092_ ) -NET_3296 = NAND ( new_n24093_, new_n24091_, new_n24090_ ) -new_n24095_ = OR ( new_n24022_, new_n21681_ ) -new_n24096_ = OR ( new_n24025_, new_n21831_ ) -new_n24097_ = NOT ( NET_124 ) -new_n24098_ = OR ( new_n24021_, new_n24097_ ) -NET_3297 = NAND ( new_n24098_, new_n24096_, new_n24095_ ) -new_n24100_ = OR ( new_n24022_, new_n21527_ ) -new_n24101_ = OR ( new_n24025_, new_n21681_ ) -new_n24102_ = NOT ( NET_125 ) -new_n24103_ = OR ( new_n24021_, new_n24102_ ) -NET_3298 = NAND ( new_n24103_, new_n24101_, new_n24100_ ) -new_n24105_ = OR ( new_n24022_, new_n21373_ ) -new_n24106_ = OR ( new_n24025_, new_n21527_ ) -new_n24107_ = NOT ( NET_126 ) -new_n24108_ = OR ( new_n24021_, new_n24107_ ) -NET_3299 = NAND ( new_n24108_, new_n24106_, new_n24105_ ) -new_n24110_ = OR ( new_n24022_, new_n21124_ ) -new_n24111_ = OR ( new_n24025_, new_n21373_ ) -new_n24112_ = NOT ( NET_127 ) -new_n24113_ = OR ( new_n24021_, new_n24112_ ) -NET_3300 = NAND ( new_n24113_, new_n24111_, new_n24110_ ) -new_n24115_ = OR ( new_n24022_, new_n20483_ ) -new_n24116_ = OR ( new_n24025_, new_n21124_ ) -new_n24117_ = NOT ( NET_128 ) -new_n24118_ = OR ( new_n24021_, new_n24117_ ) -NET_3301 = NAND ( new_n24118_, new_n24116_, new_n24115_ ) -new_n24120_ = OR ( new_n24022_, new_n20495_ ) -new_n24121_ = OR ( new_n24025_, new_n20483_ ) -new_n24122_ = NOT ( NET_129 ) -new_n24123_ = OR ( new_n24021_, new_n24122_ ) -NET_3302 = NAND ( new_n24123_, new_n24121_, new_n24120_ ) -new_n24125_ = OR ( new_n24022_, new_n20444_ ) -new_n24126_ = OR ( new_n24025_, new_n20495_ ) -new_n24127_ = NOT ( NET_130 ) -new_n24128_ = OR ( new_n24021_, new_n24127_ ) -NET_3303 = NAND ( new_n24128_, new_n24126_, new_n24125_ ) -new_n24130_ = OR ( new_n24022_, new_n19831_ ) -new_n24131_ = OR ( new_n24025_, new_n20444_ ) -new_n24132_ = NOT ( NET_131 ) -new_n24133_ = OR ( new_n24021_, new_n24132_ ) -NET_3304 = NAND ( new_n24133_, new_n24131_, new_n24130_ ) -new_n24135_ = OR ( new_n24022_, new_n18338_ ) -new_n24136_ = OR ( new_n24025_, new_n19831_ ) -new_n24137_ = NOT ( NET_132 ) -new_n24138_ = OR ( new_n24021_, new_n24137_ ) -NET_3305 = NAND ( new_n24138_, new_n24136_, new_n24135_ ) -new_n24140_ = OR ( new_n24022_, new_n17918_ ) -new_n24141_ = OR ( new_n24025_, new_n18338_ ) -new_n24142_ = NOT ( NET_133 ) -new_n24143_ = OR ( new_n24021_, new_n24142_ ) -NET_3306 = NAND ( new_n24143_, new_n24141_, new_n24140_ ) -new_n24145_ = OR ( new_n24022_, new_n17408_ ) -new_n24146_ = OR ( new_n24025_, new_n17918_ ) -new_n24147_ = NOT ( NET_134 ) -new_n24148_ = OR ( new_n24021_, new_n24147_ ) -NET_3307 = NAND ( new_n24148_, new_n24146_, new_n24145_ ) -new_n24150_ = OR ( new_n24022_, new_n16673_ ) -new_n24151_ = OR ( new_n24025_, new_n17408_ ) -new_n24152_ = NOT ( NET_135 ) -new_n24153_ = OR ( new_n24021_, new_n24152_ ) -NET_3308 = NAND ( new_n24153_, new_n24151_, new_n24150_ ) -new_n24155_ = OR ( new_n24022_, new_n16261_ ) -new_n24156_ = OR ( new_n24025_, new_n16673_ ) -new_n24157_ = NOT ( NET_136 ) -new_n24158_ = OR ( new_n24021_, new_n24157_ ) -NET_3309 = NAND ( new_n24158_, new_n24156_, new_n24155_ ) -new_n24160_ = OR ( new_n24022_, new_n15943_ ) -new_n24161_ = OR ( new_n24025_, new_n16261_ ) -new_n24162_ = NOT ( NET_137 ) -new_n24163_ = OR ( new_n24021_, new_n24162_ ) -NET_3310 = NAND ( new_n24163_, new_n24161_, new_n24160_ ) -new_n24165_ = OR ( new_n24022_, new_n15264_ ) -new_n24166_ = OR ( new_n24025_, new_n15943_ ) -new_n24167_ = NOT ( NET_138 ) -new_n24168_ = OR ( new_n24021_, new_n24167_ ) -NET_3311 = NAND ( new_n24168_, new_n24166_, new_n24165_ ) -new_n24170_ = OR ( new_n24025_, new_n15264_ ) -new_n24171_ = OR ( new_n24022_, new_n14023_ ) -new_n24172_ = NOT ( NET_139 ) -new_n24173_ = OR ( new_n24021_, new_n24172_ ) -NET_3312 = NAND ( new_n24173_, new_n24171_, new_n24170_ ) -new_n24175_ = NAND ( new_n5513_, NET_140 ) -new_n24176_ = NOT ( NET_33 ) -new_n24177_ = NAND ( new_n5513_, new_n24176_ ) -new_n24178_ = NAND ( new_n24177_, new_n24175_, NET_141 ) -new_n24179_ = NOR ( new_n5803_, NET_33 ) -new_n24180_ = NOR ( new_n24179_, new_n24024_ ) -new_n24181_ = NOT ( new_n24180_ ) -new_n24182_ = NAND ( new_n24181_, NET_548, NET_142 ) -new_n24183_ = OR ( NET_142, NET_141 ) -new_n24184_ = OR ( new_n24183_, new_n24024_ ) -NET_3313 = NAND ( new_n24184_, new_n24182_, new_n24178_, new_n24025_ ) -new_n24186_ = OR ( new_n24183_, NET_140 ) -new_n24187_ = NOT ( new_n24021_ ) -new_n24188_ = NAND ( new_n24187_, NET_549 ) -new_n24189_ = OR ( new_n24187_, NET_551 ) -NET_3314 = NAND ( new_n24189_, new_n24188_, new_n24186_ ) -new_n24191_ = OR ( new_n24021_, new_n24016_ ) -new_n24192_ = NAND ( new_n24021_, NET_554 ) -NET_3324 = NAND ( new_n24192_, new_n24191_ ) -new_n24194_ = NAND ( new_n24187_, NET_544 ) -new_n24195_ = OR ( new_n24187_, NET_553 ) -NET_3325 = NAND ( new_n24195_, new_n24194_ ) -new_n24197_ = NAND ( new_n24187_, NET_109 ) -new_n24198_ = NAND ( new_n24021_, NET_543 ) -NET_3326 = NAND ( new_n24198_, new_n24197_ ) -new_n24200_ = NAND ( new_n24187_, NET_108 ) -new_n24201_ = NAND ( new_n24021_, NET_542 ) -NET_3327 = NAND ( new_n24201_, new_n24200_ ) -new_n24203_ = NAND ( new_n24187_, NET_107 ) -new_n24204_ = NAND ( new_n24021_, NET_541 ) -NET_3328 = NAND ( new_n24204_, new_n24203_ ) -new_n24206_ = NAND ( new_n24187_, NET_106 ) -new_n24207_ = NAND ( new_n24021_, NET_540 ) -NET_3329 = NAND ( new_n24207_, new_n24206_ ) -new_n24209_ = NOT ( NET_590 ) -new_n24210_ = NOR ( NET_591, new_n24209_ ) -new_n24211_ = NAND ( new_n24210_, NET_589 ) -new_n24212_ = OR ( new_n24211_, new_n23764_ ) -new_n24213_ = NOT ( NET_589 ) -new_n24214_ = NAND ( new_n24210_, new_n24213_ ) -new_n24215_ = OR ( new_n24214_, new_n23917_ ) -new_n24216_ = OR ( new_n24210_, new_n5833_ ) -NET_3382 = NAND ( new_n24216_, new_n24215_, new_n24212_ ) -new_n24218_ = OR ( new_n24211_, new_n23623_ ) -new_n24219_ = OR ( new_n24214_, new_n23764_ ) -new_n24220_ = NOT ( new_n24210_ ) -new_n24221_ = NAND ( new_n24220_, NET_560 ) -NET_3383 = NAND ( new_n24221_, new_n24219_, new_n24218_ ) -new_n24223_ = OR ( new_n24211_, new_n23479_ ) -new_n24224_ = OR ( new_n24214_, new_n23623_ ) -new_n24225_ = NAND ( new_n24220_, NET_561 ) -NET_3384 = NAND ( new_n24225_, new_n24224_, new_n24223_ ) -new_n24227_ = OR ( new_n24211_, new_n23334_ ) -new_n24228_ = OR ( new_n24214_, new_n23479_ ) -new_n24229_ = OR ( new_n24210_, new_n5844_ ) -NET_3385 = NAND ( new_n24229_, new_n24228_, new_n24227_ ) -new_n24231_ = OR ( new_n24211_, new_n23187_ ) -new_n24232_ = OR ( new_n24214_, new_n23334_ ) -new_n24233_ = OR ( new_n24210_, new_n5845_ ) -NET_3386 = NAND ( new_n24233_, new_n24232_, new_n24231_ ) -new_n24235_ = OR ( new_n24211_, new_n23040_ ) -new_n24236_ = OR ( new_n24214_, new_n23187_ ) -new_n24237_ = OR ( new_n24210_, new_n5846_ ) -NET_3387 = NAND ( new_n24237_, new_n24236_, new_n24235_ ) -new_n24239_ = OR ( new_n24211_, new_n22894_ ) -new_n24240_ = OR ( new_n24214_, new_n23040_ ) -new_n24241_ = OR ( new_n24210_, new_n5847_ ) -NET_3388 = NAND ( new_n24241_, new_n24240_, new_n24239_ ) -new_n24243_ = OR ( new_n24211_, new_n22750_ ) -new_n24244_ = OR ( new_n24214_, new_n22894_ ) -new_n24245_ = OR ( new_n24210_, new_n5850_ ) -NET_3389 = NAND ( new_n24245_, new_n24244_, new_n24243_ ) -new_n24247_ = OR ( new_n24211_, new_n22605_ ) -new_n24248_ = OR ( new_n24214_, new_n22750_ ) -new_n24249_ = OR ( new_n24210_, new_n5851_ ) -NET_3390 = NAND ( new_n24249_, new_n24248_, new_n24247_ ) -new_n24251_ = OR ( new_n24211_, new_n22459_ ) -new_n24252_ = OR ( new_n24214_, new_n22605_ ) -new_n24253_ = NAND ( new_n24220_, NET_568 ) -NET_3391 = NAND ( new_n24253_, new_n24252_, new_n24251_ ) -new_n24255_ = OR ( new_n24211_, new_n22312_ ) -new_n24256_ = OR ( new_n24214_, new_n22459_ ) -new_n24257_ = NAND ( new_n24220_, NET_569 ) -NET_3392 = NAND ( new_n24257_, new_n24256_, new_n24255_ ) -new_n24259_ = OR ( new_n24211_, new_n22167_ ) -new_n24260_ = OR ( new_n24214_, new_n22312_ ) -new_n24261_ = NAND ( new_n24220_, NET_570 ) -NET_3393 = NAND ( new_n24261_, new_n24260_, new_n24259_ ) -new_n24263_ = OR ( new_n24211_, new_n22021_ ) -new_n24264_ = OR ( new_n24214_, new_n22167_ ) -new_n24265_ = NAND ( new_n24220_, NET_571 ) -NET_3394 = NAND ( new_n24265_, new_n24264_, new_n24263_ ) -new_n24267_ = OR ( new_n24211_, new_n21878_ ) -new_n24268_ = OR ( new_n24214_, new_n22021_ ) -new_n24269_ = NAND ( new_n24220_, NET_572 ) -NET_3395 = NAND ( new_n24269_, new_n24268_, new_n24267_ ) -new_n24271_ = OR ( new_n24211_, new_n21731_ ) -new_n24272_ = OR ( new_n24214_, new_n21878_ ) -new_n24273_ = NAND ( new_n24220_, NET_573 ) -NET_3396 = NAND ( new_n24273_, new_n24272_, new_n24271_ ) -new_n24275_ = OR ( new_n24211_, new_n21581_ ) -new_n24276_ = OR ( new_n24214_, new_n21731_ ) -new_n24277_ = OR ( new_n24210_, new_n5834_ ) -NET_3397 = NAND ( new_n24277_, new_n24276_, new_n24275_ ) -new_n24279_ = OR ( new_n24211_, new_n21423_ ) -new_n24280_ = OR ( new_n24214_, new_n21581_ ) -new_n24281_ = OR ( new_n24210_, new_n5835_ ) -NET_3398 = NAND ( new_n24281_, new_n24280_, new_n24279_ ) -new_n24283_ = OR ( new_n24211_, new_n21192_ ) -new_n24284_ = OR ( new_n24214_, new_n21423_ ) -new_n24285_ = NAND ( new_n24220_, NET_576 ) -NET_3399 = NAND ( new_n24285_, new_n24284_, new_n24283_ ) -new_n24287_ = OR ( new_n24211_, new_n20621_ ) -new_n24288_ = OR ( new_n24214_, new_n21192_ ) -new_n24289_ = NAND ( new_n24220_, NET_577 ) -NET_3400 = NAND ( new_n24289_, new_n24288_, new_n24287_ ) -new_n24291_ = OR ( new_n24211_, new_n20633_ ) -new_n24292_ = OR ( new_n24214_, new_n20621_ ) -new_n24293_ = NAND ( new_n24220_, NET_578 ) -NET_3401 = NAND ( new_n24293_, new_n24292_, new_n24291_ ) -new_n24295_ = OR ( new_n24211_, new_n20582_ ) -new_n24296_ = OR ( new_n24214_, new_n20633_ ) -new_n24297_ = NAND ( new_n24220_, NET_579 ) -NET_3402 = NAND ( new_n24297_, new_n24296_, new_n24295_ ) -new_n24299_ = OR ( new_n24211_, new_n19893_ ) -new_n24300_ = OR ( new_n24214_, new_n20582_ ) -new_n24301_ = NAND ( new_n24220_, NET_580 ) -NET_3403 = NAND ( new_n24301_, new_n24300_, new_n24299_ ) -new_n24303_ = OR ( new_n24211_, new_n18373_ ) -new_n24304_ = OR ( new_n24214_, new_n19893_ ) -new_n24305_ = NAND ( new_n24220_, NET_581 ) -NET_3404 = NAND ( new_n24305_, new_n24304_, new_n24303_ ) -new_n24307_ = OR ( new_n24211_, new_n18080_ ) -new_n24308_ = OR ( new_n24214_, new_n18373_ ) -new_n24309_ = NAND ( new_n24220_, NET_582 ) -NET_3405 = NAND ( new_n24309_, new_n24308_, new_n24307_ ) -new_n24311_ = OR ( new_n24211_, new_n17578_ ) -new_n24312_ = OR ( new_n24214_, new_n18080_ ) -new_n24313_ = NAND ( new_n24220_, NET_583 ) -NET_3406 = NAND ( new_n24313_, new_n24312_, new_n24311_ ) -new_n24315_ = OR ( new_n24211_, new_n16836_ ) -new_n24316_ = OR ( new_n24214_, new_n17578_ ) -new_n24317_ = NAND ( new_n24220_, NET_584 ) -NET_3407 = NAND ( new_n24317_, new_n24316_, new_n24315_ ) -new_n24319_ = OR ( new_n24211_, new_n16368_ ) -new_n24320_ = OR ( new_n24214_, new_n16836_ ) -new_n24321_ = NAND ( new_n24220_, NET_585 ) -NET_3408 = NAND ( new_n24321_, new_n24320_, new_n24319_ ) -new_n24323_ = OR ( new_n24211_, new_n16049_ ) -new_n24324_ = OR ( new_n24214_, new_n16368_ ) -new_n24325_ = OR ( new_n24210_, new_n5839_ ) -NET_3409 = NAND ( new_n24325_, new_n24324_, new_n24323_ ) -new_n24327_ = OR ( new_n24211_, new_n15491_ ) -new_n24328_ = OR ( new_n24214_, new_n16049_ ) -new_n24329_ = OR ( new_n24210_, new_n5840_ ) -NET_3410 = NAND ( new_n24329_, new_n24328_, new_n24327_ ) -new_n24331_ = OR ( new_n24214_, new_n15491_ ) -new_n24332_ = OR ( new_n24211_, new_n14331_ ) -new_n24333_ = OR ( new_n24210_, new_n5841_ ) -NET_3411 = NAND ( new_n24333_, new_n24332_, new_n24331_ ) -new_n24335_ = NAND ( new_n5811_, new_n24176_ ) -new_n24336_ = NAND ( new_n5811_, NET_589 ) -new_n24337_ = NAND ( new_n24336_, new_n24335_, NET_590 ) -new_n24338_ = NOR ( new_n6172_, NET_33 ) -new_n24339_ = NOR ( new_n24338_, new_n24213_ ) -new_n24340_ = NOT ( new_n24339_ ) -new_n24341_ = NAND ( new_n24340_, NET_997, NET_591 ) -new_n24342_ = OR ( NET_591, NET_590 ) -new_n24343_ = OR ( new_n24342_, new_n24213_ ) -NET_3412 = NAND ( new_n24343_, new_n24341_, new_n24337_, new_n24214_ ) -new_n24345_ = OR ( new_n24342_, NET_589 ) -new_n24346_ = OR ( new_n24210_, new_n24011_ ) -new_n24347_ = OR ( new_n24220_, NET_1000 ) -NET_3413 = NAND ( new_n24347_, new_n24346_, new_n24345_ ) -new_n24349_ = NAND ( new_n24220_, NET_999 ) -new_n24350_ = NAND ( new_n24210_, NET_1003 ) -NET_3423 = NAND ( new_n24350_, new_n24349_ ) -new_n24352_ = NAND ( new_n24220_, NET_993 ) -new_n24353_ = OR ( new_n24220_, NET_1002 ) -NET_3424 = NAND ( new_n24353_, new_n24352_ ) -new_n24355_ = OR ( new_n24210_, new_n24010_ ) -new_n24356_ = NAND ( new_n24210_, NET_992 ) -NET_3425 = NAND ( new_n24356_, new_n24355_ ) -new_n24358_ = NAND ( new_n24220_, NET_557 ) -new_n24359_ = NAND ( new_n24210_, NET_991 ) -NET_3426 = NAND ( new_n24359_, new_n24358_ ) -new_n24361_ = NAND ( new_n24220_, NET_556 ) -new_n24362_ = NAND ( new_n24210_, NET_990 ) -NET_3427 = NAND ( new_n24362_, new_n24361_ ) -new_n24364_ = NAND ( new_n24220_, NET_555 ) -new_n24365_ = NAND ( new_n24210_, NET_989 ) -NET_3428 = NAND ( new_n24365_, new_n24364_ ) -new_n24367_ = NOT ( NET_1039 ) -new_n24368_ = NOR ( NET_1040, new_n24367_ ) -new_n24369_ = NAND ( new_n24368_, NET_1038 ) -new_n24370_ = OR ( new_n24369_, new_n23810_ ) -new_n24371_ = NOT ( NET_1038 ) -new_n24372_ = NAND ( new_n24368_, new_n24371_ ) -new_n24373_ = OR ( new_n24372_, new_n23968_ ) -new_n24374_ = OR ( new_n24368_, new_n6203_ ) -NET_3481 = NAND ( new_n24374_, new_n24373_, new_n24370_ ) -new_n24376_ = OR ( new_n24369_, new_n23671_ ) -new_n24377_ = OR ( new_n24372_, new_n23810_ ) -new_n24378_ = NOT ( new_n24368_ ) -new_n24379_ = NAND ( new_n24378_, NET_1009 ) -NET_3482 = NAND ( new_n24379_, new_n24377_, new_n24376_ ) -new_n24381_ = OR ( new_n24369_, new_n23527_ ) -new_n24382_ = OR ( new_n24372_, new_n23671_ ) -new_n24383_ = NAND ( new_n24378_, NET_1010 ) -NET_3483 = NAND ( new_n24383_, new_n24382_, new_n24381_ ) -new_n24385_ = OR ( new_n24369_, new_n23383_ ) -new_n24386_ = OR ( new_n24372_, new_n23527_ ) -new_n24387_ = OR ( new_n24368_, new_n6214_ ) -NET_3484 = NAND ( new_n24387_, new_n24386_, new_n24385_ ) -new_n24389_ = OR ( new_n24369_, new_n23236_ ) -new_n24390_ = OR ( new_n24372_, new_n23383_ ) -new_n24391_ = OR ( new_n24368_, new_n6215_ ) -NET_3485 = NAND ( new_n24391_, new_n24390_, new_n24389_ ) -new_n24393_ = OR ( new_n24369_, new_n23089_ ) -new_n24394_ = OR ( new_n24372_, new_n23236_ ) -new_n24395_ = OR ( new_n24368_, new_n6216_ ) -NET_3486 = NAND ( new_n24395_, new_n24394_, new_n24393_ ) -new_n24397_ = OR ( new_n24369_, new_n22942_ ) -new_n24398_ = OR ( new_n24372_, new_n23089_ ) -new_n24399_ = OR ( new_n24368_, new_n6217_ ) -NET_3487 = NAND ( new_n24399_, new_n24398_, new_n24397_ ) -new_n24401_ = OR ( new_n24369_, new_n22798_ ) -new_n24402_ = OR ( new_n24372_, new_n22942_ ) -new_n24403_ = OR ( new_n24368_, new_n6220_ ) -NET_3488 = NAND ( new_n24403_, new_n24402_, new_n24401_ ) -new_n24405_ = OR ( new_n24369_, new_n22654_ ) -new_n24406_ = OR ( new_n24372_, new_n22798_ ) -new_n24407_ = OR ( new_n24368_, new_n6221_ ) -NET_3489 = NAND ( new_n24407_, new_n24406_, new_n24405_ ) -new_n24409_ = OR ( new_n24369_, new_n22507_ ) -new_n24410_ = OR ( new_n24372_, new_n22654_ ) -new_n24411_ = NAND ( new_n24378_, NET_1017 ) -NET_3490 = NAND ( new_n24411_, new_n24410_, new_n24409_ ) -new_n24413_ = OR ( new_n24369_, new_n22360_ ) -new_n24414_ = OR ( new_n24372_, new_n22507_ ) -new_n24415_ = NAND ( new_n24378_, NET_1018 ) -NET_3491 = NAND ( new_n24415_, new_n24414_, new_n24413_ ) -new_n24417_ = OR ( new_n24369_, new_n22216_ ) -new_n24418_ = OR ( new_n24372_, new_n22360_ ) -new_n24419_ = NAND ( new_n24378_, NET_1019 ) -NET_3492 = NAND ( new_n24419_, new_n24418_, new_n24417_ ) -new_n24421_ = OR ( new_n24369_, new_n22069_ ) -new_n24422_ = OR ( new_n24372_, new_n22216_ ) -new_n24423_ = NAND ( new_n24378_, NET_1020 ) -NET_3493 = NAND ( new_n24423_, new_n24422_, new_n24421_ ) -new_n24425_ = OR ( new_n24369_, new_n21925_ ) -new_n24426_ = OR ( new_n24372_, new_n22069_ ) -new_n24427_ = NAND ( new_n24378_, NET_1021 ) -NET_3494 = NAND ( new_n24427_, new_n24426_, new_n24425_ ) -new_n24429_ = OR ( new_n24369_, new_n21782_ ) -new_n24430_ = OR ( new_n24372_, new_n21925_ ) -new_n24431_ = NAND ( new_n24378_, NET_1022 ) -NET_3495 = NAND ( new_n24431_, new_n24430_, new_n24429_ ) -new_n24433_ = OR ( new_n24369_, new_n21635_ ) -new_n24434_ = OR ( new_n24372_, new_n21782_ ) -new_n24435_ = OR ( new_n24368_, new_n6204_ ) -NET_3496 = NAND ( new_n24435_, new_n24434_, new_n24433_ ) -new_n24437_ = OR ( new_n24369_, new_n21473_ ) -new_n24438_ = OR ( new_n24372_, new_n21635_ ) -new_n24439_ = OR ( new_n24368_, new_n6205_ ) -NET_3497 = NAND ( new_n24439_, new_n24438_, new_n24437_ ) -new_n24441_ = OR ( new_n24369_, new_n21260_ ) -new_n24442_ = OR ( new_n24372_, new_n21473_ ) -new_n24443_ = NAND ( new_n24378_, NET_1025 ) -NET_3498 = NAND ( new_n24443_, new_n24442_, new_n24441_ ) -new_n24445_ = OR ( new_n24369_, new_n20759_ ) -new_n24446_ = OR ( new_n24372_, new_n21260_ ) -new_n24447_ = NAND ( new_n24378_, NET_1026 ) -NET_3499 = NAND ( new_n24447_, new_n24446_, new_n24445_ ) -new_n24449_ = OR ( new_n24369_, new_n20771_ ) -new_n24450_ = OR ( new_n24372_, new_n20759_ ) -new_n24451_ = NAND ( new_n24378_, NET_1027 ) -NET_3500 = NAND ( new_n24451_, new_n24450_, new_n24449_ ) -new_n24453_ = OR ( new_n24369_, new_n20720_ ) -new_n24454_ = OR ( new_n24372_, new_n20771_ ) -new_n24455_ = NAND ( new_n24378_, NET_1028 ) -NET_3501 = NAND ( new_n24455_, new_n24454_, new_n24453_ ) -new_n24457_ = OR ( new_n24369_, new_n19955_ ) -new_n24458_ = OR ( new_n24372_, new_n20720_ ) -new_n24459_ = NAND ( new_n24378_, NET_1029 ) -NET_3502 = NAND ( new_n24459_, new_n24458_, new_n24457_ ) -new_n24461_ = OR ( new_n24369_, new_n18408_ ) -new_n24462_ = OR ( new_n24372_, new_n19955_ ) -new_n24463_ = NAND ( new_n24378_, NET_1030 ) -NET_3503 = NAND ( new_n24463_, new_n24462_, new_n24461_ ) -new_n24465_ = OR ( new_n24369_, new_n18242_ ) -new_n24466_ = OR ( new_n24372_, new_n18408_ ) -new_n24467_ = NAND ( new_n24378_, NET_1031 ) -NET_3504 = NAND ( new_n24467_, new_n24466_, new_n24465_ ) -new_n24469_ = OR ( new_n24369_, new_n17748_ ) -new_n24470_ = OR ( new_n24372_, new_n18242_ ) -new_n24471_ = NAND ( new_n24378_, NET_1032 ) -NET_3505 = NAND ( new_n24471_, new_n24470_, new_n24469_ ) -new_n24473_ = OR ( new_n24369_, new_n16999_ ) -new_n24474_ = OR ( new_n24372_, new_n17748_ ) -new_n24475_ = NAND ( new_n24378_, NET_1033 ) -NET_3506 = NAND ( new_n24475_, new_n24474_, new_n24473_ ) -new_n24477_ = OR ( new_n24369_, new_n16475_ ) -new_n24478_ = OR ( new_n24372_, new_n16999_ ) -new_n24479_ = NAND ( new_n24378_, NET_1034 ) -NET_3507 = NAND ( new_n24479_, new_n24478_, new_n24477_ ) -new_n24481_ = OR ( new_n24369_, new_n16155_ ) -new_n24482_ = OR ( new_n24372_, new_n16475_ ) -new_n24483_ = OR ( new_n24368_, new_n6209_ ) -NET_3508 = NAND ( new_n24483_, new_n24482_, new_n24481_ ) -new_n24485_ = OR ( new_n24369_, new_n15718_ ) -new_n24486_ = OR ( new_n24372_, new_n16155_ ) -new_n24487_ = OR ( new_n24368_, new_n6210_ ) -NET_3509 = NAND ( new_n24487_, new_n24486_, new_n24485_ ) -new_n24489_ = OR ( new_n24372_, new_n15718_ ) -new_n24490_ = OR ( new_n24369_, new_n14639_ ) -new_n24491_ = OR ( new_n24368_, new_n6211_ ) -NET_3510 = NAND ( new_n24491_, new_n24490_, new_n24489_ ) -new_n24493_ = NAND ( new_n6180_, NET_1038 ) -new_n24494_ = NAND ( new_n6180_, new_n24176_ ) -new_n24495_ = NAND ( new_n24494_, new_n24493_, NET_1039 ) -new_n24496_ = NOR ( NET_33, new_n6557_ ) -new_n24497_ = NOR ( new_n24496_, new_n24371_ ) -new_n24498_ = NOT ( new_n24497_ ) -new_n24499_ = NAND ( new_n24498_, NET_1446, NET_1040 ) -new_n24500_ = OR ( NET_1040, NET_1039 ) -new_n24501_ = OR ( new_n24500_, new_n24371_ ) -NET_3511 = NAND ( new_n24501_, new_n24499_, new_n24495_, new_n24372_ ) -new_n24503_ = OR ( new_n24500_, NET_1038 ) -new_n24504_ = NOT ( NET_1447 ) -new_n24505_ = OR ( new_n24368_, new_n24504_ ) -new_n24506_ = OR ( new_n24378_, NET_1449 ) -NET_3512 = NAND ( new_n24506_, new_n24505_, new_n24503_ ) -new_n24508_ = NAND ( new_n24378_, NET_1448 ) -new_n24509_ = NAND ( new_n24368_, NET_1452 ) -NET_3522 = NAND ( new_n24509_, new_n24508_ ) -new_n24511_ = NAND ( new_n24378_, NET_1442 ) -new_n24512_ = OR ( new_n24378_, NET_1451 ) -NET_3523 = NAND ( new_n24512_, new_n24511_ ) -new_n24514_ = NOT ( NET_1007 ) -new_n24515_ = OR ( new_n24368_, new_n24514_ ) -new_n24516_ = NAND ( new_n24368_, NET_1441 ) -NET_3524 = NAND ( new_n24516_, new_n24515_ ) -new_n24518_ = NOT ( NET_1006 ) -new_n24519_ = OR ( new_n24368_, new_n24518_ ) -new_n24520_ = NAND ( new_n24368_, NET_1440 ) -NET_3525 = NAND ( new_n24520_, new_n24519_ ) -new_n24522_ = NOT ( NET_1005 ) -new_n24523_ = OR ( new_n24368_, new_n24522_ ) -new_n24524_ = NAND ( new_n24368_, NET_1439 ) -NET_3526 = NAND ( new_n24524_, new_n24523_ ) -new_n24526_ = NOT ( NET_1004 ) -new_n24527_ = OR ( new_n24368_, new_n24526_ ) -new_n24528_ = NAND ( new_n24368_, NET_1438 ) -NET_3527 = NAND ( new_n24528_, new_n24527_ ) -new_n24530_ = NAND ( NET_58839, NET_70 ) -new_n24531_ = OR ( NET_58839, new_n5285_ ) -NET_3590 = NAND ( new_n24531_, new_n24530_ ) -new_n24533_ = NAND ( NET_58839, NET_71 ) -new_n24534_ = OR ( NET_58839, new_n5292_ ) -NET_3591 = NAND ( new_n24534_, new_n24533_ ) -new_n24536_ = NAND ( NET_58839, NET_72 ) -new_n24537_ = OR ( NET_58839, new_n5299_ ) -NET_3592 = NAND ( new_n24537_, new_n24536_ ) -new_n24539_ = NAND ( NET_58839, NET_73 ) -new_n24540_ = OR ( NET_58839, new_n5306_ ) -NET_3593 = NAND ( new_n24540_, new_n24539_ ) -new_n24542_ = NAND ( NET_58839, NET_74 ) -new_n24543_ = OR ( NET_58839, new_n5313_ ) -NET_3594 = NAND ( new_n24543_, new_n24542_ ) -new_n24545_ = NAND ( NET_58839, NET_75 ) -new_n24546_ = OR ( NET_58839, new_n5320_ ) -NET_3595 = NAND ( new_n24546_, new_n24545_ ) -new_n24548_ = NAND ( NET_58839, NET_76 ) -new_n24549_ = OR ( NET_58839, new_n5327_ ) -NET_3596 = NAND ( new_n24549_, new_n24548_ ) -new_n24551_ = NAND ( NET_58839, NET_77 ) -new_n24552_ = OR ( NET_58839, new_n5334_ ) -NET_3597 = NAND ( new_n24552_, new_n24551_ ) -new_n24554_ = NAND ( NET_58839, NET_78 ) -new_n24555_ = OR ( NET_58839, new_n5341_ ) -NET_3598 = NAND ( new_n24555_, new_n24554_ ) -new_n24557_ = NAND ( NET_58839, NET_79 ) -new_n24558_ = OR ( NET_58839, new_n5348_ ) -NET_3599 = NAND ( new_n24558_, new_n24557_ ) -new_n24560_ = NAND ( NET_58839, NET_80 ) -new_n24561_ = OR ( NET_58839, new_n5355_ ) -NET_3600 = NAND ( new_n24561_, new_n24560_ ) -new_n24563_ = NAND ( NET_58839, NET_81 ) -new_n24564_ = OR ( NET_58839, new_n5362_ ) -NET_3601 = NAND ( new_n24564_, new_n24563_ ) -new_n24566_ = NAND ( NET_58839, NET_82 ) -new_n24567_ = OR ( NET_58839, new_n5369_ ) -NET_3602 = NAND ( new_n24567_, new_n24566_ ) -new_n24569_ = NAND ( NET_58839, NET_83 ) -new_n24570_ = OR ( NET_58839, new_n5376_ ) -NET_3603 = NAND ( new_n24570_, new_n24569_ ) -new_n24572_ = NAND ( NET_58839, NET_84 ) -new_n24573_ = OR ( NET_58839, new_n5383_ ) -NET_3604 = NAND ( new_n24573_, new_n24572_ ) -new_n24575_ = NAND ( NET_58839, NET_85 ) -new_n24576_ = OR ( NET_58839, new_n5390_ ) -NET_3605 = NAND ( new_n24576_, new_n24575_ ) -new_n24578_ = NAND ( NET_58839, NET_86 ) -new_n24579_ = OR ( NET_58839, new_n6047_ ) -NET_3606 = NAND ( new_n24579_, new_n24578_ ) -new_n24581_ = NAND ( NET_58839, NET_87 ) -new_n24582_ = OR ( NET_58839, new_n6052_ ) -NET_3607 = NAND ( new_n24582_, new_n24581_ ) -new_n24584_ = NAND ( NET_58839, NET_88 ) -new_n24585_ = OR ( NET_58839, new_n6057_ ) -NET_3608 = NAND ( new_n24585_, new_n24584_ ) -new_n24587_ = NAND ( NET_58839, NET_89 ) -new_n24588_ = OR ( NET_58839, new_n6062_ ) -NET_3609 = NAND ( new_n24588_, new_n24587_ ) -new_n24590_ = NAND ( NET_58839, NET_90 ) -new_n24591_ = OR ( NET_58839, new_n6067_ ) -NET_3610 = NAND ( new_n24591_, new_n24590_ ) -new_n24593_ = NAND ( NET_58839, NET_91 ) -new_n24594_ = OR ( NET_58839, new_n6072_ ) -NET_3611 = NAND ( new_n24594_, new_n24593_ ) -new_n24596_ = NAND ( NET_58839, NET_92 ) -new_n24597_ = OR ( NET_58839, new_n6077_ ) -NET_3612 = NAND ( new_n24597_, new_n24596_ ) -new_n24599_ = NAND ( NET_58839, NET_93 ) -new_n24600_ = OR ( NET_58839, new_n6082_ ) -NET_3613 = NAND ( new_n24600_, new_n24599_ ) -new_n24602_ = NAND ( NET_58839, NET_94 ) -new_n24603_ = OR ( NET_58839, new_n6087_ ) -NET_3614 = NAND ( new_n24603_, new_n24602_ ) -new_n24605_ = NAND ( NET_58839, NET_95 ) -new_n24606_ = OR ( NET_58839, new_n6092_ ) -NET_3615 = NAND ( new_n24606_, new_n24605_ ) -new_n24608_ = NAND ( NET_58839, NET_96 ) -new_n24609_ = OR ( NET_58839, new_n6097_ ) -NET_3616 = NAND ( new_n24609_, new_n24608_ ) -new_n24611_ = NAND ( NET_58839, NET_97 ) -new_n24612_ = OR ( NET_58839, new_n6102_ ) -NET_3617 = NAND ( new_n24612_, new_n24611_ ) -new_n24614_ = NAND ( NET_58839, NET_98 ) -new_n24615_ = OR ( NET_58839, new_n6107_ ) -NET_3618 = NAND ( new_n24615_, new_n24614_ ) -new_n24617_ = NAND ( NET_58839, NET_99 ) -new_n24618_ = OR ( NET_58839, new_n6112_ ) -NET_3619 = NAND ( new_n24618_, new_n24617_ ) -new_n24620_ = NAND ( NET_58839, NET_100 ) -new_n24621_ = OR ( NET_58839, new_n6117_ ) -NET_3620 = NAND ( new_n24621_, new_n24620_ ) -new_n24623_ = NAND ( NET_58839, NET_101 ) -new_n24624_ = OR ( NET_58839, new_n3709_ ) -NET_3621 = NAND ( new_n24624_, new_n24623_ ) -new_n24626_ = NOT ( NET_34 ) -new_n24627_ = OR ( new_n24626_, NET_142 ) -new_n24628_ = NAND ( new_n24627_, new_n24181_, NET_548 ) -new_n24629_ = NAND ( new_n24628_, new_n24020_ ) -new_n24630_ = NAND ( new_n5514_, NET_141, new_n24024_ ) -new_n24631_ = NOT ( NET_142 ) -new_n24632_ = OR ( new_n24179_, new_n24631_, new_n24020_ ) -new_n24633_ = NOR ( NET_142, NET_140 ) -new_n24634_ = NOT ( new_n24633_ ) -NET_3716 = NAND ( new_n24634_, new_n24632_, new_n24630_, new_n24629_ ) -new_n24636_ = NOT ( NET_145 ) -new_n24637_ = NAND ( NET_142, NET_141, new_n24024_ ) -new_n24638_ = NAND ( new_n24637_, new_n24183_ ) -NET_3717 = NOR ( new_n24638_, new_n24636_ ) -new_n24640_ = NOT ( NET_146 ) -NET_3718 = NOR ( new_n24638_, new_n24640_ ) -new_n24642_ = NOT ( new_n24638_ ) -NET_3719 = AND ( new_n24642_, NET_147 ) -NET_3720 = AND ( new_n24642_, NET_148 ) -NET_3721 = AND ( new_n24642_, NET_149 ) -NET_3722 = AND ( new_n24642_, NET_150 ) -new_n24647_ = NOT ( NET_151 ) -NET_3723 = NOR ( new_n24638_, new_n24647_ ) -new_n24649_ = NOT ( NET_152 ) -NET_3724 = NOR ( new_n24638_, new_n24649_ ) -NET_3725 = AND ( new_n24642_, NET_153 ) -NET_3726 = AND ( new_n24642_, NET_154 ) -NET_3727 = AND ( new_n24642_, NET_155 ) -NET_3728 = AND ( new_n24642_, NET_156 ) -NET_3729 = AND ( new_n24642_, NET_157 ) -NET_3730 = AND ( new_n24642_, NET_158 ) -NET_3731 = AND ( new_n24642_, NET_159 ) -NET_3732 = AND ( new_n24642_, NET_160 ) -NET_3733 = AND ( new_n24642_, NET_161 ) -NET_3734 = AND ( new_n24642_, NET_162 ) -NET_3735 = AND ( new_n24642_, NET_163 ) -NET_3736 = AND ( new_n24642_, NET_164 ) -NET_3737 = AND ( new_n24642_, NET_165 ) -NET_3738 = AND ( new_n24642_, NET_166 ) -NET_3739 = AND ( new_n24642_, NET_167 ) -NET_3740 = AND ( new_n24642_, NET_168 ) -NET_3741 = AND ( new_n24642_, NET_169 ) -NET_3742 = AND ( new_n24642_, NET_170 ) -NET_3743 = AND ( new_n24642_, NET_171 ) -NET_3744 = AND ( new_n24642_, NET_172 ) -NET_3745 = AND ( new_n24642_, NET_173 ) -NET_3746 = AND ( new_n24642_, NET_174 ) -new_n24673_ = NOT ( NET_144 ) -new_n24674_ = NOR ( NET_166, NET_165, NET_164, NET_163 ) -new_n24675_ = NOR ( NET_162, NET_161, NET_160, NET_159 ) -new_n24676_ = NOR ( NET_174, NET_173, NET_172, NET_171 ) -new_n24677_ = NOR ( NET_170, NET_169, NET_168, NET_167 ) -new_n24678_ = NAND ( new_n24677_, new_n24676_, new_n24675_, new_n24674_ ) -new_n24679_ = NOR ( NET_150, NET_149, NET_148, NET_147 ) -new_n24680_ = NAND ( NET_144, NET_143 ) -new_n24681_ = NAND ( new_n24680_, new_n24679_, new_n24640_, new_n24636_ ) -new_n24682_ = NOR ( NET_158, NET_157, NET_156, NET_155 ) -new_n24683_ = NOR ( NET_154, NET_153 ) -new_n24684_ = NAND ( new_n24683_, new_n24682_, new_n24649_, new_n24647_ ) -new_n24685_ = NOR ( new_n24684_, new_n24681_, new_n24678_ ) -new_n24686_ = NAND ( new_n24685_, new_n14023_, new_n24673_ ) -new_n24687_ = NOT ( NET_540 ) -new_n24688_ = OR ( new_n24685_, new_n24687_ ) -new_n24689_ = NOT ( NET_143 ) -new_n24690_ = NAND ( new_n24685_, new_n14175_, new_n24673_, new_n24689_ ) -NET_3747 = NAND ( new_n24690_, new_n24688_, new_n24686_ ) -new_n24692_ = NAND ( new_n24685_, NET_509 ) -new_n24693_ = NOT ( NET_542 ) -new_n24694_ = OR ( new_n24685_, new_n24693_ ) -NET_3748 = NAND ( new_n24694_, new_n24692_, new_n24690_ ) -new_n24696_ = NAND ( new_n24685_, NET_508 ) -new_n24697_ = NOT ( NET_543 ) -new_n24698_ = OR ( new_n24685_, new_n24697_ ) -NET_3749 = NAND ( new_n24698_, new_n24696_, new_n24692_ ) -new_n24700_ = NAND ( NET_552, NET_142 ) -NET_3750 = NAND ( new_n24700_, new_n24642_ ) -new_n24702_ = OR ( NET_591, new_n24626_ ) -new_n24703_ = NAND ( new_n24702_, new_n24340_, NET_997 ) -new_n24704_ = NAND ( new_n24703_, new_n24209_ ) -new_n24705_ = NAND ( new_n5812_, NET_590, new_n24213_ ) -new_n24706_ = NOT ( NET_591 ) -new_n24707_ = OR ( new_n24338_, new_n24706_, new_n24209_ ) -new_n24708_ = NOR ( NET_591, NET_589 ) -new_n24709_ = NOT ( new_n24708_ ) -NET_3828 = NAND ( new_n24709_, new_n24707_, new_n24705_, new_n24704_ ) -new_n24711_ = NOT ( NET_594 ) -new_n24712_ = NAND ( NET_591, NET_590, new_n24213_ ) -new_n24713_ = NAND ( new_n24712_, new_n24342_ ) -NET_3829 = NOR ( new_n24713_, new_n24711_ ) -new_n24715_ = NOT ( NET_595 ) -NET_3830 = NOR ( new_n24713_, new_n24715_ ) -new_n24717_ = NOT ( new_n24713_ ) -NET_3831 = AND ( new_n24717_, NET_596 ) -NET_3832 = AND ( new_n24717_, NET_597 ) -NET_3833 = AND ( new_n24717_, NET_598 ) -NET_3834 = AND ( new_n24717_, NET_599 ) -new_n24722_ = NOT ( NET_600 ) -NET_3835 = NOR ( new_n24713_, new_n24722_ ) -new_n24724_ = NOT ( NET_601 ) -NET_3836 = NOR ( new_n24713_, new_n24724_ ) -NET_3837 = AND ( new_n24717_, NET_602 ) -NET_3838 = AND ( new_n24717_, NET_603 ) -NET_3839 = AND ( new_n24717_, NET_604 ) -NET_3840 = AND ( new_n24717_, NET_605 ) -NET_3841 = AND ( new_n24717_, NET_606 ) -NET_3842 = AND ( new_n24717_, NET_607 ) -NET_3843 = AND ( new_n24717_, NET_608 ) -NET_3844 = AND ( new_n24717_, NET_609 ) -NET_3845 = AND ( new_n24717_, NET_610 ) -NET_3846 = AND ( new_n24717_, NET_611 ) -NET_3847 = AND ( new_n24717_, NET_612 ) -NET_3848 = AND ( new_n24717_, NET_613 ) -NET_3849 = AND ( new_n24717_, NET_614 ) -NET_3850 = AND ( new_n24717_, NET_615 ) -NET_3851 = AND ( new_n24717_, NET_616 ) -NET_3852 = AND ( new_n24717_, NET_617 ) -NET_3853 = AND ( new_n24717_, NET_618 ) -NET_3854 = AND ( new_n24717_, NET_619 ) -NET_3855 = AND ( new_n24717_, NET_620 ) -NET_3856 = AND ( new_n24717_, NET_621 ) -NET_3857 = AND ( new_n24717_, NET_622 ) -NET_3858 = AND ( new_n24717_, NET_623 ) -new_n24748_ = NOT ( NET_593 ) -new_n24749_ = NOR ( NET_615, NET_614, NET_613, NET_612 ) -new_n24750_ = NOR ( NET_611, NET_610, NET_609, NET_608 ) -new_n24751_ = NOR ( NET_623, NET_622, NET_621, NET_620 ) -new_n24752_ = NOR ( NET_619, NET_618, NET_617, NET_616 ) -new_n24753_ = NAND ( new_n24752_, new_n24751_, new_n24750_, new_n24749_ ) -new_n24754_ = NOR ( NET_599, NET_598, NET_597, NET_596 ) -new_n24755_ = NAND ( NET_593, NET_592 ) -new_n24756_ = NAND ( new_n24755_, new_n24754_, new_n24715_, new_n24711_ ) -new_n24757_ = NOR ( NET_607, NET_606, NET_605, NET_604 ) -new_n24758_ = NOR ( NET_603, NET_602 ) -new_n24759_ = NAND ( new_n24758_, new_n24757_, new_n24724_, new_n24722_ ) -new_n24760_ = NOR ( new_n24759_, new_n24756_, new_n24753_ ) -new_n24761_ = NAND ( new_n24760_, new_n14331_, new_n24748_ ) -new_n24762_ = NOT ( NET_989 ) -new_n24763_ = OR ( new_n24760_, new_n24762_ ) -new_n24764_ = NOT ( NET_592 ) -new_n24765_ = NAND ( new_n24760_, new_n14483_, new_n24748_, new_n24764_ ) -NET_3859 = NAND ( new_n24765_, new_n24763_, new_n24761_ ) -new_n24767_ = NAND ( new_n24760_, NET_958 ) -new_n24768_ = NOT ( NET_991 ) -new_n24769_ = OR ( new_n24760_, new_n24768_ ) -NET_3860 = NAND ( new_n24769_, new_n24767_, new_n24765_ ) -new_n24771_ = NAND ( new_n24760_, NET_957 ) -new_n24772_ = NOT ( NET_992 ) -new_n24773_ = OR ( new_n24760_, new_n24772_ ) -NET_3861 = NAND ( new_n24773_, new_n24771_, new_n24767_ ) -new_n24775_ = NAND ( NET_591, NET_1001 ) -NET_3862 = NAND ( new_n24775_, new_n24717_ ) -new_n24777_ = OR ( new_n24626_, NET_1040 ) -new_n24778_ = NAND ( new_n24777_, new_n24498_, NET_1446 ) -new_n24779_ = NAND ( new_n24778_, new_n24367_ ) -new_n24780_ = NAND ( new_n6181_, NET_1039, new_n24371_ ) -new_n24781_ = NOT ( NET_1040 ) -new_n24782_ = OR ( new_n24496_, new_n24781_, new_n24367_ ) -new_n24783_ = NOR ( NET_1040, NET_1038 ) -new_n24784_ = NOT ( new_n24783_ ) -NET_3940 = NAND ( new_n24784_, new_n24782_, new_n24780_, new_n24779_ ) -new_n24786_ = NOT ( NET_1043 ) -new_n24787_ = NAND ( NET_1040, NET_1039, new_n24371_ ) -new_n24788_ = NAND ( new_n24787_, new_n24500_ ) -NET_3941 = NOR ( new_n24788_, new_n24786_ ) -new_n24790_ = NOT ( NET_1044 ) -NET_3942 = NOR ( new_n24788_, new_n24790_ ) -new_n24792_ = NOT ( new_n24788_ ) -NET_3943 = AND ( new_n24792_, NET_1045 ) -NET_3944 = AND ( new_n24792_, NET_1046 ) -NET_3945 = AND ( new_n24792_, NET_1047 ) -NET_3946 = AND ( new_n24792_, NET_1048 ) -new_n24797_ = NOT ( NET_1049 ) -NET_3947 = NOR ( new_n24788_, new_n24797_ ) -new_n24799_ = NOT ( NET_1050 ) -NET_3948 = NOR ( new_n24788_, new_n24799_ ) -NET_3949 = AND ( new_n24792_, NET_1051 ) -NET_3950 = AND ( new_n24792_, NET_1052 ) -NET_3951 = AND ( new_n24792_, NET_1053 ) -NET_3952 = AND ( new_n24792_, NET_1054 ) -NET_3953 = AND ( new_n24792_, NET_1055 ) -NET_3954 = AND ( new_n24792_, NET_1056 ) -NET_3955 = AND ( new_n24792_, NET_1057 ) -NET_3956 = AND ( new_n24792_, NET_1058 ) -NET_3957 = AND ( new_n24792_, NET_1059 ) -NET_3958 = AND ( new_n24792_, NET_1060 ) -NET_3959 = AND ( new_n24792_, NET_1061 ) -NET_3960 = AND ( new_n24792_, NET_1062 ) -NET_3961 = AND ( new_n24792_, NET_1063 ) -NET_3962 = AND ( new_n24792_, NET_1064 ) -NET_3963 = AND ( new_n24792_, NET_1065 ) -NET_3964 = AND ( new_n24792_, NET_1066 ) -NET_3965 = AND ( new_n24792_, NET_1067 ) -NET_3966 = AND ( new_n24792_, NET_1068 ) -NET_3967 = AND ( new_n24792_, NET_1069 ) -NET_3968 = AND ( new_n24792_, NET_1070 ) -NET_3969 = AND ( new_n24792_, NET_1071 ) -NET_3970 = AND ( new_n24792_, NET_1072 ) -new_n24823_ = NOT ( NET_1042 ) -new_n24824_ = NOR ( NET_1064, NET_1063, NET_1062, NET_1061 ) -new_n24825_ = NOR ( NET_1060, NET_1059, NET_1058, NET_1057 ) -new_n24826_ = NOR ( NET_1072, NET_1071, NET_1070, NET_1069 ) -new_n24827_ = NOR ( NET_1068, NET_1067, NET_1066, NET_1065 ) -new_n24828_ = NAND ( new_n24827_, new_n24826_, new_n24825_, new_n24824_ ) -new_n24829_ = NOR ( NET_1048, NET_1047, NET_1046, NET_1045 ) -new_n24830_ = NAND ( NET_1042, NET_1041 ) -new_n24831_ = NAND ( new_n24830_, new_n24829_, new_n24790_, new_n24786_ ) -new_n24832_ = NOR ( NET_1056, NET_1055, NET_1054, NET_1053 ) -new_n24833_ = NOR ( NET_1052, NET_1051 ) -new_n24834_ = NAND ( new_n24833_, new_n24832_, new_n24799_, new_n24797_ ) -new_n24835_ = NOR ( new_n24834_, new_n24831_, new_n24828_ ) -new_n24836_ = NAND ( new_n24835_, new_n14639_, new_n24823_ ) -new_n24837_ = NOT ( NET_1438 ) -new_n24838_ = OR ( new_n24835_, new_n24837_ ) -new_n24839_ = NOT ( NET_1041 ) -new_n24840_ = NAND ( new_n24835_, new_n14791_, new_n24823_, new_n24839_ ) -NET_3971 = NAND ( new_n24840_, new_n24838_, new_n24836_ ) -new_n24842_ = NAND ( new_n24835_, NET_1407 ) -new_n24843_ = NOT ( NET_1440 ) -new_n24844_ = OR ( new_n24835_, new_n24843_ ) -NET_3972 = NAND ( new_n24844_, new_n24842_, new_n24840_ ) -new_n24846_ = NAND ( new_n24835_, NET_1406 ) -new_n24847_ = NOT ( NET_1441 ) -new_n24848_ = OR ( new_n24835_, new_n24847_ ) -NET_3973 = NAND ( new_n24848_, new_n24846_, new_n24842_ ) -new_n24850_ = NOT ( NET_1450 ) -new_n24851_ = NOR ( new_n24850_, new_n24781_ ) -NET_3974 = OR ( new_n24851_, new_n24788_ ) -new_n24853_ = OR ( NET_892, new_n6117_ ) -new_n24854_ = OR ( NET_1341, new_n6502_ ) -new_n24855_ = OR ( NET_443, new_n5748_ ) -new_n24856_ = NAND ( new_n24855_, new_n24854_, new_n24853_ ) -new_n24857_ = OR ( new_n24856_, new_n24027_ ) -new_n24858_ = NAND ( new_n24856_, NET_559 ) -NET_4064 = NAND ( new_n24858_, new_n24857_ ) -new_n24860_ = OR ( new_n24856_, new_n24032_ ) -new_n24861_ = NAND ( new_n24856_, NET_560 ) -NET_4065 = NAND ( new_n24861_, new_n24860_ ) -new_n24863_ = OR ( new_n24856_, new_n24037_ ) -new_n24864_ = NAND ( new_n24856_, NET_561 ) -NET_4066 = NAND ( new_n24864_, new_n24863_ ) -new_n24866_ = OR ( new_n24856_, new_n24042_ ) -new_n24867_ = NAND ( new_n24856_, NET_562 ) -NET_4067 = NAND ( new_n24867_, new_n24866_ ) -new_n24869_ = OR ( new_n24856_, new_n24047_ ) -new_n24870_ = NAND ( new_n24856_, NET_563 ) -NET_4068 = NAND ( new_n24870_, new_n24869_ ) -new_n24872_ = OR ( new_n24856_, new_n24052_ ) -new_n24873_ = NAND ( new_n24856_, NET_564 ) -NET_4069 = NAND ( new_n24873_, new_n24872_ ) -new_n24875_ = OR ( new_n24856_, new_n24057_ ) -new_n24876_ = NAND ( new_n24856_, NET_565 ) -NET_4070 = NAND ( new_n24876_, new_n24875_ ) -new_n24878_ = OR ( new_n24856_, new_n24062_ ) -new_n24879_ = NAND ( new_n24856_, NET_566 ) -NET_4071 = NAND ( new_n24879_, new_n24878_ ) -new_n24881_ = OR ( new_n24856_, new_n24067_ ) -new_n24882_ = NAND ( new_n24856_, NET_567 ) -NET_4072 = NAND ( new_n24882_, new_n24881_ ) -new_n24884_ = OR ( new_n24856_, new_n24072_ ) -new_n24885_ = NAND ( new_n24856_, NET_568 ) -NET_4073 = NAND ( new_n24885_, new_n24884_ ) -new_n24887_ = OR ( new_n24856_, new_n24077_ ) -new_n24888_ = NAND ( new_n24856_, NET_569 ) -NET_4074 = NAND ( new_n24888_, new_n24887_ ) -new_n24890_ = OR ( new_n24856_, new_n24082_ ) -new_n24891_ = NAND ( new_n24856_, NET_570 ) -NET_4075 = NAND ( new_n24891_, new_n24890_ ) -new_n24893_ = OR ( new_n24856_, new_n24087_ ) -new_n24894_ = NAND ( new_n24856_, NET_571 ) -NET_4076 = NAND ( new_n24894_, new_n24893_ ) -new_n24896_ = OR ( new_n24856_, new_n24092_ ) -new_n24897_ = NAND ( new_n24856_, NET_572 ) -NET_4077 = NAND ( new_n24897_, new_n24896_ ) -new_n24899_ = OR ( new_n24856_, new_n24097_ ) -new_n24900_ = NAND ( new_n24856_, NET_573 ) -NET_4078 = NAND ( new_n24900_, new_n24899_ ) -new_n24902_ = OR ( new_n24856_, new_n24102_ ) -new_n24903_ = NAND ( new_n24856_, NET_574 ) -NET_4079 = NAND ( new_n24903_, new_n24902_ ) -new_n24905_ = OR ( new_n24856_, new_n24107_ ) -new_n24906_ = NAND ( new_n24856_, NET_575 ) -NET_4080 = NAND ( new_n24906_, new_n24905_ ) -new_n24908_ = OR ( new_n24856_, new_n24112_ ) -new_n24909_ = NAND ( new_n24856_, NET_576 ) -NET_4081 = NAND ( new_n24909_, new_n24908_ ) -new_n24911_ = OR ( new_n24856_, new_n24117_ ) -new_n24912_ = NAND ( new_n24856_, NET_577 ) -NET_4082 = NAND ( new_n24912_, new_n24911_ ) -new_n24914_ = OR ( new_n24856_, new_n24122_ ) -new_n24915_ = NAND ( new_n24856_, NET_578 ) -NET_4083 = NAND ( new_n24915_, new_n24914_ ) -new_n24917_ = OR ( new_n24856_, new_n24127_ ) -new_n24918_ = NAND ( new_n24856_, NET_579 ) -NET_4084 = NAND ( new_n24918_, new_n24917_ ) -new_n24920_ = OR ( new_n24856_, new_n24132_ ) -new_n24921_ = NAND ( new_n24856_, NET_580 ) -NET_4085 = NAND ( new_n24921_, new_n24920_ ) -new_n24923_ = OR ( new_n24856_, new_n24137_ ) -new_n24924_ = NAND ( new_n24856_, NET_581 ) -NET_4086 = NAND ( new_n24924_, new_n24923_ ) -new_n24926_ = OR ( new_n24856_, new_n24142_ ) -new_n24927_ = NAND ( new_n24856_, NET_582 ) -NET_4087 = NAND ( new_n24927_, new_n24926_ ) -new_n24929_ = OR ( new_n24856_, new_n24147_ ) -new_n24930_ = NAND ( new_n24856_, NET_583 ) -NET_4088 = NAND ( new_n24930_, new_n24929_ ) -new_n24932_ = OR ( new_n24856_, new_n24152_ ) -new_n24933_ = NAND ( new_n24856_, NET_584 ) -NET_4089 = NAND ( new_n24933_, new_n24932_ ) -new_n24935_ = OR ( new_n24856_, new_n24157_ ) -new_n24936_ = NAND ( new_n24856_, NET_585 ) -NET_4090 = NAND ( new_n24936_, new_n24935_ ) -new_n24938_ = OR ( new_n24856_, new_n24162_ ) -new_n24939_ = NAND ( new_n24856_, NET_586 ) -NET_4091 = NAND ( new_n24939_, new_n24938_ ) -new_n24941_ = OR ( new_n24856_, new_n24167_ ) -new_n24942_ = NAND ( new_n24856_, NET_587 ) -NET_4092 = NAND ( new_n24942_, new_n24941_ ) -new_n24944_ = OR ( new_n24856_, new_n24172_ ) -new_n24945_ = NAND ( new_n24856_, NET_588 ) -NET_4093 = NAND ( new_n24945_, new_n24944_ ) -new_n24947_ = OR ( NET_548, NET_33 ) -new_n24948_ = NAND ( new_n24947_, new_n24626_, NET_142 ) -new_n24949_ = NAND ( new_n24948_, new_n24024_ ) -new_n24950_ = NAND ( new_n24949_, new_n5514_, NET_141 ) -new_n24951_ = NAND ( new_n24183_, new_n24180_, NET_33 ) -new_n24952_ = NAND ( new_n24626_, new_n24631_, NET_140 ) -new_n24953_ = NAND ( new_n5803_, NET_33, NET_142, new_n24020_ ) -new_n24954_ = AND ( new_n24953_, new_n24952_, new_n24022_ ) -NET_4191 = NAND ( new_n24954_, new_n24951_, new_n24950_ ) -new_n24956_ = OR ( new_n24692_, new_n14175_ ) -new_n24957_ = NOT ( NET_541 ) -new_n24958_ = OR ( new_n24685_, new_n24957_ ) -new_n24959_ = NOR ( new_n14175_, new_n24689_ ) -new_n24960_ = OR ( new_n24959_, new_n24686_ ) -NET_4192 = NAND ( new_n24960_, new_n24958_, new_n24956_ ) -new_n24962_ = NAND ( new_n24638_, NET_35 ) -new_n24963_ = OR ( new_n24638_, new_n6766_ ) -NET_4193 = NAND ( new_n24963_, new_n24962_, new_n24186_ ) -new_n24965_ = OR ( new_n24638_, new_n24673_ ) -new_n24966_ = OR ( new_n24633_, NET_35 ) -new_n24967_ = NAND ( new_n24966_, new_n24638_ ) -NET_4211 = NAND ( new_n24967_, new_n24965_ ) -new_n24969_ = OR ( new_n24966_, new_n24642_ ) -new_n24970_ = OR ( new_n24638_, new_n24689_ ) -NET_4212 = NAND ( new_n24970_, new_n24969_ ) -new_n24972_ = OR ( NET_997, NET_33 ) -new_n24973_ = NAND ( new_n24972_, NET_591, new_n24626_ ) -new_n24974_ = NAND ( new_n24973_, new_n24213_ ) -new_n24975_ = NAND ( new_n24974_, new_n5812_, NET_590 ) -new_n24976_ = NAND ( new_n24342_, new_n24339_, NET_33 ) -new_n24977_ = NAND ( new_n24706_, NET_589, new_n24626_ ) -new_n24978_ = NAND ( new_n6172_, NET_591, new_n24209_, NET_33 ) -new_n24979_ = AND ( new_n24978_, new_n24977_, new_n24211_ ) -NET_4293 = NAND ( new_n24979_, new_n24976_, new_n24975_ ) -new_n24981_ = OR ( new_n24767_, new_n14483_ ) -new_n24982_ = NOT ( NET_990 ) -new_n24983_ = OR ( new_n24760_, new_n24982_ ) -new_n24984_ = NOR ( new_n14483_, new_n24764_ ) -new_n24985_ = OR ( new_n24984_, new_n24761_ ) -NET_4294 = NAND ( new_n24985_, new_n24983_, new_n24981_ ) -new_n24987_ = NAND ( new_n24713_, NET_35 ) -new_n24988_ = OR ( new_n24713_, new_n6926_ ) -NET_4295 = NAND ( new_n24988_, new_n24987_, new_n24345_ ) -new_n24990_ = OR ( new_n24713_, new_n24748_ ) -new_n24991_ = OR ( new_n24708_, NET_35 ) -new_n24992_ = NAND ( new_n24991_, new_n24713_ ) -NET_4313 = NAND ( new_n24992_, new_n24990_ ) -new_n24994_ = OR ( new_n24991_, new_n24717_ ) -new_n24995_ = OR ( new_n24713_, new_n24764_ ) -NET_4314 = NAND ( new_n24995_, new_n24994_ ) -new_n24997_ = OR ( NET_33, NET_1446 ) -new_n24998_ = NAND ( new_n24997_, new_n24626_, NET_1040 ) -new_n24999_ = NAND ( new_n24998_, new_n24371_ ) -new_n25000_ = NAND ( new_n24999_, new_n6181_, NET_1039 ) -new_n25001_ = NAND ( new_n24500_, new_n24497_, NET_33 ) -new_n25002_ = NAND ( new_n24626_, new_n24781_, NET_1038 ) -new_n25003_ = NAND ( NET_33, new_n6557_, NET_1040, new_n24367_ ) -new_n25004_ = AND ( new_n25003_, new_n25002_, new_n24369_ ) -NET_4395 = NAND ( new_n25004_, new_n25001_, new_n25000_ ) -new_n25006_ = OR ( new_n24842_, new_n14791_ ) -new_n25007_ = NOT ( NET_1439 ) -new_n25008_ = OR ( new_n24835_, new_n25007_ ) -new_n25009_ = NOR ( new_n14791_, new_n24839_ ) -new_n25010_ = OR ( new_n25009_, new_n24836_ ) -NET_4396 = NAND ( new_n25010_, new_n25008_, new_n25006_ ) -new_n25012_ = NAND ( new_n24788_, NET_35 ) -new_n25013_ = OR ( new_n24788_, new_n7086_ ) -NET_4397 = NAND ( new_n25013_, new_n25012_, new_n24503_ ) -new_n25015_ = OR ( new_n24788_, new_n24823_ ) -new_n25016_ = OR ( new_n24783_, NET_35 ) -new_n25017_ = NAND ( new_n25016_, new_n24788_ ) -NET_4415 = NAND ( new_n25017_, new_n25015_ ) -new_n25019_ = OR ( new_n25016_, new_n24792_ ) -new_n25020_ = OR ( new_n24788_, new_n24839_ ) -NET_4416 = NAND ( new_n25020_, new_n25019_ ) -new_n25022_ = NAND ( new_n24850_, NET_1448, new_n24504_, NET_1442 ) -new_n25023_ = NAND ( new_n24514_, new_n24518_, new_n24522_, new_n24526_ ) -NET_58840 = OR ( new_n25023_, new_n25022_, new_n6225_, new_n6203_ ) -NET_4503 = NAND ( NET_58840, new_n24014_, new_n5856_ ) -new_n25026_ = OR ( NET_4503, new_n5285_ ) -new_n25027_ = NAND ( new_n24014_, new_n5856_ ) -new_n25028_ = NAND ( new_n25027_, NET_58840, NET_38 ) -new_n25029_ = OR ( NET_58840, new_n5399_ ) -NET_5413 = NAND ( new_n25029_, new_n25028_, new_n25026_ ) -new_n25031_ = OR ( NET_4503, new_n5292_ ) -new_n25032_ = NAND ( new_n25027_, NET_58840, NET_39 ) -new_n25033_ = OR ( NET_58840, new_n5406_ ) -NET_5414 = NAND ( new_n25033_, new_n25032_, new_n25031_ ) -new_n25035_ = OR ( NET_4503, new_n5299_ ) -new_n25036_ = NAND ( new_n25027_, NET_58840, NET_40 ) -new_n25037_ = OR ( NET_58840, new_n5413_ ) -NET_5415 = NAND ( new_n25037_, new_n25036_, new_n25035_ ) -new_n25039_ = OR ( NET_4503, new_n5306_ ) -new_n25040_ = NAND ( new_n25027_, NET_58840, NET_41 ) -new_n25041_ = OR ( NET_58840, new_n5420_ ) -NET_5416 = NAND ( new_n25041_, new_n25040_, new_n25039_ ) -new_n25043_ = OR ( NET_4503, new_n5313_ ) -new_n25044_ = NAND ( new_n25027_, NET_58840, NET_42 ) -new_n25045_ = OR ( NET_58840, new_n5427_ ) -NET_5417 = NAND ( new_n25045_, new_n25044_, new_n25043_ ) -new_n25047_ = OR ( NET_4503, new_n5320_ ) -new_n25048_ = NAND ( new_n25027_, NET_58840, NET_43 ) -new_n25049_ = OR ( NET_58840, new_n5434_ ) -NET_5418 = NAND ( new_n25049_, new_n25048_, new_n25047_ ) -new_n25051_ = OR ( NET_4503, new_n5327_ ) -new_n25052_ = NAND ( new_n25027_, NET_58840, NET_44 ) -new_n25053_ = OR ( NET_58840, new_n5441_ ) -NET_5419 = NAND ( new_n25053_, new_n25052_, new_n25051_ ) -new_n25055_ = OR ( NET_4503, new_n5334_ ) -new_n25056_ = NAND ( new_n25027_, NET_58840, NET_45 ) -new_n25057_ = OR ( NET_58840, new_n5448_ ) -NET_5420 = NAND ( new_n25057_, new_n25056_, new_n25055_ ) -new_n25059_ = OR ( NET_4503, new_n5341_ ) -new_n25060_ = NAND ( new_n25027_, NET_58840, NET_46 ) -new_n25061_ = OR ( NET_58840, new_n5455_ ) -NET_5421 = NAND ( new_n25061_, new_n25060_, new_n25059_ ) -new_n25063_ = OR ( NET_4503, new_n5348_ ) -new_n25064_ = NAND ( new_n25027_, NET_58840, NET_47 ) -new_n25065_ = OR ( NET_58840, new_n5462_ ) -NET_5422 = NAND ( new_n25065_, new_n25064_, new_n25063_ ) -new_n25067_ = OR ( NET_4503, new_n5355_ ) -new_n25068_ = NAND ( new_n25027_, NET_58840, NET_48 ) -new_n25069_ = OR ( NET_58840, new_n5469_ ) -NET_5423 = NAND ( new_n25069_, new_n25068_, new_n25067_ ) -new_n25071_ = OR ( NET_4503, new_n5362_ ) -new_n25072_ = NAND ( new_n25027_, NET_58840, NET_49 ) -new_n25073_ = OR ( NET_58840, new_n5476_ ) -NET_5424 = NAND ( new_n25073_, new_n25072_, new_n25071_ ) -new_n25075_ = OR ( NET_4503, new_n5369_ ) -new_n25076_ = NAND ( new_n25027_, NET_58840, NET_50 ) -new_n25077_ = OR ( NET_58840, new_n5483_ ) -NET_5425 = NAND ( new_n25077_, new_n25076_, new_n25075_ ) -new_n25079_ = OR ( NET_4503, new_n5376_ ) -new_n25080_ = NAND ( new_n25027_, NET_58840, NET_51 ) -new_n25081_ = OR ( NET_58840, new_n5490_ ) -NET_5426 = NAND ( new_n25081_, new_n25080_, new_n25079_ ) -new_n25083_ = OR ( NET_4503, new_n5383_ ) -new_n25084_ = NAND ( new_n25027_, NET_58840, NET_52 ) -new_n25085_ = OR ( NET_58840, new_n5497_ ) -NET_5427 = NAND ( new_n25085_, new_n25084_, new_n25083_ ) -new_n25087_ = OR ( NET_4503, new_n5390_ ) -new_n25088_ = NAND ( new_n25027_, NET_58840, NET_53 ) -new_n25089_ = OR ( NET_58840, new_n5504_ ) -NET_5428 = NAND ( new_n25089_, new_n25088_, new_n25087_ ) -new_n25091_ = OR ( NET_4503, new_n6047_ ) -new_n25092_ = NAND ( new_n25027_, NET_58840, NET_54 ) -new_n25093_ = OR ( NET_58840, new_n6432_ ) -NET_5429 = NAND ( new_n25093_, new_n25092_, new_n25091_ ) -new_n25095_ = OR ( NET_4503, new_n6052_ ) -new_n25096_ = NAND ( new_n25027_, NET_58840, NET_55 ) -new_n25097_ = OR ( NET_58840, new_n6437_ ) -NET_5430 = NAND ( new_n25097_, new_n25096_, new_n25095_ ) -new_n25099_ = OR ( NET_4503, new_n6057_ ) -new_n25100_ = NAND ( new_n25027_, NET_58840, NET_56 ) -new_n25101_ = OR ( NET_58840, new_n6442_ ) -NET_5431 = NAND ( new_n25101_, new_n25100_, new_n25099_ ) -new_n25103_ = OR ( NET_4503, new_n6062_ ) -new_n25104_ = NAND ( new_n25027_, NET_58840, NET_57 ) -new_n25105_ = OR ( NET_58840, new_n6447_ ) -NET_5432 = NAND ( new_n25105_, new_n25104_, new_n25103_ ) -new_n25107_ = OR ( NET_4503, new_n6067_ ) -new_n25108_ = NAND ( new_n25027_, NET_58840, NET_58 ) -new_n25109_ = OR ( NET_58840, new_n6452_ ) -NET_5433 = NAND ( new_n25109_, new_n25108_, new_n25107_ ) -new_n25111_ = OR ( NET_4503, new_n6072_ ) -new_n25112_ = NAND ( new_n25027_, NET_58840, NET_59 ) -new_n25113_ = OR ( NET_58840, new_n6457_ ) -NET_5434 = NAND ( new_n25113_, new_n25112_, new_n25111_ ) -new_n25115_ = OR ( NET_4503, new_n6077_ ) -new_n25116_ = NAND ( new_n25027_, NET_58840, NET_60 ) -new_n25117_ = OR ( NET_58840, new_n6462_ ) -NET_5435 = NAND ( new_n25117_, new_n25116_, new_n25115_ ) -new_n25119_ = OR ( NET_4503, new_n6082_ ) -new_n25120_ = NAND ( new_n25027_, NET_58840, NET_61 ) -new_n25121_ = OR ( NET_58840, new_n6467_ ) -NET_5436 = NAND ( new_n25121_, new_n25120_, new_n25119_ ) -new_n25123_ = OR ( NET_4503, new_n6087_ ) -new_n25124_ = NAND ( new_n25027_, NET_58840 ) -new_n25125_ = OR ( new_n25124_, new_n8813_ ) -new_n25126_ = OR ( NET_58840, new_n6472_ ) -NET_5437 = NAND ( new_n25126_, new_n25125_, new_n25123_ ) -new_n25128_ = OR ( NET_4503, new_n6092_ ) -new_n25129_ = OR ( new_n25124_, new_n8791_ ) -new_n25130_ = OR ( NET_58840, new_n6477_ ) -NET_5438 = NAND ( new_n25130_, new_n25129_, new_n25128_ ) -new_n25132_ = OR ( NET_4503, new_n6097_ ) -new_n25133_ = OR ( new_n25124_, new_n8769_ ) -new_n25134_ = OR ( NET_58840, new_n6482_ ) -NET_5439 = NAND ( new_n25134_, new_n25133_, new_n25132_ ) -new_n25136_ = OR ( NET_4503, new_n6102_ ) -new_n25137_ = OR ( new_n25124_, new_n8748_ ) -new_n25138_ = OR ( NET_58840, new_n6487_ ) -NET_5440 = NAND ( new_n25138_, new_n25137_, new_n25136_ ) -new_n25140_ = OR ( NET_4503, new_n6107_ ) -new_n25141_ = OR ( new_n25124_, new_n8727_ ) -new_n25142_ = OR ( NET_58840, new_n6492_ ) -NET_5441 = NAND ( new_n25142_, new_n25141_, new_n25140_ ) -new_n25144_ = OR ( NET_4503, new_n6112_ ) -new_n25145_ = OR ( new_n25124_, new_n8706_ ) -new_n25146_ = OR ( NET_58840, new_n6497_ ) -NET_5442 = NAND ( new_n25146_, new_n25145_, new_n25144_ ) -new_n25148_ = OR ( NET_4503, new_n6117_ ) -new_n25149_ = NAND ( new_n25027_, NET_58840, NET_68 ) -new_n25150_ = OR ( NET_58840, new_n6502_ ) -NET_5443 = NAND ( new_n25150_, new_n25149_, new_n25148_ ) -new_n25152_ = OR ( NET_4503, new_n3709_ ) -new_n25153_ = OR ( new_n25124_, new_n8661_ ) -new_n25154_ = OR ( NET_58840, new_n4453_ ) -NET_5444 = NAND ( new_n25154_, new_n25153_, new_n25152_ ) -NET_1453 = BUF ( NET_443 ) -NET_1454 = BUF ( NET_442 ) -NET_1455 = BUF ( NET_441 ) -NET_1456 = BUF ( NET_440 ) -NET_1457 = BUF ( NET_439 ) -NET_1458 = BUF ( NET_438 ) -NET_1459 = BUF ( NET_437 ) -NET_1460 = BUF ( NET_436 ) -NET_1461 = BUF ( NET_435 ) -NET_1462 = BUF ( NET_434 ) -NET_1463 = BUF ( NET_433 ) -NET_1464 = BUF ( NET_432 ) -NET_1465 = BUF ( NET_431 ) -NET_1466 = BUF ( NET_430 ) -NET_1467 = BUF ( NET_429 ) -NET_1468 = BUF ( NET_428 ) -NET_1469 = BUF ( NET_427 ) -NET_1470 = BUF ( NET_426 ) -NET_1471 = BUF ( NET_425 ) -NET_1472 = BUF ( NET_424 ) -NET_1473 = BUF ( NET_423 ) -NET_1474 = BUF ( NET_422 ) -NET_1475 = BUF ( NET_421 ) -NET_1476 = BUF ( NET_420 ) -NET_1477 = BUF ( NET_419 ) -NET_1478 = BUF ( NET_418 ) -NET_1479 = BUF ( NET_417 ) -NET_1480 = BUF ( NET_416 ) -NET_1481 = BUF ( NET_415 ) -NET_1482 = BUF ( NET_414 ) -NET_1483 = BUF ( NET_413 ) -NET_1484 = BUF ( NET_412 ) -NET_1485 = BUF ( NET_1008 ) -NET_1486 = BUF ( NET_1009 ) -NET_1487 = BUF ( NET_1010 ) -NET_1488 = BUF ( NET_1011 ) -NET_1489 = BUF ( NET_1012 ) -NET_1490 = BUF ( NET_1013 ) -NET_1491 = BUF ( NET_1014 ) -NET_1492 = BUF ( NET_1015 ) -NET_1493 = BUF ( NET_1016 ) -NET_1494 = BUF ( NET_1017 ) -NET_1495 = BUF ( NET_1018 ) -NET_1496 = BUF ( NET_1019 ) -NET_1497 = BUF ( NET_1020 ) -NET_1498 = BUF ( NET_1021 ) -NET_1499 = BUF ( NET_1022 ) -NET_1500 = BUF ( NET_1023 ) -NET_1501 = BUF ( NET_1024 ) -NET_1502 = BUF ( NET_1025 ) -NET_1503 = BUF ( NET_1026 ) -NET_1504 = BUF ( NET_1027 ) -NET_1505 = BUF ( NET_1028 ) -NET_1506 = BUF ( NET_1029 ) -NET_1507 = BUF ( NET_1030 ) -NET_1508 = BUF ( NET_1031 ) -NET_1509 = BUF ( NET_1032 ) -NET_1510 = BUF ( NET_1033 ) -NET_1511 = BUF ( NET_1034 ) -NET_1512 = BUF ( NET_1035 ) -NET_1513 = BUF ( NET_1036 ) -NET_1514 = BUF ( NET_1037 ) -NET_1515 = BUF ( NET_544 ) -NET_1516 = BUF ( NET_549 ) -NET_1517 = BUF ( NET_550 ) -NET_1518 = BUF ( NET_1450 ) -NET_1519 = BUF ( NET_552 ) diff --git a/ITC99BENCH/b20.bench b/ITC99BENCH/b20.bench deleted file mode 100644 index 23dbc16..0000000 --- a/ITC99BENCH/b20.bench +++ /dev/null @@ -1,9247 +0,0 @@ -# generated by verilog2bench.py https://gitea.yuhangq.com/YuhangQ/any2bench -INPUT(NET_1) -INPUT(NET_10) -INPUT(NET_100) -INPUT(NET_101) -INPUT(NET_102) -INPUT(NET_103) -INPUT(NET_104) -INPUT(NET_105) -INPUT(NET_106) -INPUT(NET_107) -INPUT(NET_108) -INPUT(NET_109) -INPUT(NET_11) -INPUT(NET_110) -INPUT(NET_111) -INPUT(NET_112) -INPUT(NET_113) -INPUT(NET_114) -INPUT(NET_115) -INPUT(NET_116) -INPUT(NET_117) -INPUT(NET_118) -INPUT(NET_119) -INPUT(NET_12) -INPUT(NET_120) -INPUT(NET_121) -INPUT(NET_122) -INPUT(NET_123) -INPUT(NET_124) -INPUT(NET_125) -INPUT(NET_126) -INPUT(NET_127) -INPUT(NET_128) -INPUT(NET_129) -INPUT(NET_13) -INPUT(NET_130) -INPUT(NET_131) -INPUT(NET_132) -INPUT(NET_133) -INPUT(NET_134) -INPUT(NET_135) -INPUT(NET_136) -INPUT(NET_137) -INPUT(NET_138) -INPUT(NET_139) -INPUT(NET_14) -INPUT(NET_140) -INPUT(NET_141) -INPUT(NET_142) -INPUT(NET_143) -INPUT(NET_144) -INPUT(NET_145) -INPUT(NET_146) -INPUT(NET_147) -INPUT(NET_148) -INPUT(NET_149) -INPUT(NET_15) -INPUT(NET_150) -INPUT(NET_151) -INPUT(NET_152) -INPUT(NET_153) -INPUT(NET_154) -INPUT(NET_155) -INPUT(NET_156) -INPUT(NET_157) -INPUT(NET_158) -INPUT(NET_159) -INPUT(NET_16) -INPUT(NET_160) -INPUT(NET_161) -INPUT(NET_162) -INPUT(NET_163) -INPUT(NET_164) -INPUT(NET_165) -INPUT(NET_166) -INPUT(NET_167) -INPUT(NET_168) -INPUT(NET_169) -INPUT(NET_17) -INPUT(NET_170) -INPUT(NET_171) -INPUT(NET_172) -INPUT(NET_173) -INPUT(NET_174) -INPUT(NET_175) -INPUT(NET_176) -INPUT(NET_177) -INPUT(NET_178) -INPUT(NET_179) -INPUT(NET_18) -INPUT(NET_180) -INPUT(NET_181) -INPUT(NET_182) -INPUT(NET_183) -INPUT(NET_184) -INPUT(NET_185) -INPUT(NET_186) -INPUT(NET_187) -INPUT(NET_188) -INPUT(NET_189) -INPUT(NET_19) -INPUT(NET_190) -INPUT(NET_191) -INPUT(NET_192) -INPUT(NET_193) -INPUT(NET_194) -INPUT(NET_195) -INPUT(NET_196) -INPUT(NET_197) -INPUT(NET_198) -INPUT(NET_199) -INPUT(NET_2) -INPUT(NET_20) -INPUT(NET_200) -INPUT(NET_201) -INPUT(NET_202) -INPUT(NET_203) -INPUT(NET_204) -INPUT(NET_205) -INPUT(NET_206) -INPUT(NET_207) -INPUT(NET_208) -INPUT(NET_209) -INPUT(NET_21) -INPUT(NET_210) -INPUT(NET_211) -INPUT(NET_212) -INPUT(NET_213) -INPUT(NET_214) -INPUT(NET_215) -INPUT(NET_216) -INPUT(NET_217) -INPUT(NET_218) -INPUT(NET_219) -INPUT(NET_22) -INPUT(NET_220) -INPUT(NET_221) -INPUT(NET_222) -INPUT(NET_223) -INPUT(NET_224) -INPUT(NET_225) -INPUT(NET_226) -INPUT(NET_227) -INPUT(NET_228) -INPUT(NET_229) -INPUT(NET_23) -INPUT(NET_230) -INPUT(NET_231) -INPUT(NET_232) -INPUT(NET_233) -INPUT(NET_234) -INPUT(NET_235) -INPUT(NET_236) -INPUT(NET_237) -INPUT(NET_238) -INPUT(NET_239) -INPUT(NET_24) -INPUT(NET_240) -INPUT(NET_241) -INPUT(NET_242) -INPUT(NET_243) -INPUT(NET_244) -INPUT(NET_245) -INPUT(NET_246) -INPUT(NET_247) -INPUT(NET_248) -INPUT(NET_249) -INPUT(NET_25) -INPUT(NET_250) -INPUT(NET_251) -INPUT(NET_252) -INPUT(NET_253) -INPUT(NET_254) -INPUT(NET_255) -INPUT(NET_256) -INPUT(NET_257) -INPUT(NET_258) -INPUT(NET_259) -INPUT(NET_26) -INPUT(NET_260) -INPUT(NET_261) -INPUT(NET_262) -INPUT(NET_263) -INPUT(NET_264) -INPUT(NET_265) -INPUT(NET_266) -INPUT(NET_267) -INPUT(NET_268) -INPUT(NET_269) -INPUT(NET_27) -INPUT(NET_270) -INPUT(NET_271) -INPUT(NET_272) -INPUT(NET_273) -INPUT(NET_274) -INPUT(NET_275) -INPUT(NET_276) -INPUT(NET_277) -INPUT(NET_278) -INPUT(NET_279) -INPUT(NET_28) -INPUT(NET_280) -INPUT(NET_281) -INPUT(NET_282) -INPUT(NET_283) -INPUT(NET_284) -INPUT(NET_285) -INPUT(NET_286) -INPUT(NET_287) -INPUT(NET_288) -INPUT(NET_289) -INPUT(NET_29) -INPUT(NET_290) -INPUT(NET_291) -INPUT(NET_292) -INPUT(NET_293) -INPUT(NET_294) -INPUT(NET_295) -INPUT(NET_296) -INPUT(NET_297) -INPUT(NET_298) -INPUT(NET_299) -INPUT(NET_3) -INPUT(NET_30) -INPUT(NET_300) -INPUT(NET_301) -INPUT(NET_302) -INPUT(NET_303) -INPUT(NET_304) -INPUT(NET_305) -INPUT(NET_306) -INPUT(NET_307) -INPUT(NET_308) -INPUT(NET_309) -INPUT(NET_31) -INPUT(NET_310) -INPUT(NET_311) -INPUT(NET_312) -INPUT(NET_313) -INPUT(NET_314) -INPUT(NET_315) -INPUT(NET_316) -INPUT(NET_317) -INPUT(NET_318) -INPUT(NET_319) -INPUT(NET_32) -INPUT(NET_320) -INPUT(NET_321) -INPUT(NET_322) -INPUT(NET_323) -INPUT(NET_324) -INPUT(NET_325) -INPUT(NET_326) -INPUT(NET_327) -INPUT(NET_328) -INPUT(NET_329) -INPUT(NET_33) -INPUT(NET_330) -INPUT(NET_331) -INPUT(NET_332) -INPUT(NET_333) -INPUT(NET_334) -INPUT(NET_335) -INPUT(NET_336) -INPUT(NET_337) -INPUT(NET_338) -INPUT(NET_339) -INPUT(NET_34) -INPUT(NET_340) -INPUT(NET_341) -INPUT(NET_342) -INPUT(NET_343) -INPUT(NET_344) -INPUT(NET_345) -INPUT(NET_346) -INPUT(NET_347) -INPUT(NET_348) -INPUT(NET_349) -INPUT(NET_35) -INPUT(NET_350) -INPUT(NET_351) -INPUT(NET_352) -INPUT(NET_353) -INPUT(NET_354) -INPUT(NET_355) -INPUT(NET_356) -INPUT(NET_357) -INPUT(NET_358) -INPUT(NET_359) -INPUT(NET_36) -INPUT(NET_360) -INPUT(NET_361) -INPUT(NET_362) -INPUT(NET_363) -INPUT(NET_364) -INPUT(NET_365) -INPUT(NET_366) -INPUT(NET_367) -INPUT(NET_368) -INPUT(NET_369) -INPUT(NET_37) -INPUT(NET_370) -INPUT(NET_371) -INPUT(NET_372) -INPUT(NET_373) -INPUT(NET_374) -INPUT(NET_375) -INPUT(NET_376) -INPUT(NET_377) -INPUT(NET_378) -INPUT(NET_379) -INPUT(NET_38) -INPUT(NET_380) -INPUT(NET_381) -INPUT(NET_382) -INPUT(NET_383) -INPUT(NET_384) -INPUT(NET_385) -INPUT(NET_386) -INPUT(NET_387) -INPUT(NET_388) -INPUT(NET_389) -INPUT(NET_39) -INPUT(NET_390) -INPUT(NET_391) -INPUT(NET_392) -INPUT(NET_393) -INPUT(NET_394) -INPUT(NET_395) -INPUT(NET_396) -INPUT(NET_397) -INPUT(NET_398) -INPUT(NET_399) -INPUT(NET_4) -INPUT(NET_40) -INPUT(NET_400) -INPUT(NET_401) -INPUT(NET_402) -INPUT(NET_403) -INPUT(NET_404) -INPUT(NET_405) -INPUT(NET_406) -INPUT(NET_407) -INPUT(NET_408) -INPUT(NET_409) -INPUT(NET_41) -INPUT(NET_410) -INPUT(NET_411) -INPUT(NET_412) -INPUT(NET_413) -INPUT(NET_414) -INPUT(NET_415) -INPUT(NET_416) -INPUT(NET_417) -INPUT(NET_418) -INPUT(NET_419) -INPUT(NET_42) -INPUT(NET_420) -INPUT(NET_421) -INPUT(NET_422) -INPUT(NET_423) -INPUT(NET_424) -INPUT(NET_425) -INPUT(NET_426) -INPUT(NET_427) -INPUT(NET_428) -INPUT(NET_429) -INPUT(NET_43) -INPUT(NET_430) -INPUT(NET_431) -INPUT(NET_432) -INPUT(NET_433) -INPUT(NET_434) -INPUT(NET_435) -INPUT(NET_436) -INPUT(NET_437) -INPUT(NET_438) -INPUT(NET_439) -INPUT(NET_44) -INPUT(NET_440) -INPUT(NET_441) -INPUT(NET_442) -INPUT(NET_443) -INPUT(NET_444) -INPUT(NET_445) -INPUT(NET_446) -INPUT(NET_447) -INPUT(NET_448) -INPUT(NET_449) -INPUT(NET_45) -INPUT(NET_450) -INPUT(NET_451) -INPUT(NET_452) -INPUT(NET_453) -INPUT(NET_454) -INPUT(NET_455) -INPUT(NET_456) -INPUT(NET_457) -INPUT(NET_458) -INPUT(NET_459) -INPUT(NET_46) -INPUT(NET_460) -INPUT(NET_461) -INPUT(NET_462) -INPUT(NET_463) -INPUT(NET_464) -INPUT(NET_465) -INPUT(NET_466) -INPUT(NET_467) -INPUT(NET_468) -INPUT(NET_469) -INPUT(NET_47) -INPUT(NET_470) -INPUT(NET_471) -INPUT(NET_472) -INPUT(NET_473) -INPUT(NET_474) -INPUT(NET_475) -INPUT(NET_476) -INPUT(NET_477) -INPUT(NET_478) -INPUT(NET_479) -INPUT(NET_48) -INPUT(NET_480) -INPUT(NET_481) -INPUT(NET_482) -INPUT(NET_483) -INPUT(NET_484) -INPUT(NET_485) -INPUT(NET_486) -INPUT(NET_487) -INPUT(NET_488) -INPUT(NET_489) -INPUT(NET_49) -INPUT(NET_490) -INPUT(NET_491) -INPUT(NET_492) -INPUT(NET_493) -INPUT(NET_494) -INPUT(NET_495) -INPUT(NET_496) -INPUT(NET_497) -INPUT(NET_498) -INPUT(NET_499) -INPUT(NET_5) -INPUT(NET_50) -INPUT(NET_500) -INPUT(NET_501) -INPUT(NET_502) -INPUT(NET_503) -INPUT(NET_504) -INPUT(NET_505) -INPUT(NET_506) -INPUT(NET_507) -INPUT(NET_508) -INPUT(NET_509) -INPUT(NET_51) -INPUT(NET_510) -INPUT(NET_511) -INPUT(NET_512) -INPUT(NET_513) -INPUT(NET_514) -INPUT(NET_515) -INPUT(NET_516) -INPUT(NET_517) -INPUT(NET_518) -INPUT(NET_519) -INPUT(NET_52) -INPUT(NET_520) -INPUT(NET_521) -INPUT(NET_522) -INPUT(NET_53) -INPUT(NET_54) -INPUT(NET_55) -INPUT(NET_56) -INPUT(NET_57) -INPUT(NET_58) -INPUT(NET_59) -INPUT(NET_6) -INPUT(NET_60) -INPUT(NET_61) -INPUT(NET_62) -INPUT(NET_63) -INPUT(NET_64) -INPUT(NET_65) -INPUT(NET_66) -INPUT(NET_67) -INPUT(NET_68) -INPUT(NET_69) -INPUT(NET_7) -INPUT(NET_70) -INPUT(NET_71) -INPUT(NET_72) -INPUT(NET_73) -INPUT(NET_74) -INPUT(NET_75) -INPUT(NET_76) -INPUT(NET_77) -INPUT(NET_78) -INPUT(NET_79) -INPUT(NET_8) -INPUT(NET_80) -INPUT(NET_81) -INPUT(NET_82) -INPUT(NET_83) -INPUT(NET_84) -INPUT(NET_85) -INPUT(NET_86) -INPUT(NET_87) -INPUT(NET_88) -INPUT(NET_89) -INPUT(NET_9) -INPUT(NET_90) -INPUT(NET_91) -INPUT(NET_92) -INPUT(NET_93) -INPUT(NET_94) -INPUT(NET_95) -INPUT(NET_96) -INPUT(NET_97) -INPUT(NET_98) -INPUT(NET_99) -OUTPUT(NET_1178) -OUTPUT(NET_1346) -OUTPUT(NET_1530) -OUTPUT(NET_1658) -OUTPUT(NET_1661) -OUTPUT(NET_1668) -OUTPUT(NET_1749) -OUTPUT(NET_1760) -OUTPUT(NET_1794) -OUTPUT(NET_1861) -OUTPUT(NET_1887) -OUTPUT(NET_2051) -OUTPUT(NET_2055) -OUTPUT(NET_2104) -OUTPUT(NET_22556) -OUTPUT(NET_22557) -OUTPUT(NET_22558) -OUTPUT(NET_22559) -OUTPUT(NET_22560) -OUTPUT(NET_2397) -OUTPUT(NET_2766) -OUTPUT(NET_2831) -OUTPUT(NET_2832) -OUTPUT(NET_2833) -OUTPUT(NET_2834) -OUTPUT(NET_2835) -OUTPUT(NET_2836) -OUTPUT(NET_2837) -OUTPUT(NET_2838) -OUTPUT(NET_2839) -OUTPUT(NET_2840) -OUTPUT(NET_2841) -OUTPUT(NET_2842) -OUTPUT(NET_2843) -OUTPUT(NET_2844) -OUTPUT(NET_2845) -OUTPUT(NET_2846) -OUTPUT(NET_2847) -OUTPUT(NET_2848) -OUTPUT(NET_2849) -OUTPUT(NET_2850) -OUTPUT(NET_2851) -OUTPUT(NET_2852) -OUTPUT(NET_2853) -OUTPUT(NET_2854) -OUTPUT(NET_2855) -OUTPUT(NET_2856) -OUTPUT(NET_2857) -OUTPUT(NET_2858) -OUTPUT(NET_2859) -OUTPUT(NET_2860) -OUTPUT(NET_2861) -OUTPUT(NET_2962) -OUTPUT(NET_3132) -OUTPUT(NET_3133) -OUTPUT(NET_3285) -OUTPUT(NET_3286) -OUTPUT(NET_3287) -OUTPUT(NET_3288) -OUTPUT(NET_3289) -OUTPUT(NET_3290) -OUTPUT(NET_3291) -OUTPUT(NET_3292) -OUTPUT(NET_3293) -OUTPUT(NET_3294) -OUTPUT(NET_3295) -OUTPUT(NET_3296) -OUTPUT(NET_3297) -OUTPUT(NET_3298) -OUTPUT(NET_3299) -OUTPUT(NET_3300) -OUTPUT(NET_3301) -OUTPUT(NET_3302) -OUTPUT(NET_3303) -OUTPUT(NET_3304) -OUTPUT(NET_3305) -OUTPUT(NET_3306) -OUTPUT(NET_3307) -OUTPUT(NET_3308) -OUTPUT(NET_3309) -OUTPUT(NET_3310) -OUTPUT(NET_3311) -OUTPUT(NET_3312) -OUTPUT(NET_3313) -OUTPUT(NET_3314) -OUTPUT(NET_3405) -OUTPUT(NET_3409) -OUTPUT(NET_3410) -OUTPUT(NET_3411) -OUTPUT(NET_3412) -OUTPUT(NET_3413) -OUTPUT(NET_3414) -OUTPUT(NET_3415) -OUTPUT(NET_3416) -OUTPUT(NET_3417) -OUTPUT(NET_3418) -OUTPUT(NET_3419) -OUTPUT(NET_3420) -OUTPUT(NET_3421) -OUTPUT(NET_3422) -OUTPUT(NET_3423) -OUTPUT(NET_3424) -OUTPUT(NET_3425) -OUTPUT(NET_3426) -OUTPUT(NET_3427) -OUTPUT(NET_3428) -OUTPUT(NET_3429) -OUTPUT(NET_3430) -OUTPUT(NET_3431) -OUTPUT(NET_3501) -OUTPUT(NET_3504) -OUTPUT(NET_3508) -OUTPUT(NET_3509) -OUTPUT(NET_3510) -OUTPUT(NET_3511) -OUTPUT(NET_3512) -OUTPUT(NET_3513) -OUTPUT(NET_3514) -OUTPUT(NET_3515) -OUTPUT(NET_3516) -OUTPUT(NET_3517) -OUTPUT(NET_3518) -OUTPUT(NET_3519) -OUTPUT(NET_3520) -OUTPUT(NET_3521) -OUTPUT(NET_3522) -OUTPUT(NET_3523) -OUTPUT(NET_3524) -OUTPUT(NET_3525) -OUTPUT(NET_3526) -OUTPUT(NET_3527) -OUTPUT(NET_3528) -OUTPUT(NET_3529) -OUTPUT(NET_3530) -OUTPUT(NET_3531) -OUTPUT(NET_3532) -OUTPUT(NET_3533) -OUTPUT(NET_3534) -OUTPUT(NET_3585) -OUTPUT(NET_3593) -OUTPUT(NET_3666) -OUTPUT(NET_3667) -OUTPUT(NET_3687) -OUTPUT(NET_3951) -OUTPUT(NET_4032) -OUTPUT(NET_4036) -OUTPUT(NET_4049) -OUTPUT(NET_4050) -OUTPUT(NET_4166) -OUTPUT(NET_4170) -OUTPUT(NET_4391) -OUTPUT(NET_4392) -OUTPUT(NET_4569) -OUTPUT(NET_4570) -OUTPUT(NET_4571) -OUTPUT(NET_4572) -OUTPUT(NET_4635) -OUTPUT(NET_4638) -OUTPUT(NET_4642) -OUTPUT(NET_4666) -OUTPUT(NET_4669) -OUTPUT(NET_4850) -OUTPUT(NET_5034) -OUTPUT(NET_5100) -OUTPUT(NET_5195) -OUTPUT(NET_5295) -OUTPUT(NET_5302) -OUTPUT(NET_5445) -OUTPUT(NET_5510) -OUTPUT(NET_5512) -OUTPUT(NET_5513) -OUTPUT(NET_5514) -OUTPUT(NET_5515) -OUTPUT(NET_5516) -OUTPUT(NET_5564) -OUTPUT(NET_5583) -OUTPUT(NET_5584) -OUTPUT(NET_5585) -OUTPUT(NET_5586) -OUTPUT(NET_5587) -OUTPUT(NET_5588) -OUTPUT(NET_5633) -OUTPUT(NET_5646) -OUTPUT(NET_5685) -OUTPUT(NET_5689) -OUTPUT(NET_5707) -OUTPUT(NET_5708) -OUTPUT(NET_5709) -OUTPUT(NET_5710) -OUTPUT(NET_5711) -OUTPUT(NET_5759) -OUTPUT(NET_5760) -OUTPUT(NET_5787) -OUTPUT(NET_5838) -OUTPUT(NET_5845) -OUTPUT(NET_5846) -OUTPUT(NET_5847) -OUTPUT(NET_5860) -OUTPUT(NET_5861) -OUTPUT(NET_5862) -OUTPUT(NET_5863) -OUTPUT(NET_5864) -OUTPUT(NET_5905) -OUTPUT(NET_5906) -OUTPUT(NET_5907) -OUTPUT(NET_5908) -OUTPUT(NET_5931) -OUTPUT(NET_5996) -OUTPUT(NET_5997) -OUTPUT(NET_5998) -OUTPUT(NET_5999) -OUTPUT(NET_6011) -OUTPUT(NET_6012) -OUTPUT(NET_6013) -OUTPUT(NET_6014) -OUTPUT(NET_6050) -OUTPUT(NET_6055) -OUTPUT(NET_6056) -OUTPUT(NET_6067) -OUTPUT(NET_6068) -OUTPUT(NET_6110) -OUTPUT(NET_6116) -OUTPUT(NET_6117) -OUTPUT(NET_6118) -OUTPUT(NET_6119) -OUTPUT(NET_6133) -OUTPUT(NET_6134) -OUTPUT(NET_6135) -OUTPUT(NET_6136) -OUTPUT(NET_6183) -OUTPUT(NET_6184) -OUTPUT(NET_6205) -OUTPUT(NET_6206) -OUTPUT(NET_6243) -OUTPUT(NET_6244) -OUTPUT(NET_6246) -OUTPUT(NET_6247) -OUTPUT(NET_6260) -OUTPUT(NET_6312) -OUTPUT(NET_6313) -OUTPUT(NET_6339) -OUTPUT(NET_6340) -OUTPUT(NET_6341) -OUTPUT(NET_6342) -OUTPUT(NET_6392) -OUTPUT(NET_6393) -OUTPUT(NET_6395) -OUTPUT(NET_6396) -OUTPUT(NET_6403) -OUTPUT(NET_6404) -OUTPUT(NET_6463) -OUTPUT(NET_6464) -OUTPUT(NET_6465) -OUTPUT(NET_6466) -OUTPUT(NET_6516) -OUTPUT(NET_6517) -OUTPUT(NET_6533) -OUTPUT(NET_6534) -OUTPUT(NET_6576) -OUTPUT(NET_6577) -OUTPUT(NET_6592) -OUTPUT(NET_6593) -OUTPUT(NET_6594) -OUTPUT(NET_6595) -OUTPUT(NET_6648) -OUTPUT(NET_6650) -OUTPUT(NET_6651) -OUTPUT(NET_6663) -OUTPUT(NET_6664) -OUTPUT(NET_6705) -OUTPUT(NET_6721) -OUTPUT(NET_6722) -OUTPUT(NET_6723) -OUTPUT(NET_6774) -OUTPUT(NET_6775) -OUTPUT(NET_6799) -OUTPUT(NET_6800) -OUTPUT(NET_6850) -OUTPUT(NET_6851) -OUTPUT(NET_6862) -OUTPUT(NET_6909) -OUTPUT(NET_6910) -OUTPUT(NET_6911) -OUTPUT(NET_6929) -OUTPUT(NET_6930) -OUTPUT(NET_6931) -OUTPUT(NET_6932) -OUTPUT(NET_6979) -OUTPUT(NET_6991) -OUTPUT(NET_7035) -OUTPUT(NET_7036) -OUTPUT(NET_7048) -OUTPUT(NET_7049) -OUTPUT(NET_7050) -OUTPUT(NET_7051) -OUTPUT(NET_7101) -OUTPUT(NET_7119) -OUTPUT(NET_7120) -OUTPUT(NET_7161) -OUTPUT(NET_7162) -OUTPUT(NET_7163) -OUTPUT(NET_7164) -OUTPUT(NET_7175) -OUTPUT(NET_7176) -OUTPUT(NET_7177) -OUTPUT(NET_7178) -OUTPUT(NET_7240) -OUTPUT(NET_7277) -OUTPUT(NET_7278) -OUTPUT(NET_7279) -OUTPUT(NET_7293) -OUTPUT(NET_7294) -OUTPUT(NET_7295) -OUTPUT(NET_7296) -OUTPUT(NET_7343) -OUTPUT(NET_7359) -OUTPUT(NET_7360) -OUTPUT(NET_7396) -OUTPUT(NET_7397) -OUTPUT(NET_7398) -OUTPUT(NET_7399) -OUTPUT(NET_7411) -OUTPUT(NET_7477) -OUTPUT(NET_7478) -OUTPUT(NET_7479) -OUTPUT(NET_7512) -OUTPUT(NET_7513) -OUTPUT(NET_7514) -OUTPUT(NET_7528) -OUTPUT(NET_7529) -OUTPUT(NET_7581) -OUTPUT(NET_7589) -OUTPUT(NET_7590) -OUTPUT(NET_7591) -OUTPUT(NET_7592) -OUTPUT(NET_7622) -OUTPUT(NET_7623) -OUTPUT(NET_7631) -OUTPUT(NET_7673) -OUTPUT(NET_7674) -OUTPUT(NET_7688) -OUTPUT(NET_7689) -OUTPUT(NET_7690) -OUTPUT(NET_7691) -OUTPUT(NET_7724) -OUTPUT(NET_7740) -OUTPUT(NET_7779) -OUTPUT(NET_7780) -OUTPUT(NET_7781) -OUTPUT(NET_7797) -OUTPUT(NET_7798) -OUTPUT(NET_7799) -OUTPUT(NET_7800) -OUTPUT(NET_7801) -OUTPUT(NET_7844) -OUTPUT(NET_7845) -OUTPUT(NET_7858) -OUTPUT(NET_7894) -OUTPUT(NET_7895) -OUTPUT(NET_7911) -OUTPUT(NET_7912) -OUTPUT(NET_7913) -OUTPUT(NET_7914) -OUTPUT(NET_7954) -OUTPUT(NET_7969) -OUTPUT(NET_8006) -OUTPUT(NET_8007) -OUTPUT(NET_8017) -OUTPUT(NET_8018) -OUTPUT(NET_8019) -OUTPUT(NET_8020) -OUTPUT(NET_8047) -OUTPUT(NET_8049) -OUTPUT(NET_8050) -OUTPUT(NET_8065) -OUTPUT(NET_8066) -OUTPUT(NET_8113) -OUTPUT(NET_8114) -OUTPUT(NET_8129) -OUTPUT(NET_8130) -OUTPUT(NET_8131) -OUTPUT(NET_8132) -OUTPUT(NET_8133) -OUTPUT(NET_8134) -OUTPUT(NET_8167) -OUTPUT(NET_8179) -OUTPUT(NET_8180) -OUTPUT(NET_8181) -OUTPUT(NET_8182) -OUTPUT(NET_8183) -OUTPUT(NET_8215) -OUTPUT(NET_8216) -OUTPUT(NET_8221) -OUTPUT(NET_8222) -OUTPUT(NET_8223) -OUTPUT(NET_8248) -OUTPUT(NET_8249) -OUTPUT(NET_8256) -OUTPUT(NET_8257) -OUTPUT(NET_8289) -OUTPUT(NET_8290) -OUTPUT(NET_8307) -OUTPUT(NET_8317) -OUTPUT(NET_8318) -OUTPUT(NET_8340) -OUTPUT(NET_8344) -OUTPUT(NET_8345) -OUTPUT(NET_8346) -OUTPUT(NET_8389) -OUTPUT(NET_8390) -OUTPUT(NET_8396) -OUTPUT(NET_8397) -OUTPUT(NET_8455) -OUTPUT(NET_8456) -OUTPUT(NET_8495) -OUTPUT(NET_8526) -OUTPUT(NET_8527) -OUTPUT(NET_8561) -OUTPUT(NET_8589) -OUTPUT(NET_8590) -OUTPUT(NET_8591) -OUTPUT(NET_8606) -OUTPUT(NET_8607) -OUTPUT(NET_8614) -OUTPUT(NET_8615) -OUTPUT(NET_8644) -OUTPUT(NET_8645) -OUTPUT(NET_8646) -OUTPUT(NET_8661) -OUTPUT(NET_8670) -OUTPUT(NET_8691) -OUTPUT(NET_8696) -OUTPUT(NET_8697) -OUTPUT(NET_8698) -OUTPUT(NET_8699) -OUTPUT(NET_8711) -OUTPUT(NET_8712) -OUTPUT(NET_8719) -OUTPUT(NET_8746) -OUTPUT(NET_8747) -OUTPUT(NET_8748) -OUTPUT(NET_8761) -OUTPUT(NET_8770) -OUTPUT(NET_8771) -OUTPUT(NET_8788) -OUTPUT(NET_8793) -OUTPUT(NET_8794) -OUTPUT(NET_8795) -OUTPUT(NET_8805) -OUTPUT(NET_8806) -OUTPUT(NET_8840) -OUTPUT(NET_8861) -OUTPUT(NET_8873) -OUTPUT(NET_8874) -OUTPUT(NET_8897) -OUTPUT(NET_8907) -OUTPUT(NET_8919) -OUTPUT(NET_8920) -OUTPUT(NET_8934) -OUTPUT(NET_8945) -OUTPUT(NET_8951) -OUTPUT(NET_8952) -OUTPUT(NET_8966) -OUTPUT(NET_8974) -OUTPUT(NET_8982) -OUTPUT(NET_8983) -OUTPUT(NET_9054) -OUTPUT(NET_9085) -OUTPUT(NET_9124) -OUTPUT(NET_9125) -OUTPUT(NET_9160) -OUTPUT(NET_9168) -OUTPUT(NET_9177) -OUTPUT(NET_9178) -OUTPUT(NET_9192) -OUTPUT(NET_9201) -OUTPUT(NET_9209) -OUTPUT(NET_9210) -OUTPUT(NET_9221) -OUTPUT(NET_9224) -OUTPUT(NET_9232) -OUTPUT(NET_9240) -OUTPUT(NET_9241) -OUTPUT(NET_9251) -OUTPUT(NET_9259) -OUTPUT(NET_9266) -OUTPUT(NET_9267) -OUTPUT(NET_9279) -OUTPUT(NET_9287) -OUTPUT(NET_9295) -OUTPUT(NET_9296) -OUTPUT(NET_9306) -OUTPUT(NET_9314) -OUTPUT(NET_9321) -OUTPUT(NET_9322) -OUTPUT(NET_9334) -OUTPUT(NET_9342) -OUTPUT(NET_9350) -OUTPUT(NET_9351) -OUTPUT(NET_9359) -OUTPUT(NET_9371) -OUTPUT(NET_9372) -OUTPUT(NET_9395) -OUTPUT(NET_9397) -OUTPUT(NET_9398) -OUTPUT(NET_9407) -OUTPUT(NET_9408) -OUTPUT(NET_9409) -OUTPUT(NET_9419) -OUTPUT(NET_976) -OUTPUT(NET_977) -OUTPUT(NET_978) -new_n1035_ = NOT ( NET_456 ) -new_n1036_ = NOT ( NET_212 ) -new_n1037_ = NOT ( NET_457 ) -new_n1038_ = NOR ( new_n1037_, new_n1036_ ) -new_n1039_ = NAND ( new_n1038_, NET_211 ) -new_n1040_ = OR ( new_n1038_, NET_211 ) -new_n1041_ = NAND ( new_n1040_, new_n1039_, new_n1035_ ) -new_n1042_ = OR ( new_n1038_, new_n1035_, NET_211 ) -new_n1043_ = NOT ( NET_211 ) -new_n1044_ = NAND ( new_n1038_, NET_456 ) -new_n1045_ = OR ( new_n1044_, new_n1043_ ) -NET_1178 = NAND ( new_n1045_, new_n1042_, new_n1041_ ) -new_n1047_ = NOR ( NET_455, NET_210 ) -new_n1048_ = NOT ( NET_210 ) -new_n1049_ = NOT ( NET_455 ) -new_n1050_ = NOR ( new_n1049_, new_n1048_ ) -new_n1051_ = NOR ( new_n1050_, new_n1047_ ) -new_n1052_ = OR ( new_n1038_, NET_456 ) -new_n1053_ = NAND ( new_n1052_, NET_211 ) -new_n1054_ = NAND ( new_n1053_, new_n1044_ ) -NET_1346 = XOR ( new_n1054_, new_n1051_ ) -new_n1056_ = NOR ( NET_454, NET_209 ) -new_n1057_ = NOT ( NET_209 ) -new_n1058_ = NOT ( NET_454 ) -new_n1059_ = NOR ( new_n1058_, new_n1057_ ) -new_n1060_ = NOR ( new_n1059_, new_n1056_ ) -new_n1061_ = NOT ( new_n1047_ ) -new_n1062_ = AND ( new_n1054_, new_n1061_ ) -new_n1063_ = OR ( new_n1062_, new_n1050_ ) -NET_1530 = XOR ( new_n1063_, new_n1060_ ) -new_n1065_ = NOT ( NET_208 ) -new_n1066_ = NOT ( NET_453 ) -new_n1067_ = NOR ( new_n1066_, new_n1065_ ) -new_n1068_ = NOR ( NET_453, NET_208 ) -new_n1069_ = NOR ( new_n1068_, new_n1067_ ) -new_n1070_ = NOT ( new_n1056_ ) -new_n1071_ = AND ( new_n1063_, new_n1070_ ) -new_n1072_ = OR ( new_n1071_, new_n1059_ ) -NET_1658 = XOR ( new_n1072_, new_n1069_ ) -new_n1074_ = OR ( NET_438, NET_276, NET_193 ) -new_n1075_ = NOT ( NET_193 ) -new_n1076_ = NOT ( NET_438 ) -new_n1077_ = OR ( NET_521, new_n1076_, new_n1075_ ) -new_n1078_ = NAND ( new_n1077_, new_n1074_ ) -new_n1079_ = OR ( new_n1078_, NET_458 ) -new_n1080_ = NOT ( new_n1078_ ) -new_n1081_ = NOT ( NET_32 ) -new_n1082_ = OR ( new_n1078_, NET_213 ) -new_n1083_ = NOT ( NET_458 ) -new_n1084_ = NAND ( new_n1078_, new_n1083_ ) -new_n1085_ = NAND ( new_n1084_, new_n1082_ ) -new_n1086_ = OR ( new_n1085_, new_n1081_ ) -new_n1087_ = NAND ( new_n1085_, new_n1081_ ) -new_n1088_ = AND ( new_n1087_, new_n1086_ ) -new_n1089_ = OR ( new_n1088_, new_n1080_ ) -new_n1090_ = NAND ( new_n1089_, new_n1079_ ) -new_n1091_ = OR ( new_n1090_, NET_275 ) -new_n1092_ = NAND ( NET_33, NET_275 ) -NET_1661 = NAND ( new_n1092_, new_n1091_ ) -new_n1094_ = OR ( new_n1088_, new_n1078_ ) -new_n1095_ = NOT ( NET_213 ) -new_n1096_ = NAND ( new_n1078_, new_n1095_ ) -new_n1097_ = NAND ( new_n1096_, new_n1094_ ) -new_n1098_ = OR ( new_n1097_, NET_520 ) -new_n1099_ = NOT ( NET_278 ) -NET_22559 = NOT ( NET_520 ) -new_n1101_ = OR ( NET_22559, NET_309 ) -new_n1102_ = OR ( new_n1101_, new_n1099_ ) -new_n1103_ = NOT ( NET_309 ) -new_n1104_ = NOR ( NET_22559, new_n1103_ ) -new_n1105_ = NAND ( new_n1104_, NET_278 ) -NET_1668 = NAND ( new_n1105_, new_n1102_, new_n1098_ ) -new_n1107_ = OR ( new_n1078_, NET_459 ) -new_n1108_ = NOT ( NET_31 ) -new_n1109_ = OR ( new_n1078_, NET_214 ) -new_n1110_ = NOT ( NET_459 ) -new_n1111_ = NAND ( new_n1078_, new_n1110_ ) -new_n1112_ = NAND ( new_n1111_, new_n1109_ ) -new_n1113_ = OR ( new_n1112_, new_n1086_ ) -new_n1114_ = NAND ( new_n1112_, new_n1086_ ) -new_n1115_ = NAND ( new_n1114_, new_n1113_, new_n1108_ ) -new_n1116_ = OR ( new_n1114_, new_n1108_ ) -new_n1117_ = OR ( new_n1086_, new_n1108_ ) -new_n1118_ = OR ( new_n1117_, new_n1112_ ) -new_n1119_ = NAND ( new_n1118_, new_n1116_, new_n1115_ ) -new_n1120_ = OR ( new_n1119_, new_n1080_ ) -new_n1121_ = NAND ( new_n1120_, new_n1107_ ) -new_n1122_ = OR ( new_n1121_, NET_275 ) -new_n1123_ = NOT ( NET_34 ) -NET_22556 = NOT ( NET_275 ) -new_n1125_ = OR ( NET_64, NET_22556 ) -new_n1126_ = OR ( new_n1125_, new_n1123_ ) -new_n1127_ = NOT ( NET_64 ) -new_n1128_ = NOR ( new_n1127_, NET_22556 ) -new_n1129_ = NOT ( new_n1128_ ) -new_n1130_ = NOR ( NET_34, NET_33 ) -new_n1131_ = NOT ( NET_33 ) -new_n1132_ = NOR ( new_n1123_, new_n1131_ ) -new_n1133_ = OR ( new_n1132_, new_n1130_ ) -new_n1134_ = OR ( new_n1133_, new_n1129_ ) -NET_1749 = NAND ( new_n1134_, new_n1126_, new_n1122_ ) -new_n1136_ = OR ( new_n1119_, new_n1078_ ) -new_n1137_ = NOT ( NET_214 ) -new_n1138_ = NAND ( new_n1078_, new_n1137_ ) -new_n1139_ = NAND ( new_n1138_, new_n1136_ ) -new_n1140_ = OR ( new_n1139_, NET_520 ) -new_n1141_ = NOT ( NET_279 ) -new_n1142_ = OR ( new_n1101_, new_n1141_ ) -new_n1143_ = NOT ( new_n1104_ ) -new_n1144_ = NOR ( NET_279, NET_278 ) -new_n1145_ = NOR ( new_n1141_, new_n1099_ ) -new_n1146_ = OR ( new_n1145_, new_n1144_ ) -new_n1147_ = OR ( new_n1146_, new_n1143_ ) -NET_1760 = NAND ( new_n1147_, new_n1142_, new_n1140_ ) -new_n1149_ = NOT ( NET_207 ) -new_n1150_ = NOT ( NET_452 ) -new_n1151_ = NOR ( new_n1150_, new_n1149_ ) -new_n1152_ = NOR ( NET_452, NET_207 ) -new_n1153_ = NOR ( new_n1152_, new_n1151_ ) -new_n1154_ = NOT ( new_n1068_ ) -new_n1155_ = AND ( new_n1072_, new_n1154_ ) -new_n1156_ = OR ( new_n1155_, new_n1067_ ) -NET_1794 = XOR ( new_n1156_, new_n1153_ ) -new_n1158_ = OR ( new_n1078_, NET_460 ) -new_n1159_ = AND ( new_n1086_, new_n1108_ ) -new_n1160_ = OR ( new_n1159_, new_n1112_ ) -new_n1161_ = NAND ( new_n1160_, new_n1117_ ) -new_n1162_ = NOT ( NET_30 ) -new_n1163_ = OR ( new_n1078_, NET_215 ) -new_n1164_ = NOT ( NET_460 ) -new_n1165_ = NAND ( new_n1078_, new_n1164_ ) -new_n1166_ = NAND ( new_n1165_, new_n1163_ ) -new_n1167_ = OR ( new_n1166_, new_n1162_ ) -new_n1168_ = NAND ( new_n1166_, new_n1162_ ) -new_n1169_ = NAND ( new_n1168_, new_n1167_ ) -new_n1170_ = XNOR ( new_n1169_, new_n1161_ ) -new_n1171_ = OR ( new_n1170_, new_n1080_ ) -new_n1172_ = NAND ( new_n1171_, new_n1158_ ) -new_n1173_ = OR ( new_n1172_, NET_275 ) -new_n1174_ = NOT ( NET_35 ) -new_n1175_ = OR ( new_n1125_, new_n1174_ ) -new_n1176_ = NOR ( new_n1130_, new_n1174_ ) -new_n1177_ = NOR ( NET_35, NET_34, NET_33 ) -new_n1178_ = OR ( new_n1177_, new_n1176_ ) -new_n1179_ = OR ( new_n1178_, new_n1129_ ) -NET_1861 = NAND ( new_n1179_, new_n1175_, new_n1173_ ) -new_n1181_ = OR ( new_n1170_, new_n1078_ ) -new_n1182_ = NOT ( NET_215 ) -new_n1183_ = NAND ( new_n1078_, new_n1182_ ) -new_n1184_ = NAND ( new_n1183_, new_n1181_ ) -new_n1185_ = OR ( new_n1184_, NET_520 ) -new_n1186_ = NOT ( NET_280 ) -new_n1187_ = OR ( new_n1101_, new_n1186_ ) -new_n1188_ = OR ( new_n1144_, new_n1186_ ) -new_n1189_ = NAND ( new_n1144_, new_n1186_ ) -new_n1190_ = NAND ( new_n1189_, new_n1188_ ) -new_n1191_ = OR ( new_n1190_, new_n1143_ ) -NET_1887 = NAND ( new_n1191_, new_n1187_, new_n1185_ ) -new_n1193_ = NOT ( NET_206 ) -new_n1194_ = NOT ( NET_451 ) -new_n1195_ = NOR ( new_n1194_, new_n1193_ ) -new_n1196_ = NOR ( NET_451, NET_206 ) -new_n1197_ = NOR ( new_n1196_, new_n1195_ ) -new_n1198_ = NOT ( new_n1152_ ) -new_n1199_ = AND ( new_n1156_, new_n1198_ ) -new_n1200_ = OR ( new_n1199_, new_n1151_ ) -NET_2051 = XOR ( new_n1200_, new_n1197_ ) -new_n1202_ = OR ( new_n1078_, NET_461 ) -new_n1203_ = NOT ( NET_29 ) -new_n1204_ = OR ( new_n1078_, NET_216 ) -new_n1205_ = NOT ( NET_461 ) -new_n1206_ = NAND ( new_n1078_, new_n1205_ ) -new_n1207_ = NAND ( new_n1206_, new_n1204_ ) -new_n1208_ = OR ( new_n1207_, new_n1203_ ) -new_n1209_ = NAND ( new_n1207_, new_n1203_ ) -new_n1210_ = NAND ( new_n1209_, new_n1208_ ) -new_n1211_ = NAND ( new_n1168_, new_n1161_ ) -new_n1212_ = NAND ( new_n1211_, new_n1167_ ) -new_n1213_ = XNOR ( new_n1212_, new_n1210_ ) -new_n1214_ = OR ( new_n1213_, new_n1080_ ) -new_n1215_ = NAND ( new_n1214_, new_n1202_ ) -new_n1216_ = OR ( new_n1215_, NET_275 ) -new_n1217_ = NOT ( NET_36 ) -new_n1218_ = OR ( new_n1125_, new_n1217_ ) -new_n1219_ = XOR ( new_n1177_, NET_36 ) -new_n1220_ = OR ( new_n1219_, new_n1129_ ) -NET_2055 = NAND ( new_n1220_, new_n1218_, new_n1216_ ) -new_n1222_ = OR ( new_n1213_, new_n1078_ ) -new_n1223_ = NOT ( NET_216 ) -new_n1224_ = NAND ( new_n1078_, new_n1223_ ) -new_n1225_ = NAND ( new_n1224_, new_n1222_ ) -new_n1226_ = OR ( new_n1225_, NET_520 ) -new_n1227_ = NOT ( NET_281 ) -new_n1228_ = OR ( new_n1101_, new_n1227_ ) -new_n1229_ = XOR ( new_n1189_, new_n1227_ ) -new_n1230_ = OR ( new_n1229_, new_n1143_ ) -NET_2104 = NAND ( new_n1230_, new_n1228_, new_n1226_ ) -new_n1232_ = NOR ( NET_64, NET_54 ) -new_n1233_ = NOT ( NET_54 ) -new_n1234_ = NOR ( NET_37, NET_36 ) -new_n1235_ = NOR ( NET_39, NET_38 ) -new_n1236_ = NOR ( NET_41, NET_40 ) -new_n1237_ = AND ( new_n1236_, new_n1235_, new_n1234_, new_n1177_ ) -new_n1238_ = NOR ( NET_43, NET_42 ) -new_n1239_ = NOR ( NET_45, NET_44 ) -new_n1240_ = NOR ( NET_47, NET_46 ) -new_n1241_ = NAND ( new_n1240_, new_n1239_, new_n1238_, new_n1237_ ) -new_n1242_ = OR ( NET_49, NET_48 ) -new_n1243_ = OR ( NET_51, NET_50 ) -new_n1244_ = OR ( NET_53, NET_52 ) -new_n1245_ = NOR ( new_n1244_, new_n1243_, new_n1242_, new_n1241_ ) -new_n1246_ = OR ( new_n1245_, new_n1233_ ) -new_n1247_ = NAND ( new_n1245_, new_n1233_ ) -new_n1248_ = AND ( new_n1247_, new_n1246_ ) -new_n1249_ = NOR ( new_n1248_, new_n1127_ ) -new_n1250_ = NOR ( new_n1249_, new_n1232_ ) -new_n1251_ = NOT ( new_n1250_ ) -new_n1252_ = NOT ( NET_55 ) -new_n1253_ = OR ( NET_64, new_n1252_ ) -new_n1254_ = NAND ( new_n1245_, new_n1252_, new_n1233_ ) -new_n1255_ = NAND ( new_n1247_, NET_55 ) -new_n1256_ = NAND ( new_n1255_, new_n1254_ ) -new_n1257_ = OR ( new_n1256_, new_n1127_ ) -new_n1258_ = NAND ( new_n1257_, new_n1253_ ) -new_n1259_ = NOT ( new_n1258_ ) -new_n1260_ = NOR ( new_n1259_, new_n1251_ ) -new_n1261_ = NOT ( new_n1260_ ) -new_n1262_ = NOT ( NET_59 ) -new_n1263_ = OR ( NET_64, new_n1262_ ) -new_n1264_ = NOT ( NET_58 ) -new_n1265_ = NOR ( new_n1254_, NET_57, NET_56 ) -new_n1266_ = NAND ( new_n1265_, new_n1262_, new_n1264_ ) -new_n1267_ = NAND ( new_n1265_, new_n1264_ ) -new_n1268_ = NAND ( new_n1267_, NET_59 ) -new_n1269_ = NAND ( new_n1268_, new_n1266_ ) -new_n1270_ = OR ( new_n1269_, new_n1127_ ) -new_n1271_ = NAND ( new_n1270_, new_n1263_ ) -new_n1272_ = NOR ( NET_64, NET_58 ) -new_n1273_ = OR ( new_n1265_, new_n1264_ ) -new_n1274_ = AND ( new_n1273_, new_n1267_ ) -new_n1275_ = NOR ( new_n1274_, new_n1127_ ) -new_n1276_ = NOR ( new_n1275_, new_n1272_ ) -new_n1277_ = OR ( NET_64, NET_57 ) -new_n1278_ = NOT ( NET_56 ) -new_n1279_ = NAND ( new_n1245_, new_n1278_, new_n1252_, new_n1233_ ) -new_n1280_ = AND ( new_n1279_, NET_57 ) -new_n1281_ = OR ( new_n1280_, new_n1265_ ) -new_n1282_ = NAND ( new_n1281_, NET_64 ) -new_n1283_ = AND ( new_n1282_, new_n1277_ ) -new_n1284_ = NAND ( new_n1283_, new_n1276_, new_n1271_ ) -new_n1285_ = NAND ( new_n1284_, new_n1261_ ) -new_n1286_ = NOR ( NET_64, new_n1278_ ) -new_n1287_ = XOR ( new_n1254_, new_n1278_ ) -new_n1288_ = NOR ( new_n1287_, new_n1127_ ) -new_n1289_ = NOR ( new_n1288_, new_n1286_ ) -new_n1290_ = NAND ( new_n1289_, new_n1285_ ) -new_n1291_ = NOT ( NET_61 ) -new_n1292_ = OR ( NET_64, new_n1291_ ) -new_n1293_ = NOR ( new_n1266_, NET_60 ) -new_n1294_ = OR ( new_n1293_, new_n1291_ ) -new_n1295_ = OR ( new_n1266_, NET_61, NET_60 ) -new_n1296_ = NAND ( new_n1295_, new_n1294_ ) -new_n1297_ = OR ( new_n1296_, new_n1127_ ) -new_n1298_ = NAND ( new_n1297_, new_n1292_ ) -new_n1299_ = NOT ( NET_60 ) -new_n1300_ = OR ( NET_64, new_n1299_ ) -new_n1301_ = XOR ( new_n1266_, new_n1299_ ) -new_n1302_ = OR ( new_n1301_, new_n1127_ ) -new_n1303_ = NAND ( new_n1302_, new_n1300_ ) -new_n1304_ = OR ( new_n1303_, new_n1298_ ) -new_n1305_ = NAND ( new_n1304_, new_n1290_ ) -NET_22557 = NAND ( new_n1305_, NET_275 ) -new_n1307_ = NOT ( new_n1289_ ) -new_n1308_ = OR ( new_n1307_, new_n1284_ ) -NET_22558 = NOR ( new_n1308_, NET_22556 ) -new_n1310_ = NOT ( NET_301 ) -new_n1311_ = NOR ( NET_309, new_n1310_ ) -new_n1312_ = NOT ( NET_297 ) -new_n1313_ = NOT ( NET_298 ) -new_n1314_ = NOT ( NET_293 ) -new_n1315_ = NOT ( NET_294 ) -new_n1316_ = NOT ( NET_289 ) -new_n1317_ = NOT ( NET_290 ) -new_n1318_ = NOT ( NET_285 ) -new_n1319_ = NOT ( NET_286 ) -new_n1320_ = NOT ( NET_282 ) -new_n1321_ = NAND ( new_n1144_, new_n1320_, new_n1227_, new_n1186_ ) -new_n1322_ = NOR ( new_n1321_, NET_284, NET_283 ) -new_n1323_ = NAND ( new_n1322_, new_n1319_, new_n1318_ ) -new_n1324_ = NOR ( new_n1323_, NET_288, NET_287 ) -new_n1325_ = NAND ( new_n1324_, new_n1317_, new_n1316_ ) -new_n1326_ = NOR ( new_n1325_, NET_292, NET_291 ) -new_n1327_ = NAND ( new_n1326_, new_n1315_, new_n1314_ ) -new_n1328_ = NOR ( new_n1327_, NET_296, NET_295 ) -new_n1329_ = NAND ( new_n1328_, new_n1313_, new_n1312_ ) -new_n1330_ = NOR ( new_n1329_, NET_300, NET_299 ) -new_n1331_ = XOR ( new_n1330_, NET_301 ) -new_n1332_ = NOR ( new_n1331_, new_n1103_ ) -new_n1333_ = NOR ( new_n1332_, new_n1311_ ) -new_n1334_ = NOT ( new_n1333_ ) -new_n1335_ = NOT ( NET_304 ) -new_n1336_ = OR ( NET_309, new_n1335_ ) -new_n1337_ = NOT ( NET_302 ) -new_n1338_ = NAND ( new_n1330_, new_n1337_, new_n1310_ ) -new_n1339_ = OR ( new_n1338_, NET_303 ) -new_n1340_ = AND ( new_n1339_, NET_304 ) -new_n1341_ = NOR ( new_n1338_, NET_304, NET_303 ) -new_n1342_ = OR ( new_n1341_, new_n1340_ ) -new_n1343_ = OR ( new_n1342_, new_n1103_ ) -new_n1344_ = NAND ( new_n1343_, new_n1336_ ) -new_n1345_ = NOT ( NET_303 ) -new_n1346_ = NOR ( NET_309, new_n1345_ ) -new_n1347_ = XOR ( new_n1338_, new_n1345_ ) -new_n1348_ = NOR ( new_n1347_, new_n1103_ ) -new_n1349_ = OR ( new_n1348_, new_n1346_ ) -new_n1350_ = OR ( NET_309, new_n1337_ ) -new_n1351_ = NAND ( new_n1330_, new_n1310_ ) -new_n1352_ = NAND ( new_n1351_, NET_302 ) -new_n1353_ = NAND ( new_n1352_, new_n1338_ ) -new_n1354_ = OR ( new_n1353_, new_n1103_ ) -new_n1355_ = NAND ( new_n1354_, new_n1350_ ) -new_n1356_ = NAND ( new_n1355_, new_n1349_, new_n1344_ ) -new_n1357_ = OR ( new_n1356_, new_n1334_ ) -NET_22560 = NOR ( new_n1357_, NET_22559 ) -new_n1359_ = NOR ( NET_450, NET_205 ) -new_n1360_ = NOT ( NET_205 ) -new_n1361_ = NOT ( NET_450 ) -new_n1362_ = NOR ( new_n1361_, new_n1360_ ) -new_n1363_ = NOR ( new_n1362_, new_n1359_ ) -new_n1364_ = NOT ( new_n1196_ ) -new_n1365_ = AND ( new_n1200_, new_n1364_ ) -new_n1366_ = OR ( new_n1365_, new_n1195_ ) -NET_2397 = XOR ( new_n1366_, new_n1363_ ) -new_n1368_ = OR ( new_n1078_, NET_462 ) -new_n1369_ = NOT ( NET_28 ) -new_n1370_ = OR ( new_n1078_, NET_217 ) -new_n1371_ = NOT ( NET_462 ) -new_n1372_ = NAND ( new_n1078_, new_n1371_ ) -new_n1373_ = NAND ( new_n1372_, new_n1370_ ) -new_n1374_ = OR ( new_n1373_, new_n1369_ ) -new_n1375_ = NAND ( new_n1373_, new_n1369_ ) -new_n1376_ = NAND ( new_n1375_, new_n1374_ ) -new_n1377_ = NAND ( new_n1212_, new_n1209_ ) -new_n1378_ = NAND ( new_n1377_, new_n1208_ ) -new_n1379_ = XNOR ( new_n1378_, new_n1376_ ) -new_n1380_ = OR ( new_n1379_, new_n1080_ ) -new_n1381_ = NAND ( new_n1380_, new_n1368_ ) -new_n1382_ = OR ( new_n1381_, NET_275 ) -new_n1383_ = NOT ( NET_37 ) -new_n1384_ = OR ( new_n1125_, new_n1383_ ) -new_n1385_ = NAND ( new_n1234_, new_n1177_ ) -new_n1386_ = NAND ( new_n1177_, new_n1217_ ) -new_n1387_ = NAND ( new_n1386_, NET_37 ) -new_n1388_ = NAND ( new_n1387_, new_n1385_ ) -new_n1389_ = OR ( new_n1388_, new_n1129_ ) -NET_2766 = NAND ( new_n1389_, new_n1384_, new_n1382_ ) -new_n1391_ = OR ( new_n1379_, new_n1078_ ) -new_n1392_ = NOT ( NET_217 ) -new_n1393_ = NAND ( new_n1078_, new_n1392_ ) -new_n1394_ = NAND ( new_n1393_, new_n1391_ ) -new_n1395_ = OR ( new_n1394_, NET_520 ) -new_n1396_ = OR ( new_n1101_, new_n1320_ ) -new_n1397_ = NOR ( new_n1189_, NET_281 ) -new_n1398_ = OR ( new_n1397_, new_n1320_ ) -new_n1399_ = NAND ( new_n1398_, new_n1321_ ) -new_n1400_ = OR ( new_n1399_, new_n1143_ ) -NET_2831 = NAND ( new_n1400_, new_n1396_, new_n1395_ ) -new_n1402_ = NOT ( NET_312 ) -new_n1403_ = NOT ( NET_490 ) -new_n1404_ = OR ( new_n1355_, new_n1349_, new_n1403_ ) -new_n1405_ = NAND ( new_n1355_, new_n1403_ ) -new_n1406_ = NAND ( new_n1405_, new_n1404_, new_n1344_ ) -new_n1407_ = NAND ( new_n1356_, NET_520 ) -new_n1408_ = NOR ( new_n1407_, new_n1334_ ) -new_n1409_ = AND ( new_n1408_, new_n1406_ ) -NET_2832 = NOR ( new_n1409_, new_n1402_ ) -new_n1411_ = NOT ( NET_313 ) -NET_2833 = NOR ( new_n1409_, new_n1411_ ) -new_n1413_ = NOT ( NET_314 ) -NET_2834 = NOR ( new_n1409_, new_n1413_ ) -new_n1415_ = NOT ( NET_315 ) -NET_2835 = NOR ( new_n1409_, new_n1415_ ) -new_n1417_ = NOT ( NET_316 ) -NET_2836 = NOR ( new_n1409_, new_n1417_ ) -new_n1419_ = NOT ( NET_317 ) -NET_2837 = NOR ( new_n1409_, new_n1419_ ) -new_n1421_ = NOT ( NET_318 ) -NET_2838 = NOR ( new_n1409_, new_n1421_ ) -new_n1423_ = NOT ( NET_319 ) -NET_2839 = NOR ( new_n1409_, new_n1423_ ) -new_n1425_ = NOT ( NET_320 ) -NET_2840 = NOR ( new_n1409_, new_n1425_ ) -new_n1427_ = NOT ( NET_321 ) -NET_2841 = NOR ( new_n1409_, new_n1427_ ) -new_n1429_ = NOT ( NET_322 ) -NET_2842 = NOR ( new_n1409_, new_n1429_ ) -new_n1431_ = NOT ( NET_323 ) -NET_2843 = NOR ( new_n1409_, new_n1431_ ) -new_n1433_ = NOT ( NET_324 ) -NET_2844 = NOR ( new_n1409_, new_n1433_ ) -new_n1435_ = NOT ( NET_325 ) -NET_2845 = NOR ( new_n1409_, new_n1435_ ) -new_n1437_ = NOT ( NET_326 ) -NET_2846 = NOR ( new_n1409_, new_n1437_ ) -new_n1439_ = NOT ( NET_327 ) -NET_2847 = NOR ( new_n1409_, new_n1439_ ) -new_n1441_ = NOT ( NET_328 ) -NET_2848 = NOR ( new_n1409_, new_n1441_ ) -new_n1443_ = NOT ( NET_329 ) -NET_2849 = NOR ( new_n1409_, new_n1443_ ) -new_n1445_ = NOT ( NET_330 ) -NET_2850 = NOR ( new_n1409_, new_n1445_ ) -new_n1447_ = NOT ( NET_331 ) -NET_2851 = NOR ( new_n1409_, new_n1447_ ) -new_n1449_ = NOT ( NET_332 ) -NET_2852 = NOR ( new_n1409_, new_n1449_ ) -new_n1451_ = NOT ( NET_333 ) -NET_2853 = NOR ( new_n1409_, new_n1451_ ) -new_n1453_ = NOT ( NET_334 ) -NET_2854 = NOR ( new_n1409_, new_n1453_ ) -new_n1455_ = NOT ( NET_335 ) -NET_2855 = NOR ( new_n1409_, new_n1455_ ) -new_n1457_ = NOT ( NET_336 ) -NET_2856 = NOR ( new_n1409_, new_n1457_ ) -new_n1459_ = NOT ( NET_337 ) -NET_2857 = NOR ( new_n1409_, new_n1459_ ) -new_n1461_ = NOT ( NET_338 ) -NET_2858 = NOR ( new_n1409_, new_n1461_ ) -new_n1463_ = NOT ( NET_339 ) -NET_2859 = NOR ( new_n1409_, new_n1463_ ) -new_n1465_ = NOT ( NET_340 ) -NET_2860 = NOR ( new_n1409_, new_n1465_ ) -new_n1467_ = NOT ( NET_341 ) -NET_2861 = NOR ( new_n1409_, new_n1467_ ) -new_n1469_ = NOR ( NET_449, NET_204 ) -new_n1470_ = NOT ( NET_204 ) -new_n1471_ = NOT ( NET_449 ) -new_n1472_ = NOR ( new_n1471_, new_n1470_ ) -new_n1473_ = NOR ( new_n1472_, new_n1469_ ) -new_n1474_ = NOT ( new_n1359_ ) -new_n1475_ = AND ( new_n1366_, new_n1474_ ) -new_n1476_ = OR ( new_n1475_, new_n1362_ ) -NET_2962 = XOR ( new_n1476_, new_n1473_ ) -new_n1478_ = NOT ( NET_311 ) -new_n1479_ = OR ( new_n1409_, new_n1478_ ) -new_n1480_ = OR ( new_n1349_, new_n1344_ ) -new_n1481_ = NAND ( new_n1480_, new_n1409_ ) -NET_3132 = NAND ( new_n1481_, new_n1479_ ) -new_n1483_ = NOT ( NET_310 ) -new_n1484_ = OR ( new_n1409_, new_n1483_ ) -new_n1485_ = OR ( new_n1355_, new_n1344_ ) -new_n1486_ = NAND ( new_n1485_, new_n1409_ ) -NET_3133 = NAND ( new_n1486_, new_n1484_ ) -new_n1488_ = NOT ( NET_67 ) -new_n1489_ = NOR ( new_n1307_, NET_22556 ) -new_n1490_ = NAND ( new_n1489_, new_n1284_ ) -new_n1491_ = NOR ( new_n1283_, NET_245 ) -new_n1492_ = AND ( new_n1283_, NET_245 ) -new_n1493_ = OR ( new_n1492_, new_n1491_, new_n1276_ ) -new_n1494_ = AND ( new_n1493_, new_n1271_ ) -new_n1495_ = NOR ( new_n1494_, new_n1490_ ) -NET_3285 = NOR ( new_n1495_, new_n1488_ ) -new_n1497_ = NOT ( NET_68 ) -NET_3286 = NOR ( new_n1495_, new_n1497_ ) -new_n1499_ = NOT ( NET_69 ) -NET_3287 = NOR ( new_n1495_, new_n1499_ ) -new_n1501_ = NOT ( NET_70 ) -NET_3288 = NOR ( new_n1495_, new_n1501_ ) -new_n1503_ = NOT ( NET_71 ) -NET_3289 = NOR ( new_n1495_, new_n1503_ ) -new_n1505_ = NOT ( NET_72 ) -NET_3290 = NOR ( new_n1495_, new_n1505_ ) -new_n1507_ = NOT ( NET_73 ) -NET_3291 = NOR ( new_n1495_, new_n1507_ ) -new_n1509_ = NOT ( NET_74 ) -NET_3292 = NOR ( new_n1495_, new_n1509_ ) -new_n1511_ = NOT ( NET_75 ) -NET_3293 = NOR ( new_n1495_, new_n1511_ ) -new_n1513_ = NOT ( NET_76 ) -NET_3294 = NOR ( new_n1495_, new_n1513_ ) -new_n1515_ = NOT ( NET_77 ) -NET_3295 = NOR ( new_n1495_, new_n1515_ ) -new_n1517_ = NOT ( NET_78 ) -NET_3296 = NOR ( new_n1495_, new_n1517_ ) -new_n1519_ = NOT ( NET_79 ) -NET_3297 = NOR ( new_n1495_, new_n1519_ ) -new_n1521_ = NOT ( NET_80 ) -NET_3298 = NOR ( new_n1495_, new_n1521_ ) -new_n1523_ = NOT ( NET_81 ) -NET_3299 = NOR ( new_n1495_, new_n1523_ ) -new_n1525_ = NOT ( NET_82 ) -NET_3300 = NOR ( new_n1495_, new_n1525_ ) -new_n1527_ = NOT ( NET_83 ) -NET_3301 = NOR ( new_n1495_, new_n1527_ ) -new_n1529_ = NOT ( NET_84 ) -NET_3302 = NOR ( new_n1495_, new_n1529_ ) -new_n1531_ = NOT ( NET_85 ) -NET_3303 = NOR ( new_n1495_, new_n1531_ ) -new_n1533_ = NOT ( NET_86 ) -NET_3304 = NOR ( new_n1495_, new_n1533_ ) -new_n1535_ = NOT ( NET_87 ) -NET_3305 = NOR ( new_n1495_, new_n1535_ ) -new_n1537_ = NOT ( NET_88 ) -NET_3306 = NOR ( new_n1495_, new_n1537_ ) -new_n1539_ = NOT ( NET_89 ) -NET_3307 = NOR ( new_n1495_, new_n1539_ ) -new_n1541_ = NOT ( NET_90 ) -NET_3308 = NOR ( new_n1495_, new_n1541_ ) -new_n1543_ = NOT ( NET_91 ) -NET_3309 = NOR ( new_n1495_, new_n1543_ ) -new_n1545_ = NOT ( NET_92 ) -NET_3310 = NOR ( new_n1495_, new_n1545_ ) -new_n1547_ = NOT ( NET_93 ) -NET_3311 = NOR ( new_n1495_, new_n1547_ ) -new_n1549_ = NOT ( NET_94 ) -NET_3312 = NOR ( new_n1495_, new_n1549_ ) -new_n1551_ = NOT ( NET_95 ) -NET_3313 = NOR ( new_n1495_, new_n1551_ ) -new_n1553_ = NOT ( NET_96 ) -NET_3314 = NOR ( new_n1495_, new_n1553_ ) -new_n1555_ = NOT ( new_n1356_ ) -new_n1556_ = NOT ( NET_305 ) -new_n1557_ = OR ( NET_309, new_n1556_ ) -new_n1558_ = XOR ( new_n1341_, NET_305 ) -new_n1559_ = OR ( new_n1558_, new_n1103_ ) -new_n1560_ = NAND ( new_n1559_, new_n1557_ ) -new_n1561_ = NOT ( NET_306 ) -new_n1562_ = OR ( NET_309, new_n1561_ ) -new_n1563_ = NAND ( new_n1341_, new_n1561_, new_n1556_ ) -new_n1564_ = NAND ( new_n1341_, new_n1556_ ) -new_n1565_ = NAND ( new_n1564_, NET_306 ) -new_n1566_ = NAND ( new_n1565_, new_n1563_ ) -new_n1567_ = OR ( new_n1566_, new_n1103_ ) -new_n1568_ = NAND ( new_n1567_, new_n1562_ ) -new_n1569_ = NOR ( new_n1568_, new_n1560_ ) -new_n1570_ = NOR ( NET_309, NET_299 ) -new_n1571_ = XOR ( new_n1329_, NET_299 ) -new_n1572_ = NOR ( new_n1571_, new_n1103_ ) -new_n1573_ = NOR ( new_n1572_, new_n1570_ ) -new_n1574_ = NOT ( new_n1573_ ) -new_n1575_ = NOT ( NET_300 ) -new_n1576_ = OR ( NET_309, new_n1575_ ) -new_n1577_ = NOR ( new_n1329_, NET_299 ) -new_n1578_ = NOR ( new_n1577_, new_n1575_ ) -new_n1579_ = OR ( new_n1578_, new_n1330_ ) -new_n1580_ = OR ( new_n1579_, new_n1103_ ) -new_n1581_ = NAND ( new_n1580_, new_n1576_ ) -new_n1582_ = NOT ( new_n1581_ ) -new_n1583_ = NOR ( new_n1582_, new_n1574_ ) -new_n1584_ = OR ( new_n1583_, new_n1569_ ) -new_n1585_ = OR ( new_n1584_, new_n1555_ ) -new_n1586_ = OR ( new_n1569_, new_n1333_ ) -NET_3405 = NAND ( new_n1586_, new_n1585_, NET_520 ) -new_n1588_ = NOT ( NET_480 ) -new_n1589_ = OR ( NET_22560, new_n1588_ ) -new_n1590_ = NOT ( NET_497 ) -new_n1591_ = NOT ( NET_499 ) -new_n1592_ = NOT ( NET_504 ) -new_n1593_ = NOT ( NET_517 ) -new_n1594_ = NOT ( NET_496 ) -new_n1595_ = NOT ( NET_511 ) -new_n1596_ = NOT ( NET_519 ) -new_n1597_ = NOT ( NET_505 ) -new_n1598_ = NOR ( NET_514, NET_502 ) -new_n1599_ = NAND ( new_n1598_, new_n1597_ ) -new_n1600_ = NOR ( new_n1599_, NET_493 ) -new_n1601_ = AND ( new_n1600_, new_n1596_ ) -new_n1602_ = NAND ( new_n1601_, new_n1595_ ) -new_n1603_ = OR ( new_n1602_, NET_501 ) -new_n1604_ = NOR ( new_n1603_, NET_515 ) -new_n1605_ = NAND ( new_n1604_, new_n1594_ ) -new_n1606_ = OR ( new_n1605_, NET_508 ) -new_n1607_ = NOR ( new_n1606_, NET_498 ) -new_n1608_ = NAND ( new_n1607_, new_n1593_ ) -new_n1609_ = OR ( new_n1608_, NET_491 ) -new_n1610_ = NOR ( new_n1609_, NET_506 ) -new_n1611_ = NAND ( new_n1610_, new_n1592_ ) -new_n1612_ = OR ( new_n1611_, NET_494 ) -new_n1613_ = NOR ( new_n1612_, NET_513 ) -new_n1614_ = NAND ( new_n1613_, new_n1591_ ) -new_n1615_ = OR ( new_n1614_, NET_509 ) -new_n1616_ = XOR ( new_n1615_, new_n1590_ ) -new_n1617_ = NAND ( new_n1103_, NET_308, NET_307 ) -new_n1618_ = NOR ( new_n1563_, NET_307 ) -new_n1619_ = XOR ( new_n1618_, NET_308 ) -new_n1620_ = NOT ( NET_307 ) -new_n1621_ = XOR ( new_n1563_, new_n1620_ ) -new_n1622_ = OR ( new_n1621_, new_n1619_, new_n1103_ ) -new_n1623_ = NAND ( new_n1622_, new_n1617_ ) -new_n1624_ = NAND ( new_n1623_, new_n1616_ ) -new_n1625_ = NOR ( NET_308, NET_307 ) -new_n1626_ = OR ( new_n1625_, NET_309 ) -new_n1627_ = NAND ( new_n1621_, new_n1619_ ) -new_n1628_ = NAND ( new_n1627_, NET_309 ) -new_n1629_ = NAND ( new_n1628_, new_n1626_, NET_364 ) -new_n1630_ = NOR ( NET_308, new_n1620_ ) -new_n1631_ = OR ( new_n1630_, NET_309 ) -new_n1632_ = NOT ( new_n1621_ ) -new_n1633_ = NAND ( new_n1632_, new_n1619_ ) -new_n1634_ = NAND ( new_n1633_, NET_309 ) -new_n1635_ = NAND ( new_n1634_, new_n1631_, NET_396 ) -new_n1636_ = NOT ( NET_308 ) -new_n1637_ = NOR ( new_n1636_, NET_307 ) -new_n1638_ = OR ( new_n1637_, NET_309 ) -new_n1639_ = NOR ( new_n1632_, new_n1619_ ) -new_n1640_ = OR ( new_n1639_, new_n1103_ ) -new_n1641_ = NAND ( new_n1640_, new_n1638_, NET_428 ) -new_n1642_ = NAND ( new_n1641_, new_n1635_, new_n1629_, new_n1624_ ) -new_n1643_ = NAND ( new_n1642_, NET_22560 ) -NET_3409 = NAND ( new_n1643_, new_n1589_ ) -new_n1645_ = NOT ( NET_479 ) -new_n1646_ = OR ( NET_22560, new_n1645_ ) -new_n1647_ = NOT ( NET_509 ) -new_n1648_ = XOR ( new_n1614_, new_n1647_ ) -new_n1649_ = NAND ( new_n1648_, new_n1623_ ) -new_n1650_ = NAND ( new_n1628_, new_n1626_, NET_363 ) -new_n1651_ = NAND ( new_n1634_, new_n1631_, NET_395 ) -new_n1652_ = NAND ( new_n1640_, new_n1638_, NET_427 ) -new_n1653_ = NAND ( new_n1652_, new_n1651_, new_n1650_, new_n1649_ ) -new_n1654_ = NAND ( new_n1653_, NET_22560 ) -NET_3410 = NAND ( new_n1654_, new_n1646_ ) -new_n1656_ = NOT ( NET_478 ) -new_n1657_ = OR ( NET_22560, new_n1656_ ) -new_n1658_ = XOR ( new_n1613_, NET_499 ) -new_n1659_ = NAND ( new_n1658_, new_n1623_ ) -new_n1660_ = NAND ( new_n1628_, new_n1626_, NET_362 ) -new_n1661_ = NAND ( new_n1634_, new_n1631_, NET_394 ) -new_n1662_ = NAND ( new_n1640_, new_n1638_, NET_426 ) -new_n1663_ = NAND ( new_n1662_, new_n1661_, new_n1660_, new_n1659_ ) -new_n1664_ = NAND ( new_n1663_, NET_22560 ) -NET_3411 = NAND ( new_n1664_, new_n1657_ ) -new_n1666_ = NOT ( NET_477 ) -new_n1667_ = OR ( NET_22560, new_n1666_ ) -new_n1668_ = NOT ( NET_393 ) -new_n1669_ = NAND ( new_n1634_, new_n1631_ ) -new_n1670_ = OR ( new_n1669_, new_n1668_ ) -new_n1671_ = NOT ( NET_513 ) -new_n1672_ = XOR ( new_n1612_, new_n1671_ ) -new_n1673_ = NAND ( new_n1672_, new_n1623_ ) -new_n1674_ = NAND ( new_n1640_, new_n1638_, NET_425 ) -new_n1675_ = NAND ( new_n1628_, new_n1626_, NET_361 ) -new_n1676_ = NAND ( new_n1675_, new_n1674_, new_n1673_, new_n1670_ ) -new_n1677_ = NAND ( new_n1676_, NET_22560 ) -NET_3412 = NAND ( new_n1677_, new_n1667_ ) -new_n1679_ = NOT ( NET_476 ) -new_n1680_ = OR ( NET_22560, new_n1679_ ) -new_n1681_ = NOT ( NET_392 ) -new_n1682_ = OR ( new_n1669_, new_n1681_ ) -new_n1683_ = NOT ( NET_494 ) -new_n1684_ = XOR ( new_n1611_, new_n1683_ ) -new_n1685_ = NAND ( new_n1684_, new_n1623_ ) -new_n1686_ = NAND ( new_n1640_, new_n1638_, NET_424 ) -new_n1687_ = NAND ( new_n1628_, new_n1626_, NET_360 ) -new_n1688_ = NAND ( new_n1687_, new_n1686_, new_n1685_, new_n1682_ ) -new_n1689_ = NAND ( new_n1688_, NET_22560 ) -NET_3413 = NAND ( new_n1689_, new_n1680_ ) -new_n1691_ = NOT ( NET_475 ) -new_n1692_ = OR ( NET_22560, new_n1691_ ) -new_n1693_ = NOT ( NET_391 ) -new_n1694_ = OR ( new_n1669_, new_n1693_ ) -new_n1695_ = XOR ( new_n1610_, NET_504 ) -new_n1696_ = NAND ( new_n1695_, new_n1623_ ) -new_n1697_ = NAND ( new_n1640_, new_n1638_, NET_423 ) -new_n1698_ = NAND ( new_n1628_, new_n1626_, NET_359 ) -new_n1699_ = NAND ( new_n1698_, new_n1697_, new_n1696_, new_n1694_ ) -new_n1700_ = NAND ( new_n1699_, NET_22560 ) -NET_3414 = NAND ( new_n1700_, new_n1692_ ) -new_n1702_ = NOT ( NET_474 ) -new_n1703_ = OR ( NET_22560, new_n1702_ ) -new_n1704_ = NOT ( NET_390 ) -new_n1705_ = OR ( new_n1669_, new_n1704_ ) -new_n1706_ = NOT ( NET_506 ) -new_n1707_ = XOR ( new_n1609_, new_n1706_ ) -new_n1708_ = NAND ( new_n1707_, new_n1623_ ) -new_n1709_ = NAND ( new_n1640_, new_n1638_, NET_422 ) -new_n1710_ = NAND ( new_n1628_, new_n1626_, NET_358 ) -new_n1711_ = NAND ( new_n1710_, new_n1709_, new_n1708_, new_n1705_ ) -new_n1712_ = NAND ( new_n1711_, NET_22560 ) -NET_3415 = NAND ( new_n1712_, new_n1703_ ) -new_n1714_ = NOT ( NET_473 ) -new_n1715_ = OR ( NET_22560, new_n1714_ ) -new_n1716_ = NOT ( NET_389 ) -new_n1717_ = OR ( new_n1669_, new_n1716_ ) -new_n1718_ = NOT ( NET_491 ) -new_n1719_ = XOR ( new_n1608_, new_n1718_ ) -new_n1720_ = NAND ( new_n1719_, new_n1623_ ) -new_n1721_ = NAND ( new_n1640_, new_n1638_, NET_421 ) -new_n1722_ = NAND ( new_n1628_, new_n1626_, NET_357 ) -new_n1723_ = NAND ( new_n1722_, new_n1721_, new_n1720_, new_n1717_ ) -new_n1724_ = NAND ( new_n1723_, NET_22560 ) -NET_3416 = NAND ( new_n1724_, new_n1715_ ) -new_n1726_ = NOT ( NET_472 ) -new_n1727_ = OR ( NET_22560, new_n1726_ ) -new_n1728_ = NOT ( NET_388 ) -new_n1729_ = OR ( new_n1669_, new_n1728_ ) -new_n1730_ = XOR ( new_n1607_, NET_517 ) -new_n1731_ = NAND ( new_n1730_, new_n1623_ ) -new_n1732_ = NAND ( new_n1640_, new_n1638_, NET_420 ) -new_n1733_ = NAND ( new_n1628_, new_n1626_, NET_356 ) -new_n1734_ = NAND ( new_n1733_, new_n1732_, new_n1731_, new_n1729_ ) -new_n1735_ = NAND ( new_n1734_, NET_22560 ) -NET_3417 = NAND ( new_n1735_, new_n1727_ ) -new_n1737_ = NOT ( NET_471 ) -new_n1738_ = OR ( NET_22560, new_n1737_ ) -new_n1739_ = NOT ( NET_387 ) -new_n1740_ = OR ( new_n1669_, new_n1739_ ) -new_n1741_ = NOT ( NET_498 ) -new_n1742_ = XOR ( new_n1606_, new_n1741_ ) -new_n1743_ = NAND ( new_n1742_, new_n1623_ ) -new_n1744_ = NAND ( new_n1640_, new_n1638_, NET_419 ) -new_n1745_ = NAND ( new_n1628_, new_n1626_, NET_355 ) -new_n1746_ = NAND ( new_n1745_, new_n1744_, new_n1743_, new_n1740_ ) -new_n1747_ = NAND ( new_n1746_, NET_22560 ) -NET_3418 = NAND ( new_n1747_, new_n1738_ ) -new_n1749_ = NOT ( NET_470 ) -new_n1750_ = OR ( NET_22560, new_n1749_ ) -new_n1751_ = NOT ( NET_386 ) -new_n1752_ = OR ( new_n1669_, new_n1751_ ) -new_n1753_ = NOT ( NET_508 ) -new_n1754_ = XOR ( new_n1605_, new_n1753_ ) -new_n1755_ = NAND ( new_n1754_, new_n1623_ ) -new_n1756_ = NAND ( new_n1640_, new_n1638_, NET_418 ) -new_n1757_ = NAND ( new_n1628_, new_n1626_, NET_354 ) -new_n1758_ = NAND ( new_n1757_, new_n1756_, new_n1755_, new_n1752_ ) -new_n1759_ = NAND ( new_n1758_, NET_22560 ) -NET_3419 = NAND ( new_n1759_, new_n1750_ ) -new_n1761_ = NOT ( NET_469 ) -new_n1762_ = OR ( NET_22560, new_n1761_ ) -new_n1763_ = NOT ( NET_385 ) -new_n1764_ = OR ( new_n1669_, new_n1763_ ) -new_n1765_ = XOR ( new_n1604_, NET_496 ) -new_n1766_ = NAND ( new_n1765_, new_n1623_ ) -new_n1767_ = NAND ( new_n1640_, new_n1638_, NET_417 ) -new_n1768_ = NAND ( new_n1628_, new_n1626_, NET_353 ) -new_n1769_ = NAND ( new_n1768_, new_n1767_, new_n1766_, new_n1764_ ) -new_n1770_ = NAND ( new_n1769_, NET_22560 ) -NET_3420 = NAND ( new_n1770_, new_n1762_ ) -new_n1772_ = NOT ( NET_468 ) -new_n1773_ = OR ( NET_22560, new_n1772_ ) -new_n1774_ = NOT ( NET_384 ) -new_n1775_ = OR ( new_n1669_, new_n1774_ ) -new_n1776_ = NOT ( NET_515 ) -new_n1777_ = XOR ( new_n1603_, new_n1776_ ) -new_n1778_ = NAND ( new_n1777_, new_n1623_ ) -new_n1779_ = NAND ( new_n1640_, new_n1638_, NET_416 ) -new_n1780_ = NAND ( new_n1628_, new_n1626_, NET_352 ) -new_n1781_ = NAND ( new_n1780_, new_n1779_, new_n1778_, new_n1775_ ) -new_n1782_ = NAND ( new_n1781_, NET_22560 ) -NET_3421 = NAND ( new_n1782_, new_n1773_ ) -new_n1784_ = NOT ( NET_467 ) -new_n1785_ = OR ( NET_22560, new_n1784_ ) -new_n1786_ = NOT ( NET_383 ) -new_n1787_ = OR ( new_n1669_, new_n1786_ ) -new_n1788_ = NOT ( NET_501 ) -new_n1789_ = XOR ( new_n1602_, new_n1788_ ) -new_n1790_ = NAND ( new_n1789_, new_n1623_ ) -new_n1791_ = NAND ( new_n1640_, new_n1638_, NET_415 ) -new_n1792_ = NAND ( new_n1628_, new_n1626_, NET_351 ) -new_n1793_ = NAND ( new_n1792_, new_n1791_, new_n1790_, new_n1787_ ) -new_n1794_ = NAND ( new_n1793_, NET_22560 ) -NET_3422 = NAND ( new_n1794_, new_n1785_ ) -new_n1796_ = NOT ( NET_466 ) -new_n1797_ = OR ( NET_22560, new_n1796_ ) -new_n1798_ = NOT ( NET_382 ) -new_n1799_ = OR ( new_n1669_, new_n1798_ ) -new_n1800_ = XOR ( new_n1601_, NET_511 ) -new_n1801_ = NAND ( new_n1800_, new_n1623_ ) -new_n1802_ = NAND ( new_n1640_, new_n1638_, NET_414 ) -new_n1803_ = NAND ( new_n1628_, new_n1626_, NET_350 ) -new_n1804_ = NAND ( new_n1803_, new_n1802_, new_n1801_, new_n1799_ ) -new_n1805_ = NAND ( new_n1804_, NET_22560 ) -NET_3423 = NAND ( new_n1805_, new_n1797_ ) -new_n1807_ = NOT ( NET_465 ) -new_n1808_ = OR ( NET_22560, new_n1807_ ) -new_n1809_ = NOT ( NET_381 ) -new_n1810_ = OR ( new_n1669_, new_n1809_ ) -new_n1811_ = XOR ( new_n1600_, NET_519 ) -new_n1812_ = NAND ( new_n1811_, new_n1623_ ) -new_n1813_ = NAND ( new_n1640_, new_n1638_, NET_413 ) -new_n1814_ = NAND ( new_n1628_, new_n1626_, NET_349 ) -new_n1815_ = NAND ( new_n1814_, new_n1813_, new_n1812_, new_n1810_ ) -new_n1816_ = NAND ( new_n1815_, NET_22560 ) -NET_3424 = NAND ( new_n1816_, new_n1808_ ) -new_n1818_ = NOT ( NET_464 ) -new_n1819_ = OR ( NET_22560, new_n1818_ ) -new_n1820_ = NOT ( NET_380 ) -new_n1821_ = OR ( new_n1669_, new_n1820_ ) -new_n1822_ = NOT ( NET_493 ) -new_n1823_ = XOR ( new_n1599_, new_n1822_ ) -new_n1824_ = NAND ( new_n1823_, new_n1623_ ) -new_n1825_ = NAND ( new_n1640_, new_n1638_, NET_412 ) -new_n1826_ = NAND ( new_n1628_, new_n1626_, NET_348 ) -new_n1827_ = NAND ( new_n1826_, new_n1825_, new_n1824_, new_n1821_ ) -new_n1828_ = NAND ( new_n1827_, NET_22560 ) -NET_3425 = NAND ( new_n1828_, new_n1819_ ) -new_n1830_ = NOT ( NET_463 ) -new_n1831_ = OR ( NET_22560, new_n1830_ ) -new_n1832_ = NOT ( NET_379 ) -new_n1833_ = OR ( new_n1669_, new_n1832_ ) -new_n1834_ = XOR ( new_n1598_, NET_505 ) -new_n1835_ = NAND ( new_n1834_, new_n1623_ ) -new_n1836_ = NAND ( new_n1640_, new_n1638_, NET_411 ) -new_n1837_ = NAND ( new_n1628_, new_n1626_, NET_347 ) -new_n1838_ = NAND ( new_n1837_, new_n1836_, new_n1835_, new_n1833_ ) -new_n1839_ = NAND ( new_n1838_, NET_22560 ) -NET_3426 = NAND ( new_n1839_, new_n1831_ ) -new_n1841_ = OR ( NET_22560, new_n1371_ ) -new_n1842_ = NOT ( NET_378 ) -new_n1843_ = OR ( new_n1669_, new_n1842_ ) -new_n1844_ = XNOR ( NET_514, NET_502 ) -new_n1845_ = NAND ( new_n1844_, new_n1623_ ) -new_n1846_ = NAND ( new_n1640_, new_n1638_, NET_410 ) -new_n1847_ = NAND ( new_n1628_, new_n1626_, NET_346 ) -new_n1848_ = NAND ( new_n1847_, new_n1846_, new_n1845_, new_n1843_ ) -new_n1849_ = NAND ( new_n1848_, NET_22560 ) -NET_3427 = NAND ( new_n1849_, new_n1841_ ) -new_n1851_ = OR ( NET_22560, new_n1205_ ) -new_n1852_ = NOT ( NET_377 ) -new_n1853_ = OR ( new_n1669_, new_n1852_ ) -new_n1854_ = NOT ( NET_514 ) -new_n1855_ = NAND ( new_n1623_, new_n1854_ ) -new_n1856_ = NAND ( new_n1640_, new_n1638_, NET_409 ) -new_n1857_ = NAND ( new_n1628_, new_n1626_, NET_345 ) -new_n1858_ = NAND ( new_n1857_, new_n1856_, new_n1855_, new_n1853_ ) -new_n1859_ = NAND ( new_n1858_, NET_22560 ) -NET_3428 = NAND ( new_n1859_, new_n1851_ ) -new_n1861_ = OR ( NET_22560, new_n1164_ ) -new_n1862_ = NOT ( NET_376 ) -new_n1863_ = OR ( new_n1669_, new_n1862_ ) -new_n1864_ = NAND ( new_n1623_, NET_495 ) -new_n1865_ = NAND ( new_n1640_, new_n1638_, NET_408 ) -new_n1866_ = NAND ( new_n1628_, new_n1626_, NET_344 ) -new_n1867_ = NAND ( new_n1866_, new_n1865_, new_n1864_, new_n1863_ ) -new_n1868_ = NAND ( new_n1867_, NET_22560 ) -NET_3429 = NAND ( new_n1868_, new_n1861_ ) -new_n1870_ = OR ( NET_22560, new_n1110_ ) -new_n1871_ = NAND ( new_n1628_, new_n1626_, NET_343 ) -new_n1872_ = NAND ( new_n1623_, NET_510 ) -new_n1873_ = NOT ( NET_375 ) -new_n1874_ = OR ( new_n1669_, new_n1873_ ) -new_n1875_ = NAND ( new_n1640_, new_n1638_, NET_407 ) -new_n1876_ = NAND ( new_n1875_, new_n1874_, new_n1872_, new_n1871_ ) -new_n1877_ = NAND ( new_n1876_, NET_22560 ) -NET_3430 = NAND ( new_n1877_, new_n1870_ ) -new_n1879_ = OR ( NET_22560, new_n1083_ ) -new_n1880_ = NAND ( new_n1628_, new_n1626_, NET_342 ) -new_n1881_ = NAND ( new_n1623_, NET_500 ) -new_n1882_ = NAND ( new_n1634_, new_n1631_, NET_374 ) -new_n1883_ = NAND ( new_n1640_, new_n1638_, NET_406 ) -new_n1884_ = NAND ( new_n1883_, new_n1882_, new_n1881_, new_n1880_ ) -new_n1885_ = NAND ( new_n1884_, NET_22560 ) -NET_3431 = NAND ( new_n1885_, new_n1879_ ) -new_n1887_ = OR ( NET_448, NET_203 ) -new_n1888_ = NAND ( NET_448, NET_203 ) -new_n1889_ = NAND ( new_n1888_, new_n1887_ ) -new_n1890_ = NOT ( new_n1469_ ) -new_n1891_ = AND ( new_n1476_, new_n1890_ ) -new_n1892_ = OR ( new_n1891_, new_n1472_ ) -NET_3501 = XNOR ( new_n1892_, new_n1889_ ) -new_n1894_ = OR ( new_n1078_, NET_463 ) -new_n1895_ = NOT ( NET_27 ) -new_n1896_ = OR ( new_n1078_, NET_218 ) -new_n1897_ = NAND ( new_n1078_, new_n1830_ ) -new_n1898_ = NAND ( new_n1897_, new_n1896_ ) -new_n1899_ = NAND ( new_n1898_, new_n1895_ ) -new_n1900_ = OR ( new_n1898_, new_n1895_ ) -new_n1901_ = NAND ( new_n1900_, new_n1899_ ) -new_n1902_ = NAND ( new_n1378_, new_n1375_ ) -new_n1903_ = NAND ( new_n1902_, new_n1374_ ) -new_n1904_ = XNOR ( new_n1903_, new_n1901_ ) -new_n1905_ = OR ( new_n1904_, new_n1080_ ) -new_n1906_ = NAND ( new_n1905_, new_n1894_ ) -new_n1907_ = OR ( new_n1906_, NET_275 ) -new_n1908_ = NOT ( NET_38 ) -new_n1909_ = OR ( new_n1125_, new_n1908_ ) -new_n1910_ = XOR ( new_n1385_, new_n1908_ ) -new_n1911_ = OR ( new_n1910_, new_n1129_ ) -NET_3504 = NAND ( new_n1911_, new_n1909_, new_n1907_ ) -new_n1913_ = NOT ( NET_244 ) -new_n1914_ = OR ( NET_22558, new_n1913_ ) -new_n1915_ = NOT ( NET_62 ) -new_n1916_ = NOR ( NET_63, new_n1915_ ) -new_n1917_ = OR ( new_n1916_, NET_64 ) -new_n1918_ = XOR ( new_n1295_, new_n1915_ ) -new_n1919_ = OR ( new_n1295_, NET_62 ) -new_n1920_ = AND ( new_n1919_, NET_63 ) -new_n1921_ = NOR ( new_n1919_, NET_63 ) -new_n1922_ = NOR ( new_n1921_, new_n1920_ ) -new_n1923_ = NOR ( new_n1922_, new_n1918_ ) -new_n1924_ = OR ( new_n1923_, new_n1127_ ) -new_n1925_ = NAND ( new_n1924_, new_n1917_, NET_160 ) -new_n1926_ = NOT ( NET_63 ) -new_n1927_ = NOR ( new_n1926_, NET_62 ) -new_n1928_ = OR ( new_n1927_, NET_64 ) -new_n1929_ = NOT ( new_n1918_ ) -new_n1930_ = OR ( new_n1921_, new_n1920_ ) -new_n1931_ = NOR ( new_n1930_, new_n1929_ ) -new_n1932_ = OR ( new_n1931_, new_n1127_ ) -new_n1933_ = NAND ( new_n1932_, new_n1928_, NET_192 ) -new_n1934_ = NOR ( NET_63, NET_62 ) -new_n1935_ = OR ( new_n1934_, NET_64 ) -new_n1936_ = NOR ( new_n1922_, new_n1929_ ) -new_n1937_ = OR ( new_n1936_, new_n1127_ ) -new_n1938_ = NAND ( new_n1937_, new_n1935_, NET_128 ) -new_n1939_ = NAND ( new_n1938_, new_n1933_, new_n1925_ ) -new_n1940_ = NAND ( new_n1939_, NET_22558 ) -NET_3508 = NAND ( new_n1940_, new_n1914_ ) -new_n1942_ = NOT ( NET_243 ) -new_n1943_ = OR ( NET_22558, new_n1942_ ) -new_n1944_ = NAND ( new_n1924_, new_n1917_, NET_159 ) -new_n1945_ = NAND ( new_n1932_, new_n1928_, NET_191 ) -new_n1946_ = NAND ( new_n1937_, new_n1935_, NET_127 ) -new_n1947_ = NAND ( new_n1946_, new_n1945_, new_n1944_ ) -new_n1948_ = NAND ( new_n1947_, NET_22558 ) -NET_3509 = NAND ( new_n1948_, new_n1943_ ) -new_n1950_ = NOT ( NET_235 ) -new_n1951_ = OR ( NET_22558, new_n1950_ ) -new_n1952_ = NOT ( NET_252 ) -new_n1953_ = NOT ( NET_264 ) -new_n1954_ = NOT ( NET_268 ) -new_n1955_ = NOT ( NET_249 ) -new_n1956_ = NOT ( NET_261 ) -new_n1957_ = NOT ( NET_246 ) -new_n1958_ = NOT ( NET_253 ) -new_n1959_ = NOT ( NET_263 ) -new_n1960_ = NOT ( NET_270 ) -new_n1961_ = NOT ( NET_256 ) -new_n1962_ = NOT ( NET_274 ) -new_n1963_ = NOT ( NET_248 ) -new_n1964_ = NOT ( NET_260 ) -new_n1965_ = NAND ( NET_269, NET_257 ) -new_n1966_ = OR ( new_n1965_, new_n1964_ ) -new_n1967_ = OR ( new_n1966_, new_n1963_ ) -new_n1968_ = NOR ( new_n1967_, new_n1962_ ) -new_n1969_ = NAND ( new_n1968_, NET_266 ) -new_n1970_ = OR ( new_n1969_, new_n1961_ ) -new_n1971_ = NOR ( new_n1970_, new_n1960_ ) -new_n1972_ = NAND ( new_n1971_, NET_251 ) -new_n1973_ = OR ( new_n1972_, new_n1959_ ) -new_n1974_ = NOR ( new_n1973_, new_n1958_ ) -new_n1975_ = NAND ( new_n1974_, NET_272 ) -new_n1976_ = OR ( new_n1975_, new_n1957_ ) -new_n1977_ = NOR ( new_n1976_, new_n1956_ ) -new_n1978_ = NAND ( new_n1977_, NET_259 ) -new_n1979_ = OR ( new_n1978_, new_n1955_ ) -new_n1980_ = NOR ( new_n1979_, new_n1954_ ) -new_n1981_ = NAND ( new_n1980_, NET_254 ) -new_n1982_ = OR ( new_n1981_, new_n1953_ ) -new_n1983_ = AND ( new_n1982_, new_n1952_ ) -new_n1984_ = NOR ( new_n1982_, new_n1952_ ) -new_n1985_ = NOR ( new_n1984_, new_n1983_ ) -new_n1986_ = NAND ( NET_63, NET_62 ) -new_n1987_ = NAND ( new_n1986_, new_n1127_ ) -new_n1988_ = NOR ( new_n1930_, new_n1918_ ) -new_n1989_ = OR ( new_n1988_, new_n1127_ ) -new_n1990_ = NAND ( new_n1989_, new_n1987_ ) -new_n1991_ = NOT ( new_n1990_ ) -new_n1992_ = NAND ( new_n1991_, new_n1985_ ) -new_n1993_ = NAND ( new_n1937_, new_n1935_, NET_119 ) -new_n1994_ = NAND ( new_n1924_, new_n1917_, NET_151 ) -new_n1995_ = NAND ( new_n1932_, new_n1928_, NET_183 ) -new_n1996_ = NAND ( new_n1995_, new_n1994_, new_n1993_, new_n1992_ ) -new_n1997_ = NAND ( new_n1996_, NET_22558 ) -NET_3510 = NAND ( new_n1997_, new_n1951_ ) -new_n1999_ = NOT ( NET_234 ) -new_n2000_ = OR ( NET_22558, new_n1999_ ) -new_n2001_ = NAND ( new_n1981_, new_n1953_ ) -new_n2002_ = AND ( new_n2001_, new_n1982_ ) -new_n2003_ = NAND ( new_n2002_, new_n1991_ ) -new_n2004_ = NAND ( new_n1937_, new_n1935_, NET_118 ) -new_n2005_ = NAND ( new_n1924_, new_n1917_, NET_150 ) -new_n2006_ = NAND ( new_n1932_, new_n1928_, NET_182 ) -new_n2007_ = NAND ( new_n2006_, new_n2005_, new_n2004_, new_n2003_ ) -new_n2008_ = NAND ( new_n2007_, NET_22558 ) -NET_3511 = NAND ( new_n2008_, new_n2000_ ) -new_n2010_ = NOT ( NET_233 ) -new_n2011_ = OR ( NET_22558, new_n2010_ ) -new_n2012_ = OR ( new_n1980_, NET_254 ) -new_n2013_ = AND ( new_n2012_, new_n1981_ ) -new_n2014_ = NAND ( new_n2013_, new_n1991_ ) -new_n2015_ = NAND ( new_n1937_, new_n1935_, NET_117 ) -new_n2016_ = NAND ( new_n1924_, new_n1917_, NET_149 ) -new_n2017_ = NAND ( new_n1932_, new_n1928_, NET_181 ) -new_n2018_ = NAND ( new_n2017_, new_n2016_, new_n2015_, new_n2014_ ) -new_n2019_ = NAND ( new_n2018_, NET_22558 ) -NET_3512 = NAND ( new_n2019_, new_n2011_ ) -new_n2021_ = NOT ( NET_232 ) -new_n2022_ = OR ( NET_22558, new_n2021_ ) -new_n2023_ = NOT ( NET_148 ) -new_n2024_ = NAND ( new_n1924_, new_n1917_ ) -new_n2025_ = OR ( new_n2024_, new_n2023_ ) -new_n2026_ = NOT ( NET_180 ) -new_n2027_ = NAND ( new_n1932_, new_n1928_ ) -new_n2028_ = OR ( new_n2027_, new_n2026_ ) -new_n2029_ = AND ( new_n1979_, new_n1954_ ) -new_n2030_ = NOR ( new_n2029_, new_n1980_ ) -new_n2031_ = NAND ( new_n2030_, new_n1991_ ) -new_n2032_ = NAND ( new_n1937_, new_n1935_, NET_116 ) -new_n2033_ = NAND ( new_n2032_, new_n2031_, new_n2028_, new_n2025_ ) -new_n2034_ = NAND ( new_n2033_, NET_22558 ) -NET_3513 = NAND ( new_n2034_, new_n2022_ ) -new_n2036_ = NOT ( NET_231 ) -new_n2037_ = OR ( NET_22558, new_n2036_ ) -new_n2038_ = NOT ( NET_147 ) -new_n2039_ = OR ( new_n2024_, new_n2038_ ) -new_n2040_ = NOT ( NET_179 ) -new_n2041_ = OR ( new_n2027_, new_n2040_ ) -new_n2042_ = NAND ( new_n1978_, new_n1955_ ) -new_n2043_ = AND ( new_n2042_, new_n1979_ ) -new_n2044_ = NAND ( new_n2043_, new_n1991_ ) -new_n2045_ = NAND ( new_n1937_, new_n1935_, NET_115 ) -new_n2046_ = NAND ( new_n2045_, new_n2044_, new_n2041_, new_n2039_ ) -new_n2047_ = NAND ( new_n2046_, NET_22558 ) -NET_3514 = NAND ( new_n2047_, new_n2037_ ) -new_n2049_ = NOT ( NET_230 ) -new_n2050_ = OR ( NET_22558, new_n2049_ ) -new_n2051_ = NOT ( NET_146 ) -new_n2052_ = OR ( new_n2024_, new_n2051_ ) -new_n2053_ = NOT ( NET_178 ) -new_n2054_ = OR ( new_n2027_, new_n2053_ ) -new_n2055_ = OR ( new_n1977_, NET_259 ) -new_n2056_ = AND ( new_n2055_, new_n1978_ ) -new_n2057_ = NAND ( new_n2056_, new_n1991_ ) -new_n2058_ = NAND ( new_n1937_, new_n1935_, NET_114 ) -new_n2059_ = NAND ( new_n2058_, new_n2057_, new_n2054_, new_n2052_ ) -new_n2060_ = NAND ( new_n2059_, NET_22558 ) -NET_3515 = NAND ( new_n2060_, new_n2050_ ) -new_n2062_ = NOT ( NET_229 ) -new_n2063_ = OR ( NET_22558, new_n2062_ ) -new_n2064_ = NOT ( NET_145 ) -new_n2065_ = OR ( new_n2024_, new_n2064_ ) -new_n2066_ = NOT ( NET_177 ) -new_n2067_ = OR ( new_n2027_, new_n2066_ ) -new_n2068_ = AND ( new_n1976_, new_n1956_ ) -new_n2069_ = NOR ( new_n2068_, new_n1977_ ) -new_n2070_ = NAND ( new_n2069_, new_n1991_ ) -new_n2071_ = NAND ( new_n1937_, new_n1935_, NET_113 ) -new_n2072_ = NAND ( new_n2071_, new_n2070_, new_n2067_, new_n2065_ ) -new_n2073_ = NAND ( new_n2072_, NET_22558 ) -NET_3516 = NAND ( new_n2073_, new_n2063_ ) -new_n2075_ = NOT ( NET_228 ) -new_n2076_ = OR ( NET_22558, new_n2075_ ) -new_n2077_ = NOT ( NET_144 ) -new_n2078_ = OR ( new_n2024_, new_n2077_ ) -new_n2079_ = NOT ( NET_176 ) -new_n2080_ = OR ( new_n2027_, new_n2079_ ) -new_n2081_ = NAND ( new_n1975_, new_n1957_ ) -new_n2082_ = AND ( new_n2081_, new_n1976_ ) -new_n2083_ = NAND ( new_n2082_, new_n1991_ ) -new_n2084_ = NAND ( new_n1937_, new_n1935_, NET_112 ) -new_n2085_ = NAND ( new_n2084_, new_n2083_, new_n2080_, new_n2078_ ) -new_n2086_ = NAND ( new_n2085_, NET_22558 ) -NET_3517 = NAND ( new_n2086_, new_n2076_ ) -new_n2088_ = NOT ( NET_227 ) -new_n2089_ = OR ( NET_22558, new_n2088_ ) -new_n2090_ = NOT ( NET_143 ) -new_n2091_ = OR ( new_n2024_, new_n2090_ ) -new_n2092_ = NOT ( NET_175 ) -new_n2093_ = OR ( new_n2027_, new_n2092_ ) -new_n2094_ = OR ( new_n1974_, NET_272 ) -new_n2095_ = AND ( new_n2094_, new_n1975_ ) -new_n2096_ = NAND ( new_n2095_, new_n1991_ ) -new_n2097_ = NAND ( new_n1937_, new_n1935_, NET_111 ) -new_n2098_ = NAND ( new_n2097_, new_n2096_, new_n2093_, new_n2091_ ) -new_n2099_ = NAND ( new_n2098_, NET_22558 ) -NET_3518 = NAND ( new_n2099_, new_n2089_ ) -new_n2101_ = NOT ( NET_226 ) -new_n2102_ = OR ( NET_22558, new_n2101_ ) -new_n2103_ = NOT ( NET_142 ) -new_n2104_ = OR ( new_n2024_, new_n2103_ ) -new_n2105_ = NOT ( NET_174 ) -new_n2106_ = OR ( new_n2027_, new_n2105_ ) -new_n2107_ = AND ( new_n1973_, new_n1958_ ) -new_n2108_ = NOR ( new_n2107_, new_n1974_ ) -new_n2109_ = NAND ( new_n2108_, new_n1991_ ) -new_n2110_ = NAND ( new_n1937_, new_n1935_, NET_110 ) -new_n2111_ = NAND ( new_n2110_, new_n2109_, new_n2106_, new_n2104_ ) -new_n2112_ = NAND ( new_n2111_, NET_22558 ) -NET_3519 = NAND ( new_n2112_, new_n2102_ ) -new_n2114_ = NOT ( NET_225 ) -new_n2115_ = OR ( NET_22558, new_n2114_ ) -new_n2116_ = NOT ( NET_141 ) -new_n2117_ = OR ( new_n2024_, new_n2116_ ) -new_n2118_ = NOT ( NET_173 ) -new_n2119_ = OR ( new_n2027_, new_n2118_ ) -new_n2120_ = NAND ( new_n1972_, new_n1959_ ) -new_n2121_ = AND ( new_n2120_, new_n1973_ ) -new_n2122_ = NAND ( new_n2121_, new_n1991_ ) -new_n2123_ = NAND ( new_n1937_, new_n1935_, NET_109 ) -new_n2124_ = NAND ( new_n2123_, new_n2122_, new_n2119_, new_n2117_ ) -new_n2125_ = NAND ( new_n2124_, NET_22558 ) -NET_3520 = NAND ( new_n2125_, new_n2115_ ) -new_n2127_ = NOT ( NET_224 ) -new_n2128_ = OR ( NET_22558, new_n2127_ ) -new_n2129_ = NOT ( NET_140 ) -new_n2130_ = OR ( new_n2024_, new_n2129_ ) -new_n2131_ = NOT ( NET_172 ) -new_n2132_ = OR ( new_n2027_, new_n2131_ ) -new_n2133_ = OR ( new_n1971_, NET_251 ) -new_n2134_ = AND ( new_n2133_, new_n1972_ ) -new_n2135_ = NAND ( new_n2134_, new_n1991_ ) -new_n2136_ = NAND ( new_n1937_, new_n1935_, NET_108 ) -new_n2137_ = NAND ( new_n2136_, new_n2135_, new_n2132_, new_n2130_ ) -new_n2138_ = NAND ( new_n2137_, NET_22558 ) -NET_3521 = NAND ( new_n2138_, new_n2128_ ) -new_n2140_ = NOT ( NET_223 ) -new_n2141_ = OR ( NET_22558, new_n2140_ ) -new_n2142_ = NOT ( NET_139 ) -new_n2143_ = OR ( new_n2024_, new_n2142_ ) -new_n2144_ = NOT ( NET_171 ) -new_n2145_ = OR ( new_n2027_, new_n2144_ ) -new_n2146_ = AND ( new_n1970_, new_n1960_ ) -new_n2147_ = NOR ( new_n2146_, new_n1971_ ) -new_n2148_ = NAND ( new_n2147_, new_n1991_ ) -new_n2149_ = NAND ( new_n1937_, new_n1935_, NET_107 ) -new_n2150_ = NAND ( new_n2149_, new_n2148_, new_n2145_, new_n2143_ ) -new_n2151_ = NAND ( new_n2150_, NET_22558 ) -NET_3522 = NAND ( new_n2151_, new_n2141_ ) -new_n2153_ = NOT ( NET_222 ) -new_n2154_ = OR ( NET_22558, new_n2153_ ) -new_n2155_ = NOT ( NET_138 ) -new_n2156_ = OR ( new_n2024_, new_n2155_ ) -new_n2157_ = NOT ( NET_170 ) -new_n2158_ = OR ( new_n2027_, new_n2157_ ) -new_n2159_ = NAND ( new_n1969_, new_n1961_ ) -new_n2160_ = AND ( new_n2159_, new_n1970_ ) -new_n2161_ = NAND ( new_n2160_, new_n1991_ ) -new_n2162_ = NAND ( new_n1937_, new_n1935_, NET_106 ) -new_n2163_ = NAND ( new_n2162_, new_n2161_, new_n2158_, new_n2156_ ) -new_n2164_ = NAND ( new_n2163_, NET_22558 ) -NET_3523 = NAND ( new_n2164_, new_n2154_ ) -new_n2166_ = NOT ( NET_221 ) -new_n2167_ = OR ( NET_22558, new_n2166_ ) -new_n2168_ = NOT ( NET_137 ) -new_n2169_ = OR ( new_n2024_, new_n2168_ ) -new_n2170_ = NOT ( NET_169 ) -new_n2171_ = OR ( new_n2027_, new_n2170_ ) -new_n2172_ = OR ( new_n1968_, NET_266 ) -new_n2173_ = AND ( new_n2172_, new_n1969_ ) -new_n2174_ = NAND ( new_n2173_, new_n1991_ ) -new_n2175_ = NAND ( new_n1937_, new_n1935_, NET_105 ) -new_n2176_ = NAND ( new_n2175_, new_n2174_, new_n2171_, new_n2169_ ) -new_n2177_ = NAND ( new_n2176_, NET_22558 ) -NET_3524 = NAND ( new_n2177_, new_n2167_ ) -new_n2179_ = NOT ( NET_220 ) -new_n2180_ = OR ( NET_22558, new_n2179_ ) -new_n2181_ = NOT ( NET_136 ) -new_n2182_ = OR ( new_n2024_, new_n2181_ ) -new_n2183_ = NOT ( NET_168 ) -new_n2184_ = OR ( new_n2027_, new_n2183_ ) -new_n2185_ = AND ( new_n1967_, new_n1962_ ) -new_n2186_ = NOR ( new_n2185_, new_n1968_ ) -new_n2187_ = NAND ( new_n2186_, new_n1991_ ) -new_n2188_ = NAND ( new_n1937_, new_n1935_, NET_104 ) -new_n2189_ = NAND ( new_n2188_, new_n2187_, new_n2184_, new_n2182_ ) -new_n2190_ = NAND ( new_n2189_, NET_22558 ) -NET_3525 = NAND ( new_n2190_, new_n2180_ ) -new_n2192_ = NOT ( NET_219 ) -new_n2193_ = OR ( NET_22558, new_n2192_ ) -new_n2194_ = NOT ( NET_135 ) -new_n2195_ = OR ( new_n2024_, new_n2194_ ) -new_n2196_ = NOT ( NET_167 ) -new_n2197_ = OR ( new_n2027_, new_n2196_ ) -new_n2198_ = NAND ( new_n1966_, new_n1963_ ) -new_n2199_ = AND ( new_n2198_, new_n1967_ ) -new_n2200_ = NAND ( new_n2199_, new_n1991_ ) -new_n2201_ = NAND ( new_n1937_, new_n1935_, NET_103 ) -new_n2202_ = NAND ( new_n2201_, new_n2200_, new_n2197_, new_n2195_ ) -new_n2203_ = NAND ( new_n2202_, NET_22558 ) -NET_3526 = NAND ( new_n2203_, new_n2193_ ) -new_n2205_ = NOT ( NET_218 ) -new_n2206_ = OR ( NET_22558, new_n2205_ ) -new_n2207_ = NOT ( NET_134 ) -new_n2208_ = OR ( new_n2024_, new_n2207_ ) -new_n2209_ = NOT ( NET_166 ) -new_n2210_ = OR ( new_n2027_, new_n2209_ ) -new_n2211_ = NAND ( new_n1965_, new_n1964_ ) -new_n2212_ = AND ( new_n2211_, new_n1966_ ) -new_n2213_ = NAND ( new_n2212_, new_n1991_ ) -new_n2214_ = NAND ( new_n1937_, new_n1935_, NET_102 ) -new_n2215_ = NAND ( new_n2214_, new_n2213_, new_n2210_, new_n2208_ ) -new_n2216_ = NAND ( new_n2215_, NET_22558 ) -NET_3527 = NAND ( new_n2216_, new_n2206_ ) -new_n2218_ = OR ( NET_22558, new_n1392_ ) -new_n2219_ = NOT ( NET_133 ) -new_n2220_ = OR ( new_n2024_, new_n2219_ ) -new_n2221_ = NOT ( NET_165 ) -new_n2222_ = OR ( new_n2027_, new_n2221_ ) -new_n2223_ = OR ( NET_269, NET_257 ) -new_n2224_ = AND ( new_n2223_, new_n1965_ ) -new_n2225_ = NAND ( new_n2224_, new_n1991_ ) -new_n2226_ = NAND ( new_n1937_, new_n1935_, NET_101 ) -new_n2227_ = NAND ( new_n2226_, new_n2225_, new_n2222_, new_n2220_ ) -new_n2228_ = NAND ( new_n2227_, NET_22558 ) -NET_3528 = NAND ( new_n2228_, new_n2218_ ) -new_n2230_ = OR ( NET_22558, new_n1223_ ) -new_n2231_ = NOT ( NET_132 ) -new_n2232_ = OR ( new_n2024_, new_n2231_ ) -new_n2233_ = NOT ( NET_164 ) -new_n2234_ = OR ( new_n2027_, new_n2233_ ) -new_n2235_ = OR ( new_n1990_, NET_269 ) -new_n2236_ = NAND ( new_n1937_, new_n1935_, NET_100 ) -new_n2237_ = NAND ( new_n2236_, new_n2235_, new_n2234_, new_n2232_ ) -new_n2238_ = NAND ( new_n2237_, NET_22558 ) -NET_3529 = NAND ( new_n2238_, new_n2230_ ) -new_n2240_ = OR ( NET_22558, new_n1182_ ) -new_n2241_ = NOT ( NET_131 ) -new_n2242_ = OR ( new_n2024_, new_n2241_ ) -new_n2243_ = NOT ( NET_163 ) -new_n2244_ = OR ( new_n2027_, new_n2243_ ) -new_n2245_ = NOT ( NET_250 ) -new_n2246_ = OR ( new_n1990_, new_n2245_ ) -new_n2247_ = NAND ( new_n1937_, new_n1935_, NET_99 ) -new_n2248_ = NAND ( new_n2247_, new_n2246_, new_n2244_, new_n2242_ ) -new_n2249_ = NAND ( new_n2248_, NET_22558 ) -NET_3530 = NAND ( new_n2249_, new_n2240_ ) -new_n2251_ = OR ( NET_22558, new_n1137_ ) -new_n2252_ = NAND ( new_n1937_, new_n1935_, NET_98 ) -new_n2253_ = NOT ( NET_130 ) -new_n2254_ = OR ( new_n2024_, new_n2253_ ) -new_n2255_ = NOT ( NET_162 ) -new_n2256_ = OR ( new_n2027_, new_n2255_ ) -new_n2257_ = NOT ( NET_265 ) -new_n2258_ = OR ( new_n1990_, new_n2257_ ) -new_n2259_ = NAND ( new_n2258_, new_n2256_, new_n2254_, new_n2252_ ) -new_n2260_ = NAND ( new_n2259_, NET_22558 ) -NET_3531 = NAND ( new_n2260_, new_n2251_ ) -new_n2262_ = OR ( NET_22558, new_n1095_ ) -new_n2263_ = NAND ( new_n1937_, new_n1935_, NET_97 ) -new_n2264_ = NOT ( NET_129 ) -new_n2265_ = OR ( new_n2024_, new_n2264_ ) -new_n2266_ = NOT ( NET_161 ) -new_n2267_ = OR ( new_n2027_, new_n2266_ ) -new_n2268_ = NOT ( NET_255 ) -new_n2269_ = OR ( new_n1990_, new_n2268_ ) -new_n2270_ = NAND ( new_n2269_, new_n2267_, new_n2265_, new_n2263_ ) -new_n2271_ = NAND ( new_n2270_, NET_22558 ) -NET_3532 = NAND ( new_n2271_, new_n2262_ ) -new_n2273_ = NOT ( NET_66 ) -new_n2274_ = OR ( new_n1495_, new_n2273_ ) -new_n2275_ = OR ( new_n1276_, new_n1271_ ) -new_n2276_ = NAND ( new_n2275_, new_n1495_ ) -NET_3533 = NAND ( new_n2276_, new_n2274_ ) -new_n2278_ = NOT ( NET_65 ) -new_n2279_ = OR ( new_n1495_, new_n2278_ ) -new_n2280_ = OR ( new_n1283_, new_n1271_ ) -new_n2281_ = NAND ( new_n2280_, new_n1495_ ) -NET_3534 = NAND ( new_n2281_, new_n2279_ ) -new_n2283_ = OR ( new_n1904_, new_n1078_ ) -new_n2284_ = NAND ( new_n1078_, new_n2205_ ) -new_n2285_ = NAND ( new_n2284_, new_n2283_ ) -new_n2286_ = OR ( new_n2285_, NET_520 ) -new_n2287_ = NOT ( NET_283 ) -new_n2288_ = OR ( new_n1101_, new_n2287_ ) -new_n2289_ = XOR ( new_n1321_, new_n2287_ ) -new_n2290_ = OR ( new_n2289_, new_n1143_ ) -NET_3585 = NAND ( new_n2290_, new_n2288_, new_n2286_ ) -new_n2292_ = NOT ( NET_481 ) -new_n2293_ = OR ( NET_22560, new_n2292_ ) -new_n2294_ = NOR ( new_n1615_, NET_497 ) -new_n2295_ = XOR ( new_n2294_, NET_516 ) -new_n2296_ = NAND ( new_n2295_, new_n1623_ ) -new_n2297_ = NAND ( new_n1628_, new_n1626_, NET_365 ) -new_n2298_ = NAND ( new_n1634_, new_n1631_, NET_397 ) -new_n2299_ = NAND ( new_n1640_, new_n1638_, NET_429 ) -new_n2300_ = NAND ( new_n2299_, new_n2298_, new_n2297_, new_n2296_ ) -new_n2301_ = NAND ( new_n2300_, NET_22560 ) -NET_3593 = NAND ( new_n2301_, new_n2293_ ) -new_n2303_ = NOT ( NET_237 ) -new_n2304_ = OR ( NET_22558, new_n2303_ ) -new_n2305_ = NOT ( NET_258 ) -new_n2306_ = NAND ( new_n1984_, NET_271 ) -new_n2307_ = AND ( new_n2306_, new_n2305_ ) -new_n2308_ = NOR ( new_n2306_, new_n2305_ ) -new_n2309_ = NOR ( new_n2308_, new_n2307_ ) -new_n2310_ = NAND ( new_n2309_, new_n1991_ ) -new_n2311_ = NAND ( new_n1932_, new_n1928_, NET_185 ) -new_n2312_ = NAND ( new_n1937_, new_n1935_, NET_121 ) -new_n2313_ = NAND ( new_n1924_, new_n1917_, NET_153 ) -new_n2314_ = NAND ( new_n2313_, new_n2312_, new_n2311_, new_n2310_ ) -new_n2315_ = NAND ( new_n2314_, NET_22558 ) -NET_3666 = NAND ( new_n2315_, new_n2304_ ) -new_n2317_ = NOT ( NET_236 ) -new_n2318_ = OR ( NET_22558, new_n2317_ ) -new_n2319_ = OR ( new_n1984_, NET_271 ) -new_n2320_ = AND ( new_n2319_, new_n2306_ ) -new_n2321_ = NAND ( new_n2320_, new_n1991_ ) -new_n2322_ = NAND ( new_n1937_, new_n1935_, NET_120 ) -new_n2323_ = NAND ( new_n1924_, new_n1917_, NET_152 ) -new_n2324_ = NAND ( new_n1932_, new_n1928_, NET_184 ) -new_n2325_ = NAND ( new_n2324_, new_n2323_, new_n2322_, new_n2321_ ) -new_n2326_ = NAND ( new_n2325_, NET_22558 ) -NET_3667 = NAND ( new_n2326_, new_n2318_ ) -new_n2328_ = NOT ( NET_482 ) -new_n2329_ = OR ( NET_22560, new_n2328_ ) -new_n2330_ = NOT ( NET_503 ) -new_n2331_ = NOT ( NET_516 ) -new_n2332_ = NAND ( new_n2294_, new_n2331_ ) -new_n2333_ = XOR ( new_n2332_, new_n2330_ ) -new_n2334_ = NAND ( new_n2333_, new_n1623_ ) -new_n2335_ = NAND ( new_n1640_, new_n1638_, NET_430 ) -new_n2336_ = NAND ( new_n1628_, new_n1626_, NET_366 ) -new_n2337_ = NAND ( new_n1634_, new_n1631_, NET_398 ) -new_n2338_ = NAND ( new_n2337_, new_n2336_, new_n2335_, new_n2334_ ) -new_n2339_ = NAND ( new_n2338_, NET_22560 ) -NET_3687 = NAND ( new_n2339_, new_n2329_ ) -new_n2341_ = NOT ( NET_483 ) -new_n2342_ = OR ( NET_22560, new_n2341_ ) -new_n2343_ = NOT ( NET_507 ) -new_n2344_ = OR ( new_n2332_, NET_503 ) -new_n2345_ = XOR ( new_n2344_, new_n2343_ ) -new_n2346_ = NAND ( new_n2345_, new_n1623_ ) -new_n2347_ = NAND ( new_n1640_, new_n1638_, NET_431 ) -new_n2348_ = NAND ( new_n1628_, new_n1626_, NET_367 ) -new_n2349_ = NAND ( new_n1634_, new_n1631_, NET_399 ) -new_n2350_ = NAND ( new_n2349_, new_n2348_, new_n2347_, new_n2346_ ) -new_n2351_ = NAND ( new_n2350_, NET_22560 ) -NET_3951 = NAND ( new_n2351_, new_n2342_ ) -new_n2353_ = NOT ( NET_202 ) -new_n2354_ = NOT ( NET_447 ) -new_n2355_ = NOR ( new_n2354_, new_n2353_ ) -new_n2356_ = NOT ( new_n2355_ ) -new_n2357_ = OR ( NET_447, NET_202 ) -new_n2358_ = NAND ( new_n2357_, new_n2356_ ) -new_n2359_ = NAND ( new_n1892_, new_n1887_ ) -new_n2360_ = NAND ( new_n2359_, new_n2358_, new_n1888_ ) -new_n2361_ = NAND ( new_n2359_, new_n1888_ ) -new_n2362_ = NAND ( new_n2361_, new_n2357_ ) -new_n2363_ = OR ( new_n2362_, new_n2355_ ) -NET_4032 = AND ( new_n2363_, new_n2360_ ) -new_n2365_ = OR ( new_n1078_, NET_464 ) -new_n2366_ = NOT ( NET_26 ) -new_n2367_ = OR ( new_n1078_, NET_219 ) -new_n2368_ = NAND ( new_n1078_, new_n1818_ ) -new_n2369_ = NAND ( new_n2368_, new_n2367_ ) -new_n2370_ = OR ( new_n2369_, new_n2366_ ) -new_n2371_ = NAND ( new_n2369_, new_n2366_ ) -new_n2372_ = NAND ( new_n2371_, new_n2370_ ) -new_n2373_ = NAND ( new_n1903_, new_n1899_ ) -new_n2374_ = NAND ( new_n2373_, new_n1900_ ) -new_n2375_ = XNOR ( new_n2374_, new_n2372_ ) -new_n2376_ = OR ( new_n2375_, new_n1080_ ) -new_n2377_ = NAND ( new_n2376_, new_n2365_ ) -new_n2378_ = OR ( new_n2377_, NET_275 ) -new_n2379_ = NOT ( NET_39 ) -new_n2380_ = OR ( new_n1125_, new_n2379_ ) -new_n2381_ = AND ( new_n1235_, new_n1234_, new_n1177_ ) -new_n2382_ = OR ( new_n1385_, NET_38 ) -new_n2383_ = AND ( new_n2382_, NET_39 ) -new_n2384_ = OR ( new_n2383_, new_n2381_ ) -new_n2385_ = OR ( new_n2384_, new_n1129_ ) -NET_4036 = NAND ( new_n2385_, new_n2380_, new_n2378_ ) -new_n2387_ = NOT ( NET_242 ) -new_n2388_ = OR ( NET_22558, new_n2387_ ) -new_n2389_ = NOT ( NET_267 ) -new_n2390_ = NOT ( NET_273 ) -new_n2391_ = NAND ( new_n2308_, NET_262, NET_247 ) -new_n2392_ = NOR ( new_n2391_, new_n2390_, new_n2389_ ) -new_n2393_ = NAND ( new_n2392_, new_n1991_ ) -new_n2394_ = NAND ( new_n1932_, new_n1928_, NET_190 ) -new_n2395_ = NAND ( new_n1937_, new_n1935_, NET_126 ) -new_n2396_ = NAND ( new_n1924_, new_n1917_, NET_158 ) -new_n2397_ = NAND ( new_n2396_, new_n2395_, new_n2394_, new_n2393_ ) -new_n2398_ = NAND ( new_n2397_, NET_22558 ) -NET_4049 = NAND ( new_n2398_, new_n2388_ ) -new_n2400_ = NOT ( NET_238 ) -new_n2401_ = OR ( NET_22558, new_n2400_ ) -new_n2402_ = NOR ( new_n2308_, NET_262 ) -new_n2403_ = AND ( new_n2308_, NET_262 ) -new_n2404_ = NOR ( new_n2403_, new_n2402_ ) -new_n2405_ = NAND ( new_n2404_, new_n1991_ ) -new_n2406_ = NAND ( new_n1932_, new_n1928_, NET_186 ) -new_n2407_ = NAND ( new_n1937_, new_n1935_, NET_122 ) -new_n2408_ = NAND ( new_n1924_, new_n1917_, NET_154 ) -new_n2409_ = NAND ( new_n2408_, new_n2407_, new_n2406_, new_n2405_ ) -new_n2410_ = NAND ( new_n2409_, NET_22558 ) -NET_4050 = NAND ( new_n2410_, new_n2401_ ) -new_n2412_ = OR ( new_n2375_, new_n1078_ ) -new_n2413_ = NAND ( new_n1078_, new_n2192_ ) -new_n2414_ = NAND ( new_n2413_, new_n2412_ ) -new_n2415_ = OR ( new_n2414_, NET_520 ) -new_n2416_ = NOT ( NET_284 ) -new_n2417_ = OR ( new_n1101_, new_n2416_ ) -new_n2418_ = OR ( new_n1321_, NET_283 ) -new_n2419_ = AND ( new_n2418_, NET_284 ) -new_n2420_ = OR ( new_n2419_, new_n1322_ ) -new_n2421_ = OR ( new_n2420_, new_n1143_ ) -NET_4166 = NAND ( new_n2421_, new_n2417_, new_n2415_ ) -new_n2423_ = NOT ( NET_484 ) -new_n2424_ = OR ( NET_22560, new_n2423_ ) -new_n2425_ = NOR ( new_n2344_, NET_507 ) -new_n2426_ = XOR ( new_n2425_, NET_492 ) -new_n2427_ = NAND ( new_n2426_, new_n1623_ ) -new_n2428_ = NAND ( new_n1640_, new_n1638_, NET_432 ) -new_n2429_ = NAND ( new_n1628_, new_n1626_, NET_368 ) -new_n2430_ = NAND ( new_n1634_, new_n1631_, NET_400 ) -new_n2431_ = NAND ( new_n2430_, new_n2429_, new_n2428_, new_n2427_ ) -new_n2432_ = NAND ( new_n2431_, NET_22560 ) -NET_4170 = NAND ( new_n2432_, new_n2424_ ) -new_n2434_ = NOT ( NET_240 ) -new_n2435_ = OR ( NET_22558, new_n2434_ ) -new_n2436_ = NAND ( new_n2391_, new_n2390_ ) -new_n2437_ = OR ( new_n2391_, new_n2390_ ) -new_n2438_ = AND ( new_n2437_, new_n2436_ ) -new_n2439_ = NAND ( new_n2438_, new_n1991_ ) -new_n2440_ = NAND ( new_n1932_, new_n1928_, NET_188 ) -new_n2441_ = NAND ( new_n1937_, new_n1935_, NET_124 ) -new_n2442_ = NAND ( new_n1924_, new_n1917_, NET_156 ) -new_n2443_ = NAND ( new_n2442_, new_n2441_, new_n2440_, new_n2439_ ) -new_n2444_ = NAND ( new_n2443_, NET_22558 ) -NET_4391 = NAND ( new_n2444_, new_n2435_ ) -new_n2446_ = NOT ( NET_239 ) -new_n2447_ = OR ( NET_22558, new_n2446_ ) -new_n2448_ = XOR ( new_n2403_, NET_247 ) -new_n2449_ = NAND ( new_n2448_, new_n1991_ ) -new_n2450_ = NAND ( new_n1932_, new_n1928_, NET_187 ) -new_n2451_ = NAND ( new_n1937_, new_n1935_, NET_123 ) -new_n2452_ = NAND ( new_n1924_, new_n1917_, NET_155 ) -new_n2453_ = NAND ( new_n2452_, new_n2451_, new_n2450_, new_n2449_ ) -new_n2454_ = NAND ( new_n2453_, NET_22558 ) -NET_4392 = NAND ( new_n2454_, new_n2447_ ) -new_n2456_ = NOT ( NET_489 ) -new_n2457_ = OR ( NET_22560, new_n2456_ ) -new_n2458_ = NOT ( NET_22560 ) -new_n2459_ = NOT ( NET_492 ) -new_n2460_ = NAND ( new_n2425_, new_n2459_ ) -new_n2461_ = OR ( new_n2460_, NET_518 ) -new_n2462_ = NOR ( new_n2461_, NET_512 ) -new_n2463_ = NAND ( new_n2462_, new_n1623_ ) -new_n2464_ = NAND ( new_n1640_, new_n1638_, NET_437 ) -new_n2465_ = NAND ( new_n1628_, new_n1626_, NET_373 ) -new_n2466_ = NAND ( new_n1634_, new_n1631_, NET_405 ) -new_n2467_ = AND ( new_n2466_, new_n2465_, new_n2464_, new_n2463_ ) -new_n2468_ = OR ( new_n2467_, new_n2458_ ) -NET_4569 = NAND ( new_n2468_, new_n2457_ ) -new_n2470_ = NOT ( NET_488 ) -new_n2471_ = OR ( NET_22560, new_n2470_ ) -new_n2472_ = NAND ( new_n1640_, new_n1638_, NET_436 ) -new_n2473_ = NAND ( new_n1628_, new_n1626_, NET_372 ) -new_n2474_ = NAND ( new_n1634_, new_n1631_, NET_404 ) -new_n2475_ = NAND ( new_n2474_, new_n2473_, new_n2472_, new_n2463_ ) -new_n2476_ = NAND ( new_n2475_, NET_22560 ) -NET_4570 = NAND ( new_n2476_, new_n2471_ ) -new_n2478_ = NOT ( NET_487 ) -new_n2479_ = OR ( NET_22560, new_n2478_ ) -new_n2480_ = NAND ( new_n1640_, new_n1638_, NET_435 ) -new_n2481_ = NAND ( new_n1628_, new_n1626_, NET_371 ) -new_n2482_ = NAND ( new_n1634_, new_n1631_, NET_403 ) -new_n2483_ = NAND ( new_n2482_, new_n2481_, new_n2480_, new_n2463_ ) -new_n2484_ = NAND ( new_n2483_, NET_22560 ) -NET_4571 = NAND ( new_n2484_, new_n2479_ ) -new_n2486_ = NOT ( NET_485 ) -new_n2487_ = OR ( NET_22560, new_n2486_ ) -new_n2488_ = NOT ( NET_518 ) -new_n2489_ = XOR ( new_n2460_, new_n2488_ ) -new_n2490_ = NAND ( new_n2489_, new_n1623_ ) -new_n2491_ = NAND ( new_n1640_, new_n1638_, NET_433 ) -new_n2492_ = NAND ( new_n1628_, new_n1626_, NET_369 ) -new_n2493_ = NAND ( new_n1634_, new_n1631_, NET_401 ) -new_n2494_ = NAND ( new_n2493_, new_n2492_, new_n2491_, new_n2490_ ) -new_n2495_ = NAND ( new_n2494_, NET_22560 ) -NET_4572 = NAND ( new_n2495_, new_n2487_ ) -new_n2497_ = NOT ( NET_446 ) -new_n2498_ = OR ( new_n2497_, NET_201 ) -new_n2499_ = NOT ( NET_201 ) -new_n2500_ = OR ( NET_446, new_n2499_ ) -new_n2501_ = NAND ( new_n2500_, new_n2498_, new_n2362_, new_n2356_ ) -new_n2502_ = NAND ( new_n2362_, new_n2356_ ) -new_n2503_ = NAND ( NET_446, NET_201 ) -new_n2504_ = OR ( NET_446, NET_201 ) -new_n2505_ = NAND ( new_n2504_, new_n2503_, new_n2502_ ) -NET_4635 = AND ( new_n2505_, new_n2501_ ) -new_n2507_ = OR ( new_n1078_, NET_465 ) -new_n2508_ = NOT ( NET_25 ) -new_n2509_ = OR ( new_n1078_, NET_220 ) -new_n2510_ = NAND ( new_n1078_, new_n1807_ ) -new_n2511_ = NAND ( new_n2510_, new_n2509_ ) -new_n2512_ = OR ( new_n2511_, new_n2508_ ) -new_n2513_ = NAND ( new_n2511_, new_n2508_ ) -new_n2514_ = NAND ( new_n2513_, new_n2512_ ) -new_n2515_ = NAND ( new_n2374_, new_n2371_ ) -new_n2516_ = NAND ( new_n2515_, new_n2370_ ) -new_n2517_ = XNOR ( new_n2516_, new_n2514_ ) -new_n2518_ = OR ( new_n2517_, new_n1080_ ) -new_n2519_ = NAND ( new_n2518_, new_n2507_ ) -new_n2520_ = OR ( new_n2519_, NET_275 ) -new_n2521_ = NOT ( NET_40 ) -new_n2522_ = OR ( new_n1125_, new_n2521_ ) -new_n2523_ = XOR ( new_n2381_, NET_40 ) -new_n2524_ = OR ( new_n2523_, new_n1129_ ) -NET_4638 = NAND ( new_n2524_, new_n2522_, new_n2520_ ) -new_n2526_ = NOT ( NET_241 ) -new_n2527_ = OR ( NET_22558, new_n2526_ ) -new_n2528_ = XOR ( new_n2437_, new_n2389_ ) -new_n2529_ = NAND ( new_n2528_, new_n1991_ ) -new_n2530_ = NAND ( new_n1932_, new_n1928_, NET_189 ) -new_n2531_ = NAND ( new_n1937_, new_n1935_, NET_125 ) -new_n2532_ = NAND ( new_n1924_, new_n1917_, NET_157 ) -new_n2533_ = NAND ( new_n2532_, new_n2531_, new_n2530_, new_n2529_ ) -new_n2534_ = NAND ( new_n2533_, NET_22558 ) -NET_4642 = NAND ( new_n2534_, new_n2527_ ) -new_n2536_ = OR ( new_n2517_, new_n1078_ ) -new_n2537_ = NAND ( new_n1078_, new_n2179_ ) -new_n2538_ = NAND ( new_n2537_, new_n2536_ ) -new_n2539_ = OR ( new_n2538_, NET_520 ) -new_n2540_ = OR ( new_n1101_, new_n1318_ ) -new_n2541_ = XOR ( new_n1322_, NET_285 ) -new_n2542_ = OR ( new_n2541_, new_n1143_ ) -NET_4666 = NAND ( new_n2542_, new_n2540_, new_n2539_ ) -new_n2544_ = NOT ( NET_486 ) -new_n2545_ = OR ( NET_22560, new_n2544_ ) -new_n2546_ = NOT ( NET_512 ) -new_n2547_ = XOR ( new_n2461_, new_n2546_ ) -new_n2548_ = NAND ( new_n2547_, new_n1623_ ) -new_n2549_ = NAND ( new_n1640_, new_n1638_, NET_434 ) -new_n2550_ = NAND ( new_n1628_, new_n1626_, NET_370 ) -new_n2551_ = NAND ( new_n1634_, new_n1631_, NET_402 ) -new_n2552_ = NAND ( new_n2551_, new_n2550_, new_n2549_, new_n2548_ ) -new_n2553_ = NAND ( new_n2552_, NET_22560 ) -NET_4669 = NAND ( new_n2553_, new_n2545_ ) -new_n2555_ = NOR ( NET_445, NET_200 ) -new_n2556_ = NOT ( NET_200 ) -new_n2557_ = NOT ( NET_445 ) -new_n2558_ = NOR ( new_n2557_, new_n2556_ ) -new_n2559_ = NOR ( new_n2558_, new_n2555_ ) -new_n2560_ = NAND ( new_n2504_, new_n2502_ ) -new_n2561_ = NAND ( new_n2560_, new_n2503_ ) -NET_4850 = XOR ( new_n2561_, new_n2559_ ) -new_n2563_ = OR ( new_n1078_, NET_466 ) -new_n2564_ = NOT ( NET_24 ) -new_n2565_ = OR ( new_n1078_, NET_221 ) -new_n2566_ = NAND ( new_n1078_, new_n1796_ ) -new_n2567_ = NAND ( new_n2566_, new_n2565_ ) -new_n2568_ = OR ( new_n2567_, new_n2564_ ) -new_n2569_ = NAND ( new_n2567_, new_n2564_ ) -new_n2570_ = NAND ( new_n2569_, new_n2568_ ) -new_n2571_ = NAND ( new_n2516_, new_n2513_ ) -new_n2572_ = NAND ( new_n2571_, new_n2512_ ) -new_n2573_ = XNOR ( new_n2572_, new_n2570_ ) -new_n2574_ = OR ( new_n2573_, new_n1080_ ) -new_n2575_ = NAND ( new_n2574_, new_n2563_ ) -new_n2576_ = OR ( new_n2575_, NET_275 ) -new_n2577_ = NOT ( NET_41 ) -new_n2578_ = OR ( new_n1125_, new_n2577_ ) -new_n2579_ = NAND ( new_n2381_, new_n2521_ ) -new_n2580_ = AND ( new_n2579_, NET_41 ) -new_n2581_ = OR ( new_n2580_, new_n1237_ ) -new_n2582_ = OR ( new_n2581_, new_n1129_ ) -NET_5034 = NAND ( new_n2582_, new_n2578_, new_n2576_ ) -new_n2584_ = OR ( new_n2573_, new_n1078_ ) -new_n2585_ = NAND ( new_n1078_, new_n2166_ ) -new_n2586_ = NAND ( new_n2585_, new_n2584_ ) -new_n2587_ = OR ( new_n2586_, NET_520 ) -new_n2588_ = OR ( new_n1101_, new_n1319_ ) -new_n2589_ = NAND ( new_n1322_, new_n1318_ ) -new_n2590_ = NAND ( new_n2589_, NET_286 ) -new_n2591_ = NAND ( new_n2590_, new_n1323_ ) -new_n2592_ = OR ( new_n2591_, new_n1143_ ) -NET_5100 = NAND ( new_n2592_, new_n2588_, new_n2587_ ) -new_n2594_ = OR ( NET_444, NET_199 ) -new_n2595_ = NAND ( NET_444, NET_199 ) -new_n2596_ = NAND ( new_n2595_, new_n2594_ ) -new_n2597_ = NOT ( new_n2555_ ) -new_n2598_ = AND ( new_n2561_, new_n2597_ ) -new_n2599_ = OR ( new_n2598_, new_n2558_ ) -NET_5195 = XNOR ( new_n2599_, new_n2596_ ) -new_n2601_ = OR ( new_n1078_, NET_467 ) -new_n2602_ = NOT ( NET_23 ) -new_n2603_ = OR ( new_n1078_, NET_222 ) -new_n2604_ = NAND ( new_n1078_, new_n1784_ ) -new_n2605_ = NAND ( new_n2604_, new_n2603_ ) -new_n2606_ = OR ( new_n2605_, new_n2602_ ) -new_n2607_ = NAND ( new_n2605_, new_n2602_ ) -new_n2608_ = NAND ( new_n2607_, new_n2606_ ) -new_n2609_ = NAND ( new_n2572_, new_n2569_ ) -new_n2610_ = NAND ( new_n2609_, new_n2568_ ) -new_n2611_ = XNOR ( new_n2610_, new_n2608_ ) -new_n2612_ = OR ( new_n2611_, new_n1080_ ) -new_n2613_ = NAND ( new_n2612_, new_n2601_ ) -new_n2614_ = OR ( new_n2613_, NET_275 ) -new_n2615_ = NOT ( NET_42 ) -new_n2616_ = OR ( new_n1125_, new_n2615_ ) -new_n2617_ = XOR ( new_n1237_, NET_42 ) -new_n2618_ = OR ( new_n2617_, new_n1129_ ) -NET_5295 = NAND ( new_n2618_, new_n2616_, new_n2614_ ) -new_n2620_ = OR ( new_n2611_, new_n1078_ ) -new_n2621_ = NAND ( new_n1078_, new_n2153_ ) -new_n2622_ = NAND ( new_n2621_, new_n2620_ ) -new_n2623_ = OR ( new_n2622_, NET_520 ) -new_n2624_ = NOT ( NET_287 ) -new_n2625_ = OR ( new_n1101_, new_n2624_ ) -new_n2626_ = XOR ( new_n1323_, new_n2624_ ) -new_n2627_ = OR ( new_n2626_, new_n1143_ ) -NET_5302 = NAND ( new_n2627_, new_n2625_, new_n2623_ ) -new_n2629_ = NOT ( NET_198 ) -new_n2630_ = NOT ( NET_443 ) -new_n2631_ = NOR ( new_n2630_, new_n2629_ ) -new_n2632_ = OR ( NET_443, NET_198 ) -new_n2633_ = NAND ( new_n2599_, new_n2594_ ) -new_n2634_ = NAND ( new_n2633_, new_n2595_ ) -new_n2635_ = NAND ( new_n2634_, new_n2632_ ) -new_n2636_ = OR ( new_n2635_, new_n2631_ ) -new_n2637_ = NOT ( new_n2631_ ) -new_n2638_ = NAND ( new_n2632_, new_n2637_ ) -new_n2639_ = NAND ( new_n2638_, new_n2633_, new_n2595_ ) -NET_5445 = AND ( new_n2639_, new_n2636_ ) -new_n2641_ = OR ( new_n1078_, NET_468 ) -new_n2642_ = NOT ( NET_22 ) -new_n2643_ = OR ( new_n1078_, NET_223 ) -new_n2644_ = NAND ( new_n1078_, new_n1772_ ) -new_n2645_ = NAND ( new_n2644_, new_n2643_ ) -new_n2646_ = NOR ( new_n2645_, new_n2642_ ) -new_n2647_ = NOT ( new_n2646_ ) -new_n2648_ = NAND ( new_n2645_, new_n2642_ ) -new_n2649_ = NAND ( new_n2648_, new_n2647_ ) -new_n2650_ = NAND ( new_n2610_, new_n2607_ ) -new_n2651_ = NAND ( new_n2650_, new_n2649_, new_n2606_ ) -new_n2652_ = NAND ( new_n2650_, new_n2606_ ) -new_n2653_ = NAND ( new_n2652_, new_n2648_ ) -new_n2654_ = OR ( new_n2653_, new_n2646_ ) -new_n2655_ = NAND ( new_n2654_, new_n2651_ ) -new_n2656_ = NAND ( new_n2655_, new_n1078_ ) -new_n2657_ = NAND ( new_n2656_, new_n2641_ ) -new_n2658_ = OR ( new_n2657_, NET_275 ) -new_n2659_ = NOT ( NET_43 ) -new_n2660_ = OR ( new_n1125_, new_n2659_ ) -new_n2661_ = AND ( new_n1238_, new_n1237_ ) -new_n2662_ = NAND ( new_n1237_, new_n2615_ ) -new_n2663_ = AND ( new_n2662_, NET_43 ) -new_n2664_ = OR ( new_n2663_, new_n2661_ ) -new_n2665_ = OR ( new_n2664_, new_n1129_ ) -NET_5510 = NAND ( new_n2665_, new_n2660_, new_n2658_ ) -new_n2667_ = NAND ( new_n2655_, new_n1080_ ) -new_n2668_ = NAND ( new_n1078_, new_n2140_ ) -new_n2669_ = NAND ( new_n2668_, new_n2667_ ) -new_n2670_ = OR ( new_n2669_, NET_520 ) -new_n2671_ = NOT ( NET_288 ) -new_n2672_ = OR ( new_n1101_, new_n2671_ ) -new_n2673_ = NOR ( new_n1323_, NET_287 ) -new_n2674_ = NOR ( new_n2673_, new_n2671_ ) -new_n2675_ = OR ( new_n2674_, new_n1324_ ) -new_n2676_ = OR ( new_n2675_, new_n1143_ ) -NET_5512 = NAND ( new_n2676_, new_n2672_, new_n2670_ ) -new_n2678_ = NOT ( new_n1569_ ) -new_n2679_ = NAND ( new_n2678_, new_n1139_ ) -new_n2680_ = NOR ( NET_309, new_n1141_ ) -new_n2681_ = NOR ( new_n1146_, new_n1103_ ) -new_n2682_ = NOR ( new_n2681_, new_n2680_ ) -new_n2683_ = NAND ( new_n2682_, new_n1569_ ) -new_n2684_ = NAND ( new_n2683_, new_n2679_ ) -new_n2685_ = NAND ( new_n1485_, new_n1406_ ) -new_n2686_ = OR ( new_n1406_, new_n1483_ ) -new_n2687_ = NAND ( new_n2686_, new_n2685_ ) -new_n2688_ = NAND ( new_n1480_, new_n1406_ ) -new_n2689_ = OR ( new_n1406_, new_n1478_ ) -new_n2690_ = NAND ( new_n2689_, new_n2688_ ) -new_n2691_ = NOR ( NET_309, new_n1312_ ) -new_n2692_ = XOR ( new_n1328_, NET_297 ) -new_n2693_ = NOR ( new_n2692_, new_n1103_ ) -new_n2694_ = NOR ( new_n2693_, new_n2691_ ) -new_n2695_ = OR ( NET_309, new_n1313_ ) -new_n2696_ = NAND ( new_n1328_, new_n1312_ ) -new_n2697_ = NAND ( new_n2696_, NET_298 ) -new_n2698_ = NAND ( new_n2697_, new_n1329_ ) -new_n2699_ = OR ( new_n2698_, new_n1103_ ) -new_n2700_ = NAND ( new_n2699_, new_n2695_ ) -new_n2701_ = NOT ( new_n2700_ ) -new_n2702_ = NOR ( new_n2701_, new_n2694_ ) -new_n2703_ = NAND ( new_n2702_, new_n1574_ ) -new_n2704_ = OR ( new_n2703_, new_n2690_, new_n2687_ ) -new_n2705_ = NOT ( new_n2687_ ) -new_n2706_ = NOT ( new_n2690_ ) -new_n2707_ = NOR ( new_n2706_, new_n2705_ ) -new_n2708_ = NOR ( new_n2701_, new_n1574_ ) -new_n2709_ = NAND ( new_n2708_, new_n1333_ ) -new_n2710_ = NOR ( new_n2700_, new_n2694_ ) -new_n2711_ = NAND ( new_n2710_, new_n1574_ ) -new_n2712_ = NAND ( new_n2711_, new_n2709_ ) -new_n2713_ = NAND ( new_n2712_, new_n2707_ ) -new_n2714_ = NAND ( new_n2713_, new_n2704_ ) -new_n2715_ = AND ( new_n2714_, new_n1356_ ) -new_n2716_ = NOT ( new_n2707_ ) -new_n2717_ = NAND ( new_n2712_, new_n2716_, new_n1356_ ) -new_n2718_ = NOR ( new_n2690_, new_n2687_ ) -new_n2719_ = OR ( new_n2718_, new_n2703_, new_n1555_ ) -new_n2720_ = NAND ( new_n2719_, new_n2717_ ) -new_n2721_ = NOR ( new_n2720_, new_n2715_ ) -new_n2722_ = OR ( new_n2721_, new_n2684_ ) -new_n2723_ = NOR ( new_n2694_, new_n1573_ ) -new_n2724_ = NOR ( new_n2723_, new_n2708_ ) -new_n2725_ = NAND ( new_n2724_, new_n1356_ ) -new_n2726_ = NAND ( new_n2725_, new_n1333_ ) -new_n2727_ = NAND ( new_n2726_, new_n1876_ ) -new_n2728_ = NOR ( new_n1560_, new_n1357_ ) -new_n2729_ = NAND ( new_n2728_, NET_375 ) -new_n2730_ = NOT ( new_n1560_ ) -new_n2731_ = NOR ( new_n2730_, new_n1357_ ) -new_n2732_ = NAND ( new_n2731_, NET_407 ) -new_n2733_ = NAND ( new_n2732_, new_n2729_, new_n2727_, new_n2722_ ) -new_n2734_ = NOT ( new_n1876_ ) -new_n2735_ = OR ( new_n2721_, new_n2734_ ) -new_n2736_ = OR ( new_n1356_, new_n1334_ ) -new_n2737_ = OR ( new_n2736_, new_n2682_ ) -new_n2738_ = OR ( new_n2725_, new_n2684_ ) -new_n2739_ = NAND ( new_n2738_, new_n2737_, new_n2735_ ) -new_n2740_ = OR ( new_n2700_, new_n1574_ ) -new_n2741_ = NOT ( new_n2694_ ) -new_n2742_ = OR ( new_n2741_, new_n1573_ ) -new_n2743_ = NAND ( new_n2742_, new_n2740_, new_n1356_, new_n1333_ ) -new_n2744_ = XOR ( new_n2743_, new_n2739_ ) -new_n2745_ = NAND ( new_n2744_, new_n2733_ ) -new_n2746_ = OR ( new_n2744_, new_n2733_ ) -new_n2747_ = AND ( new_n2746_, new_n2745_ ) -new_n2748_ = NAND ( new_n2678_, new_n1097_ ) -new_n2749_ = OR ( NET_309, new_n1099_ ) -new_n2750_ = NAND ( NET_309, NET_278 ) -new_n2751_ = NAND ( new_n2750_, new_n2749_ ) -new_n2752_ = OR ( new_n2751_, new_n2678_ ) -new_n2753_ = NAND ( new_n2752_, new_n2748_ ) -new_n2754_ = OR ( new_n2753_, new_n2721_ ) -new_n2755_ = NAND ( new_n2726_, new_n1884_ ) -new_n2756_ = NAND ( new_n2728_, NET_374 ) -new_n2757_ = NAND ( new_n2731_, NET_406 ) -new_n2758_ = NAND ( new_n2757_, new_n2756_, new_n2755_, new_n2754_ ) -new_n2759_ = NOT ( new_n2721_ ) -new_n2760_ = NAND ( new_n2759_, new_n1884_ ) -new_n2761_ = NOT ( new_n2736_ ) -new_n2762_ = NAND ( new_n2751_, new_n2761_ ) -new_n2763_ = OR ( new_n2753_, new_n2725_ ) -new_n2764_ = NAND ( new_n2763_, new_n2762_, new_n2760_ ) -new_n2765_ = NOT ( new_n2764_ ) -new_n2766_ = OR ( new_n2765_, new_n2758_ ) -new_n2767_ = OR ( new_n2764_, new_n2743_ ) -new_n2768_ = NAND ( new_n2767_, new_n2766_ ) -new_n2769_ = XNOR ( new_n2768_, new_n2747_ ) -new_n2770_ = NOT ( new_n2769_ ) -new_n2771_ = NAND ( new_n2723_, new_n1581_ ) -new_n2772_ = NOR ( new_n2771_, new_n2701_ ) -new_n2773_ = NOT ( new_n1583_ ) -new_n2774_ = NOR ( new_n2700_, new_n2741_ ) -new_n2775_ = NOT ( new_n2774_ ) -new_n2776_ = NOR ( new_n2775_, new_n2773_ ) -new_n2777_ = NOR ( new_n2776_, new_n2772_ ) -new_n2778_ = NOR ( NET_334, NET_333, NET_332, NET_331 ) -new_n2779_ = NOR ( NET_330, NET_329 ) -new_n2780_ = NAND ( new_n2779_, new_n2778_, new_n1441_, new_n1439_ ) -new_n2781_ = NOR ( NET_338, NET_337, NET_336, NET_335 ) -new_n2782_ = NAND ( new_n2781_, new_n1467_, new_n1465_, new_n1463_ ) -new_n2783_ = NAND ( new_n1421_, new_n1419_, new_n1417_, new_n1415_ ) -new_n2784_ = OR ( new_n2783_, NET_314, NET_313 ) -new_n2785_ = NOR ( NET_326, NET_325, NET_324, NET_323 ) -new_n2786_ = NOR ( NET_322, NET_321 ) -new_n2787_ = NAND ( new_n2786_, new_n2785_, new_n1425_, new_n1423_ ) -new_n2788_ = NOR ( new_n2787_, new_n2784_, new_n2782_, new_n2780_ ) -new_n2789_ = NOR ( new_n2788_, new_n1406_ ) -new_n2790_ = NOR ( new_n1406_, new_n1402_ ) -new_n2791_ = NOR ( new_n2790_, new_n2789_ ) -new_n2792_ = NAND ( new_n2791_, new_n2707_ ) -new_n2793_ = OR ( new_n2792_, new_n2777_ ) -new_n2794_ = NOR ( new_n2700_, new_n1573_ ) -new_n2795_ = OR ( new_n2794_, new_n1581_ ) -new_n2796_ = NAND ( new_n2794_, new_n1581_ ) -new_n2797_ = NAND ( new_n2796_, new_n2795_, new_n2742_ ) -new_n2798_ = NAND ( new_n2797_, new_n2791_, new_n2718_ ) -new_n2799_ = NAND ( new_n2798_, new_n2793_ ) -new_n2800_ = NAND ( new_n2799_, new_n1408_ ) -new_n2801_ = NOT ( new_n2800_ ) -new_n2802_ = NOT ( new_n2710_ ) -new_n2803_ = NAND ( new_n2774_, new_n1573_ ) -new_n2804_ = NAND ( new_n2803_, new_n1582_ ) -new_n2805_ = NAND ( new_n2742_, new_n1581_ ) -new_n2806_ = NAND ( new_n2805_, new_n2804_ ) -new_n2807_ = NOR ( new_n1581_, new_n1573_ ) -new_n2808_ = OR ( new_n2807_, new_n2701_ ) -new_n2809_ = NAND ( new_n2808_, new_n2806_, new_n2802_ ) -new_n2810_ = NAND ( new_n2809_, new_n2801_ ) -new_n2811_ = NOR ( new_n2810_, new_n2770_ ) -new_n2812_ = NAND ( new_n1567_, new_n1558_ ) -new_n2813_ = AND ( new_n1566_, NET_309 ) -new_n2814_ = OR ( new_n2813_, new_n1558_ ) -new_n2815_ = NAND ( new_n2814_, new_n2812_ ) -new_n2816_ = OR ( new_n1562_, NET_305 ) -new_n2817_ = OR ( new_n1557_, NET_306 ) -new_n2818_ = AND ( new_n2817_, new_n2816_, new_n2815_ ) -new_n2819_ = NOR ( new_n2818_, new_n2773_ ) -new_n2820_ = AND ( new_n2819_, new_n2801_ ) -new_n2821_ = NAND ( new_n2820_, new_n1884_ ) -new_n2822_ = NAND ( new_n2800_, NET_343 ) -new_n2823_ = NAND ( new_n1103_, new_n1561_, new_n1556_ ) -new_n2824_ = NAND ( new_n1566_, new_n1558_, NET_309 ) -new_n2825_ = NAND ( new_n2824_, new_n2823_ ) -new_n2826_ = OR ( new_n1562_, new_n1556_ ) -new_n2827_ = OR ( new_n1567_, new_n1558_ ) -new_n2828_ = NAND ( new_n2827_, new_n2826_ ) -new_n2829_ = NOR ( new_n2828_, new_n2825_ ) -new_n2830_ = NOR ( new_n2829_, new_n2773_ ) -new_n2831_ = AND ( new_n2830_, new_n2801_ ) -new_n2832_ = NAND ( new_n2831_, new_n1867_ ) -new_n2833_ = NOT ( new_n2682_ ) -new_n2834_ = NAND ( new_n2825_, new_n2833_ ) -new_n2835_ = OR ( new_n1569_, new_n1139_ ) -new_n2836_ = NAND ( new_n2835_, new_n2834_ ) -new_n2837_ = NOT ( new_n2807_ ) -new_n2838_ = NOR ( new_n2837_, new_n2800_ ) -new_n2839_ = NAND ( new_n2838_, new_n2836_ ) -new_n2840_ = NAND ( new_n2839_, new_n2832_, new_n2822_, new_n2821_ ) -NET_5513 = OR ( new_n2840_, new_n2811_ ) -new_n2842_ = NAND ( new_n2700_, new_n2694_ ) -new_n2843_ = NOR ( new_n2842_, new_n1582_ ) -new_n2844_ = NOT ( new_n2843_ ) -new_n2845_ = NOR ( new_n2844_, new_n1573_ ) -new_n2846_ = OR ( new_n2845_, new_n2776_ ) -new_n2847_ = NAND ( new_n2846_, new_n2791_, new_n2705_ ) -new_n2848_ = NAND ( new_n2847_, new_n2690_ ) -new_n2849_ = NAND ( new_n2700_, new_n1581_ ) -new_n2850_ = NAND ( new_n2849_, new_n2711_, new_n2773_ ) -new_n2851_ = NAND ( new_n2850_, new_n2771_ ) -new_n2852_ = NAND ( new_n2851_, new_n2791_, new_n2687_ ) -new_n2853_ = NAND ( new_n2852_, new_n2706_ ) -new_n2854_ = NAND ( new_n2853_, new_n2848_, new_n1408_ ) -new_n2855_ = NOT ( new_n2854_ ) -new_n2856_ = NAND ( new_n2855_, new_n2809_ ) -new_n2857_ = NOR ( new_n2856_, new_n2770_ ) -new_n2858_ = NAND ( new_n2855_, new_n2819_ ) -new_n2859_ = NOT ( new_n2858_ ) -new_n2860_ = NAND ( new_n2859_, new_n1884_ ) -new_n2861_ = NAND ( new_n2854_, NET_375 ) -new_n2862_ = AND ( new_n2855_, new_n2830_ ) -new_n2863_ = NAND ( new_n2862_, new_n1867_ ) -new_n2864_ = NOR ( new_n2854_, new_n2837_ ) -new_n2865_ = NAND ( new_n2864_, new_n2836_ ) -new_n2866_ = NAND ( new_n2865_, new_n2863_, new_n2861_, new_n2860_ ) -NET_5514 = OR ( new_n2866_, new_n2857_ ) -new_n2868_ = NOT ( new_n1568_ ) -new_n2869_ = NAND ( new_n2868_, NET_22560 ) -new_n2870_ = NOR ( new_n2869_, new_n2770_ ) -new_n2871_ = NAND ( new_n1586_, new_n1584_, new_n1357_, NET_520 ) -new_n2872_ = NAND ( new_n2871_, new_n1408_ ) -new_n2873_ = NOR ( new_n1333_, NET_22559 ) -new_n2874_ = NOT ( new_n2873_ ) -new_n2875_ = NAND ( new_n2874_, new_n2872_ ) -new_n2876_ = NAND ( new_n2875_, new_n1568_ ) -new_n2877_ = NOT ( new_n2876_ ) -new_n2878_ = OR ( new_n1560_, NET_374 ) -new_n2879_ = OR ( new_n2730_, NET_406 ) -new_n2880_ = NAND ( new_n2879_, new_n2878_ ) -new_n2881_ = OR ( new_n2880_, new_n2751_ ) -new_n2882_ = OR ( new_n1560_, new_n1873_ ) -new_n2883_ = NAND ( new_n1560_, NET_407 ) -new_n2884_ = NAND ( new_n2883_, new_n2882_ ) -new_n2885_ = XNOR ( new_n2884_, new_n2881_ ) -new_n2886_ = NAND ( new_n2885_, new_n2833_ ) -new_n2887_ = OR ( new_n2885_, new_n2833_ ) -new_n2888_ = NAND ( new_n2887_, new_n2886_, new_n2877_ ) -new_n2889_ = NAND ( new_n1568_, NET_22560 ) -new_n2890_ = NAND ( new_n1407_, new_n1333_ ) -new_n2891_ = OR ( new_n1333_, NET_520 ) -new_n2892_ = NAND ( new_n2891_, new_n2890_, new_n2871_, new_n2868_ ) -new_n2893_ = NAND ( new_n2892_, new_n2889_ ) -new_n2894_ = NAND ( new_n2893_, new_n2833_ ) -new_n2895_ = OR ( new_n2871_, new_n1035_ ) -new_n2896_ = NAND ( NET_22559, NET_510 ) -new_n2897_ = NAND ( new_n2896_, new_n2895_, new_n2894_, new_n2888_ ) -NET_5515 = OR ( new_n2897_, new_n2870_ ) -new_n2899_ = NAND ( new_n2791_, new_n2772_, new_n2718_ ) -new_n2900_ = NOT ( new_n2792_ ) -new_n2901_ = NAND ( new_n2710_, new_n1573_ ) -new_n2902_ = OR ( new_n2901_, new_n1581_ ) -new_n2903_ = OR ( new_n2701_, new_n1581_ ) -new_n2904_ = OR ( new_n2903_, new_n1574_ ) -new_n2905_ = OR ( new_n2771_, new_n2700_ ) -new_n2906_ = NAND ( new_n2905_, new_n2904_, new_n2902_, new_n2806_ ) -new_n2907_ = NAND ( new_n2906_, new_n2900_ ) -new_n2908_ = NAND ( new_n2907_, new_n2899_ ) -new_n2909_ = NAND ( new_n2908_, new_n1408_ ) -new_n2910_ = NOR ( new_n2909_, new_n2770_ ) -new_n2911_ = NAND ( new_n2791_, new_n2718_ ) -new_n2912_ = NAND ( new_n2911_, new_n2772_ ) -new_n2913_ = NAND ( new_n2775_, new_n1583_ ) -new_n2914_ = NAND ( new_n2807_, new_n2694_ ) -new_n2915_ = NAND ( new_n2702_, new_n1582_, new_n1574_ ) -new_n2916_ = NAND ( new_n2915_, new_n2914_ ) -new_n2917_ = OR ( new_n2916_, new_n2906_ ) -new_n2918_ = NAND ( new_n2917_, new_n2792_ ) -new_n2919_ = NAND ( new_n2918_, new_n2913_, new_n2912_ ) -new_n2920_ = NAND ( new_n2919_, new_n1408_ ) -new_n2921_ = NOT ( new_n1408_ ) -new_n2922_ = NOT ( new_n2776_ ) -new_n2923_ = NOR ( new_n2922_, new_n2921_ ) -new_n2924_ = NAND ( new_n2923_, new_n2911_ ) -new_n2925_ = NAND ( new_n2924_, new_n2920_, new_n2874_, new_n2458_ ) -new_n2926_ = NAND ( new_n2925_, NET_510 ) -new_n2927_ = AND ( new_n2916_, new_n2900_, new_n1408_ ) -new_n2928_ = NAND ( new_n2927_, new_n2836_ ) -new_n2929_ = NAND ( new_n2807_, new_n2710_ ) -new_n2930_ = NOR ( new_n2929_, new_n2921_ ) -new_n2931_ = NOT ( new_n2930_ ) -new_n2932_ = OR ( new_n2931_, new_n2684_ ) -new_n2933_ = AND ( new_n2932_, new_n2928_, new_n2896_ ) -new_n2934_ = NOT ( new_n2923_ ) -new_n2935_ = NOR ( new_n2934_, new_n2818_, new_n2911_ ) -new_n2936_ = NAND ( new_n2935_, new_n1884_ ) -new_n2937_ = NOR ( new_n2934_, new_n2829_, new_n2911_ ) -new_n2938_ = NAND ( new_n2937_, new_n1867_ ) -new_n2939_ = NAND ( new_n2938_, new_n2936_, new_n2933_, new_n2926_ ) -NET_5516 = OR ( new_n2939_, new_n2910_ ) -new_n2941_ = NOT ( NET_197 ) -new_n2942_ = NOT ( NET_442 ) -new_n2943_ = NOR ( new_n2942_, new_n2941_ ) -new_n2944_ = NOR ( NET_442, NET_197 ) -new_n2945_ = NOR ( new_n2944_, new_n2943_ ) -new_n2946_ = NAND ( new_n2635_, new_n2637_ ) -new_n2947_ = NOR ( new_n2946_, new_n2945_ ) -new_n2948_ = NOT ( new_n2946_ ) -new_n2949_ = NOR ( new_n2948_, new_n2944_, new_n2943_ ) -NET_5564 = NOR ( new_n2949_, new_n2947_ ) -new_n2951_ = NAND ( new_n2764_, new_n2743_ ) -new_n2952_ = NAND ( new_n2951_, new_n2767_ ) -new_n2953_ = XOR ( new_n2952_, new_n2758_ ) -new_n2954_ = XOR ( new_n2953_, new_n2743_ ) -new_n2955_ = OR ( new_n2954_, new_n2810_ ) -new_n2956_ = NAND ( new_n2831_, new_n1876_ ) -new_n2957_ = NAND ( new_n2825_, new_n2751_ ) -new_n2958_ = OR ( new_n1569_, new_n1097_ ) -new_n2959_ = NAND ( new_n2958_, new_n2957_ ) -new_n2960_ = NAND ( new_n2959_, new_n2838_ ) -new_n2961_ = NAND ( new_n2800_, NET_342 ) -NET_5583 = NAND ( new_n2961_, new_n2960_, new_n2956_, new_n2955_ ) -new_n2963_ = OR ( new_n2954_, new_n2856_ ) -new_n2964_ = NAND ( new_n2862_, new_n1876_ ) -new_n2965_ = NAND ( new_n2959_, new_n2864_ ) -new_n2966_ = NAND ( new_n2854_, NET_374 ) -NET_5584 = NAND ( new_n2966_, new_n2965_, new_n2964_, new_n2963_ ) -new_n2968_ = NAND ( new_n2842_, new_n1574_ ) -new_n2969_ = NAND ( new_n2968_, new_n1581_ ) -new_n2970_ = NAND ( new_n2969_, new_n2690_, new_n2705_ ) -new_n2971_ = NAND ( new_n2846_, new_n2706_, new_n2687_ ) -new_n2972_ = NAND ( new_n2971_, new_n2970_ ) -new_n2973_ = NAND ( new_n2972_, new_n2791_ ) -new_n2974_ = NAND ( new_n2973_, new_n2929_ ) -new_n2975_ = NAND ( new_n2974_, new_n1408_ ) -new_n2976_ = NOT ( new_n2975_ ) -new_n2977_ = OR ( new_n2807_, new_n2774_ ) -new_n2978_ = NAND ( new_n2977_, new_n2806_ ) -new_n2979_ = NAND ( new_n2978_, new_n2976_ ) -new_n2980_ = NOR ( new_n2979_, new_n2954_ ) -new_n2981_ = NAND ( new_n2976_, new_n2916_ ) -new_n2982_ = NOT ( new_n2981_ ) -new_n2983_ = NAND ( new_n2982_, new_n2959_ ) -new_n2984_ = AND ( new_n2976_, new_n2830_ ) -new_n2985_ = NAND ( new_n2984_, new_n1876_ ) -new_n2986_ = NAND ( new_n2930_, NET_500 ) -new_n2987_ = NAND ( new_n2975_, NET_406 ) -new_n2988_ = NAND ( new_n2987_, new_n2986_, new_n2985_, new_n2983_ ) -NET_5585 = OR ( new_n2988_, new_n2980_ ) -new_n2990_ = NOT ( new_n2708_ ) -new_n2991_ = NAND ( new_n2741_, new_n1581_ ) -new_n2992_ = NAND ( new_n2991_, new_n2901_, new_n2806_, new_n2990_ ) -new_n2993_ = NAND ( new_n2992_, new_n2976_, new_n2769_ ) -new_n2994_ = NAND ( new_n2984_, new_n1867_ ) -new_n2995_ = NAND ( new_n2975_, NET_407 ) -new_n2996_ = NAND ( new_n2930_, NET_510 ) -new_n2997_ = AND ( new_n2996_, new_n2995_, new_n2994_ ) -new_n2998_ = AND ( new_n2976_, new_n2819_ ) -new_n2999_ = NAND ( new_n2998_, new_n1884_ ) -new_n3000_ = NAND ( new_n2982_, new_n2836_ ) -NET_5586 = NAND ( new_n3000_, new_n2999_, new_n2997_, new_n2993_ ) -new_n3002_ = NOR ( new_n2954_, new_n2869_ ) -new_n3003_ = XOR ( new_n2880_, new_n2751_ ) -new_n3004_ = OR ( new_n3003_, new_n2876_ ) -new_n3005_ = NAND ( new_n2893_, new_n2751_ ) -new_n3006_ = OR ( new_n2871_, new_n1037_ ) -new_n3007_ = NAND ( NET_22559, NET_500 ) -new_n3008_ = NAND ( new_n3007_, new_n3006_, new_n3005_, new_n3004_ ) -NET_5587 = OR ( new_n3008_, new_n3002_ ) -new_n3010_ = OR ( new_n2954_, new_n2909_ ) -new_n3011_ = NAND ( new_n2925_, NET_500 ) -new_n3012_ = NAND ( new_n2937_, new_n1876_ ) -new_n3013_ = NAND ( new_n2959_, new_n2927_ ) -new_n3014_ = OR ( new_n2931_, new_n2753_ ) -new_n3015_ = AND ( new_n3014_, new_n3013_, new_n3007_ ) -NET_5588 = NAND ( new_n3015_, new_n3012_, new_n3011_, new_n3010_ ) -new_n3017_ = OR ( new_n1078_, NET_469 ) -new_n3018_ = OR ( new_n1078_, NET_224 ) -new_n3019_ = NAND ( new_n1078_, new_n1761_ ) -new_n3020_ = NAND ( new_n3019_, new_n3018_ ) -new_n3021_ = NAND ( new_n3020_, NET_21 ) -new_n3022_ = OR ( new_n3020_, NET_21 ) -new_n3023_ = NAND ( new_n3022_, new_n3021_, new_n2653_, new_n2647_ ) -new_n3024_ = NOT ( NET_21 ) -new_n3025_ = NOR ( new_n3020_, new_n3024_ ) -new_n3026_ = NAND ( new_n2653_, new_n2647_ ) -new_n3027_ = NAND ( new_n3020_, new_n3024_ ) -new_n3028_ = NAND ( new_n3027_, new_n3026_ ) -new_n3029_ = OR ( new_n3028_, new_n3025_ ) -new_n3030_ = NAND ( new_n3029_, new_n3023_ ) -new_n3031_ = NAND ( new_n3030_, new_n1078_ ) -new_n3032_ = NAND ( new_n3031_, new_n3017_ ) -new_n3033_ = OR ( new_n3032_, NET_275 ) -new_n3034_ = NOT ( NET_44 ) -new_n3035_ = OR ( new_n1125_, new_n3034_ ) -new_n3036_ = XOR ( new_n2661_, NET_44 ) -new_n3037_ = OR ( new_n3036_, new_n1129_ ) -NET_5633 = NAND ( new_n3037_, new_n3035_, new_n3033_ ) -new_n3039_ = NAND ( new_n3030_, new_n1080_ ) -new_n3040_ = NAND ( new_n1078_, new_n2127_ ) -new_n3041_ = NAND ( new_n3040_, new_n3039_ ) -new_n3042_ = OR ( new_n3041_, NET_520 ) -new_n3043_ = OR ( new_n1101_, new_n1316_ ) -new_n3044_ = XOR ( new_n1324_, NET_289 ) -new_n3045_ = OR ( new_n3044_, new_n1143_ ) -NET_5646 = NAND ( new_n3045_, new_n3043_, new_n3042_ ) -new_n3047_ = NOR ( NET_441, NET_196 ) -new_n3048_ = NOT ( NET_196 ) -new_n3049_ = NOT ( NET_441 ) -new_n3050_ = NOR ( new_n3049_, new_n3048_ ) -new_n3051_ = OR ( new_n3050_, new_n3047_ ) -new_n3052_ = NOR ( new_n2948_, new_n2944_ ) -new_n3053_ = NOR ( new_n3052_, new_n2943_ ) -NET_5685 = XOR ( new_n3053_, new_n3051_ ) -new_n3055_ = OR ( new_n1078_, NET_470 ) -new_n3056_ = NOT ( new_n3025_ ) -new_n3057_ = NAND ( new_n3028_, new_n3056_ ) -new_n3058_ = NOT ( NET_20 ) -new_n3059_ = OR ( new_n1078_, NET_225 ) -new_n3060_ = NAND ( new_n1078_, new_n1749_ ) -new_n3061_ = NAND ( new_n3060_, new_n3059_ ) -new_n3062_ = OR ( new_n3061_, new_n3058_ ) -new_n3063_ = NAND ( new_n3061_, new_n3058_ ) -new_n3064_ = NAND ( new_n3063_, new_n3062_ ) -new_n3065_ = XNOR ( new_n3064_, new_n3057_ ) -new_n3066_ = OR ( new_n3065_, new_n1080_ ) -new_n3067_ = NAND ( new_n3066_, new_n3055_ ) -new_n3068_ = OR ( new_n3067_, NET_275 ) -new_n3069_ = NOT ( NET_45 ) -new_n3070_ = OR ( new_n1125_, new_n3069_ ) -new_n3071_ = NAND ( new_n1239_, new_n2661_ ) -new_n3072_ = NAND ( new_n2661_, new_n3034_ ) -new_n3073_ = NAND ( new_n3072_, NET_45 ) -new_n3074_ = NAND ( new_n3073_, new_n3071_ ) -new_n3075_ = OR ( new_n3074_, new_n1129_ ) -NET_5689 = NAND ( new_n3075_, new_n3070_, new_n3068_ ) -new_n3077_ = OR ( new_n3065_, new_n1078_ ) -new_n3078_ = NAND ( new_n1078_, new_n2114_ ) -new_n3079_ = NAND ( new_n3078_, new_n3077_ ) -new_n3080_ = OR ( new_n3079_, NET_520 ) -new_n3081_ = OR ( new_n1101_, new_n1317_ ) -new_n3082_ = NAND ( new_n1324_, new_n1316_ ) -new_n3083_ = NAND ( new_n3082_, NET_290 ) -new_n3084_ = NAND ( new_n3083_, new_n1325_ ) -new_n3085_ = OR ( new_n3084_, new_n1143_ ) -NET_5707 = NAND ( new_n3085_, new_n3081_, new_n3080_ ) -new_n3087_ = NOT ( new_n2743_ ) -new_n3088_ = NAND ( new_n2759_, new_n1867_ ) -new_n3089_ = NOR ( NET_309, new_n1186_ ) -new_n3090_ = NOR ( new_n1190_, new_n1103_ ) -new_n3091_ = OR ( new_n3090_, new_n3089_ ) -new_n3092_ = NAND ( new_n3091_, new_n2761_ ) -new_n3093_ = NAND ( new_n2678_, new_n1184_ ) -new_n3094_ = OR ( new_n3091_, new_n2678_ ) -new_n3095_ = NAND ( new_n3094_, new_n3093_ ) -new_n3096_ = OR ( new_n3095_, new_n2725_ ) -new_n3097_ = NAND ( new_n3096_, new_n3092_, new_n3088_ ) -new_n3098_ = NAND ( new_n3097_, new_n3087_ ) -new_n3099_ = OR ( new_n3097_, new_n3087_ ) -new_n3100_ = NAND ( new_n3099_, new_n3098_ ) -new_n3101_ = OR ( new_n3095_, new_n2721_ ) -new_n3102_ = NAND ( new_n2726_, new_n1867_ ) -new_n3103_ = NAND ( new_n2728_, NET_376 ) -new_n3104_ = NAND ( new_n2731_, NET_408 ) -new_n3105_ = NAND ( new_n3104_, new_n3103_, new_n3102_, new_n3101_ ) -new_n3106_ = NAND ( new_n3105_, new_n3100_ ) -new_n3107_ = NOT ( new_n3105_ ) -new_n3108_ = NAND ( new_n3107_, new_n3099_, new_n3098_ ) -new_n3109_ = AND ( new_n3108_, new_n3106_ ) -new_n3110_ = NAND ( new_n2767_, new_n2766_, new_n2746_ ) -new_n3111_ = NAND ( new_n3110_, new_n2745_ ) -new_n3112_ = OR ( new_n3111_, new_n3109_ ) -new_n3113_ = NAND ( new_n3111_, new_n3108_, new_n3106_ ) -new_n3114_ = NAND ( new_n3113_, new_n3112_ ) -new_n3115_ = OR ( new_n3114_, new_n2810_ ) -new_n3116_ = NAND ( new_n2820_, new_n1876_ ) -new_n3117_ = NAND ( new_n2800_, NET_344 ) -new_n3118_ = NAND ( new_n2831_, new_n1858_ ) -new_n3119_ = OR ( new_n1569_, new_n1184_ ) -new_n3120_ = NAND ( new_n3091_, new_n2825_ ) -new_n3121_ = NAND ( new_n3120_, new_n3119_ ) -new_n3122_ = NAND ( new_n3121_, new_n2838_ ) -new_n3123_ = AND ( new_n3122_, new_n3118_ ) -NET_5708 = NAND ( new_n3123_, new_n3117_, new_n3116_, new_n3115_ ) -new_n3125_ = OR ( new_n3114_, new_n2856_ ) -new_n3126_ = NOR ( new_n2858_, new_n2734_ ) -new_n3127_ = NOR ( new_n2855_, new_n1862_ ) -new_n3128_ = NOR ( new_n3127_, new_n3126_ ) -new_n3129_ = NAND ( new_n2862_, new_n1858_ ) -new_n3130_ = NAND ( new_n3121_, new_n2864_ ) -NET_5709 = NAND ( new_n3130_, new_n3129_, new_n3128_, new_n3125_ ) -new_n3132_ = OR ( new_n3114_, new_n2869_ ) -new_n3133_ = NAND ( new_n2884_, new_n2682_ ) -new_n3134_ = NAND ( new_n3133_, new_n2881_ ) -new_n3135_ = OR ( new_n2884_, new_n2682_ ) -new_n3136_ = AND ( new_n3135_, new_n3134_ ) -new_n3137_ = OR ( new_n1560_, new_n1862_ ) -new_n3138_ = NAND ( new_n1560_, NET_408 ) -new_n3139_ = NAND ( new_n3138_, new_n3137_ ) -new_n3140_ = XOR ( new_n3139_, new_n3091_ ) -new_n3141_ = XNOR ( new_n3140_, new_n3136_ ) -new_n3142_ = OR ( new_n3141_, new_n2876_ ) -new_n3143_ = NAND ( new_n3091_, new_n2893_ ) -new_n3144_ = NOR ( new_n2871_, new_n1049_ ) -new_n3145_ = AND ( NET_22559, NET_495 ) -new_n3146_ = NOR ( new_n3145_, new_n3144_ ) -NET_5710 = NAND ( new_n3146_, new_n3143_, new_n3142_, new_n3132_ ) -new_n3148_ = OR ( new_n3114_, new_n2909_ ) -new_n3149_ = NAND ( new_n2925_, NET_495 ) -new_n3150_ = AND ( new_n3121_, new_n2927_ ) -new_n3151_ = NOR ( new_n3095_, new_n2931_ ) -new_n3152_ = NOR ( new_n3151_, new_n3150_, new_n3145_ ) -new_n3153_ = NAND ( new_n2935_, new_n1876_ ) -new_n3154_ = NAND ( new_n2937_, new_n1858_ ) -new_n3155_ = AND ( new_n3154_, new_n3153_ ) -NET_5711 = NAND ( new_n3155_, new_n3152_, new_n3149_, new_n3148_ ) -new_n3157_ = NOT ( new_n1490_ ) -new_n3158_ = NAND ( new_n1308_, new_n1305_, NET_275 ) -new_n3159_ = AND ( new_n3158_, new_n3157_ ) -new_n3160_ = NOT ( NET_52 ) -new_n3161_ = NOR ( NET_64, new_n3160_ ) -new_n3162_ = OR ( new_n1242_, new_n1241_ ) -new_n3163_ = OR ( new_n1243_, new_n3162_ ) -new_n3164_ = XOR ( new_n3163_, new_n3160_ ) -new_n3165_ = NOR ( new_n3164_, new_n1127_ ) -new_n3166_ = NOR ( new_n3165_, new_n3161_ ) -new_n3167_ = NAND ( new_n3166_, new_n1258_ ) -new_n3168_ = OR ( new_n1258_, new_n1251_ ) -new_n3169_ = AND ( new_n3168_, new_n3167_ ) -new_n3170_ = NAND ( new_n3169_, new_n3159_, new_n1298_ ) -new_n3171_ = NOT ( new_n2270_ ) -new_n3172_ = OR ( new_n2280_, new_n1494_ ) -new_n3173_ = NAND ( new_n1493_, new_n1271_ ) -new_n3174_ = OR ( new_n3173_, NET_65 ) -new_n3175_ = AND ( new_n3174_, new_n3172_ ) -new_n3176_ = NAND ( new_n2275_, new_n3173_ ) -new_n3177_ = OR ( new_n3173_, new_n2273_ ) -new_n3178_ = NAND ( new_n3177_, new_n3176_ ) -new_n3179_ = NAND ( new_n3178_, new_n3175_ ) -new_n3180_ = NOT ( NET_53 ) -new_n3181_ = OR ( NET_64, new_n3180_ ) -new_n3182_ = OR ( new_n3163_, NET_52 ) -new_n3183_ = AND ( new_n3182_, NET_53 ) -new_n3184_ = OR ( new_n3183_, new_n1245_ ) -new_n3185_ = OR ( new_n3184_, new_n1127_ ) -new_n3186_ = AND ( new_n3185_, new_n3181_ ) -new_n3187_ = NOR ( new_n3186_, new_n1251_ ) -new_n3188_ = NAND ( new_n3187_, new_n1289_, new_n1284_ ) -new_n3189_ = OR ( new_n3188_, new_n3179_ ) -new_n3190_ = NAND ( new_n3174_, new_n3172_ ) -new_n3191_ = AND ( new_n3177_, new_n3176_ ) -new_n3192_ = NOR ( new_n3191_, new_n3190_ ) -new_n3193_ = OR ( new_n3188_, new_n3192_ ) -new_n3194_ = NAND ( new_n3185_, new_n3181_ ) -new_n3195_ = NOR ( new_n3194_, new_n3167_ ) -new_n3196_ = NAND ( new_n3195_, new_n1284_ ) -new_n3197_ = OR ( new_n3178_, new_n3175_ ) -new_n3198_ = OR ( new_n3197_, new_n3196_ ) -new_n3199_ = AND ( new_n3198_, new_n3193_, new_n3189_, new_n1289_ ) -new_n3200_ = NOR ( new_n3199_, new_n3171_ ) -new_n3201_ = NAND ( new_n1304_, new_n1090_ ) -new_n3202_ = NOR ( NET_64, new_n1131_ ) -new_n3203_ = NOR ( new_n1127_, new_n1131_ ) -new_n3204_ = NOR ( new_n3203_, new_n3202_ ) -new_n3205_ = NOT ( new_n3204_ ) -new_n3206_ = OR ( new_n3205_, new_n1304_ ) -new_n3207_ = NAND ( new_n3206_, new_n3201_ ) -new_n3208_ = OR ( new_n3186_, new_n3167_ ) -new_n3209_ = OR ( new_n3208_, new_n1250_ ) -new_n3210_ = NOR ( new_n3194_, new_n3166_ ) -new_n3211_ = NAND ( new_n3210_, new_n1250_ ) -new_n3212_ = NAND ( new_n3186_, new_n3166_, new_n1250_ ) -new_n3213_ = NAND ( new_n3212_, new_n3211_, new_n3209_ ) -new_n3214_ = NAND ( new_n3213_, new_n1284_ ) -new_n3215_ = NAND ( new_n3214_, new_n3196_ ) -new_n3216_ = NAND ( new_n3215_, new_n3192_ ) -new_n3217_ = OR ( new_n3214_, new_n3192_ ) -new_n3218_ = NAND ( new_n3197_, new_n3195_, new_n3179_, new_n1284_ ) -new_n3219_ = AND ( new_n3218_, new_n3217_, new_n3216_ ) -new_n3220_ = NOR ( new_n3219_, new_n3207_ ) -new_n3221_ = NAND ( new_n3169_, new_n1284_ ) -new_n3222_ = OR ( new_n3221_, new_n1303_ ) -new_n3223_ = OR ( new_n3222_, new_n2264_ ) -new_n3224_ = NAND ( new_n3169_, new_n1303_, new_n1284_ ) -new_n3225_ = OR ( new_n3224_, new_n2266_ ) -new_n3226_ = OR ( new_n3204_, new_n1308_ ) -new_n3227_ = NAND ( new_n3226_, new_n3225_, new_n3223_ ) -new_n3228_ = NOR ( new_n3227_, new_n3220_, new_n3200_ ) -new_n3229_ = NAND ( new_n3218_, new_n3217_, new_n3216_ ) -new_n3230_ = NAND ( new_n3229_, new_n2270_ ) -new_n3231_ = AND ( new_n3198_, new_n3193_, new_n3189_ ) -new_n3232_ = OR ( new_n3207_, new_n3231_ ) -new_n3233_ = NAND ( new_n3224_, new_n3222_ ) -new_n3234_ = NAND ( new_n3233_, new_n3205_ ) -new_n3235_ = OR ( new_n1303_, NET_129 ) -new_n3236_ = NAND ( new_n1303_, new_n2266_ ) -new_n3237_ = NAND ( new_n3236_, new_n3235_ ) -new_n3238_ = OR ( new_n3237_, new_n1308_ ) -new_n3239_ = NAND ( new_n3238_, new_n3234_, new_n3232_, new_n3230_ ) -new_n3240_ = NAND ( new_n3239_, new_n3228_ ) -new_n3241_ = NAND ( new_n3188_, new_n1289_ ) -new_n3242_ = OR ( new_n3241_, new_n3239_ ) -new_n3243_ = NAND ( new_n3242_, new_n3240_ ) -new_n3244_ = NOT ( new_n2259_ ) -new_n3245_ = OR ( new_n3199_, new_n3244_ ) -new_n3246_ = NAND ( new_n1304_, new_n1121_ ) -new_n3247_ = NOR ( NET_64, new_n1123_ ) -new_n3248_ = NOR ( new_n1133_, new_n1127_ ) -new_n3249_ = NOR ( new_n3248_, new_n3247_ ) -new_n3250_ = NOT ( new_n3249_ ) -new_n3251_ = OR ( new_n3250_, new_n1304_ ) -new_n3252_ = NAND ( new_n3251_, new_n3246_ ) -new_n3253_ = OR ( new_n3252_, new_n3219_ ) -new_n3254_ = OR ( new_n3222_, new_n2253_ ) -new_n3255_ = OR ( new_n3224_, new_n2255_ ) -new_n3256_ = NAND ( new_n3255_, new_n3254_, new_n3253_, new_n3245_ ) -new_n3257_ = NAND ( new_n3229_, new_n2259_ ) -new_n3258_ = OR ( new_n3252_, new_n3231_ ) -new_n3259_ = NAND ( new_n3250_, new_n3233_ ) -new_n3260_ = NAND ( new_n3259_, new_n3258_, new_n3257_ ) -new_n3261_ = XOR ( new_n3260_, new_n3241_ ) -new_n3262_ = OR ( new_n3261_, new_n3256_ ) -new_n3263_ = NAND ( new_n3261_, new_n3256_ ) -new_n3264_ = NAND ( new_n3263_, new_n3262_ ) -new_n3265_ = XNOR ( new_n3264_, new_n3243_ ) -new_n3266_ = NOR ( new_n3265_, new_n3170_ ) -new_n3267_ = NOT ( new_n3195_ ) -new_n3268_ = NOT ( new_n3211_ ) -new_n3269_ = NOR ( new_n3268_, new_n3187_ ) -new_n3270_ = NAND ( new_n3269_, new_n3212_, new_n3208_, new_n3267_ ) -new_n3271_ = NAND ( new_n3270_, new_n3159_ ) -new_n3272_ = OR ( new_n1289_, NET_22556 ) -new_n3273_ = NAND ( new_n3272_, new_n3271_ ) -new_n3274_ = AND ( new_n3273_, new_n1298_ ) -new_n3275_ = NOR ( new_n3237_, new_n3204_ ) -new_n3276_ = OR ( new_n1303_, new_n2253_ ) -new_n3277_ = NAND ( new_n1303_, NET_162 ) -new_n3278_ = NAND ( new_n3277_, new_n3276_ ) -new_n3279_ = XOR ( new_n3278_, new_n3250_ ) -new_n3280_ = XOR ( new_n3279_, new_n3275_ ) -new_n3281_ = NAND ( new_n3280_, new_n3274_ ) -new_n3282_ = NOT ( new_n1298_ ) -new_n3283_ = NAND ( new_n3158_, new_n3282_, new_n1307_, NET_275 ) -new_n3284_ = NOR ( new_n3270_, new_n3169_ ) -new_n3285_ = NOR ( new_n3284_, new_n1298_ ) -new_n3286_ = NAND ( new_n3285_, new_n3159_ ) -new_n3287_ = NAND ( new_n3286_, new_n3283_ ) -new_n3288_ = NAND ( new_n3287_, new_n3250_ ) -new_n3289_ = OR ( new_n3158_, new_n1043_ ) -new_n3290_ = OR ( NET_275, new_n2257_ ) -new_n3291_ = NAND ( new_n3290_, new_n3289_, new_n3288_, new_n3281_ ) -NET_5759 = OR ( new_n3291_, new_n3266_ ) -new_n3293_ = NOR ( NET_89, NET_88, NET_87, NET_86 ) -new_n3294_ = NOR ( NET_85, NET_84 ) -new_n3295_ = NAND ( new_n3294_, new_n3293_, new_n1527_, new_n1525_ ) -new_n3296_ = NOR ( NET_93, NET_92, NET_91, NET_90 ) -new_n3297_ = NAND ( new_n3296_, new_n1553_, new_n1551_, new_n1549_ ) -new_n3298_ = NAND ( new_n1507_, new_n1505_, new_n1503_, new_n1501_ ) -new_n3299_ = OR ( new_n3298_, NET_69, NET_68 ) -new_n3300_ = NOR ( NET_81, NET_80, NET_79, NET_78 ) -new_n3301_ = NOR ( NET_77, NET_76 ) -new_n3302_ = NAND ( new_n3301_, new_n3300_, new_n1511_, new_n1509_ ) -new_n3303_ = OR ( new_n3302_, new_n3299_, new_n3297_, new_n3295_ ) -new_n3304_ = NAND ( new_n3303_, new_n1494_ ) -new_n3305_ = OR ( new_n3173_, new_n1488_ ) -new_n3306_ = NAND ( new_n3305_, new_n3304_ ) -new_n3307_ = NOR ( new_n3306_, new_n3179_ ) -new_n3308_ = NOT ( new_n3307_ ) -new_n3309_ = NOR ( new_n3308_, new_n1490_ ) -new_n3310_ = NOR ( new_n3267_, new_n1250_ ) -new_n3311_ = NOR ( new_n3212_, new_n1258_ ) -new_n3312_ = NOR ( new_n3311_, new_n3310_ ) -new_n3313_ = OR ( new_n3269_, new_n1258_ ) -new_n3314_ = NAND ( new_n3313_, new_n3312_, new_n3209_ ) -new_n3315_ = NAND ( new_n3314_, new_n3309_ ) -new_n3316_ = OR ( new_n3315_, new_n3265_ ) -new_n3317_ = NAND ( new_n3186_, new_n3166_, new_n1251_ ) -new_n3318_ = NAND ( new_n3317_, new_n2259_ ) -new_n3319_ = NAND ( new_n3317_, new_n2270_ ) -new_n3320_ = NOT ( new_n3166_ ) -new_n3321_ = NAND ( new_n3194_, new_n3320_, new_n1250_ ) -new_n3322_ = NOT ( new_n3321_ ) -new_n3323_ = NOR ( new_n3322_, new_n3207_ ) -new_n3324_ = NAND ( new_n3323_, new_n3319_ ) -new_n3325_ = NOR ( new_n3322_, new_n3252_ ) -new_n3326_ = XOR ( new_n3325_, new_n3324_ ) -new_n3327_ = XOR ( new_n3326_, new_n3318_ ) -new_n3328_ = NOR ( new_n3166_, new_n1259_ ) -new_n3329_ = NAND ( new_n3328_, new_n1251_ ) -new_n3330_ = NOR ( new_n3320_, new_n1258_ ) -new_n3331_ = NOT ( new_n3330_ ) -new_n3332_ = NOR ( new_n3331_, new_n1250_ ) -new_n3333_ = NAND ( new_n3332_, new_n3186_ ) -new_n3334_ = NAND ( new_n3333_, new_n3329_ ) -new_n3335_ = NAND ( new_n3334_, new_n3309_ ) -new_n3336_ = NOT ( new_n3335_ ) -new_n3337_ = NAND ( new_n3336_, new_n3327_ ) -new_n3338_ = NOT ( NET_22558 ) -new_n3339_ = OR ( new_n1258_, new_n1250_ ) -new_n3340_ = NOR ( new_n3339_, new_n3186_ ) -new_n3341_ = OR ( new_n3340_, new_n3334_, new_n3314_ ) -new_n3342_ = NAND ( new_n3341_, new_n3308_ ) -new_n3343_ = OR ( new_n3194_, new_n3320_ ) -new_n3344_ = NAND ( new_n3343_, new_n1260_ ) -new_n3345_ = NAND ( new_n3344_, new_n3342_ ) -new_n3346_ = NAND ( new_n3345_, new_n3157_ ) -new_n3347_ = NOT ( new_n3212_ ) -new_n3348_ = NOR ( new_n1307_, new_n1259_ ) -new_n3349_ = NAND ( new_n3348_, new_n3347_ ) -new_n3350_ = NOT ( new_n3349_ ) -new_n3351_ = NAND ( new_n3350_, new_n1284_, NET_275 ) -new_n3352_ = OR ( new_n3351_, new_n3307_ ) -new_n3353_ = NAND ( new_n3352_, new_n3346_, new_n3272_, new_n3338_ ) -new_n3354_ = NAND ( new_n3353_, NET_265 ) -new_n3355_ = NOT ( new_n3252_ ) -new_n3356_ = AND ( new_n3340_, new_n3309_ ) -new_n3357_ = NAND ( new_n3320_, new_n1259_, new_n1251_ ) -new_n3358_ = NOR ( new_n3357_, new_n3194_ ) -new_n3359_ = NOT ( new_n3358_ ) -new_n3360_ = NOR ( new_n3359_, new_n1490_ ) -new_n3361_ = OR ( new_n3360_, new_n3356_ ) -new_n3362_ = NAND ( new_n3361_, new_n3355_ ) -new_n3363_ = NOT ( new_n3351_ ) -new_n3364_ = AND ( new_n3363_, new_n3307_, new_n3282_ ) -new_n3365_ = NAND ( new_n3364_, new_n2248_ ) -new_n3366_ = AND ( new_n3363_, new_n3307_, new_n1298_ ) -new_n3367_ = NAND ( new_n3366_, new_n2270_ ) -new_n3368_ = AND ( new_n3367_, new_n3365_, new_n3362_, new_n3290_ ) -NET_5760 = NAND ( new_n3368_, new_n3354_, new_n3337_, new_n3316_ ) -new_n3370_ = OR ( new_n3114_, new_n2979_ ) -new_n3371_ = NAND ( new_n3121_, new_n2982_ ) -new_n3372_ = NAND ( new_n2975_, NET_408 ) -new_n3373_ = NAND ( new_n2930_, NET_495 ) -new_n3374_ = AND ( new_n3373_, new_n3372_, new_n3371_ ) -new_n3375_ = NAND ( new_n2984_, new_n1858_ ) -new_n3376_ = NAND ( new_n2998_, new_n1876_ ) -NET_5787 = NAND ( new_n3376_, new_n3375_, new_n3374_, new_n3370_ ) -new_n3378_ = NOR ( new_n3050_, new_n3052_, new_n2943_ ) -new_n3379_ = OR ( new_n3378_, new_n3047_ ) -new_n3380_ = XNOR ( NET_440, NET_195 ) -NET_5838 = XOR ( new_n3380_, new_n3379_ ) -new_n3382_ = OR ( new_n1078_, NET_471 ) -new_n3383_ = NOT ( NET_19 ) -new_n3384_ = OR ( new_n1078_, NET_226 ) -new_n3385_ = NAND ( new_n1078_, new_n1737_ ) -new_n3386_ = NAND ( new_n3385_, new_n3384_ ) -new_n3387_ = OR ( new_n3386_, new_n3383_ ) -new_n3388_ = NAND ( new_n3386_, new_n3383_ ) -new_n3389_ = NAND ( new_n3388_, new_n3387_ ) -new_n3390_ = NAND ( new_n3063_, new_n3057_ ) -new_n3391_ = NAND ( new_n3390_, new_n3062_ ) -new_n3392_ = XNOR ( new_n3391_, new_n3389_ ) -new_n3393_ = OR ( new_n3392_, new_n1080_ ) -new_n3394_ = NAND ( new_n3393_, new_n3382_ ) -new_n3395_ = OR ( new_n3394_, NET_275 ) -new_n3396_ = NOT ( NET_46 ) -new_n3397_ = OR ( new_n1125_, new_n3396_ ) -new_n3398_ = XOR ( new_n3071_, new_n3396_ ) -new_n3399_ = OR ( new_n3398_, new_n1129_ ) -NET_5845 = NAND ( new_n3399_, new_n3397_, new_n3395_ ) -new_n3401_ = NOT ( new_n3241_ ) -new_n3402_ = XOR ( new_n3239_, new_n3228_ ) -new_n3403_ = NOR ( new_n3402_, new_n3170_ ) -new_n3404_ = NOT ( new_n3275_ ) -new_n3405_ = NAND ( new_n3237_, new_n3204_ ) -new_n3406_ = NAND ( new_n3405_, new_n3404_, new_n3274_ ) -new_n3407_ = NAND ( new_n3287_, new_n3205_ ) -new_n3408_ = OR ( new_n3158_, new_n1036_ ) -new_n3409_ = OR ( NET_275, new_n2268_ ) -new_n3410_ = NAND ( new_n3409_, new_n3408_, new_n3407_, new_n3406_ ) -NET_5846 = OR ( new_n3410_, new_n3403_ ) -new_n3412_ = OR ( new_n3402_, new_n3315_ ) -new_n3413_ = NAND ( new_n3353_, NET_255 ) -new_n3414_ = NOT ( new_n3207_ ) -new_n3415_ = NAND ( new_n3361_, new_n3414_ ) -new_n3416_ = XNOR ( new_n3323_, new_n3319_ ) -new_n3417_ = NAND ( new_n3416_, new_n3336_ ) -new_n3418_ = NAND ( new_n3364_, new_n2259_ ) -new_n3419_ = AND ( new_n3418_, new_n3417_, new_n3409_ ) -NET_5847 = NAND ( new_n3419_, new_n3415_, new_n3413_, new_n3412_ ) -new_n3421_ = OR ( new_n3392_, new_n1078_ ) -new_n3422_ = NAND ( new_n1078_, new_n2101_ ) -new_n3423_ = NAND ( new_n3422_, new_n3421_ ) -new_n3424_ = OR ( new_n3423_, NET_520 ) -new_n3425_ = NOT ( NET_291 ) -new_n3426_ = OR ( new_n1101_, new_n3425_ ) -new_n3427_ = XOR ( new_n1325_, new_n3425_ ) -new_n3428_ = OR ( new_n3427_, new_n1143_ ) -NET_5860 = NAND ( new_n3428_, new_n3426_, new_n3424_ ) -new_n3430_ = NAND ( new_n2759_, new_n1858_ ) -new_n3431_ = NOR ( NET_309, new_n1227_ ) -new_n3432_ = NOR ( new_n1229_, new_n1103_ ) -new_n3433_ = OR ( new_n3432_, new_n3431_ ) -new_n3434_ = NAND ( new_n3433_, new_n2761_ ) -new_n3435_ = NAND ( new_n2678_, new_n1225_ ) -new_n3436_ = OR ( new_n3433_, new_n2678_ ) -new_n3437_ = NAND ( new_n3436_, new_n3435_ ) -new_n3438_ = OR ( new_n3437_, new_n2725_ ) -new_n3439_ = NAND ( new_n3438_, new_n3434_, new_n3430_ ) -new_n3440_ = XOR ( new_n3439_, new_n2743_ ) -new_n3441_ = OR ( new_n3437_, new_n2721_ ) -new_n3442_ = NAND ( new_n2726_, new_n1858_ ) -new_n3443_ = NAND ( new_n2728_, NET_377 ) -new_n3444_ = NAND ( new_n2731_, NET_409 ) -new_n3445_ = NAND ( new_n3444_, new_n3443_, new_n3442_, new_n3441_ ) -new_n3446_ = OR ( new_n3445_, new_n3440_ ) -new_n3447_ = NAND ( new_n3445_, new_n3440_ ) -new_n3448_ = NAND ( new_n3447_, new_n3446_ ) -new_n3449_ = NAND ( new_n3111_, new_n3108_ ) -new_n3450_ = NAND ( new_n3449_, new_n3106_ ) -new_n3451_ = XOR ( new_n3450_, new_n3448_ ) -new_n3452_ = NOR ( new_n3451_, new_n2810_ ) -new_n3453_ = NAND ( new_n2820_, new_n1867_ ) -new_n3454_ = NAND ( new_n2800_, NET_345 ) -new_n3455_ = NAND ( new_n2831_, new_n1848_ ) -new_n3456_ = NAND ( new_n3433_, new_n2825_ ) -new_n3457_ = OR ( new_n1569_, new_n1225_ ) -new_n3458_ = NAND ( new_n3457_, new_n3456_ ) -new_n3459_ = NAND ( new_n3458_, new_n2838_ ) -new_n3460_ = NAND ( new_n3459_, new_n3455_, new_n3454_, new_n3453_ ) -NET_5861 = OR ( new_n3460_, new_n3452_ ) -new_n3462_ = NOR ( new_n3451_, new_n2856_ ) -new_n3463_ = NAND ( new_n2859_, new_n1867_ ) -new_n3464_ = NAND ( new_n2854_, NET_377 ) -new_n3465_ = NAND ( new_n2862_, new_n1848_ ) -new_n3466_ = NAND ( new_n3458_, new_n2864_ ) -new_n3467_ = NAND ( new_n3466_, new_n3465_, new_n3464_, new_n3463_ ) -NET_5862 = OR ( new_n3467_, new_n3462_ ) -new_n3469_ = NOR ( new_n3451_, new_n2869_ ) -new_n3470_ = OR ( new_n1560_, new_n1852_ ) -new_n3471_ = NAND ( new_n1560_, NET_409 ) -new_n3472_ = NAND ( new_n3471_, new_n3470_ ) -new_n3473_ = XOR ( new_n3472_, new_n3433_ ) -new_n3474_ = NAND ( new_n3139_, new_n3136_ ) -new_n3475_ = NAND ( new_n3474_, new_n3091_ ) -new_n3476_ = OR ( new_n3139_, new_n3136_ ) -new_n3477_ = AND ( new_n3476_, new_n3475_ ) -new_n3478_ = OR ( new_n3477_, new_n3473_ ) -new_n3479_ = NAND ( new_n3477_, new_n3473_ ) -new_n3480_ = NAND ( new_n3479_, new_n3478_, new_n2877_ ) -new_n3481_ = NAND ( new_n3433_, new_n2893_ ) -new_n3482_ = OR ( new_n2871_, new_n1058_ ) -new_n3483_ = OR ( NET_520, new_n1854_ ) -new_n3484_ = NAND ( new_n3483_, new_n3482_, new_n3481_, new_n3480_ ) -NET_5863 = OR ( new_n3484_, new_n3469_ ) -new_n3486_ = NOR ( new_n3451_, new_n2909_ ) -new_n3487_ = NAND ( new_n2925_, new_n1854_ ) -new_n3488_ = NAND ( new_n3458_, new_n2927_ ) -new_n3489_ = OR ( new_n3437_, new_n2931_ ) -new_n3490_ = AND ( new_n3489_, new_n3488_, new_n3483_ ) -new_n3491_ = NAND ( new_n2935_, new_n1867_ ) -new_n3492_ = NAND ( new_n2937_, new_n1848_ ) -new_n3493_ = NAND ( new_n3492_, new_n3491_, new_n3490_, new_n3487_ ) -NET_5864 = OR ( new_n3493_, new_n3486_ ) -new_n3495_ = NOT ( new_n3306_ ) -new_n3496_ = NAND ( new_n3344_, new_n3495_, new_n3178_, new_n3190_ ) -new_n3497_ = NAND ( new_n3496_, new_n3359_ ) -new_n3498_ = NAND ( new_n3497_, new_n3157_ ) -new_n3499_ = NOR ( new_n3166_, new_n1251_ ) -new_n3500_ = NOT ( new_n3187_ ) -new_n3501_ = NAND ( new_n3312_, new_n3208_, new_n3500_ ) -new_n3502_ = NOR ( new_n3501_, new_n3499_ ) -new_n3503_ = OR ( new_n3502_, new_n3498_ ) -new_n3504_ = OR ( new_n3503_, new_n3402_ ) -new_n3505_ = NOT ( new_n3498_ ) -new_n3506_ = NOT ( new_n3328_ ) -new_n3507_ = NAND ( new_n3333_, new_n3506_ ) -new_n3508_ = NAND ( new_n3507_, new_n3505_ ) -new_n3509_ = NOT ( new_n3508_ ) -new_n3510_ = NAND ( new_n3509_, new_n3416_ ) -new_n3511_ = NAND ( new_n3498_, NET_161 ) -new_n3512_ = NAND ( new_n3360_, NET_255 ) -new_n3513_ = AND ( new_n3512_, new_n3511_, new_n3510_ ) -new_n3514_ = NOR ( new_n1298_, new_n1261_ ) -new_n3515_ = NOT ( new_n3514_ ) -new_n3516_ = NOR ( new_n3515_, new_n3498_ ) -new_n3517_ = NAND ( new_n3516_, new_n2259_ ) -new_n3518_ = NAND ( new_n3505_, new_n3340_ ) -new_n3519_ = OR ( new_n3518_, new_n3207_ ) -NET_5905 = NAND ( new_n3519_, new_n3517_, new_n3513_, new_n3504_ ) -new_n3521_ = NAND ( new_n3498_, NET_162 ) -new_n3522_ = NOR ( new_n3501_, new_n3268_ ) -new_n3523_ = NOR ( new_n3522_, new_n3265_ ) -new_n3524_ = NAND ( new_n3507_, new_n3327_ ) -new_n3525_ = NOR ( new_n3282_, new_n1261_ ) -new_n3526_ = NAND ( new_n3525_, new_n2270_ ) -new_n3527_ = NAND ( new_n3514_, new_n2248_ ) -new_n3528_ = AND ( new_n3527_, new_n3526_ ) -new_n3529_ = NAND ( new_n3340_, new_n3355_ ) -new_n3530_ = NAND ( new_n3358_, NET_265 ) -new_n3531_ = NAND ( new_n3530_, new_n3529_, new_n3528_, new_n3524_ ) -new_n3532_ = NOR ( new_n3531_, new_n3523_ ) -new_n3533_ = OR ( new_n3532_, new_n3498_ ) -NET_5906 = NAND ( new_n3533_, new_n3521_ ) -new_n3535_ = AND ( new_n3210_, new_n1259_ ) -new_n3536_ = NOR ( new_n3535_, new_n3501_ ) -new_n3537_ = OR ( new_n3536_, new_n3265_ ) -new_n3538_ = NOR ( new_n3194_, new_n1250_ ) -new_n3539_ = NAND ( new_n3538_, new_n1259_ ) -new_n3540_ = NAND ( new_n3539_, new_n3506_ ) -new_n3541_ = NAND ( new_n3540_, new_n3327_ ) -new_n3542_ = NAND ( new_n3332_, new_n3194_ ) -new_n3543_ = NAND ( new_n3542_, new_n3357_ ) -new_n3544_ = NOT ( new_n3543_ ) -new_n3545_ = OR ( new_n3544_, new_n3252_ ) -new_n3546_ = NAND ( new_n3545_, new_n3541_, new_n3537_, new_n3528_ ) -new_n3547_ = NOR ( new_n3186_, new_n1250_ ) -new_n3548_ = NOT ( new_n3547_ ) -new_n3549_ = NAND ( new_n3344_, new_n3357_ ) -new_n3550_ = NAND ( new_n3549_, new_n3548_ ) -new_n3551_ = AND ( new_n3550_, new_n3495_, new_n3157_ ) -new_n3552_ = NAND ( new_n3551_, new_n3191_, new_n3175_ ) -new_n3553_ = NOT ( new_n3552_ ) -new_n3554_ = NAND ( new_n3553_, new_n3546_ ) -new_n3555_ = NAND ( new_n3552_, NET_130 ) -NET_5907 = NAND ( new_n3555_, new_n3554_ ) -new_n3557_ = NOT ( new_n3197_ ) -new_n3558_ = NAND ( new_n3551_, new_n3557_ ) -new_n3559_ = NOT ( new_n3558_ ) -new_n3560_ = NAND ( new_n3559_, new_n3546_ ) -new_n3561_ = NAND ( new_n3558_, NET_98 ) -NET_5908 = NAND ( new_n3561_, new_n3560_ ) -new_n3563_ = OR ( new_n3451_, new_n2979_ ) -new_n3564_ = NAND ( new_n3458_, new_n2982_ ) -new_n3565_ = NAND ( new_n2975_, NET_409 ) -new_n3566_ = NAND ( new_n2930_, new_n1854_ ) -new_n3567_ = AND ( new_n3566_, new_n3565_, new_n3564_ ) -new_n3568_ = NAND ( new_n2984_, new_n1848_ ) -new_n3569_ = NAND ( new_n2998_, new_n1867_ ) -NET_5931 = NAND ( new_n3569_, new_n3568_, new_n3567_, new_n3563_ ) -new_n3571_ = NAND ( new_n3229_, new_n2248_ ) -new_n3572_ = NAND ( new_n1304_, new_n1172_ ) -new_n3573_ = NOR ( NET_64, new_n1174_ ) -new_n3574_ = NOR ( new_n1178_, new_n1127_ ) -new_n3575_ = OR ( new_n3574_, new_n3573_ ) -new_n3576_ = OR ( new_n3575_, new_n1304_ ) -new_n3577_ = AND ( new_n3576_, new_n3572_ ) -new_n3578_ = NOT ( new_n3577_ ) -new_n3579_ = OR ( new_n3578_, new_n3231_ ) -new_n3580_ = NAND ( new_n3575_, new_n3233_ ) -new_n3581_ = NAND ( new_n3580_, new_n3579_, new_n3571_ ) -new_n3582_ = XOR ( new_n3581_, new_n3241_ ) -new_n3583_ = NOT ( new_n3199_ ) -new_n3584_ = NAND ( new_n3583_, new_n2248_ ) -new_n3585_ = OR ( new_n3578_, new_n3219_ ) -new_n3586_ = OR ( new_n3222_, new_n2241_ ) -new_n3587_ = OR ( new_n3224_, new_n2243_ ) -new_n3588_ = NAND ( new_n3587_, new_n3586_, new_n3585_, new_n3584_ ) -new_n3589_ = NAND ( new_n3588_, new_n3582_ ) -new_n3590_ = OR ( new_n3588_, new_n3582_ ) -new_n3591_ = NAND ( new_n3590_, new_n3589_ ) -new_n3592_ = NAND ( new_n3262_, new_n3242_, new_n3240_ ) -new_n3593_ = NAND ( new_n3592_, new_n3591_, new_n3263_ ) -new_n3594_ = NAND ( new_n3592_, new_n3263_ ) -new_n3595_ = NAND ( new_n3594_, new_n3590_, new_n3589_ ) -new_n3596_ = NAND ( new_n3595_, new_n3593_ ) -new_n3597_ = OR ( new_n3596_, new_n3170_ ) -new_n3598_ = NAND ( new_n3402_, new_n1298_ ) -new_n3599_ = OR ( new_n3205_, new_n1298_ ) -new_n3600_ = NAND ( new_n3599_, new_n3598_, NET_22558 ) -new_n3601_ = OR ( new_n1303_, new_n2241_ ) -new_n3602_ = NAND ( new_n1303_, NET_163 ) -new_n3603_ = NAND ( new_n3602_, new_n3601_ ) -new_n3604_ = XOR ( new_n3603_, new_n3575_ ) -new_n3605_ = OR ( new_n3278_, new_n3250_ ) -new_n3606_ = NAND ( new_n3605_, new_n3275_ ) -new_n3607_ = NAND ( new_n3278_, new_n3250_ ) -new_n3608_ = NAND ( new_n3607_, new_n3606_ ) -new_n3609_ = OR ( new_n3608_, new_n3604_ ) -new_n3610_ = NAND ( new_n3608_, new_n3604_ ) -new_n3611_ = NAND ( new_n3610_, new_n3609_, new_n3274_ ) -new_n3612_ = NAND ( new_n3575_, new_n3287_ ) -new_n3613_ = OR ( new_n3158_, new_n1048_ ) -new_n3614_ = OR ( NET_275, new_n2245_ ) -new_n3615_ = AND ( new_n3614_, new_n3613_, new_n3612_ ) -NET_5996 = NAND ( new_n3615_, new_n3611_, new_n3600_, new_n3597_ ) -new_n3617_ = OR ( new_n3596_, new_n3315_ ) -new_n3618_ = NAND ( new_n3317_, new_n2248_ ) -new_n3619_ = NAND ( new_n3577_, new_n3321_ ) -new_n3620_ = XNOR ( new_n3619_, new_n3618_ ) -new_n3621_ = NAND ( new_n3325_, new_n3318_ ) -new_n3622_ = NAND ( new_n3621_, new_n3324_ ) -new_n3623_ = OR ( new_n3325_, new_n3318_ ) -new_n3624_ = NAND ( new_n3623_, new_n3622_ ) -new_n3625_ = XOR ( new_n3624_, new_n3620_ ) -new_n3626_ = NAND ( new_n3625_, new_n3336_ ) -new_n3627_ = NAND ( new_n3353_, NET_250 ) -new_n3628_ = NAND ( new_n3577_, new_n3361_ ) -new_n3629_ = NAND ( new_n3364_, new_n2237_ ) -new_n3630_ = NAND ( new_n3366_, new_n2259_ ) -new_n3631_ = AND ( new_n3630_, new_n3629_, new_n3628_, new_n3614_ ) -NET_5997 = NAND ( new_n3631_, new_n3627_, new_n3626_, new_n3617_ ) -new_n3633_ = OR ( new_n3536_, new_n3402_ ) -new_n3634_ = NAND ( new_n3540_, new_n3416_ ) -new_n3635_ = OR ( new_n3544_, new_n3207_ ) -new_n3636_ = NAND ( new_n3514_, new_n2259_ ) -new_n3637_ = NAND ( new_n3636_, new_n3635_, new_n3634_, new_n3633_ ) -new_n3638_ = NAND ( new_n3637_, new_n3553_ ) -new_n3639_ = NAND ( new_n3552_, NET_129 ) -NET_5998 = NAND ( new_n3639_, new_n3638_ ) -new_n3641_ = NAND ( new_n3637_, new_n3559_ ) -new_n3642_ = NAND ( new_n3558_, NET_97 ) -NET_5999 = NAND ( new_n3642_, new_n3641_ ) -new_n3644_ = NAND ( new_n2759_, new_n1848_ ) -new_n3645_ = OR ( NET_309, new_n1320_ ) -new_n3646_ = OR ( new_n1399_, new_n1103_ ) -new_n3647_ = NAND ( new_n3646_, new_n3645_ ) -new_n3648_ = NAND ( new_n3647_, new_n2761_ ) -new_n3649_ = NAND ( new_n2678_, new_n1394_ ) -new_n3650_ = OR ( new_n3647_, new_n2678_ ) -new_n3651_ = NAND ( new_n3650_, new_n3649_ ) -new_n3652_ = OR ( new_n3651_, new_n2725_ ) -new_n3653_ = NAND ( new_n3652_, new_n3648_, new_n3644_ ) -new_n3654_ = XOR ( new_n3653_, new_n2743_ ) -new_n3655_ = OR ( new_n3651_, new_n2721_ ) -new_n3656_ = NAND ( new_n2726_, new_n1848_ ) -new_n3657_ = NAND ( new_n2728_, NET_378 ) -new_n3658_ = NAND ( new_n2731_, NET_410 ) -new_n3659_ = NAND ( new_n3658_, new_n3657_, new_n3656_, new_n3655_ ) -new_n3660_ = OR ( new_n3659_, new_n3654_ ) -new_n3661_ = NAND ( new_n3659_, new_n3654_ ) -new_n3662_ = NAND ( new_n3661_, new_n3660_ ) -new_n3663_ = NAND ( new_n3450_, new_n3446_ ) -new_n3664_ = NAND ( new_n3663_, new_n3447_ ) -new_n3665_ = XOR ( new_n3664_, new_n3662_ ) -new_n3666_ = NOR ( new_n3665_, new_n2810_ ) -new_n3667_ = NAND ( new_n2820_, new_n1858_ ) -new_n3668_ = NAND ( new_n2800_, NET_346 ) -new_n3669_ = NAND ( new_n2831_, new_n1838_ ) -new_n3670_ = NAND ( new_n3647_, new_n2825_ ) -new_n3671_ = OR ( new_n1569_, new_n1394_ ) -new_n3672_ = NAND ( new_n3671_, new_n3670_ ) -new_n3673_ = NAND ( new_n3672_, new_n2838_ ) -new_n3674_ = NAND ( new_n3673_, new_n3669_, new_n3668_, new_n3667_ ) -NET_6011 = OR ( new_n3674_, new_n3666_ ) -new_n3676_ = NOR ( new_n3665_, new_n2856_ ) -new_n3677_ = NAND ( new_n2859_, new_n1858_ ) -new_n3678_ = NAND ( new_n2854_, NET_378 ) -new_n3679_ = NAND ( new_n2862_, new_n1838_ ) -new_n3680_ = NAND ( new_n3672_, new_n2864_ ) -new_n3681_ = NAND ( new_n3680_, new_n3679_, new_n3678_, new_n3677_ ) -NET_6012 = OR ( new_n3681_, new_n3676_ ) -new_n3683_ = NOR ( new_n3665_, new_n2869_ ) -new_n3684_ = OR ( new_n1560_, new_n1842_ ) -new_n3685_ = NAND ( new_n1560_, NET_410 ) -new_n3686_ = NAND ( new_n3685_, new_n3684_ ) -new_n3687_ = XOR ( new_n3686_, new_n3647_ ) -new_n3688_ = NAND ( new_n3477_, new_n3472_ ) -new_n3689_ = NAND ( new_n3688_, new_n3433_ ) -new_n3690_ = OR ( new_n3477_, new_n3472_ ) -new_n3691_ = AND ( new_n3690_, new_n3689_ ) -new_n3692_ = OR ( new_n3691_, new_n3687_ ) -new_n3693_ = NAND ( new_n3691_, new_n3687_ ) -new_n3694_ = NAND ( new_n3693_, new_n3692_, new_n2877_ ) -new_n3695_ = NAND ( new_n3647_, new_n2893_ ) -new_n3696_ = OR ( new_n2871_, new_n1066_ ) -new_n3697_ = NAND ( NET_22559, NET_502 ) -new_n3698_ = NAND ( new_n3697_, new_n3696_, new_n3695_, new_n3694_ ) -NET_6013 = OR ( new_n3698_, new_n3683_ ) -new_n3700_ = NOR ( new_n3665_, new_n2909_ ) -new_n3701_ = NAND ( new_n2925_, new_n1844_ ) -new_n3702_ = NAND ( new_n3672_, new_n2927_ ) -new_n3703_ = OR ( new_n3651_, new_n2931_ ) -new_n3704_ = AND ( new_n3703_, new_n3702_, new_n3697_ ) -new_n3705_ = NAND ( new_n2935_, new_n1858_ ) -new_n3706_ = NAND ( new_n2937_, new_n1838_ ) -new_n3707_ = NAND ( new_n3706_, new_n3705_, new_n3704_, new_n3701_ ) -NET_6014 = OR ( new_n3707_, new_n3700_ ) -new_n3709_ = NAND ( NET_440, NET_195 ) -new_n3710_ = NAND ( new_n3709_, new_n3379_ ) -new_n3711_ = OR ( NET_440, NET_195 ) -new_n3712_ = NAND ( new_n3711_, new_n3710_ ) -new_n3713_ = XNOR ( NET_439, NET_194 ) -NET_6050 = XOR ( new_n3713_, new_n3712_ ) -new_n3715_ = OR ( new_n1078_, NET_472 ) -new_n3716_ = NOT ( NET_18 ) -new_n3717_ = OR ( new_n1078_, NET_227 ) -new_n3718_ = NAND ( new_n1078_, new_n1726_ ) -new_n3719_ = NAND ( new_n3718_, new_n3717_ ) -new_n3720_ = NOR ( new_n3719_, new_n3716_ ) -new_n3721_ = NOT ( new_n3720_ ) -new_n3722_ = NAND ( new_n3719_, new_n3716_ ) -new_n3723_ = NAND ( new_n3722_, new_n3721_ ) -new_n3724_ = NAND ( new_n3391_, new_n3388_ ) -new_n3725_ = NAND ( new_n3724_, new_n3723_, new_n3387_ ) -new_n3726_ = NAND ( new_n3724_, new_n3387_ ) -new_n3727_ = NAND ( new_n3726_, new_n3722_ ) -new_n3728_ = OR ( new_n3727_, new_n3720_ ) -new_n3729_ = NAND ( new_n3728_, new_n3725_ ) -new_n3730_ = NAND ( new_n3729_, new_n1078_ ) -new_n3731_ = NAND ( new_n3730_, new_n3715_ ) -new_n3732_ = OR ( new_n3731_, NET_275 ) -new_n3733_ = NAND ( new_n1127_, NET_47, NET_275 ) -new_n3734_ = OR ( new_n3071_, NET_46 ) -new_n3735_ = NAND ( new_n3734_, NET_47 ) -new_n3736_ = NAND ( new_n3735_, new_n1241_ ) -new_n3737_ = OR ( new_n3736_, new_n1129_ ) -NET_6055 = NAND ( new_n3737_, new_n3733_, new_n3732_ ) -new_n3739_ = OR ( new_n3596_, new_n3503_ ) -new_n3740_ = NAND ( new_n3625_, new_n3509_ ) -new_n3741_ = NAND ( new_n3516_, new_n2237_ ) -new_n3742_ = NAND ( new_n3498_, NET_163 ) -new_n3743_ = NAND ( new_n3360_, NET_250 ) -new_n3744_ = AND ( new_n3743_, new_n3742_, new_n3741_ ) -new_n3745_ = NOT ( new_n3525_ ) -new_n3746_ = NOR ( new_n3745_, new_n3498_ ) -new_n3747_ = NAND ( new_n3746_, new_n2259_ ) -new_n3748_ = OR ( new_n3578_, new_n3518_ ) -new_n3749_ = AND ( new_n3748_, new_n3747_ ) -NET_6056 = NAND ( new_n3749_, new_n3744_, new_n3740_, new_n3739_ ) -new_n3751_ = NAND ( new_n3729_, new_n1080_ ) -new_n3752_ = NAND ( new_n1078_, new_n2088_ ) -new_n3753_ = NAND ( new_n3752_, new_n3751_ ) -new_n3754_ = OR ( new_n3753_, NET_520 ) -new_n3755_ = NOT ( NET_292 ) -new_n3756_ = OR ( new_n1101_, new_n3755_ ) -new_n3757_ = OR ( new_n1325_, NET_291 ) -new_n3758_ = AND ( new_n3757_, NET_292 ) -new_n3759_ = OR ( new_n3758_, new_n1326_ ) -new_n3760_ = OR ( new_n3759_, new_n1143_ ) -NET_6067 = NAND ( new_n3760_, new_n3756_, new_n3754_ ) -new_n3762_ = OR ( new_n3665_, new_n2979_ ) -new_n3763_ = NAND ( new_n3672_, new_n2982_ ) -new_n3764_ = NAND ( new_n2975_, NET_410 ) -new_n3765_ = NAND ( new_n2930_, new_n1844_ ) -new_n3766_ = AND ( new_n3765_, new_n3764_, new_n3763_ ) -new_n3767_ = NAND ( new_n2984_, new_n1838_ ) -new_n3768_ = NAND ( new_n2998_, new_n1858_ ) -NET_6068 = NAND ( new_n3768_, new_n3767_, new_n3766_, new_n3762_ ) -new_n3770_ = NOR ( NET_439, NET_194 ) -new_n3771_ = OR ( new_n3770_, new_n3712_ ) -new_n3772_ = OR ( new_n1076_, NET_193 ) -new_n3773_ = NAND ( NET_439, NET_194 ) -new_n3774_ = OR ( NET_438, new_n1075_ ) -new_n3775_ = NAND ( new_n3774_, new_n3773_, new_n3772_, new_n3771_ ) -new_n3776_ = NOT ( new_n3770_ ) -new_n3777_ = NAND ( new_n3773_, new_n3712_ ) -new_n3778_ = NAND ( new_n3774_, new_n3772_ ) -new_n3779_ = NAND ( new_n3778_, new_n3777_, new_n3776_ ) -NET_6110 = AND ( new_n3779_, new_n3775_ ) -new_n3781_ = NAND ( new_n3229_, new_n2237_ ) -new_n3782_ = NAND ( new_n1304_, new_n1215_ ) -new_n3783_ = NOR ( NET_64, new_n1217_ ) -new_n3784_ = NOR ( new_n1219_, new_n1127_ ) -new_n3785_ = NOR ( new_n3784_, new_n3783_ ) -new_n3786_ = NOT ( new_n3785_ ) -new_n3787_ = OR ( new_n3786_, new_n1304_ ) -new_n3788_ = NAND ( new_n3787_, new_n3782_ ) -new_n3789_ = OR ( new_n3788_, new_n3231_ ) -new_n3790_ = NAND ( new_n3786_, new_n3233_ ) -new_n3791_ = NAND ( new_n3790_, new_n3789_, new_n3781_ ) -new_n3792_ = XOR ( new_n3791_, new_n3241_ ) -new_n3793_ = NAND ( new_n3583_, new_n2237_ ) -new_n3794_ = OR ( new_n3788_, new_n3219_ ) -new_n3795_ = OR ( new_n3222_, new_n2231_ ) -new_n3796_ = OR ( new_n3224_, new_n2233_ ) -new_n3797_ = NAND ( new_n3796_, new_n3795_, new_n3794_, new_n3793_ ) -new_n3798_ = OR ( new_n3797_, new_n3792_ ) -new_n3799_ = NAND ( new_n3797_, new_n3792_ ) -new_n3800_ = NAND ( new_n3799_, new_n3798_ ) -new_n3801_ = NAND ( new_n3594_, new_n3590_ ) -new_n3802_ = NAND ( new_n3801_, new_n3589_ ) -new_n3803_ = XOR ( new_n3802_, new_n3800_ ) -new_n3804_ = NOR ( new_n3803_, new_n3170_ ) -new_n3805_ = OR ( new_n1303_, new_n2231_ ) -new_n3806_ = NAND ( new_n1303_, NET_164 ) -new_n3807_ = NAND ( new_n3806_, new_n3805_ ) -new_n3808_ = XOR ( new_n3807_, new_n3786_ ) -new_n3809_ = OR ( new_n3608_, new_n3603_ ) -new_n3810_ = NAND ( new_n3809_, new_n3575_ ) -new_n3811_ = NAND ( new_n3608_, new_n3603_ ) -new_n3812_ = NAND ( new_n3811_, new_n3810_ ) -new_n3813_ = OR ( new_n3812_, new_n3808_ ) -new_n3814_ = NAND ( new_n3812_, new_n3808_ ) -new_n3815_ = NAND ( new_n3814_, new_n3813_, new_n3274_ ) -new_n3816_ = NAND ( new_n3786_, new_n3287_ ) -new_n3817_ = OR ( new_n3158_, new_n1057_ ) -new_n3818_ = NOT ( NET_269 ) -new_n3819_ = OR ( NET_275, new_n3818_ ) -new_n3820_ = NAND ( new_n3819_, new_n3817_, new_n3816_, new_n3815_ ) -NET_6116 = OR ( new_n3820_, new_n3804_ ) -new_n3822_ = OR ( new_n3803_, new_n3315_ ) -new_n3823_ = NAND ( new_n3317_, new_n2237_ ) -new_n3824_ = OR ( new_n3788_, new_n3322_ ) -new_n3825_ = XOR ( new_n3824_, new_n3823_ ) -new_n3826_ = NOR ( new_n3624_, new_n3619_ ) -new_n3827_ = OR ( new_n3826_, new_n3618_ ) -new_n3828_ = NAND ( new_n3624_, new_n3619_ ) -new_n3829_ = NAND ( new_n3828_, new_n3827_ ) -new_n3830_ = XNOR ( new_n3829_, new_n3825_ ) -new_n3831_ = NAND ( new_n3830_, new_n3336_ ) -new_n3832_ = NAND ( new_n3353_, new_n3818_ ) -new_n3833_ = NAND ( new_n3787_, new_n3782_, new_n3361_ ) -new_n3834_ = NAND ( new_n3364_, new_n2227_ ) -new_n3835_ = NAND ( new_n3366_, new_n2248_ ) -new_n3836_ = AND ( new_n3835_, new_n3834_, new_n3833_, new_n3819_ ) -NET_6117 = NAND ( new_n3836_, new_n3832_, new_n3831_, new_n3822_ ) -new_n3838_ = OR ( new_n3596_, new_n3536_ ) -new_n3839_ = NAND ( new_n3625_, new_n3540_ ) -new_n3840_ = NAND ( new_n3514_, new_n2237_ ) -new_n3841_ = NAND ( new_n3525_, new_n2259_ ) -new_n3842_ = NAND ( new_n3577_, new_n3543_ ) -new_n3843_ = AND ( new_n3842_, new_n3841_, new_n3840_ ) -new_n3844_ = NAND ( new_n3843_, new_n3839_, new_n3838_ ) -new_n3845_ = NAND ( new_n3844_, new_n3553_ ) -new_n3846_ = NAND ( new_n3552_, NET_131 ) -NET_6118 = NAND ( new_n3846_, new_n3845_ ) -new_n3848_ = NAND ( new_n3844_, new_n3559_ ) -new_n3849_ = NAND ( new_n3558_, NET_99 ) -NET_6119 = NAND ( new_n3849_, new_n3848_ ) -new_n3851_ = NAND ( new_n2285_, new_n2678_ ) -new_n3852_ = NOR ( NET_309, new_n2287_ ) -new_n3853_ = NOR ( new_n2289_, new_n1103_ ) -new_n3854_ = OR ( new_n3853_, new_n3852_ ) -new_n3855_ = OR ( new_n3854_, new_n2678_ ) -new_n3856_ = NAND ( new_n3855_, new_n3851_ ) -new_n3857_ = OR ( new_n3856_, new_n2721_ ) -new_n3858_ = NAND ( new_n2726_, new_n1838_ ) -new_n3859_ = NAND ( new_n2728_, NET_379 ) -new_n3860_ = NAND ( new_n2731_, NET_411 ) -new_n3861_ = NAND ( new_n3860_, new_n3859_, new_n3858_, new_n3857_ ) -new_n3862_ = NOT ( new_n1838_ ) -new_n3863_ = OR ( new_n2721_, new_n3862_ ) -new_n3864_ = NAND ( new_n3854_, new_n2761_ ) -new_n3865_ = OR ( new_n3856_, new_n2725_ ) -new_n3866_ = NAND ( new_n3865_, new_n3864_, new_n3863_ ) -new_n3867_ = XOR ( new_n3866_, new_n2743_ ) -new_n3868_ = NAND ( new_n3867_, new_n3861_ ) -new_n3869_ = OR ( new_n3867_, new_n3861_ ) -new_n3870_ = NAND ( new_n3869_, new_n3868_ ) -new_n3871_ = NAND ( new_n3664_, new_n3660_ ) -new_n3872_ = NAND ( new_n3871_, new_n3661_ ) -new_n3873_ = XOR ( new_n3872_, new_n3870_ ) -new_n3874_ = NOR ( new_n3873_, new_n2810_ ) -new_n3875_ = NAND ( new_n2820_, new_n1848_ ) -new_n3876_ = NAND ( new_n2800_, NET_347 ) -new_n3877_ = NAND ( new_n2831_, new_n1827_ ) -new_n3878_ = NAND ( new_n3854_, new_n2825_ ) -new_n3879_ = OR ( new_n2285_, new_n1569_ ) -new_n3880_ = NAND ( new_n3879_, new_n3878_ ) -new_n3881_ = NAND ( new_n3880_, new_n2838_ ) -new_n3882_ = NAND ( new_n3881_, new_n3877_, new_n3876_, new_n3875_ ) -NET_6133 = OR ( new_n3882_, new_n3874_ ) -new_n3884_ = NOR ( new_n3873_, new_n2856_ ) -new_n3885_ = NAND ( new_n2859_, new_n1848_ ) -new_n3886_ = NAND ( new_n2854_, NET_379 ) -new_n3887_ = NAND ( new_n2862_, new_n1827_ ) -new_n3888_ = NAND ( new_n3880_, new_n2864_ ) -new_n3889_ = NAND ( new_n3888_, new_n3887_, new_n3886_, new_n3885_ ) -NET_6134 = OR ( new_n3889_, new_n3884_ ) -new_n3891_ = NOR ( new_n3873_, new_n2869_ ) -new_n3892_ = OR ( new_n1560_, new_n1832_ ) -new_n3893_ = NAND ( new_n1560_, NET_411 ) -new_n3894_ = NAND ( new_n3893_, new_n3892_ ) -new_n3895_ = XOR ( new_n3894_, new_n3854_ ) -new_n3896_ = NAND ( new_n3691_, new_n3686_ ) -new_n3897_ = NAND ( new_n3896_, new_n3647_ ) -new_n3898_ = OR ( new_n3691_, new_n3686_ ) -new_n3899_ = AND ( new_n3898_, new_n3897_ ) -new_n3900_ = OR ( new_n3899_, new_n3895_ ) -new_n3901_ = NAND ( new_n3899_, new_n3895_ ) -new_n3902_ = NAND ( new_n3901_, new_n3900_, new_n2877_ ) -new_n3903_ = NAND ( new_n3854_, new_n2893_ ) -new_n3904_ = OR ( new_n2871_, new_n1150_ ) -new_n3905_ = OR ( NET_520, new_n1597_ ) -new_n3906_ = NAND ( new_n3905_, new_n3904_, new_n3903_, new_n3902_ ) -NET_6135 = OR ( new_n3906_, new_n3891_ ) -new_n3908_ = NOR ( new_n3873_, new_n2909_ ) -new_n3909_ = NAND ( new_n2925_, new_n1834_ ) -new_n3910_ = NAND ( new_n3880_, new_n2927_ ) -new_n3911_ = OR ( new_n3856_, new_n2931_ ) -new_n3912_ = AND ( new_n3911_, new_n3910_, new_n3905_ ) -new_n3913_ = NAND ( new_n2935_, new_n1848_ ) -new_n3914_ = NAND ( new_n2937_, new_n1827_ ) -new_n3915_ = NAND ( new_n3914_, new_n3913_, new_n3912_, new_n3909_ ) -NET_6136 = OR ( new_n3915_, new_n3908_ ) -new_n3917_ = OR ( new_n1078_, NET_473 ) -new_n3918_ = OR ( new_n1078_, NET_228 ) -new_n3919_ = NAND ( new_n1078_, new_n1714_ ) -new_n3920_ = NAND ( new_n3919_, new_n3918_ ) -new_n3921_ = NAND ( new_n3920_, NET_17 ) -new_n3922_ = OR ( new_n3920_, NET_17 ) -new_n3923_ = NAND ( new_n3922_, new_n3921_, new_n3727_, new_n3721_ ) -new_n3924_ = NOT ( NET_17 ) -new_n3925_ = NOR ( new_n3920_, new_n3924_ ) -new_n3926_ = NAND ( new_n3727_, new_n3721_ ) -new_n3927_ = NAND ( new_n3920_, new_n3924_ ) -new_n3928_ = NAND ( new_n3927_, new_n3926_ ) -new_n3929_ = OR ( new_n3928_, new_n3925_ ) -new_n3930_ = NAND ( new_n3929_, new_n3923_ ) -new_n3931_ = NAND ( new_n3930_, new_n1078_ ) -new_n3932_ = NAND ( new_n3931_, new_n3917_ ) -new_n3933_ = OR ( new_n3932_, NET_275 ) -new_n3934_ = NOT ( NET_48 ) -new_n3935_ = OR ( new_n1125_, new_n3934_ ) -new_n3936_ = XOR ( new_n1241_, new_n3934_ ) -new_n3937_ = OR ( new_n3936_, new_n1129_ ) -NET_6183 = NAND ( new_n3937_, new_n3935_, new_n3933_ ) -new_n3939_ = NOR ( new_n3803_, new_n3503_ ) -new_n3940_ = NAND ( new_n3830_, new_n3509_ ) -new_n3941_ = NAND ( new_n3516_, new_n2227_ ) -new_n3942_ = NAND ( new_n3498_, NET_164 ) -new_n3943_ = NAND ( new_n3360_, new_n3818_ ) -new_n3944_ = AND ( new_n3943_, new_n3942_, new_n3941_ ) -new_n3945_ = NAND ( new_n3746_, new_n2248_ ) -new_n3946_ = OR ( new_n3788_, new_n3518_ ) -new_n3947_ = NAND ( new_n3946_, new_n3945_, new_n3944_, new_n3940_ ) -NET_6184 = OR ( new_n3947_, new_n3939_ ) -new_n3949_ = NAND ( new_n3930_, new_n1080_ ) -new_n3950_ = NAND ( new_n1078_, new_n2075_ ) -new_n3951_ = NAND ( new_n3950_, new_n3949_ ) -new_n3952_ = OR ( new_n3951_, NET_520 ) -new_n3953_ = OR ( new_n1101_, new_n1314_ ) -new_n3954_ = XOR ( new_n1326_, NET_293 ) -new_n3955_ = OR ( new_n3954_, new_n1143_ ) -NET_6205 = NAND ( new_n3955_, new_n3953_, new_n3952_ ) -new_n3957_ = OR ( new_n3873_, new_n2979_ ) -new_n3958_ = NAND ( new_n3880_, new_n2982_ ) -new_n3959_ = NAND ( new_n2975_, NET_411 ) -new_n3960_ = NAND ( new_n2930_, new_n1834_ ) -new_n3961_ = AND ( new_n3960_, new_n3959_, new_n3958_ ) -new_n3962_ = NAND ( new_n2984_, new_n1827_ ) -new_n3963_ = NAND ( new_n2998_, new_n1848_ ) -NET_6206 = NAND ( new_n3963_, new_n3962_, new_n3961_, new_n3957_ ) -new_n3965_ = OR ( new_n1078_, NET_474 ) -new_n3966_ = NOT ( NET_16 ) -new_n3967_ = OR ( new_n1078_, NET_229 ) -new_n3968_ = NAND ( new_n1078_, new_n1702_ ) -new_n3969_ = NAND ( new_n3968_, new_n3967_ ) -new_n3970_ = OR ( new_n3969_, new_n3966_ ) -new_n3971_ = NAND ( new_n3969_, new_n3966_ ) -new_n3972_ = NAND ( new_n3971_, new_n3970_ ) -new_n3973_ = NOT ( new_n3925_ ) -new_n3974_ = NAND ( new_n3928_, new_n3973_ ) -new_n3975_ = XNOR ( new_n3974_, new_n3972_ ) -new_n3976_ = OR ( new_n3975_, new_n1080_ ) -new_n3977_ = NAND ( new_n3976_, new_n3965_ ) -new_n3978_ = OR ( new_n3977_, NET_275 ) -new_n3979_ = NOT ( NET_49 ) -new_n3980_ = OR ( new_n1125_, new_n3979_ ) -new_n3981_ = NOR ( new_n1241_, NET_48 ) -new_n3982_ = OR ( new_n3981_, new_n3979_ ) -new_n3983_ = NAND ( new_n3982_, new_n3162_ ) -new_n3984_ = OR ( new_n3983_, new_n1129_ ) -NET_6243 = NAND ( new_n3984_, new_n3980_, new_n3978_ ) -new_n3986_ = NAND ( new_n3229_, new_n2227_ ) -new_n3987_ = NAND ( new_n1381_, new_n1304_ ) -new_n3988_ = OR ( NET_64, new_n1383_ ) -new_n3989_ = OR ( new_n1388_, new_n1127_ ) -new_n3990_ = NAND ( new_n3989_, new_n3988_ ) -new_n3991_ = OR ( new_n3990_, new_n1304_ ) -new_n3992_ = NAND ( new_n3991_, new_n3987_ ) -new_n3993_ = OR ( new_n3992_, new_n3231_ ) -new_n3994_ = NAND ( new_n3990_, new_n3233_ ) -new_n3995_ = NAND ( new_n3994_, new_n3993_, new_n3986_ ) -new_n3996_ = XOR ( new_n3995_, new_n3241_ ) -new_n3997_ = NAND ( new_n3583_, new_n2227_ ) -new_n3998_ = OR ( new_n3992_, new_n3219_ ) -new_n3999_ = OR ( new_n3222_, new_n2219_ ) -new_n4000_ = OR ( new_n3224_, new_n2221_ ) -new_n4001_ = NAND ( new_n4000_, new_n3999_, new_n3998_, new_n3997_ ) -new_n4002_ = OR ( new_n4001_, new_n3996_ ) -new_n4003_ = NAND ( new_n4001_, new_n3996_ ) -new_n4004_ = NAND ( new_n4003_, new_n4002_ ) -new_n4005_ = NAND ( new_n3802_, new_n3798_ ) -new_n4006_ = NAND ( new_n4005_, new_n3799_ ) -new_n4007_ = XOR ( new_n4006_, new_n4004_ ) -new_n4008_ = OR ( new_n4007_, new_n3170_ ) -new_n4009_ = NOT ( new_n3990_ ) -new_n4010_ = OR ( new_n1303_, NET_133 ) -new_n4011_ = NAND ( new_n1303_, new_n2221_ ) -new_n4012_ = NAND ( new_n4011_, new_n4010_ ) -new_n4013_ = OR ( new_n4012_, new_n4009_ ) -new_n4014_ = NAND ( new_n4012_, new_n4009_ ) -new_n4015_ = NAND ( new_n4014_, new_n4013_ ) -new_n4016_ = NAND ( new_n3812_, new_n3807_ ) -new_n4017_ = NAND ( new_n4016_, new_n3785_ ) -new_n4018_ = OR ( new_n3812_, new_n3807_ ) -new_n4019_ = NAND ( new_n4018_, new_n4017_ ) -new_n4020_ = OR ( new_n4019_, new_n4015_ ) -new_n4021_ = NAND ( new_n4019_, new_n4015_ ) -new_n4022_ = NAND ( new_n4021_, new_n4020_, new_n3274_ ) -new_n4023_ = NAND ( new_n3990_, new_n3287_ ) -new_n4024_ = OR ( new_n3158_, new_n1065_ ) -new_n4025_ = NAND ( NET_22556, NET_257 ) -new_n4026_ = AND ( new_n4025_, new_n4024_, new_n4023_ ) -NET_6244 = NAND ( new_n4026_, new_n4022_, new_n4008_, new_n3600_ ) -new_n4028_ = NOR ( new_n3803_, new_n3536_ ) -new_n4029_ = NAND ( new_n3830_, new_n3540_ ) -new_n4030_ = NAND ( new_n3514_, new_n2227_ ) -new_n4031_ = NAND ( new_n3525_, new_n2248_ ) -new_n4032_ = OR ( new_n3788_, new_n3544_ ) -new_n4033_ = NAND ( new_n4032_, new_n4031_, new_n4030_, new_n4029_ ) -new_n4034_ = NOR ( new_n4033_, new_n4028_ ) -new_n4035_ = OR ( new_n4034_, new_n3552_ ) -new_n4036_ = NAND ( new_n3552_, NET_132 ) -NET_6246 = NAND ( new_n4036_, new_n4035_ ) -new_n4038_ = OR ( new_n4034_, new_n3558_ ) -new_n4039_ = NAND ( new_n3558_, NET_100 ) -NET_6247 = NAND ( new_n4039_, new_n4038_ ) -new_n4041_ = OR ( new_n3975_, new_n1078_ ) -new_n4042_ = NAND ( new_n1078_, new_n2062_ ) -new_n4043_ = NAND ( new_n4042_, new_n4041_ ) -new_n4044_ = OR ( new_n4043_, NET_520 ) -new_n4045_ = OR ( new_n1101_, new_n1315_ ) -new_n4046_ = NAND ( new_n1326_, new_n1314_ ) -new_n4047_ = NAND ( new_n4046_, NET_294 ) -new_n4048_ = NAND ( new_n4047_, new_n1327_ ) -new_n4049_ = OR ( new_n4048_, new_n1143_ ) -NET_6260 = NAND ( new_n4049_, new_n4045_, new_n4044_ ) -new_n4051_ = NOR ( new_n4007_, new_n3503_ ) -new_n4052_ = NAND ( new_n3317_, new_n2227_ ) -new_n4053_ = OR ( new_n3992_, new_n3322_ ) -new_n4054_ = XOR ( new_n4053_, new_n4052_ ) -new_n4055_ = NOR ( new_n3829_, new_n3824_ ) -new_n4056_ = OR ( new_n4055_, new_n3823_ ) -new_n4057_ = NAND ( new_n3829_, new_n3824_ ) -new_n4058_ = NAND ( new_n4057_, new_n4056_ ) -new_n4059_ = XNOR ( new_n4058_, new_n4054_ ) -new_n4060_ = NAND ( new_n4059_, new_n3509_ ) -new_n4061_ = NAND ( new_n3516_, new_n2215_ ) -new_n4062_ = NAND ( new_n3498_, NET_165 ) -new_n4063_ = NAND ( new_n3360_, new_n2224_ ) -new_n4064_ = AND ( new_n4063_, new_n4062_, new_n4061_ ) -new_n4065_ = NAND ( new_n3746_, new_n2237_ ) -new_n4066_ = OR ( new_n3992_, new_n3518_ ) -new_n4067_ = NAND ( new_n4066_, new_n4065_, new_n4064_, new_n4060_ ) -NET_6312 = OR ( new_n4067_, new_n4051_ ) -new_n4069_ = OR ( new_n4007_, new_n3315_ ) -new_n4070_ = NAND ( new_n4059_, new_n3336_ ) -new_n4071_ = NAND ( new_n3353_, new_n2224_ ) -new_n4072_ = NAND ( new_n3991_, new_n3987_, new_n3361_ ) -new_n4073_ = NAND ( new_n3364_, new_n2215_ ) -new_n4074_ = NAND ( new_n3366_, new_n2237_ ) -new_n4075_ = AND ( new_n4074_, new_n4073_, new_n4072_, new_n4025_ ) -NET_6313 = NAND ( new_n4075_, new_n4071_, new_n4070_, new_n4069_ ) -new_n4077_ = NAND ( new_n2759_, new_n1827_ ) -new_n4078_ = OR ( NET_309, new_n2416_ ) -new_n4079_ = OR ( new_n2420_, new_n1103_ ) -new_n4080_ = NAND ( new_n4079_, new_n4078_ ) -new_n4081_ = NAND ( new_n4080_, new_n2761_ ) -new_n4082_ = NAND ( new_n2414_, new_n2678_ ) -new_n4083_ = OR ( new_n4080_, new_n2678_ ) -new_n4084_ = NAND ( new_n4083_, new_n4082_ ) -new_n4085_ = OR ( new_n4084_, new_n2725_ ) -new_n4086_ = NAND ( new_n4085_, new_n4081_, new_n4077_ ) -new_n4087_ = NAND ( new_n4086_, new_n3087_ ) -new_n4088_ = OR ( new_n4086_, new_n3087_ ) -new_n4089_ = NAND ( new_n4088_, new_n4087_ ) -new_n4090_ = OR ( new_n4084_, new_n2721_ ) -new_n4091_ = NAND ( new_n2726_, new_n1827_ ) -new_n4092_ = NAND ( new_n2728_, NET_380 ) -new_n4093_ = NAND ( new_n2731_, NET_412 ) -new_n4094_ = NAND ( new_n4093_, new_n4092_, new_n4091_, new_n4090_ ) -new_n4095_ = NAND ( new_n4094_, new_n4089_ ) -new_n4096_ = NOT ( new_n4094_ ) -new_n4097_ = NAND ( new_n4096_, new_n4088_, new_n4087_ ) -new_n4098_ = NAND ( new_n4097_, new_n4095_ ) -new_n4099_ = NAND ( new_n3872_, new_n3869_ ) -new_n4100_ = NAND ( new_n4099_, new_n4098_, new_n3868_ ) -new_n4101_ = NAND ( new_n4099_, new_n3868_ ) -new_n4102_ = NAND ( new_n4101_, new_n4097_, new_n4095_ ) -new_n4103_ = NAND ( new_n4102_, new_n4100_ ) -new_n4104_ = OR ( new_n4103_, new_n2810_ ) -new_n4105_ = NAND ( new_n2820_, new_n1838_ ) -new_n4106_ = NAND ( new_n2800_, NET_348 ) -new_n4107_ = NAND ( new_n2831_, new_n1815_ ) -new_n4108_ = NAND ( new_n4080_, new_n2825_ ) -new_n4109_ = OR ( new_n2414_, new_n1569_ ) -new_n4110_ = NAND ( new_n4109_, new_n4108_ ) -new_n4111_ = NAND ( new_n4110_, new_n2838_ ) -new_n4112_ = AND ( new_n4111_, new_n4107_ ) -NET_6339 = NAND ( new_n4112_, new_n4106_, new_n4105_, new_n4104_ ) -new_n4114_ = OR ( new_n4103_, new_n2856_ ) -new_n4115_ = NOR ( new_n2858_, new_n3862_ ) -new_n4116_ = NOR ( new_n2855_, new_n1820_ ) -new_n4117_ = NOR ( new_n4116_, new_n4115_ ) -new_n4118_ = NAND ( new_n2862_, new_n1815_ ) -new_n4119_ = NAND ( new_n4110_, new_n2864_ ) -NET_6340 = NAND ( new_n4119_, new_n4118_, new_n4117_, new_n4114_ ) -new_n4121_ = OR ( new_n4103_, new_n2869_ ) -new_n4122_ = OR ( new_n1560_, new_n1820_ ) -new_n4123_ = NAND ( new_n1560_, NET_412 ) -new_n4124_ = NAND ( new_n4123_, new_n4122_ ) -new_n4125_ = XOR ( new_n4124_, new_n4080_ ) -new_n4126_ = NAND ( new_n3899_, new_n3894_ ) -new_n4127_ = NAND ( new_n4126_, new_n3854_ ) -new_n4128_ = OR ( new_n3899_, new_n3894_ ) -new_n4129_ = AND ( new_n4128_, new_n4127_ ) -new_n4130_ = OR ( new_n4129_, new_n4125_ ) -new_n4131_ = NAND ( new_n4129_, new_n4125_ ) -new_n4132_ = NAND ( new_n4131_, new_n4130_, new_n2877_ ) -new_n4133_ = NAND ( new_n4080_, new_n2893_ ) -new_n4134_ = NOR ( new_n2871_, new_n1194_ ) -new_n4135_ = NOR ( NET_520, new_n1822_ ) -new_n4136_ = NOR ( new_n4135_, new_n4134_ ) -NET_6341 = NAND ( new_n4136_, new_n4133_, new_n4132_, new_n4121_ ) -new_n4138_ = OR ( new_n4103_, new_n2909_ ) -new_n4139_ = NAND ( new_n2925_, new_n1823_ ) -new_n4140_ = AND ( new_n4110_, new_n2927_ ) -new_n4141_ = NOR ( new_n4084_, new_n2931_ ) -new_n4142_ = NOR ( new_n4141_, new_n4140_, new_n4135_ ) -new_n4143_ = NAND ( new_n2935_, new_n1838_ ) -new_n4144_ = NAND ( new_n2937_, new_n1815_ ) -new_n4145_ = AND ( new_n4144_, new_n4143_ ) -NET_6342 = NAND ( new_n4145_, new_n4142_, new_n4139_, new_n4138_ ) -new_n4147_ = OR ( new_n1078_, NET_475 ) -new_n4148_ = NOT ( NET_15 ) -new_n4149_ = OR ( new_n1078_, NET_230 ) -new_n4150_ = NAND ( new_n1078_, new_n1691_ ) -new_n4151_ = NAND ( new_n4150_, new_n4149_ ) -new_n4152_ = OR ( new_n4151_, new_n4148_ ) -new_n4153_ = NAND ( new_n4151_, new_n4148_ ) -new_n4154_ = NAND ( new_n4153_, new_n4152_ ) -new_n4155_ = NAND ( new_n3974_, new_n3971_ ) -new_n4156_ = NAND ( new_n4155_, new_n3970_ ) -new_n4157_ = XNOR ( new_n4156_, new_n4154_ ) -new_n4158_ = OR ( new_n4157_, new_n1080_ ) -new_n4159_ = NAND ( new_n4158_, new_n4147_ ) -new_n4160_ = OR ( new_n4159_, NET_275 ) -new_n4161_ = NOT ( NET_50 ) -new_n4162_ = OR ( new_n1125_, new_n4161_ ) -new_n4163_ = XOR ( new_n3162_, new_n4161_ ) -new_n4164_ = OR ( new_n4163_, new_n1129_ ) -NET_6392 = NAND ( new_n4164_, new_n4162_, new_n4160_ ) -new_n4166_ = NAND ( new_n3583_, new_n2215_ ) -new_n4167_ = NAND ( new_n1906_, new_n1304_ ) -new_n4168_ = NOR ( NET_64, new_n1908_ ) -new_n4169_ = NOR ( new_n1910_, new_n1127_ ) -new_n4170_ = OR ( new_n4169_, new_n4168_ ) -new_n4171_ = OR ( new_n4170_, new_n1304_ ) -new_n4172_ = NAND ( new_n4171_, new_n4167_ ) -new_n4173_ = OR ( new_n4172_, new_n3219_ ) -new_n4174_ = OR ( new_n3222_, new_n2207_ ) -new_n4175_ = OR ( new_n3224_, new_n2209_ ) -new_n4176_ = NAND ( new_n4175_, new_n4174_, new_n4173_, new_n4166_ ) -new_n4177_ = NAND ( new_n3229_, new_n2215_ ) -new_n4178_ = OR ( new_n4172_, new_n3231_ ) -new_n4179_ = NAND ( new_n4170_, new_n3233_ ) -new_n4180_ = NAND ( new_n4179_, new_n4178_, new_n4177_ ) -new_n4181_ = XOR ( new_n4180_, new_n3241_ ) -new_n4182_ = NAND ( new_n4181_, new_n4176_ ) -new_n4183_ = OR ( new_n4181_, new_n4176_ ) -new_n4184_ = NAND ( new_n4183_, new_n4182_ ) -new_n4185_ = NAND ( new_n4006_, new_n4002_ ) -new_n4186_ = NAND ( new_n4185_, new_n4003_ ) -new_n4187_ = XOR ( new_n4186_, new_n4184_ ) -new_n4188_ = NOR ( new_n4187_, new_n3170_ ) -new_n4189_ = NAND ( new_n4018_, new_n4017_, new_n4014_ ) -new_n4190_ = NAND ( new_n4189_, new_n4013_ ) -new_n4191_ = OR ( new_n1303_, new_n2207_ ) -new_n4192_ = NAND ( new_n1303_, NET_166 ) -new_n4193_ = NAND ( new_n4192_, new_n4191_ ) -new_n4194_ = XOR ( new_n4193_, new_n4190_ ) -new_n4195_ = NAND ( new_n4194_, new_n4170_ ) -new_n4196_ = OR ( new_n4194_, new_n4170_ ) -new_n4197_ = NAND ( new_n4196_, new_n4195_, new_n3274_ ) -new_n4198_ = NAND ( new_n4170_, new_n3287_ ) -new_n4199_ = OR ( new_n3158_, new_n1149_ ) -new_n4200_ = OR ( NET_275, new_n1964_ ) -new_n4201_ = NAND ( new_n4200_, new_n4199_, new_n4198_, new_n4197_ ) -NET_6393 = OR ( new_n4201_, new_n4188_ ) -new_n4203_ = NOR ( new_n4007_, new_n3536_ ) -new_n4204_ = NAND ( new_n4059_, new_n3540_ ) -new_n4205_ = NAND ( new_n3514_, new_n2215_ ) -new_n4206_ = NAND ( new_n3525_, new_n2237_ ) -new_n4207_ = OR ( new_n3992_, new_n3544_ ) -new_n4208_ = NAND ( new_n4207_, new_n4206_, new_n4205_, new_n4204_ ) -new_n4209_ = NOR ( new_n4208_, new_n4203_ ) -new_n4210_ = OR ( new_n4209_, new_n3552_ ) -new_n4211_ = NAND ( new_n3552_, NET_133 ) -NET_6395 = NAND ( new_n4211_, new_n4210_ ) -new_n4213_ = OR ( new_n4209_, new_n3558_ ) -new_n4214_ = NAND ( new_n3558_, NET_101 ) -NET_6396 = NAND ( new_n4214_, new_n4213_ ) -new_n4216_ = OR ( new_n4157_, new_n1078_ ) -new_n4217_ = NAND ( new_n1078_, new_n2049_ ) -new_n4218_ = NAND ( new_n4217_, new_n4216_ ) -new_n4219_ = OR ( new_n4218_, NET_520 ) -new_n4220_ = NOT ( NET_295 ) -new_n4221_ = OR ( new_n1101_, new_n4220_ ) -new_n4222_ = XOR ( new_n1327_, new_n4220_ ) -new_n4223_ = OR ( new_n4222_, new_n1143_ ) -NET_6403 = NAND ( new_n4223_, new_n4221_, new_n4219_ ) -new_n4225_ = OR ( new_n4103_, new_n2979_ ) -new_n4226_ = NAND ( new_n4110_, new_n2982_ ) -new_n4227_ = NAND ( new_n2975_, NET_412 ) -new_n4228_ = NAND ( new_n2930_, new_n1823_ ) -new_n4229_ = AND ( new_n4228_, new_n4227_, new_n4226_ ) -new_n4230_ = NAND ( new_n2984_, new_n1815_ ) -new_n4231_ = NAND ( new_n2998_, new_n1838_ ) -NET_6404 = NAND ( new_n4231_, new_n4230_, new_n4229_, new_n4225_ ) -new_n4233_ = NAND ( new_n2759_, new_n1815_ ) -new_n4234_ = NOR ( NET_309, new_n1318_ ) -new_n4235_ = NOR ( new_n2541_, new_n1103_ ) -new_n4236_ = OR ( new_n4235_, new_n4234_ ) -new_n4237_ = NAND ( new_n4236_, new_n2761_ ) -new_n4238_ = NAND ( new_n2538_, new_n2678_ ) -new_n4239_ = OR ( new_n4236_, new_n2678_ ) -new_n4240_ = NAND ( new_n4239_, new_n4238_ ) -new_n4241_ = OR ( new_n4240_, new_n2725_ ) -new_n4242_ = NAND ( new_n4241_, new_n4237_, new_n4233_ ) -new_n4243_ = XOR ( new_n4242_, new_n2743_ ) -new_n4244_ = OR ( new_n4240_, new_n2721_ ) -new_n4245_ = NAND ( new_n2726_, new_n1815_ ) -new_n4246_ = NAND ( new_n2728_, NET_381 ) -new_n4247_ = NAND ( new_n2731_, NET_413 ) -new_n4248_ = NAND ( new_n4247_, new_n4246_, new_n4245_, new_n4244_ ) -new_n4249_ = OR ( new_n4248_, new_n4243_ ) -new_n4250_ = NAND ( new_n4248_, new_n4243_ ) -new_n4251_ = NAND ( new_n4250_, new_n4249_ ) -new_n4252_ = NAND ( new_n4101_, new_n4097_ ) -new_n4253_ = NAND ( new_n4252_, new_n4095_ ) -new_n4254_ = XOR ( new_n4253_, new_n4251_ ) -new_n4255_ = NOR ( new_n4254_, new_n2810_ ) -new_n4256_ = NAND ( new_n2820_, new_n1827_ ) -new_n4257_ = NAND ( new_n2800_, NET_349 ) -new_n4258_ = NAND ( new_n2831_, new_n1804_ ) -new_n4259_ = NAND ( new_n4236_, new_n2825_ ) -new_n4260_ = OR ( new_n2538_, new_n1569_ ) -new_n4261_ = NAND ( new_n4260_, new_n4259_ ) -new_n4262_ = NAND ( new_n4261_, new_n2838_ ) -new_n4263_ = NAND ( new_n4262_, new_n4258_, new_n4257_, new_n4256_ ) -NET_6463 = OR ( new_n4263_, new_n4255_ ) -new_n4265_ = NOR ( new_n4254_, new_n2856_ ) -new_n4266_ = NAND ( new_n2859_, new_n1827_ ) -new_n4267_ = NAND ( new_n2854_, NET_381 ) -new_n4268_ = NAND ( new_n2862_, new_n1804_ ) -new_n4269_ = NAND ( new_n4261_, new_n2864_ ) -new_n4270_ = NAND ( new_n4269_, new_n4268_, new_n4267_, new_n4266_ ) -NET_6464 = OR ( new_n4270_, new_n4265_ ) -new_n4272_ = NOR ( new_n4254_, new_n2869_ ) -new_n4273_ = OR ( new_n1560_, new_n1809_ ) -new_n4274_ = NAND ( new_n1560_, NET_413 ) -new_n4275_ = NAND ( new_n4274_, new_n4273_ ) -new_n4276_ = XOR ( new_n4275_, new_n4236_ ) -new_n4277_ = NAND ( new_n4129_, new_n4124_ ) -new_n4278_ = NAND ( new_n4277_, new_n4080_ ) -new_n4279_ = OR ( new_n4129_, new_n4124_ ) -new_n4280_ = AND ( new_n4279_, new_n4278_ ) -new_n4281_ = OR ( new_n4280_, new_n4276_ ) -new_n4282_ = NAND ( new_n4280_, new_n4276_ ) -new_n4283_ = NAND ( new_n4282_, new_n4281_, new_n2877_ ) -new_n4284_ = NAND ( new_n4236_, new_n2893_ ) -new_n4285_ = OR ( new_n2871_, new_n1361_ ) -new_n4286_ = OR ( NET_520, new_n1596_ ) -new_n4287_ = NAND ( new_n4286_, new_n4285_, new_n4284_, new_n4283_ ) -NET_6465 = OR ( new_n4287_, new_n4272_ ) -new_n4289_ = NOR ( new_n4254_, new_n2909_ ) -new_n4290_ = NAND ( new_n2925_, new_n1811_ ) -new_n4291_ = OR ( new_n4240_, new_n2931_ ) -new_n4292_ = NAND ( new_n2937_, new_n1804_ ) -new_n4293_ = NAND ( new_n4261_, new_n2927_ ) -new_n4294_ = NAND ( new_n2935_, new_n1827_ ) -new_n4295_ = AND ( new_n4294_, new_n4293_, new_n4292_ ) -new_n4296_ = NAND ( new_n4295_, new_n4291_, new_n4290_, new_n4286_ ) -NET_6466 = OR ( new_n4296_, new_n4289_ ) -new_n4298_ = OR ( new_n1078_, NET_476 ) -new_n4299_ = NOT ( NET_14 ) -new_n4300_ = OR ( new_n1078_, NET_231 ) -new_n4301_ = NAND ( new_n1078_, new_n1679_ ) -new_n4302_ = NAND ( new_n4301_, new_n4300_ ) -new_n4303_ = OR ( new_n4302_, new_n4299_ ) -new_n4304_ = NAND ( new_n4302_, new_n4299_ ) -new_n4305_ = NAND ( new_n4304_, new_n4303_ ) -new_n4306_ = NAND ( new_n4156_, new_n4153_ ) -new_n4307_ = NAND ( new_n4306_, new_n4152_ ) -new_n4308_ = XNOR ( new_n4307_, new_n4305_ ) -new_n4309_ = OR ( new_n4308_, new_n1080_ ) -new_n4310_ = NAND ( new_n4309_, new_n4298_ ) -new_n4311_ = OR ( new_n4310_, NET_275 ) -new_n4312_ = NOT ( NET_51 ) -new_n4313_ = OR ( new_n1125_, new_n4312_ ) -new_n4314_ = OR ( new_n3162_, NET_50 ) -new_n4315_ = NAND ( new_n4314_, NET_51 ) -new_n4316_ = NAND ( new_n4315_, new_n3163_ ) -new_n4317_ = OR ( new_n4316_, new_n1129_ ) -NET_6516 = NAND ( new_n4317_, new_n4313_, new_n4311_ ) -new_n4319_ = OR ( new_n4187_, new_n3315_ ) -new_n4320_ = NAND ( new_n3317_, new_n2215_ ) -new_n4321_ = OR ( new_n4172_, new_n3322_ ) -new_n4322_ = XOR ( new_n4321_, new_n4320_ ) -new_n4323_ = NOR ( new_n4058_, new_n4053_ ) -new_n4324_ = OR ( new_n4323_, new_n4052_ ) -new_n4325_ = NAND ( new_n4058_, new_n4053_ ) -new_n4326_ = NAND ( new_n4325_, new_n4324_ ) -new_n4327_ = XNOR ( new_n4326_, new_n4322_ ) -new_n4328_ = NAND ( new_n4327_, new_n3336_ ) -new_n4329_ = NAND ( new_n3353_, new_n2212_ ) -new_n4330_ = NAND ( new_n4171_, new_n4167_, new_n3361_ ) -new_n4331_ = NAND ( new_n3364_, new_n2202_ ) -new_n4332_ = NAND ( new_n3366_, new_n2227_ ) -new_n4333_ = AND ( new_n4332_, new_n4331_, new_n4330_, new_n4200_ ) -NET_6517 = NAND ( new_n4333_, new_n4329_, new_n4328_, new_n4319_ ) -new_n4335_ = OR ( new_n4308_, new_n1078_ ) -new_n4336_ = NAND ( new_n1078_, new_n2036_ ) -new_n4337_ = NAND ( new_n4336_, new_n4335_ ) -new_n4338_ = OR ( new_n4337_, NET_520 ) -new_n4339_ = NOT ( NET_296 ) -new_n4340_ = OR ( new_n1101_, new_n4339_ ) -new_n4341_ = NOR ( new_n1327_, NET_295 ) -new_n4342_ = NOR ( new_n4341_, new_n4339_ ) -new_n4343_ = OR ( new_n4342_, new_n1328_ ) -new_n4344_ = OR ( new_n4343_, new_n1143_ ) -NET_6533 = NAND ( new_n4344_, new_n4340_, new_n4338_ ) -new_n4346_ = OR ( new_n4254_, new_n2979_ ) -new_n4347_ = NAND ( new_n4261_, new_n2982_ ) -new_n4348_ = NAND ( new_n2975_, NET_413 ) -new_n4349_ = NAND ( new_n2930_, new_n1811_ ) -new_n4350_ = AND ( new_n4349_, new_n4348_, new_n4347_ ) -new_n4351_ = NAND ( new_n2984_, new_n1804_ ) -new_n4352_ = NAND ( new_n2998_, new_n1827_ ) -NET_6534 = NAND ( new_n4352_, new_n4351_, new_n4350_, new_n4346_ ) -new_n4354_ = NOR ( new_n4187_, new_n3503_ ) -new_n4355_ = NAND ( new_n4327_, new_n3509_ ) -new_n4356_ = NAND ( new_n3516_, new_n2202_ ) -new_n4357_ = NAND ( new_n3498_, NET_166 ) -new_n4358_ = NAND ( new_n3360_, new_n2212_ ) -new_n4359_ = AND ( new_n4358_, new_n4357_, new_n4356_ ) -new_n4360_ = NAND ( new_n3746_, new_n2227_ ) -new_n4361_ = OR ( new_n4172_, new_n3518_ ) -new_n4362_ = NAND ( new_n4361_, new_n4360_, new_n4359_, new_n4355_ ) -NET_6576 = OR ( new_n4362_, new_n4354_ ) -new_n4364_ = NAND ( new_n3229_, new_n2202_ ) -new_n4365_ = NAND ( new_n2377_, new_n1304_ ) -new_n4366_ = OR ( NET_64, new_n2379_ ) -new_n4367_ = OR ( new_n2384_, new_n1127_ ) -new_n4368_ = NAND ( new_n4367_, new_n4366_ ) -new_n4369_ = OR ( new_n4368_, new_n1304_ ) -new_n4370_ = NAND ( new_n4369_, new_n4365_ ) -new_n4371_ = OR ( new_n4370_, new_n3231_ ) -new_n4372_ = NAND ( new_n4368_, new_n3233_ ) -new_n4373_ = NAND ( new_n4372_, new_n4371_, new_n4364_ ) -new_n4374_ = XOR ( new_n4373_, new_n3241_ ) -new_n4375_ = NAND ( new_n3583_, new_n2202_ ) -new_n4376_ = OR ( new_n4370_, new_n3219_ ) -new_n4377_ = OR ( new_n3222_, new_n2194_ ) -new_n4378_ = OR ( new_n3224_, new_n2196_ ) -new_n4379_ = NAND ( new_n4378_, new_n4377_, new_n4376_, new_n4375_ ) -new_n4380_ = NAND ( new_n4379_, new_n4374_ ) -new_n4381_ = OR ( new_n4379_, new_n4374_ ) -new_n4382_ = NAND ( new_n4381_, new_n4380_ ) -new_n4383_ = NAND ( new_n4186_, new_n4183_ ) -new_n4384_ = NAND ( new_n4383_, new_n4382_, new_n4182_ ) -new_n4385_ = NAND ( new_n4383_, new_n4182_ ) -new_n4386_ = NAND ( new_n4385_, new_n4381_, new_n4380_ ) -new_n4387_ = NAND ( new_n4386_, new_n4384_ ) -new_n4388_ = OR ( new_n4387_, new_n3170_ ) -new_n4389_ = OR ( new_n1303_, new_n2194_ ) -new_n4390_ = NAND ( new_n1303_, NET_167 ) -new_n4391_ = NAND ( new_n4390_, new_n4389_ ) -new_n4392_ = NOR ( new_n4391_, new_n4368_ ) -new_n4393_ = NOT ( new_n4392_ ) -new_n4394_ = NAND ( new_n4391_, new_n4368_ ) -new_n4395_ = NAND ( new_n4394_, new_n4393_ ) -new_n4396_ = NAND ( new_n4193_, new_n4170_ ) -new_n4397_ = NAND ( new_n4396_, new_n4189_, new_n4013_ ) -new_n4398_ = OR ( new_n4193_, new_n4170_ ) -new_n4399_ = NAND ( new_n4398_, new_n4397_ ) -new_n4400_ = NAND ( new_n4399_, new_n4395_ ) -new_n4401_ = OR ( new_n4399_, new_n4395_ ) -new_n4402_ = NAND ( new_n4401_, new_n4400_, new_n3274_ ) -new_n4403_ = NAND ( new_n4368_, new_n3287_ ) -new_n4404_ = OR ( new_n3158_, new_n1193_ ) -new_n4405_ = OR ( NET_275, new_n1963_ ) -new_n4406_ = AND ( new_n4405_, new_n4404_, new_n4403_ ) -NET_6577 = NAND ( new_n4406_, new_n4402_, new_n4388_ ) -new_n4408_ = NAND ( new_n2586_, new_n2678_ ) -new_n4409_ = OR ( NET_309, new_n1319_ ) -new_n4410_ = OR ( new_n2591_, new_n1103_ ) -new_n4411_ = NAND ( new_n4410_, new_n4409_ ) -new_n4412_ = OR ( new_n4411_, new_n2678_ ) -new_n4413_ = NAND ( new_n4412_, new_n4408_ ) -new_n4414_ = OR ( new_n4413_, new_n2725_ ) -new_n4415_ = NAND ( new_n4411_, new_n2761_ ) -new_n4416_ = NOT ( new_n1804_ ) -new_n4417_ = OR ( new_n2721_, new_n4416_ ) -new_n4418_ = NAND ( new_n4417_, new_n4415_, new_n4414_ ) -new_n4419_ = XOR ( new_n4418_, new_n2743_ ) -new_n4420_ = OR ( new_n4413_, new_n2721_ ) -new_n4421_ = NAND ( new_n2726_, new_n1804_ ) -new_n4422_ = NAND ( new_n2728_, NET_382 ) -new_n4423_ = NAND ( new_n2731_, NET_414 ) -new_n4424_ = NAND ( new_n4423_, new_n4422_, new_n4421_, new_n4420_ ) -new_n4425_ = OR ( new_n4424_, new_n4419_ ) -new_n4426_ = NAND ( new_n4424_, new_n4419_ ) -new_n4427_ = NAND ( new_n4426_, new_n4425_ ) -new_n4428_ = NAND ( new_n4253_, new_n4249_ ) -new_n4429_ = NAND ( new_n4428_, new_n4250_ ) -new_n4430_ = XOR ( new_n4429_, new_n4427_ ) -new_n4431_ = NOR ( new_n4430_, new_n2810_ ) -new_n4432_ = NAND ( new_n2820_, new_n1815_ ) -new_n4433_ = NAND ( new_n2800_, NET_350 ) -new_n4434_ = NAND ( new_n2831_, new_n1793_ ) -new_n4435_ = NAND ( new_n4411_, new_n2825_ ) -new_n4436_ = OR ( new_n2586_, new_n1569_ ) -new_n4437_ = NAND ( new_n4436_, new_n4435_ ) -new_n4438_ = NAND ( new_n4437_, new_n2838_ ) -new_n4439_ = NAND ( new_n4438_, new_n4434_, new_n4433_, new_n4432_ ) -NET_6592 = OR ( new_n4439_, new_n4431_ ) -new_n4441_ = NOR ( new_n4430_, new_n2856_ ) -new_n4442_ = NAND ( new_n2859_, new_n1815_ ) -new_n4443_ = NAND ( new_n2854_, NET_382 ) -new_n4444_ = NAND ( new_n2862_, new_n1793_ ) -new_n4445_ = NAND ( new_n4437_, new_n2864_ ) -new_n4446_ = NAND ( new_n4445_, new_n4444_, new_n4443_, new_n4442_ ) -NET_6593 = OR ( new_n4446_, new_n4441_ ) -new_n4448_ = NOR ( new_n4430_, new_n2869_ ) -new_n4449_ = OR ( new_n1560_, new_n1798_ ) -new_n4450_ = NAND ( new_n1560_, NET_414 ) -new_n4451_ = NAND ( new_n4450_, new_n4449_ ) -new_n4452_ = XOR ( new_n4451_, new_n4411_ ) -new_n4453_ = NAND ( new_n4280_, new_n4275_ ) -new_n4454_ = NAND ( new_n4453_, new_n4236_ ) -new_n4455_ = OR ( new_n4280_, new_n4275_ ) -new_n4456_ = AND ( new_n4455_, new_n4454_ ) -new_n4457_ = OR ( new_n4456_, new_n4452_ ) -new_n4458_ = NAND ( new_n4456_, new_n4452_ ) -new_n4459_ = NAND ( new_n4458_, new_n4457_, new_n2877_ ) -new_n4460_ = NAND ( new_n4411_, new_n2893_ ) -new_n4461_ = OR ( new_n2871_, new_n1471_ ) -new_n4462_ = OR ( NET_520, new_n1595_ ) -new_n4463_ = NAND ( new_n4462_, new_n4461_, new_n4460_, new_n4459_ ) -NET_6594 = OR ( new_n4463_, new_n4448_ ) -new_n4465_ = OR ( new_n4430_, new_n2909_ ) -new_n4466_ = NAND ( new_n2925_, new_n1800_ ) -new_n4467_ = NAND ( new_n4437_, new_n2927_ ) -new_n4468_ = OR ( new_n4413_, new_n2931_ ) -new_n4469_ = NAND ( new_n2937_, new_n1793_ ) -new_n4470_ = NAND ( new_n2935_, new_n1815_ ) -new_n4471_ = AND ( new_n4470_, new_n4469_, new_n4468_, new_n4462_ ) -NET_6595 = NAND ( new_n4471_, new_n4467_, new_n4466_, new_n4465_ ) -new_n4473_ = OR ( new_n1078_, NET_477 ) -new_n4474_ = NOT ( NET_13 ) -new_n4475_ = OR ( new_n1078_, NET_232 ) -new_n4476_ = NAND ( new_n1078_, new_n1666_ ) -new_n4477_ = NAND ( new_n4476_, new_n4475_ ) -new_n4478_ = OR ( new_n4477_, new_n4474_ ) -new_n4479_ = NAND ( new_n4477_, new_n4474_ ) -new_n4480_ = NAND ( new_n4479_, new_n4478_ ) -new_n4481_ = NAND ( new_n4307_, new_n4304_ ) -new_n4482_ = NAND ( new_n4481_, new_n4303_ ) -new_n4483_ = XNOR ( new_n4482_, new_n4480_ ) -new_n4484_ = OR ( new_n4483_, new_n1080_ ) -new_n4485_ = NAND ( new_n4484_, new_n4473_ ) -new_n4486_ = OR ( new_n4485_, NET_275 ) -new_n4487_ = OR ( new_n1125_, new_n3160_ ) -new_n4488_ = OR ( new_n3164_, new_n1129_ ) -NET_6648 = NAND ( new_n4488_, new_n4487_, new_n4486_ ) -new_n4490_ = NOR ( new_n4187_, new_n3536_ ) -new_n4491_ = NAND ( new_n4327_, new_n3540_ ) -new_n4492_ = NAND ( new_n3514_, new_n2202_ ) -new_n4493_ = NAND ( new_n3525_, new_n2227_ ) -new_n4494_ = OR ( new_n4172_, new_n3544_ ) -new_n4495_ = NAND ( new_n4494_, new_n4493_, new_n4492_, new_n4491_ ) -new_n4496_ = NOR ( new_n4495_, new_n4490_ ) -new_n4497_ = OR ( new_n4496_, new_n3552_ ) -new_n4498_ = NAND ( new_n3552_, NET_134 ) -NET_6650 = NAND ( new_n4498_, new_n4497_ ) -new_n4500_ = OR ( new_n4496_, new_n3558_ ) -new_n4501_ = NAND ( new_n3558_, NET_102 ) -NET_6651 = NAND ( new_n4501_, new_n4500_ ) -new_n4503_ = OR ( new_n4483_, new_n1078_ ) -new_n4504_ = NAND ( new_n1078_, new_n2021_ ) -new_n4505_ = NAND ( new_n4504_, new_n4503_ ) -new_n4506_ = OR ( new_n4505_, NET_520 ) -new_n4507_ = OR ( new_n1101_, new_n1312_ ) -new_n4508_ = OR ( new_n2692_, new_n1143_ ) -NET_6663 = NAND ( new_n4508_, new_n4507_, new_n4506_ ) -new_n4510_ = OR ( new_n4430_, new_n2979_ ) -new_n4511_ = NAND ( new_n4437_, new_n2982_ ) -new_n4512_ = NAND ( new_n2975_, NET_414 ) -new_n4513_ = NAND ( new_n2930_, new_n1800_ ) -new_n4514_ = AND ( new_n4513_, new_n4512_, new_n4511_ ) -new_n4515_ = NAND ( new_n2984_, new_n1793_ ) -new_n4516_ = NAND ( new_n2998_, new_n1815_ ) -NET_6664 = NAND ( new_n4516_, new_n4515_, new_n4514_, new_n4510_ ) -new_n4518_ = NAND ( new_n3229_, new_n2189_ ) -new_n4519_ = NAND ( new_n2519_, new_n1304_ ) -new_n4520_ = NOR ( NET_64, new_n2521_ ) -new_n4521_ = NOR ( new_n2523_, new_n1127_ ) -new_n4522_ = OR ( new_n4521_, new_n4520_ ) -new_n4523_ = OR ( new_n4522_, new_n1304_ ) -new_n4524_ = NAND ( new_n4523_, new_n4519_ ) -new_n4525_ = OR ( new_n4524_, new_n3231_ ) -new_n4526_ = NAND ( new_n4522_, new_n3233_ ) -new_n4527_ = NAND ( new_n4526_, new_n4525_, new_n4518_ ) -new_n4528_ = XOR ( new_n4527_, new_n3241_ ) -new_n4529_ = NAND ( new_n3583_, new_n2189_ ) -new_n4530_ = OR ( new_n4524_, new_n3219_ ) -new_n4531_ = OR ( new_n3222_, new_n2181_ ) -new_n4532_ = OR ( new_n3224_, new_n2183_ ) -new_n4533_ = NAND ( new_n4532_, new_n4531_, new_n4530_, new_n4529_ ) -new_n4534_ = OR ( new_n4533_, new_n4528_ ) -new_n4535_ = NAND ( new_n4533_, new_n4528_ ) -new_n4536_ = NAND ( new_n4535_, new_n4534_ ) -new_n4537_ = NAND ( new_n4385_, new_n4381_ ) -new_n4538_ = NAND ( new_n4537_, new_n4380_ ) -new_n4539_ = XOR ( new_n4538_, new_n4536_ ) -new_n4540_ = NOR ( new_n4539_, new_n3170_ ) -new_n4541_ = OR ( new_n1303_, new_n2181_ ) -new_n4542_ = NAND ( new_n1303_, NET_168 ) -new_n4543_ = NAND ( new_n4542_, new_n4541_ ) -new_n4544_ = XOR ( new_n4543_, new_n4522_ ) -new_n4545_ = OR ( new_n4399_, new_n4392_ ) -new_n4546_ = NAND ( new_n4545_, new_n4394_ ) -new_n4547_ = NAND ( new_n4546_, new_n4544_ ) -new_n4548_ = OR ( new_n4546_, new_n4544_ ) -new_n4549_ = NAND ( new_n4548_, new_n4547_, new_n3274_ ) -new_n4550_ = NAND ( new_n4522_, new_n3287_ ) -new_n4551_ = OR ( new_n3158_, new_n1360_ ) -new_n4552_ = OR ( NET_275, new_n1962_ ) -new_n4553_ = NAND ( new_n4552_, new_n4551_, new_n4550_, new_n4549_ ) -NET_6705 = OR ( new_n4553_, new_n4540_ ) -new_n4555_ = NAND ( new_n2622_, new_n2678_ ) -new_n4556_ = NOR ( NET_309, new_n2624_ ) -new_n4557_ = NOR ( new_n2626_, new_n1103_ ) -new_n4558_ = OR ( new_n4557_, new_n4556_ ) -new_n4559_ = OR ( new_n4558_, new_n2678_ ) -new_n4560_ = NAND ( new_n4559_, new_n4555_ ) -new_n4561_ = OR ( new_n4560_, new_n2721_ ) -new_n4562_ = NAND ( new_n2726_, new_n1793_ ) -new_n4563_ = NAND ( new_n2728_, NET_383 ) -new_n4564_ = NAND ( new_n2731_, NET_415 ) -new_n4565_ = NAND ( new_n4564_, new_n4563_, new_n4562_, new_n4561_ ) -new_n4566_ = OR ( new_n4560_, new_n2725_ ) -new_n4567_ = NAND ( new_n4558_, new_n2761_ ) -new_n4568_ = NOT ( new_n1793_ ) -new_n4569_ = OR ( new_n2721_, new_n4568_ ) -new_n4570_ = NAND ( new_n4569_, new_n4567_, new_n4566_ ) -new_n4571_ = XOR ( new_n4570_, new_n2743_ ) -new_n4572_ = NAND ( new_n4571_, new_n4565_ ) -new_n4573_ = OR ( new_n4571_, new_n4565_ ) -new_n4574_ = NAND ( new_n4573_, new_n4572_ ) -new_n4575_ = NAND ( new_n4429_, new_n4425_ ) -new_n4576_ = NAND ( new_n4575_, new_n4426_ ) -new_n4577_ = XOR ( new_n4576_, new_n4574_ ) -new_n4578_ = NOR ( new_n4577_, new_n2810_ ) -new_n4579_ = NAND ( new_n4558_, new_n2825_ ) -new_n4580_ = OR ( new_n2622_, new_n1569_ ) -new_n4581_ = NAND ( new_n4580_, new_n4579_ ) -new_n4582_ = NAND ( new_n4581_, new_n2838_ ) -new_n4583_ = NAND ( new_n2831_, new_n1781_ ) -new_n4584_ = NAND ( new_n2820_, new_n1804_ ) -new_n4585_ = NAND ( new_n2800_, NET_351 ) -new_n4586_ = NAND ( new_n4585_, new_n4584_, new_n4583_, new_n4582_ ) -NET_6721 = OR ( new_n4586_, new_n4578_ ) -new_n4588_ = NOR ( new_n4577_, new_n2856_ ) -new_n4589_ = NAND ( new_n4581_, new_n2864_ ) -new_n4590_ = NAND ( new_n2862_, new_n1781_ ) -new_n4591_ = OR ( new_n2858_, new_n4416_ ) -new_n4592_ = NAND ( new_n2854_, NET_383 ) -new_n4593_ = NAND ( new_n4592_, new_n4591_, new_n4590_, new_n4589_ ) -NET_6722 = OR ( new_n4593_, new_n4588_ ) -new_n4595_ = OR ( new_n4577_, new_n2909_ ) -new_n4596_ = OR ( new_n4560_, new_n2931_ ) -new_n4597_ = NAND ( new_n2937_, new_n1781_ ) -new_n4598_ = OR ( NET_520, new_n1788_ ) -new_n4599_ = NAND ( new_n2935_, new_n1804_ ) -new_n4600_ = AND ( new_n4599_, new_n4598_, new_n4597_, new_n4596_ ) -new_n4601_ = NAND ( new_n4581_, new_n2927_ ) -new_n4602_ = NAND ( new_n2925_, new_n1789_ ) -NET_6723 = NAND ( new_n4602_, new_n4601_, new_n4600_, new_n4595_ ) -new_n4604_ = OR ( new_n1078_, NET_478 ) -new_n4605_ = OR ( new_n1078_, NET_233 ) -new_n4606_ = NAND ( new_n1078_, new_n1656_ ) -new_n4607_ = NAND ( new_n4606_, new_n4605_ ) -new_n4608_ = XOR ( new_n4607_, NET_12 ) -new_n4609_ = NAND ( new_n4482_, new_n4479_ ) -new_n4610_ = NAND ( new_n4609_, new_n4478_ ) -new_n4611_ = XNOR ( new_n4610_, new_n4608_ ) -new_n4612_ = OR ( new_n4611_, new_n1080_ ) -new_n4613_ = NAND ( new_n4612_, new_n4604_ ) -new_n4614_ = OR ( new_n4613_, NET_275 ) -new_n4615_ = OR ( new_n1125_, new_n3180_ ) -new_n4616_ = OR ( new_n3184_, new_n1129_ ) -NET_6774 = NAND ( new_n4616_, new_n4615_, new_n4614_ ) -new_n4618_ = OR ( new_n4387_, new_n3315_ ) -new_n4619_ = NAND ( new_n3317_, new_n2202_ ) -new_n4620_ = OR ( new_n4370_, new_n3322_ ) -new_n4621_ = XOR ( new_n4620_, new_n4619_ ) -new_n4622_ = NOR ( new_n4326_, new_n4321_ ) -new_n4623_ = OR ( new_n4622_, new_n4320_ ) -new_n4624_ = NAND ( new_n4326_, new_n4321_ ) -new_n4625_ = NAND ( new_n4624_, new_n4623_ ) -new_n4626_ = XNOR ( new_n4625_, new_n4621_ ) -new_n4627_ = NAND ( new_n4626_, new_n3336_ ) -new_n4628_ = NAND ( new_n3353_, new_n2199_ ) -new_n4629_ = NAND ( new_n4369_, new_n4365_, new_n3361_ ) -new_n4630_ = NAND ( new_n3364_, new_n2189_ ) -new_n4631_ = NAND ( new_n3366_, new_n2215_ ) -new_n4632_ = AND ( new_n4631_, new_n4630_, new_n4629_, new_n4405_ ) -NET_6775 = NAND ( new_n4632_, new_n4628_, new_n4627_, new_n4618_ ) -new_n4634_ = OR ( new_n4611_, new_n1078_ ) -new_n4635_ = NAND ( new_n1078_, new_n2010_ ) -new_n4636_ = NAND ( new_n4635_, new_n4634_ ) -new_n4637_ = OR ( new_n4636_, NET_520 ) -new_n4638_ = OR ( new_n1101_, new_n1313_ ) -new_n4639_ = OR ( new_n2698_, new_n1143_ ) -NET_6799 = NAND ( new_n4639_, new_n4638_, new_n4637_ ) -new_n4641_ = OR ( new_n4577_, new_n2979_ ) -new_n4642_ = NAND ( new_n4581_, new_n2982_ ) -new_n4643_ = NAND ( new_n2975_, NET_415 ) -new_n4644_ = NAND ( new_n2930_, new_n1789_ ) -new_n4645_ = AND ( new_n4644_, new_n4643_, new_n4642_ ) -new_n4646_ = NAND ( new_n2984_, new_n1781_ ) -new_n4647_ = NAND ( new_n2998_, new_n1804_ ) -NET_6800 = NAND ( new_n4647_, new_n4646_, new_n4645_, new_n4641_ ) -new_n4649_ = OR ( new_n4387_, new_n3503_ ) -new_n4650_ = NAND ( new_n4626_, new_n3509_ ) -new_n4651_ = NAND ( new_n3516_, new_n2189_ ) -new_n4652_ = NAND ( new_n3498_, NET_167 ) -new_n4653_ = NAND ( new_n3360_, new_n2199_ ) -new_n4654_ = NAND ( new_n4653_, new_n4652_, new_n4651_ ) -new_n4655_ = AND ( new_n3746_, new_n2215_ ) -new_n4656_ = NOR ( new_n4370_, new_n3518_ ) -new_n4657_ = NOR ( new_n4656_, new_n4655_, new_n4654_ ) -NET_6850 = NAND ( new_n4657_, new_n4650_, new_n4649_ ) -new_n4659_ = NAND ( new_n3229_, new_n2176_ ) -new_n4660_ = NAND ( new_n2575_, new_n1304_ ) -new_n4661_ = OR ( NET_64, new_n2577_ ) -new_n4662_ = OR ( new_n2581_, new_n1127_ ) -new_n4663_ = NAND ( new_n4662_, new_n4661_ ) -new_n4664_ = OR ( new_n4663_, new_n1304_ ) -new_n4665_ = NAND ( new_n4664_, new_n4660_ ) -new_n4666_ = OR ( new_n4665_, new_n3231_ ) -new_n4667_ = NAND ( new_n4663_, new_n3233_ ) -new_n4668_ = NAND ( new_n4667_, new_n4666_, new_n4659_ ) -new_n4669_ = XOR ( new_n4668_, new_n3241_ ) -new_n4670_ = NAND ( new_n3583_, new_n2176_ ) -new_n4671_ = OR ( new_n4665_, new_n3219_ ) -new_n4672_ = OR ( new_n3222_, new_n2168_ ) -new_n4673_ = OR ( new_n3224_, new_n2170_ ) -new_n4674_ = NAND ( new_n4673_, new_n4672_, new_n4671_, new_n4670_ ) -new_n4675_ = OR ( new_n4674_, new_n4669_ ) -new_n4676_ = NAND ( new_n4674_, new_n4669_ ) -new_n4677_ = NAND ( new_n4676_, new_n4675_ ) -new_n4678_ = NAND ( new_n4538_, new_n4534_ ) -new_n4679_ = NAND ( new_n4678_, new_n4535_ ) -new_n4680_ = XOR ( new_n4679_, new_n4677_ ) -new_n4681_ = NOR ( new_n4680_, new_n3170_ ) -new_n4682_ = OR ( new_n1303_, new_n2168_ ) -new_n4683_ = NAND ( new_n1303_, NET_169 ) -new_n4684_ = NAND ( new_n4683_, new_n4682_ ) -new_n4685_ = XOR ( new_n4684_, new_n4663_ ) -new_n4686_ = OR ( new_n4546_, new_n4543_ ) -new_n4687_ = NAND ( new_n4686_, new_n4522_ ) -new_n4688_ = NAND ( new_n4546_, new_n4543_ ) -new_n4689_ = NAND ( new_n4688_, new_n4687_ ) -new_n4690_ = NAND ( new_n4689_, new_n4685_ ) -new_n4691_ = OR ( new_n4689_, new_n4685_ ) -new_n4692_ = NAND ( new_n4691_, new_n4690_, new_n3274_ ) -new_n4693_ = NAND ( new_n4663_, new_n3287_ ) -new_n4694_ = OR ( new_n3158_, new_n1470_ ) -new_n4695_ = NAND ( NET_22556, NET_266 ) -new_n4696_ = NAND ( new_n4695_, new_n4694_, new_n4693_, new_n4692_ ) -NET_6851 = OR ( new_n4696_, new_n4681_ ) -new_n4698_ = NOR ( new_n4577_, new_n2869_ ) -new_n4699_ = OR ( new_n1560_, new_n1786_ ) -new_n4700_ = NAND ( new_n1560_, NET_415 ) -new_n4701_ = NAND ( new_n4700_, new_n4699_ ) -new_n4702_ = XOR ( new_n4701_, new_n4558_ ) -new_n4703_ = NAND ( new_n4456_, new_n4451_ ) -new_n4704_ = NAND ( new_n4703_, new_n4411_ ) -new_n4705_ = OR ( new_n4456_, new_n4451_ ) -new_n4706_ = AND ( new_n4705_, new_n4704_ ) -new_n4707_ = OR ( new_n4706_, new_n4702_ ) -new_n4708_ = NAND ( new_n4706_, new_n4702_ ) -new_n4709_ = NAND ( new_n4708_, new_n4707_, new_n2877_ ) -new_n4710_ = NAND ( new_n4558_, new_n2893_ ) -new_n4711_ = NOT ( NET_448 ) -new_n4712_ = OR ( new_n2871_, new_n4711_ ) -new_n4713_ = NAND ( new_n4712_, new_n4710_, new_n4709_, new_n4598_ ) -NET_6862 = OR ( new_n4713_, new_n4698_ ) -new_n4715_ = OR ( new_n1078_, NET_479 ) -new_n4716_ = OR ( new_n1078_, NET_234 ) -new_n4717_ = NAND ( new_n1078_, new_n1645_ ) -new_n4718_ = NAND ( new_n4717_, new_n4716_ ) -new_n4719_ = XOR ( new_n4718_, NET_11 ) -new_n4720_ = NOT ( NET_12 ) -new_n4721_ = NAND ( new_n4607_, new_n4720_ ) -new_n4722_ = NAND ( new_n4721_, new_n4610_ ) -new_n4723_ = OR ( new_n4607_, new_n4720_ ) -new_n4724_ = NAND ( new_n4723_, new_n4722_ ) -new_n4725_ = XNOR ( new_n4724_, new_n4719_ ) -new_n4726_ = OR ( new_n4725_, new_n1080_ ) -new_n4727_ = NAND ( new_n4726_, new_n4715_ ) -new_n4728_ = OR ( new_n4727_, NET_275 ) -new_n4729_ = OR ( new_n1125_, new_n1233_ ) -new_n4730_ = NAND ( new_n1248_, new_n1128_ ) -NET_6909 = NAND ( new_n4730_, new_n4729_, new_n4728_ ) -new_n4732_ = OR ( new_n4387_, new_n3536_ ) -new_n4733_ = NAND ( new_n4626_, new_n3540_ ) -new_n4734_ = NAND ( new_n3514_, new_n2189_ ) -new_n4735_ = NAND ( new_n3525_, new_n2215_ ) -new_n4736_ = OR ( new_n4370_, new_n3544_ ) -new_n4737_ = AND ( new_n4736_, new_n4735_, new_n4734_ ) -new_n4738_ = NAND ( new_n4737_, new_n4733_, new_n4732_ ) -new_n4739_ = NAND ( new_n4738_, new_n3553_ ) -new_n4740_ = NAND ( new_n3552_, NET_135 ) -NET_6910 = NAND ( new_n4740_, new_n4739_ ) -new_n4742_ = NAND ( new_n4738_, new_n3559_ ) -new_n4743_ = NAND ( new_n3558_, NET_103 ) -NET_6911 = NAND ( new_n4743_, new_n4742_ ) -new_n4745_ = OR ( new_n4725_, new_n1078_ ) -new_n4746_ = NAND ( new_n1078_, new_n1999_ ) -new_n4747_ = NAND ( new_n4746_, new_n4745_ ) -new_n4748_ = OR ( new_n4747_, NET_520 ) -new_n4749_ = NAND ( NET_520, new_n1103_, NET_299 ) -new_n4750_ = NAND ( new_n1571_, new_n1104_ ) -NET_6929 = NAND ( new_n4750_, new_n4749_, new_n4748_ ) -new_n4752_ = NAND ( new_n4576_, new_n4573_ ) -new_n4753_ = NAND ( new_n2669_, new_n2678_ ) -new_n4754_ = OR ( NET_309, new_n2671_ ) -new_n4755_ = OR ( new_n2675_, new_n1103_ ) -new_n4756_ = NAND ( new_n4755_, new_n4754_ ) -new_n4757_ = OR ( new_n4756_, new_n2678_ ) -new_n4758_ = NAND ( new_n4757_, new_n4753_ ) -new_n4759_ = OR ( new_n4758_, new_n2725_ ) -new_n4760_ = NAND ( new_n4756_, new_n2761_ ) -new_n4761_ = NAND ( new_n2759_, new_n1781_ ) -new_n4762_ = NAND ( new_n4761_, new_n4760_, new_n4759_ ) -new_n4763_ = NAND ( new_n4762_, new_n3087_ ) -new_n4764_ = OR ( new_n4762_, new_n3087_ ) -new_n4765_ = NAND ( new_n4764_, new_n4763_ ) -new_n4766_ = OR ( new_n4758_, new_n2721_ ) -new_n4767_ = NAND ( new_n2726_, new_n1781_ ) -new_n4768_ = NAND ( new_n2728_, NET_384 ) -new_n4769_ = NAND ( new_n2731_, NET_416 ) -new_n4770_ = NAND ( new_n4769_, new_n4768_, new_n4767_, new_n4766_ ) -new_n4771_ = NAND ( new_n4770_, new_n4765_ ) -new_n4772_ = NOT ( new_n4770_ ) -new_n4773_ = NAND ( new_n4772_, new_n4764_, new_n4763_ ) -new_n4774_ = NAND ( new_n4773_, new_n4771_ ) -new_n4775_ = NAND ( new_n4774_, new_n4752_, new_n4572_ ) -new_n4776_ = NAND ( new_n4752_, new_n4572_ ) -new_n4777_ = NAND ( new_n4776_, new_n4773_, new_n4771_ ) -new_n4778_ = NAND ( new_n4777_, new_n4775_ ) -new_n4779_ = OR ( new_n4778_, new_n2810_ ) -new_n4780_ = NAND ( new_n4756_, new_n2825_ ) -new_n4781_ = OR ( new_n2669_, new_n1569_ ) -new_n4782_ = NAND ( new_n4781_, new_n4780_ ) -new_n4783_ = NAND ( new_n4782_, new_n2838_ ) -new_n4784_ = NAND ( new_n2831_, new_n1769_ ) -new_n4785_ = NAND ( new_n2820_, new_n1793_ ) -new_n4786_ = NAND ( new_n2800_, NET_352 ) -new_n4787_ = AND ( new_n4786_, new_n4785_, new_n4784_ ) -NET_6930 = NAND ( new_n4787_, new_n4783_, new_n4779_ ) -new_n4789_ = OR ( new_n4778_, new_n2856_ ) -new_n4790_ = NAND ( new_n4782_, new_n2864_ ) -new_n4791_ = NAND ( new_n2862_, new_n1769_ ) -new_n4792_ = NOR ( new_n2858_, new_n4568_ ) -new_n4793_ = NOR ( new_n2855_, new_n1774_ ) -new_n4794_ = NOR ( new_n4793_, new_n4792_ ) -NET_6931 = NAND ( new_n4794_, new_n4791_, new_n4790_, new_n4789_ ) -new_n4796_ = OR ( new_n4778_, new_n2909_ ) -new_n4797_ = NAND ( new_n4782_, new_n2927_ ) -new_n4798_ = OR ( new_n4758_, new_n2931_ ) -new_n4799_ = NAND ( new_n2925_, new_n1777_ ) -new_n4800_ = NAND ( new_n2937_, new_n1769_ ) -new_n4801_ = NOR ( NET_520, new_n1776_ ) -new_n4802_ = NOT ( new_n4801_ ) -new_n4803_ = NAND ( new_n2935_, new_n1793_ ) -new_n4804_ = AND ( new_n4803_, new_n4802_, new_n4800_, new_n4799_ ) -NET_6932 = NAND ( new_n4804_, new_n4798_, new_n4797_, new_n4796_ ) -new_n4806_ = NAND ( new_n2613_, new_n1304_ ) -new_n4807_ = NOR ( NET_64, new_n2615_ ) -new_n4808_ = NOR ( new_n2617_, new_n1127_ ) -new_n4809_ = NOR ( new_n4808_, new_n4807_ ) -new_n4810_ = NOT ( new_n4809_ ) -new_n4811_ = OR ( new_n4810_, new_n1304_ ) -new_n4812_ = NAND ( new_n4811_, new_n4806_ ) -new_n4813_ = OR ( new_n4812_, new_n3219_ ) -new_n4814_ = NAND ( new_n3583_, new_n2163_ ) -new_n4815_ = OR ( new_n3222_, new_n2155_ ) -new_n4816_ = OR ( new_n3224_, new_n2157_ ) -new_n4817_ = NAND ( new_n4816_, new_n4815_, new_n4814_, new_n4813_ ) -new_n4818_ = OR ( new_n4812_, new_n3231_ ) -new_n4819_ = NAND ( new_n3229_, new_n2163_ ) -new_n4820_ = NAND ( new_n4810_, new_n3233_ ) -new_n4821_ = NAND ( new_n4820_, new_n4819_, new_n4818_ ) -new_n4822_ = XOR ( new_n4821_, new_n3241_ ) -new_n4823_ = NAND ( new_n4822_, new_n4817_ ) -new_n4824_ = OR ( new_n4822_, new_n4817_ ) -new_n4825_ = NAND ( new_n4824_, new_n4823_ ) -new_n4826_ = NAND ( new_n4679_, new_n4675_ ) -new_n4827_ = NAND ( new_n4826_, new_n4676_ ) -new_n4828_ = XOR ( new_n4827_, new_n4825_ ) -new_n4829_ = NOR ( new_n4828_, new_n3170_ ) -new_n4830_ = OR ( new_n1303_, new_n2155_ ) -new_n4831_ = NAND ( new_n1303_, NET_170 ) -new_n4832_ = NAND ( new_n4831_, new_n4830_ ) -new_n4833_ = XOR ( new_n4832_, new_n4810_ ) -new_n4834_ = OR ( new_n4689_, new_n4684_ ) -new_n4835_ = NAND ( new_n4834_, new_n4663_ ) -new_n4836_ = NAND ( new_n4689_, new_n4684_ ) -new_n4837_ = NAND ( new_n4836_, new_n4835_ ) -new_n4838_ = NAND ( new_n4837_, new_n4833_ ) -new_n4839_ = OR ( new_n4837_, new_n4833_ ) -new_n4840_ = NAND ( new_n4839_, new_n4838_, new_n3274_ ) -new_n4841_ = NAND ( new_n4810_, new_n3287_ ) -new_n4842_ = NAND ( new_n1308_, new_n1305_, NET_275, NET_203 ) -new_n4843_ = OR ( NET_275, new_n1961_ ) -new_n4844_ = NAND ( new_n4843_, new_n4842_, new_n4841_, new_n4840_ ) -NET_6979 = OR ( new_n4844_, new_n4829_ ) -new_n4846_ = OR ( new_n4778_, new_n2979_ ) -new_n4847_ = NAND ( new_n4782_, new_n2982_ ) -new_n4848_ = NAND ( new_n2998_, new_n1793_ ) -new_n4849_ = NAND ( new_n2984_, new_n1769_ ) -new_n4850_ = NAND ( new_n2975_, NET_416 ) -new_n4851_ = NAND ( new_n2930_, new_n1777_ ) -new_n4852_ = AND ( new_n4851_, new_n4850_, new_n4849_ ) -NET_6991 = NAND ( new_n4852_, new_n4848_, new_n4847_, new_n4846_ ) -new_n4854_ = OR ( new_n1078_, NET_480 ) -new_n4855_ = OR ( new_n1078_, NET_235 ) -new_n4856_ = NAND ( new_n1078_, new_n1588_ ) -new_n4857_ = NAND ( new_n4856_, new_n4855_ ) -new_n4858_ = XOR ( new_n4857_, NET_10 ) -new_n4859_ = NOT ( NET_11 ) -new_n4860_ = NAND ( new_n4718_, new_n4859_ ) -new_n4861_ = NAND ( new_n4860_, new_n4724_ ) -new_n4862_ = OR ( new_n4718_, new_n4859_ ) -new_n4863_ = NAND ( new_n4862_, new_n4861_ ) -new_n4864_ = XNOR ( new_n4863_, new_n4858_ ) -new_n4865_ = OR ( new_n4864_, new_n1080_ ) -new_n4866_ = NAND ( new_n4865_, new_n4854_ ) -new_n4867_ = OR ( new_n4866_, NET_275 ) -new_n4868_ = OR ( new_n1125_, new_n1252_ ) -new_n4869_ = OR ( new_n1256_, new_n1129_ ) -NET_7035 = NAND ( new_n4869_, new_n4868_, new_n4867_ ) -new_n4871_ = OR ( new_n4539_, new_n3315_ ) -new_n4872_ = NAND ( new_n3317_, new_n2189_ ) -new_n4873_ = OR ( new_n4524_, new_n3322_ ) -new_n4874_ = XOR ( new_n4873_, new_n4872_ ) -new_n4875_ = NOR ( new_n4625_, new_n4620_ ) -new_n4876_ = OR ( new_n4875_, new_n4619_ ) -new_n4877_ = NAND ( new_n4625_, new_n4620_ ) -new_n4878_ = NAND ( new_n4877_, new_n4876_ ) -new_n4879_ = XNOR ( new_n4878_, new_n4874_ ) -new_n4880_ = NAND ( new_n4879_, new_n3336_ ) -new_n4881_ = NAND ( new_n3353_, new_n2186_ ) -new_n4882_ = NAND ( new_n4523_, new_n4519_, new_n3361_ ) -new_n4883_ = NAND ( new_n3364_, new_n2176_ ) -new_n4884_ = NAND ( new_n3366_, new_n2202_ ) -new_n4885_ = AND ( new_n4884_, new_n4883_, new_n4882_, new_n4552_ ) -NET_7036 = NAND ( new_n4885_, new_n4881_, new_n4880_, new_n4871_ ) -new_n4887_ = OR ( new_n4864_, new_n1078_ ) -new_n4888_ = NAND ( new_n1078_, new_n1950_ ) -new_n4889_ = NAND ( new_n4888_, new_n4887_ ) -new_n4890_ = OR ( new_n4889_, NET_520 ) -new_n4891_ = OR ( new_n1101_, new_n1575_ ) -new_n4892_ = OR ( new_n1579_, new_n1143_ ) -NET_7048 = NAND ( new_n4892_, new_n4891_, new_n4890_ ) -new_n4894_ = NAND ( new_n3041_, new_n2678_ ) -new_n4895_ = NOR ( NET_309, new_n1316_ ) -new_n4896_ = NOR ( new_n3044_, new_n1103_ ) -new_n4897_ = OR ( new_n4896_, new_n4895_ ) -new_n4898_ = OR ( new_n4897_, new_n2678_ ) -new_n4899_ = NAND ( new_n4898_, new_n4894_ ) -new_n4900_ = OR ( new_n4899_, new_n2725_ ) -new_n4901_ = NAND ( new_n4897_, new_n2761_ ) -new_n4902_ = NOT ( new_n1769_ ) -new_n4903_ = OR ( new_n2721_, new_n4902_ ) -new_n4904_ = NAND ( new_n4903_, new_n4901_, new_n4900_ ) -new_n4905_ = XOR ( new_n4904_, new_n2743_ ) -new_n4906_ = OR ( new_n4899_, new_n2721_ ) -new_n4907_ = NAND ( new_n2726_, new_n1769_ ) -new_n4908_ = NAND ( new_n2728_, NET_385 ) -new_n4909_ = NAND ( new_n2731_, NET_417 ) -new_n4910_ = NAND ( new_n4909_, new_n4908_, new_n4907_, new_n4906_ ) -new_n4911_ = OR ( new_n4910_, new_n4905_ ) -new_n4912_ = NAND ( new_n4910_, new_n4905_ ) -new_n4913_ = NAND ( new_n4912_, new_n4911_ ) -new_n4914_ = NAND ( new_n4776_, new_n4773_ ) -new_n4915_ = NAND ( new_n4914_, new_n4771_ ) -new_n4916_ = XOR ( new_n4915_, new_n4913_ ) -new_n4917_ = NOR ( new_n4916_, new_n2810_ ) -new_n4918_ = NAND ( new_n4897_, new_n2825_ ) -new_n4919_ = OR ( new_n3041_, new_n1569_ ) -new_n4920_ = NAND ( new_n4919_, new_n4918_ ) -new_n4921_ = NAND ( new_n4920_, new_n2838_ ) -new_n4922_ = NAND ( new_n2831_, new_n1758_ ) -new_n4923_ = NAND ( new_n2820_, new_n1781_ ) -new_n4924_ = NAND ( new_n2800_, NET_353 ) -new_n4925_ = NAND ( new_n4924_, new_n4923_, new_n4922_, new_n4921_ ) -NET_7049 = OR ( new_n4925_, new_n4917_ ) -new_n4927_ = NOR ( new_n4916_, new_n2856_ ) -new_n4928_ = NAND ( new_n4920_, new_n2864_ ) -new_n4929_ = NAND ( new_n2862_, new_n1758_ ) -new_n4930_ = NAND ( new_n2859_, new_n1781_ ) -new_n4931_ = NAND ( new_n2854_, NET_385 ) -new_n4932_ = NAND ( new_n4931_, new_n4930_, new_n4929_, new_n4928_ ) -NET_7050 = OR ( new_n4932_, new_n4927_ ) -new_n4934_ = OR ( new_n4916_, new_n2909_ ) -new_n4935_ = NAND ( new_n4920_, new_n2927_ ) -new_n4936_ = OR ( new_n4899_, new_n2931_ ) -new_n4937_ = NAND ( new_n2925_, new_n1765_ ) -new_n4938_ = NAND ( new_n2937_, new_n1758_ ) -new_n4939_ = OR ( NET_520, new_n1594_ ) -new_n4940_ = NAND ( new_n2935_, new_n1781_ ) -new_n4941_ = AND ( new_n4940_, new_n4939_, new_n4938_, new_n4937_ ) -NET_7051 = NAND ( new_n4941_, new_n4936_, new_n4935_, new_n4934_ ) -new_n4943_ = NOR ( new_n4539_, new_n3503_ ) -new_n4944_ = NAND ( new_n4879_, new_n3509_ ) -new_n4945_ = NAND ( new_n3516_, new_n2176_ ) -new_n4946_ = NAND ( new_n3498_, NET_168 ) -new_n4947_ = NAND ( new_n3360_, new_n2186_ ) -new_n4948_ = AND ( new_n4947_, new_n4946_, new_n4945_ ) -new_n4949_ = NAND ( new_n3746_, new_n2202_ ) -new_n4950_ = OR ( new_n4524_, new_n3518_ ) -new_n4951_ = NAND ( new_n4950_, new_n4949_, new_n4948_, new_n4944_ ) -NET_7101 = OR ( new_n4951_, new_n4943_ ) -new_n4953_ = OR ( new_n4916_, new_n2979_ ) -new_n4954_ = NAND ( new_n4920_, new_n2982_ ) -new_n4955_ = NAND ( new_n2998_, new_n1781_ ) -new_n4956_ = NAND ( new_n2984_, new_n1758_ ) -new_n4957_ = NAND ( new_n2975_, NET_417 ) -new_n4958_ = NAND ( new_n2930_, new_n1765_ ) -new_n4959_ = AND ( new_n4958_, new_n4957_, new_n4956_ ) -NET_7119 = NAND ( new_n4959_, new_n4955_, new_n4954_, new_n4953_ ) -new_n4961_ = OR ( new_n4778_, new_n2869_ ) -new_n4962_ = OR ( new_n1560_, new_n1774_ ) -new_n4963_ = NAND ( new_n1560_, NET_416 ) -new_n4964_ = NAND ( new_n4963_, new_n4962_ ) -new_n4965_ = XOR ( new_n4964_, new_n4756_ ) -new_n4966_ = NAND ( new_n4706_, new_n4701_ ) -new_n4967_ = NAND ( new_n4966_, new_n4558_ ) -new_n4968_ = OR ( new_n4706_, new_n4701_ ) -new_n4969_ = AND ( new_n4968_, new_n4967_ ) -new_n4970_ = OR ( new_n4969_, new_n4965_ ) -new_n4971_ = NAND ( new_n4969_, new_n4965_ ) -new_n4972_ = NAND ( new_n4971_, new_n4970_, new_n2877_ ) -new_n4973_ = NAND ( new_n4756_, new_n2893_ ) -new_n4974_ = NOR ( new_n2871_, new_n2354_ ) -new_n4975_ = NOR ( new_n4974_, new_n4801_ ) -NET_7120 = NAND ( new_n4975_, new_n4973_, new_n4972_, new_n4961_ ) -new_n4977_ = OR ( new_n1078_, NET_481 ) -new_n4978_ = OR ( new_n1078_, NET_236 ) -new_n4979_ = NAND ( new_n1078_, new_n2292_ ) -new_n4980_ = NAND ( new_n4979_, new_n4978_ ) -new_n4981_ = XOR ( new_n4980_, NET_9 ) -new_n4982_ = NOT ( NET_10 ) -new_n4983_ = NAND ( new_n4857_, new_n4982_ ) -new_n4984_ = NAND ( new_n4983_, new_n4863_ ) -new_n4985_ = OR ( new_n4857_, new_n4982_ ) -new_n4986_ = NAND ( new_n4985_, new_n4984_ ) -new_n4987_ = XNOR ( new_n4986_, new_n4981_ ) -new_n4988_ = OR ( new_n4987_, new_n1080_ ) -new_n4989_ = NAND ( new_n4988_, new_n4977_ ) -new_n4990_ = OR ( new_n4989_, NET_275 ) -new_n4991_ = OR ( new_n1125_, new_n1278_ ) -new_n4992_ = OR ( new_n1287_, new_n1129_ ) -NET_7161 = NAND ( new_n4992_, new_n4991_, new_n4990_ ) -new_n4994_ = NAND ( new_n4827_, new_n4824_ ) -new_n4995_ = NOT ( new_n3231_ ) -new_n4996_ = NAND ( new_n2657_, new_n1304_ ) -new_n4997_ = OR ( NET_64, new_n2659_ ) -new_n4998_ = OR ( new_n2664_, new_n1127_ ) -new_n4999_ = NAND ( new_n4998_, new_n4997_ ) -new_n5000_ = OR ( new_n4999_, new_n1304_ ) -new_n5001_ = AND ( new_n5000_, new_n4996_ ) -new_n5002_ = NAND ( new_n5001_, new_n4995_ ) -new_n5003_ = NAND ( new_n3229_, new_n2150_ ) -new_n5004_ = NAND ( new_n4999_, new_n3233_ ) -new_n5005_ = NAND ( new_n5004_, new_n5003_, new_n5002_ ) -new_n5006_ = NAND ( new_n5005_, new_n3401_ ) -new_n5007_ = OR ( new_n5005_, new_n3401_ ) -new_n5008_ = AND ( new_n5007_, new_n5006_ ) -new_n5009_ = NAND ( new_n5001_, new_n3229_ ) -new_n5010_ = NAND ( new_n3583_, new_n2150_ ) -new_n5011_ = OR ( new_n3222_, new_n2142_ ) -new_n5012_ = OR ( new_n3224_, new_n2144_ ) -new_n5013_ = AND ( new_n5012_, new_n5011_, new_n5010_, new_n5009_ ) -new_n5014_ = OR ( new_n5013_, new_n5008_ ) -new_n5015_ = NAND ( new_n5013_, new_n5007_, new_n5006_ ) -new_n5016_ = NAND ( new_n5015_, new_n5014_ ) -new_n5017_ = NAND ( new_n5016_, new_n4994_, new_n4823_ ) -new_n5018_ = NAND ( new_n4994_, new_n4823_ ) -new_n5019_ = NAND ( new_n5018_, new_n5015_, new_n5014_ ) -new_n5020_ = NAND ( new_n5019_, new_n5017_ ) -new_n5021_ = OR ( new_n5020_, new_n3170_ ) -new_n5022_ = OR ( new_n1303_, new_n2142_ ) -new_n5023_ = NAND ( new_n1303_, NET_171 ) -new_n5024_ = NAND ( new_n5023_, new_n5022_ ) -new_n5025_ = NAND ( new_n5024_, new_n4999_ ) -new_n5026_ = NAND ( new_n4837_, new_n4810_ ) -new_n5027_ = NAND ( new_n5026_, new_n4831_, new_n4830_ ) -new_n5028_ = OR ( new_n4837_, new_n4810_ ) -new_n5029_ = OR ( new_n5024_, new_n4999_ ) -new_n5030_ = NAND ( new_n5029_, new_n5028_, new_n5027_, new_n5025_ ) -new_n5031_ = NAND ( new_n5028_, new_n4832_ ) -new_n5032_ = XNOR ( new_n5024_, new_n4999_ ) -new_n5033_ = NAND ( new_n5032_, new_n5031_, new_n5026_ ) -new_n5034_ = NAND ( new_n5033_, new_n5030_, new_n3274_ ) -new_n5035_ = NAND ( new_n4999_, new_n3287_ ) -new_n5036_ = OR ( new_n3158_, new_n2353_ ) -new_n5037_ = OR ( NET_275, new_n1960_ ) -new_n5038_ = AND ( new_n5037_, new_n5036_, new_n5035_ ) -NET_7162 = NAND ( new_n5038_, new_n5034_, new_n5021_ ) -new_n5040_ = NOR ( new_n4539_, new_n3536_ ) -new_n5041_ = NAND ( new_n4879_, new_n3540_ ) -new_n5042_ = OR ( new_n4524_, new_n3544_ ) -new_n5043_ = NAND ( new_n3525_, new_n2202_ ) -new_n5044_ = NAND ( new_n3514_, new_n2176_ ) -new_n5045_ = NAND ( new_n5044_, new_n5043_, new_n5042_, new_n5041_ ) -new_n5046_ = NOR ( new_n5045_, new_n5040_ ) -new_n5047_ = OR ( new_n5046_, new_n3552_ ) -new_n5048_ = NAND ( new_n3552_, NET_136 ) -NET_7163 = NAND ( new_n5048_, new_n5047_ ) -new_n5050_ = OR ( new_n5046_, new_n3558_ ) -new_n5051_ = NAND ( new_n3558_, NET_104 ) -NET_7164 = NAND ( new_n5051_, new_n5050_ ) -new_n5053_ = OR ( new_n4987_, new_n1078_ ) -new_n5054_ = NAND ( new_n1078_, new_n2317_ ) -new_n5055_ = NAND ( new_n5054_, new_n5053_ ) -new_n5056_ = OR ( new_n5055_, NET_520 ) -new_n5057_ = OR ( new_n1101_, new_n1310_ ) -new_n5058_ = OR ( new_n1331_, new_n1143_ ) -NET_7175 = NAND ( new_n5058_, new_n5057_, new_n5056_ ) -new_n5060_ = NAND ( new_n3079_, new_n2678_ ) -new_n5061_ = OR ( NET_309, new_n1317_ ) -new_n5062_ = OR ( new_n3084_, new_n1103_ ) -new_n5063_ = NAND ( new_n5062_, new_n5061_ ) -new_n5064_ = OR ( new_n5063_, new_n2678_ ) -new_n5065_ = NAND ( new_n5064_, new_n5060_ ) -new_n5066_ = OR ( new_n5065_, new_n2725_ ) -new_n5067_ = NAND ( new_n5063_, new_n2761_ ) -new_n5068_ = NAND ( new_n2759_, new_n1758_ ) -new_n5069_ = NAND ( new_n5068_, new_n5067_, new_n5066_ ) -new_n5070_ = XOR ( new_n5069_, new_n2743_ ) -new_n5071_ = OR ( new_n5065_, new_n2721_ ) -new_n5072_ = NAND ( new_n2726_, new_n1758_ ) -new_n5073_ = NAND ( new_n2728_, NET_386 ) -new_n5074_ = NAND ( new_n2731_, NET_418 ) -new_n5075_ = NAND ( new_n5074_, new_n5073_, new_n5072_, new_n5071_ ) -new_n5076_ = OR ( new_n5075_, new_n5070_ ) -new_n5077_ = NAND ( new_n5075_, new_n5070_ ) -new_n5078_ = NAND ( new_n5077_, new_n5076_ ) -new_n5079_ = NAND ( new_n4915_, new_n4911_ ) -new_n5080_ = NAND ( new_n5079_, new_n4912_ ) -new_n5081_ = XOR ( new_n5080_, new_n5078_ ) -new_n5082_ = NOR ( new_n5081_, new_n2810_ ) -new_n5083_ = NAND ( new_n5063_, new_n2825_ ) -new_n5084_ = OR ( new_n3079_, new_n1569_ ) -new_n5085_ = NAND ( new_n5084_, new_n5083_ ) -new_n5086_ = NAND ( new_n5085_, new_n2838_ ) -new_n5087_ = NAND ( new_n2831_, new_n1746_ ) -new_n5088_ = NAND ( new_n2820_, new_n1769_ ) -new_n5089_ = NAND ( new_n2800_, NET_354 ) -new_n5090_ = NAND ( new_n5089_, new_n5088_, new_n5087_, new_n5086_ ) -NET_7176 = OR ( new_n5090_, new_n5082_ ) -new_n5092_ = NOR ( new_n5081_, new_n2856_ ) -new_n5093_ = NAND ( new_n5085_, new_n2864_ ) -new_n5094_ = NAND ( new_n2862_, new_n1746_ ) -new_n5095_ = OR ( new_n2858_, new_n4902_ ) -new_n5096_ = NAND ( new_n2854_, NET_386 ) -new_n5097_ = NAND ( new_n5096_, new_n5095_, new_n5094_, new_n5093_ ) -NET_7177 = OR ( new_n5097_, new_n5092_ ) -new_n5099_ = OR ( new_n5081_, new_n2909_ ) -new_n5100_ = NAND ( new_n5085_, new_n2927_ ) -new_n5101_ = OR ( new_n5065_, new_n2931_ ) -new_n5102_ = NAND ( new_n2925_, new_n1754_ ) -new_n5103_ = NAND ( new_n2937_, new_n1746_ ) -new_n5104_ = OR ( NET_520, new_n1753_ ) -new_n5105_ = NAND ( new_n2935_, new_n1769_ ) -new_n5106_ = AND ( new_n5105_, new_n5104_, new_n5103_, new_n5102_ ) -NET_7178 = NAND ( new_n5106_, new_n5101_, new_n5100_, new_n5099_ ) -new_n5108_ = OR ( new_n5081_, new_n2979_ ) -new_n5109_ = NAND ( new_n5085_, new_n2982_ ) -new_n5110_ = NAND ( new_n2998_, new_n1769_ ) -new_n5111_ = NAND ( new_n2984_, new_n1746_ ) -new_n5112_ = NAND ( new_n2975_, NET_418 ) -new_n5113_ = NAND ( new_n2930_, new_n1754_ ) -new_n5114_ = AND ( new_n5113_, new_n5112_, new_n5111_ ) -NET_7240 = NAND ( new_n5114_, new_n5110_, new_n5109_, new_n5108_ ) -new_n5116_ = OR ( new_n1078_, NET_482 ) -new_n5117_ = OR ( new_n1078_, NET_237 ) -new_n5118_ = NAND ( new_n1078_, new_n2328_ ) -new_n5119_ = NAND ( new_n5118_, new_n5117_ ) -new_n5120_ = XOR ( new_n5119_, NET_8 ) -new_n5121_ = NOT ( NET_9 ) -new_n5122_ = NAND ( new_n4980_, new_n5121_ ) -new_n5123_ = NAND ( new_n5122_, new_n4986_ ) -new_n5124_ = OR ( new_n4980_, new_n5121_ ) -new_n5125_ = NAND ( new_n5124_, new_n5123_ ) -new_n5126_ = XNOR ( new_n5125_, new_n5120_ ) -new_n5127_ = OR ( new_n5126_, new_n1080_ ) -new_n5128_ = NAND ( new_n5127_, new_n5116_ ) -new_n5129_ = OR ( new_n5128_, NET_275 ) -new_n5130_ = NAND ( new_n1127_, NET_57, NET_275 ) -new_n5131_ = OR ( new_n1281_, new_n1129_ ) -NET_7277 = NAND ( new_n5131_, new_n5130_, new_n5129_ ) -new_n5133_ = NAND ( new_n3032_, new_n1304_ ) -new_n5134_ = NOR ( NET_64, new_n3034_ ) -new_n5135_ = NOR ( new_n3036_, new_n1127_ ) -new_n5136_ = OR ( new_n5135_, new_n5134_ ) -new_n5137_ = OR ( new_n5136_, new_n1304_ ) -new_n5138_ = AND ( new_n5137_, new_n5133_ ) -new_n5139_ = NAND ( new_n5138_, new_n4995_ ) -new_n5140_ = NAND ( new_n3229_, new_n2137_ ) -new_n5141_ = NAND ( new_n5136_, new_n3233_ ) -new_n5142_ = NAND ( new_n5141_, new_n5140_, new_n5139_ ) -new_n5143_ = XOR ( new_n5142_, new_n3241_ ) -new_n5144_ = NAND ( new_n5138_, new_n3229_ ) -new_n5145_ = NAND ( new_n3583_, new_n2137_ ) -new_n5146_ = OR ( new_n3222_, new_n2129_ ) -new_n5147_ = OR ( new_n3224_, new_n2131_ ) -new_n5148_ = NAND ( new_n5147_, new_n5146_, new_n5145_, new_n5144_ ) -new_n5149_ = OR ( new_n5148_, new_n5143_ ) -new_n5150_ = NAND ( new_n5148_, new_n5143_ ) -new_n5151_ = NAND ( new_n5150_, new_n5149_ ) -new_n5152_ = NAND ( new_n5018_, new_n5015_ ) -new_n5153_ = NAND ( new_n5152_, new_n5014_ ) -new_n5154_ = XOR ( new_n5153_, new_n5151_ ) -new_n5155_ = NOR ( new_n5154_, new_n3170_ ) -new_n5156_ = OR ( new_n1303_, new_n2129_ ) -new_n5157_ = NAND ( new_n1303_, NET_172 ) -new_n5158_ = NAND ( new_n5157_, new_n5156_ ) -new_n5159_ = XOR ( new_n5158_, new_n5136_ ) -new_n5160_ = NAND ( new_n5029_, new_n5028_, new_n5027_ ) -new_n5161_ = NAND ( new_n5160_, new_n5025_ ) -new_n5162_ = NAND ( new_n5161_, new_n5159_ ) -new_n5163_ = OR ( new_n5161_, new_n5159_ ) -new_n5164_ = NAND ( new_n5163_, new_n5162_, new_n3274_ ) -new_n5165_ = NAND ( new_n5136_, new_n3287_ ) -new_n5166_ = OR ( new_n3158_, new_n2499_ ) -new_n5167_ = NAND ( NET_22556, NET_251 ) -new_n5168_ = NAND ( new_n5167_, new_n5166_, new_n5165_, new_n5164_ ) -NET_7278 = OR ( new_n5168_, new_n5155_ ) -new_n5170_ = OR ( new_n4680_, new_n3315_ ) -new_n5171_ = NOT ( new_n2176_ ) -new_n5172_ = NOT ( new_n3317_ ) -new_n5173_ = NOR ( new_n5172_, new_n5171_ ) -new_n5174_ = OR ( new_n4665_, new_n3322_ ) -new_n5175_ = XNOR ( new_n5174_, new_n5173_ ) -new_n5176_ = NOR ( new_n4878_, new_n4873_ ) -new_n5177_ = OR ( new_n5176_, new_n4872_ ) -new_n5178_ = NAND ( new_n4878_, new_n4873_ ) -new_n5179_ = NAND ( new_n5178_, new_n5177_ ) -new_n5180_ = XNOR ( new_n5179_, new_n5175_ ) -new_n5181_ = NAND ( new_n5180_, new_n3336_ ) -new_n5182_ = NAND ( new_n3353_, new_n2173_ ) -new_n5183_ = NOT ( new_n4665_ ) -new_n5184_ = NAND ( new_n5183_, new_n3361_ ) -new_n5185_ = NAND ( new_n3364_, new_n2163_ ) -new_n5186_ = NAND ( new_n3366_, new_n2189_ ) -new_n5187_ = AND ( new_n5186_, new_n5185_, new_n5184_, new_n4695_ ) -NET_7279 = NAND ( new_n5187_, new_n5182_, new_n5181_, new_n5170_ ) -new_n5189_ = OR ( new_n5126_, new_n1078_ ) -new_n5190_ = NAND ( new_n1078_, new_n2303_ ) -new_n5191_ = NAND ( new_n5190_, new_n5189_ ) -new_n5192_ = OR ( new_n5191_, NET_520 ) -new_n5193_ = OR ( new_n1101_, new_n1337_ ) -new_n5194_ = OR ( new_n1353_, new_n1143_ ) -NET_7293 = NAND ( new_n5194_, new_n5193_, new_n5192_ ) -new_n5196_ = NAND ( new_n3423_, new_n2678_ ) -new_n5197_ = NOR ( NET_309, NET_291 ) -new_n5198_ = AND ( new_n3427_, NET_309 ) -new_n5199_ = NOR ( new_n5198_, new_n5197_ ) -new_n5200_ = OR ( new_n5199_, new_n2678_ ) -new_n5201_ = NAND ( new_n5200_, new_n5196_ ) -new_n5202_ = OR ( new_n5201_, new_n2725_ ) -new_n5203_ = NAND ( new_n5199_, new_n2761_ ) -new_n5204_ = NAND ( new_n2759_, new_n1746_ ) -new_n5205_ = NAND ( new_n5204_, new_n5203_, new_n5202_ ) -new_n5206_ = XOR ( new_n5205_, new_n2743_ ) -new_n5207_ = OR ( new_n5201_, new_n2721_ ) -new_n5208_ = NAND ( new_n2726_, new_n1746_ ) -new_n5209_ = NAND ( new_n2728_, NET_387 ) -new_n5210_ = NAND ( new_n2731_, NET_419 ) -new_n5211_ = NAND ( new_n5210_, new_n5209_, new_n5208_, new_n5207_ ) -new_n5212_ = NAND ( new_n5211_, new_n5206_ ) -new_n5213_ = OR ( new_n5211_, new_n5206_ ) -new_n5214_ = NAND ( new_n5213_, new_n5212_ ) -new_n5215_ = NAND ( new_n5080_, new_n5076_ ) -new_n5216_ = NAND ( new_n5215_, new_n5077_ ) -new_n5217_ = XOR ( new_n5216_, new_n5214_ ) -new_n5218_ = NOR ( new_n5217_, new_n2810_ ) -new_n5219_ = NAND ( new_n5199_, new_n2825_ ) -new_n5220_ = OR ( new_n3423_, new_n1569_ ) -new_n5221_ = NAND ( new_n5220_, new_n5219_ ) -new_n5222_ = NAND ( new_n5221_, new_n2838_ ) -new_n5223_ = NAND ( new_n2831_, new_n1734_ ) -new_n5224_ = NAND ( new_n2820_, new_n1758_ ) -new_n5225_ = NAND ( new_n2800_, NET_355 ) -new_n5226_ = NAND ( new_n5225_, new_n5224_, new_n5223_, new_n5222_ ) -NET_7294 = OR ( new_n5226_, new_n5218_ ) -new_n5228_ = NOR ( new_n5217_, new_n2856_ ) -new_n5229_ = NAND ( new_n5221_, new_n2864_ ) -new_n5230_ = NAND ( new_n2862_, new_n1734_ ) -new_n5231_ = NAND ( new_n2859_, new_n1758_ ) -new_n5232_ = NAND ( new_n2854_, NET_387 ) -new_n5233_ = NAND ( new_n5232_, new_n5231_, new_n5230_, new_n5229_ ) -NET_7295 = OR ( new_n5233_, new_n5228_ ) -new_n5235_ = OR ( new_n5217_, new_n2909_ ) -new_n5236_ = NAND ( new_n5221_, new_n2927_ ) -new_n5237_ = OR ( new_n5201_, new_n2931_ ) -new_n5238_ = NAND ( new_n2925_, new_n1742_ ) -new_n5239_ = NAND ( new_n2937_, new_n1734_ ) -new_n5240_ = NOR ( NET_520, new_n1741_ ) -new_n5241_ = NOT ( new_n5240_ ) -new_n5242_ = NAND ( new_n2935_, new_n1758_ ) -new_n5243_ = AND ( new_n5242_, new_n5241_, new_n5239_, new_n5238_ ) -NET_7296 = NAND ( new_n5243_, new_n5237_, new_n5236_, new_n5235_ ) -new_n5245_ = NOR ( new_n4680_, new_n3503_ ) -new_n5246_ = NAND ( new_n5180_, new_n3509_ ) -new_n5247_ = NAND ( new_n3516_, new_n2163_ ) -new_n5248_ = NAND ( new_n3498_, NET_169 ) -new_n5249_ = NAND ( new_n3360_, new_n2173_ ) -new_n5250_ = AND ( new_n5249_, new_n5248_, new_n5247_ ) -new_n5251_ = NAND ( new_n3746_, new_n2189_ ) -new_n5252_ = OR ( new_n4665_, new_n3518_ ) -new_n5253_ = NAND ( new_n5252_, new_n5251_, new_n5250_, new_n5246_ ) -NET_7343 = OR ( new_n5253_, new_n5245_ ) -new_n5255_ = OR ( new_n5217_, new_n2979_ ) -new_n5256_ = NAND ( new_n5221_, new_n2982_ ) -new_n5257_ = NAND ( new_n2998_, new_n1758_ ) -new_n5258_ = NAND ( new_n2984_, new_n1734_ ) -new_n5259_ = NAND ( new_n2975_, NET_419 ) -new_n5260_ = NAND ( new_n2930_, new_n1742_ ) -new_n5261_ = AND ( new_n5260_, new_n5259_, new_n5258_ ) -NET_7359 = NAND ( new_n5261_, new_n5257_, new_n5256_, new_n5255_ ) -new_n5263_ = NOR ( new_n4916_, new_n2869_ ) -new_n5264_ = OR ( new_n1560_, new_n1763_ ) -new_n5265_ = NAND ( new_n1560_, NET_417 ) -new_n5266_ = NAND ( new_n5265_, new_n5264_ ) -new_n5267_ = XOR ( new_n5266_, new_n4897_ ) -new_n5268_ = NAND ( new_n4969_, new_n4964_ ) -new_n5269_ = NAND ( new_n5268_, new_n4756_ ) -new_n5270_ = OR ( new_n4969_, new_n4964_ ) -new_n5271_ = AND ( new_n5270_, new_n5269_ ) -new_n5272_ = OR ( new_n5271_, new_n5267_ ) -new_n5273_ = NAND ( new_n5271_, new_n5267_ ) -new_n5274_ = NAND ( new_n5273_, new_n5272_, new_n2877_ ) -new_n5275_ = NAND ( new_n4897_, new_n2893_ ) -new_n5276_ = OR ( new_n2871_, new_n2497_ ) -new_n5277_ = NAND ( new_n5276_, new_n5275_, new_n5274_, new_n4939_ ) -NET_7360 = OR ( new_n5277_, new_n5263_ ) -new_n5279_ = OR ( new_n1078_, NET_483 ) -new_n5280_ = OR ( new_n1078_, NET_238 ) -new_n5281_ = NAND ( new_n1078_, new_n2341_ ) -new_n5282_ = NAND ( new_n5281_, new_n5280_ ) -new_n5283_ = XOR ( new_n5282_, NET_7 ) -new_n5284_ = NOT ( NET_8 ) -new_n5285_ = NAND ( new_n5119_, new_n5284_ ) -new_n5286_ = NAND ( new_n5285_, new_n5125_ ) -new_n5287_ = OR ( new_n5119_, new_n5284_ ) -new_n5288_ = NAND ( new_n5287_, new_n5286_ ) -new_n5289_ = XNOR ( new_n5288_, new_n5283_ ) -new_n5290_ = OR ( new_n5289_, new_n1080_ ) -new_n5291_ = NAND ( new_n5290_, new_n5279_ ) -new_n5292_ = OR ( new_n5291_, NET_275 ) -new_n5293_ = OR ( new_n1125_, new_n1264_ ) -new_n5294_ = NAND ( new_n1274_, new_n1128_ ) -NET_7396 = NAND ( new_n5294_, new_n5293_, new_n5292_ ) -new_n5296_ = NAND ( new_n3067_, new_n1304_ ) -new_n5297_ = OR ( NET_64, new_n3069_ ) -new_n5298_ = OR ( new_n3074_, new_n1127_ ) -new_n5299_ = NAND ( new_n5298_, new_n5297_ ) -new_n5300_ = OR ( new_n5299_, new_n1304_ ) -new_n5301_ = NAND ( new_n5300_, new_n5296_ ) -new_n5302_ = OR ( new_n5301_, new_n3231_ ) -new_n5303_ = NAND ( new_n3229_, new_n2124_ ) -new_n5304_ = NAND ( new_n5299_, new_n3233_ ) -new_n5305_ = NAND ( new_n5304_, new_n5303_, new_n5302_ ) -new_n5306_ = XOR ( new_n5305_, new_n3241_ ) -new_n5307_ = OR ( new_n5301_, new_n3219_ ) -new_n5308_ = NAND ( new_n3583_, new_n2124_ ) -new_n5309_ = OR ( new_n3222_, new_n2116_ ) -new_n5310_ = OR ( new_n3224_, new_n2118_ ) -new_n5311_ = NAND ( new_n5310_, new_n5309_, new_n5308_, new_n5307_ ) -new_n5312_ = OR ( new_n5311_, new_n5306_ ) -new_n5313_ = NAND ( new_n5311_, new_n5306_ ) -new_n5314_ = NAND ( new_n5313_, new_n5312_ ) -new_n5315_ = NAND ( new_n5153_, new_n5149_ ) -new_n5316_ = NAND ( new_n5315_, new_n5150_ ) -new_n5317_ = XOR ( new_n5316_, new_n5314_ ) -new_n5318_ = NOR ( new_n5317_, new_n3170_ ) -new_n5319_ = OR ( new_n1303_, new_n2116_ ) -new_n5320_ = NAND ( new_n1303_, NET_173 ) -new_n5321_ = NAND ( new_n5320_, new_n5319_ ) -new_n5322_ = XOR ( new_n5321_, new_n5299_ ) -new_n5323_ = OR ( new_n5161_, new_n5136_ ) -new_n5324_ = NAND ( new_n5323_, new_n5158_ ) -new_n5325_ = NAND ( new_n5161_, new_n5136_ ) -new_n5326_ = NAND ( new_n5325_, new_n5324_ ) -new_n5327_ = NAND ( new_n5326_, new_n5322_ ) -new_n5328_ = OR ( new_n5326_, new_n5322_ ) -new_n5329_ = NAND ( new_n5328_, new_n5327_, new_n3274_ ) -new_n5330_ = NAND ( new_n5299_, new_n3287_ ) -new_n5331_ = OR ( new_n3158_, new_n2556_ ) -new_n5332_ = OR ( NET_275, new_n1959_ ) -new_n5333_ = NAND ( new_n5332_, new_n5331_, new_n5330_, new_n5329_ ) -NET_7397 = OR ( new_n5333_, new_n5318_ ) -new_n5335_ = NOR ( new_n4680_, new_n3536_ ) -new_n5336_ = NAND ( new_n5180_, new_n3540_ ) -new_n5337_ = OR ( new_n4665_, new_n3544_ ) -new_n5338_ = NAND ( new_n3525_, new_n2189_ ) -new_n5339_ = NAND ( new_n3514_, new_n2163_ ) -new_n5340_ = NAND ( new_n5339_, new_n5338_, new_n5337_, new_n5336_ ) -new_n5341_ = NOR ( new_n5340_, new_n5335_ ) -new_n5342_ = OR ( new_n5341_, new_n3552_ ) -new_n5343_ = NAND ( new_n3552_, NET_137 ) -NET_7398 = NAND ( new_n5343_, new_n5342_ ) -new_n5345_ = OR ( new_n5341_, new_n3558_ ) -new_n5346_ = NAND ( new_n3558_, NET_105 ) -NET_7399 = NAND ( new_n5346_, new_n5345_ ) -new_n5348_ = OR ( new_n5289_, new_n1078_ ) -new_n5349_ = NAND ( new_n1078_, new_n2400_ ) -new_n5350_ = NAND ( new_n5349_, new_n5348_ ) -new_n5351_ = OR ( new_n5350_, NET_520 ) -new_n5352_ = OR ( new_n1101_, new_n1345_ ) -new_n5353_ = OR ( new_n1347_, new_n1143_ ) -NET_7411 = NAND ( new_n5353_, new_n5352_, new_n5351_ ) -new_n5355_ = NAND ( new_n3753_, new_n2678_ ) -new_n5356_ = OR ( NET_309, new_n3755_ ) -new_n5357_ = OR ( new_n3759_, new_n1103_ ) -new_n5358_ = NAND ( new_n5357_, new_n5356_ ) -new_n5359_ = OR ( new_n5358_, new_n2678_ ) -new_n5360_ = NAND ( new_n5359_, new_n5355_ ) -new_n5361_ = OR ( new_n5360_, new_n2725_ ) -new_n5362_ = NAND ( new_n5358_, new_n2761_ ) -new_n5363_ = NAND ( new_n2759_, new_n1734_ ) -new_n5364_ = NAND ( new_n5363_, new_n5362_, new_n5361_ ) -new_n5365_ = AND ( new_n5364_, new_n3087_ ) -new_n5366_ = NOR ( new_n5364_, new_n3087_ ) -new_n5367_ = OR ( new_n5360_, new_n2721_ ) -new_n5368_ = NAND ( new_n2726_, new_n1734_ ) -new_n5369_ = NAND ( new_n2728_, NET_388 ) -new_n5370_ = NAND ( new_n2731_, NET_420 ) -new_n5371_ = NAND ( new_n5370_, new_n5369_, new_n5368_, new_n5367_ ) -new_n5372_ = OR ( new_n5371_, new_n5366_, new_n5365_ ) -new_n5373_ = OR ( new_n5366_, new_n5365_ ) -new_n5374_ = NAND ( new_n5373_, new_n5371_ ) -new_n5375_ = NAND ( new_n5374_, new_n5372_ ) -new_n5376_ = NAND ( new_n5216_, new_n5213_ ) -new_n5377_ = NAND ( new_n5376_, new_n5212_ ) -new_n5378_ = XOR ( new_n5377_, new_n5375_ ) -new_n5379_ = NOR ( new_n5378_, new_n2810_ ) -new_n5380_ = NAND ( new_n5358_, new_n2825_ ) -new_n5381_ = OR ( new_n3753_, new_n1569_ ) -new_n5382_ = NAND ( new_n5381_, new_n5380_ ) -new_n5383_ = NAND ( new_n5382_, new_n2838_ ) -new_n5384_ = NAND ( new_n2831_, new_n1723_ ) -new_n5385_ = NAND ( new_n2820_, new_n1746_ ) -new_n5386_ = NAND ( new_n2800_, NET_356 ) -new_n5387_ = NAND ( new_n5386_, new_n5385_, new_n5384_, new_n5383_ ) -NET_7477 = OR ( new_n5387_, new_n5379_ ) -new_n5389_ = NOR ( new_n5378_, new_n2856_ ) -new_n5390_ = NAND ( new_n5382_, new_n2864_ ) -new_n5391_ = NAND ( new_n2862_, new_n1723_ ) -new_n5392_ = NAND ( new_n2859_, new_n1746_ ) -new_n5393_ = NAND ( new_n2854_, NET_388 ) -new_n5394_ = NAND ( new_n5393_, new_n5392_, new_n5391_, new_n5390_ ) -NET_7478 = OR ( new_n5394_, new_n5389_ ) -new_n5396_ = OR ( new_n5378_, new_n2909_ ) -new_n5397_ = NAND ( new_n5382_, new_n2927_ ) -new_n5398_ = OR ( new_n5360_, new_n2931_ ) -new_n5399_ = NAND ( new_n2925_, new_n1730_ ) -new_n5400_ = NAND ( new_n2937_, new_n1723_ ) -new_n5401_ = NOR ( NET_520, new_n1593_ ) -new_n5402_ = NOT ( new_n5401_ ) -new_n5403_ = NAND ( new_n2935_, new_n1746_ ) -new_n5404_ = AND ( new_n5403_, new_n5402_, new_n5400_, new_n5399_ ) -NET_7479 = NAND ( new_n5404_, new_n5398_, new_n5397_, new_n5396_ ) -new_n5406_ = OR ( new_n1078_, NET_484 ) -new_n5407_ = OR ( new_n1078_, NET_239 ) -new_n5408_ = NAND ( new_n1078_, new_n2423_ ) -new_n5409_ = NAND ( new_n5408_, new_n5407_ ) -new_n5410_ = XOR ( new_n5409_, NET_6 ) -new_n5411_ = NOT ( NET_7 ) -new_n5412_ = NAND ( new_n5282_, new_n5411_ ) -new_n5413_ = NAND ( new_n5412_, new_n5288_ ) -new_n5414_ = OR ( new_n5282_, new_n5411_ ) -new_n5415_ = NAND ( new_n5414_, new_n5413_ ) -new_n5416_ = XNOR ( new_n5415_, new_n5410_ ) -new_n5417_ = OR ( new_n5416_, new_n1080_ ) -new_n5418_ = NAND ( new_n5417_, new_n5406_ ) -new_n5419_ = OR ( new_n5418_, NET_275 ) -new_n5420_ = OR ( new_n1125_, new_n1262_ ) -new_n5421_ = OR ( new_n1269_, new_n1129_ ) -NET_7512 = NAND ( new_n5421_, new_n5420_, new_n5419_ ) -new_n5423_ = NAND ( new_n3394_, new_n1304_ ) -new_n5424_ = NOR ( NET_64, NET_46 ) -new_n5425_ = AND ( new_n3398_, NET_64 ) -new_n5426_ = NOR ( new_n5425_, new_n5424_ ) -new_n5427_ = OR ( new_n5426_, new_n1304_ ) -new_n5428_ = NAND ( new_n5427_, new_n5423_ ) -new_n5429_ = OR ( new_n5428_, new_n3231_ ) -new_n5430_ = NAND ( new_n3229_, new_n2111_ ) -new_n5431_ = NAND ( new_n5426_, new_n3233_ ) -new_n5432_ = NAND ( new_n5431_, new_n5430_, new_n5429_ ) -new_n5433_ = XOR ( new_n5432_, new_n3241_ ) -new_n5434_ = OR ( new_n5428_, new_n3219_ ) -new_n5435_ = NAND ( new_n3583_, new_n2111_ ) -new_n5436_ = OR ( new_n3222_, new_n2103_ ) -new_n5437_ = OR ( new_n3224_, new_n2105_ ) -new_n5438_ = NAND ( new_n5437_, new_n5436_, new_n5435_, new_n5434_ ) -new_n5439_ = NAND ( new_n5438_, new_n5433_ ) -new_n5440_ = OR ( new_n5438_, new_n5433_ ) -new_n5441_ = NAND ( new_n5440_, new_n5439_ ) -new_n5442_ = NAND ( new_n5316_, new_n5312_ ) -new_n5443_ = NAND ( new_n5442_, new_n5313_ ) -new_n5444_ = XOR ( new_n5443_, new_n5441_ ) -new_n5445_ = NOR ( new_n5444_, new_n3170_ ) -new_n5446_ = OR ( new_n1303_, new_n2103_ ) -new_n5447_ = NAND ( new_n1303_, NET_174 ) -new_n5448_ = NAND ( new_n5447_, new_n5446_ ) -new_n5449_ = XOR ( new_n5448_, new_n5426_ ) -new_n5450_ = OR ( new_n5326_, new_n5321_ ) -new_n5451_ = NAND ( new_n5450_, new_n5299_ ) -new_n5452_ = NAND ( new_n5326_, new_n5321_ ) -new_n5453_ = NAND ( new_n5452_, new_n5451_ ) -new_n5454_ = OR ( new_n5453_, new_n5449_ ) -new_n5455_ = NAND ( new_n5453_, new_n5449_ ) -new_n5456_ = NAND ( new_n5455_, new_n5454_, new_n3274_ ) -new_n5457_ = NAND ( new_n5426_, new_n3287_ ) -new_n5458_ = NAND ( new_n1308_, new_n1305_, NET_275, NET_199 ) -new_n5459_ = OR ( NET_275, new_n1958_ ) -new_n5460_ = NAND ( new_n5459_, new_n5458_, new_n5457_, new_n5456_ ) -NET_7513 = OR ( new_n5460_, new_n5445_ ) -new_n5462_ = NOT ( new_n2163_ ) -new_n5463_ = NOR ( new_n5172_, new_n5462_ ) -new_n5464_ = OR ( new_n4812_, new_n3322_ ) -new_n5465_ = XNOR ( new_n5464_, new_n5463_ ) -new_n5466_ = OR ( new_n5179_, new_n5174_ ) -new_n5467_ = NAND ( new_n5466_, new_n5173_ ) -new_n5468_ = NAND ( new_n5179_, new_n5174_ ) -new_n5469_ = NAND ( new_n5468_, new_n5467_ ) -new_n5470_ = XNOR ( new_n5469_, new_n5465_ ) -new_n5471_ = NAND ( new_n5470_, new_n3336_ ) -new_n5472_ = OR ( new_n4828_, new_n3315_ ) -new_n5473_ = NAND ( new_n3353_, new_n2160_ ) -new_n5474_ = NAND ( new_n4811_, new_n4806_, new_n3361_ ) -new_n5475_ = NAND ( new_n3364_, new_n2150_ ) -new_n5476_ = NAND ( new_n3366_, new_n2176_ ) -new_n5477_ = AND ( new_n5476_, new_n5475_, new_n5474_, new_n4843_ ) -NET_7514 = NAND ( new_n5477_, new_n5473_, new_n5472_, new_n5471_ ) -new_n5479_ = OR ( new_n5416_, new_n1078_ ) -new_n5480_ = NAND ( new_n1078_, new_n2446_ ) -new_n5481_ = NAND ( new_n5480_, new_n5479_ ) -new_n5482_ = OR ( new_n5481_, NET_520 ) -new_n5483_ = OR ( new_n1101_, new_n1335_ ) -new_n5484_ = OR ( new_n1342_, new_n1143_ ) -NET_7528 = NAND ( new_n5484_, new_n5483_, new_n5482_ ) -new_n5486_ = OR ( new_n5378_, new_n2979_ ) -new_n5487_ = NAND ( new_n5382_, new_n2982_ ) -new_n5488_ = NAND ( new_n2998_, new_n1746_ ) -new_n5489_ = NAND ( new_n2984_, new_n1723_ ) -new_n5490_ = NAND ( new_n2975_, NET_420 ) -new_n5491_ = NAND ( new_n2930_, new_n1730_ ) -new_n5492_ = AND ( new_n5491_, new_n5490_, new_n5489_ ) -NET_7529 = NAND ( new_n5492_, new_n5488_, new_n5487_, new_n5486_ ) -new_n5494_ = NAND ( new_n5470_, new_n3509_ ) -new_n5495_ = OR ( new_n4828_, new_n3503_ ) -new_n5496_ = OR ( new_n4812_, new_n3518_ ) -new_n5497_ = NAND ( new_n3746_, new_n2176_ ) -new_n5498_ = NAND ( new_n3516_, new_n2150_ ) -new_n5499_ = NAND ( new_n3498_, NET_170 ) -new_n5500_ = NAND ( new_n3360_, new_n2160_ ) -new_n5501_ = AND ( new_n5500_, new_n5499_, new_n5498_, new_n5497_ ) -NET_7581 = NAND ( new_n5501_, new_n5496_, new_n5495_, new_n5494_ ) -new_n5503_ = NAND ( new_n3951_, new_n2678_ ) -new_n5504_ = NOR ( NET_309, NET_293 ) -new_n5505_ = AND ( new_n3954_, NET_309 ) -new_n5506_ = NOR ( new_n5505_, new_n5504_ ) -new_n5507_ = OR ( new_n5506_, new_n2678_ ) -new_n5508_ = NAND ( new_n5507_, new_n5503_ ) -new_n5509_ = OR ( new_n5508_, new_n2725_ ) -new_n5510_ = NAND ( new_n5506_, new_n2761_ ) -new_n5511_ = NAND ( new_n2759_, new_n1723_ ) -new_n5512_ = NAND ( new_n5511_, new_n5510_, new_n5509_ ) -new_n5513_ = XOR ( new_n5512_, new_n2743_ ) -new_n5514_ = OR ( new_n5508_, new_n2721_ ) -new_n5515_ = NAND ( new_n2726_, new_n1723_ ) -new_n5516_ = NAND ( new_n2728_, NET_389 ) -new_n5517_ = NAND ( new_n2731_, NET_421 ) -new_n5518_ = NAND ( new_n5517_, new_n5516_, new_n5515_, new_n5514_ ) -new_n5519_ = OR ( new_n5518_, new_n5513_ ) -new_n5520_ = NAND ( new_n5518_, new_n5513_ ) -new_n5521_ = NAND ( new_n5520_, new_n5519_ ) -new_n5522_ = NAND ( new_n5377_, new_n5372_ ) -new_n5523_ = NAND ( new_n5522_, new_n5374_ ) -new_n5524_ = XOR ( new_n5523_, new_n5521_ ) -new_n5525_ = NOR ( new_n5524_, new_n2810_ ) -new_n5526_ = NAND ( new_n5506_, new_n2825_ ) -new_n5527_ = OR ( new_n3951_, new_n1569_ ) -new_n5528_ = NAND ( new_n5527_, new_n5526_ ) -new_n5529_ = NAND ( new_n5528_, new_n2838_ ) -new_n5530_ = NAND ( new_n2831_, new_n1711_ ) -new_n5531_ = NAND ( new_n2820_, new_n1734_ ) -new_n5532_ = NAND ( new_n2800_, NET_357 ) -new_n5533_ = NAND ( new_n5532_, new_n5531_, new_n5530_, new_n5529_ ) -NET_7589 = OR ( new_n5533_, new_n5525_ ) -new_n5535_ = NOR ( new_n5524_, new_n2856_ ) -new_n5536_ = NAND ( new_n5528_, new_n2864_ ) -new_n5537_ = NAND ( new_n2862_, new_n1711_ ) -new_n5538_ = NAND ( new_n2859_, new_n1734_ ) -new_n5539_ = NAND ( new_n2854_, NET_389 ) -new_n5540_ = NAND ( new_n5539_, new_n5538_, new_n5537_, new_n5536_ ) -NET_7590 = OR ( new_n5540_, new_n5535_ ) -new_n5542_ = NOR ( new_n5081_, new_n2869_ ) -new_n5543_ = OR ( new_n1560_, new_n1751_ ) -new_n5544_ = NAND ( new_n1560_, NET_418 ) -new_n5545_ = NAND ( new_n5544_, new_n5543_ ) -new_n5546_ = XOR ( new_n5545_, new_n5063_ ) -new_n5547_ = NAND ( new_n5271_, new_n5266_ ) -new_n5548_ = NAND ( new_n5547_, new_n4897_ ) -new_n5549_ = OR ( new_n5271_, new_n5266_ ) -new_n5550_ = AND ( new_n5549_, new_n5548_ ) -new_n5551_ = OR ( new_n5550_, new_n5546_ ) -new_n5552_ = NAND ( new_n5550_, new_n5546_ ) -new_n5553_ = NAND ( new_n5552_, new_n5551_, new_n2877_ ) -new_n5554_ = NAND ( new_n5063_, new_n2893_ ) -new_n5555_ = OR ( new_n2871_, new_n2557_ ) -new_n5556_ = NAND ( new_n5555_, new_n5554_, new_n5553_, new_n5104_ ) -NET_7591 = OR ( new_n5556_, new_n5542_ ) -new_n5558_ = OR ( new_n5524_, new_n2909_ ) -new_n5559_ = NAND ( new_n5528_, new_n2927_ ) -new_n5560_ = OR ( new_n5508_, new_n2931_ ) -new_n5561_ = NAND ( new_n2925_, new_n1719_ ) -new_n5562_ = NAND ( new_n2937_, new_n1711_ ) -new_n5563_ = NOR ( NET_520, new_n1718_ ) -new_n5564_ = NOT ( new_n5563_ ) -new_n5565_ = NAND ( new_n2935_, new_n1734_ ) -new_n5566_ = AND ( new_n5565_, new_n5564_, new_n5562_, new_n5561_ ) -NET_7592 = NAND ( new_n5566_, new_n5560_, new_n5559_, new_n5558_ ) -new_n5568_ = NAND ( new_n5470_, new_n3540_ ) -new_n5569_ = OR ( new_n4828_, new_n3536_ ) -new_n5570_ = OR ( new_n4812_, new_n3544_ ) -new_n5571_ = NOR ( new_n3745_, new_n5171_ ) -new_n5572_ = NOT ( new_n2150_ ) -new_n5573_ = NOR ( new_n3515_, new_n5572_ ) -new_n5574_ = NOR ( new_n5573_, new_n5571_ ) -new_n5575_ = NAND ( new_n5574_, new_n5570_, new_n5569_, new_n5568_ ) -new_n5576_ = NAND ( new_n5575_, new_n3553_ ) -new_n5577_ = NAND ( new_n3552_, NET_138 ) -NET_7622 = NAND ( new_n5577_, new_n5576_ ) -new_n5579_ = NAND ( new_n5575_, new_n3559_ ) -new_n5580_ = NAND ( new_n3558_, NET_106 ) -NET_7623 = NAND ( new_n5580_, new_n5579_ ) -new_n5582_ = OR ( new_n5524_, new_n2979_ ) -new_n5583_ = NAND ( new_n5528_, new_n2982_ ) -new_n5584_ = NAND ( new_n2998_, new_n1734_ ) -new_n5585_ = NAND ( new_n2984_, new_n1711_ ) -new_n5586_ = NAND ( new_n2975_, NET_421 ) -new_n5587_ = NAND ( new_n2930_, new_n1719_ ) -new_n5588_ = AND ( new_n5587_, new_n5586_, new_n5585_ ) -NET_7631 = NAND ( new_n5588_, new_n5584_, new_n5583_, new_n5582_ ) -new_n5590_ = OR ( new_n1078_, NET_485 ) -new_n5591_ = NOT ( NET_5 ) -new_n5592_ = OR ( new_n1078_, NET_240 ) -new_n5593_ = NAND ( new_n1078_, new_n2486_ ) -new_n5594_ = NAND ( new_n5593_, new_n5592_ ) -new_n5595_ = NOR ( new_n5594_, new_n5591_ ) -new_n5596_ = NOT ( new_n5595_ ) -new_n5597_ = NAND ( new_n5594_, new_n5591_ ) -new_n5598_ = NAND ( new_n5597_, new_n5596_ ) -new_n5599_ = NOT ( NET_6 ) -new_n5600_ = NAND ( new_n5409_, new_n5599_ ) -new_n5601_ = NAND ( new_n5600_, new_n5415_ ) -new_n5602_ = OR ( new_n5409_, new_n5599_ ) -new_n5603_ = NAND ( new_n5602_, new_n5601_, new_n5598_ ) -new_n5604_ = NAND ( new_n5602_, new_n5601_ ) -new_n5605_ = NAND ( new_n5604_, new_n5597_ ) -new_n5606_ = OR ( new_n5605_, new_n5595_ ) -new_n5607_ = NAND ( new_n5606_, new_n5603_ ) -new_n5608_ = NAND ( new_n5607_, new_n1078_ ) -new_n5609_ = NAND ( new_n5608_, new_n5590_ ) -new_n5610_ = OR ( new_n5609_, NET_275 ) -new_n5611_ = OR ( new_n1125_, new_n1299_ ) -new_n5612_ = OR ( new_n1301_, new_n1129_ ) -NET_7673 = NAND ( new_n5612_, new_n5611_, new_n5610_ ) -new_n5614_ = NAND ( new_n3731_, new_n1304_ ) -new_n5615_ = NOR ( NET_64, NET_47 ) -new_n5616_ = NAND ( new_n3736_, NET_64 ) -new_n5617_ = NOT ( new_n5616_ ) -new_n5618_ = NOR ( new_n5617_, new_n5615_ ) -new_n5619_ = OR ( new_n5618_, new_n1304_ ) -new_n5620_ = AND ( new_n5619_, new_n5614_ ) -new_n5621_ = NAND ( new_n5620_, new_n4995_ ) -new_n5622_ = NAND ( new_n3229_, new_n2098_ ) -new_n5623_ = NAND ( new_n5618_, new_n3233_ ) -new_n5624_ = NAND ( new_n5623_, new_n5622_, new_n5621_ ) -new_n5625_ = NAND ( new_n5624_, new_n3401_ ) -new_n5626_ = OR ( new_n5624_, new_n3401_ ) -new_n5627_ = NAND ( new_n5620_, new_n3229_ ) -new_n5628_ = NAND ( new_n3583_, new_n2098_ ) -new_n5629_ = OR ( new_n3222_, new_n2090_ ) -new_n5630_ = OR ( new_n3224_, new_n2092_ ) -new_n5631_ = AND ( new_n5630_, new_n5629_, new_n5628_, new_n5627_ ) -new_n5632_ = NAND ( new_n5631_, new_n5626_, new_n5625_ ) -new_n5633_ = AND ( new_n5626_, new_n5625_ ) -new_n5634_ = OR ( new_n5633_, new_n5631_ ) -new_n5635_ = NAND ( new_n5634_, new_n5632_ ) -new_n5636_ = NAND ( new_n5443_, new_n5440_ ) -new_n5637_ = NAND ( new_n5636_, new_n5439_ ) -new_n5638_ = XOR ( new_n5637_, new_n5635_ ) -new_n5639_ = NOR ( new_n5638_, new_n3170_ ) -new_n5640_ = NOT ( new_n5426_ ) -new_n5641_ = NAND ( new_n5453_, new_n5448_ ) -new_n5642_ = NAND ( new_n5641_, new_n5640_ ) -new_n5643_ = OR ( new_n5453_, new_n5448_ ) -new_n5644_ = OR ( new_n1303_, new_n2090_ ) -new_n5645_ = NAND ( new_n1303_, NET_175 ) -new_n5646_ = NAND ( new_n5645_, new_n5644_ ) -new_n5647_ = OR ( new_n5646_, new_n5618_ ) -new_n5648_ = NAND ( new_n5646_, new_n5618_ ) -new_n5649_ = NAND ( new_n5648_, new_n5647_, new_n5643_, new_n5642_ ) -new_n5650_ = NAND ( new_n5643_, new_n5426_ ) -new_n5651_ = NOT ( new_n5618_ ) -new_n5652_ = NAND ( new_n5646_, new_n5651_ ) -new_n5653_ = OR ( new_n5646_, new_n5651_ ) -new_n5654_ = NAND ( new_n5653_, new_n5652_, new_n5650_, new_n5641_ ) -new_n5655_ = NAND ( new_n5654_, new_n5649_, new_n3274_ ) -new_n5656_ = NAND ( new_n5618_, new_n3287_ ) -new_n5657_ = OR ( new_n3158_, new_n2629_ ) -new_n5658_ = NAND ( NET_22556, NET_272 ) -new_n5659_ = NAND ( new_n5658_, new_n5657_, new_n5656_, new_n5655_ ) -NET_7674 = OR ( new_n5659_, new_n5639_ ) -new_n5661_ = NAND ( new_n5607_, new_n1080_ ) -new_n5662_ = NAND ( new_n1078_, new_n2434_ ) -new_n5663_ = NAND ( new_n5662_, new_n5661_ ) -new_n5664_ = OR ( new_n5663_, NET_520 ) -new_n5665_ = OR ( new_n1101_, new_n1556_ ) -new_n5666_ = OR ( new_n1558_, new_n1143_ ) -NET_7688 = NAND ( new_n5666_, new_n5665_, new_n5664_ ) -new_n5668_ = NAND ( new_n4043_, new_n2678_ ) -new_n5669_ = OR ( NET_309, new_n1315_ ) -new_n5670_ = OR ( new_n4048_, new_n1103_ ) -new_n5671_ = NAND ( new_n5670_, new_n5669_ ) -new_n5672_ = OR ( new_n5671_, new_n2678_ ) -new_n5673_ = NAND ( new_n5672_, new_n5668_ ) -new_n5674_ = OR ( new_n5673_, new_n2725_ ) -new_n5675_ = NAND ( new_n5671_, new_n2761_ ) -new_n5676_ = NAND ( new_n2759_, new_n1711_ ) -new_n5677_ = NAND ( new_n5676_, new_n5675_, new_n5674_ ) -new_n5678_ = XOR ( new_n5677_, new_n2743_ ) -new_n5679_ = OR ( new_n5673_, new_n2721_ ) -new_n5680_ = NAND ( new_n2726_, new_n1711_ ) -new_n5681_ = NAND ( new_n2728_, NET_390 ) -new_n5682_ = NAND ( new_n2731_, NET_422 ) -new_n5683_ = NAND ( new_n5682_, new_n5681_, new_n5680_, new_n5679_ ) -new_n5684_ = OR ( new_n5683_, new_n5678_ ) -new_n5685_ = NAND ( new_n5683_, new_n5678_ ) -new_n5686_ = NAND ( new_n5685_, new_n5684_ ) -new_n5687_ = NAND ( new_n5523_, new_n5519_ ) -new_n5688_ = NAND ( new_n5687_, new_n5520_ ) -new_n5689_ = XOR ( new_n5688_, new_n5686_ ) -new_n5690_ = NOR ( new_n5689_, new_n2810_ ) -new_n5691_ = NAND ( new_n5671_, new_n2825_ ) -new_n5692_ = OR ( new_n4043_, new_n1569_ ) -new_n5693_ = NAND ( new_n5692_, new_n5691_ ) -new_n5694_ = NAND ( new_n5693_, new_n2838_ ) -new_n5695_ = NAND ( new_n2831_, new_n1699_ ) -new_n5696_ = NAND ( new_n2820_, new_n1723_ ) -new_n5697_ = NAND ( new_n2800_, NET_358 ) -new_n5698_ = NAND ( new_n5697_, new_n5696_, new_n5695_, new_n5694_ ) -NET_7689 = OR ( new_n5698_, new_n5690_ ) -new_n5700_ = NOR ( new_n5689_, new_n2856_ ) -new_n5701_ = NAND ( new_n5693_, new_n2864_ ) -new_n5702_ = NAND ( new_n2862_, new_n1699_ ) -new_n5703_ = NAND ( new_n2859_, new_n1723_ ) -new_n5704_ = NAND ( new_n2854_, NET_390 ) -new_n5705_ = NAND ( new_n5704_, new_n5703_, new_n5702_, new_n5701_ ) -NET_7690 = OR ( new_n5705_, new_n5700_ ) -new_n5707_ = OR ( new_n5689_, new_n2909_ ) -new_n5708_ = NAND ( new_n5693_, new_n2927_ ) -new_n5709_ = OR ( new_n5673_, new_n2931_ ) -new_n5710_ = NAND ( new_n2925_, new_n1707_ ) -new_n5711_ = NAND ( new_n2937_, new_n1699_ ) -new_n5712_ = NOR ( NET_520, new_n1706_ ) -new_n5713_ = NOT ( new_n5712_ ) -new_n5714_ = NAND ( new_n2935_, new_n1723_ ) -new_n5715_ = AND ( new_n5714_, new_n5713_, new_n5711_, new_n5710_ ) -NET_7691 = NAND ( new_n5715_, new_n5709_, new_n5708_, new_n5707_ ) -new_n5717_ = NOR ( new_n5172_, new_n5572_ ) -new_n5718_ = NAND ( new_n5001_, new_n3321_ ) -new_n5719_ = XNOR ( new_n5718_, new_n5717_ ) -new_n5720_ = OR ( new_n5469_, new_n5464_ ) -new_n5721_ = NAND ( new_n5720_, new_n5463_ ) -new_n5722_ = NAND ( new_n5469_, new_n5464_ ) -new_n5723_ = NAND ( new_n5722_, new_n5721_ ) -new_n5724_ = XNOR ( new_n5723_, new_n5719_ ) -new_n5725_ = NAND ( new_n5724_, new_n3336_ ) -new_n5726_ = OR ( new_n5020_, new_n3315_ ) -new_n5727_ = NAND ( new_n5001_, new_n3361_ ) -new_n5728_ = NAND ( new_n3353_, new_n2147_ ) -new_n5729_ = NAND ( new_n3364_, new_n2137_ ) -new_n5730_ = NAND ( new_n3366_, new_n2163_ ) -new_n5731_ = AND ( new_n5730_, new_n5729_, new_n5728_, new_n5037_ ) -NET_7724 = NAND ( new_n5731_, new_n5727_, new_n5726_, new_n5725_ ) -new_n5733_ = OR ( new_n5689_, new_n2979_ ) -new_n5734_ = NAND ( new_n5693_, new_n2982_ ) -new_n5735_ = NAND ( new_n2998_, new_n1723_ ) -new_n5736_ = NAND ( new_n2984_, new_n1699_ ) -new_n5737_ = NAND ( new_n2975_, NET_422 ) -new_n5738_ = NAND ( new_n2930_, new_n1707_ ) -new_n5739_ = AND ( new_n5738_, new_n5737_, new_n5736_ ) -NET_7740 = NAND ( new_n5739_, new_n5735_, new_n5734_, new_n5733_ ) -new_n5741_ = OR ( new_n1078_, NET_486 ) -new_n5742_ = OR ( new_n1078_, NET_241 ) -new_n5743_ = NAND ( new_n1078_, new_n2544_ ) -new_n5744_ = NAND ( new_n5743_, new_n5742_ ) -new_n5745_ = XOR ( new_n5744_, NET_4 ) -new_n5746_ = NAND ( new_n5605_, new_n5596_ ) -new_n5747_ = XNOR ( new_n5746_, new_n5745_ ) -new_n5748_ = OR ( new_n5747_, new_n1080_ ) -new_n5749_ = NAND ( new_n5748_, new_n5741_ ) -new_n5750_ = OR ( new_n5749_, NET_275 ) -new_n5751_ = OR ( new_n1125_, new_n1291_ ) -new_n5752_ = OR ( new_n1296_, new_n1129_ ) -NET_7779 = NAND ( new_n5752_, new_n5751_, new_n5750_ ) -new_n5754_ = NAND ( new_n5724_, new_n3509_ ) -new_n5755_ = OR ( new_n5020_, new_n3503_ ) -new_n5756_ = NOT ( new_n3518_ ) -new_n5757_ = NAND ( new_n5001_, new_n5756_ ) -new_n5758_ = NAND ( new_n3746_, new_n2163_ ) -new_n5759_ = NAND ( new_n3516_, new_n2137_ ) -new_n5760_ = NAND ( new_n3498_, NET_171 ) -new_n5761_ = NAND ( new_n3360_, new_n2147_ ) -new_n5762_ = AND ( new_n5761_, new_n5760_, new_n5759_, new_n5758_ ) -NET_7780 = NAND ( new_n5762_, new_n5757_, new_n5755_, new_n5754_ ) -new_n5764_ = NAND ( new_n3932_, new_n1304_ ) -new_n5765_ = NOR ( NET_64, NET_48 ) -new_n5766_ = AND ( new_n3936_, NET_64 ) -new_n5767_ = NOR ( new_n5766_, new_n5765_ ) -new_n5768_ = OR ( new_n5767_, new_n1304_ ) -new_n5769_ = AND ( new_n5768_, new_n5764_ ) -new_n5770_ = NAND ( new_n5769_, new_n4995_ ) -new_n5771_ = NAND ( new_n3229_, new_n2085_ ) -new_n5772_ = NAND ( new_n5767_, new_n3233_ ) -new_n5773_ = NAND ( new_n5772_, new_n5771_, new_n5770_ ) -new_n5774_ = XOR ( new_n5773_, new_n3241_ ) -new_n5775_ = NAND ( new_n5769_, new_n3229_ ) -new_n5776_ = NAND ( new_n3583_, new_n2085_ ) -new_n5777_ = OR ( new_n3222_, new_n2077_ ) -new_n5778_ = OR ( new_n3224_, new_n2079_ ) -new_n5779_ = NAND ( new_n5778_, new_n5777_, new_n5776_, new_n5775_ ) -new_n5780_ = OR ( new_n5779_, new_n5774_ ) -new_n5781_ = NAND ( new_n5779_, new_n5774_ ) -new_n5782_ = NAND ( new_n5781_, new_n5780_ ) -new_n5783_ = NAND ( new_n5637_, new_n5632_ ) -new_n5784_ = NAND ( new_n5783_, new_n5634_ ) -new_n5785_ = XOR ( new_n5784_, new_n5782_ ) -new_n5786_ = NOR ( new_n5785_, new_n3170_ ) -new_n5787_ = OR ( new_n1303_, new_n2077_ ) -new_n5788_ = NAND ( new_n1303_, NET_176 ) -new_n5789_ = NAND ( new_n5788_, new_n5787_ ) -new_n5790_ = NAND ( new_n5789_, new_n5767_ ) -new_n5791_ = OR ( new_n5789_, new_n5767_ ) -new_n5792_ = NAND ( new_n5647_, new_n5643_, new_n5642_ ) -new_n5793_ = NAND ( new_n5648_, new_n5792_ ) -new_n5794_ = NAND ( new_n5793_, new_n5791_, new_n5790_ ) -new_n5795_ = NAND ( new_n5791_, new_n5790_ ) -new_n5796_ = NAND ( new_n5795_, new_n5648_, new_n5792_ ) -new_n5797_ = NAND ( new_n5796_, new_n5794_, new_n3274_ ) -new_n5798_ = NAND ( new_n5767_, new_n3287_ ) -new_n5799_ = OR ( new_n3158_, new_n2941_ ) -new_n5800_ = OR ( NET_275, new_n1957_ ) -new_n5801_ = NAND ( new_n5800_, new_n5799_, new_n5798_, new_n5797_ ) -NET_7781 = OR ( new_n5801_, new_n5786_ ) -new_n5803_ = OR ( new_n5747_, new_n1078_ ) -new_n5804_ = NAND ( new_n1078_, new_n2526_ ) -new_n5805_ = NAND ( new_n5804_, new_n5803_ ) -new_n5806_ = OR ( new_n5805_, NET_520 ) -new_n5807_ = OR ( new_n1101_, new_n1561_ ) -new_n5808_ = OR ( new_n1566_, new_n1143_ ) -NET_7797 = NAND ( new_n5808_, new_n5807_, new_n5806_ ) -new_n5810_ = NAND ( new_n4218_, new_n2678_ ) -new_n5811_ = NOR ( NET_309, NET_295 ) -new_n5812_ = AND ( new_n4222_, NET_309 ) -new_n5813_ = NOR ( new_n5812_, new_n5811_ ) -new_n5814_ = OR ( new_n5813_, new_n2678_ ) -new_n5815_ = NAND ( new_n5814_, new_n5810_ ) -new_n5816_ = OR ( new_n5815_, new_n2725_ ) -new_n5817_ = NAND ( new_n5813_, new_n2761_ ) -new_n5818_ = NOT ( new_n1699_ ) -new_n5819_ = OR ( new_n2721_, new_n5818_ ) -new_n5820_ = NAND ( new_n5819_, new_n5817_, new_n5816_ ) -new_n5821_ = XOR ( new_n5820_, new_n2743_ ) -new_n5822_ = OR ( new_n5815_, new_n2721_ ) -new_n5823_ = NAND ( new_n2726_, new_n1699_ ) -new_n5824_ = NAND ( new_n2728_, NET_391 ) -new_n5825_ = NAND ( new_n2731_, NET_423 ) -new_n5826_ = NAND ( new_n5825_, new_n5824_, new_n5823_, new_n5822_ ) -new_n5827_ = OR ( new_n5826_, new_n5821_ ) -new_n5828_ = NAND ( new_n5826_, new_n5821_ ) -new_n5829_ = NAND ( new_n5828_, new_n5827_ ) -new_n5830_ = NAND ( new_n5688_, new_n5684_ ) -new_n5831_ = NAND ( new_n5830_, new_n5685_ ) -new_n5832_ = XOR ( new_n5831_, new_n5829_ ) -new_n5833_ = NOR ( new_n5832_, new_n2810_ ) -new_n5834_ = NAND ( new_n5813_, new_n2825_ ) -new_n5835_ = OR ( new_n4218_, new_n1569_ ) -new_n5836_ = NAND ( new_n5835_, new_n5834_ ) -new_n5837_ = NAND ( new_n5836_, new_n2838_ ) -new_n5838_ = NAND ( new_n2831_, new_n1688_ ) -new_n5839_ = NAND ( new_n2820_, new_n1711_ ) -new_n5840_ = NAND ( new_n2800_, NET_359 ) -new_n5841_ = NAND ( new_n5840_, new_n5839_, new_n5838_, new_n5837_ ) -NET_7798 = OR ( new_n5841_, new_n5833_ ) -new_n5843_ = NOR ( new_n5832_, new_n2856_ ) -new_n5844_ = NAND ( new_n5836_, new_n2864_ ) -new_n5845_ = NAND ( new_n2862_, new_n1688_ ) -new_n5846_ = NAND ( new_n2859_, new_n1711_ ) -new_n5847_ = NAND ( new_n2854_, NET_391 ) -new_n5848_ = NAND ( new_n5847_, new_n5846_, new_n5845_, new_n5844_ ) -NET_7799 = OR ( new_n5848_, new_n5843_ ) -new_n5850_ = OR ( new_n1560_, new_n1739_ ) -new_n5851_ = NAND ( new_n1560_, NET_419 ) -new_n5852_ = NAND ( new_n5851_, new_n5850_ ) -new_n5853_ = XOR ( new_n5852_, new_n5199_ ) -new_n5854_ = NAND ( new_n5550_, new_n5545_ ) -new_n5855_ = NAND ( new_n5854_, new_n5063_ ) -new_n5856_ = OR ( new_n5550_, new_n5545_ ) -new_n5857_ = AND ( new_n5856_, new_n5855_ ) -new_n5858_ = OR ( new_n5857_, new_n5853_ ) -new_n5859_ = NAND ( new_n5857_, new_n5853_ ) -new_n5860_ = NAND ( new_n5859_, new_n5858_, new_n2877_ ) -new_n5861_ = OR ( new_n5217_, new_n2869_ ) -new_n5862_ = NAND ( new_n5199_, new_n2893_ ) -new_n5863_ = NOT ( NET_444 ) -new_n5864_ = NOR ( new_n2871_, new_n5863_ ) -new_n5865_ = NOR ( new_n5864_, new_n5240_ ) -NET_7800 = NAND ( new_n5865_, new_n5862_, new_n5861_, new_n5860_ ) -new_n5867_ = OR ( new_n5832_, new_n2909_ ) -new_n5868_ = NAND ( new_n5836_, new_n2927_ ) -new_n5869_ = OR ( new_n5815_, new_n2931_ ) -new_n5870_ = NAND ( new_n2925_, new_n1695_ ) -new_n5871_ = NAND ( new_n2937_, new_n1688_ ) -new_n5872_ = NOR ( NET_520, new_n1592_ ) -new_n5873_ = NOT ( new_n5872_ ) -new_n5874_ = NAND ( new_n2935_, new_n1711_ ) -new_n5875_ = AND ( new_n5874_, new_n5873_, new_n5871_, new_n5870_ ) -NET_7801 = NAND ( new_n5875_, new_n5869_, new_n5868_, new_n5867_ ) -new_n5877_ = NAND ( new_n5724_, new_n3540_ ) -new_n5878_ = OR ( new_n5020_, new_n3536_ ) -new_n5879_ = NAND ( new_n5001_, new_n3543_ ) -new_n5880_ = NOR ( new_n3745_, new_n5462_ ) -new_n5881_ = NOT ( new_n2137_ ) -new_n5882_ = NOR ( new_n3515_, new_n5881_ ) -new_n5883_ = NOR ( new_n5882_, new_n5880_ ) -new_n5884_ = NAND ( new_n5883_, new_n5879_, new_n5878_, new_n5877_ ) -new_n5885_ = NAND ( new_n5884_, new_n3553_ ) -new_n5886_ = NAND ( new_n3552_, NET_139 ) -NET_7844 = NAND ( new_n5886_, new_n5885_ ) -new_n5888_ = NAND ( new_n5884_, new_n3559_ ) -new_n5889_ = NAND ( new_n3558_, NET_107 ) -NET_7845 = NAND ( new_n5889_, new_n5888_ ) -new_n5891_ = OR ( new_n5832_, new_n2979_ ) -new_n5892_ = NAND ( new_n5836_, new_n2982_ ) -new_n5893_ = NAND ( new_n2998_, new_n1711_ ) -new_n5894_ = NAND ( new_n2984_, new_n1688_ ) -new_n5895_ = NAND ( new_n2975_, NET_423 ) -new_n5896_ = NAND ( new_n2930_, new_n1695_ ) -new_n5897_ = AND ( new_n5896_, new_n5895_, new_n5894_ ) -NET_7858 = NAND ( new_n5897_, new_n5893_, new_n5892_, new_n5891_ ) -new_n5899_ = OR ( new_n1078_, NET_487 ) -new_n5900_ = NOT ( NET_3 ) -new_n5901_ = OR ( new_n1078_, NET_242 ) -new_n5902_ = NAND ( new_n1078_, new_n2478_ ) -new_n5903_ = NAND ( new_n5902_, new_n5901_ ) -new_n5904_ = OR ( new_n5903_, new_n5900_ ) -new_n5905_ = NAND ( new_n5903_, new_n5900_ ) -new_n5906_ = NAND ( new_n5905_, new_n5904_ ) -new_n5907_ = NOT ( NET_4 ) -new_n5908_ = NOR ( new_n5744_, new_n5907_ ) -new_n5909_ = OR ( new_n5908_, new_n5746_ ) -new_n5910_ = NAND ( new_n5744_, new_n5907_ ) -new_n5911_ = NAND ( new_n5910_, new_n5909_ ) -new_n5912_ = XOR ( new_n5911_, new_n5906_ ) -new_n5913_ = OR ( new_n5912_, new_n1080_ ) -new_n5914_ = NAND ( new_n5913_, new_n5899_ ) -new_n5915_ = OR ( new_n5914_, NET_275 ) -new_n5916_ = OR ( new_n1918_, new_n1129_ ) -new_n5917_ = OR ( new_n1125_, new_n1915_ ) -NET_7894 = NAND ( new_n5917_, new_n5916_, new_n5915_ ) -new_n5919_ = NAND ( new_n3977_, new_n1304_ ) -new_n5920_ = OR ( NET_64, new_n3979_ ) -new_n5921_ = OR ( new_n3983_, new_n1127_ ) -new_n5922_ = NAND ( new_n5921_, new_n5920_ ) -new_n5923_ = OR ( new_n5922_, new_n1304_ ) -new_n5924_ = NAND ( new_n5923_, new_n5919_ ) -new_n5925_ = OR ( new_n5924_, new_n3231_ ) -new_n5926_ = NAND ( new_n3229_, new_n2072_ ) -new_n5927_ = NAND ( new_n5922_, new_n3233_ ) -new_n5928_ = NAND ( new_n5927_, new_n5926_, new_n5925_ ) -new_n5929_ = XOR ( new_n5928_, new_n3241_ ) -new_n5930_ = OR ( new_n5924_, new_n3219_ ) -new_n5931_ = NAND ( new_n3583_, new_n2072_ ) -new_n5932_ = OR ( new_n3222_, new_n2064_ ) -new_n5933_ = OR ( new_n3224_, new_n2066_ ) -new_n5934_ = NAND ( new_n5933_, new_n5932_, new_n5931_, new_n5930_ ) -new_n5935_ = OR ( new_n5934_, new_n5929_ ) -new_n5936_ = NAND ( new_n5934_, new_n5929_ ) -new_n5937_ = NAND ( new_n5936_, new_n5935_ ) -new_n5938_ = NAND ( new_n5784_, new_n5780_ ) -new_n5939_ = NAND ( new_n5938_, new_n5781_ ) -new_n5940_ = XOR ( new_n5939_, new_n5937_ ) -new_n5941_ = NOR ( new_n5940_, new_n3170_ ) -new_n5942_ = OR ( new_n1303_, new_n2064_ ) -new_n5943_ = NAND ( new_n1303_, NET_177 ) -new_n5944_ = NAND ( new_n5943_, new_n5942_ ) -new_n5945_ = XOR ( new_n5944_, new_n5922_ ) -new_n5946_ = NAND ( new_n5793_, new_n5791_ ) -new_n5947_ = NAND ( new_n5946_, new_n5790_ ) -new_n5948_ = NAND ( new_n5947_, new_n5945_ ) -new_n5949_ = OR ( new_n5947_, new_n5945_ ) -new_n5950_ = NAND ( new_n5949_, new_n5948_, new_n3274_ ) -new_n5951_ = NAND ( new_n5922_, new_n3287_ ) -new_n5952_ = OR ( new_n3158_, new_n3048_ ) -new_n5953_ = OR ( NET_275, new_n1956_ ) -new_n5954_ = NAND ( new_n5953_, new_n5952_, new_n5951_, new_n5950_ ) -NET_7895 = OR ( new_n5954_, new_n5941_ ) -new_n5956_ = OR ( new_n5912_, new_n1078_ ) -new_n5957_ = NAND ( new_n1078_, new_n2387_ ) -new_n5958_ = NAND ( new_n5957_, new_n5956_ ) -new_n5959_ = OR ( new_n5958_, NET_520 ) -new_n5960_ = OR ( new_n1101_, new_n1620_ ) -new_n5961_ = OR ( new_n1621_, new_n1143_ ) -NET_7911 = NAND ( new_n5961_, new_n5960_, new_n5959_ ) -new_n5963_ = NAND ( new_n4337_, new_n2678_ ) -new_n5964_ = OR ( NET_309, new_n4339_ ) -new_n5965_ = OR ( new_n4343_, new_n1103_ ) -new_n5966_ = NAND ( new_n5965_, new_n5964_ ) -new_n5967_ = OR ( new_n5966_, new_n2678_ ) -new_n5968_ = NAND ( new_n5967_, new_n5963_ ) -new_n5969_ = OR ( new_n5968_, new_n2725_ ) -new_n5970_ = NAND ( new_n5966_, new_n2761_ ) -new_n5971_ = NAND ( new_n2759_, new_n1688_ ) -new_n5972_ = NAND ( new_n5971_, new_n5970_, new_n5969_ ) -new_n5973_ = XOR ( new_n5972_, new_n2743_ ) -new_n5974_ = OR ( new_n5968_, new_n2721_ ) -new_n5975_ = NAND ( new_n2726_, new_n1688_ ) -new_n5976_ = NAND ( new_n2728_, NET_392 ) -new_n5977_ = NAND ( new_n2731_, NET_424 ) -new_n5978_ = NAND ( new_n5977_, new_n5976_, new_n5975_, new_n5974_ ) -new_n5979_ = OR ( new_n5978_, new_n5973_ ) -new_n5980_ = NAND ( new_n5978_, new_n5973_ ) -new_n5981_ = NAND ( new_n5980_, new_n5979_ ) -new_n5982_ = NAND ( new_n5831_, new_n5827_ ) -new_n5983_ = NAND ( new_n5982_, new_n5828_ ) -new_n5984_ = XOR ( new_n5983_, new_n5981_ ) -new_n5985_ = NOR ( new_n5984_, new_n2810_ ) -new_n5986_ = NAND ( new_n5966_, new_n2825_ ) -new_n5987_ = OR ( new_n4337_, new_n1569_ ) -new_n5988_ = NAND ( new_n5987_, new_n5986_ ) -new_n5989_ = NAND ( new_n5988_, new_n2838_ ) -new_n5990_ = NAND ( new_n2831_, new_n1676_ ) -new_n5991_ = NAND ( new_n2820_, new_n1699_ ) -new_n5992_ = NAND ( new_n2800_, NET_360 ) -new_n5993_ = NAND ( new_n5992_, new_n5991_, new_n5990_, new_n5989_ ) -NET_7912 = OR ( new_n5993_, new_n5985_ ) -new_n5995_ = NOR ( new_n5984_, new_n2856_ ) -new_n5996_ = NAND ( new_n5988_, new_n2864_ ) -new_n5997_ = NAND ( new_n2862_, new_n1676_ ) -new_n5998_ = OR ( new_n2858_, new_n5818_ ) -new_n5999_ = NAND ( new_n2854_, NET_392 ) -new_n6000_ = NAND ( new_n5999_, new_n5998_, new_n5997_, new_n5996_ ) -NET_7913 = OR ( new_n6000_, new_n5995_ ) -new_n6002_ = OR ( new_n5984_, new_n2909_ ) -new_n6003_ = NAND ( new_n5988_, new_n2927_ ) -new_n6004_ = OR ( new_n5968_, new_n2931_ ) -new_n6005_ = NAND ( new_n2925_, new_n1684_ ) -new_n6006_ = NAND ( new_n2937_, new_n1676_ ) -new_n6007_ = NOR ( NET_520, new_n1683_ ) -new_n6008_ = NOT ( new_n6007_ ) -new_n6009_ = NAND ( new_n2935_, new_n1699_ ) -new_n6010_ = AND ( new_n6009_, new_n6008_, new_n6006_, new_n6005_ ) -NET_7914 = NAND ( new_n6010_, new_n6004_, new_n6003_, new_n6002_ ) -new_n6012_ = NOR ( new_n5172_, new_n5881_ ) -new_n6013_ = NAND ( new_n5138_, new_n3321_ ) -new_n6014_ = XNOR ( new_n6013_, new_n6012_ ) -new_n6015_ = OR ( new_n5723_, new_n5718_ ) -new_n6016_ = NAND ( new_n6015_, new_n5717_ ) -new_n6017_ = NAND ( new_n5723_, new_n5718_ ) -new_n6018_ = NAND ( new_n6017_, new_n6016_ ) -new_n6019_ = XNOR ( new_n6018_, new_n6014_ ) -new_n6020_ = NAND ( new_n6019_, new_n3336_ ) -new_n6021_ = OR ( new_n5154_, new_n3315_ ) -new_n6022_ = NAND ( new_n5138_, new_n3361_ ) -new_n6023_ = NAND ( new_n3353_, new_n2134_ ) -new_n6024_ = NAND ( new_n3364_, new_n2124_ ) -new_n6025_ = NAND ( new_n3366_, new_n2150_ ) -new_n6026_ = AND ( new_n6025_, new_n6024_, new_n6023_, new_n5167_ ) -NET_7954 = NAND ( new_n6026_, new_n6022_, new_n6021_, new_n6020_ ) -new_n6028_ = OR ( new_n5984_, new_n2979_ ) -new_n6029_ = NAND ( new_n5988_, new_n2982_ ) -new_n6030_ = NAND ( new_n2998_, new_n1699_ ) -new_n6031_ = NAND ( new_n2984_, new_n1676_ ) -new_n6032_ = NAND ( new_n2975_, NET_424 ) -new_n6033_ = NAND ( new_n2930_, new_n1684_ ) -new_n6034_ = AND ( new_n6033_, new_n6032_, new_n6031_ ) -NET_7969 = NAND ( new_n6034_, new_n6030_, new_n6029_, new_n6028_ ) -new_n6036_ = NAND ( new_n6019_, new_n3509_ ) -new_n6037_ = OR ( new_n5154_, new_n3503_ ) -new_n6038_ = NAND ( new_n5138_, new_n5756_ ) -new_n6039_ = NAND ( new_n3746_, new_n2150_ ) -new_n6040_ = NAND ( new_n3516_, new_n2124_ ) -new_n6041_ = NAND ( new_n3498_, NET_172 ) -new_n6042_ = NAND ( new_n3360_, new_n2134_ ) -new_n6043_ = AND ( new_n6042_, new_n6041_, new_n6040_, new_n6039_ ) -NET_8006 = NAND ( new_n6043_, new_n6038_, new_n6037_, new_n6036_ ) -new_n6045_ = NAND ( new_n4159_, new_n1304_ ) -new_n6046_ = NOR ( NET_64, NET_50 ) -new_n6047_ = AND ( new_n4163_, NET_64 ) -new_n6048_ = NOR ( new_n6047_, new_n6046_ ) -new_n6049_ = OR ( new_n6048_, new_n1304_ ) -new_n6050_ = NAND ( new_n6049_, new_n6045_ ) -new_n6051_ = OR ( new_n6050_, new_n3231_ ) -new_n6052_ = NAND ( new_n3229_, new_n2059_ ) -new_n6053_ = NAND ( new_n6048_, new_n3233_ ) -new_n6054_ = NAND ( new_n6053_, new_n6052_, new_n6051_ ) -new_n6055_ = XOR ( new_n6054_, new_n3241_ ) -new_n6056_ = OR ( new_n6050_, new_n3219_ ) -new_n6057_ = NAND ( new_n3583_, new_n2059_ ) -new_n6058_ = OR ( new_n3222_, new_n2051_ ) -new_n6059_ = OR ( new_n3224_, new_n2053_ ) -new_n6060_ = NAND ( new_n6059_, new_n6058_, new_n6057_, new_n6056_ ) -new_n6061_ = OR ( new_n6060_, new_n6055_ ) -new_n6062_ = NAND ( new_n6060_, new_n6055_ ) -new_n6063_ = NAND ( new_n6062_, new_n6061_ ) -new_n6064_ = NAND ( new_n5939_, new_n5935_ ) -new_n6065_ = NAND ( new_n6064_, new_n5936_ ) -new_n6066_ = XOR ( new_n6065_, new_n6063_ ) -new_n6067_ = NOR ( new_n6066_, new_n3170_ ) -new_n6068_ = OR ( new_n1303_, new_n2051_ ) -new_n6069_ = NAND ( new_n1303_, NET_178 ) -new_n6070_ = NAND ( new_n6069_, new_n6068_ ) -new_n6071_ = XOR ( new_n6070_, new_n6048_ ) -new_n6072_ = OR ( new_n5947_, new_n5922_ ) -new_n6073_ = NAND ( new_n6072_, new_n5944_ ) -new_n6074_ = NAND ( new_n5947_, new_n5922_ ) -new_n6075_ = NAND ( new_n6074_, new_n6073_ ) -new_n6076_ = NAND ( new_n6075_, new_n6071_ ) -new_n6077_ = OR ( new_n6075_, new_n6071_ ) -new_n6078_ = NAND ( new_n6077_, new_n6076_, new_n3274_ ) -new_n6079_ = NAND ( new_n6048_, new_n3287_ ) -new_n6080_ = NAND ( new_n1308_, new_n1305_, NET_275, NET_195 ) -new_n6081_ = NAND ( NET_22556, NET_259 ) -new_n6082_ = NAND ( new_n6081_, new_n6080_, new_n6079_, new_n6078_ ) -NET_8007 = OR ( new_n6082_, new_n6067_ ) -new_n6084_ = NAND ( new_n4505_, new_n2678_ ) -new_n6085_ = NAND ( new_n2694_, new_n1569_ ) -new_n6086_ = NAND ( new_n6085_, new_n6084_ ) -new_n6087_ = OR ( new_n6086_, new_n2725_ ) -new_n6088_ = NOT ( new_n1676_ ) -new_n6089_ = OR ( new_n2721_, new_n6088_ ) -new_n6090_ = OR ( new_n2736_, new_n2694_ ) -new_n6091_ = NAND ( new_n6090_, new_n6089_, new_n6087_ ) -new_n6092_ = XOR ( new_n6091_, new_n2743_ ) -new_n6093_ = OR ( new_n6086_, new_n2721_ ) -new_n6094_ = NAND ( new_n2726_, new_n1676_ ) -new_n6095_ = NAND ( new_n2728_, NET_393 ) -new_n6096_ = NAND ( new_n2731_, NET_425 ) -new_n6097_ = AND ( new_n6096_, new_n6095_ ) -new_n6098_ = NAND ( new_n6097_, new_n6094_, new_n6093_ ) -new_n6099_ = OR ( new_n6098_, new_n6092_ ) -new_n6100_ = NAND ( new_n6098_, new_n6092_ ) -new_n6101_ = NAND ( new_n6100_, new_n6099_ ) -new_n6102_ = NAND ( new_n5983_, new_n5979_ ) -new_n6103_ = NAND ( new_n6102_, new_n5980_ ) -new_n6104_ = XOR ( new_n6103_, new_n6101_ ) -new_n6105_ = NOR ( new_n6104_, new_n2810_ ) -new_n6106_ = NAND ( new_n2825_, new_n2741_ ) -new_n6107_ = OR ( new_n4505_, new_n1569_ ) -new_n6108_ = NAND ( new_n6107_, new_n6106_ ) -new_n6109_ = NAND ( new_n6108_, new_n2838_ ) -new_n6110_ = NAND ( new_n2831_, new_n1663_ ) -new_n6111_ = NAND ( new_n2820_, new_n1688_ ) -new_n6112_ = NAND ( new_n2800_, NET_361 ) -new_n6113_ = NAND ( new_n6112_, new_n6111_, new_n6110_, new_n6109_ ) -NET_8017 = OR ( new_n6113_, new_n6105_ ) -new_n6115_ = NOR ( new_n6104_, new_n2856_ ) -new_n6116_ = NAND ( new_n6108_, new_n2864_ ) -new_n6117_ = NAND ( new_n2862_, new_n1663_ ) -new_n6118_ = NAND ( new_n2859_, new_n1688_ ) -new_n6119_ = NAND ( new_n2854_, NET_393 ) -new_n6120_ = NAND ( new_n6119_, new_n6118_, new_n6117_, new_n6116_ ) -NET_8018 = OR ( new_n6120_, new_n6115_ ) -new_n6122_ = OR ( new_n1560_, new_n1728_ ) -new_n6123_ = NAND ( new_n1560_, NET_420 ) -new_n6124_ = NAND ( new_n6123_, new_n6122_ ) -new_n6125_ = XOR ( new_n6124_, new_n5358_ ) -new_n6126_ = NAND ( new_n5857_, new_n5852_ ) -new_n6127_ = NAND ( new_n6126_, new_n5199_ ) -new_n6128_ = OR ( new_n5857_, new_n5852_ ) -new_n6129_ = AND ( new_n6128_, new_n6127_ ) -new_n6130_ = OR ( new_n6129_, new_n6125_ ) -new_n6131_ = NAND ( new_n6129_, new_n6125_ ) -new_n6132_ = NAND ( new_n6131_, new_n6130_, new_n2877_ ) -new_n6133_ = OR ( new_n5378_, new_n2869_ ) -new_n6134_ = NAND ( new_n5358_, new_n2893_ ) -new_n6135_ = NOR ( new_n2871_, new_n2630_ ) -new_n6136_ = NOR ( new_n6135_, new_n5401_ ) -NET_8019 = NAND ( new_n6136_, new_n6134_, new_n6133_, new_n6132_ ) -new_n6138_ = OR ( new_n6104_, new_n2909_ ) -new_n6139_ = NAND ( new_n6108_, new_n2927_ ) -new_n6140_ = OR ( new_n6086_, new_n2931_ ) -new_n6141_ = NAND ( new_n2925_, new_n1672_ ) -new_n6142_ = NAND ( new_n2937_, new_n1663_ ) -new_n6143_ = NOR ( NET_520, new_n1671_ ) -new_n6144_ = NOT ( new_n6143_ ) -new_n6145_ = NAND ( new_n2935_, new_n1688_ ) -new_n6146_ = AND ( new_n6145_, new_n6144_, new_n6142_, new_n6141_ ) -NET_8020 = NAND ( new_n6146_, new_n6140_, new_n6139_, new_n6138_ ) -new_n6148_ = OR ( new_n1078_, NET_488 ) -new_n6149_ = NOT ( NET_2 ) -new_n6150_ = OR ( new_n1078_, NET_243 ) -new_n6151_ = NAND ( new_n1078_, new_n2470_ ) -new_n6152_ = NAND ( new_n6151_, new_n6150_ ) -new_n6153_ = OR ( new_n6152_, new_n6149_ ) -new_n6154_ = NAND ( new_n6152_, new_n6149_ ) -new_n6155_ = NAND ( new_n6154_, new_n6153_ ) -new_n6156_ = NAND ( new_n5911_, new_n5904_ ) -new_n6157_ = NAND ( new_n6156_, new_n5905_ ) -new_n6158_ = XOR ( new_n6157_, new_n6155_ ) -new_n6159_ = OR ( new_n6158_, new_n1080_ ) -new_n6160_ = NAND ( new_n6159_, new_n6148_ ) -new_n6161_ = OR ( new_n6160_, NET_275 ) -new_n6162_ = OR ( new_n1930_, new_n1129_ ) -new_n6163_ = OR ( new_n1125_, new_n1926_ ) -NET_8047 = NAND ( new_n6163_, new_n6162_, new_n6161_ ) -new_n6165_ = NAND ( new_n6019_, new_n3540_ ) -new_n6166_ = OR ( new_n5154_, new_n3536_ ) -new_n6167_ = NAND ( new_n5138_, new_n3543_ ) -new_n6168_ = NOR ( new_n3745_, new_n5572_ ) -new_n6169_ = NOT ( new_n2124_ ) -new_n6170_ = NOR ( new_n3515_, new_n6169_ ) -new_n6171_ = NOR ( new_n6170_, new_n6168_ ) -new_n6172_ = NAND ( new_n6171_, new_n6167_, new_n6166_, new_n6165_ ) -new_n6173_ = NAND ( new_n6172_, new_n3553_ ) -new_n6174_ = NAND ( new_n3552_, NET_140 ) -NET_8049 = NAND ( new_n6174_, new_n6173_ ) -new_n6176_ = NAND ( new_n6172_, new_n3559_ ) -new_n6177_ = NAND ( new_n3558_, NET_108 ) -NET_8050 = NAND ( new_n6177_, new_n6176_ ) -new_n6179_ = OR ( new_n6158_, new_n1078_ ) -new_n6180_ = NAND ( new_n1078_, new_n1942_ ) -new_n6181_ = NAND ( new_n6180_, new_n6179_ ) -new_n6182_ = OR ( new_n6181_, NET_520 ) -new_n6183_ = OR ( new_n1619_, new_n1143_ ) -new_n6184_ = OR ( new_n1101_, new_n1636_ ) -NET_8065 = NAND ( new_n6184_, new_n6183_, new_n6182_ ) -new_n6186_ = OR ( new_n6104_, new_n2979_ ) -new_n6187_ = NAND ( new_n6108_, new_n2982_ ) -new_n6188_ = NAND ( new_n2998_, new_n1688_ ) -new_n6189_ = NAND ( new_n2984_, new_n1663_ ) -new_n6190_ = NAND ( new_n2975_, NET_425 ) -new_n6191_ = NAND ( new_n2930_, new_n1672_ ) -new_n6192_ = AND ( new_n6191_, new_n6190_, new_n6189_ ) -NET_8066 = NAND ( new_n6192_, new_n6188_, new_n6187_, new_n6186_ ) -new_n6194_ = OR ( new_n1078_, NET_489 ) -new_n6195_ = NAND ( new_n6156_, new_n6154_, new_n5905_ ) -new_n6196_ = OR ( new_n1078_, NET_244 ) -new_n6197_ = NAND ( new_n1078_, new_n2456_ ) -new_n6198_ = NAND ( new_n6197_, new_n6196_ ) -new_n6199_ = NAND ( new_n6198_, NET_1 ) -new_n6200_ = OR ( new_n6198_, NET_1 ) -new_n6201_ = NAND ( new_n6200_, new_n6199_, new_n6195_, new_n6153_ ) -new_n6202_ = NAND ( new_n6157_, new_n6153_ ) -new_n6203_ = NAND ( new_n6200_, new_n6199_ ) -new_n6204_ = NAND ( new_n6203_, new_n6202_, new_n6154_ ) -new_n6205_ = NAND ( new_n6204_, new_n6201_ ) -new_n6206_ = NAND ( new_n6205_, new_n1078_ ) -new_n6207_ = NAND ( new_n6206_, new_n6194_ ) -new_n6208_ = OR ( new_n6207_, NET_275 ) -new_n6209_ = NAND ( new_n1921_, NET_64, NET_275 ) -NET_8113 = NAND ( new_n6209_, new_n6208_ ) -new_n6211_ = NAND ( new_n4310_, new_n1304_ ) -new_n6212_ = OR ( NET_64, new_n4312_ ) -new_n6213_ = OR ( new_n4316_, new_n1127_ ) -new_n6214_ = NAND ( new_n6213_, new_n6212_ ) -new_n6215_ = OR ( new_n6214_, new_n1304_ ) -new_n6216_ = NAND ( new_n6215_, new_n6211_ ) -new_n6217_ = OR ( new_n6216_, new_n3231_ ) -new_n6218_ = NAND ( new_n3229_, new_n2046_ ) -new_n6219_ = NAND ( new_n6214_, new_n3233_ ) -new_n6220_ = NAND ( new_n6219_, new_n6218_, new_n6217_ ) -new_n6221_ = XOR ( new_n6220_, new_n3241_ ) -new_n6222_ = OR ( new_n6216_, new_n3219_ ) -new_n6223_ = NAND ( new_n3583_, new_n2046_ ) -new_n6224_ = OR ( new_n3222_, new_n2038_ ) -new_n6225_ = OR ( new_n3224_, new_n2040_ ) -new_n6226_ = NAND ( new_n6225_, new_n6224_, new_n6223_, new_n6222_ ) -new_n6227_ = OR ( new_n6226_, new_n6221_ ) -new_n6228_ = NAND ( new_n6226_, new_n6221_ ) -new_n6229_ = NAND ( new_n6228_, new_n6227_ ) -new_n6230_ = NAND ( new_n6065_, new_n6061_ ) -new_n6231_ = NAND ( new_n6230_, new_n6062_ ) -new_n6232_ = XOR ( new_n6231_, new_n6229_ ) -new_n6233_ = NOR ( new_n6232_, new_n3170_ ) -new_n6234_ = OR ( new_n1303_, new_n2038_ ) -new_n6235_ = NAND ( new_n1303_, NET_179 ) -new_n6236_ = NAND ( new_n6235_, new_n6234_ ) -new_n6237_ = XOR ( new_n6236_, new_n6214_ ) -new_n6238_ = OR ( new_n6075_, new_n6048_ ) -new_n6239_ = NAND ( new_n6238_, new_n6070_ ) -new_n6240_ = NAND ( new_n6075_, new_n6048_ ) -new_n6241_ = NAND ( new_n6240_, new_n6239_ ) -new_n6242_ = NAND ( new_n6241_, new_n6237_ ) -new_n6243_ = OR ( new_n6241_, new_n6237_ ) -new_n6244_ = NAND ( new_n6243_, new_n6242_, new_n3274_ ) -new_n6245_ = NAND ( new_n6214_, new_n3287_ ) -new_n6246_ = NAND ( new_n1308_, new_n1305_, NET_275, NET_194 ) -new_n6247_ = OR ( NET_275, new_n1955_ ) -new_n6248_ = NAND ( new_n6247_, new_n6246_, new_n6245_, new_n6244_ ) -NET_8114 = OR ( new_n6248_, new_n6233_ ) -new_n6250_ = NAND ( new_n6205_, new_n1080_ ) -new_n6251_ = NAND ( new_n1078_, new_n1913_ ) -new_n6252_ = NAND ( new_n6251_, new_n6250_ ) -new_n6253_ = OR ( new_n6252_, NET_520 ) -new_n6254_ = NAND ( new_n1618_, NET_520, NET_309, new_n1636_ ) -NET_8129 = NAND ( new_n6254_, new_n6253_ ) -new_n6256_ = NOT ( new_n2725_ ) -new_n6257_ = NOR ( new_n4636_, new_n1569_ ) -new_n6258_ = NAND ( new_n6257_, new_n6256_ ) -new_n6259_ = NAND ( new_n2759_, new_n1663_ ) -new_n6260_ = NAND ( new_n6259_, new_n6258_, new_n6090_ ) -new_n6261_ = XOR ( new_n6260_, new_n2743_ ) -new_n6262_ = NAND ( new_n6257_, new_n2759_ ) -new_n6263_ = NAND ( new_n2726_, new_n1663_ ) -new_n6264_ = NAND ( new_n6263_, new_n6262_, new_n6097_ ) -new_n6265_ = OR ( new_n6264_, new_n6261_ ) -new_n6266_ = NAND ( new_n6264_, new_n6261_ ) -new_n6267_ = NAND ( new_n6266_, new_n6265_ ) -new_n6268_ = NAND ( new_n6103_, new_n6099_ ) -new_n6269_ = NAND ( new_n6268_, new_n6100_ ) -new_n6270_ = XOR ( new_n6269_, new_n6267_ ) -new_n6271_ = NOR ( new_n6270_, new_n2810_ ) -new_n6272_ = NAND ( new_n6257_, new_n2838_ ) -new_n6273_ = NAND ( new_n2820_, new_n1676_ ) -new_n6274_ = NAND ( new_n2831_, new_n1653_ ) -new_n6275_ = NAND ( new_n2800_, NET_362 ) -new_n6276_ = NAND ( new_n6275_, new_n6274_, new_n6273_, new_n6272_ ) -NET_8130 = OR ( new_n6276_, new_n6271_ ) -new_n6278_ = NOR ( new_n6181_, new_n1569_ ) -new_n6279_ = NAND ( new_n6278_, new_n2838_ ) -new_n6280_ = NAND ( new_n2800_, NET_372 ) -new_n6281_ = AND ( new_n2828_, new_n1403_ ) -new_n6282_ = OR ( new_n6281_, new_n2825_ ) -new_n6283_ = NAND ( new_n6282_, new_n1583_ ) -new_n6284_ = NOR ( new_n6283_, new_n2467_ ) -new_n6285_ = NAND ( new_n6284_, new_n2801_ ) -NET_8131 = NAND ( new_n6285_, new_n6280_, new_n6279_ ) -new_n6287_ = NOR ( new_n6270_, new_n2856_ ) -new_n6288_ = NAND ( new_n6257_, new_n2864_ ) -new_n6289_ = OR ( new_n2858_, new_n6088_ ) -new_n6290_ = NAND ( new_n2862_, new_n1653_ ) -new_n6291_ = NAND ( new_n2854_, NET_394 ) -new_n6292_ = NAND ( new_n6291_, new_n6290_, new_n6289_, new_n6288_ ) -NET_8132 = OR ( new_n6292_, new_n6287_ ) -new_n6294_ = NAND ( new_n6278_, new_n2864_ ) -new_n6295_ = NAND ( new_n2854_, NET_404 ) -new_n6296_ = NAND ( new_n6284_, new_n2855_ ) -NET_8133 = NAND ( new_n6296_, new_n6295_, new_n6294_ ) -new_n6298_ = NAND ( new_n6278_, new_n2982_ ) -new_n6299_ = NAND ( new_n2975_, NET_436 ) -new_n6300_ = NAND ( new_n6284_, new_n2976_ ) -new_n6301_ = NAND ( new_n2930_, new_n2462_ ) -new_n6302_ = AND ( new_n6301_, new_n6300_ ) -NET_8134 = NAND ( new_n6302_, new_n6299_, new_n6298_ ) -new_n6304_ = NOR ( new_n5172_, new_n6169_ ) -new_n6305_ = OR ( new_n5301_, new_n3322_ ) -new_n6306_ = XNOR ( new_n6305_, new_n6304_ ) -new_n6307_ = OR ( new_n6018_, new_n6013_ ) -new_n6308_ = NAND ( new_n6307_, new_n6012_ ) -new_n6309_ = NAND ( new_n6018_, new_n6013_ ) -new_n6310_ = NAND ( new_n6309_, new_n6308_ ) -new_n6311_ = XNOR ( new_n6310_, new_n6306_ ) -new_n6312_ = NAND ( new_n6311_, new_n3336_ ) -new_n6313_ = OR ( new_n5317_, new_n3315_ ) -new_n6314_ = NAND ( new_n5300_, new_n5296_, new_n3361_ ) -new_n6315_ = NAND ( new_n3353_, new_n2121_ ) -new_n6316_ = NAND ( new_n3364_, new_n2111_ ) -new_n6317_ = NAND ( new_n3366_, new_n2137_ ) -new_n6318_ = AND ( new_n6317_, new_n6316_, new_n6315_, new_n5332_ ) -NET_8167 = NAND ( new_n6318_, new_n6314_, new_n6313_, new_n6312_ ) -new_n6320_ = NOR ( new_n6252_, new_n1569_ ) -new_n6321_ = NAND ( new_n6320_, new_n2838_ ) -new_n6322_ = NAND ( new_n2800_, NET_373 ) -NET_8179 = NAND ( new_n6322_, new_n6321_, new_n6285_ ) -new_n6324_ = NAND ( new_n6320_, new_n2864_ ) -new_n6325_ = NAND ( new_n2854_, NET_405 ) -NET_8180 = NAND ( new_n6325_, new_n6324_, new_n6296_ ) -new_n6327_ = OR ( new_n6270_, new_n2979_ ) -new_n6328_ = NAND ( new_n6257_, new_n2982_ ) -new_n6329_ = NAND ( new_n2998_, new_n1676_ ) -new_n6330_ = NAND ( new_n2984_, new_n1653_ ) -new_n6331_ = NAND ( new_n2975_, NET_426 ) -new_n6332_ = NAND ( new_n2930_, new_n1658_ ) -new_n6333_ = AND ( new_n6332_, new_n6331_, new_n6330_ ) -NET_8181 = NAND ( new_n6333_, new_n6329_, new_n6328_, new_n6327_ ) -new_n6335_ = NAND ( new_n6320_, new_n2982_ ) -new_n6336_ = NAND ( new_n2975_, NET_437 ) -NET_8182 = NAND ( new_n6336_, new_n6335_, new_n6302_ ) -new_n6338_ = OR ( new_n6270_, new_n2909_ ) -new_n6339_ = OR ( new_n2930_, new_n2927_ ) -new_n6340_ = NAND ( new_n6339_, new_n6257_ ) -new_n6341_ = NAND ( new_n2925_, new_n1658_ ) -new_n6342_ = NAND ( new_n2937_, new_n1653_ ) -new_n6343_ = OR ( NET_520, new_n1591_ ) -new_n6344_ = NAND ( new_n2935_, new_n1676_ ) -new_n6345_ = AND ( new_n6344_, new_n6343_, new_n6342_ ) -NET_8183 = NAND ( new_n6345_, new_n6341_, new_n6340_, new_n6338_ ) -new_n6347_ = NAND ( new_n6311_, new_n3509_ ) -new_n6348_ = OR ( new_n5317_, new_n3503_ ) -new_n6349_ = OR ( new_n5301_, new_n3518_ ) -new_n6350_ = NAND ( new_n3746_, new_n2137_ ) -new_n6351_ = NAND ( new_n3516_, new_n2111_ ) -new_n6352_ = NAND ( new_n3498_, NET_173 ) -new_n6353_ = NAND ( new_n3360_, new_n2121_ ) -new_n6354_ = AND ( new_n6353_, new_n6352_, new_n6351_, new_n6350_ ) -NET_8215 = NAND ( new_n6354_, new_n6349_, new_n6348_, new_n6347_ ) -new_n6356_ = NAND ( new_n4485_, new_n1304_ ) -new_n6357_ = OR ( new_n3320_, new_n1304_ ) -new_n6358_ = NAND ( new_n6357_, new_n6356_ ) -new_n6359_ = OR ( new_n6358_, new_n3231_ ) -new_n6360_ = NAND ( new_n3229_, new_n2033_ ) -new_n6361_ = NAND ( new_n3233_, new_n3320_ ) -new_n6362_ = NAND ( new_n6361_, new_n6360_, new_n6359_ ) -new_n6363_ = XOR ( new_n6362_, new_n3241_ ) -new_n6364_ = OR ( new_n6358_, new_n3219_ ) -new_n6365_ = NAND ( new_n3583_, new_n2033_ ) -new_n6366_ = NOR ( new_n3224_, new_n2026_ ) -new_n6367_ = NOR ( new_n3222_, new_n2023_ ) -new_n6368_ = NOR ( new_n6367_, new_n6366_ ) -new_n6369_ = NAND ( new_n6368_, new_n6365_, new_n6364_ ) -new_n6370_ = OR ( new_n6369_, new_n6363_ ) -new_n6371_ = NAND ( new_n6369_, new_n6363_ ) -new_n6372_ = NAND ( new_n6371_, new_n6370_ ) -new_n6373_ = NAND ( new_n6231_, new_n6227_ ) -new_n6374_ = NAND ( new_n6373_, new_n6228_ ) -new_n6375_ = XOR ( new_n6374_, new_n6372_ ) -new_n6376_ = OR ( new_n6375_, new_n3170_ ) -new_n6377_ = NAND ( new_n6236_, new_n6214_ ) -new_n6378_ = NAND ( new_n6377_, new_n6240_, new_n6239_ ) -new_n6379_ = OR ( new_n6236_, new_n6214_ ) -new_n6380_ = OR ( new_n1303_, NET_148 ) -new_n6381_ = NAND ( new_n1303_, new_n2026_ ) -new_n6382_ = NAND ( new_n6381_, new_n6380_ ) -new_n6383_ = NAND ( new_n6382_, new_n3320_ ) -new_n6384_ = OR ( new_n6382_, new_n3320_ ) -new_n6385_ = NAND ( new_n6384_, new_n6383_ ) -new_n6386_ = NAND ( new_n6385_, new_n6379_, new_n6378_ ) -new_n6387_ = NAND ( new_n6379_, new_n6241_ ) -new_n6388_ = NAND ( new_n6387_, new_n6384_, new_n6383_, new_n6377_ ) -new_n6389_ = NAND ( new_n6388_, new_n6386_, new_n3274_ ) -new_n6390_ = NAND ( new_n3285_, new_n3320_, new_n3159_ ) -new_n6391_ = NOR ( new_n3166_, new_n1289_ ) -new_n6392_ = NAND ( new_n6391_, new_n3158_, new_n3282_, NET_275 ) -new_n6393_ = OR ( new_n3158_, new_n1075_ ) -new_n6394_ = OR ( NET_275, new_n1954_ ) -new_n6395_ = AND ( new_n6394_, new_n6393_, new_n6392_ ) -NET_8216 = NAND ( new_n6395_, new_n6390_, new_n6389_, new_n6376_ ) -new_n6397_ = NOR ( new_n4747_, new_n1569_ ) -new_n6398_ = NAND ( new_n6397_, new_n6256_ ) -new_n6399_ = NAND ( new_n2759_, new_n1653_ ) -new_n6400_ = NAND ( new_n6399_, new_n6398_, new_n6090_ ) -new_n6401_ = XOR ( new_n6400_, new_n2743_ ) -new_n6402_ = NAND ( new_n6397_, new_n2759_ ) -new_n6403_ = NAND ( new_n2726_, new_n1653_ ) -new_n6404_ = NAND ( new_n6403_, new_n6402_, new_n6097_ ) -new_n6405_ = OR ( new_n6404_, new_n6401_ ) -new_n6406_ = NAND ( new_n6404_, new_n6401_ ) -new_n6407_ = NAND ( new_n6406_, new_n6405_ ) -new_n6408_ = NAND ( new_n6269_, new_n6265_ ) -new_n6409_ = NAND ( new_n6408_, new_n6266_ ) -new_n6410_ = XOR ( new_n6409_, new_n6407_ ) -new_n6411_ = NOR ( new_n6410_, new_n2810_ ) -new_n6412_ = NAND ( new_n6397_, new_n2838_ ) -new_n6413_ = NAND ( new_n2820_, new_n1663_ ) -new_n6414_ = NAND ( new_n2831_, new_n1642_ ) -new_n6415_ = NAND ( new_n2800_, NET_363 ) -new_n6416_ = NAND ( new_n6415_, new_n6414_, new_n6413_, new_n6412_ ) -NET_8221 = OR ( new_n6416_, new_n6411_ ) -new_n6418_ = NOR ( new_n6410_, new_n2856_ ) -new_n6419_ = NAND ( new_n6397_, new_n2864_ ) -new_n6420_ = NAND ( new_n2859_, new_n1663_ ) -new_n6421_ = NAND ( new_n2862_, new_n1642_ ) -new_n6422_ = NAND ( new_n2854_, NET_395 ) -new_n6423_ = NAND ( new_n6422_, new_n6421_, new_n6420_, new_n6419_ ) -NET_8222 = OR ( new_n6423_, new_n6418_ ) -new_n6425_ = OR ( new_n1560_, new_n1716_ ) -new_n6426_ = NAND ( new_n1560_, NET_421 ) -new_n6427_ = NAND ( new_n6426_, new_n6425_ ) -new_n6428_ = XOR ( new_n6427_, new_n5506_ ) -new_n6429_ = NAND ( new_n6129_, new_n6124_ ) -new_n6430_ = NAND ( new_n6429_, new_n5358_ ) -new_n6431_ = OR ( new_n6129_, new_n6124_ ) -new_n6432_ = AND ( new_n6431_, new_n6430_ ) -new_n6433_ = OR ( new_n6432_, new_n6428_ ) -new_n6434_ = NAND ( new_n6432_, new_n6428_ ) -new_n6435_ = NAND ( new_n6434_, new_n6433_, new_n2877_ ) -new_n6436_ = OR ( new_n5524_, new_n2869_ ) -new_n6437_ = NAND ( new_n5506_, new_n2893_ ) -new_n6438_ = NOR ( new_n2871_, new_n2942_ ) -new_n6439_ = NOR ( new_n6438_, new_n5563_ ) -NET_8223 = NAND ( new_n6439_, new_n6437_, new_n6436_, new_n6435_ ) -new_n6441_ = NAND ( new_n6311_, new_n3540_ ) -new_n6442_ = OR ( new_n5317_, new_n3536_ ) -new_n6443_ = OR ( new_n5301_, new_n3544_ ) -new_n6444_ = NOR ( new_n3745_, new_n5881_ ) -new_n6445_ = NOT ( new_n2111_ ) -new_n6446_ = NOR ( new_n3515_, new_n6445_ ) -new_n6447_ = NOR ( new_n6446_, new_n6444_ ) -new_n6448_ = NAND ( new_n6447_, new_n6443_, new_n6442_, new_n6441_ ) -new_n6449_ = NAND ( new_n6448_, new_n3553_ ) -new_n6450_ = NAND ( new_n3552_, NET_141 ) -NET_8248 = NAND ( new_n6450_, new_n6449_ ) -new_n6452_ = NAND ( new_n6448_, new_n3559_ ) -new_n6453_ = NAND ( new_n3558_, NET_109 ) -NET_8249 = NAND ( new_n6453_, new_n6452_ ) -new_n6455_ = OR ( new_n6410_, new_n2979_ ) -new_n6456_ = NAND ( new_n6397_, new_n2982_ ) -new_n6457_ = NAND ( new_n2998_, new_n1663_ ) -new_n6458_ = NAND ( new_n2984_, new_n1642_ ) -new_n6459_ = NAND ( new_n2975_, NET_427 ) -new_n6460_ = NAND ( new_n2930_, new_n1648_ ) -new_n6461_ = AND ( new_n6460_, new_n6459_, new_n6458_ ) -NET_8256 = NAND ( new_n6461_, new_n6457_, new_n6456_, new_n6455_ ) -new_n6463_ = OR ( new_n6410_, new_n2909_ ) -new_n6464_ = NAND ( new_n6397_, new_n6339_ ) -new_n6465_ = NAND ( new_n2925_, new_n1648_ ) -new_n6466_ = NAND ( new_n2937_, new_n1642_ ) -new_n6467_ = OR ( NET_520, new_n1647_ ) -new_n6468_ = NAND ( new_n2935_, new_n1663_ ) -new_n6469_ = AND ( new_n6468_, new_n6467_, new_n6466_ ) -NET_8257 = NAND ( new_n6469_, new_n6465_, new_n6464_, new_n6463_ ) -new_n6471_ = NOR ( new_n4889_, new_n1569_ ) -new_n6472_ = NAND ( new_n6471_, new_n6256_ ) -new_n6473_ = NOT ( new_n1642_ ) -new_n6474_ = OR ( new_n2721_, new_n6473_ ) -new_n6475_ = NAND ( new_n6474_, new_n6472_, new_n6090_ ) -new_n6476_ = XOR ( new_n6475_, new_n2743_ ) -new_n6477_ = NAND ( new_n6471_, new_n2759_ ) -new_n6478_ = NAND ( new_n2726_, new_n1642_ ) -new_n6479_ = NAND ( new_n6478_, new_n6477_, new_n6097_ ) -new_n6480_ = OR ( new_n6479_, new_n6476_ ) -new_n6481_ = NAND ( new_n6479_, new_n6476_ ) -new_n6482_ = NAND ( new_n6481_, new_n6480_ ) -new_n6483_ = NAND ( new_n6409_, new_n6405_ ) -new_n6484_ = NAND ( new_n6483_, new_n6406_ ) -new_n6485_ = XOR ( new_n6484_, new_n6482_ ) -new_n6486_ = NOR ( new_n6485_, new_n2810_ ) -new_n6487_ = NAND ( new_n6471_, new_n2838_ ) -new_n6488_ = NAND ( new_n2820_, new_n1653_ ) -new_n6489_ = NAND ( new_n2831_, new_n2300_ ) -new_n6490_ = NAND ( new_n2800_, NET_364 ) -new_n6491_ = NAND ( new_n6490_, new_n6489_, new_n6488_, new_n6487_ ) -NET_8289 = OR ( new_n6491_, new_n6486_ ) -new_n6493_ = NOR ( new_n6485_, new_n2856_ ) -new_n6494_ = NAND ( new_n6471_, new_n2864_ ) -new_n6495_ = NAND ( new_n2859_, new_n1653_ ) -new_n6496_ = NAND ( new_n2862_, new_n2300_ ) -new_n6497_ = NAND ( new_n2854_, NET_396 ) -new_n6498_ = NAND ( new_n6497_, new_n6496_, new_n6495_, new_n6494_ ) -NET_8290 = OR ( new_n6498_, new_n6493_ ) -new_n6500_ = NOR ( new_n5172_, new_n6445_ ) -new_n6501_ = OR ( new_n5428_, new_n3322_ ) -new_n6502_ = XNOR ( new_n6501_, new_n6500_ ) -new_n6503_ = OR ( new_n6310_, new_n6305_ ) -new_n6504_ = NAND ( new_n6503_, new_n6304_ ) -new_n6505_ = NAND ( new_n6310_, new_n6305_ ) -new_n6506_ = NAND ( new_n6505_, new_n6504_ ) -new_n6507_ = XNOR ( new_n6506_, new_n6502_ ) -new_n6508_ = NAND ( new_n6507_, new_n3336_ ) -new_n6509_ = OR ( new_n5444_, new_n3315_ ) -new_n6510_ = NAND ( new_n5427_, new_n5423_, new_n3361_ ) -new_n6511_ = NAND ( new_n3353_, new_n2108_ ) -new_n6512_ = NAND ( new_n3364_, new_n2098_ ) -new_n6513_ = NAND ( new_n3366_, new_n2124_ ) -new_n6514_ = AND ( new_n6513_, new_n6512_, new_n6511_, new_n5459_ ) -NET_8307 = NAND ( new_n6514_, new_n6510_, new_n6509_, new_n6508_ ) -new_n6516_ = OR ( new_n6485_, new_n2979_ ) -new_n6517_ = NAND ( new_n6471_, new_n2982_ ) -new_n6518_ = NAND ( new_n2998_, new_n1653_ ) -new_n6519_ = NAND ( new_n2984_, new_n2300_ ) -new_n6520_ = NAND ( new_n2975_, NET_428 ) -new_n6521_ = NAND ( new_n2930_, new_n1616_ ) -new_n6522_ = AND ( new_n6521_, new_n6520_, new_n6519_ ) -NET_8317 = NAND ( new_n6522_, new_n6518_, new_n6517_, new_n6516_ ) -new_n6524_ = OR ( new_n6485_, new_n2909_ ) -new_n6525_ = NAND ( new_n6471_, new_n6339_ ) -new_n6526_ = NAND ( new_n2925_, new_n1616_ ) -new_n6527_ = NAND ( new_n2937_, new_n2300_ ) -new_n6528_ = OR ( NET_520, new_n1590_ ) -new_n6529_ = NAND ( new_n2935_, new_n1653_ ) -new_n6530_ = AND ( new_n6529_, new_n6528_, new_n6527_ ) -NET_8318 = NAND ( new_n6530_, new_n6526_, new_n6525_, new_n6524_ ) -new_n6532_ = NAND ( new_n6507_, new_n3509_ ) -new_n6533_ = OR ( new_n5444_, new_n3503_ ) -new_n6534_ = OR ( new_n5428_, new_n3518_ ) -new_n6535_ = NAND ( new_n3746_, new_n2124_ ) -new_n6536_ = NAND ( new_n3516_, new_n2098_ ) -new_n6537_ = NAND ( new_n3498_, NET_174 ) -new_n6538_ = NAND ( new_n3360_, new_n2108_ ) -new_n6539_ = AND ( new_n6538_, new_n6537_, new_n6536_, new_n6535_ ) -NET_8340 = NAND ( new_n6539_, new_n6534_, new_n6533_, new_n6532_ ) -new_n6541_ = NOR ( new_n5055_, new_n1569_ ) -new_n6542_ = NAND ( new_n6541_, new_n6256_ ) -new_n6543_ = NAND ( new_n2759_, new_n2300_ ) -new_n6544_ = NAND ( new_n6543_, new_n6542_, new_n6090_ ) -new_n6545_ = XOR ( new_n6544_, new_n2743_ ) -new_n6546_ = NAND ( new_n6541_, new_n2759_ ) -new_n6547_ = NAND ( new_n2726_, new_n2300_ ) -new_n6548_ = NAND ( new_n6547_, new_n6546_, new_n6097_ ) -new_n6549_ = OR ( new_n6548_, new_n6545_ ) -new_n6550_ = NAND ( new_n6548_, new_n6545_ ) -new_n6551_ = NAND ( new_n6550_, new_n6549_ ) -new_n6552_ = NAND ( new_n6484_, new_n6480_ ) -new_n6553_ = NAND ( new_n6552_, new_n6481_ ) -new_n6554_ = XOR ( new_n6553_, new_n6551_ ) -new_n6555_ = NOR ( new_n6554_, new_n2810_ ) -new_n6556_ = NAND ( new_n6541_, new_n2838_ ) -new_n6557_ = NAND ( new_n2820_, new_n1642_ ) -new_n6558_ = NAND ( new_n2831_, new_n2338_ ) -new_n6559_ = NAND ( new_n2800_, NET_365 ) -new_n6560_ = NAND ( new_n6559_, new_n6558_, new_n6557_, new_n6556_ ) -NET_8344 = OR ( new_n6560_, new_n6555_ ) -new_n6562_ = NOR ( new_n6554_, new_n2856_ ) -new_n6563_ = NAND ( new_n6541_, new_n2864_ ) -new_n6564_ = OR ( new_n2858_, new_n6473_ ) -new_n6565_ = NAND ( new_n2862_, new_n2338_ ) -new_n6566_ = NAND ( new_n2854_, NET_397 ) -new_n6567_ = NAND ( new_n6566_, new_n6565_, new_n6564_, new_n6563_ ) -NET_8345 = OR ( new_n6567_, new_n6562_ ) -new_n6569_ = OR ( new_n1560_, new_n1704_ ) -new_n6570_ = NAND ( new_n1560_, NET_422 ) -new_n6571_ = NAND ( new_n6570_, new_n6569_ ) -new_n6572_ = XOR ( new_n6571_, new_n5671_ ) -new_n6573_ = NAND ( new_n6432_, new_n6427_ ) -new_n6574_ = NAND ( new_n6573_, new_n5506_ ) -new_n6575_ = OR ( new_n6432_, new_n6427_ ) -new_n6576_ = AND ( new_n6575_, new_n6574_ ) -new_n6577_ = OR ( new_n6576_, new_n6572_ ) -new_n6578_ = NAND ( new_n6576_, new_n6572_ ) -new_n6579_ = NAND ( new_n6578_, new_n6577_, new_n2877_ ) -new_n6580_ = OR ( new_n5689_, new_n2869_ ) -new_n6581_ = NAND ( new_n5671_, new_n2893_ ) -new_n6582_ = NOR ( new_n2871_, new_n3049_ ) -new_n6583_ = NOR ( new_n6582_, new_n5712_ ) -NET_8346 = NAND ( new_n6583_, new_n6581_, new_n6580_, new_n6579_ ) -new_n6585_ = NAND ( new_n6507_, new_n3540_ ) -new_n6586_ = OR ( new_n5444_, new_n3536_ ) -new_n6587_ = OR ( new_n5428_, new_n3544_ ) -new_n6588_ = NOR ( new_n3745_, new_n6169_ ) -new_n6589_ = NOT ( new_n2098_ ) -new_n6590_ = NOR ( new_n3515_, new_n6589_ ) -new_n6591_ = NOR ( new_n6590_, new_n6588_ ) -new_n6592_ = NAND ( new_n6591_, new_n6587_, new_n6586_, new_n6585_ ) -new_n6593_ = NAND ( new_n6592_, new_n3553_ ) -new_n6594_ = NAND ( new_n3552_, NET_142 ) -NET_8389 = NAND ( new_n6594_, new_n6593_ ) -new_n6596_ = NAND ( new_n6592_, new_n3559_ ) -new_n6597_ = NAND ( new_n3558_, NET_110 ) -NET_8390 = NAND ( new_n6597_, new_n6596_ ) -new_n6599_ = OR ( new_n6554_, new_n2979_ ) -new_n6600_ = NAND ( new_n6541_, new_n2982_ ) -new_n6601_ = NAND ( new_n2998_, new_n1642_ ) -new_n6602_ = NAND ( new_n2984_, new_n2338_ ) -new_n6603_ = NAND ( new_n2975_, NET_429 ) -new_n6604_ = NAND ( new_n2930_, new_n2295_ ) -new_n6605_ = AND ( new_n6604_, new_n6603_, new_n6602_ ) -NET_8396 = NAND ( new_n6605_, new_n6601_, new_n6600_, new_n6599_ ) -new_n6607_ = OR ( new_n6554_, new_n2909_ ) -new_n6608_ = NAND ( new_n6541_, new_n6339_ ) -new_n6609_ = NAND ( new_n2925_, new_n2295_ ) -new_n6610_ = NAND ( new_n2937_, new_n2338_ ) -new_n6611_ = OR ( NET_520, new_n2331_ ) -new_n6612_ = NAND ( new_n2935_, new_n1642_ ) -new_n6613_ = AND ( new_n6612_, new_n6611_, new_n6610_ ) -NET_8397 = NAND ( new_n6613_, new_n6609_, new_n6608_, new_n6607_ ) -new_n6615_ = NOR ( new_n5191_, new_n1569_ ) -new_n6616_ = NAND ( new_n6615_, new_n6256_ ) -new_n6617_ = NOT ( new_n2338_ ) -new_n6618_ = OR ( new_n2721_, new_n6617_ ) -new_n6619_ = NAND ( new_n6618_, new_n6616_, new_n6090_ ) -new_n6620_ = XOR ( new_n6619_, new_n2743_ ) -new_n6621_ = NAND ( new_n6615_, new_n2759_ ) -new_n6622_ = NAND ( new_n2726_, new_n2338_ ) -new_n6623_ = NAND ( new_n6622_, new_n6621_, new_n6097_ ) -new_n6624_ = OR ( new_n6623_, new_n6620_ ) -new_n6625_ = NAND ( new_n6623_, new_n6620_ ) -new_n6626_ = NAND ( new_n6625_, new_n6624_ ) -new_n6627_ = NAND ( new_n6553_, new_n6549_ ) -new_n6628_ = NAND ( new_n6627_, new_n6550_ ) -new_n6629_ = XOR ( new_n6628_, new_n6626_ ) -new_n6630_ = NOR ( new_n6629_, new_n2810_ ) -new_n6631_ = NAND ( new_n6615_, new_n2838_ ) -new_n6632_ = NAND ( new_n2820_, new_n2300_ ) -new_n6633_ = NAND ( new_n2831_, new_n2350_ ) -new_n6634_ = NAND ( new_n2800_, NET_366 ) -new_n6635_ = NAND ( new_n6634_, new_n6633_, new_n6632_, new_n6631_ ) -NET_8455 = OR ( new_n6635_, new_n6630_ ) -new_n6637_ = NOR ( new_n6629_, new_n2856_ ) -new_n6638_ = NAND ( new_n6615_, new_n2864_ ) -new_n6639_ = NAND ( new_n2859_, new_n2300_ ) -new_n6640_ = NAND ( new_n2862_, new_n2350_ ) -new_n6641_ = NAND ( new_n2854_, NET_398 ) -new_n6642_ = NAND ( new_n6641_, new_n6640_, new_n6639_, new_n6638_ ) -NET_8456 = OR ( new_n6642_, new_n6637_ ) -new_n6644_ = NOR ( new_n5172_, new_n6589_ ) -new_n6645_ = NAND ( new_n5620_, new_n3321_ ) -new_n6646_ = XNOR ( new_n6645_, new_n6644_ ) -new_n6647_ = OR ( new_n6506_, new_n6501_ ) -new_n6648_ = NAND ( new_n6647_, new_n6500_ ) -new_n6649_ = NAND ( new_n6506_, new_n6501_ ) -new_n6650_ = NAND ( new_n6649_, new_n6648_ ) -new_n6651_ = XNOR ( new_n6650_, new_n6646_ ) -new_n6652_ = NAND ( new_n6651_, new_n3336_ ) -new_n6653_ = OR ( new_n5638_, new_n3315_ ) -new_n6654_ = NAND ( new_n5620_, new_n3361_ ) -new_n6655_ = NAND ( new_n3353_, new_n2095_ ) -new_n6656_ = NAND ( new_n3364_, new_n2085_ ) -new_n6657_ = NAND ( new_n3366_, new_n2111_ ) -new_n6658_ = AND ( new_n6657_, new_n6656_, new_n6655_, new_n5658_ ) -NET_8495 = NAND ( new_n6658_, new_n6654_, new_n6653_, new_n6652_ ) -new_n6660_ = OR ( new_n6629_, new_n2979_ ) -new_n6661_ = NAND ( new_n6615_, new_n2982_ ) -new_n6662_ = NAND ( new_n2998_, new_n2300_ ) -new_n6663_ = NAND ( new_n2984_, new_n2350_ ) -new_n6664_ = NAND ( new_n2975_, NET_430 ) -new_n6665_ = NAND ( new_n2930_, new_n2333_ ) -new_n6666_ = AND ( new_n6665_, new_n6664_, new_n6663_ ) -NET_8526 = NAND ( new_n6666_, new_n6662_, new_n6661_, new_n6660_ ) -new_n6668_ = OR ( new_n6629_, new_n2909_ ) -new_n6669_ = NAND ( new_n6615_, new_n6339_ ) -new_n6670_ = NAND ( new_n2925_, new_n2333_ ) -new_n6671_ = NAND ( new_n2937_, new_n2350_ ) -new_n6672_ = OR ( NET_520, new_n2330_ ) -new_n6673_ = NAND ( new_n2935_, new_n2300_ ) -new_n6674_ = AND ( new_n6673_, new_n6672_, new_n6671_ ) -NET_8527 = NAND ( new_n6674_, new_n6670_, new_n6669_, new_n6668_ ) -new_n6676_ = NAND ( new_n6651_, new_n3509_ ) -new_n6677_ = OR ( new_n5638_, new_n3503_ ) -new_n6678_ = NAND ( new_n5620_, new_n5756_ ) -new_n6679_ = NAND ( new_n3746_, new_n2111_ ) -new_n6680_ = NAND ( new_n3516_, new_n2085_ ) -new_n6681_ = NAND ( new_n3498_, NET_175 ) -new_n6682_ = NAND ( new_n3360_, new_n2095_ ) -new_n6683_ = AND ( new_n6682_, new_n6681_, new_n6680_, new_n6679_ ) -NET_8561 = NAND ( new_n6683_, new_n6678_, new_n6677_, new_n6676_ ) -new_n6685_ = NOR ( new_n5350_, new_n1569_ ) -new_n6686_ = NAND ( new_n6685_, new_n6256_ ) -new_n6687_ = NAND ( new_n2759_, new_n2350_ ) -new_n6688_ = NAND ( new_n6687_, new_n6686_, new_n6090_ ) -new_n6689_ = XOR ( new_n6688_, new_n2743_ ) -new_n6690_ = NAND ( new_n6685_, new_n2759_ ) -new_n6691_ = NAND ( new_n2726_, new_n2350_ ) -new_n6692_ = NAND ( new_n6691_, new_n6690_, new_n6097_ ) -new_n6693_ = OR ( new_n6692_, new_n6689_ ) -new_n6694_ = NAND ( new_n6692_, new_n6689_ ) -new_n6695_ = NAND ( new_n6694_, new_n6693_ ) -new_n6696_ = NAND ( new_n6628_, new_n6624_ ) -new_n6697_ = NAND ( new_n6696_, new_n6625_ ) -new_n6698_ = XOR ( new_n6697_, new_n6695_ ) -new_n6699_ = NOR ( new_n6698_, new_n2810_ ) -new_n6700_ = NAND ( new_n6685_, new_n2838_ ) -new_n6701_ = NAND ( new_n2820_, new_n2338_ ) -new_n6702_ = NAND ( new_n2831_, new_n2431_ ) -new_n6703_ = NAND ( new_n2800_, NET_367 ) -new_n6704_ = NAND ( new_n6703_, new_n6702_, new_n6701_, new_n6700_ ) -NET_8589 = OR ( new_n6704_, new_n6699_ ) -new_n6706_ = NOR ( new_n6698_, new_n2856_ ) -new_n6707_ = NAND ( new_n6685_, new_n2864_ ) -new_n6708_ = OR ( new_n2858_, new_n6617_ ) -new_n6709_ = NAND ( new_n2862_, new_n2431_ ) -new_n6710_ = NAND ( new_n2854_, NET_399 ) -new_n6711_ = NAND ( new_n6710_, new_n6709_, new_n6708_, new_n6707_ ) -NET_8590 = OR ( new_n6711_, new_n6706_ ) -new_n6713_ = OR ( new_n1560_, new_n1693_ ) -new_n6714_ = NAND ( new_n1560_, NET_423 ) -new_n6715_ = NAND ( new_n6714_, new_n6713_ ) -new_n6716_ = XNOR ( new_n6715_, new_n5813_ ) -new_n6717_ = NAND ( new_n6576_, new_n6571_ ) -new_n6718_ = NAND ( new_n6717_, new_n5671_ ) -new_n6719_ = OR ( new_n6576_, new_n6571_ ) -new_n6720_ = NAND ( new_n6719_, new_n6718_ ) -new_n6721_ = NAND ( new_n6720_, new_n6716_ ) -new_n6722_ = OR ( new_n6720_, new_n6716_ ) -new_n6723_ = NAND ( new_n6722_, new_n6721_, new_n2877_ ) -new_n6724_ = OR ( new_n5832_, new_n2869_ ) -new_n6725_ = NAND ( new_n5813_, new_n2893_ ) -new_n6726_ = NOT ( NET_440 ) -new_n6727_ = NOR ( new_n2871_, new_n6726_ ) -new_n6728_ = NOR ( new_n6727_, new_n5872_ ) -NET_8591 = NAND ( new_n6728_, new_n6725_, new_n6724_, new_n6723_ ) -new_n6730_ = NAND ( new_n6651_, new_n3540_ ) -new_n6731_ = OR ( new_n5638_, new_n3536_ ) -new_n6732_ = NAND ( new_n5620_, new_n3543_ ) -new_n6733_ = NOR ( new_n3745_, new_n6445_ ) -new_n6734_ = NOT ( new_n2085_ ) -new_n6735_ = NOR ( new_n3515_, new_n6734_ ) -new_n6736_ = NOR ( new_n6735_, new_n6733_ ) -new_n6737_ = NAND ( new_n6736_, new_n6732_, new_n6731_, new_n6730_ ) -new_n6738_ = NAND ( new_n6737_, new_n3553_ ) -new_n6739_ = NAND ( new_n3552_, NET_143 ) -NET_8606 = NAND ( new_n6739_, new_n6738_ ) -new_n6741_ = NAND ( new_n6737_, new_n3559_ ) -new_n6742_ = NAND ( new_n3558_, NET_111 ) -NET_8607 = NAND ( new_n6742_, new_n6741_ ) -new_n6744_ = OR ( new_n6698_, new_n2979_ ) -new_n6745_ = NAND ( new_n6685_, new_n2982_ ) -new_n6746_ = NAND ( new_n2998_, new_n2338_ ) -new_n6747_ = NAND ( new_n2984_, new_n2431_ ) -new_n6748_ = NAND ( new_n2975_, NET_431 ) -new_n6749_ = NAND ( new_n2930_, new_n2345_ ) -new_n6750_ = AND ( new_n6749_, new_n6748_, new_n6747_ ) -NET_8614 = NAND ( new_n6750_, new_n6746_, new_n6745_, new_n6744_ ) -new_n6752_ = OR ( new_n6698_, new_n2909_ ) -new_n6753_ = NAND ( new_n6685_, new_n6339_ ) -new_n6754_ = NAND ( new_n2925_, new_n2345_ ) -new_n6755_ = NAND ( new_n2937_, new_n2431_ ) -new_n6756_ = OR ( NET_520, new_n2343_ ) -new_n6757_ = NAND ( new_n2935_, new_n2338_ ) -new_n6758_ = AND ( new_n6757_, new_n6756_, new_n6755_ ) -NET_8615 = NAND ( new_n6758_, new_n6754_, new_n6753_, new_n6752_ ) -new_n6760_ = NOR ( new_n5481_, new_n1569_ ) -new_n6761_ = NAND ( new_n6760_, new_n6256_ ) -new_n6762_ = NAND ( new_n2759_, new_n2431_ ) -new_n6763_ = NAND ( new_n6762_, new_n6761_, new_n6090_ ) -new_n6764_ = XOR ( new_n6763_, new_n2743_ ) -new_n6765_ = NAND ( new_n6760_, new_n2759_ ) -new_n6766_ = NAND ( new_n2726_, new_n2431_ ) -new_n6767_ = NAND ( new_n6766_, new_n6765_, new_n6097_ ) -new_n6768_ = OR ( new_n6767_, new_n6764_ ) -new_n6769_ = NAND ( new_n6767_, new_n6764_ ) -new_n6770_ = NAND ( new_n6769_, new_n6768_ ) -new_n6771_ = NAND ( new_n6697_, new_n6693_ ) -new_n6772_ = NAND ( new_n6771_, new_n6694_ ) -new_n6773_ = XOR ( new_n6772_, new_n6770_ ) -new_n6774_ = NOR ( new_n6773_, new_n2810_ ) -new_n6775_ = NAND ( new_n6760_, new_n2838_ ) -new_n6776_ = NAND ( new_n2820_, new_n2350_ ) -new_n6777_ = NAND ( new_n2831_, new_n2494_ ) -new_n6778_ = NAND ( new_n2800_, NET_368 ) -new_n6779_ = NAND ( new_n6778_, new_n6777_, new_n6776_, new_n6775_ ) -NET_8644 = OR ( new_n6779_, new_n6774_ ) -new_n6781_ = NOR ( new_n6773_, new_n2856_ ) -new_n6782_ = NAND ( new_n6760_, new_n2864_ ) -new_n6783_ = NAND ( new_n2859_, new_n2350_ ) -new_n6784_ = NAND ( new_n2862_, new_n2494_ ) -new_n6785_ = NAND ( new_n2854_, NET_400 ) -new_n6786_ = NAND ( new_n6785_, new_n6784_, new_n6783_, new_n6782_ ) -NET_8645 = OR ( new_n6786_, new_n6781_ ) -new_n6788_ = OR ( new_n6773_, new_n2909_ ) -new_n6789_ = NAND ( new_n6760_, new_n6339_ ) -new_n6790_ = NAND ( new_n2925_, new_n2426_ ) -new_n6791_ = NAND ( new_n2937_, new_n2494_ ) -new_n6792_ = OR ( NET_520, new_n2459_ ) -new_n6793_ = NAND ( new_n2935_, new_n2350_ ) -new_n6794_ = AND ( new_n6793_, new_n6792_, new_n6791_ ) -NET_8646 = NAND ( new_n6794_, new_n6790_, new_n6789_, new_n6788_ ) -new_n6796_ = NOR ( new_n5172_, new_n6734_ ) -new_n6797_ = NAND ( new_n5769_, new_n3321_ ) -new_n6798_ = XNOR ( new_n6797_, new_n6796_ ) -new_n6799_ = OR ( new_n6650_, new_n6645_ ) -new_n6800_ = NAND ( new_n6799_, new_n6644_ ) -new_n6801_ = NAND ( new_n6650_, new_n6645_ ) -new_n6802_ = NAND ( new_n6801_, new_n6800_ ) -new_n6803_ = XNOR ( new_n6802_, new_n6798_ ) -new_n6804_ = NAND ( new_n6803_, new_n3336_ ) -new_n6805_ = OR ( new_n5785_, new_n3315_ ) -new_n6806_ = NAND ( new_n5769_, new_n3361_ ) -new_n6807_ = NAND ( new_n3353_, new_n2082_ ) -new_n6808_ = NAND ( new_n3364_, new_n2072_ ) -new_n6809_ = NAND ( new_n3366_, new_n2098_ ) -new_n6810_ = AND ( new_n6809_, new_n6808_, new_n6807_, new_n5800_ ) -NET_8661 = NAND ( new_n6810_, new_n6806_, new_n6805_, new_n6804_ ) -new_n6812_ = OR ( new_n6773_, new_n2979_ ) -new_n6813_ = NAND ( new_n6760_, new_n2982_ ) -new_n6814_ = NAND ( new_n2998_, new_n2350_ ) -new_n6815_ = NAND ( new_n2984_, new_n2494_ ) -new_n6816_ = NAND ( new_n2975_, NET_432 ) -new_n6817_ = NAND ( new_n2930_, new_n2426_ ) -new_n6818_ = AND ( new_n6817_, new_n6816_, new_n6815_ ) -NET_8670 = NAND ( new_n6818_, new_n6814_, new_n6813_, new_n6812_ ) -new_n6820_ = NAND ( new_n6803_, new_n3509_ ) -new_n6821_ = OR ( new_n5785_, new_n3503_ ) -new_n6822_ = NAND ( new_n5769_, new_n5756_ ) -new_n6823_ = NAND ( new_n3746_, new_n2098_ ) -new_n6824_ = NAND ( new_n3516_, new_n2072_ ) -new_n6825_ = NAND ( new_n3498_, NET_176 ) -new_n6826_ = NAND ( new_n3360_, new_n2082_ ) -new_n6827_ = AND ( new_n6826_, new_n6825_, new_n6824_, new_n6823_ ) -NET_8691 = NAND ( new_n6827_, new_n6822_, new_n6821_, new_n6820_ ) -new_n6829_ = NOR ( new_n5663_, new_n1569_ ) -new_n6830_ = NAND ( new_n6829_, new_n6256_ ) -new_n6831_ = NAND ( new_n2759_, new_n2494_ ) -new_n6832_ = NAND ( new_n6831_, new_n6830_, new_n6090_ ) -new_n6833_ = XOR ( new_n6832_, new_n2743_ ) -new_n6834_ = NAND ( new_n6829_, new_n2759_ ) -new_n6835_ = NAND ( new_n2726_, new_n2494_ ) -new_n6836_ = NAND ( new_n6835_, new_n6834_, new_n6097_ ) -new_n6837_ = OR ( new_n6836_, new_n6833_ ) -new_n6838_ = NAND ( new_n6836_, new_n6833_ ) -new_n6839_ = NAND ( new_n6838_, new_n6837_ ) -new_n6840_ = NAND ( new_n6772_, new_n6768_ ) -new_n6841_ = NAND ( new_n6840_, new_n6769_ ) -new_n6842_ = XOR ( new_n6841_, new_n6839_ ) -new_n6843_ = NOR ( new_n6842_, new_n2810_ ) -new_n6844_ = NAND ( new_n6829_, new_n2838_ ) -new_n6845_ = NAND ( new_n2820_, new_n2431_ ) -new_n6846_ = NAND ( new_n2831_, new_n2552_ ) -new_n6847_ = NAND ( new_n2800_, NET_369 ) -new_n6848_ = NAND ( new_n6847_, new_n6846_, new_n6845_, new_n6844_ ) -NET_8696 = OR ( new_n6848_, new_n6843_ ) -new_n6850_ = NOR ( new_n6842_, new_n2856_ ) -new_n6851_ = NAND ( new_n6829_, new_n2864_ ) -new_n6852_ = NAND ( new_n2859_, new_n2431_ ) -new_n6853_ = NAND ( new_n2862_, new_n2552_ ) -new_n6854_ = NAND ( new_n2854_, NET_401 ) -new_n6855_ = NAND ( new_n6854_, new_n6853_, new_n6852_, new_n6851_ ) -NET_8697 = OR ( new_n6855_, new_n6850_ ) -new_n6857_ = OR ( new_n1560_, new_n1681_ ) -new_n6858_ = NAND ( new_n1560_, NET_424 ) -new_n6859_ = NAND ( new_n6858_, new_n6857_ ) -new_n6860_ = XNOR ( new_n6859_, new_n5966_ ) -new_n6861_ = NOT ( new_n6720_ ) -new_n6862_ = NAND ( new_n6861_, new_n6715_ ) -new_n6863_ = NAND ( new_n6862_, new_n5813_ ) -new_n6864_ = OR ( new_n6861_, new_n6715_ ) -new_n6865_ = NAND ( new_n6864_, new_n6863_ ) -new_n6866_ = NAND ( new_n6865_, new_n6860_ ) -new_n6867_ = OR ( new_n6865_, new_n6860_ ) -new_n6868_ = NAND ( new_n6867_, new_n6866_, new_n2877_ ) -new_n6869_ = OR ( new_n5984_, new_n2869_ ) -new_n6870_ = NAND ( new_n5966_, new_n2893_ ) -new_n6871_ = NOT ( NET_439 ) -new_n6872_ = NOR ( new_n2871_, new_n6871_ ) -new_n6873_ = NOR ( new_n6872_, new_n6007_ ) -NET_8698 = NAND ( new_n6873_, new_n6870_, new_n6869_, new_n6868_ ) -new_n6875_ = OR ( new_n6842_, new_n2909_ ) -new_n6876_ = NAND ( new_n6829_, new_n6339_ ) -new_n6877_ = NAND ( new_n2925_, new_n2489_ ) -new_n6878_ = NAND ( new_n2937_, new_n2552_ ) -new_n6879_ = OR ( NET_520, new_n2488_ ) -new_n6880_ = NAND ( new_n2935_, new_n2431_ ) -new_n6881_ = AND ( new_n6880_, new_n6879_, new_n6878_ ) -NET_8699 = NAND ( new_n6881_, new_n6877_, new_n6876_, new_n6875_ ) -new_n6883_ = NAND ( new_n6803_, new_n3540_ ) -new_n6884_ = OR ( new_n5785_, new_n3536_ ) -new_n6885_ = NAND ( new_n5769_, new_n3543_ ) -new_n6886_ = NOR ( new_n3745_, new_n6589_ ) -new_n6887_ = NOT ( new_n2072_ ) -new_n6888_ = NOR ( new_n3515_, new_n6887_ ) -new_n6889_ = NOR ( new_n6888_, new_n6886_ ) -new_n6890_ = NAND ( new_n6889_, new_n6885_, new_n6884_, new_n6883_ ) -new_n6891_ = NAND ( new_n6890_, new_n3553_ ) -new_n6892_ = NAND ( new_n3552_, NET_144 ) -NET_8711 = NAND ( new_n6892_, new_n6891_ ) -new_n6894_ = NAND ( new_n6890_, new_n3559_ ) -new_n6895_ = NAND ( new_n3558_, NET_112 ) -NET_8712 = NAND ( new_n6895_, new_n6894_ ) -new_n6897_ = OR ( new_n6842_, new_n2979_ ) -new_n6898_ = NAND ( new_n6829_, new_n2982_ ) -new_n6899_ = NAND ( new_n2998_, new_n2431_ ) -new_n6900_ = NAND ( new_n2984_, new_n2552_ ) -new_n6901_ = NAND ( new_n2975_, NET_433 ) -new_n6902_ = NAND ( new_n2930_, new_n2489_ ) -new_n6903_ = AND ( new_n6902_, new_n6901_, new_n6900_ ) -NET_8719 = NAND ( new_n6903_, new_n6899_, new_n6898_, new_n6897_ ) -new_n6905_ = NOR ( new_n5805_, new_n1569_ ) -new_n6906_ = NAND ( new_n6905_, new_n6256_ ) -new_n6907_ = NAND ( new_n2759_, new_n2552_ ) -new_n6908_ = NAND ( new_n6907_, new_n6906_, new_n6090_ ) -new_n6909_ = XOR ( new_n6908_, new_n2743_ ) -new_n6910_ = NAND ( new_n6905_, new_n2759_ ) -new_n6911_ = NAND ( new_n2726_, new_n2552_ ) -new_n6912_ = NAND ( new_n6911_, new_n6910_, new_n6097_ ) -new_n6913_ = OR ( new_n6912_, new_n6909_ ) -new_n6914_ = NAND ( new_n6912_, new_n6909_ ) -new_n6915_ = NAND ( new_n6914_, new_n6913_ ) -new_n6916_ = NAND ( new_n6841_, new_n6837_ ) -new_n6917_ = NAND ( new_n6916_, new_n6838_ ) -new_n6918_ = XOR ( new_n6917_, new_n6915_ ) -new_n6919_ = NOR ( new_n6918_, new_n2810_ ) -new_n6920_ = NAND ( new_n6905_, new_n2838_ ) -new_n6921_ = NAND ( new_n2820_, new_n2494_ ) -new_n6922_ = NAND ( new_n2831_, new_n2483_ ) -new_n6923_ = NAND ( new_n2800_, NET_370 ) -new_n6924_ = NAND ( new_n6923_, new_n6922_, new_n6921_, new_n6920_ ) -NET_8746 = OR ( new_n6924_, new_n6919_ ) -new_n6926_ = NOR ( new_n6918_, new_n2856_ ) -new_n6927_ = NAND ( new_n6905_, new_n2864_ ) -new_n6928_ = NAND ( new_n2859_, new_n2494_ ) -new_n6929_ = NAND ( new_n2862_, new_n2483_ ) -new_n6930_ = NAND ( new_n2854_, NET_402 ) -new_n6931_ = NAND ( new_n6930_, new_n6929_, new_n6928_, new_n6927_ ) -NET_8747 = OR ( new_n6931_, new_n6926_ ) -new_n6933_ = OR ( new_n6865_, new_n5966_ ) -new_n6934_ = NAND ( new_n6933_, new_n6858_, new_n6857_ ) -new_n6935_ = NAND ( new_n6865_, new_n5966_ ) -new_n6936_ = OR ( new_n1560_, new_n1668_ ) -new_n6937_ = NAND ( new_n1560_, NET_425 ) -new_n6938_ = NAND ( new_n6937_, new_n6936_ ) -new_n6939_ = XOR ( new_n6938_, new_n2694_ ) -new_n6940_ = NAND ( new_n6939_, new_n6935_, new_n6934_ ) -new_n6941_ = NOT ( new_n6939_ ) -new_n6942_ = NAND ( new_n6935_, new_n6859_ ) -new_n6943_ = NAND ( new_n6942_, new_n6941_, new_n6933_ ) -new_n6944_ = NAND ( new_n6943_, new_n6940_ ) -new_n6945_ = NAND ( new_n6944_, new_n2877_ ) -new_n6946_ = OR ( new_n6104_, new_n2869_ ) -new_n6947_ = NAND ( new_n2893_, new_n2741_ ) -new_n6948_ = NOR ( new_n2871_, new_n1076_ ) -new_n6949_ = NOR ( new_n6948_, new_n6143_ ) -NET_8748 = NAND ( new_n6949_, new_n6947_, new_n6946_, new_n6945_ ) -new_n6951_ = NOR ( new_n5172_, new_n6887_ ) -new_n6952_ = OR ( new_n5924_, new_n3322_ ) -new_n6953_ = XNOR ( new_n6952_, new_n6951_ ) -new_n6954_ = OR ( new_n6802_, new_n6797_ ) -new_n6955_ = NAND ( new_n6954_, new_n6796_ ) -new_n6956_ = NAND ( new_n6802_, new_n6797_ ) -new_n6957_ = NAND ( new_n6956_, new_n6955_ ) -new_n6958_ = XNOR ( new_n6957_, new_n6953_ ) -new_n6959_ = NAND ( new_n6958_, new_n3336_ ) -new_n6960_ = OR ( new_n5940_, new_n3315_ ) -new_n6961_ = NAND ( new_n5923_, new_n5919_, new_n3361_ ) -new_n6962_ = NAND ( new_n3353_, new_n2069_ ) -new_n6963_ = NAND ( new_n3364_, new_n2059_ ) -new_n6964_ = NAND ( new_n3366_, new_n2085_ ) -new_n6965_ = AND ( new_n6964_, new_n6963_, new_n6962_, new_n5953_ ) -NET_8761 = NAND ( new_n6965_, new_n6961_, new_n6960_, new_n6959_ ) -new_n6967_ = OR ( new_n6918_, new_n2979_ ) -new_n6968_ = NAND ( new_n6905_, new_n2982_ ) -new_n6969_ = NAND ( new_n2998_, new_n2494_ ) -new_n6970_ = NAND ( new_n2984_, new_n2483_ ) -new_n6971_ = NAND ( new_n2975_, NET_434 ) -new_n6972_ = NAND ( new_n2930_, new_n2547_ ) -new_n6973_ = AND ( new_n6972_, new_n6971_, new_n6970_ ) -NET_8770 = NAND ( new_n6973_, new_n6969_, new_n6968_, new_n6967_ ) -new_n6975_ = OR ( new_n6918_, new_n2909_ ) -new_n6976_ = NAND ( new_n6905_, new_n6339_ ) -new_n6977_ = NAND ( new_n2925_, new_n2547_ ) -new_n6978_ = NAND ( new_n2937_, new_n2483_ ) -new_n6979_ = OR ( NET_520, new_n2546_ ) -new_n6980_ = NAND ( new_n2935_, new_n2494_ ) -new_n6981_ = AND ( new_n6980_, new_n6979_, new_n6978_ ) -NET_8771 = NAND ( new_n6981_, new_n6977_, new_n6976_, new_n6975_ ) -new_n6983_ = NAND ( new_n6958_, new_n3509_ ) -new_n6984_ = OR ( new_n5940_, new_n3503_ ) -new_n6985_ = OR ( new_n5924_, new_n3518_ ) -new_n6986_ = NAND ( new_n3746_, new_n2085_ ) -new_n6987_ = NAND ( new_n3516_, new_n2059_ ) -new_n6988_ = NAND ( new_n3498_, NET_177 ) -new_n6989_ = NAND ( new_n3360_, new_n2069_ ) -new_n6990_ = AND ( new_n6989_, new_n6988_, new_n6987_, new_n6986_ ) -NET_8788 = NAND ( new_n6990_, new_n6985_, new_n6984_, new_n6983_ ) -new_n6992_ = NAND ( new_n2483_, new_n1334_ ) -new_n6993_ = NOR ( new_n5958_, new_n1569_ ) -new_n6994_ = NAND ( new_n6993_, new_n2720_ ) -new_n6995_ = NAND ( new_n6905_, new_n2715_ ) -new_n6996_ = NOR ( new_n2725_, new_n2716_ ) -new_n6997_ = NAND ( new_n6996_, new_n2552_ ) -new_n6998_ = AND ( new_n2724_, new_n2716_, new_n1356_ ) -new_n6999_ = NAND ( new_n6998_, new_n2483_ ) -new_n7000_ = AND ( new_n6999_, new_n6997_, new_n6097_ ) -new_n7001_ = AND ( new_n7000_, new_n6995_, new_n6994_ ) -new_n7002_ = NAND ( new_n7001_, new_n6992_ ) -new_n7003_ = NAND ( new_n6998_, new_n6993_ ) -new_n7004_ = NAND ( new_n6996_, new_n6905_ ) -new_n7005_ = NAND ( new_n2715_, new_n2552_ ) -new_n7006_ = NAND ( new_n2720_, new_n2483_ ) -new_n7007_ = AND ( new_n7006_, new_n7005_, new_n6090_ ) -new_n7008_ = NAND ( new_n7007_, new_n7004_, new_n7003_ ) -new_n7009_ = XOR ( new_n7008_, new_n2743_ ) -new_n7010_ = NAND ( new_n7009_, new_n7002_ ) -new_n7011_ = OR ( new_n7009_, new_n7002_ ) -new_n7012_ = NAND ( new_n7011_, new_n7010_ ) -new_n7013_ = NAND ( new_n6917_, new_n6913_ ) -new_n7014_ = NAND ( new_n7013_, new_n6914_ ) -new_n7015_ = XOR ( new_n7014_, new_n7012_ ) -new_n7016_ = NOR ( new_n7015_, new_n2810_ ) -new_n7017_ = NAND ( new_n6993_, new_n2838_ ) -new_n7018_ = AND ( new_n6282_, new_n2475_, new_n1583_ ) -new_n7019_ = NAND ( new_n7018_, new_n2801_ ) -new_n7020_ = NAND ( new_n2820_, new_n2552_ ) -new_n7021_ = NAND ( new_n2800_, NET_371 ) -new_n7022_ = NAND ( new_n7021_, new_n7020_, new_n7019_, new_n7017_ ) -NET_8793 = OR ( new_n7022_, new_n7016_ ) -new_n7024_ = NOR ( new_n7015_, new_n2856_ ) -new_n7025_ = NAND ( new_n6993_, new_n2864_ ) -new_n7026_ = NAND ( new_n7018_, new_n2855_ ) -new_n7027_ = NAND ( new_n2859_, new_n2552_ ) -new_n7028_ = NAND ( new_n2854_, NET_403 ) -new_n7029_ = NAND ( new_n7028_, new_n7027_, new_n7026_, new_n7025_ ) -NET_8794 = OR ( new_n7029_, new_n7024_ ) -new_n7031_ = OR ( new_n7015_, new_n2979_ ) -new_n7032_ = NAND ( new_n6993_, new_n2982_ ) -new_n7033_ = NAND ( new_n2998_, new_n2552_ ) -new_n7034_ = NAND ( new_n7018_, new_n2976_ ) -new_n7035_ = NAND ( new_n2975_, NET_435 ) -new_n7036_ = AND ( new_n7035_, new_n7034_, new_n6301_ ) -NET_8795 = NAND ( new_n7036_, new_n7033_, new_n7032_, new_n7031_ ) -new_n7038_ = NAND ( new_n6958_, new_n3540_ ) -new_n7039_ = OR ( new_n5940_, new_n3536_ ) -new_n7040_ = OR ( new_n5924_, new_n3544_ ) -new_n7041_ = NOR ( new_n3745_, new_n6734_ ) -new_n7042_ = NOT ( new_n2059_ ) -new_n7043_ = NOR ( new_n3515_, new_n7042_ ) -new_n7044_ = NOR ( new_n7043_, new_n7041_ ) -new_n7045_ = NAND ( new_n7044_, new_n7040_, new_n7039_, new_n7038_ ) -new_n7046_ = NAND ( new_n7045_, new_n3553_ ) -new_n7047_ = NAND ( new_n3552_, NET_145 ) -NET_8805 = NAND ( new_n7047_, new_n7046_ ) -new_n7049_ = NAND ( new_n7045_, new_n3559_ ) -new_n7050_ = NAND ( new_n3558_, NET_113 ) -NET_8806 = NAND ( new_n7050_, new_n7049_ ) -new_n7052_ = NOR ( new_n5172_, new_n7042_ ) -new_n7053_ = OR ( new_n6050_, new_n3322_ ) -new_n7054_ = XNOR ( new_n7053_, new_n7052_ ) -new_n7055_ = OR ( new_n6957_, new_n6952_ ) -new_n7056_ = NAND ( new_n7055_, new_n6951_ ) -new_n7057_ = NAND ( new_n6957_, new_n6952_ ) -new_n7058_ = NAND ( new_n7057_, new_n7056_ ) -new_n7059_ = XNOR ( new_n7058_, new_n7054_ ) -new_n7060_ = NAND ( new_n7059_, new_n3336_ ) -new_n7061_ = OR ( new_n6066_, new_n3315_ ) -new_n7062_ = NOT ( new_n6050_ ) -new_n7063_ = NAND ( new_n7062_, new_n3361_ ) -new_n7064_ = NAND ( new_n3353_, new_n2056_ ) -new_n7065_ = NAND ( new_n3364_, new_n2046_ ) -new_n7066_ = NAND ( new_n3366_, new_n2072_ ) -new_n7067_ = AND ( new_n7066_, new_n7065_, new_n7064_, new_n6081_ ) -NET_8840 = NAND ( new_n7067_, new_n7063_, new_n7061_, new_n7060_ ) -new_n7069_ = NAND ( new_n7059_, new_n3509_ ) -new_n7070_ = OR ( new_n6066_, new_n3503_ ) -new_n7071_ = OR ( new_n6050_, new_n3518_ ) -new_n7072_ = NAND ( new_n3746_, new_n2072_ ) -new_n7073_ = NAND ( new_n3516_, new_n2046_ ) -new_n7074_ = NAND ( new_n3498_, NET_178 ) -new_n7075_ = NAND ( new_n3360_, new_n2056_ ) -new_n7076_ = AND ( new_n7075_, new_n7074_, new_n7073_, new_n7072_ ) -NET_8861 = NAND ( new_n7076_, new_n7071_, new_n7070_, new_n7069_ ) -new_n7078_ = NAND ( new_n7059_, new_n3540_ ) -new_n7079_ = OR ( new_n6066_, new_n3536_ ) -new_n7080_ = OR ( new_n6050_, new_n3544_ ) -new_n7081_ = NOR ( new_n3745_, new_n6887_ ) -new_n7082_ = NOT ( new_n2046_ ) -new_n7083_ = NOR ( new_n3515_, new_n7082_ ) -new_n7084_ = NOR ( new_n7083_, new_n7081_ ) -new_n7085_ = NAND ( new_n7084_, new_n7080_, new_n7079_, new_n7078_ ) -new_n7086_ = NAND ( new_n7085_, new_n3553_ ) -new_n7087_ = NAND ( new_n3552_, NET_146 ) -NET_8873 = NAND ( new_n7087_, new_n7086_ ) -new_n7089_ = NAND ( new_n7085_, new_n3559_ ) -new_n7090_ = NAND ( new_n3558_, NET_114 ) -NET_8874 = NAND ( new_n7090_, new_n7089_ ) -new_n7092_ = NOR ( new_n5172_, new_n7082_ ) -new_n7093_ = OR ( new_n6216_, new_n3322_ ) -new_n7094_ = XNOR ( new_n7093_, new_n7092_ ) -new_n7095_ = OR ( new_n7058_, new_n7053_ ) -new_n7096_ = NAND ( new_n7095_, new_n7052_ ) -new_n7097_ = NAND ( new_n7058_, new_n7053_ ) -new_n7098_ = NAND ( new_n7097_, new_n7096_ ) -new_n7099_ = XNOR ( new_n7098_, new_n7094_ ) -new_n7100_ = NAND ( new_n7099_, new_n3336_ ) -new_n7101_ = OR ( new_n6232_, new_n3315_ ) -new_n7102_ = NAND ( new_n6215_, new_n6211_, new_n3361_ ) -new_n7103_ = NAND ( new_n3353_, new_n2043_ ) -new_n7104_ = NAND ( new_n3364_, new_n2033_ ) -new_n7105_ = NAND ( new_n3366_, new_n2059_ ) -new_n7106_ = AND ( new_n7105_, new_n7104_, new_n7103_, new_n6247_ ) -NET_8897 = NAND ( new_n7106_, new_n7102_, new_n7101_, new_n7100_ ) -new_n7108_ = NAND ( new_n7099_, new_n3509_ ) -new_n7109_ = OR ( new_n6232_, new_n3503_ ) -new_n7110_ = OR ( new_n6216_, new_n3518_ ) -new_n7111_ = NAND ( new_n3746_, new_n2059_ ) -new_n7112_ = NAND ( new_n3516_, new_n2033_ ) -new_n7113_ = NAND ( new_n3498_, NET_179 ) -new_n7114_ = NAND ( new_n3360_, new_n2043_ ) -new_n7115_ = AND ( new_n7114_, new_n7113_, new_n7112_, new_n7111_ ) -NET_8907 = NAND ( new_n7115_, new_n7110_, new_n7109_, new_n7108_ ) -new_n7117_ = NAND ( new_n7099_, new_n3540_ ) -new_n7118_ = OR ( new_n6232_, new_n3536_ ) -new_n7119_ = OR ( new_n6216_, new_n3544_ ) -new_n7120_ = NOR ( new_n3745_, new_n7042_ ) -new_n7121_ = NOT ( new_n2033_ ) -new_n7122_ = NOR ( new_n3515_, new_n7121_ ) -new_n7123_ = NOR ( new_n7122_, new_n7120_ ) -new_n7124_ = NAND ( new_n7123_, new_n7119_, new_n7118_, new_n7117_ ) -new_n7125_ = NAND ( new_n7124_, new_n3553_ ) -new_n7126_ = NAND ( new_n3552_, NET_147 ) -NET_8919 = NAND ( new_n7126_, new_n7125_ ) -new_n7128_ = NAND ( new_n7124_, new_n3559_ ) -new_n7129_ = NAND ( new_n3558_, NET_115 ) -NET_8920 = NAND ( new_n7129_, new_n7128_ ) -new_n7131_ = NOR ( new_n5172_, new_n7121_ ) -new_n7132_ = OR ( new_n6358_, new_n3322_ ) -new_n7133_ = XNOR ( new_n7132_, new_n7131_ ) -new_n7134_ = OR ( new_n7098_, new_n7093_ ) -new_n7135_ = NAND ( new_n7134_, new_n7092_ ) -new_n7136_ = NAND ( new_n7098_, new_n7093_ ) -new_n7137_ = NAND ( new_n7136_, new_n7135_ ) -new_n7138_ = XNOR ( new_n7137_, new_n7133_ ) -new_n7139_ = NAND ( new_n7138_, new_n3336_ ) -new_n7140_ = OR ( new_n6375_, new_n3315_ ) -new_n7141_ = NOT ( new_n6358_ ) -new_n7142_ = NAND ( new_n7141_, new_n3361_ ) -new_n7143_ = NAND ( new_n3353_, new_n2030_ ) -new_n7144_ = NAND ( new_n3364_, new_n2018_ ) -new_n7145_ = NAND ( new_n3366_, new_n2046_ ) -new_n7146_ = AND ( new_n7145_, new_n7144_, new_n7143_, new_n6394_ ) -NET_8934 = NAND ( new_n7146_, new_n7142_, new_n7140_, new_n7139_ ) -new_n7148_ = NAND ( new_n7138_, new_n3509_ ) -new_n7149_ = OR ( new_n6375_, new_n3503_ ) -new_n7150_ = OR ( new_n6358_, new_n3518_ ) -new_n7151_ = NAND ( new_n3746_, new_n2046_ ) -new_n7152_ = NAND ( new_n3516_, new_n2018_ ) -new_n7153_ = NAND ( new_n3498_, NET_180 ) -new_n7154_ = NAND ( new_n3360_, new_n2030_ ) -new_n7155_ = AND ( new_n7154_, new_n7153_, new_n7152_, new_n7151_ ) -NET_8945 = NAND ( new_n7155_, new_n7150_, new_n7149_, new_n7148_ ) -new_n7157_ = NAND ( new_n7138_, new_n3540_ ) -new_n7158_ = OR ( new_n6375_, new_n3536_ ) -new_n7159_ = OR ( new_n6358_, new_n3544_ ) -new_n7160_ = NOR ( new_n3745_, new_n7082_ ) -new_n7161_ = NOT ( new_n2018_ ) -new_n7162_ = NOR ( new_n3515_, new_n7161_ ) -new_n7163_ = NOR ( new_n7162_, new_n7160_ ) -new_n7164_ = NAND ( new_n7163_, new_n7159_, new_n7158_, new_n7157_ ) -new_n7165_ = NAND ( new_n7164_, new_n3553_ ) -new_n7166_ = NAND ( new_n3552_, NET_148 ) -NET_8951 = NAND ( new_n7166_, new_n7165_ ) -new_n7168_ = NAND ( new_n7164_, new_n3559_ ) -new_n7169_ = NAND ( new_n3558_, NET_116 ) -NET_8952 = NAND ( new_n7169_, new_n7168_ ) -new_n7171_ = NOR ( new_n5172_, new_n7161_ ) -new_n7172_ = NOT ( new_n1304_ ) -new_n7173_ = NOR ( new_n4613_, new_n7172_ ) -new_n7174_ = NAND ( new_n7173_, new_n3321_ ) -new_n7175_ = XNOR ( new_n7174_, new_n7171_ ) -new_n7176_ = OR ( new_n7137_, new_n7132_ ) -new_n7177_ = NAND ( new_n7176_, new_n7131_ ) -new_n7178_ = NAND ( new_n7137_, new_n7132_ ) -new_n7179_ = NAND ( new_n7178_, new_n7177_ ) -new_n7180_ = XNOR ( new_n7179_, new_n7175_ ) -new_n7181_ = NAND ( new_n7180_, new_n3336_ ) -new_n7182_ = NAND ( new_n7173_, new_n4995_ ) -new_n7183_ = NAND ( new_n3229_, new_n2018_ ) -new_n7184_ = NAND ( new_n7183_, new_n7182_, new_n6361_ ) -new_n7185_ = XOR ( new_n7184_, new_n3241_ ) -new_n7186_ = NAND ( new_n7173_, new_n3229_ ) -new_n7187_ = NAND ( new_n3583_, new_n2018_ ) -new_n7188_ = NAND ( new_n7187_, new_n7186_, new_n6368_ ) -new_n7189_ = OR ( new_n7188_, new_n7185_ ) -new_n7190_ = NAND ( new_n7188_, new_n7185_ ) -new_n7191_ = NAND ( new_n7190_, new_n7189_ ) -new_n7192_ = NAND ( new_n6374_, new_n6370_ ) -new_n7193_ = NAND ( new_n7192_, new_n6371_ ) -new_n7194_ = XOR ( new_n7193_, new_n7191_ ) -new_n7195_ = OR ( new_n7194_, new_n3315_ ) -new_n7196_ = NAND ( new_n7173_, new_n3361_ ) -new_n7197_ = NAND ( new_n3353_, new_n2013_ ) -new_n7198_ = NAND ( new_n3364_, new_n2007_ ) -new_n7199_ = NAND ( NET_22556, NET_254 ) -new_n7200_ = NAND ( new_n3366_, new_n2033_ ) -new_n7201_ = AND ( new_n7200_, new_n7199_, new_n7198_, new_n7197_ ) -NET_8966 = NAND ( new_n7201_, new_n7196_, new_n7195_, new_n7181_ ) -new_n7203_ = NAND ( new_n7180_, new_n3509_ ) -new_n7204_ = OR ( new_n7194_, new_n3503_ ) -new_n7205_ = NAND ( new_n7173_, new_n5756_ ) -new_n7206_ = NAND ( new_n3746_, new_n2033_ ) -new_n7207_ = NAND ( new_n3516_, new_n2007_ ) -new_n7208_ = NAND ( new_n3360_, new_n2013_ ) -new_n7209_ = NAND ( new_n3498_, NET_181 ) -new_n7210_ = AND ( new_n7209_, new_n7208_, new_n7207_, new_n7206_ ) -NET_8974 = NAND ( new_n7210_, new_n7205_, new_n7204_, new_n7203_ ) -new_n7212_ = NAND ( new_n7180_, new_n3540_ ) -new_n7213_ = OR ( new_n7194_, new_n3536_ ) -new_n7214_ = NAND ( new_n7173_, new_n3543_ ) -new_n7215_ = NOR ( new_n3745_, new_n7121_ ) -new_n7216_ = NOT ( new_n2007_ ) -new_n7217_ = NOR ( new_n3515_, new_n7216_ ) -new_n7218_ = NOR ( new_n7217_, new_n7215_ ) -new_n7219_ = NAND ( new_n7218_, new_n7214_, new_n7213_, new_n7212_ ) -new_n7220_ = NAND ( new_n7219_, new_n3553_ ) -new_n7221_ = NAND ( new_n3552_, NET_149 ) -NET_8982 = NAND ( new_n7221_, new_n7220_ ) -new_n7223_ = NAND ( new_n7219_, new_n3559_ ) -new_n7224_ = NAND ( new_n3558_, NET_117 ) -NET_8983 = NAND ( new_n7224_, new_n7223_ ) -new_n7226_ = NOR ( new_n5172_, new_n7216_ ) -new_n7227_ = NOR ( new_n4727_, new_n7172_ ) -new_n7228_ = NAND ( new_n7227_, new_n3321_ ) -new_n7229_ = XNOR ( new_n7228_, new_n7226_ ) -new_n7230_ = OR ( new_n7179_, new_n7174_ ) -new_n7231_ = NAND ( new_n7230_, new_n7171_ ) -new_n7232_ = NAND ( new_n7179_, new_n7174_ ) -new_n7233_ = NAND ( new_n7232_, new_n7231_ ) -new_n7234_ = XNOR ( new_n7233_, new_n7229_ ) -new_n7235_ = NAND ( new_n7234_, new_n3336_ ) -new_n7236_ = NAND ( new_n7227_, new_n4995_ ) -new_n7237_ = NAND ( new_n3229_, new_n2007_ ) -new_n7238_ = NAND ( new_n7237_, new_n7236_, new_n6361_ ) -new_n7239_ = XOR ( new_n7238_, new_n3241_ ) -new_n7240_ = NAND ( new_n7227_, new_n3229_ ) -new_n7241_ = NAND ( new_n3583_, new_n2007_ ) -new_n7242_ = NAND ( new_n7241_, new_n7240_, new_n6368_ ) -new_n7243_ = OR ( new_n7242_, new_n7239_ ) -new_n7244_ = NAND ( new_n7242_, new_n7239_ ) -new_n7245_ = NAND ( new_n7244_, new_n7243_ ) -new_n7246_ = NAND ( new_n7193_, new_n7189_ ) -new_n7247_ = NAND ( new_n7246_, new_n7190_ ) -new_n7248_ = XOR ( new_n7247_, new_n7245_ ) -new_n7249_ = OR ( new_n7248_, new_n3315_ ) -new_n7250_ = NAND ( new_n7227_, new_n3361_ ) -new_n7251_ = NAND ( new_n3353_, new_n2002_ ) -new_n7252_ = NAND ( new_n3364_, new_n1996_ ) -new_n7253_ = OR ( NET_275, new_n1953_ ) -new_n7254_ = NAND ( new_n3366_, new_n2018_ ) -new_n7255_ = AND ( new_n7254_, new_n7253_, new_n7252_, new_n7251_ ) -NET_9054 = NAND ( new_n7255_, new_n7250_, new_n7249_, new_n7235_ ) -new_n7257_ = NAND ( new_n7234_, new_n3509_ ) -new_n7258_ = OR ( new_n7248_, new_n3503_ ) -new_n7259_ = NAND ( new_n7227_, new_n5756_ ) -new_n7260_ = NAND ( new_n3746_, new_n2018_ ) -new_n7261_ = NAND ( new_n3516_, new_n1996_ ) -new_n7262_ = NAND ( new_n3360_, new_n2002_ ) -new_n7263_ = NAND ( new_n3498_, NET_182 ) -new_n7264_ = AND ( new_n7263_, new_n7262_, new_n7261_, new_n7260_ ) -NET_9085 = NAND ( new_n7264_, new_n7259_, new_n7258_, new_n7257_ ) -new_n7266_ = NAND ( new_n7234_, new_n3540_ ) -new_n7267_ = OR ( new_n7248_, new_n3536_ ) -new_n7268_ = NAND ( new_n7227_, new_n3543_ ) -new_n7269_ = NOR ( new_n3745_, new_n7161_ ) -new_n7270_ = NOT ( new_n1996_ ) -new_n7271_ = NOR ( new_n3515_, new_n7270_ ) -new_n7272_ = NOR ( new_n7271_, new_n7269_ ) -new_n7273_ = NAND ( new_n7272_, new_n7268_, new_n7267_, new_n7266_ ) -new_n7274_ = NAND ( new_n7273_, new_n3553_ ) -new_n7275_ = NAND ( new_n3552_, NET_150 ) -NET_9124 = NAND ( new_n7275_, new_n7274_ ) -new_n7277_ = NAND ( new_n7273_, new_n3559_ ) -new_n7278_ = NAND ( new_n3558_, NET_118 ) -NET_9125 = NAND ( new_n7278_, new_n7277_ ) -new_n7280_ = NOR ( new_n5172_, new_n7270_ ) -new_n7281_ = NOR ( new_n4866_, new_n7172_ ) -new_n7282_ = NAND ( new_n7281_, new_n3321_ ) -new_n7283_ = XNOR ( new_n7282_, new_n7280_ ) -new_n7284_ = OR ( new_n7233_, new_n7228_ ) -new_n7285_ = NAND ( new_n7284_, new_n7226_ ) -new_n7286_ = NAND ( new_n7233_, new_n7228_ ) -new_n7287_ = NAND ( new_n7286_, new_n7285_ ) -new_n7288_ = XNOR ( new_n7287_, new_n7283_ ) -new_n7289_ = NAND ( new_n7288_, new_n3336_ ) -new_n7290_ = NAND ( new_n7281_, new_n4995_ ) -new_n7291_ = NAND ( new_n3229_, new_n1996_ ) -new_n7292_ = NAND ( new_n7291_, new_n7290_, new_n6361_ ) -new_n7293_ = XOR ( new_n7292_, new_n3241_ ) -new_n7294_ = NAND ( new_n7281_, new_n3229_ ) -new_n7295_ = NAND ( new_n3583_, new_n1996_ ) -new_n7296_ = NAND ( new_n7295_, new_n7294_, new_n6368_ ) -new_n7297_ = OR ( new_n7296_, new_n7293_ ) -new_n7298_ = NAND ( new_n7296_, new_n7293_ ) -new_n7299_ = NAND ( new_n7298_, new_n7297_ ) -new_n7300_ = NAND ( new_n7247_, new_n7243_ ) -new_n7301_ = NAND ( new_n7300_, new_n7244_ ) -new_n7302_ = XOR ( new_n7301_, new_n7299_ ) -new_n7303_ = OR ( new_n7302_, new_n3315_ ) -new_n7304_ = NAND ( new_n7281_, new_n3361_ ) -new_n7305_ = NAND ( new_n3353_, new_n1985_ ) -new_n7306_ = NAND ( new_n3364_, new_n2325_ ) -new_n7307_ = OR ( NET_275, new_n1952_ ) -new_n7308_ = NAND ( new_n3366_, new_n2007_ ) -new_n7309_ = AND ( new_n7308_, new_n7307_, new_n7306_, new_n7305_ ) -NET_9160 = NAND ( new_n7309_, new_n7304_, new_n7303_, new_n7289_ ) -new_n7311_ = NAND ( new_n7288_, new_n3509_ ) -new_n7312_ = OR ( new_n7302_, new_n3503_ ) -new_n7313_ = NAND ( new_n7281_, new_n5756_ ) -new_n7314_ = NAND ( new_n3746_, new_n2007_ ) -new_n7315_ = NAND ( new_n3516_, new_n2325_ ) -new_n7316_ = NAND ( new_n3360_, new_n1985_ ) -new_n7317_ = NAND ( new_n3498_, NET_183 ) -new_n7318_ = AND ( new_n7317_, new_n7316_, new_n7315_, new_n7314_ ) -NET_9168 = NAND ( new_n7318_, new_n7313_, new_n7312_, new_n7311_ ) -new_n7320_ = NAND ( new_n7288_, new_n3540_ ) -new_n7321_ = OR ( new_n7302_, new_n3536_ ) -new_n7322_ = NAND ( new_n7281_, new_n3543_ ) -new_n7323_ = NOR ( new_n3745_, new_n7216_ ) -new_n7324_ = NOT ( new_n2325_ ) -new_n7325_ = NOR ( new_n3515_, new_n7324_ ) -new_n7326_ = NOR ( new_n7325_, new_n7323_ ) -new_n7327_ = NAND ( new_n7326_, new_n7322_, new_n7321_, new_n7320_ ) -new_n7328_ = NAND ( new_n7327_, new_n3553_ ) -new_n7329_ = NAND ( new_n3552_, NET_151 ) -NET_9177 = NAND ( new_n7329_, new_n7328_ ) -new_n7331_ = NAND ( new_n7327_, new_n3559_ ) -new_n7332_ = NAND ( new_n3558_, NET_119 ) -NET_9178 = NAND ( new_n7332_, new_n7331_ ) -new_n7334_ = NOR ( new_n5172_, new_n7324_ ) -new_n7335_ = NOR ( new_n4989_, new_n7172_ ) -new_n7336_ = NAND ( new_n7335_, new_n3321_ ) -new_n7337_ = XNOR ( new_n7336_, new_n7334_ ) -new_n7338_ = OR ( new_n7287_, new_n7282_ ) -new_n7339_ = NAND ( new_n7338_, new_n7280_ ) -new_n7340_ = NAND ( new_n7287_, new_n7282_ ) -new_n7341_ = NAND ( new_n7340_, new_n7339_ ) -new_n7342_ = XNOR ( new_n7341_, new_n7337_ ) -new_n7343_ = NAND ( new_n7342_, new_n3336_ ) -new_n7344_ = NAND ( new_n7335_, new_n4995_ ) -new_n7345_ = NAND ( new_n3229_, new_n2325_ ) -new_n7346_ = NAND ( new_n7345_, new_n7344_, new_n6361_ ) -new_n7347_ = XOR ( new_n7346_, new_n3241_ ) -new_n7348_ = NAND ( new_n7335_, new_n3229_ ) -new_n7349_ = NAND ( new_n3583_, new_n2325_ ) -new_n7350_ = NAND ( new_n7349_, new_n7348_, new_n6368_ ) -new_n7351_ = OR ( new_n7350_, new_n7347_ ) -new_n7352_ = NAND ( new_n7350_, new_n7347_ ) -new_n7353_ = NAND ( new_n7352_, new_n7351_ ) -new_n7354_ = NAND ( new_n7301_, new_n7297_ ) -new_n7355_ = NAND ( new_n7354_, new_n7298_ ) -new_n7356_ = XOR ( new_n7355_, new_n7353_ ) -new_n7357_ = OR ( new_n7356_, new_n3315_ ) -new_n7358_ = NAND ( new_n7335_, new_n3361_ ) -new_n7359_ = NAND ( new_n3353_, new_n2320_ ) -new_n7360_ = NAND ( new_n3364_, new_n2314_ ) -new_n7361_ = NAND ( NET_22556, NET_271 ) -new_n7362_ = NAND ( new_n3366_, new_n1996_ ) -new_n7363_ = AND ( new_n7362_, new_n7361_, new_n7360_, new_n7359_ ) -NET_9192 = NAND ( new_n7363_, new_n7358_, new_n7357_, new_n7343_ ) -new_n7365_ = NAND ( new_n7342_, new_n3509_ ) -new_n7366_ = OR ( new_n7356_, new_n3503_ ) -new_n7367_ = NAND ( new_n7335_, new_n5756_ ) -new_n7368_ = NAND ( new_n3746_, new_n1996_ ) -new_n7369_ = NAND ( new_n3516_, new_n2314_ ) -new_n7370_ = NAND ( new_n3360_, new_n2320_ ) -new_n7371_ = NAND ( new_n3498_, NET_184 ) -new_n7372_ = AND ( new_n7371_, new_n7370_, new_n7369_, new_n7368_ ) -NET_9201 = NAND ( new_n7372_, new_n7367_, new_n7366_, new_n7365_ ) -new_n7374_ = NAND ( new_n7342_, new_n3540_ ) -new_n7375_ = OR ( new_n7356_, new_n3536_ ) -new_n7376_ = NAND ( new_n7335_, new_n3543_ ) -new_n7377_ = NOR ( new_n3745_, new_n7270_ ) -new_n7378_ = NOT ( new_n2314_ ) -new_n7379_ = NOR ( new_n3515_, new_n7378_ ) -new_n7380_ = NOR ( new_n7379_, new_n7377_ ) -new_n7381_ = NAND ( new_n7380_, new_n7376_, new_n7375_, new_n7374_ ) -new_n7382_ = NAND ( new_n7381_, new_n3553_ ) -new_n7383_ = NAND ( new_n3552_, NET_152 ) -NET_9209 = NAND ( new_n7383_, new_n7382_ ) -new_n7385_ = NAND ( new_n7381_, new_n3559_ ) -new_n7386_ = NAND ( new_n3558_, NET_120 ) -NET_9210 = NAND ( new_n7386_, new_n7385_ ) -new_n7388_ = NOT ( new_n6320_ ) -new_n7389_ = NAND ( new_n2702_, new_n1581_ ) -new_n7390_ = NAND ( new_n7389_, new_n2903_ ) -new_n7391_ = NAND ( new_n2776_, new_n1334_ ) -new_n7392_ = OR ( new_n2803_, new_n1581_ ) -new_n7393_ = NAND ( new_n7392_, new_n7391_, new_n2901_ ) -new_n7394_ = NOR ( new_n7393_, new_n7390_ ) -new_n7395_ = NOT ( new_n7394_ ) -new_n7396_ = NAND ( new_n7395_, new_n2475_ ) -new_n7397_ = NOR ( new_n2843_, new_n1574_ ) -new_n7398_ = NOT ( new_n7397_ ) -new_n7399_ = NAND ( new_n7398_, new_n6278_ ) -new_n7400_ = NAND ( new_n7399_, new_n7396_ ) -new_n7401_ = NAND ( new_n7393_, new_n6278_ ) -new_n7402_ = NAND ( new_n2475_, new_n2467_ ) -new_n7403_ = NOR ( new_n7402_, new_n2844_ ) -new_n7404_ = OR ( new_n7403_, new_n2475_ ) -new_n7405_ = NAND ( new_n7402_, new_n2843_ ) -new_n7406_ = NAND ( new_n7405_, new_n1573_ ) -new_n7407_ = NOT ( new_n7406_ ) -new_n7408_ = NAND ( new_n7407_, new_n2475_ ) -new_n7409_ = NAND ( new_n7408_, new_n7404_ ) -new_n7410_ = NAND ( new_n7409_, new_n7401_ ) -new_n7411_ = NOT ( new_n7410_ ) -new_n7412_ = NAND ( new_n7411_, new_n7400_ ) -new_n7413_ = NAND ( new_n7398_, new_n6993_ ) -new_n7414_ = NAND ( new_n2552_, new_n1333_ ) -new_n7415_ = NAND ( new_n7395_, new_n2483_ ) -new_n7416_ = AND ( new_n7415_, new_n7414_, new_n7413_ ) -new_n7417_ = NAND ( new_n7393_, new_n6993_ ) -new_n7418_ = NAND ( new_n7406_, new_n2483_ ) -new_n7419_ = NAND ( new_n7403_, new_n2483_ ) -new_n7420_ = NOR ( new_n7390_, new_n1333_ ) -new_n7421_ = NAND ( new_n7420_, new_n7419_, new_n7418_, new_n7417_ ) -new_n7422_ = OR ( new_n7421_, new_n7416_ ) -new_n7423_ = NAND ( new_n7421_, new_n7416_ ) -new_n7424_ = NAND ( new_n7393_, new_n6905_ ) -new_n7425_ = NAND ( new_n7406_, new_n2552_ ) -new_n7426_ = NAND ( new_n7403_, new_n2552_ ) -new_n7427_ = NAND ( new_n7426_, new_n7425_, new_n7424_, new_n7420_ ) -new_n7428_ = NAND ( new_n7398_, new_n6905_ ) -new_n7429_ = NAND ( new_n2494_, new_n1333_ ) -new_n7430_ = NAND ( new_n7395_, new_n2552_ ) -new_n7431_ = AND ( new_n7430_, new_n7429_, new_n7428_ ) -new_n7432_ = NAND ( new_n7431_, new_n7427_ ) -new_n7433_ = OR ( new_n7431_, new_n7427_ ) -new_n7434_ = NAND ( new_n7398_, new_n6829_ ) -new_n7435_ = NAND ( new_n2431_, new_n1333_ ) -new_n7436_ = NAND ( new_n7395_, new_n2494_ ) -new_n7437_ = AND ( new_n7436_, new_n7435_, new_n7434_ ) -new_n7438_ = NAND ( new_n7393_, new_n6829_ ) -new_n7439_ = NAND ( new_n7406_, new_n2494_ ) -new_n7440_ = NAND ( new_n7403_, new_n2494_ ) -new_n7441_ = NAND ( new_n7440_, new_n7439_, new_n7438_, new_n7420_ ) -new_n7442_ = OR ( new_n7441_, new_n7437_ ) -new_n7443_ = NAND ( new_n7441_, new_n7437_ ) -new_n7444_ = NAND ( new_n7393_, new_n6760_ ) -new_n7445_ = NAND ( new_n7406_, new_n2431_ ) -new_n7446_ = NAND ( new_n7403_, new_n2431_ ) -new_n7447_ = NAND ( new_n7446_, new_n7445_, new_n7444_, new_n7420_ ) -new_n7448_ = NAND ( new_n7398_, new_n6760_ ) -new_n7449_ = NAND ( new_n2350_, new_n1333_ ) -new_n7450_ = NAND ( new_n7395_, new_n2431_ ) -new_n7451_ = AND ( new_n7450_, new_n7449_, new_n7448_ ) -new_n7452_ = NAND ( new_n7451_, new_n7447_ ) -new_n7453_ = OR ( new_n7451_, new_n7447_ ) -new_n7454_ = NAND ( new_n7398_, new_n6685_ ) -new_n7455_ = NAND ( new_n2338_, new_n1333_ ) -new_n7456_ = NAND ( new_n7395_, new_n2350_ ) -new_n7457_ = AND ( new_n7456_, new_n7455_, new_n7454_ ) -new_n7458_ = NAND ( new_n7393_, new_n6685_ ) -new_n7459_ = NAND ( new_n7406_, new_n2350_ ) -new_n7460_ = NAND ( new_n7403_, new_n2350_ ) -new_n7461_ = NAND ( new_n7460_, new_n7459_, new_n7458_, new_n7420_ ) -new_n7462_ = OR ( new_n7461_, new_n7457_ ) -new_n7463_ = NAND ( new_n7461_, new_n7457_ ) -new_n7464_ = NAND ( new_n7393_, new_n6615_ ) -new_n7465_ = NAND ( new_n7406_, new_n2338_ ) -new_n7466_ = NAND ( new_n7403_, new_n2338_ ) -new_n7467_ = NAND ( new_n7466_, new_n7465_, new_n7464_, new_n7420_ ) -new_n7468_ = NAND ( new_n7398_, new_n6615_ ) -new_n7469_ = NAND ( new_n2300_, new_n1333_ ) -new_n7470_ = NAND ( new_n7395_, new_n2338_ ) -new_n7471_ = AND ( new_n7470_, new_n7469_, new_n7468_ ) -new_n7472_ = NAND ( new_n7471_, new_n7467_ ) -new_n7473_ = OR ( new_n7471_, new_n7467_ ) -new_n7474_ = NAND ( new_n7398_, new_n6541_ ) -new_n7475_ = NAND ( new_n1642_, new_n1333_ ) -new_n7476_ = NAND ( new_n7395_, new_n2300_ ) -new_n7477_ = AND ( new_n7476_, new_n7475_, new_n7474_ ) -new_n7478_ = NAND ( new_n7393_, new_n6541_ ) -new_n7479_ = NAND ( new_n7406_, new_n2300_ ) -new_n7480_ = NAND ( new_n7403_, new_n2300_ ) -new_n7481_ = NAND ( new_n7480_, new_n7479_, new_n7478_, new_n7420_ ) -new_n7482_ = OR ( new_n7481_, new_n7477_ ) -new_n7483_ = NAND ( new_n7481_, new_n7477_ ) -new_n7484_ = NAND ( new_n7393_, new_n6471_ ) -new_n7485_ = NAND ( new_n7406_, new_n1642_ ) -new_n7486_ = NAND ( new_n7403_, new_n1642_ ) -new_n7487_ = NAND ( new_n7486_, new_n7485_, new_n7484_, new_n7420_ ) -new_n7488_ = NAND ( new_n7398_, new_n6471_ ) -new_n7489_ = NAND ( new_n1653_, new_n1333_ ) -new_n7490_ = OR ( new_n7394_, new_n6473_ ) -new_n7491_ = AND ( new_n7490_, new_n7489_, new_n7488_ ) -new_n7492_ = NAND ( new_n7491_, new_n7487_ ) -new_n7493_ = OR ( new_n7491_, new_n7487_ ) -new_n7494_ = NAND ( new_n7398_, new_n6397_ ) -new_n7495_ = NAND ( new_n1663_, new_n1333_ ) -new_n7496_ = NAND ( new_n7395_, new_n1653_ ) -new_n7497_ = AND ( new_n7496_, new_n7495_, new_n7494_ ) -new_n7498_ = NAND ( new_n7393_, new_n6397_ ) -new_n7499_ = NAND ( new_n7406_, new_n1653_ ) -new_n7500_ = NAND ( new_n7403_, new_n1653_ ) -new_n7501_ = NAND ( new_n7500_, new_n7499_, new_n7498_, new_n7420_ ) -new_n7502_ = OR ( new_n7501_, new_n7497_ ) -new_n7503_ = NAND ( new_n7501_, new_n7497_ ) -new_n7504_ = NAND ( new_n7393_, new_n6257_ ) -new_n7505_ = NAND ( new_n7406_, new_n1663_ ) -new_n7506_ = NAND ( new_n7403_, new_n1663_ ) -new_n7507_ = NAND ( new_n7506_, new_n7505_, new_n7504_, new_n7420_ ) -new_n7508_ = NAND ( new_n7398_, new_n6257_ ) -new_n7509_ = NAND ( new_n1676_, new_n1333_ ) -new_n7510_ = NAND ( new_n7395_, new_n1663_ ) -new_n7511_ = AND ( new_n7510_, new_n7509_, new_n7508_ ) -new_n7512_ = NAND ( new_n7511_, new_n7507_ ) -new_n7513_ = OR ( new_n7397_, new_n6086_ ) -new_n7514_ = NAND ( new_n1688_, new_n1333_ ) -new_n7515_ = OR ( new_n7394_, new_n6088_ ) -new_n7516_ = AND ( new_n7515_, new_n7514_, new_n7513_ ) -new_n7517_ = NOT ( new_n7393_ ) -new_n7518_ = OR ( new_n7517_, new_n6086_ ) -new_n7519_ = NAND ( new_n7406_, new_n1676_ ) -new_n7520_ = NAND ( new_n7403_, new_n1676_ ) -new_n7521_ = NAND ( new_n7520_, new_n7519_, new_n7518_, new_n7420_ ) -new_n7522_ = NAND ( new_n7521_, new_n7516_ ) -new_n7523_ = OR ( new_n7517_, new_n5968_ ) -new_n7524_ = NAND ( new_n7406_, new_n1688_ ) -new_n7525_ = NAND ( new_n7403_, new_n1688_ ) -new_n7526_ = NAND ( new_n7525_, new_n7524_, new_n7523_, new_n7420_ ) -new_n7527_ = OR ( new_n7397_, new_n5968_ ) -new_n7528_ = NAND ( new_n1699_, new_n1333_ ) -new_n7529_ = NAND ( new_n7395_, new_n1688_ ) -new_n7530_ = AND ( new_n7529_, new_n7528_, new_n7527_ ) -new_n7531_ = NAND ( new_n7530_, new_n7526_ ) -new_n7532_ = OR ( new_n7530_, new_n7526_ ) -new_n7533_ = OR ( new_n7397_, new_n5815_ ) -new_n7534_ = NAND ( new_n1711_, new_n1333_ ) -new_n7535_ = OR ( new_n7394_, new_n5818_ ) -new_n7536_ = AND ( new_n7535_, new_n7534_, new_n7533_ ) -new_n7537_ = OR ( new_n7517_, new_n5815_ ) -new_n7538_ = NAND ( new_n7406_, new_n1699_ ) -new_n7539_ = NAND ( new_n7403_, new_n1699_ ) -new_n7540_ = NAND ( new_n7539_, new_n7538_, new_n7537_, new_n7420_ ) -new_n7541_ = OR ( new_n7540_, new_n7536_ ) -new_n7542_ = OR ( new_n7394_, new_n2734_ ) -new_n7543_ = NAND ( new_n1884_, new_n1333_ ) -new_n7544_ = OR ( new_n7397_, new_n2684_ ) -new_n7545_ = AND ( new_n7544_, new_n7543_, new_n7542_ ) -new_n7546_ = NAND ( new_n7406_, new_n1876_ ) -new_n7547_ = NAND ( new_n7403_, new_n1876_ ) -new_n7548_ = OR ( new_n7517_, new_n2684_ ) -new_n7549_ = NAND ( new_n7548_, new_n7547_, new_n7546_, new_n7420_ ) -new_n7550_ = NAND ( new_n7549_, new_n7545_ ) -new_n7551_ = NAND ( new_n7406_, new_n1884_ ) -new_n7552_ = NAND ( new_n7403_, new_n1884_ ) -new_n7553_ = NAND ( new_n7395_, new_n1884_ ) -new_n7554_ = OR ( new_n7397_, new_n2753_ ) -new_n7555_ = NAND ( new_n7554_, new_n7553_ ) -new_n7556_ = OR ( new_n7517_, new_n2753_ ) -new_n7557_ = AND ( new_n7556_, new_n7555_, new_n7420_ ) -new_n7558_ = NAND ( new_n7557_, new_n7552_, new_n7551_, new_n7550_ ) -new_n7559_ = OR ( new_n7549_, new_n7545_ ) -new_n7560_ = NAND ( new_n7406_, new_n1867_ ) -new_n7561_ = NAND ( new_n7403_, new_n1867_ ) -new_n7562_ = OR ( new_n7517_, new_n3095_ ) -new_n7563_ = NAND ( new_n7562_, new_n7561_, new_n7560_, new_n7420_ ) -new_n7564_ = NAND ( new_n7395_, new_n1867_ ) -new_n7565_ = NAND ( new_n1876_, new_n1333_ ) -new_n7566_ = OR ( new_n7397_, new_n3095_ ) -new_n7567_ = AND ( new_n7566_, new_n7565_, new_n7564_ ) -new_n7568_ = OR ( new_n7567_, new_n7563_ ) -new_n7569_ = NAND ( new_n7568_, new_n7559_, new_n7558_ ) -new_n7570_ = NAND ( new_n7567_, new_n7563_ ) -new_n7571_ = NAND ( new_n7395_, new_n1858_ ) -new_n7572_ = NAND ( new_n1867_, new_n1333_ ) -new_n7573_ = OR ( new_n7397_, new_n3437_ ) -new_n7574_ = AND ( new_n7573_, new_n7572_, new_n7571_ ) -new_n7575_ = NAND ( new_n7406_, new_n1858_ ) -new_n7576_ = NAND ( new_n7403_, new_n1858_ ) -new_n7577_ = OR ( new_n7517_, new_n3437_ ) -new_n7578_ = NAND ( new_n7577_, new_n7576_, new_n7575_, new_n7420_ ) -new_n7579_ = NAND ( new_n7578_, new_n7574_ ) -new_n7580_ = NAND ( new_n7579_, new_n7570_, new_n7569_ ) -new_n7581_ = OR ( new_n7578_, new_n7574_ ) -new_n7582_ = NAND ( new_n7406_, new_n1848_ ) -new_n7583_ = NAND ( new_n7403_, new_n1848_ ) -new_n7584_ = OR ( new_n7517_, new_n3651_ ) -new_n7585_ = NAND ( new_n7584_, new_n7583_, new_n7582_, new_n7420_ ) -new_n7586_ = NAND ( new_n7395_, new_n1848_ ) -new_n7587_ = NAND ( new_n1858_, new_n1333_ ) -new_n7588_ = OR ( new_n7397_, new_n3651_ ) -new_n7589_ = AND ( new_n7588_, new_n7587_, new_n7586_ ) -new_n7590_ = OR ( new_n7589_, new_n7585_ ) -new_n7591_ = NAND ( new_n7590_, new_n7581_, new_n7580_ ) -new_n7592_ = NAND ( new_n7589_, new_n7585_ ) -new_n7593_ = OR ( new_n7394_, new_n3862_ ) -new_n7594_ = NAND ( new_n1848_, new_n1333_ ) -new_n7595_ = OR ( new_n7397_, new_n3856_ ) -new_n7596_ = AND ( new_n7595_, new_n7594_, new_n7593_ ) -new_n7597_ = NAND ( new_n7406_, new_n1838_ ) -new_n7598_ = NAND ( new_n7403_, new_n1838_ ) -new_n7599_ = OR ( new_n7517_, new_n3856_ ) -new_n7600_ = NAND ( new_n7599_, new_n7598_, new_n7597_, new_n7420_ ) -new_n7601_ = NAND ( new_n7600_, new_n7596_ ) -new_n7602_ = NAND ( new_n7601_, new_n7592_, new_n7591_ ) -new_n7603_ = OR ( new_n7600_, new_n7596_ ) -new_n7604_ = NAND ( new_n7406_, new_n1827_ ) -new_n7605_ = NAND ( new_n7403_, new_n1827_ ) -new_n7606_ = OR ( new_n7517_, new_n4084_ ) -new_n7607_ = NAND ( new_n7606_, new_n7605_, new_n7604_, new_n7420_ ) -new_n7608_ = NAND ( new_n7395_, new_n1827_ ) -new_n7609_ = NAND ( new_n1838_, new_n1333_ ) -new_n7610_ = OR ( new_n7397_, new_n4084_ ) -new_n7611_ = AND ( new_n7610_, new_n7609_, new_n7608_ ) -new_n7612_ = OR ( new_n7611_, new_n7607_ ) -new_n7613_ = NAND ( new_n7612_, new_n7603_, new_n7602_ ) -new_n7614_ = NAND ( new_n7611_, new_n7607_ ) -new_n7615_ = OR ( new_n7397_, new_n4240_ ) -new_n7616_ = NAND ( new_n1827_, new_n1333_ ) -new_n7617_ = NAND ( new_n7395_, new_n1815_ ) -new_n7618_ = AND ( new_n7617_, new_n7616_, new_n7615_ ) -new_n7619_ = NAND ( new_n7406_, new_n1815_ ) -new_n7620_ = NAND ( new_n7403_, new_n1815_ ) -new_n7621_ = OR ( new_n7517_, new_n4240_ ) -new_n7622_ = NAND ( new_n7621_, new_n7620_, new_n7619_, new_n7420_ ) -new_n7623_ = NAND ( new_n7622_, new_n7618_ ) -new_n7624_ = NAND ( new_n7623_, new_n7614_, new_n7613_ ) -new_n7625_ = OR ( new_n7622_, new_n7618_ ) -new_n7626_ = NAND ( new_n7406_, new_n1804_ ) -new_n7627_ = NAND ( new_n7403_, new_n1804_ ) -new_n7628_ = OR ( new_n7517_, new_n4413_ ) -new_n7629_ = NAND ( new_n7628_, new_n7627_, new_n7626_, new_n7420_ ) -new_n7630_ = OR ( new_n7397_, new_n4413_ ) -new_n7631_ = NAND ( new_n1815_, new_n1333_ ) -new_n7632_ = OR ( new_n7394_, new_n4416_ ) -new_n7633_ = AND ( new_n7632_, new_n7631_, new_n7630_ ) -new_n7634_ = OR ( new_n7633_, new_n7629_ ) -new_n7635_ = NAND ( new_n7634_, new_n7625_, new_n7624_ ) -new_n7636_ = NAND ( new_n7633_, new_n7629_ ) -new_n7637_ = OR ( new_n7397_, new_n4560_ ) -new_n7638_ = NAND ( new_n1804_, new_n1333_ ) -new_n7639_ = OR ( new_n7394_, new_n4568_ ) -new_n7640_ = AND ( new_n7639_, new_n7638_, new_n7637_ ) -new_n7641_ = NAND ( new_n7406_, new_n1793_ ) -new_n7642_ = OR ( new_n7517_, new_n4560_ ) -new_n7643_ = NAND ( new_n7403_, new_n1793_ ) -new_n7644_ = NAND ( new_n7643_, new_n7642_, new_n7641_, new_n7420_ ) -new_n7645_ = NAND ( new_n7644_, new_n7640_ ) -new_n7646_ = NAND ( new_n7645_, new_n7636_, new_n7635_ ) -new_n7647_ = OR ( new_n7644_, new_n7640_ ) -new_n7648_ = OR ( new_n7517_, new_n4758_ ) -new_n7649_ = NAND ( new_n7406_, new_n1781_ ) -new_n7650_ = NAND ( new_n7403_, new_n1781_ ) -new_n7651_ = NAND ( new_n7650_, new_n7649_, new_n7648_, new_n7420_ ) -new_n7652_ = OR ( new_n7397_, new_n4758_ ) -new_n7653_ = NAND ( new_n1793_, new_n1333_ ) -new_n7654_ = NAND ( new_n7395_, new_n1781_ ) -new_n7655_ = AND ( new_n7654_, new_n7653_, new_n7652_ ) -new_n7656_ = OR ( new_n7655_, new_n7651_ ) -new_n7657_ = NAND ( new_n7656_, new_n7647_, new_n7646_ ) -new_n7658_ = NAND ( new_n7655_, new_n7651_ ) -new_n7659_ = OR ( new_n7397_, new_n4899_ ) -new_n7660_ = NAND ( new_n1781_, new_n1333_ ) -new_n7661_ = OR ( new_n7394_, new_n4902_ ) -new_n7662_ = AND ( new_n7661_, new_n7660_, new_n7659_ ) -new_n7663_ = OR ( new_n7517_, new_n4899_ ) -new_n7664_ = NAND ( new_n7406_, new_n1769_ ) -new_n7665_ = NAND ( new_n7403_, new_n1769_ ) -new_n7666_ = NAND ( new_n7665_, new_n7664_, new_n7663_, new_n7420_ ) -new_n7667_ = NAND ( new_n7666_, new_n7662_ ) -new_n7668_ = NAND ( new_n7667_, new_n7658_, new_n7657_ ) -new_n7669_ = OR ( new_n7666_, new_n7662_ ) -new_n7670_ = OR ( new_n7517_, new_n5065_ ) -new_n7671_ = NAND ( new_n7406_, new_n1758_ ) -new_n7672_ = NAND ( new_n7403_, new_n1758_ ) -new_n7673_ = NAND ( new_n7672_, new_n7671_, new_n7670_, new_n7420_ ) -new_n7674_ = OR ( new_n7397_, new_n5065_ ) -new_n7675_ = NAND ( new_n1769_, new_n1333_ ) -new_n7676_ = NAND ( new_n7395_, new_n1758_ ) -new_n7677_ = AND ( new_n7676_, new_n7675_, new_n7674_ ) -new_n7678_ = OR ( new_n7677_, new_n7673_ ) -new_n7679_ = NAND ( new_n7678_, new_n7669_, new_n7668_ ) -new_n7680_ = NAND ( new_n7677_, new_n7673_ ) -new_n7681_ = OR ( new_n7397_, new_n5201_ ) -new_n7682_ = NAND ( new_n1758_, new_n1333_ ) -new_n7683_ = NAND ( new_n7395_, new_n1746_ ) -new_n7684_ = AND ( new_n7683_, new_n7682_, new_n7681_ ) -new_n7685_ = OR ( new_n7517_, new_n5201_ ) -new_n7686_ = NAND ( new_n7406_, new_n1746_ ) -new_n7687_ = NAND ( new_n7403_, new_n1746_ ) -new_n7688_ = NAND ( new_n7687_, new_n7686_, new_n7685_, new_n7420_ ) -new_n7689_ = NAND ( new_n7688_, new_n7684_ ) -new_n7690_ = NAND ( new_n7689_, new_n7680_, new_n7679_ ) -new_n7691_ = OR ( new_n7688_, new_n7684_ ) -new_n7692_ = OR ( new_n7517_, new_n5360_ ) -new_n7693_ = NAND ( new_n7406_, new_n1734_ ) -new_n7694_ = NAND ( new_n7403_, new_n1734_ ) -new_n7695_ = NAND ( new_n7694_, new_n7693_, new_n7692_, new_n7420_ ) -new_n7696_ = OR ( new_n7397_, new_n5360_ ) -new_n7697_ = NAND ( new_n1746_, new_n1333_ ) -new_n7698_ = NAND ( new_n7395_, new_n1734_ ) -new_n7699_ = AND ( new_n7698_, new_n7697_, new_n7696_ ) -new_n7700_ = OR ( new_n7699_, new_n7695_ ) -new_n7701_ = NAND ( new_n7700_, new_n7691_, new_n7690_ ) -new_n7702_ = NAND ( new_n7699_, new_n7695_ ) -new_n7703_ = OR ( new_n7397_, new_n5508_ ) -new_n7704_ = NAND ( new_n1734_, new_n1333_ ) -new_n7705_ = NAND ( new_n7395_, new_n1723_ ) -new_n7706_ = AND ( new_n7705_, new_n7704_, new_n7703_ ) -new_n7707_ = OR ( new_n7517_, new_n5508_ ) -new_n7708_ = NAND ( new_n7406_, new_n1723_ ) -new_n7709_ = NAND ( new_n7403_, new_n1723_ ) -new_n7710_ = NAND ( new_n7709_, new_n7708_, new_n7707_, new_n7420_ ) -new_n7711_ = NAND ( new_n7710_, new_n7706_ ) -new_n7712_ = NAND ( new_n7711_, new_n7702_, new_n7701_ ) -new_n7713_ = OR ( new_n7710_, new_n7706_ ) -new_n7714_ = OR ( new_n7517_, new_n5673_ ) -new_n7715_ = NAND ( new_n7406_, new_n1711_ ) -new_n7716_ = NAND ( new_n7403_, new_n1711_ ) -new_n7717_ = NAND ( new_n7716_, new_n7715_, new_n7714_, new_n7420_ ) -new_n7718_ = OR ( new_n7397_, new_n5673_ ) -new_n7719_ = NAND ( new_n1723_, new_n1333_ ) -new_n7720_ = NAND ( new_n7395_, new_n1711_ ) -new_n7721_ = AND ( new_n7720_, new_n7719_, new_n7718_ ) -new_n7722_ = OR ( new_n7721_, new_n7717_ ) -new_n7723_ = NAND ( new_n7722_, new_n7713_, new_n7712_ ) -new_n7724_ = NAND ( new_n7721_, new_n7717_ ) -new_n7725_ = NAND ( new_n7540_, new_n7536_ ) -new_n7726_ = NAND ( new_n7725_, new_n7724_, new_n7723_ ) -new_n7727_ = NAND ( new_n7726_, new_n7541_, new_n7532_ ) -new_n7728_ = NAND ( new_n7727_, new_n7531_, new_n7522_ ) -new_n7729_ = OR ( new_n7521_, new_n7516_ ) -new_n7730_ = OR ( new_n7511_, new_n7507_ ) -new_n7731_ = NAND ( new_n7730_, new_n7729_, new_n7728_ ) -new_n7732_ = NAND ( new_n7731_, new_n7512_, new_n7503_ ) -new_n7733_ = NAND ( new_n7732_, new_n7502_, new_n7493_ ) -new_n7734_ = NAND ( new_n7733_, new_n7492_, new_n7483_ ) -new_n7735_ = NAND ( new_n7734_, new_n7482_, new_n7473_ ) -new_n7736_ = NAND ( new_n7735_, new_n7472_, new_n7463_ ) -new_n7737_ = NAND ( new_n7736_, new_n7462_, new_n7453_ ) -new_n7738_ = NAND ( new_n7737_, new_n7452_, new_n7443_ ) -new_n7739_ = NAND ( new_n7738_, new_n7442_, new_n7433_ ) -new_n7740_ = NAND ( new_n7739_, new_n7432_, new_n7423_ ) -new_n7741_ = NAND ( new_n7740_, new_n7422_, new_n7412_ ) -new_n7742_ = NOR ( new_n7394_, new_n2467_ ) -new_n7743_ = NOR ( new_n7397_, new_n7388_ ) -new_n7744_ = NOR ( new_n7743_, new_n7742_ ) -new_n7745_ = NAND ( new_n7393_, new_n6320_ ) -new_n7746_ = XOR ( new_n2475_, new_n2467_ ) -new_n7747_ = NAND ( new_n7746_, new_n7403_ ) -new_n7748_ = OR ( new_n7407_, new_n2467_ ) -new_n7749_ = NAND ( new_n7748_, new_n7747_, new_n7745_ ) -new_n7750_ = NAND ( new_n7749_, new_n7744_ ) -new_n7751_ = OR ( new_n7749_, new_n7744_ ) -new_n7752_ = OR ( new_n7411_, new_n7400_ ) -new_n7753_ = NAND ( new_n7752_, new_n7751_, new_n7750_, new_n7741_ ) -new_n7754_ = NAND ( new_n2776_, new_n1333_ ) -new_n7755_ = OR ( new_n7754_, new_n7749_, new_n7744_ ) -new_n7756_ = NAND ( new_n7754_, new_n7749_, new_n7744_ ) -new_n7757_ = NAND ( new_n7756_, new_n7755_, new_n7753_ ) -new_n7758_ = OR ( new_n2467_, new_n1333_ ) -new_n7759_ = NAND ( new_n7758_, new_n7001_ ) -new_n7760_ = OR ( new_n7008_, new_n1334_ ) -new_n7761_ = NAND ( new_n7760_, new_n3087_ ) -new_n7762_ = OR ( new_n7760_, new_n3087_ ) -new_n7763_ = NAND ( new_n2475_, new_n1334_ ) -new_n7764_ = NAND ( new_n7763_, new_n7762_, new_n7761_, new_n7001_ ) -new_n7765_ = NAND ( new_n7014_, new_n7011_ ) -new_n7766_ = NAND ( new_n7765_, new_n7010_ ) -new_n7767_ = NAND ( new_n7766_, new_n7764_ ) -new_n7768_ = NAND ( new_n7763_, new_n7001_ ) -new_n7769_ = NAND ( new_n7762_, new_n7761_ ) -new_n7770_ = NAND ( new_n7769_, new_n7768_ ) -new_n7771_ = NAND ( new_n7770_, new_n7767_ ) -new_n7772_ = XOR ( new_n7771_, new_n7759_ ) -new_n7773_ = XOR ( new_n7772_, new_n7009_ ) -new_n7774_ = NAND ( new_n7773_, new_n7757_ ) -new_n7775_ = OR ( new_n7757_, new_n2467_ ) -new_n7776_ = NAND ( new_n7775_, new_n7774_ ) -new_n7777_ = NAND ( new_n7776_, new_n7388_ ) -new_n7778_ = NOT ( new_n2684_ ) -new_n7779_ = NAND ( new_n7757_, new_n2770_ ) -new_n7780_ = OR ( new_n7757_, new_n1876_ ) -new_n7781_ = NAND ( new_n7780_, new_n7779_ ) -new_n7782_ = OR ( new_n7781_, new_n7778_ ) -new_n7783_ = NAND ( new_n7757_, new_n2954_ ) -new_n7784_ = OR ( new_n7757_, new_n1884_ ) -new_n7785_ = NAND ( new_n7784_, new_n7783_ ) -new_n7786_ = NAND ( new_n7785_, new_n7782_, new_n2752_, new_n2748_ ) -new_n7787_ = NAND ( new_n7781_, new_n7778_ ) -new_n7788_ = NOT ( new_n7757_ ) -new_n7789_ = OR ( new_n7788_, new_n3114_ ) -new_n7790_ = NAND ( new_n7788_, new_n1867_ ) -new_n7791_ = NAND ( new_n7790_, new_n7789_ ) -new_n7792_ = OR ( new_n7791_, new_n3095_ ) -new_n7793_ = NAND ( new_n7792_, new_n7787_, new_n7786_ ) -new_n7794_ = NAND ( new_n7791_, new_n3095_ ) -new_n7795_ = NOT ( new_n3437_ ) -new_n7796_ = NAND ( new_n7757_, new_n3451_ ) -new_n7797_ = OR ( new_n7757_, new_n1858_ ) -new_n7798_ = NAND ( new_n7797_, new_n7796_ ) -new_n7799_ = OR ( new_n7798_, new_n7795_ ) -new_n7800_ = NAND ( new_n7799_, new_n7794_, new_n7793_ ) -new_n7801_ = NAND ( new_n7798_, new_n7795_ ) -new_n7802_ = NOT ( new_n3651_ ) -new_n7803_ = NAND ( new_n7757_, new_n3665_ ) -new_n7804_ = OR ( new_n7757_, new_n1848_ ) -new_n7805_ = NAND ( new_n7804_, new_n7803_ ) -new_n7806_ = NAND ( new_n7805_, new_n7802_ ) -new_n7807_ = NAND ( new_n7806_, new_n7801_, new_n7800_ ) -new_n7808_ = OR ( new_n7805_, new_n7802_ ) -new_n7809_ = NOT ( new_n3856_ ) -new_n7810_ = NAND ( new_n7757_, new_n3873_ ) -new_n7811_ = OR ( new_n7757_, new_n1838_ ) -new_n7812_ = NAND ( new_n7811_, new_n7810_ ) -new_n7813_ = OR ( new_n7812_, new_n7809_ ) -new_n7814_ = NAND ( new_n7813_, new_n7808_, new_n7807_ ) -new_n7815_ = NAND ( new_n7812_, new_n7809_ ) -new_n7816_ = NOT ( new_n4084_ ) -new_n7817_ = NAND ( new_n7757_, new_n4103_ ) -new_n7818_ = OR ( new_n7757_, new_n1827_ ) -new_n7819_ = NAND ( new_n7818_, new_n7817_ ) -new_n7820_ = NAND ( new_n7819_, new_n7816_ ) -new_n7821_ = NAND ( new_n7820_, new_n7815_, new_n7814_ ) -new_n7822_ = OR ( new_n7819_, new_n7816_ ) -new_n7823_ = NOT ( new_n4240_ ) -new_n7824_ = NAND ( new_n7757_, new_n4254_ ) -new_n7825_ = OR ( new_n7757_, new_n1815_ ) -new_n7826_ = NAND ( new_n7825_, new_n7824_ ) -new_n7827_ = OR ( new_n7826_, new_n7823_ ) -new_n7828_ = NAND ( new_n7827_, new_n7822_, new_n7821_ ) -new_n7829_ = NAND ( new_n7826_, new_n7823_ ) -new_n7830_ = NOT ( new_n4413_ ) -new_n7831_ = NAND ( new_n7757_, new_n4430_ ) -new_n7832_ = OR ( new_n7757_, new_n1804_ ) -new_n7833_ = NAND ( new_n7832_, new_n7831_ ) -new_n7834_ = NAND ( new_n7833_, new_n7830_ ) -new_n7835_ = NAND ( new_n7834_, new_n7829_, new_n7828_ ) -new_n7836_ = OR ( new_n7833_, new_n7830_ ) -new_n7837_ = NOT ( new_n4560_ ) -new_n7838_ = NAND ( new_n7757_, new_n4577_ ) -new_n7839_ = OR ( new_n7757_, new_n1793_ ) -new_n7840_ = NAND ( new_n7839_, new_n7838_ ) -new_n7841_ = OR ( new_n7840_, new_n7837_ ) -new_n7842_ = NAND ( new_n7841_, new_n7836_, new_n7835_ ) -new_n7843_ = NAND ( new_n7840_, new_n7837_ ) -new_n7844_ = NOT ( new_n4758_ ) -new_n7845_ = NAND ( new_n7757_, new_n4778_ ) -new_n7846_ = OR ( new_n7757_, new_n1781_ ) -new_n7847_ = NAND ( new_n7846_, new_n7845_ ) -new_n7848_ = NAND ( new_n7847_, new_n7844_ ) -new_n7849_ = NAND ( new_n7848_, new_n7843_, new_n7842_ ) -new_n7850_ = OR ( new_n7847_, new_n7844_ ) -new_n7851_ = NOT ( new_n4899_ ) -new_n7852_ = NAND ( new_n7757_, new_n4916_ ) -new_n7853_ = OR ( new_n7757_, new_n1769_ ) -new_n7854_ = NAND ( new_n7853_, new_n7852_ ) -new_n7855_ = OR ( new_n7854_, new_n7851_ ) -new_n7856_ = NAND ( new_n7855_, new_n7850_, new_n7849_ ) -new_n7857_ = NAND ( new_n7854_, new_n7851_ ) -new_n7858_ = NOT ( new_n5065_ ) -new_n7859_ = NAND ( new_n7757_, new_n5081_ ) -new_n7860_ = OR ( new_n7757_, new_n1758_ ) -new_n7861_ = NAND ( new_n7860_, new_n7859_ ) -new_n7862_ = NAND ( new_n7861_, new_n7858_ ) -new_n7863_ = NAND ( new_n7862_, new_n7857_, new_n7856_ ) -new_n7864_ = OR ( new_n7861_, new_n7858_ ) -new_n7865_ = NOT ( new_n5201_ ) -new_n7866_ = NAND ( new_n7757_, new_n5217_ ) -new_n7867_ = OR ( new_n7757_, new_n1746_ ) -new_n7868_ = NAND ( new_n7867_, new_n7866_ ) -new_n7869_ = OR ( new_n7868_, new_n7865_ ) -new_n7870_ = NAND ( new_n7869_, new_n7864_, new_n7863_ ) -new_n7871_ = NAND ( new_n7868_, new_n7865_ ) -new_n7872_ = NOT ( new_n5360_ ) -new_n7873_ = NAND ( new_n7757_, new_n5378_ ) -new_n7874_ = OR ( new_n7757_, new_n1734_ ) -new_n7875_ = NAND ( new_n7874_, new_n7873_ ) -new_n7876_ = NAND ( new_n7875_, new_n7872_ ) -new_n7877_ = NAND ( new_n7876_, new_n7871_, new_n7870_ ) -new_n7878_ = OR ( new_n7875_, new_n7872_ ) -new_n7879_ = NOT ( new_n5508_ ) -new_n7880_ = NAND ( new_n7757_, new_n5524_ ) -new_n7881_ = OR ( new_n7757_, new_n1723_ ) -new_n7882_ = NAND ( new_n7881_, new_n7880_ ) -new_n7883_ = OR ( new_n7882_, new_n7879_ ) -new_n7884_ = NAND ( new_n7883_, new_n7878_, new_n7877_ ) -new_n7885_ = NAND ( new_n7882_, new_n7879_ ) -new_n7886_ = NOT ( new_n5673_ ) -new_n7887_ = NAND ( new_n7757_, new_n5689_ ) -new_n7888_ = OR ( new_n7757_, new_n1711_ ) -new_n7889_ = NAND ( new_n7888_, new_n7887_ ) -new_n7890_ = NAND ( new_n7889_, new_n7886_ ) -new_n7891_ = NAND ( new_n7890_, new_n7885_, new_n7884_ ) -new_n7892_ = OR ( new_n7889_, new_n7886_ ) -new_n7893_ = NOT ( new_n5815_ ) -new_n7894_ = NAND ( new_n7757_, new_n5832_ ) -new_n7895_ = OR ( new_n7757_, new_n1699_ ) -new_n7896_ = NAND ( new_n7895_, new_n7894_ ) -new_n7897_ = OR ( new_n7896_, new_n7893_ ) -new_n7898_ = NAND ( new_n7897_, new_n7892_, new_n7891_ ) -new_n7899_ = NAND ( new_n7896_, new_n7893_ ) -new_n7900_ = NOT ( new_n5968_ ) -new_n7901_ = NAND ( new_n7757_, new_n5984_ ) -new_n7902_ = OR ( new_n7757_, new_n1688_ ) -new_n7903_ = NAND ( new_n7902_, new_n7901_ ) -new_n7904_ = NAND ( new_n7903_, new_n7900_ ) -new_n7905_ = NAND ( new_n7904_, new_n7899_, new_n7898_ ) -new_n7906_ = OR ( new_n7903_, new_n7900_ ) -new_n7907_ = NOT ( new_n6086_ ) -new_n7908_ = NAND ( new_n7757_, new_n6104_ ) -new_n7909_ = OR ( new_n7757_, new_n1676_ ) -new_n7910_ = NAND ( new_n7909_, new_n7908_ ) -new_n7911_ = OR ( new_n7910_, new_n7907_ ) -new_n7912_ = NAND ( new_n7911_, new_n7906_, new_n7905_ ) -new_n7913_ = NAND ( new_n7910_, new_n7907_ ) -new_n7914_ = NAND ( new_n7757_, new_n6270_ ) -new_n7915_ = OR ( new_n7757_, new_n1663_ ) -new_n7916_ = NAND ( new_n7915_, new_n7914_ ) -new_n7917_ = NAND ( new_n7916_, new_n6257_ ) -new_n7918_ = NAND ( new_n7917_, new_n7913_, new_n7912_ ) -new_n7919_ = OR ( new_n7916_, new_n6257_ ) -new_n7920_ = NAND ( new_n7757_, new_n6410_ ) -new_n7921_ = OR ( new_n7757_, new_n1653_ ) -new_n7922_ = NAND ( new_n7921_, new_n7920_ ) -new_n7923_ = OR ( new_n7922_, new_n6397_ ) -new_n7924_ = NAND ( new_n7923_, new_n7919_, new_n7918_ ) -new_n7925_ = NAND ( new_n7922_, new_n6397_ ) -new_n7926_ = NAND ( new_n7757_, new_n6485_ ) -new_n7927_ = OR ( new_n7757_, new_n1642_ ) -new_n7928_ = NAND ( new_n7927_, new_n7926_ ) -new_n7929_ = NAND ( new_n7928_, new_n6471_ ) -new_n7930_ = NAND ( new_n7929_, new_n7925_, new_n7924_ ) -new_n7931_ = OR ( new_n7928_, new_n6471_ ) -new_n7932_ = NAND ( new_n7757_, new_n6554_ ) -new_n7933_ = OR ( new_n7757_, new_n2300_ ) -new_n7934_ = NAND ( new_n7933_, new_n7932_ ) -new_n7935_ = OR ( new_n7934_, new_n6541_ ) -new_n7936_ = NAND ( new_n7935_, new_n7931_, new_n7930_ ) -new_n7937_ = NAND ( new_n7934_, new_n6541_ ) -new_n7938_ = NAND ( new_n7757_, new_n6629_ ) -new_n7939_ = OR ( new_n7757_, new_n2338_ ) -new_n7940_ = NAND ( new_n7939_, new_n7938_ ) -new_n7941_ = NAND ( new_n7940_, new_n6615_ ) -new_n7942_ = NAND ( new_n7941_, new_n7937_, new_n7936_ ) -new_n7943_ = OR ( new_n7940_, new_n6615_ ) -new_n7944_ = NAND ( new_n7757_, new_n6698_ ) -new_n7945_ = OR ( new_n7757_, new_n2350_ ) -new_n7946_ = NAND ( new_n7945_, new_n7944_ ) -new_n7947_ = OR ( new_n7946_, new_n6685_ ) -new_n7948_ = NAND ( new_n7947_, new_n7943_, new_n7942_ ) -new_n7949_ = NAND ( new_n7946_, new_n6685_ ) -new_n7950_ = NAND ( new_n7757_, new_n6773_ ) -new_n7951_ = OR ( new_n7757_, new_n2431_ ) -new_n7952_ = NAND ( new_n7951_, new_n7950_ ) -new_n7953_ = NAND ( new_n7952_, new_n6760_ ) -new_n7954_ = NAND ( new_n7953_, new_n7949_, new_n7948_ ) -new_n7955_ = OR ( new_n7952_, new_n6760_ ) -new_n7956_ = NAND ( new_n7757_, new_n6842_ ) -new_n7957_ = OR ( new_n7757_, new_n2494_ ) -new_n7958_ = NAND ( new_n7957_, new_n7956_ ) -new_n7959_ = OR ( new_n7958_, new_n6829_ ) -new_n7960_ = NAND ( new_n7959_, new_n7955_, new_n7954_ ) -new_n7961_ = NAND ( new_n7958_, new_n6829_ ) -new_n7962_ = NAND ( new_n7757_, new_n6918_ ) -new_n7963_ = OR ( new_n7757_, new_n2552_ ) -new_n7964_ = NAND ( new_n7963_, new_n7962_ ) -new_n7965_ = NAND ( new_n7964_, new_n6905_ ) -new_n7966_ = NAND ( new_n7965_, new_n7961_, new_n7960_ ) -new_n7967_ = OR ( new_n7964_, new_n6905_ ) -new_n7968_ = NAND ( new_n7757_, new_n7015_ ) -new_n7969_ = OR ( new_n7757_, new_n2483_ ) -new_n7970_ = NAND ( new_n7969_, new_n7968_ ) -new_n7971_ = OR ( new_n7970_, new_n6993_ ) -new_n7972_ = NAND ( new_n7971_, new_n7967_, new_n7966_ ) -new_n7973_ = NAND ( new_n7970_, new_n6993_ ) -new_n7974_ = NAND ( new_n7770_, new_n7764_ ) -new_n7975_ = XOR ( new_n7974_, new_n7766_ ) -new_n7976_ = NAND ( new_n7975_, new_n7757_ ) -new_n7977_ = OR ( new_n7757_, new_n2475_ ) -new_n7978_ = NAND ( new_n7977_, new_n7976_ ) -new_n7979_ = NAND ( new_n7978_, new_n6278_ ) -new_n7980_ = NAND ( new_n7979_, new_n7973_, new_n7972_ ) -new_n7981_ = OR ( new_n7978_, new_n6278_ ) -new_n7982_ = OR ( new_n7776_, new_n7388_ ) -new_n7983_ = NAND ( new_n7982_, new_n7981_, new_n7980_ ) -new_n7984_ = NAND ( new_n7983_, new_n7777_ ) -new_n7985_ = NAND ( new_n7984_, new_n1582_, new_n1573_ ) -new_n7986_ = NAND ( new_n7757_, new_n1583_ ) -new_n7987_ = NOT ( new_n6278_ ) -new_n7988_ = NAND ( new_n7987_, new_n2475_ ) -new_n7989_ = OR ( new_n7987_, new_n2475_ ) -new_n7990_ = NOT ( new_n6993_ ) -new_n7991_ = NOR ( new_n7990_, new_n2483_ ) -new_n7992_ = AND ( new_n7990_, new_n2483_ ) -new_n7993_ = NOT ( new_n6829_ ) -new_n7994_ = NAND ( new_n7993_, new_n2494_ ) -new_n7995_ = OR ( new_n7993_, new_n2494_ ) -new_n7996_ = NOT ( new_n6760_ ) -new_n7997_ = NAND ( new_n7996_, new_n2431_ ) -new_n7998_ = OR ( new_n7996_, new_n2431_ ) -new_n7999_ = NOT ( new_n6685_ ) -new_n8000_ = OR ( new_n7999_, new_n2350_ ) -new_n8001_ = NAND ( new_n7999_, new_n2350_ ) -new_n8002_ = NOR ( new_n6615_, new_n6617_ ) -new_n8003_ = NAND ( new_n6615_, new_n6617_ ) -new_n8004_ = NOT ( new_n6541_ ) -new_n8005_ = OR ( new_n8004_, new_n2300_ ) -new_n8006_ = NAND ( new_n8004_, new_n2300_ ) -new_n8007_ = NOR ( new_n6471_, new_n6473_ ) -new_n8008_ = NAND ( new_n6471_, new_n6473_ ) -new_n8009_ = NOT ( new_n6397_ ) -new_n8010_ = OR ( new_n8009_, new_n1653_ ) -new_n8011_ = NAND ( new_n8009_, new_n1653_ ) -new_n8012_ = NOR ( new_n7907_, new_n6088_ ) -new_n8013_ = OR ( new_n6086_, new_n1676_ ) -new_n8014_ = NAND ( new_n5968_, new_n1688_ ) -new_n8015_ = OR ( new_n5968_, new_n1688_ ) -new_n8016_ = NOR ( new_n7893_, new_n5818_ ) -new_n8017_ = NOR ( new_n5815_, new_n1699_ ) -new_n8018_ = NAND ( new_n5508_, new_n1723_ ) -new_n8019_ = OR ( new_n5508_, new_n1723_ ) -new_n8020_ = NAND ( new_n5360_, new_n1734_ ) -new_n8021_ = OR ( new_n5360_, new_n1734_ ) -new_n8022_ = NAND ( new_n5201_, new_n1746_ ) -new_n8023_ = OR ( new_n5201_, new_n1746_ ) -new_n8024_ = NOR ( new_n7851_, new_n4902_ ) -new_n8025_ = NOR ( new_n4899_, new_n1769_ ) -new_n8026_ = NAND ( new_n4758_, new_n1781_ ) -new_n8027_ = OR ( new_n4758_, new_n1781_ ) -new_n8028_ = OR ( new_n3437_, new_n1858_ ) -new_n8029_ = NAND ( new_n3437_, new_n1858_ ) -new_n8030_ = OR ( new_n2753_, new_n1884_ ) -new_n8031_ = NAND ( new_n2753_, new_n1884_ ) -new_n8032_ = NAND ( new_n8031_, new_n8030_, new_n8029_, new_n8028_ ) -new_n8033_ = XOR ( new_n3651_, new_n1848_ ) -new_n8034_ = XOR ( new_n2684_, new_n1876_ ) -new_n8035_ = XOR ( new_n4084_, new_n1827_ ) -new_n8036_ = XOR ( new_n3095_, new_n1867_ ) -new_n8037_ = NAND ( new_n8036_, new_n8035_, new_n8034_, new_n8033_ ) -new_n8038_ = NOR ( new_n7830_, new_n4416_ ) -new_n8039_ = OR ( new_n4413_, new_n1804_ ) -new_n8040_ = NAND ( new_n4240_, new_n1815_ ) -new_n8041_ = OR ( new_n4240_, new_n1815_ ) -new_n8042_ = XOR ( new_n3856_, new_n1838_ ) -new_n8043_ = NAND ( new_n8042_, new_n8041_, new_n8040_, new_n8039_ ) -new_n8044_ = NOR ( new_n8043_, new_n8038_, new_n8037_, new_n8032_ ) -new_n8045_ = XOR ( new_n4560_, new_n1793_ ) -new_n8046_ = NAND ( new_n8045_, new_n8044_, new_n8027_, new_n8026_ ) -new_n8047_ = XNOR ( new_n5065_, new_n1758_ ) -new_n8048_ = NOR ( new_n8047_, new_n8046_, new_n8025_, new_n8024_ ) -new_n8049_ = AND ( new_n8048_, new_n8023_, new_n8022_, new_n8021_ ) -new_n8050_ = NAND ( new_n8049_, new_n8020_, new_n8019_, new_n8018_ ) -new_n8051_ = XNOR ( new_n5673_, new_n1711_ ) -new_n8052_ = NOR ( new_n8051_, new_n8050_, new_n8017_, new_n8016_ ) -new_n8053_ = NAND ( new_n8052_, new_n8015_, new_n8014_, new_n8013_ ) -new_n8054_ = XOR ( new_n6257_, new_n1663_ ) -new_n8055_ = NOR ( new_n8054_, new_n8053_, new_n8012_ ) -new_n8056_ = NAND ( new_n8055_, new_n8011_, new_n8010_, new_n8008_ ) -new_n8057_ = NOR ( new_n8056_, new_n8007_ ) -new_n8058_ = NAND ( new_n8057_, new_n8006_, new_n8005_, new_n8003_ ) -new_n8059_ = NOR ( new_n8058_, new_n8002_ ) -new_n8060_ = AND ( new_n8059_, new_n8001_, new_n8000_, new_n7998_ ) -new_n8061_ = NAND ( new_n8060_, new_n7997_, new_n7995_, new_n7994_ ) -new_n8062_ = XOR ( new_n6905_, new_n2552_ ) -new_n8063_ = NOR ( new_n8062_, new_n8061_, new_n7992_, new_n7991_ ) -new_n8064_ = XOR ( new_n6320_, new_n2467_ ) -new_n8065_ = NAND ( new_n8064_, new_n8063_, new_n7989_, new_n7988_ ) -new_n8066_ = OR ( new_n8065_, new_n1573_ ) -new_n8067_ = NAND ( new_n8066_, new_n7986_, new_n7985_, new_n2700_ ) -new_n8068_ = XOR ( new_n7757_, new_n1573_ ) -new_n8069_ = OR ( new_n8068_, new_n2700_ ) -new_n8070_ = NAND ( new_n8069_, new_n8067_, new_n2694_ ) -new_n8071_ = NAND ( new_n7983_, new_n7777_, new_n2702_, new_n1573_ ) -new_n8072_ = NAND ( new_n8065_, new_n2702_, new_n1582_, new_n1574_ ) -new_n8073_ = NAND ( new_n7757_, new_n2901_ ) -new_n8074_ = NAND ( new_n7788_, new_n2711_ ) -new_n8075_ = NAND ( new_n8074_, new_n8073_ ) -new_n8076_ = NAND ( new_n8075_, new_n8072_, new_n8071_, new_n8070_ ) -new_n8077_ = NAND ( new_n8076_, new_n2873_ ) -new_n8078_ = NAND ( new_n2923_, new_n1568_, new_n2730_ ) -new_n8079_ = OR ( new_n8078_, new_n7788_ ) -new_n8080_ = NAND ( new_n2873_, new_n1582_ ) -new_n8081_ = NAND ( new_n8080_, new_n8078_, NET_490 ) -new_n8082_ = NAND ( new_n8065_, new_n2873_, new_n2772_ ) -NET_9221 = NAND ( new_n8082_, new_n8081_, new_n8079_, new_n8077_ ) -new_n8084_ = NOR ( new_n5172_, new_n7378_ ) -new_n8085_ = NOR ( new_n5128_, new_n7172_ ) -new_n8086_ = NAND ( new_n8085_, new_n3321_ ) -new_n8087_ = XNOR ( new_n8086_, new_n8084_ ) -new_n8088_ = OR ( new_n7341_, new_n7336_ ) -new_n8089_ = NAND ( new_n8088_, new_n7334_ ) -new_n8090_ = NAND ( new_n7341_, new_n7336_ ) -new_n8091_ = NAND ( new_n8090_, new_n8089_ ) -new_n8092_ = XNOR ( new_n8091_, new_n8087_ ) -new_n8093_ = NAND ( new_n8092_, new_n3336_ ) -new_n8094_ = NAND ( new_n8085_, new_n4995_ ) -new_n8095_ = NAND ( new_n3229_, new_n2314_ ) -new_n8096_ = NAND ( new_n8095_, new_n8094_, new_n6361_ ) -new_n8097_ = XOR ( new_n8096_, new_n3241_ ) -new_n8098_ = NAND ( new_n8085_, new_n3229_ ) -new_n8099_ = NAND ( new_n3583_, new_n2314_ ) -new_n8100_ = NAND ( new_n8099_, new_n8098_, new_n6368_ ) -new_n8101_ = OR ( new_n8100_, new_n8097_ ) -new_n8102_ = NAND ( new_n8100_, new_n8097_ ) -new_n8103_ = NAND ( new_n8102_, new_n8101_ ) -new_n8104_ = NAND ( new_n7355_, new_n7351_ ) -new_n8105_ = NAND ( new_n8104_, new_n7352_ ) -new_n8106_ = XOR ( new_n8105_, new_n8103_ ) -new_n8107_ = OR ( new_n8106_, new_n3315_ ) -new_n8108_ = NAND ( new_n8085_, new_n3361_ ) -new_n8109_ = NAND ( new_n3353_, new_n2309_ ) -new_n8110_ = NAND ( new_n3364_, new_n2409_ ) -new_n8111_ = OR ( NET_275, new_n2305_ ) -new_n8112_ = NAND ( new_n3366_, new_n2325_ ) -new_n8113_ = AND ( new_n8112_, new_n8111_, new_n8110_, new_n8109_ ) -NET_9224 = NAND ( new_n8113_, new_n8108_, new_n8107_, new_n8093_ ) -new_n8115_ = NAND ( new_n8092_, new_n3509_ ) -new_n8116_ = OR ( new_n8106_, new_n3503_ ) -new_n8117_ = NAND ( new_n8085_, new_n5756_ ) -new_n8118_ = NAND ( new_n3746_, new_n2325_ ) -new_n8119_ = NAND ( new_n3516_, new_n2409_ ) -new_n8120_ = NAND ( new_n3360_, new_n2309_ ) -new_n8121_ = NAND ( new_n3498_, NET_185 ) -new_n8122_ = AND ( new_n8121_, new_n8120_, new_n8119_, new_n8118_ ) -NET_9232 = NAND ( new_n8122_, new_n8117_, new_n8116_, new_n8115_ ) -new_n8124_ = NAND ( new_n8092_, new_n3540_ ) -new_n8125_ = OR ( new_n8106_, new_n3536_ ) -new_n8126_ = NAND ( new_n8085_, new_n3543_ ) -new_n8127_ = NOR ( new_n3745_, new_n7324_ ) -new_n8128_ = NOT ( new_n2409_ ) -new_n8129_ = NOR ( new_n3515_, new_n8128_ ) -new_n8130_ = NOR ( new_n8129_, new_n8127_ ) -new_n8131_ = NAND ( new_n8130_, new_n8126_, new_n8125_, new_n8124_ ) -new_n8132_ = NAND ( new_n8131_, new_n3553_ ) -new_n8133_ = NAND ( new_n3552_, NET_153 ) -NET_9240 = NAND ( new_n8133_, new_n8132_ ) -new_n8135_ = NAND ( new_n8131_, new_n3559_ ) -new_n8136_ = NAND ( new_n3558_, NET_121 ) -NET_9241 = NAND ( new_n8136_, new_n8135_ ) -new_n8138_ = NOR ( new_n5172_, new_n8128_ ) -new_n8139_ = NOR ( new_n5291_, new_n7172_ ) -new_n8140_ = NAND ( new_n8139_, new_n3321_ ) -new_n8141_ = XNOR ( new_n8140_, new_n8138_ ) -new_n8142_ = OR ( new_n8091_, new_n8086_ ) -new_n8143_ = NAND ( new_n8142_, new_n8084_ ) -new_n8144_ = NAND ( new_n8091_, new_n8086_ ) -new_n8145_ = NAND ( new_n8144_, new_n8143_ ) -new_n8146_ = XNOR ( new_n8145_, new_n8141_ ) -new_n8147_ = NAND ( new_n8146_, new_n3336_ ) -new_n8148_ = NAND ( new_n8139_, new_n4995_ ) -new_n8149_ = NAND ( new_n3229_, new_n2409_ ) -new_n8150_ = NAND ( new_n8149_, new_n8148_, new_n6361_ ) -new_n8151_ = XOR ( new_n8150_, new_n3241_ ) -new_n8152_ = NAND ( new_n8139_, new_n3229_ ) -new_n8153_ = NAND ( new_n3583_, new_n2409_ ) -new_n8154_ = NAND ( new_n8153_, new_n8152_, new_n6368_ ) -new_n8155_ = OR ( new_n8154_, new_n8151_ ) -new_n8156_ = NAND ( new_n8154_, new_n8151_ ) -new_n8157_ = NAND ( new_n8156_, new_n8155_ ) -new_n8158_ = NAND ( new_n8105_, new_n8101_ ) -new_n8159_ = NAND ( new_n8158_, new_n8102_ ) -new_n8160_ = XOR ( new_n8159_, new_n8157_ ) -new_n8161_ = OR ( new_n8160_, new_n3315_ ) -new_n8162_ = NAND ( new_n8139_, new_n3361_ ) -new_n8163_ = NAND ( new_n3353_, new_n2404_ ) -new_n8164_ = NAND ( new_n3364_, new_n2453_ ) -new_n8165_ = NAND ( NET_22556, NET_262 ) -new_n8166_ = NAND ( new_n3366_, new_n2314_ ) -new_n8167_ = AND ( new_n8166_, new_n8165_, new_n8164_, new_n8163_ ) -NET_9251 = NAND ( new_n8167_, new_n8162_, new_n8161_, new_n8147_ ) -new_n8169_ = NAND ( new_n8146_, new_n3509_ ) -new_n8170_ = OR ( new_n8160_, new_n3503_ ) -new_n8171_ = NAND ( new_n8139_, new_n5756_ ) -new_n8172_ = NAND ( new_n3746_, new_n2314_ ) -new_n8173_ = NAND ( new_n3516_, new_n2453_ ) -new_n8174_ = NAND ( new_n3360_, new_n2404_ ) -new_n8175_ = NAND ( new_n3498_, NET_186 ) -new_n8176_ = AND ( new_n8175_, new_n8174_, new_n8173_, new_n8172_ ) -NET_9259 = NAND ( new_n8176_, new_n8171_, new_n8170_, new_n8169_ ) -new_n8178_ = NAND ( new_n8146_, new_n3540_ ) -new_n8179_ = OR ( new_n8160_, new_n3536_ ) -new_n8180_ = NAND ( new_n8139_, new_n3543_ ) -new_n8181_ = NOR ( new_n3745_, new_n7378_ ) -new_n8182_ = NOT ( new_n2453_ ) -new_n8183_ = NOR ( new_n3515_, new_n8182_ ) -new_n8184_ = NOR ( new_n8183_, new_n8181_ ) -new_n8185_ = NAND ( new_n8184_, new_n8180_, new_n8179_, new_n8178_ ) -new_n8186_ = NAND ( new_n8185_, new_n3553_ ) -new_n8187_ = NAND ( new_n3552_, NET_154 ) -NET_9266 = NAND ( new_n8187_, new_n8186_ ) -new_n8189_ = NAND ( new_n8185_, new_n3559_ ) -new_n8190_ = NAND ( new_n3558_, NET_122 ) -NET_9267 = NAND ( new_n8190_, new_n8189_ ) -new_n8192_ = NOR ( new_n5172_, new_n8182_ ) -new_n8193_ = NOR ( new_n5418_, new_n7172_ ) -new_n8194_ = NAND ( new_n8193_, new_n3321_ ) -new_n8195_ = XNOR ( new_n8194_, new_n8192_ ) -new_n8196_ = OR ( new_n8145_, new_n8140_ ) -new_n8197_ = NAND ( new_n8196_, new_n8138_ ) -new_n8198_ = NAND ( new_n8145_, new_n8140_ ) -new_n8199_ = NAND ( new_n8198_, new_n8197_ ) -new_n8200_ = XNOR ( new_n8199_, new_n8195_ ) -new_n8201_ = NAND ( new_n8200_, new_n3336_ ) -new_n8202_ = NAND ( new_n8193_, new_n4995_ ) -new_n8203_ = NAND ( new_n3229_, new_n2453_ ) -new_n8204_ = NAND ( new_n8203_, new_n8202_, new_n6361_ ) -new_n8205_ = XOR ( new_n8204_, new_n3241_ ) -new_n8206_ = NAND ( new_n8193_, new_n3229_ ) -new_n8207_ = NAND ( new_n3583_, new_n2453_ ) -new_n8208_ = NAND ( new_n8207_, new_n8206_, new_n6368_ ) -new_n8209_ = OR ( new_n8208_, new_n8205_ ) -new_n8210_ = NAND ( new_n8208_, new_n8205_ ) -new_n8211_ = NAND ( new_n8210_, new_n8209_ ) -new_n8212_ = NAND ( new_n8159_, new_n8155_ ) -new_n8213_ = NAND ( new_n8212_, new_n8156_ ) -new_n8214_ = XOR ( new_n8213_, new_n8211_ ) -new_n8215_ = OR ( new_n8214_, new_n3315_ ) -new_n8216_ = NAND ( new_n8193_, new_n3361_ ) -new_n8217_ = NAND ( new_n3353_, new_n2448_ ) -new_n8218_ = NAND ( new_n3364_, new_n2443_ ) -new_n8219_ = NAND ( NET_22556, NET_247 ) -new_n8220_ = NAND ( new_n3366_, new_n2409_ ) -new_n8221_ = AND ( new_n8220_, new_n8219_, new_n8218_, new_n8217_ ) -NET_9279 = NAND ( new_n8221_, new_n8216_, new_n8215_, new_n8201_ ) -new_n8223_ = NAND ( new_n8200_, new_n3509_ ) -new_n8224_ = OR ( new_n8214_, new_n3503_ ) -new_n8225_ = NAND ( new_n8193_, new_n5756_ ) -new_n8226_ = NAND ( new_n3746_, new_n2409_ ) -new_n8227_ = NAND ( new_n3516_, new_n2443_ ) -new_n8228_ = NAND ( new_n3360_, new_n2448_ ) -new_n8229_ = NAND ( new_n3498_, NET_187 ) -new_n8230_ = AND ( new_n8229_, new_n8228_, new_n8227_, new_n8226_ ) -NET_9287 = NAND ( new_n8230_, new_n8225_, new_n8224_, new_n8223_ ) -new_n8232_ = NAND ( new_n8200_, new_n3540_ ) -new_n8233_ = OR ( new_n8214_, new_n3536_ ) -new_n8234_ = NAND ( new_n8193_, new_n3543_ ) -new_n8235_ = NOR ( new_n3745_, new_n8128_ ) -new_n8236_ = NOT ( new_n2443_ ) -new_n8237_ = NOR ( new_n3515_, new_n8236_ ) -new_n8238_ = NOR ( new_n8237_, new_n8235_ ) -new_n8239_ = NAND ( new_n8238_, new_n8234_, new_n8233_, new_n8232_ ) -new_n8240_ = NAND ( new_n8239_, new_n3553_ ) -new_n8241_ = NAND ( new_n3552_, NET_155 ) -NET_9295 = NAND ( new_n8241_, new_n8240_ ) -new_n8243_ = NAND ( new_n8239_, new_n3559_ ) -new_n8244_ = NAND ( new_n3558_, NET_123 ) -NET_9296 = NAND ( new_n8244_, new_n8243_ ) -new_n8246_ = NOR ( new_n5172_, new_n8236_ ) -new_n8247_ = NOR ( new_n5609_, new_n7172_ ) -new_n8248_ = NAND ( new_n8247_, new_n3321_ ) -new_n8249_ = XNOR ( new_n8248_, new_n8246_ ) -new_n8250_ = OR ( new_n8199_, new_n8194_ ) -new_n8251_ = NAND ( new_n8250_, new_n8192_ ) -new_n8252_ = NAND ( new_n8199_, new_n8194_ ) -new_n8253_ = NAND ( new_n8252_, new_n8251_ ) -new_n8254_ = XNOR ( new_n8253_, new_n8249_ ) -new_n8255_ = NAND ( new_n8254_, new_n3336_ ) -new_n8256_ = NAND ( new_n8247_, new_n4995_ ) -new_n8257_ = NAND ( new_n3229_, new_n2443_ ) -new_n8258_ = NAND ( new_n8257_, new_n8256_, new_n6361_ ) -new_n8259_ = XOR ( new_n8258_, new_n3241_ ) -new_n8260_ = NAND ( new_n8247_, new_n3229_ ) -new_n8261_ = NAND ( new_n3583_, new_n2443_ ) -new_n8262_ = NAND ( new_n8261_, new_n8260_, new_n6368_ ) -new_n8263_ = OR ( new_n8262_, new_n8259_ ) -new_n8264_ = NAND ( new_n8262_, new_n8259_ ) -new_n8265_ = NAND ( new_n8264_, new_n8263_ ) -new_n8266_ = NAND ( new_n8213_, new_n8209_ ) -new_n8267_ = NAND ( new_n8266_, new_n8210_ ) -new_n8268_ = XOR ( new_n8267_, new_n8265_ ) -new_n8269_ = OR ( new_n8268_, new_n3315_ ) -new_n8270_ = NAND ( new_n8247_, new_n3361_ ) -new_n8271_ = NAND ( new_n3353_, new_n2438_ ) -new_n8272_ = NAND ( new_n3364_, new_n2533_ ) -new_n8273_ = OR ( NET_275, new_n2390_ ) -new_n8274_ = NAND ( new_n3366_, new_n2453_ ) -new_n8275_ = AND ( new_n8274_, new_n8273_, new_n8272_, new_n8271_ ) -NET_9306 = NAND ( new_n8275_, new_n8270_, new_n8269_, new_n8255_ ) -new_n8277_ = NAND ( new_n8254_, new_n3509_ ) -new_n8278_ = OR ( new_n8268_, new_n3503_ ) -new_n8279_ = NAND ( new_n8247_, new_n5756_ ) -new_n8280_ = NAND ( new_n3746_, new_n2453_ ) -new_n8281_ = NAND ( new_n3516_, new_n2533_ ) -new_n8282_ = NAND ( new_n3360_, new_n2438_ ) -new_n8283_ = NAND ( new_n3498_, NET_188 ) -new_n8284_ = AND ( new_n8283_, new_n8282_, new_n8281_, new_n8280_ ) -NET_9314 = NAND ( new_n8284_, new_n8279_, new_n8278_, new_n8277_ ) -new_n8286_ = NAND ( new_n8254_, new_n3540_ ) -new_n8287_ = OR ( new_n8268_, new_n3536_ ) -new_n8288_ = NAND ( new_n8247_, new_n3543_ ) -new_n8289_ = NOR ( new_n3745_, new_n8182_ ) -new_n8290_ = NOT ( new_n2533_ ) -new_n8291_ = NOR ( new_n3515_, new_n8290_ ) -new_n8292_ = NOR ( new_n8291_, new_n8289_ ) -new_n8293_ = NAND ( new_n8292_, new_n8288_, new_n8287_, new_n8286_ ) -new_n8294_ = NAND ( new_n8293_, new_n3553_ ) -new_n8295_ = NAND ( new_n3552_, NET_156 ) -NET_9321 = NAND ( new_n8295_, new_n8294_ ) -new_n8297_ = NAND ( new_n8293_, new_n3559_ ) -new_n8298_ = NAND ( new_n3558_, NET_124 ) -NET_9322 = NAND ( new_n8298_, new_n8297_ ) -new_n8300_ = NAND ( new_n3317_, new_n2533_ ) -new_n8301_ = NOR ( new_n5749_, new_n7172_ ) -new_n8302_ = NAND ( new_n8301_, new_n3321_ ) -new_n8303_ = XOR ( new_n8302_, new_n8300_ ) -new_n8304_ = OR ( new_n8253_, new_n8248_ ) -new_n8305_ = NAND ( new_n8304_, new_n8246_ ) -new_n8306_ = NAND ( new_n8253_, new_n8248_ ) -new_n8307_ = NAND ( new_n8306_, new_n8305_ ) -new_n8308_ = XNOR ( new_n8307_, new_n8303_ ) -new_n8309_ = NAND ( new_n8308_, new_n3336_ ) -new_n8310_ = NAND ( new_n8301_, new_n4995_ ) -new_n8311_ = NAND ( new_n3229_, new_n2533_ ) -new_n8312_ = NAND ( new_n8311_, new_n8310_, new_n6361_ ) -new_n8313_ = XOR ( new_n8312_, new_n3241_ ) -new_n8314_ = NAND ( new_n8301_, new_n3229_ ) -new_n8315_ = NAND ( new_n3583_, new_n2533_ ) -new_n8316_ = NAND ( new_n8315_, new_n8314_, new_n6368_ ) -new_n8317_ = OR ( new_n8316_, new_n8313_ ) -new_n8318_ = NAND ( new_n8316_, new_n8313_ ) -new_n8319_ = NAND ( new_n8318_, new_n8317_ ) -new_n8320_ = NAND ( new_n8267_, new_n8263_ ) -new_n8321_ = NAND ( new_n8320_, new_n8264_ ) -new_n8322_ = XOR ( new_n8321_, new_n8319_ ) -new_n8323_ = OR ( new_n8322_, new_n3315_ ) -new_n8324_ = NAND ( new_n8301_, new_n3361_ ) -new_n8325_ = NAND ( new_n3353_, new_n2528_ ) -new_n8326_ = NAND ( new_n3364_, new_n2397_ ) -new_n8327_ = OR ( NET_275, new_n2389_ ) -new_n8328_ = NAND ( new_n3366_, new_n2443_ ) -new_n8329_ = AND ( new_n8328_, new_n8327_, new_n8326_, new_n8325_ ) -NET_9334 = NAND ( new_n8329_, new_n8324_, new_n8323_, new_n8309_ ) -new_n8331_ = NAND ( new_n8308_, new_n3509_ ) -new_n8332_ = OR ( new_n8322_, new_n3503_ ) -new_n8333_ = NAND ( new_n8301_, new_n5756_ ) -new_n8334_ = NAND ( new_n3746_, new_n2443_ ) -new_n8335_ = NAND ( new_n3516_, new_n2397_ ) -new_n8336_ = NAND ( new_n3360_, new_n2528_ ) -new_n8337_ = NAND ( new_n3498_, NET_189 ) -new_n8338_ = AND ( new_n8337_, new_n8336_, new_n8335_, new_n8334_ ) -NET_9342 = NAND ( new_n8338_, new_n8333_, new_n8332_, new_n8331_ ) -new_n8340_ = NAND ( new_n8308_, new_n3540_ ) -new_n8341_ = OR ( new_n8322_, new_n3536_ ) -new_n8342_ = NAND ( new_n8301_, new_n3543_ ) -new_n8343_ = NAND ( new_n3514_, new_n2397_ ) -new_n8344_ = NAND ( new_n3525_, new_n2443_ ) -new_n8345_ = AND ( new_n8344_, new_n8343_ ) -new_n8346_ = NAND ( new_n8345_, new_n8342_, new_n8341_, new_n8340_ ) -new_n8347_ = NAND ( new_n8346_, new_n3553_ ) -new_n8348_ = NAND ( new_n3552_, NET_157 ) -NET_9350 = NAND ( new_n8348_, new_n8347_ ) -new_n8350_ = NAND ( new_n8346_, new_n3559_ ) -new_n8351_ = NAND ( new_n3558_, NET_125 ) -NET_9351 = NAND ( new_n8351_, new_n8350_ ) -new_n8353_ = NAND ( new_n2397_, new_n1250_ ) -new_n8354_ = NAND ( new_n3343_, new_n3500_, new_n3192_, new_n2533_ ) -new_n8355_ = AND ( new_n3343_, new_n3500_, new_n3179_ ) -new_n8356_ = NAND ( new_n8355_, new_n2397_ ) -new_n8357_ = AND ( new_n8356_, new_n8354_ ) -new_n8358_ = NAND ( new_n8357_, new_n8353_ ) -new_n8359_ = NOR ( new_n5914_, new_n7172_ ) -new_n8360_ = NOR ( new_n3192_, new_n3320_ ) -new_n8361_ = NAND ( new_n8360_, new_n8359_ ) -new_n8362_ = NAND ( new_n8359_, new_n8355_ ) -new_n8363_ = NAND ( new_n3194_, new_n3320_, new_n1250_ ) -new_n8364_ = NAND ( new_n8363_, new_n8301_, new_n3192_ ) -new_n8365_ = AND ( new_n8364_, new_n8362_ ) -new_n8366_ = NAND ( new_n8365_, new_n8361_ ) -new_n8367_ = XNOR ( new_n8366_, new_n8358_ ) -new_n8368_ = NOR ( new_n8307_, new_n8302_ ) -new_n8369_ = OR ( new_n8368_, new_n8300_ ) -new_n8370_ = NAND ( new_n8307_, new_n8302_ ) -new_n8371_ = NAND ( new_n8370_, new_n8369_ ) -new_n8372_ = XOR ( new_n8371_, new_n8367_ ) -new_n8373_ = NAND ( new_n8372_, new_n3509_ ) -new_n8374_ = NAND ( new_n2397_, new_n1307_ ) -new_n8375_ = NAND ( new_n3218_, new_n3217_ ) -new_n8376_ = AND ( new_n8359_, new_n8375_ ) -new_n8377_ = NOT ( new_n8301_ ) -new_n8378_ = NOR ( new_n8377_, new_n3216_ ) -new_n8379_ = OR ( new_n3189_, new_n8290_ ) -new_n8380_ = NAND ( new_n3198_, new_n3193_ ) -new_n8381_ = NAND ( new_n8380_, new_n2397_ ) -new_n8382_ = NAND ( new_n8381_, new_n8379_, new_n6368_ ) -new_n8383_ = NOR ( new_n8382_, new_n8378_, new_n8376_ ) -new_n8384_ = NAND ( new_n8383_, new_n8374_ ) -new_n8385_ = NAND ( new_n8359_, new_n8380_ ) -new_n8386_ = OR ( new_n8377_, new_n3189_ ) -new_n8387_ = OR ( new_n3216_, new_n8290_ ) -new_n8388_ = NAND ( new_n8375_, new_n2397_ ) -new_n8389_ = AND ( new_n8388_, new_n8387_, new_n6361_ ) -new_n8390_ = NAND ( new_n8389_, new_n8386_, new_n8385_ ) -new_n8391_ = XOR ( new_n8390_, new_n3241_ ) -new_n8392_ = NAND ( new_n8391_, new_n8384_ ) -new_n8393_ = OR ( new_n8391_, new_n8384_ ) -new_n8394_ = NAND ( new_n8393_, new_n8392_ ) -new_n8395_ = NAND ( new_n8321_, new_n8317_ ) -new_n8396_ = NAND ( new_n8395_, new_n8318_ ) -new_n8397_ = XOR ( new_n8396_, new_n8394_ ) -new_n8398_ = OR ( new_n8397_, new_n3503_ ) -new_n8399_ = NAND ( new_n8359_, new_n5756_ ) -new_n8400_ = OR ( new_n1298_, NET_245 ) -new_n8401_ = NAND ( new_n8400_, new_n1304_ ) -new_n8402_ = NAND ( new_n8401_, new_n1947_ ) -new_n8403_ = NAND ( new_n2533_, new_n1298_ ) -new_n8404_ = NAND ( new_n8403_, new_n8402_ ) -new_n8405_ = NAND ( new_n8404_, new_n1260_ ) -new_n8406_ = OR ( new_n8405_, new_n3498_ ) -new_n8407_ = NAND ( new_n3498_, NET_190 ) -new_n8408_ = NAND ( new_n3360_, new_n2392_ ) -new_n8409_ = AND ( new_n8408_, new_n8407_, new_n8406_ ) -NET_9359 = NAND ( new_n8409_, new_n8399_, new_n8398_, new_n8373_ ) -new_n8411_ = NAND ( new_n8372_, new_n3540_ ) -new_n8412_ = OR ( new_n8397_, new_n3536_ ) -new_n8413_ = NAND ( new_n8359_, new_n3543_ ) -new_n8414_ = NAND ( new_n8413_, new_n8412_, new_n8411_, new_n8405_ ) -new_n8415_ = NAND ( new_n8414_, new_n3553_ ) -new_n8416_ = NAND ( new_n3552_, NET_158 ) -NET_9371 = NAND ( new_n8416_, new_n8415_ ) -new_n8418_ = NAND ( new_n8414_, new_n3559_ ) -new_n8419_ = NAND ( new_n3558_, NET_126 ) -NET_9372 = NAND ( new_n8419_, new_n8418_ ) -new_n8421_ = NOT ( new_n3333_ ) -new_n8422_ = NOR ( new_n6160_, new_n7172_ ) -new_n8423_ = NAND ( new_n8422_, new_n8360_ ) -new_n8424_ = NAND ( new_n8423_, new_n8365_, new_n1251_ ) -new_n8425_ = NAND ( new_n1947_, new_n1250_ ) -new_n8426_ = NAND ( new_n8425_, new_n8357_ ) -new_n8427_ = XNOR ( new_n8426_, new_n8424_ ) -new_n8428_ = NOT ( new_n8371_ ) -new_n8429_ = NAND ( new_n8428_, new_n8366_ ) -new_n8430_ = NAND ( new_n8429_, new_n8358_ ) -new_n8431_ = OR ( new_n8428_, new_n8366_ ) -new_n8432_ = NAND ( new_n8431_, new_n8430_ ) -new_n8433_ = XOR ( new_n8432_, new_n8427_ ) -new_n8434_ = NAND ( new_n8433_, new_n8421_ ) -new_n8435_ = NAND ( new_n8401_, new_n1939_, new_n1260_ ) -new_n8436_ = NAND ( new_n8435_, new_n8434_ ) -new_n8437_ = NAND ( new_n8436_, new_n3505_ ) -new_n8438_ = NAND ( new_n8422_, new_n5756_ ) -new_n8439_ = NAND ( new_n3498_, NET_191 ) -NET_9395 = NAND ( new_n8439_, new_n8438_, new_n8437_ ) -new_n8441_ = NOT ( new_n3539_ ) -new_n8442_ = NAND ( new_n8433_, new_n8441_ ) -new_n8443_ = NAND ( new_n8422_, new_n3543_ ) -new_n8444_ = NAND ( new_n8443_, new_n8442_, new_n8435_ ) -new_n8445_ = NAND ( new_n8444_, new_n3553_ ) -new_n8446_ = NAND ( new_n3552_, NET_159 ) -NET_9397 = NAND ( new_n8446_, new_n8445_ ) -new_n8448_ = NAND ( new_n8444_, new_n3559_ ) -new_n8449_ = NAND ( new_n3558_, NET_127 ) -NET_9398 = NAND ( new_n8449_, new_n8448_ ) -new_n8451_ = OR ( new_n8432_, new_n8426_ ) -new_n8452_ = NAND ( new_n8451_, new_n8423_, new_n8365_, new_n1251_ ) -new_n8453_ = NAND ( new_n8432_, new_n8426_ ) -new_n8454_ = NAND ( new_n1939_, new_n1250_ ) -new_n8455_ = NAND ( new_n8454_, new_n8357_ ) -new_n8456_ = NOR ( new_n6207_, new_n7172_ ) -new_n8457_ = NAND ( new_n8456_, new_n8360_ ) -new_n8458_ = NAND ( new_n8457_, new_n8365_ ) -new_n8459_ = XNOR ( new_n8458_, new_n8455_ ) -new_n8460_ = NAND ( new_n8459_, new_n8453_, new_n8452_ ) -new_n8461_ = NOT ( new_n8459_ ) -new_n8462_ = NAND ( new_n8453_, new_n8424_ ) -new_n8463_ = NAND ( new_n8462_, new_n8461_, new_n8451_ ) -new_n8464_ = NAND ( new_n8463_, new_n8460_ ) -new_n8465_ = NAND ( new_n8464_, new_n8421_ ) -new_n8466_ = NAND ( new_n8465_, new_n8435_ ) -new_n8467_ = NAND ( new_n8466_, new_n3505_ ) -new_n8468_ = NAND ( new_n8456_, new_n5756_ ) -new_n8469_ = NAND ( new_n3498_, NET_192 ) -NET_9407 = NAND ( new_n8469_, new_n8468_, new_n8467_ ) -new_n8471_ = NAND ( new_n8464_, new_n8441_ ) -new_n8472_ = NAND ( new_n8456_, new_n3543_ ) -new_n8473_ = NAND ( new_n8472_, new_n8471_, new_n8435_ ) -new_n8474_ = NAND ( new_n8473_, new_n3553_ ) -new_n8475_ = NAND ( new_n3552_, NET_160 ) -NET_9408 = NAND ( new_n8475_, new_n8474_ ) -new_n8477_ = NAND ( new_n8473_, new_n3559_ ) -new_n8478_ = NAND ( new_n3558_, NET_128 ) -NET_9409 = NAND ( new_n8478_, new_n8477_ ) -new_n8480_ = NAND ( new_n3194_, new_n3320_, new_n1259_ ) -new_n8481_ = NAND ( new_n8480_, new_n3208_ ) -new_n8482_ = NOT ( new_n1947_ ) -new_n8483_ = NOR ( new_n8482_, new_n1939_ ) -new_n8484_ = NAND ( new_n8483_, new_n8481_ ) -new_n8485_ = NAND ( new_n1939_, new_n1307_ ) -new_n8486_ = NAND ( new_n8485_, new_n8383_ ) -new_n8487_ = OR ( new_n8390_, new_n1307_ ) -new_n8488_ = NAND ( new_n8487_, new_n3401_ ) -new_n8489_ = OR ( new_n8487_, new_n3401_ ) -new_n8490_ = NAND ( new_n1947_, new_n1307_ ) -new_n8491_ = NAND ( new_n8490_, new_n8489_, new_n8488_, new_n8383_ ) -new_n8492_ = NAND ( new_n8396_, new_n8393_ ) -new_n8493_ = NAND ( new_n8492_, new_n8392_ ) -new_n8494_ = NAND ( new_n8493_, new_n8491_ ) -new_n8495_ = NAND ( new_n8490_, new_n8383_ ) -new_n8496_ = NAND ( new_n8489_, new_n8488_ ) -new_n8497_ = NAND ( new_n8496_, new_n8495_ ) -new_n8498_ = NAND ( new_n8497_, new_n8494_ ) -new_n8499_ = XNOR ( new_n8498_, new_n8486_ ) -new_n8500_ = XOR ( new_n8499_, new_n8391_ ) -new_n8501_ = OR ( new_n8500_, new_n8484_ ) -new_n8502_ = NOT ( new_n8481_ ) -new_n8503_ = OR ( new_n8483_, new_n8502_ ) -new_n8504_ = NOR ( new_n3506_, new_n3186_ ) -new_n8505_ = NOT ( new_n8504_ ) -new_n8506_ = NOR ( new_n3348_, new_n3212_ ) -new_n8507_ = NOR ( new_n3210_, new_n1251_ ) -new_n8508_ = NOR ( new_n3330_, new_n1250_ ) -new_n8509_ = NOR ( new_n8508_, new_n8507_ ) -new_n8510_ = NOR ( new_n8509_, new_n8506_ ) -new_n8511_ = NAND ( new_n8510_, new_n8505_, new_n8503_ ) -new_n8512_ = NAND ( new_n8511_, new_n1939_ ) -new_n8513_ = NOR ( new_n3331_, new_n3186_ ) -new_n8514_ = NAND ( new_n1258_, new_n1251_ ) -new_n8515_ = NAND ( new_n8514_, new_n3357_ ) -new_n8516_ = NOR ( new_n8515_, new_n8513_ ) -new_n8517_ = NOT ( new_n8516_ ) -new_n8518_ = NAND ( new_n8517_, new_n8456_ ) -new_n8519_ = AND ( new_n8518_, new_n8512_, new_n8501_ ) -new_n8520_ = NAND ( new_n8513_, new_n8483_ ) -new_n8521_ = OR ( new_n8520_, new_n8500_ ) -new_n8522_ = NAND ( new_n8510_, new_n8502_ ) -new_n8523_ = NAND ( new_n8522_, new_n8456_ ) -new_n8524_ = NOR ( new_n8483_, new_n3331_, new_n3186_ ) -new_n8525_ = OR ( new_n8524_, new_n8515_ ) -new_n8526_ = NAND ( new_n8525_, new_n1939_ ) -new_n8527_ = NAND ( new_n8526_, new_n8523_, new_n8521_ ) -new_n8528_ = OR ( new_n8527_, new_n8519_ ) -new_n8529_ = NAND ( new_n8518_, new_n8512_, new_n8501_ ) -new_n8530_ = AND ( new_n8526_, new_n8523_, new_n8521_ ) -new_n8531_ = OR ( new_n8530_, new_n8529_ ) -new_n8532_ = NAND ( new_n8497_, new_n8491_ ) -new_n8533_ = XOR ( new_n8532_, new_n8493_ ) -new_n8534_ = OR ( new_n8533_, new_n8520_ ) -new_n8535_ = NAND ( new_n8522_, new_n8422_ ) -new_n8536_ = NAND ( new_n8525_, new_n1947_ ) -new_n8537_ = NAND ( new_n8536_, new_n8535_, new_n8534_ ) -new_n8538_ = OR ( new_n8533_, new_n8484_ ) -new_n8539_ = NAND ( new_n8511_, new_n1947_ ) -new_n8540_ = NAND ( new_n8517_, new_n8422_ ) -new_n8541_ = AND ( new_n8540_, new_n8539_, new_n8538_ ) -new_n8542_ = NAND ( new_n8541_, new_n8537_ ) -new_n8543_ = OR ( new_n8520_, new_n8397_ ) -new_n8544_ = NAND ( new_n8522_, new_n8359_ ) -new_n8545_ = NAND ( new_n8525_, new_n2397_ ) -new_n8546_ = NOR ( new_n8504_, new_n1289_ ) -new_n8547_ = NAND ( new_n8546_, new_n8545_, new_n8544_, new_n8543_ ) -new_n8548_ = OR ( new_n8484_, new_n8397_ ) -new_n8549_ = NAND ( new_n8517_, new_n8359_ ) -new_n8550_ = NAND ( new_n8511_, new_n2397_ ) -new_n8551_ = NAND ( new_n2533_, new_n1289_ ) -new_n8552_ = AND ( new_n8551_, new_n8550_, new_n8549_, new_n8548_ ) -new_n8553_ = NAND ( new_n8552_, new_n8547_ ) -new_n8554_ = OR ( new_n8552_, new_n8547_ ) -new_n8555_ = OR ( new_n8484_, new_n8322_ ) -new_n8556_ = NAND ( new_n8517_, new_n8301_ ) -new_n8557_ = NAND ( new_n8511_, new_n2533_ ) -new_n8558_ = NAND ( new_n2443_, new_n1289_ ) -new_n8559_ = NAND ( new_n8558_, new_n8557_, new_n8556_, new_n8555_ ) -new_n8560_ = OR ( new_n8520_, new_n8322_ ) -new_n8561_ = NAND ( new_n8522_, new_n8301_ ) -new_n8562_ = NAND ( new_n8525_, new_n2533_ ) -new_n8563_ = AND ( new_n8562_, new_n8561_, new_n8560_, new_n8546_ ) -new_n8564_ = NAND ( new_n8563_, new_n8559_ ) -new_n8565_ = OR ( new_n8563_, new_n8559_ ) -new_n8566_ = OR ( new_n8520_, new_n8268_ ) -new_n8567_ = NAND ( new_n8522_, new_n8247_ ) -new_n8568_ = NAND ( new_n8525_, new_n2443_ ) -new_n8569_ = NAND ( new_n8568_, new_n8567_, new_n8566_, new_n8546_ ) -new_n8570_ = OR ( new_n8484_, new_n8268_ ) -new_n8571_ = NAND ( new_n8517_, new_n8247_ ) -new_n8572_ = NAND ( new_n8511_, new_n2443_ ) -new_n8573_ = NAND ( new_n2453_, new_n1289_ ) -new_n8574_ = NAND ( new_n8573_, new_n8572_, new_n8571_, new_n8570_ ) -new_n8575_ = NOT ( new_n8574_ ) -new_n8576_ = NAND ( new_n8575_, new_n8569_ ) -new_n8577_ = OR ( new_n8575_, new_n8569_ ) -new_n8578_ = OR ( new_n8484_, new_n8214_ ) -new_n8579_ = NAND ( new_n8517_, new_n8193_ ) -new_n8580_ = NAND ( new_n8511_, new_n2453_ ) -new_n8581_ = NAND ( new_n2409_, new_n1289_ ) -new_n8582_ = NAND ( new_n8581_, new_n8580_, new_n8579_, new_n8578_ ) -new_n8583_ = OR ( new_n8520_, new_n8214_ ) -new_n8584_ = NAND ( new_n8522_, new_n8193_ ) -new_n8585_ = NAND ( new_n8525_, new_n2453_ ) -new_n8586_ = NAND ( new_n8585_, new_n8584_, new_n8583_, new_n8546_ ) -new_n8587_ = NOT ( new_n8586_ ) -new_n8588_ = NAND ( new_n8587_, new_n8582_ ) -new_n8589_ = OR ( new_n8587_, new_n8582_ ) -new_n8590_ = OR ( new_n8520_, new_n8160_ ) -new_n8591_ = NAND ( new_n8522_, new_n8139_ ) -new_n8592_ = NAND ( new_n8525_, new_n2409_ ) -new_n8593_ = NAND ( new_n8592_, new_n8591_, new_n8590_, new_n8546_ ) -new_n8594_ = OR ( new_n8484_, new_n8160_ ) -new_n8595_ = NAND ( new_n8517_, new_n8139_ ) -new_n8596_ = NAND ( new_n8511_, new_n2409_ ) -new_n8597_ = NAND ( new_n2314_, new_n1289_ ) -new_n8598_ = NAND ( new_n8597_, new_n8596_, new_n8595_, new_n8594_ ) -new_n8599_ = NOT ( new_n8598_ ) -new_n8600_ = NAND ( new_n8599_, new_n8593_ ) -new_n8601_ = OR ( new_n8599_, new_n8593_ ) -new_n8602_ = OR ( new_n8484_, new_n8106_ ) -new_n8603_ = NAND ( new_n8517_, new_n8085_ ) -new_n8604_ = NAND ( new_n8511_, new_n2314_ ) -new_n8605_ = NAND ( new_n2325_, new_n1289_ ) -new_n8606_ = NAND ( new_n8605_, new_n8604_, new_n8603_, new_n8602_ ) -new_n8607_ = OR ( new_n8520_, new_n8106_ ) -new_n8608_ = NAND ( new_n8522_, new_n8085_ ) -new_n8609_ = NAND ( new_n8525_, new_n2314_ ) -new_n8610_ = NAND ( new_n8609_, new_n8608_, new_n8607_, new_n8546_ ) -new_n8611_ = NOT ( new_n8610_ ) -new_n8612_ = NAND ( new_n8611_, new_n8606_ ) -new_n8613_ = OR ( new_n8611_, new_n8606_ ) -new_n8614_ = OR ( new_n8520_, new_n7356_ ) -new_n8615_ = NAND ( new_n8522_, new_n7335_ ) -new_n8616_ = NAND ( new_n8525_, new_n2325_ ) -new_n8617_ = NAND ( new_n8616_, new_n8615_, new_n8614_, new_n8546_ ) -new_n8618_ = OR ( new_n8484_, new_n7356_ ) -new_n8619_ = NAND ( new_n8517_, new_n7335_ ) -new_n8620_ = NAND ( new_n8511_, new_n2325_ ) -new_n8621_ = NAND ( new_n1996_, new_n1289_ ) -new_n8622_ = NAND ( new_n8621_, new_n8620_, new_n8619_, new_n8618_ ) -new_n8623_ = NOT ( new_n8622_ ) -new_n8624_ = NAND ( new_n8623_, new_n8617_ ) -new_n8625_ = OR ( new_n8623_, new_n8617_ ) -new_n8626_ = OR ( new_n8484_, new_n7302_ ) -new_n8627_ = NAND ( new_n8517_, new_n7281_ ) -new_n8628_ = NAND ( new_n8511_, new_n1996_ ) -new_n8629_ = NAND ( new_n2007_, new_n1289_ ) -new_n8630_ = NAND ( new_n8629_, new_n8628_, new_n8627_, new_n8626_ ) -new_n8631_ = OR ( new_n8520_, new_n7302_ ) -new_n8632_ = NAND ( new_n8522_, new_n7281_ ) -new_n8633_ = NAND ( new_n8525_, new_n1996_ ) -new_n8634_ = NAND ( new_n8633_, new_n8632_, new_n8631_, new_n8546_ ) -new_n8635_ = NOT ( new_n8634_ ) -new_n8636_ = NAND ( new_n8635_, new_n8630_ ) -new_n8637_ = OR ( new_n8635_, new_n8630_ ) -new_n8638_ = OR ( new_n8520_, new_n7248_ ) -new_n8639_ = NAND ( new_n8522_, new_n7227_ ) -new_n8640_ = NAND ( new_n8525_, new_n2007_ ) -new_n8641_ = NAND ( new_n8640_, new_n8639_, new_n8638_, new_n8546_ ) -new_n8642_ = OR ( new_n8484_, new_n7248_ ) -new_n8643_ = NAND ( new_n8517_, new_n7227_ ) -new_n8644_ = NAND ( new_n8511_, new_n2007_ ) -new_n8645_ = NAND ( new_n2018_, new_n1289_ ) -new_n8646_ = NAND ( new_n8645_, new_n8644_, new_n8643_, new_n8642_ ) -new_n8647_ = NOT ( new_n8646_ ) -new_n8648_ = NAND ( new_n8647_, new_n8641_ ) -new_n8649_ = OR ( new_n8647_, new_n8641_ ) -new_n8650_ = OR ( new_n8484_, new_n7194_ ) -new_n8651_ = NAND ( new_n8517_, new_n7173_ ) -new_n8652_ = NAND ( new_n8511_, new_n2018_ ) -new_n8653_ = NAND ( new_n2033_, new_n1289_ ) -new_n8654_ = NAND ( new_n8653_, new_n8652_, new_n8651_, new_n8650_ ) -new_n8655_ = OR ( new_n8520_, new_n7194_ ) -new_n8656_ = NAND ( new_n8522_, new_n7173_ ) -new_n8657_ = NAND ( new_n8525_, new_n2018_ ) -new_n8658_ = NAND ( new_n8657_, new_n8656_, new_n8655_, new_n8546_ ) -new_n8659_ = NOT ( new_n8658_ ) -new_n8660_ = NAND ( new_n8659_, new_n8654_ ) -new_n8661_ = OR ( new_n8659_, new_n8654_ ) -new_n8662_ = OR ( new_n8520_, new_n6375_ ) -new_n8663_ = NOT ( new_n8522_ ) -new_n8664_ = OR ( new_n8663_, new_n6358_ ) -new_n8665_ = NAND ( new_n8525_, new_n2033_ ) -new_n8666_ = NAND ( new_n8665_, new_n8664_, new_n8662_, new_n8546_ ) -new_n8667_ = OR ( new_n8484_, new_n6375_ ) -new_n8668_ = OR ( new_n8516_, new_n6358_ ) -new_n8669_ = NAND ( new_n8511_, new_n2033_ ) -new_n8670_ = NAND ( new_n2046_, new_n1289_ ) -new_n8671_ = NAND ( new_n8670_, new_n8669_, new_n8668_, new_n8667_ ) -new_n8672_ = NOT ( new_n8671_ ) -new_n8673_ = NAND ( new_n8672_, new_n8666_ ) -new_n8674_ = OR ( new_n8672_, new_n8666_ ) -new_n8675_ = OR ( new_n8484_, new_n6232_ ) -new_n8676_ = OR ( new_n8516_, new_n6216_ ) -new_n8677_ = NAND ( new_n8511_, new_n2046_ ) -new_n8678_ = NAND ( new_n2059_, new_n1289_ ) -new_n8679_ = NAND ( new_n8678_, new_n8677_, new_n8676_, new_n8675_ ) -new_n8680_ = OR ( new_n8520_, new_n6232_ ) -new_n8681_ = OR ( new_n8663_, new_n6216_ ) -new_n8682_ = NAND ( new_n8525_, new_n2046_ ) -new_n8683_ = NAND ( new_n8682_, new_n8681_, new_n8680_, new_n8546_ ) -new_n8684_ = NOT ( new_n8683_ ) -new_n8685_ = NAND ( new_n8684_, new_n8679_ ) -new_n8686_ = OR ( new_n8684_, new_n8679_ ) -new_n8687_ = OR ( new_n8520_, new_n6066_ ) -new_n8688_ = OR ( new_n8663_, new_n6050_ ) -new_n8689_ = NAND ( new_n8525_, new_n2059_ ) -new_n8690_ = NAND ( new_n8689_, new_n8688_, new_n8687_, new_n8546_ ) -new_n8691_ = OR ( new_n8484_, new_n6066_ ) -new_n8692_ = OR ( new_n8516_, new_n6050_ ) -new_n8693_ = NAND ( new_n8511_, new_n2059_ ) -new_n8694_ = NAND ( new_n2072_, new_n1289_ ) -new_n8695_ = NAND ( new_n8694_, new_n8693_, new_n8692_, new_n8691_ ) -new_n8696_ = NOT ( new_n8695_ ) -new_n8697_ = NAND ( new_n8696_, new_n8690_ ) -new_n8698_ = OR ( new_n8696_, new_n8690_ ) -new_n8699_ = OR ( new_n8484_, new_n5940_ ) -new_n8700_ = OR ( new_n8516_, new_n5924_ ) -new_n8701_ = NAND ( new_n8511_, new_n2072_ ) -new_n8702_ = NAND ( new_n2085_, new_n1289_ ) -new_n8703_ = NAND ( new_n8702_, new_n8701_, new_n8700_, new_n8699_ ) -new_n8704_ = OR ( new_n8520_, new_n5940_ ) -new_n8705_ = OR ( new_n8663_, new_n5924_ ) -new_n8706_ = NAND ( new_n8525_, new_n2072_ ) -new_n8707_ = NAND ( new_n8706_, new_n8705_, new_n8704_, new_n8546_ ) -new_n8708_ = NOT ( new_n8707_ ) -new_n8709_ = NAND ( new_n8708_, new_n8703_ ) -new_n8710_ = OR ( new_n8708_, new_n8703_ ) -new_n8711_ = OR ( new_n8520_, new_n5785_ ) -new_n8712_ = NAND ( new_n8522_, new_n5769_ ) -new_n8713_ = NAND ( new_n8525_, new_n2085_ ) -new_n8714_ = NAND ( new_n8713_, new_n8712_, new_n8711_, new_n8546_ ) -new_n8715_ = OR ( new_n8484_, new_n5785_ ) -new_n8716_ = NAND ( new_n8517_, new_n5769_ ) -new_n8717_ = NAND ( new_n8511_, new_n2085_ ) -new_n8718_ = NAND ( new_n2098_, new_n1289_ ) -new_n8719_ = NAND ( new_n8718_, new_n8717_, new_n8716_, new_n8715_ ) -new_n8720_ = NOT ( new_n8719_ ) -new_n8721_ = NAND ( new_n8720_, new_n8714_ ) -new_n8722_ = OR ( new_n8720_, new_n8714_ ) -new_n8723_ = OR ( new_n8484_, new_n5638_ ) -new_n8724_ = NAND ( new_n8517_, new_n5620_ ) -new_n8725_ = NAND ( new_n8511_, new_n2098_ ) -new_n8726_ = NAND ( new_n2111_, new_n1289_ ) -new_n8727_ = NAND ( new_n8726_, new_n8725_, new_n8724_, new_n8723_ ) -new_n8728_ = OR ( new_n8520_, new_n5638_ ) -new_n8729_ = NAND ( new_n8522_, new_n5620_ ) -new_n8730_ = NAND ( new_n8525_, new_n2098_ ) -new_n8731_ = NAND ( new_n8730_, new_n8729_, new_n8728_, new_n8546_ ) -new_n8732_ = NOT ( new_n8731_ ) -new_n8733_ = NAND ( new_n8732_, new_n8727_ ) -new_n8734_ = OR ( new_n8732_, new_n8727_ ) -new_n8735_ = OR ( new_n8520_, new_n5444_ ) -new_n8736_ = OR ( new_n8663_, new_n5428_ ) -new_n8737_ = NAND ( new_n8525_, new_n2111_ ) -new_n8738_ = NAND ( new_n8737_, new_n8736_, new_n8735_, new_n8546_ ) -new_n8739_ = OR ( new_n8484_, new_n5444_ ) -new_n8740_ = OR ( new_n8516_, new_n5428_ ) -new_n8741_ = NAND ( new_n8511_, new_n2111_ ) -new_n8742_ = NAND ( new_n2124_, new_n1289_ ) -new_n8743_ = NAND ( new_n8742_, new_n8741_, new_n8740_, new_n8739_ ) -new_n8744_ = NOT ( new_n8743_ ) -new_n8745_ = NAND ( new_n8744_, new_n8738_ ) -new_n8746_ = OR ( new_n8744_, new_n8738_ ) -new_n8747_ = OR ( new_n8484_, new_n5317_ ) -new_n8748_ = OR ( new_n8516_, new_n5301_ ) -new_n8749_ = NAND ( new_n8511_, new_n2124_ ) -new_n8750_ = NAND ( new_n2137_, new_n1289_ ) -new_n8751_ = NAND ( new_n8750_, new_n8749_, new_n8748_, new_n8747_ ) -new_n8752_ = OR ( new_n8520_, new_n5317_ ) -new_n8753_ = OR ( new_n8663_, new_n5301_ ) -new_n8754_ = NAND ( new_n8525_, new_n2124_ ) -new_n8755_ = NAND ( new_n8754_, new_n8753_, new_n8752_, new_n8546_ ) -new_n8756_ = NOT ( new_n8755_ ) -new_n8757_ = NAND ( new_n8756_, new_n8751_ ) -new_n8758_ = OR ( new_n8756_, new_n8751_ ) -new_n8759_ = OR ( new_n8520_, new_n5154_ ) -new_n8760_ = NAND ( new_n8522_, new_n5138_ ) -new_n8761_ = NAND ( new_n8525_, new_n2137_ ) -new_n8762_ = NAND ( new_n8761_, new_n8760_, new_n8759_, new_n8546_ ) -new_n8763_ = OR ( new_n8484_, new_n5154_ ) -new_n8764_ = NAND ( new_n8517_, new_n5138_ ) -new_n8765_ = NAND ( new_n8511_, new_n2137_ ) -new_n8766_ = NAND ( new_n2150_, new_n1289_ ) -new_n8767_ = NAND ( new_n8766_, new_n8765_, new_n8764_, new_n8763_ ) -new_n8768_ = NOT ( new_n8767_ ) -new_n8769_ = NAND ( new_n8768_, new_n8762_ ) -new_n8770_ = OR ( new_n8768_, new_n8762_ ) -new_n8771_ = OR ( new_n8484_, new_n5020_ ) -new_n8772_ = NAND ( new_n8517_, new_n5001_ ) -new_n8773_ = NAND ( new_n8511_, new_n2150_ ) -new_n8774_ = NAND ( new_n2163_, new_n1289_ ) -new_n8775_ = NAND ( new_n8774_, new_n8773_, new_n8772_, new_n8771_ ) -new_n8776_ = OR ( new_n8520_, new_n5020_ ) -new_n8777_ = NAND ( new_n8522_, new_n5001_ ) -new_n8778_ = NAND ( new_n8525_, new_n2150_ ) -new_n8779_ = NAND ( new_n8778_, new_n8777_, new_n8776_, new_n8546_ ) -new_n8780_ = NOT ( new_n8779_ ) -new_n8781_ = NAND ( new_n8780_, new_n8775_ ) -new_n8782_ = OR ( new_n8780_, new_n8775_ ) -new_n8783_ = OR ( new_n8520_, new_n4828_ ) -new_n8784_ = OR ( new_n8663_, new_n4812_ ) -new_n8785_ = NAND ( new_n8525_, new_n2163_ ) -new_n8786_ = NAND ( new_n8785_, new_n8784_, new_n8783_, new_n8546_ ) -new_n8787_ = OR ( new_n8484_, new_n4828_ ) -new_n8788_ = OR ( new_n8516_, new_n4812_ ) -new_n8789_ = NAND ( new_n8511_, new_n2163_ ) -new_n8790_ = NAND ( new_n2176_, new_n1289_ ) -new_n8791_ = NAND ( new_n8790_, new_n8789_, new_n8788_, new_n8787_ ) -new_n8792_ = NOT ( new_n8791_ ) -new_n8793_ = NAND ( new_n8792_, new_n8786_ ) -new_n8794_ = OR ( new_n8792_, new_n8786_ ) -new_n8795_ = OR ( new_n8484_, new_n4680_ ) -new_n8796_ = NAND ( new_n8511_, new_n2176_ ) -new_n8797_ = OR ( new_n8516_, new_n4665_ ) -new_n8798_ = NAND ( new_n2189_, new_n1289_ ) -new_n8799_ = NAND ( new_n8798_, new_n8797_, new_n8796_, new_n8795_ ) -new_n8800_ = OR ( new_n8520_, new_n4680_ ) -new_n8801_ = NAND ( new_n8525_, new_n2176_ ) -new_n8802_ = OR ( new_n8663_, new_n4665_ ) -new_n8803_ = NAND ( new_n8802_, new_n8801_, new_n8800_, new_n8546_ ) -new_n8804_ = NOT ( new_n8803_ ) -new_n8805_ = NAND ( new_n8804_, new_n8799_ ) -new_n8806_ = OR ( new_n8804_, new_n8799_ ) -new_n8807_ = OR ( new_n8520_, new_n4539_ ) -new_n8808_ = NAND ( new_n8525_, new_n2189_ ) -new_n8809_ = OR ( new_n8663_, new_n4524_ ) -new_n8810_ = NAND ( new_n8809_, new_n8808_, new_n8807_, new_n8546_ ) -new_n8811_ = OR ( new_n8484_, new_n4539_ ) -new_n8812_ = NAND ( new_n8511_, new_n2189_ ) -new_n8813_ = OR ( new_n8516_, new_n4524_ ) -new_n8814_ = NAND ( new_n2202_, new_n1289_ ) -new_n8815_ = NAND ( new_n8814_, new_n8813_, new_n8812_, new_n8811_ ) -new_n8816_ = NOT ( new_n8815_ ) -new_n8817_ = NAND ( new_n8816_, new_n8810_ ) -new_n8818_ = OR ( new_n8816_, new_n8810_ ) -new_n8819_ = OR ( new_n8484_, new_n4387_ ) -new_n8820_ = NAND ( new_n8511_, new_n2202_ ) -new_n8821_ = OR ( new_n8516_, new_n4370_ ) -new_n8822_ = NAND ( new_n2215_, new_n1289_ ) -new_n8823_ = NAND ( new_n8822_, new_n8821_, new_n8820_, new_n8819_ ) -new_n8824_ = OR ( new_n8520_, new_n4387_ ) -new_n8825_ = NAND ( new_n8525_, new_n2202_ ) -new_n8826_ = OR ( new_n8663_, new_n4370_ ) -new_n8827_ = NAND ( new_n8826_, new_n8825_, new_n8824_, new_n8546_ ) -new_n8828_ = NOT ( new_n8827_ ) -new_n8829_ = NAND ( new_n8828_, new_n8823_ ) -new_n8830_ = OR ( new_n8828_, new_n8823_ ) -new_n8831_ = OR ( new_n8520_, new_n4187_ ) -new_n8832_ = NAND ( new_n8525_, new_n2215_ ) -new_n8833_ = OR ( new_n8663_, new_n4172_ ) -new_n8834_ = NAND ( new_n8833_, new_n8832_, new_n8831_, new_n8546_ ) -new_n8835_ = OR ( new_n8484_, new_n4187_ ) -new_n8836_ = NAND ( new_n8511_, new_n2215_ ) -new_n8837_ = OR ( new_n8516_, new_n4172_ ) -new_n8838_ = NAND ( new_n2227_, new_n1289_ ) -new_n8839_ = NAND ( new_n8838_, new_n8837_, new_n8836_, new_n8835_ ) -new_n8840_ = NOT ( new_n8839_ ) -new_n8841_ = NAND ( new_n8840_, new_n8834_ ) -new_n8842_ = OR ( new_n8840_, new_n8834_ ) -new_n8843_ = OR ( new_n8484_, new_n4007_ ) -new_n8844_ = NAND ( new_n8511_, new_n2227_ ) -new_n8845_ = OR ( new_n8516_, new_n3992_ ) -new_n8846_ = NAND ( new_n2237_, new_n1289_ ) -new_n8847_ = NAND ( new_n8846_, new_n8845_, new_n8844_, new_n8843_ ) -new_n8848_ = OR ( new_n8520_, new_n4007_ ) -new_n8849_ = NAND ( new_n8525_, new_n2227_ ) -new_n8850_ = OR ( new_n8663_, new_n3992_ ) -new_n8851_ = NAND ( new_n8850_, new_n8849_, new_n8848_, new_n8546_ ) -new_n8852_ = NOT ( new_n8851_ ) -new_n8853_ = NAND ( new_n8852_, new_n8847_ ) -new_n8854_ = OR ( new_n8852_, new_n8847_ ) -new_n8855_ = OR ( new_n8520_, new_n3803_ ) -new_n8856_ = NAND ( new_n8525_, new_n2237_ ) -new_n8857_ = OR ( new_n8663_, new_n3788_ ) -new_n8858_ = NAND ( new_n8857_, new_n8856_, new_n8855_, new_n8546_ ) -new_n8859_ = OR ( new_n8484_, new_n3803_ ) -new_n8860_ = NAND ( new_n8511_, new_n2237_ ) -new_n8861_ = OR ( new_n8516_, new_n3788_ ) -new_n8862_ = NAND ( new_n2248_, new_n1289_ ) -new_n8863_ = NAND ( new_n8862_, new_n8861_, new_n8860_, new_n8859_ ) -new_n8864_ = NOT ( new_n8863_ ) -new_n8865_ = NAND ( new_n8864_, new_n8858_ ) -new_n8866_ = OR ( new_n8484_, new_n3596_ ) -new_n8867_ = NAND ( new_n8511_, new_n2248_ ) -new_n8868_ = NAND ( new_n8517_, new_n3577_ ) -new_n8869_ = NAND ( new_n2259_, new_n1289_ ) -new_n8870_ = NAND ( new_n8869_, new_n8868_, new_n8867_, new_n8866_ ) -new_n8871_ = NOT ( new_n8870_ ) -new_n8872_ = OR ( new_n8520_, new_n3596_ ) -new_n8873_ = NAND ( new_n8525_, new_n2248_ ) -new_n8874_ = NAND ( new_n8522_, new_n3577_ ) -new_n8875_ = NAND ( new_n8874_, new_n8873_, new_n8872_, new_n8546_ ) -new_n8876_ = NAND ( new_n8875_, new_n8871_ ) -new_n8877_ = OR ( new_n8520_, new_n3265_ ) -new_n8878_ = NAND ( new_n8525_, new_n2259_ ) -new_n8879_ = OR ( new_n8663_, new_n3252_ ) -new_n8880_ = NAND ( new_n8879_, new_n8878_, new_n8877_, new_n8546_ ) -new_n8881_ = OR ( new_n8484_, new_n3265_ ) -new_n8882_ = NAND ( new_n8511_, new_n2259_ ) -new_n8883_ = OR ( new_n8516_, new_n3252_ ) -new_n8884_ = NAND ( new_n2270_, new_n1289_ ) -new_n8885_ = NAND ( new_n8884_, new_n8883_, new_n8882_, new_n8881_ ) -new_n8886_ = NOT ( new_n8885_ ) -new_n8887_ = NAND ( new_n8886_, new_n8880_ ) -new_n8888_ = OR ( new_n8484_, new_n3402_ ) -new_n8889_ = OR ( new_n8516_, new_n3207_ ) -new_n8890_ = NAND ( new_n8511_, new_n2270_ ) -new_n8891_ = AND ( new_n8890_, new_n8889_, new_n8888_ ) -new_n8892_ = OR ( new_n3194_, new_n1251_ ) -new_n8893_ = NAND ( new_n8892_, new_n1307_ ) -new_n8894_ = OR ( new_n8893_, new_n8513_, new_n8508_, new_n3328_ ) -new_n8895_ = NAND ( new_n8894_, new_n8891_ ) -new_n8896_ = OR ( new_n8520_, new_n3402_ ) -new_n8897_ = NAND ( new_n8525_, new_n2270_ ) -new_n8898_ = NAND ( new_n8522_, new_n3414_ ) -new_n8899_ = AND ( new_n8898_, new_n8546_ ) -new_n8900_ = NAND ( new_n8899_, new_n8897_, new_n8896_, new_n8895_ ) -new_n8901_ = OR ( new_n8894_, new_n8891_ ) -new_n8902_ = OR ( new_n8886_, new_n8880_ ) -new_n8903_ = NAND ( new_n8902_, new_n8901_, new_n8900_ ) -new_n8904_ = NAND ( new_n8903_, new_n8887_, new_n8876_ ) -new_n8905_ = OR ( new_n8875_, new_n8871_ ) -new_n8906_ = OR ( new_n8864_, new_n8858_ ) -new_n8907_ = NAND ( new_n8906_, new_n8905_, new_n8904_ ) -new_n8908_ = NAND ( new_n8907_, new_n8865_, new_n8854_ ) -new_n8909_ = NAND ( new_n8908_, new_n8853_, new_n8842_ ) -new_n8910_ = NAND ( new_n8909_, new_n8841_, new_n8830_ ) -new_n8911_ = NAND ( new_n8910_, new_n8829_, new_n8818_ ) -new_n8912_ = NAND ( new_n8911_, new_n8817_, new_n8806_ ) -new_n8913_ = NAND ( new_n8912_, new_n8805_, new_n8794_ ) -new_n8914_ = NAND ( new_n8913_, new_n8793_, new_n8782_ ) -new_n8915_ = NAND ( new_n8914_, new_n8781_, new_n8770_ ) -new_n8916_ = NAND ( new_n8915_, new_n8769_, new_n8758_ ) -new_n8917_ = NAND ( new_n8916_, new_n8757_, new_n8746_ ) -new_n8918_ = NAND ( new_n8917_, new_n8745_, new_n8734_ ) -new_n8919_ = NAND ( new_n8918_, new_n8733_, new_n8722_ ) -new_n8920_ = NAND ( new_n8919_, new_n8721_, new_n8710_ ) -new_n8921_ = NAND ( new_n8920_, new_n8709_, new_n8698_ ) -new_n8922_ = NAND ( new_n8921_, new_n8697_, new_n8686_ ) -new_n8923_ = NAND ( new_n8922_, new_n8685_, new_n8674_ ) -new_n8924_ = NAND ( new_n8923_, new_n8673_, new_n8661_ ) -new_n8925_ = NAND ( new_n8924_, new_n8660_, new_n8649_ ) -new_n8926_ = NAND ( new_n8925_, new_n8648_, new_n8637_ ) -new_n8927_ = NAND ( new_n8926_, new_n8636_, new_n8625_ ) -new_n8928_ = NAND ( new_n8927_, new_n8624_, new_n8613_ ) -new_n8929_ = NAND ( new_n8928_, new_n8612_, new_n8601_ ) -new_n8930_ = NAND ( new_n8929_, new_n8600_, new_n8589_ ) -new_n8931_ = NAND ( new_n8930_, new_n8588_, new_n8577_ ) -new_n8932_ = NAND ( new_n8931_, new_n8576_, new_n8565_ ) -new_n8933_ = NAND ( new_n8932_, new_n8564_, new_n8554_ ) -new_n8934_ = NAND ( new_n8933_, new_n8553_, new_n8542_ ) -new_n8935_ = OR ( new_n8541_, new_n8537_ ) -new_n8936_ = NAND ( new_n8935_, new_n8934_, new_n8531_, new_n8528_ ) -new_n8937_ = NAND ( new_n8527_, new_n8519_, new_n3350_ ) -new_n8938_ = NAND ( new_n8530_, new_n8529_, new_n3349_ ) -new_n8939_ = NAND ( new_n8938_, new_n8937_, new_n8936_ ) -new_n8940_ = NAND ( new_n8939_, new_n1250_ ) -new_n8941_ = OR ( new_n8939_, new_n1250_ ) -new_n8942_ = NAND ( new_n8941_, new_n8940_, new_n3186_ ) -new_n8943_ = NAND ( new_n8422_, new_n8482_ ) -new_n8944_ = OR ( new_n8422_, new_n8482_ ) -new_n8945_ = NOT ( new_n8359_ ) -new_n8946_ = NOR ( new_n8945_, new_n2397_ ) -new_n8947_ = AND ( new_n8945_, new_n2397_ ) -new_n8948_ = XOR ( new_n8301_, new_n2533_ ) -new_n8949_ = NAND ( new_n8247_, new_n8236_ ) -new_n8950_ = OR ( new_n8247_, new_n8236_ ) -new_n8951_ = NAND ( new_n8193_, new_n8182_ ) -new_n8952_ = NOR ( new_n8193_, new_n8182_ ) -new_n8953_ = NAND ( new_n8139_, new_n8128_ ) -new_n8954_ = OR ( new_n8139_, new_n8128_ ) -new_n8955_ = NAND ( new_n8085_, new_n7378_ ) -new_n8956_ = NOR ( new_n8085_, new_n7378_ ) -new_n8957_ = NAND ( new_n7335_, new_n7324_ ) -new_n8958_ = OR ( new_n7335_, new_n7324_ ) -new_n8959_ = NAND ( new_n7281_, new_n7270_ ) -new_n8960_ = OR ( new_n7281_, new_n7270_ ) -new_n8961_ = NAND ( new_n7227_, new_n7216_ ) -new_n8962_ = OR ( new_n7227_, new_n7216_ ) -new_n8963_ = NOR ( new_n7141_, new_n7121_ ) -new_n8964_ = OR ( new_n6358_, new_n2033_ ) -new_n8965_ = NAND ( new_n6216_, new_n2046_ ) -new_n8966_ = OR ( new_n6216_, new_n2046_ ) -new_n8967_ = NOR ( new_n7062_, new_n7042_ ) -new_n8968_ = NOR ( new_n6050_, new_n2059_ ) -new_n8969_ = OR ( new_n5769_, new_n6734_ ) -new_n8970_ = NAND ( new_n5769_, new_n6734_ ) -new_n8971_ = OR ( new_n5620_, new_n6589_ ) -new_n8972_ = NAND ( new_n5620_, new_n6589_ ) -new_n8973_ = NAND ( new_n5428_, new_n2111_ ) -new_n8974_ = OR ( new_n5428_, new_n2111_ ) -new_n8975_ = NOR ( new_n5138_, new_n5881_ ) -new_n8976_ = NAND ( new_n5138_, new_n5881_ ) -new_n8977_ = OR ( new_n5001_, new_n5572_ ) -new_n8978_ = NAND ( new_n5001_, new_n5572_ ) -new_n8979_ = XNOR ( new_n4172_, new_n2215_ ) -new_n8980_ = XNOR ( new_n4370_, new_n2202_ ) -new_n8981_ = XOR ( new_n3788_, new_n2237_ ) -new_n8982_ = XOR ( new_n3992_, new_n2227_ ) -new_n8983_ = XOR ( new_n3252_, new_n2259_ ) -new_n8984_ = XOR ( new_n3578_, new_n2248_ ) -new_n8985_ = NAND ( new_n8984_, new_n8983_, new_n8982_, new_n8981_ ) -new_n8986_ = OR ( new_n8985_, new_n8980_, new_n8979_ ) -new_n8987_ = NOR ( new_n5183_, new_n5171_ ) -new_n8988_ = OR ( new_n4665_, new_n2176_ ) -new_n8989_ = NAND ( new_n4524_, new_n2189_ ) -new_n8990_ = OR ( new_n4524_, new_n2189_ ) -new_n8991_ = XOR ( new_n3207_, new_n2270_ ) -new_n8992_ = NAND ( new_n8991_, new_n8990_, new_n8989_, new_n8988_ ) -new_n8993_ = XNOR ( new_n4812_, new_n2163_ ) -new_n8994_ = NOR ( new_n8993_, new_n8992_, new_n8987_, new_n8986_ ) -new_n8995_ = NAND ( new_n8994_, new_n8978_, new_n8977_, new_n8976_ ) -new_n8996_ = XNOR ( new_n5301_, new_n2124_ ) -new_n8997_ = NOR ( new_n8996_, new_n8995_, new_n8975_ ) -new_n8998_ = AND ( new_n8997_, new_n8974_, new_n8973_, new_n8972_ ) -new_n8999_ = NAND ( new_n8998_, new_n8971_, new_n8970_, new_n8969_ ) -new_n9000_ = XNOR ( new_n5924_, new_n2072_ ) -new_n9001_ = NOR ( new_n9000_, new_n8999_, new_n8968_, new_n8967_ ) -new_n9002_ = NAND ( new_n9001_, new_n8966_, new_n8965_, new_n8964_ ) -new_n9003_ = XOR ( new_n7173_, new_n2018_ ) -new_n9004_ = NOR ( new_n9003_, new_n9002_, new_n8963_ ) -new_n9005_ = AND ( new_n9004_, new_n8962_, new_n8961_, new_n8960_ ) -new_n9006_ = NAND ( new_n9005_, new_n8959_, new_n8958_, new_n8957_ ) -new_n9007_ = NOR ( new_n9006_, new_n8956_ ) -new_n9008_ = NAND ( new_n9007_, new_n8955_, new_n8954_, new_n8953_ ) -new_n9009_ = NOR ( new_n9008_, new_n8952_ ) -new_n9010_ = NAND ( new_n9009_, new_n8951_, new_n8950_, new_n8949_ ) -new_n9011_ = NOR ( new_n9010_, new_n8948_, new_n8947_, new_n8946_ ) -new_n9012_ = XNOR ( new_n8456_, new_n1939_ ) -new_n9013_ = NAND ( new_n9012_, new_n9011_, new_n8944_, new_n8943_ ) -new_n9014_ = NAND ( new_n9013_, new_n3547_ ) -new_n9015_ = NAND ( new_n9014_, new_n8942_ ) -new_n9016_ = NAND ( new_n9015_, new_n6391_ ) -new_n9017_ = OR ( new_n8939_, new_n3327_ ) -new_n9018_ = NAND ( new_n8939_, new_n3244_ ) -new_n9019_ = NAND ( new_n9018_, new_n9017_, new_n3252_ ) -new_n9020_ = NAND ( new_n8939_, new_n2270_ ) -new_n9021_ = AND ( new_n8938_, new_n8937_, new_n8936_ ) -new_n9022_ = NAND ( new_n9021_, new_n3416_ ) -new_n9023_ = NAND ( new_n9022_, new_n9020_, new_n9019_, new_n3414_ ) -new_n9024_ = NAND ( new_n9018_, new_n9017_ ) -new_n9025_ = NAND ( new_n9024_, new_n3355_ ) -new_n9026_ = NAND ( new_n9021_, new_n3625_ ) -new_n9027_ = NAND ( new_n8939_, new_n2248_ ) -new_n9028_ = NAND ( new_n9027_, new_n9026_ ) -new_n9029_ = OR ( new_n9028_, new_n3578_ ) -new_n9030_ = NAND ( new_n9029_, new_n9025_, new_n9023_ ) -new_n9031_ = NAND ( new_n9028_, new_n3578_ ) -new_n9032_ = NAND ( new_n9021_, new_n3830_ ) -new_n9033_ = NAND ( new_n8939_, new_n2237_ ) -new_n9034_ = NAND ( new_n9033_, new_n9032_ ) -new_n9035_ = NAND ( new_n9034_, new_n3788_ ) -new_n9036_ = NAND ( new_n9035_, new_n9031_, new_n9030_ ) -new_n9037_ = OR ( new_n9034_, new_n3788_ ) -new_n9038_ = NAND ( new_n9021_, new_n4059_ ) -new_n9039_ = NAND ( new_n8939_, new_n2227_ ) -new_n9040_ = NAND ( new_n9039_, new_n9038_ ) -new_n9041_ = OR ( new_n9040_, new_n3992_ ) -new_n9042_ = NAND ( new_n9041_, new_n9037_, new_n9036_ ) -new_n9043_ = NAND ( new_n9040_, new_n3992_ ) -new_n9044_ = NAND ( new_n9021_, new_n4327_ ) -new_n9045_ = NAND ( new_n8939_, new_n2215_ ) -new_n9046_ = NAND ( new_n9045_, new_n9044_ ) -new_n9047_ = NAND ( new_n9046_, new_n4172_ ) -new_n9048_ = NAND ( new_n9047_, new_n9043_, new_n9042_ ) -new_n9049_ = OR ( new_n9046_, new_n4172_ ) -new_n9050_ = NAND ( new_n9021_, new_n4626_ ) -new_n9051_ = NAND ( new_n8939_, new_n2202_ ) -new_n9052_ = NAND ( new_n9051_, new_n9050_ ) -new_n9053_ = OR ( new_n9052_, new_n4370_ ) -new_n9054_ = NAND ( new_n9053_, new_n9049_, new_n9048_ ) -new_n9055_ = NAND ( new_n9052_, new_n4370_ ) -new_n9056_ = NAND ( new_n9021_, new_n4879_ ) -new_n9057_ = NAND ( new_n8939_, new_n2189_ ) -new_n9058_ = NAND ( new_n9057_, new_n9056_ ) -new_n9059_ = NAND ( new_n9058_, new_n4524_ ) -new_n9060_ = NAND ( new_n9059_, new_n9055_, new_n9054_ ) -new_n9061_ = OR ( new_n9058_, new_n4524_ ) -new_n9062_ = NAND ( new_n9021_, new_n5180_ ) -new_n9063_ = NAND ( new_n8939_, new_n2176_ ) -new_n9064_ = NAND ( new_n9063_, new_n9062_ ) -new_n9065_ = OR ( new_n9064_, new_n4665_ ) -new_n9066_ = NAND ( new_n9065_, new_n9061_, new_n9060_ ) -new_n9067_ = NAND ( new_n9064_, new_n4665_ ) -new_n9068_ = NAND ( new_n9021_, new_n5470_ ) -new_n9069_ = NAND ( new_n8939_, new_n2163_ ) -new_n9070_ = NAND ( new_n9069_, new_n9068_ ) -new_n9071_ = NAND ( new_n9070_, new_n4812_ ) -new_n9072_ = NAND ( new_n9071_, new_n9067_, new_n9066_ ) -new_n9073_ = OR ( new_n9070_, new_n4812_ ) -new_n9074_ = NOT ( new_n5001_ ) -new_n9075_ = NAND ( new_n9021_, new_n5724_ ) -new_n9076_ = NAND ( new_n8939_, new_n2150_ ) -new_n9077_ = NAND ( new_n9076_, new_n9075_ ) -new_n9078_ = OR ( new_n9077_, new_n9074_ ) -new_n9079_ = NAND ( new_n9078_, new_n9073_, new_n9072_ ) -new_n9080_ = NAND ( new_n9077_, new_n9074_ ) -new_n9081_ = NOT ( new_n5138_ ) -new_n9082_ = NAND ( new_n9021_, new_n6019_ ) -new_n9083_ = NAND ( new_n8939_, new_n2137_ ) -new_n9084_ = NAND ( new_n9083_, new_n9082_ ) -new_n9085_ = NAND ( new_n9084_, new_n9081_ ) -new_n9086_ = NAND ( new_n9085_, new_n9080_, new_n9079_ ) -new_n9087_ = OR ( new_n9084_, new_n9081_ ) -new_n9088_ = NAND ( new_n9021_, new_n6311_ ) -new_n9089_ = NAND ( new_n8939_, new_n2124_ ) -new_n9090_ = NAND ( new_n9089_, new_n9088_ ) -new_n9091_ = OR ( new_n9090_, new_n5301_ ) -new_n9092_ = NAND ( new_n9091_, new_n9087_, new_n9086_ ) -new_n9093_ = NAND ( new_n9090_, new_n5301_ ) -new_n9094_ = NAND ( new_n9021_, new_n6507_ ) -new_n9095_ = NAND ( new_n8939_, new_n2111_ ) -new_n9096_ = NAND ( new_n9095_, new_n9094_ ) -new_n9097_ = NAND ( new_n9096_, new_n5428_ ) -new_n9098_ = NAND ( new_n9097_, new_n9093_, new_n9092_ ) -new_n9099_ = OR ( new_n9096_, new_n5428_ ) -new_n9100_ = NOT ( new_n5620_ ) -new_n9101_ = NAND ( new_n9021_, new_n6651_ ) -new_n9102_ = NAND ( new_n8939_, new_n2098_ ) -new_n9103_ = NAND ( new_n9102_, new_n9101_ ) -new_n9104_ = OR ( new_n9103_, new_n9100_ ) -new_n9105_ = NAND ( new_n9104_, new_n9099_, new_n9098_ ) -new_n9106_ = NAND ( new_n9103_, new_n9100_ ) -new_n9107_ = NOT ( new_n5769_ ) -new_n9108_ = NAND ( new_n9021_, new_n6803_ ) -new_n9109_ = NAND ( new_n8939_, new_n2085_ ) -new_n9110_ = NAND ( new_n9109_, new_n9108_ ) -new_n9111_ = NAND ( new_n9110_, new_n9107_ ) -new_n9112_ = NAND ( new_n9111_, new_n9106_, new_n9105_ ) -new_n9113_ = OR ( new_n9110_, new_n9107_ ) -new_n9114_ = NAND ( new_n9021_, new_n6958_ ) -new_n9115_ = NAND ( new_n8939_, new_n2072_ ) -new_n9116_ = NAND ( new_n9115_, new_n9114_ ) -new_n9117_ = OR ( new_n9116_, new_n5924_ ) -new_n9118_ = NAND ( new_n9117_, new_n9113_, new_n9112_ ) -new_n9119_ = NAND ( new_n9116_, new_n5924_ ) -new_n9120_ = NAND ( new_n9021_, new_n7059_ ) -new_n9121_ = NAND ( new_n8939_, new_n2059_ ) -new_n9122_ = NAND ( new_n9121_, new_n9120_ ) -new_n9123_ = NAND ( new_n9122_, new_n6050_ ) -new_n9124_ = NAND ( new_n9123_, new_n9119_, new_n9118_ ) -new_n9125_ = OR ( new_n9122_, new_n6050_ ) -new_n9126_ = NAND ( new_n9021_, new_n7099_ ) -new_n9127_ = NAND ( new_n8939_, new_n2046_ ) -new_n9128_ = NAND ( new_n9127_, new_n9126_ ) -new_n9129_ = OR ( new_n9128_, new_n6216_ ) -new_n9130_ = NAND ( new_n9129_, new_n9125_, new_n9124_ ) -new_n9131_ = NAND ( new_n9128_, new_n6216_ ) -new_n9132_ = NAND ( new_n9021_, new_n7138_ ) -new_n9133_ = NAND ( new_n8939_, new_n2033_ ) -new_n9134_ = NAND ( new_n9133_, new_n9132_ ) -new_n9135_ = NAND ( new_n9134_, new_n6358_ ) -new_n9136_ = NAND ( new_n9135_, new_n9131_, new_n9130_ ) -new_n9137_ = OR ( new_n9134_, new_n6358_ ) -new_n9138_ = NOT ( new_n7173_ ) -new_n9139_ = NAND ( new_n9021_, new_n7180_ ) -new_n9140_ = NAND ( new_n8939_, new_n2018_ ) -new_n9141_ = NAND ( new_n9140_, new_n9139_ ) -new_n9142_ = OR ( new_n9141_, new_n9138_ ) -new_n9143_ = NAND ( new_n9142_, new_n9137_, new_n9136_ ) -new_n9144_ = NAND ( new_n9141_, new_n9138_ ) -new_n9145_ = NOT ( new_n7227_ ) -new_n9146_ = NAND ( new_n9021_, new_n7234_ ) -new_n9147_ = NAND ( new_n8939_, new_n2007_ ) -new_n9148_ = NAND ( new_n9147_, new_n9146_ ) -new_n9149_ = NAND ( new_n9148_, new_n9145_ ) -new_n9150_ = NAND ( new_n9149_, new_n9144_, new_n9143_ ) -new_n9151_ = OR ( new_n9148_, new_n9145_ ) -new_n9152_ = NOT ( new_n7281_ ) -new_n9153_ = NAND ( new_n9021_, new_n7288_ ) -new_n9154_ = NAND ( new_n8939_, new_n1996_ ) -new_n9155_ = NAND ( new_n9154_, new_n9153_ ) -new_n9156_ = OR ( new_n9155_, new_n9152_ ) -new_n9157_ = NAND ( new_n9156_, new_n9151_, new_n9150_ ) -new_n9158_ = NAND ( new_n9155_, new_n9152_ ) -new_n9159_ = NOT ( new_n7335_ ) -new_n9160_ = NAND ( new_n9021_, new_n7342_ ) -new_n9161_ = NAND ( new_n8939_, new_n2325_ ) -new_n9162_ = NAND ( new_n9161_, new_n9160_ ) -new_n9163_ = NAND ( new_n9162_, new_n9159_ ) -new_n9164_ = NAND ( new_n9163_, new_n9158_, new_n9157_ ) -new_n9165_ = OR ( new_n9162_, new_n9159_ ) -new_n9166_ = NOT ( new_n8085_ ) -new_n9167_ = NAND ( new_n9021_, new_n8092_ ) -new_n9168_ = NAND ( new_n8939_, new_n2314_ ) -new_n9169_ = NAND ( new_n9168_, new_n9167_ ) -new_n9170_ = OR ( new_n9169_, new_n9166_ ) -new_n9171_ = NAND ( new_n9170_, new_n9165_, new_n9164_ ) -new_n9172_ = NAND ( new_n9169_, new_n9166_ ) -new_n9173_ = NOT ( new_n8139_ ) -new_n9174_ = NAND ( new_n9021_, new_n8146_ ) -new_n9175_ = NAND ( new_n8939_, new_n2409_ ) -new_n9176_ = NAND ( new_n9175_, new_n9174_ ) -new_n9177_ = NAND ( new_n9176_, new_n9173_ ) -new_n9178_ = NAND ( new_n9177_, new_n9172_, new_n9171_ ) -new_n9179_ = OR ( new_n9176_, new_n9173_ ) -new_n9180_ = NOT ( new_n8193_ ) -new_n9181_ = NAND ( new_n9021_, new_n8200_ ) -new_n9182_ = NAND ( new_n8939_, new_n2453_ ) -new_n9183_ = NAND ( new_n9182_, new_n9181_ ) -new_n9184_ = OR ( new_n9183_, new_n9180_ ) -new_n9185_ = NAND ( new_n9184_, new_n9179_, new_n9178_ ) -new_n9186_ = NAND ( new_n9183_, new_n9180_ ) -new_n9187_ = NOT ( new_n8247_ ) -new_n9188_ = NAND ( new_n9021_, new_n8254_ ) -new_n9189_ = NAND ( new_n8939_, new_n2443_ ) -new_n9190_ = NAND ( new_n9189_, new_n9188_ ) -new_n9191_ = NAND ( new_n9190_, new_n9187_ ) -new_n9192_ = NAND ( new_n9191_, new_n9186_, new_n9185_ ) -new_n9193_ = OR ( new_n9190_, new_n9187_ ) -new_n9194_ = NAND ( new_n9021_, new_n8308_ ) -new_n9195_ = NAND ( new_n8939_, new_n2533_ ) -new_n9196_ = NAND ( new_n9195_, new_n9194_ ) -new_n9197_ = OR ( new_n9196_, new_n8377_ ) -new_n9198_ = NAND ( new_n9197_, new_n9193_, new_n9192_ ) -new_n9199_ = NAND ( new_n9196_, new_n8377_ ) -new_n9200_ = NAND ( new_n9021_, new_n8372_ ) -new_n9201_ = NAND ( new_n8939_, new_n2397_ ) -new_n9202_ = NAND ( new_n9201_, new_n9200_ ) -new_n9203_ = NAND ( new_n9202_, new_n8945_ ) -new_n9204_ = NAND ( new_n9203_, new_n9199_, new_n9198_ ) -new_n9205_ = OR ( new_n9202_, new_n8945_ ) -new_n9206_ = NOT ( new_n8422_ ) -new_n9207_ = NAND ( new_n9021_, new_n8433_ ) -new_n9208_ = NAND ( new_n8939_, new_n1947_ ) -new_n9209_ = NAND ( new_n9208_, new_n9207_ ) -new_n9210_ = OR ( new_n9209_, new_n9206_ ) -new_n9211_ = NAND ( new_n9210_, new_n9205_, new_n9204_ ) -new_n9212_ = NAND ( new_n9209_, new_n9206_ ) -new_n9213_ = NOT ( new_n8456_ ) -new_n9214_ = NAND ( new_n9021_, new_n8464_ ) -new_n9215_ = NAND ( new_n8939_, new_n1939_ ) -new_n9216_ = NAND ( new_n9215_, new_n9214_ ) -new_n9217_ = OR ( new_n9216_, new_n9213_ ) -new_n9218_ = NAND ( new_n9217_, new_n9212_, new_n9211_ ) -new_n9219_ = NAND ( new_n9216_, new_n9213_ ) -new_n9220_ = NAND ( new_n9219_, new_n9218_, new_n3328_ ) -new_n9221_ = OR ( new_n8939_, new_n1258_ ) -new_n9222_ = NAND ( new_n9221_, new_n9220_ ) -new_n9223_ = NAND ( new_n9222_, new_n3187_ ) -new_n9224_ = OR ( new_n9013_, new_n3548_ ) -new_n9225_ = NAND ( new_n3538_, new_n1258_ ) -new_n9226_ = NAND ( new_n9225_, new_n9021_ ) -new_n9227_ = NAND ( new_n3194_, new_n1259_ ) -new_n9228_ = NAND ( new_n9227_, new_n8514_ ) -new_n9229_ = NAND ( new_n9228_, new_n8939_ ) -new_n9230_ = NAND ( new_n9229_, new_n9226_ ) -new_n9231_ = NAND ( new_n9230_, new_n9224_ ) -new_n9232_ = NAND ( new_n9231_, new_n3166_ ) -new_n9233_ = NAND ( new_n9232_, new_n9223_ ) -new_n9234_ = NAND ( new_n9233_, new_n1307_ ) -new_n9235_ = NAND ( new_n9234_, new_n9016_ ) -new_n9236_ = NAND ( new_n9235_, NET_275 ) -new_n9237_ = NAND ( new_n3347_, new_n1303_, new_n1298_, new_n1258_ ) -new_n9238_ = OR ( new_n9237_, new_n8939_, new_n1490_ ) -new_n9239_ = NAND ( new_n9237_, new_n1289_ ) -new_n9240_ = NAND ( new_n1307_, new_n1258_ ) -new_n9241_ = NAND ( new_n9240_, new_n9239_, new_n1308_, NET_275 ) -new_n9242_ = NAND ( new_n9241_, NET_245 ) -NET_9419 = NAND ( new_n9242_, new_n9238_, new_n9236_ ) -NET_976 = XOR ( NET_457, NET_212 ) -NET_977 = XNOR ( NET_521, NET_276 ) -NET_978 = XNOR ( NET_522, NET_277 ) diff --git a/ITC99BENCH/b21.bench b/ITC99BENCH/b21.bench deleted file mode 100644 index 54f028b..0000000 --- a/ITC99BENCH/b21.bench +++ /dev/null @@ -1,9508 +0,0 @@ -# generated by verilog2bench.py https://gitea.yuhangq.com/YuhangQ/any2bench -INPUT(NET_1) -INPUT(NET_10) -INPUT(NET_100) -INPUT(NET_101) -INPUT(NET_102) -INPUT(NET_103) -INPUT(NET_104) -INPUT(NET_105) -INPUT(NET_106) -INPUT(NET_107) -INPUT(NET_108) -INPUT(NET_109) -INPUT(NET_11) -INPUT(NET_110) -INPUT(NET_111) -INPUT(NET_112) -INPUT(NET_113) -INPUT(NET_114) -INPUT(NET_115) -INPUT(NET_116) -INPUT(NET_117) -INPUT(NET_118) -INPUT(NET_119) -INPUT(NET_12) -INPUT(NET_120) -INPUT(NET_121) -INPUT(NET_122) -INPUT(NET_123) -INPUT(NET_124) -INPUT(NET_125) -INPUT(NET_126) -INPUT(NET_127) -INPUT(NET_128) -INPUT(NET_129) -INPUT(NET_13) -INPUT(NET_130) -INPUT(NET_131) -INPUT(NET_132) -INPUT(NET_133) -INPUT(NET_134) -INPUT(NET_135) -INPUT(NET_136) -INPUT(NET_137) -INPUT(NET_138) -INPUT(NET_139) -INPUT(NET_14) -INPUT(NET_140) -INPUT(NET_141) -INPUT(NET_142) -INPUT(NET_143) -INPUT(NET_144) -INPUT(NET_145) -INPUT(NET_146) -INPUT(NET_147) -INPUT(NET_148) -INPUT(NET_149) -INPUT(NET_15) -INPUT(NET_150) -INPUT(NET_151) -INPUT(NET_152) -INPUT(NET_153) -INPUT(NET_154) -INPUT(NET_155) -INPUT(NET_156) -INPUT(NET_157) -INPUT(NET_158) -INPUT(NET_159) -INPUT(NET_16) -INPUT(NET_160) -INPUT(NET_161) -INPUT(NET_162) -INPUT(NET_163) -INPUT(NET_164) -INPUT(NET_165) -INPUT(NET_166) -INPUT(NET_167) -INPUT(NET_168) -INPUT(NET_169) -INPUT(NET_17) -INPUT(NET_170) -INPUT(NET_171) -INPUT(NET_172) -INPUT(NET_173) -INPUT(NET_174) -INPUT(NET_175) -INPUT(NET_176) -INPUT(NET_177) -INPUT(NET_178) -INPUT(NET_179) -INPUT(NET_18) -INPUT(NET_180) -INPUT(NET_181) -INPUT(NET_182) -INPUT(NET_183) -INPUT(NET_184) -INPUT(NET_185) -INPUT(NET_186) -INPUT(NET_187) -INPUT(NET_188) -INPUT(NET_189) -INPUT(NET_19) -INPUT(NET_190) -INPUT(NET_191) -INPUT(NET_192) -INPUT(NET_193) -INPUT(NET_194) -INPUT(NET_195) -INPUT(NET_196) -INPUT(NET_197) -INPUT(NET_198) -INPUT(NET_199) -INPUT(NET_2) -INPUT(NET_20) -INPUT(NET_200) -INPUT(NET_201) -INPUT(NET_202) -INPUT(NET_203) -INPUT(NET_204) -INPUT(NET_205) -INPUT(NET_206) -INPUT(NET_207) -INPUT(NET_208) -INPUT(NET_209) -INPUT(NET_21) -INPUT(NET_210) -INPUT(NET_211) -INPUT(NET_212) -INPUT(NET_213) -INPUT(NET_214) -INPUT(NET_215) -INPUT(NET_216) -INPUT(NET_217) -INPUT(NET_218) -INPUT(NET_219) -INPUT(NET_22) -INPUT(NET_220) -INPUT(NET_221) -INPUT(NET_222) -INPUT(NET_223) -INPUT(NET_224) -INPUT(NET_225) -INPUT(NET_226) -INPUT(NET_227) -INPUT(NET_228) -INPUT(NET_229) -INPUT(NET_23) -INPUT(NET_230) -INPUT(NET_231) -INPUT(NET_232) -INPUT(NET_233) -INPUT(NET_234) -INPUT(NET_235) -INPUT(NET_236) -INPUT(NET_237) -INPUT(NET_238) -INPUT(NET_239) -INPUT(NET_24) -INPUT(NET_240) -INPUT(NET_241) -INPUT(NET_242) -INPUT(NET_243) -INPUT(NET_244) -INPUT(NET_245) -INPUT(NET_246) -INPUT(NET_247) -INPUT(NET_248) -INPUT(NET_249) -INPUT(NET_25) -INPUT(NET_250) -INPUT(NET_251) -INPUT(NET_252) -INPUT(NET_253) -INPUT(NET_254) -INPUT(NET_255) -INPUT(NET_256) -INPUT(NET_257) -INPUT(NET_258) -INPUT(NET_259) -INPUT(NET_26) -INPUT(NET_260) -INPUT(NET_261) -INPUT(NET_262) -INPUT(NET_263) -INPUT(NET_264) -INPUT(NET_265) -INPUT(NET_266) -INPUT(NET_267) -INPUT(NET_268) -INPUT(NET_269) -INPUT(NET_27) -INPUT(NET_270) -INPUT(NET_271) -INPUT(NET_272) -INPUT(NET_273) -INPUT(NET_274) -INPUT(NET_275) -INPUT(NET_276) -INPUT(NET_277) -INPUT(NET_278) -INPUT(NET_279) -INPUT(NET_28) -INPUT(NET_280) -INPUT(NET_281) -INPUT(NET_282) -INPUT(NET_283) -INPUT(NET_284) -INPUT(NET_285) -INPUT(NET_286) -INPUT(NET_287) -INPUT(NET_288) -INPUT(NET_289) -INPUT(NET_29) -INPUT(NET_290) -INPUT(NET_291) -INPUT(NET_292) -INPUT(NET_293) -INPUT(NET_294) -INPUT(NET_295) -INPUT(NET_296) -INPUT(NET_297) -INPUT(NET_298) -INPUT(NET_299) -INPUT(NET_3) -INPUT(NET_30) -INPUT(NET_300) -INPUT(NET_301) -INPUT(NET_302) -INPUT(NET_303) -INPUT(NET_304) -INPUT(NET_305) -INPUT(NET_306) -INPUT(NET_307) -INPUT(NET_308) -INPUT(NET_309) -INPUT(NET_31) -INPUT(NET_310) -INPUT(NET_311) -INPUT(NET_312) -INPUT(NET_313) -INPUT(NET_314) -INPUT(NET_315) -INPUT(NET_316) -INPUT(NET_317) -INPUT(NET_318) -INPUT(NET_319) -INPUT(NET_32) -INPUT(NET_320) -INPUT(NET_321) -INPUT(NET_322) -INPUT(NET_323) -INPUT(NET_324) -INPUT(NET_325) -INPUT(NET_326) -INPUT(NET_327) -INPUT(NET_328) -INPUT(NET_329) -INPUT(NET_33) -INPUT(NET_330) -INPUT(NET_331) -INPUT(NET_332) -INPUT(NET_333) -INPUT(NET_334) -INPUT(NET_335) -INPUT(NET_336) -INPUT(NET_337) -INPUT(NET_338) -INPUT(NET_339) -INPUT(NET_34) -INPUT(NET_340) -INPUT(NET_341) -INPUT(NET_342) -INPUT(NET_343) -INPUT(NET_344) -INPUT(NET_345) -INPUT(NET_346) -INPUT(NET_347) -INPUT(NET_348) -INPUT(NET_349) -INPUT(NET_35) -INPUT(NET_350) -INPUT(NET_351) -INPUT(NET_352) -INPUT(NET_353) -INPUT(NET_354) -INPUT(NET_355) -INPUT(NET_356) -INPUT(NET_357) -INPUT(NET_358) -INPUT(NET_359) -INPUT(NET_36) -INPUT(NET_360) -INPUT(NET_361) -INPUT(NET_362) -INPUT(NET_363) -INPUT(NET_364) -INPUT(NET_365) -INPUT(NET_366) -INPUT(NET_367) -INPUT(NET_368) -INPUT(NET_369) -INPUT(NET_37) -INPUT(NET_370) -INPUT(NET_371) -INPUT(NET_372) -INPUT(NET_373) -INPUT(NET_374) -INPUT(NET_375) -INPUT(NET_376) -INPUT(NET_377) -INPUT(NET_378) -INPUT(NET_379) -INPUT(NET_38) -INPUT(NET_380) -INPUT(NET_381) -INPUT(NET_382) -INPUT(NET_383) -INPUT(NET_384) -INPUT(NET_385) -INPUT(NET_386) -INPUT(NET_387) -INPUT(NET_388) -INPUT(NET_389) -INPUT(NET_39) -INPUT(NET_390) -INPUT(NET_391) -INPUT(NET_392) -INPUT(NET_393) -INPUT(NET_394) -INPUT(NET_395) -INPUT(NET_396) -INPUT(NET_397) -INPUT(NET_398) -INPUT(NET_399) -INPUT(NET_4) -INPUT(NET_40) -INPUT(NET_400) -INPUT(NET_401) -INPUT(NET_402) -INPUT(NET_403) -INPUT(NET_404) -INPUT(NET_405) -INPUT(NET_406) -INPUT(NET_407) -INPUT(NET_408) -INPUT(NET_409) -INPUT(NET_41) -INPUT(NET_410) -INPUT(NET_411) -INPUT(NET_412) -INPUT(NET_413) -INPUT(NET_414) -INPUT(NET_415) -INPUT(NET_416) -INPUT(NET_417) -INPUT(NET_418) -INPUT(NET_419) -INPUT(NET_42) -INPUT(NET_420) -INPUT(NET_421) -INPUT(NET_422) -INPUT(NET_423) -INPUT(NET_424) -INPUT(NET_425) -INPUT(NET_426) -INPUT(NET_427) -INPUT(NET_428) -INPUT(NET_429) -INPUT(NET_43) -INPUT(NET_430) -INPUT(NET_431) -INPUT(NET_432) -INPUT(NET_433) -INPUT(NET_434) -INPUT(NET_435) -INPUT(NET_436) -INPUT(NET_437) -INPUT(NET_438) -INPUT(NET_439) -INPUT(NET_44) -INPUT(NET_440) -INPUT(NET_441) -INPUT(NET_442) -INPUT(NET_443) -INPUT(NET_444) -INPUT(NET_445) -INPUT(NET_446) -INPUT(NET_447) -INPUT(NET_448) -INPUT(NET_449) -INPUT(NET_45) -INPUT(NET_450) -INPUT(NET_451) -INPUT(NET_452) -INPUT(NET_453) -INPUT(NET_454) -INPUT(NET_455) -INPUT(NET_456) -INPUT(NET_457) -INPUT(NET_458) -INPUT(NET_459) -INPUT(NET_46) -INPUT(NET_460) -INPUT(NET_461) -INPUT(NET_462) -INPUT(NET_463) -INPUT(NET_464) -INPUT(NET_465) -INPUT(NET_466) -INPUT(NET_467) -INPUT(NET_468) -INPUT(NET_469) -INPUT(NET_47) -INPUT(NET_470) -INPUT(NET_471) -INPUT(NET_472) -INPUT(NET_473) -INPUT(NET_474) -INPUT(NET_475) -INPUT(NET_476) -INPUT(NET_477) -INPUT(NET_478) -INPUT(NET_479) -INPUT(NET_48) -INPUT(NET_480) -INPUT(NET_481) -INPUT(NET_482) -INPUT(NET_483) -INPUT(NET_484) -INPUT(NET_485) -INPUT(NET_486) -INPUT(NET_487) -INPUT(NET_488) -INPUT(NET_489) -INPUT(NET_49) -INPUT(NET_490) -INPUT(NET_491) -INPUT(NET_492) -INPUT(NET_493) -INPUT(NET_494) -INPUT(NET_495) -INPUT(NET_496) -INPUT(NET_497) -INPUT(NET_498) -INPUT(NET_499) -INPUT(NET_5) -INPUT(NET_50) -INPUT(NET_500) -INPUT(NET_501) -INPUT(NET_502) -INPUT(NET_503) -INPUT(NET_504) -INPUT(NET_505) -INPUT(NET_506) -INPUT(NET_507) -INPUT(NET_508) -INPUT(NET_509) -INPUT(NET_51) -INPUT(NET_510) -INPUT(NET_511) -INPUT(NET_512) -INPUT(NET_513) -INPUT(NET_514) -INPUT(NET_515) -INPUT(NET_516) -INPUT(NET_517) -INPUT(NET_518) -INPUT(NET_519) -INPUT(NET_52) -INPUT(NET_520) -INPUT(NET_521) -INPUT(NET_522) -INPUT(NET_53) -INPUT(NET_54) -INPUT(NET_55) -INPUT(NET_56) -INPUT(NET_57) -INPUT(NET_58) -INPUT(NET_59) -INPUT(NET_6) -INPUT(NET_60) -INPUT(NET_61) -INPUT(NET_62) -INPUT(NET_63) -INPUT(NET_64) -INPUT(NET_65) -INPUT(NET_66) -INPUT(NET_67) -INPUT(NET_68) -INPUT(NET_69) -INPUT(NET_7) -INPUT(NET_70) -INPUT(NET_71) -INPUT(NET_72) -INPUT(NET_73) -INPUT(NET_74) -INPUT(NET_75) -INPUT(NET_76) -INPUT(NET_77) -INPUT(NET_78) -INPUT(NET_79) -INPUT(NET_8) -INPUT(NET_80) -INPUT(NET_81) -INPUT(NET_82) -INPUT(NET_83) -INPUT(NET_84) -INPUT(NET_85) -INPUT(NET_86) -INPUT(NET_87) -INPUT(NET_88) -INPUT(NET_89) -INPUT(NET_9) -INPUT(NET_90) -INPUT(NET_91) -INPUT(NET_92) -INPUT(NET_93) -INPUT(NET_94) -INPUT(NET_95) -INPUT(NET_96) -INPUT(NET_97) -INPUT(NET_98) -INPUT(NET_99) -OUTPUT(NET_1194) -OUTPUT(NET_1359) -OUTPUT(NET_1545) -OUTPUT(NET_1673) -OUTPUT(NET_1680) -OUTPUT(NET_1688) -OUTPUT(NET_1769) -OUTPUT(NET_1781) -OUTPUT(NET_1813) -OUTPUT(NET_1881) -OUTPUT(NET_1908) -OUTPUT(NET_2053) -OUTPUT(NET_2058) -OUTPUT(NET_2107) -OUTPUT(NET_23564) -OUTPUT(NET_23565) -OUTPUT(NET_23566) -OUTPUT(NET_23567) -OUTPUT(NET_23568) -OUTPUT(NET_2381) -OUTPUT(NET_2682) -OUTPUT(NET_2731) -OUTPUT(NET_2878) -OUTPUT(NET_3045) -OUTPUT(NET_3257) -OUTPUT(NET_3258) -OUTPUT(NET_3259) -OUTPUT(NET_3260) -OUTPUT(NET_3261) -OUTPUT(NET_3262) -OUTPUT(NET_3263) -OUTPUT(NET_3264) -OUTPUT(NET_3265) -OUTPUT(NET_3266) -OUTPUT(NET_3267) -OUTPUT(NET_3268) -OUTPUT(NET_3269) -OUTPUT(NET_3270) -OUTPUT(NET_3271) -OUTPUT(NET_3272) -OUTPUT(NET_3273) -OUTPUT(NET_3274) -OUTPUT(NET_3275) -OUTPUT(NET_3276) -OUTPUT(NET_3277) -OUTPUT(NET_3278) -OUTPUT(NET_3279) -OUTPUT(NET_3280) -OUTPUT(NET_3281) -OUTPUT(NET_3282) -OUTPUT(NET_3283) -OUTPUT(NET_3284) -OUTPUT(NET_3285) -OUTPUT(NET_3286) -OUTPUT(NET_3387) -OUTPUT(NET_3388) -OUTPUT(NET_3389) -OUTPUT(NET_3390) -OUTPUT(NET_3391) -OUTPUT(NET_3392) -OUTPUT(NET_3393) -OUTPUT(NET_3394) -OUTPUT(NET_3395) -OUTPUT(NET_3396) -OUTPUT(NET_3397) -OUTPUT(NET_3398) -OUTPUT(NET_3399) -OUTPUT(NET_3400) -OUTPUT(NET_3401) -OUTPUT(NET_3402) -OUTPUT(NET_3403) -OUTPUT(NET_3404) -OUTPUT(NET_3405) -OUTPUT(NET_3406) -OUTPUT(NET_3407) -OUTPUT(NET_3408) -OUTPUT(NET_3409) -OUTPUT(NET_3410) -OUTPUT(NET_3411) -OUTPUT(NET_3412) -OUTPUT(NET_3413) -OUTPUT(NET_3414) -OUTPUT(NET_3415) -OUTPUT(NET_3416) -OUTPUT(NET_3420) -OUTPUT(NET_3421) -OUTPUT(NET_3422) -OUTPUT(NET_3423) -OUTPUT(NET_3424) -OUTPUT(NET_3425) -OUTPUT(NET_3426) -OUTPUT(NET_3427) -OUTPUT(NET_3428) -OUTPUT(NET_3429) -OUTPUT(NET_3430) -OUTPUT(NET_3431) -OUTPUT(NET_3432) -OUTPUT(NET_3433) -OUTPUT(NET_3434) -OUTPUT(NET_3435) -OUTPUT(NET_3436) -OUTPUT(NET_3437) -OUTPUT(NET_3438) -OUTPUT(NET_3439) -OUTPUT(NET_3440) -OUTPUT(NET_3441) -OUTPUT(NET_3442) -OUTPUT(NET_3443) -OUTPUT(NET_3444) -OUTPUT(NET_3616) -OUTPUT(NET_3619) -OUTPUT(NET_3623) -OUTPUT(NET_3624) -OUTPUT(NET_3625) -OUTPUT(NET_3626) -OUTPUT(NET_3627) -OUTPUT(NET_3628) -OUTPUT(NET_3629) -OUTPUT(NET_3630) -OUTPUT(NET_3631) -OUTPUT(NET_3632) -OUTPUT(NET_3633) -OUTPUT(NET_3634) -OUTPUT(NET_3635) -OUTPUT(NET_3636) -OUTPUT(NET_3637) -OUTPUT(NET_3638) -OUTPUT(NET_3639) -OUTPUT(NET_3640) -OUTPUT(NET_3641) -OUTPUT(NET_3642) -OUTPUT(NET_3643) -OUTPUT(NET_3644) -OUTPUT(NET_3645) -OUTPUT(NET_3646) -OUTPUT(NET_3647) -OUTPUT(NET_3648) -OUTPUT(NET_3649) -OUTPUT(NET_3698) -OUTPUT(NET_3704) -OUTPUT(NET_3705) -OUTPUT(NET_3801) -OUTPUT(NET_3802) -OUTPUT(NET_3833) -OUTPUT(NET_3834) -OUTPUT(NET_4137) -OUTPUT(NET_4140) -OUTPUT(NET_4153) -OUTPUT(NET_4154) -OUTPUT(NET_4264) -OUTPUT(NET_4277) -OUTPUT(NET_4278) -OUTPUT(NET_4387) -OUTPUT(NET_4388) -OUTPUT(NET_4554) -OUTPUT(NET_4555) -OUTPUT(NET_4744) -OUTPUT(NET_4747) -OUTPUT(NET_4751) -OUTPUT(NET_4772) -OUTPUT(NET_4774) -OUTPUT(NET_4855) -OUTPUT(NET_5032) -OUTPUT(NET_5109) -OUTPUT(NET_5208) -OUTPUT(NET_5314) -OUTPUT(NET_5317) -OUTPUT(NET_5473) -OUTPUT(NET_5557) -OUTPUT(NET_5562) -OUTPUT(NET_5609) -OUTPUT(NET_5676) -OUTPUT(NET_5685) -OUTPUT(NET_5734) -OUTPUT(NET_5738) -OUTPUT(NET_5760) -OUTPUT(NET_5810) -OUTPUT(NET_5811) -OUTPUT(NET_5836) -OUTPUT(NET_5837) -OUTPUT(NET_5838) -OUTPUT(NET_5891) -OUTPUT(NET_5898) -OUTPUT(NET_5899) -OUTPUT(NET_5900) -OUTPUT(NET_5901) -OUTPUT(NET_5913) -OUTPUT(NET_5914) -OUTPUT(NET_5915) -OUTPUT(NET_5973) -OUTPUT(NET_5974) -OUTPUT(NET_5975) -OUTPUT(NET_6002) -OUTPUT(NET_6003) -OUTPUT(NET_6004) -OUTPUT(NET_6069) -OUTPUT(NET_6070) -OUTPUT(NET_6071) -OUTPUT(NET_6072) -OUTPUT(NET_6081) -OUTPUT(NET_6082) -OUTPUT(NET_6083) -OUTPUT(NET_6084) -OUTPUT(NET_6085) -OUTPUT(NET_6136) -OUTPUT(NET_6141) -OUTPUT(NET_6142) -OUTPUT(NET_6156) -OUTPUT(NET_6209) -OUTPUT(NET_6215) -OUTPUT(NET_6216) -OUTPUT(NET_6217) -OUTPUT(NET_6218) -OUTPUT(NET_6234) -OUTPUT(NET_6235) -OUTPUT(NET_6236) -OUTPUT(NET_6237) -OUTPUT(NET_6238) -OUTPUT(NET_6287) -OUTPUT(NET_6288) -OUTPUT(NET_6305) -OUTPUT(NET_6368) -OUTPUT(NET_6369) -OUTPUT(NET_6371) -OUTPUT(NET_6372) -OUTPUT(NET_6390) -OUTPUT(NET_6391) -OUTPUT(NET_6392) -OUTPUT(NET_6393) -OUTPUT(NET_6395) -OUTPUT(NET_6396) -OUTPUT(NET_6440) -OUTPUT(NET_6441) -OUTPUT(NET_6525) -OUTPUT(NET_6526) -OUTPUT(NET_6528) -OUTPUT(NET_6529) -OUTPUT(NET_6536) -OUTPUT(NET_6537) -OUTPUT(NET_6538) -OUTPUT(NET_6539) -OUTPUT(NET_6541) -OUTPUT(NET_6542) -OUTPUT(NET_6667) -OUTPUT(NET_6668) -OUTPUT(NET_6680) -OUTPUT(NET_6682) -OUTPUT(NET_6683) -OUTPUT(NET_6736) -OUTPUT(NET_6737) -OUTPUT(NET_6757) -OUTPUT(NET_6758) -OUTPUT(NET_6759) -OUTPUT(NET_6805) -OUTPUT(NET_6807) -OUTPUT(NET_6808) -OUTPUT(NET_6816) -OUTPUT(NET_6881) -OUTPUT(NET_6902) -OUTPUT(NET_6903) -OUTPUT(NET_6904) -OUTPUT(NET_6906) -OUTPUT(NET_6907) -OUTPUT(NET_6956) -OUTPUT(NET_6957) -OUTPUT(NET_6978) -OUTPUT(NET_7058) -OUTPUT(NET_7059) -OUTPUT(NET_7073) -OUTPUT(NET_7074) -OUTPUT(NET_7075) -OUTPUT(NET_7077) -OUTPUT(NET_7078) -OUTPUT(NET_7127) -OUTPUT(NET_7128) -OUTPUT(NET_7129) -OUTPUT(NET_7148) -OUTPUT(NET_7214) -OUTPUT(NET_7226) -OUTPUT(NET_7227) -OUTPUT(NET_7228) -OUTPUT(NET_7230) -OUTPUT(NET_7231) -OUTPUT(NET_7280) -OUTPUT(NET_7281) -OUTPUT(NET_7294) -OUTPUT(NET_7360) -OUTPUT(NET_7378) -OUTPUT(NET_7379) -OUTPUT(NET_7426) -OUTPUT(NET_7427) -OUTPUT(NET_7428) -OUTPUT(NET_7429) -OUTPUT(NET_7442) -OUTPUT(NET_7443) -OUTPUT(NET_7444) -OUTPUT(NET_7445) -OUTPUT(NET_7563) -OUTPUT(NET_7564) -OUTPUT(NET_7565) -OUTPUT(NET_7581) -OUTPUT(NET_7582) -OUTPUT(NET_7583) -OUTPUT(NET_7584) -OUTPUT(NET_7585) -OUTPUT(NET_7586) -OUTPUT(NET_7641) -OUTPUT(NET_7712) -OUTPUT(NET_7713) -OUTPUT(NET_7714) -OUTPUT(NET_7715) -OUTPUT(NET_7729) -OUTPUT(NET_7730) -OUTPUT(NET_7731) -OUTPUT(NET_7732) -OUTPUT(NET_7733) -OUTPUT(NET_7734) -OUTPUT(NET_7850) -OUTPUT(NET_7851) -OUTPUT(NET_7852) -OUTPUT(NET_7868) -OUTPUT(NET_7869) -OUTPUT(NET_7870) -OUTPUT(NET_7871) -OUTPUT(NET_7872) -OUTPUT(NET_7873) -OUTPUT(NET_7926) -OUTPUT(NET_7971) -OUTPUT(NET_7972) -OUTPUT(NET_7981) -OUTPUT(NET_7982) -OUTPUT(NET_8028) -OUTPUT(NET_8029) -OUTPUT(NET_8045) -OUTPUT(NET_8046) -OUTPUT(NET_8047) -OUTPUT(NET_8048) -OUTPUT(NET_8085) -OUTPUT(NET_8147) -OUTPUT(NET_8148) -OUTPUT(NET_8149) -OUTPUT(NET_8166) -OUTPUT(NET_8167) -OUTPUT(NET_8168) -OUTPUT(NET_8169) -OUTPUT(NET_8170) -OUTPUT(NET_8171) -OUTPUT(NET_8222) -OUTPUT(NET_8223) -OUTPUT(NET_8281) -OUTPUT(NET_8282) -OUTPUT(NET_8299) -OUTPUT(NET_8300) -OUTPUT(NET_8301) -OUTPUT(NET_8302) -OUTPUT(NET_8304) -OUTPUT(NET_8305) -OUTPUT(NET_8353) -OUTPUT(NET_8412) -OUTPUT(NET_8413) -OUTPUT(NET_8424) -OUTPUT(NET_8425) -OUTPUT(NET_8426) -OUTPUT(NET_8428) -OUTPUT(NET_8429) -OUTPUT(NET_8466) -OUTPUT(NET_8468) -OUTPUT(NET_8469) -OUTPUT(NET_8484) -OUTPUT(NET_8539) -OUTPUT(NET_8540) -OUTPUT(NET_8556) -OUTPUT(NET_8557) -OUTPUT(NET_8558) -OUTPUT(NET_8559) -OUTPUT(NET_8560) -OUTPUT(NET_8561) -OUTPUT(NET_8599) -OUTPUT(NET_8650) -OUTPUT(NET_8651) -OUTPUT(NET_8657) -OUTPUT(NET_8658) -OUTPUT(NET_8659) -OUTPUT(NET_8661) -OUTPUT(NET_8662) -OUTPUT(NET_8692) -OUTPUT(NET_8693) -OUTPUT(NET_8736) -OUTPUT(NET_8737) -OUTPUT(NET_8738) -OUTPUT(NET_8739) -OUTPUT(NET_8758) -OUTPUT(NET_8791) -OUTPUT(NET_8796) -OUTPUT(NET_8797) -OUTPUT(NET_8798) -OUTPUT(NET_8799) -OUTPUT(NET_8817) -OUTPUT(NET_8818) -OUTPUT(NET_8853) -OUTPUT(NET_8854) -OUTPUT(NET_8855) -OUTPUT(NET_8856) -OUTPUT(NET_8872) -OUTPUT(NET_8903) -OUTPUT(NET_8908) -OUTPUT(NET_8909) -OUTPUT(NET_8910) -OUTPUT(NET_8911) -OUTPUT(NET_8929) -OUTPUT(NET_8930) -OUTPUT(NET_8964) -OUTPUT(NET_8965) -OUTPUT(NET_8966) -OUTPUT(NET_8967) -OUTPUT(NET_8983) -OUTPUT(NET_9014) -OUTPUT(NET_9019) -OUTPUT(NET_9020) -OUTPUT(NET_9021) -OUTPUT(NET_9022) -OUTPUT(NET_9038) -OUTPUT(NET_9039) -OUTPUT(NET_9073) -OUTPUT(NET_9074) -OUTPUT(NET_9075) -OUTPUT(NET_9076) -OUTPUT(NET_9088) -OUTPUT(NET_9120) -OUTPUT(NET_9125) -OUTPUT(NET_9126) -OUTPUT(NET_9127) -OUTPUT(NET_9128) -OUTPUT(NET_9129) -OUTPUT(NET_9143) -OUTPUT(NET_9144) -OUTPUT(NET_9180) -OUTPUT(NET_9181) -OUTPUT(NET_9182) -OUTPUT(NET_9183) -OUTPUT(NET_9184) -OUTPUT(NET_9185) -OUTPUT(NET_9196) -OUTPUT(NET_9221) -OUTPUT(NET_9225) -OUTPUT(NET_9226) -OUTPUT(NET_9227) -OUTPUT(NET_9241) -OUTPUT(NET_9242) -OUTPUT(NET_9243) -OUTPUT(NET_9263) -OUTPUT(NET_9264) -OUTPUT(NET_9278) -OUTPUT(NET_9282) -OUTPUT(NET_9283) -OUTPUT(NET_9290) -OUTPUT(NET_9302) -OUTPUT(NET_9303) -OUTPUT(NET_9318) -OUTPUT(NET_9329) -OUTPUT(NET_9335) -OUTPUT(NET_9336) -OUTPUT(NET_9353) -OUTPUT(NET_9361) -OUTPUT(NET_9369) -OUTPUT(NET_9370) -OUTPUT(NET_9445) -OUTPUT(NET_9477) -OUTPUT(NET_9516) -OUTPUT(NET_9517) -OUTPUT(NET_9552) -OUTPUT(NET_9556) -OUTPUT(NET_9561) -OUTPUT(NET_9569) -OUTPUT(NET_9570) -OUTPUT(NET_9580) -OUTPUT(NET_9588) -OUTPUT(NET_9595) -OUTPUT(NET_9596) -OUTPUT(NET_9608) -OUTPUT(NET_9616) -OUTPUT(NET_9624) -OUTPUT(NET_9625) -OUTPUT(NET_9635) -OUTPUT(NET_9643) -OUTPUT(NET_9650) -OUTPUT(NET_9651) -OUTPUT(NET_9663) -OUTPUT(NET_9671) -OUTPUT(NET_9679) -OUTPUT(NET_9680) -OUTPUT(NET_9690) -OUTPUT(NET_9698) -OUTPUT(NET_9705) -OUTPUT(NET_9706) -OUTPUT(NET_9718) -OUTPUT(NET_9726) -OUTPUT(NET_9734) -OUTPUT(NET_9735) -OUTPUT(NET_9743) -OUTPUT(NET_9755) -OUTPUT(NET_9756) -OUTPUT(NET_9779) -OUTPUT(NET_9781) -OUTPUT(NET_9782) -OUTPUT(NET_9791) -OUTPUT(NET_9792) -OUTPUT(NET_9793) -OUTPUT(NET_9803) -OUTPUT(NET_990) -OUTPUT(NET_991) -OUTPUT(NET_992) -new_n1035_ = NOT ( NET_456 ) -new_n1036_ = NOT ( NET_212 ) -new_n1037_ = NOT ( NET_457 ) -new_n1038_ = NOR ( new_n1037_, new_n1036_ ) -new_n1039_ = NAND ( new_n1038_, NET_211 ) -new_n1040_ = OR ( new_n1038_, NET_211 ) -new_n1041_ = NAND ( new_n1040_, new_n1039_, new_n1035_ ) -new_n1042_ = OR ( new_n1038_, new_n1035_, NET_211 ) -new_n1043_ = NOT ( NET_211 ) -new_n1044_ = NAND ( new_n1038_, NET_456 ) -new_n1045_ = OR ( new_n1044_, new_n1043_ ) -NET_1194 = NAND ( new_n1045_, new_n1042_, new_n1041_ ) -new_n1047_ = NOR ( NET_455, NET_210 ) -new_n1048_ = NOT ( NET_210 ) -new_n1049_ = NOT ( NET_455 ) -new_n1050_ = NOR ( new_n1049_, new_n1048_ ) -new_n1051_ = NOR ( new_n1050_, new_n1047_ ) -new_n1052_ = OR ( new_n1038_, NET_456 ) -new_n1053_ = NAND ( new_n1052_, NET_211 ) -new_n1054_ = NAND ( new_n1053_, new_n1044_ ) -NET_1359 = XOR ( new_n1054_, new_n1051_ ) -new_n1056_ = NOR ( NET_454, NET_209 ) -new_n1057_ = NOT ( NET_209 ) -new_n1058_ = NOT ( NET_454 ) -new_n1059_ = NOR ( new_n1058_, new_n1057_ ) -new_n1060_ = NOR ( new_n1059_, new_n1056_ ) -new_n1061_ = NOT ( new_n1047_ ) -new_n1062_ = AND ( new_n1054_, new_n1061_ ) -new_n1063_ = OR ( new_n1062_, new_n1050_ ) -NET_1545 = XOR ( new_n1063_, new_n1060_ ) -new_n1065_ = NOT ( NET_208 ) -new_n1066_ = NOT ( NET_453 ) -new_n1067_ = NOR ( new_n1066_, new_n1065_ ) -new_n1068_ = NOR ( NET_453, NET_208 ) -new_n1069_ = NOR ( new_n1068_, new_n1067_ ) -new_n1070_ = NOT ( new_n1056_ ) -new_n1071_ = AND ( new_n1063_, new_n1070_ ) -new_n1072_ = OR ( new_n1071_, new_n1059_ ) -NET_1673 = XOR ( new_n1072_, new_n1069_ ) -new_n1074_ = OR ( NET_438, NET_276, NET_193 ) -new_n1075_ = NOT ( NET_193 ) -new_n1076_ = NOT ( NET_438 ) -new_n1077_ = OR ( NET_521, new_n1076_, new_n1075_ ) -new_n1078_ = NAND ( new_n1077_, new_n1074_ ) -new_n1079_ = OR ( new_n1078_, NET_458 ) -new_n1080_ = NOT ( new_n1078_ ) -new_n1081_ = NOT ( NET_32 ) -new_n1082_ = OR ( new_n1078_, NET_213 ) -new_n1083_ = NOT ( NET_458 ) -new_n1084_ = NAND ( new_n1078_, new_n1083_ ) -new_n1085_ = NAND ( new_n1084_, new_n1082_ ) -new_n1086_ = OR ( new_n1085_, new_n1081_ ) -new_n1087_ = NAND ( new_n1085_, new_n1081_ ) -new_n1088_ = AND ( new_n1087_, new_n1086_ ) -new_n1089_ = OR ( new_n1088_, new_n1080_ ) -new_n1090_ = NAND ( new_n1089_, new_n1079_ ) -new_n1091_ = OR ( new_n1090_, NET_275 ) -new_n1092_ = NAND ( NET_33, NET_275 ) -NET_1680 = NAND ( new_n1092_, new_n1091_ ) -new_n1094_ = OR ( new_n1088_, new_n1078_ ) -new_n1095_ = NOT ( NET_213 ) -new_n1096_ = NAND ( new_n1078_, new_n1095_ ) -new_n1097_ = NAND ( new_n1096_, new_n1094_ ) -new_n1098_ = OR ( new_n1097_, NET_520 ) -new_n1099_ = NOT ( NET_278 ) -NET_23567 = NOT ( NET_520 ) -new_n1101_ = OR ( NET_23567, NET_309 ) -new_n1102_ = OR ( new_n1101_, new_n1099_ ) -new_n1103_ = NOT ( NET_309 ) -new_n1104_ = NOR ( NET_23567, new_n1103_ ) -new_n1105_ = NAND ( new_n1104_, NET_278 ) -NET_1688 = NAND ( new_n1105_, new_n1102_, new_n1098_ ) -new_n1107_ = OR ( new_n1078_, NET_459 ) -new_n1108_ = NOT ( NET_31 ) -new_n1109_ = OR ( new_n1078_, NET_214 ) -new_n1110_ = NOT ( NET_459 ) -new_n1111_ = NAND ( new_n1078_, new_n1110_ ) -new_n1112_ = NAND ( new_n1111_, new_n1109_ ) -new_n1113_ = OR ( new_n1112_, new_n1086_ ) -new_n1114_ = NAND ( new_n1112_, new_n1086_ ) -new_n1115_ = NAND ( new_n1114_, new_n1113_, new_n1108_ ) -new_n1116_ = OR ( new_n1114_, new_n1108_ ) -new_n1117_ = OR ( new_n1086_, new_n1108_ ) -new_n1118_ = OR ( new_n1117_, new_n1112_ ) -new_n1119_ = NAND ( new_n1118_, new_n1116_, new_n1115_ ) -new_n1120_ = OR ( new_n1119_, new_n1080_ ) -new_n1121_ = NAND ( new_n1120_, new_n1107_ ) -new_n1122_ = OR ( new_n1121_, NET_275 ) -new_n1123_ = NOT ( NET_34 ) -NET_23564 = NOT ( NET_275 ) -new_n1125_ = OR ( NET_64, NET_23564 ) -new_n1126_ = OR ( new_n1125_, new_n1123_ ) -new_n1127_ = NAND ( NET_64, NET_275 ) -new_n1128_ = NOR ( NET_34, NET_33 ) -new_n1129_ = NOT ( NET_33 ) -new_n1130_ = NOR ( new_n1123_, new_n1129_ ) -new_n1131_ = OR ( new_n1130_, new_n1128_ ) -new_n1132_ = OR ( new_n1131_, new_n1127_ ) -NET_1769 = NAND ( new_n1132_, new_n1126_, new_n1122_ ) -new_n1134_ = OR ( new_n1119_, new_n1078_ ) -new_n1135_ = NOT ( NET_214 ) -new_n1136_ = NAND ( new_n1078_, new_n1135_ ) -new_n1137_ = NAND ( new_n1136_, new_n1134_ ) -new_n1138_ = OR ( new_n1137_, NET_520 ) -new_n1139_ = NOT ( NET_279 ) -new_n1140_ = OR ( new_n1101_, new_n1139_ ) -new_n1141_ = NOT ( new_n1104_ ) -new_n1142_ = NOR ( NET_279, NET_278 ) -new_n1143_ = NOR ( new_n1139_, new_n1099_ ) -new_n1144_ = OR ( new_n1143_, new_n1142_ ) -new_n1145_ = OR ( new_n1144_, new_n1141_ ) -NET_1781 = NAND ( new_n1145_, new_n1140_, new_n1138_ ) -new_n1147_ = NOT ( NET_207 ) -new_n1148_ = NOT ( NET_452 ) -new_n1149_ = NOR ( new_n1148_, new_n1147_ ) -new_n1150_ = NOR ( NET_452, NET_207 ) -new_n1151_ = NOR ( new_n1150_, new_n1149_ ) -new_n1152_ = NOT ( new_n1068_ ) -new_n1153_ = AND ( new_n1072_, new_n1152_ ) -new_n1154_ = OR ( new_n1153_, new_n1067_ ) -NET_1813 = XOR ( new_n1154_, new_n1151_ ) -new_n1156_ = OR ( new_n1078_, NET_460 ) -new_n1157_ = AND ( new_n1086_, new_n1108_ ) -new_n1158_ = OR ( new_n1157_, new_n1112_ ) -new_n1159_ = NAND ( new_n1158_, new_n1117_ ) -new_n1160_ = NOT ( NET_30 ) -new_n1161_ = OR ( new_n1078_, NET_215 ) -new_n1162_ = NOT ( NET_460 ) -new_n1163_ = NAND ( new_n1078_, new_n1162_ ) -new_n1164_ = NAND ( new_n1163_, new_n1161_ ) -new_n1165_ = OR ( new_n1164_, new_n1160_ ) -new_n1166_ = NAND ( new_n1164_, new_n1160_ ) -new_n1167_ = NAND ( new_n1166_, new_n1165_ ) -new_n1168_ = XNOR ( new_n1167_, new_n1159_ ) -new_n1169_ = OR ( new_n1168_, new_n1080_ ) -new_n1170_ = NAND ( new_n1169_, new_n1156_ ) -new_n1171_ = OR ( new_n1170_, NET_275 ) -new_n1172_ = NOT ( NET_35 ) -new_n1173_ = OR ( new_n1125_, new_n1172_ ) -new_n1174_ = NOR ( new_n1128_, new_n1172_ ) -new_n1175_ = NOR ( NET_35, NET_34, NET_33 ) -new_n1176_ = OR ( new_n1175_, new_n1174_ ) -new_n1177_ = OR ( new_n1176_, new_n1127_ ) -NET_1881 = NAND ( new_n1177_, new_n1173_, new_n1171_ ) -new_n1179_ = OR ( new_n1168_, new_n1078_ ) -new_n1180_ = NOT ( NET_215 ) -new_n1181_ = NAND ( new_n1078_, new_n1180_ ) -new_n1182_ = NAND ( new_n1181_, new_n1179_ ) -new_n1183_ = OR ( new_n1182_, NET_520 ) -new_n1184_ = NOT ( NET_280 ) -new_n1185_ = OR ( new_n1101_, new_n1184_ ) -new_n1186_ = OR ( new_n1142_, new_n1184_ ) -new_n1187_ = NAND ( new_n1142_, new_n1184_ ) -new_n1188_ = NAND ( new_n1187_, new_n1186_ ) -new_n1189_ = OR ( new_n1188_, new_n1141_ ) -NET_1908 = NAND ( new_n1189_, new_n1185_, new_n1183_ ) -new_n1191_ = NOT ( NET_206 ) -new_n1192_ = NOT ( NET_451 ) -new_n1193_ = NOR ( new_n1192_, new_n1191_ ) -new_n1194_ = NOR ( NET_451, NET_206 ) -new_n1195_ = NOR ( new_n1194_, new_n1193_ ) -new_n1196_ = NOT ( new_n1150_ ) -new_n1197_ = AND ( new_n1154_, new_n1196_ ) -new_n1198_ = OR ( new_n1197_, new_n1149_ ) -NET_2053 = XOR ( new_n1198_, new_n1195_ ) -new_n1200_ = OR ( new_n1078_, NET_461 ) -new_n1201_ = NOT ( NET_29 ) -new_n1202_ = OR ( new_n1078_, NET_216 ) -new_n1203_ = NOT ( NET_461 ) -new_n1204_ = NAND ( new_n1078_, new_n1203_ ) -new_n1205_ = NAND ( new_n1204_, new_n1202_ ) -new_n1206_ = OR ( new_n1205_, new_n1201_ ) -new_n1207_ = NAND ( new_n1205_, new_n1201_ ) -new_n1208_ = NAND ( new_n1207_, new_n1206_ ) -new_n1209_ = NAND ( new_n1166_, new_n1159_ ) -new_n1210_ = NAND ( new_n1209_, new_n1165_ ) -new_n1211_ = XNOR ( new_n1210_, new_n1208_ ) -new_n1212_ = OR ( new_n1211_, new_n1080_ ) -new_n1213_ = NAND ( new_n1212_, new_n1200_ ) -new_n1214_ = OR ( new_n1213_, NET_275 ) -new_n1215_ = NOT ( NET_36 ) -new_n1216_ = OR ( new_n1125_, new_n1215_ ) -new_n1217_ = XOR ( new_n1175_, NET_36 ) -new_n1218_ = OR ( new_n1217_, new_n1127_ ) -NET_2058 = NAND ( new_n1218_, new_n1216_, new_n1214_ ) -new_n1220_ = OR ( new_n1211_, new_n1078_ ) -new_n1221_ = NOT ( NET_216 ) -new_n1222_ = NAND ( new_n1078_, new_n1221_ ) -new_n1223_ = NAND ( new_n1222_, new_n1220_ ) -new_n1224_ = OR ( new_n1223_, NET_520 ) -new_n1225_ = NOT ( NET_281 ) -new_n1226_ = OR ( new_n1101_, new_n1225_ ) -new_n1227_ = XOR ( new_n1187_, new_n1225_ ) -new_n1228_ = OR ( new_n1227_, new_n1141_ ) -NET_2107 = NAND ( new_n1228_, new_n1226_, new_n1224_ ) -new_n1230_ = NOR ( NET_64, NET_59 ) -new_n1231_ = NOT ( NET_54 ) -new_n1232_ = NOT ( NET_55 ) -new_n1233_ = NOR ( NET_37, NET_36 ) -new_n1234_ = NOR ( NET_39, NET_38 ) -new_n1235_ = NOR ( NET_41, NET_40 ) -new_n1236_ = AND ( new_n1235_, new_n1234_, new_n1233_, new_n1175_ ) -new_n1237_ = NOR ( NET_43, NET_42 ) -new_n1238_ = NOR ( NET_45, NET_44 ) -new_n1239_ = NOR ( NET_47, NET_46 ) -new_n1240_ = NAND ( new_n1239_, new_n1238_, new_n1237_, new_n1236_ ) -new_n1241_ = OR ( NET_49, NET_48 ) -new_n1242_ = OR ( NET_51, NET_50 ) -new_n1243_ = OR ( NET_53, NET_52 ) -new_n1244_ = NOR ( new_n1243_, new_n1242_, new_n1241_, new_n1240_ ) -new_n1245_ = NAND ( new_n1244_, new_n1232_, new_n1231_ ) -new_n1246_ = OR ( new_n1245_, NET_57, NET_56 ) -new_n1247_ = OR ( new_n1246_, NET_59, NET_58 ) -new_n1248_ = OR ( new_n1246_, NET_58 ) -new_n1249_ = NAND ( new_n1248_, NET_59 ) -new_n1250_ = NAND ( new_n1249_, new_n1247_ ) -new_n1251_ = AND ( new_n1250_, NET_64 ) -new_n1252_ = NOR ( new_n1251_, new_n1230_ ) -new_n1253_ = OR ( NET_64, NET_57 ) -new_n1254_ = NOT ( NET_56 ) -new_n1255_ = NAND ( new_n1244_, new_n1254_, new_n1232_, new_n1231_ ) -new_n1256_ = NAND ( new_n1255_, NET_57 ) -new_n1257_ = NAND ( new_n1256_, new_n1246_ ) -new_n1258_ = NAND ( new_n1257_, NET_64 ) -new_n1259_ = AND ( new_n1258_, new_n1253_ ) -new_n1260_ = NOR ( NET_64, NET_58 ) -new_n1261_ = NOT ( NET_64 ) -new_n1262_ = NAND ( new_n1246_, NET_58 ) -new_n1263_ = AND ( new_n1262_, new_n1248_ ) -new_n1264_ = NOR ( new_n1263_, new_n1261_ ) -new_n1265_ = NOR ( new_n1264_, new_n1260_ ) -new_n1266_ = NAND ( new_n1265_, new_n1259_, new_n1252_ ) -new_n1267_ = NOR ( NET_64, new_n1231_ ) -new_n1268_ = XOR ( new_n1244_, NET_54 ) -new_n1269_ = NOR ( new_n1268_, new_n1261_ ) -new_n1270_ = NOR ( new_n1269_, new_n1267_ ) -new_n1271_ = OR ( NET_64, new_n1232_ ) -new_n1272_ = NAND ( new_n1244_, new_n1231_ ) -new_n1273_ = NAND ( new_n1272_, NET_55 ) -new_n1274_ = NAND ( new_n1273_, new_n1245_ ) -new_n1275_ = OR ( new_n1274_, new_n1261_ ) -new_n1276_ = NAND ( new_n1275_, new_n1271_ ) -new_n1277_ = NOT ( new_n1276_ ) -new_n1278_ = NOR ( new_n1277_, new_n1270_ ) -new_n1279_ = NOT ( new_n1278_ ) -new_n1280_ = NAND ( new_n1279_, new_n1266_ ) -new_n1281_ = NOR ( NET_64, new_n1254_ ) -new_n1282_ = XOR ( new_n1245_, new_n1254_ ) -new_n1283_ = NOR ( new_n1282_, new_n1261_ ) -new_n1284_ = NOR ( new_n1283_, new_n1281_ ) -new_n1285_ = NAND ( new_n1284_, new_n1280_ ) -new_n1286_ = NOT ( NET_60 ) -new_n1287_ = OR ( NET_64, new_n1286_ ) -new_n1288_ = XOR ( new_n1247_, new_n1286_ ) -new_n1289_ = OR ( new_n1288_, new_n1261_ ) -new_n1290_ = NAND ( new_n1289_, new_n1287_ ) -new_n1291_ = NOT ( NET_61 ) -new_n1292_ = OR ( NET_64, new_n1291_ ) -new_n1293_ = OR ( new_n1247_, NET_61, NET_60 ) -new_n1294_ = NOR ( new_n1247_, NET_60 ) -new_n1295_ = OR ( new_n1294_, new_n1291_ ) -new_n1296_ = NAND ( new_n1295_, new_n1293_ ) -new_n1297_ = OR ( new_n1296_, new_n1261_ ) -new_n1298_ = NAND ( new_n1297_, new_n1292_ ) -new_n1299_ = NOR ( new_n1298_, new_n1290_ ) -new_n1300_ = NOT ( new_n1299_ ) -new_n1301_ = NAND ( new_n1300_, new_n1285_ ) -NET_23565 = NAND ( new_n1301_, NET_275 ) -new_n1303_ = NOT ( new_n1284_ ) -new_n1304_ = OR ( new_n1303_, new_n1266_ ) -NET_23566 = NOR ( new_n1304_, NET_23564 ) -new_n1306_ = NOT ( NET_301 ) -new_n1307_ = NOR ( NET_309, new_n1306_ ) -new_n1308_ = NOT ( NET_297 ) -new_n1309_ = NOT ( NET_298 ) -new_n1310_ = NOT ( NET_293 ) -new_n1311_ = NOT ( NET_294 ) -new_n1312_ = NOT ( NET_289 ) -new_n1313_ = NOT ( NET_290 ) -new_n1314_ = NOT ( NET_285 ) -new_n1315_ = NOT ( NET_286 ) -new_n1316_ = NOT ( NET_282 ) -new_n1317_ = NAND ( new_n1142_, new_n1316_, new_n1225_, new_n1184_ ) -new_n1318_ = NOR ( new_n1317_, NET_284, NET_283 ) -new_n1319_ = NAND ( new_n1318_, new_n1315_, new_n1314_ ) -new_n1320_ = NOR ( new_n1319_, NET_288, NET_287 ) -new_n1321_ = NAND ( new_n1320_, new_n1313_, new_n1312_ ) -new_n1322_ = NOR ( new_n1321_, NET_292, NET_291 ) -new_n1323_ = NAND ( new_n1322_, new_n1311_, new_n1310_ ) -new_n1324_ = NOR ( new_n1323_, NET_296, NET_295 ) -new_n1325_ = NAND ( new_n1324_, new_n1309_, new_n1308_ ) -new_n1326_ = NOR ( new_n1325_, NET_300, NET_299 ) -new_n1327_ = XOR ( new_n1326_, NET_301 ) -new_n1328_ = NOR ( new_n1327_, new_n1103_ ) -new_n1329_ = NOR ( new_n1328_, new_n1307_ ) -new_n1330_ = NOT ( new_n1329_ ) -new_n1331_ = NOT ( NET_304 ) -new_n1332_ = OR ( NET_309, new_n1331_ ) -new_n1333_ = NOT ( NET_302 ) -new_n1334_ = NAND ( new_n1326_, new_n1333_, new_n1306_ ) -new_n1335_ = NOR ( new_n1334_, NET_304, NET_303 ) -new_n1336_ = OR ( new_n1334_, NET_303 ) -new_n1337_ = AND ( new_n1336_, NET_304 ) -new_n1338_ = OR ( new_n1337_, new_n1335_ ) -new_n1339_ = OR ( new_n1338_, new_n1103_ ) -new_n1340_ = NAND ( new_n1339_, new_n1332_ ) -new_n1341_ = OR ( NET_309, new_n1333_ ) -new_n1342_ = NAND ( new_n1326_, new_n1306_ ) -new_n1343_ = NAND ( new_n1342_, NET_302 ) -new_n1344_ = NAND ( new_n1343_, new_n1334_ ) -new_n1345_ = OR ( new_n1344_, new_n1103_ ) -new_n1346_ = NAND ( new_n1345_, new_n1341_ ) -new_n1347_ = NOR ( NET_309, NET_303 ) -new_n1348_ = NOT ( NET_303 ) -new_n1349_ = XOR ( new_n1334_, new_n1348_ ) -new_n1350_ = AND ( new_n1349_, NET_309 ) -new_n1351_ = NOR ( new_n1350_, new_n1347_ ) -new_n1352_ = NAND ( new_n1351_, new_n1346_, new_n1340_ ) -new_n1353_ = NOR ( new_n1352_, new_n1330_ ) -new_n1354_ = NOT ( new_n1353_ ) -NET_23568 = NOR ( new_n1354_, NET_23567 ) -new_n1356_ = NOR ( NET_450, NET_205 ) -new_n1357_ = NOT ( NET_205 ) -new_n1358_ = NOT ( NET_450 ) -new_n1359_ = NOR ( new_n1358_, new_n1357_ ) -new_n1360_ = NOR ( new_n1359_, new_n1356_ ) -new_n1361_ = NOT ( new_n1194_ ) -new_n1362_ = AND ( new_n1198_, new_n1361_ ) -new_n1363_ = OR ( new_n1362_, new_n1193_ ) -NET_2381 = XOR ( new_n1363_, new_n1360_ ) -new_n1365_ = OR ( new_n1078_, NET_462 ) -new_n1366_ = NOT ( NET_28 ) -new_n1367_ = OR ( new_n1078_, NET_217 ) -new_n1368_ = NOT ( NET_462 ) -new_n1369_ = NAND ( new_n1078_, new_n1368_ ) -new_n1370_ = NAND ( new_n1369_, new_n1367_ ) -new_n1371_ = OR ( new_n1370_, new_n1366_ ) -new_n1372_ = NAND ( new_n1370_, new_n1366_ ) -new_n1373_ = NAND ( new_n1372_, new_n1371_ ) -new_n1374_ = NAND ( new_n1210_, new_n1207_ ) -new_n1375_ = NAND ( new_n1374_, new_n1206_ ) -new_n1376_ = XNOR ( new_n1375_, new_n1373_ ) -new_n1377_ = OR ( new_n1376_, new_n1080_ ) -new_n1378_ = NAND ( new_n1377_, new_n1365_ ) -new_n1379_ = OR ( new_n1378_, NET_275 ) -new_n1380_ = NAND ( new_n1261_, NET_37, NET_275 ) -new_n1381_ = NAND ( new_n1233_, new_n1175_ ) -new_n1382_ = NAND ( new_n1175_, new_n1215_ ) -new_n1383_ = NAND ( new_n1382_, NET_37 ) -new_n1384_ = NAND ( new_n1383_, new_n1381_ ) -new_n1385_ = OR ( new_n1384_, new_n1127_ ) -NET_2682 = NAND ( new_n1385_, new_n1380_, new_n1379_ ) -new_n1387_ = OR ( new_n1376_, new_n1078_ ) -new_n1388_ = NOT ( NET_217 ) -new_n1389_ = NAND ( new_n1078_, new_n1388_ ) -new_n1390_ = NAND ( new_n1389_, new_n1387_ ) -new_n1391_ = OR ( new_n1390_, NET_520 ) -new_n1392_ = OR ( new_n1101_, new_n1316_ ) -new_n1393_ = NOR ( new_n1187_, NET_281 ) -new_n1394_ = OR ( new_n1393_, new_n1316_ ) -new_n1395_ = NAND ( new_n1394_, new_n1317_ ) -new_n1396_ = OR ( new_n1395_, new_n1141_ ) -NET_2731 = NAND ( new_n1396_, new_n1392_, new_n1391_ ) -new_n1398_ = NOR ( NET_449, NET_204 ) -new_n1399_ = NOT ( NET_204 ) -new_n1400_ = NOT ( NET_449 ) -new_n1401_ = NOR ( new_n1400_, new_n1399_ ) -new_n1402_ = NOR ( new_n1401_, new_n1398_ ) -new_n1403_ = NOT ( new_n1356_ ) -new_n1404_ = AND ( new_n1363_, new_n1403_ ) -new_n1405_ = OR ( new_n1404_, new_n1359_ ) -NET_2878 = XOR ( new_n1405_, new_n1402_ ) -new_n1407_ = NOT ( NET_306 ) -new_n1408_ = OR ( NET_309, new_n1407_ ) -new_n1409_ = NOT ( NET_305 ) -new_n1410_ = NAND ( new_n1335_, new_n1407_, new_n1409_ ) -new_n1411_ = NAND ( new_n1335_, new_n1409_ ) -new_n1412_ = NAND ( new_n1411_, NET_306 ) -new_n1413_ = NAND ( new_n1412_, new_n1410_ ) -new_n1414_ = OR ( new_n1413_, new_n1103_ ) -new_n1415_ = NAND ( new_n1414_, new_n1408_ ) -new_n1416_ = OR ( NET_309, new_n1409_ ) -new_n1417_ = XOR ( new_n1335_, NET_305 ) -new_n1418_ = OR ( new_n1417_, new_n1103_ ) -new_n1419_ = NAND ( new_n1418_, new_n1416_ ) -new_n1420_ = NOR ( new_n1419_, new_n1415_ ) -new_n1421_ = NOT ( new_n1420_ ) -new_n1422_ = NOT ( NET_299 ) -new_n1423_ = NOR ( NET_309, new_n1422_ ) -new_n1424_ = XOR ( new_n1325_, new_n1422_ ) -new_n1425_ = NOR ( new_n1424_, new_n1103_ ) -new_n1426_ = NOR ( new_n1425_, new_n1423_ ) -new_n1427_ = NOT ( NET_300 ) -new_n1428_ = OR ( NET_309, new_n1427_ ) -new_n1429_ = NOR ( new_n1325_, NET_299 ) -new_n1430_ = NOR ( new_n1429_, new_n1427_ ) -new_n1431_ = OR ( new_n1430_, new_n1326_ ) -new_n1432_ = OR ( new_n1431_, new_n1103_ ) -new_n1433_ = NAND ( new_n1432_, new_n1428_ ) -new_n1434_ = NOT ( new_n1433_ ) -new_n1435_ = NOR ( new_n1434_, new_n1426_ ) -new_n1436_ = NOT ( new_n1435_ ) -new_n1437_ = NAND ( new_n1436_, new_n1421_, new_n1352_ ) -new_n1438_ = OR ( new_n1420_, new_n1329_ ) -NET_3045 = NAND ( new_n1438_, new_n1437_, NET_520 ) -new_n1440_ = NOT ( NET_67 ) -new_n1441_ = NOR ( new_n1303_, NET_23564 ) -new_n1442_ = NAND ( new_n1441_, new_n1266_ ) -new_n1443_ = NOR ( new_n1259_, NET_245 ) -new_n1444_ = AND ( new_n1259_, NET_245 ) -new_n1445_ = OR ( new_n1444_, new_n1443_, new_n1265_ ) -new_n1446_ = NOT ( NET_59 ) -new_n1447_ = OR ( NET_64, new_n1446_ ) -new_n1448_ = OR ( new_n1250_, new_n1261_ ) -new_n1449_ = NAND ( new_n1448_, new_n1447_ ) -new_n1450_ = AND ( new_n1449_, new_n1445_ ) -new_n1451_ = NOR ( new_n1450_, new_n1442_ ) -NET_3257 = NOR ( new_n1451_, new_n1440_ ) -new_n1453_ = NOT ( NET_68 ) -NET_3258 = NOR ( new_n1451_, new_n1453_ ) -new_n1455_ = NOT ( NET_69 ) -NET_3259 = NOR ( new_n1451_, new_n1455_ ) -new_n1457_ = NOT ( NET_70 ) -NET_3260 = NOR ( new_n1451_, new_n1457_ ) -new_n1459_ = NOT ( NET_71 ) -NET_3261 = NOR ( new_n1451_, new_n1459_ ) -new_n1461_ = NOT ( NET_72 ) -NET_3262 = NOR ( new_n1451_, new_n1461_ ) -new_n1463_ = NOT ( NET_73 ) -NET_3263 = NOR ( new_n1451_, new_n1463_ ) -new_n1465_ = NOT ( NET_74 ) -NET_3264 = NOR ( new_n1451_, new_n1465_ ) -new_n1467_ = NOT ( NET_75 ) -NET_3265 = NOR ( new_n1451_, new_n1467_ ) -new_n1469_ = NOT ( NET_76 ) -NET_3266 = NOR ( new_n1451_, new_n1469_ ) -new_n1471_ = NOT ( NET_77 ) -NET_3267 = NOR ( new_n1451_, new_n1471_ ) -new_n1473_ = NOT ( NET_78 ) -NET_3268 = NOR ( new_n1451_, new_n1473_ ) -new_n1475_ = NOT ( NET_79 ) -NET_3269 = NOR ( new_n1451_, new_n1475_ ) -new_n1477_ = NOT ( NET_80 ) -NET_3270 = NOR ( new_n1451_, new_n1477_ ) -new_n1479_ = NOT ( NET_81 ) -NET_3271 = NOR ( new_n1451_, new_n1479_ ) -new_n1481_ = NOT ( NET_82 ) -NET_3272 = NOR ( new_n1451_, new_n1481_ ) -new_n1483_ = NOT ( NET_83 ) -NET_3273 = NOR ( new_n1451_, new_n1483_ ) -new_n1485_ = NOT ( NET_84 ) -NET_3274 = NOR ( new_n1451_, new_n1485_ ) -new_n1487_ = NOT ( NET_85 ) -NET_3275 = NOR ( new_n1451_, new_n1487_ ) -new_n1489_ = NOT ( NET_86 ) -NET_3276 = NOR ( new_n1451_, new_n1489_ ) -new_n1491_ = NOT ( NET_87 ) -NET_3277 = NOR ( new_n1451_, new_n1491_ ) -new_n1493_ = NOT ( NET_88 ) -NET_3278 = NOR ( new_n1451_, new_n1493_ ) -new_n1495_ = NOT ( NET_89 ) -NET_3279 = NOR ( new_n1451_, new_n1495_ ) -new_n1497_ = NOT ( NET_90 ) -NET_3280 = NOR ( new_n1451_, new_n1497_ ) -new_n1499_ = NOT ( NET_91 ) -NET_3281 = NOR ( new_n1451_, new_n1499_ ) -new_n1501_ = NOT ( NET_92 ) -NET_3282 = NOR ( new_n1451_, new_n1501_ ) -new_n1503_ = NOT ( NET_93 ) -NET_3283 = NOR ( new_n1451_, new_n1503_ ) -new_n1505_ = NOT ( NET_94 ) -NET_3284 = NOR ( new_n1451_, new_n1505_ ) -new_n1507_ = NOT ( NET_95 ) -NET_3285 = NOR ( new_n1451_, new_n1507_ ) -new_n1509_ = NOT ( NET_96 ) -NET_3286 = NOR ( new_n1451_, new_n1509_ ) -new_n1511_ = NOT ( NET_312 ) -new_n1512_ = NOR ( new_n1330_, NET_23567 ) -new_n1513_ = NAND ( new_n1512_, new_n1352_ ) -new_n1514_ = NOT ( new_n1513_ ) -new_n1515_ = AND ( new_n1346_, NET_490 ) -new_n1516_ = NOR ( new_n1346_, NET_490 ) -new_n1517_ = OR ( new_n1516_, new_n1515_, new_n1351_ ) -new_n1518_ = NAND ( new_n1517_, new_n1340_ ) -new_n1519_ = AND ( new_n1518_, new_n1514_ ) -NET_3387 = NOR ( new_n1519_, new_n1511_ ) -new_n1521_ = NOT ( NET_313 ) -NET_3388 = NOR ( new_n1519_, new_n1521_ ) -new_n1523_ = NOT ( NET_314 ) -NET_3389 = NOR ( new_n1519_, new_n1523_ ) -new_n1525_ = NOT ( NET_315 ) -NET_3390 = NOR ( new_n1519_, new_n1525_ ) -new_n1527_ = NOT ( NET_316 ) -NET_3391 = NOR ( new_n1519_, new_n1527_ ) -new_n1529_ = NOT ( NET_317 ) -NET_3392 = NOR ( new_n1519_, new_n1529_ ) -new_n1531_ = NOT ( NET_318 ) -NET_3393 = NOR ( new_n1519_, new_n1531_ ) -new_n1533_ = NOT ( NET_319 ) -NET_3394 = NOR ( new_n1519_, new_n1533_ ) -new_n1535_ = NOT ( NET_320 ) -NET_3395 = NOR ( new_n1519_, new_n1535_ ) -new_n1537_ = NOT ( NET_321 ) -NET_3396 = NOR ( new_n1519_, new_n1537_ ) -new_n1539_ = NOT ( NET_322 ) -NET_3397 = NOR ( new_n1519_, new_n1539_ ) -new_n1541_ = NOT ( NET_323 ) -NET_3398 = NOR ( new_n1519_, new_n1541_ ) -new_n1543_ = NOT ( NET_324 ) -NET_3399 = NOR ( new_n1519_, new_n1543_ ) -new_n1545_ = NOT ( NET_325 ) -NET_3400 = NOR ( new_n1519_, new_n1545_ ) -new_n1547_ = NOT ( NET_326 ) -NET_3401 = NOR ( new_n1519_, new_n1547_ ) -new_n1549_ = NOT ( NET_327 ) -NET_3402 = NOR ( new_n1519_, new_n1549_ ) -new_n1551_ = NOT ( NET_328 ) -NET_3403 = NOR ( new_n1519_, new_n1551_ ) -new_n1553_ = NOT ( NET_329 ) -NET_3404 = NOR ( new_n1519_, new_n1553_ ) -new_n1555_ = NOT ( NET_330 ) -NET_3405 = NOR ( new_n1519_, new_n1555_ ) -new_n1557_ = NOT ( NET_331 ) -NET_3406 = NOR ( new_n1519_, new_n1557_ ) -new_n1559_ = NOT ( NET_332 ) -NET_3407 = NOR ( new_n1519_, new_n1559_ ) -new_n1561_ = NOT ( NET_333 ) -NET_3408 = NOR ( new_n1519_, new_n1561_ ) -new_n1563_ = NOT ( NET_334 ) -NET_3409 = NOR ( new_n1519_, new_n1563_ ) -new_n1565_ = NOT ( NET_335 ) -NET_3410 = NOR ( new_n1519_, new_n1565_ ) -new_n1567_ = NOT ( NET_336 ) -NET_3411 = NOR ( new_n1519_, new_n1567_ ) -new_n1569_ = NOT ( NET_337 ) -NET_3412 = NOR ( new_n1519_, new_n1569_ ) -new_n1571_ = NOT ( NET_338 ) -NET_3413 = NOR ( new_n1519_, new_n1571_ ) -new_n1573_ = NOT ( NET_339 ) -NET_3414 = NOR ( new_n1519_, new_n1573_ ) -new_n1575_ = NOT ( NET_340 ) -NET_3415 = NOR ( new_n1519_, new_n1575_ ) -new_n1577_ = NOT ( NET_341 ) -NET_3416 = NOR ( new_n1519_, new_n1577_ ) -new_n1579_ = NOT ( NET_489 ) -new_n1580_ = OR ( NET_23568, new_n1579_ ) -new_n1581_ = NOT ( NET_405 ) -new_n1582_ = NOT ( NET_307 ) -new_n1583_ = NOR ( NET_308, new_n1582_ ) -new_n1584_ = OR ( new_n1583_, NET_309 ) -new_n1585_ = XOR ( new_n1410_, new_n1582_ ) -new_n1586_ = NOT ( new_n1585_ ) -new_n1587_ = NOR ( new_n1410_, NET_307 ) -new_n1588_ = XOR ( new_n1587_, NET_308 ) -new_n1589_ = NAND ( new_n1588_, new_n1586_ ) -new_n1590_ = NAND ( new_n1589_, NET_309 ) -new_n1591_ = NAND ( new_n1590_, new_n1584_ ) -new_n1592_ = OR ( new_n1591_, new_n1581_ ) -new_n1593_ = NOT ( NET_308 ) -new_n1594_ = NOR ( new_n1593_, NET_307 ) -new_n1595_ = OR ( new_n1594_, NET_309 ) -new_n1596_ = NOR ( new_n1588_, new_n1586_ ) -new_n1597_ = OR ( new_n1596_, new_n1103_ ) -new_n1598_ = NAND ( new_n1597_, new_n1595_, NET_437 ) -new_n1599_ = NOT ( NET_373 ) -new_n1600_ = NOR ( NET_308, NET_307 ) -new_n1601_ = OR ( new_n1600_, NET_309 ) -new_n1602_ = NAND ( new_n1588_, new_n1585_ ) -new_n1603_ = NAND ( new_n1602_, NET_309 ) -new_n1604_ = NAND ( new_n1603_, new_n1601_ ) -new_n1605_ = OR ( new_n1604_, new_n1599_ ) -new_n1606_ = NAND ( new_n1605_, new_n1598_, new_n1592_ ) -new_n1607_ = NAND ( new_n1606_, NET_23568 ) -NET_3420 = NAND ( new_n1607_, new_n1580_ ) -new_n1609_ = NOT ( NET_488 ) -new_n1610_ = OR ( NET_23568, new_n1609_ ) -new_n1611_ = NOT ( NET_404 ) -new_n1612_ = OR ( new_n1591_, new_n1611_ ) -new_n1613_ = NAND ( new_n1597_, new_n1595_, NET_436 ) -new_n1614_ = NOT ( NET_372 ) -new_n1615_ = OR ( new_n1604_, new_n1614_ ) -new_n1616_ = NAND ( new_n1615_, new_n1613_, new_n1612_ ) -new_n1617_ = NAND ( new_n1616_, NET_23568 ) -NET_3421 = NAND ( new_n1617_, new_n1610_ ) -new_n1619_ = NOT ( NET_480 ) -new_n1620_ = OR ( NET_23568, new_n1619_ ) -new_n1621_ = NOT ( NET_497 ) -new_n1622_ = NOT ( NET_509 ) -new_n1623_ = NOT ( NET_513 ) -new_n1624_ = NOT ( NET_494 ) -new_n1625_ = NOT ( NET_506 ) -new_n1626_ = NOT ( NET_491 ) -new_n1627_ = NOT ( NET_498 ) -new_n1628_ = NOT ( NET_508 ) -new_n1629_ = NOT ( NET_515 ) -new_n1630_ = NOT ( NET_501 ) -new_n1631_ = NOT ( NET_519 ) -new_n1632_ = NOT ( NET_493 ) -new_n1633_ = NOT ( NET_505 ) -new_n1634_ = NAND ( NET_514, NET_502 ) -new_n1635_ = OR ( new_n1634_, new_n1633_ ) -new_n1636_ = OR ( new_n1635_, new_n1632_ ) -new_n1637_ = NOR ( new_n1636_, new_n1631_ ) -new_n1638_ = NAND ( new_n1637_, NET_511 ) -new_n1639_ = OR ( new_n1638_, new_n1630_ ) -new_n1640_ = NOR ( new_n1639_, new_n1629_ ) -new_n1641_ = NAND ( new_n1640_, NET_496 ) -new_n1642_ = OR ( new_n1641_, new_n1628_ ) -new_n1643_ = NOR ( new_n1642_, new_n1627_ ) -new_n1644_ = NAND ( new_n1643_, NET_517 ) -new_n1645_ = OR ( new_n1644_, new_n1626_ ) -new_n1646_ = NOR ( new_n1645_, new_n1625_ ) -new_n1647_ = NAND ( new_n1646_, NET_504 ) -new_n1648_ = OR ( new_n1647_, new_n1624_ ) -new_n1649_ = NOR ( new_n1648_, new_n1623_ ) -new_n1650_ = NAND ( new_n1649_, NET_499 ) -new_n1651_ = OR ( new_n1650_, new_n1622_ ) -new_n1652_ = AND ( new_n1651_, new_n1621_ ) -new_n1653_ = NOR ( new_n1651_, new_n1621_ ) -new_n1654_ = NOR ( new_n1653_, new_n1652_ ) -new_n1655_ = NAND ( new_n1103_, NET_308, NET_307 ) -new_n1656_ = OR ( new_n1588_, new_n1585_, new_n1103_ ) -new_n1657_ = NAND ( new_n1656_, new_n1655_ ) -new_n1658_ = NAND ( new_n1657_, new_n1654_ ) -new_n1659_ = NOT ( NET_364 ) -new_n1660_ = OR ( new_n1604_, new_n1659_ ) -new_n1661_ = NOT ( NET_396 ) -new_n1662_ = OR ( new_n1591_, new_n1661_ ) -new_n1663_ = NAND ( new_n1597_, new_n1595_, NET_428 ) -new_n1664_ = NAND ( new_n1663_, new_n1662_, new_n1660_, new_n1658_ ) -new_n1665_ = NAND ( new_n1664_, NET_23568 ) -NET_3422 = NAND ( new_n1665_, new_n1620_ ) -new_n1667_ = NOT ( NET_479 ) -new_n1668_ = OR ( NET_23568, new_n1667_ ) -new_n1669_ = NAND ( new_n1650_, new_n1622_ ) -new_n1670_ = AND ( new_n1669_, new_n1651_ ) -new_n1671_ = NAND ( new_n1670_, new_n1657_ ) -new_n1672_ = NOT ( NET_363 ) -new_n1673_ = OR ( new_n1604_, new_n1672_ ) -new_n1674_ = NOT ( NET_395 ) -new_n1675_ = OR ( new_n1591_, new_n1674_ ) -new_n1676_ = NAND ( new_n1597_, new_n1595_, NET_427 ) -new_n1677_ = NAND ( new_n1676_, new_n1675_, new_n1673_, new_n1671_ ) -new_n1678_ = NAND ( new_n1677_, NET_23568 ) -NET_3423 = NAND ( new_n1678_, new_n1668_ ) -new_n1680_ = NOT ( NET_478 ) -new_n1681_ = OR ( NET_23568, new_n1680_ ) -new_n1682_ = OR ( new_n1649_, NET_499 ) -new_n1683_ = AND ( new_n1682_, new_n1650_ ) -new_n1684_ = NAND ( new_n1683_, new_n1657_ ) -new_n1685_ = NOT ( NET_362 ) -new_n1686_ = OR ( new_n1604_, new_n1685_ ) -new_n1687_ = NOT ( NET_394 ) -new_n1688_ = OR ( new_n1591_, new_n1687_ ) -new_n1689_ = NAND ( new_n1597_, new_n1595_, NET_426 ) -new_n1690_ = NAND ( new_n1689_, new_n1688_, new_n1686_, new_n1684_ ) -new_n1691_ = NAND ( new_n1690_, NET_23568 ) -NET_3424 = NAND ( new_n1691_, new_n1681_ ) -new_n1693_ = NOT ( NET_477 ) -new_n1694_ = OR ( NET_23568, new_n1693_ ) -new_n1695_ = NOT ( NET_393 ) -new_n1696_ = OR ( new_n1591_, new_n1695_ ) -new_n1697_ = AND ( new_n1648_, new_n1623_ ) -new_n1698_ = NOR ( new_n1697_, new_n1649_ ) -new_n1699_ = NAND ( new_n1698_, new_n1657_ ) -new_n1700_ = NOT ( NET_425 ) -new_n1701_ = NAND ( new_n1597_, new_n1595_ ) -new_n1702_ = OR ( new_n1701_, new_n1700_ ) -new_n1703_ = NOT ( NET_361 ) -new_n1704_ = OR ( new_n1604_, new_n1703_ ) -new_n1705_ = NAND ( new_n1704_, new_n1702_, new_n1699_, new_n1696_ ) -new_n1706_ = NAND ( new_n1705_, NET_23568 ) -NET_3425 = NAND ( new_n1706_, new_n1694_ ) -new_n1708_ = NOT ( NET_476 ) -new_n1709_ = OR ( NET_23568, new_n1708_ ) -new_n1710_ = NOT ( NET_392 ) -new_n1711_ = OR ( new_n1591_, new_n1710_ ) -new_n1712_ = NAND ( new_n1647_, new_n1624_ ) -new_n1713_ = AND ( new_n1712_, new_n1648_ ) -new_n1714_ = NAND ( new_n1713_, new_n1657_ ) -new_n1715_ = NOT ( NET_424 ) -new_n1716_ = OR ( new_n1701_, new_n1715_ ) -new_n1717_ = NOT ( NET_360 ) -new_n1718_ = OR ( new_n1604_, new_n1717_ ) -new_n1719_ = NAND ( new_n1718_, new_n1716_, new_n1714_, new_n1711_ ) -new_n1720_ = NAND ( new_n1719_, NET_23568 ) -NET_3426 = NAND ( new_n1720_, new_n1709_ ) -new_n1722_ = NOT ( NET_475 ) -new_n1723_ = OR ( NET_23568, new_n1722_ ) -new_n1724_ = NOT ( NET_391 ) -new_n1725_ = OR ( new_n1591_, new_n1724_ ) -new_n1726_ = OR ( new_n1646_, NET_504 ) -new_n1727_ = AND ( new_n1726_, new_n1647_ ) -new_n1728_ = NAND ( new_n1727_, new_n1657_ ) -new_n1729_ = NOT ( NET_423 ) -new_n1730_ = OR ( new_n1701_, new_n1729_ ) -new_n1731_ = NOT ( NET_359 ) -new_n1732_ = OR ( new_n1604_, new_n1731_ ) -new_n1733_ = NAND ( new_n1732_, new_n1730_, new_n1728_, new_n1725_ ) -new_n1734_ = NAND ( new_n1733_, NET_23568 ) -NET_3427 = NAND ( new_n1734_, new_n1723_ ) -new_n1736_ = NOT ( NET_474 ) -new_n1737_ = OR ( NET_23568, new_n1736_ ) -new_n1738_ = NOT ( NET_390 ) -new_n1739_ = OR ( new_n1591_, new_n1738_ ) -new_n1740_ = AND ( new_n1645_, new_n1625_ ) -new_n1741_ = NOR ( new_n1740_, new_n1646_ ) -new_n1742_ = NAND ( new_n1741_, new_n1657_ ) -new_n1743_ = NOT ( NET_422 ) -new_n1744_ = OR ( new_n1701_, new_n1743_ ) -new_n1745_ = NOT ( NET_358 ) -new_n1746_ = OR ( new_n1604_, new_n1745_ ) -new_n1747_ = NAND ( new_n1746_, new_n1744_, new_n1742_, new_n1739_ ) -new_n1748_ = NAND ( new_n1747_, NET_23568 ) -NET_3428 = NAND ( new_n1748_, new_n1737_ ) -new_n1750_ = NOT ( NET_473 ) -new_n1751_ = OR ( NET_23568, new_n1750_ ) -new_n1752_ = NOT ( NET_389 ) -new_n1753_ = OR ( new_n1591_, new_n1752_ ) -new_n1754_ = NAND ( new_n1644_, new_n1626_ ) -new_n1755_ = AND ( new_n1754_, new_n1645_ ) -new_n1756_ = NAND ( new_n1755_, new_n1657_ ) -new_n1757_ = NOT ( NET_421 ) -new_n1758_ = OR ( new_n1701_, new_n1757_ ) -new_n1759_ = NOT ( NET_357 ) -new_n1760_ = OR ( new_n1604_, new_n1759_ ) -new_n1761_ = NAND ( new_n1760_, new_n1758_, new_n1756_, new_n1753_ ) -new_n1762_ = NAND ( new_n1761_, NET_23568 ) -NET_3429 = NAND ( new_n1762_, new_n1751_ ) -new_n1764_ = NOT ( NET_472 ) -new_n1765_ = OR ( NET_23568, new_n1764_ ) -new_n1766_ = NOT ( NET_388 ) -new_n1767_ = OR ( new_n1591_, new_n1766_ ) -new_n1768_ = OR ( new_n1643_, NET_517 ) -new_n1769_ = AND ( new_n1768_, new_n1644_ ) -new_n1770_ = NAND ( new_n1769_, new_n1657_ ) -new_n1771_ = NOT ( NET_420 ) -new_n1772_ = OR ( new_n1701_, new_n1771_ ) -new_n1773_ = NOT ( NET_356 ) -new_n1774_ = OR ( new_n1604_, new_n1773_ ) -new_n1775_ = NAND ( new_n1774_, new_n1772_, new_n1770_, new_n1767_ ) -new_n1776_ = NAND ( new_n1775_, NET_23568 ) -NET_3430 = NAND ( new_n1776_, new_n1765_ ) -new_n1778_ = NOT ( NET_471 ) -new_n1779_ = OR ( NET_23568, new_n1778_ ) -new_n1780_ = NOT ( NET_387 ) -new_n1781_ = OR ( new_n1591_, new_n1780_ ) -new_n1782_ = AND ( new_n1642_, new_n1627_ ) -new_n1783_ = NOR ( new_n1782_, new_n1643_ ) -new_n1784_ = NAND ( new_n1783_, new_n1657_ ) -new_n1785_ = NOT ( NET_419 ) -new_n1786_ = OR ( new_n1701_, new_n1785_ ) -new_n1787_ = NOT ( NET_355 ) -new_n1788_ = OR ( new_n1604_, new_n1787_ ) -new_n1789_ = NAND ( new_n1788_, new_n1786_, new_n1784_, new_n1781_ ) -new_n1790_ = NAND ( new_n1789_, NET_23568 ) -NET_3431 = NAND ( new_n1790_, new_n1779_ ) -new_n1792_ = NOT ( NET_470 ) -new_n1793_ = OR ( NET_23568, new_n1792_ ) -new_n1794_ = NOT ( NET_386 ) -new_n1795_ = OR ( new_n1591_, new_n1794_ ) -new_n1796_ = NAND ( new_n1641_, new_n1628_ ) -new_n1797_ = AND ( new_n1796_, new_n1642_ ) -new_n1798_ = NAND ( new_n1797_, new_n1657_ ) -new_n1799_ = NOT ( NET_418 ) -new_n1800_ = OR ( new_n1701_, new_n1799_ ) -new_n1801_ = NOT ( NET_354 ) -new_n1802_ = OR ( new_n1604_, new_n1801_ ) -new_n1803_ = NAND ( new_n1802_, new_n1800_, new_n1798_, new_n1795_ ) -new_n1804_ = NAND ( new_n1803_, NET_23568 ) -NET_3432 = NAND ( new_n1804_, new_n1793_ ) -new_n1806_ = NOT ( NET_469 ) -new_n1807_ = OR ( NET_23568, new_n1806_ ) -new_n1808_ = NOT ( NET_385 ) -new_n1809_ = OR ( new_n1591_, new_n1808_ ) -new_n1810_ = OR ( new_n1640_, NET_496 ) -new_n1811_ = AND ( new_n1810_, new_n1641_ ) -new_n1812_ = NAND ( new_n1811_, new_n1657_ ) -new_n1813_ = NOT ( NET_417 ) -new_n1814_ = OR ( new_n1701_, new_n1813_ ) -new_n1815_ = NOT ( NET_353 ) -new_n1816_ = OR ( new_n1604_, new_n1815_ ) -new_n1817_ = NAND ( new_n1816_, new_n1814_, new_n1812_, new_n1809_ ) -new_n1818_ = NAND ( new_n1817_, NET_23568 ) -NET_3433 = NAND ( new_n1818_, new_n1807_ ) -new_n1820_ = NOT ( NET_468 ) -new_n1821_ = OR ( NET_23568, new_n1820_ ) -new_n1822_ = NOT ( NET_384 ) -new_n1823_ = OR ( new_n1591_, new_n1822_ ) -new_n1824_ = AND ( new_n1639_, new_n1629_ ) -new_n1825_ = NOR ( new_n1824_, new_n1640_ ) -new_n1826_ = NAND ( new_n1825_, new_n1657_ ) -new_n1827_ = NOT ( NET_416 ) -new_n1828_ = OR ( new_n1701_, new_n1827_ ) -new_n1829_ = NOT ( NET_352 ) -new_n1830_ = OR ( new_n1604_, new_n1829_ ) -new_n1831_ = NAND ( new_n1830_, new_n1828_, new_n1826_, new_n1823_ ) -new_n1832_ = NAND ( new_n1831_, NET_23568 ) -NET_3434 = NAND ( new_n1832_, new_n1821_ ) -new_n1834_ = NOT ( NET_467 ) -new_n1835_ = OR ( NET_23568, new_n1834_ ) -new_n1836_ = NOT ( NET_383 ) -new_n1837_ = OR ( new_n1591_, new_n1836_ ) -new_n1838_ = NAND ( new_n1638_, new_n1630_ ) -new_n1839_ = AND ( new_n1838_, new_n1639_ ) -new_n1840_ = NAND ( new_n1839_, new_n1657_ ) -new_n1841_ = NOT ( NET_415 ) -new_n1842_ = OR ( new_n1701_, new_n1841_ ) -new_n1843_ = NOT ( NET_351 ) -new_n1844_ = OR ( new_n1604_, new_n1843_ ) -new_n1845_ = NAND ( new_n1844_, new_n1842_, new_n1840_, new_n1837_ ) -new_n1846_ = NAND ( new_n1845_, NET_23568 ) -NET_3435 = NAND ( new_n1846_, new_n1835_ ) -new_n1848_ = NOT ( NET_466 ) -new_n1849_ = OR ( NET_23568, new_n1848_ ) -new_n1850_ = NOT ( NET_382 ) -new_n1851_ = OR ( new_n1591_, new_n1850_ ) -new_n1852_ = OR ( new_n1637_, NET_511 ) -new_n1853_ = AND ( new_n1852_, new_n1638_ ) -new_n1854_ = NAND ( new_n1853_, new_n1657_ ) -new_n1855_ = NOT ( NET_414 ) -new_n1856_ = OR ( new_n1701_, new_n1855_ ) -new_n1857_ = NOT ( NET_350 ) -new_n1858_ = OR ( new_n1604_, new_n1857_ ) -new_n1859_ = NAND ( new_n1858_, new_n1856_, new_n1854_, new_n1851_ ) -new_n1860_ = NAND ( new_n1859_, NET_23568 ) -NET_3436 = NAND ( new_n1860_, new_n1849_ ) -new_n1862_ = NOT ( NET_465 ) -new_n1863_ = OR ( NET_23568, new_n1862_ ) -new_n1864_ = NOT ( NET_381 ) -new_n1865_ = OR ( new_n1591_, new_n1864_ ) -new_n1866_ = AND ( new_n1636_, new_n1631_ ) -new_n1867_ = NOR ( new_n1866_, new_n1637_ ) -new_n1868_ = NAND ( new_n1867_, new_n1657_ ) -new_n1869_ = NOT ( NET_413 ) -new_n1870_ = OR ( new_n1701_, new_n1869_ ) -new_n1871_ = NOT ( NET_349 ) -new_n1872_ = OR ( new_n1604_, new_n1871_ ) -new_n1873_ = NAND ( new_n1872_, new_n1870_, new_n1868_, new_n1865_ ) -new_n1874_ = NAND ( new_n1873_, NET_23568 ) -NET_3437 = NAND ( new_n1874_, new_n1863_ ) -new_n1876_ = NOT ( NET_464 ) -new_n1877_ = OR ( NET_23568, new_n1876_ ) -new_n1878_ = NOT ( NET_380 ) -new_n1879_ = OR ( new_n1591_, new_n1878_ ) -new_n1880_ = NAND ( new_n1635_, new_n1632_ ) -new_n1881_ = AND ( new_n1880_, new_n1636_ ) -new_n1882_ = NAND ( new_n1881_, new_n1657_ ) -new_n1883_ = NOT ( NET_412 ) -new_n1884_ = OR ( new_n1701_, new_n1883_ ) -new_n1885_ = NOT ( NET_348 ) -new_n1886_ = OR ( new_n1604_, new_n1885_ ) -new_n1887_ = NAND ( new_n1886_, new_n1884_, new_n1882_, new_n1879_ ) -new_n1888_ = NAND ( new_n1887_, NET_23568 ) -NET_3438 = NAND ( new_n1888_, new_n1877_ ) -new_n1890_ = NOT ( NET_463 ) -new_n1891_ = OR ( NET_23568, new_n1890_ ) -new_n1892_ = NOT ( NET_379 ) -new_n1893_ = OR ( new_n1591_, new_n1892_ ) -new_n1894_ = NAND ( new_n1634_, new_n1633_ ) -new_n1895_ = AND ( new_n1894_, new_n1635_ ) -new_n1896_ = NAND ( new_n1895_, new_n1657_ ) -new_n1897_ = NOT ( NET_411 ) -new_n1898_ = OR ( new_n1701_, new_n1897_ ) -new_n1899_ = NOT ( NET_347 ) -new_n1900_ = OR ( new_n1604_, new_n1899_ ) -new_n1901_ = NAND ( new_n1900_, new_n1898_, new_n1896_, new_n1893_ ) -new_n1902_ = NAND ( new_n1901_, NET_23568 ) -NET_3439 = NAND ( new_n1902_, new_n1891_ ) -new_n1904_ = OR ( NET_23568, new_n1368_ ) -new_n1905_ = NOT ( NET_378 ) -new_n1906_ = OR ( new_n1591_, new_n1905_ ) -new_n1907_ = OR ( NET_514, NET_502 ) -new_n1908_ = AND ( new_n1907_, new_n1634_ ) -new_n1909_ = NAND ( new_n1908_, new_n1657_ ) -new_n1910_ = NOT ( NET_410 ) -new_n1911_ = OR ( new_n1701_, new_n1910_ ) -new_n1912_ = NOT ( NET_346 ) -new_n1913_ = OR ( new_n1604_, new_n1912_ ) -new_n1914_ = NAND ( new_n1913_, new_n1911_, new_n1909_, new_n1906_ ) -new_n1915_ = NAND ( new_n1914_, NET_23568 ) -NET_3440 = NAND ( new_n1915_, new_n1904_ ) -new_n1917_ = OR ( NET_23568, new_n1203_ ) -new_n1918_ = NOT ( NET_377 ) -new_n1919_ = OR ( new_n1591_, new_n1918_ ) -new_n1920_ = NOT ( NET_514 ) -new_n1921_ = NAND ( new_n1657_, new_n1920_ ) -new_n1922_ = NOT ( NET_409 ) -new_n1923_ = OR ( new_n1701_, new_n1922_ ) -new_n1924_ = NOT ( NET_345 ) -new_n1925_ = OR ( new_n1604_, new_n1924_ ) -new_n1926_ = NAND ( new_n1925_, new_n1923_, new_n1921_, new_n1919_ ) -new_n1927_ = NAND ( new_n1926_, NET_23568 ) -NET_3441 = NAND ( new_n1927_, new_n1917_ ) -new_n1929_ = OR ( NET_23568, new_n1162_ ) -new_n1930_ = NOT ( NET_376 ) -new_n1931_ = OR ( new_n1591_, new_n1930_ ) -new_n1932_ = NAND ( new_n1657_, NET_495 ) -new_n1933_ = NOT ( NET_408 ) -new_n1934_ = OR ( new_n1701_, new_n1933_ ) -new_n1935_ = NOT ( NET_344 ) -new_n1936_ = OR ( new_n1604_, new_n1935_ ) -new_n1937_ = NAND ( new_n1936_, new_n1934_, new_n1932_, new_n1931_ ) -new_n1938_ = NAND ( new_n1937_, NET_23568 ) -NET_3442 = NAND ( new_n1938_, new_n1929_ ) -new_n1940_ = OR ( NET_23568, new_n1110_ ) -new_n1941_ = NOT ( NET_343 ) -new_n1942_ = OR ( new_n1604_, new_n1941_ ) -new_n1943_ = NAND ( new_n1657_, NET_510 ) -new_n1944_ = NOT ( NET_375 ) -new_n1945_ = OR ( new_n1591_, new_n1944_ ) -new_n1946_ = NOT ( NET_407 ) -new_n1947_ = OR ( new_n1701_, new_n1946_ ) -new_n1948_ = NAND ( new_n1947_, new_n1945_, new_n1943_, new_n1942_ ) -new_n1949_ = NAND ( new_n1948_, NET_23568 ) -NET_3443 = NAND ( new_n1949_, new_n1940_ ) -new_n1951_ = OR ( NET_23568, new_n1083_ ) -new_n1952_ = NOT ( NET_342 ) -new_n1953_ = OR ( new_n1604_, new_n1952_ ) -new_n1954_ = NAND ( new_n1657_, NET_500 ) -new_n1955_ = NOT ( NET_374 ) -new_n1956_ = OR ( new_n1591_, new_n1955_ ) -new_n1957_ = NOT ( NET_406 ) -new_n1958_ = OR ( new_n1701_, new_n1957_ ) -new_n1959_ = NAND ( new_n1958_, new_n1956_, new_n1954_, new_n1953_ ) -new_n1960_ = NAND ( new_n1959_, NET_23568 ) -NET_3444 = NAND ( new_n1960_, new_n1951_ ) -new_n1962_ = OR ( NET_448, NET_203 ) -new_n1963_ = NAND ( NET_448, NET_203 ) -new_n1964_ = NAND ( new_n1963_, new_n1962_ ) -new_n1965_ = NOT ( new_n1398_ ) -new_n1966_ = AND ( new_n1405_, new_n1965_ ) -new_n1967_ = OR ( new_n1966_, new_n1401_ ) -NET_3616 = XNOR ( new_n1967_, new_n1964_ ) -new_n1969_ = OR ( new_n1078_, NET_463 ) -new_n1970_ = NOT ( NET_27 ) -new_n1971_ = OR ( new_n1078_, NET_218 ) -new_n1972_ = NAND ( new_n1078_, new_n1890_ ) -new_n1973_ = NAND ( new_n1972_, new_n1971_ ) -new_n1974_ = NAND ( new_n1973_, new_n1970_ ) -new_n1975_ = OR ( new_n1973_, new_n1970_ ) -new_n1976_ = NAND ( new_n1975_, new_n1974_ ) -new_n1977_ = NAND ( new_n1375_, new_n1372_ ) -new_n1978_ = NAND ( new_n1977_, new_n1371_ ) -new_n1979_ = XNOR ( new_n1978_, new_n1976_ ) -new_n1980_ = OR ( new_n1979_, new_n1080_ ) -new_n1981_ = NAND ( new_n1980_, new_n1969_ ) -new_n1982_ = OR ( new_n1981_, NET_275 ) -new_n1983_ = NOT ( NET_38 ) -new_n1984_ = OR ( new_n1125_, new_n1983_ ) -new_n1985_ = XOR ( new_n1381_, new_n1983_ ) -new_n1986_ = OR ( new_n1985_, new_n1127_ ) -NET_3619 = NAND ( new_n1986_, new_n1984_, new_n1982_ ) -new_n1988_ = NOT ( NET_244 ) -new_n1989_ = OR ( NET_23566, new_n1988_ ) -new_n1990_ = NOT ( NET_62 ) -new_n1991_ = NOR ( NET_63, new_n1990_ ) -new_n1992_ = OR ( new_n1991_, NET_64 ) -new_n1993_ = XOR ( new_n1293_, new_n1990_ ) -new_n1994_ = NOT ( new_n1993_ ) -new_n1995_ = NOT ( NET_63 ) -new_n1996_ = OR ( new_n1293_, NET_62 ) -new_n1997_ = XOR ( new_n1996_, new_n1995_ ) -new_n1998_ = NAND ( new_n1997_, new_n1994_ ) -new_n1999_ = NAND ( new_n1998_, NET_64 ) -new_n2000_ = NAND ( new_n1999_, new_n1992_, NET_160 ) -new_n2001_ = NOR ( new_n1995_, NET_62 ) -new_n2002_ = OR ( new_n2001_, NET_64 ) -new_n2003_ = NOR ( new_n1997_, new_n1994_ ) -new_n2004_ = OR ( new_n2003_, new_n1261_ ) -new_n2005_ = NAND ( new_n2004_, new_n2002_, NET_192 ) -new_n2006_ = NOR ( NET_63, NET_62 ) -new_n2007_ = OR ( new_n2006_, NET_64 ) -new_n2008_ = NAND ( new_n1997_, new_n1993_ ) -new_n2009_ = NAND ( new_n2008_, NET_64 ) -new_n2010_ = NAND ( new_n2009_, new_n2007_, NET_128 ) -new_n2011_ = NAND ( new_n2010_, new_n2005_, new_n2000_ ) -new_n2012_ = NAND ( new_n2011_, NET_23566 ) -NET_3623 = NAND ( new_n2012_, new_n1989_ ) -new_n2014_ = NOT ( NET_243 ) -new_n2015_ = OR ( NET_23566, new_n2014_ ) -new_n2016_ = NAND ( new_n1999_, new_n1992_, NET_159 ) -new_n2017_ = NAND ( new_n2004_, new_n2002_, NET_191 ) -new_n2018_ = NAND ( new_n2009_, new_n2007_, NET_127 ) -new_n2019_ = NAND ( new_n2018_, new_n2017_, new_n2016_ ) -new_n2020_ = NAND ( new_n2019_, NET_23566 ) -NET_3624 = NAND ( new_n2020_, new_n2015_ ) -new_n2022_ = NOT ( NET_235 ) -new_n2023_ = OR ( NET_23566, new_n2022_ ) -new_n2024_ = NOT ( NET_252 ) -new_n2025_ = NOT ( NET_264 ) -new_n2026_ = NOT ( NET_268 ) -new_n2027_ = NOT ( NET_249 ) -new_n2028_ = NOT ( NET_261 ) -new_n2029_ = NOT ( NET_246 ) -new_n2030_ = NOT ( NET_253 ) -new_n2031_ = NOT ( NET_263 ) -new_n2032_ = NOT ( NET_270 ) -new_n2033_ = NOT ( NET_256 ) -new_n2034_ = NOT ( NET_274 ) -new_n2035_ = NOT ( NET_248 ) -new_n2036_ = NOT ( NET_260 ) -new_n2037_ = NAND ( NET_269, NET_257 ) -new_n2038_ = OR ( new_n2037_, new_n2036_ ) -new_n2039_ = OR ( new_n2038_, new_n2035_ ) -new_n2040_ = NOR ( new_n2039_, new_n2034_ ) -new_n2041_ = NAND ( new_n2040_, NET_266 ) -new_n2042_ = OR ( new_n2041_, new_n2033_ ) -new_n2043_ = NOR ( new_n2042_, new_n2032_ ) -new_n2044_ = NAND ( new_n2043_, NET_251 ) -new_n2045_ = OR ( new_n2044_, new_n2031_ ) -new_n2046_ = NOR ( new_n2045_, new_n2030_ ) -new_n2047_ = NAND ( new_n2046_, NET_272 ) -new_n2048_ = OR ( new_n2047_, new_n2029_ ) -new_n2049_ = NOR ( new_n2048_, new_n2028_ ) -new_n2050_ = NAND ( new_n2049_, NET_259 ) -new_n2051_ = OR ( new_n2050_, new_n2027_ ) -new_n2052_ = NOR ( new_n2051_, new_n2026_ ) -new_n2053_ = NAND ( new_n2052_, NET_254 ) -new_n2054_ = OR ( new_n2053_, new_n2025_ ) -new_n2055_ = AND ( new_n2054_, new_n2024_ ) -new_n2056_ = NOR ( new_n2054_, new_n2024_ ) -new_n2057_ = NOR ( new_n2056_, new_n2055_ ) -new_n2058_ = NAND ( NET_63, NET_62 ) -new_n2059_ = NAND ( new_n2058_, new_n1261_ ) -new_n2060_ = NOR ( new_n1997_, new_n1993_ ) -new_n2061_ = OR ( new_n2060_, new_n1261_ ) -new_n2062_ = NAND ( new_n2061_, new_n2059_ ) -new_n2063_ = NOT ( new_n2062_ ) -new_n2064_ = NAND ( new_n2063_, new_n2057_ ) -new_n2065_ = NAND ( new_n2009_, new_n2007_, NET_119 ) -new_n2066_ = NAND ( new_n1999_, new_n1992_, NET_151 ) -new_n2067_ = NAND ( new_n2004_, new_n2002_, NET_183 ) -new_n2068_ = NAND ( new_n2067_, new_n2066_, new_n2065_, new_n2064_ ) -new_n2069_ = NAND ( new_n2068_, NET_23566 ) -NET_3625 = NAND ( new_n2069_, new_n2023_ ) -new_n2071_ = NOT ( NET_234 ) -new_n2072_ = OR ( NET_23566, new_n2071_ ) -new_n2073_ = NAND ( new_n2053_, new_n2025_ ) -new_n2074_ = AND ( new_n2073_, new_n2054_ ) -new_n2075_ = NAND ( new_n2074_, new_n2063_ ) -new_n2076_ = NAND ( new_n2009_, new_n2007_, NET_118 ) -new_n2077_ = NAND ( new_n1999_, new_n1992_, NET_150 ) -new_n2078_ = NAND ( new_n2004_, new_n2002_, NET_182 ) -new_n2079_ = NAND ( new_n2078_, new_n2077_, new_n2076_, new_n2075_ ) -new_n2080_ = NAND ( new_n2079_, NET_23566 ) -NET_3626 = NAND ( new_n2080_, new_n2072_ ) -new_n2082_ = NOT ( NET_233 ) -new_n2083_ = OR ( NET_23566, new_n2082_ ) -new_n2084_ = OR ( new_n2052_, NET_254 ) -new_n2085_ = AND ( new_n2084_, new_n2053_ ) -new_n2086_ = NAND ( new_n2085_, new_n2063_ ) -new_n2087_ = NAND ( new_n2009_, new_n2007_, NET_117 ) -new_n2088_ = NAND ( new_n1999_, new_n1992_, NET_149 ) -new_n2089_ = NAND ( new_n2004_, new_n2002_, NET_181 ) -new_n2090_ = NAND ( new_n2089_, new_n2088_, new_n2087_, new_n2086_ ) -new_n2091_ = NAND ( new_n2090_, NET_23566 ) -NET_3627 = NAND ( new_n2091_, new_n2083_ ) -new_n2093_ = NOT ( NET_232 ) -new_n2094_ = OR ( NET_23566, new_n2093_ ) -new_n2095_ = NOT ( NET_148 ) -new_n2096_ = NAND ( new_n1999_, new_n1992_ ) -new_n2097_ = OR ( new_n2096_, new_n2095_ ) -new_n2098_ = NOT ( NET_180 ) -new_n2099_ = NAND ( new_n2004_, new_n2002_ ) -new_n2100_ = OR ( new_n2099_, new_n2098_ ) -new_n2101_ = AND ( new_n2051_, new_n2026_ ) -new_n2102_ = NOR ( new_n2101_, new_n2052_ ) -new_n2103_ = NAND ( new_n2102_, new_n2063_ ) -new_n2104_ = NAND ( new_n2009_, new_n2007_, NET_116 ) -new_n2105_ = NAND ( new_n2104_, new_n2103_, new_n2100_, new_n2097_ ) -new_n2106_ = NAND ( new_n2105_, NET_23566 ) -NET_3628 = NAND ( new_n2106_, new_n2094_ ) -new_n2108_ = NOT ( NET_231 ) -new_n2109_ = OR ( NET_23566, new_n2108_ ) -new_n2110_ = NOT ( NET_147 ) -new_n2111_ = OR ( new_n2096_, new_n2110_ ) -new_n2112_ = NOT ( NET_179 ) -new_n2113_ = OR ( new_n2099_, new_n2112_ ) -new_n2114_ = NAND ( new_n2050_, new_n2027_ ) -new_n2115_ = AND ( new_n2114_, new_n2051_ ) -new_n2116_ = NAND ( new_n2115_, new_n2063_ ) -new_n2117_ = NAND ( new_n2009_, new_n2007_, NET_115 ) -new_n2118_ = NAND ( new_n2117_, new_n2116_, new_n2113_, new_n2111_ ) -new_n2119_ = NAND ( new_n2118_, NET_23566 ) -NET_3629 = NAND ( new_n2119_, new_n2109_ ) -new_n2121_ = NOT ( NET_230 ) -new_n2122_ = OR ( NET_23566, new_n2121_ ) -new_n2123_ = NOT ( NET_146 ) -new_n2124_ = OR ( new_n2096_, new_n2123_ ) -new_n2125_ = NOT ( NET_178 ) -new_n2126_ = OR ( new_n2099_, new_n2125_ ) -new_n2127_ = OR ( new_n2049_, NET_259 ) -new_n2128_ = AND ( new_n2127_, new_n2050_ ) -new_n2129_ = NAND ( new_n2128_, new_n2063_ ) -new_n2130_ = NAND ( new_n2009_, new_n2007_, NET_114 ) -new_n2131_ = NAND ( new_n2130_, new_n2129_, new_n2126_, new_n2124_ ) -new_n2132_ = NAND ( new_n2131_, NET_23566 ) -NET_3630 = NAND ( new_n2132_, new_n2122_ ) -new_n2134_ = NOT ( NET_229 ) -new_n2135_ = OR ( NET_23566, new_n2134_ ) -new_n2136_ = NOT ( NET_145 ) -new_n2137_ = OR ( new_n2096_, new_n2136_ ) -new_n2138_ = NOT ( NET_177 ) -new_n2139_ = OR ( new_n2099_, new_n2138_ ) -new_n2140_ = AND ( new_n2048_, new_n2028_ ) -new_n2141_ = NOR ( new_n2140_, new_n2049_ ) -new_n2142_ = NAND ( new_n2141_, new_n2063_ ) -new_n2143_ = NAND ( new_n2009_, new_n2007_, NET_113 ) -new_n2144_ = NAND ( new_n2143_, new_n2142_, new_n2139_, new_n2137_ ) -new_n2145_ = NAND ( new_n2144_, NET_23566 ) -NET_3631 = NAND ( new_n2145_, new_n2135_ ) -new_n2147_ = NOT ( NET_228 ) -new_n2148_ = OR ( NET_23566, new_n2147_ ) -new_n2149_ = NOT ( NET_144 ) -new_n2150_ = OR ( new_n2096_, new_n2149_ ) -new_n2151_ = NOT ( NET_176 ) -new_n2152_ = OR ( new_n2099_, new_n2151_ ) -new_n2153_ = NAND ( new_n2047_, new_n2029_ ) -new_n2154_ = AND ( new_n2153_, new_n2048_ ) -new_n2155_ = NAND ( new_n2154_, new_n2063_ ) -new_n2156_ = NAND ( new_n2009_, new_n2007_, NET_112 ) -new_n2157_ = NAND ( new_n2156_, new_n2155_, new_n2152_, new_n2150_ ) -new_n2158_ = NAND ( new_n2157_, NET_23566 ) -NET_3632 = NAND ( new_n2158_, new_n2148_ ) -new_n2160_ = NOT ( NET_227 ) -new_n2161_ = OR ( NET_23566, new_n2160_ ) -new_n2162_ = NOT ( NET_143 ) -new_n2163_ = OR ( new_n2096_, new_n2162_ ) -new_n2164_ = NOT ( NET_175 ) -new_n2165_ = OR ( new_n2099_, new_n2164_ ) -new_n2166_ = OR ( new_n2046_, NET_272 ) -new_n2167_ = AND ( new_n2166_, new_n2047_ ) -new_n2168_ = NAND ( new_n2167_, new_n2063_ ) -new_n2169_ = NAND ( new_n2009_, new_n2007_, NET_111 ) -new_n2170_ = NAND ( new_n2169_, new_n2168_, new_n2165_, new_n2163_ ) -new_n2171_ = NAND ( new_n2170_, NET_23566 ) -NET_3633 = NAND ( new_n2171_, new_n2161_ ) -new_n2173_ = NOT ( NET_226 ) -new_n2174_ = OR ( NET_23566, new_n2173_ ) -new_n2175_ = NOT ( NET_142 ) -new_n2176_ = OR ( new_n2096_, new_n2175_ ) -new_n2177_ = NOT ( NET_174 ) -new_n2178_ = OR ( new_n2099_, new_n2177_ ) -new_n2179_ = AND ( new_n2045_, new_n2030_ ) -new_n2180_ = NOR ( new_n2179_, new_n2046_ ) -new_n2181_ = NAND ( new_n2180_, new_n2063_ ) -new_n2182_ = NAND ( new_n2009_, new_n2007_, NET_110 ) -new_n2183_ = NAND ( new_n2182_, new_n2181_, new_n2178_, new_n2176_ ) -new_n2184_ = NAND ( new_n2183_, NET_23566 ) -NET_3634 = NAND ( new_n2184_, new_n2174_ ) -new_n2186_ = NOT ( NET_225 ) -new_n2187_ = OR ( NET_23566, new_n2186_ ) -new_n2188_ = NOT ( NET_141 ) -new_n2189_ = OR ( new_n2096_, new_n2188_ ) -new_n2190_ = NOT ( NET_173 ) -new_n2191_ = OR ( new_n2099_, new_n2190_ ) -new_n2192_ = NAND ( new_n2044_, new_n2031_ ) -new_n2193_ = AND ( new_n2192_, new_n2045_ ) -new_n2194_ = NAND ( new_n2193_, new_n2063_ ) -new_n2195_ = NAND ( new_n2009_, new_n2007_, NET_109 ) -new_n2196_ = NAND ( new_n2195_, new_n2194_, new_n2191_, new_n2189_ ) -new_n2197_ = NAND ( new_n2196_, NET_23566 ) -NET_3635 = NAND ( new_n2197_, new_n2187_ ) -new_n2199_ = NOT ( NET_224 ) -new_n2200_ = OR ( NET_23566, new_n2199_ ) -new_n2201_ = NOT ( NET_140 ) -new_n2202_ = OR ( new_n2096_, new_n2201_ ) -new_n2203_ = NOT ( NET_172 ) -new_n2204_ = OR ( new_n2099_, new_n2203_ ) -new_n2205_ = OR ( new_n2043_, NET_251 ) -new_n2206_ = AND ( new_n2205_, new_n2044_ ) -new_n2207_ = NAND ( new_n2206_, new_n2063_ ) -new_n2208_ = NAND ( new_n2009_, new_n2007_, NET_108 ) -new_n2209_ = NAND ( new_n2208_, new_n2207_, new_n2204_, new_n2202_ ) -new_n2210_ = NAND ( new_n2209_, NET_23566 ) -NET_3636 = NAND ( new_n2210_, new_n2200_ ) -new_n2212_ = NOT ( NET_223 ) -new_n2213_ = OR ( NET_23566, new_n2212_ ) -new_n2214_ = NOT ( NET_139 ) -new_n2215_ = OR ( new_n2096_, new_n2214_ ) -new_n2216_ = NOT ( NET_171 ) -new_n2217_ = OR ( new_n2099_, new_n2216_ ) -new_n2218_ = AND ( new_n2042_, new_n2032_ ) -new_n2219_ = NOR ( new_n2218_, new_n2043_ ) -new_n2220_ = NAND ( new_n2219_, new_n2063_ ) -new_n2221_ = NAND ( new_n2009_, new_n2007_, NET_107 ) -new_n2222_ = NAND ( new_n2221_, new_n2220_, new_n2217_, new_n2215_ ) -new_n2223_ = NAND ( new_n2222_, NET_23566 ) -NET_3637 = NAND ( new_n2223_, new_n2213_ ) -new_n2225_ = NOT ( NET_222 ) -new_n2226_ = OR ( NET_23566, new_n2225_ ) -new_n2227_ = NOT ( NET_138 ) -new_n2228_ = OR ( new_n2096_, new_n2227_ ) -new_n2229_ = NOT ( NET_170 ) -new_n2230_ = OR ( new_n2099_, new_n2229_ ) -new_n2231_ = NAND ( new_n2041_, new_n2033_ ) -new_n2232_ = AND ( new_n2231_, new_n2042_ ) -new_n2233_ = NAND ( new_n2232_, new_n2063_ ) -new_n2234_ = NAND ( new_n2009_, new_n2007_, NET_106 ) -new_n2235_ = NAND ( new_n2234_, new_n2233_, new_n2230_, new_n2228_ ) -new_n2236_ = NAND ( new_n2235_, NET_23566 ) -NET_3638 = NAND ( new_n2236_, new_n2226_ ) -new_n2238_ = NOT ( NET_221 ) -new_n2239_ = OR ( NET_23566, new_n2238_ ) -new_n2240_ = NOT ( NET_137 ) -new_n2241_ = OR ( new_n2096_, new_n2240_ ) -new_n2242_ = NOT ( NET_169 ) -new_n2243_ = OR ( new_n2099_, new_n2242_ ) -new_n2244_ = OR ( new_n2040_, NET_266 ) -new_n2245_ = AND ( new_n2244_, new_n2041_ ) -new_n2246_ = NOT ( new_n2245_ ) -new_n2247_ = OR ( new_n2246_, new_n2062_ ) -new_n2248_ = NAND ( new_n2009_, new_n2007_, NET_105 ) -new_n2249_ = NAND ( new_n2248_, new_n2247_, new_n2243_, new_n2241_ ) -new_n2250_ = NAND ( new_n2249_, NET_23566 ) -NET_3639 = NAND ( new_n2250_, new_n2239_ ) -new_n2252_ = NOT ( NET_220 ) -new_n2253_ = OR ( NET_23566, new_n2252_ ) -new_n2254_ = NOT ( NET_136 ) -new_n2255_ = OR ( new_n2096_, new_n2254_ ) -new_n2256_ = NOT ( NET_168 ) -new_n2257_ = OR ( new_n2099_, new_n2256_ ) -new_n2258_ = AND ( new_n2039_, new_n2034_ ) -new_n2259_ = NOR ( new_n2258_, new_n2040_ ) -new_n2260_ = NOT ( new_n2259_ ) -new_n2261_ = OR ( new_n2260_, new_n2062_ ) -new_n2262_ = NAND ( new_n2009_, new_n2007_, NET_104 ) -new_n2263_ = NAND ( new_n2262_, new_n2261_, new_n2257_, new_n2255_ ) -new_n2264_ = NAND ( new_n2263_, NET_23566 ) -NET_3640 = NAND ( new_n2264_, new_n2253_ ) -new_n2266_ = NOT ( NET_219 ) -new_n2267_ = OR ( NET_23566, new_n2266_ ) -new_n2268_ = NOT ( NET_135 ) -new_n2269_ = OR ( new_n2096_, new_n2268_ ) -new_n2270_ = NOT ( NET_167 ) -new_n2271_ = OR ( new_n2099_, new_n2270_ ) -new_n2272_ = NAND ( new_n2038_, new_n2035_ ) -new_n2273_ = AND ( new_n2272_, new_n2039_ ) -new_n2274_ = NAND ( new_n2273_, new_n2063_ ) -new_n2275_ = NAND ( new_n2009_, new_n2007_, NET_103 ) -new_n2276_ = NAND ( new_n2275_, new_n2274_, new_n2271_, new_n2269_ ) -new_n2277_ = NAND ( new_n2276_, NET_23566 ) -NET_3641 = NAND ( new_n2277_, new_n2267_ ) -new_n2279_ = NOT ( NET_218 ) -new_n2280_ = OR ( NET_23566, new_n2279_ ) -new_n2281_ = NOT ( NET_134 ) -new_n2282_ = OR ( new_n2096_, new_n2281_ ) -new_n2283_ = NOT ( NET_166 ) -new_n2284_ = OR ( new_n2099_, new_n2283_ ) -new_n2285_ = NAND ( new_n2037_, new_n2036_ ) -new_n2286_ = AND ( new_n2285_, new_n2038_ ) -new_n2287_ = NAND ( new_n2286_, new_n2063_ ) -new_n2288_ = NAND ( new_n2009_, new_n2007_, NET_102 ) -new_n2289_ = NAND ( new_n2288_, new_n2287_, new_n2284_, new_n2282_ ) -new_n2290_ = NAND ( new_n2289_, NET_23566 ) -NET_3642 = NAND ( new_n2290_, new_n2280_ ) -new_n2292_ = OR ( NET_23566, new_n1388_ ) -new_n2293_ = NOT ( NET_133 ) -new_n2294_ = OR ( new_n2096_, new_n2293_ ) -new_n2295_ = NOT ( NET_165 ) -new_n2296_ = OR ( new_n2099_, new_n2295_ ) -new_n2297_ = OR ( NET_269, NET_257 ) -new_n2298_ = AND ( new_n2297_, new_n2037_ ) -new_n2299_ = NAND ( new_n2298_, new_n2063_ ) -new_n2300_ = NAND ( new_n2009_, new_n2007_, NET_101 ) -new_n2301_ = NAND ( new_n2300_, new_n2299_, new_n2296_, new_n2294_ ) -new_n2302_ = NAND ( new_n2301_, NET_23566 ) -NET_3643 = NAND ( new_n2302_, new_n2292_ ) -new_n2304_ = OR ( NET_23566, new_n1221_ ) -new_n2305_ = NOT ( NET_132 ) -new_n2306_ = OR ( new_n2096_, new_n2305_ ) -new_n2307_ = NOT ( NET_164 ) -new_n2308_ = OR ( new_n2099_, new_n2307_ ) -new_n2309_ = OR ( new_n2062_, NET_269 ) -new_n2310_ = NAND ( new_n2009_, new_n2007_, NET_100 ) -new_n2311_ = NAND ( new_n2310_, new_n2309_, new_n2308_, new_n2306_ ) -new_n2312_ = NAND ( new_n2311_, NET_23566 ) -NET_3644 = NAND ( new_n2312_, new_n2304_ ) -new_n2314_ = OR ( NET_23566, new_n1180_ ) -new_n2315_ = NOT ( NET_131 ) -new_n2316_ = OR ( new_n2096_, new_n2315_ ) -new_n2317_ = NOT ( NET_163 ) -new_n2318_ = OR ( new_n2099_, new_n2317_ ) -new_n2319_ = NOT ( NET_250 ) -new_n2320_ = OR ( new_n2062_, new_n2319_ ) -new_n2321_ = NAND ( new_n2009_, new_n2007_, NET_99 ) -new_n2322_ = NAND ( new_n2321_, new_n2320_, new_n2318_, new_n2316_ ) -new_n2323_ = NAND ( new_n2322_, NET_23566 ) -NET_3645 = NAND ( new_n2323_, new_n2314_ ) -new_n2325_ = OR ( NET_23566, new_n1135_ ) -new_n2326_ = NAND ( new_n2009_, new_n2007_, NET_98 ) -new_n2327_ = NOT ( NET_130 ) -new_n2328_ = OR ( new_n2096_, new_n2327_ ) -new_n2329_ = NOT ( NET_162 ) -new_n2330_ = OR ( new_n2099_, new_n2329_ ) -new_n2331_ = NOT ( NET_265 ) -new_n2332_ = OR ( new_n2062_, new_n2331_ ) -new_n2333_ = NAND ( new_n2332_, new_n2330_, new_n2328_, new_n2326_ ) -new_n2334_ = NAND ( new_n2333_, NET_23566 ) -NET_3646 = NAND ( new_n2334_, new_n2325_ ) -new_n2336_ = OR ( NET_23566, new_n1095_ ) -new_n2337_ = NAND ( new_n2009_, new_n2007_, NET_97 ) -new_n2338_ = NOT ( NET_255 ) -new_n2339_ = OR ( new_n2062_, new_n2338_ ) -new_n2340_ = NOT ( NET_129 ) -new_n2341_ = OR ( new_n2096_, new_n2340_ ) -new_n2342_ = NOT ( NET_161 ) -new_n2343_ = OR ( new_n2099_, new_n2342_ ) -new_n2344_ = NAND ( new_n2343_, new_n2341_, new_n2339_, new_n2337_ ) -new_n2345_ = NAND ( new_n2344_, NET_23566 ) -NET_3647 = NAND ( new_n2345_, new_n2336_ ) -new_n2347_ = NOT ( NET_66 ) -new_n2348_ = OR ( new_n1451_, new_n2347_ ) -new_n2349_ = OR ( new_n1449_, new_n1265_ ) -new_n2350_ = NAND ( new_n2349_, new_n1451_ ) -NET_3648 = NAND ( new_n2350_, new_n2348_ ) -new_n2352_ = NOT ( NET_65 ) -new_n2353_ = OR ( new_n1451_, new_n2352_ ) -new_n2354_ = OR ( new_n1259_, new_n1252_ ) -new_n2355_ = NAND ( new_n2354_, new_n1451_ ) -NET_3649 = NAND ( new_n2355_, new_n2353_ ) -new_n2357_ = OR ( new_n1979_, new_n1078_ ) -new_n2358_ = NAND ( new_n1078_, new_n2279_ ) -new_n2359_ = NAND ( new_n2358_, new_n2357_ ) -new_n2360_ = OR ( new_n2359_, NET_520 ) -new_n2361_ = NOT ( NET_283 ) -new_n2362_ = OR ( new_n1101_, new_n2361_ ) -new_n2363_ = XOR ( new_n1317_, new_n2361_ ) -new_n2364_ = OR ( new_n2363_, new_n1141_ ) -NET_3698 = NAND ( new_n2364_, new_n2362_, new_n2360_ ) -new_n2366_ = NOT ( NET_311 ) -new_n2367_ = OR ( new_n1519_, new_n2366_ ) -new_n2368_ = OR ( new_n1351_, new_n1340_ ) -new_n2369_ = NAND ( new_n2368_, new_n1519_ ) -NET_3704 = NAND ( new_n2369_, new_n2367_ ) -new_n2371_ = NOT ( NET_310 ) -new_n2372_ = OR ( new_n1519_, new_n2371_ ) -new_n2373_ = OR ( new_n1346_, new_n1340_ ) -new_n2374_ = NAND ( new_n2373_, new_n1519_ ) -NET_3705 = NAND ( new_n2374_, new_n2372_ ) -new_n2376_ = NOT ( NET_237 ) -new_n2377_ = OR ( NET_23566, new_n2376_ ) -new_n2378_ = NOT ( NET_258 ) -new_n2379_ = NAND ( new_n2056_, NET_271 ) -new_n2380_ = AND ( new_n2379_, new_n2378_ ) -new_n2381_ = NOR ( new_n2379_, new_n2378_ ) -new_n2382_ = NOR ( new_n2381_, new_n2380_ ) -new_n2383_ = NAND ( new_n2382_, new_n2063_ ) -new_n2384_ = NAND ( new_n2004_, new_n2002_, NET_185 ) -new_n2385_ = NAND ( new_n2009_, new_n2007_, NET_121 ) -new_n2386_ = NAND ( new_n1999_, new_n1992_, NET_153 ) -new_n2387_ = NAND ( new_n2386_, new_n2385_, new_n2384_, new_n2383_ ) -new_n2388_ = NAND ( new_n2387_, NET_23566 ) -NET_3801 = NAND ( new_n2388_, new_n2377_ ) -new_n2390_ = NOT ( NET_236 ) -new_n2391_ = OR ( NET_23566, new_n2390_ ) -new_n2392_ = OR ( new_n2056_, NET_271 ) -new_n2393_ = AND ( new_n2392_, new_n2379_ ) -new_n2394_ = NAND ( new_n2393_, new_n2063_ ) -new_n2395_ = NAND ( new_n2009_, new_n2007_, NET_120 ) -new_n2396_ = NAND ( new_n1999_, new_n1992_, NET_152 ) -new_n2397_ = NAND ( new_n2004_, new_n2002_, NET_184 ) -new_n2398_ = NAND ( new_n2397_, new_n2396_, new_n2395_, new_n2394_ ) -new_n2399_ = NAND ( new_n2398_, NET_23566 ) -NET_3802 = NAND ( new_n2399_, new_n2391_ ) -new_n2401_ = NOT ( NET_482 ) -new_n2402_ = OR ( NET_23568, new_n2401_ ) -new_n2403_ = NOT ( NET_503 ) -new_n2404_ = NAND ( new_n1653_, NET_516 ) -new_n2405_ = AND ( new_n2404_, new_n2403_ ) -new_n2406_ = NOR ( new_n2404_, new_n2403_ ) -new_n2407_ = NOR ( new_n2406_, new_n2405_ ) -new_n2408_ = NAND ( new_n2407_, new_n1657_ ) -new_n2409_ = NAND ( new_n1597_, new_n1595_, NET_430 ) -new_n2410_ = NOT ( NET_366 ) -new_n2411_ = OR ( new_n1604_, new_n2410_ ) -new_n2412_ = NOT ( NET_398 ) -new_n2413_ = OR ( new_n1591_, new_n2412_ ) -new_n2414_ = NAND ( new_n2413_, new_n2411_, new_n2409_, new_n2408_ ) -new_n2415_ = NAND ( new_n2414_, NET_23568 ) -NET_3833 = NAND ( new_n2415_, new_n2402_ ) -new_n2417_ = NOT ( NET_481 ) -new_n2418_ = OR ( NET_23568, new_n2417_ ) -new_n2419_ = OR ( new_n1653_, NET_516 ) -new_n2420_ = AND ( new_n2419_, new_n2404_ ) -new_n2421_ = NAND ( new_n2420_, new_n1657_ ) -new_n2422_ = NOT ( NET_365 ) -new_n2423_ = OR ( new_n1604_, new_n2422_ ) -new_n2424_ = NOT ( NET_397 ) -new_n2425_ = OR ( new_n1591_, new_n2424_ ) -new_n2426_ = NAND ( new_n1597_, new_n1595_, NET_429 ) -new_n2427_ = NAND ( new_n2426_, new_n2425_, new_n2423_, new_n2421_ ) -new_n2428_ = NAND ( new_n2427_, NET_23568 ) -NET_3834 = NAND ( new_n2428_, new_n2418_ ) -new_n2430_ = NOT ( NET_202 ) -new_n2431_ = NOT ( NET_447 ) -new_n2432_ = NOR ( new_n2431_, new_n2430_ ) -new_n2433_ = NOT ( new_n2432_ ) -new_n2434_ = OR ( NET_447, NET_202 ) -new_n2435_ = NAND ( new_n2434_, new_n2433_ ) -new_n2436_ = NAND ( new_n1967_, new_n1962_ ) -new_n2437_ = NAND ( new_n2436_, new_n2435_, new_n1963_ ) -new_n2438_ = NAND ( new_n2436_, new_n1963_ ) -new_n2439_ = NAND ( new_n2438_, new_n2434_ ) -new_n2440_ = OR ( new_n2439_, new_n2432_ ) -NET_4137 = AND ( new_n2440_, new_n2437_ ) -new_n2442_ = OR ( new_n1078_, NET_464 ) -new_n2443_ = NOT ( NET_26 ) -new_n2444_ = OR ( new_n1078_, NET_219 ) -new_n2445_ = NAND ( new_n1078_, new_n1876_ ) -new_n2446_ = NAND ( new_n2445_, new_n2444_ ) -new_n2447_ = OR ( new_n2446_, new_n2443_ ) -new_n2448_ = NAND ( new_n2446_, new_n2443_ ) -new_n2449_ = NAND ( new_n2448_, new_n2447_ ) -new_n2450_ = NAND ( new_n1978_, new_n1974_ ) -new_n2451_ = NAND ( new_n2450_, new_n1975_ ) -new_n2452_ = XNOR ( new_n2451_, new_n2449_ ) -new_n2453_ = OR ( new_n2452_, new_n1080_ ) -new_n2454_ = NAND ( new_n2453_, new_n2442_ ) -new_n2455_ = OR ( new_n2454_, NET_275 ) -new_n2456_ = NOT ( NET_39 ) -new_n2457_ = OR ( new_n1125_, new_n2456_ ) -new_n2458_ = AND ( new_n1234_, new_n1233_, new_n1175_ ) -new_n2459_ = OR ( new_n1381_, NET_38 ) -new_n2460_ = AND ( new_n2459_, NET_39 ) -new_n2461_ = OR ( new_n2460_, new_n2458_ ) -new_n2462_ = OR ( new_n2461_, new_n1127_ ) -NET_4140 = NAND ( new_n2462_, new_n2457_, new_n2455_ ) -new_n2464_ = NOT ( NET_242 ) -new_n2465_ = OR ( NET_23566, new_n2464_ ) -new_n2466_ = NOT ( NET_267 ) -new_n2467_ = NOT ( NET_273 ) -new_n2468_ = NAND ( new_n2381_, NET_262, NET_247 ) -new_n2469_ = NOR ( new_n2468_, new_n2467_, new_n2466_ ) -new_n2470_ = NAND ( new_n2469_, new_n2063_ ) -new_n2471_ = NAND ( new_n2004_, new_n2002_, NET_190 ) -new_n2472_ = NAND ( new_n2009_, new_n2007_, NET_126 ) -new_n2473_ = NAND ( new_n1999_, new_n1992_, NET_158 ) -new_n2474_ = NAND ( new_n2473_, new_n2472_, new_n2471_, new_n2470_ ) -new_n2475_ = NAND ( new_n2474_, NET_23566 ) -NET_4153 = NAND ( new_n2475_, new_n2465_ ) -new_n2477_ = NOT ( NET_238 ) -new_n2478_ = OR ( NET_23566, new_n2477_ ) -new_n2479_ = NOR ( new_n2381_, NET_262 ) -new_n2480_ = AND ( new_n2381_, NET_262 ) -new_n2481_ = NOR ( new_n2480_, new_n2479_ ) -new_n2482_ = NAND ( new_n2481_, new_n2063_ ) -new_n2483_ = NAND ( new_n2004_, new_n2002_, NET_186 ) -new_n2484_ = NAND ( new_n2009_, new_n2007_, NET_122 ) -new_n2485_ = NAND ( new_n1999_, new_n1992_, NET_154 ) -new_n2486_ = NAND ( new_n2485_, new_n2484_, new_n2483_, new_n2482_ ) -new_n2487_ = NAND ( new_n2486_, NET_23566 ) -NET_4154 = NAND ( new_n2487_, new_n2478_ ) -new_n2489_ = OR ( new_n2452_, new_n1078_ ) -new_n2490_ = NAND ( new_n1078_, new_n2266_ ) -new_n2491_ = NAND ( new_n2490_, new_n2489_ ) -new_n2492_ = OR ( new_n2491_, NET_520 ) -new_n2493_ = NOT ( NET_284 ) -new_n2494_ = OR ( new_n1101_, new_n2493_ ) -new_n2495_ = OR ( new_n1317_, NET_283 ) -new_n2496_ = AND ( new_n2495_, NET_284 ) -new_n2497_ = OR ( new_n2496_, new_n1318_ ) -new_n2498_ = OR ( new_n2497_, new_n1141_ ) -NET_4264 = NAND ( new_n2498_, new_n2494_, new_n2492_ ) -new_n2500_ = NOT ( NET_487 ) -new_n2501_ = OR ( NET_23568, new_n2500_ ) -new_n2502_ = NOT ( new_n1657_ ) -new_n2503_ = NOT ( NET_512 ) -new_n2504_ = NOT ( NET_518 ) -new_n2505_ = NAND ( new_n2406_, NET_507, NET_492 ) -new_n2506_ = OR ( new_n2505_, new_n2504_, new_n2503_ ) -new_n2507_ = OR ( new_n2506_, new_n2502_ ) -new_n2508_ = NAND ( new_n1597_, new_n1595_, NET_435 ) -new_n2509_ = NOT ( NET_371 ) -new_n2510_ = OR ( new_n1604_, new_n2509_ ) -new_n2511_ = NOT ( NET_403 ) -new_n2512_ = OR ( new_n1591_, new_n2511_ ) -new_n2513_ = NAND ( new_n2512_, new_n2510_, new_n2508_, new_n2507_ ) -new_n2514_ = NAND ( new_n2513_, NET_23568 ) -NET_4277 = NAND ( new_n2514_, new_n2501_ ) -new_n2516_ = NOT ( NET_483 ) -new_n2517_ = OR ( NET_23568, new_n2516_ ) -new_n2518_ = NOR ( new_n2406_, NET_507 ) -new_n2519_ = AND ( new_n2406_, NET_507 ) -new_n2520_ = NOR ( new_n2519_, new_n2518_ ) -new_n2521_ = NAND ( new_n2520_, new_n1657_ ) -new_n2522_ = NAND ( new_n1597_, new_n1595_, NET_431 ) -new_n2523_ = NOT ( NET_367 ) -new_n2524_ = OR ( new_n1604_, new_n2523_ ) -new_n2525_ = NOT ( NET_399 ) -new_n2526_ = OR ( new_n1591_, new_n2525_ ) -new_n2527_ = NAND ( new_n2526_, new_n2524_, new_n2522_, new_n2521_ ) -new_n2528_ = NAND ( new_n2527_, NET_23568 ) -NET_4278 = NAND ( new_n2528_, new_n2517_ ) -new_n2530_ = NOT ( NET_240 ) -new_n2531_ = OR ( NET_23566, new_n2530_ ) -new_n2532_ = NAND ( new_n2468_, new_n2467_ ) -new_n2533_ = OR ( new_n2468_, new_n2467_ ) -new_n2534_ = AND ( new_n2533_, new_n2532_ ) -new_n2535_ = NAND ( new_n2534_, new_n2063_ ) -new_n2536_ = NAND ( new_n2004_, new_n2002_, NET_188 ) -new_n2537_ = NAND ( new_n2009_, new_n2007_, NET_124 ) -new_n2538_ = NAND ( new_n1999_, new_n1992_, NET_156 ) -new_n2539_ = NAND ( new_n2538_, new_n2537_, new_n2536_, new_n2535_ ) -new_n2540_ = NAND ( new_n2539_, NET_23566 ) -NET_4387 = NAND ( new_n2540_, new_n2531_ ) -new_n2542_ = NOT ( NET_239 ) -new_n2543_ = OR ( NET_23566, new_n2542_ ) -new_n2544_ = XOR ( new_n2480_, NET_247 ) -new_n2545_ = NAND ( new_n2544_, new_n2063_ ) -new_n2546_ = NAND ( new_n2004_, new_n2002_, NET_187 ) -new_n2547_ = NAND ( new_n2009_, new_n2007_, NET_123 ) -new_n2548_ = NAND ( new_n1999_, new_n1992_, NET_155 ) -new_n2549_ = NAND ( new_n2548_, new_n2547_, new_n2546_, new_n2545_ ) -new_n2550_ = NAND ( new_n2549_, NET_23566 ) -NET_4388 = NAND ( new_n2550_, new_n2543_ ) -new_n2552_ = NOT ( NET_485 ) -new_n2553_ = OR ( NET_23568, new_n2552_ ) -new_n2554_ = NAND ( new_n2505_, new_n2504_ ) -new_n2555_ = OR ( new_n2505_, new_n2504_ ) -new_n2556_ = AND ( new_n2555_, new_n2554_ ) -new_n2557_ = NAND ( new_n2556_, new_n1657_ ) -new_n2558_ = NAND ( new_n1597_, new_n1595_, NET_433 ) -new_n2559_ = NOT ( NET_369 ) -new_n2560_ = OR ( new_n1604_, new_n2559_ ) -new_n2561_ = NOT ( NET_401 ) -new_n2562_ = OR ( new_n1591_, new_n2561_ ) -new_n2563_ = NAND ( new_n2562_, new_n2560_, new_n2558_, new_n2557_ ) -new_n2564_ = NAND ( new_n2563_, NET_23568 ) -NET_4554 = NAND ( new_n2564_, new_n2553_ ) -new_n2566_ = NOT ( NET_484 ) -new_n2567_ = OR ( NET_23568, new_n2566_ ) -new_n2568_ = XOR ( new_n2519_, NET_492 ) -new_n2569_ = NAND ( new_n2568_, new_n1657_ ) -new_n2570_ = NAND ( new_n1597_, new_n1595_, NET_432 ) -new_n2571_ = NOT ( NET_368 ) -new_n2572_ = OR ( new_n1604_, new_n2571_ ) -new_n2573_ = NOT ( NET_400 ) -new_n2574_ = OR ( new_n1591_, new_n2573_ ) -new_n2575_ = NAND ( new_n2574_, new_n2572_, new_n2570_, new_n2569_ ) -new_n2576_ = NAND ( new_n2575_, NET_23568 ) -NET_4555 = NAND ( new_n2576_, new_n2567_ ) -new_n2578_ = NOT ( NET_446 ) -new_n2579_ = OR ( new_n2578_, NET_201 ) -new_n2580_ = NOT ( NET_201 ) -new_n2581_ = OR ( NET_446, new_n2580_ ) -new_n2582_ = NAND ( new_n2581_, new_n2579_, new_n2439_, new_n2433_ ) -new_n2583_ = NAND ( new_n2439_, new_n2433_ ) -new_n2584_ = NAND ( NET_446, NET_201 ) -new_n2585_ = OR ( NET_446, NET_201 ) -new_n2586_ = NAND ( new_n2585_, new_n2584_, new_n2583_ ) -NET_4744 = AND ( new_n2586_, new_n2582_ ) -new_n2588_ = OR ( new_n1078_, NET_465 ) -new_n2589_ = NOT ( NET_25 ) -new_n2590_ = OR ( new_n1078_, NET_220 ) -new_n2591_ = NAND ( new_n1078_, new_n1862_ ) -new_n2592_ = NAND ( new_n2591_, new_n2590_ ) -new_n2593_ = OR ( new_n2592_, new_n2589_ ) -new_n2594_ = NAND ( new_n2592_, new_n2589_ ) -new_n2595_ = NAND ( new_n2594_, new_n2593_ ) -new_n2596_ = NAND ( new_n2451_, new_n2448_ ) -new_n2597_ = NAND ( new_n2596_, new_n2447_ ) -new_n2598_ = XNOR ( new_n2597_, new_n2595_ ) -new_n2599_ = OR ( new_n2598_, new_n1080_ ) -new_n2600_ = NAND ( new_n2599_, new_n2588_ ) -new_n2601_ = OR ( new_n2600_, NET_275 ) -new_n2602_ = NOT ( NET_40 ) -new_n2603_ = OR ( new_n1125_, new_n2602_ ) -new_n2604_ = XOR ( new_n2458_, NET_40 ) -new_n2605_ = OR ( new_n2604_, new_n1127_ ) -NET_4747 = NAND ( new_n2605_, new_n2603_, new_n2601_ ) -new_n2607_ = NOT ( NET_241 ) -new_n2608_ = OR ( NET_23566, new_n2607_ ) -new_n2609_ = XOR ( new_n2533_, new_n2466_ ) -new_n2610_ = NAND ( new_n2609_, new_n2063_ ) -new_n2611_ = NAND ( new_n2004_, new_n2002_, NET_189 ) -new_n2612_ = NAND ( new_n2009_, new_n2007_, NET_125 ) -new_n2613_ = NAND ( new_n1999_, new_n1992_, NET_157 ) -new_n2614_ = NAND ( new_n2613_, new_n2612_, new_n2611_, new_n2610_ ) -new_n2615_ = NAND ( new_n2614_, NET_23566 ) -NET_4751 = NAND ( new_n2615_, new_n2608_ ) -new_n2617_ = OR ( new_n2598_, new_n1078_ ) -new_n2618_ = NAND ( new_n1078_, new_n2252_ ) -new_n2619_ = NAND ( new_n2618_, new_n2617_ ) -new_n2620_ = OR ( new_n2619_, NET_520 ) -new_n2621_ = OR ( new_n1101_, new_n1314_ ) -new_n2622_ = XOR ( new_n1318_, NET_285 ) -new_n2623_ = OR ( new_n2622_, new_n1141_ ) -NET_4772 = NAND ( new_n2623_, new_n2621_, new_n2620_ ) -new_n2625_ = NOT ( NET_486 ) -new_n2626_ = OR ( NET_23568, new_n2625_ ) -new_n2627_ = XOR ( new_n2555_, new_n2503_ ) -new_n2628_ = NAND ( new_n2627_, new_n1657_ ) -new_n2629_ = NAND ( new_n1597_, new_n1595_, NET_434 ) -new_n2630_ = NOT ( NET_370 ) -new_n2631_ = OR ( new_n1604_, new_n2630_ ) -new_n2632_ = NOT ( NET_402 ) -new_n2633_ = OR ( new_n1591_, new_n2632_ ) -new_n2634_ = NAND ( new_n2633_, new_n2631_, new_n2629_, new_n2628_ ) -new_n2635_ = NAND ( new_n2634_, NET_23568 ) -NET_4774 = NAND ( new_n2635_, new_n2626_ ) -new_n2637_ = NOR ( NET_445, NET_200 ) -new_n2638_ = NOT ( NET_200 ) -new_n2639_ = NOT ( NET_445 ) -new_n2640_ = NOR ( new_n2639_, new_n2638_ ) -new_n2641_ = NOR ( new_n2640_, new_n2637_ ) -new_n2642_ = NAND ( new_n2585_, new_n2583_ ) -new_n2643_ = NAND ( new_n2642_, new_n2584_ ) -NET_4855 = XOR ( new_n2643_, new_n2641_ ) -new_n2645_ = OR ( new_n1078_, NET_466 ) -new_n2646_ = NOT ( NET_24 ) -new_n2647_ = OR ( new_n1078_, NET_221 ) -new_n2648_ = NAND ( new_n1078_, new_n1848_ ) -new_n2649_ = NAND ( new_n2648_, new_n2647_ ) -new_n2650_ = OR ( new_n2649_, new_n2646_ ) -new_n2651_ = NAND ( new_n2649_, new_n2646_ ) -new_n2652_ = NAND ( new_n2651_, new_n2650_ ) -new_n2653_ = NAND ( new_n2597_, new_n2594_ ) -new_n2654_ = NAND ( new_n2653_, new_n2593_ ) -new_n2655_ = XNOR ( new_n2654_, new_n2652_ ) -new_n2656_ = OR ( new_n2655_, new_n1080_ ) -new_n2657_ = NAND ( new_n2656_, new_n2645_ ) -new_n2658_ = OR ( new_n2657_, NET_275 ) -new_n2659_ = NOT ( NET_41 ) -new_n2660_ = OR ( new_n1125_, new_n2659_ ) -new_n2661_ = NAND ( new_n2458_, new_n2602_ ) -new_n2662_ = AND ( new_n2661_, NET_41 ) -new_n2663_ = OR ( new_n2662_, new_n1236_ ) -new_n2664_ = OR ( new_n2663_, new_n1127_ ) -NET_5032 = NAND ( new_n2664_, new_n2660_, new_n2658_ ) -new_n2666_ = OR ( new_n2655_, new_n1078_ ) -new_n2667_ = NAND ( new_n1078_, new_n2238_ ) -new_n2668_ = NAND ( new_n2667_, new_n2666_ ) -new_n2669_ = OR ( new_n2668_, NET_520 ) -new_n2670_ = OR ( new_n1101_, new_n1315_ ) -new_n2671_ = NAND ( new_n1318_, new_n1314_ ) -new_n2672_ = NAND ( new_n2671_, NET_286 ) -new_n2673_ = NAND ( new_n2672_, new_n1319_ ) -new_n2674_ = OR ( new_n2673_, new_n1141_ ) -NET_5109 = NAND ( new_n2674_, new_n2670_, new_n2669_ ) -new_n2676_ = OR ( NET_444, NET_199 ) -new_n2677_ = NAND ( NET_444, NET_199 ) -new_n2678_ = NAND ( new_n2677_, new_n2676_ ) -new_n2679_ = NOT ( new_n2637_ ) -new_n2680_ = AND ( new_n2643_, new_n2679_ ) -new_n2681_ = OR ( new_n2680_, new_n2640_ ) -NET_5208 = XNOR ( new_n2681_, new_n2678_ ) -new_n2683_ = OR ( new_n1078_, NET_467 ) -new_n2684_ = NOT ( NET_23 ) -new_n2685_ = OR ( new_n1078_, NET_222 ) -new_n2686_ = NAND ( new_n1078_, new_n1834_ ) -new_n2687_ = NAND ( new_n2686_, new_n2685_ ) -new_n2688_ = OR ( new_n2687_, new_n2684_ ) -new_n2689_ = NAND ( new_n2687_, new_n2684_ ) -new_n2690_ = NAND ( new_n2689_, new_n2688_ ) -new_n2691_ = NAND ( new_n2654_, new_n2651_ ) -new_n2692_ = NAND ( new_n2691_, new_n2650_ ) -new_n2693_ = XNOR ( new_n2692_, new_n2690_ ) -new_n2694_ = OR ( new_n2693_, new_n1080_ ) -new_n2695_ = NAND ( new_n2694_, new_n2683_ ) -new_n2696_ = OR ( new_n2695_, NET_275 ) -new_n2697_ = NOT ( NET_42 ) -new_n2698_ = OR ( new_n1125_, new_n2697_ ) -new_n2699_ = XOR ( new_n1236_, NET_42 ) -new_n2700_ = OR ( new_n2699_, new_n1127_ ) -NET_5314 = NAND ( new_n2700_, new_n2698_, new_n2696_ ) -new_n2702_ = OR ( new_n2693_, new_n1078_ ) -new_n2703_ = NAND ( new_n1078_, new_n2225_ ) -new_n2704_ = NAND ( new_n2703_, new_n2702_ ) -new_n2705_ = OR ( new_n2704_, NET_520 ) -new_n2706_ = NOT ( NET_287 ) -new_n2707_ = OR ( new_n1101_, new_n2706_ ) -new_n2708_ = XOR ( new_n1319_, new_n2706_ ) -new_n2709_ = OR ( new_n2708_, new_n1141_ ) -NET_5317 = NAND ( new_n2709_, new_n2707_, new_n2705_ ) -new_n2711_ = NOT ( NET_198 ) -new_n2712_ = NOT ( NET_443 ) -new_n2713_ = NOR ( new_n2712_, new_n2711_ ) -new_n2714_ = OR ( NET_443, NET_198 ) -new_n2715_ = NAND ( new_n2681_, new_n2676_ ) -new_n2716_ = NAND ( new_n2715_, new_n2677_ ) -new_n2717_ = NAND ( new_n2716_, new_n2714_ ) -new_n2718_ = OR ( new_n2717_, new_n2713_ ) -new_n2719_ = NOT ( new_n2713_ ) -new_n2720_ = NAND ( new_n2714_, new_n2719_ ) -new_n2721_ = NAND ( new_n2720_, new_n2715_, new_n2677_ ) -NET_5473 = AND ( new_n2721_, new_n2718_ ) -new_n2723_ = OR ( new_n1078_, NET_468 ) -new_n2724_ = NOT ( NET_22 ) -new_n2725_ = OR ( new_n1078_, NET_223 ) -new_n2726_ = NAND ( new_n1078_, new_n1820_ ) -new_n2727_ = NAND ( new_n2726_, new_n2725_ ) -new_n2728_ = NOR ( new_n2727_, new_n2724_ ) -new_n2729_ = NOT ( new_n2728_ ) -new_n2730_ = NAND ( new_n2727_, new_n2724_ ) -new_n2731_ = NAND ( new_n2730_, new_n2729_ ) -new_n2732_ = NAND ( new_n2692_, new_n2689_ ) -new_n2733_ = NAND ( new_n2732_, new_n2731_, new_n2688_ ) -new_n2734_ = NAND ( new_n2732_, new_n2688_ ) -new_n2735_ = NAND ( new_n2734_, new_n2730_ ) -new_n2736_ = OR ( new_n2735_, new_n2728_ ) -new_n2737_ = NAND ( new_n2736_, new_n2733_ ) -new_n2738_ = NAND ( new_n2737_, new_n1078_ ) -new_n2739_ = NAND ( new_n2738_, new_n2723_ ) -new_n2740_ = OR ( new_n2739_, NET_275 ) -new_n2741_ = NOT ( NET_43 ) -new_n2742_ = OR ( new_n1125_, new_n2741_ ) -new_n2743_ = AND ( new_n1237_, new_n1236_ ) -new_n2744_ = NAND ( new_n1236_, new_n2697_ ) -new_n2745_ = AND ( new_n2744_, NET_43 ) -new_n2746_ = OR ( new_n2745_, new_n2743_ ) -new_n2747_ = OR ( new_n2746_, new_n1127_ ) -NET_5557 = NAND ( new_n2747_, new_n2742_, new_n2740_ ) -new_n2749_ = NAND ( new_n2737_, new_n1080_ ) -new_n2750_ = NAND ( new_n1078_, new_n2212_ ) -new_n2751_ = NAND ( new_n2750_, new_n2749_ ) -new_n2752_ = OR ( new_n2751_, NET_520 ) -new_n2753_ = NOT ( NET_288 ) -new_n2754_ = OR ( new_n1101_, new_n2753_ ) -new_n2755_ = NOR ( new_n1319_, NET_287 ) -new_n2756_ = NOR ( new_n2755_, new_n2753_ ) -new_n2757_ = OR ( new_n2756_, new_n1320_ ) -new_n2758_ = OR ( new_n2757_, new_n1141_ ) -NET_5562 = NAND ( new_n2758_, new_n2754_, new_n2752_ ) -new_n2760_ = NOT ( NET_197 ) -new_n2761_ = NOT ( NET_442 ) -new_n2762_ = NOR ( new_n2761_, new_n2760_ ) -new_n2763_ = NOR ( NET_442, NET_197 ) -new_n2764_ = NOR ( new_n2763_, new_n2762_ ) -new_n2765_ = NAND ( new_n2717_, new_n2719_ ) -new_n2766_ = NOR ( new_n2765_, new_n2764_ ) -new_n2767_ = NOT ( new_n2765_ ) -new_n2768_ = NOR ( new_n2767_, new_n2763_, new_n2762_ ) -NET_5609 = NOR ( new_n2768_, new_n2766_ ) -new_n2770_ = OR ( new_n1078_, NET_469 ) -new_n2771_ = OR ( new_n1078_, NET_224 ) -new_n2772_ = NAND ( new_n1078_, new_n1806_ ) -new_n2773_ = NAND ( new_n2772_, new_n2771_ ) -new_n2774_ = NAND ( new_n2773_, NET_21 ) -new_n2775_ = OR ( new_n2773_, NET_21 ) -new_n2776_ = NAND ( new_n2775_, new_n2774_, new_n2735_, new_n2729_ ) -new_n2777_ = NOT ( NET_21 ) -new_n2778_ = NOR ( new_n2773_, new_n2777_ ) -new_n2779_ = NAND ( new_n2735_, new_n2729_ ) -new_n2780_ = NAND ( new_n2773_, new_n2777_ ) -new_n2781_ = NAND ( new_n2780_, new_n2779_ ) -new_n2782_ = OR ( new_n2781_, new_n2778_ ) -new_n2783_ = NAND ( new_n2782_, new_n2776_ ) -new_n2784_ = NAND ( new_n2783_, new_n1078_ ) -new_n2785_ = NAND ( new_n2784_, new_n2770_ ) -new_n2786_ = OR ( new_n2785_, NET_275 ) -new_n2787_ = NOT ( NET_44 ) -new_n2788_ = OR ( new_n1125_, new_n2787_ ) -new_n2789_ = XOR ( new_n2743_, NET_44 ) -new_n2790_ = OR ( new_n2789_, new_n1127_ ) -NET_5676 = NAND ( new_n2790_, new_n2788_, new_n2786_ ) -new_n2792_ = NAND ( new_n2783_, new_n1080_ ) -new_n2793_ = NAND ( new_n1078_, new_n2199_ ) -new_n2794_ = NAND ( new_n2793_, new_n2792_ ) -new_n2795_ = OR ( new_n2794_, NET_520 ) -new_n2796_ = OR ( new_n1101_, new_n1312_ ) -new_n2797_ = XOR ( new_n1320_, NET_289 ) -new_n2798_ = OR ( new_n2797_, new_n1141_ ) -NET_5685 = NAND ( new_n2798_, new_n2796_, new_n2795_ ) -new_n2800_ = NOR ( NET_441, NET_196 ) -new_n2801_ = NOT ( NET_196 ) -new_n2802_ = NOT ( NET_441 ) -new_n2803_ = NOR ( new_n2802_, new_n2801_ ) -new_n2804_ = OR ( new_n2803_, new_n2800_ ) -new_n2805_ = NOR ( new_n2767_, new_n2763_ ) -new_n2806_ = NOR ( new_n2805_, new_n2762_ ) -NET_5734 = XOR ( new_n2806_, new_n2804_ ) -new_n2808_ = OR ( new_n1078_, NET_470 ) -new_n2809_ = NOT ( NET_20 ) -new_n2810_ = OR ( new_n1078_, NET_225 ) -new_n2811_ = NAND ( new_n1078_, new_n1792_ ) -new_n2812_ = NAND ( new_n2811_, new_n2810_ ) -new_n2813_ = OR ( new_n2812_, new_n2809_ ) -new_n2814_ = NAND ( new_n2812_, new_n2809_ ) -new_n2815_ = NAND ( new_n2814_, new_n2813_ ) -new_n2816_ = NOT ( new_n2778_ ) -new_n2817_ = NAND ( new_n2781_, new_n2816_ ) -new_n2818_ = XNOR ( new_n2817_, new_n2815_ ) -new_n2819_ = OR ( new_n2818_, new_n1080_ ) -new_n2820_ = NAND ( new_n2819_, new_n2808_ ) -new_n2821_ = OR ( new_n2820_, NET_275 ) -new_n2822_ = NOT ( NET_45 ) -new_n2823_ = OR ( new_n1125_, new_n2822_ ) -new_n2824_ = NAND ( new_n1238_, new_n2743_ ) -new_n2825_ = NAND ( new_n2743_, new_n2787_ ) -new_n2826_ = NAND ( new_n2825_, NET_45 ) -new_n2827_ = NAND ( new_n2826_, new_n2824_ ) -new_n2828_ = OR ( new_n2827_, new_n1127_ ) -NET_5738 = NAND ( new_n2828_, new_n2823_, new_n2821_ ) -new_n2830_ = OR ( new_n2818_, new_n1078_ ) -new_n2831_ = NAND ( new_n1078_, new_n2186_ ) -new_n2832_ = NAND ( new_n2831_, new_n2830_ ) -new_n2833_ = OR ( new_n2832_, NET_520 ) -new_n2834_ = OR ( new_n1101_, new_n1313_ ) -new_n2835_ = NAND ( new_n1320_, new_n1312_ ) -new_n2836_ = NAND ( new_n2835_, NET_290 ) -new_n2837_ = NAND ( new_n2836_, new_n1321_ ) -new_n2838_ = OR ( new_n2837_, new_n1141_ ) -NET_5760 = NAND ( new_n2838_, new_n2834_, new_n2833_ ) -new_n2840_ = NAND ( new_n1300_, new_n1121_ ) -new_n2841_ = NOR ( NET_64, new_n1123_ ) -new_n2842_ = NOR ( new_n1131_, new_n1261_ ) -new_n2843_ = NOR ( new_n2842_, new_n2841_ ) -new_n2844_ = NAND ( new_n2843_, new_n1299_ ) -new_n2845_ = NAND ( new_n2844_, new_n2840_ ) -new_n2846_ = OR ( new_n2354_, new_n1450_ ) -new_n2847_ = NAND ( new_n1449_, new_n1445_ ) -new_n2848_ = OR ( new_n2847_, NET_65 ) -new_n2849_ = AND ( new_n2848_, new_n2846_ ) -new_n2850_ = NAND ( new_n2349_, new_n2847_ ) -new_n2851_ = OR ( new_n2847_, new_n2347_ ) -new_n2852_ = NAND ( new_n2851_, new_n2850_ ) -new_n2853_ = AND ( new_n2852_, new_n2849_ ) -new_n2854_ = NOT ( NET_53 ) -new_n2855_ = OR ( NET_64, new_n2854_ ) -new_n2856_ = NOT ( NET_50 ) -new_n2857_ = NOT ( NET_51 ) -new_n2858_ = NOR ( new_n1241_, new_n1240_ ) -new_n2859_ = NAND ( new_n2858_, new_n2857_, new_n2856_ ) -new_n2860_ = OR ( new_n2859_, NET_52 ) -new_n2861_ = AND ( new_n2860_, NET_53 ) -new_n2862_ = OR ( new_n2861_, new_n1244_ ) -new_n2863_ = OR ( new_n2862_, new_n1261_ ) -new_n2864_ = NAND ( new_n2863_, new_n2855_ ) -new_n2865_ = NOT ( NET_52 ) -new_n2866_ = NOR ( NET_64, new_n2865_ ) -new_n2867_ = XOR ( new_n2859_, new_n2865_ ) -new_n2868_ = NOR ( new_n2867_, new_n1261_ ) -new_n2869_ = NOR ( new_n2868_, new_n2866_ ) -new_n2870_ = NOT ( new_n2869_ ) -new_n2871_ = OR ( new_n2870_, new_n2864_ ) -new_n2872_ = NOR ( new_n2871_, new_n1277_ ) -new_n2873_ = NAND ( new_n2872_, new_n1266_ ) -new_n2874_ = NOT ( new_n1270_ ) -new_n2875_ = AND ( new_n2863_, new_n2855_ ) -new_n2876_ = NAND ( new_n2869_, new_n1276_ ) -new_n2877_ = OR ( new_n2876_, new_n2875_ ) -new_n2878_ = OR ( new_n2877_, new_n2874_ ) -new_n2879_ = NOR ( new_n2869_, new_n2864_ ) -new_n2880_ = NAND ( new_n2879_, new_n2874_ ) -new_n2881_ = OR ( new_n2871_, new_n1270_ ) -new_n2882_ = NAND ( new_n2881_, new_n2880_, new_n2878_ ) -new_n2883_ = NAND ( new_n2882_, new_n1266_ ) -new_n2884_ = NAND ( new_n2883_, new_n2873_ ) -new_n2885_ = NAND ( new_n2884_, new_n2853_ ) -new_n2886_ = OR ( new_n2883_, new_n2853_ ) -new_n2887_ = XNOR ( new_n2852_, new_n2849_ ) -new_n2888_ = OR ( new_n2887_, new_n2873_ ) -new_n2889_ = AND ( new_n2888_, new_n2886_, new_n2885_ ) -new_n2890_ = OR ( new_n2889_, new_n2845_ ) -new_n2891_ = NAND ( new_n2852_, new_n2849_ ) -new_n2892_ = NOR ( new_n2875_, new_n1270_ ) -new_n2893_ = NAND ( new_n2892_, new_n1284_, new_n1266_ ) -new_n2894_ = OR ( new_n2893_, new_n2891_ ) -new_n2895_ = OR ( new_n2893_, new_n2853_ ) -new_n2896_ = OR ( new_n2852_, new_n2849_ ) -new_n2897_ = OR ( new_n2896_, new_n2873_ ) -new_n2898_ = AND ( new_n2897_, new_n2895_, new_n2894_ ) -new_n2899_ = NAND ( new_n2898_, new_n1284_ ) -new_n2900_ = NAND ( new_n2899_, new_n2333_ ) -new_n2901_ = OR ( new_n1276_, new_n1270_ ) -new_n2902_ = AND ( new_n2901_, new_n2876_ ) -new_n2903_ = NAND ( new_n2902_, new_n1289_, new_n1287_, new_n1266_ ) -new_n2904_ = OR ( new_n2903_, new_n2327_ ) -new_n2905_ = NAND ( new_n2902_, new_n1290_, new_n1266_ ) -new_n2906_ = OR ( new_n2905_, new_n2329_ ) -new_n2907_ = NAND ( new_n2906_, new_n2904_, new_n2900_, new_n2890_ ) -new_n2908_ = NAND ( new_n2888_, new_n2886_, new_n2885_ ) -new_n2909_ = NAND ( new_n2908_, new_n2333_ ) -new_n2910_ = OR ( new_n2898_, new_n2845_ ) -new_n2911_ = NOT ( new_n2843_ ) -new_n2912_ = NAND ( new_n2905_, new_n2903_ ) -new_n2913_ = NAND ( new_n2912_, new_n2911_ ) -new_n2914_ = NAND ( new_n2913_, new_n2910_, new_n2909_ ) -new_n2915_ = NAND ( new_n2893_, new_n1284_ ) -new_n2916_ = XOR ( new_n2915_, new_n2914_ ) -new_n2917_ = NAND ( new_n2916_, new_n2907_ ) -new_n2918_ = OR ( new_n2916_, new_n2907_ ) -new_n2919_ = NAND ( new_n2918_, new_n2917_ ) -new_n2920_ = NAND ( new_n1300_, new_n1090_ ) -new_n2921_ = NOR ( NET_64, new_n1129_ ) -new_n2922_ = NOR ( new_n1261_, new_n1129_ ) -new_n2923_ = NOR ( new_n2922_, new_n2921_ ) -new_n2924_ = NAND ( new_n2923_, new_n1299_ ) -new_n2925_ = NAND ( new_n2924_, new_n2920_ ) -new_n2926_ = NOR ( new_n2925_, new_n2889_ ) -new_n2927_ = NOT ( new_n2344_ ) -new_n2928_ = AND ( new_n2897_, new_n2895_, new_n2894_, new_n1284_ ) -new_n2929_ = NOR ( new_n2928_, new_n2927_ ) -new_n2930_ = OR ( new_n2903_, new_n2340_ ) -new_n2931_ = OR ( new_n2905_, new_n2342_ ) -new_n2932_ = OR ( new_n2923_, new_n1304_ ) -new_n2933_ = NAND ( new_n2932_, new_n2931_, new_n2930_ ) -new_n2934_ = NOR ( new_n2933_, new_n2929_, new_n2926_ ) -new_n2935_ = NAND ( new_n2908_, new_n2344_ ) -new_n2936_ = OR ( new_n2925_, new_n2898_ ) -new_n2937_ = NOT ( new_n2923_ ) -new_n2938_ = NAND ( new_n2937_, new_n2912_ ) -new_n2939_ = OR ( new_n1290_, NET_129 ) -new_n2940_ = NAND ( new_n1290_, new_n2342_ ) -new_n2941_ = NAND ( new_n2940_, new_n2939_ ) -new_n2942_ = OR ( new_n2941_, new_n1304_ ) -new_n2943_ = NAND ( new_n2942_, new_n2938_, new_n2936_, new_n2935_ ) -new_n2944_ = NAND ( new_n2943_, new_n2934_ ) -new_n2945_ = OR ( new_n2943_, new_n2915_ ) -new_n2946_ = NAND ( new_n2945_, new_n2944_ ) -new_n2947_ = XNOR ( new_n2946_, new_n2919_ ) -new_n2948_ = NOT ( new_n1442_ ) -new_n2949_ = NAND ( new_n1304_, new_n1301_, NET_275 ) -new_n2950_ = AND ( new_n2949_, new_n2948_ ) -new_n2951_ = NAND ( new_n2950_, new_n2902_, new_n1298_ ) -new_n2952_ = NOR ( new_n2951_, new_n2947_ ) -new_n2953_ = NOT ( new_n2872_ ) -new_n2954_ = NOT ( new_n2880_ ) -new_n2955_ = NOR ( new_n2892_, new_n2954_ ) -new_n2956_ = NAND ( new_n2955_, new_n2881_, new_n2877_, new_n2953_ ) -new_n2957_ = NAND ( new_n2956_, new_n2950_ ) -new_n2958_ = OR ( new_n1284_, NET_23564 ) -new_n2959_ = NAND ( new_n2958_, new_n2957_ ) -new_n2960_ = AND ( new_n2959_, new_n1298_ ) -new_n2961_ = OR ( new_n1290_, new_n2327_ ) -new_n2962_ = NAND ( new_n1290_, NET_162 ) -new_n2963_ = NAND ( new_n2962_, new_n2961_ ) -new_n2964_ = NOR ( new_n2963_, new_n2911_ ) -new_n2965_ = NOT ( new_n2964_ ) -new_n2966_ = NAND ( new_n2963_, new_n2911_ ) -new_n2967_ = NAND ( new_n2966_, new_n2965_ ) -new_n2968_ = OR ( new_n2941_, new_n2923_ ) -new_n2969_ = OR ( new_n2968_, new_n2967_ ) -new_n2970_ = NAND ( new_n2968_, new_n2967_ ) -new_n2971_ = NAND ( new_n2970_, new_n2969_, new_n2960_ ) -new_n2972_ = NOT ( new_n1298_ ) -new_n2973_ = NAND ( new_n2949_, new_n2972_, new_n1303_, NET_275 ) -new_n2974_ = NOR ( new_n2956_, new_n2902_ ) -new_n2975_ = NOR ( new_n2974_, new_n1298_ ) -new_n2976_ = NAND ( new_n2975_, new_n2950_ ) -new_n2977_ = NAND ( new_n2976_, new_n2973_ ) -new_n2978_ = NAND ( new_n2977_, new_n2911_ ) -new_n2979_ = OR ( new_n2949_, new_n1043_ ) -new_n2980_ = OR ( NET_275, new_n2331_ ) -new_n2981_ = NAND ( new_n2980_, new_n2979_, new_n2978_, new_n2971_ ) -NET_5810 = OR ( new_n2981_, new_n2952_ ) -new_n2983_ = NOR ( NET_89, NET_88, NET_87, NET_86 ) -new_n2984_ = NOR ( NET_85, NET_84 ) -new_n2985_ = NAND ( new_n2984_, new_n2983_, new_n1483_, new_n1481_ ) -new_n2986_ = NOR ( NET_93, NET_92, NET_91, NET_90 ) -new_n2987_ = NAND ( new_n2986_, new_n1509_, new_n1507_, new_n1505_ ) -new_n2988_ = NAND ( new_n1463_, new_n1461_, new_n1459_, new_n1457_ ) -new_n2989_ = OR ( new_n2988_, NET_69, NET_68 ) -new_n2990_ = NOR ( NET_81, NET_80, NET_79, NET_78 ) -new_n2991_ = NOR ( NET_77, NET_76 ) -new_n2992_ = NAND ( new_n2991_, new_n2990_, new_n1467_, new_n1465_ ) -new_n2993_ = OR ( new_n2992_, new_n2989_, new_n2987_, new_n2985_ ) -new_n2994_ = NAND ( new_n2993_, new_n1450_ ) -new_n2995_ = OR ( new_n2847_, new_n1440_ ) -new_n2996_ = NAND ( new_n2995_, new_n2994_ ) -new_n2997_ = NOR ( new_n2996_, new_n2891_ ) -new_n2998_ = NOT ( new_n2997_ ) -new_n2999_ = NOR ( new_n2998_, new_n1442_ ) -new_n3000_ = NAND ( new_n2872_, new_n1270_ ) -new_n3001_ = OR ( new_n2881_, new_n1276_ ) -new_n3002_ = AND ( new_n3001_, new_n3000_ ) -new_n3003_ = OR ( new_n2955_, new_n1276_ ) -new_n3004_ = NAND ( new_n3003_, new_n3002_, new_n2878_ ) -new_n3005_ = NAND ( new_n3004_, new_n2999_ ) -new_n3006_ = OR ( new_n3005_, new_n2947_ ) -new_n3007_ = NOT ( new_n2892_ ) -new_n3008_ = AND ( new_n3007_, new_n2871_ ) -new_n3009_ = NAND ( new_n3008_, new_n2853_ ) -new_n3010_ = NAND ( new_n3008_, new_n2891_ ) -new_n3011_ = NAND ( new_n3010_, new_n3009_ ) -new_n3012_ = NOT ( new_n3011_ ) -new_n3013_ = NOR ( new_n2870_, new_n2853_ ) -new_n3014_ = NOT ( new_n3013_ ) -new_n3015_ = NAND ( new_n2869_, new_n2853_ ) -new_n3016_ = NAND ( new_n3015_, new_n3014_, new_n3012_ ) -new_n3017_ = NOT ( new_n3016_ ) -new_n3018_ = NOR ( new_n3017_, new_n2845_ ) -new_n3019_ = NOR ( new_n3011_, new_n2874_ ) -new_n3020_ = OR ( new_n3019_, new_n2927_ ) -new_n3021_ = NOR ( new_n3017_, new_n2925_ ) -new_n3022_ = NAND ( new_n3021_, new_n3020_ ) -new_n3023_ = XNOR ( new_n3022_, new_n3018_ ) -new_n3024_ = NOT ( new_n3019_ ) -new_n3025_ = NAND ( new_n3024_, new_n2333_ ) -new_n3026_ = XNOR ( new_n3025_, new_n3023_ ) -new_n3027_ = NOT ( new_n3026_ ) -new_n3028_ = NOR ( new_n2869_, new_n1277_ ) -new_n3029_ = NAND ( new_n3028_, new_n1270_ ) -new_n3030_ = NOR ( new_n2870_, new_n1276_ ) -new_n3031_ = NOT ( new_n3030_ ) -new_n3032_ = NOR ( new_n3031_, new_n2874_ ) -new_n3033_ = NAND ( new_n3032_, new_n2875_ ) -new_n3034_ = NAND ( new_n3033_, new_n3029_ ) -new_n3035_ = NAND ( new_n3034_, new_n2999_ ) -new_n3036_ = OR ( new_n3035_, new_n3027_ ) -new_n3037_ = NOT ( NET_23566 ) -new_n3038_ = NAND ( new_n2864_, new_n1277_, new_n1270_ ) -new_n3039_ = NOT ( new_n3038_ ) -new_n3040_ = OR ( new_n3039_, new_n3034_, new_n3004_ ) -new_n3041_ = NAND ( new_n3040_, new_n2998_ ) -new_n3042_ = NAND ( new_n2871_, new_n1278_ ) -new_n3043_ = NAND ( new_n3042_, new_n3041_ ) -new_n3044_ = NAND ( new_n3043_, new_n2948_ ) -new_n3045_ = NOT ( new_n2881_ ) -new_n3046_ = NOR ( new_n1303_, new_n1277_ ) -new_n3047_ = NAND ( new_n3046_, new_n3045_ ) -new_n3048_ = NOT ( new_n3047_ ) -new_n3049_ = NAND ( new_n3048_, new_n1266_, NET_275 ) -new_n3050_ = OR ( new_n3049_, new_n2997_ ) -new_n3051_ = NAND ( new_n3050_, new_n3044_, new_n2958_, new_n3037_ ) -new_n3052_ = NAND ( new_n3051_, NET_265 ) -new_n3053_ = NOT ( new_n2845_ ) -new_n3054_ = NAND ( new_n3039_, new_n2999_ ) -new_n3055_ = NAND ( new_n2870_, new_n1277_, new_n1270_ ) -new_n3056_ = NOR ( new_n3055_, new_n2864_ ) -new_n3057_ = NOT ( new_n3056_ ) -new_n3058_ = NOR ( new_n3057_, new_n1442_ ) -new_n3059_ = NOT ( new_n3058_ ) -new_n3060_ = NAND ( new_n3059_, new_n3054_ ) -new_n3061_ = NAND ( new_n3060_, new_n3053_ ) -new_n3062_ = NOR ( new_n3049_, new_n2998_, new_n1298_ ) -new_n3063_ = NAND ( new_n3062_, new_n2322_ ) -new_n3064_ = NOR ( new_n3049_, new_n2998_, new_n2972_ ) -new_n3065_ = NAND ( new_n3064_, new_n2344_ ) -new_n3066_ = AND ( new_n3065_, new_n3063_, new_n3061_, new_n2980_ ) -NET_5811 = NAND ( new_n3066_, new_n3052_, new_n3036_, new_n3006_ ) -new_n3068_ = NAND ( new_n1421_, new_n1137_ ) -new_n3069_ = NOR ( NET_309, new_n1139_ ) -new_n3070_ = NOR ( new_n1144_, new_n1103_ ) -new_n3071_ = NOR ( new_n3070_, new_n3069_ ) -new_n3072_ = NAND ( new_n3071_, new_n1420_ ) -new_n3073_ = NAND ( new_n3072_, new_n3068_ ) -new_n3074_ = NAND ( new_n2373_, new_n1518_ ) -new_n3075_ = OR ( new_n1518_, new_n2371_ ) -new_n3076_ = NAND ( new_n3075_, new_n3074_ ) -new_n3077_ = NOT ( new_n3076_ ) -new_n3078_ = NAND ( new_n2368_, new_n1518_ ) -new_n3079_ = OR ( new_n1518_, new_n2366_ ) -new_n3080_ = NAND ( new_n3079_, new_n3078_ ) -new_n3081_ = NOT ( new_n3080_ ) -new_n3082_ = NOR ( new_n3081_, new_n3077_ ) -new_n3083_ = NOT ( new_n3082_ ) -new_n3084_ = NOR ( NET_309, new_n1308_ ) -new_n3085_ = XOR ( new_n1324_, NET_297 ) -new_n3086_ = NOR ( new_n3085_, new_n1103_ ) -new_n3087_ = NOR ( new_n3086_, new_n3084_ ) -new_n3088_ = NOT ( new_n3087_ ) -new_n3089_ = OR ( new_n3088_, new_n1433_ ) -new_n3090_ = NAND ( new_n3088_, new_n1426_ ) -new_n3091_ = OR ( NET_309, new_n1309_ ) -new_n3092_ = NAND ( new_n1324_, new_n1308_ ) -new_n3093_ = NAND ( new_n3092_, NET_298 ) -new_n3094_ = NAND ( new_n3093_, new_n1325_ ) -new_n3095_ = OR ( new_n3094_, new_n1103_ ) -new_n3096_ = NAND ( new_n3095_, new_n3091_ ) -new_n3097_ = NOT ( new_n3096_ ) -new_n3098_ = NAND ( new_n3097_, new_n3090_, new_n3089_, new_n1352_ ) -new_n3099_ = NOR ( new_n3098_, new_n3083_ ) -new_n3100_ = NOR ( new_n3088_, new_n1434_ ) -new_n3101_ = NOT ( new_n3100_ ) -new_n3102_ = OR ( new_n3101_, new_n3082_ ) -new_n3103_ = OR ( new_n3080_, new_n1426_ ) -new_n3104_ = OR ( new_n3076_, new_n1426_ ) -new_n3105_ = NAND ( new_n3104_, new_n3103_ ) -new_n3106_ = NAND ( new_n3105_, new_n3088_ ) -new_n3107_ = NAND ( new_n3106_, new_n3102_ ) -new_n3108_ = NAND ( new_n3107_, new_n3097_, new_n1352_ ) -new_n3109_ = NOT ( new_n3108_ ) -new_n3110_ = NOR ( new_n3109_, new_n3099_ ) -new_n3111_ = NOR ( new_n3110_, new_n3073_ ) -new_n3112_ = NOR ( new_n3096_, new_n3087_ ) -new_n3113_ = NAND ( new_n3112_, new_n1433_, new_n1352_ ) -new_n3114_ = NOT ( new_n1426_ ) -new_n3115_ = NAND ( new_n3088_, new_n1433_ ) -new_n3116_ = NOR ( new_n3115_, new_n3114_ ) -new_n3117_ = NAND ( new_n3116_, new_n1352_ ) -new_n3118_ = NOR ( new_n3097_, new_n1426_ ) -new_n3119_ = NAND ( new_n3118_, new_n1352_, new_n1329_ ) -new_n3120_ = NAND ( new_n3119_, new_n3117_, new_n3113_ ) -new_n3121_ = NAND ( new_n3120_, new_n3083_ ) -new_n3122_ = NOT ( new_n3121_ ) -new_n3123_ = NAND ( new_n3120_, new_n3082_ ) -new_n3124_ = NOT ( new_n3123_ ) -new_n3125_ = NOR ( new_n3124_, new_n3122_ ) -new_n3126_ = NAND ( new_n3125_, new_n1329_ ) -new_n3127_ = NAND ( new_n3126_, new_n1948_ ) -new_n3128_ = NAND ( new_n3100_, new_n3096_ ) -new_n3129_ = OR ( new_n3128_, new_n3114_ ) -new_n3130_ = OR ( new_n1433_, new_n3114_ ) -new_n3131_ = NOR ( new_n3096_, new_n3088_ ) -new_n3132_ = NOT ( new_n3131_ ) -new_n3133_ = NOR ( new_n3132_, new_n1426_ ) -new_n3134_ = NOT ( new_n3133_ ) -new_n3135_ = NAND ( new_n3134_, new_n3130_, new_n3129_ ) -new_n3136_ = NAND ( new_n3135_, new_n1419_, new_n1352_ ) -new_n3137_ = OR ( new_n3136_, new_n1946_ ) -new_n3138_ = NOT ( new_n1419_ ) -new_n3139_ = NAND ( new_n3135_, new_n3138_, new_n1352_ ) -new_n3140_ = OR ( new_n3139_, new_n1944_ ) -new_n3141_ = NOT ( new_n3071_ ) -new_n3142_ = NAND ( new_n3141_, new_n1353_ ) -new_n3143_ = NAND ( new_n3142_, new_n3140_, new_n3137_, new_n3127_ ) -new_n3144_ = NOR ( new_n3143_, new_n3111_ ) -new_n3145_ = NOT ( new_n3144_ ) -new_n3146_ = NOT ( new_n3110_ ) -new_n3147_ = AND ( new_n3146_, new_n1948_ ) -new_n3148_ = OR ( new_n3125_, new_n3073_ ) -new_n3149_ = NAND ( new_n3139_, new_n3136_ ) -new_n3150_ = NAND ( new_n3149_, new_n3141_ ) -new_n3151_ = NAND ( new_n1419_, new_n1353_ ) -new_n3152_ = OR ( new_n3151_, new_n1946_ ) -new_n3153_ = NAND ( new_n3138_, new_n1353_ ) -new_n3154_ = OR ( new_n3153_, new_n1944_ ) -new_n3155_ = NAND ( new_n3154_, new_n3152_, new_n3150_, new_n3148_ ) -new_n3156_ = NOR ( new_n3155_, new_n3147_ ) -new_n3157_ = NAND ( new_n3119_, new_n3117_, new_n3113_, new_n1329_ ) -new_n3158_ = NOT ( new_n3157_ ) -new_n3159_ = XOR ( new_n3158_, new_n3156_ ) -new_n3160_ = AND ( new_n3159_, new_n3145_ ) -new_n3161_ = NOR ( new_n3159_, new_n3145_ ) -new_n3162_ = NOR ( new_n3161_, new_n3160_ ) -new_n3163_ = NAND ( new_n1421_, new_n1097_ ) -new_n3164_ = NOR ( NET_309, new_n1099_ ) -new_n3165_ = NOR ( new_n1103_, new_n1099_ ) -new_n3166_ = NOR ( new_n3165_, new_n3164_ ) -new_n3167_ = NAND ( new_n3166_, new_n1420_ ) -new_n3168_ = NAND ( new_n3167_, new_n3163_ ) -new_n3169_ = NOR ( new_n3168_, new_n3110_ ) -new_n3170_ = NAND ( new_n3126_, new_n1959_ ) -new_n3171_ = OR ( new_n3136_, new_n1957_ ) -new_n3172_ = OR ( new_n3139_, new_n1955_ ) -new_n3173_ = NOT ( new_n3166_ ) -new_n3174_ = NAND ( new_n3173_, new_n1353_ ) -new_n3175_ = NAND ( new_n3174_, new_n3172_, new_n3171_, new_n3170_ ) -new_n3176_ = OR ( new_n3175_, new_n3169_ ) -new_n3177_ = AND ( new_n3146_, new_n1959_ ) -new_n3178_ = OR ( new_n3168_, new_n3125_ ) -new_n3179_ = NAND ( new_n3173_, new_n3149_ ) -new_n3180_ = OR ( new_n3151_, new_n1957_ ) -new_n3181_ = OR ( new_n3153_, new_n1955_ ) -new_n3182_ = NAND ( new_n3181_, new_n3180_, new_n3179_, new_n3178_ ) -new_n3183_ = NOR ( new_n3182_, new_n3177_ ) -new_n3184_ = OR ( new_n3183_, new_n3176_ ) -new_n3185_ = NAND ( new_n3183_, new_n3158_ ) -new_n3186_ = NAND ( new_n3185_, new_n3184_ ) -new_n3187_ = XOR ( new_n3186_, new_n3162_ ) -new_n3188_ = NAND ( new_n3132_, new_n1435_ ) -new_n3189_ = NOR ( NET_334, NET_333, NET_332, NET_331 ) -new_n3190_ = NOR ( NET_330, NET_329 ) -new_n3191_ = NAND ( new_n3190_, new_n3189_, new_n1551_, new_n1549_ ) -new_n3192_ = NOR ( NET_338, NET_337, NET_336, NET_335 ) -new_n3193_ = NAND ( new_n3192_, new_n1577_, new_n1575_, new_n1573_ ) -new_n3194_ = NAND ( new_n1531_, new_n1529_, new_n1527_, new_n1525_ ) -new_n3195_ = OR ( new_n3194_, NET_314, NET_313 ) -new_n3196_ = NOR ( NET_326, NET_325, NET_324, NET_323 ) -new_n3197_ = NOR ( NET_322, NET_321 ) -new_n3198_ = NAND ( new_n3197_, new_n3196_, new_n1535_, new_n1533_ ) -new_n3199_ = NOR ( new_n3198_, new_n3195_, new_n3193_, new_n3191_ ) -new_n3200_ = NOR ( new_n3199_, new_n1518_ ) -new_n3201_ = NOR ( new_n1518_, new_n1511_ ) -new_n3202_ = NOR ( new_n3201_, new_n3200_ ) -new_n3203_ = AND ( new_n3202_, new_n3188_, new_n3080_, new_n3077_ ) -new_n3204_ = OR ( new_n3090_, new_n1433_ ) -new_n3205_ = NOR ( new_n3204_, new_n3096_ ) -new_n3206_ = OR ( new_n3205_, new_n3203_ ) -new_n3207_ = NAND ( new_n3206_, new_n1514_ ) -new_n3208_ = NOT ( new_n3207_ ) -new_n3209_ = OR ( new_n3131_, new_n1426_ ) -new_n3210_ = NOR ( new_n3096_, new_n3114_ ) -new_n3211_ = NAND ( new_n3210_, new_n3100_ ) -new_n3212_ = NAND ( new_n3211_, new_n3209_, new_n3115_ ) -new_n3213_ = NAND ( new_n3212_, new_n3208_ ) -new_n3214_ = NOR ( new_n3213_, new_n3187_ ) -new_n3215_ = OR ( new_n3210_, new_n1948_ ) -new_n3216_ = NOT ( new_n3210_ ) -new_n3217_ = OR ( new_n3216_, new_n3073_ ) -new_n3218_ = NAND ( new_n3217_, new_n3215_ ) -new_n3219_ = OR ( new_n3210_, new_n3073_ ) -new_n3220_ = OR ( new_n3219_, new_n3218_ ) -new_n3221_ = NAND ( new_n3219_, new_n3218_ ) -new_n3222_ = NAND ( new_n3221_, new_n3220_ ) -new_n3223_ = NOR ( new_n3210_, new_n3168_ ) -new_n3224_ = OR ( new_n3210_, new_n1959_ ) -new_n3225_ = NAND ( new_n3210_, new_n3168_ ) -new_n3226_ = NAND ( new_n3225_, new_n3224_ ) -new_n3227_ = OR ( new_n3226_, new_n3223_ ) -new_n3228_ = NAND ( new_n3226_, new_n3216_ ) -new_n3229_ = NAND ( new_n3228_, new_n3227_ ) -new_n3230_ = XOR ( new_n3229_, new_n3222_ ) -new_n3231_ = NAND ( new_n3133_, new_n1434_ ) -new_n3232_ = NAND ( new_n3231_, new_n3128_ ) -new_n3233_ = NAND ( new_n3232_, new_n3208_ ) -new_n3234_ = NOR ( new_n3216_, new_n1433_ ) -new_n3235_ = NAND ( new_n3234_, new_n3087_ ) -new_n3236_ = NOR ( new_n3235_, new_n3207_ ) -new_n3237_ = NOT ( new_n3236_ ) -new_n3238_ = NAND ( new_n3237_, new_n3233_ ) -new_n3239_ = NAND ( new_n3238_, new_n3230_ ) -new_n3240_ = OR ( new_n3204_, new_n3097_ ) -new_n3241_ = OR ( new_n3130_, new_n3097_, new_n3088_ ) -new_n3242_ = NAND ( new_n3241_, new_n3240_ ) -new_n3243_ = NAND ( new_n3242_, new_n3208_ ) -new_n3244_ = OR ( new_n3243_, new_n3073_ ) -new_n3245_ = NAND ( new_n3207_, NET_407 ) -new_n3246_ = NOT ( NET_510 ) -new_n3247_ = NAND ( new_n3205_, new_n1514_ ) -new_n3248_ = OR ( new_n3247_, new_n3246_ ) -new_n3249_ = AND ( new_n3248_, new_n3245_, new_n3244_ ) -new_n3250_ = NOT ( new_n1415_ ) -new_n3251_ = NOR ( new_n1436_, new_n3250_ ) -new_n3252_ = NOT ( new_n3251_ ) -new_n3253_ = NOR ( new_n3252_, new_n3207_ ) -new_n3254_ = NAND ( new_n3253_, new_n1959_ ) -new_n3255_ = NOR ( new_n1436_, new_n1415_ ) -new_n3256_ = NOT ( new_n3255_ ) -new_n3257_ = NOR ( new_n3256_, new_n3207_ ) -new_n3258_ = NAND ( new_n3257_, new_n1937_ ) -new_n3259_ = NAND ( new_n3258_, new_n3254_, new_n3249_, new_n3239_ ) -NET_5836 = OR ( new_n3259_, new_n3214_ ) -new_n3261_ = OR ( new_n1435_, new_n1420_ ) -new_n3262_ = NAND ( new_n1438_, new_n3261_, new_n1354_, NET_520 ) -new_n3263_ = NAND ( new_n3134_, new_n3130_, new_n3128_ ) -new_n3264_ = NAND ( new_n3263_, new_n3262_, new_n1514_, new_n1415_ ) -new_n3265_ = NAND ( new_n1415_, NET_23568 ) -new_n3266_ = NAND ( new_n3265_, new_n3264_ ) -new_n3267_ = NOT ( new_n3266_ ) -new_n3268_ = OR ( new_n3267_, new_n3187_ ) -new_n3269_ = NOR ( new_n1329_, NET_23567 ) -new_n3270_ = NOT ( new_n3269_ ) -new_n3271_ = NAND ( new_n3131_, new_n1433_ ) -new_n3272_ = NAND ( new_n3271_, new_n3209_, new_n3115_ ) -new_n3273_ = NAND ( new_n3272_, new_n3262_, new_n1514_ ) -new_n3274_ = NAND ( new_n3273_, new_n3270_ ) -new_n3275_ = AND ( new_n3274_, new_n1415_ ) -new_n3276_ = OR ( new_n1419_, new_n1944_ ) -new_n3277_ = NAND ( new_n1419_, NET_407 ) -new_n3278_ = NAND ( new_n3277_, new_n3276_ ) -new_n3279_ = NOR ( new_n3278_, new_n3141_ ) -new_n3280_ = NOT ( new_n3279_ ) -new_n3281_ = NAND ( new_n3278_, new_n3141_ ) -new_n3282_ = NAND ( new_n3281_, new_n3280_ ) -new_n3283_ = OR ( new_n1419_, NET_374 ) -new_n3284_ = NAND ( new_n1419_, new_n1957_ ) -new_n3285_ = NAND ( new_n3284_, new_n3283_ ) -new_n3286_ = OR ( new_n3285_, new_n3166_ ) -new_n3287_ = OR ( new_n3286_, new_n3282_ ) -new_n3288_ = NAND ( new_n3286_, new_n3282_ ) -new_n3289_ = NAND ( new_n3288_, new_n3287_, new_n3275_ ) -new_n3290_ = NOT ( NET_23568 ) -new_n3291_ = OR ( new_n3272_, new_n3263_ ) -new_n3292_ = NAND ( new_n3291_, new_n3262_, new_n1514_ ) -new_n3293_ = NAND ( new_n3269_, new_n3262_ ) -new_n3294_ = NAND ( new_n3293_, new_n3292_, new_n3290_ ) -new_n3295_ = NAND ( new_n3294_, new_n3250_ ) -new_n3296_ = OR ( new_n3295_, new_n3071_ ) -new_n3297_ = NOR ( new_n3262_, new_n1035_ ) -new_n3298_ = NOR ( NET_520, new_n3246_ ) -new_n3299_ = NOR ( new_n3298_, new_n3297_ ) -NET_5837 = NAND ( new_n3299_, new_n3296_, new_n3289_, new_n3268_ ) -new_n3301_ = NAND ( new_n3202_, new_n3082_ ) -new_n3302_ = NOR ( new_n3301_, new_n1513_ ) -new_n3303_ = NOT ( new_n3116_ ) -new_n3304_ = NOR ( new_n1433_, new_n1426_ ) -new_n3305_ = NAND ( new_n3304_, new_n3132_ ) -new_n3306_ = NAND ( new_n3305_, new_n3211_, new_n3303_ ) -new_n3307_ = NAND ( new_n3306_, new_n3302_ ) -new_n3308_ = OR ( new_n3307_, new_n3187_ ) -new_n3309_ = NAND ( new_n3235_, new_n3231_, new_n3129_ ) -new_n3310_ = NAND ( new_n3309_, new_n3302_ ) -new_n3311_ = NOT ( new_n3310_ ) -new_n3312_ = NAND ( new_n3311_, new_n3230_ ) -new_n3313_ = OR ( new_n3309_, new_n3306_, new_n3242_ ) -new_n3314_ = NAND ( new_n3313_, new_n3301_ ) -new_n3315_ = NAND ( new_n3314_, new_n3188_ ) -new_n3316_ = NAND ( new_n3315_, new_n1514_ ) -new_n3317_ = AND ( new_n3133_, new_n1433_, new_n1329_ ) -new_n3318_ = NAND ( new_n3317_, new_n1352_, NET_520 ) -new_n3319_ = NOT ( new_n3318_ ) -new_n3320_ = NAND ( new_n3319_, new_n3301_ ) -new_n3321_ = NAND ( new_n3320_, new_n3316_, new_n3270_, new_n3290_ ) -new_n3322_ = NAND ( new_n3321_, NET_510 ) -new_n3323_ = NAND ( new_n3302_, new_n3242_ ) -new_n3324_ = NAND ( new_n3323_, new_n3247_ ) -new_n3325_ = NOT ( new_n3324_ ) -new_n3326_ = NOR ( new_n3325_, new_n3073_ ) -new_n3327_ = NOR ( new_n3318_, new_n3301_, new_n1415_ ) -new_n3328_ = AND ( new_n3327_, new_n1937_ ) -new_n3329_ = NOR ( new_n3318_, new_n3301_, new_n3250_ ) -new_n3330_ = AND ( new_n3329_, new_n1959_ ) -new_n3331_ = NOR ( new_n3330_, new_n3328_, new_n3326_, new_n3298_ ) -NET_5838 = NAND ( new_n3331_, new_n3322_, new_n3312_, new_n3308_ ) -new_n3333_ = XNOR ( NET_440, NET_195 ) -new_n3334_ = NOR ( new_n2803_, new_n2805_, new_n2762_ ) -new_n3335_ = OR ( new_n3334_, new_n2800_ ) -NET_5891 = XOR ( new_n3335_, new_n3333_ ) -new_n3337_ = OR ( new_n1078_, NET_471 ) -new_n3338_ = NAND ( new_n2817_, new_n2814_ ) -new_n3339_ = NAND ( new_n3338_, new_n2813_ ) -new_n3340_ = NOT ( NET_19 ) -new_n3341_ = OR ( new_n1078_, NET_226 ) -new_n3342_ = NAND ( new_n1078_, new_n1778_ ) -new_n3343_ = NAND ( new_n3342_, new_n3341_ ) -new_n3344_ = OR ( new_n3343_, new_n3340_ ) -new_n3345_ = NAND ( new_n3343_, new_n3340_ ) -new_n3346_ = NAND ( new_n3345_, new_n3344_ ) -new_n3347_ = XNOR ( new_n3346_, new_n3339_ ) -new_n3348_ = OR ( new_n3347_, new_n1080_ ) -new_n3349_ = NAND ( new_n3348_, new_n3337_ ) -new_n3350_ = OR ( new_n3349_, NET_275 ) -new_n3351_ = NOT ( NET_46 ) -new_n3352_ = OR ( new_n1125_, new_n3351_ ) -new_n3353_ = XOR ( new_n2824_, new_n3351_ ) -new_n3354_ = OR ( new_n3353_, new_n1127_ ) -NET_5898 = NAND ( new_n3354_, new_n3352_, new_n3350_ ) -new_n3356_ = NOT ( new_n2849_ ) -new_n3357_ = NOT ( new_n2996_ ) -new_n3358_ = NAND ( new_n3042_, new_n3357_, new_n2852_, new_n3356_ ) -new_n3359_ = NAND ( new_n3358_, new_n3057_ ) -new_n3360_ = NAND ( new_n3359_, new_n2948_ ) -new_n3361_ = NOR ( new_n2869_, new_n1270_ ) -new_n3362_ = NAND ( new_n3002_, new_n3007_, new_n2877_ ) -new_n3363_ = NOR ( new_n3362_, new_n3361_ ) -new_n3364_ = OR ( new_n3363_, new_n3360_ ) -new_n3365_ = NAND ( new_n2943_, new_n2915_ ) -new_n3366_ = NAND ( new_n3365_, new_n2945_ ) -new_n3367_ = XNOR ( new_n3366_, new_n2934_ ) -new_n3368_ = XOR ( new_n3367_, new_n2915_ ) -new_n3369_ = NOR ( new_n3368_, new_n3364_ ) -new_n3370_ = NOT ( new_n3360_ ) -new_n3371_ = NOT ( new_n3028_ ) -new_n3372_ = NAND ( new_n3033_, new_n3371_ ) -new_n3373_ = NAND ( new_n3372_, new_n3370_ ) -new_n3374_ = OR ( new_n3021_, new_n3020_ ) -new_n3375_ = AND ( new_n3374_, new_n3022_ ) -new_n3376_ = NOR ( new_n3375_, new_n3373_ ) -new_n3377_ = NOR ( new_n1298_, new_n1279_ ) -new_n3378_ = NOT ( new_n3377_ ) -new_n3379_ = NOR ( new_n3378_, new_n3360_ ) -new_n3380_ = NAND ( new_n3379_, new_n2333_ ) -new_n3381_ = NOT ( new_n2925_ ) -new_n3382_ = NOR ( new_n3360_, new_n3038_ ) -new_n3383_ = NAND ( new_n3382_, new_n3381_ ) -new_n3384_ = NAND ( new_n3058_, NET_255 ) -new_n3385_ = NAND ( new_n3360_, NET_161 ) -new_n3386_ = NAND ( new_n3385_, new_n3384_, new_n3383_, new_n3380_ ) -NET_5899 = OR ( new_n3386_, new_n3376_, new_n3369_ ) -new_n3388_ = NOR ( new_n3368_, new_n2951_ ) -new_n3389_ = NAND ( new_n2941_, new_n2923_ ) -new_n3390_ = NAND ( new_n3389_, new_n2968_, new_n2960_ ) -new_n3391_ = NAND ( new_n2977_, new_n2937_ ) -new_n3392_ = OR ( new_n2949_, new_n1036_ ) -new_n3393_ = OR ( NET_275, new_n2338_ ) -new_n3394_ = NAND ( new_n3393_, new_n3392_, new_n3391_, new_n3390_ ) -NET_5900 = OR ( new_n3394_, new_n3388_ ) -new_n3396_ = NOR ( new_n3368_, new_n3005_ ) -new_n3397_ = NOR ( new_n3375_, new_n3035_ ) -new_n3398_ = NAND ( new_n3051_, NET_255 ) -new_n3399_ = NAND ( new_n3060_, new_n3381_ ) -new_n3400_ = NAND ( new_n3062_, new_n2333_ ) -new_n3401_ = NAND ( new_n3400_, new_n3399_, new_n3398_, new_n3393_ ) -NET_5901 = OR ( new_n3401_, new_n3397_, new_n3396_ ) -new_n3403_ = OR ( new_n3347_, new_n1078_ ) -new_n3404_ = NAND ( new_n1078_, new_n2173_ ) -new_n3405_ = NAND ( new_n3404_, new_n3403_ ) -new_n3406_ = OR ( new_n3405_, NET_520 ) -new_n3407_ = NOT ( NET_291 ) -new_n3408_ = OR ( new_n1101_, new_n3407_ ) -new_n3409_ = XOR ( new_n1321_, new_n3407_ ) -new_n3410_ = OR ( new_n3409_, new_n1141_ ) -NET_5913 = NAND ( new_n3410_, new_n3408_, new_n3406_ ) -new_n3412_ = OR ( new_n3183_, new_n3158_ ) -new_n3413_ = NAND ( new_n3412_, new_n3185_ ) -new_n3414_ = XOR ( new_n3413_, new_n3176_ ) -new_n3415_ = XOR ( new_n3414_, new_n3157_ ) -new_n3416_ = OR ( new_n3415_, new_n3267_ ) -new_n3417_ = NAND ( new_n3285_, new_n3166_ ) -new_n3418_ = NAND ( new_n3417_, new_n3286_, new_n3275_ ) -new_n3419_ = OR ( new_n3295_, new_n3166_ ) -new_n3420_ = NOR ( new_n3262_, new_n1037_ ) -new_n3421_ = NOT ( NET_500 ) -new_n3422_ = NOR ( NET_520, new_n3421_ ) -new_n3423_ = NOR ( new_n3422_, new_n3420_ ) -NET_5914 = NAND ( new_n3423_, new_n3419_, new_n3418_, new_n3416_ ) -new_n3425_ = NOR ( new_n3415_, new_n3307_ ) -new_n3426_ = OR ( new_n3216_, new_n3168_ ) -new_n3427_ = NAND ( new_n3426_, new_n3224_ ) -new_n3428_ = XOR ( new_n3427_, new_n3223_ ) -new_n3429_ = XOR ( new_n3428_, new_n3210_ ) -new_n3430_ = NOR ( new_n3429_, new_n3310_ ) -new_n3431_ = NOT ( new_n3422_ ) -new_n3432_ = NAND ( new_n3321_, NET_500 ) -new_n3433_ = OR ( new_n3325_, new_n3168_ ) -new_n3434_ = NAND ( new_n3327_, new_n1948_ ) -new_n3435_ = NAND ( new_n3434_, new_n3433_, new_n3432_, new_n3431_ ) -NET_5915 = OR ( new_n3435_, new_n3430_, new_n3425_ ) -new_n3437_ = NAND ( new_n3360_, NET_162 ) -new_n3438_ = NOR ( new_n3362_, new_n2954_ ) -new_n3439_ = NOR ( new_n3438_, new_n2947_ ) -new_n3440_ = NAND ( new_n3372_, new_n3026_ ) -new_n3441_ = NOR ( new_n2972_, new_n1279_ ) -new_n3442_ = NOT ( new_n3441_ ) -new_n3443_ = NOR ( new_n3442_, new_n2927_ ) -new_n3444_ = NOT ( new_n2322_ ) -new_n3445_ = NOR ( new_n3378_, new_n3444_ ) -new_n3446_ = NOR ( new_n3445_, new_n3443_ ) -new_n3447_ = OR ( new_n3038_, new_n2845_ ) -new_n3448_ = NAND ( new_n3056_, NET_265 ) -new_n3449_ = NAND ( new_n3448_, new_n3447_, new_n3446_, new_n3440_ ) -new_n3450_ = NOR ( new_n3449_, new_n3439_ ) -new_n3451_ = OR ( new_n3450_, new_n3360_ ) -NET_5973 = NAND ( new_n3451_, new_n3437_ ) -new_n3453_ = AND ( new_n2879_, new_n1277_ ) -new_n3454_ = NOR ( new_n3453_, new_n3362_ ) -new_n3455_ = OR ( new_n3454_, new_n2947_ ) -new_n3456_ = NAND ( new_n2875_, new_n1277_, new_n1270_ ) -new_n3457_ = NAND ( new_n3456_, new_n3371_ ) -new_n3458_ = NAND ( new_n3457_, new_n3026_ ) -new_n3459_ = NAND ( new_n3032_, new_n2864_ ) -new_n3460_ = NAND ( new_n3459_, new_n3055_ ) -new_n3461_ = NOT ( new_n3460_ ) -new_n3462_ = OR ( new_n3461_, new_n2845_ ) -new_n3463_ = NAND ( new_n3462_, new_n3458_, new_n3455_, new_n3446_ ) -new_n3464_ = OR ( new_n2852_, new_n3356_ ) -new_n3465_ = NOR ( new_n2875_, new_n2874_ ) -new_n3466_ = NOT ( new_n3465_ ) -new_n3467_ = NAND ( new_n3042_, new_n3055_ ) -new_n3468_ = NAND ( new_n3467_, new_n3466_ ) -new_n3469_ = NAND ( new_n3468_, new_n3357_, new_n2948_ ) -new_n3470_ = NOR ( new_n3469_, new_n3464_ ) -new_n3471_ = NAND ( new_n3470_, new_n3463_ ) -new_n3472_ = OR ( new_n3470_, new_n2327_ ) -NET_5974 = NAND ( new_n3472_, new_n3471_ ) -new_n3474_ = NOR ( new_n3469_, new_n2896_ ) -new_n3475_ = NAND ( new_n3474_, new_n3463_ ) -new_n3476_ = NOT ( new_n3474_ ) -new_n3477_ = NAND ( new_n3476_, NET_98 ) -NET_5975 = NAND ( new_n3477_, new_n3475_ ) -new_n3479_ = OR ( new_n3415_, new_n3213_ ) -new_n3480_ = NOT ( new_n3238_ ) -new_n3481_ = OR ( new_n3429_, new_n3480_ ) -new_n3482_ = NAND ( new_n3257_, new_n1948_ ) -new_n3483_ = OR ( new_n3243_, new_n3168_ ) -new_n3484_ = NAND ( new_n3207_, NET_406 ) -new_n3485_ = OR ( new_n3247_, new_n3421_ ) -new_n3486_ = AND ( new_n3485_, new_n3484_, new_n3483_ ) -NET_6002 = NAND ( new_n3486_, new_n3482_, new_n3481_, new_n3479_ ) -new_n3488_ = NOR ( new_n3118_, new_n3112_ ) -new_n3489_ = AND ( new_n3488_, new_n3211_, new_n3115_ ) -new_n3490_ = NOR ( new_n3489_, new_n3187_ ) -new_n3491_ = NOR ( new_n3234_, new_n3232_ ) -new_n3492_ = NOT ( new_n3491_ ) -new_n3493_ = NAND ( new_n3492_, new_n3230_ ) -new_n3494_ = NAND ( new_n3255_, new_n1937_ ) -new_n3495_ = NAND ( new_n3251_, new_n1959_ ) -new_n3496_ = NAND ( new_n3241_, new_n3204_ ) -new_n3497_ = NOT ( new_n3496_ ) -new_n3498_ = OR ( new_n3497_, new_n3073_ ) -new_n3499_ = NAND ( new_n3498_, new_n3495_, new_n3494_, new_n3493_ ) -new_n3500_ = NOR ( new_n3499_, new_n3490_ ) -new_n3501_ = NOR ( new_n3234_, new_n1435_ ) -new_n3502_ = OR ( new_n3501_, new_n3131_ ) -new_n3503_ = NAND ( new_n3502_, new_n3202_, new_n3081_, new_n1514_ ) -new_n3504_ = NOR ( new_n3503_, new_n3077_ ) -new_n3505_ = NOT ( new_n3504_ ) -new_n3506_ = NOR ( new_n3505_, new_n3500_ ) -new_n3507_ = NOR ( new_n3504_, new_n1944_ ) -NET_6003 = OR ( new_n3507_, new_n3506_ ) -new_n3509_ = NOR ( new_n3503_, new_n3076_ ) -new_n3510_ = NOT ( new_n3509_ ) -new_n3511_ = NOR ( new_n3510_, new_n3500_ ) -new_n3512_ = NOR ( new_n3509_, new_n1941_ ) -NET_6004 = OR ( new_n3512_, new_n3511_ ) -new_n3514_ = OR ( new_n2923_, new_n1298_ ) -new_n3515_ = OR ( new_n3368_, new_n2972_ ) -new_n3516_ = NAND ( new_n3515_, new_n3514_ ) -new_n3517_ = NAND ( new_n3516_, NET_23566 ) -new_n3518_ = NAND ( new_n2908_, new_n2322_ ) -new_n3519_ = NAND ( new_n1300_, new_n1170_ ) -new_n3520_ = NOR ( NET_64, new_n1172_ ) -new_n3521_ = NOR ( new_n1176_, new_n1261_ ) -new_n3522_ = OR ( new_n3521_, new_n3520_ ) -new_n3523_ = OR ( new_n3522_, new_n1300_ ) -new_n3524_ = AND ( new_n3523_, new_n3519_ ) -new_n3525_ = NOT ( new_n3524_ ) -new_n3526_ = OR ( new_n3525_, new_n2898_ ) -new_n3527_ = NAND ( new_n3522_, new_n2912_ ) -new_n3528_ = NAND ( new_n3527_, new_n3526_, new_n3518_ ) -new_n3529_ = XOR ( new_n3528_, new_n2915_ ) -new_n3530_ = OR ( new_n3525_, new_n2889_ ) -new_n3531_ = OR ( new_n2928_, new_n3444_ ) -new_n3532_ = OR ( new_n2903_, new_n2315_ ) -new_n3533_ = OR ( new_n2905_, new_n2317_ ) -new_n3534_ = NAND ( new_n3533_, new_n3532_, new_n3531_, new_n3530_ ) -new_n3535_ = NAND ( new_n3534_, new_n3529_ ) -new_n3536_ = OR ( new_n3534_, new_n3529_ ) -new_n3537_ = NAND ( new_n3536_, new_n3535_ ) -new_n3538_ = NAND ( new_n2945_, new_n2944_, new_n2918_ ) -new_n3539_ = NAND ( new_n3538_, new_n3537_, new_n2917_ ) -new_n3540_ = NAND ( new_n3538_, new_n2917_ ) -new_n3541_ = NAND ( new_n3540_, new_n3536_, new_n3535_ ) -new_n3542_ = NAND ( new_n3541_, new_n3539_ ) -new_n3543_ = OR ( new_n3542_, new_n2951_ ) -new_n3544_ = OR ( new_n2968_, new_n2964_ ) -new_n3545_ = NAND ( new_n3544_, new_n2966_ ) -new_n3546_ = OR ( new_n1290_, NET_131 ) -new_n3547_ = NAND ( new_n1290_, new_n2317_ ) -new_n3548_ = NAND ( new_n3547_, new_n3546_ ) -new_n3549_ = XNOR ( new_n3548_, new_n3522_ ) -new_n3550_ = XOR ( new_n3549_, new_n3545_ ) -new_n3551_ = NAND ( new_n3550_, new_n2960_ ) -new_n3552_ = NAND ( new_n3522_, new_n2977_ ) -new_n3553_ = OR ( new_n2949_, new_n1048_ ) -new_n3554_ = OR ( NET_275, new_n2319_ ) -new_n3555_ = AND ( new_n3554_, new_n3553_, new_n3552_ ) -NET_6069 = NAND ( new_n3555_, new_n3551_, new_n3543_, new_n3517_ ) -new_n3557_ = OR ( new_n3542_, new_n3005_ ) -new_n3558_ = NAND ( new_n3025_, new_n3018_ ) -new_n3559_ = NAND ( new_n3558_, new_n3022_ ) -new_n3560_ = OR ( new_n3025_, new_n3018_ ) -new_n3561_ = NAND ( new_n3560_, new_n3559_ ) -new_n3562_ = NOR ( new_n3019_, new_n3444_ ) -new_n3563_ = NAND ( new_n3524_, new_n3016_ ) -new_n3564_ = XNOR ( new_n3563_, new_n3562_ ) -new_n3565_ = XOR ( new_n3564_, new_n3561_ ) -new_n3566_ = OR ( new_n3565_, new_n3035_ ) -new_n3567_ = NAND ( new_n3051_, NET_250 ) -new_n3568_ = NAND ( new_n3524_, new_n3060_ ) -new_n3569_ = NAND ( new_n3062_, new_n2311_ ) -new_n3570_ = NAND ( new_n3064_, new_n2333_ ) -new_n3571_ = AND ( new_n3570_, new_n3569_, new_n3568_, new_n3554_ ) -NET_6070 = NAND ( new_n3571_, new_n3567_, new_n3566_, new_n3557_ ) -new_n3573_ = OR ( new_n3454_, new_n3368_ ) -new_n3574_ = NOT ( new_n3457_ ) -new_n3575_ = OR ( new_n3574_, new_n3375_ ) -new_n3576_ = OR ( new_n3461_, new_n2925_ ) -new_n3577_ = NAND ( new_n3377_, new_n2333_ ) -new_n3578_ = NAND ( new_n3577_, new_n3576_, new_n3575_, new_n3573_ ) -new_n3579_ = NAND ( new_n3578_, new_n3470_ ) -new_n3580_ = OR ( new_n3470_, new_n2340_ ) -NET_6071 = NAND ( new_n3580_, new_n3579_ ) -new_n3582_ = NAND ( new_n3578_, new_n3474_ ) -new_n3583_ = NAND ( new_n3476_, NET_97 ) -NET_6072 = NAND ( new_n3583_, new_n3582_ ) -new_n3585_ = AND ( new_n3146_, new_n1937_ ) -new_n3586_ = NAND ( new_n1421_, new_n1182_ ) -new_n3587_ = NOR ( NET_309, new_n1184_ ) -new_n3588_ = NOR ( new_n1188_, new_n1103_ ) -new_n3589_ = NOR ( new_n3588_, new_n3587_ ) -new_n3590_ = NAND ( new_n3589_, new_n1420_ ) -new_n3591_ = NAND ( new_n3590_, new_n3586_ ) -new_n3592_ = OR ( new_n3591_, new_n3125_ ) -new_n3593_ = NOT ( new_n3589_ ) -new_n3594_ = NAND ( new_n3593_, new_n3149_ ) -new_n3595_ = OR ( new_n3151_, new_n1933_ ) -new_n3596_ = OR ( new_n3153_, new_n1930_ ) -new_n3597_ = NAND ( new_n3596_, new_n3595_, new_n3594_, new_n3592_ ) -new_n3598_ = NOR ( new_n3597_, new_n3585_ ) -new_n3599_ = OR ( new_n3598_, new_n3157_ ) -new_n3600_ = NAND ( new_n3598_, new_n3157_ ) -new_n3601_ = AND ( new_n3600_, new_n3599_ ) -new_n3602_ = NOR ( new_n3591_, new_n3110_ ) -new_n3603_ = NAND ( new_n3126_, new_n1937_ ) -new_n3604_ = OR ( new_n3136_, new_n1933_ ) -new_n3605_ = OR ( new_n3139_, new_n1930_ ) -new_n3606_ = NAND ( new_n3593_, new_n1353_ ) -new_n3607_ = NAND ( new_n3606_, new_n3605_, new_n3604_, new_n3603_ ) -new_n3608_ = NOR ( new_n3607_, new_n3602_ ) -new_n3609_ = OR ( new_n3608_, new_n3601_ ) -new_n3610_ = NAND ( new_n3608_, new_n3600_, new_n3599_ ) -new_n3611_ = NAND ( new_n3610_, new_n3609_ ) -new_n3612_ = NOR ( new_n3186_, new_n3161_ ) -new_n3613_ = NOR ( new_n3612_, new_n3160_ ) -new_n3614_ = NAND ( new_n3613_, new_n3611_ ) -new_n3615_ = NOT ( new_n3613_ ) -new_n3616_ = NAND ( new_n3615_, new_n3610_, new_n3609_ ) -new_n3617_ = NAND ( new_n3616_, new_n3614_ ) -new_n3618_ = OR ( new_n3617_, new_n3213_ ) -new_n3619_ = NAND ( new_n3590_, new_n3586_, new_n3216_, new_n1937_ ) -new_n3620_ = OR ( new_n3591_, new_n3210_ ) -new_n3621_ = OR ( new_n3210_, new_n1937_ ) -new_n3622_ = NAND ( new_n3591_, new_n3210_ ) -new_n3623_ = NAND ( new_n3622_, new_n3621_ ) -new_n3624_ = NAND ( new_n3623_, new_n3210_ ) -new_n3625_ = NAND ( new_n3216_, new_n1937_ ) -new_n3626_ = NAND ( new_n3625_, new_n3624_, new_n3620_ ) -new_n3627_ = AND ( new_n3626_, new_n3619_ ) -new_n3628_ = NAND ( new_n3228_, new_n3227_, new_n3221_ ) -new_n3629_ = NAND ( new_n3628_, new_n3220_ ) -new_n3630_ = OR ( new_n3629_, new_n3627_ ) -new_n3631_ = NAND ( new_n3629_, new_n3626_, new_n3619_ ) -new_n3632_ = NAND ( new_n3631_, new_n3630_ ) -new_n3633_ = OR ( new_n3632_, new_n3480_ ) -new_n3634_ = OR ( new_n3591_, new_n3243_ ) -new_n3635_ = NAND ( new_n3207_, NET_408 ) -new_n3636_ = NOT ( NET_495 ) -new_n3637_ = OR ( new_n3247_, new_n3636_ ) -new_n3638_ = AND ( new_n3637_, new_n3635_, new_n3634_ ) -new_n3639_ = NAND ( new_n3253_, new_n1948_ ) -new_n3640_ = NAND ( new_n3257_, new_n1926_ ) -new_n3641_ = AND ( new_n3640_, new_n3639_ ) -NET_6081 = NAND ( new_n3641_, new_n3638_, new_n3633_, new_n3618_ ) -new_n3643_ = OR ( new_n3617_, new_n3267_ ) -new_n3644_ = OR ( new_n3286_, new_n3279_ ) -new_n3645_ = NAND ( new_n3644_, new_n3281_ ) -new_n3646_ = OR ( new_n1419_, NET_376 ) -new_n3647_ = NAND ( new_n1419_, new_n1933_ ) -new_n3648_ = NAND ( new_n3647_, new_n3646_ ) -new_n3649_ = XOR ( new_n3648_, new_n3589_ ) -new_n3650_ = XOR ( new_n3649_, new_n3645_ ) -new_n3651_ = NAND ( new_n3650_, new_n3275_ ) -new_n3652_ = OR ( new_n3589_, new_n3295_ ) -new_n3653_ = NOR ( new_n3262_, new_n1049_ ) -new_n3654_ = NOR ( NET_520, new_n3636_ ) -new_n3655_ = NOR ( new_n3654_, new_n3653_ ) -NET_6082 = NAND ( new_n3655_, new_n3652_, new_n3651_, new_n3643_ ) -new_n3657_ = OR ( new_n3617_, new_n3307_ ) -new_n3658_ = OR ( new_n3632_, new_n3310_ ) -new_n3659_ = NAND ( new_n3321_, NET_495 ) -new_n3660_ = NOR ( new_n3591_, new_n3325_ ) -new_n3661_ = AND ( new_n3327_, new_n1926_ ) -new_n3662_ = AND ( new_n3329_, new_n1948_ ) -new_n3663_ = NOR ( new_n3662_, new_n3661_, new_n3660_, new_n3654_ ) -NET_6083 = NAND ( new_n3663_, new_n3659_, new_n3658_, new_n3657_ ) -new_n3665_ = OR ( new_n3489_, new_n3415_ ) -new_n3666_ = OR ( new_n3491_, new_n3429_ ) -new_n3667_ = OR ( new_n3497_, new_n3168_ ) -new_n3668_ = NAND ( new_n3255_, new_n1948_ ) -new_n3669_ = NAND ( new_n3668_, new_n3667_, new_n3666_, new_n3665_ ) -new_n3670_ = NAND ( new_n3669_, new_n3504_ ) -new_n3671_ = OR ( new_n3504_, new_n1955_ ) -NET_6084 = NAND ( new_n3671_, new_n3670_ ) -new_n3673_ = NAND ( new_n3669_, new_n3509_ ) -new_n3674_ = OR ( new_n3509_, new_n1952_ ) -NET_6085 = NAND ( new_n3674_, new_n3673_ ) -new_n3676_ = NAND ( NET_440, NET_195 ) -new_n3677_ = NAND ( new_n3676_, new_n3335_ ) -new_n3678_ = OR ( NET_440, NET_195 ) -new_n3679_ = NAND ( new_n3678_, new_n3677_ ) -new_n3680_ = XNOR ( NET_439, NET_194 ) -NET_6136 = XOR ( new_n3680_, new_n3679_ ) -new_n3682_ = OR ( new_n1078_, NET_472 ) -new_n3683_ = NOT ( NET_18 ) -new_n3684_ = OR ( new_n1078_, NET_227 ) -new_n3685_ = NAND ( new_n1078_, new_n1764_ ) -new_n3686_ = NAND ( new_n3685_, new_n3684_ ) -new_n3687_ = NOR ( new_n3686_, new_n3683_ ) -new_n3688_ = NOT ( new_n3687_ ) -new_n3689_ = NAND ( new_n3686_, new_n3683_ ) -new_n3690_ = NAND ( new_n3689_, new_n3688_ ) -new_n3691_ = NAND ( new_n3345_, new_n3339_ ) -new_n3692_ = NAND ( new_n3691_, new_n3690_, new_n3344_ ) -new_n3693_ = NAND ( new_n3691_, new_n3344_ ) -new_n3694_ = NAND ( new_n3693_, new_n3689_ ) -new_n3695_ = OR ( new_n3694_, new_n3687_ ) -new_n3696_ = NAND ( new_n3695_, new_n3692_ ) -new_n3697_ = NAND ( new_n3696_, new_n1078_ ) -new_n3698_ = NAND ( new_n3697_, new_n3682_ ) -new_n3699_ = OR ( new_n3698_, NET_275 ) -new_n3700_ = NAND ( new_n1261_, NET_47, NET_275 ) -new_n3701_ = OR ( new_n2824_, NET_46 ) -new_n3702_ = NAND ( new_n3701_, NET_47 ) -new_n3703_ = NAND ( new_n3702_, new_n1240_ ) -new_n3704_ = OR ( new_n3703_, new_n1127_ ) -NET_6141 = NAND ( new_n3704_, new_n3700_, new_n3699_ ) -new_n3706_ = OR ( new_n3542_, new_n3364_ ) -new_n3707_ = OR ( new_n3565_, new_n3373_ ) -new_n3708_ = NAND ( new_n3379_, new_n2311_ ) -new_n3709_ = NAND ( new_n3360_, NET_163 ) -new_n3710_ = NAND ( new_n3058_, NET_250 ) -new_n3711_ = AND ( new_n3710_, new_n3709_, new_n3708_ ) -new_n3712_ = NOR ( new_n3442_, new_n3360_ ) -new_n3713_ = NAND ( new_n3712_, new_n2333_ ) -new_n3714_ = NAND ( new_n3524_, new_n3382_ ) -new_n3715_ = AND ( new_n3714_, new_n3713_ ) -NET_6142 = NAND ( new_n3715_, new_n3711_, new_n3707_, new_n3706_ ) -new_n3717_ = NAND ( new_n3696_, new_n1080_ ) -new_n3718_ = NAND ( new_n1078_, new_n2160_ ) -new_n3719_ = NAND ( new_n3718_, new_n3717_ ) -new_n3720_ = OR ( new_n3719_, NET_520 ) -new_n3721_ = NOT ( NET_292 ) -new_n3722_ = OR ( new_n1101_, new_n3721_ ) -new_n3723_ = OR ( new_n1321_, NET_291 ) -new_n3724_ = AND ( new_n3723_, NET_292 ) -new_n3725_ = OR ( new_n3724_, new_n1322_ ) -new_n3726_ = OR ( new_n3725_, new_n1141_ ) -NET_6156 = NAND ( new_n3726_, new_n3722_, new_n3720_ ) -new_n3728_ = NOR ( NET_439, NET_194 ) -new_n3729_ = OR ( new_n3728_, new_n3679_ ) -new_n3730_ = OR ( new_n1076_, NET_193 ) -new_n3731_ = NAND ( NET_439, NET_194 ) -new_n3732_ = OR ( NET_438, new_n1075_ ) -new_n3733_ = NAND ( new_n3732_, new_n3731_, new_n3730_, new_n3729_ ) -new_n3734_ = NOT ( new_n3728_ ) -new_n3735_ = NAND ( new_n3731_, new_n3679_ ) -new_n3736_ = NAND ( new_n3732_, new_n3730_ ) -new_n3737_ = NAND ( new_n3736_, new_n3735_, new_n3734_ ) -NET_6209 = AND ( new_n3737_, new_n3733_ ) -new_n3739_ = NAND ( new_n2908_, new_n2311_ ) -new_n3740_ = NAND ( new_n1300_, new_n1213_ ) -new_n3741_ = NOR ( NET_64, new_n1215_ ) -new_n3742_ = NOR ( new_n1217_, new_n1261_ ) -new_n3743_ = NOR ( new_n3742_, new_n3741_ ) -new_n3744_ = NAND ( new_n3743_, new_n1299_ ) -new_n3745_ = NAND ( new_n3744_, new_n3740_ ) -new_n3746_ = OR ( new_n3745_, new_n2898_ ) -new_n3747_ = NOT ( new_n3743_ ) -new_n3748_ = NAND ( new_n3747_, new_n2912_ ) -new_n3749_ = NAND ( new_n3748_, new_n3746_, new_n3739_ ) -new_n3750_ = XOR ( new_n3749_, new_n2915_ ) -new_n3751_ = OR ( new_n3745_, new_n2889_ ) -new_n3752_ = NAND ( new_n2899_, new_n2311_ ) -new_n3753_ = OR ( new_n2903_, new_n2305_ ) -new_n3754_ = OR ( new_n2905_, new_n2307_ ) -new_n3755_ = NAND ( new_n3754_, new_n3753_, new_n3752_, new_n3751_ ) -new_n3756_ = OR ( new_n3755_, new_n3750_ ) -new_n3757_ = NAND ( new_n3755_, new_n3750_ ) -new_n3758_ = NAND ( new_n3757_, new_n3756_ ) -new_n3759_ = NAND ( new_n3540_, new_n3536_ ) -new_n3760_ = NAND ( new_n3759_, new_n3535_ ) -new_n3761_ = XOR ( new_n3760_, new_n3758_ ) -new_n3762_ = NOR ( new_n3761_, new_n2951_ ) -new_n3763_ = OR ( new_n1290_, new_n2305_ ) -new_n3764_ = NAND ( new_n1290_, NET_164 ) -new_n3765_ = NAND ( new_n3764_, new_n3763_ ) -new_n3766_ = XOR ( new_n3765_, new_n3747_ ) -new_n3767_ = NOT ( new_n3545_ ) -new_n3768_ = NAND ( new_n3548_, new_n3767_ ) -new_n3769_ = NAND ( new_n3768_, new_n3522_ ) -new_n3770_ = OR ( new_n3548_, new_n3767_ ) -new_n3771_ = NAND ( new_n3770_, new_n3769_ ) -new_n3772_ = OR ( new_n3771_, new_n3766_ ) -new_n3773_ = NAND ( new_n3771_, new_n3766_ ) -new_n3774_ = NAND ( new_n3773_, new_n3772_, new_n2960_ ) -new_n3775_ = NAND ( new_n3747_, new_n2977_ ) -new_n3776_ = OR ( new_n2949_, new_n1057_ ) -new_n3777_ = NOT ( NET_269 ) -new_n3778_ = OR ( NET_275, new_n3777_ ) -new_n3779_ = NAND ( new_n3778_, new_n3776_, new_n3775_, new_n3774_ ) -NET_6215 = OR ( new_n3779_, new_n3762_ ) -new_n3781_ = OR ( new_n3761_, new_n3005_ ) -new_n3782_ = NAND ( new_n3024_, new_n2311_ ) -new_n3783_ = NOT ( new_n3745_ ) -new_n3784_ = NAND ( new_n3783_, new_n3016_ ) -new_n3785_ = XOR ( new_n3784_, new_n3782_ ) -new_n3786_ = OR ( new_n3563_, new_n3561_ ) -new_n3787_ = NAND ( new_n3786_, new_n3562_ ) -new_n3788_ = NAND ( new_n3563_, new_n3561_ ) -new_n3789_ = NAND ( new_n3788_, new_n3787_ ) -new_n3790_ = XOR ( new_n3789_, new_n3785_ ) -new_n3791_ = OR ( new_n3790_, new_n3035_ ) -new_n3792_ = NAND ( new_n3051_, new_n3777_ ) -new_n3793_ = NAND ( new_n3783_, new_n3060_ ) -new_n3794_ = NAND ( new_n3062_, new_n2301_ ) -new_n3795_ = NAND ( new_n3064_, new_n2322_ ) -new_n3796_ = AND ( new_n3795_, new_n3794_, new_n3793_, new_n3778_ ) -NET_6216 = NAND ( new_n3796_, new_n3792_, new_n3791_, new_n3781_ ) -new_n3798_ = OR ( new_n3542_, new_n3454_ ) -new_n3799_ = OR ( new_n3565_, new_n3574_ ) -new_n3800_ = NAND ( new_n3377_, new_n2311_ ) -new_n3801_ = NAND ( new_n3441_, new_n2333_ ) -new_n3802_ = NAND ( new_n3524_, new_n3460_ ) -new_n3803_ = AND ( new_n3802_, new_n3801_, new_n3800_ ) -new_n3804_ = NAND ( new_n3803_, new_n3799_, new_n3798_ ) -new_n3805_ = NAND ( new_n3804_, new_n3470_ ) -new_n3806_ = OR ( new_n3470_, new_n2315_ ) -NET_6217 = NAND ( new_n3806_, new_n3805_ ) -new_n3808_ = NAND ( new_n3804_, new_n3474_ ) -new_n3809_ = NAND ( new_n3476_, NET_99 ) -NET_6218 = NAND ( new_n3809_, new_n3808_ ) -new_n3811_ = AND ( new_n3146_, new_n1926_ ) -new_n3812_ = NAND ( new_n1421_, new_n1223_ ) -new_n3813_ = NOR ( NET_309, new_n1225_ ) -new_n3814_ = NOR ( new_n1227_, new_n1103_ ) -new_n3815_ = NOR ( new_n3814_, new_n3813_ ) -new_n3816_ = NAND ( new_n3815_, new_n1420_ ) -new_n3817_ = NAND ( new_n3816_, new_n3812_ ) -new_n3818_ = OR ( new_n3817_, new_n3125_ ) -new_n3819_ = NOT ( new_n3149_ ) -new_n3820_ = OR ( new_n3815_, new_n3819_ ) -new_n3821_ = OR ( new_n3151_, new_n1922_ ) -new_n3822_ = OR ( new_n3153_, new_n1918_ ) -new_n3823_ = NAND ( new_n3822_, new_n3821_, new_n3820_, new_n3818_ ) -new_n3824_ = NOR ( new_n3823_, new_n3811_ ) -new_n3825_ = XOR ( new_n3824_, new_n3158_ ) -new_n3826_ = NOT ( new_n3825_ ) -new_n3827_ = NOR ( new_n3817_, new_n3110_ ) -new_n3828_ = NAND ( new_n3126_, new_n1926_ ) -new_n3829_ = OR ( new_n3136_, new_n1922_ ) -new_n3830_ = OR ( new_n3139_, new_n1918_ ) -new_n3831_ = OR ( new_n3815_, new_n1354_ ) -new_n3832_ = NAND ( new_n3831_, new_n3830_, new_n3829_, new_n3828_ ) -new_n3833_ = NOR ( new_n3832_, new_n3827_ ) -new_n3834_ = NAND ( new_n3833_, new_n3826_ ) -new_n3835_ = OR ( new_n3833_, new_n3826_ ) -new_n3836_ = NAND ( new_n3835_, new_n3834_ ) -new_n3837_ = NAND ( new_n3615_, new_n3610_ ) -new_n3838_ = NAND ( new_n3837_, new_n3609_ ) -new_n3839_ = XOR ( new_n3838_, new_n3836_ ) -new_n3840_ = NOR ( new_n3839_, new_n3213_ ) -new_n3841_ = OR ( new_n3210_, new_n1926_ ) -new_n3842_ = OR ( new_n3817_, new_n3216_ ) -new_n3843_ = NAND ( new_n3842_, new_n3841_ ) -new_n3844_ = OR ( new_n3817_, new_n3210_ ) -new_n3845_ = NAND ( new_n3844_, new_n3843_ ) -new_n3846_ = OR ( new_n3844_, new_n3843_ ) -new_n3847_ = NAND ( new_n3846_, new_n3845_ ) -new_n3848_ = NAND ( new_n3629_, new_n3626_ ) -new_n3849_ = NAND ( new_n3848_, new_n3619_ ) -new_n3850_ = XNOR ( new_n3849_, new_n3847_ ) -new_n3851_ = NAND ( new_n3850_, new_n3238_ ) -new_n3852_ = OR ( new_n3817_, new_n3243_ ) -new_n3853_ = NAND ( new_n3207_, NET_409 ) -new_n3854_ = OR ( new_n3247_, NET_514 ) -new_n3855_ = AND ( new_n3854_, new_n3853_, new_n3852_ ) -new_n3856_ = NAND ( new_n3253_, new_n1937_ ) -new_n3857_ = NAND ( new_n3257_, new_n1914_ ) -new_n3858_ = NAND ( new_n3857_, new_n3856_, new_n3855_, new_n3851_ ) -NET_6234 = OR ( new_n3858_, new_n3840_ ) -new_n3860_ = OR ( new_n3839_, new_n3267_ ) -new_n3861_ = OR ( new_n1419_, new_n1918_ ) -new_n3862_ = NAND ( new_n1419_, NET_409 ) -new_n3863_ = NAND ( new_n3862_, new_n3861_ ) -new_n3864_ = XNOR ( new_n3863_, new_n3815_ ) -new_n3865_ = NOT ( new_n3645_ ) -new_n3866_ = NAND ( new_n3648_, new_n3865_ ) -new_n3867_ = NAND ( new_n3866_, new_n3593_ ) -new_n3868_ = OR ( new_n3648_, new_n3865_ ) -new_n3869_ = NAND ( new_n3868_, new_n3867_ ) -new_n3870_ = NAND ( new_n3869_, new_n3864_ ) -new_n3871_ = OR ( new_n3869_, new_n3864_ ) -new_n3872_ = NAND ( new_n3871_, new_n3870_, new_n3275_ ) -new_n3873_ = OR ( new_n3815_, new_n3295_ ) -new_n3874_ = NOR ( new_n3262_, new_n1058_ ) -new_n3875_ = NOR ( NET_520, new_n1920_ ) -new_n3876_ = NOR ( new_n3875_, new_n3874_ ) -NET_6235 = NAND ( new_n3876_, new_n3873_, new_n3872_, new_n3860_ ) -new_n3878_ = OR ( new_n3839_, new_n3307_ ) -new_n3879_ = NAND ( new_n3850_, new_n3311_ ) -new_n3880_ = NAND ( new_n3321_, new_n1920_ ) -new_n3881_ = NOR ( new_n3817_, new_n3325_ ) -new_n3882_ = AND ( new_n3327_, new_n1914_ ) -new_n3883_ = AND ( new_n3329_, new_n1937_ ) -new_n3884_ = NOR ( new_n3883_, new_n3882_, new_n3881_, new_n3875_ ) -NET_6236 = NAND ( new_n3884_, new_n3880_, new_n3879_, new_n3878_ ) -new_n3886_ = OR ( new_n3617_, new_n3489_ ) -new_n3887_ = OR ( new_n3632_, new_n3491_ ) -new_n3888_ = NAND ( new_n3255_, new_n1926_ ) -new_n3889_ = NAND ( new_n3251_, new_n1948_ ) -new_n3890_ = OR ( new_n3591_, new_n3497_ ) -new_n3891_ = AND ( new_n3890_, new_n3889_, new_n3888_ ) -new_n3892_ = NAND ( new_n3891_, new_n3887_, new_n3886_ ) -new_n3893_ = NAND ( new_n3892_, new_n3504_ ) -new_n3894_ = OR ( new_n3504_, new_n1930_ ) -NET_6237 = NAND ( new_n3894_, new_n3893_ ) -new_n3896_ = NAND ( new_n3892_, new_n3509_ ) -new_n3897_ = OR ( new_n3509_, new_n1935_ ) -NET_6238 = NAND ( new_n3897_, new_n3896_ ) -new_n3899_ = OR ( new_n1078_, NET_473 ) -new_n3900_ = OR ( new_n1078_, NET_228 ) -new_n3901_ = NAND ( new_n1078_, new_n1750_ ) -new_n3902_ = NAND ( new_n3901_, new_n3900_ ) -new_n3903_ = NAND ( new_n3902_, NET_17 ) -new_n3904_ = OR ( new_n3902_, NET_17 ) -new_n3905_ = NAND ( new_n3904_, new_n3903_, new_n3694_, new_n3688_ ) -new_n3906_ = NOT ( NET_17 ) -new_n3907_ = NOR ( new_n3902_, new_n3906_ ) -new_n3908_ = NAND ( new_n3694_, new_n3688_ ) -new_n3909_ = NAND ( new_n3902_, new_n3906_ ) -new_n3910_ = NAND ( new_n3909_, new_n3908_ ) -new_n3911_ = OR ( new_n3910_, new_n3907_ ) -new_n3912_ = NAND ( new_n3911_, new_n3905_ ) -new_n3913_ = NAND ( new_n3912_, new_n1078_ ) -new_n3914_ = NAND ( new_n3913_, new_n3899_ ) -new_n3915_ = OR ( new_n3914_, NET_275 ) -new_n3916_ = NAND ( new_n1261_, NET_48, NET_275 ) -new_n3917_ = OR ( new_n1240_, NET_48 ) -new_n3918_ = NAND ( new_n1240_, NET_48 ) -new_n3919_ = AND ( new_n3918_, new_n3917_ ) -new_n3920_ = NAND ( new_n3919_, NET_64, NET_275 ) -NET_6287 = NAND ( new_n3920_, new_n3916_, new_n3915_ ) -new_n3922_ = NOR ( new_n3761_, new_n3364_ ) -new_n3923_ = OR ( new_n3790_, new_n3373_ ) -new_n3924_ = NAND ( new_n3379_, new_n2301_ ) -new_n3925_ = NAND ( new_n3360_, NET_164 ) -new_n3926_ = NAND ( new_n3058_, new_n3777_ ) -new_n3927_ = AND ( new_n3926_, new_n3925_, new_n3924_ ) -new_n3928_ = NAND ( new_n3712_, new_n2322_ ) -new_n3929_ = NAND ( new_n3783_, new_n3382_ ) -new_n3930_ = NAND ( new_n3929_, new_n3928_, new_n3927_, new_n3923_ ) -NET_6288 = OR ( new_n3930_, new_n3922_ ) -new_n3932_ = NAND ( new_n3912_, new_n1080_ ) -new_n3933_ = NAND ( new_n1078_, new_n2147_ ) -new_n3934_ = NAND ( new_n3933_, new_n3932_ ) -new_n3935_ = OR ( new_n3934_, NET_520 ) -new_n3936_ = OR ( new_n1101_, new_n1310_ ) -new_n3937_ = XOR ( new_n1322_, NET_293 ) -new_n3938_ = OR ( new_n3937_, new_n1141_ ) -NET_6305 = NAND ( new_n3938_, new_n3936_, new_n3935_ ) -new_n3940_ = OR ( new_n1078_, NET_474 ) -new_n3941_ = NOT ( NET_16 ) -new_n3942_ = OR ( new_n1078_, NET_229 ) -new_n3943_ = NAND ( new_n1078_, new_n1736_ ) -new_n3944_ = NAND ( new_n3943_, new_n3942_ ) -new_n3945_ = OR ( new_n3944_, new_n3941_ ) -new_n3946_ = NAND ( new_n3944_, new_n3941_ ) -new_n3947_ = NAND ( new_n3946_, new_n3945_ ) -new_n3948_ = NOT ( new_n3907_ ) -new_n3949_ = NAND ( new_n3910_, new_n3948_ ) -new_n3950_ = XNOR ( new_n3949_, new_n3947_ ) -new_n3951_ = OR ( new_n3950_, new_n1080_ ) -new_n3952_ = NAND ( new_n3951_, new_n3940_ ) -new_n3953_ = OR ( new_n3952_, NET_275 ) -new_n3954_ = NOT ( NET_49 ) -new_n3955_ = OR ( new_n1125_, new_n3954_ ) -new_n3956_ = AND ( new_n3917_, NET_49 ) -new_n3957_ = OR ( new_n3956_, new_n2858_ ) -new_n3958_ = OR ( new_n3957_, new_n1127_ ) -NET_6368 = NAND ( new_n3958_, new_n3955_, new_n3953_ ) -new_n3960_ = NAND ( new_n2908_, new_n2301_ ) -new_n3961_ = NAND ( new_n1378_, new_n1300_ ) -new_n3962_ = OR ( NET_64, NET_37 ) -new_n3963_ = NAND ( new_n1384_, NET_64 ) -new_n3964_ = NAND ( new_n3963_, new_n3962_ ) -new_n3965_ = NAND ( new_n3964_, new_n1299_ ) -new_n3966_ = NAND ( new_n3965_, new_n3961_ ) -new_n3967_ = OR ( new_n3966_, new_n2898_ ) -new_n3968_ = NOT ( new_n2912_ ) -new_n3969_ = OR ( new_n3964_, new_n3968_ ) -new_n3970_ = NAND ( new_n3969_, new_n3967_, new_n3960_ ) -new_n3971_ = XOR ( new_n3970_, new_n2915_ ) -new_n3972_ = OR ( new_n3966_, new_n2889_ ) -new_n3973_ = NOT ( new_n2301_ ) -new_n3974_ = OR ( new_n2928_, new_n3973_ ) -new_n3975_ = OR ( new_n2903_, new_n2293_ ) -new_n3976_ = OR ( new_n2905_, new_n2295_ ) -new_n3977_ = NAND ( new_n3976_, new_n3975_, new_n3974_, new_n3972_ ) -new_n3978_ = OR ( new_n3977_, new_n3971_ ) -new_n3979_ = NAND ( new_n3977_, new_n3971_ ) -new_n3980_ = NAND ( new_n3979_, new_n3978_ ) -new_n3981_ = NAND ( new_n3760_, new_n3756_ ) -new_n3982_ = NAND ( new_n3981_, new_n3757_ ) -new_n3983_ = XOR ( new_n3982_, new_n3980_ ) -new_n3984_ = OR ( new_n3983_, new_n2951_ ) -new_n3985_ = OR ( new_n1290_, NET_133 ) -new_n3986_ = NAND ( new_n1290_, new_n2295_ ) -new_n3987_ = NAND ( new_n3986_, new_n3985_ ) -new_n3988_ = OR ( new_n3987_, new_n3964_ ) -new_n3989_ = NAND ( new_n3987_, new_n3964_ ) -new_n3990_ = NAND ( new_n3989_, new_n3988_ ) -new_n3991_ = NAND ( new_n3771_, new_n3765_ ) -new_n3992_ = NAND ( new_n3991_, new_n3743_ ) -new_n3993_ = OR ( new_n3771_, new_n3765_ ) -new_n3994_ = NAND ( new_n3993_, new_n3992_ ) -new_n3995_ = OR ( new_n3994_, new_n3990_ ) -new_n3996_ = NAND ( new_n3994_, new_n3990_ ) -new_n3997_ = NAND ( new_n3996_, new_n3995_, new_n2960_ ) -new_n3998_ = NAND ( new_n3963_, new_n3962_, new_n2977_ ) -new_n3999_ = OR ( new_n2949_, new_n1065_ ) -new_n4000_ = NAND ( NET_23564, NET_257 ) -new_n4001_ = AND ( new_n4000_, new_n3999_, new_n3998_ ) -NET_6369 = NAND ( new_n4001_, new_n3997_, new_n3984_, new_n3517_ ) -new_n4003_ = NOT ( new_n3470_ ) -new_n4004_ = NOR ( new_n3761_, new_n3454_ ) -new_n4005_ = OR ( new_n3790_, new_n3574_ ) -new_n4006_ = NAND ( new_n3377_, new_n2301_ ) -new_n4007_ = NAND ( new_n3441_, new_n2322_ ) -new_n4008_ = OR ( new_n3745_, new_n3461_ ) -new_n4009_ = NAND ( new_n4008_, new_n4007_, new_n4006_, new_n4005_ ) -new_n4010_ = NOR ( new_n4009_, new_n4004_ ) -new_n4011_ = OR ( new_n4010_, new_n4003_ ) -new_n4012_ = OR ( new_n3470_, new_n2305_ ) -NET_6371 = NAND ( new_n4012_, new_n4011_ ) -new_n4014_ = OR ( new_n4010_, new_n3476_ ) -new_n4015_ = NAND ( new_n3476_, NET_100 ) -NET_6372 = NAND ( new_n4015_, new_n4014_ ) -new_n4017_ = OR ( new_n3950_, new_n1078_ ) -new_n4018_ = NAND ( new_n1078_, new_n2134_ ) -new_n4019_ = NAND ( new_n4018_, new_n4017_ ) -new_n4020_ = OR ( new_n4019_, NET_520 ) -new_n4021_ = OR ( new_n1101_, new_n1311_ ) -new_n4022_ = NAND ( new_n1322_, new_n1310_ ) -new_n4023_ = NAND ( new_n4022_, NET_294 ) -new_n4024_ = NAND ( new_n4023_, new_n1323_ ) -new_n4025_ = OR ( new_n4024_, new_n1141_ ) -NET_6390 = NAND ( new_n4025_, new_n4021_, new_n4020_ ) -new_n4027_ = AND ( new_n3146_, new_n1914_ ) -new_n4028_ = NAND ( new_n1421_, new_n1390_ ) -new_n4029_ = OR ( NET_309, new_n1316_ ) -new_n4030_ = OR ( new_n1395_, new_n1103_ ) -new_n4031_ = NAND ( new_n4030_, new_n4029_ ) -new_n4032_ = NOT ( new_n4031_ ) -new_n4033_ = NAND ( new_n4032_, new_n1420_ ) -new_n4034_ = NAND ( new_n4033_, new_n4028_ ) -new_n4035_ = OR ( new_n4034_, new_n3125_ ) -new_n4036_ = NAND ( new_n4031_, new_n3149_ ) -new_n4037_ = OR ( new_n3151_, new_n1910_ ) -new_n4038_ = OR ( new_n3153_, new_n1905_ ) -new_n4039_ = NAND ( new_n4038_, new_n4037_, new_n4036_, new_n4035_ ) -new_n4040_ = NOR ( new_n4039_, new_n4027_ ) -new_n4041_ = XOR ( new_n4040_, new_n3158_ ) -new_n4042_ = NOT ( new_n4041_ ) -new_n4043_ = NOR ( new_n4034_, new_n3110_ ) -new_n4044_ = NAND ( new_n3126_, new_n1914_ ) -new_n4045_ = OR ( new_n3136_, new_n1910_ ) -new_n4046_ = OR ( new_n3139_, new_n1905_ ) -new_n4047_ = NAND ( new_n4031_, new_n1353_ ) -new_n4048_ = NAND ( new_n4047_, new_n4046_, new_n4045_, new_n4044_ ) -new_n4049_ = NOR ( new_n4048_, new_n4043_ ) -new_n4050_ = NAND ( new_n4049_, new_n4042_ ) -new_n4051_ = OR ( new_n4049_, new_n4042_ ) -new_n4052_ = NAND ( new_n4051_, new_n4050_ ) -new_n4053_ = NAND ( new_n3838_, new_n3834_ ) -new_n4054_ = NAND ( new_n4053_, new_n3835_ ) -new_n4055_ = XOR ( new_n4054_, new_n4052_ ) -new_n4056_ = NOR ( new_n4055_, new_n3213_ ) -new_n4057_ = OR ( new_n3210_, new_n1914_ ) -new_n4058_ = OR ( new_n4034_, new_n3216_ ) -new_n4059_ = NAND ( new_n4058_, new_n4057_ ) -new_n4060_ = OR ( new_n4034_, new_n3210_ ) -new_n4061_ = NAND ( new_n4060_, new_n4059_ ) -new_n4062_ = OR ( new_n4060_, new_n4059_ ) -new_n4063_ = NAND ( new_n4062_, new_n4061_ ) -new_n4064_ = NAND ( new_n3849_, new_n3845_ ) -new_n4065_ = NAND ( new_n4064_, new_n3846_ ) -new_n4066_ = XNOR ( new_n4065_, new_n4063_ ) -new_n4067_ = NAND ( new_n4066_, new_n3238_ ) -new_n4068_ = OR ( new_n4034_, new_n3243_ ) -new_n4069_ = NAND ( new_n3207_, NET_410 ) -new_n4070_ = NOT ( new_n3247_ ) -new_n4071_ = NAND ( new_n4070_, new_n1908_ ) -new_n4072_ = AND ( new_n4071_, new_n4069_, new_n4068_ ) -new_n4073_ = NAND ( new_n3257_, new_n1901_ ) -new_n4074_ = NAND ( new_n3253_, new_n1926_ ) -new_n4075_ = NAND ( new_n4074_, new_n4073_, new_n4072_, new_n4067_ ) -NET_6391 = OR ( new_n4075_, new_n4056_ ) -new_n4077_ = OR ( new_n4055_, new_n3267_ ) -new_n4078_ = OR ( new_n1419_, NET_378 ) -new_n4079_ = NAND ( new_n1419_, new_n1910_ ) -new_n4080_ = NAND ( new_n4079_, new_n4078_ ) -new_n4081_ = OR ( new_n4080_, new_n4032_ ) -new_n4082_ = NAND ( new_n4080_, new_n4032_ ) -new_n4083_ = NAND ( new_n4082_, new_n4081_ ) -new_n4084_ = NAND ( new_n3869_, new_n3863_ ) -new_n4085_ = NAND ( new_n4084_, new_n3815_ ) -new_n4086_ = OR ( new_n3869_, new_n3863_ ) -new_n4087_ = NAND ( new_n4086_, new_n4085_ ) -new_n4088_ = OR ( new_n4087_, new_n4083_ ) -new_n4089_ = NAND ( new_n4087_, new_n4083_ ) -new_n4090_ = NAND ( new_n4089_, new_n4088_, new_n3275_ ) -new_n4091_ = OR ( new_n4032_, new_n3295_ ) -new_n4092_ = NOR ( new_n3262_, new_n1066_ ) -new_n4093_ = AND ( NET_23567, NET_502 ) -new_n4094_ = NOR ( new_n4093_, new_n4092_ ) -NET_6392 = NAND ( new_n4094_, new_n4091_, new_n4090_, new_n4077_ ) -new_n4096_ = OR ( new_n4055_, new_n3307_ ) -new_n4097_ = NAND ( new_n4066_, new_n3311_ ) -new_n4098_ = NAND ( new_n3321_, new_n1908_ ) -new_n4099_ = NOR ( new_n4034_, new_n3325_ ) -new_n4100_ = AND ( new_n3327_, new_n1901_ ) -new_n4101_ = AND ( new_n3329_, new_n1926_ ) -new_n4102_ = NOR ( new_n4101_, new_n4100_, new_n4099_, new_n4093_ ) -NET_6393 = NAND ( new_n4102_, new_n4098_, new_n4097_, new_n4096_ ) -new_n4104_ = NOR ( new_n3839_, new_n3489_ ) -new_n4105_ = NAND ( new_n3850_, new_n3492_ ) -new_n4106_ = NAND ( new_n3255_, new_n1914_ ) -new_n4107_ = NAND ( new_n3251_, new_n1937_ ) -new_n4108_ = OR ( new_n3817_, new_n3497_ ) -new_n4109_ = NAND ( new_n4108_, new_n4107_, new_n4106_, new_n4105_ ) -new_n4110_ = NOR ( new_n4109_, new_n4104_ ) -new_n4111_ = NOR ( new_n4110_, new_n3505_ ) -new_n4112_ = NOR ( new_n3504_, new_n1918_ ) -NET_6395 = OR ( new_n4112_, new_n4111_ ) -new_n4114_ = NOR ( new_n4110_, new_n3510_ ) -new_n4115_ = NOR ( new_n3509_, new_n1924_ ) -NET_6396 = OR ( new_n4115_, new_n4114_ ) -new_n4117_ = NOR ( new_n3983_, new_n3364_ ) -new_n4118_ = NOR ( new_n3019_, new_n3973_ ) -new_n4119_ = NOT ( new_n3966_ ) -new_n4120_ = NAND ( new_n4119_, new_n3016_ ) -new_n4121_ = XNOR ( new_n4120_, new_n4118_ ) -new_n4122_ = NOR ( new_n3789_, new_n3784_ ) -new_n4123_ = OR ( new_n4122_, new_n3782_ ) -new_n4124_ = NAND ( new_n3789_, new_n3784_ ) -new_n4125_ = NAND ( new_n4124_, new_n4123_ ) -new_n4126_ = XOR ( new_n4125_, new_n4121_ ) -new_n4127_ = OR ( new_n4126_, new_n3373_ ) -new_n4128_ = NAND ( new_n3379_, new_n2289_ ) -new_n4129_ = NAND ( new_n3360_, NET_165 ) -new_n4130_ = NAND ( new_n3058_, new_n2298_ ) -new_n4131_ = AND ( new_n4130_, new_n4129_, new_n4128_ ) -new_n4132_ = NAND ( new_n3712_, new_n2311_ ) -new_n4133_ = NAND ( new_n4119_, new_n3382_ ) -new_n4134_ = NAND ( new_n4133_, new_n4132_, new_n4131_, new_n4127_ ) -NET_6440 = OR ( new_n4134_, new_n4117_ ) -new_n4136_ = OR ( new_n3983_, new_n3005_ ) -new_n4137_ = OR ( new_n4126_, new_n3035_ ) -new_n4138_ = NAND ( new_n3051_, new_n2298_ ) -new_n4139_ = NAND ( new_n4119_, new_n3060_ ) -new_n4140_ = NAND ( new_n3062_, new_n2289_ ) -new_n4141_ = NAND ( new_n3064_, new_n2311_ ) -new_n4142_ = AND ( new_n4141_, new_n4140_, new_n4139_, new_n4000_ ) -NET_6441 = NAND ( new_n4142_, new_n4138_, new_n4137_, new_n4136_ ) -new_n4144_ = OR ( new_n1078_, NET_475 ) -new_n4145_ = NOT ( NET_15 ) -new_n4146_ = OR ( new_n1078_, NET_230 ) -new_n4147_ = NAND ( new_n1078_, new_n1722_ ) -new_n4148_ = NAND ( new_n4147_, new_n4146_ ) -new_n4149_ = OR ( new_n4148_, new_n4145_ ) -new_n4150_ = NAND ( new_n4148_, new_n4145_ ) -new_n4151_ = NAND ( new_n4150_, new_n4149_ ) -new_n4152_ = NAND ( new_n3949_, new_n3946_ ) -new_n4153_ = NAND ( new_n4152_, new_n3945_ ) -new_n4154_ = XNOR ( new_n4153_, new_n4151_ ) -new_n4155_ = OR ( new_n4154_, new_n1080_ ) -new_n4156_ = NAND ( new_n4155_, new_n4144_ ) -new_n4157_ = OR ( new_n4156_, NET_275 ) -new_n4158_ = OR ( new_n1125_, new_n2856_ ) -new_n4159_ = XOR ( new_n2858_, NET_50 ) -new_n4160_ = OR ( new_n4159_, new_n1127_ ) -NET_6525 = NAND ( new_n4160_, new_n4158_, new_n4157_ ) -new_n4162_ = NAND ( new_n1981_, new_n1300_ ) -new_n4163_ = NOR ( NET_64, new_n1983_ ) -new_n4164_ = NOR ( new_n1985_, new_n1261_ ) -new_n4165_ = OR ( new_n4164_, new_n4163_ ) -new_n4166_ = OR ( new_n4165_, new_n1300_ ) -new_n4167_ = NAND ( new_n4166_, new_n4162_ ) -new_n4168_ = OR ( new_n4167_, new_n2889_ ) -new_n4169_ = NOT ( new_n2289_ ) -new_n4170_ = OR ( new_n2928_, new_n4169_ ) -new_n4171_ = OR ( new_n2903_, new_n2281_ ) -new_n4172_ = OR ( new_n2905_, new_n2283_ ) -new_n4173_ = NAND ( new_n4172_, new_n4171_, new_n4170_, new_n4168_ ) -new_n4174_ = NAND ( new_n2908_, new_n2289_ ) -new_n4175_ = OR ( new_n4167_, new_n2898_ ) -new_n4176_ = NAND ( new_n4165_, new_n2912_ ) -new_n4177_ = NAND ( new_n4176_, new_n4175_, new_n4174_ ) -new_n4178_ = XOR ( new_n4177_, new_n2915_ ) -new_n4179_ = NAND ( new_n4178_, new_n4173_ ) -new_n4180_ = OR ( new_n4178_, new_n4173_ ) -new_n4181_ = NAND ( new_n4180_, new_n4179_ ) -new_n4182_ = NAND ( new_n3982_, new_n3978_ ) -new_n4183_ = NAND ( new_n4182_, new_n3979_ ) -new_n4184_ = XOR ( new_n4183_, new_n4181_ ) -new_n4185_ = NOR ( new_n4184_, new_n2951_ ) -new_n4186_ = NAND ( new_n3993_, new_n3992_, new_n3989_ ) -new_n4187_ = NAND ( new_n4186_, new_n3988_ ) -new_n4188_ = OR ( new_n1290_, new_n2281_ ) -new_n4189_ = NAND ( new_n1290_, NET_166 ) -new_n4190_ = NAND ( new_n4189_, new_n4188_ ) -new_n4191_ = XOR ( new_n4190_, new_n4187_ ) -new_n4192_ = NAND ( new_n4191_, new_n4165_ ) -new_n4193_ = OR ( new_n4191_, new_n4165_ ) -new_n4194_ = NAND ( new_n4193_, new_n4192_, new_n2960_ ) -new_n4195_ = NAND ( new_n4165_, new_n2977_ ) -new_n4196_ = OR ( new_n2949_, new_n1147_ ) -new_n4197_ = OR ( NET_275, new_n2036_ ) -new_n4198_ = NAND ( new_n4197_, new_n4196_, new_n4195_, new_n4194_ ) -NET_6526 = OR ( new_n4198_, new_n4185_ ) -new_n4200_ = NOR ( new_n3983_, new_n3454_ ) -new_n4201_ = OR ( new_n4126_, new_n3574_ ) -new_n4202_ = NAND ( new_n3377_, new_n2289_ ) -new_n4203_ = NAND ( new_n3441_, new_n2311_ ) -new_n4204_ = OR ( new_n3966_, new_n3461_ ) -new_n4205_ = NAND ( new_n4204_, new_n4203_, new_n4202_, new_n4201_ ) -new_n4206_ = NOR ( new_n4205_, new_n4200_ ) -new_n4207_ = OR ( new_n4206_, new_n4003_ ) -new_n4208_ = OR ( new_n3470_, new_n2293_ ) -NET_6528 = NAND ( new_n4208_, new_n4207_ ) -new_n4210_ = OR ( new_n4206_, new_n3476_ ) -new_n4211_ = NAND ( new_n3476_, NET_101 ) -NET_6529 = NAND ( new_n4211_, new_n4210_ ) -new_n4213_ = OR ( new_n4154_, new_n1078_ ) -new_n4214_ = NAND ( new_n1078_, new_n2121_ ) -new_n4215_ = NAND ( new_n4214_, new_n4213_ ) -new_n4216_ = OR ( new_n4215_, NET_520 ) -new_n4217_ = NOT ( NET_295 ) -new_n4218_ = OR ( new_n1101_, new_n4217_ ) -new_n4219_ = XOR ( new_n1323_, new_n4217_ ) -new_n4220_ = OR ( new_n4219_, new_n1141_ ) -NET_6536 = NAND ( new_n4220_, new_n4218_, new_n4216_ ) -new_n4222_ = NAND ( new_n2359_, new_n1421_ ) -new_n4223_ = NOR ( NET_309, new_n2361_ ) -new_n4224_ = NOR ( new_n2363_, new_n1103_ ) -new_n4225_ = NOR ( new_n4224_, new_n4223_ ) -new_n4226_ = NAND ( new_n4225_, new_n1420_ ) -new_n4227_ = NAND ( new_n4226_, new_n4222_ ) -new_n4228_ = OR ( new_n4227_, new_n3110_ ) -new_n4229_ = NAND ( new_n3126_, new_n1901_ ) -new_n4230_ = OR ( new_n3136_, new_n1897_ ) -new_n4231_ = OR ( new_n3139_, new_n1892_ ) -new_n4232_ = NOT ( new_n4225_ ) -new_n4233_ = NAND ( new_n4232_, new_n1353_ ) -new_n4234_ = AND ( new_n4233_, new_n4231_, new_n4230_ ) -new_n4235_ = NAND ( new_n4234_, new_n4229_, new_n4228_ ) -new_n4236_ = NAND ( new_n3146_, new_n1901_ ) -new_n4237_ = OR ( new_n4227_, new_n3125_ ) -new_n4238_ = NAND ( new_n4232_, new_n3149_ ) -new_n4239_ = OR ( new_n3151_, new_n1897_ ) -new_n4240_ = OR ( new_n3153_, new_n1892_ ) -new_n4241_ = AND ( new_n4240_, new_n4239_, new_n4238_ ) -new_n4242_ = NAND ( new_n4241_, new_n4237_, new_n4236_ ) -new_n4243_ = XOR ( new_n4242_, new_n3157_ ) -new_n4244_ = NAND ( new_n4243_, new_n4235_ ) -new_n4245_ = OR ( new_n4243_, new_n4235_ ) -new_n4246_ = NAND ( new_n4245_, new_n4244_ ) -new_n4247_ = NAND ( new_n4054_, new_n4050_ ) -new_n4248_ = NAND ( new_n4247_, new_n4051_ ) -new_n4249_ = XOR ( new_n4248_, new_n4246_ ) -new_n4250_ = NOR ( new_n4249_, new_n3213_ ) -new_n4251_ = OR ( new_n3210_, new_n1901_ ) -new_n4252_ = OR ( new_n4227_, new_n3216_ ) -new_n4253_ = NAND ( new_n4252_, new_n4251_ ) -new_n4254_ = OR ( new_n4227_, new_n3210_ ) -new_n4255_ = OR ( new_n4254_, new_n4253_ ) -new_n4256_ = NAND ( new_n4254_, new_n4253_ ) -new_n4257_ = NAND ( new_n4256_, new_n4255_ ) -new_n4258_ = NAND ( new_n4065_, new_n4061_ ) -new_n4259_ = NAND ( new_n4258_, new_n4062_ ) -new_n4260_ = XNOR ( new_n4259_, new_n4257_ ) -new_n4261_ = NAND ( new_n4260_, new_n3238_ ) -new_n4262_ = OR ( new_n4227_, new_n3243_ ) -new_n4263_ = NAND ( new_n3207_, NET_411 ) -new_n4264_ = NAND ( new_n4070_, new_n1895_ ) -new_n4265_ = AND ( new_n4264_, new_n4263_, new_n4262_ ) -new_n4266_ = NAND ( new_n3257_, new_n1887_ ) -new_n4267_ = NAND ( new_n3253_, new_n1914_ ) -new_n4268_ = NAND ( new_n4267_, new_n4266_, new_n4265_, new_n4261_ ) -NET_6537 = OR ( new_n4268_, new_n4250_ ) -new_n4270_ = OR ( new_n4249_, new_n3267_ ) -new_n4271_ = NAND ( new_n4086_, new_n4085_, new_n4082_ ) -new_n4272_ = NAND ( new_n4271_, new_n4081_ ) -new_n4273_ = OR ( new_n1419_, new_n1892_ ) -new_n4274_ = NAND ( new_n1419_, NET_411 ) -new_n4275_ = NAND ( new_n4274_, new_n4273_ ) -new_n4276_ = XNOR ( new_n4275_, new_n4272_ ) -new_n4277_ = OR ( new_n4276_, new_n4225_ ) -new_n4278_ = NAND ( new_n4276_, new_n4225_ ) -new_n4279_ = NAND ( new_n4278_, new_n4277_, new_n3275_ ) -new_n4280_ = OR ( new_n4225_, new_n3295_ ) -new_n4281_ = NOR ( new_n3262_, new_n1148_ ) -new_n4282_ = NOR ( NET_520, new_n1633_ ) -new_n4283_ = NOR ( new_n4282_, new_n4281_ ) -NET_6538 = NAND ( new_n4283_, new_n4280_, new_n4279_, new_n4270_ ) -new_n4285_ = OR ( new_n4249_, new_n3307_ ) -new_n4286_ = NAND ( new_n4260_, new_n3311_ ) -new_n4287_ = NAND ( new_n3321_, new_n1895_ ) -new_n4288_ = NOR ( new_n4227_, new_n3325_ ) -new_n4289_ = AND ( new_n3327_, new_n1887_ ) -new_n4290_ = AND ( new_n3329_, new_n1914_ ) -new_n4291_ = NOR ( new_n4290_, new_n4289_, new_n4288_, new_n4282_ ) -NET_6539 = NAND ( new_n4291_, new_n4287_, new_n4286_, new_n4285_ ) -new_n4293_ = NOR ( new_n4055_, new_n3489_ ) -new_n4294_ = NAND ( new_n4066_, new_n3492_ ) -new_n4295_ = NAND ( new_n3251_, new_n1926_ ) -new_n4296_ = NAND ( new_n3255_, new_n1901_ ) -new_n4297_ = OR ( new_n4034_, new_n3497_ ) -new_n4298_ = NAND ( new_n4297_, new_n4296_, new_n4295_, new_n4294_ ) -new_n4299_ = NOR ( new_n4298_, new_n4293_ ) -new_n4300_ = NOR ( new_n4299_, new_n3505_ ) -new_n4301_ = NOR ( new_n3504_, new_n1905_ ) -NET_6541 = OR ( new_n4301_, new_n4300_ ) -new_n4303_ = NOR ( new_n4299_, new_n3510_ ) -new_n4304_ = NOR ( new_n3509_, new_n1912_ ) -NET_6542 = OR ( new_n4304_, new_n4303_ ) -new_n4306_ = OR ( new_n1078_, NET_476 ) -new_n4307_ = NOT ( NET_14 ) -new_n4308_ = OR ( new_n1078_, NET_231 ) -new_n4309_ = NAND ( new_n1078_, new_n1708_ ) -new_n4310_ = NAND ( new_n4309_, new_n4308_ ) -new_n4311_ = OR ( new_n4310_, new_n4307_ ) -new_n4312_ = NAND ( new_n4310_, new_n4307_ ) -new_n4313_ = NAND ( new_n4312_, new_n4311_ ) -new_n4314_ = NAND ( new_n4153_, new_n4150_ ) -new_n4315_ = NAND ( new_n4314_, new_n4149_ ) -new_n4316_ = XNOR ( new_n4315_, new_n4313_ ) -new_n4317_ = OR ( new_n4316_, new_n1080_ ) -new_n4318_ = NAND ( new_n4317_, new_n4306_ ) -new_n4319_ = OR ( new_n4318_, NET_275 ) -new_n4320_ = OR ( new_n1125_, new_n2857_ ) -new_n4321_ = NAND ( new_n2858_, new_n2856_ ) -new_n4322_ = NAND ( new_n4321_, NET_51 ) -new_n4323_ = NAND ( new_n4322_, new_n2859_ ) -new_n4324_ = OR ( new_n4323_, new_n1127_ ) -NET_6667 = NAND ( new_n4324_, new_n4320_, new_n4319_ ) -new_n4326_ = OR ( new_n4184_, new_n3005_ ) -new_n4327_ = NOR ( new_n3019_, new_n4169_ ) -new_n4328_ = OR ( new_n4167_, new_n3017_ ) -new_n4329_ = XNOR ( new_n4328_, new_n4327_ ) -new_n4330_ = OR ( new_n4125_, new_n4120_ ) -new_n4331_ = NAND ( new_n4330_, new_n4118_ ) -new_n4332_ = NAND ( new_n4125_, new_n4120_ ) -new_n4333_ = NAND ( new_n4332_, new_n4331_ ) -new_n4334_ = XOR ( new_n4333_, new_n4329_ ) -new_n4335_ = OR ( new_n4334_, new_n3035_ ) -new_n4336_ = NAND ( new_n3051_, new_n2286_ ) -new_n4337_ = NOT ( new_n4167_ ) -new_n4338_ = NAND ( new_n4337_, new_n3060_ ) -new_n4339_ = NAND ( new_n3062_, new_n2276_ ) -new_n4340_ = NAND ( new_n3064_, new_n2301_ ) -new_n4341_ = AND ( new_n4340_, new_n4339_, new_n4338_, new_n4197_ ) -NET_6668 = NAND ( new_n4341_, new_n4336_, new_n4335_, new_n4326_ ) -new_n4343_ = OR ( new_n4316_, new_n1078_ ) -new_n4344_ = NAND ( new_n1078_, new_n2108_ ) -new_n4345_ = NAND ( new_n4344_, new_n4343_ ) -new_n4346_ = OR ( new_n4345_, NET_520 ) -new_n4347_ = NOT ( NET_296 ) -new_n4348_ = OR ( new_n1101_, new_n4347_ ) -new_n4349_ = NOR ( new_n1323_, NET_295 ) -new_n4350_ = NOR ( new_n4349_, new_n4347_ ) -new_n4351_ = OR ( new_n4350_, new_n1324_ ) -new_n4352_ = OR ( new_n4351_, new_n1141_ ) -NET_6680 = NAND ( new_n4352_, new_n4348_, new_n4346_ ) -new_n4354_ = NOR ( new_n4249_, new_n3489_ ) -new_n4355_ = NAND ( new_n4260_, new_n3492_ ) -new_n4356_ = NAND ( new_n3251_, new_n1914_ ) -new_n4357_ = NAND ( new_n3255_, new_n1887_ ) -new_n4358_ = OR ( new_n4227_, new_n3497_ ) -new_n4359_ = NAND ( new_n4358_, new_n4357_, new_n4356_, new_n4355_ ) -new_n4360_ = NOR ( new_n4359_, new_n4354_ ) -new_n4361_ = NOR ( new_n4360_, new_n3505_ ) -new_n4362_ = NOR ( new_n3504_, new_n1892_ ) -NET_6682 = OR ( new_n4362_, new_n4361_ ) -new_n4364_ = NOR ( new_n4360_, new_n3510_ ) -new_n4365_ = NOR ( new_n3509_, new_n1899_ ) -NET_6683 = OR ( new_n4365_, new_n4364_ ) -new_n4367_ = NOR ( new_n4184_, new_n3364_ ) -new_n4368_ = OR ( new_n4334_, new_n3373_ ) -new_n4369_ = NAND ( new_n3379_, new_n2276_ ) -new_n4370_ = NAND ( new_n3360_, NET_166 ) -new_n4371_ = NAND ( new_n3058_, new_n2286_ ) -new_n4372_ = AND ( new_n4371_, new_n4370_, new_n4369_ ) -new_n4373_ = NAND ( new_n3712_, new_n2301_ ) -new_n4374_ = NOT ( new_n3382_ ) -new_n4375_ = OR ( new_n4167_, new_n4374_ ) -new_n4376_ = NAND ( new_n4375_, new_n4373_, new_n4372_, new_n4368_ ) -NET_6736 = OR ( new_n4376_, new_n4367_ ) -new_n4378_ = NAND ( new_n2908_, new_n2276_ ) -new_n4379_ = NAND ( new_n2454_, new_n1300_ ) -new_n4380_ = OR ( NET_64, new_n2456_ ) -new_n4381_ = OR ( new_n2461_, new_n1261_ ) -new_n4382_ = NAND ( new_n4381_, new_n4380_ ) -new_n4383_ = OR ( new_n4382_, new_n1300_ ) -new_n4384_ = NAND ( new_n4383_, new_n4379_ ) -new_n4385_ = OR ( new_n4384_, new_n2898_ ) -new_n4386_ = NAND ( new_n4382_, new_n2912_ ) -new_n4387_ = NAND ( new_n4386_, new_n4385_, new_n4378_ ) -new_n4388_ = XOR ( new_n4387_, new_n2915_ ) -new_n4389_ = OR ( new_n4384_, new_n2889_ ) -new_n4390_ = NOT ( new_n2276_ ) -new_n4391_ = OR ( new_n2928_, new_n4390_ ) -new_n4392_ = OR ( new_n2903_, new_n2268_ ) -new_n4393_ = OR ( new_n2905_, new_n2270_ ) -new_n4394_ = NAND ( new_n4393_, new_n4392_, new_n4391_, new_n4389_ ) -new_n4395_ = NAND ( new_n4394_, new_n4388_ ) -new_n4396_ = OR ( new_n4394_, new_n4388_ ) -new_n4397_ = NAND ( new_n4396_, new_n4395_ ) -new_n4398_ = NAND ( new_n4183_, new_n4180_ ) -new_n4399_ = NAND ( new_n4398_, new_n4397_, new_n4179_ ) -new_n4400_ = NAND ( new_n4398_, new_n4179_ ) -new_n4401_ = NAND ( new_n4400_, new_n4396_, new_n4395_ ) -new_n4402_ = NAND ( new_n4401_, new_n4399_ ) -new_n4403_ = OR ( new_n4402_, new_n2951_ ) -new_n4404_ = OR ( new_n1290_, new_n2268_ ) -new_n4405_ = NAND ( new_n1290_, NET_167 ) -new_n4406_ = NAND ( new_n4405_, new_n4404_ ) -new_n4407_ = NOR ( new_n4406_, new_n4382_ ) -new_n4408_ = NOT ( new_n4407_ ) -new_n4409_ = NAND ( new_n4406_, new_n4382_ ) -new_n4410_ = NAND ( new_n4409_, new_n4408_ ) -new_n4411_ = NAND ( new_n4190_, new_n4165_ ) -new_n4412_ = NAND ( new_n4411_, new_n4186_, new_n3988_ ) -new_n4413_ = OR ( new_n4190_, new_n4165_ ) -new_n4414_ = NAND ( new_n4413_, new_n4412_ ) -new_n4415_ = NAND ( new_n4414_, new_n4410_ ) -new_n4416_ = OR ( new_n4414_, new_n4410_ ) -new_n4417_ = NAND ( new_n4416_, new_n4415_, new_n2960_ ) -new_n4418_ = NAND ( new_n4382_, new_n2977_ ) -new_n4419_ = OR ( new_n2949_, new_n1191_ ) -new_n4420_ = OR ( NET_275, new_n2035_ ) -new_n4421_ = AND ( new_n4420_, new_n4419_, new_n4418_ ) -NET_6737 = NAND ( new_n4421_, new_n4417_, new_n4403_ ) -new_n4423_ = NAND ( new_n3146_, new_n1887_ ) -new_n4424_ = NAND ( new_n2491_, new_n1421_ ) -new_n4425_ = OR ( NET_309, new_n2493_ ) -new_n4426_ = OR ( new_n2497_, new_n1103_ ) -new_n4427_ = NAND ( new_n4426_, new_n4425_ ) -new_n4428_ = OR ( new_n4427_, new_n1421_ ) -new_n4429_ = NAND ( new_n4428_, new_n4424_ ) -new_n4430_ = OR ( new_n4429_, new_n3125_ ) -new_n4431_ = NAND ( new_n4427_, new_n3149_ ) -new_n4432_ = OR ( new_n3151_, new_n1883_ ) -new_n4433_ = OR ( new_n3153_, new_n1878_ ) -new_n4434_ = AND ( new_n4433_, new_n4432_, new_n4431_ ) -new_n4435_ = NAND ( new_n4434_, new_n4430_, new_n4423_ ) -new_n4436_ = NAND ( new_n4435_, new_n3158_ ) -new_n4437_ = OR ( new_n4435_, new_n3158_ ) -new_n4438_ = AND ( new_n4437_, new_n4436_ ) -new_n4439_ = NOR ( new_n4429_, new_n3110_ ) -new_n4440_ = NAND ( new_n3126_, new_n1887_ ) -new_n4441_ = OR ( new_n3136_, new_n1883_ ) -new_n4442_ = OR ( new_n3139_, new_n1878_ ) -new_n4443_ = NAND ( new_n4427_, new_n1353_ ) -new_n4444_ = NAND ( new_n4443_, new_n4442_, new_n4441_, new_n4440_ ) -new_n4445_ = NOR ( new_n4444_, new_n4439_ ) -new_n4446_ = OR ( new_n4445_, new_n4438_ ) -new_n4447_ = NAND ( new_n4445_, new_n4437_, new_n4436_ ) -new_n4448_ = NAND ( new_n4447_, new_n4446_ ) -new_n4449_ = NAND ( new_n4248_, new_n4245_ ) -new_n4450_ = NAND ( new_n4449_, new_n4448_, new_n4244_ ) -new_n4451_ = NAND ( new_n4449_, new_n4244_ ) -new_n4452_ = NAND ( new_n4451_, new_n4447_, new_n4446_ ) -new_n4453_ = NAND ( new_n4452_, new_n4450_ ) -new_n4454_ = OR ( new_n4453_, new_n3213_ ) -new_n4455_ = NAND ( new_n4428_, new_n4424_, new_n3216_, new_n1887_ ) -new_n4456_ = OR ( new_n4429_, new_n3210_ ) -new_n4457_ = OR ( new_n3210_, new_n1887_ ) -new_n4458_ = NAND ( new_n4429_, new_n3210_ ) -new_n4459_ = NAND ( new_n4458_, new_n4457_ ) -new_n4460_ = NAND ( new_n4459_, new_n3210_ ) -new_n4461_ = NAND ( new_n3216_, new_n1887_ ) -new_n4462_ = NAND ( new_n4461_, new_n4460_, new_n4456_ ) -new_n4463_ = NAND ( new_n4462_, new_n4455_ ) -new_n4464_ = NAND ( new_n4259_, new_n4256_ ) -new_n4465_ = NAND ( new_n4464_, new_n4463_, new_n4255_ ) -new_n4466_ = NAND ( new_n4464_, new_n4255_ ) -new_n4467_ = NAND ( new_n4466_, new_n4462_, new_n4455_ ) -new_n4468_ = NAND ( new_n4467_, new_n4465_ ) -new_n4469_ = OR ( new_n4468_, new_n3480_ ) -new_n4470_ = OR ( new_n4429_, new_n3243_ ) -new_n4471_ = NAND ( new_n3207_, NET_412 ) -new_n4472_ = NAND ( new_n4070_, new_n1881_ ) -new_n4473_ = AND ( new_n4472_, new_n4471_, new_n4470_ ) -new_n4474_ = NAND ( new_n3253_, new_n1901_ ) -new_n4475_ = NAND ( new_n3257_, new_n1873_ ) -new_n4476_ = AND ( new_n4475_, new_n4474_ ) -NET_6757 = NAND ( new_n4476_, new_n4473_, new_n4469_, new_n4454_ ) -new_n4478_ = OR ( new_n4453_, new_n3267_ ) -new_n4479_ = OR ( new_n1419_, new_n1878_ ) -new_n4480_ = NAND ( new_n1419_, NET_412 ) -new_n4481_ = NAND ( new_n4480_, new_n4479_ ) -new_n4482_ = NOR ( new_n4481_, new_n4427_ ) -new_n4483_ = NOT ( new_n4482_ ) -new_n4484_ = NAND ( new_n4481_, new_n4427_ ) -new_n4485_ = NAND ( new_n4484_, new_n4483_ ) -new_n4486_ = NAND ( new_n4275_, new_n4232_ ) -new_n4487_ = NAND ( new_n4486_, new_n4271_, new_n4081_ ) -new_n4488_ = OR ( new_n4275_, new_n4232_ ) -new_n4489_ = NAND ( new_n4488_, new_n4487_ ) -new_n4490_ = NAND ( new_n4489_, new_n4485_ ) -new_n4491_ = OR ( new_n4489_, new_n4485_ ) -new_n4492_ = NAND ( new_n4491_, new_n4490_, new_n3275_ ) -new_n4493_ = NOT ( new_n3295_ ) -new_n4494_ = NAND ( new_n4427_, new_n4493_ ) -new_n4495_ = NOR ( new_n3262_, new_n1192_ ) -new_n4496_ = NOR ( NET_520, new_n1632_ ) -new_n4497_ = NOR ( new_n4496_, new_n4495_ ) -NET_6758 = NAND ( new_n4497_, new_n4494_, new_n4492_, new_n4478_ ) -new_n4499_ = OR ( new_n4453_, new_n3307_ ) -new_n4500_ = OR ( new_n4468_, new_n3310_ ) -new_n4501_ = NAND ( new_n3321_, new_n1881_ ) -new_n4502_ = NOR ( new_n4429_, new_n3325_ ) -new_n4503_ = AND ( new_n3327_, new_n1873_ ) -new_n4504_ = AND ( new_n3329_, new_n1901_ ) -new_n4505_ = NOR ( new_n4504_, new_n4503_, new_n4502_, new_n4496_ ) -NET_6759 = NAND ( new_n4505_, new_n4501_, new_n4500_, new_n4499_ ) -new_n4507_ = OR ( new_n1078_, NET_477 ) -new_n4508_ = NOT ( NET_13 ) -new_n4509_ = OR ( new_n1078_, NET_232 ) -new_n4510_ = NAND ( new_n1078_, new_n1693_ ) -new_n4511_ = NAND ( new_n4510_, new_n4509_ ) -new_n4512_ = OR ( new_n4511_, new_n4508_ ) -new_n4513_ = NAND ( new_n4511_, new_n4508_ ) -new_n4514_ = NAND ( new_n4513_, new_n4512_ ) -new_n4515_ = NAND ( new_n4315_, new_n4312_ ) -new_n4516_ = NAND ( new_n4515_, new_n4311_ ) -new_n4517_ = XNOR ( new_n4516_, new_n4514_ ) -new_n4518_ = OR ( new_n4517_, new_n1080_ ) -new_n4519_ = NAND ( new_n4518_, new_n4507_ ) -new_n4520_ = OR ( new_n4519_, NET_275 ) -new_n4521_ = OR ( new_n1125_, new_n2865_ ) -new_n4522_ = OR ( new_n2867_, new_n1127_ ) -NET_6805 = NAND ( new_n4522_, new_n4521_, new_n4520_ ) -new_n4524_ = NOR ( new_n4184_, new_n3454_ ) -new_n4525_ = OR ( new_n4334_, new_n3574_ ) -new_n4526_ = NAND ( new_n3377_, new_n2276_ ) -new_n4527_ = NAND ( new_n3441_, new_n2301_ ) -new_n4528_ = OR ( new_n4167_, new_n3461_ ) -new_n4529_ = NAND ( new_n4528_, new_n4527_, new_n4526_, new_n4525_ ) -new_n4530_ = NOR ( new_n4529_, new_n4524_ ) -new_n4531_ = OR ( new_n4530_, new_n4003_ ) -new_n4532_ = OR ( new_n3470_, new_n2281_ ) -NET_6807 = NAND ( new_n4532_, new_n4531_ ) -new_n4534_ = OR ( new_n4530_, new_n3476_ ) -new_n4535_ = NAND ( new_n3476_, NET_102 ) -NET_6808 = NAND ( new_n4535_, new_n4534_ ) -new_n4537_ = OR ( new_n4517_, new_n1078_ ) -new_n4538_ = NAND ( new_n1078_, new_n2093_ ) -new_n4539_ = NAND ( new_n4538_, new_n4537_ ) -new_n4540_ = OR ( new_n4539_, NET_520 ) -new_n4541_ = OR ( new_n1101_, new_n1308_ ) -new_n4542_ = OR ( new_n3085_, new_n1141_ ) -NET_6816 = NAND ( new_n4542_, new_n4541_, new_n4540_ ) -new_n4544_ = NAND ( new_n2908_, new_n2263_ ) -new_n4545_ = NAND ( new_n2600_, new_n1300_ ) -new_n4546_ = NOR ( NET_64, new_n2602_ ) -new_n4547_ = NOR ( new_n2604_, new_n1261_ ) -new_n4548_ = OR ( new_n4547_, new_n4546_ ) -new_n4549_ = OR ( new_n4548_, new_n1300_ ) -new_n4550_ = NAND ( new_n4549_, new_n4545_ ) -new_n4551_ = OR ( new_n4550_, new_n2898_ ) -new_n4552_ = NAND ( new_n4548_, new_n2912_ ) -new_n4553_ = NAND ( new_n4552_, new_n4551_, new_n4544_ ) -new_n4554_ = XOR ( new_n4553_, new_n2915_ ) -new_n4555_ = OR ( new_n4550_, new_n2889_ ) -new_n4556_ = NOT ( new_n2263_ ) -new_n4557_ = OR ( new_n2928_, new_n4556_ ) -new_n4558_ = OR ( new_n2903_, new_n2254_ ) -new_n4559_ = OR ( new_n2905_, new_n2256_ ) -new_n4560_ = NAND ( new_n4559_, new_n4558_, new_n4557_, new_n4555_ ) -new_n4561_ = OR ( new_n4560_, new_n4554_ ) -new_n4562_ = NAND ( new_n4560_, new_n4554_ ) -new_n4563_ = NAND ( new_n4562_, new_n4561_ ) -new_n4564_ = NAND ( new_n4400_, new_n4396_ ) -new_n4565_ = NAND ( new_n4564_, new_n4395_ ) -new_n4566_ = XOR ( new_n4565_, new_n4563_ ) -new_n4567_ = NOR ( new_n4566_, new_n2951_ ) -new_n4568_ = OR ( new_n1290_, new_n2254_ ) -new_n4569_ = NAND ( new_n1290_, NET_168 ) -new_n4570_ = NAND ( new_n4569_, new_n4568_ ) -new_n4571_ = XOR ( new_n4570_, new_n4548_ ) -new_n4572_ = OR ( new_n4414_, new_n4407_ ) -new_n4573_ = NAND ( new_n4572_, new_n4409_ ) -new_n4574_ = NAND ( new_n4573_, new_n4571_ ) -new_n4575_ = OR ( new_n4573_, new_n4571_ ) -new_n4576_ = NAND ( new_n4575_, new_n4574_, new_n2960_ ) -new_n4577_ = NAND ( new_n4548_, new_n2977_ ) -new_n4578_ = OR ( new_n2949_, new_n1357_ ) -new_n4579_ = OR ( NET_275, new_n2034_ ) -new_n4580_ = NAND ( new_n4579_, new_n4578_, new_n4577_, new_n4576_ ) -NET_6881 = OR ( new_n4580_, new_n4567_ ) -new_n4582_ = NAND ( new_n3146_, new_n1873_ ) -new_n4583_ = NAND ( new_n2619_, new_n1421_ ) -new_n4584_ = NOR ( NET_309, new_n1314_ ) -new_n4585_ = NOR ( new_n2622_, new_n1103_ ) -new_n4586_ = OR ( new_n4585_, new_n4584_ ) -new_n4587_ = OR ( new_n4586_, new_n1421_ ) -new_n4588_ = NAND ( new_n4587_, new_n4583_ ) -new_n4589_ = OR ( new_n4588_, new_n3125_ ) -new_n4590_ = NAND ( new_n4586_, new_n3149_ ) -new_n4591_ = OR ( new_n3151_, new_n1869_ ) -new_n4592_ = OR ( new_n3153_, new_n1864_ ) -new_n4593_ = AND ( new_n4592_, new_n4591_, new_n4590_ ) -new_n4594_ = NAND ( new_n4593_, new_n4589_, new_n4582_ ) -new_n4595_ = XOR ( new_n4594_, new_n3157_ ) -new_n4596_ = OR ( new_n4588_, new_n3110_ ) -new_n4597_ = NAND ( new_n3126_, new_n1873_ ) -new_n4598_ = OR ( new_n3136_, new_n1869_ ) -new_n4599_ = OR ( new_n3139_, new_n1864_ ) -new_n4600_ = NAND ( new_n4586_, new_n1353_ ) -new_n4601_ = AND ( new_n4600_, new_n4599_, new_n4598_ ) -new_n4602_ = NAND ( new_n4601_, new_n4597_, new_n4596_ ) -new_n4603_ = OR ( new_n4602_, new_n4595_ ) -new_n4604_ = NAND ( new_n4602_, new_n4595_ ) -new_n4605_ = NAND ( new_n4604_, new_n4603_ ) -new_n4606_ = NAND ( new_n4451_, new_n4447_ ) -new_n4607_ = NAND ( new_n4606_, new_n4446_ ) -new_n4608_ = XOR ( new_n4607_, new_n4605_ ) -new_n4609_ = NOR ( new_n4608_, new_n3213_ ) -new_n4610_ = OR ( new_n3210_, new_n1873_ ) -new_n4611_ = OR ( new_n4588_, new_n3216_ ) -new_n4612_ = NAND ( new_n4611_, new_n4610_ ) -new_n4613_ = OR ( new_n4588_, new_n3210_ ) -new_n4614_ = NAND ( new_n4613_, new_n4612_ ) -new_n4615_ = OR ( new_n4613_, new_n4612_ ) -new_n4616_ = NAND ( new_n4615_, new_n4614_ ) -new_n4617_ = NAND ( new_n4466_, new_n4462_ ) -new_n4618_ = NAND ( new_n4617_, new_n4455_ ) -new_n4619_ = XNOR ( new_n4618_, new_n4616_ ) -new_n4620_ = NAND ( new_n4619_, new_n3238_ ) -new_n4621_ = OR ( new_n4588_, new_n3243_ ) -new_n4622_ = NAND ( new_n3207_, NET_413 ) -new_n4623_ = NAND ( new_n4070_, new_n1867_ ) -new_n4624_ = AND ( new_n4623_, new_n4622_, new_n4621_ ) -new_n4625_ = NAND ( new_n3253_, new_n1887_ ) -new_n4626_ = NAND ( new_n3257_, new_n1859_ ) -new_n4627_ = NAND ( new_n4626_, new_n4625_, new_n4624_, new_n4620_ ) -NET_6902 = OR ( new_n4627_, new_n4609_ ) -new_n4629_ = OR ( new_n4608_, new_n3267_ ) -new_n4630_ = OR ( new_n1419_, new_n1864_ ) -new_n4631_ = NAND ( new_n1419_, NET_413 ) -new_n4632_ = NAND ( new_n4631_, new_n4630_ ) -new_n4633_ = XOR ( new_n4632_, new_n4586_ ) -new_n4634_ = OR ( new_n4489_, new_n4482_ ) -new_n4635_ = NAND ( new_n4634_, new_n4484_ ) -new_n4636_ = NAND ( new_n4635_, new_n4633_ ) -new_n4637_ = OR ( new_n4635_, new_n4633_ ) -new_n4638_ = NAND ( new_n4637_, new_n4636_, new_n3275_ ) -new_n4639_ = NAND ( new_n4586_, new_n4493_ ) -new_n4640_ = NOR ( new_n3262_, new_n1358_ ) -new_n4641_ = NOR ( NET_520, new_n1631_ ) -new_n4642_ = NOR ( new_n4641_, new_n4640_ ) -NET_6903 = NAND ( new_n4642_, new_n4639_, new_n4638_, new_n4629_ ) -new_n4644_ = OR ( new_n4608_, new_n3307_ ) -new_n4645_ = NAND ( new_n4619_, new_n3311_ ) -new_n4646_ = NAND ( new_n3321_, new_n1867_ ) -new_n4647_ = NOR ( new_n4588_, new_n3325_ ) -new_n4648_ = AND ( new_n3327_, new_n1859_ ) -new_n4649_ = AND ( new_n3329_, new_n1887_ ) -new_n4650_ = NOR ( new_n4649_, new_n4648_, new_n4647_, new_n4641_ ) -NET_6904 = NAND ( new_n4650_, new_n4646_, new_n4645_, new_n4644_ ) -new_n4652_ = OR ( new_n4453_, new_n3489_ ) -new_n4653_ = OR ( new_n4468_, new_n3491_ ) -new_n4654_ = NAND ( new_n3255_, new_n1873_ ) -new_n4655_ = NAND ( new_n3251_, new_n1901_ ) -new_n4656_ = OR ( new_n4429_, new_n3497_ ) -new_n4657_ = AND ( new_n4656_, new_n4655_, new_n4654_ ) -new_n4658_ = NAND ( new_n4657_, new_n4653_, new_n4652_ ) -new_n4659_ = NAND ( new_n4658_, new_n3504_ ) -new_n4660_ = OR ( new_n3504_, new_n1878_ ) -NET_6906 = NAND ( new_n4660_, new_n4659_ ) -new_n4662_ = NAND ( new_n4658_, new_n3509_ ) -new_n4663_ = OR ( new_n3509_, new_n1885_ ) -NET_6907 = NAND ( new_n4663_, new_n4662_ ) -new_n4665_ = OR ( new_n1078_, NET_478 ) -new_n4666_ = OR ( new_n1078_, NET_233 ) -new_n4667_ = NAND ( new_n1078_, new_n1680_ ) -new_n4668_ = NAND ( new_n4667_, new_n4666_ ) -new_n4669_ = XOR ( new_n4668_, NET_12 ) -new_n4670_ = NAND ( new_n4516_, new_n4513_ ) -new_n4671_ = NAND ( new_n4670_, new_n4512_ ) -new_n4672_ = XNOR ( new_n4671_, new_n4669_ ) -new_n4673_ = OR ( new_n4672_, new_n1080_ ) -new_n4674_ = NAND ( new_n4673_, new_n4665_ ) -new_n4675_ = OR ( new_n4674_, NET_275 ) -new_n4676_ = OR ( new_n1125_, new_n2854_ ) -new_n4677_ = OR ( new_n2862_, new_n1127_ ) -NET_6956 = NAND ( new_n4677_, new_n4676_, new_n4675_ ) -new_n4679_ = OR ( new_n4402_, new_n3005_ ) -new_n4680_ = NOR ( new_n3019_, new_n4390_ ) -new_n4681_ = OR ( new_n4384_, new_n3017_ ) -new_n4682_ = XNOR ( new_n4681_, new_n4680_ ) -new_n4683_ = OR ( new_n4333_, new_n4328_ ) -new_n4684_ = NAND ( new_n4683_, new_n4327_ ) -new_n4685_ = NAND ( new_n4333_, new_n4328_ ) -new_n4686_ = NAND ( new_n4685_, new_n4684_ ) -new_n4687_ = XOR ( new_n4686_, new_n4682_ ) -new_n4688_ = OR ( new_n4687_, new_n3035_ ) -new_n4689_ = NAND ( new_n3051_, new_n2273_ ) -new_n4690_ = NOT ( new_n4384_ ) -new_n4691_ = NAND ( new_n4690_, new_n3060_ ) -new_n4692_ = NAND ( new_n3062_, new_n2263_ ) -new_n4693_ = NAND ( new_n3064_, new_n2289_ ) -new_n4694_ = AND ( new_n4693_, new_n4692_, new_n4691_, new_n4420_ ) -NET_6957 = NAND ( new_n4694_, new_n4689_, new_n4688_, new_n4679_ ) -new_n4696_ = OR ( new_n4672_, new_n1078_ ) -new_n4697_ = NAND ( new_n1078_, new_n2082_ ) -new_n4698_ = NAND ( new_n4697_, new_n4696_ ) -new_n4699_ = OR ( new_n4698_, NET_520 ) -new_n4700_ = OR ( new_n1101_, new_n1309_ ) -new_n4701_ = OR ( new_n3094_, new_n1141_ ) -NET_6978 = NAND ( new_n4701_, new_n4700_, new_n4699_ ) -new_n4703_ = OR ( new_n4402_, new_n3364_ ) -new_n4704_ = OR ( new_n4687_, new_n3373_ ) -new_n4705_ = NAND ( new_n3379_, new_n2263_ ) -new_n4706_ = NAND ( new_n3360_, NET_167 ) -new_n4707_ = NAND ( new_n3058_, new_n2273_ ) -new_n4708_ = NAND ( new_n4707_, new_n4706_, new_n4705_ ) -new_n4709_ = AND ( new_n3712_, new_n2289_ ) -new_n4710_ = NOR ( new_n4384_, new_n4374_ ) -new_n4711_ = NOR ( new_n4710_, new_n4709_, new_n4708_ ) -NET_7058 = NAND ( new_n4711_, new_n4704_, new_n4703_ ) -new_n4713_ = NAND ( new_n2908_, new_n2249_ ) -new_n4714_ = NAND ( new_n2657_, new_n1300_ ) -new_n4715_ = OR ( NET_64, new_n2659_ ) -new_n4716_ = OR ( new_n2663_, new_n1261_ ) -new_n4717_ = NAND ( new_n4716_, new_n4715_ ) -new_n4718_ = OR ( new_n4717_, new_n1300_ ) -new_n4719_ = NAND ( new_n4718_, new_n4714_ ) -new_n4720_ = OR ( new_n4719_, new_n2898_ ) -new_n4721_ = NAND ( new_n4717_, new_n2912_ ) -new_n4722_ = NAND ( new_n4721_, new_n4720_, new_n4713_ ) -new_n4723_ = XOR ( new_n4722_, new_n2915_ ) -new_n4724_ = OR ( new_n4719_, new_n2889_ ) -new_n4725_ = NOT ( new_n2249_ ) -new_n4726_ = OR ( new_n2928_, new_n4725_ ) -new_n4727_ = OR ( new_n2903_, new_n2240_ ) -new_n4728_ = OR ( new_n2905_, new_n2242_ ) -new_n4729_ = NAND ( new_n4728_, new_n4727_, new_n4726_, new_n4724_ ) -new_n4730_ = OR ( new_n4729_, new_n4723_ ) -new_n4731_ = NAND ( new_n4729_, new_n4723_ ) -new_n4732_ = NAND ( new_n4731_, new_n4730_ ) -new_n4733_ = NAND ( new_n4565_, new_n4561_ ) -new_n4734_ = NAND ( new_n4733_, new_n4562_ ) -new_n4735_ = XOR ( new_n4734_, new_n4732_ ) -new_n4736_ = NOR ( new_n4735_, new_n2951_ ) -new_n4737_ = OR ( new_n1290_, new_n2240_ ) -new_n4738_ = NAND ( new_n1290_, NET_169 ) -new_n4739_ = NAND ( new_n4738_, new_n4737_ ) -new_n4740_ = XOR ( new_n4739_, new_n4717_ ) -new_n4741_ = OR ( new_n4573_, new_n4570_ ) -new_n4742_ = NAND ( new_n4741_, new_n4548_ ) -new_n4743_ = NAND ( new_n4573_, new_n4570_ ) -new_n4744_ = NAND ( new_n4743_, new_n4742_ ) -new_n4745_ = NAND ( new_n4744_, new_n4740_ ) -new_n4746_ = OR ( new_n4744_, new_n4740_ ) -new_n4747_ = NAND ( new_n4746_, new_n4745_, new_n2960_ ) -new_n4748_ = NAND ( new_n4717_, new_n2977_ ) -new_n4749_ = OR ( new_n2949_, new_n1399_ ) -new_n4750_ = NAND ( NET_23564, NET_266 ) -new_n4751_ = NAND ( new_n4750_, new_n4749_, new_n4748_, new_n4747_ ) -NET_7059 = OR ( new_n4751_, new_n4736_ ) -new_n4753_ = NAND ( new_n3146_, new_n1859_ ) -new_n4754_ = NAND ( new_n2668_, new_n1421_ ) -new_n4755_ = OR ( NET_309, new_n1315_ ) -new_n4756_ = OR ( new_n2673_, new_n1103_ ) -new_n4757_ = NAND ( new_n4756_, new_n4755_ ) -new_n4758_ = OR ( new_n4757_, new_n1421_ ) -new_n4759_ = NAND ( new_n4758_, new_n4754_ ) -new_n4760_ = OR ( new_n4759_, new_n3125_ ) -new_n4761_ = NAND ( new_n4757_, new_n3149_ ) -new_n4762_ = OR ( new_n3151_, new_n1855_ ) -new_n4763_ = OR ( new_n3153_, new_n1850_ ) -new_n4764_ = AND ( new_n4763_, new_n4762_, new_n4761_ ) -new_n4765_ = NAND ( new_n4764_, new_n4760_, new_n4753_ ) -new_n4766_ = XOR ( new_n4765_, new_n3157_ ) -new_n4767_ = OR ( new_n4759_, new_n3110_ ) -new_n4768_ = NAND ( new_n3126_, new_n1859_ ) -new_n4769_ = OR ( new_n3136_, new_n1855_ ) -new_n4770_ = OR ( new_n3139_, new_n1850_ ) -new_n4771_ = NAND ( new_n4757_, new_n1353_ ) -new_n4772_ = AND ( new_n4771_, new_n4770_, new_n4769_ ) -new_n4773_ = NAND ( new_n4772_, new_n4768_, new_n4767_ ) -new_n4774_ = OR ( new_n4773_, new_n4766_ ) -new_n4775_ = NAND ( new_n4773_, new_n4766_ ) -new_n4776_ = NAND ( new_n4775_, new_n4774_ ) -new_n4777_ = NAND ( new_n4607_, new_n4603_ ) -new_n4778_ = NAND ( new_n4777_, new_n4604_ ) -new_n4779_ = XOR ( new_n4778_, new_n4776_ ) -new_n4780_ = NOR ( new_n4779_, new_n3213_ ) -new_n4781_ = OR ( new_n3210_, new_n1859_ ) -new_n4782_ = OR ( new_n4759_, new_n3216_ ) -new_n4783_ = NAND ( new_n4782_, new_n4781_ ) -new_n4784_ = OR ( new_n4759_, new_n3210_ ) -new_n4785_ = NAND ( new_n4784_, new_n4783_ ) -new_n4786_ = OR ( new_n4784_, new_n4783_ ) -new_n4787_ = NAND ( new_n4786_, new_n4785_ ) -new_n4788_ = NAND ( new_n4618_, new_n4614_ ) -new_n4789_ = NAND ( new_n4788_, new_n4615_ ) -new_n4790_ = XNOR ( new_n4789_, new_n4787_ ) -new_n4791_ = NAND ( new_n4790_, new_n3238_ ) -new_n4792_ = OR ( new_n4759_, new_n3243_ ) -new_n4793_ = NAND ( new_n3207_, NET_414 ) -new_n4794_ = NAND ( new_n4070_, new_n1853_ ) -new_n4795_ = AND ( new_n4794_, new_n4793_, new_n4792_ ) -new_n4796_ = NAND ( new_n3257_, new_n1845_ ) -new_n4797_ = NAND ( new_n3253_, new_n1873_ ) -new_n4798_ = NAND ( new_n4797_, new_n4796_, new_n4795_, new_n4791_ ) -NET_7073 = OR ( new_n4798_, new_n4780_ ) -new_n4800_ = OR ( new_n4779_, new_n3267_ ) -new_n4801_ = OR ( new_n1419_, new_n1850_ ) -new_n4802_ = NAND ( new_n1419_, NET_414 ) -new_n4803_ = NAND ( new_n4802_, new_n4801_ ) -new_n4804_ = XOR ( new_n4803_, new_n4757_ ) -new_n4805_ = OR ( new_n4635_, new_n4632_ ) -new_n4806_ = NAND ( new_n4805_, new_n4586_ ) -new_n4807_ = NAND ( new_n4635_, new_n4632_ ) -new_n4808_ = NAND ( new_n4807_, new_n4806_ ) -new_n4809_ = NAND ( new_n4808_, new_n4804_ ) -new_n4810_ = OR ( new_n4808_, new_n4804_ ) -new_n4811_ = NAND ( new_n4810_, new_n4809_, new_n3275_ ) -new_n4812_ = NAND ( new_n4757_, new_n4493_ ) -new_n4813_ = NOR ( new_n3262_, new_n1400_ ) -new_n4814_ = AND ( NET_23567, NET_511 ) -new_n4815_ = NOR ( new_n4814_, new_n4813_ ) -NET_7074 = NAND ( new_n4815_, new_n4812_, new_n4811_, new_n4800_ ) -new_n4817_ = OR ( new_n4779_, new_n3307_ ) -new_n4818_ = NAND ( new_n4790_, new_n3311_ ) -new_n4819_ = NAND ( new_n3321_, new_n1853_ ) -new_n4820_ = NOR ( new_n4759_, new_n3325_ ) -new_n4821_ = AND ( new_n3327_, new_n1845_ ) -new_n4822_ = AND ( new_n3329_, new_n1873_ ) -new_n4823_ = NOR ( new_n4822_, new_n4821_, new_n4820_, new_n4814_ ) -NET_7075 = NAND ( new_n4823_, new_n4819_, new_n4818_, new_n4817_ ) -new_n4825_ = NOR ( new_n4608_, new_n3489_ ) -new_n4826_ = NAND ( new_n4619_, new_n3492_ ) -new_n4827_ = OR ( new_n4588_, new_n3497_ ) -new_n4828_ = NAND ( new_n3251_, new_n1887_ ) -new_n4829_ = NAND ( new_n3255_, new_n1859_ ) -new_n4830_ = NAND ( new_n4829_, new_n4828_, new_n4827_, new_n4826_ ) -new_n4831_ = NOR ( new_n4830_, new_n4825_ ) -new_n4832_ = NOR ( new_n4831_, new_n3505_ ) -new_n4833_ = NOR ( new_n3504_, new_n1864_ ) -NET_7077 = OR ( new_n4833_, new_n4832_ ) -new_n4835_ = NOR ( new_n4831_, new_n3510_ ) -new_n4836_ = NOR ( new_n3509_, new_n1871_ ) -NET_7078 = OR ( new_n4836_, new_n4835_ ) -new_n4838_ = OR ( new_n1078_, NET_479 ) -new_n4839_ = OR ( new_n1078_, NET_234 ) -new_n4840_ = NAND ( new_n1078_, new_n1667_ ) -new_n4841_ = NAND ( new_n4840_, new_n4839_ ) -new_n4842_ = XOR ( new_n4841_, NET_11 ) -new_n4843_ = NOT ( NET_12 ) -new_n4844_ = NAND ( new_n4668_, new_n4843_ ) -new_n4845_ = NAND ( new_n4844_, new_n4671_ ) -new_n4846_ = OR ( new_n4668_, new_n4843_ ) -new_n4847_ = NAND ( new_n4846_, new_n4845_ ) -new_n4848_ = XNOR ( new_n4847_, new_n4842_ ) -new_n4849_ = OR ( new_n4848_, new_n1080_ ) -new_n4850_ = NAND ( new_n4849_, new_n4838_ ) -new_n4851_ = OR ( new_n4850_, NET_275 ) -new_n4852_ = OR ( new_n1125_, new_n1231_ ) -new_n4853_ = OR ( new_n1268_, new_n1127_ ) -NET_7127 = NAND ( new_n4853_, new_n4852_, new_n4851_ ) -new_n4855_ = OR ( new_n4402_, new_n3454_ ) -new_n4856_ = OR ( new_n4687_, new_n3574_ ) -new_n4857_ = NAND ( new_n3377_, new_n2263_ ) -new_n4858_ = NAND ( new_n3441_, new_n2289_ ) -new_n4859_ = OR ( new_n4384_, new_n3461_ ) -new_n4860_ = AND ( new_n4859_, new_n4858_, new_n4857_ ) -new_n4861_ = NAND ( new_n4860_, new_n4856_, new_n4855_ ) -new_n4862_ = NAND ( new_n4861_, new_n3470_ ) -new_n4863_ = OR ( new_n3470_, new_n2268_ ) -NET_7128 = NAND ( new_n4863_, new_n4862_ ) -new_n4865_ = NAND ( new_n4861_, new_n3474_ ) -new_n4866_ = NAND ( new_n3476_, NET_103 ) -NET_7129 = NAND ( new_n4866_, new_n4865_ ) -new_n4868_ = OR ( new_n4848_, new_n1078_ ) -new_n4869_ = NAND ( new_n1078_, new_n2071_ ) -new_n4870_ = NAND ( new_n4869_, new_n4868_ ) -new_n4871_ = OR ( new_n4870_, NET_520 ) -new_n4872_ = OR ( new_n1101_, new_n1422_ ) -new_n4873_ = OR ( new_n1424_, new_n1141_ ) -NET_7148 = NAND ( new_n4873_, new_n4872_, new_n4871_ ) -new_n4875_ = NAND ( new_n2695_, new_n1300_ ) -new_n4876_ = NOR ( NET_64, new_n2697_ ) -new_n4877_ = NOR ( new_n2699_, new_n1261_ ) -new_n4878_ = NOR ( new_n4877_, new_n4876_ ) -new_n4879_ = NAND ( new_n4878_, new_n1299_ ) -new_n4880_ = NAND ( new_n4879_, new_n4875_ ) -new_n4881_ = OR ( new_n4880_, new_n2889_ ) -new_n4882_ = NOT ( new_n2235_ ) -new_n4883_ = OR ( new_n2928_, new_n4882_ ) -new_n4884_ = OR ( new_n2903_, new_n2227_ ) -new_n4885_ = OR ( new_n2905_, new_n2229_ ) -new_n4886_ = NAND ( new_n4885_, new_n4884_, new_n4883_, new_n4881_ ) -new_n4887_ = OR ( new_n4880_, new_n2898_ ) -new_n4888_ = NAND ( new_n2908_, new_n2235_ ) -new_n4889_ = NOT ( new_n4878_ ) -new_n4890_ = NAND ( new_n4889_, new_n2912_ ) -new_n4891_ = NAND ( new_n4890_, new_n4888_, new_n4887_ ) -new_n4892_ = XOR ( new_n4891_, new_n2915_ ) -new_n4893_ = NAND ( new_n4892_, new_n4886_ ) -new_n4894_ = OR ( new_n4892_, new_n4886_ ) -new_n4895_ = NAND ( new_n4894_, new_n4893_ ) -new_n4896_ = NAND ( new_n4734_, new_n4730_ ) -new_n4897_ = NAND ( new_n4896_, new_n4731_ ) -new_n4898_ = XOR ( new_n4897_, new_n4895_ ) -new_n4899_ = NOR ( new_n4898_, new_n2951_ ) -new_n4900_ = OR ( new_n1290_, new_n2227_ ) -new_n4901_ = NAND ( new_n1290_, NET_170 ) -new_n4902_ = NAND ( new_n4901_, new_n4900_ ) -new_n4903_ = XOR ( new_n4902_, new_n4889_ ) -new_n4904_ = OR ( new_n4744_, new_n4739_ ) -new_n4905_ = NAND ( new_n4904_, new_n4717_ ) -new_n4906_ = NAND ( new_n4744_, new_n4739_ ) -new_n4907_ = NAND ( new_n4906_, new_n4905_ ) -new_n4908_ = NAND ( new_n4907_, new_n4903_ ) -new_n4909_ = OR ( new_n4907_, new_n4903_ ) -new_n4910_ = NAND ( new_n4909_, new_n4908_, new_n2960_ ) -new_n4911_ = NAND ( new_n4889_, new_n2977_ ) -new_n4912_ = NAND ( new_n1304_, new_n1301_, NET_275, NET_203 ) -new_n4913_ = OR ( NET_275, new_n2033_ ) -new_n4914_ = NAND ( new_n4913_, new_n4912_, new_n4911_, new_n4910_ ) -NET_7214 = OR ( new_n4914_, new_n4899_ ) -new_n4916_ = NAND ( new_n2704_, new_n1421_ ) -new_n4917_ = NOR ( NET_309, new_n2706_ ) -new_n4918_ = NOR ( new_n2708_, new_n1103_ ) -new_n4919_ = NOR ( new_n4918_, new_n4917_ ) -new_n4920_ = NAND ( new_n4919_, new_n1420_ ) -new_n4921_ = NAND ( new_n4920_, new_n4916_ ) -new_n4922_ = OR ( new_n4921_, new_n3110_ ) -new_n4923_ = NAND ( new_n3126_, new_n1845_ ) -new_n4924_ = OR ( new_n3136_, new_n1841_ ) -new_n4925_ = OR ( new_n3139_, new_n1836_ ) -new_n4926_ = NOT ( new_n4919_ ) -new_n4927_ = NAND ( new_n4926_, new_n1353_ ) -new_n4928_ = AND ( new_n4927_, new_n4925_, new_n4924_ ) -new_n4929_ = NAND ( new_n4928_, new_n4923_, new_n4922_ ) -new_n4930_ = NOT ( new_n1845_ ) -new_n4931_ = OR ( new_n3110_, new_n4930_ ) -new_n4932_ = OR ( new_n4921_, new_n3125_ ) -new_n4933_ = NAND ( new_n4926_, new_n3149_ ) -new_n4934_ = OR ( new_n3151_, new_n1841_ ) -new_n4935_ = OR ( new_n3153_, new_n1836_ ) -new_n4936_ = AND ( new_n4935_, new_n4934_, new_n4933_ ) -new_n4937_ = NAND ( new_n4936_, new_n4932_, new_n4931_ ) -new_n4938_ = XOR ( new_n4937_, new_n3157_ ) -new_n4939_ = NAND ( new_n4938_, new_n4929_ ) -new_n4940_ = OR ( new_n4938_, new_n4929_ ) -new_n4941_ = NAND ( new_n4940_, new_n4939_ ) -new_n4942_ = NAND ( new_n4778_, new_n4774_ ) -new_n4943_ = NAND ( new_n4942_, new_n4775_ ) -new_n4944_ = XOR ( new_n4943_, new_n4941_ ) -new_n4945_ = OR ( new_n4944_, new_n3213_ ) -new_n4946_ = OR ( new_n3210_, new_n1845_ ) -new_n4947_ = OR ( new_n4921_, new_n3216_ ) -new_n4948_ = NAND ( new_n4947_, new_n4946_ ) -new_n4949_ = OR ( new_n4921_, new_n3210_ ) -new_n4950_ = OR ( new_n4949_, new_n4948_ ) -new_n4951_ = NAND ( new_n4949_, new_n4948_ ) -new_n4952_ = NAND ( new_n4951_, new_n4950_ ) -new_n4953_ = NAND ( new_n4789_, new_n4785_ ) -new_n4954_ = NAND ( new_n4953_, new_n4786_ ) -new_n4955_ = XNOR ( new_n4954_, new_n4952_ ) -new_n4956_ = NAND ( new_n4955_, new_n3238_ ) -new_n4957_ = OR ( new_n4921_, new_n3243_ ) -new_n4958_ = NAND ( new_n3253_, new_n1859_ ) -new_n4959_ = NAND ( new_n3257_, new_n1831_ ) -new_n4960_ = NAND ( new_n3207_, NET_415 ) -new_n4961_ = NAND ( new_n4070_, new_n1839_ ) -new_n4962_ = AND ( new_n4961_, new_n4960_, new_n4959_, new_n4958_ ) -NET_7226 = NAND ( new_n4962_, new_n4957_, new_n4956_, new_n4945_ ) -new_n4964_ = OR ( new_n4944_, new_n3267_ ) -new_n4965_ = OR ( new_n1419_, new_n1836_ ) -new_n4966_ = NAND ( new_n1419_, NET_415 ) -new_n4967_ = NAND ( new_n4966_, new_n4965_ ) -new_n4968_ = XNOR ( new_n4967_, new_n4919_ ) -new_n4969_ = OR ( new_n4808_, new_n4803_ ) -new_n4970_ = NAND ( new_n4969_, new_n4757_ ) -new_n4971_ = NAND ( new_n4808_, new_n4803_ ) -new_n4972_ = NAND ( new_n4971_, new_n4970_ ) -new_n4973_ = NAND ( new_n4972_, new_n4968_ ) -new_n4974_ = OR ( new_n4972_, new_n4968_ ) -new_n4975_ = NAND ( new_n4974_, new_n4973_, new_n3275_ ) -new_n4976_ = OR ( new_n4919_, new_n3295_ ) -new_n4977_ = NOT ( NET_448 ) -new_n4978_ = NOR ( new_n3262_, new_n4977_ ) -new_n4979_ = NOR ( NET_520, new_n1630_ ) -new_n4980_ = NOR ( new_n4979_, new_n4978_ ) -NET_7227 = NAND ( new_n4980_, new_n4976_, new_n4975_, new_n4964_ ) -new_n4982_ = OR ( new_n4944_, new_n3307_ ) -new_n4983_ = NAND ( new_n4955_, new_n3311_ ) -new_n4984_ = NAND ( new_n3321_, new_n1839_ ) -new_n4985_ = NOR ( new_n4921_, new_n3325_ ) -new_n4986_ = AND ( new_n3327_, new_n1831_ ) -new_n4987_ = AND ( new_n3329_, new_n1859_ ) -new_n4988_ = NOR ( new_n4987_, new_n4986_, new_n4985_, new_n4979_ ) -NET_7228 = NAND ( new_n4988_, new_n4984_, new_n4983_, new_n4982_ ) -new_n4990_ = NOR ( new_n4779_, new_n3489_ ) -new_n4991_ = NAND ( new_n4790_, new_n3492_ ) -new_n4992_ = OR ( new_n4759_, new_n3497_ ) -new_n4993_ = NAND ( new_n3255_, new_n1845_ ) -new_n4994_ = NAND ( new_n3251_, new_n1873_ ) -new_n4995_ = NAND ( new_n4994_, new_n4993_, new_n4992_, new_n4991_ ) -new_n4996_ = NOR ( new_n4995_, new_n4990_ ) -new_n4997_ = NOR ( new_n4996_, new_n3505_ ) -new_n4998_ = NOR ( new_n3504_, new_n1850_ ) -NET_7230 = OR ( new_n4998_, new_n4997_ ) -new_n5000_ = NOR ( new_n4996_, new_n3510_ ) -new_n5001_ = NOR ( new_n3509_, new_n1857_ ) -NET_7231 = OR ( new_n5001_, new_n5000_ ) -new_n5003_ = OR ( new_n1078_, NET_480 ) -new_n5004_ = OR ( new_n1078_, NET_235 ) -new_n5005_ = NAND ( new_n1078_, new_n1619_ ) -new_n5006_ = NAND ( new_n5005_, new_n5004_ ) -new_n5007_ = XOR ( new_n5006_, NET_10 ) -new_n5008_ = NOT ( NET_11 ) -new_n5009_ = NAND ( new_n4841_, new_n5008_ ) -new_n5010_ = NAND ( new_n5009_, new_n4847_ ) -new_n5011_ = OR ( new_n4841_, new_n5008_ ) -new_n5012_ = NAND ( new_n5011_, new_n5010_ ) -new_n5013_ = XNOR ( new_n5012_, new_n5007_ ) -new_n5014_ = OR ( new_n5013_, new_n1080_ ) -new_n5015_ = NAND ( new_n5014_, new_n5003_ ) -new_n5016_ = OR ( new_n5015_, NET_275 ) -new_n5017_ = OR ( new_n1125_, new_n1232_ ) -new_n5018_ = OR ( new_n1274_, new_n1127_ ) -NET_7280 = NAND ( new_n5018_, new_n5017_, new_n5016_ ) -new_n5020_ = NOR ( new_n3019_, new_n4556_ ) -new_n5021_ = OR ( new_n4550_, new_n3017_ ) -new_n5022_ = XNOR ( new_n5021_, new_n5020_ ) -new_n5023_ = OR ( new_n4686_, new_n4681_ ) -new_n5024_ = NAND ( new_n5023_, new_n4680_ ) -new_n5025_ = NAND ( new_n4686_, new_n4681_ ) -new_n5026_ = NAND ( new_n5025_, new_n5024_ ) -new_n5027_ = XOR ( new_n5026_, new_n5022_ ) -new_n5028_ = OR ( new_n5027_, new_n3035_ ) -new_n5029_ = OR ( new_n4566_, new_n3005_ ) -new_n5030_ = NAND ( new_n3051_, new_n2259_ ) -new_n5031_ = NOT ( new_n4550_ ) -new_n5032_ = NAND ( new_n5031_, new_n3060_ ) -new_n5033_ = NAND ( new_n3062_, new_n2249_ ) -new_n5034_ = NAND ( new_n3064_, new_n2276_ ) -new_n5035_ = AND ( new_n5034_, new_n5033_, new_n5032_, new_n4579_ ) -NET_7281 = NAND ( new_n5035_, new_n5030_, new_n5029_, new_n5028_ ) -new_n5037_ = OR ( new_n5013_, new_n1078_ ) -new_n5038_ = NAND ( new_n1078_, new_n2022_ ) -new_n5039_ = NAND ( new_n5038_, new_n5037_ ) -new_n5040_ = OR ( new_n5039_, NET_520 ) -new_n5041_ = OR ( new_n1101_, new_n1427_ ) -new_n5042_ = OR ( new_n1431_, new_n1141_ ) -NET_7294 = NAND ( new_n5042_, new_n5041_, new_n5040_ ) -new_n5044_ = NOR ( new_n5027_, new_n3373_ ) -new_n5045_ = NOR ( new_n4566_, new_n3364_ ) -new_n5046_ = NAND ( new_n3379_, new_n2249_ ) -new_n5047_ = NOR ( new_n3370_, new_n2256_ ) -new_n5048_ = NOR ( new_n3059_, new_n2260_ ) -new_n5049_ = NOR ( new_n5048_, new_n5047_ ) -new_n5050_ = NAND ( new_n3712_, new_n2276_ ) -new_n5051_ = OR ( new_n4550_, new_n4374_ ) -new_n5052_ = NAND ( new_n5051_, new_n5050_, new_n5049_, new_n5046_ ) -NET_7360 = OR ( new_n5052_, new_n5045_, new_n5044_ ) -new_n5054_ = NOR ( new_n4944_, new_n3489_ ) -new_n5055_ = NAND ( new_n4955_, new_n3492_ ) -new_n5056_ = OR ( new_n4921_, new_n3497_ ) -new_n5057_ = NAND ( new_n3255_, new_n1831_ ) -new_n5058_ = NAND ( new_n3251_, new_n1859_ ) -new_n5059_ = NAND ( new_n5058_, new_n5057_, new_n5056_, new_n5055_ ) -new_n5060_ = NOR ( new_n5059_, new_n5054_ ) -new_n5061_ = NOR ( new_n5060_, new_n3505_ ) -new_n5062_ = NOR ( new_n3504_, new_n1836_ ) -NET_7378 = OR ( new_n5062_, new_n5061_ ) -new_n5064_ = NOR ( new_n5060_, new_n3510_ ) -new_n5065_ = NOR ( new_n3509_, new_n1843_ ) -NET_7379 = OR ( new_n5065_, new_n5064_ ) -new_n5067_ = OR ( new_n1078_, NET_481 ) -new_n5068_ = OR ( new_n1078_, NET_236 ) -new_n5069_ = NAND ( new_n1078_, new_n2417_ ) -new_n5070_ = NAND ( new_n5069_, new_n5068_ ) -new_n5071_ = XOR ( new_n5070_, NET_9 ) -new_n5072_ = NOT ( NET_10 ) -new_n5073_ = NAND ( new_n5006_, new_n5072_ ) -new_n5074_ = NAND ( new_n5073_, new_n5012_ ) -new_n5075_ = OR ( new_n5006_, new_n5072_ ) -new_n5076_ = NAND ( new_n5075_, new_n5074_ ) -new_n5077_ = XNOR ( new_n5076_, new_n5071_ ) -new_n5078_ = OR ( new_n5077_, new_n1080_ ) -new_n5079_ = NAND ( new_n5078_, new_n5067_ ) -new_n5080_ = OR ( new_n5079_, NET_275 ) -new_n5081_ = OR ( new_n1125_, new_n1254_ ) -new_n5082_ = OR ( new_n1282_, new_n1127_ ) -NET_7426 = NAND ( new_n5082_, new_n5081_, new_n5080_ ) -new_n5084_ = NAND ( new_n4897_, new_n4894_ ) -new_n5085_ = NOT ( new_n2915_ ) -new_n5086_ = NOT ( new_n2898_ ) -new_n5087_ = NAND ( new_n2739_, new_n1300_ ) -new_n5088_ = OR ( NET_64, new_n2741_ ) -new_n5089_ = OR ( new_n2746_, new_n1261_ ) -new_n5090_ = NAND ( new_n5089_, new_n5088_ ) -new_n5091_ = OR ( new_n5090_, new_n1300_ ) -new_n5092_ = AND ( new_n5091_, new_n5087_ ) -new_n5093_ = NAND ( new_n5092_, new_n5086_ ) -new_n5094_ = NAND ( new_n2908_, new_n2222_ ) -new_n5095_ = NAND ( new_n5090_, new_n2912_ ) -new_n5096_ = NAND ( new_n5095_, new_n5094_, new_n5093_ ) -new_n5097_ = NAND ( new_n5096_, new_n5085_ ) -new_n5098_ = OR ( new_n5096_, new_n5085_ ) -new_n5099_ = AND ( new_n5098_, new_n5097_ ) -new_n5100_ = NAND ( new_n5092_, new_n2908_ ) -new_n5101_ = NOT ( new_n2222_ ) -new_n5102_ = OR ( new_n2928_, new_n5101_ ) -new_n5103_ = OR ( new_n2903_, new_n2214_ ) -new_n5104_ = OR ( new_n2905_, new_n2216_ ) -new_n5105_ = AND ( new_n5104_, new_n5103_, new_n5102_, new_n5100_ ) -new_n5106_ = OR ( new_n5105_, new_n5099_ ) -new_n5107_ = NAND ( new_n5105_, new_n5098_, new_n5097_ ) -new_n5108_ = NAND ( new_n5107_, new_n5106_ ) -new_n5109_ = NAND ( new_n5108_, new_n5084_, new_n4893_ ) -new_n5110_ = NAND ( new_n5084_, new_n4893_ ) -new_n5111_ = NAND ( new_n5110_, new_n5107_, new_n5106_ ) -new_n5112_ = NAND ( new_n5111_, new_n5109_ ) -new_n5113_ = OR ( new_n5112_, new_n2951_ ) -new_n5114_ = OR ( new_n1290_, new_n2214_ ) -new_n5115_ = NAND ( new_n1290_, NET_171 ) -new_n5116_ = NAND ( new_n5115_, new_n5114_ ) -new_n5117_ = NAND ( new_n5116_, new_n5090_ ) -new_n5118_ = NAND ( new_n4907_, new_n4889_ ) -new_n5119_ = NAND ( new_n5118_, new_n4901_, new_n4900_ ) -new_n5120_ = OR ( new_n4907_, new_n4889_ ) -new_n5121_ = OR ( new_n5116_, new_n5090_ ) -new_n5122_ = NAND ( new_n5121_, new_n5120_, new_n5119_, new_n5117_ ) -new_n5123_ = NAND ( new_n5120_, new_n4902_ ) -new_n5124_ = XNOR ( new_n5116_, new_n5090_ ) -new_n5125_ = NAND ( new_n5124_, new_n5123_, new_n5118_ ) -new_n5126_ = NAND ( new_n5125_, new_n5122_, new_n2960_ ) -new_n5127_ = NAND ( new_n5090_, new_n2977_ ) -new_n5128_ = OR ( new_n2949_, new_n2430_ ) -new_n5129_ = OR ( NET_275, new_n2032_ ) -new_n5130_ = AND ( new_n5129_, new_n5128_, new_n5127_ ) -NET_7427 = NAND ( new_n5130_, new_n5126_, new_n5113_ ) -new_n5132_ = OR ( new_n5027_, new_n3574_ ) -new_n5133_ = OR ( new_n4566_, new_n3454_ ) -new_n5134_ = OR ( new_n4550_, new_n3461_ ) -new_n5135_ = NOR ( new_n3442_, new_n4390_ ) -new_n5136_ = NOR ( new_n3378_, new_n4725_ ) -new_n5137_ = NOR ( new_n5136_, new_n5135_ ) -new_n5138_ = NAND ( new_n5137_, new_n5134_, new_n5133_, new_n5132_ ) -new_n5139_ = NAND ( new_n5138_, new_n3470_ ) -new_n5140_ = OR ( new_n3470_, new_n2254_ ) -NET_7428 = NAND ( new_n5140_, new_n5139_ ) -new_n5142_ = NAND ( new_n5138_, new_n3474_ ) -new_n5143_ = NAND ( new_n3476_, NET_104 ) -NET_7429 = NAND ( new_n5143_, new_n5142_ ) -new_n5145_ = OR ( new_n5077_, new_n1078_ ) -new_n5146_ = NAND ( new_n1078_, new_n2390_ ) -new_n5147_ = NAND ( new_n5146_, new_n5145_ ) -new_n5148_ = OR ( new_n5147_, NET_520 ) -new_n5149_ = OR ( new_n1101_, new_n1306_ ) -new_n5150_ = OR ( new_n1327_, new_n1141_ ) -NET_7442 = NAND ( new_n5150_, new_n5149_, new_n5148_ ) -new_n5152_ = NAND ( new_n4943_, new_n4940_ ) -new_n5153_ = NAND ( new_n2751_, new_n1421_ ) -new_n5154_ = OR ( NET_309, new_n2753_ ) -new_n5155_ = OR ( new_n2757_, new_n1103_ ) -new_n5156_ = NAND ( new_n5155_, new_n5154_ ) -new_n5157_ = OR ( new_n5156_, new_n1421_ ) -new_n5158_ = NAND ( new_n5157_, new_n5153_ ) -new_n5159_ = OR ( new_n5158_, new_n3125_ ) -new_n5160_ = NAND ( new_n3146_, new_n1831_ ) -new_n5161_ = NAND ( new_n5156_, new_n3149_ ) -new_n5162_ = OR ( new_n3151_, new_n1827_ ) -new_n5163_ = OR ( new_n3153_, new_n1822_ ) -new_n5164_ = AND ( new_n5163_, new_n5162_, new_n5161_ ) -new_n5165_ = NAND ( new_n5164_, new_n5160_, new_n5159_ ) -new_n5166_ = NAND ( new_n5165_, new_n3158_ ) -new_n5167_ = OR ( new_n5165_, new_n3158_ ) -new_n5168_ = AND ( new_n5167_, new_n5166_ ) -new_n5169_ = NOR ( new_n5158_, new_n3110_ ) -new_n5170_ = NAND ( new_n3126_, new_n1831_ ) -new_n5171_ = OR ( new_n3136_, new_n1827_ ) -new_n5172_ = OR ( new_n3139_, new_n1822_ ) -new_n5173_ = NAND ( new_n5156_, new_n1353_ ) -new_n5174_ = NAND ( new_n5173_, new_n5172_, new_n5171_, new_n5170_ ) -new_n5175_ = NOR ( new_n5174_, new_n5169_ ) -new_n5176_ = OR ( new_n5175_, new_n5168_ ) -new_n5177_ = NAND ( new_n5175_, new_n5167_, new_n5166_ ) -new_n5178_ = NAND ( new_n5177_, new_n5176_ ) -new_n5179_ = NAND ( new_n5178_, new_n5152_, new_n4939_ ) -new_n5180_ = NAND ( new_n5152_, new_n4939_ ) -new_n5181_ = NAND ( new_n5180_, new_n5177_, new_n5176_ ) -new_n5182_ = NAND ( new_n5181_, new_n5179_ ) -new_n5183_ = OR ( new_n5182_, new_n3213_ ) -new_n5184_ = NAND ( new_n4954_, new_n4951_ ) -new_n5185_ = NAND ( new_n5157_, new_n5153_, new_n3216_, new_n1831_ ) -new_n5186_ = OR ( new_n5158_, new_n3210_ ) -new_n5187_ = NAND ( new_n3216_, new_n1831_ ) -new_n5188_ = NAND ( new_n5158_, new_n3210_ ) -new_n5189_ = OR ( new_n3210_, new_n1831_ ) -new_n5190_ = NAND ( new_n5189_, new_n5188_ ) -new_n5191_ = NAND ( new_n5190_, new_n3210_ ) -new_n5192_ = NAND ( new_n5191_, new_n5187_, new_n5186_ ) -new_n5193_ = NAND ( new_n5192_, new_n5185_ ) -new_n5194_ = NAND ( new_n5193_, new_n5184_, new_n4950_ ) -new_n5195_ = NAND ( new_n5184_, new_n4950_ ) -new_n5196_ = NAND ( new_n5195_, new_n5192_, new_n5185_ ) -new_n5197_ = NAND ( new_n5196_, new_n5194_ ) -new_n5198_ = OR ( new_n5197_, new_n3480_ ) -new_n5199_ = OR ( new_n5158_, new_n3243_ ) -new_n5200_ = NAND ( new_n3253_, new_n1845_ ) -new_n5201_ = NAND ( new_n3257_, new_n1817_ ) -new_n5202_ = NAND ( new_n3207_, NET_416 ) -new_n5203_ = NAND ( new_n4070_, new_n1825_ ) -new_n5204_ = AND ( new_n5203_, new_n5202_, new_n5201_, new_n5200_ ) -NET_7443 = NAND ( new_n5204_, new_n5199_, new_n5198_, new_n5183_ ) -new_n5206_ = OR ( new_n5182_, new_n3267_ ) -new_n5207_ = OR ( new_n1419_, new_n1822_ ) -new_n5208_ = NAND ( new_n1419_, NET_416 ) -new_n5209_ = NAND ( new_n5208_, new_n5207_ ) -new_n5210_ = NAND ( new_n5209_, new_n5156_ ) -new_n5211_ = NAND ( new_n4972_, new_n4926_ ) -new_n5212_ = NAND ( new_n5211_, new_n4966_, new_n4965_ ) -new_n5213_ = OR ( new_n4972_, new_n4926_ ) -new_n5214_ = OR ( new_n5209_, new_n5156_ ) -new_n5215_ = NAND ( new_n5214_, new_n5213_, new_n5212_, new_n5210_ ) -new_n5216_ = NAND ( new_n5213_, new_n4967_ ) -new_n5217_ = XNOR ( new_n5209_, new_n5156_ ) -new_n5218_ = NAND ( new_n5217_, new_n5216_, new_n5211_ ) -new_n5219_ = NAND ( new_n5218_, new_n5215_, new_n3275_ ) -new_n5220_ = NAND ( new_n5156_, new_n4493_ ) -new_n5221_ = NOR ( new_n3262_, new_n2431_ ) -new_n5222_ = NOR ( NET_520, new_n1629_ ) -new_n5223_ = NOR ( new_n5222_, new_n5221_ ) -NET_7444 = NAND ( new_n5223_, new_n5220_, new_n5219_, new_n5206_ ) -new_n5225_ = OR ( new_n5182_, new_n3307_ ) -new_n5226_ = OR ( new_n5197_, new_n3310_ ) -new_n5227_ = OR ( new_n5158_, new_n3325_ ) -new_n5228_ = NOT ( new_n5222_ ) -new_n5229_ = NAND ( new_n3321_, new_n1825_ ) -new_n5230_ = NAND ( new_n3327_, new_n1817_ ) -new_n5231_ = NAND ( new_n3329_, new_n1845_ ) -new_n5232_ = AND ( new_n5231_, new_n5230_, new_n5229_, new_n5228_ ) -NET_7445 = NAND ( new_n5232_, new_n5227_, new_n5226_, new_n5225_ ) -new_n5234_ = OR ( new_n1078_, NET_482 ) -new_n5235_ = OR ( new_n1078_, NET_237 ) -new_n5236_ = NAND ( new_n1078_, new_n2401_ ) -new_n5237_ = NAND ( new_n5236_, new_n5235_ ) -new_n5238_ = XOR ( new_n5237_, NET_8 ) -new_n5239_ = NOT ( NET_9 ) -new_n5240_ = NAND ( new_n5070_, new_n5239_ ) -new_n5241_ = NAND ( new_n5240_, new_n5076_ ) -new_n5242_ = OR ( new_n5070_, new_n5239_ ) -new_n5243_ = NAND ( new_n5242_, new_n5241_ ) -new_n5244_ = XNOR ( new_n5243_, new_n5238_ ) -new_n5245_ = OR ( new_n5244_, new_n1080_ ) -new_n5246_ = NAND ( new_n5245_, new_n5234_ ) -new_n5247_ = OR ( new_n5246_, NET_275 ) -new_n5248_ = NAND ( new_n1261_, NET_57, NET_275 ) -new_n5249_ = OR ( new_n1257_, new_n1127_ ) -NET_7563 = NAND ( new_n5249_, new_n5248_, new_n5247_ ) -new_n5251_ = NAND ( new_n2785_, new_n1300_ ) -new_n5252_ = NOR ( NET_64, new_n2787_ ) -new_n5253_ = NOR ( new_n2789_, new_n1261_ ) -new_n5254_ = OR ( new_n5253_, new_n5252_ ) -new_n5255_ = OR ( new_n5254_, new_n1300_ ) -new_n5256_ = AND ( new_n5255_, new_n5251_ ) -new_n5257_ = NAND ( new_n5256_, new_n5086_ ) -new_n5258_ = NAND ( new_n2908_, new_n2209_ ) -new_n5259_ = NAND ( new_n5254_, new_n2912_ ) -new_n5260_ = NAND ( new_n5259_, new_n5258_, new_n5257_ ) -new_n5261_ = XOR ( new_n5260_, new_n2915_ ) -new_n5262_ = NAND ( new_n5256_, new_n2908_ ) -new_n5263_ = NOT ( new_n2209_ ) -new_n5264_ = OR ( new_n2928_, new_n5263_ ) -new_n5265_ = OR ( new_n2903_, new_n2201_ ) -new_n5266_ = OR ( new_n2905_, new_n2203_ ) -new_n5267_ = NAND ( new_n5266_, new_n5265_, new_n5264_, new_n5262_ ) -new_n5268_ = OR ( new_n5267_, new_n5261_ ) -new_n5269_ = NAND ( new_n5267_, new_n5261_ ) -new_n5270_ = NAND ( new_n5269_, new_n5268_ ) -new_n5271_ = NAND ( new_n5110_, new_n5107_ ) -new_n5272_ = NAND ( new_n5271_, new_n5106_ ) -new_n5273_ = XOR ( new_n5272_, new_n5270_ ) -new_n5274_ = NOR ( new_n5273_, new_n2951_ ) -new_n5275_ = OR ( new_n1290_, new_n2201_ ) -new_n5276_ = NAND ( new_n1290_, NET_172 ) -new_n5277_ = NAND ( new_n5276_, new_n5275_ ) -new_n5278_ = XOR ( new_n5277_, new_n5254_ ) -new_n5279_ = NAND ( new_n5121_, new_n5120_, new_n5119_ ) -new_n5280_ = NAND ( new_n5279_, new_n5117_ ) -new_n5281_ = NAND ( new_n5280_, new_n5278_ ) -new_n5282_ = OR ( new_n5280_, new_n5278_ ) -new_n5283_ = NAND ( new_n5282_, new_n5281_, new_n2960_ ) -new_n5284_ = NAND ( new_n5254_, new_n2977_ ) -new_n5285_ = OR ( new_n2949_, new_n2580_ ) -new_n5286_ = NAND ( NET_23564, NET_251 ) -new_n5287_ = NAND ( new_n5286_, new_n5285_, new_n5284_, new_n5283_ ) -NET_7564 = OR ( new_n5287_, new_n5274_ ) -new_n5289_ = NOR ( new_n3019_, new_n4725_ ) -new_n5290_ = OR ( new_n4719_, new_n3017_ ) -new_n5291_ = XNOR ( new_n5290_, new_n5289_ ) -new_n5292_ = OR ( new_n5026_, new_n5021_ ) -new_n5293_ = NAND ( new_n5292_, new_n5020_ ) -new_n5294_ = NAND ( new_n5026_, new_n5021_ ) -new_n5295_ = NAND ( new_n5294_, new_n5293_ ) -new_n5296_ = XOR ( new_n5295_, new_n5291_ ) -new_n5297_ = OR ( new_n5296_, new_n3035_ ) -new_n5298_ = OR ( new_n4735_, new_n3005_ ) -new_n5299_ = NAND ( new_n3051_, new_n2245_ ) -new_n5300_ = NOT ( new_n4719_ ) -new_n5301_ = NAND ( new_n5300_, new_n3060_ ) -new_n5302_ = NAND ( new_n3062_, new_n2235_ ) -new_n5303_ = NAND ( new_n3064_, new_n2263_ ) -new_n5304_ = AND ( new_n5303_, new_n5302_, new_n5301_, new_n4750_ ) -NET_7565 = NAND ( new_n5304_, new_n5299_, new_n5298_, new_n5297_ ) -new_n5306_ = OR ( new_n5244_, new_n1078_ ) -new_n5307_ = NAND ( new_n1078_, new_n2376_ ) -new_n5308_ = NAND ( new_n5307_, new_n5306_ ) -new_n5309_ = OR ( new_n5308_, NET_520 ) -new_n5310_ = OR ( new_n1101_, new_n1333_ ) -new_n5311_ = OR ( new_n1344_, new_n1141_ ) -NET_7581 = NAND ( new_n5311_, new_n5310_, new_n5309_ ) -new_n5313_ = NAND ( new_n2794_, new_n1421_ ) -new_n5314_ = NOR ( NET_309, new_n1312_ ) -new_n5315_ = NOR ( new_n2797_, new_n1103_ ) -new_n5316_ = NOR ( new_n5315_, new_n5314_ ) -new_n5317_ = NAND ( new_n5316_, new_n1420_ ) -new_n5318_ = NAND ( new_n5317_, new_n5313_ ) -new_n5319_ = OR ( new_n5318_, new_n3125_ ) -new_n5320_ = NOT ( new_n1817_ ) -new_n5321_ = OR ( new_n3110_, new_n5320_ ) -new_n5322_ = NOT ( new_n5316_ ) -new_n5323_ = NAND ( new_n5322_, new_n3149_ ) -new_n5324_ = OR ( new_n3151_, new_n1813_ ) -new_n5325_ = OR ( new_n3153_, new_n1808_ ) -new_n5326_ = AND ( new_n5325_, new_n5324_, new_n5323_ ) -new_n5327_ = NAND ( new_n5326_, new_n5321_, new_n5319_ ) -new_n5328_ = XOR ( new_n5327_, new_n3157_ ) -new_n5329_ = OR ( new_n5318_, new_n3110_ ) -new_n5330_ = NAND ( new_n3126_, new_n1817_ ) -new_n5331_ = OR ( new_n3136_, new_n1813_ ) -new_n5332_ = OR ( new_n3139_, new_n1808_ ) -new_n5333_ = NAND ( new_n5322_, new_n1353_ ) -new_n5334_ = AND ( new_n5333_, new_n5332_, new_n5331_ ) -new_n5335_ = NAND ( new_n5334_, new_n5330_, new_n5329_ ) -new_n5336_ = OR ( new_n5335_, new_n5328_ ) -new_n5337_ = NAND ( new_n5335_, new_n5328_ ) -new_n5338_ = NAND ( new_n5337_, new_n5336_ ) -new_n5339_ = NAND ( new_n5180_, new_n5177_ ) -new_n5340_ = NAND ( new_n5339_, new_n5176_ ) -new_n5341_ = XOR ( new_n5340_, new_n5338_ ) -new_n5342_ = OR ( new_n5341_, new_n3213_ ) -new_n5343_ = OR ( new_n3210_, new_n1817_ ) -new_n5344_ = OR ( new_n5318_, new_n3216_ ) -new_n5345_ = NAND ( new_n5344_, new_n5343_ ) -new_n5346_ = OR ( new_n5318_, new_n3210_ ) -new_n5347_ = NAND ( new_n5346_, new_n5345_ ) -new_n5348_ = OR ( new_n5346_, new_n5345_ ) -new_n5349_ = NAND ( new_n5348_, new_n5347_ ) -new_n5350_ = NAND ( new_n5195_, new_n5192_ ) -new_n5351_ = NAND ( new_n5350_, new_n5185_ ) -new_n5352_ = XNOR ( new_n5351_, new_n5349_ ) -new_n5353_ = NAND ( new_n5352_, new_n3238_ ) -new_n5354_ = OR ( new_n5318_, new_n3243_ ) -new_n5355_ = NAND ( new_n3253_, new_n1831_ ) -new_n5356_ = NAND ( new_n3257_, new_n1803_ ) -new_n5357_ = NAND ( new_n3207_, NET_417 ) -new_n5358_ = NAND ( new_n4070_, new_n1811_ ) -new_n5359_ = AND ( new_n5358_, new_n5357_, new_n5356_, new_n5355_ ) -NET_7582 = NAND ( new_n5359_, new_n5354_, new_n5353_, new_n5342_ ) -new_n5361_ = OR ( new_n5341_, new_n3267_ ) -new_n5362_ = OR ( new_n1419_, new_n1808_ ) -new_n5363_ = NAND ( new_n1419_, NET_417 ) -new_n5364_ = NAND ( new_n5363_, new_n5362_ ) -new_n5365_ = XOR ( new_n5364_, new_n5322_ ) -new_n5366_ = NAND ( new_n5214_, new_n5213_, new_n5212_ ) -new_n5367_ = NAND ( new_n5366_, new_n5210_ ) -new_n5368_ = NAND ( new_n5367_, new_n5365_ ) -new_n5369_ = OR ( new_n5367_, new_n5365_ ) -new_n5370_ = NAND ( new_n5369_, new_n5368_, new_n3275_ ) -new_n5371_ = OR ( new_n5316_, new_n3295_ ) -new_n5372_ = NOR ( new_n3262_, new_n2578_ ) -new_n5373_ = NOT ( NET_496 ) -new_n5374_ = NOR ( NET_520, new_n5373_ ) -new_n5375_ = NOR ( new_n5374_, new_n5372_ ) -NET_7583 = NAND ( new_n5375_, new_n5371_, new_n5370_, new_n5361_ ) -new_n5377_ = OR ( new_n5341_, new_n3307_ ) -new_n5378_ = NAND ( new_n5352_, new_n3311_ ) -new_n5379_ = OR ( new_n5318_, new_n3325_ ) -new_n5380_ = NOT ( new_n5374_ ) -new_n5381_ = NAND ( new_n3321_, new_n1811_ ) -new_n5382_ = NAND ( new_n3327_, new_n1803_ ) -new_n5383_ = NAND ( new_n3329_, new_n1831_ ) -new_n5384_ = AND ( new_n5383_, new_n5382_, new_n5381_, new_n5380_ ) -NET_7584 = NAND ( new_n5384_, new_n5379_, new_n5378_, new_n5377_ ) -new_n5386_ = OR ( new_n5182_, new_n3489_ ) -new_n5387_ = OR ( new_n5197_, new_n3491_ ) -new_n5388_ = OR ( new_n5158_, new_n3497_ ) -new_n5389_ = NOR ( new_n3256_, new_n5320_ ) -new_n5390_ = NOR ( new_n3252_, new_n4930_ ) -new_n5391_ = NOR ( new_n5390_, new_n5389_ ) -new_n5392_ = NAND ( new_n5391_, new_n5388_, new_n5387_, new_n5386_ ) -new_n5393_ = NAND ( new_n5392_, new_n3504_ ) -new_n5394_ = OR ( new_n3504_, new_n1822_ ) -NET_7585 = NAND ( new_n5394_, new_n5393_ ) -new_n5396_ = NAND ( new_n5392_, new_n3509_ ) -new_n5397_ = OR ( new_n3509_, new_n1829_ ) -NET_7586 = NAND ( new_n5397_, new_n5396_ ) -new_n5399_ = NOR ( new_n5296_, new_n3373_ ) -new_n5400_ = NOR ( new_n4735_, new_n3364_ ) -new_n5401_ = NAND ( new_n3379_, new_n2235_ ) -new_n5402_ = NOR ( new_n3370_, new_n2242_ ) -new_n5403_ = NOR ( new_n3059_, new_n2246_ ) -new_n5404_ = NOR ( new_n5403_, new_n5402_ ) -new_n5405_ = NAND ( new_n3712_, new_n2263_ ) -new_n5406_ = OR ( new_n4719_, new_n4374_ ) -new_n5407_ = NAND ( new_n5406_, new_n5405_, new_n5404_, new_n5401_ ) -NET_7641 = OR ( new_n5407_, new_n5400_, new_n5399_ ) -new_n5409_ = OR ( new_n1078_, NET_483 ) -new_n5410_ = OR ( new_n1078_, NET_238 ) -new_n5411_ = NAND ( new_n1078_, new_n2516_ ) -new_n5412_ = NAND ( new_n5411_, new_n5410_ ) -new_n5413_ = XOR ( new_n5412_, NET_7 ) -new_n5414_ = NOT ( NET_8 ) -new_n5415_ = NAND ( new_n5237_, new_n5414_ ) -new_n5416_ = NAND ( new_n5415_, new_n5243_ ) -new_n5417_ = OR ( new_n5237_, new_n5414_ ) -new_n5418_ = NAND ( new_n5417_, new_n5416_ ) -new_n5419_ = XNOR ( new_n5418_, new_n5413_ ) -new_n5420_ = OR ( new_n5419_, new_n1080_ ) -new_n5421_ = NAND ( new_n5420_, new_n5409_ ) -new_n5422_ = OR ( new_n5421_, NET_275 ) -new_n5423_ = NAND ( new_n1261_, NET_58, NET_275 ) -new_n5424_ = NAND ( new_n1263_, NET_64, NET_275 ) -NET_7712 = NAND ( new_n5424_, new_n5423_, new_n5422_ ) -new_n5426_ = NAND ( new_n2820_, new_n1300_ ) -new_n5427_ = OR ( NET_64, new_n2822_ ) -new_n5428_ = OR ( new_n2827_, new_n1261_ ) -new_n5429_ = NAND ( new_n5428_, new_n5427_ ) -new_n5430_ = OR ( new_n5429_, new_n1300_ ) -new_n5431_ = NAND ( new_n5430_, new_n5426_ ) -new_n5432_ = OR ( new_n5431_, new_n2898_ ) -new_n5433_ = NAND ( new_n2908_, new_n2196_ ) -new_n5434_ = NAND ( new_n5429_, new_n2912_ ) -new_n5435_ = NAND ( new_n5434_, new_n5433_, new_n5432_ ) -new_n5436_ = XOR ( new_n5435_, new_n2915_ ) -new_n5437_ = OR ( new_n5431_, new_n2889_ ) -new_n5438_ = NOT ( new_n2196_ ) -new_n5439_ = OR ( new_n2928_, new_n5438_ ) -new_n5440_ = OR ( new_n2903_, new_n2188_ ) -new_n5441_ = OR ( new_n2905_, new_n2190_ ) -new_n5442_ = NAND ( new_n5441_, new_n5440_, new_n5439_, new_n5437_ ) -new_n5443_ = OR ( new_n5442_, new_n5436_ ) -new_n5444_ = NAND ( new_n5442_, new_n5436_ ) -new_n5445_ = NAND ( new_n5444_, new_n5443_ ) -new_n5446_ = NAND ( new_n5272_, new_n5268_ ) -new_n5447_ = NAND ( new_n5446_, new_n5269_ ) -new_n5448_ = XOR ( new_n5447_, new_n5445_ ) -new_n5449_ = NOR ( new_n5448_, new_n2951_ ) -new_n5450_ = OR ( new_n1290_, new_n2188_ ) -new_n5451_ = NAND ( new_n1290_, NET_173 ) -new_n5452_ = NAND ( new_n5451_, new_n5450_ ) -new_n5453_ = XOR ( new_n5452_, new_n5429_ ) -new_n5454_ = OR ( new_n5280_, new_n5254_ ) -new_n5455_ = NAND ( new_n5454_, new_n5277_ ) -new_n5456_ = NAND ( new_n5280_, new_n5254_ ) -new_n5457_ = NAND ( new_n5456_, new_n5455_ ) -new_n5458_ = NAND ( new_n5457_, new_n5453_ ) -new_n5459_ = OR ( new_n5457_, new_n5453_ ) -new_n5460_ = NAND ( new_n5459_, new_n5458_, new_n2960_ ) -new_n5461_ = NAND ( new_n5429_, new_n2977_ ) -new_n5462_ = OR ( new_n2949_, new_n2638_ ) -new_n5463_ = OR ( NET_275, new_n2031_ ) -new_n5464_ = NAND ( new_n5463_, new_n5462_, new_n5461_, new_n5460_ ) -NET_7713 = OR ( new_n5464_, new_n5449_ ) -new_n5466_ = OR ( new_n5296_, new_n3574_ ) -new_n5467_ = OR ( new_n4735_, new_n3454_ ) -new_n5468_ = OR ( new_n4719_, new_n3461_ ) -new_n5469_ = NOR ( new_n3442_, new_n4556_ ) -new_n5470_ = NOR ( new_n3378_, new_n4882_ ) -new_n5471_ = NOR ( new_n5470_, new_n5469_ ) -new_n5472_ = NAND ( new_n5471_, new_n5468_, new_n5467_, new_n5466_ ) -new_n5473_ = NAND ( new_n5472_, new_n3470_ ) -new_n5474_ = OR ( new_n3470_, new_n2240_ ) -NET_7714 = NAND ( new_n5474_, new_n5473_ ) -new_n5476_ = NAND ( new_n5472_, new_n3474_ ) -new_n5477_ = NAND ( new_n3476_, NET_105 ) -NET_7715 = NAND ( new_n5477_, new_n5476_ ) -new_n5479_ = OR ( new_n5419_, new_n1078_ ) -new_n5480_ = NAND ( new_n1078_, new_n2477_ ) -new_n5481_ = NAND ( new_n5480_, new_n5479_ ) -new_n5482_ = OR ( new_n5481_, NET_520 ) -new_n5483_ = OR ( new_n1101_, new_n1348_ ) -new_n5484_ = OR ( new_n1349_, new_n1141_ ) -NET_7729 = NAND ( new_n5484_, new_n5483_, new_n5482_ ) -new_n5486_ = NAND ( new_n2832_, new_n1421_ ) -new_n5487_ = OR ( NET_309, new_n1313_ ) -new_n5488_ = OR ( new_n2837_, new_n1103_ ) -new_n5489_ = NAND ( new_n5488_, new_n5487_ ) -new_n5490_ = OR ( new_n5489_, new_n1421_ ) -new_n5491_ = NAND ( new_n5490_, new_n5486_ ) -new_n5492_ = OR ( new_n5491_, new_n3125_ ) -new_n5493_ = NAND ( new_n3146_, new_n1803_ ) -new_n5494_ = NAND ( new_n5489_, new_n3149_ ) -new_n5495_ = OR ( new_n3151_, new_n1799_ ) -new_n5496_ = OR ( new_n3153_, new_n1794_ ) -new_n5497_ = AND ( new_n5496_, new_n5495_, new_n5494_ ) -new_n5498_ = NAND ( new_n5497_, new_n5493_, new_n5492_ ) -new_n5499_ = XOR ( new_n5498_, new_n3157_ ) -new_n5500_ = OR ( new_n5491_, new_n3110_ ) -new_n5501_ = NAND ( new_n3126_, new_n1803_ ) -new_n5502_ = OR ( new_n3136_, new_n1799_ ) -new_n5503_ = OR ( new_n3139_, new_n1794_ ) -new_n5504_ = NAND ( new_n5489_, new_n1353_ ) -new_n5505_ = AND ( new_n5504_, new_n5503_, new_n5502_ ) -new_n5506_ = NAND ( new_n5505_, new_n5501_, new_n5500_ ) -new_n5507_ = OR ( new_n5506_, new_n5499_ ) -new_n5508_ = NAND ( new_n5506_, new_n5499_ ) -new_n5509_ = NAND ( new_n5508_, new_n5507_ ) -new_n5510_ = NAND ( new_n5340_, new_n5336_ ) -new_n5511_ = NAND ( new_n5510_, new_n5337_ ) -new_n5512_ = XOR ( new_n5511_, new_n5509_ ) -new_n5513_ = OR ( new_n5512_, new_n3213_ ) -new_n5514_ = NAND ( new_n3216_, new_n1803_ ) -new_n5515_ = NAND ( new_n5491_, new_n3210_ ) -new_n5516_ = OR ( new_n5491_, new_n3210_ ) -new_n5517_ = NAND ( new_n5516_, new_n5515_, new_n5514_ ) -new_n5518_ = NAND ( new_n5490_, new_n5486_, new_n3216_, new_n1803_ ) -new_n5519_ = NAND ( new_n5518_, new_n5517_ ) -new_n5520_ = NAND ( new_n5351_, new_n5347_ ) -new_n5521_ = NAND ( new_n5520_, new_n5348_ ) -new_n5522_ = XNOR ( new_n5521_, new_n5519_ ) -new_n5523_ = NAND ( new_n5522_, new_n3238_ ) -new_n5524_ = OR ( new_n5491_, new_n3243_ ) -new_n5525_ = NAND ( new_n3253_, new_n1817_ ) -new_n5526_ = NAND ( new_n3257_, new_n1789_ ) -new_n5527_ = NAND ( new_n3207_, NET_418 ) -new_n5528_ = NAND ( new_n4070_, new_n1797_ ) -new_n5529_ = AND ( new_n5528_, new_n5527_, new_n5526_, new_n5525_ ) -NET_7730 = NAND ( new_n5529_, new_n5524_, new_n5523_, new_n5513_ ) -new_n5531_ = OR ( new_n5512_, new_n3267_ ) -new_n5532_ = OR ( new_n1419_, new_n1794_ ) -new_n5533_ = NAND ( new_n1419_, NET_418 ) -new_n5534_ = NAND ( new_n5533_, new_n5532_ ) -new_n5535_ = XOR ( new_n5534_, new_n5489_ ) -new_n5536_ = OR ( new_n5367_, new_n5322_ ) -new_n5537_ = NAND ( new_n5536_, new_n5364_ ) -new_n5538_ = NAND ( new_n5367_, new_n5322_ ) -new_n5539_ = NAND ( new_n5538_, new_n5537_ ) -new_n5540_ = NAND ( new_n5539_, new_n5535_ ) -new_n5541_ = OR ( new_n5539_, new_n5535_ ) -new_n5542_ = NAND ( new_n5541_, new_n5540_, new_n3275_ ) -new_n5543_ = NAND ( new_n5489_, new_n4493_ ) -new_n5544_ = NOR ( new_n3262_, new_n2639_ ) -new_n5545_ = NOR ( NET_520, new_n1628_ ) -new_n5546_ = NOR ( new_n5545_, new_n5544_ ) -NET_7731 = NAND ( new_n5546_, new_n5543_, new_n5542_, new_n5531_ ) -new_n5548_ = OR ( new_n5512_, new_n3307_ ) -new_n5549_ = NAND ( new_n5522_, new_n3311_ ) -new_n5550_ = OR ( new_n5491_, new_n3325_ ) -new_n5551_ = NOT ( new_n5545_ ) -new_n5552_ = NAND ( new_n3321_, new_n1797_ ) -new_n5553_ = NAND ( new_n3327_, new_n1789_ ) -new_n5554_ = NAND ( new_n3329_, new_n1817_ ) -new_n5555_ = AND ( new_n5554_, new_n5553_, new_n5552_, new_n5551_ ) -NET_7732 = NAND ( new_n5555_, new_n5550_, new_n5549_, new_n5548_ ) -new_n5557_ = NOR ( new_n5341_, new_n3489_ ) -new_n5558_ = NAND ( new_n5352_, new_n3492_ ) -new_n5559_ = OR ( new_n5318_, new_n3497_ ) -new_n5560_ = NAND ( new_n3255_, new_n1803_ ) -new_n5561_ = NAND ( new_n3251_, new_n1831_ ) -new_n5562_ = NAND ( new_n5561_, new_n5560_, new_n5559_, new_n5558_ ) -new_n5563_ = NOR ( new_n5562_, new_n5557_ ) -new_n5564_ = NOR ( new_n5563_, new_n3505_ ) -new_n5565_ = NOR ( new_n3504_, new_n1808_ ) -NET_7733 = OR ( new_n5565_, new_n5564_ ) -new_n5567_ = NOR ( new_n5563_, new_n3510_ ) -new_n5568_ = NOR ( new_n3509_, new_n1815_ ) -NET_7734 = OR ( new_n5568_, new_n5567_ ) -new_n5570_ = OR ( new_n1078_, NET_484 ) -new_n5571_ = OR ( new_n1078_, NET_239 ) -new_n5572_ = NAND ( new_n1078_, new_n2566_ ) -new_n5573_ = NAND ( new_n5572_, new_n5571_ ) -new_n5574_ = XOR ( new_n5573_, NET_6 ) -new_n5575_ = NOT ( NET_7 ) -new_n5576_ = NAND ( new_n5412_, new_n5575_ ) -new_n5577_ = NAND ( new_n5576_, new_n5418_ ) -new_n5578_ = OR ( new_n5412_, new_n5575_ ) -new_n5579_ = NAND ( new_n5578_, new_n5577_ ) -new_n5580_ = XNOR ( new_n5579_, new_n5574_ ) -new_n5581_ = OR ( new_n5580_, new_n1080_ ) -new_n5582_ = NAND ( new_n5581_, new_n5570_ ) -new_n5583_ = OR ( new_n5582_, NET_275 ) -new_n5584_ = OR ( new_n1125_, new_n1446_ ) -new_n5585_ = OR ( new_n1250_, new_n1127_ ) -NET_7850 = NAND ( new_n5585_, new_n5584_, new_n5583_ ) -new_n5587_ = NAND ( new_n3349_, new_n1300_ ) -new_n5588_ = NOR ( NET_64, new_n3351_ ) -new_n5589_ = NOR ( new_n3353_, new_n1261_ ) -new_n5590_ = NOR ( new_n5589_, new_n5588_ ) -new_n5591_ = NAND ( new_n5590_, new_n1299_ ) -new_n5592_ = NAND ( new_n5591_, new_n5587_ ) -new_n5593_ = OR ( new_n5592_, new_n2898_ ) -new_n5594_ = NAND ( new_n2908_, new_n2183_ ) -new_n5595_ = NOT ( new_n5590_ ) -new_n5596_ = NAND ( new_n5595_, new_n2912_ ) -new_n5597_ = NAND ( new_n5596_, new_n5594_, new_n5593_ ) -new_n5598_ = XOR ( new_n5597_, new_n2915_ ) -new_n5599_ = OR ( new_n5592_, new_n2889_ ) -new_n5600_ = NOT ( new_n2183_ ) -new_n5601_ = OR ( new_n2928_, new_n5600_ ) -new_n5602_ = OR ( new_n2903_, new_n2175_ ) -new_n5603_ = OR ( new_n2905_, new_n2177_ ) -new_n5604_ = NAND ( new_n5603_, new_n5602_, new_n5601_, new_n5599_ ) -new_n5605_ = NAND ( new_n5604_, new_n5598_ ) -new_n5606_ = OR ( new_n5604_, new_n5598_ ) -new_n5607_ = NAND ( new_n5606_, new_n5605_ ) -new_n5608_ = NAND ( new_n5447_, new_n5443_ ) -new_n5609_ = NAND ( new_n5608_, new_n5444_ ) -new_n5610_ = XOR ( new_n5609_, new_n5607_ ) -new_n5611_ = NOR ( new_n5610_, new_n2951_ ) -new_n5612_ = OR ( new_n1290_, new_n2175_ ) -new_n5613_ = NAND ( new_n1290_, NET_174 ) -new_n5614_ = NAND ( new_n5613_, new_n5612_ ) -new_n5615_ = XOR ( new_n5614_, new_n5595_ ) -new_n5616_ = OR ( new_n5457_, new_n5452_ ) -new_n5617_ = NAND ( new_n5616_, new_n5429_ ) -new_n5618_ = NAND ( new_n5457_, new_n5452_ ) -new_n5619_ = NAND ( new_n5618_, new_n5617_ ) -new_n5620_ = NAND ( new_n5619_, new_n5615_ ) -new_n5621_ = OR ( new_n5619_, new_n5615_ ) -new_n5622_ = NAND ( new_n5621_, new_n5620_, new_n2960_ ) -new_n5623_ = NAND ( new_n5595_, new_n2977_ ) -new_n5624_ = NAND ( new_n1304_, new_n1301_, NET_275, NET_199 ) -new_n5625_ = OR ( NET_275, new_n2030_ ) -new_n5626_ = NAND ( new_n5625_, new_n5624_, new_n5623_, new_n5622_ ) -NET_7851 = OR ( new_n5626_, new_n5611_ ) -new_n5628_ = NOR ( new_n3019_, new_n4882_ ) -new_n5629_ = OR ( new_n4880_, new_n3017_ ) -new_n5630_ = XNOR ( new_n5629_, new_n5628_ ) -new_n5631_ = OR ( new_n5295_, new_n5290_ ) -new_n5632_ = NAND ( new_n5631_, new_n5289_ ) -new_n5633_ = NAND ( new_n5295_, new_n5290_ ) -new_n5634_ = NAND ( new_n5633_, new_n5632_ ) -new_n5635_ = XOR ( new_n5634_, new_n5630_ ) -new_n5636_ = OR ( new_n5635_, new_n3035_ ) -new_n5637_ = OR ( new_n4898_, new_n3005_ ) -new_n5638_ = NAND ( new_n3051_, new_n2232_ ) -new_n5639_ = NOT ( new_n4880_ ) -new_n5640_ = NAND ( new_n5639_, new_n3060_ ) -new_n5641_ = NAND ( new_n3062_, new_n2222_ ) -new_n5642_ = NAND ( new_n3064_, new_n2249_ ) -new_n5643_ = AND ( new_n5642_, new_n5641_, new_n5640_, new_n4913_ ) -NET_7852 = NAND ( new_n5643_, new_n5638_, new_n5637_, new_n5636_ ) -new_n5645_ = OR ( new_n5580_, new_n1078_ ) -new_n5646_ = NAND ( new_n1078_, new_n2542_ ) -new_n5647_ = NAND ( new_n5646_, new_n5645_ ) -new_n5648_ = OR ( new_n5647_, NET_520 ) -new_n5649_ = OR ( new_n1101_, new_n1331_ ) -new_n5650_ = OR ( new_n1338_, new_n1141_ ) -NET_7868 = NAND ( new_n5650_, new_n5649_, new_n5648_ ) -new_n5652_ = NAND ( new_n3405_, new_n1421_ ) -new_n5653_ = NOR ( NET_309, new_n3407_ ) -new_n5654_ = NOR ( new_n3409_, new_n1103_ ) -new_n5655_ = NOR ( new_n5654_, new_n5653_ ) -new_n5656_ = NAND ( new_n5655_, new_n1420_ ) -new_n5657_ = NAND ( new_n5656_, new_n5652_ ) -new_n5658_ = OR ( new_n5657_, new_n3125_ ) -new_n5659_ = NAND ( new_n3146_, new_n1789_ ) -new_n5660_ = NOT ( new_n5655_ ) -new_n5661_ = NAND ( new_n5660_, new_n3149_ ) -new_n5662_ = OR ( new_n3151_, new_n1785_ ) -new_n5663_ = OR ( new_n3153_, new_n1780_ ) -new_n5664_ = AND ( new_n5663_, new_n5662_, new_n5661_ ) -new_n5665_ = NAND ( new_n5664_, new_n5659_, new_n5658_ ) -new_n5666_ = XOR ( new_n5665_, new_n3157_ ) -new_n5667_ = OR ( new_n5657_, new_n3110_ ) -new_n5668_ = NAND ( new_n3126_, new_n1789_ ) -new_n5669_ = OR ( new_n3136_, new_n1785_ ) -new_n5670_ = OR ( new_n3139_, new_n1780_ ) -new_n5671_ = NAND ( new_n5660_, new_n1353_ ) -new_n5672_ = AND ( new_n5671_, new_n5670_, new_n5669_ ) -new_n5673_ = NAND ( new_n5672_, new_n5668_, new_n5667_ ) -new_n5674_ = NAND ( new_n5673_, new_n5666_ ) -new_n5675_ = OR ( new_n5673_, new_n5666_ ) -new_n5676_ = NAND ( new_n5675_, new_n5674_ ) -new_n5677_ = NAND ( new_n5511_, new_n5507_ ) -new_n5678_ = NAND ( new_n5677_, new_n5508_ ) -new_n5679_ = XOR ( new_n5678_, new_n5676_ ) -new_n5680_ = OR ( new_n5679_, new_n3213_ ) -new_n5681_ = OR ( new_n3210_, new_n1789_ ) -new_n5682_ = OR ( new_n5657_, new_n3216_ ) -new_n5683_ = NAND ( new_n5682_, new_n5681_ ) -new_n5684_ = OR ( new_n5657_, new_n3210_ ) -new_n5685_ = OR ( new_n5684_, new_n5683_ ) -new_n5686_ = NAND ( new_n5684_, new_n5683_ ) -new_n5687_ = NAND ( new_n5686_, new_n5685_ ) -new_n5688_ = NAND ( new_n5521_, new_n5517_ ) -new_n5689_ = NAND ( new_n5688_, new_n5518_ ) -new_n5690_ = XNOR ( new_n5689_, new_n5687_ ) -new_n5691_ = NAND ( new_n5690_, new_n3238_ ) -new_n5692_ = OR ( new_n5657_, new_n3243_ ) -new_n5693_ = NAND ( new_n3257_, new_n1775_ ) -new_n5694_ = NAND ( new_n3253_, new_n1803_ ) -new_n5695_ = NAND ( new_n3207_, NET_419 ) -new_n5696_ = NAND ( new_n4070_, new_n1783_ ) -new_n5697_ = AND ( new_n5696_, new_n5695_, new_n5694_, new_n5693_ ) -NET_7869 = NAND ( new_n5697_, new_n5692_, new_n5691_, new_n5680_ ) -new_n5699_ = OR ( new_n5679_, new_n3267_ ) -new_n5700_ = OR ( new_n1419_, new_n1780_ ) -new_n5701_ = NAND ( new_n1419_, NET_419 ) -new_n5702_ = NAND ( new_n5701_, new_n5700_ ) -new_n5703_ = XOR ( new_n5702_, new_n5660_ ) -new_n5704_ = OR ( new_n5539_, new_n5534_ ) -new_n5705_ = NAND ( new_n5704_, new_n5489_ ) -new_n5706_ = NAND ( new_n5539_, new_n5534_ ) -new_n5707_ = NAND ( new_n5706_, new_n5705_ ) -new_n5708_ = NAND ( new_n5707_, new_n5703_ ) -new_n5709_ = OR ( new_n5707_, new_n5703_ ) -new_n5710_ = NAND ( new_n5709_, new_n5708_, new_n3275_ ) -new_n5711_ = OR ( new_n5655_, new_n3295_ ) -new_n5712_ = NOT ( NET_444 ) -new_n5713_ = NOR ( new_n3262_, new_n5712_ ) -new_n5714_ = NOR ( NET_520, new_n1627_ ) -new_n5715_ = NOR ( new_n5714_, new_n5713_ ) -NET_7870 = NAND ( new_n5715_, new_n5711_, new_n5710_, new_n5699_ ) -new_n5717_ = OR ( new_n5679_, new_n3307_ ) -new_n5718_ = NAND ( new_n5690_, new_n3311_ ) -new_n5719_ = OR ( new_n5657_, new_n3325_ ) -new_n5720_ = NOT ( new_n5714_ ) -new_n5721_ = NAND ( new_n3321_, new_n1783_ ) -new_n5722_ = NAND ( new_n3327_, new_n1775_ ) -new_n5723_ = NAND ( new_n3329_, new_n1803_ ) -new_n5724_ = AND ( new_n5723_, new_n5722_, new_n5721_, new_n5720_ ) -NET_7871 = NAND ( new_n5724_, new_n5719_, new_n5718_, new_n5717_ ) -new_n5726_ = NOR ( new_n5512_, new_n3489_ ) -new_n5727_ = NAND ( new_n5522_, new_n3492_ ) -new_n5728_ = OR ( new_n5491_, new_n3497_ ) -new_n5729_ = NAND ( new_n3255_, new_n1789_ ) -new_n5730_ = NAND ( new_n3251_, new_n1817_ ) -new_n5731_ = NAND ( new_n5730_, new_n5729_, new_n5728_, new_n5727_ ) -new_n5732_ = NOR ( new_n5731_, new_n5726_ ) -new_n5733_ = NOR ( new_n5732_, new_n3505_ ) -new_n5734_ = NOR ( new_n3504_, new_n1794_ ) -NET_7872 = OR ( new_n5734_, new_n5733_ ) -new_n5736_ = NOR ( new_n5732_, new_n3510_ ) -new_n5737_ = NOR ( new_n3509_, new_n1801_ ) -NET_7873 = OR ( new_n5737_, new_n5736_ ) -new_n5739_ = OR ( new_n5635_, new_n3373_ ) -new_n5740_ = OR ( new_n4898_, new_n3364_ ) -new_n5741_ = OR ( new_n4880_, new_n4374_ ) -new_n5742_ = NAND ( new_n3712_, new_n2249_ ) -new_n5743_ = NAND ( new_n3379_, new_n2222_ ) -new_n5744_ = NAND ( new_n3360_, NET_170 ) -new_n5745_ = NAND ( new_n3058_, new_n2232_ ) -new_n5746_ = AND ( new_n5745_, new_n5744_, new_n5743_, new_n5742_ ) -NET_7926 = NAND ( new_n5746_, new_n5741_, new_n5740_, new_n5739_ ) -new_n5748_ = OR ( new_n5635_, new_n3574_ ) -new_n5749_ = OR ( new_n4898_, new_n3454_ ) -new_n5750_ = OR ( new_n4880_, new_n3461_ ) -new_n5751_ = NOR ( new_n3442_, new_n4725_ ) -new_n5752_ = NOR ( new_n3378_, new_n5101_ ) -new_n5753_ = NOR ( new_n5752_, new_n5751_ ) -new_n5754_ = NAND ( new_n5753_, new_n5750_, new_n5749_, new_n5748_ ) -new_n5755_ = NAND ( new_n5754_, new_n3470_ ) -new_n5756_ = OR ( new_n3470_, new_n2227_ ) -NET_7971 = NAND ( new_n5756_, new_n5755_ ) -new_n5758_ = NAND ( new_n5754_, new_n3474_ ) -new_n5759_ = NAND ( new_n3476_, NET_106 ) -NET_7972 = NAND ( new_n5759_, new_n5758_ ) -new_n5761_ = NOR ( new_n5679_, new_n3489_ ) -new_n5762_ = NAND ( new_n5690_, new_n3492_ ) -new_n5763_ = OR ( new_n5657_, new_n3497_ ) -new_n5764_ = NAND ( new_n3251_, new_n1803_ ) -new_n5765_ = NAND ( new_n3255_, new_n1775_ ) -new_n5766_ = NAND ( new_n5765_, new_n5764_, new_n5763_, new_n5762_ ) -new_n5767_ = NOR ( new_n5766_, new_n5761_ ) -new_n5768_ = NOR ( new_n5767_, new_n3505_ ) -new_n5769_ = NOR ( new_n3504_, new_n1780_ ) -NET_7981 = OR ( new_n5769_, new_n5768_ ) -new_n5771_ = NOR ( new_n5767_, new_n3510_ ) -new_n5772_ = NOR ( new_n3509_, new_n1787_ ) -NET_7982 = OR ( new_n5772_, new_n5771_ ) -new_n5774_ = OR ( new_n1078_, NET_485 ) -new_n5775_ = NOT ( NET_5 ) -new_n5776_ = OR ( new_n1078_, NET_240 ) -new_n5777_ = NAND ( new_n1078_, new_n2552_ ) -new_n5778_ = NAND ( new_n5777_, new_n5776_ ) -new_n5779_ = NOR ( new_n5778_, new_n5775_ ) -new_n5780_ = NOT ( new_n5779_ ) -new_n5781_ = NAND ( new_n5778_, new_n5775_ ) -new_n5782_ = NAND ( new_n5781_, new_n5780_ ) -new_n5783_ = NOT ( NET_6 ) -new_n5784_ = NAND ( new_n5573_, new_n5783_ ) -new_n5785_ = NAND ( new_n5784_, new_n5579_ ) -new_n5786_ = OR ( new_n5573_, new_n5783_ ) -new_n5787_ = NAND ( new_n5786_, new_n5785_, new_n5782_ ) -new_n5788_ = NAND ( new_n5786_, new_n5785_ ) -new_n5789_ = NAND ( new_n5788_, new_n5781_ ) -new_n5790_ = OR ( new_n5789_, new_n5779_ ) -new_n5791_ = NAND ( new_n5790_, new_n5787_ ) -new_n5792_ = NAND ( new_n5791_, new_n1078_ ) -new_n5793_ = NAND ( new_n5792_, new_n5774_ ) -new_n5794_ = OR ( new_n5793_, NET_275 ) -new_n5795_ = OR ( new_n1125_, new_n1286_ ) -new_n5796_ = OR ( new_n1288_, new_n1127_ ) -NET_8028 = NAND ( new_n5796_, new_n5795_, new_n5794_ ) -new_n5798_ = NAND ( new_n3698_, new_n1300_ ) -new_n5799_ = NOR ( NET_64, NET_47 ) -new_n5800_ = NAND ( new_n3703_, NET_64 ) -new_n5801_ = NOT ( new_n5800_ ) -new_n5802_ = NOR ( new_n5801_, new_n5799_ ) -new_n5803_ = NOT ( new_n5802_ ) -new_n5804_ = NAND ( new_n5803_, new_n1299_ ) -new_n5805_ = AND ( new_n5804_, new_n5798_ ) -new_n5806_ = NAND ( new_n5805_, new_n5086_ ) -new_n5807_ = NAND ( new_n2908_, new_n2170_ ) -new_n5808_ = NAND ( new_n5802_, new_n2912_ ) -new_n5809_ = NAND ( new_n5808_, new_n5807_, new_n5806_ ) -new_n5810_ = NAND ( new_n5809_, new_n5085_ ) -new_n5811_ = OR ( new_n5809_, new_n5085_ ) -new_n5812_ = NAND ( new_n5805_, new_n2908_ ) -new_n5813_ = NOT ( new_n2170_ ) -new_n5814_ = OR ( new_n2928_, new_n5813_ ) -new_n5815_ = OR ( new_n2903_, new_n2162_ ) -new_n5816_ = OR ( new_n2905_, new_n2164_ ) -new_n5817_ = AND ( new_n5816_, new_n5815_, new_n5814_, new_n5812_ ) -new_n5818_ = NAND ( new_n5817_, new_n5811_, new_n5810_ ) -new_n5819_ = AND ( new_n5811_, new_n5810_ ) -new_n5820_ = OR ( new_n5819_, new_n5817_ ) -new_n5821_ = NAND ( new_n5820_, new_n5818_ ) -new_n5822_ = NAND ( new_n5609_, new_n5606_ ) -new_n5823_ = NAND ( new_n5822_, new_n5605_ ) -new_n5824_ = XOR ( new_n5823_, new_n5821_ ) -new_n5825_ = NOR ( new_n5824_, new_n2951_ ) -new_n5826_ = NAND ( new_n5619_, new_n5614_ ) -new_n5827_ = NAND ( new_n5826_, new_n5590_ ) -new_n5828_ = OR ( new_n5619_, new_n5614_ ) -new_n5829_ = OR ( new_n1290_, new_n2162_ ) -new_n5830_ = NAND ( new_n1290_, NET_175 ) -new_n5831_ = NAND ( new_n5830_, new_n5829_ ) -new_n5832_ = OR ( new_n5831_, new_n5802_ ) -new_n5833_ = NAND ( new_n5831_, new_n5802_ ) -new_n5834_ = NAND ( new_n5833_, new_n5832_, new_n5828_, new_n5827_ ) -new_n5835_ = NAND ( new_n5828_, new_n5595_ ) -new_n5836_ = NAND ( new_n5831_, new_n5803_ ) -new_n5837_ = OR ( new_n5831_, new_n5803_ ) -new_n5838_ = NAND ( new_n5837_, new_n5836_, new_n5835_, new_n5826_ ) -new_n5839_ = NAND ( new_n5838_, new_n5834_, new_n2960_ ) -new_n5840_ = NAND ( new_n5802_, new_n2977_ ) -new_n5841_ = OR ( new_n2949_, new_n2711_ ) -new_n5842_ = NAND ( NET_23564, NET_272 ) -new_n5843_ = NAND ( new_n5842_, new_n5841_, new_n5840_, new_n5839_ ) -NET_8029 = OR ( new_n5843_, new_n5825_ ) -new_n5845_ = NAND ( new_n5791_, new_n1080_ ) -new_n5846_ = NAND ( new_n1078_, new_n2530_ ) -new_n5847_ = NAND ( new_n5846_, new_n5845_ ) -new_n5848_ = OR ( new_n5847_, NET_520 ) -new_n5849_ = OR ( new_n1101_, new_n1409_ ) -new_n5850_ = OR ( new_n1417_, new_n1141_ ) -NET_8045 = NAND ( new_n5850_, new_n5849_, new_n5848_ ) -new_n5852_ = NAND ( new_n3719_, new_n1421_ ) -new_n5853_ = OR ( NET_309, new_n3721_ ) -new_n5854_ = OR ( new_n3725_, new_n1103_ ) -new_n5855_ = NAND ( new_n5854_, new_n5853_ ) -new_n5856_ = OR ( new_n5855_, new_n1421_ ) -new_n5857_ = NAND ( new_n5856_, new_n5852_ ) -new_n5858_ = OR ( new_n5857_, new_n3125_ ) -new_n5859_ = NAND ( new_n3146_, new_n1775_ ) -new_n5860_ = NAND ( new_n5855_, new_n3149_ ) -new_n5861_ = OR ( new_n3151_, new_n1771_ ) -new_n5862_ = OR ( new_n3153_, new_n1766_ ) -new_n5863_ = AND ( new_n5862_, new_n5861_, new_n5860_ ) -new_n5864_ = NAND ( new_n5863_, new_n5859_, new_n5858_ ) -new_n5865_ = NAND ( new_n5864_, new_n3158_ ) -new_n5866_ = OR ( new_n5864_, new_n3158_ ) -new_n5867_ = NOR ( new_n5857_, new_n3110_ ) -new_n5868_ = NAND ( new_n3126_, new_n1775_ ) -new_n5869_ = OR ( new_n3136_, new_n1771_ ) -new_n5870_ = OR ( new_n3139_, new_n1766_ ) -new_n5871_ = NAND ( new_n5855_, new_n1353_ ) -new_n5872_ = NAND ( new_n5871_, new_n5870_, new_n5869_, new_n5868_ ) -new_n5873_ = NOR ( new_n5872_, new_n5867_ ) -new_n5874_ = NAND ( new_n5873_, new_n5866_, new_n5865_ ) -new_n5875_ = AND ( new_n5866_, new_n5865_ ) -new_n5876_ = OR ( new_n5875_, new_n5873_ ) -new_n5877_ = NAND ( new_n5876_, new_n5874_ ) -new_n5878_ = NAND ( new_n5678_, new_n5675_ ) -new_n5879_ = NAND ( new_n5878_, new_n5674_ ) -new_n5880_ = XOR ( new_n5879_, new_n5877_ ) -new_n5881_ = OR ( new_n5880_, new_n3213_ ) -new_n5882_ = OR ( new_n3210_, new_n1775_ ) -new_n5883_ = NAND ( new_n5857_, new_n3210_ ) -new_n5884_ = NAND ( new_n5883_, new_n5882_ ) -new_n5885_ = NAND ( new_n5884_, new_n3210_ ) -new_n5886_ = OR ( new_n5857_, new_n3210_ ) -new_n5887_ = NAND ( new_n3216_, new_n1775_ ) -new_n5888_ = NAND ( new_n5887_, new_n5886_, new_n5885_ ) -new_n5889_ = NAND ( new_n5856_, new_n5852_, new_n3216_, new_n1775_ ) -new_n5890_ = NAND ( new_n5889_, new_n5888_ ) -new_n5891_ = NAND ( new_n5689_, new_n5686_ ) -new_n5892_ = NAND ( new_n5891_, new_n5685_ ) -new_n5893_ = XNOR ( new_n5892_, new_n5890_ ) -new_n5894_ = NAND ( new_n5893_, new_n3238_ ) -new_n5895_ = OR ( new_n5857_, new_n3243_ ) -new_n5896_ = NAND ( new_n3257_, new_n1761_ ) -new_n5897_ = NAND ( new_n3253_, new_n1789_ ) -new_n5898_ = NAND ( new_n3207_, NET_420 ) -new_n5899_ = NAND ( new_n4070_, new_n1769_ ) -new_n5900_ = AND ( new_n5899_, new_n5898_, new_n5897_, new_n5896_ ) -NET_8046 = NAND ( new_n5900_, new_n5895_, new_n5894_, new_n5881_ ) -new_n5902_ = OR ( new_n5880_, new_n3267_ ) -new_n5903_ = NAND ( new_n5707_, new_n5702_ ) -new_n5904_ = NAND ( new_n5903_, new_n5655_ ) -new_n5905_ = OR ( new_n5707_, new_n5702_ ) -new_n5906_ = OR ( new_n1419_, new_n1766_ ) -new_n5907_ = NAND ( new_n1419_, NET_420 ) -new_n5908_ = NAND ( new_n5907_, new_n5906_ ) -new_n5909_ = OR ( new_n5908_, new_n5855_ ) -new_n5910_ = NAND ( new_n5908_, new_n5855_ ) -new_n5911_ = NAND ( new_n5910_, new_n5909_, new_n5905_, new_n5904_ ) -new_n5912_ = NAND ( new_n5905_, new_n5660_ ) -new_n5913_ = XNOR ( new_n5908_, new_n5855_ ) -new_n5914_ = NAND ( new_n5913_, new_n5912_, new_n5903_ ) -new_n5915_ = NAND ( new_n5914_, new_n5911_, new_n3275_ ) -new_n5916_ = NAND ( new_n5855_, new_n4493_ ) -new_n5917_ = NOR ( new_n3262_, new_n2712_ ) -new_n5918_ = NOT ( NET_517 ) -new_n5919_ = NOR ( NET_520, new_n5918_ ) -new_n5920_ = NOR ( new_n5919_, new_n5917_ ) -NET_8047 = NAND ( new_n5920_, new_n5916_, new_n5915_, new_n5902_ ) -new_n5922_ = OR ( new_n5880_, new_n3307_ ) -new_n5923_ = NAND ( new_n5893_, new_n3311_ ) -new_n5924_ = OR ( new_n5857_, new_n3325_ ) -new_n5925_ = NOT ( new_n5919_ ) -new_n5926_ = NAND ( new_n3321_, new_n1769_ ) -new_n5927_ = NAND ( new_n3327_, new_n1761_ ) -new_n5928_ = NAND ( new_n3329_, new_n1789_ ) -new_n5929_ = AND ( new_n5928_, new_n5927_, new_n5926_, new_n5925_ ) -NET_8048 = NAND ( new_n5929_, new_n5924_, new_n5923_, new_n5922_ ) -new_n5931_ = NOR ( new_n3019_, new_n5101_ ) -new_n5932_ = NAND ( new_n5092_, new_n3016_ ) -new_n5933_ = XNOR ( new_n5932_, new_n5931_ ) -new_n5934_ = OR ( new_n5634_, new_n5629_ ) -new_n5935_ = NAND ( new_n5934_, new_n5628_ ) -new_n5936_ = NAND ( new_n5634_, new_n5629_ ) -new_n5937_ = NAND ( new_n5936_, new_n5935_ ) -new_n5938_ = XOR ( new_n5937_, new_n5933_ ) -new_n5939_ = OR ( new_n5938_, new_n3035_ ) -new_n5940_ = OR ( new_n5112_, new_n3005_ ) -new_n5941_ = NAND ( new_n5092_, new_n3060_ ) -new_n5942_ = NAND ( new_n3051_, new_n2219_ ) -new_n5943_ = NAND ( new_n3062_, new_n2209_ ) -new_n5944_ = NAND ( new_n3064_, new_n2235_ ) -new_n5945_ = AND ( new_n5944_, new_n5943_, new_n5942_, new_n5129_ ) -NET_8085 = NAND ( new_n5945_, new_n5941_, new_n5940_, new_n5939_ ) -new_n5947_ = OR ( new_n1078_, NET_486 ) -new_n5948_ = OR ( new_n1078_, NET_241 ) -new_n5949_ = NAND ( new_n1078_, new_n2625_ ) -new_n5950_ = NAND ( new_n5949_, new_n5948_ ) -new_n5951_ = XOR ( new_n5950_, NET_4 ) -new_n5952_ = NAND ( new_n5789_, new_n5780_ ) -new_n5953_ = XNOR ( new_n5952_, new_n5951_ ) -new_n5954_ = OR ( new_n5953_, new_n1080_ ) -new_n5955_ = NAND ( new_n5954_, new_n5947_ ) -new_n5956_ = OR ( new_n5955_, NET_275 ) -new_n5957_ = OR ( new_n1125_, new_n1291_ ) -new_n5958_ = OR ( new_n1296_, new_n1127_ ) -NET_8147 = NAND ( new_n5958_, new_n5957_, new_n5956_ ) -new_n5960_ = OR ( new_n5938_, new_n3373_ ) -new_n5961_ = OR ( new_n5112_, new_n3364_ ) -new_n5962_ = NAND ( new_n5092_, new_n3382_ ) -new_n5963_ = NAND ( new_n3712_, new_n2235_ ) -new_n5964_ = NAND ( new_n3379_, new_n2209_ ) -new_n5965_ = NAND ( new_n3360_, NET_171 ) -new_n5966_ = NAND ( new_n3058_, new_n2219_ ) -new_n5967_ = AND ( new_n5966_, new_n5965_, new_n5964_, new_n5963_ ) -NET_8148 = NAND ( new_n5967_, new_n5962_, new_n5961_, new_n5960_ ) -new_n5969_ = NAND ( new_n3914_, new_n1300_ ) -new_n5970_ = NOR ( NET_64, NET_48 ) -new_n5971_ = NOR ( new_n3919_, new_n1261_ ) -new_n5972_ = NOR ( new_n5971_, new_n5970_ ) -new_n5973_ = OR ( new_n5972_, new_n1300_ ) -new_n5974_ = AND ( new_n5973_, new_n5969_ ) -new_n5975_ = NAND ( new_n5974_, new_n5086_ ) -new_n5976_ = NAND ( new_n2908_, new_n2157_ ) -new_n5977_ = NAND ( new_n5972_, new_n2912_ ) -new_n5978_ = NAND ( new_n5977_, new_n5976_, new_n5975_ ) -new_n5979_ = XOR ( new_n5978_, new_n2915_ ) -new_n5980_ = NAND ( new_n5974_, new_n2908_ ) -new_n5981_ = NOT ( new_n2157_ ) -new_n5982_ = OR ( new_n2928_, new_n5981_ ) -new_n5983_ = OR ( new_n2903_, new_n2149_ ) -new_n5984_ = OR ( new_n2905_, new_n2151_ ) -new_n5985_ = NAND ( new_n5984_, new_n5983_, new_n5982_, new_n5980_ ) -new_n5986_ = OR ( new_n5985_, new_n5979_ ) -new_n5987_ = NAND ( new_n5985_, new_n5979_ ) -new_n5988_ = NAND ( new_n5987_, new_n5986_ ) -new_n5989_ = NAND ( new_n5823_, new_n5818_ ) -new_n5990_ = NAND ( new_n5989_, new_n5820_ ) -new_n5991_ = XOR ( new_n5990_, new_n5988_ ) -new_n5992_ = NOR ( new_n5991_, new_n2951_ ) -new_n5993_ = OR ( new_n1290_, new_n2149_ ) -new_n5994_ = NAND ( new_n1290_, NET_176 ) -new_n5995_ = NAND ( new_n5994_, new_n5993_ ) -new_n5996_ = NAND ( new_n5995_, new_n5972_ ) -new_n5997_ = OR ( new_n5995_, new_n5972_ ) -new_n5998_ = NAND ( new_n5832_, new_n5828_, new_n5827_ ) -new_n5999_ = NAND ( new_n5833_, new_n5998_ ) -new_n6000_ = NAND ( new_n5999_, new_n5997_, new_n5996_ ) -new_n6001_ = NAND ( new_n5997_, new_n5996_ ) -new_n6002_ = NAND ( new_n6001_, new_n5833_, new_n5998_ ) -new_n6003_ = NAND ( new_n6002_, new_n6000_, new_n2960_ ) -new_n6004_ = NAND ( new_n5972_, new_n2977_ ) -new_n6005_ = OR ( new_n2949_, new_n2760_ ) -new_n6006_ = OR ( NET_275, new_n2029_ ) -new_n6007_ = NAND ( new_n6006_, new_n6005_, new_n6004_, new_n6003_ ) -NET_8149 = OR ( new_n6007_, new_n5992_ ) -new_n6009_ = OR ( new_n5953_, new_n1078_ ) -new_n6010_ = NAND ( new_n1078_, new_n2607_ ) -new_n6011_ = NAND ( new_n6010_, new_n6009_ ) -new_n6012_ = OR ( new_n6011_, NET_520 ) -new_n6013_ = OR ( new_n1101_, new_n1407_ ) -new_n6014_ = OR ( new_n1413_, new_n1141_ ) -NET_8166 = NAND ( new_n6014_, new_n6013_, new_n6012_ ) -new_n6016_ = NAND ( new_n3934_, new_n1421_ ) -new_n6017_ = NOR ( NET_309, NET_293 ) -new_n6018_ = AND ( new_n3937_, NET_309 ) -new_n6019_ = NOR ( new_n6018_, new_n6017_ ) -new_n6020_ = NOT ( new_n6019_ ) -new_n6021_ = NAND ( new_n6020_, new_n1420_ ) -new_n6022_ = NAND ( new_n6021_, new_n6016_ ) -new_n6023_ = OR ( new_n6022_, new_n3125_ ) -new_n6024_ = NAND ( new_n3146_, new_n1761_ ) -new_n6025_ = NAND ( new_n6019_, new_n3149_ ) -new_n6026_ = OR ( new_n3151_, new_n1757_ ) -new_n6027_ = OR ( new_n3153_, new_n1752_ ) -new_n6028_ = AND ( new_n6027_, new_n6026_, new_n6025_ ) -new_n6029_ = NAND ( new_n6028_, new_n6024_, new_n6023_ ) -new_n6030_ = XOR ( new_n6029_, new_n3157_ ) -new_n6031_ = OR ( new_n6022_, new_n3110_ ) -new_n6032_ = NAND ( new_n3126_, new_n1761_ ) -new_n6033_ = OR ( new_n3136_, new_n1757_ ) -new_n6034_ = OR ( new_n3139_, new_n1752_ ) -new_n6035_ = NAND ( new_n6019_, new_n1353_ ) -new_n6036_ = AND ( new_n6035_, new_n6034_, new_n6033_ ) -new_n6037_ = NAND ( new_n6036_, new_n6032_, new_n6031_ ) -new_n6038_ = OR ( new_n6037_, new_n6030_ ) -new_n6039_ = NAND ( new_n6037_, new_n6030_ ) -new_n6040_ = NAND ( new_n6039_, new_n6038_ ) -new_n6041_ = NAND ( new_n5879_, new_n5874_ ) -new_n6042_ = NAND ( new_n6041_, new_n5876_ ) -new_n6043_ = XOR ( new_n6042_, new_n6040_ ) -new_n6044_ = OR ( new_n6043_, new_n3213_ ) -new_n6045_ = OR ( new_n3210_, new_n1761_ ) -new_n6046_ = OR ( new_n6022_, new_n3216_ ) -new_n6047_ = NAND ( new_n6046_, new_n6045_ ) -new_n6048_ = OR ( new_n6022_, new_n3210_ ) -new_n6049_ = NAND ( new_n6048_, new_n6047_ ) -new_n6050_ = OR ( new_n6048_, new_n6047_ ) -new_n6051_ = NAND ( new_n6050_, new_n6049_ ) -new_n6052_ = NAND ( new_n5892_, new_n5888_ ) -new_n6053_ = NAND ( new_n6052_, new_n5889_ ) -new_n6054_ = XNOR ( new_n6053_, new_n6051_ ) -new_n6055_ = NAND ( new_n6054_, new_n3238_ ) -new_n6056_ = OR ( new_n6022_, new_n3243_ ) -new_n6057_ = NAND ( new_n3253_, new_n1775_ ) -new_n6058_ = NAND ( new_n3257_, new_n1747_ ) -new_n6059_ = NAND ( new_n3207_, NET_421 ) -new_n6060_ = NAND ( new_n4070_, new_n1755_ ) -new_n6061_ = AND ( new_n6060_, new_n6059_, new_n6058_, new_n6057_ ) -NET_8167 = NAND ( new_n6061_, new_n6056_, new_n6055_, new_n6044_ ) -new_n6063_ = OR ( new_n6043_, new_n3267_ ) -new_n6064_ = OR ( new_n1419_, new_n1752_ ) -new_n6065_ = NAND ( new_n1419_, NET_421 ) -new_n6066_ = NAND ( new_n6065_, new_n6064_ ) -new_n6067_ = NAND ( new_n6066_, new_n6019_ ) -new_n6068_ = OR ( new_n6066_, new_n6019_ ) -new_n6069_ = NAND ( new_n5909_, new_n5905_, new_n5904_ ) -new_n6070_ = NAND ( new_n5910_, new_n6069_ ) -new_n6071_ = NAND ( new_n6070_, new_n6068_, new_n6067_ ) -new_n6072_ = NAND ( new_n6068_, new_n6067_ ) -new_n6073_ = NAND ( new_n6072_, new_n5910_, new_n6069_ ) -new_n6074_ = NAND ( new_n6073_, new_n6071_, new_n3275_ ) -new_n6075_ = OR ( new_n6020_, new_n3295_ ) -new_n6076_ = NOR ( new_n3262_, new_n2761_ ) -new_n6077_ = NOR ( NET_520, new_n1626_ ) -new_n6078_ = NOR ( new_n6077_, new_n6076_ ) -NET_8168 = NAND ( new_n6078_, new_n6075_, new_n6074_, new_n6063_ ) -new_n6080_ = OR ( new_n6043_, new_n3307_ ) -new_n6081_ = NAND ( new_n6054_, new_n3311_ ) -new_n6082_ = OR ( new_n6022_, new_n3325_ ) -new_n6083_ = NOT ( new_n6077_ ) -new_n6084_ = NAND ( new_n3321_, new_n1755_ ) -new_n6085_ = NAND ( new_n3327_, new_n1747_ ) -new_n6086_ = NAND ( new_n3329_, new_n1775_ ) -new_n6087_ = AND ( new_n6086_, new_n6085_, new_n6084_, new_n6083_ ) -NET_8169 = NAND ( new_n6087_, new_n6082_, new_n6081_, new_n6080_ ) -new_n6089_ = NOR ( new_n5880_, new_n3489_ ) -new_n6090_ = NAND ( new_n5893_, new_n3492_ ) -new_n6091_ = OR ( new_n5857_, new_n3497_ ) -new_n6092_ = NAND ( new_n3251_, new_n1789_ ) -new_n6093_ = NAND ( new_n3255_, new_n1761_ ) -new_n6094_ = NAND ( new_n6093_, new_n6092_, new_n6091_, new_n6090_ ) -new_n6095_ = NOR ( new_n6094_, new_n6089_ ) -new_n6096_ = NOR ( new_n6095_, new_n3505_ ) -new_n6097_ = NOR ( new_n3504_, new_n1766_ ) -NET_8170 = OR ( new_n6097_, new_n6096_ ) -new_n6099_ = NOR ( new_n6095_, new_n3510_ ) -new_n6100_ = NOR ( new_n3509_, new_n1773_ ) -NET_8171 = OR ( new_n6100_, new_n6099_ ) -new_n6102_ = OR ( new_n5938_, new_n3574_ ) -new_n6103_ = OR ( new_n5112_, new_n3454_ ) -new_n6104_ = NAND ( new_n5092_, new_n3460_ ) -new_n6105_ = NOR ( new_n3442_, new_n4882_ ) -new_n6106_ = NOR ( new_n3378_, new_n5263_ ) -new_n6107_ = NOR ( new_n6106_, new_n6105_ ) -new_n6108_ = NAND ( new_n6107_, new_n6104_, new_n6103_, new_n6102_ ) -new_n6109_ = NAND ( new_n6108_, new_n3470_ ) -new_n6110_ = OR ( new_n3470_, new_n2214_ ) -NET_8222 = NAND ( new_n6110_, new_n6109_ ) -new_n6112_ = NAND ( new_n6108_, new_n3474_ ) -new_n6113_ = NAND ( new_n3476_, NET_107 ) -NET_8223 = NAND ( new_n6113_, new_n6112_ ) -new_n6115_ = OR ( new_n1078_, NET_487 ) -new_n6116_ = NOT ( NET_3 ) -new_n6117_ = OR ( new_n1078_, NET_242 ) -new_n6118_ = NAND ( new_n1078_, new_n2500_ ) -new_n6119_ = NAND ( new_n6118_, new_n6117_ ) -new_n6120_ = OR ( new_n6119_, new_n6116_ ) -new_n6121_ = NAND ( new_n6119_, new_n6116_ ) -new_n6122_ = NAND ( new_n6121_, new_n6120_ ) -new_n6123_ = NOT ( NET_4 ) -new_n6124_ = NOR ( new_n5950_, new_n6123_ ) -new_n6125_ = OR ( new_n6124_, new_n5952_ ) -new_n6126_ = NAND ( new_n5950_, new_n6123_ ) -new_n6127_ = NAND ( new_n6126_, new_n6125_ ) -new_n6128_ = XOR ( new_n6127_, new_n6122_ ) -new_n6129_ = OR ( new_n6128_, new_n1080_ ) -new_n6130_ = NAND ( new_n6129_, new_n6115_ ) -new_n6131_ = OR ( new_n6130_, NET_275 ) -new_n6132_ = OR ( new_n1993_, new_n1127_ ) -new_n6133_ = OR ( new_n1125_, new_n1990_ ) -NET_8281 = NAND ( new_n6133_, new_n6132_, new_n6131_ ) -new_n6135_ = NAND ( new_n3952_, new_n1300_ ) -new_n6136_ = OR ( NET_64, new_n3954_ ) -new_n6137_ = OR ( new_n3957_, new_n1261_ ) -new_n6138_ = NAND ( new_n6137_, new_n6136_ ) -new_n6139_ = OR ( new_n6138_, new_n1300_ ) -new_n6140_ = NAND ( new_n6139_, new_n6135_ ) -new_n6141_ = OR ( new_n6140_, new_n2898_ ) -new_n6142_ = NAND ( new_n2908_, new_n2144_ ) -new_n6143_ = NAND ( new_n6138_, new_n2912_ ) -new_n6144_ = NAND ( new_n6143_, new_n6142_, new_n6141_ ) -new_n6145_ = XOR ( new_n6144_, new_n2915_ ) -new_n6146_ = OR ( new_n6140_, new_n2889_ ) -new_n6147_ = NOT ( new_n2144_ ) -new_n6148_ = OR ( new_n2928_, new_n6147_ ) -new_n6149_ = OR ( new_n2903_, new_n2136_ ) -new_n6150_ = OR ( new_n2905_, new_n2138_ ) -new_n6151_ = NAND ( new_n6150_, new_n6149_, new_n6148_, new_n6146_ ) -new_n6152_ = OR ( new_n6151_, new_n6145_ ) -new_n6153_ = NAND ( new_n6151_, new_n6145_ ) -new_n6154_ = NAND ( new_n6153_, new_n6152_ ) -new_n6155_ = NAND ( new_n5990_, new_n5986_ ) -new_n6156_ = NAND ( new_n6155_, new_n5987_ ) -new_n6157_ = XOR ( new_n6156_, new_n6154_ ) -new_n6158_ = NOR ( new_n6157_, new_n2951_ ) -new_n6159_ = OR ( new_n1290_, new_n2136_ ) -new_n6160_ = NAND ( new_n1290_, NET_177 ) -new_n6161_ = NAND ( new_n6160_, new_n6159_ ) -new_n6162_ = XOR ( new_n6161_, new_n6138_ ) -new_n6163_ = NAND ( new_n5999_, new_n5997_ ) -new_n6164_ = NAND ( new_n6163_, new_n5996_ ) -new_n6165_ = NAND ( new_n6164_, new_n6162_ ) -new_n6166_ = OR ( new_n6164_, new_n6162_ ) -new_n6167_ = NAND ( new_n6166_, new_n6165_, new_n2960_ ) -new_n6168_ = NAND ( new_n6138_, new_n2977_ ) -new_n6169_ = OR ( new_n2949_, new_n2801_ ) -new_n6170_ = OR ( NET_275, new_n2028_ ) -new_n6171_ = NAND ( new_n6170_, new_n6169_, new_n6168_, new_n6167_ ) -NET_8282 = OR ( new_n6171_, new_n6158_ ) -new_n6173_ = OR ( new_n6128_, new_n1078_ ) -new_n6174_ = NAND ( new_n1078_, new_n2464_ ) -new_n6175_ = NAND ( new_n6174_, new_n6173_ ) -new_n6176_ = OR ( new_n6175_, NET_520 ) -new_n6177_ = OR ( new_n1585_, new_n1141_ ) -new_n6178_ = OR ( new_n1101_, new_n1582_ ) -NET_8299 = NAND ( new_n6178_, new_n6177_, new_n6176_ ) -new_n6180_ = NAND ( new_n4019_, new_n1421_ ) -new_n6181_ = OR ( NET_309, new_n1311_ ) -new_n6182_ = OR ( new_n4024_, new_n1103_ ) -new_n6183_ = NAND ( new_n6182_, new_n6181_ ) -new_n6184_ = OR ( new_n6183_, new_n1421_ ) -new_n6185_ = NAND ( new_n6184_, new_n6180_ ) -new_n6186_ = OR ( new_n6185_, new_n3125_ ) -new_n6187_ = NAND ( new_n3146_, new_n1747_ ) -new_n6188_ = NAND ( new_n6183_, new_n3149_ ) -new_n6189_ = OR ( new_n3151_, new_n1743_ ) -new_n6190_ = OR ( new_n3153_, new_n1738_ ) -new_n6191_ = AND ( new_n6190_, new_n6189_, new_n6188_ ) -new_n6192_ = NAND ( new_n6191_, new_n6187_, new_n6186_ ) -new_n6193_ = XOR ( new_n6192_, new_n3157_ ) -new_n6194_ = OR ( new_n6185_, new_n3110_ ) -new_n6195_ = NAND ( new_n3126_, new_n1747_ ) -new_n6196_ = OR ( new_n3136_, new_n1743_ ) -new_n6197_ = OR ( new_n3139_, new_n1738_ ) -new_n6198_ = NAND ( new_n6183_, new_n1353_ ) -new_n6199_ = AND ( new_n6198_, new_n6197_, new_n6196_ ) -new_n6200_ = NAND ( new_n6199_, new_n6195_, new_n6194_ ) -new_n6201_ = OR ( new_n6200_, new_n6193_ ) -new_n6202_ = NAND ( new_n6200_, new_n6193_ ) -new_n6203_ = NAND ( new_n6202_, new_n6201_ ) -new_n6204_ = NAND ( new_n6042_, new_n6038_ ) -new_n6205_ = NAND ( new_n6204_, new_n6039_ ) -new_n6206_ = XOR ( new_n6205_, new_n6203_ ) -new_n6207_ = OR ( new_n6206_, new_n3213_ ) -new_n6208_ = NAND ( new_n3216_, new_n1747_ ) -new_n6209_ = NAND ( new_n6185_, new_n3210_ ) -new_n6210_ = OR ( new_n6185_, new_n3210_ ) -new_n6211_ = NAND ( new_n6210_, new_n6209_, new_n6208_ ) -new_n6212_ = NAND ( new_n6184_, new_n6180_, new_n3216_, new_n1747_ ) -new_n6213_ = NAND ( new_n6212_, new_n6211_ ) -new_n6214_ = NAND ( new_n6053_, new_n6049_ ) -new_n6215_ = NAND ( new_n6214_, new_n6050_ ) -new_n6216_ = XNOR ( new_n6215_, new_n6213_ ) -new_n6217_ = NAND ( new_n6216_, new_n3238_ ) -new_n6218_ = OR ( new_n6185_, new_n3243_ ) -new_n6219_ = NAND ( new_n3253_, new_n1761_ ) -new_n6220_ = NAND ( new_n3257_, new_n1733_ ) -new_n6221_ = NAND ( new_n3207_, NET_422 ) -new_n6222_ = NAND ( new_n4070_, new_n1741_ ) -new_n6223_ = AND ( new_n6222_, new_n6221_, new_n6220_, new_n6219_ ) -NET_8300 = NAND ( new_n6223_, new_n6218_, new_n6217_, new_n6207_ ) -new_n6225_ = OR ( new_n6206_, new_n3267_ ) -new_n6226_ = OR ( new_n1419_, new_n1738_ ) -new_n6227_ = NAND ( new_n1419_, NET_422 ) -new_n6228_ = NAND ( new_n6227_, new_n6226_ ) -new_n6229_ = XOR ( new_n6228_, new_n6183_ ) -new_n6230_ = NAND ( new_n6070_, new_n6068_ ) -new_n6231_ = NAND ( new_n6230_, new_n6067_ ) -new_n6232_ = NAND ( new_n6231_, new_n6229_ ) -new_n6233_ = OR ( new_n6231_, new_n6229_ ) -new_n6234_ = NAND ( new_n6233_, new_n6232_, new_n3275_ ) -new_n6235_ = NAND ( new_n6183_, new_n4493_ ) -new_n6236_ = NOR ( new_n3262_, new_n2802_ ) -new_n6237_ = NOR ( NET_520, new_n1625_ ) -new_n6238_ = NOR ( new_n6237_, new_n6236_ ) -NET_8301 = NAND ( new_n6238_, new_n6235_, new_n6234_, new_n6225_ ) -new_n6240_ = OR ( new_n6206_, new_n3307_ ) -new_n6241_ = NAND ( new_n6216_, new_n3311_ ) -new_n6242_ = OR ( new_n6185_, new_n3325_ ) -new_n6243_ = NOT ( new_n6237_ ) -new_n6244_ = NAND ( new_n3321_, new_n1741_ ) -new_n6245_ = NAND ( new_n3327_, new_n1733_ ) -new_n6246_ = NAND ( new_n3329_, new_n1761_ ) -new_n6247_ = AND ( new_n6246_, new_n6245_, new_n6244_, new_n6243_ ) -NET_8302 = NAND ( new_n6247_, new_n6242_, new_n6241_, new_n6240_ ) -new_n6249_ = NOR ( new_n6043_, new_n3489_ ) -new_n6250_ = NAND ( new_n6054_, new_n3492_ ) -new_n6251_ = OR ( new_n6022_, new_n3497_ ) -new_n6252_ = NAND ( new_n3255_, new_n1747_ ) -new_n6253_ = NAND ( new_n3251_, new_n1775_ ) -new_n6254_ = NAND ( new_n6253_, new_n6252_, new_n6251_, new_n6250_ ) -new_n6255_ = NOR ( new_n6254_, new_n6249_ ) -new_n6256_ = NOR ( new_n6255_, new_n3505_ ) -new_n6257_ = NOR ( new_n3504_, new_n1752_ ) -NET_8304 = OR ( new_n6257_, new_n6256_ ) -new_n6259_ = NOR ( new_n6255_, new_n3510_ ) -new_n6260_ = NOR ( new_n3509_, new_n1759_ ) -NET_8305 = OR ( new_n6260_, new_n6259_ ) -new_n6262_ = NOR ( new_n3019_, new_n5263_ ) -new_n6263_ = NAND ( new_n5256_, new_n3016_ ) -new_n6264_ = XNOR ( new_n6263_, new_n6262_ ) -new_n6265_ = OR ( new_n5937_, new_n5932_ ) -new_n6266_ = NAND ( new_n6265_, new_n5931_ ) -new_n6267_ = NAND ( new_n5937_, new_n5932_ ) -new_n6268_ = NAND ( new_n6267_, new_n6266_ ) -new_n6269_ = XOR ( new_n6268_, new_n6264_ ) -new_n6270_ = OR ( new_n6269_, new_n3035_ ) -new_n6271_ = OR ( new_n5273_, new_n3005_ ) -new_n6272_ = NAND ( new_n5256_, new_n3060_ ) -new_n6273_ = NAND ( new_n3051_, new_n2206_ ) -new_n6274_ = NAND ( new_n3062_, new_n2196_ ) -new_n6275_ = NAND ( new_n3064_, new_n2222_ ) -new_n6276_ = AND ( new_n6275_, new_n6274_, new_n6273_, new_n5286_ ) -NET_8353 = NAND ( new_n6276_, new_n6272_, new_n6271_, new_n6270_ ) -new_n6278_ = OR ( new_n6269_, new_n3373_ ) -new_n6279_ = OR ( new_n5273_, new_n3364_ ) -new_n6280_ = NAND ( new_n5256_, new_n3382_ ) -new_n6281_ = NAND ( new_n3712_, new_n2222_ ) -new_n6282_ = NAND ( new_n3379_, new_n2196_ ) -new_n6283_ = NAND ( new_n3360_, NET_172 ) -new_n6284_ = NAND ( new_n3058_, new_n2206_ ) -new_n6285_ = AND ( new_n6284_, new_n6283_, new_n6282_, new_n6281_ ) -NET_8412 = NAND ( new_n6285_, new_n6280_, new_n6279_, new_n6278_ ) -new_n6287_ = NAND ( new_n4156_, new_n1300_ ) -new_n6288_ = NOR ( NET_64, NET_50 ) -new_n6289_ = AND ( new_n4159_, NET_64 ) -new_n6290_ = NOR ( new_n6289_, new_n6288_ ) -new_n6291_ = OR ( new_n6290_, new_n1300_ ) -new_n6292_ = NAND ( new_n6291_, new_n6287_ ) -new_n6293_ = OR ( new_n6292_, new_n2898_ ) -new_n6294_ = NAND ( new_n2908_, new_n2131_ ) -new_n6295_ = NAND ( new_n6290_, new_n2912_ ) -new_n6296_ = NAND ( new_n6295_, new_n6294_, new_n6293_ ) -new_n6297_ = XOR ( new_n6296_, new_n2915_ ) -new_n6298_ = OR ( new_n6292_, new_n2889_ ) -new_n6299_ = NAND ( new_n2899_, new_n2131_ ) -new_n6300_ = OR ( new_n2903_, new_n2123_ ) -new_n6301_ = OR ( new_n2905_, new_n2125_ ) -new_n6302_ = NAND ( new_n6301_, new_n6300_, new_n6299_, new_n6298_ ) -new_n6303_ = OR ( new_n6302_, new_n6297_ ) -new_n6304_ = NAND ( new_n6302_, new_n6297_ ) -new_n6305_ = NAND ( new_n6304_, new_n6303_ ) -new_n6306_ = NAND ( new_n6156_, new_n6152_ ) -new_n6307_ = NAND ( new_n6306_, new_n6153_ ) -new_n6308_ = XOR ( new_n6307_, new_n6305_ ) -new_n6309_ = NOR ( new_n6308_, new_n2951_ ) -new_n6310_ = OR ( new_n1290_, new_n2123_ ) -new_n6311_ = NAND ( new_n1290_, NET_178 ) -new_n6312_ = NAND ( new_n6311_, new_n6310_ ) -new_n6313_ = XOR ( new_n6312_, new_n6290_ ) -new_n6314_ = OR ( new_n6164_, new_n6138_ ) -new_n6315_ = NAND ( new_n6314_, new_n6161_ ) -new_n6316_ = NAND ( new_n6164_, new_n6138_ ) -new_n6317_ = NAND ( new_n6316_, new_n6315_ ) -new_n6318_ = NAND ( new_n6317_, new_n6313_ ) -new_n6319_ = OR ( new_n6317_, new_n6313_ ) -new_n6320_ = NAND ( new_n6319_, new_n6318_, new_n2960_ ) -new_n6321_ = NAND ( new_n6290_, new_n2977_ ) -new_n6322_ = NAND ( new_n1304_, new_n1301_, NET_275, NET_195 ) -new_n6323_ = NAND ( NET_23564, NET_259 ) -new_n6324_ = NAND ( new_n6323_, new_n6322_, new_n6321_, new_n6320_ ) -NET_8413 = OR ( new_n6324_, new_n6309_ ) -new_n6326_ = NAND ( new_n4215_, new_n1421_ ) -new_n6327_ = NOR ( NET_309, NET_295 ) -new_n6328_ = AND ( new_n4219_, NET_309 ) -new_n6329_ = NOR ( new_n6328_, new_n6327_ ) -new_n6330_ = NOT ( new_n6329_ ) -new_n6331_ = NAND ( new_n6330_, new_n1420_ ) -new_n6332_ = NAND ( new_n6331_, new_n6326_ ) -new_n6333_ = OR ( new_n6332_, new_n3125_ ) -new_n6334_ = NOT ( new_n1733_ ) -new_n6335_ = OR ( new_n3110_, new_n6334_ ) -new_n6336_ = NAND ( new_n6329_, new_n3149_ ) -new_n6337_ = OR ( new_n3151_, new_n1729_ ) -new_n6338_ = OR ( new_n3153_, new_n1724_ ) -new_n6339_ = AND ( new_n6338_, new_n6337_, new_n6336_ ) -new_n6340_ = NAND ( new_n6339_, new_n6335_, new_n6333_ ) -new_n6341_ = XOR ( new_n6340_, new_n3157_ ) -new_n6342_ = OR ( new_n6332_, new_n3110_ ) -new_n6343_ = NAND ( new_n3126_, new_n1733_ ) -new_n6344_ = OR ( new_n3136_, new_n1729_ ) -new_n6345_ = OR ( new_n3139_, new_n1724_ ) -new_n6346_ = NAND ( new_n6329_, new_n1353_ ) -new_n6347_ = AND ( new_n6346_, new_n6345_, new_n6344_ ) -new_n6348_ = NAND ( new_n6347_, new_n6343_, new_n6342_ ) -new_n6349_ = OR ( new_n6348_, new_n6341_ ) -new_n6350_ = NAND ( new_n6348_, new_n6341_ ) -new_n6351_ = NAND ( new_n6350_, new_n6349_ ) -new_n6352_ = NAND ( new_n6205_, new_n6201_ ) -new_n6353_ = NAND ( new_n6352_, new_n6202_ ) -new_n6354_ = XOR ( new_n6353_, new_n6351_ ) -new_n6355_ = OR ( new_n6354_, new_n3213_ ) -new_n6356_ = NAND ( new_n3216_, new_n1733_ ) -new_n6357_ = NAND ( new_n6332_, new_n3210_ ) -new_n6358_ = OR ( new_n6332_, new_n3210_ ) -new_n6359_ = NAND ( new_n6358_, new_n6357_, new_n6356_ ) -new_n6360_ = NOT ( new_n6332_ ) -new_n6361_ = NAND ( new_n6360_, new_n3216_, new_n1733_ ) -new_n6362_ = NAND ( new_n6361_, new_n6359_ ) -new_n6363_ = NAND ( new_n6215_, new_n6211_ ) -new_n6364_ = NAND ( new_n6363_, new_n6212_ ) -new_n6365_ = XNOR ( new_n6364_, new_n6362_ ) -new_n6366_ = NAND ( new_n6365_, new_n3238_ ) -new_n6367_ = OR ( new_n6332_, new_n3243_ ) -new_n6368_ = NAND ( new_n3253_, new_n1747_ ) -new_n6369_ = NAND ( new_n3257_, new_n1719_ ) -new_n6370_ = NAND ( new_n3207_, NET_423 ) -new_n6371_ = NAND ( new_n4070_, new_n1727_ ) -new_n6372_ = AND ( new_n6371_, new_n6370_, new_n6369_, new_n6368_ ) -NET_8424 = NAND ( new_n6372_, new_n6367_, new_n6366_, new_n6355_ ) -new_n6374_ = OR ( new_n6354_, new_n3267_ ) -new_n6375_ = OR ( new_n1419_, new_n1724_ ) -new_n6376_ = NAND ( new_n1419_, NET_423 ) -new_n6377_ = NAND ( new_n6376_, new_n6375_ ) -new_n6378_ = XOR ( new_n6377_, new_n6329_ ) -new_n6379_ = OR ( new_n6231_, new_n6183_ ) -new_n6380_ = NAND ( new_n6379_, new_n6228_ ) -new_n6381_ = NAND ( new_n6231_, new_n6183_ ) -new_n6382_ = NAND ( new_n6381_, new_n6380_ ) -new_n6383_ = NAND ( new_n6382_, new_n6378_ ) -new_n6384_ = OR ( new_n6382_, new_n6378_ ) -new_n6385_ = NAND ( new_n6384_, new_n6383_, new_n3275_ ) -new_n6386_ = OR ( new_n6330_, new_n3295_ ) -new_n6387_ = NOT ( NET_440 ) -new_n6388_ = NOR ( new_n3262_, new_n6387_ ) -new_n6389_ = NOT ( NET_504 ) -new_n6390_ = NOR ( NET_520, new_n6389_ ) -new_n6391_ = NOR ( new_n6390_, new_n6388_ ) -NET_8425 = NAND ( new_n6391_, new_n6386_, new_n6385_, new_n6374_ ) -new_n6393_ = OR ( new_n6354_, new_n3307_ ) -new_n6394_ = NAND ( new_n6365_, new_n3311_ ) -new_n6395_ = OR ( new_n6332_, new_n3325_ ) -new_n6396_ = NOT ( new_n6390_ ) -new_n6397_ = NAND ( new_n3321_, new_n1727_ ) -new_n6398_ = NAND ( new_n3327_, new_n1719_ ) -new_n6399_ = NAND ( new_n3329_, new_n1747_ ) -new_n6400_ = AND ( new_n6399_, new_n6398_, new_n6397_, new_n6396_ ) -NET_8426 = NAND ( new_n6400_, new_n6395_, new_n6394_, new_n6393_ ) -new_n6402_ = NOR ( new_n6206_, new_n3489_ ) -new_n6403_ = NAND ( new_n6216_, new_n3492_ ) -new_n6404_ = OR ( new_n6185_, new_n3497_ ) -new_n6405_ = NAND ( new_n3255_, new_n1733_ ) -new_n6406_ = NAND ( new_n3251_, new_n1761_ ) -new_n6407_ = NAND ( new_n6406_, new_n6405_, new_n6404_, new_n6403_ ) -new_n6408_ = NOR ( new_n6407_, new_n6402_ ) -new_n6409_ = NOR ( new_n6408_, new_n3505_ ) -new_n6410_ = NOR ( new_n3504_, new_n1738_ ) -NET_8428 = OR ( new_n6410_, new_n6409_ ) -new_n6412_ = NOR ( new_n6408_, new_n3510_ ) -new_n6413_ = NOR ( new_n3509_, new_n1745_ ) -NET_8429 = OR ( new_n6413_, new_n6412_ ) -new_n6415_ = OR ( new_n1078_, NET_488 ) -new_n6416_ = NOT ( NET_2 ) -new_n6417_ = OR ( new_n1078_, NET_243 ) -new_n6418_ = NAND ( new_n1078_, new_n1609_ ) -new_n6419_ = NAND ( new_n6418_, new_n6417_ ) -new_n6420_ = OR ( new_n6419_, new_n6416_ ) -new_n6421_ = NAND ( new_n6419_, new_n6416_ ) -new_n6422_ = NAND ( new_n6421_, new_n6420_ ) -new_n6423_ = NAND ( new_n6127_, new_n6120_ ) -new_n6424_ = NAND ( new_n6423_, new_n6121_ ) -new_n6425_ = XOR ( new_n6424_, new_n6422_ ) -new_n6426_ = OR ( new_n6425_, new_n1080_ ) -new_n6427_ = NAND ( new_n6426_, new_n6415_ ) -new_n6428_ = OR ( new_n6427_, NET_275 ) -new_n6429_ = OR ( new_n1125_, new_n1995_ ) -new_n6430_ = OR ( new_n1997_, new_n1127_ ) -NET_8466 = NAND ( new_n6430_, new_n6429_, new_n6428_ ) -new_n6432_ = OR ( new_n6269_, new_n3574_ ) -new_n6433_ = OR ( new_n5273_, new_n3454_ ) -new_n6434_ = NAND ( new_n5256_, new_n3460_ ) -new_n6435_ = NOR ( new_n3442_, new_n5101_ ) -new_n6436_ = NOR ( new_n3378_, new_n5438_ ) -new_n6437_ = NOR ( new_n6436_, new_n6435_ ) -new_n6438_ = NAND ( new_n6437_, new_n6434_, new_n6433_, new_n6432_ ) -new_n6439_ = NAND ( new_n6438_, new_n3470_ ) -new_n6440_ = OR ( new_n3470_, new_n2201_ ) -NET_8468 = NAND ( new_n6440_, new_n6439_ ) -new_n6442_ = NAND ( new_n6438_, new_n3474_ ) -new_n6443_ = NAND ( new_n3476_, NET_108 ) -NET_8469 = NAND ( new_n6443_, new_n6442_ ) -new_n6445_ = OR ( new_n6425_, new_n1078_ ) -new_n6446_ = NAND ( new_n1078_, new_n2014_ ) -new_n6447_ = NAND ( new_n6446_, new_n6445_ ) -new_n6448_ = OR ( new_n6447_, NET_520 ) -new_n6449_ = OR ( new_n1101_, new_n1593_ ) -new_n6450_ = OR ( new_n1588_, new_n1141_ ) -NET_8484 = NAND ( new_n6450_, new_n6449_, new_n6448_ ) -new_n6452_ = OR ( new_n1078_, NET_489 ) -new_n6453_ = NAND ( new_n6423_, new_n6421_, new_n6121_ ) -new_n6454_ = OR ( new_n1078_, NET_244 ) -new_n6455_ = NAND ( new_n1078_, new_n1579_ ) -new_n6456_ = NAND ( new_n6455_, new_n6454_ ) -new_n6457_ = NAND ( new_n6456_, NET_1 ) -new_n6458_ = OR ( new_n6456_, NET_1 ) -new_n6459_ = NAND ( new_n6458_, new_n6457_, new_n6453_, new_n6420_ ) -new_n6460_ = NAND ( new_n6424_, new_n6420_ ) -new_n6461_ = NAND ( new_n6458_, new_n6457_ ) -new_n6462_ = NAND ( new_n6461_, new_n6460_, new_n6421_ ) -new_n6463_ = NAND ( new_n6462_, new_n6459_ ) -new_n6464_ = NAND ( new_n6463_, new_n1078_ ) -new_n6465_ = NAND ( new_n6464_, new_n6452_ ) -new_n6466_ = OR ( new_n6465_, NET_275 ) -new_n6467_ = OR ( new_n1996_, new_n1261_, NET_63, NET_23564 ) -NET_8539 = NAND ( new_n6467_, new_n6466_ ) -new_n6469_ = NAND ( new_n4318_, new_n1300_ ) -new_n6470_ = OR ( NET_64, new_n2857_ ) -new_n6471_ = OR ( new_n4323_, new_n1261_ ) -new_n6472_ = NAND ( new_n6471_, new_n6470_ ) -new_n6473_ = OR ( new_n6472_, new_n1300_ ) -new_n6474_ = NAND ( new_n6473_, new_n6469_ ) -new_n6475_ = OR ( new_n6474_, new_n2898_ ) -new_n6476_ = NAND ( new_n2908_, new_n2118_ ) -new_n6477_ = NAND ( new_n6472_, new_n2912_ ) -new_n6478_ = NAND ( new_n6477_, new_n6476_, new_n6475_ ) -new_n6479_ = XOR ( new_n6478_, new_n2915_ ) -new_n6480_ = OR ( new_n6474_, new_n2889_ ) -new_n6481_ = NAND ( new_n2899_, new_n2118_ ) -new_n6482_ = OR ( new_n2903_, new_n2110_ ) -new_n6483_ = OR ( new_n2905_, new_n2112_ ) -new_n6484_ = NAND ( new_n6483_, new_n6482_, new_n6481_, new_n6480_ ) -new_n6485_ = OR ( new_n6484_, new_n6479_ ) -new_n6486_ = NAND ( new_n6484_, new_n6479_ ) -new_n6487_ = NAND ( new_n6486_, new_n6485_ ) -new_n6488_ = NAND ( new_n6307_, new_n6303_ ) -new_n6489_ = NAND ( new_n6488_, new_n6304_ ) -new_n6490_ = XOR ( new_n6489_, new_n6487_ ) -new_n6491_ = NOR ( new_n6490_, new_n2951_ ) -new_n6492_ = OR ( new_n1290_, new_n2110_ ) -new_n6493_ = NAND ( new_n1290_, NET_179 ) -new_n6494_ = NAND ( new_n6493_, new_n6492_ ) -new_n6495_ = XOR ( new_n6494_, new_n6472_ ) -new_n6496_ = OR ( new_n6317_, new_n6290_ ) -new_n6497_ = NAND ( new_n6496_, new_n6312_ ) -new_n6498_ = NAND ( new_n6317_, new_n6290_ ) -new_n6499_ = NAND ( new_n6498_, new_n6497_ ) -new_n6500_ = NAND ( new_n6499_, new_n6495_ ) -new_n6501_ = OR ( new_n6499_, new_n6495_ ) -new_n6502_ = NAND ( new_n6501_, new_n6500_, new_n2960_ ) -new_n6503_ = NAND ( new_n6472_, new_n2977_ ) -new_n6504_ = NAND ( new_n1304_, new_n1301_, NET_275, NET_194 ) -new_n6505_ = OR ( NET_275, new_n2027_ ) -new_n6506_ = NAND ( new_n6505_, new_n6504_, new_n6503_, new_n6502_ ) -NET_8540 = OR ( new_n6506_, new_n6491_ ) -new_n6508_ = NAND ( new_n6463_, new_n1080_ ) -new_n6509_ = NAND ( new_n1078_, new_n1988_ ) -new_n6510_ = NAND ( new_n6509_, new_n6508_ ) -new_n6511_ = OR ( new_n6510_, NET_520 ) -new_n6512_ = NAND ( new_n1587_, NET_520, NET_309, new_n1593_ ) -NET_8556 = NAND ( new_n6512_, new_n6511_ ) -new_n6514_ = NAND ( new_n4345_, new_n1421_ ) -new_n6515_ = OR ( NET_309, new_n4347_ ) -new_n6516_ = OR ( new_n4351_, new_n1103_ ) -new_n6517_ = NAND ( new_n6516_, new_n6515_ ) -new_n6518_ = OR ( new_n6517_, new_n1421_ ) -new_n6519_ = NAND ( new_n6518_, new_n6514_ ) -new_n6520_ = OR ( new_n6519_, new_n3125_ ) -new_n6521_ = NAND ( new_n3146_, new_n1719_ ) -new_n6522_ = NAND ( new_n6517_, new_n3149_ ) -new_n6523_ = OR ( new_n3151_, new_n1715_ ) -new_n6524_ = OR ( new_n3153_, new_n1710_ ) -new_n6525_ = AND ( new_n6524_, new_n6523_, new_n6522_ ) -new_n6526_ = NAND ( new_n6525_, new_n6521_, new_n6520_ ) -new_n6527_ = XOR ( new_n6526_, new_n3157_ ) -new_n6528_ = OR ( new_n6519_, new_n3110_ ) -new_n6529_ = NAND ( new_n3126_, new_n1719_ ) -new_n6530_ = OR ( new_n3136_, new_n1715_ ) -new_n6531_ = OR ( new_n3139_, new_n1710_ ) -new_n6532_ = NAND ( new_n6517_, new_n1353_ ) -new_n6533_ = AND ( new_n6532_, new_n6531_, new_n6530_ ) -new_n6534_ = NAND ( new_n6533_, new_n6529_, new_n6528_ ) -new_n6535_ = OR ( new_n6534_, new_n6527_ ) -new_n6536_ = NAND ( new_n6534_, new_n6527_ ) -new_n6537_ = NAND ( new_n6536_, new_n6535_ ) -new_n6538_ = NAND ( new_n6353_, new_n6349_ ) -new_n6539_ = NAND ( new_n6538_, new_n6350_ ) -new_n6540_ = XOR ( new_n6539_, new_n6537_ ) -new_n6541_ = OR ( new_n6540_, new_n3213_ ) -new_n6542_ = NAND ( new_n3216_, new_n1719_ ) -new_n6543_ = NAND ( new_n6519_, new_n3210_ ) -new_n6544_ = OR ( new_n6519_, new_n3210_ ) -new_n6545_ = NAND ( new_n6544_, new_n6543_, new_n6542_ ) -new_n6546_ = NAND ( new_n6518_, new_n6514_, new_n3216_, new_n1719_ ) -new_n6547_ = NAND ( new_n6546_, new_n6545_ ) -new_n6548_ = NAND ( new_n6364_, new_n6359_ ) -new_n6549_ = NAND ( new_n6548_, new_n6361_ ) -new_n6550_ = XNOR ( new_n6549_, new_n6547_ ) -new_n6551_ = NAND ( new_n6550_, new_n3238_ ) -new_n6552_ = OR ( new_n6519_, new_n3243_ ) -new_n6553_ = NAND ( new_n3253_, new_n1733_ ) -new_n6554_ = NAND ( new_n3257_, new_n1705_ ) -new_n6555_ = NAND ( new_n3207_, NET_424 ) -new_n6556_ = NAND ( new_n4070_, new_n1713_ ) -new_n6557_ = AND ( new_n6556_, new_n6555_, new_n6554_, new_n6553_ ) -NET_8557 = NAND ( new_n6557_, new_n6552_, new_n6551_, new_n6541_ ) -new_n6559_ = OR ( new_n6540_, new_n3267_ ) -new_n6560_ = OR ( new_n1419_, new_n1710_ ) -new_n6561_ = NAND ( new_n1419_, NET_424 ) -new_n6562_ = NAND ( new_n6561_, new_n6560_ ) -new_n6563_ = XOR ( new_n6562_, new_n6517_ ) -new_n6564_ = OR ( new_n6382_, new_n6329_ ) -new_n6565_ = NAND ( new_n6564_, new_n6377_ ) -new_n6566_ = NAND ( new_n6382_, new_n6329_ ) -new_n6567_ = NAND ( new_n6566_, new_n6565_ ) -new_n6568_ = NAND ( new_n6567_, new_n6563_ ) -new_n6569_ = OR ( new_n6567_, new_n6563_ ) -new_n6570_ = NAND ( new_n6569_, new_n6568_, new_n3275_ ) -new_n6571_ = NAND ( new_n6517_, new_n4493_ ) -new_n6572_ = NOT ( NET_439 ) -new_n6573_ = NOR ( new_n3262_, new_n6572_ ) -new_n6574_ = NOR ( NET_520, new_n1624_ ) -new_n6575_ = NOR ( new_n6574_, new_n6573_ ) -NET_8558 = NAND ( new_n6575_, new_n6571_, new_n6570_, new_n6559_ ) -new_n6577_ = OR ( new_n6540_, new_n3307_ ) -new_n6578_ = NAND ( new_n6550_, new_n3311_ ) -new_n6579_ = OR ( new_n6519_, new_n3325_ ) -new_n6580_ = NOT ( new_n6574_ ) -new_n6581_ = NAND ( new_n3321_, new_n1713_ ) -new_n6582_ = NAND ( new_n3327_, new_n1705_ ) -new_n6583_ = NAND ( new_n3329_, new_n1733_ ) -new_n6584_ = AND ( new_n6583_, new_n6582_, new_n6581_, new_n6580_ ) -NET_8559 = NAND ( new_n6584_, new_n6579_, new_n6578_, new_n6577_ ) -new_n6586_ = NOR ( new_n6354_, new_n3489_ ) -new_n6587_ = NAND ( new_n6365_, new_n3492_ ) -new_n6588_ = OR ( new_n6332_, new_n3497_ ) -new_n6589_ = NAND ( new_n3255_, new_n1719_ ) -new_n6590_ = NAND ( new_n3251_, new_n1747_ ) -new_n6591_ = NAND ( new_n6590_, new_n6589_, new_n6588_, new_n6587_ ) -new_n6592_ = NOR ( new_n6591_, new_n6586_ ) -new_n6593_ = NOR ( new_n6592_, new_n3505_ ) -new_n6594_ = NOR ( new_n3504_, new_n1724_ ) -NET_8560 = OR ( new_n6594_, new_n6593_ ) -new_n6596_ = NOR ( new_n6592_, new_n3510_ ) -new_n6597_ = NOR ( new_n3509_, new_n1731_ ) -NET_8561 = OR ( new_n6597_, new_n6596_ ) -new_n6599_ = NOR ( new_n3019_, new_n5438_ ) -new_n6600_ = OR ( new_n5431_, new_n3017_ ) -new_n6601_ = XNOR ( new_n6600_, new_n6599_ ) -new_n6602_ = OR ( new_n6268_, new_n6263_ ) -new_n6603_ = NAND ( new_n6602_, new_n6262_ ) -new_n6604_ = NAND ( new_n6268_, new_n6263_ ) -new_n6605_ = NAND ( new_n6604_, new_n6603_ ) -new_n6606_ = XOR ( new_n6605_, new_n6601_ ) -new_n6607_ = OR ( new_n6606_, new_n3035_ ) -new_n6608_ = OR ( new_n5448_, new_n3005_ ) -new_n6609_ = NOT ( new_n5431_ ) -new_n6610_ = NAND ( new_n6609_, new_n3060_ ) -new_n6611_ = NAND ( new_n3051_, new_n2193_ ) -new_n6612_ = NAND ( new_n3062_, new_n2183_ ) -new_n6613_ = NAND ( new_n3064_, new_n2209_ ) -new_n6614_ = AND ( new_n6613_, new_n6612_, new_n6611_, new_n5463_ ) -NET_8599 = NAND ( new_n6614_, new_n6610_, new_n6608_, new_n6607_ ) -new_n6616_ = OR ( new_n6606_, new_n3373_ ) -new_n6617_ = OR ( new_n5448_, new_n3364_ ) -new_n6618_ = OR ( new_n5431_, new_n4374_ ) -new_n6619_ = NAND ( new_n3712_, new_n2209_ ) -new_n6620_ = NAND ( new_n3379_, new_n2183_ ) -new_n6621_ = NAND ( new_n3360_, NET_173 ) -new_n6622_ = NAND ( new_n3058_, new_n2193_ ) -new_n6623_ = AND ( new_n6622_, new_n6621_, new_n6620_, new_n6619_ ) -NET_8650 = NAND ( new_n6623_, new_n6618_, new_n6617_, new_n6616_ ) -new_n6625_ = NAND ( new_n4519_, new_n1300_ ) -new_n6626_ = NAND ( new_n2869_, new_n1299_ ) -new_n6627_ = NAND ( new_n6626_, new_n6625_ ) -new_n6628_ = OR ( new_n6627_, new_n2898_ ) -new_n6629_ = NAND ( new_n2908_, new_n2105_ ) -new_n6630_ = NAND ( new_n2912_, new_n2870_ ) -new_n6631_ = NAND ( new_n6630_, new_n6629_, new_n6628_ ) -new_n6632_ = XOR ( new_n6631_, new_n2915_ ) -new_n6633_ = OR ( new_n6627_, new_n2889_ ) -new_n6634_ = NAND ( new_n2899_, new_n2105_ ) -new_n6635_ = NOR ( new_n2905_, new_n2098_ ) -new_n6636_ = NOR ( new_n2903_, new_n2095_ ) -new_n6637_ = NOR ( new_n6636_, new_n6635_ ) -new_n6638_ = NAND ( new_n6637_, new_n6634_, new_n6633_ ) -new_n6639_ = OR ( new_n6638_, new_n6632_ ) -new_n6640_ = NAND ( new_n6638_, new_n6632_ ) -new_n6641_ = NAND ( new_n6640_, new_n6639_ ) -new_n6642_ = NAND ( new_n6489_, new_n6485_ ) -new_n6643_ = NAND ( new_n6642_, new_n6486_ ) -new_n6644_ = XOR ( new_n6643_, new_n6641_ ) -new_n6645_ = OR ( new_n6644_, new_n2951_ ) -new_n6646_ = NAND ( new_n6494_, new_n6472_ ) -new_n6647_ = NAND ( new_n6646_, new_n6498_, new_n6497_ ) -new_n6648_ = OR ( new_n6494_, new_n6472_ ) -new_n6649_ = OR ( new_n1290_, new_n2095_ ) -new_n6650_ = NAND ( new_n1290_, NET_180 ) -new_n6651_ = NAND ( new_n6650_, new_n6649_ ) -new_n6652_ = OR ( new_n6651_, new_n2869_ ) -new_n6653_ = NAND ( new_n6651_, new_n2869_ ) -new_n6654_ = NAND ( new_n6653_, new_n6652_ ) -new_n6655_ = NAND ( new_n6654_, new_n6648_, new_n6647_ ) -new_n6656_ = NAND ( new_n6648_, new_n6499_ ) -new_n6657_ = NAND ( new_n6656_, new_n6653_, new_n6652_, new_n6646_ ) -new_n6658_ = NAND ( new_n6657_, new_n6655_, new_n2960_ ) -new_n6659_ = NAND ( new_n2975_, new_n2950_, new_n2870_ ) -new_n6660_ = NOR ( new_n2869_, new_n1284_ ) -new_n6661_ = NAND ( new_n6660_, new_n2949_, new_n2972_, NET_275 ) -new_n6662_ = OR ( new_n2949_, new_n1075_ ) -new_n6663_ = OR ( NET_275, new_n2026_ ) -new_n6664_ = AND ( new_n6663_, new_n6662_, new_n6661_ ) -NET_8651 = NAND ( new_n6664_, new_n6659_, new_n6658_, new_n6645_ ) -new_n6666_ = NAND ( new_n4539_, new_n1421_ ) -new_n6667_ = NAND ( new_n3087_, new_n1420_ ) -new_n6668_ = NAND ( new_n6667_, new_n6666_ ) -new_n6669_ = OR ( new_n6668_, new_n3125_ ) -new_n6670_ = NOT ( new_n1705_ ) -new_n6671_ = OR ( new_n3110_, new_n6670_ ) -new_n6672_ = NAND ( new_n3149_, new_n3088_ ) -new_n6673_ = OR ( new_n3151_, new_n1700_ ) -new_n6674_ = OR ( new_n3153_, new_n1695_ ) -new_n6675_ = AND ( new_n6674_, new_n6673_, new_n6672_ ) -new_n6676_ = NAND ( new_n6675_, new_n6671_, new_n6669_ ) -new_n6677_ = XOR ( new_n6676_, new_n3157_ ) -new_n6678_ = OR ( new_n6668_, new_n3110_ ) -new_n6679_ = NAND ( new_n3126_, new_n1705_ ) -new_n6680_ = NAND ( new_n3088_, new_n1353_ ) -new_n6681_ = NOR ( new_n3136_, new_n1700_ ) -new_n6682_ = NOR ( new_n3139_, new_n1695_ ) -new_n6683_ = NOR ( new_n6682_, new_n6681_ ) -new_n6684_ = NAND ( new_n6683_, new_n6680_, new_n6679_, new_n6678_ ) -new_n6685_ = OR ( new_n6684_, new_n6677_ ) -new_n6686_ = NAND ( new_n6684_, new_n6677_ ) -new_n6687_ = NAND ( new_n6686_, new_n6685_ ) -new_n6688_ = NAND ( new_n6539_, new_n6535_ ) -new_n6689_ = NAND ( new_n6688_, new_n6536_ ) -new_n6690_ = XOR ( new_n6689_, new_n6687_ ) -new_n6691_ = OR ( new_n6690_, new_n3213_ ) -new_n6692_ = NAND ( new_n3216_, new_n1705_ ) -new_n6693_ = NAND ( new_n6668_, new_n3210_ ) -new_n6694_ = OR ( new_n6668_, new_n3210_ ) -new_n6695_ = NAND ( new_n6694_, new_n6693_, new_n6692_ ) -new_n6696_ = NOT ( new_n6668_ ) -new_n6697_ = NAND ( new_n6696_, new_n3216_, new_n1705_ ) -new_n6698_ = NAND ( new_n6697_, new_n6695_ ) -new_n6699_ = NAND ( new_n6549_, new_n6545_ ) -new_n6700_ = NAND ( new_n6699_, new_n6546_ ) -new_n6701_ = XNOR ( new_n6700_, new_n6698_ ) -new_n6702_ = NAND ( new_n6701_, new_n3238_ ) -new_n6703_ = OR ( new_n6668_, new_n3243_ ) -new_n6704_ = NAND ( new_n3257_, new_n1690_ ) -new_n6705_ = NAND ( new_n3253_, new_n1719_ ) -new_n6706_ = NAND ( new_n3207_, NET_425 ) -new_n6707_ = NAND ( new_n4070_, new_n1698_ ) -new_n6708_ = AND ( new_n6707_, new_n6706_, new_n6705_, new_n6704_ ) -NET_8657 = NAND ( new_n6708_, new_n6703_, new_n6702_, new_n6691_ ) -new_n6710_ = OR ( new_n6690_, new_n3267_ ) -new_n6711_ = NAND ( new_n6562_, new_n6517_ ) -new_n6712_ = NAND ( new_n6711_, new_n6566_, new_n6565_ ) -new_n6713_ = OR ( new_n6562_, new_n6517_ ) -new_n6714_ = OR ( new_n1419_, new_n1695_ ) -new_n6715_ = NAND ( new_n1419_, NET_425 ) -new_n6716_ = NAND ( new_n6715_, new_n6714_ ) -new_n6717_ = OR ( new_n6716_, new_n3087_ ) -new_n6718_ = NAND ( new_n6716_, new_n3087_ ) -new_n6719_ = NAND ( new_n6718_, new_n6717_ ) -new_n6720_ = NAND ( new_n6719_, new_n6713_, new_n6712_ ) -new_n6721_ = NAND ( new_n6713_, new_n6567_ ) -new_n6722_ = NAND ( new_n6721_, new_n6718_, new_n6717_, new_n6711_ ) -new_n6723_ = NAND ( new_n6722_, new_n6720_, new_n3275_ ) -new_n6724_ = OR ( new_n3295_, new_n3087_ ) -new_n6725_ = NOR ( new_n3262_, new_n1076_ ) -new_n6726_ = NOR ( NET_520, new_n1623_ ) -new_n6727_ = NOR ( new_n6726_, new_n6725_ ) -NET_8658 = NAND ( new_n6727_, new_n6724_, new_n6723_, new_n6710_ ) -new_n6729_ = OR ( new_n6690_, new_n3307_ ) -new_n6730_ = NAND ( new_n6701_, new_n3311_ ) -new_n6731_ = OR ( new_n6668_, new_n3325_ ) -new_n6732_ = NOT ( new_n6726_ ) -new_n6733_ = NAND ( new_n3321_, new_n1698_ ) -new_n6734_ = NAND ( new_n3327_, new_n1690_ ) -new_n6735_ = NAND ( new_n3329_, new_n1719_ ) -new_n6736_ = AND ( new_n6735_, new_n6734_, new_n6733_, new_n6732_ ) -NET_8659 = NAND ( new_n6736_, new_n6731_, new_n6730_, new_n6729_ ) -new_n6738_ = NOR ( new_n6540_, new_n3489_ ) -new_n6739_ = NAND ( new_n6550_, new_n3492_ ) -new_n6740_ = OR ( new_n6519_, new_n3497_ ) -new_n6741_ = NAND ( new_n3255_, new_n1705_ ) -new_n6742_ = NAND ( new_n3251_, new_n1733_ ) -new_n6743_ = NAND ( new_n6742_, new_n6741_, new_n6740_, new_n6739_ ) -new_n6744_ = NOR ( new_n6743_, new_n6738_ ) -new_n6745_ = NOR ( new_n6744_, new_n3505_ ) -new_n6746_ = NOR ( new_n3504_, new_n1710_ ) -NET_8661 = OR ( new_n6746_, new_n6745_ ) -new_n6748_ = NOR ( new_n6744_, new_n3510_ ) -new_n6749_ = NOR ( new_n3509_, new_n1717_ ) -NET_8662 = OR ( new_n6749_, new_n6748_ ) -new_n6751_ = OR ( new_n6606_, new_n3574_ ) -new_n6752_ = OR ( new_n5448_, new_n3454_ ) -new_n6753_ = OR ( new_n5431_, new_n3461_ ) -new_n6754_ = NOR ( new_n3442_, new_n5263_ ) -new_n6755_ = NOR ( new_n3378_, new_n5600_ ) -new_n6756_ = NOR ( new_n6755_, new_n6754_ ) -new_n6757_ = NAND ( new_n6756_, new_n6753_, new_n6752_, new_n6751_ ) -new_n6758_ = NAND ( new_n6757_, new_n3470_ ) -new_n6759_ = OR ( new_n3470_, new_n2188_ ) -NET_8692 = NAND ( new_n6759_, new_n6758_ ) -new_n6761_ = NAND ( new_n6757_, new_n3474_ ) -new_n6762_ = NAND ( new_n3476_, NET_109 ) -NET_8693 = NAND ( new_n6762_, new_n6761_ ) -new_n6764_ = NOT ( new_n3125_ ) -new_n6765_ = NOR ( new_n4698_, new_n1420_ ) -new_n6766_ = NAND ( new_n6765_, new_n6764_ ) -new_n6767_ = NAND ( new_n3146_, new_n1690_ ) -new_n6768_ = NAND ( new_n6767_, new_n6766_, new_n6672_ ) -new_n6769_ = XOR ( new_n6768_, new_n3157_ ) -new_n6770_ = NAND ( new_n6765_, new_n3146_ ) -new_n6771_ = NAND ( new_n3126_, new_n1690_ ) -new_n6772_ = NAND ( new_n6771_, new_n6770_, new_n6683_ ) -new_n6773_ = OR ( new_n6772_, new_n6769_ ) -new_n6774_ = NAND ( new_n6772_, new_n6769_ ) -new_n6775_ = NAND ( new_n6774_, new_n6773_ ) -new_n6776_ = NAND ( new_n6689_, new_n6685_ ) -new_n6777_ = NAND ( new_n6776_, new_n6686_ ) -new_n6778_ = XOR ( new_n6777_, new_n6775_ ) -new_n6779_ = OR ( new_n6778_, new_n3213_ ) -new_n6780_ = NAND ( new_n6765_, new_n3216_ ) -new_n6781_ = OR ( new_n3210_, new_n1690_ ) -new_n6782_ = NAND ( new_n6765_, new_n3210_ ) -new_n6783_ = NAND ( new_n6782_, new_n6781_ ) -new_n6784_ = NAND ( new_n6783_, new_n6780_ ) -new_n6785_ = OR ( new_n6783_, new_n6780_ ) -new_n6786_ = NAND ( new_n6785_, new_n6784_ ) -new_n6787_ = NAND ( new_n6700_, new_n6695_ ) -new_n6788_ = NAND ( new_n6787_, new_n6697_ ) -new_n6789_ = XNOR ( new_n6788_, new_n6786_ ) -new_n6790_ = NAND ( new_n6789_, new_n3238_ ) -new_n6791_ = NOT ( new_n3243_ ) -new_n6792_ = NAND ( new_n6765_, new_n6791_ ) -new_n6793_ = NAND ( new_n3257_, new_n1677_ ) -new_n6794_ = NAND ( new_n3253_, new_n1705_ ) -new_n6795_ = NAND ( new_n4070_, new_n1683_ ) -new_n6796_ = NAND ( new_n3207_, NET_426 ) -new_n6797_ = AND ( new_n6796_, new_n6795_, new_n6794_, new_n6793_ ) -NET_8736 = NAND ( new_n6797_, new_n6792_, new_n6790_, new_n6779_ ) -new_n6799_ = OR ( new_n6778_, new_n3307_ ) -new_n6800_ = NAND ( new_n6789_, new_n3311_ ) -new_n6801_ = NAND ( new_n6765_, new_n3324_ ) -new_n6802_ = NAND ( new_n3321_, new_n1683_ ) -new_n6803_ = NAND ( new_n3327_, new_n1677_ ) -new_n6804_ = NAND ( NET_23567, NET_499 ) -new_n6805_ = NAND ( new_n3329_, new_n1705_ ) -new_n6806_ = AND ( new_n6805_, new_n6804_, new_n6803_, new_n6802_ ) -NET_8737 = NAND ( new_n6806_, new_n6801_, new_n6800_, new_n6799_ ) -new_n6808_ = NOR ( new_n6690_, new_n3489_ ) -new_n6809_ = NAND ( new_n6701_, new_n3492_ ) -new_n6810_ = OR ( new_n6668_, new_n3497_ ) -new_n6811_ = NAND ( new_n3251_, new_n1719_ ) -new_n6812_ = NAND ( new_n3255_, new_n1690_ ) -new_n6813_ = NAND ( new_n6812_, new_n6811_, new_n6810_, new_n6809_ ) -new_n6814_ = NOR ( new_n6813_, new_n6808_ ) -new_n6815_ = NOR ( new_n6814_, new_n3505_ ) -new_n6816_ = NOR ( new_n3504_, new_n1695_ ) -NET_8738 = OR ( new_n6816_, new_n6815_ ) -new_n6818_ = NOR ( new_n6814_, new_n3510_ ) -new_n6819_ = NOR ( new_n3509_, new_n1703_ ) -NET_8739 = OR ( new_n6819_, new_n6818_ ) -new_n6821_ = NOR ( new_n3019_, new_n5600_ ) -new_n6822_ = OR ( new_n5592_, new_n3017_ ) -new_n6823_ = XNOR ( new_n6822_, new_n6821_ ) -new_n6824_ = OR ( new_n6605_, new_n6600_ ) -new_n6825_ = NAND ( new_n6824_, new_n6599_ ) -new_n6826_ = NAND ( new_n6605_, new_n6600_ ) -new_n6827_ = NAND ( new_n6826_, new_n6825_ ) -new_n6828_ = XOR ( new_n6827_, new_n6823_ ) -new_n6829_ = OR ( new_n6828_, new_n3035_ ) -new_n6830_ = OR ( new_n5610_, new_n3005_ ) -new_n6831_ = NOT ( new_n5592_ ) -new_n6832_ = NAND ( new_n6831_, new_n3060_ ) -new_n6833_ = NAND ( new_n3051_, new_n2180_ ) -new_n6834_ = NAND ( new_n3062_, new_n2170_ ) -new_n6835_ = NAND ( new_n3064_, new_n2196_ ) -new_n6836_ = AND ( new_n6835_, new_n6834_, new_n6833_, new_n5625_ ) -NET_8758 = NAND ( new_n6836_, new_n6832_, new_n6830_, new_n6829_ ) -new_n6838_ = OR ( new_n6828_, new_n3373_ ) -new_n6839_ = OR ( new_n5610_, new_n3364_ ) -new_n6840_ = OR ( new_n5592_, new_n4374_ ) -new_n6841_ = NAND ( new_n3712_, new_n2196_ ) -new_n6842_ = NAND ( new_n3379_, new_n2170_ ) -new_n6843_ = NAND ( new_n3360_, NET_174 ) -new_n6844_ = NAND ( new_n3058_, new_n2180_ ) -new_n6845_ = AND ( new_n6844_, new_n6843_, new_n6842_, new_n6841_ ) -NET_8791 = NAND ( new_n6845_, new_n6840_, new_n6839_, new_n6838_ ) -new_n6847_ = NOR ( new_n4870_, new_n1420_ ) -new_n6848_ = NAND ( new_n6847_, new_n6764_ ) -new_n6849_ = NAND ( new_n3146_, new_n1677_ ) -new_n6850_ = NAND ( new_n6849_, new_n6848_, new_n6672_ ) -new_n6851_ = XOR ( new_n6850_, new_n3157_ ) -new_n6852_ = NAND ( new_n6847_, new_n3146_ ) -new_n6853_ = NAND ( new_n3126_, new_n1677_ ) -new_n6854_ = NAND ( new_n6853_, new_n6852_, new_n6683_ ) -new_n6855_ = OR ( new_n6854_, new_n6851_ ) -new_n6856_ = NAND ( new_n6854_, new_n6851_ ) -new_n6857_ = NAND ( new_n6856_, new_n6855_ ) -new_n6858_ = NAND ( new_n6777_, new_n6773_ ) -new_n6859_ = NAND ( new_n6858_, new_n6774_ ) -new_n6860_ = XOR ( new_n6859_, new_n6857_ ) -new_n6861_ = OR ( new_n6860_, new_n3213_ ) -new_n6862_ = NAND ( new_n6847_, new_n3216_ ) -new_n6863_ = OR ( new_n3210_, new_n1677_ ) -new_n6864_ = NAND ( new_n6847_, new_n3210_ ) -new_n6865_ = NAND ( new_n6864_, new_n6863_ ) -new_n6866_ = NAND ( new_n6865_, new_n6862_ ) -new_n6867_ = OR ( new_n6865_, new_n6862_ ) -new_n6868_ = NAND ( new_n6867_, new_n6866_ ) -new_n6869_ = NAND ( new_n6788_, new_n6784_ ) -new_n6870_ = NAND ( new_n6869_, new_n6785_ ) -new_n6871_ = XNOR ( new_n6870_, new_n6868_ ) -new_n6872_ = NAND ( new_n6871_, new_n3238_ ) -new_n6873_ = NAND ( new_n6847_, new_n6791_ ) -new_n6874_ = NAND ( new_n3253_, new_n1690_ ) -new_n6875_ = NAND ( new_n3257_, new_n1664_ ) -new_n6876_ = NAND ( new_n4070_, new_n1670_ ) -new_n6877_ = NAND ( new_n3207_, NET_427 ) -new_n6878_ = AND ( new_n6877_, new_n6876_, new_n6875_, new_n6874_ ) -NET_8796 = NAND ( new_n6878_, new_n6873_, new_n6872_, new_n6861_ ) -new_n6880_ = OR ( new_n6860_, new_n3307_ ) -new_n6881_ = NAND ( new_n6871_, new_n3311_ ) -new_n6882_ = NAND ( new_n6847_, new_n3324_ ) -new_n6883_ = NAND ( new_n3321_, new_n1670_ ) -new_n6884_ = NAND ( new_n3327_, new_n1664_ ) -new_n6885_ = OR ( NET_520, new_n1622_ ) -new_n6886_ = NAND ( new_n3329_, new_n1690_ ) -new_n6887_ = AND ( new_n6886_, new_n6885_, new_n6884_, new_n6883_ ) -NET_8797 = NAND ( new_n6887_, new_n6882_, new_n6881_, new_n6880_ ) -new_n6889_ = NOR ( new_n6778_, new_n3489_ ) -new_n6890_ = NAND ( new_n6789_, new_n3492_ ) -new_n6891_ = NAND ( new_n6765_, new_n3496_ ) -new_n6892_ = NAND ( new_n3251_, new_n1705_ ) -new_n6893_ = NAND ( new_n3255_, new_n1677_ ) -new_n6894_ = NAND ( new_n6893_, new_n6892_, new_n6891_, new_n6890_ ) -new_n6895_ = NOR ( new_n6894_, new_n6889_ ) -new_n6896_ = NOR ( new_n6895_, new_n3505_ ) -new_n6897_ = NOR ( new_n3504_, new_n1687_ ) -NET_8798 = OR ( new_n6897_, new_n6896_ ) -new_n6899_ = NOR ( new_n6895_, new_n3510_ ) -new_n6900_ = NOR ( new_n3509_, new_n1685_ ) -NET_8799 = OR ( new_n6900_, new_n6899_ ) -new_n6902_ = OR ( new_n6828_, new_n3574_ ) -new_n6903_ = OR ( new_n5610_, new_n3454_ ) -new_n6904_ = OR ( new_n5592_, new_n3461_ ) -new_n6905_ = NOR ( new_n3442_, new_n5438_ ) -new_n6906_ = NOR ( new_n3378_, new_n5813_ ) -new_n6907_ = NOR ( new_n6906_, new_n6905_ ) -new_n6908_ = NAND ( new_n6907_, new_n6904_, new_n6903_, new_n6902_ ) -new_n6909_ = NAND ( new_n6908_, new_n3470_ ) -new_n6910_ = OR ( new_n3470_, new_n2175_ ) -NET_8817 = NAND ( new_n6910_, new_n6909_ ) -new_n6912_ = NAND ( new_n6908_, new_n3474_ ) -new_n6913_ = NAND ( new_n3476_, NET_110 ) -NET_8818 = NAND ( new_n6913_, new_n6912_ ) -new_n6915_ = NOR ( new_n5039_, new_n1420_ ) -new_n6916_ = NAND ( new_n6915_, new_n6764_ ) -new_n6917_ = NAND ( new_n3146_, new_n1664_ ) -new_n6918_ = NAND ( new_n6917_, new_n6916_, new_n6672_ ) -new_n6919_ = XOR ( new_n6918_, new_n3157_ ) -new_n6920_ = NAND ( new_n6915_, new_n3146_ ) -new_n6921_ = NAND ( new_n3126_, new_n1664_ ) -new_n6922_ = NAND ( new_n6921_, new_n6920_, new_n6683_ ) -new_n6923_ = OR ( new_n6922_, new_n6919_ ) -new_n6924_ = NAND ( new_n6922_, new_n6919_ ) -new_n6925_ = NAND ( new_n6924_, new_n6923_ ) -new_n6926_ = NAND ( new_n6859_, new_n6855_ ) -new_n6927_ = NAND ( new_n6926_, new_n6856_ ) -new_n6928_ = XOR ( new_n6927_, new_n6925_ ) -new_n6929_ = OR ( new_n6928_, new_n3213_ ) -new_n6930_ = NAND ( new_n6915_, new_n3216_ ) -new_n6931_ = OR ( new_n3210_, new_n1664_ ) -new_n6932_ = NAND ( new_n6915_, new_n3210_ ) -new_n6933_ = NAND ( new_n6932_, new_n6931_ ) -new_n6934_ = NAND ( new_n6933_, new_n6930_ ) -new_n6935_ = OR ( new_n6933_, new_n6930_ ) -new_n6936_ = NAND ( new_n6935_, new_n6934_ ) -new_n6937_ = NAND ( new_n6870_, new_n6866_ ) -new_n6938_ = NAND ( new_n6937_, new_n6867_ ) -new_n6939_ = XNOR ( new_n6938_, new_n6936_ ) -new_n6940_ = NAND ( new_n6939_, new_n3238_ ) -new_n6941_ = NAND ( new_n6915_, new_n6791_ ) -new_n6942_ = NAND ( new_n3253_, new_n1677_ ) -new_n6943_ = NAND ( new_n3257_, new_n2427_ ) -new_n6944_ = NAND ( new_n4070_, new_n1654_ ) -new_n6945_ = NAND ( new_n3207_, NET_428 ) -new_n6946_ = AND ( new_n6945_, new_n6944_, new_n6943_, new_n6942_ ) -NET_8853 = NAND ( new_n6946_, new_n6941_, new_n6940_, new_n6929_ ) -new_n6948_ = OR ( new_n6928_, new_n3307_ ) -new_n6949_ = NAND ( new_n6939_, new_n3311_ ) -new_n6950_ = NAND ( new_n6915_, new_n3324_ ) -new_n6951_ = NAND ( new_n3321_, new_n1654_ ) -new_n6952_ = NAND ( new_n3327_, new_n2427_ ) -new_n6953_ = OR ( NET_520, new_n1621_ ) -new_n6954_ = NAND ( new_n3329_, new_n1677_ ) -new_n6955_ = AND ( new_n6954_, new_n6953_, new_n6952_, new_n6951_ ) -NET_8854 = NAND ( new_n6955_, new_n6950_, new_n6949_, new_n6948_ ) -new_n6957_ = NOR ( new_n6860_, new_n3489_ ) -new_n6958_ = NAND ( new_n6871_, new_n3492_ ) -new_n6959_ = NAND ( new_n6847_, new_n3496_ ) -new_n6960_ = NAND ( new_n3255_, new_n1664_ ) -new_n6961_ = NAND ( new_n3251_, new_n1690_ ) -new_n6962_ = NAND ( new_n6961_, new_n6960_, new_n6959_, new_n6958_ ) -new_n6963_ = NOR ( new_n6962_, new_n6957_ ) -new_n6964_ = NOR ( new_n6963_, new_n3505_ ) -new_n6965_ = NOR ( new_n3504_, new_n1674_ ) -NET_8855 = OR ( new_n6965_, new_n6964_ ) -new_n6967_ = NOR ( new_n6963_, new_n3510_ ) -new_n6968_ = NOR ( new_n3509_, new_n1672_ ) -NET_8856 = OR ( new_n6968_, new_n6967_ ) -new_n6970_ = NOR ( new_n3019_, new_n5813_ ) -new_n6971_ = NAND ( new_n5805_, new_n3016_ ) -new_n6972_ = XNOR ( new_n6971_, new_n6970_ ) -new_n6973_ = OR ( new_n6827_, new_n6822_ ) -new_n6974_ = NAND ( new_n6973_, new_n6821_ ) -new_n6975_ = NAND ( new_n6827_, new_n6822_ ) -new_n6976_ = NAND ( new_n6975_, new_n6974_ ) -new_n6977_ = XOR ( new_n6976_, new_n6972_ ) -new_n6978_ = OR ( new_n6977_, new_n3035_ ) -new_n6979_ = OR ( new_n5824_, new_n3005_ ) -new_n6980_ = NAND ( new_n5805_, new_n3060_ ) -new_n6981_ = NAND ( new_n3051_, new_n2167_ ) -new_n6982_ = NAND ( new_n3062_, new_n2157_ ) -new_n6983_ = NAND ( new_n3064_, new_n2183_ ) -new_n6984_ = AND ( new_n6983_, new_n6982_, new_n6981_, new_n5842_ ) -NET_8872 = NAND ( new_n6984_, new_n6980_, new_n6979_, new_n6978_ ) -new_n6986_ = OR ( new_n6977_, new_n3373_ ) -new_n6987_ = OR ( new_n5824_, new_n3364_ ) -new_n6988_ = NAND ( new_n5805_, new_n3382_ ) -new_n6989_ = NAND ( new_n3712_, new_n2183_ ) -new_n6990_ = NAND ( new_n3379_, new_n2157_ ) -new_n6991_ = NAND ( new_n3360_, NET_175 ) -new_n6992_ = NAND ( new_n3058_, new_n2167_ ) -new_n6993_ = AND ( new_n6992_, new_n6991_, new_n6990_, new_n6989_ ) -NET_8903 = NAND ( new_n6993_, new_n6988_, new_n6987_, new_n6986_ ) -new_n6995_ = NOR ( new_n5147_, new_n1420_ ) -new_n6996_ = NAND ( new_n6995_, new_n6764_ ) -new_n6997_ = NAND ( new_n3146_, new_n2427_ ) -new_n6998_ = NAND ( new_n6997_, new_n6996_, new_n6672_ ) -new_n6999_ = XOR ( new_n6998_, new_n3157_ ) -new_n7000_ = NAND ( new_n6995_, new_n3146_ ) -new_n7001_ = NAND ( new_n3126_, new_n2427_ ) -new_n7002_ = NAND ( new_n7001_, new_n7000_, new_n6683_ ) -new_n7003_ = OR ( new_n7002_, new_n6999_ ) -new_n7004_ = NAND ( new_n7002_, new_n6999_ ) -new_n7005_ = NAND ( new_n7004_, new_n7003_ ) -new_n7006_ = NAND ( new_n6927_, new_n6923_ ) -new_n7007_ = NAND ( new_n7006_, new_n6924_ ) -new_n7008_ = XOR ( new_n7007_, new_n7005_ ) -new_n7009_ = OR ( new_n7008_, new_n3213_ ) -new_n7010_ = NAND ( new_n6995_, new_n3216_ ) -new_n7011_ = OR ( new_n3210_, new_n2427_ ) -new_n7012_ = NAND ( new_n6995_, new_n3210_ ) -new_n7013_ = NAND ( new_n7012_, new_n7011_ ) -new_n7014_ = NAND ( new_n7013_, new_n7010_ ) -new_n7015_ = OR ( new_n7013_, new_n7010_ ) -new_n7016_ = NAND ( new_n7015_, new_n7014_ ) -new_n7017_ = NAND ( new_n6938_, new_n6934_ ) -new_n7018_ = NAND ( new_n7017_, new_n6935_ ) -new_n7019_ = XNOR ( new_n7018_, new_n7016_ ) -new_n7020_ = NAND ( new_n7019_, new_n3238_ ) -new_n7021_ = NAND ( new_n6995_, new_n6791_ ) -new_n7022_ = NAND ( new_n3257_, new_n2414_ ) -new_n7023_ = NAND ( new_n3253_, new_n1664_ ) -new_n7024_ = NAND ( new_n4070_, new_n2420_ ) -new_n7025_ = NAND ( new_n3207_, NET_429 ) -new_n7026_ = AND ( new_n7025_, new_n7024_, new_n7023_, new_n7022_ ) -NET_8908 = NAND ( new_n7026_, new_n7021_, new_n7020_, new_n7009_ ) -new_n7028_ = OR ( new_n7008_, new_n3307_ ) -new_n7029_ = NAND ( new_n7019_, new_n3311_ ) -new_n7030_ = NAND ( new_n6995_, new_n3324_ ) -new_n7031_ = NAND ( new_n3321_, new_n2420_ ) -new_n7032_ = NAND ( new_n3327_, new_n2414_ ) -new_n7033_ = NAND ( NET_23567, NET_516 ) -new_n7034_ = NAND ( new_n3329_, new_n1664_ ) -new_n7035_ = AND ( new_n7034_, new_n7033_, new_n7032_, new_n7031_ ) -NET_8909 = NAND ( new_n7035_, new_n7030_, new_n7029_, new_n7028_ ) -new_n7037_ = NOR ( new_n6928_, new_n3489_ ) -new_n7038_ = NAND ( new_n6939_, new_n3492_ ) -new_n7039_ = NAND ( new_n6915_, new_n3496_ ) -new_n7040_ = NAND ( new_n3255_, new_n2427_ ) -new_n7041_ = NAND ( new_n3251_, new_n1677_ ) -new_n7042_ = NAND ( new_n7041_, new_n7040_, new_n7039_, new_n7038_ ) -new_n7043_ = NOR ( new_n7042_, new_n7037_ ) -new_n7044_ = NOR ( new_n7043_, new_n3505_ ) -new_n7045_ = NOR ( new_n3504_, new_n1661_ ) -NET_8910 = OR ( new_n7045_, new_n7044_ ) -new_n7047_ = NOR ( new_n7043_, new_n3510_ ) -new_n7048_ = NOR ( new_n3509_, new_n1659_ ) -NET_8911 = OR ( new_n7048_, new_n7047_ ) -new_n7050_ = OR ( new_n6977_, new_n3574_ ) -new_n7051_ = OR ( new_n5824_, new_n3454_ ) -new_n7052_ = NAND ( new_n5805_, new_n3460_ ) -new_n7053_ = NOR ( new_n3442_, new_n5600_ ) -new_n7054_ = NOR ( new_n3378_, new_n5981_ ) -new_n7055_ = NOR ( new_n7054_, new_n7053_ ) -new_n7056_ = NAND ( new_n7055_, new_n7052_, new_n7051_, new_n7050_ ) -new_n7057_ = NAND ( new_n7056_, new_n3470_ ) -new_n7058_ = OR ( new_n3470_, new_n2162_ ) -NET_8929 = NAND ( new_n7058_, new_n7057_ ) -new_n7060_ = NAND ( new_n7056_, new_n3474_ ) -new_n7061_ = NAND ( new_n3476_, NET_111 ) -NET_8930 = NAND ( new_n7061_, new_n7060_ ) -new_n7063_ = NOR ( new_n5308_, new_n1420_ ) -new_n7064_ = NAND ( new_n7063_, new_n6764_ ) -new_n7065_ = NOT ( new_n2414_ ) -new_n7066_ = OR ( new_n3110_, new_n7065_ ) -new_n7067_ = NAND ( new_n7066_, new_n7064_, new_n6672_ ) -new_n7068_ = XOR ( new_n7067_, new_n3157_ ) -new_n7069_ = NAND ( new_n7063_, new_n3146_ ) -new_n7070_ = NAND ( new_n3126_, new_n2414_ ) -new_n7071_ = NAND ( new_n7070_, new_n7069_, new_n6683_ ) -new_n7072_ = OR ( new_n7071_, new_n7068_ ) -new_n7073_ = NAND ( new_n7071_, new_n7068_ ) -new_n7074_ = NAND ( new_n7073_, new_n7072_ ) -new_n7075_ = NAND ( new_n7007_, new_n7003_ ) -new_n7076_ = NAND ( new_n7075_, new_n7004_ ) -new_n7077_ = XOR ( new_n7076_, new_n7074_ ) -new_n7078_ = OR ( new_n7077_, new_n3213_ ) -new_n7079_ = NAND ( new_n7063_, new_n3216_ ) -new_n7080_ = OR ( new_n3210_, new_n2414_ ) -new_n7081_ = NAND ( new_n7063_, new_n3210_ ) -new_n7082_ = NAND ( new_n7081_, new_n7080_ ) -new_n7083_ = NAND ( new_n7082_, new_n7079_ ) -new_n7084_ = OR ( new_n7082_, new_n7079_ ) -new_n7085_ = NAND ( new_n7084_, new_n7083_ ) -new_n7086_ = NAND ( new_n7018_, new_n7014_ ) -new_n7087_ = NAND ( new_n7086_, new_n7015_ ) -new_n7088_ = XNOR ( new_n7087_, new_n7085_ ) -new_n7089_ = NAND ( new_n7088_, new_n3238_ ) -new_n7090_ = NAND ( new_n7063_, new_n6791_ ) -new_n7091_ = NAND ( new_n3257_, new_n2527_ ) -new_n7092_ = NAND ( new_n3253_, new_n2427_ ) -new_n7093_ = NAND ( new_n4070_, new_n2407_ ) -new_n7094_ = NAND ( new_n3207_, NET_430 ) -new_n7095_ = AND ( new_n7094_, new_n7093_, new_n7092_, new_n7091_ ) -NET_8964 = NAND ( new_n7095_, new_n7090_, new_n7089_, new_n7078_ ) -new_n7097_ = OR ( new_n7077_, new_n3307_ ) -new_n7098_ = NAND ( new_n7088_, new_n3311_ ) -new_n7099_ = NAND ( new_n7063_, new_n3324_ ) -new_n7100_ = NAND ( new_n3321_, new_n2407_ ) -new_n7101_ = NAND ( new_n3327_, new_n2527_ ) -new_n7102_ = OR ( NET_520, new_n2403_ ) -new_n7103_ = NAND ( new_n3329_, new_n2427_ ) -new_n7104_ = AND ( new_n7103_, new_n7102_, new_n7101_, new_n7100_ ) -NET_8965 = NAND ( new_n7104_, new_n7099_, new_n7098_, new_n7097_ ) -new_n7106_ = NOR ( new_n7008_, new_n3489_ ) -new_n7107_ = NAND ( new_n7019_, new_n3492_ ) -new_n7108_ = NAND ( new_n6995_, new_n3496_ ) -new_n7109_ = NAND ( new_n3251_, new_n1664_ ) -new_n7110_ = NAND ( new_n3255_, new_n2414_ ) -new_n7111_ = NAND ( new_n7110_, new_n7109_, new_n7108_, new_n7107_ ) -new_n7112_ = NOR ( new_n7111_, new_n7106_ ) -new_n7113_ = NOR ( new_n7112_, new_n3505_ ) -new_n7114_ = NOR ( new_n3504_, new_n2424_ ) -NET_8966 = OR ( new_n7114_, new_n7113_ ) -new_n7116_ = NOR ( new_n7112_, new_n3510_ ) -new_n7117_ = NOR ( new_n3509_, new_n2422_ ) -NET_8967 = OR ( new_n7117_, new_n7116_ ) -new_n7119_ = NOR ( new_n3019_, new_n5981_ ) -new_n7120_ = NAND ( new_n5974_, new_n3016_ ) -new_n7121_ = XNOR ( new_n7120_, new_n7119_ ) -new_n7122_ = OR ( new_n6976_, new_n6971_ ) -new_n7123_ = NAND ( new_n7122_, new_n6970_ ) -new_n7124_ = NAND ( new_n6976_, new_n6971_ ) -new_n7125_ = NAND ( new_n7124_, new_n7123_ ) -new_n7126_ = XOR ( new_n7125_, new_n7121_ ) -new_n7127_ = OR ( new_n7126_, new_n3035_ ) -new_n7128_ = OR ( new_n5991_, new_n3005_ ) -new_n7129_ = NAND ( new_n5974_, new_n3060_ ) -new_n7130_ = NAND ( new_n3051_, new_n2154_ ) -new_n7131_ = NAND ( new_n3062_, new_n2144_ ) -new_n7132_ = NAND ( new_n3064_, new_n2170_ ) -new_n7133_ = AND ( new_n7132_, new_n7131_, new_n7130_, new_n6006_ ) -NET_8983 = NAND ( new_n7133_, new_n7129_, new_n7128_, new_n7127_ ) -new_n7135_ = OR ( new_n7126_, new_n3373_ ) -new_n7136_ = OR ( new_n5991_, new_n3364_ ) -new_n7137_ = NAND ( new_n5974_, new_n3382_ ) -new_n7138_ = NAND ( new_n3712_, new_n2170_ ) -new_n7139_ = NAND ( new_n3379_, new_n2144_ ) -new_n7140_ = NAND ( new_n3360_, NET_176 ) -new_n7141_ = NAND ( new_n3058_, new_n2154_ ) -new_n7142_ = AND ( new_n7141_, new_n7140_, new_n7139_, new_n7138_ ) -NET_9014 = NAND ( new_n7142_, new_n7137_, new_n7136_, new_n7135_ ) -new_n7144_ = NOR ( new_n5481_, new_n1420_ ) -new_n7145_ = NAND ( new_n7144_, new_n6764_ ) -new_n7146_ = NAND ( new_n3146_, new_n2527_ ) -new_n7147_ = NAND ( new_n7146_, new_n7145_, new_n6672_ ) -new_n7148_ = XOR ( new_n7147_, new_n3157_ ) -new_n7149_ = NAND ( new_n7144_, new_n3146_ ) -new_n7150_ = NAND ( new_n3126_, new_n2527_ ) -new_n7151_ = NAND ( new_n7150_, new_n7149_, new_n6683_ ) -new_n7152_ = OR ( new_n7151_, new_n7148_ ) -new_n7153_ = NAND ( new_n7151_, new_n7148_ ) -new_n7154_ = NAND ( new_n7153_, new_n7152_ ) -new_n7155_ = NAND ( new_n7076_, new_n7072_ ) -new_n7156_ = NAND ( new_n7155_, new_n7073_ ) -new_n7157_ = XOR ( new_n7156_, new_n7154_ ) -new_n7158_ = OR ( new_n7157_, new_n3213_ ) -new_n7159_ = NAND ( new_n7144_, new_n3216_ ) -new_n7160_ = OR ( new_n3210_, new_n2527_ ) -new_n7161_ = NAND ( new_n7144_, new_n3210_ ) -new_n7162_ = NAND ( new_n7161_, new_n7160_ ) -new_n7163_ = NAND ( new_n7162_, new_n7159_ ) -new_n7164_ = OR ( new_n7162_, new_n7159_ ) -new_n7165_ = NAND ( new_n7164_, new_n7163_ ) -new_n7166_ = NAND ( new_n7087_, new_n7083_ ) -new_n7167_ = NAND ( new_n7166_, new_n7084_ ) -new_n7168_ = XNOR ( new_n7167_, new_n7165_ ) -new_n7169_ = NAND ( new_n7168_, new_n3238_ ) -new_n7170_ = NAND ( new_n7144_, new_n6791_ ) -new_n7171_ = NAND ( new_n3253_, new_n2414_ ) -new_n7172_ = NAND ( new_n3257_, new_n2575_ ) -new_n7173_ = NAND ( new_n4070_, new_n2520_ ) -new_n7174_ = NAND ( new_n3207_, NET_431 ) -new_n7175_ = AND ( new_n7174_, new_n7173_, new_n7172_, new_n7171_ ) -NET_9019 = NAND ( new_n7175_, new_n7170_, new_n7169_, new_n7158_ ) -new_n7177_ = OR ( new_n7157_, new_n3307_ ) -new_n7178_ = NAND ( new_n7168_, new_n3311_ ) -new_n7179_ = NAND ( new_n7144_, new_n3324_ ) -new_n7180_ = NAND ( new_n3321_, new_n2520_ ) -new_n7181_ = NAND ( new_n3327_, new_n2575_ ) -new_n7182_ = NAND ( NET_23567, NET_507 ) -new_n7183_ = NAND ( new_n3329_, new_n2414_ ) -new_n7184_ = AND ( new_n7183_, new_n7182_, new_n7181_, new_n7180_ ) -NET_9020 = NAND ( new_n7184_, new_n7179_, new_n7178_, new_n7177_ ) -new_n7186_ = NOR ( new_n7077_, new_n3489_ ) -new_n7187_ = NAND ( new_n7088_, new_n3492_ ) -new_n7188_ = NAND ( new_n7063_, new_n3496_ ) -new_n7189_ = NAND ( new_n3251_, new_n2427_ ) -new_n7190_ = NAND ( new_n3255_, new_n2527_ ) -new_n7191_ = NAND ( new_n7190_, new_n7189_, new_n7188_, new_n7187_ ) -new_n7192_ = NOR ( new_n7191_, new_n7186_ ) -new_n7193_ = NOR ( new_n7192_, new_n3505_ ) -new_n7194_ = NOR ( new_n3504_, new_n2412_ ) -NET_9021 = OR ( new_n7194_, new_n7193_ ) -new_n7196_ = NOR ( new_n7192_, new_n3510_ ) -new_n7197_ = NOR ( new_n3509_, new_n2410_ ) -NET_9022 = OR ( new_n7197_, new_n7196_ ) -new_n7199_ = OR ( new_n7126_, new_n3574_ ) -new_n7200_ = OR ( new_n5991_, new_n3454_ ) -new_n7201_ = NAND ( new_n5974_, new_n3460_ ) -new_n7202_ = NOR ( new_n3442_, new_n5813_ ) -new_n7203_ = NOR ( new_n3378_, new_n6147_ ) -new_n7204_ = NOR ( new_n7203_, new_n7202_ ) -new_n7205_ = NAND ( new_n7204_, new_n7201_, new_n7200_, new_n7199_ ) -new_n7206_ = NAND ( new_n7205_, new_n3470_ ) -new_n7207_ = OR ( new_n3470_, new_n2149_ ) -NET_9038 = NAND ( new_n7207_, new_n7206_ ) -new_n7209_ = NAND ( new_n7205_, new_n3474_ ) -new_n7210_ = NAND ( new_n3476_, NET_112 ) -NET_9039 = NAND ( new_n7210_, new_n7209_ ) -new_n7212_ = NOR ( new_n5647_, new_n1420_ ) -new_n7213_ = NAND ( new_n7212_, new_n6764_ ) -new_n7214_ = NOT ( new_n2575_ ) -new_n7215_ = OR ( new_n3110_, new_n7214_ ) -new_n7216_ = NAND ( new_n7215_, new_n7213_, new_n6672_ ) -new_n7217_ = XOR ( new_n7216_, new_n3157_ ) -new_n7218_ = NAND ( new_n7212_, new_n3146_ ) -new_n7219_ = NAND ( new_n3126_, new_n2575_ ) -new_n7220_ = NAND ( new_n7219_, new_n7218_, new_n6683_ ) -new_n7221_ = OR ( new_n7220_, new_n7217_ ) -new_n7222_ = NAND ( new_n7220_, new_n7217_ ) -new_n7223_ = NAND ( new_n7222_, new_n7221_ ) -new_n7224_ = NAND ( new_n7156_, new_n7152_ ) -new_n7225_ = NAND ( new_n7224_, new_n7153_ ) -new_n7226_ = XOR ( new_n7225_, new_n7223_ ) -new_n7227_ = OR ( new_n7226_, new_n3213_ ) -new_n7228_ = NAND ( new_n7212_, new_n3216_ ) -new_n7229_ = OR ( new_n3210_, new_n2575_ ) -new_n7230_ = NAND ( new_n7212_, new_n3210_ ) -new_n7231_ = NAND ( new_n7230_, new_n7229_ ) -new_n7232_ = NAND ( new_n7231_, new_n7228_ ) -new_n7233_ = OR ( new_n7231_, new_n7228_ ) -new_n7234_ = NAND ( new_n7233_, new_n7232_ ) -new_n7235_ = NAND ( new_n7167_, new_n7163_ ) -new_n7236_ = NAND ( new_n7235_, new_n7164_ ) -new_n7237_ = XNOR ( new_n7236_, new_n7234_ ) -new_n7238_ = NAND ( new_n7237_, new_n3238_ ) -new_n7239_ = NAND ( new_n7212_, new_n6791_ ) -new_n7240_ = NAND ( new_n3253_, new_n2527_ ) -new_n7241_ = NAND ( new_n3257_, new_n2563_ ) -new_n7242_ = NAND ( new_n4070_, new_n2568_ ) -new_n7243_ = NAND ( new_n3207_, NET_432 ) -new_n7244_ = AND ( new_n7243_, new_n7242_, new_n7241_, new_n7240_ ) -NET_9073 = NAND ( new_n7244_, new_n7239_, new_n7238_, new_n7227_ ) -new_n7246_ = OR ( new_n7226_, new_n3307_ ) -new_n7247_ = NAND ( new_n7237_, new_n3311_ ) -new_n7248_ = NAND ( new_n7212_, new_n3324_ ) -new_n7249_ = NAND ( new_n3321_, new_n2568_ ) -new_n7250_ = NAND ( new_n3327_, new_n2563_ ) -new_n7251_ = NAND ( NET_23567, NET_492 ) -new_n7252_ = NAND ( new_n3329_, new_n2527_ ) -new_n7253_ = AND ( new_n7252_, new_n7251_, new_n7250_, new_n7249_ ) -NET_9074 = NAND ( new_n7253_, new_n7248_, new_n7247_, new_n7246_ ) -new_n7255_ = NOR ( new_n7157_, new_n3489_ ) -new_n7256_ = NAND ( new_n7168_, new_n3492_ ) -new_n7257_ = NAND ( new_n7144_, new_n3496_ ) -new_n7258_ = NAND ( new_n3255_, new_n2575_ ) -new_n7259_ = NAND ( new_n3251_, new_n2414_ ) -new_n7260_ = NAND ( new_n7259_, new_n7258_, new_n7257_, new_n7256_ ) -new_n7261_ = NOR ( new_n7260_, new_n7255_ ) -new_n7262_ = NOR ( new_n7261_, new_n3505_ ) -new_n7263_ = NOR ( new_n3504_, new_n2525_ ) -NET_9075 = OR ( new_n7263_, new_n7262_ ) -new_n7265_ = NOR ( new_n7261_, new_n3510_ ) -new_n7266_ = NOR ( new_n3509_, new_n2523_ ) -NET_9076 = OR ( new_n7266_, new_n7265_ ) -new_n7268_ = NOR ( new_n3019_, new_n6147_ ) -new_n7269_ = OR ( new_n6140_, new_n3017_ ) -new_n7270_ = XNOR ( new_n7269_, new_n7268_ ) -new_n7271_ = OR ( new_n7125_, new_n7120_ ) -new_n7272_ = NAND ( new_n7271_, new_n7119_ ) -new_n7273_ = NAND ( new_n7125_, new_n7120_ ) -new_n7274_ = NAND ( new_n7273_, new_n7272_ ) -new_n7275_ = XOR ( new_n7274_, new_n7270_ ) -new_n7276_ = OR ( new_n7275_, new_n3035_ ) -new_n7277_ = OR ( new_n6157_, new_n3005_ ) -new_n7278_ = NOT ( new_n6140_ ) -new_n7279_ = NAND ( new_n7278_, new_n3060_ ) -new_n7280_ = NAND ( new_n3051_, new_n2141_ ) -new_n7281_ = NAND ( new_n3062_, new_n2131_ ) -new_n7282_ = NAND ( new_n3064_, new_n2157_ ) -new_n7283_ = AND ( new_n7282_, new_n7281_, new_n7280_, new_n6170_ ) -NET_9088 = NAND ( new_n7283_, new_n7279_, new_n7277_, new_n7276_ ) -new_n7285_ = OR ( new_n7275_, new_n3373_ ) -new_n7286_ = OR ( new_n6157_, new_n3364_ ) -new_n7287_ = OR ( new_n6140_, new_n4374_ ) -new_n7288_ = NAND ( new_n3712_, new_n2157_ ) -new_n7289_ = NAND ( new_n3379_, new_n2131_ ) -new_n7290_ = NAND ( new_n3360_, NET_177 ) -new_n7291_ = NAND ( new_n3058_, new_n2141_ ) -new_n7292_ = AND ( new_n7291_, new_n7290_, new_n7289_, new_n7288_ ) -NET_9120 = NAND ( new_n7292_, new_n7287_, new_n7286_, new_n7285_ ) -new_n7294_ = NOR ( new_n5847_, new_n1420_ ) -new_n7295_ = NAND ( new_n7294_, new_n6764_ ) -new_n7296_ = NAND ( new_n3146_, new_n2563_ ) -new_n7297_ = NAND ( new_n7296_, new_n7295_, new_n6672_ ) -new_n7298_ = XOR ( new_n7297_, new_n3157_ ) -new_n7299_ = NAND ( new_n7294_, new_n3146_ ) -new_n7300_ = NAND ( new_n3126_, new_n2563_ ) -new_n7301_ = NAND ( new_n7300_, new_n7299_, new_n6683_ ) -new_n7302_ = OR ( new_n7301_, new_n7298_ ) -new_n7303_ = NAND ( new_n7301_, new_n7298_ ) -new_n7304_ = NAND ( new_n7303_, new_n7302_ ) -new_n7305_ = NAND ( new_n7225_, new_n7221_ ) -new_n7306_ = NAND ( new_n7305_, new_n7222_ ) -new_n7307_ = XOR ( new_n7306_, new_n7304_ ) -new_n7308_ = OR ( new_n7307_, new_n3213_ ) -new_n7309_ = OR ( new_n3210_, new_n2563_ ) -new_n7310_ = NAND ( new_n7294_, new_n3210_ ) -new_n7311_ = NAND ( new_n7310_, new_n7309_ ) -new_n7312_ = NAND ( new_n7294_, new_n3216_ ) -new_n7313_ = NAND ( new_n7312_, new_n7311_ ) -new_n7314_ = OR ( new_n7312_, new_n7311_ ) -new_n7315_ = NAND ( new_n7314_, new_n7313_ ) -new_n7316_ = NAND ( new_n7236_, new_n7232_ ) -new_n7317_ = NAND ( new_n7316_, new_n7233_ ) -new_n7318_ = XNOR ( new_n7317_, new_n7315_ ) -new_n7319_ = NAND ( new_n7318_, new_n3238_ ) -new_n7320_ = NAND ( new_n7294_, new_n6791_ ) -new_n7321_ = NAND ( new_n3257_, new_n2634_ ) -new_n7322_ = NAND ( new_n3253_, new_n2575_ ) -new_n7323_ = NAND ( new_n4070_, new_n2556_ ) -new_n7324_ = NAND ( new_n3207_, NET_433 ) -new_n7325_ = AND ( new_n7324_, new_n7323_, new_n7322_, new_n7321_ ) -NET_9125 = NAND ( new_n7325_, new_n7320_, new_n7319_, new_n7308_ ) -new_n7327_ = NOR ( new_n3216_, new_n3082_ ) -new_n7328_ = NOR ( new_n6447_, new_n1420_ ) -new_n7329_ = NAND ( new_n7328_, new_n7327_ ) -new_n7330_ = NAND ( new_n3216_, new_n2634_ ) -new_n7331_ = NOR ( new_n6011_, new_n1420_ ) -new_n7332_ = NAND ( new_n7331_, new_n3210_ ) -new_n7333_ = NAND ( new_n7332_, new_n7330_ ) -new_n7334_ = NAND ( new_n7333_, new_n3082_ ) -new_n7335_ = NOR ( new_n3097_, new_n3082_ ) -new_n7336_ = OR ( new_n7335_, new_n3105_ ) -new_n7337_ = NAND ( new_n7336_, new_n2513_ ) -new_n7338_ = AND ( new_n7337_, new_n7334_ ) -new_n7339_ = NAND ( new_n7338_, new_n7329_ ) -new_n7340_ = NAND ( new_n7339_, new_n3216_ ) -new_n7341_ = OR ( new_n7339_, new_n3216_ ) -new_n7342_ = NAND ( new_n7331_, new_n3216_, new_n3082_ ) -new_n7343_ = NOR ( new_n6175_, new_n1420_ ) -new_n7344_ = NAND ( new_n7343_, new_n7336_ ) -new_n7345_ = NAND ( new_n7344_, new_n7342_, new_n7341_, new_n7340_ ) -new_n7346_ = NAND ( new_n7344_, new_n7342_ ) -new_n7347_ = NAND ( new_n7341_, new_n7340_ ) -new_n7348_ = NAND ( new_n7347_, new_n7346_ ) -new_n7349_ = NAND ( new_n7348_, new_n7345_ ) -new_n7350_ = NAND ( new_n7317_, new_n7313_ ) -new_n7351_ = NAND ( new_n7350_, new_n7314_ ) -new_n7352_ = OR ( new_n3210_, new_n2634_ ) -new_n7353_ = NAND ( new_n7352_, new_n7332_ ) -new_n7354_ = NAND ( new_n7331_, new_n3216_ ) -new_n7355_ = NAND ( new_n7354_, new_n7353_ ) -new_n7356_ = NAND ( new_n7355_, new_n7351_ ) -new_n7357_ = OR ( new_n7354_, new_n7353_ ) -new_n7358_ = NAND ( new_n7357_, new_n7356_ ) -new_n7359_ = NAND ( new_n7343_, new_n7327_ ) -new_n7360_ = NAND ( new_n7359_, new_n7338_ ) -new_n7361_ = XNOR ( new_n7360_, new_n3216_ ) -new_n7362_ = OR ( new_n7361_, new_n7346_ ) -new_n7363_ = NAND ( new_n7362_, new_n7358_ ) -new_n7364_ = NAND ( new_n7361_, new_n7346_ ) -new_n7365_ = NAND ( new_n7364_, new_n7363_ ) -new_n7366_ = XNOR ( new_n7365_, new_n7349_ ) -new_n7367_ = NAND ( new_n7366_, new_n3236_ ) -new_n7368_ = NAND ( new_n7328_, new_n6791_ ) -new_n7369_ = NAND ( new_n3207_, NET_436 ) -new_n7370_ = NOR ( new_n1415_, NET_490 ) -new_n7371_ = OR ( new_n7370_, new_n1420_ ) -new_n7372_ = NAND ( new_n7371_, new_n1606_, new_n1435_ ) -new_n7373_ = OR ( new_n7372_, new_n3207_ ) -NET_9126 = NAND ( new_n7373_, new_n7369_, new_n7368_, new_n7367_ ) -new_n7375_ = OR ( new_n7307_, new_n3307_ ) -new_n7376_ = NAND ( new_n7318_, new_n3311_ ) -new_n7377_ = NAND ( new_n7294_, new_n3324_ ) -new_n7378_ = NAND ( new_n3321_, new_n2556_ ) -new_n7379_ = NAND ( new_n3327_, new_n2634_ ) -new_n7380_ = OR ( NET_520, new_n2504_ ) -new_n7381_ = NAND ( new_n3329_, new_n2575_ ) -new_n7382_ = AND ( new_n7381_, new_n7380_, new_n7379_, new_n7378_ ) -NET_9127 = NAND ( new_n7382_, new_n7377_, new_n7376_, new_n7375_ ) -new_n7384_ = NOR ( new_n7226_, new_n3489_ ) -new_n7385_ = NAND ( new_n7237_, new_n3492_ ) -new_n7386_ = NAND ( new_n7212_, new_n3496_ ) -new_n7387_ = NAND ( new_n3255_, new_n2563_ ) -new_n7388_ = NAND ( new_n3251_, new_n2527_ ) -new_n7389_ = NAND ( new_n7388_, new_n7387_, new_n7386_, new_n7385_ ) -new_n7390_ = NOR ( new_n7389_, new_n7384_ ) -new_n7391_ = NOR ( new_n7390_, new_n3505_ ) -new_n7392_ = NOR ( new_n3504_, new_n2573_ ) -NET_9128 = OR ( new_n7392_, new_n7391_ ) -new_n7394_ = NOR ( new_n7390_, new_n3510_ ) -new_n7395_ = NOR ( new_n3509_, new_n2571_ ) -NET_9129 = OR ( new_n7395_, new_n7394_ ) -new_n7397_ = OR ( new_n7275_, new_n3574_ ) -new_n7398_ = OR ( new_n6157_, new_n3454_ ) -new_n7399_ = OR ( new_n6140_, new_n3461_ ) -new_n7400_ = NOR ( new_n3442_, new_n5981_ ) -new_n7401_ = NOT ( new_n2131_ ) -new_n7402_ = NOR ( new_n3378_, new_n7401_ ) -new_n7403_ = NOR ( new_n7402_, new_n7400_ ) -new_n7404_ = NAND ( new_n7403_, new_n7399_, new_n7398_, new_n7397_ ) -new_n7405_ = NAND ( new_n7404_, new_n3470_ ) -new_n7406_ = OR ( new_n3470_, new_n2136_ ) -NET_9143 = NAND ( new_n7406_, new_n7405_ ) -new_n7408_ = NAND ( new_n7404_, new_n3474_ ) -new_n7409_ = NAND ( new_n3476_, NET_113 ) -NET_9144 = NAND ( new_n7409_, new_n7408_ ) -new_n7411_ = NAND ( new_n7331_, new_n6764_ ) -new_n7412_ = NAND ( new_n3146_, new_n2634_ ) -new_n7413_ = NAND ( new_n7412_, new_n7411_, new_n6672_ ) -new_n7414_ = XOR ( new_n7413_, new_n3157_ ) -new_n7415_ = NAND ( new_n7331_, new_n3146_ ) -new_n7416_ = NAND ( new_n3126_, new_n2634_ ) -new_n7417_ = NAND ( new_n7416_, new_n7415_, new_n6683_ ) -new_n7418_ = OR ( new_n7417_, new_n7414_ ) -new_n7419_ = NAND ( new_n7417_, new_n7414_ ) -new_n7420_ = NAND ( new_n7419_, new_n7418_ ) -new_n7421_ = NAND ( new_n7306_, new_n7302_ ) -new_n7422_ = NAND ( new_n7421_, new_n7303_ ) -new_n7423_ = XOR ( new_n7422_, new_n7420_ ) -new_n7424_ = OR ( new_n7423_, new_n3213_ ) -new_n7425_ = NAND ( new_n7357_, new_n7355_ ) -new_n7426_ = XNOR ( new_n7425_, new_n7351_ ) -new_n7427_ = NAND ( new_n7426_, new_n3238_ ) -new_n7428_ = NAND ( new_n7331_, new_n6791_ ) -new_n7429_ = NAND ( new_n3257_, new_n2513_ ) -new_n7430_ = NAND ( new_n3253_, new_n2563_ ) -new_n7431_ = NAND ( new_n4070_, new_n2627_ ) -new_n7432_ = NAND ( new_n3207_, NET_434 ) -new_n7433_ = AND ( new_n7432_, new_n7431_, new_n7430_, new_n7429_ ) -NET_9180 = NAND ( new_n7433_, new_n7428_, new_n7427_, new_n7424_ ) -new_n7435_ = OR ( new_n7423_, new_n3307_ ) -new_n7436_ = NAND ( new_n7426_, new_n3311_ ) -new_n7437_ = NAND ( new_n7331_, new_n3324_ ) -new_n7438_ = NAND ( new_n3321_, new_n2627_ ) -new_n7439_ = NAND ( new_n3327_, new_n2513_ ) -new_n7440_ = OR ( NET_520, new_n2503_ ) -new_n7441_ = NAND ( new_n3329_, new_n2563_ ) -new_n7442_ = AND ( new_n7441_, new_n7440_, new_n7439_, new_n7438_ ) -NET_9181 = NAND ( new_n7442_, new_n7437_, new_n7436_, new_n7435_ ) -new_n7444_ = NAND ( new_n7366_, new_n3234_ ) -new_n7445_ = NAND ( new_n7328_, new_n3496_ ) -new_n7446_ = NAND ( new_n7445_, new_n7444_, new_n7372_ ) -new_n7447_ = NAND ( new_n7446_, new_n3504_ ) -new_n7448_ = OR ( new_n3504_, new_n1611_ ) -NET_9182 = NAND ( new_n7448_, new_n7447_ ) -new_n7450_ = NOR ( new_n7307_, new_n3489_ ) -new_n7451_ = NAND ( new_n7318_, new_n3492_ ) -new_n7452_ = NAND ( new_n7294_, new_n3496_ ) -new_n7453_ = NAND ( new_n3251_, new_n2575_ ) -new_n7454_ = NAND ( new_n3255_, new_n2634_ ) -new_n7455_ = NAND ( new_n7454_, new_n7453_, new_n7452_, new_n7451_ ) -new_n7456_ = NOR ( new_n7455_, new_n7450_ ) -new_n7457_ = NOR ( new_n7456_, new_n3505_ ) -new_n7458_ = NOR ( new_n3504_, new_n2561_ ) -NET_9183 = OR ( new_n7458_, new_n7457_ ) -new_n7460_ = NAND ( new_n7446_, new_n3509_ ) -new_n7461_ = OR ( new_n3509_, new_n1614_ ) -NET_9184 = NAND ( new_n7461_, new_n7460_ ) -new_n7463_ = NOR ( new_n7456_, new_n3510_ ) -new_n7464_ = NOR ( new_n3509_, new_n2559_ ) -NET_9185 = OR ( new_n7464_, new_n7463_ ) -new_n7466_ = NOR ( new_n3019_, new_n7401_ ) -new_n7467_ = OR ( new_n6292_, new_n3017_ ) -new_n7468_ = XNOR ( new_n7467_, new_n7466_ ) -new_n7469_ = OR ( new_n7274_, new_n7269_ ) -new_n7470_ = NAND ( new_n7469_, new_n7268_ ) -new_n7471_ = NAND ( new_n7274_, new_n7269_ ) -new_n7472_ = NAND ( new_n7471_, new_n7470_ ) -new_n7473_ = XOR ( new_n7472_, new_n7468_ ) -new_n7474_ = OR ( new_n7473_, new_n3035_ ) -new_n7475_ = OR ( new_n6308_, new_n3005_ ) -new_n7476_ = NOT ( new_n6292_ ) -new_n7477_ = NAND ( new_n7476_, new_n3060_ ) -new_n7478_ = NAND ( new_n3051_, new_n2128_ ) -new_n7479_ = NAND ( new_n3062_, new_n2118_ ) -new_n7480_ = NAND ( new_n3064_, new_n2144_ ) -new_n7481_ = AND ( new_n7480_, new_n7479_, new_n7478_, new_n6323_ ) -NET_9196 = NAND ( new_n7481_, new_n7477_, new_n7475_, new_n7474_ ) -new_n7483_ = OR ( new_n7473_, new_n3373_ ) -new_n7484_ = OR ( new_n6308_, new_n3364_ ) -new_n7485_ = OR ( new_n6292_, new_n4374_ ) -new_n7486_ = NAND ( new_n3712_, new_n2144_ ) -new_n7487_ = NAND ( new_n3379_, new_n2118_ ) -new_n7488_ = NAND ( new_n3360_, NET_178 ) -new_n7489_ = NAND ( new_n3058_, new_n2128_ ) -new_n7490_ = AND ( new_n7489_, new_n7488_, new_n7487_, new_n7486_ ) -NET_9221 = NAND ( new_n7490_, new_n7485_, new_n7484_, new_n7483_ ) -new_n7492_ = NAND ( new_n2513_, new_n1330_ ) -new_n7493_ = NOT ( new_n7343_ ) -new_n7494_ = NOR ( new_n7493_, new_n3108_ ) -new_n7495_ = AND ( new_n7331_, new_n3099_ ) -new_n7496_ = NAND ( new_n3124_, new_n2634_ ) -new_n7497_ = NAND ( new_n3122_, new_n2513_ ) -new_n7498_ = NAND ( new_n7497_, new_n7496_, new_n6683_ ) -new_n7499_ = NOR ( new_n7498_, new_n7495_, new_n7494_ ) -new_n7500_ = NAND ( new_n7499_, new_n7492_ ) -new_n7501_ = NAND ( new_n7343_, new_n3122_ ) -new_n7502_ = NAND ( new_n7331_, new_n3124_ ) -new_n7503_ = NAND ( new_n3109_, new_n2513_ ) -new_n7504_ = NAND ( new_n3099_, new_n2634_ ) -new_n7505_ = AND ( new_n7504_, new_n7503_, new_n6672_ ) -new_n7506_ = NAND ( new_n7505_, new_n7502_, new_n7501_ ) -new_n7507_ = XOR ( new_n7506_, new_n3157_ ) -new_n7508_ = NAND ( new_n7507_, new_n7500_ ) -new_n7509_ = OR ( new_n7507_, new_n7500_ ) -new_n7510_ = NAND ( new_n7509_, new_n7508_ ) -new_n7511_ = NAND ( new_n7422_, new_n7418_ ) -new_n7512_ = NAND ( new_n7511_, new_n7419_ ) -new_n7513_ = XOR ( new_n7512_, new_n7510_ ) -new_n7514_ = OR ( new_n7513_, new_n3213_ ) -new_n7515_ = NAND ( new_n7364_, new_n7362_ ) -new_n7516_ = XNOR ( new_n7515_, new_n7358_ ) -new_n7517_ = NAND ( new_n7516_, new_n3238_ ) -new_n7518_ = NAND ( new_n7343_, new_n6791_ ) -new_n7519_ = NAND ( new_n7371_, new_n1616_ ) -new_n7520_ = NAND ( new_n2634_, new_n1415_ ) -new_n7521_ = NAND ( new_n7520_, new_n7519_ ) -new_n7522_ = NAND ( new_n7521_, new_n1435_ ) -new_n7523_ = OR ( new_n7522_, new_n3207_ ) -new_n7524_ = NAND ( new_n3207_, NET_435 ) -new_n7525_ = OR ( new_n3247_, new_n2506_ ) -new_n7526_ = AND ( new_n7525_, new_n7524_, new_n7523_ ) -NET_9225 = NAND ( new_n7526_, new_n7518_, new_n7517_, new_n7514_ ) -new_n7528_ = NOR ( new_n7423_, new_n3489_ ) -new_n7529_ = NAND ( new_n7426_, new_n3492_ ) -new_n7530_ = NAND ( new_n7331_, new_n3496_ ) -new_n7531_ = NAND ( new_n3251_, new_n2563_ ) -new_n7532_ = NAND ( new_n3255_, new_n2513_ ) -new_n7533_ = NAND ( new_n7532_, new_n7531_, new_n7530_, new_n7529_ ) -new_n7534_ = NOR ( new_n7533_, new_n7528_ ) -new_n7535_ = NOR ( new_n7534_, new_n3505_ ) -new_n7536_ = NOR ( new_n3504_, new_n2632_ ) -NET_9226 = OR ( new_n7536_, new_n7535_ ) -new_n7538_ = NOR ( new_n7534_, new_n3510_ ) -new_n7539_ = NOR ( new_n3509_, new_n2630_ ) -NET_9227 = OR ( new_n7539_, new_n7538_ ) -new_n7541_ = OR ( new_n7473_, new_n3574_ ) -new_n7542_ = OR ( new_n6308_, new_n3454_ ) -new_n7543_ = OR ( new_n6292_, new_n3461_ ) -new_n7544_ = NOR ( new_n3442_, new_n6147_ ) -new_n7545_ = NOT ( new_n2118_ ) -new_n7546_ = NOR ( new_n3378_, new_n7545_ ) -new_n7547_ = NOR ( new_n7546_, new_n7544_ ) -new_n7548_ = NAND ( new_n7547_, new_n7543_, new_n7542_, new_n7541_ ) -new_n7549_ = NAND ( new_n7548_, new_n3470_ ) -new_n7550_ = OR ( new_n3470_, new_n2123_ ) -NET_9241 = NAND ( new_n7550_, new_n7549_ ) -new_n7552_ = NAND ( new_n7548_, new_n3474_ ) -new_n7553_ = NAND ( new_n3476_, NET_114 ) -NET_9242 = NAND ( new_n7553_, new_n7552_ ) -new_n7555_ = NAND ( new_n7365_, new_n7345_ ) -new_n7556_ = NAND ( new_n7555_, new_n7348_ ) -new_n7557_ = XOR ( new_n7556_, new_n7346_ ) -new_n7558_ = NOR ( new_n6510_, new_n1420_ ) -new_n7559_ = NAND ( new_n7558_, new_n7327_ ) -new_n7560_ = NAND ( new_n7559_, new_n7338_ ) -new_n7561_ = XNOR ( new_n7560_, new_n3216_ ) -new_n7562_ = XOR ( new_n7561_, new_n7557_ ) -new_n7563_ = NAND ( new_n7562_, new_n3236_ ) -new_n7564_ = NAND ( new_n7558_, new_n6791_ ) -new_n7565_ = NAND ( new_n3207_, NET_437 ) -NET_9243 = NAND ( new_n7565_, new_n7564_, new_n7563_, new_n7373_ ) -new_n7567_ = OR ( new_n7513_, new_n3489_ ) -new_n7568_ = NAND ( new_n7516_, new_n3492_ ) -new_n7569_ = NAND ( new_n7343_, new_n3496_ ) -new_n7570_ = NAND ( new_n7569_, new_n7568_, new_n7567_, new_n7522_ ) -new_n7571_ = NAND ( new_n7570_, new_n3504_ ) -new_n7572_ = OR ( new_n3504_, new_n2511_ ) -NET_9263 = NAND ( new_n7572_, new_n7571_ ) -new_n7574_ = NAND ( new_n7570_, new_n3509_ ) -new_n7575_ = OR ( new_n3509_, new_n2509_ ) -NET_9264 = NAND ( new_n7575_, new_n7574_ ) -new_n7577_ = NOR ( new_n3019_, new_n7545_ ) -new_n7578_ = OR ( new_n6474_, new_n3017_ ) -new_n7579_ = XNOR ( new_n7578_, new_n7577_ ) -new_n7580_ = OR ( new_n7472_, new_n7467_ ) -new_n7581_ = NAND ( new_n7580_, new_n7466_ ) -new_n7582_ = NAND ( new_n7472_, new_n7467_ ) -new_n7583_ = NAND ( new_n7582_, new_n7581_ ) -new_n7584_ = XOR ( new_n7583_, new_n7579_ ) -new_n7585_ = OR ( new_n7584_, new_n3035_ ) -new_n7586_ = OR ( new_n6490_, new_n3005_ ) -new_n7587_ = NOT ( new_n6474_ ) -new_n7588_ = NAND ( new_n7587_, new_n3060_ ) -new_n7589_ = NAND ( new_n3051_, new_n2115_ ) -new_n7590_ = NAND ( new_n3062_, new_n2105_ ) -new_n7591_ = NAND ( new_n3064_, new_n2131_ ) -new_n7592_ = AND ( new_n7591_, new_n7590_, new_n7589_, new_n6505_ ) -NET_9278 = NAND ( new_n7592_, new_n7588_, new_n7586_, new_n7585_ ) -new_n7594_ = NAND ( new_n7562_, new_n3234_ ) -new_n7595_ = NAND ( new_n7558_, new_n3496_ ) -new_n7596_ = NAND ( new_n7595_, new_n7594_, new_n7372_ ) -new_n7597_ = NAND ( new_n7596_, new_n3504_ ) -new_n7598_ = OR ( new_n3504_, new_n1581_ ) -NET_9282 = NAND ( new_n7598_, new_n7597_ ) -new_n7600_ = NAND ( new_n7596_, new_n3509_ ) -new_n7601_ = OR ( new_n3509_, new_n1599_ ) -NET_9283 = NAND ( new_n7601_, new_n7600_ ) -new_n7603_ = OR ( new_n7584_, new_n3373_ ) -new_n7604_ = OR ( new_n6490_, new_n3364_ ) -new_n7605_ = OR ( new_n6474_, new_n4374_ ) -new_n7606_ = NAND ( new_n3712_, new_n2131_ ) -new_n7607_ = NAND ( new_n3379_, new_n2105_ ) -new_n7608_ = NAND ( new_n3360_, NET_179 ) -new_n7609_ = NAND ( new_n3058_, new_n2115_ ) -new_n7610_ = AND ( new_n7609_, new_n7608_, new_n7607_, new_n7606_ ) -NET_9290 = NAND ( new_n7610_, new_n7605_, new_n7604_, new_n7603_ ) -new_n7612_ = OR ( new_n7584_, new_n3574_ ) -new_n7613_ = OR ( new_n6490_, new_n3454_ ) -new_n7614_ = OR ( new_n6474_, new_n3461_ ) -new_n7615_ = NOR ( new_n3442_, new_n7401_ ) -new_n7616_ = NOT ( new_n2105_ ) -new_n7617_ = NOR ( new_n3378_, new_n7616_ ) -new_n7618_ = NOR ( new_n7617_, new_n7615_ ) -new_n7619_ = NAND ( new_n7618_, new_n7614_, new_n7613_, new_n7612_ ) -new_n7620_ = NAND ( new_n7619_, new_n3470_ ) -new_n7621_ = OR ( new_n3470_, new_n2110_ ) -NET_9302 = NAND ( new_n7621_, new_n7620_ ) -new_n7623_ = NAND ( new_n7619_, new_n3474_ ) -new_n7624_ = NAND ( new_n3476_, NET_115 ) -NET_9303 = NAND ( new_n7624_, new_n7623_ ) -new_n7626_ = NOR ( new_n3019_, new_n7616_ ) -new_n7627_ = OR ( new_n6627_, new_n3017_ ) -new_n7628_ = XNOR ( new_n7627_, new_n7626_ ) -new_n7629_ = OR ( new_n7583_, new_n7578_ ) -new_n7630_ = NAND ( new_n7629_, new_n7577_ ) -new_n7631_ = NAND ( new_n7583_, new_n7578_ ) -new_n7632_ = NAND ( new_n7631_, new_n7630_ ) -new_n7633_ = XOR ( new_n7632_, new_n7628_ ) -new_n7634_ = OR ( new_n7633_, new_n3035_ ) -new_n7635_ = OR ( new_n6644_, new_n3005_ ) -new_n7636_ = NOT ( new_n6627_ ) -new_n7637_ = NAND ( new_n7636_, new_n3060_ ) -new_n7638_ = NAND ( new_n3051_, new_n2102_ ) -new_n7639_ = NAND ( new_n3062_, new_n2090_ ) -new_n7640_ = NAND ( new_n3064_, new_n2118_ ) -new_n7641_ = AND ( new_n7640_, new_n7639_, new_n7638_, new_n6663_ ) -NET_9318 = NAND ( new_n7641_, new_n7637_, new_n7635_, new_n7634_ ) -new_n7643_ = OR ( new_n7633_, new_n3373_ ) -new_n7644_ = OR ( new_n6644_, new_n3364_ ) -new_n7645_ = OR ( new_n6627_, new_n4374_ ) -new_n7646_ = NAND ( new_n3712_, new_n2118_ ) -new_n7647_ = NAND ( new_n3379_, new_n2090_ ) -new_n7648_ = NAND ( new_n3360_, NET_180 ) -new_n7649_ = NAND ( new_n3058_, new_n2102_ ) -new_n7650_ = AND ( new_n7649_, new_n7648_, new_n7647_, new_n7646_ ) -NET_9329 = NAND ( new_n7650_, new_n7645_, new_n7644_, new_n7643_ ) -new_n7652_ = OR ( new_n7633_, new_n3574_ ) -new_n7653_ = OR ( new_n6644_, new_n3454_ ) -new_n7654_ = OR ( new_n6627_, new_n3461_ ) -new_n7655_ = NOR ( new_n3442_, new_n7545_ ) -new_n7656_ = NOT ( new_n2090_ ) -new_n7657_ = NOR ( new_n3378_, new_n7656_ ) -new_n7658_ = NOR ( new_n7657_, new_n7655_ ) -new_n7659_ = NAND ( new_n7658_, new_n7654_, new_n7653_, new_n7652_ ) -new_n7660_ = NAND ( new_n7659_, new_n3470_ ) -new_n7661_ = OR ( new_n3470_, new_n2095_ ) -NET_9335 = NAND ( new_n7661_, new_n7660_ ) -new_n7663_ = NAND ( new_n7659_, new_n3474_ ) -new_n7664_ = NAND ( new_n3476_, NET_116 ) -NET_9336 = NAND ( new_n7664_, new_n7663_ ) -new_n7666_ = NOR ( new_n3019_, new_n7656_ ) -new_n7667_ = NOR ( new_n4674_, new_n1299_ ) -new_n7668_ = NAND ( new_n7667_, new_n3016_ ) -new_n7669_ = XNOR ( new_n7668_, new_n7666_ ) -new_n7670_ = OR ( new_n7632_, new_n7627_ ) -new_n7671_ = NAND ( new_n7670_, new_n7626_ ) -new_n7672_ = NAND ( new_n7632_, new_n7627_ ) -new_n7673_ = NAND ( new_n7672_, new_n7671_ ) -new_n7674_ = XOR ( new_n7673_, new_n7669_ ) -new_n7675_ = OR ( new_n7674_, new_n3035_ ) -new_n7676_ = NAND ( new_n7667_, new_n5086_ ) -new_n7677_ = NAND ( new_n2908_, new_n2090_ ) -new_n7678_ = NAND ( new_n7677_, new_n7676_, new_n6630_ ) -new_n7679_ = XOR ( new_n7678_, new_n2915_ ) -new_n7680_ = NAND ( new_n7667_, new_n2908_ ) -new_n7681_ = NAND ( new_n2899_, new_n2090_ ) -new_n7682_ = NAND ( new_n7681_, new_n7680_, new_n6637_ ) -new_n7683_ = OR ( new_n7682_, new_n7679_ ) -new_n7684_ = NAND ( new_n7682_, new_n7679_ ) -new_n7685_ = NAND ( new_n7684_, new_n7683_ ) -new_n7686_ = NAND ( new_n6643_, new_n6639_ ) -new_n7687_ = NAND ( new_n7686_, new_n6640_ ) -new_n7688_ = XOR ( new_n7687_, new_n7685_ ) -new_n7689_ = OR ( new_n7688_, new_n3005_ ) -new_n7690_ = NAND ( new_n7667_, new_n3060_ ) -new_n7691_ = NAND ( new_n3051_, new_n2085_ ) -new_n7692_ = NAND ( new_n3062_, new_n2079_ ) -new_n7693_ = NAND ( NET_23564, NET_254 ) -new_n7694_ = NAND ( new_n3064_, new_n2105_ ) -new_n7695_ = AND ( new_n7694_, new_n7693_, new_n7692_, new_n7691_ ) -NET_9353 = NAND ( new_n7695_, new_n7690_, new_n7689_, new_n7675_ ) -new_n7697_ = OR ( new_n7674_, new_n3373_ ) -new_n7698_ = OR ( new_n7688_, new_n3364_ ) -new_n7699_ = NAND ( new_n7667_, new_n3382_ ) -new_n7700_ = NAND ( new_n3712_, new_n2105_ ) -new_n7701_ = NAND ( new_n3379_, new_n2079_ ) -new_n7702_ = NAND ( new_n3058_, new_n2085_ ) -new_n7703_ = NAND ( new_n3360_, NET_181 ) -new_n7704_ = AND ( new_n7703_, new_n7702_, new_n7701_, new_n7700_ ) -NET_9361 = NAND ( new_n7704_, new_n7699_, new_n7698_, new_n7697_ ) -new_n7706_ = OR ( new_n7674_, new_n3574_ ) -new_n7707_ = OR ( new_n7688_, new_n3454_ ) -new_n7708_ = NAND ( new_n7667_, new_n3460_ ) -new_n7709_ = NOR ( new_n3442_, new_n7616_ ) -new_n7710_ = NOT ( new_n2079_ ) -new_n7711_ = NOR ( new_n3378_, new_n7710_ ) -new_n7712_ = NOR ( new_n7711_, new_n7709_ ) -new_n7713_ = NAND ( new_n7712_, new_n7708_, new_n7707_, new_n7706_ ) -new_n7714_ = NAND ( new_n7713_, new_n3470_ ) -new_n7715_ = NAND ( new_n4003_, NET_149 ) -NET_9369 = NAND ( new_n7715_, new_n7714_ ) -new_n7717_ = NAND ( new_n7713_, new_n3474_ ) -new_n7718_ = NAND ( new_n3476_, NET_117 ) -NET_9370 = NAND ( new_n7718_, new_n7717_ ) -new_n7720_ = NOR ( new_n3019_, new_n7710_ ) -new_n7721_ = NOR ( new_n4850_, new_n1299_ ) -new_n7722_ = NAND ( new_n7721_, new_n3016_ ) -new_n7723_ = XNOR ( new_n7722_, new_n7720_ ) -new_n7724_ = OR ( new_n7673_, new_n7668_ ) -new_n7725_ = NAND ( new_n7724_, new_n7666_ ) -new_n7726_ = NAND ( new_n7673_, new_n7668_ ) -new_n7727_ = NAND ( new_n7726_, new_n7725_ ) -new_n7728_ = XOR ( new_n7727_, new_n7723_ ) -new_n7729_ = OR ( new_n7728_, new_n3035_ ) -new_n7730_ = NAND ( new_n7721_, new_n5086_ ) -new_n7731_ = NAND ( new_n2908_, new_n2079_ ) -new_n7732_ = NAND ( new_n7731_, new_n7730_, new_n6630_ ) -new_n7733_ = XOR ( new_n7732_, new_n2915_ ) -new_n7734_ = NAND ( new_n7721_, new_n2908_ ) -new_n7735_ = NAND ( new_n2899_, new_n2079_ ) -new_n7736_ = NAND ( new_n7735_, new_n7734_, new_n6637_ ) -new_n7737_ = OR ( new_n7736_, new_n7733_ ) -new_n7738_ = NAND ( new_n7736_, new_n7733_ ) -new_n7739_ = NAND ( new_n7738_, new_n7737_ ) -new_n7740_ = NAND ( new_n7687_, new_n7683_ ) -new_n7741_ = NAND ( new_n7740_, new_n7684_ ) -new_n7742_ = XOR ( new_n7741_, new_n7739_ ) -new_n7743_ = OR ( new_n7742_, new_n3005_ ) -new_n7744_ = NAND ( new_n7721_, new_n3060_ ) -new_n7745_ = NAND ( new_n3051_, new_n2074_ ) -new_n7746_ = NAND ( new_n3062_, new_n2068_ ) -new_n7747_ = OR ( NET_275, new_n2025_ ) -new_n7748_ = NAND ( new_n3064_, new_n2090_ ) -new_n7749_ = AND ( new_n7748_, new_n7747_, new_n7746_, new_n7745_ ) -NET_9445 = NAND ( new_n7749_, new_n7744_, new_n7743_, new_n7729_ ) -new_n7751_ = OR ( new_n7728_, new_n3373_ ) -new_n7752_ = OR ( new_n7742_, new_n3364_ ) -new_n7753_ = NAND ( new_n7721_, new_n3382_ ) -new_n7754_ = NAND ( new_n3712_, new_n2090_ ) -new_n7755_ = NAND ( new_n3379_, new_n2068_ ) -new_n7756_ = NAND ( new_n3058_, new_n2074_ ) -new_n7757_ = NAND ( new_n3360_, NET_182 ) -new_n7758_ = AND ( new_n7757_, new_n7756_, new_n7755_, new_n7754_ ) -NET_9477 = NAND ( new_n7758_, new_n7753_, new_n7752_, new_n7751_ ) -new_n7760_ = OR ( new_n7728_, new_n3574_ ) -new_n7761_ = OR ( new_n7742_, new_n3454_ ) -new_n7762_ = NAND ( new_n7721_, new_n3460_ ) -new_n7763_ = NOR ( new_n3442_, new_n7656_ ) -new_n7764_ = NOT ( new_n2068_ ) -new_n7765_ = NOR ( new_n3378_, new_n7764_ ) -new_n7766_ = NOR ( new_n7765_, new_n7763_ ) -new_n7767_ = NAND ( new_n7766_, new_n7762_, new_n7761_, new_n7760_ ) -new_n7768_ = NAND ( new_n7767_, new_n3470_ ) -new_n7769_ = NAND ( new_n4003_, NET_150 ) -NET_9516 = NAND ( new_n7769_, new_n7768_ ) -new_n7771_ = NAND ( new_n7767_, new_n3474_ ) -new_n7772_ = NAND ( new_n3476_, NET_118 ) -NET_9517 = NAND ( new_n7772_, new_n7771_ ) -new_n7774_ = NOR ( new_n3019_, new_n7764_ ) -new_n7775_ = NOR ( new_n5015_, new_n1299_ ) -new_n7776_ = NAND ( new_n7775_, new_n3016_ ) -new_n7777_ = XNOR ( new_n7776_, new_n7774_ ) -new_n7778_ = OR ( new_n7727_, new_n7722_ ) -new_n7779_ = NAND ( new_n7778_, new_n7720_ ) -new_n7780_ = NAND ( new_n7727_, new_n7722_ ) -new_n7781_ = NAND ( new_n7780_, new_n7779_ ) -new_n7782_ = XOR ( new_n7781_, new_n7777_ ) -new_n7783_ = OR ( new_n7782_, new_n3035_ ) -new_n7784_ = NAND ( new_n7775_, new_n5086_ ) -new_n7785_ = NAND ( new_n2908_, new_n2068_ ) -new_n7786_ = NAND ( new_n7785_, new_n7784_, new_n6630_ ) -new_n7787_ = XOR ( new_n7786_, new_n2915_ ) -new_n7788_ = NAND ( new_n7775_, new_n2908_ ) -new_n7789_ = NAND ( new_n2899_, new_n2068_ ) -new_n7790_ = NAND ( new_n7789_, new_n7788_, new_n6637_ ) -new_n7791_ = OR ( new_n7790_, new_n7787_ ) -new_n7792_ = NAND ( new_n7790_, new_n7787_ ) -new_n7793_ = NAND ( new_n7792_, new_n7791_ ) -new_n7794_ = NAND ( new_n7741_, new_n7737_ ) -new_n7795_ = NAND ( new_n7794_, new_n7738_ ) -new_n7796_ = XOR ( new_n7795_, new_n7793_ ) -new_n7797_ = OR ( new_n7796_, new_n3005_ ) -new_n7798_ = NAND ( new_n7775_, new_n3060_ ) -new_n7799_ = NAND ( new_n3051_, new_n2057_ ) -new_n7800_ = NAND ( new_n3062_, new_n2398_ ) -new_n7801_ = OR ( NET_275, new_n2024_ ) -new_n7802_ = NAND ( new_n3064_, new_n2079_ ) -new_n7803_ = AND ( new_n7802_, new_n7801_, new_n7800_, new_n7799_ ) -NET_9552 = NAND ( new_n7803_, new_n7798_, new_n7797_, new_n7783_ ) -new_n7805_ = NOR ( new_n3210_, new_n3118_ ) -new_n7806_ = NAND ( new_n3112_, new_n1435_ ) -new_n7807_ = NAND ( new_n7806_, new_n3231_, new_n3114_ ) -new_n7808_ = NOR ( new_n7807_, new_n3096_ ) -new_n7809_ = NOT ( new_n7808_ ) -new_n7810_ = NAND ( new_n7809_, new_n7558_ ) -new_n7811_ = NAND ( new_n3133_, new_n1433_, new_n1330_ ) -new_n7812_ = NAND ( new_n3304_, new_n3112_ ) -new_n7813_ = NAND ( new_n7812_, new_n7811_ ) -new_n7814_ = NAND ( new_n7813_, new_n1606_ ) -new_n7815_ = AND ( new_n7814_, new_n7810_ ) -new_n7816_ = NOT ( new_n1616_ ) -new_n7817_ = NOR ( new_n7816_, new_n1606_ ) -new_n7818_ = NAND ( new_n7817_, new_n3096_ ) -new_n7819_ = NAND ( new_n1606_, new_n1330_ ) -new_n7820_ = NAND ( new_n7819_, new_n7499_ ) -new_n7821_ = OR ( new_n7506_, new_n1330_ ) -new_n7822_ = NAND ( new_n7821_, new_n3158_ ) -new_n7823_ = OR ( new_n7821_, new_n3158_ ) -new_n7824_ = NAND ( new_n1616_, new_n1330_ ) -new_n7825_ = NAND ( new_n7824_, new_n7823_, new_n7822_, new_n7499_ ) -new_n7826_ = NAND ( new_n7512_, new_n7509_ ) -new_n7827_ = NAND ( new_n7826_, new_n7508_ ) -new_n7828_ = NAND ( new_n7827_, new_n7825_ ) -new_n7829_ = NAND ( new_n7824_, new_n7499_ ) -new_n7830_ = NAND ( new_n7823_, new_n7822_ ) -new_n7831_ = NAND ( new_n7830_, new_n7829_ ) -new_n7832_ = NAND ( new_n7831_, new_n7828_ ) -new_n7833_ = XNOR ( new_n7832_, new_n7820_ ) -new_n7834_ = XOR ( new_n7833_, new_n7507_ ) -new_n7835_ = OR ( new_n7834_, new_n7818_ ) -new_n7836_ = NAND ( new_n7813_, new_n7558_ ) -new_n7837_ = NOR ( new_n7817_, new_n3097_ ) -new_n7838_ = OR ( new_n7837_, new_n7807_ ) -new_n7839_ = NAND ( new_n7838_, new_n1606_ ) -new_n7840_ = NAND ( new_n7839_, new_n7836_, new_n7835_ ) -new_n7841_ = OR ( new_n7840_, new_n7815_ ) -new_n7842_ = NAND ( new_n7840_, new_n7815_ ) -new_n7843_ = NOT ( new_n7827_ ) -new_n7844_ = NAND ( new_n7831_, new_n7825_ ) -new_n7845_ = OR ( new_n7844_, new_n7843_ ) -new_n7846_ = NAND ( new_n7844_, new_n7843_ ) -new_n7847_ = NAND ( new_n7846_, new_n7845_, new_n7817_, new_n3096_ ) -new_n7848_ = NAND ( new_n7813_, new_n7328_ ) -new_n7849_ = NAND ( new_n7838_, new_n1616_ ) -new_n7850_ = NAND ( new_n7849_, new_n7848_, new_n7847_ ) -new_n7851_ = AND ( new_n7809_, new_n7328_ ) -new_n7852_ = NOT ( new_n7813_ ) -new_n7853_ = NOR ( new_n7852_, new_n7816_ ) -new_n7854_ = NOR ( new_n7853_, new_n7851_ ) -new_n7855_ = NAND ( new_n7854_, new_n7850_ ) -new_n7856_ = OR ( new_n7818_, new_n7513_ ) -new_n7857_ = NAND ( new_n7813_, new_n7343_ ) -new_n7858_ = NAND ( new_n7838_, new_n2513_ ) -new_n7859_ = NAND ( new_n7858_, new_n7857_, new_n7856_, new_n1330_ ) -new_n7860_ = NAND ( new_n7809_, new_n7343_ ) -new_n7861_ = NAND ( new_n2634_, new_n1329_ ) -new_n7862_ = NAND ( new_n7813_, new_n2513_ ) -new_n7863_ = AND ( new_n7862_, new_n7861_, new_n7860_ ) -new_n7864_ = NAND ( new_n7863_, new_n7859_ ) -new_n7865_ = OR ( new_n7863_, new_n7859_ ) -new_n7866_ = NAND ( new_n7809_, new_n7331_ ) -new_n7867_ = NAND ( new_n2563_, new_n1329_ ) -new_n7868_ = NAND ( new_n7813_, new_n2634_ ) -new_n7869_ = AND ( new_n7868_, new_n7867_, new_n7866_ ) -new_n7870_ = OR ( new_n7818_, new_n7423_ ) -new_n7871_ = NAND ( new_n7813_, new_n7331_ ) -new_n7872_ = NAND ( new_n7838_, new_n2634_ ) -new_n7873_ = NAND ( new_n7872_, new_n7871_, new_n7870_, new_n1330_ ) -new_n7874_ = OR ( new_n7873_, new_n7869_ ) -new_n7875_ = NAND ( new_n7873_, new_n7869_ ) -new_n7876_ = OR ( new_n7818_, new_n7307_ ) -new_n7877_ = NAND ( new_n7813_, new_n7294_ ) -new_n7878_ = NAND ( new_n7838_, new_n2563_ ) -new_n7879_ = NAND ( new_n7878_, new_n7877_, new_n7876_, new_n1330_ ) -new_n7880_ = NAND ( new_n7809_, new_n7294_ ) -new_n7881_ = NAND ( new_n2575_, new_n1329_ ) -new_n7882_ = NAND ( new_n7813_, new_n2563_ ) -new_n7883_ = AND ( new_n7882_, new_n7881_, new_n7880_ ) -new_n7884_ = NAND ( new_n7883_, new_n7879_ ) -new_n7885_ = OR ( new_n7883_, new_n7879_ ) -new_n7886_ = NAND ( new_n7809_, new_n7212_ ) -new_n7887_ = NAND ( new_n2527_, new_n1329_ ) -new_n7888_ = NAND ( new_n7813_, new_n2575_ ) -new_n7889_ = AND ( new_n7888_, new_n7887_, new_n7886_ ) -new_n7890_ = OR ( new_n7818_, new_n7226_ ) -new_n7891_ = NAND ( new_n7813_, new_n7212_ ) -new_n7892_ = NAND ( new_n7838_, new_n2575_ ) -new_n7893_ = NAND ( new_n7892_, new_n7891_, new_n7890_, new_n1330_ ) -new_n7894_ = OR ( new_n7893_, new_n7889_ ) -new_n7895_ = NAND ( new_n7893_, new_n7889_ ) -new_n7896_ = OR ( new_n7818_, new_n7157_ ) -new_n7897_ = NAND ( new_n7813_, new_n7144_ ) -new_n7898_ = NAND ( new_n7838_, new_n2527_ ) -new_n7899_ = NAND ( new_n7898_, new_n7897_, new_n7896_, new_n1330_ ) -new_n7900_ = NAND ( new_n7809_, new_n7144_ ) -new_n7901_ = NAND ( new_n2414_, new_n1329_ ) -new_n7902_ = NAND ( new_n7813_, new_n2527_ ) -new_n7903_ = AND ( new_n7902_, new_n7901_, new_n7900_ ) -new_n7904_ = NAND ( new_n7903_, new_n7899_ ) -new_n7905_ = OR ( new_n7903_, new_n7899_ ) -new_n7906_ = NAND ( new_n7809_, new_n7063_ ) -new_n7907_ = NAND ( new_n2427_, new_n1329_ ) -new_n7908_ = NAND ( new_n7813_, new_n2414_ ) -new_n7909_ = AND ( new_n7908_, new_n7907_, new_n7906_ ) -new_n7910_ = OR ( new_n7818_, new_n7077_ ) -new_n7911_ = NAND ( new_n7813_, new_n7063_ ) -new_n7912_ = NAND ( new_n7838_, new_n2414_ ) -new_n7913_ = NAND ( new_n7912_, new_n7911_, new_n7910_, new_n1330_ ) -new_n7914_ = OR ( new_n7913_, new_n7909_ ) -new_n7915_ = NAND ( new_n7913_, new_n7909_ ) -new_n7916_ = OR ( new_n7818_, new_n7008_ ) -new_n7917_ = NAND ( new_n7813_, new_n6995_ ) -new_n7918_ = NAND ( new_n7838_, new_n2427_ ) -new_n7919_ = NAND ( new_n7918_, new_n7917_, new_n7916_, new_n1330_ ) -new_n7920_ = NAND ( new_n7809_, new_n6995_ ) -new_n7921_ = NAND ( new_n1664_, new_n1329_ ) -new_n7922_ = NAND ( new_n7813_, new_n2427_ ) -new_n7923_ = AND ( new_n7922_, new_n7921_, new_n7920_ ) -new_n7924_ = NAND ( new_n7923_, new_n7919_ ) -new_n7925_ = OR ( new_n7923_, new_n7919_ ) -new_n7926_ = NAND ( new_n7809_, new_n6915_ ) -new_n7927_ = NAND ( new_n1677_, new_n1329_ ) -new_n7928_ = NAND ( new_n7813_, new_n1664_ ) -new_n7929_ = AND ( new_n7928_, new_n7927_, new_n7926_ ) -new_n7930_ = OR ( new_n7818_, new_n6928_ ) -new_n7931_ = NAND ( new_n7813_, new_n6915_ ) -new_n7932_ = NAND ( new_n7838_, new_n1664_ ) -new_n7933_ = NAND ( new_n7932_, new_n7931_, new_n7930_, new_n1330_ ) -new_n7934_ = OR ( new_n7933_, new_n7929_ ) -new_n7935_ = NAND ( new_n7933_, new_n7929_ ) -new_n7936_ = OR ( new_n7818_, new_n6860_ ) -new_n7937_ = NAND ( new_n7813_, new_n6847_ ) -new_n7938_ = NAND ( new_n7838_, new_n1677_ ) -new_n7939_ = NAND ( new_n7938_, new_n7937_, new_n7936_, new_n1330_ ) -new_n7940_ = NAND ( new_n7809_, new_n6847_ ) -new_n7941_ = NAND ( new_n1690_, new_n1329_ ) -new_n7942_ = NAND ( new_n7813_, new_n1677_ ) -new_n7943_ = AND ( new_n7942_, new_n7941_, new_n7940_ ) -new_n7944_ = NAND ( new_n7943_, new_n7939_ ) -new_n7945_ = OR ( new_n7943_, new_n7939_ ) -new_n7946_ = NAND ( new_n7809_, new_n6765_ ) -new_n7947_ = NAND ( new_n1705_, new_n1329_ ) -new_n7948_ = NAND ( new_n7813_, new_n1690_ ) -new_n7949_ = AND ( new_n7948_, new_n7947_, new_n7946_ ) -new_n7950_ = OR ( new_n7818_, new_n6778_ ) -new_n7951_ = NAND ( new_n7813_, new_n6765_ ) -new_n7952_ = NAND ( new_n7838_, new_n1690_ ) -new_n7953_ = NAND ( new_n7952_, new_n7951_, new_n7950_, new_n1330_ ) -new_n7954_ = OR ( new_n7953_, new_n7949_ ) -new_n7955_ = NAND ( new_n7953_, new_n7949_ ) -new_n7956_ = OR ( new_n7818_, new_n6690_ ) -new_n7957_ = OR ( new_n7852_, new_n6668_ ) -new_n7958_ = NAND ( new_n7838_, new_n1705_ ) -new_n7959_ = NAND ( new_n7958_, new_n7957_, new_n7956_, new_n1330_ ) -new_n7960_ = OR ( new_n7808_, new_n6668_ ) -new_n7961_ = NAND ( new_n1719_, new_n1329_ ) -new_n7962_ = NAND ( new_n7813_, new_n1705_ ) -new_n7963_ = AND ( new_n7962_, new_n7961_, new_n7960_ ) -new_n7964_ = NAND ( new_n7963_, new_n7959_ ) -new_n7965_ = OR ( new_n7963_, new_n7959_ ) -new_n7966_ = OR ( new_n7808_, new_n6519_ ) -new_n7967_ = NAND ( new_n1733_, new_n1329_ ) -new_n7968_ = NAND ( new_n7813_, new_n1719_ ) -new_n7969_ = AND ( new_n7968_, new_n7967_, new_n7966_ ) -new_n7970_ = OR ( new_n7818_, new_n6540_ ) -new_n7971_ = OR ( new_n7852_, new_n6519_ ) -new_n7972_ = NAND ( new_n7838_, new_n1719_ ) -new_n7973_ = NAND ( new_n7972_, new_n7971_, new_n7970_, new_n1330_ ) -new_n7974_ = OR ( new_n7973_, new_n7969_ ) -new_n7975_ = NAND ( new_n7973_, new_n7969_ ) -new_n7976_ = OR ( new_n7818_, new_n6354_ ) -new_n7977_ = OR ( new_n7852_, new_n6332_ ) -new_n7978_ = NAND ( new_n7838_, new_n1733_ ) -new_n7979_ = NAND ( new_n7978_, new_n7977_, new_n7976_, new_n1330_ ) -new_n7980_ = OR ( new_n7808_, new_n6332_ ) -new_n7981_ = NAND ( new_n1747_, new_n1329_ ) -new_n7982_ = NAND ( new_n7813_, new_n1733_ ) -new_n7983_ = AND ( new_n7982_, new_n7981_, new_n7980_ ) -new_n7984_ = NAND ( new_n7983_, new_n7979_ ) -new_n7985_ = OR ( new_n7983_, new_n7979_ ) -new_n7986_ = OR ( new_n7808_, new_n6185_ ) -new_n7987_ = NAND ( new_n1761_, new_n1329_ ) -new_n7988_ = NAND ( new_n7813_, new_n1747_ ) -new_n7989_ = AND ( new_n7988_, new_n7987_, new_n7986_ ) -new_n7990_ = OR ( new_n7818_, new_n6206_ ) -new_n7991_ = OR ( new_n7852_, new_n6185_ ) -new_n7992_ = NAND ( new_n7838_, new_n1747_ ) -new_n7993_ = NAND ( new_n7992_, new_n7991_, new_n7990_, new_n1330_ ) -new_n7994_ = OR ( new_n7993_, new_n7989_ ) -new_n7995_ = NAND ( new_n7993_, new_n7989_ ) -new_n7996_ = OR ( new_n7818_, new_n6043_ ) -new_n7997_ = OR ( new_n7852_, new_n6022_ ) -new_n7998_ = NAND ( new_n7838_, new_n1761_ ) -new_n7999_ = NAND ( new_n7998_, new_n7997_, new_n7996_, new_n1330_ ) -new_n8000_ = OR ( new_n7808_, new_n6022_ ) -new_n8001_ = NAND ( new_n1775_, new_n1329_ ) -new_n8002_ = NAND ( new_n7813_, new_n1761_ ) -new_n8003_ = AND ( new_n8002_, new_n8001_, new_n8000_ ) -new_n8004_ = NAND ( new_n8003_, new_n7999_ ) -new_n8005_ = OR ( new_n8003_, new_n7999_ ) -new_n8006_ = OR ( new_n7808_, new_n5857_ ) -new_n8007_ = NAND ( new_n1789_, new_n1329_ ) -new_n8008_ = NAND ( new_n7813_, new_n1775_ ) -new_n8009_ = AND ( new_n8008_, new_n8007_, new_n8006_ ) -new_n8010_ = OR ( new_n7818_, new_n5880_ ) -new_n8011_ = OR ( new_n7852_, new_n5857_ ) -new_n8012_ = NAND ( new_n7838_, new_n1775_ ) -new_n8013_ = NAND ( new_n8012_, new_n8011_, new_n8010_, new_n1330_ ) -new_n8014_ = OR ( new_n8013_, new_n8009_ ) -new_n8015_ = NAND ( new_n8013_, new_n8009_ ) -new_n8016_ = OR ( new_n7818_, new_n5679_ ) -new_n8017_ = OR ( new_n7852_, new_n5657_ ) -new_n8018_ = NAND ( new_n7838_, new_n1789_ ) -new_n8019_ = NAND ( new_n8018_, new_n8017_, new_n8016_, new_n1330_ ) -new_n8020_ = OR ( new_n7808_, new_n5657_ ) -new_n8021_ = NAND ( new_n1803_, new_n1329_ ) -new_n8022_ = NAND ( new_n7813_, new_n1789_ ) -new_n8023_ = AND ( new_n8022_, new_n8021_, new_n8020_ ) -new_n8024_ = NAND ( new_n8023_, new_n8019_ ) -new_n8025_ = OR ( new_n8023_, new_n8019_ ) -new_n8026_ = OR ( new_n7808_, new_n5491_ ) -new_n8027_ = NAND ( new_n1817_, new_n1329_ ) -new_n8028_ = NAND ( new_n7813_, new_n1803_ ) -new_n8029_ = AND ( new_n8028_, new_n8027_, new_n8026_ ) -new_n8030_ = OR ( new_n7818_, new_n5512_ ) -new_n8031_ = OR ( new_n7852_, new_n5491_ ) -new_n8032_ = NAND ( new_n7838_, new_n1803_ ) -new_n8033_ = NAND ( new_n8032_, new_n8031_, new_n8030_, new_n1330_ ) -new_n8034_ = OR ( new_n8033_, new_n8029_ ) -new_n8035_ = NAND ( new_n8033_, new_n8029_ ) -new_n8036_ = OR ( new_n7818_, new_n5341_ ) -new_n8037_ = OR ( new_n7852_, new_n5318_ ) -new_n8038_ = NAND ( new_n7838_, new_n1817_ ) -new_n8039_ = NAND ( new_n8038_, new_n8037_, new_n8036_, new_n1330_ ) -new_n8040_ = OR ( new_n7808_, new_n5318_ ) -new_n8041_ = NAND ( new_n1831_, new_n1329_ ) -new_n8042_ = NAND ( new_n7813_, new_n1817_ ) -new_n8043_ = AND ( new_n8042_, new_n8041_, new_n8040_ ) -new_n8044_ = NAND ( new_n8043_, new_n8039_ ) -new_n8045_ = OR ( new_n8043_, new_n8039_ ) -new_n8046_ = OR ( new_n7808_, new_n5158_ ) -new_n8047_ = NAND ( new_n1845_, new_n1329_ ) -new_n8048_ = NAND ( new_n7813_, new_n1831_ ) -new_n8049_ = AND ( new_n8048_, new_n8047_, new_n8046_ ) -new_n8050_ = OR ( new_n7818_, new_n5182_ ) -new_n8051_ = OR ( new_n7852_, new_n5158_ ) -new_n8052_ = NAND ( new_n7838_, new_n1831_ ) -new_n8053_ = NAND ( new_n8052_, new_n8051_, new_n8050_, new_n1330_ ) -new_n8054_ = OR ( new_n8053_, new_n8049_ ) -new_n8055_ = NAND ( new_n8053_, new_n8049_ ) -new_n8056_ = OR ( new_n7818_, new_n4944_ ) -new_n8057_ = OR ( new_n7852_, new_n4921_ ) -new_n8058_ = NAND ( new_n7838_, new_n1845_ ) -new_n8059_ = NAND ( new_n8058_, new_n8057_, new_n8056_, new_n1330_ ) -new_n8060_ = OR ( new_n7808_, new_n4921_ ) -new_n8061_ = NAND ( new_n1859_, new_n1329_ ) -new_n8062_ = NAND ( new_n7813_, new_n1845_ ) -new_n8063_ = AND ( new_n8062_, new_n8061_, new_n8060_ ) -new_n8064_ = NAND ( new_n8063_, new_n8059_ ) -new_n8065_ = OR ( new_n8063_, new_n8059_ ) -new_n8066_ = OR ( new_n7808_, new_n4759_ ) -new_n8067_ = NAND ( new_n1873_, new_n1329_ ) -new_n8068_ = NAND ( new_n7813_, new_n1859_ ) -new_n8069_ = AND ( new_n8068_, new_n8067_, new_n8066_ ) -new_n8070_ = OR ( new_n7818_, new_n4779_ ) -new_n8071_ = OR ( new_n7852_, new_n4759_ ) -new_n8072_ = NAND ( new_n7838_, new_n1859_ ) -new_n8073_ = NAND ( new_n8072_, new_n8071_, new_n8070_, new_n1330_ ) -new_n8074_ = OR ( new_n8073_, new_n8069_ ) -new_n8075_ = NAND ( new_n8073_, new_n8069_ ) -new_n8076_ = OR ( new_n7818_, new_n4608_ ) -new_n8077_ = NAND ( new_n7838_, new_n1873_ ) -new_n8078_ = OR ( new_n7852_, new_n4588_ ) -new_n8079_ = NAND ( new_n8078_, new_n8077_, new_n8076_, new_n1330_ ) -new_n8080_ = OR ( new_n7808_, new_n4588_ ) -new_n8081_ = NAND ( new_n1887_, new_n1329_ ) -new_n8082_ = NAND ( new_n7813_, new_n1873_ ) -new_n8083_ = AND ( new_n8082_, new_n8081_, new_n8080_ ) -new_n8084_ = NAND ( new_n8083_, new_n8079_ ) -new_n8085_ = OR ( new_n8083_, new_n8079_ ) -new_n8086_ = NAND ( new_n7813_, new_n1887_ ) -new_n8087_ = NAND ( new_n1901_, new_n1329_ ) -new_n8088_ = OR ( new_n7808_, new_n4429_ ) -new_n8089_ = AND ( new_n8088_, new_n8087_, new_n8086_ ) -new_n8090_ = OR ( new_n7818_, new_n4453_ ) -new_n8091_ = NAND ( new_n7838_, new_n1887_ ) -new_n8092_ = OR ( new_n7852_, new_n4429_ ) -new_n8093_ = NAND ( new_n8092_, new_n8091_, new_n8090_, new_n1330_ ) -new_n8094_ = OR ( new_n8093_, new_n8089_ ) -new_n8095_ = NAND ( new_n8093_, new_n8089_ ) -new_n8096_ = OR ( new_n7818_, new_n4249_ ) -new_n8097_ = NAND ( new_n7838_, new_n1901_ ) -new_n8098_ = OR ( new_n7852_, new_n4227_ ) -new_n8099_ = NAND ( new_n8098_, new_n8097_, new_n8096_, new_n1330_ ) -new_n8100_ = NAND ( new_n7813_, new_n1901_ ) -new_n8101_ = NAND ( new_n1914_, new_n1329_ ) -new_n8102_ = OR ( new_n7808_, new_n4227_ ) -new_n8103_ = AND ( new_n8102_, new_n8101_, new_n8100_ ) -new_n8104_ = NAND ( new_n8103_, new_n8099_ ) -new_n8105_ = OR ( new_n8103_, new_n8099_ ) -new_n8106_ = NAND ( new_n7813_, new_n1914_ ) -new_n8107_ = NAND ( new_n1926_, new_n1329_ ) -new_n8108_ = OR ( new_n7808_, new_n4034_ ) -new_n8109_ = AND ( new_n8108_, new_n8107_, new_n8106_ ) -new_n8110_ = OR ( new_n7818_, new_n4055_ ) -new_n8111_ = NAND ( new_n7838_, new_n1914_ ) -new_n8112_ = OR ( new_n7852_, new_n4034_ ) -new_n8113_ = NAND ( new_n8112_, new_n8111_, new_n8110_, new_n1330_ ) -new_n8114_ = OR ( new_n8113_, new_n8109_ ) -new_n8115_ = NAND ( new_n8113_, new_n8109_ ) -new_n8116_ = OR ( new_n7818_, new_n3839_ ) -new_n8117_ = NAND ( new_n7838_, new_n1926_ ) -new_n8118_ = OR ( new_n7852_, new_n3817_ ) -new_n8119_ = NAND ( new_n8118_, new_n8117_, new_n8116_, new_n1330_ ) -new_n8120_ = NAND ( new_n7813_, new_n1926_ ) -new_n8121_ = NAND ( new_n1937_, new_n1329_ ) -new_n8122_ = OR ( new_n7808_, new_n3817_ ) -new_n8123_ = AND ( new_n8122_, new_n8121_, new_n8120_ ) -new_n8124_ = NAND ( new_n8123_, new_n8119_ ) -new_n8125_ = OR ( new_n8123_, new_n8119_ ) -new_n8126_ = NAND ( new_n7813_, new_n1937_ ) -new_n8127_ = NAND ( new_n1948_, new_n1329_ ) -new_n8128_ = OR ( new_n7808_, new_n3591_ ) -new_n8129_ = AND ( new_n8128_, new_n8127_, new_n8126_ ) -new_n8130_ = OR ( new_n7818_, new_n3617_ ) -new_n8131_ = NAND ( new_n7838_, new_n1937_ ) -new_n8132_ = OR ( new_n7852_, new_n3591_ ) -new_n8133_ = NAND ( new_n8132_, new_n8131_, new_n8130_, new_n1330_ ) -new_n8134_ = OR ( new_n8133_, new_n8129_ ) -new_n8135_ = NAND ( new_n8133_, new_n8129_ ) -new_n8136_ = OR ( new_n7818_, new_n3187_ ) -new_n8137_ = NAND ( new_n7838_, new_n1948_ ) -new_n8138_ = OR ( new_n7852_, new_n3073_ ) -new_n8139_ = NAND ( new_n8138_, new_n8137_, new_n8136_, new_n1330_ ) -new_n8140_ = NAND ( new_n7813_, new_n1948_ ) -new_n8141_ = NAND ( new_n1959_, new_n1329_ ) -new_n8142_ = OR ( new_n7808_, new_n3073_ ) -new_n8143_ = AND ( new_n8142_, new_n8141_, new_n8140_ ) -new_n8144_ = NAND ( new_n8143_, new_n8139_ ) -new_n8145_ = OR ( new_n8143_, new_n8139_ ) -new_n8146_ = OR ( new_n7808_, new_n3168_ ) -new_n8147_ = NAND ( new_n7813_, new_n1959_ ) -new_n8148_ = AND ( new_n8147_, new_n8146_ ) -new_n8149_ = OR ( new_n3087_, new_n1433_ ) -new_n8150_ = NOR ( new_n3096_, new_n1426_ ) -new_n8151_ = NAND ( new_n8150_, new_n8149_, new_n3101_, new_n1330_ ) -new_n8152_ = OR ( new_n8151_, new_n8148_ ) -new_n8153_ = NOR ( new_n7818_, new_n3415_ ) -new_n8154_ = NAND ( new_n7838_, new_n1959_ ) -new_n8155_ = NAND ( new_n8151_, new_n8148_ ) -new_n8156_ = OR ( new_n7852_, new_n3168_ ) -new_n8157_ = NAND ( new_n8156_, new_n8155_, new_n8154_, new_n1330_ ) -new_n8158_ = OR ( new_n8157_, new_n8153_ ) -new_n8159_ = NAND ( new_n8158_, new_n8152_, new_n8145_ ) -new_n8160_ = NAND ( new_n8159_, new_n8144_, new_n8135_ ) -new_n8161_ = NAND ( new_n8160_, new_n8134_, new_n8125_ ) -new_n8162_ = NAND ( new_n8161_, new_n8124_, new_n8115_ ) -new_n8163_ = NAND ( new_n8162_, new_n8114_, new_n8105_ ) -new_n8164_ = NAND ( new_n8163_, new_n8104_, new_n8095_ ) -new_n8165_ = NAND ( new_n8164_, new_n8094_, new_n8085_ ) -new_n8166_ = NAND ( new_n8165_, new_n8084_, new_n8075_ ) -new_n8167_ = NAND ( new_n8166_, new_n8074_, new_n8065_ ) -new_n8168_ = NAND ( new_n8167_, new_n8064_, new_n8055_ ) -new_n8169_ = NAND ( new_n8168_, new_n8054_, new_n8045_ ) -new_n8170_ = NAND ( new_n8169_, new_n8044_, new_n8035_ ) -new_n8171_ = NAND ( new_n8170_, new_n8034_, new_n8025_ ) -new_n8172_ = NAND ( new_n8171_, new_n8024_, new_n8015_ ) -new_n8173_ = NAND ( new_n8172_, new_n8014_, new_n8005_ ) -new_n8174_ = NAND ( new_n8173_, new_n8004_, new_n7995_ ) -new_n8175_ = NAND ( new_n8174_, new_n7994_, new_n7985_ ) -new_n8176_ = NAND ( new_n8175_, new_n7984_, new_n7975_ ) -new_n8177_ = NAND ( new_n8176_, new_n7974_, new_n7965_ ) -new_n8178_ = NAND ( new_n8177_, new_n7964_, new_n7955_ ) -new_n8179_ = NAND ( new_n8178_, new_n7954_, new_n7945_ ) -new_n8180_ = NAND ( new_n8179_, new_n7944_, new_n7935_ ) -new_n8181_ = NAND ( new_n8180_, new_n7934_, new_n7925_ ) -new_n8182_ = NAND ( new_n8181_, new_n7924_, new_n7915_ ) -new_n8183_ = NAND ( new_n8182_, new_n7914_, new_n7905_ ) -new_n8184_ = NAND ( new_n8183_, new_n7904_, new_n7895_ ) -new_n8185_ = NAND ( new_n8184_, new_n7894_, new_n7885_ ) -new_n8186_ = NAND ( new_n8185_, new_n7884_, new_n7875_ ) -new_n8187_ = NAND ( new_n8186_, new_n7874_, new_n7865_ ) -new_n8188_ = NAND ( new_n8187_, new_n7864_, new_n7855_ ) -new_n8189_ = OR ( new_n7854_, new_n7850_ ) -new_n8190_ = NAND ( new_n8189_, new_n8188_, new_n7842_, new_n7841_ ) -new_n8191_ = NAND ( new_n7840_, new_n7815_, new_n3317_ ) -new_n8192_ = OR ( new_n7840_, new_n7815_, new_n3317_ ) -new_n8193_ = NAND ( new_n8192_, new_n8191_, new_n8190_ ) -new_n8194_ = XNOR ( new_n8193_, new_n3087_ ) -new_n8195_ = OR ( new_n8194_, new_n7805_ ) -new_n8196_ = NAND ( new_n8193_, new_n1436_ ) -new_n8197_ = OR ( new_n8193_, new_n3304_ ) -new_n8198_ = NAND ( new_n8197_, new_n8196_, new_n3097_ ) -new_n8199_ = NAND ( new_n7328_, new_n7816_ ) -new_n8200_ = OR ( new_n7328_, new_n7816_ ) -new_n8201_ = NOR ( new_n7493_, new_n2513_ ) -new_n8202_ = AND ( new_n7493_, new_n2513_ ) -new_n8203_ = NOT ( new_n7294_ ) -new_n8204_ = OR ( new_n8203_, new_n2563_ ) -new_n8205_ = NAND ( new_n8203_, new_n2563_ ) -new_n8206_ = NAND ( new_n7212_, new_n7214_ ) -new_n8207_ = NOR ( new_n7212_, new_n7214_ ) -new_n8208_ = NOT ( new_n7144_ ) -new_n8209_ = OR ( new_n8208_, new_n2527_ ) -new_n8210_ = NAND ( new_n8208_, new_n2527_ ) -new_n8211_ = NAND ( new_n7063_, new_n7065_ ) -new_n8212_ = NOR ( new_n7063_, new_n7065_ ) -new_n8213_ = NOT ( new_n6995_ ) -new_n8214_ = OR ( new_n8213_, new_n2427_ ) -new_n8215_ = NAND ( new_n8213_, new_n2427_ ) -new_n8216_ = NOT ( new_n6915_ ) -new_n8217_ = OR ( new_n8216_, new_n1664_ ) -new_n8218_ = NAND ( new_n8216_, new_n1664_ ) -new_n8219_ = NOT ( new_n6847_ ) -new_n8220_ = OR ( new_n8219_, new_n1677_ ) -new_n8221_ = NAND ( new_n8219_, new_n1677_ ) -new_n8222_ = NOR ( new_n6696_, new_n6670_ ) -new_n8223_ = OR ( new_n6668_, new_n1705_ ) -new_n8224_ = NAND ( new_n6519_, new_n1719_ ) -new_n8225_ = OR ( new_n6519_, new_n1719_ ) -new_n8226_ = NOR ( new_n6360_, new_n6334_ ) -new_n8227_ = NOR ( new_n6332_, new_n1733_ ) -new_n8228_ = NAND ( new_n6022_, new_n1761_ ) -new_n8229_ = OR ( new_n6022_, new_n1761_ ) -new_n8230_ = NAND ( new_n5857_, new_n1775_ ) -new_n8231_ = OR ( new_n5857_, new_n1775_ ) -new_n8232_ = NAND ( new_n5657_, new_n1789_ ) -new_n8233_ = OR ( new_n5657_, new_n1789_ ) -new_n8234_ = AND ( new_n5318_, new_n1817_ ) -new_n8235_ = NOR ( new_n5318_, new_n1817_ ) -new_n8236_ = NAND ( new_n5158_, new_n1831_ ) -new_n8237_ = OR ( new_n5158_, new_n1831_ ) -new_n8238_ = OR ( new_n3817_, new_n1926_ ) -new_n8239_ = NAND ( new_n3817_, new_n1926_ ) -new_n8240_ = NAND ( new_n3168_, new_n1959_ ) -new_n8241_ = OR ( new_n3168_, new_n1959_ ) -new_n8242_ = NAND ( new_n8241_, new_n8240_, new_n8239_, new_n8238_ ) -new_n8243_ = XOR ( new_n4034_, new_n1914_ ) -new_n8244_ = XOR ( new_n3073_, new_n1948_ ) -new_n8245_ = XOR ( new_n4429_, new_n1887_ ) -new_n8246_ = XOR ( new_n3591_, new_n1937_ ) -new_n8247_ = NAND ( new_n8246_, new_n8245_, new_n8244_, new_n8243_ ) -new_n8248_ = AND ( new_n4759_, new_n1859_ ) -new_n8249_ = OR ( new_n4759_, new_n1859_ ) -new_n8250_ = NAND ( new_n4588_, new_n1873_ ) -new_n8251_ = OR ( new_n4588_, new_n1873_ ) -new_n8252_ = XOR ( new_n4227_, new_n1901_ ) -new_n8253_ = NAND ( new_n8252_, new_n8251_, new_n8250_, new_n8249_ ) -new_n8254_ = NOR ( new_n8253_, new_n8248_, new_n8247_, new_n8242_ ) -new_n8255_ = XOR ( new_n4921_, new_n1845_ ) -new_n8256_ = NAND ( new_n8255_, new_n8254_, new_n8237_, new_n8236_ ) -new_n8257_ = XNOR ( new_n5491_, new_n1803_ ) -new_n8258_ = NOR ( new_n8257_, new_n8256_, new_n8235_, new_n8234_ ) -new_n8259_ = AND ( new_n8258_, new_n8233_, new_n8232_, new_n8231_ ) -new_n8260_ = NAND ( new_n8259_, new_n8230_, new_n8229_, new_n8228_ ) -new_n8261_ = XNOR ( new_n6185_, new_n1747_ ) -new_n8262_ = NOR ( new_n8261_, new_n8260_, new_n8227_, new_n8226_ ) -new_n8263_ = NAND ( new_n8262_, new_n8225_, new_n8224_, new_n8223_ ) -new_n8264_ = XOR ( new_n6765_, new_n1690_ ) -new_n8265_ = NOR ( new_n8264_, new_n8263_, new_n8222_ ) -new_n8266_ = AND ( new_n8265_, new_n8221_, new_n8220_, new_n8218_ ) -new_n8267_ = NAND ( new_n8266_, new_n8217_, new_n8215_, new_n8214_ ) -new_n8268_ = NOR ( new_n8267_, new_n8212_ ) -new_n8269_ = NAND ( new_n8268_, new_n8211_, new_n8210_, new_n8209_ ) -new_n8270_ = NOR ( new_n8269_, new_n8207_ ) -new_n8271_ = NAND ( new_n8270_, new_n8206_, new_n8205_, new_n8204_ ) -new_n8272_ = XOR ( new_n7331_, new_n2634_ ) -new_n8273_ = NOR ( new_n8272_, new_n8271_, new_n8202_, new_n8201_ ) -new_n8274_ = XNOR ( new_n7558_, new_n1606_ ) -new_n8275_ = NAND ( new_n8274_, new_n8273_, new_n8200_, new_n8199_ ) -new_n8276_ = NAND ( new_n3204_, new_n3303_ ) -new_n8277_ = NAND ( new_n8276_, new_n8275_, new_n3096_ ) -new_n8278_ = AND ( new_n3241_, new_n3129_ ) -new_n8279_ = OR ( new_n8278_, new_n8275_ ) -new_n8280_ = NAND ( new_n8279_, new_n8277_, new_n8198_, new_n8195_ ) -new_n8281_ = NAND ( new_n8280_, new_n3269_ ) -new_n8282_ = NAND ( new_n3319_, new_n1419_, new_n1415_ ) -new_n8283_ = OR ( new_n3270_, new_n1433_ ) -new_n8284_ = NAND ( new_n8283_, new_n8282_, NET_490 ) -new_n8285_ = NAND ( new_n3133_, new_n1433_, new_n1419_, new_n1415_ ) -new_n8286_ = OR ( new_n8285_, new_n8193_, new_n1513_ ) -NET_9556 = NAND ( new_n8286_, new_n8284_, new_n8281_ ) -new_n8288_ = OR ( new_n7782_, new_n3373_ ) -new_n8289_ = OR ( new_n7796_, new_n3364_ ) -new_n8290_ = NAND ( new_n7775_, new_n3382_ ) -new_n8291_ = NAND ( new_n3712_, new_n2079_ ) -new_n8292_ = NAND ( new_n3379_, new_n2398_ ) -new_n8293_ = NAND ( new_n3058_, new_n2057_ ) -new_n8294_ = NAND ( new_n3360_, NET_183 ) -new_n8295_ = AND ( new_n8294_, new_n8293_, new_n8292_, new_n8291_ ) -NET_9561 = NAND ( new_n8295_, new_n8290_, new_n8289_, new_n8288_ ) -new_n8297_ = OR ( new_n7782_, new_n3574_ ) -new_n8298_ = OR ( new_n7796_, new_n3454_ ) -new_n8299_ = NAND ( new_n7775_, new_n3460_ ) -new_n8300_ = NOR ( new_n3442_, new_n7710_ ) -new_n8301_ = NOT ( new_n2398_ ) -new_n8302_ = NOR ( new_n3378_, new_n8301_ ) -new_n8303_ = NOR ( new_n8302_, new_n8300_ ) -new_n8304_ = NAND ( new_n8303_, new_n8299_, new_n8298_, new_n8297_ ) -new_n8305_ = NAND ( new_n8304_, new_n3470_ ) -new_n8306_ = NAND ( new_n4003_, NET_151 ) -NET_9569 = NAND ( new_n8306_, new_n8305_ ) -new_n8308_ = NAND ( new_n8304_, new_n3474_ ) -new_n8309_ = NAND ( new_n3476_, NET_119 ) -NET_9570 = NAND ( new_n8309_, new_n8308_ ) -new_n8311_ = NOR ( new_n3019_, new_n8301_ ) -new_n8312_ = NOR ( new_n5079_, new_n1299_ ) -new_n8313_ = NAND ( new_n8312_, new_n3016_ ) -new_n8314_ = XNOR ( new_n8313_, new_n8311_ ) -new_n8315_ = OR ( new_n7781_, new_n7776_ ) -new_n8316_ = NAND ( new_n8315_, new_n7774_ ) -new_n8317_ = NAND ( new_n7781_, new_n7776_ ) -new_n8318_ = NAND ( new_n8317_, new_n8316_ ) -new_n8319_ = XOR ( new_n8318_, new_n8314_ ) -new_n8320_ = OR ( new_n8319_, new_n3035_ ) -new_n8321_ = NAND ( new_n8312_, new_n5086_ ) -new_n8322_ = NAND ( new_n2908_, new_n2398_ ) -new_n8323_ = NAND ( new_n8322_, new_n8321_, new_n6630_ ) -new_n8324_ = XOR ( new_n8323_, new_n2915_ ) -new_n8325_ = NAND ( new_n8312_, new_n2908_ ) -new_n8326_ = NAND ( new_n2899_, new_n2398_ ) -new_n8327_ = NAND ( new_n8326_, new_n8325_, new_n6637_ ) -new_n8328_ = OR ( new_n8327_, new_n8324_ ) -new_n8329_ = NAND ( new_n8327_, new_n8324_ ) -new_n8330_ = NAND ( new_n8329_, new_n8328_ ) -new_n8331_ = NAND ( new_n7795_, new_n7791_ ) -new_n8332_ = NAND ( new_n8331_, new_n7792_ ) -new_n8333_ = XOR ( new_n8332_, new_n8330_ ) -new_n8334_ = OR ( new_n8333_, new_n3005_ ) -new_n8335_ = NAND ( new_n8312_, new_n3060_ ) -new_n8336_ = NAND ( new_n3051_, new_n2393_ ) -new_n8337_ = NAND ( new_n3062_, new_n2387_ ) -new_n8338_ = NAND ( NET_23564, NET_271 ) -new_n8339_ = NAND ( new_n3064_, new_n2068_ ) -new_n8340_ = AND ( new_n8339_, new_n8338_, new_n8337_, new_n8336_ ) -NET_9580 = NAND ( new_n8340_, new_n8335_, new_n8334_, new_n8320_ ) -new_n8342_ = OR ( new_n8319_, new_n3373_ ) -new_n8343_ = OR ( new_n8333_, new_n3364_ ) -new_n8344_ = NAND ( new_n8312_, new_n3382_ ) -new_n8345_ = NAND ( new_n3712_, new_n2068_ ) -new_n8346_ = NAND ( new_n3379_, new_n2387_ ) -new_n8347_ = NAND ( new_n3058_, new_n2393_ ) -new_n8348_ = NAND ( new_n3360_, NET_184 ) -new_n8349_ = AND ( new_n8348_, new_n8347_, new_n8346_, new_n8345_ ) -NET_9588 = NAND ( new_n8349_, new_n8344_, new_n8343_, new_n8342_ ) -new_n8351_ = OR ( new_n8319_, new_n3574_ ) -new_n8352_ = OR ( new_n8333_, new_n3454_ ) -new_n8353_ = NAND ( new_n8312_, new_n3460_ ) -new_n8354_ = NOR ( new_n3442_, new_n7764_ ) -new_n8355_ = NOT ( new_n2387_ ) -new_n8356_ = NOR ( new_n3378_, new_n8355_ ) -new_n8357_ = NOR ( new_n8356_, new_n8354_ ) -new_n8358_ = NAND ( new_n8357_, new_n8353_, new_n8352_, new_n8351_ ) -new_n8359_ = NAND ( new_n8358_, new_n3470_ ) -new_n8360_ = NAND ( new_n4003_, NET_152 ) -NET_9595 = NAND ( new_n8360_, new_n8359_ ) -new_n8362_ = NAND ( new_n8358_, new_n3474_ ) -new_n8363_ = NAND ( new_n3476_, NET_120 ) -NET_9596 = NAND ( new_n8363_, new_n8362_ ) -new_n8365_ = NOR ( new_n3019_, new_n8355_ ) -new_n8366_ = NOR ( new_n5246_, new_n1299_ ) -new_n8367_ = NAND ( new_n8366_, new_n3016_ ) -new_n8368_ = XNOR ( new_n8367_, new_n8365_ ) -new_n8369_ = OR ( new_n8318_, new_n8313_ ) -new_n8370_ = NAND ( new_n8369_, new_n8311_ ) -new_n8371_ = NAND ( new_n8318_, new_n8313_ ) -new_n8372_ = NAND ( new_n8371_, new_n8370_ ) -new_n8373_ = XOR ( new_n8372_, new_n8368_ ) -new_n8374_ = OR ( new_n8373_, new_n3035_ ) -new_n8375_ = NAND ( new_n8366_, new_n5086_ ) -new_n8376_ = NAND ( new_n2908_, new_n2387_ ) -new_n8377_ = NAND ( new_n8376_, new_n8375_, new_n6630_ ) -new_n8378_ = XOR ( new_n8377_, new_n2915_ ) -new_n8379_ = NAND ( new_n8366_, new_n2908_ ) -new_n8380_ = NAND ( new_n2899_, new_n2387_ ) -new_n8381_ = NAND ( new_n8380_, new_n8379_, new_n6637_ ) -new_n8382_ = OR ( new_n8381_, new_n8378_ ) -new_n8383_ = NAND ( new_n8381_, new_n8378_ ) -new_n8384_ = NAND ( new_n8383_, new_n8382_ ) -new_n8385_ = NAND ( new_n8332_, new_n8328_ ) -new_n8386_ = NAND ( new_n8385_, new_n8329_ ) -new_n8387_ = XOR ( new_n8386_, new_n8384_ ) -new_n8388_ = OR ( new_n8387_, new_n3005_ ) -new_n8389_ = NAND ( new_n8366_, new_n3060_ ) -new_n8390_ = NAND ( new_n3051_, new_n2382_ ) -new_n8391_ = NAND ( new_n3062_, new_n2486_ ) -new_n8392_ = OR ( NET_275, new_n2378_ ) -new_n8393_ = NAND ( new_n3064_, new_n2398_ ) -new_n8394_ = AND ( new_n8393_, new_n8392_, new_n8391_, new_n8390_ ) -NET_9608 = NAND ( new_n8394_, new_n8389_, new_n8388_, new_n8374_ ) -new_n8396_ = OR ( new_n8373_, new_n3373_ ) -new_n8397_ = OR ( new_n8387_, new_n3364_ ) -new_n8398_ = NAND ( new_n8366_, new_n3382_ ) -new_n8399_ = NAND ( new_n3712_, new_n2398_ ) -new_n8400_ = NAND ( new_n3379_, new_n2486_ ) -new_n8401_ = NAND ( new_n3058_, new_n2382_ ) -new_n8402_ = NAND ( new_n3360_, NET_185 ) -new_n8403_ = AND ( new_n8402_, new_n8401_, new_n8400_, new_n8399_ ) -NET_9616 = NAND ( new_n8403_, new_n8398_, new_n8397_, new_n8396_ ) -new_n8405_ = OR ( new_n8373_, new_n3574_ ) -new_n8406_ = OR ( new_n8387_, new_n3454_ ) -new_n8407_ = NAND ( new_n8366_, new_n3460_ ) -new_n8408_ = NOR ( new_n3442_, new_n8301_ ) -new_n8409_ = NOT ( new_n2486_ ) -new_n8410_ = NOR ( new_n3378_, new_n8409_ ) -new_n8411_ = NOR ( new_n8410_, new_n8408_ ) -new_n8412_ = NAND ( new_n8411_, new_n8407_, new_n8406_, new_n8405_ ) -new_n8413_ = NAND ( new_n8412_, new_n3470_ ) -new_n8414_ = NAND ( new_n4003_, NET_153 ) -NET_9624 = NAND ( new_n8414_, new_n8413_ ) -new_n8416_ = NAND ( new_n8412_, new_n3474_ ) -new_n8417_ = NAND ( new_n3476_, NET_121 ) -NET_9625 = NAND ( new_n8417_, new_n8416_ ) -new_n8419_ = NOR ( new_n3019_, new_n8409_ ) -new_n8420_ = NOR ( new_n5421_, new_n1299_ ) -new_n8421_ = NAND ( new_n8420_, new_n3016_ ) -new_n8422_ = XNOR ( new_n8421_, new_n8419_ ) -new_n8423_ = OR ( new_n8372_, new_n8367_ ) -new_n8424_ = NAND ( new_n8423_, new_n8365_ ) -new_n8425_ = NAND ( new_n8372_, new_n8367_ ) -new_n8426_ = NAND ( new_n8425_, new_n8424_ ) -new_n8427_ = XOR ( new_n8426_, new_n8422_ ) -new_n8428_ = OR ( new_n8427_, new_n3035_ ) -new_n8429_ = NAND ( new_n8420_, new_n5086_ ) -new_n8430_ = NAND ( new_n2908_, new_n2486_ ) -new_n8431_ = NAND ( new_n8430_, new_n8429_, new_n6630_ ) -new_n8432_ = XOR ( new_n8431_, new_n2915_ ) -new_n8433_ = NAND ( new_n8420_, new_n2908_ ) -new_n8434_ = NAND ( new_n2899_, new_n2486_ ) -new_n8435_ = NAND ( new_n8434_, new_n8433_, new_n6637_ ) -new_n8436_ = OR ( new_n8435_, new_n8432_ ) -new_n8437_ = NAND ( new_n8435_, new_n8432_ ) -new_n8438_ = NAND ( new_n8437_, new_n8436_ ) -new_n8439_ = NAND ( new_n8386_, new_n8382_ ) -new_n8440_ = NAND ( new_n8439_, new_n8383_ ) -new_n8441_ = XOR ( new_n8440_, new_n8438_ ) -new_n8442_ = OR ( new_n8441_, new_n3005_ ) -new_n8443_ = NAND ( new_n8420_, new_n3060_ ) -new_n8444_ = NAND ( new_n3051_, new_n2481_ ) -new_n8445_ = NAND ( new_n3062_, new_n2549_ ) -new_n8446_ = NAND ( NET_23564, NET_262 ) -new_n8447_ = NAND ( new_n3064_, new_n2387_ ) -new_n8448_ = AND ( new_n8447_, new_n8446_, new_n8445_, new_n8444_ ) -NET_9635 = NAND ( new_n8448_, new_n8443_, new_n8442_, new_n8428_ ) -new_n8450_ = OR ( new_n8427_, new_n3373_ ) -new_n8451_ = OR ( new_n8441_, new_n3364_ ) -new_n8452_ = NAND ( new_n8420_, new_n3382_ ) -new_n8453_ = NAND ( new_n3712_, new_n2387_ ) -new_n8454_ = NAND ( new_n3379_, new_n2549_ ) -new_n8455_ = NAND ( new_n3058_, new_n2481_ ) -new_n8456_ = NAND ( new_n3360_, NET_186 ) -new_n8457_ = AND ( new_n8456_, new_n8455_, new_n8454_, new_n8453_ ) -NET_9643 = NAND ( new_n8457_, new_n8452_, new_n8451_, new_n8450_ ) -new_n8459_ = OR ( new_n8427_, new_n3574_ ) -new_n8460_ = OR ( new_n8441_, new_n3454_ ) -new_n8461_ = NAND ( new_n8420_, new_n3460_ ) -new_n8462_ = NOR ( new_n3442_, new_n8355_ ) -new_n8463_ = NOT ( new_n2549_ ) -new_n8464_ = NOR ( new_n3378_, new_n8463_ ) -new_n8465_ = NOR ( new_n8464_, new_n8462_ ) -new_n8466_ = NAND ( new_n8465_, new_n8461_, new_n8460_, new_n8459_ ) -new_n8467_ = NAND ( new_n8466_, new_n3470_ ) -new_n8468_ = NAND ( new_n4003_, NET_154 ) -NET_9650 = NAND ( new_n8468_, new_n8467_ ) -new_n8470_ = NAND ( new_n8466_, new_n3474_ ) -new_n8471_ = NAND ( new_n3476_, NET_122 ) -NET_9651 = NAND ( new_n8471_, new_n8470_ ) -new_n8473_ = NOR ( new_n3019_, new_n8463_ ) -new_n8474_ = NOR ( new_n5582_, new_n1299_ ) -new_n8475_ = NAND ( new_n8474_, new_n3016_ ) -new_n8476_ = XNOR ( new_n8475_, new_n8473_ ) -new_n8477_ = OR ( new_n8426_, new_n8421_ ) -new_n8478_ = NAND ( new_n8477_, new_n8419_ ) -new_n8479_ = NAND ( new_n8426_, new_n8421_ ) -new_n8480_ = NAND ( new_n8479_, new_n8478_ ) -new_n8481_ = XOR ( new_n8480_, new_n8476_ ) -new_n8482_ = OR ( new_n8481_, new_n3035_ ) -new_n8483_ = NAND ( new_n8474_, new_n5086_ ) -new_n8484_ = NAND ( new_n2908_, new_n2549_ ) -new_n8485_ = NAND ( new_n8484_, new_n8483_, new_n6630_ ) -new_n8486_ = XOR ( new_n8485_, new_n2915_ ) -new_n8487_ = NAND ( new_n8474_, new_n2908_ ) -new_n8488_ = NAND ( new_n2899_, new_n2549_ ) -new_n8489_ = NAND ( new_n8488_, new_n8487_, new_n6637_ ) -new_n8490_ = OR ( new_n8489_, new_n8486_ ) -new_n8491_ = NAND ( new_n8489_, new_n8486_ ) -new_n8492_ = NAND ( new_n8491_, new_n8490_ ) -new_n8493_ = NAND ( new_n8440_, new_n8436_ ) -new_n8494_ = NAND ( new_n8493_, new_n8437_ ) -new_n8495_ = XOR ( new_n8494_, new_n8492_ ) -new_n8496_ = OR ( new_n8495_, new_n3005_ ) -new_n8497_ = NAND ( new_n8474_, new_n3060_ ) -new_n8498_ = NAND ( new_n3051_, new_n2544_ ) -new_n8499_ = NAND ( new_n3062_, new_n2539_ ) -new_n8500_ = NAND ( NET_23564, NET_247 ) -new_n8501_ = NAND ( new_n3064_, new_n2486_ ) -new_n8502_ = AND ( new_n8501_, new_n8500_, new_n8499_, new_n8498_ ) -NET_9663 = NAND ( new_n8502_, new_n8497_, new_n8496_, new_n8482_ ) -new_n8504_ = OR ( new_n8481_, new_n3373_ ) -new_n8505_ = OR ( new_n8495_, new_n3364_ ) -new_n8506_ = NAND ( new_n8474_, new_n3382_ ) -new_n8507_ = NAND ( new_n3712_, new_n2486_ ) -new_n8508_ = NAND ( new_n3379_, new_n2539_ ) -new_n8509_ = NAND ( new_n3058_, new_n2544_ ) -new_n8510_ = NAND ( new_n3360_, NET_187 ) -new_n8511_ = AND ( new_n8510_, new_n8509_, new_n8508_, new_n8507_ ) -NET_9671 = NAND ( new_n8511_, new_n8506_, new_n8505_, new_n8504_ ) -new_n8513_ = OR ( new_n8481_, new_n3574_ ) -new_n8514_ = OR ( new_n8495_, new_n3454_ ) -new_n8515_ = NAND ( new_n8474_, new_n3460_ ) -new_n8516_ = NOR ( new_n3442_, new_n8409_ ) -new_n8517_ = NOT ( new_n2539_ ) -new_n8518_ = NOR ( new_n3378_, new_n8517_ ) -new_n8519_ = NOR ( new_n8518_, new_n8516_ ) -new_n8520_ = NAND ( new_n8519_, new_n8515_, new_n8514_, new_n8513_ ) -new_n8521_ = NAND ( new_n8520_, new_n3470_ ) -new_n8522_ = NAND ( new_n4003_, NET_155 ) -NET_9679 = NAND ( new_n8522_, new_n8521_ ) -new_n8524_ = NAND ( new_n8520_, new_n3474_ ) -new_n8525_ = NAND ( new_n3476_, NET_123 ) -NET_9680 = NAND ( new_n8525_, new_n8524_ ) -new_n8527_ = NOR ( new_n3019_, new_n8517_ ) -new_n8528_ = NOR ( new_n5793_, new_n1299_ ) -new_n8529_ = NAND ( new_n8528_, new_n3016_ ) -new_n8530_ = XNOR ( new_n8529_, new_n8527_ ) -new_n8531_ = OR ( new_n8480_, new_n8475_ ) -new_n8532_ = NAND ( new_n8531_, new_n8473_ ) -new_n8533_ = NAND ( new_n8480_, new_n8475_ ) -new_n8534_ = NAND ( new_n8533_, new_n8532_ ) -new_n8535_ = XOR ( new_n8534_, new_n8530_ ) -new_n8536_ = OR ( new_n8535_, new_n3035_ ) -new_n8537_ = NAND ( new_n8528_, new_n5086_ ) -new_n8538_ = NAND ( new_n2908_, new_n2539_ ) -new_n8539_ = NAND ( new_n8538_, new_n8537_, new_n6630_ ) -new_n8540_ = XOR ( new_n8539_, new_n2915_ ) -new_n8541_ = NAND ( new_n8528_, new_n2908_ ) -new_n8542_ = NAND ( new_n2899_, new_n2539_ ) -new_n8543_ = NAND ( new_n8542_, new_n8541_, new_n6637_ ) -new_n8544_ = OR ( new_n8543_, new_n8540_ ) -new_n8545_ = NAND ( new_n8543_, new_n8540_ ) -new_n8546_ = NAND ( new_n8545_, new_n8544_ ) -new_n8547_ = NAND ( new_n8494_, new_n8490_ ) -new_n8548_ = NAND ( new_n8547_, new_n8491_ ) -new_n8549_ = XOR ( new_n8548_, new_n8546_ ) -new_n8550_ = OR ( new_n8549_, new_n3005_ ) -new_n8551_ = NAND ( new_n8528_, new_n3060_ ) -new_n8552_ = NAND ( new_n3051_, new_n2534_ ) -new_n8553_ = NAND ( new_n3062_, new_n2614_ ) -new_n8554_ = OR ( NET_275, new_n2467_ ) -new_n8555_ = NAND ( new_n3064_, new_n2549_ ) -new_n8556_ = AND ( new_n8555_, new_n8554_, new_n8553_, new_n8552_ ) -NET_9690 = NAND ( new_n8556_, new_n8551_, new_n8550_, new_n8536_ ) -new_n8558_ = OR ( new_n8535_, new_n3373_ ) -new_n8559_ = OR ( new_n8549_, new_n3364_ ) -new_n8560_ = NAND ( new_n8528_, new_n3382_ ) -new_n8561_ = NAND ( new_n3712_, new_n2549_ ) -new_n8562_ = NAND ( new_n3379_, new_n2614_ ) -new_n8563_ = NAND ( new_n3058_, new_n2534_ ) -new_n8564_ = NAND ( new_n3360_, NET_188 ) -new_n8565_ = AND ( new_n8564_, new_n8563_, new_n8562_, new_n8561_ ) -NET_9698 = NAND ( new_n8565_, new_n8560_, new_n8559_, new_n8558_ ) -new_n8567_ = OR ( new_n8535_, new_n3574_ ) -new_n8568_ = OR ( new_n8549_, new_n3454_ ) -new_n8569_ = NAND ( new_n8528_, new_n3460_ ) -new_n8570_ = NOR ( new_n3442_, new_n8463_ ) -new_n8571_ = NOT ( new_n2614_ ) -new_n8572_ = NOR ( new_n3378_, new_n8571_ ) -new_n8573_ = NOR ( new_n8572_, new_n8570_ ) -new_n8574_ = NAND ( new_n8573_, new_n8569_, new_n8568_, new_n8567_ ) -new_n8575_ = NAND ( new_n8574_, new_n3470_ ) -new_n8576_ = NAND ( new_n4003_, NET_156 ) -NET_9705 = NAND ( new_n8576_, new_n8575_ ) -new_n8578_ = NAND ( new_n8574_, new_n3474_ ) -new_n8579_ = NAND ( new_n3476_, NET_124 ) -NET_9706 = NAND ( new_n8579_, new_n8578_ ) -new_n8581_ = NOR ( new_n3019_, new_n8571_ ) -new_n8582_ = NOR ( new_n5955_, new_n1299_ ) -new_n8583_ = NAND ( new_n8582_, new_n3016_ ) -new_n8584_ = XNOR ( new_n8583_, new_n8581_ ) -new_n8585_ = OR ( new_n8534_, new_n8529_ ) -new_n8586_ = NAND ( new_n8585_, new_n8527_ ) -new_n8587_ = NAND ( new_n8534_, new_n8529_ ) -new_n8588_ = NAND ( new_n8587_, new_n8586_ ) -new_n8589_ = XOR ( new_n8588_, new_n8584_ ) -new_n8590_ = OR ( new_n8589_, new_n3035_ ) -new_n8591_ = NAND ( new_n8582_, new_n5086_ ) -new_n8592_ = NAND ( new_n2908_, new_n2614_ ) -new_n8593_ = NAND ( new_n8592_, new_n8591_, new_n6630_ ) -new_n8594_ = XOR ( new_n8593_, new_n2915_ ) -new_n8595_ = NAND ( new_n8582_, new_n2908_ ) -new_n8596_ = NAND ( new_n2899_, new_n2614_ ) -new_n8597_ = NAND ( new_n8596_, new_n8595_, new_n6637_ ) -new_n8598_ = OR ( new_n8597_, new_n8594_ ) -new_n8599_ = NAND ( new_n8597_, new_n8594_ ) -new_n8600_ = NAND ( new_n8599_, new_n8598_ ) -new_n8601_ = NAND ( new_n8548_, new_n8544_ ) -new_n8602_ = NAND ( new_n8601_, new_n8545_ ) -new_n8603_ = XOR ( new_n8602_, new_n8600_ ) -new_n8604_ = OR ( new_n8603_, new_n3005_ ) -new_n8605_ = NAND ( new_n8582_, new_n3060_ ) -new_n8606_ = NAND ( new_n3051_, new_n2609_ ) -new_n8607_ = NAND ( new_n3062_, new_n2474_ ) -new_n8608_ = OR ( NET_275, new_n2466_ ) -new_n8609_ = NAND ( new_n3064_, new_n2539_ ) -new_n8610_ = AND ( new_n8609_, new_n8608_, new_n8607_, new_n8606_ ) -NET_9718 = NAND ( new_n8610_, new_n8605_, new_n8604_, new_n8590_ ) -new_n8612_ = OR ( new_n8589_, new_n3373_ ) -new_n8613_ = OR ( new_n8603_, new_n3364_ ) -new_n8614_ = NAND ( new_n8582_, new_n3382_ ) -new_n8615_ = NAND ( new_n3712_, new_n2539_ ) -new_n8616_ = NAND ( new_n3379_, new_n2474_ ) -new_n8617_ = NAND ( new_n3058_, new_n2609_ ) -new_n8618_ = NAND ( new_n3360_, NET_189 ) -new_n8619_ = AND ( new_n8618_, new_n8617_, new_n8616_, new_n8615_ ) -NET_9726 = NAND ( new_n8619_, new_n8614_, new_n8613_, new_n8612_ ) -new_n8621_ = OR ( new_n8589_, new_n3574_ ) -new_n8622_ = OR ( new_n8603_, new_n3454_ ) -new_n8623_ = NAND ( new_n8582_, new_n3460_ ) -new_n8624_ = NOT ( new_n2474_ ) -new_n8625_ = NOR ( new_n3378_, new_n8624_ ) -new_n8626_ = NOR ( new_n3442_, new_n8517_ ) -new_n8627_ = NOR ( new_n8626_, new_n8625_ ) -new_n8628_ = NAND ( new_n8627_, new_n8623_, new_n8622_, new_n8621_ ) -new_n8629_ = NAND ( new_n8628_, new_n3470_ ) -new_n8630_ = NAND ( new_n4003_, NET_157 ) -NET_9734 = NAND ( new_n8630_, new_n8629_ ) -new_n8632_ = NAND ( new_n8628_, new_n3474_ ) -new_n8633_ = NAND ( new_n3476_, NET_125 ) -NET_9735 = NAND ( new_n8633_, new_n8632_ ) -new_n8635_ = NAND ( new_n2474_, new_n2874_ ) -new_n8636_ = NOR ( new_n3009_, new_n8571_ ) -new_n8637_ = NOR ( new_n3010_, new_n8624_ ) -new_n8638_ = NOR ( new_n8637_, new_n8636_ ) -new_n8639_ = NAND ( new_n8638_, new_n8635_ ) -new_n8640_ = NOR ( new_n6130_, new_n1299_ ) -new_n8641_ = NAND ( new_n8640_, new_n3013_ ) -new_n8642_ = NOT ( new_n8640_ ) -new_n8643_ = OR ( new_n8642_, new_n3010_ ) -new_n8644_ = OR ( new_n3008_, new_n2869_ ) -new_n8645_ = NAND ( new_n8644_, new_n8582_, new_n2853_ ) -new_n8646_ = AND ( new_n8645_, new_n8643_ ) -new_n8647_ = NAND ( new_n8646_, new_n8641_ ) -new_n8648_ = XOR ( new_n8647_, new_n8639_ ) -new_n8649_ = OR ( new_n8588_, new_n8583_ ) -new_n8650_ = NAND ( new_n8649_, new_n8581_ ) -new_n8651_ = NAND ( new_n8588_, new_n8583_ ) -new_n8652_ = NAND ( new_n8651_, new_n8650_ ) -new_n8653_ = XOR ( new_n8652_, new_n8648_ ) -new_n8654_ = NOR ( new_n8653_, new_n3373_ ) -new_n8655_ = NAND ( new_n2474_, new_n1303_ ) -new_n8656_ = NAND ( new_n2888_, new_n2886_ ) -new_n8657_ = AND ( new_n8640_, new_n8656_ ) -new_n8658_ = NOT ( new_n8582_ ) -new_n8659_ = NOR ( new_n8658_, new_n2885_ ) -new_n8660_ = OR ( new_n2894_, new_n8571_ ) -new_n8661_ = NAND ( new_n2897_, new_n2895_ ) -new_n8662_ = NAND ( new_n8661_, new_n2474_ ) -new_n8663_ = NAND ( new_n8662_, new_n8660_, new_n6637_ ) -new_n8664_ = NOR ( new_n8663_, new_n8659_, new_n8657_ ) -new_n8665_ = NAND ( new_n8664_, new_n8655_ ) -new_n8666_ = NAND ( new_n8640_, new_n8661_ ) -new_n8667_ = OR ( new_n8658_, new_n2894_ ) -new_n8668_ = OR ( new_n2885_, new_n8571_ ) -new_n8669_ = NAND ( new_n8656_, new_n2474_ ) -new_n8670_ = AND ( new_n8669_, new_n8668_, new_n6630_ ) -new_n8671_ = NAND ( new_n8670_, new_n8667_, new_n8666_ ) -new_n8672_ = XOR ( new_n8671_, new_n2915_ ) -new_n8673_ = NAND ( new_n8672_, new_n8665_ ) -new_n8674_ = OR ( new_n8672_, new_n8665_ ) -new_n8675_ = NAND ( new_n8674_, new_n8673_ ) -new_n8676_ = NAND ( new_n8602_, new_n8598_ ) -new_n8677_ = NAND ( new_n8676_, new_n8599_ ) -new_n8678_ = XOR ( new_n8677_, new_n8675_ ) -new_n8679_ = NOR ( new_n8678_, new_n3364_ ) -new_n8680_ = NAND ( new_n8640_, new_n3382_ ) -new_n8681_ = NOR ( new_n1298_, NET_245 ) -new_n8682_ = OR ( new_n8681_, new_n1299_ ) -new_n8683_ = NAND ( new_n8682_, new_n2019_ ) -new_n8684_ = NAND ( new_n2614_, new_n1298_ ) -new_n8685_ = NAND ( new_n8684_, new_n8683_ ) -new_n8686_ = NAND ( new_n8685_, new_n1278_ ) -new_n8687_ = OR ( new_n8686_, new_n3360_ ) -new_n8688_ = NAND ( new_n3360_, NET_190 ) -new_n8689_ = NAND ( new_n3058_, new_n2469_ ) -new_n8690_ = NAND ( new_n8689_, new_n8688_, new_n8687_, new_n8680_ ) -NET_9743 = OR ( new_n8690_, new_n8679_, new_n8654_ ) -new_n8692_ = OR ( new_n8653_, new_n3574_ ) -new_n8693_ = OR ( new_n8678_, new_n3454_ ) -new_n8694_ = NAND ( new_n8640_, new_n3460_ ) -new_n8695_ = NAND ( new_n8694_, new_n8693_, new_n8692_, new_n8686_ ) -new_n8696_ = NAND ( new_n8695_, new_n3470_ ) -new_n8697_ = NAND ( new_n4003_, NET_158 ) -NET_9755 = NAND ( new_n8697_, new_n8696_ ) -new_n8699_ = NAND ( new_n8695_, new_n3474_ ) -new_n8700_ = NAND ( new_n3476_, NET_126 ) -NET_9756 = NAND ( new_n8700_, new_n8699_ ) -new_n8702_ = NOR ( new_n6427_, new_n1299_ ) -new_n8703_ = NAND ( new_n8702_, new_n3013_ ) -new_n8704_ = NAND ( new_n8703_, new_n8646_, new_n1270_ ) -new_n8705_ = NAND ( new_n2019_, new_n2874_ ) -new_n8706_ = NAND ( new_n8705_, new_n8638_ ) -new_n8707_ = XOR ( new_n8706_, new_n8704_ ) -new_n8708_ = NOT ( new_n8652_ ) -new_n8709_ = NAND ( new_n8708_, new_n8647_ ) -new_n8710_ = NAND ( new_n8709_, new_n8639_ ) -new_n8711_ = OR ( new_n8708_, new_n8647_ ) -new_n8712_ = NAND ( new_n8711_, new_n8710_ ) -new_n8713_ = XOR ( new_n8712_, new_n8707_ ) -new_n8714_ = OR ( new_n8713_, new_n3033_ ) -new_n8715_ = NAND ( new_n8682_, new_n2011_, new_n1278_ ) -new_n8716_ = NAND ( new_n8715_, new_n8714_ ) -new_n8717_ = NAND ( new_n8716_, new_n3370_ ) -new_n8718_ = NAND ( new_n8702_, new_n3382_ ) -new_n8719_ = NAND ( new_n3360_, NET_191 ) -NET_9779 = NAND ( new_n8719_, new_n8718_, new_n8717_ ) -new_n8721_ = OR ( new_n8713_, new_n3456_ ) -new_n8722_ = NAND ( new_n8702_, new_n3460_ ) -new_n8723_ = NAND ( new_n8722_, new_n8721_, new_n8715_ ) -new_n8724_ = NAND ( new_n8723_, new_n3470_ ) -new_n8725_ = NAND ( new_n4003_, NET_159 ) -NET_9781 = NAND ( new_n8725_, new_n8724_ ) -new_n8727_ = NAND ( new_n8723_, new_n3474_ ) -new_n8728_ = NAND ( new_n3476_, NET_127 ) -NET_9782 = NAND ( new_n8728_, new_n8727_ ) -new_n8730_ = OR ( new_n8712_, new_n8706_ ) -new_n8731_ = NAND ( new_n8730_, new_n8703_, new_n8646_, new_n1270_ ) -new_n8732_ = NAND ( new_n8712_, new_n8706_ ) -new_n8733_ = NAND ( new_n2011_, new_n2874_ ) -new_n8734_ = NAND ( new_n8733_, new_n8638_ ) -new_n8735_ = NOR ( new_n6465_, new_n1299_ ) -new_n8736_ = NAND ( new_n8735_, new_n3013_ ) -new_n8737_ = NAND ( new_n8736_, new_n8646_ ) -new_n8738_ = XNOR ( new_n8737_, new_n8734_ ) -new_n8739_ = NAND ( new_n8738_, new_n8732_, new_n8731_ ) -new_n8740_ = NOT ( new_n8738_ ) -new_n8741_ = NAND ( new_n8732_, new_n8704_ ) -new_n8742_ = NAND ( new_n8741_, new_n8740_, new_n8730_ ) -new_n8743_ = AND ( new_n8742_, new_n8739_ ) -new_n8744_ = OR ( new_n8743_, new_n3033_ ) -new_n8745_ = NAND ( new_n8744_, new_n8715_ ) -new_n8746_ = NAND ( new_n8745_, new_n3370_ ) -new_n8747_ = NAND ( new_n8735_, new_n3382_ ) -new_n8748_ = NAND ( new_n3360_, NET_192 ) -NET_9791 = NAND ( new_n8748_, new_n8747_, new_n8746_ ) -new_n8750_ = OR ( new_n8743_, new_n3456_ ) -new_n8751_ = NAND ( new_n8735_, new_n3460_ ) -new_n8752_ = NAND ( new_n8751_, new_n8750_, new_n8715_ ) -new_n8753_ = NAND ( new_n8752_, new_n3470_ ) -new_n8754_ = NAND ( new_n4003_, NET_160 ) -NET_9792 = NAND ( new_n8754_, new_n8753_ ) -new_n8756_ = NAND ( new_n8752_, new_n3474_ ) -new_n8757_ = NAND ( new_n3476_, NET_128 ) -NET_9793 = NAND ( new_n8757_, new_n8756_ ) -new_n8759_ = NAND ( new_n2870_, new_n2864_, new_n1277_ ) -new_n8760_ = NAND ( new_n8759_, new_n2877_ ) -new_n8761_ = NOT ( new_n2019_ ) -new_n8762_ = NOR ( new_n8761_, new_n2011_ ) -new_n8763_ = NAND ( new_n8762_, new_n8760_ ) -new_n8764_ = NAND ( new_n2011_, new_n1303_ ) -new_n8765_ = NAND ( new_n8764_, new_n8664_ ) -new_n8766_ = OR ( new_n8671_, new_n1303_ ) -new_n8767_ = NAND ( new_n8766_, new_n5085_ ) -new_n8768_ = OR ( new_n8766_, new_n5085_ ) -new_n8769_ = NAND ( new_n2019_, new_n1303_ ) -new_n8770_ = NAND ( new_n8769_, new_n8768_, new_n8767_, new_n8664_ ) -new_n8771_ = NAND ( new_n8677_, new_n8674_ ) -new_n8772_ = NAND ( new_n8771_, new_n8673_ ) -new_n8773_ = NAND ( new_n8772_, new_n8770_ ) -new_n8774_ = NAND ( new_n8769_, new_n8664_ ) -new_n8775_ = NAND ( new_n8768_, new_n8767_ ) -new_n8776_ = NAND ( new_n8775_, new_n8774_ ) -new_n8777_ = NAND ( new_n8776_, new_n8773_ ) -new_n8778_ = XNOR ( new_n8777_, new_n8765_ ) -new_n8779_ = XOR ( new_n8778_, new_n8672_ ) -new_n8780_ = OR ( new_n8779_, new_n8763_ ) -new_n8781_ = NOT ( new_n8760_ ) -new_n8782_ = OR ( new_n8762_, new_n8781_ ) -new_n8783_ = NOR ( new_n3371_, new_n2875_ ) -new_n8784_ = NOT ( new_n8783_ ) -new_n8785_ = NOR ( new_n3046_, new_n2881_ ) -new_n8786_ = NOR ( new_n3030_, new_n2874_ ) -new_n8787_ = NOR ( new_n2879_, new_n1270_ ) -new_n8788_ = NOR ( new_n8787_, new_n8786_ ) -new_n8789_ = NOR ( new_n8788_, new_n8785_ ) -new_n8790_ = NAND ( new_n8789_, new_n8784_, new_n8782_ ) -new_n8791_ = NAND ( new_n8790_, new_n2011_ ) -new_n8792_ = NOR ( new_n3031_, new_n2875_ ) -new_n8793_ = NAND ( new_n1276_, new_n1270_ ) -new_n8794_ = NAND ( new_n8793_, new_n3055_ ) -new_n8795_ = NOR ( new_n8794_, new_n8792_ ) -new_n8796_ = NOT ( new_n8795_ ) -new_n8797_ = NAND ( new_n8796_, new_n8735_ ) -new_n8798_ = AND ( new_n8797_, new_n8791_, new_n8780_ ) -new_n8799_ = NAND ( new_n8792_, new_n8762_ ) -new_n8800_ = OR ( new_n8799_, new_n8779_ ) -new_n8801_ = NAND ( new_n8789_, new_n8781_ ) -new_n8802_ = NAND ( new_n8801_, new_n8735_ ) -new_n8803_ = NOR ( new_n8762_, new_n3031_, new_n2875_ ) -new_n8804_ = OR ( new_n8803_, new_n8794_ ) -new_n8805_ = NAND ( new_n8804_, new_n2011_ ) -new_n8806_ = NAND ( new_n8805_, new_n8802_, new_n8800_ ) -new_n8807_ = OR ( new_n8806_, new_n8798_ ) -new_n8808_ = NAND ( new_n8797_, new_n8791_, new_n8780_ ) -new_n8809_ = AND ( new_n8805_, new_n8802_, new_n8800_ ) -new_n8810_ = OR ( new_n8809_, new_n8808_ ) -new_n8811_ = NAND ( new_n8776_, new_n8770_ ) -new_n8812_ = XOR ( new_n8811_, new_n8772_ ) -new_n8813_ = OR ( new_n8812_, new_n8799_ ) -new_n8814_ = NAND ( new_n8801_, new_n8702_ ) -new_n8815_ = NAND ( new_n8804_, new_n2019_ ) -new_n8816_ = NAND ( new_n8815_, new_n8814_, new_n8813_ ) -new_n8817_ = OR ( new_n8812_, new_n8763_ ) -new_n8818_ = NAND ( new_n8790_, new_n2019_ ) -new_n8819_ = NAND ( new_n8796_, new_n8702_ ) -new_n8820_ = AND ( new_n8819_, new_n8818_, new_n8817_ ) -new_n8821_ = NAND ( new_n8820_, new_n8816_ ) -new_n8822_ = OR ( new_n8799_, new_n8678_ ) -new_n8823_ = NAND ( new_n8801_, new_n8640_ ) -new_n8824_ = NAND ( new_n8804_, new_n2474_ ) -new_n8825_ = NOR ( new_n8783_, new_n1284_ ) -new_n8826_ = NAND ( new_n8825_, new_n8824_, new_n8823_, new_n8822_ ) -new_n8827_ = OR ( new_n8763_, new_n8678_ ) -new_n8828_ = NAND ( new_n8796_, new_n8640_ ) -new_n8829_ = NAND ( new_n8790_, new_n2474_ ) -new_n8830_ = NAND ( new_n2614_, new_n1284_ ) -new_n8831_ = AND ( new_n8830_, new_n8829_, new_n8828_, new_n8827_ ) -new_n8832_ = NAND ( new_n8831_, new_n8826_ ) -new_n8833_ = OR ( new_n8831_, new_n8826_ ) -new_n8834_ = OR ( new_n8763_, new_n8603_ ) -new_n8835_ = NAND ( new_n8796_, new_n8582_ ) -new_n8836_ = NAND ( new_n8790_, new_n2614_ ) -new_n8837_ = NAND ( new_n2539_, new_n1284_ ) -new_n8838_ = NAND ( new_n8837_, new_n8836_, new_n8835_, new_n8834_ ) -new_n8839_ = OR ( new_n8799_, new_n8603_ ) -new_n8840_ = NAND ( new_n8801_, new_n8582_ ) -new_n8841_ = NAND ( new_n8804_, new_n2614_ ) -new_n8842_ = AND ( new_n8841_, new_n8840_, new_n8839_, new_n8825_ ) -new_n8843_ = NAND ( new_n8842_, new_n8838_ ) -new_n8844_ = OR ( new_n8842_, new_n8838_ ) -new_n8845_ = OR ( new_n8799_, new_n8549_ ) -new_n8846_ = NAND ( new_n8801_, new_n8528_ ) -new_n8847_ = NAND ( new_n8804_, new_n2539_ ) -new_n8848_ = NAND ( new_n8847_, new_n8846_, new_n8845_, new_n8825_ ) -new_n8849_ = OR ( new_n8763_, new_n8549_ ) -new_n8850_ = NAND ( new_n8796_, new_n8528_ ) -new_n8851_ = NAND ( new_n8790_, new_n2539_ ) -new_n8852_ = NAND ( new_n2549_, new_n1284_ ) -new_n8853_ = NAND ( new_n8852_, new_n8851_, new_n8850_, new_n8849_ ) -new_n8854_ = NOT ( new_n8853_ ) -new_n8855_ = NAND ( new_n8854_, new_n8848_ ) -new_n8856_ = OR ( new_n8854_, new_n8848_ ) -new_n8857_ = OR ( new_n8763_, new_n8495_ ) -new_n8858_ = NAND ( new_n8796_, new_n8474_ ) -new_n8859_ = NAND ( new_n8790_, new_n2549_ ) -new_n8860_ = NAND ( new_n2486_, new_n1284_ ) -new_n8861_ = NAND ( new_n8860_, new_n8859_, new_n8858_, new_n8857_ ) -new_n8862_ = OR ( new_n8799_, new_n8495_ ) -new_n8863_ = NAND ( new_n8801_, new_n8474_ ) -new_n8864_ = NAND ( new_n8804_, new_n2549_ ) -new_n8865_ = NAND ( new_n8864_, new_n8863_, new_n8862_, new_n8825_ ) -new_n8866_ = NOT ( new_n8865_ ) -new_n8867_ = NAND ( new_n8866_, new_n8861_ ) -new_n8868_ = OR ( new_n8866_, new_n8861_ ) -new_n8869_ = OR ( new_n8799_, new_n8441_ ) -new_n8870_ = NAND ( new_n8801_, new_n8420_ ) -new_n8871_ = NAND ( new_n8804_, new_n2486_ ) -new_n8872_ = NAND ( new_n8871_, new_n8870_, new_n8869_, new_n8825_ ) -new_n8873_ = OR ( new_n8763_, new_n8441_ ) -new_n8874_ = NAND ( new_n8796_, new_n8420_ ) -new_n8875_ = NAND ( new_n8790_, new_n2486_ ) -new_n8876_ = NAND ( new_n2387_, new_n1284_ ) -new_n8877_ = NAND ( new_n8876_, new_n8875_, new_n8874_, new_n8873_ ) -new_n8878_ = NOT ( new_n8877_ ) -new_n8879_ = NAND ( new_n8878_, new_n8872_ ) -new_n8880_ = OR ( new_n8878_, new_n8872_ ) -new_n8881_ = OR ( new_n8763_, new_n8387_ ) -new_n8882_ = NAND ( new_n8796_, new_n8366_ ) -new_n8883_ = NAND ( new_n8790_, new_n2387_ ) -new_n8884_ = NAND ( new_n2398_, new_n1284_ ) -new_n8885_ = NAND ( new_n8884_, new_n8883_, new_n8882_, new_n8881_ ) -new_n8886_ = OR ( new_n8799_, new_n8387_ ) -new_n8887_ = NAND ( new_n8801_, new_n8366_ ) -new_n8888_ = NAND ( new_n8804_, new_n2387_ ) -new_n8889_ = NAND ( new_n8888_, new_n8887_, new_n8886_, new_n8825_ ) -new_n8890_ = NOT ( new_n8889_ ) -new_n8891_ = NAND ( new_n8890_, new_n8885_ ) -new_n8892_ = OR ( new_n8890_, new_n8885_ ) -new_n8893_ = OR ( new_n8799_, new_n8333_ ) -new_n8894_ = NAND ( new_n8801_, new_n8312_ ) -new_n8895_ = NAND ( new_n8804_, new_n2398_ ) -new_n8896_ = NAND ( new_n8895_, new_n8894_, new_n8893_, new_n8825_ ) -new_n8897_ = OR ( new_n8763_, new_n8333_ ) -new_n8898_ = NAND ( new_n8796_, new_n8312_ ) -new_n8899_ = NAND ( new_n8790_, new_n2398_ ) -new_n8900_ = NAND ( new_n2068_, new_n1284_ ) -new_n8901_ = NAND ( new_n8900_, new_n8899_, new_n8898_, new_n8897_ ) -new_n8902_ = NOT ( new_n8901_ ) -new_n8903_ = NAND ( new_n8902_, new_n8896_ ) -new_n8904_ = OR ( new_n8902_, new_n8896_ ) -new_n8905_ = OR ( new_n8763_, new_n7796_ ) -new_n8906_ = NAND ( new_n8796_, new_n7775_ ) -new_n8907_ = NAND ( new_n8790_, new_n2068_ ) -new_n8908_ = NAND ( new_n2079_, new_n1284_ ) -new_n8909_ = NAND ( new_n8908_, new_n8907_, new_n8906_, new_n8905_ ) -new_n8910_ = OR ( new_n8799_, new_n7796_ ) -new_n8911_ = NAND ( new_n8801_, new_n7775_ ) -new_n8912_ = NAND ( new_n8804_, new_n2068_ ) -new_n8913_ = NAND ( new_n8912_, new_n8911_, new_n8910_, new_n8825_ ) -new_n8914_ = NOT ( new_n8913_ ) -new_n8915_ = NAND ( new_n8914_, new_n8909_ ) -new_n8916_ = OR ( new_n8914_, new_n8909_ ) -new_n8917_ = OR ( new_n8799_, new_n7742_ ) -new_n8918_ = NAND ( new_n8801_, new_n7721_ ) -new_n8919_ = NAND ( new_n8804_, new_n2079_ ) -new_n8920_ = NAND ( new_n8919_, new_n8918_, new_n8917_, new_n8825_ ) -new_n8921_ = OR ( new_n8763_, new_n7742_ ) -new_n8922_ = NAND ( new_n8796_, new_n7721_ ) -new_n8923_ = NAND ( new_n8790_, new_n2079_ ) -new_n8924_ = NAND ( new_n2090_, new_n1284_ ) -new_n8925_ = NAND ( new_n8924_, new_n8923_, new_n8922_, new_n8921_ ) -new_n8926_ = NOT ( new_n8925_ ) -new_n8927_ = NAND ( new_n8926_, new_n8920_ ) -new_n8928_ = OR ( new_n8926_, new_n8920_ ) -new_n8929_ = OR ( new_n8763_, new_n7688_ ) -new_n8930_ = NAND ( new_n8796_, new_n7667_ ) -new_n8931_ = NAND ( new_n8790_, new_n2090_ ) -new_n8932_ = NAND ( new_n2105_, new_n1284_ ) -new_n8933_ = NAND ( new_n8932_, new_n8931_, new_n8930_, new_n8929_ ) -new_n8934_ = OR ( new_n8799_, new_n7688_ ) -new_n8935_ = NAND ( new_n8801_, new_n7667_ ) -new_n8936_ = NAND ( new_n8804_, new_n2090_ ) -new_n8937_ = NAND ( new_n8936_, new_n8935_, new_n8934_, new_n8825_ ) -new_n8938_ = NOT ( new_n8937_ ) -new_n8939_ = NAND ( new_n8938_, new_n8933_ ) -new_n8940_ = OR ( new_n8938_, new_n8933_ ) -new_n8941_ = OR ( new_n8799_, new_n6644_ ) -new_n8942_ = NOT ( new_n8801_ ) -new_n8943_ = OR ( new_n8942_, new_n6627_ ) -new_n8944_ = NAND ( new_n8804_, new_n2105_ ) -new_n8945_ = NAND ( new_n8944_, new_n8943_, new_n8941_, new_n8825_ ) -new_n8946_ = OR ( new_n8763_, new_n6644_ ) -new_n8947_ = OR ( new_n8795_, new_n6627_ ) -new_n8948_ = NAND ( new_n8790_, new_n2105_ ) -new_n8949_ = NAND ( new_n2118_, new_n1284_ ) -new_n8950_ = NAND ( new_n8949_, new_n8948_, new_n8947_, new_n8946_ ) -new_n8951_ = NOT ( new_n8950_ ) -new_n8952_ = NAND ( new_n8951_, new_n8945_ ) -new_n8953_ = OR ( new_n8951_, new_n8945_ ) -new_n8954_ = OR ( new_n8763_, new_n6490_ ) -new_n8955_ = OR ( new_n8795_, new_n6474_ ) -new_n8956_ = NAND ( new_n8790_, new_n2118_ ) -new_n8957_ = NAND ( new_n2131_, new_n1284_ ) -new_n8958_ = NAND ( new_n8957_, new_n8956_, new_n8955_, new_n8954_ ) -new_n8959_ = OR ( new_n8799_, new_n6490_ ) -new_n8960_ = OR ( new_n8942_, new_n6474_ ) -new_n8961_ = NAND ( new_n8804_, new_n2118_ ) -new_n8962_ = NAND ( new_n8961_, new_n8960_, new_n8959_, new_n8825_ ) -new_n8963_ = NOT ( new_n8962_ ) -new_n8964_ = NAND ( new_n8963_, new_n8958_ ) -new_n8965_ = OR ( new_n8963_, new_n8958_ ) -new_n8966_ = OR ( new_n8799_, new_n6308_ ) -new_n8967_ = OR ( new_n8942_, new_n6292_ ) -new_n8968_ = NAND ( new_n8804_, new_n2131_ ) -new_n8969_ = NAND ( new_n8968_, new_n8967_, new_n8966_, new_n8825_ ) -new_n8970_ = OR ( new_n8763_, new_n6308_ ) -new_n8971_ = OR ( new_n8795_, new_n6292_ ) -new_n8972_ = NAND ( new_n8790_, new_n2131_ ) -new_n8973_ = NAND ( new_n2144_, new_n1284_ ) -new_n8974_ = NAND ( new_n8973_, new_n8972_, new_n8971_, new_n8970_ ) -new_n8975_ = NOT ( new_n8974_ ) -new_n8976_ = NAND ( new_n8975_, new_n8969_ ) -new_n8977_ = OR ( new_n8975_, new_n8969_ ) -new_n8978_ = OR ( new_n8763_, new_n6157_ ) -new_n8979_ = OR ( new_n8795_, new_n6140_ ) -new_n8980_ = NAND ( new_n8790_, new_n2144_ ) -new_n8981_ = NAND ( new_n2157_, new_n1284_ ) -new_n8982_ = NAND ( new_n8981_, new_n8980_, new_n8979_, new_n8978_ ) -new_n8983_ = OR ( new_n8799_, new_n6157_ ) -new_n8984_ = OR ( new_n8942_, new_n6140_ ) -new_n8985_ = NAND ( new_n8804_, new_n2144_ ) -new_n8986_ = NAND ( new_n8985_, new_n8984_, new_n8983_, new_n8825_ ) -new_n8987_ = NOT ( new_n8986_ ) -new_n8988_ = NAND ( new_n8987_, new_n8982_ ) -new_n8989_ = OR ( new_n8987_, new_n8982_ ) -new_n8990_ = OR ( new_n8799_, new_n5991_ ) -new_n8991_ = NAND ( new_n8801_, new_n5974_ ) -new_n8992_ = NAND ( new_n8804_, new_n2157_ ) -new_n8993_ = NAND ( new_n8992_, new_n8991_, new_n8990_, new_n8825_ ) -new_n8994_ = OR ( new_n8763_, new_n5991_ ) -new_n8995_ = NAND ( new_n8796_, new_n5974_ ) -new_n8996_ = NAND ( new_n8790_, new_n2157_ ) -new_n8997_ = NAND ( new_n2170_, new_n1284_ ) -new_n8998_ = NAND ( new_n8997_, new_n8996_, new_n8995_, new_n8994_ ) -new_n8999_ = NOT ( new_n8998_ ) -new_n9000_ = NAND ( new_n8999_, new_n8993_ ) -new_n9001_ = OR ( new_n8999_, new_n8993_ ) -new_n9002_ = OR ( new_n8763_, new_n5824_ ) -new_n9003_ = NAND ( new_n8796_, new_n5805_ ) -new_n9004_ = NAND ( new_n8790_, new_n2170_ ) -new_n9005_ = NAND ( new_n2183_, new_n1284_ ) -new_n9006_ = NAND ( new_n9005_, new_n9004_, new_n9003_, new_n9002_ ) -new_n9007_ = OR ( new_n8799_, new_n5824_ ) -new_n9008_ = NAND ( new_n8801_, new_n5805_ ) -new_n9009_ = NAND ( new_n8804_, new_n2170_ ) -new_n9010_ = NAND ( new_n9009_, new_n9008_, new_n9007_, new_n8825_ ) -new_n9011_ = NOT ( new_n9010_ ) -new_n9012_ = NAND ( new_n9011_, new_n9006_ ) -new_n9013_ = OR ( new_n9011_, new_n9006_ ) -new_n9014_ = OR ( new_n8799_, new_n5610_ ) -new_n9015_ = OR ( new_n8942_, new_n5592_ ) -new_n9016_ = NAND ( new_n8804_, new_n2183_ ) -new_n9017_ = NAND ( new_n9016_, new_n9015_, new_n9014_, new_n8825_ ) -new_n9018_ = OR ( new_n8763_, new_n5610_ ) -new_n9019_ = OR ( new_n8795_, new_n5592_ ) -new_n9020_ = NAND ( new_n8790_, new_n2183_ ) -new_n9021_ = NAND ( new_n2196_, new_n1284_ ) -new_n9022_ = NAND ( new_n9021_, new_n9020_, new_n9019_, new_n9018_ ) -new_n9023_ = NOT ( new_n9022_ ) -new_n9024_ = NAND ( new_n9023_, new_n9017_ ) -new_n9025_ = OR ( new_n9023_, new_n9017_ ) -new_n9026_ = OR ( new_n8763_, new_n5448_ ) -new_n9027_ = OR ( new_n8795_, new_n5431_ ) -new_n9028_ = NAND ( new_n8790_, new_n2196_ ) -new_n9029_ = NAND ( new_n2209_, new_n1284_ ) -new_n9030_ = NAND ( new_n9029_, new_n9028_, new_n9027_, new_n9026_ ) -new_n9031_ = OR ( new_n8799_, new_n5448_ ) -new_n9032_ = OR ( new_n8942_, new_n5431_ ) -new_n9033_ = NAND ( new_n8804_, new_n2196_ ) -new_n9034_ = NAND ( new_n9033_, new_n9032_, new_n9031_, new_n8825_ ) -new_n9035_ = NOT ( new_n9034_ ) -new_n9036_ = NAND ( new_n9035_, new_n9030_ ) -new_n9037_ = OR ( new_n9035_, new_n9030_ ) -new_n9038_ = OR ( new_n8799_, new_n5273_ ) -new_n9039_ = NAND ( new_n8801_, new_n5256_ ) -new_n9040_ = NAND ( new_n8804_, new_n2209_ ) -new_n9041_ = NAND ( new_n9040_, new_n9039_, new_n9038_, new_n8825_ ) -new_n9042_ = OR ( new_n8763_, new_n5273_ ) -new_n9043_ = NAND ( new_n8796_, new_n5256_ ) -new_n9044_ = NAND ( new_n8790_, new_n2209_ ) -new_n9045_ = NAND ( new_n2222_, new_n1284_ ) -new_n9046_ = NAND ( new_n9045_, new_n9044_, new_n9043_, new_n9042_ ) -new_n9047_ = NOT ( new_n9046_ ) -new_n9048_ = NAND ( new_n9047_, new_n9041_ ) -new_n9049_ = OR ( new_n9047_, new_n9041_ ) -new_n9050_ = OR ( new_n8763_, new_n5112_ ) -new_n9051_ = NAND ( new_n8796_, new_n5092_ ) -new_n9052_ = NAND ( new_n8790_, new_n2222_ ) -new_n9053_ = NAND ( new_n2235_, new_n1284_ ) -new_n9054_ = NAND ( new_n9053_, new_n9052_, new_n9051_, new_n9050_ ) -new_n9055_ = OR ( new_n8799_, new_n5112_ ) -new_n9056_ = NAND ( new_n8801_, new_n5092_ ) -new_n9057_ = NAND ( new_n8804_, new_n2222_ ) -new_n9058_ = NAND ( new_n9057_, new_n9056_, new_n9055_, new_n8825_ ) -new_n9059_ = NOT ( new_n9058_ ) -new_n9060_ = NAND ( new_n9059_, new_n9054_ ) -new_n9061_ = OR ( new_n9059_, new_n9054_ ) -new_n9062_ = OR ( new_n8799_, new_n4898_ ) -new_n9063_ = OR ( new_n8942_, new_n4880_ ) -new_n9064_ = NAND ( new_n8804_, new_n2235_ ) -new_n9065_ = NAND ( new_n9064_, new_n9063_, new_n9062_, new_n8825_ ) -new_n9066_ = OR ( new_n8763_, new_n4898_ ) -new_n9067_ = OR ( new_n8795_, new_n4880_ ) -new_n9068_ = NAND ( new_n8790_, new_n2235_ ) -new_n9069_ = NAND ( new_n2249_, new_n1284_ ) -new_n9070_ = NAND ( new_n9069_, new_n9068_, new_n9067_, new_n9066_ ) -new_n9071_ = NOT ( new_n9070_ ) -new_n9072_ = NAND ( new_n9071_, new_n9065_ ) -new_n9073_ = OR ( new_n9071_, new_n9065_ ) -new_n9074_ = OR ( new_n8763_, new_n4735_ ) -new_n9075_ = NAND ( new_n8790_, new_n2249_ ) -new_n9076_ = OR ( new_n8795_, new_n4719_ ) -new_n9077_ = NAND ( new_n2263_, new_n1284_ ) -new_n9078_ = NAND ( new_n9077_, new_n9076_, new_n9075_, new_n9074_ ) -new_n9079_ = OR ( new_n8799_, new_n4735_ ) -new_n9080_ = NAND ( new_n8804_, new_n2249_ ) -new_n9081_ = OR ( new_n8942_, new_n4719_ ) -new_n9082_ = NAND ( new_n9081_, new_n9080_, new_n9079_, new_n8825_ ) -new_n9083_ = NOT ( new_n9082_ ) -new_n9084_ = NAND ( new_n9083_, new_n9078_ ) -new_n9085_ = OR ( new_n9083_, new_n9078_ ) -new_n9086_ = OR ( new_n8799_, new_n4566_ ) -new_n9087_ = NAND ( new_n8804_, new_n2263_ ) -new_n9088_ = OR ( new_n8942_, new_n4550_ ) -new_n9089_ = NAND ( new_n9088_, new_n9087_, new_n9086_, new_n8825_ ) -new_n9090_ = OR ( new_n8763_, new_n4566_ ) -new_n9091_ = NAND ( new_n8790_, new_n2263_ ) -new_n9092_ = OR ( new_n8795_, new_n4550_ ) -new_n9093_ = NAND ( new_n2276_, new_n1284_ ) -new_n9094_ = NAND ( new_n9093_, new_n9092_, new_n9091_, new_n9090_ ) -new_n9095_ = NOT ( new_n9094_ ) -new_n9096_ = NAND ( new_n9095_, new_n9089_ ) -new_n9097_ = OR ( new_n9095_, new_n9089_ ) -new_n9098_ = OR ( new_n8763_, new_n4402_ ) -new_n9099_ = NAND ( new_n8790_, new_n2276_ ) -new_n9100_ = OR ( new_n8795_, new_n4384_ ) -new_n9101_ = NAND ( new_n2289_, new_n1284_ ) -new_n9102_ = NAND ( new_n9101_, new_n9100_, new_n9099_, new_n9098_ ) -new_n9103_ = OR ( new_n8799_, new_n4402_ ) -new_n9104_ = NAND ( new_n8804_, new_n2276_ ) -new_n9105_ = OR ( new_n8942_, new_n4384_ ) -new_n9106_ = NAND ( new_n9105_, new_n9104_, new_n9103_, new_n8825_ ) -new_n9107_ = NOT ( new_n9106_ ) -new_n9108_ = NAND ( new_n9107_, new_n9102_ ) -new_n9109_ = OR ( new_n9107_, new_n9102_ ) -new_n9110_ = OR ( new_n8799_, new_n4184_ ) -new_n9111_ = NAND ( new_n8804_, new_n2289_ ) -new_n9112_ = OR ( new_n8942_, new_n4167_ ) -new_n9113_ = NAND ( new_n9112_, new_n9111_, new_n9110_, new_n8825_ ) -new_n9114_ = OR ( new_n8763_, new_n4184_ ) -new_n9115_ = NAND ( new_n8790_, new_n2289_ ) -new_n9116_ = OR ( new_n8795_, new_n4167_ ) -new_n9117_ = NAND ( new_n2301_, new_n1284_ ) -new_n9118_ = NAND ( new_n9117_, new_n9116_, new_n9115_, new_n9114_ ) -new_n9119_ = NOT ( new_n9118_ ) -new_n9120_ = NAND ( new_n9119_, new_n9113_ ) -new_n9121_ = OR ( new_n9119_, new_n9113_ ) -new_n9122_ = OR ( new_n8763_, new_n3983_ ) -new_n9123_ = NAND ( new_n8790_, new_n2301_ ) -new_n9124_ = OR ( new_n8795_, new_n3966_ ) -new_n9125_ = NAND ( new_n2311_, new_n1284_ ) -new_n9126_ = NAND ( new_n9125_, new_n9124_, new_n9123_, new_n9122_ ) -new_n9127_ = OR ( new_n8799_, new_n3983_ ) -new_n9128_ = NAND ( new_n8804_, new_n2301_ ) -new_n9129_ = OR ( new_n8942_, new_n3966_ ) -new_n9130_ = NAND ( new_n9129_, new_n9128_, new_n9127_, new_n8825_ ) -new_n9131_ = NOT ( new_n9130_ ) -new_n9132_ = NAND ( new_n9131_, new_n9126_ ) -new_n9133_ = OR ( new_n9131_, new_n9126_ ) -new_n9134_ = OR ( new_n8799_, new_n3761_ ) -new_n9135_ = NAND ( new_n8804_, new_n2311_ ) -new_n9136_ = OR ( new_n8942_, new_n3745_ ) -new_n9137_ = NAND ( new_n9136_, new_n9135_, new_n9134_, new_n8825_ ) -new_n9138_ = OR ( new_n8763_, new_n3761_ ) -new_n9139_ = NAND ( new_n8790_, new_n2311_ ) -new_n9140_ = OR ( new_n8795_, new_n3745_ ) -new_n9141_ = NAND ( new_n2322_, new_n1284_ ) -new_n9142_ = NAND ( new_n9141_, new_n9140_, new_n9139_, new_n9138_ ) -new_n9143_ = NOT ( new_n9142_ ) -new_n9144_ = NAND ( new_n9143_, new_n9137_ ) -new_n9145_ = OR ( new_n8763_, new_n3542_ ) -new_n9146_ = NAND ( new_n8790_, new_n2322_ ) -new_n9147_ = NAND ( new_n8796_, new_n3524_ ) -new_n9148_ = NAND ( new_n2333_, new_n1284_ ) -new_n9149_ = NAND ( new_n9148_, new_n9147_, new_n9146_, new_n9145_ ) -new_n9150_ = NOT ( new_n9149_ ) -new_n9151_ = OR ( new_n8799_, new_n3542_ ) -new_n9152_ = NAND ( new_n8804_, new_n2322_ ) -new_n9153_ = NAND ( new_n8801_, new_n3524_ ) -new_n9154_ = NAND ( new_n9153_, new_n9152_, new_n9151_, new_n8825_ ) -new_n9155_ = NAND ( new_n9154_, new_n9150_ ) -new_n9156_ = OR ( new_n8799_, new_n2947_ ) -new_n9157_ = NAND ( new_n8804_, new_n2333_ ) -new_n9158_ = OR ( new_n8942_, new_n2845_ ) -new_n9159_ = NAND ( new_n9158_, new_n9157_, new_n9156_, new_n8825_ ) -new_n9160_ = OR ( new_n8763_, new_n2947_ ) -new_n9161_ = NAND ( new_n8790_, new_n2333_ ) -new_n9162_ = OR ( new_n8795_, new_n2845_ ) -new_n9163_ = NAND ( new_n2344_, new_n1284_ ) -new_n9164_ = NAND ( new_n9163_, new_n9162_, new_n9161_, new_n9160_ ) -new_n9165_ = NOT ( new_n9164_ ) -new_n9166_ = NAND ( new_n9165_, new_n9159_ ) -new_n9167_ = OR ( new_n8763_, new_n3368_ ) -new_n9168_ = OR ( new_n8795_, new_n2925_ ) -new_n9169_ = NAND ( new_n8790_, new_n2344_ ) -new_n9170_ = AND ( new_n9169_, new_n9168_, new_n9167_ ) -new_n9171_ = NOR ( new_n2864_, new_n1270_ ) -new_n9172_ = OR ( new_n9171_, new_n1284_ ) -new_n9173_ = OR ( new_n9172_, new_n8792_, new_n8786_, new_n3028_ ) -new_n9174_ = NAND ( new_n9173_, new_n9170_ ) -new_n9175_ = OR ( new_n8799_, new_n3368_ ) -new_n9176_ = NAND ( new_n8804_, new_n2344_ ) -new_n9177_ = OR ( new_n8942_, new_n2925_ ) -new_n9178_ = AND ( new_n9177_, new_n8825_ ) -new_n9179_ = NAND ( new_n9178_, new_n9176_, new_n9175_, new_n9174_ ) -new_n9180_ = OR ( new_n9173_, new_n9170_ ) -new_n9181_ = OR ( new_n9165_, new_n9159_ ) -new_n9182_ = NAND ( new_n9181_, new_n9180_, new_n9179_ ) -new_n9183_ = NAND ( new_n9182_, new_n9166_, new_n9155_ ) -new_n9184_ = OR ( new_n9154_, new_n9150_ ) -new_n9185_ = OR ( new_n9143_, new_n9137_ ) -new_n9186_ = NAND ( new_n9185_, new_n9184_, new_n9183_ ) -new_n9187_ = NAND ( new_n9186_, new_n9144_, new_n9133_ ) -new_n9188_ = NAND ( new_n9187_, new_n9132_, new_n9121_ ) -new_n9189_ = NAND ( new_n9188_, new_n9120_, new_n9109_ ) -new_n9190_ = NAND ( new_n9189_, new_n9108_, new_n9097_ ) -new_n9191_ = NAND ( new_n9190_, new_n9096_, new_n9085_ ) -new_n9192_ = NAND ( new_n9191_, new_n9084_, new_n9073_ ) -new_n9193_ = NAND ( new_n9192_, new_n9072_, new_n9061_ ) -new_n9194_ = NAND ( new_n9193_, new_n9060_, new_n9049_ ) -new_n9195_ = NAND ( new_n9194_, new_n9048_, new_n9037_ ) -new_n9196_ = NAND ( new_n9195_, new_n9036_, new_n9025_ ) -new_n9197_ = NAND ( new_n9196_, new_n9024_, new_n9013_ ) -new_n9198_ = NAND ( new_n9197_, new_n9012_, new_n9001_ ) -new_n9199_ = NAND ( new_n9198_, new_n9000_, new_n8989_ ) -new_n9200_ = NAND ( new_n9199_, new_n8988_, new_n8977_ ) -new_n9201_ = NAND ( new_n9200_, new_n8976_, new_n8965_ ) -new_n9202_ = NAND ( new_n9201_, new_n8964_, new_n8953_ ) -new_n9203_ = NAND ( new_n9202_, new_n8952_, new_n8940_ ) -new_n9204_ = NAND ( new_n9203_, new_n8939_, new_n8928_ ) -new_n9205_ = NAND ( new_n9204_, new_n8927_, new_n8916_ ) -new_n9206_ = NAND ( new_n9205_, new_n8915_, new_n8904_ ) -new_n9207_ = NAND ( new_n9206_, new_n8903_, new_n8892_ ) -new_n9208_ = NAND ( new_n9207_, new_n8891_, new_n8880_ ) -new_n9209_ = NAND ( new_n9208_, new_n8879_, new_n8868_ ) -new_n9210_ = NAND ( new_n9209_, new_n8867_, new_n8856_ ) -new_n9211_ = NAND ( new_n9210_, new_n8855_, new_n8844_ ) -new_n9212_ = NAND ( new_n9211_, new_n8843_, new_n8833_ ) -new_n9213_ = NAND ( new_n9212_, new_n8832_, new_n8821_ ) -new_n9214_ = OR ( new_n8820_, new_n8816_ ) -new_n9215_ = NAND ( new_n9214_, new_n9213_, new_n8810_, new_n8807_ ) -new_n9216_ = NAND ( new_n8806_, new_n8798_, new_n3048_ ) -new_n9217_ = NAND ( new_n8809_, new_n8808_, new_n3047_ ) -new_n9218_ = AND ( new_n9217_, new_n9216_, new_n9215_ ) -new_n9219_ = OR ( new_n9218_, new_n1270_ ) -new_n9220_ = NAND ( new_n9218_, new_n1270_ ) -new_n9221_ = NAND ( new_n9220_, new_n9219_, new_n2875_ ) -new_n9222_ = OR ( new_n8702_, new_n8761_ ) -new_n9223_ = NAND ( new_n8702_, new_n8761_ ) -new_n9224_ = NOR ( new_n8642_, new_n2474_ ) -new_n9225_ = NOR ( new_n8640_, new_n8624_ ) -new_n9226_ = OR ( new_n8528_, new_n8517_ ) -new_n9227_ = NAND ( new_n8528_, new_n8517_ ) -new_n9228_ = OR ( new_n8474_, new_n8463_ ) -new_n9229_ = NAND ( new_n8474_, new_n8463_ ) -new_n9230_ = OR ( new_n8420_, new_n8409_ ) -new_n9231_ = NAND ( new_n8420_, new_n8409_ ) -new_n9232_ = NOR ( new_n8366_, new_n8355_ ) -new_n9233_ = NAND ( new_n8366_, new_n8355_ ) -new_n9234_ = OR ( new_n8312_, new_n8301_ ) -new_n9235_ = NAND ( new_n8312_, new_n8301_ ) -new_n9236_ = NOR ( new_n7775_, new_n7764_ ) -new_n9237_ = NAND ( new_n7775_, new_n7764_ ) -new_n9238_ = OR ( new_n7721_, new_n7710_ ) -new_n9239_ = NAND ( new_n7721_, new_n7710_ ) -new_n9240_ = NOR ( new_n7636_, new_n7616_ ) -new_n9241_ = OR ( new_n6627_, new_n2105_ ) -new_n9242_ = NAND ( new_n6474_, new_n2118_ ) -new_n9243_ = OR ( new_n6474_, new_n2118_ ) -new_n9244_ = NOR ( new_n7476_, new_n7401_ ) -new_n9245_ = NOR ( new_n6292_, new_n2131_ ) -new_n9246_ = OR ( new_n5974_, new_n5981_ ) -new_n9247_ = NAND ( new_n5974_, new_n5981_ ) -new_n9248_ = OR ( new_n5805_, new_n5813_ ) -new_n9249_ = NAND ( new_n5805_, new_n5813_ ) -new_n9250_ = NAND ( new_n5592_, new_n2183_ ) -new_n9251_ = OR ( new_n5592_, new_n2183_ ) -new_n9252_ = NOR ( new_n5256_, new_n5263_ ) -new_n9253_ = NAND ( new_n5256_, new_n5263_ ) -new_n9254_ = OR ( new_n5092_, new_n5101_ ) -new_n9255_ = NAND ( new_n5092_, new_n5101_ ) -new_n9256_ = XNOR ( new_n4167_, new_n2289_ ) -new_n9257_ = XNOR ( new_n4384_, new_n2276_ ) -new_n9258_ = XOR ( new_n3745_, new_n2311_ ) -new_n9259_ = XOR ( new_n3966_, new_n2301_ ) -new_n9260_ = XOR ( new_n2845_, new_n2333_ ) -new_n9261_ = XNOR ( new_n3524_, new_n2322_ ) -new_n9262_ = NAND ( new_n9261_, new_n9260_, new_n9259_, new_n9258_ ) -new_n9263_ = OR ( new_n9262_, new_n9257_, new_n9256_ ) -new_n9264_ = NOR ( new_n5300_, new_n4725_ ) -new_n9265_ = OR ( new_n4719_, new_n2249_ ) -new_n9266_ = NAND ( new_n4550_, new_n2263_ ) -new_n9267_ = OR ( new_n4550_, new_n2263_ ) -new_n9268_ = XOR ( new_n2925_, new_n2344_ ) -new_n9269_ = NAND ( new_n9268_, new_n9267_, new_n9266_, new_n9265_ ) -new_n9270_ = XNOR ( new_n4880_, new_n2235_ ) -new_n9271_ = NOR ( new_n9270_, new_n9269_, new_n9264_, new_n9263_ ) -new_n9272_ = NAND ( new_n9271_, new_n9255_, new_n9254_, new_n9253_ ) -new_n9273_ = XNOR ( new_n5431_, new_n2196_ ) -new_n9274_ = NOR ( new_n9273_, new_n9272_, new_n9252_ ) -new_n9275_ = AND ( new_n9274_, new_n9251_, new_n9250_, new_n9249_ ) -new_n9276_ = NAND ( new_n9275_, new_n9248_, new_n9247_, new_n9246_ ) -new_n9277_ = XNOR ( new_n6140_, new_n2144_ ) -new_n9278_ = NOR ( new_n9277_, new_n9276_, new_n9245_, new_n9244_ ) -new_n9279_ = NAND ( new_n9278_, new_n9243_, new_n9242_, new_n9241_ ) -new_n9280_ = XOR ( new_n7667_, new_n2090_ ) -new_n9281_ = NOR ( new_n9280_, new_n9279_, new_n9240_ ) -new_n9282_ = NAND ( new_n9281_, new_n9239_, new_n9238_, new_n9237_ ) -new_n9283_ = NOR ( new_n9282_, new_n9236_ ) -new_n9284_ = NAND ( new_n9283_, new_n9235_, new_n9234_, new_n9233_ ) -new_n9285_ = NOR ( new_n9284_, new_n9232_ ) -new_n9286_ = AND ( new_n9285_, new_n9231_, new_n9230_, new_n9229_ ) -new_n9287_ = NAND ( new_n9286_, new_n9228_, new_n9227_, new_n9226_ ) -new_n9288_ = XOR ( new_n8582_, new_n2614_ ) -new_n9289_ = NOR ( new_n9288_, new_n9287_, new_n9225_, new_n9224_ ) -new_n9290_ = XNOR ( new_n8735_, new_n2011_ ) -new_n9291_ = NAND ( new_n9290_, new_n9289_, new_n9223_, new_n9222_ ) -new_n9292_ = NAND ( new_n9291_, new_n3465_ ) -new_n9293_ = NAND ( new_n9292_, new_n9221_ ) -new_n9294_ = NAND ( new_n9293_, new_n6660_ ) -new_n9295_ = NAND ( new_n9218_, new_n3027_ ) -new_n9296_ = OR ( new_n9218_, new_n2333_ ) -new_n9297_ = NAND ( new_n9296_, new_n9295_, new_n2845_ ) -new_n9298_ = NAND ( new_n9217_, new_n9216_, new_n9215_ ) -new_n9299_ = NAND ( new_n9298_, new_n2344_ ) -new_n9300_ = OR ( new_n9298_, new_n3375_ ) -new_n9301_ = NAND ( new_n9300_, new_n9299_, new_n9297_, new_n3381_ ) -new_n9302_ = NAND ( new_n9296_, new_n9295_ ) -new_n9303_ = NAND ( new_n9302_, new_n3053_ ) -new_n9304_ = NAND ( new_n9218_, new_n3565_ ) -new_n9305_ = OR ( new_n9218_, new_n2322_ ) -new_n9306_ = NAND ( new_n9305_, new_n9304_ ) -new_n9307_ = NAND ( new_n9306_, new_n3524_ ) -new_n9308_ = NAND ( new_n9307_, new_n9303_, new_n9301_ ) -new_n9309_ = OR ( new_n9306_, new_n3524_ ) -new_n9310_ = NAND ( new_n9218_, new_n3790_ ) -new_n9311_ = OR ( new_n9218_, new_n2311_ ) -new_n9312_ = NAND ( new_n9311_, new_n9310_ ) -new_n9313_ = OR ( new_n9312_, new_n3783_ ) -new_n9314_ = NAND ( new_n9313_, new_n9309_, new_n9308_ ) -new_n9315_ = NAND ( new_n9312_, new_n3783_ ) -new_n9316_ = NAND ( new_n9218_, new_n4126_ ) -new_n9317_ = OR ( new_n9218_, new_n2301_ ) -new_n9318_ = NAND ( new_n9317_, new_n9316_ ) -new_n9319_ = NAND ( new_n9318_, new_n4119_ ) -new_n9320_ = NAND ( new_n9319_, new_n9315_, new_n9314_ ) -new_n9321_ = OR ( new_n9318_, new_n4119_ ) -new_n9322_ = NAND ( new_n9218_, new_n4334_ ) -new_n9323_ = OR ( new_n9218_, new_n2289_ ) -new_n9324_ = NAND ( new_n9323_, new_n9322_ ) -new_n9325_ = OR ( new_n9324_, new_n4337_ ) -new_n9326_ = NAND ( new_n9325_, new_n9321_, new_n9320_ ) -new_n9327_ = NAND ( new_n9324_, new_n4337_ ) -new_n9328_ = NAND ( new_n9218_, new_n4687_ ) -new_n9329_ = OR ( new_n9218_, new_n2276_ ) -new_n9330_ = NAND ( new_n9329_, new_n9328_ ) -new_n9331_ = NAND ( new_n9330_, new_n4690_ ) -new_n9332_ = NAND ( new_n9331_, new_n9327_, new_n9326_ ) -new_n9333_ = OR ( new_n9330_, new_n4690_ ) -new_n9334_ = NAND ( new_n9218_, new_n5027_ ) -new_n9335_ = OR ( new_n9218_, new_n2263_ ) -new_n9336_ = NAND ( new_n9335_, new_n9334_ ) -new_n9337_ = OR ( new_n9336_, new_n5031_ ) -new_n9338_ = NAND ( new_n9337_, new_n9333_, new_n9332_ ) -new_n9339_ = NAND ( new_n9336_, new_n5031_ ) -new_n9340_ = NAND ( new_n9218_, new_n5296_ ) -new_n9341_ = OR ( new_n9218_, new_n2249_ ) -new_n9342_ = NAND ( new_n9341_, new_n9340_ ) -new_n9343_ = NAND ( new_n9342_, new_n5300_ ) -new_n9344_ = NAND ( new_n9343_, new_n9339_, new_n9338_ ) -new_n9345_ = OR ( new_n9342_, new_n5300_ ) -new_n9346_ = NAND ( new_n9218_, new_n5635_ ) -new_n9347_ = OR ( new_n9218_, new_n2235_ ) -new_n9348_ = NAND ( new_n9347_, new_n9346_ ) -new_n9349_ = OR ( new_n9348_, new_n5639_ ) -new_n9350_ = NAND ( new_n9349_, new_n9345_, new_n9344_ ) -new_n9351_ = NAND ( new_n9348_, new_n5639_ ) -new_n9352_ = NAND ( new_n9218_, new_n5938_ ) -new_n9353_ = OR ( new_n9218_, new_n2222_ ) -new_n9354_ = NAND ( new_n9353_, new_n9352_ ) -new_n9355_ = NAND ( new_n9354_, new_n5092_ ) -new_n9356_ = NAND ( new_n9355_, new_n9351_, new_n9350_ ) -new_n9357_ = OR ( new_n9354_, new_n5092_ ) -new_n9358_ = NAND ( new_n9218_, new_n6269_ ) -new_n9359_ = OR ( new_n9218_, new_n2209_ ) -new_n9360_ = NAND ( new_n9359_, new_n9358_ ) -new_n9361_ = OR ( new_n9360_, new_n5256_ ) -new_n9362_ = NAND ( new_n9361_, new_n9357_, new_n9356_ ) -new_n9363_ = NAND ( new_n9360_, new_n5256_ ) -new_n9364_ = NAND ( new_n9218_, new_n6606_ ) -new_n9365_ = OR ( new_n9218_, new_n2196_ ) -new_n9366_ = NAND ( new_n9365_, new_n9364_ ) -new_n9367_ = NAND ( new_n9366_, new_n6609_ ) -new_n9368_ = NAND ( new_n9367_, new_n9363_, new_n9362_ ) -new_n9369_ = OR ( new_n9366_, new_n6609_ ) -new_n9370_ = NAND ( new_n9218_, new_n6828_ ) -new_n9371_ = OR ( new_n9218_, new_n2183_ ) -new_n9372_ = NAND ( new_n9371_, new_n9370_ ) -new_n9373_ = OR ( new_n9372_, new_n6831_ ) -new_n9374_ = NAND ( new_n9373_, new_n9369_, new_n9368_ ) -new_n9375_ = NAND ( new_n9372_, new_n6831_ ) -new_n9376_ = NAND ( new_n9218_, new_n6977_ ) -new_n9377_ = OR ( new_n9218_, new_n2170_ ) -new_n9378_ = NAND ( new_n9377_, new_n9376_ ) -new_n9379_ = NAND ( new_n9378_, new_n5805_ ) -new_n9380_ = NAND ( new_n9379_, new_n9375_, new_n9374_ ) -new_n9381_ = OR ( new_n9378_, new_n5805_ ) -new_n9382_ = NAND ( new_n9218_, new_n7126_ ) -new_n9383_ = OR ( new_n9218_, new_n2157_ ) -new_n9384_ = NAND ( new_n9383_, new_n9382_ ) -new_n9385_ = OR ( new_n9384_, new_n5974_ ) -new_n9386_ = NAND ( new_n9385_, new_n9381_, new_n9380_ ) -new_n9387_ = NAND ( new_n9384_, new_n5974_ ) -new_n9388_ = NAND ( new_n9218_, new_n7275_ ) -new_n9389_ = OR ( new_n9218_, new_n2144_ ) -new_n9390_ = NAND ( new_n9389_, new_n9388_ ) -new_n9391_ = NAND ( new_n9390_, new_n7278_ ) -new_n9392_ = NAND ( new_n9391_, new_n9387_, new_n9386_ ) -new_n9393_ = OR ( new_n9390_, new_n7278_ ) -new_n9394_ = NAND ( new_n9218_, new_n7473_ ) -new_n9395_ = OR ( new_n9218_, new_n2131_ ) -new_n9396_ = NAND ( new_n9395_, new_n9394_ ) -new_n9397_ = OR ( new_n9396_, new_n7476_ ) -new_n9398_ = NAND ( new_n9397_, new_n9393_, new_n9392_ ) -new_n9399_ = NAND ( new_n9396_, new_n7476_ ) -new_n9400_ = NAND ( new_n9218_, new_n7584_ ) -new_n9401_ = OR ( new_n9218_, new_n2118_ ) -new_n9402_ = NAND ( new_n9401_, new_n9400_ ) -new_n9403_ = NAND ( new_n9402_, new_n7587_ ) -new_n9404_ = NAND ( new_n9403_, new_n9399_, new_n9398_ ) -new_n9405_ = OR ( new_n9402_, new_n7587_ ) -new_n9406_ = NAND ( new_n9218_, new_n7633_ ) -new_n9407_ = OR ( new_n9218_, new_n2105_ ) -new_n9408_ = NAND ( new_n9407_, new_n9406_ ) -new_n9409_ = OR ( new_n9408_, new_n7636_ ) -new_n9410_ = NAND ( new_n9409_, new_n9405_, new_n9404_ ) -new_n9411_ = NAND ( new_n9408_, new_n7636_ ) -new_n9412_ = NAND ( new_n9218_, new_n7674_ ) -new_n9413_ = OR ( new_n9218_, new_n2090_ ) -new_n9414_ = NAND ( new_n9413_, new_n9412_ ) -new_n9415_ = NAND ( new_n9414_, new_n7667_ ) -new_n9416_ = NAND ( new_n9415_, new_n9411_, new_n9410_ ) -new_n9417_ = OR ( new_n9414_, new_n7667_ ) -new_n9418_ = NAND ( new_n9218_, new_n7728_ ) -new_n9419_ = OR ( new_n9218_, new_n2079_ ) -new_n9420_ = NAND ( new_n9419_, new_n9418_ ) -new_n9421_ = OR ( new_n9420_, new_n7721_ ) -new_n9422_ = NAND ( new_n9421_, new_n9417_, new_n9416_ ) -new_n9423_ = NAND ( new_n9420_, new_n7721_ ) -new_n9424_ = NAND ( new_n9218_, new_n7782_ ) -new_n9425_ = OR ( new_n9218_, new_n2068_ ) -new_n9426_ = NAND ( new_n9425_, new_n9424_ ) -new_n9427_ = NAND ( new_n9426_, new_n7775_ ) -new_n9428_ = NAND ( new_n9427_, new_n9423_, new_n9422_ ) -new_n9429_ = OR ( new_n9426_, new_n7775_ ) -new_n9430_ = NAND ( new_n9218_, new_n8319_ ) -new_n9431_ = OR ( new_n9218_, new_n2398_ ) -new_n9432_ = NAND ( new_n9431_, new_n9430_ ) -new_n9433_ = OR ( new_n9432_, new_n8312_ ) -new_n9434_ = NAND ( new_n9433_, new_n9429_, new_n9428_ ) -new_n9435_ = NAND ( new_n9432_, new_n8312_ ) -new_n9436_ = NAND ( new_n9218_, new_n8373_ ) -new_n9437_ = OR ( new_n9218_, new_n2387_ ) -new_n9438_ = NAND ( new_n9437_, new_n9436_ ) -new_n9439_ = NAND ( new_n9438_, new_n8366_ ) -new_n9440_ = NAND ( new_n9439_, new_n9435_, new_n9434_ ) -new_n9441_ = OR ( new_n9438_, new_n8366_ ) -new_n9442_ = NAND ( new_n9218_, new_n8427_ ) -new_n9443_ = OR ( new_n9218_, new_n2486_ ) -new_n9444_ = NAND ( new_n9443_, new_n9442_ ) -new_n9445_ = OR ( new_n9444_, new_n8420_ ) -new_n9446_ = NAND ( new_n9445_, new_n9441_, new_n9440_ ) -new_n9447_ = NAND ( new_n9444_, new_n8420_ ) -new_n9448_ = NAND ( new_n9218_, new_n8481_ ) -new_n9449_ = OR ( new_n9218_, new_n2549_ ) -new_n9450_ = NAND ( new_n9449_, new_n9448_ ) -new_n9451_ = NAND ( new_n9450_, new_n8474_ ) -new_n9452_ = NAND ( new_n9451_, new_n9447_, new_n9446_ ) -new_n9453_ = OR ( new_n9450_, new_n8474_ ) -new_n9454_ = NAND ( new_n9218_, new_n8535_ ) -new_n9455_ = OR ( new_n9218_, new_n2539_ ) -new_n9456_ = NAND ( new_n9455_, new_n9454_ ) -new_n9457_ = OR ( new_n9456_, new_n8528_ ) -new_n9458_ = NAND ( new_n9457_, new_n9453_, new_n9452_ ) -new_n9459_ = NAND ( new_n9456_, new_n8528_ ) -new_n9460_ = NAND ( new_n9218_, new_n8589_ ) -new_n9461_ = OR ( new_n9218_, new_n2614_ ) -new_n9462_ = NAND ( new_n9461_, new_n9460_ ) -new_n9463_ = NAND ( new_n9462_, new_n8582_ ) -new_n9464_ = NAND ( new_n9463_, new_n9459_, new_n9458_ ) -new_n9465_ = OR ( new_n9462_, new_n8582_ ) -new_n9466_ = NAND ( new_n9218_, new_n8653_ ) -new_n9467_ = OR ( new_n9218_, new_n2474_ ) -new_n9468_ = NAND ( new_n9467_, new_n9466_ ) -new_n9469_ = OR ( new_n9468_, new_n8640_ ) -new_n9470_ = NAND ( new_n9469_, new_n9465_, new_n9464_ ) -new_n9471_ = NAND ( new_n9468_, new_n8640_ ) -new_n9472_ = NAND ( new_n9218_, new_n8713_ ) -new_n9473_ = OR ( new_n9218_, new_n2019_ ) -new_n9474_ = NAND ( new_n9473_, new_n9472_ ) -new_n9475_ = NAND ( new_n9474_, new_n8702_ ) -new_n9476_ = NAND ( new_n9475_, new_n9471_, new_n9470_ ) -new_n9477_ = OR ( new_n9474_, new_n8702_ ) -new_n9478_ = NAND ( new_n9218_, new_n8743_ ) -new_n9479_ = OR ( new_n9218_, new_n2011_ ) -new_n9480_ = NAND ( new_n9479_, new_n9478_ ) -new_n9481_ = NAND ( new_n9480_, new_n8735_ ) -new_n9482_ = NAND ( new_n9481_, new_n9477_, new_n9476_ ) -new_n9483_ = OR ( new_n9480_, new_n8735_ ) -new_n9484_ = NAND ( new_n9483_, new_n9482_, new_n3028_ ) -new_n9485_ = NAND ( new_n9218_, new_n1277_ ) -new_n9486_ = NAND ( new_n9485_, new_n9484_ ) -new_n9487_ = NAND ( new_n9486_, new_n2892_ ) -new_n9488_ = OR ( new_n9298_, new_n3000_ ) -new_n9489_ = NAND ( new_n2864_, new_n1277_ ) -new_n9490_ = NAND ( new_n9489_, new_n9298_, new_n8793_ ) -new_n9491_ = OR ( new_n9291_, new_n3466_ ) -new_n9492_ = NAND ( new_n9491_, new_n9490_ ) -new_n9493_ = NAND ( new_n9492_, new_n2869_ ) -new_n9494_ = NAND ( new_n9493_, new_n9488_, new_n9487_ ) -new_n9495_ = NAND ( new_n9494_, new_n1303_ ) -new_n9496_ = NAND ( new_n9495_, new_n9294_ ) -new_n9497_ = NAND ( new_n9496_, NET_275 ) -new_n9498_ = NAND ( new_n3045_, new_n1298_, new_n1290_, new_n1276_ ) -new_n9499_ = OR ( new_n9498_, new_n9298_, new_n1442_ ) -new_n9500_ = NAND ( new_n9498_, new_n1284_ ) -new_n9501_ = NAND ( new_n1303_, new_n1276_ ) -new_n9502_ = NAND ( new_n9501_, new_n9500_, new_n1304_, NET_275 ) -new_n9503_ = NAND ( new_n9502_, NET_245 ) -NET_9803 = NAND ( new_n9503_, new_n9499_, new_n9497_ ) -NET_990 = XOR ( NET_457, NET_212 ) -NET_991 = XNOR ( NET_521, NET_276 ) -NET_992 = XNOR ( NET_522, NET_277 ) diff --git a/ITC99BENCH/b22.bench b/ITC99BENCH/b22.bench deleted file mode 100644 index f9a83b0..0000000 --- a/ITC99BENCH/b22.bench +++ /dev/null @@ -1,14479 +0,0 @@ -# generated by verilog2bench.py https://gitea.yuhangq.com/YuhangQ/any2bench -INPUT(NET_1) -INPUT(NET_10) -INPUT(NET_100) -INPUT(NET_101) -INPUT(NET_102) -INPUT(NET_103) -INPUT(NET_104) -INPUT(NET_105) -INPUT(NET_106) -INPUT(NET_107) -INPUT(NET_108) -INPUT(NET_109) -INPUT(NET_11) -INPUT(NET_110) -INPUT(NET_111) -INPUT(NET_112) -INPUT(NET_113) -INPUT(NET_114) -INPUT(NET_115) -INPUT(NET_116) -INPUT(NET_117) -INPUT(NET_118) -INPUT(NET_119) -INPUT(NET_12) -INPUT(NET_120) -INPUT(NET_121) -INPUT(NET_122) -INPUT(NET_123) -INPUT(NET_124) -INPUT(NET_125) -INPUT(NET_126) -INPUT(NET_127) -INPUT(NET_128) -INPUT(NET_129) -INPUT(NET_13) -INPUT(NET_130) -INPUT(NET_131) -INPUT(NET_132) -INPUT(NET_133) -INPUT(NET_134) -INPUT(NET_135) -INPUT(NET_136) -INPUT(NET_137) -INPUT(NET_138) -INPUT(NET_139) -INPUT(NET_14) -INPUT(NET_140) -INPUT(NET_141) -INPUT(NET_142) -INPUT(NET_143) -INPUT(NET_144) -INPUT(NET_145) -INPUT(NET_146) -INPUT(NET_147) -INPUT(NET_148) -INPUT(NET_149) -INPUT(NET_15) -INPUT(NET_150) -INPUT(NET_151) -INPUT(NET_152) -INPUT(NET_153) -INPUT(NET_154) -INPUT(NET_155) -INPUT(NET_156) -INPUT(NET_157) -INPUT(NET_158) -INPUT(NET_159) -INPUT(NET_16) -INPUT(NET_160) -INPUT(NET_161) -INPUT(NET_162) -INPUT(NET_163) -INPUT(NET_164) -INPUT(NET_165) -INPUT(NET_166) -INPUT(NET_167) -INPUT(NET_168) -INPUT(NET_169) -INPUT(NET_17) -INPUT(NET_170) -INPUT(NET_171) -INPUT(NET_172) -INPUT(NET_173) -INPUT(NET_174) -INPUT(NET_175) -INPUT(NET_176) -INPUT(NET_177) -INPUT(NET_178) -INPUT(NET_179) -INPUT(NET_18) -INPUT(NET_180) -INPUT(NET_181) -INPUT(NET_182) -INPUT(NET_183) -INPUT(NET_184) -INPUT(NET_185) -INPUT(NET_186) -INPUT(NET_187) -INPUT(NET_188) -INPUT(NET_189) -INPUT(NET_19) -INPUT(NET_190) -INPUT(NET_191) -INPUT(NET_192) -INPUT(NET_193) -INPUT(NET_194) -INPUT(NET_195) -INPUT(NET_196) -INPUT(NET_197) -INPUT(NET_198) -INPUT(NET_199) -INPUT(NET_2) -INPUT(NET_20) -INPUT(NET_200) -INPUT(NET_201) -INPUT(NET_202) -INPUT(NET_203) -INPUT(NET_204) -INPUT(NET_205) -INPUT(NET_206) -INPUT(NET_207) -INPUT(NET_208) -INPUT(NET_209) -INPUT(NET_21) -INPUT(NET_210) -INPUT(NET_211) -INPUT(NET_212) -INPUT(NET_213) -INPUT(NET_214) -INPUT(NET_215) -INPUT(NET_216) -INPUT(NET_217) -INPUT(NET_218) -INPUT(NET_219) -INPUT(NET_22) -INPUT(NET_220) -INPUT(NET_221) -INPUT(NET_222) -INPUT(NET_223) -INPUT(NET_224) -INPUT(NET_225) -INPUT(NET_226) -INPUT(NET_227) -INPUT(NET_228) -INPUT(NET_229) -INPUT(NET_23) -INPUT(NET_230) -INPUT(NET_231) -INPUT(NET_232) -INPUT(NET_233) -INPUT(NET_234) -INPUT(NET_235) -INPUT(NET_236) -INPUT(NET_237) -INPUT(NET_238) -INPUT(NET_239) -INPUT(NET_24) -INPUT(NET_240) -INPUT(NET_241) -INPUT(NET_242) -INPUT(NET_243) -INPUT(NET_244) -INPUT(NET_245) -INPUT(NET_246) -INPUT(NET_247) -INPUT(NET_248) -INPUT(NET_249) -INPUT(NET_25) -INPUT(NET_250) -INPUT(NET_251) -INPUT(NET_252) -INPUT(NET_253) -INPUT(NET_254) -INPUT(NET_255) -INPUT(NET_256) -INPUT(NET_257) -INPUT(NET_258) -INPUT(NET_259) -INPUT(NET_26) -INPUT(NET_260) -INPUT(NET_261) -INPUT(NET_262) -INPUT(NET_263) -INPUT(NET_264) -INPUT(NET_265) -INPUT(NET_266) -INPUT(NET_267) -INPUT(NET_268) -INPUT(NET_269) -INPUT(NET_27) -INPUT(NET_270) -INPUT(NET_271) -INPUT(NET_272) -INPUT(NET_273) -INPUT(NET_274) -INPUT(NET_275) -INPUT(NET_276) -INPUT(NET_277) -INPUT(NET_278) -INPUT(NET_279) -INPUT(NET_28) -INPUT(NET_280) -INPUT(NET_281) -INPUT(NET_282) -INPUT(NET_283) -INPUT(NET_284) -INPUT(NET_285) -INPUT(NET_286) -INPUT(NET_287) -INPUT(NET_288) -INPUT(NET_289) -INPUT(NET_29) -INPUT(NET_290) -INPUT(NET_291) -INPUT(NET_292) -INPUT(NET_293) -INPUT(NET_294) -INPUT(NET_295) -INPUT(NET_296) -INPUT(NET_297) -INPUT(NET_298) -INPUT(NET_299) -INPUT(NET_3) -INPUT(NET_30) -INPUT(NET_300) -INPUT(NET_301) -INPUT(NET_302) -INPUT(NET_303) -INPUT(NET_304) -INPUT(NET_305) -INPUT(NET_306) -INPUT(NET_307) -INPUT(NET_308) -INPUT(NET_309) -INPUT(NET_31) -INPUT(NET_310) -INPUT(NET_311) -INPUT(NET_312) -INPUT(NET_313) -INPUT(NET_314) -INPUT(NET_315) -INPUT(NET_316) -INPUT(NET_317) -INPUT(NET_318) -INPUT(NET_319) -INPUT(NET_32) -INPUT(NET_320) -INPUT(NET_321) -INPUT(NET_322) -INPUT(NET_323) -INPUT(NET_324) -INPUT(NET_325) -INPUT(NET_326) -INPUT(NET_327) -INPUT(NET_328) -INPUT(NET_329) -INPUT(NET_33) -INPUT(NET_330) -INPUT(NET_331) -INPUT(NET_332) -INPUT(NET_333) -INPUT(NET_334) -INPUT(NET_335) -INPUT(NET_336) -INPUT(NET_337) -INPUT(NET_338) -INPUT(NET_339) -INPUT(NET_34) -INPUT(NET_340) -INPUT(NET_341) -INPUT(NET_342) -INPUT(NET_343) -INPUT(NET_344) -INPUT(NET_345) -INPUT(NET_346) -INPUT(NET_347) -INPUT(NET_348) -INPUT(NET_349) -INPUT(NET_35) -INPUT(NET_350) -INPUT(NET_351) -INPUT(NET_352) -INPUT(NET_353) -INPUT(NET_354) -INPUT(NET_355) -INPUT(NET_356) -INPUT(NET_357) -INPUT(NET_358) -INPUT(NET_359) -INPUT(NET_36) -INPUT(NET_360) -INPUT(NET_361) -INPUT(NET_362) -INPUT(NET_363) -INPUT(NET_364) -INPUT(NET_365) -INPUT(NET_366) -INPUT(NET_367) -INPUT(NET_368) -INPUT(NET_369) -INPUT(NET_37) -INPUT(NET_370) -INPUT(NET_371) -INPUT(NET_372) -INPUT(NET_373) -INPUT(NET_374) -INPUT(NET_375) -INPUT(NET_376) -INPUT(NET_377) -INPUT(NET_378) -INPUT(NET_379) -INPUT(NET_38) -INPUT(NET_380) -INPUT(NET_381) -INPUT(NET_382) -INPUT(NET_383) -INPUT(NET_384) -INPUT(NET_385) -INPUT(NET_386) -INPUT(NET_387) -INPUT(NET_388) -INPUT(NET_389) -INPUT(NET_39) -INPUT(NET_390) -INPUT(NET_391) -INPUT(NET_392) -INPUT(NET_393) -INPUT(NET_394) -INPUT(NET_395) -INPUT(NET_396) -INPUT(NET_397) -INPUT(NET_398) -INPUT(NET_399) -INPUT(NET_4) -INPUT(NET_40) -INPUT(NET_400) -INPUT(NET_401) -INPUT(NET_402) -INPUT(NET_403) -INPUT(NET_404) -INPUT(NET_405) -INPUT(NET_406) -INPUT(NET_407) -INPUT(NET_408) -INPUT(NET_409) -INPUT(NET_41) -INPUT(NET_410) -INPUT(NET_411) -INPUT(NET_412) -INPUT(NET_413) -INPUT(NET_414) -INPUT(NET_415) -INPUT(NET_416) -INPUT(NET_417) -INPUT(NET_418) -INPUT(NET_419) -INPUT(NET_42) -INPUT(NET_420) -INPUT(NET_421) -INPUT(NET_422) -INPUT(NET_423) -INPUT(NET_424) -INPUT(NET_425) -INPUT(NET_426) -INPUT(NET_427) -INPUT(NET_428) -INPUT(NET_429) -INPUT(NET_43) -INPUT(NET_430) -INPUT(NET_431) -INPUT(NET_432) -INPUT(NET_433) -INPUT(NET_434) -INPUT(NET_435) -INPUT(NET_436) -INPUT(NET_437) -INPUT(NET_438) -INPUT(NET_439) -INPUT(NET_44) -INPUT(NET_440) -INPUT(NET_441) -INPUT(NET_442) -INPUT(NET_443) -INPUT(NET_444) -INPUT(NET_445) -INPUT(NET_446) -INPUT(NET_447) -INPUT(NET_448) -INPUT(NET_449) -INPUT(NET_45) -INPUT(NET_450) -INPUT(NET_451) -INPUT(NET_452) -INPUT(NET_453) -INPUT(NET_454) -INPUT(NET_455) -INPUT(NET_456) -INPUT(NET_457) -INPUT(NET_458) -INPUT(NET_459) -INPUT(NET_46) -INPUT(NET_460) -INPUT(NET_461) -INPUT(NET_462) -INPUT(NET_463) -INPUT(NET_464) -INPUT(NET_465) -INPUT(NET_466) -INPUT(NET_467) -INPUT(NET_468) -INPUT(NET_469) -INPUT(NET_47) -INPUT(NET_470) -INPUT(NET_471) -INPUT(NET_472) -INPUT(NET_473) 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-OUTPUT(NET_5783) -OUTPUT(NET_5784) -OUTPUT(NET_5785) -OUTPUT(NET_5786) -OUTPUT(NET_5787) -OUTPUT(NET_5788) -OUTPUT(NET_5789) -OUTPUT(NET_5790) -OUTPUT(NET_5791) -OUTPUT(NET_5792) -OUTPUT(NET_5793) -OUTPUT(NET_5794) -OUTPUT(NET_5795) -OUTPUT(NET_5796) -OUTPUT(NET_5797) -OUTPUT(NET_5798) -OUTPUT(NET_5799) -OUTPUT(NET_5800) -OUTPUT(NET_5801) -OUTPUT(NET_5802) -OUTPUT(NET_5803) -OUTPUT(NET_5833) -OUTPUT(NET_5834) -OUTPUT(NET_5835) -OUTPUT(NET_5836) -OUTPUT(NET_5837) -OUTPUT(NET_5838) -OUTPUT(NET_5839) -OUTPUT(NET_5840) -OUTPUT(NET_5841) -OUTPUT(NET_5842) -OUTPUT(NET_5843) -OUTPUT(NET_5844) -OUTPUT(NET_5845) -OUTPUT(NET_5846) -OUTPUT(NET_5847) -OUTPUT(NET_5848) -OUTPUT(NET_5849) -OUTPUT(NET_5850) -OUTPUT(NET_5851) -OUTPUT(NET_5852) -OUTPUT(NET_5853) -OUTPUT(NET_5854) -OUTPUT(NET_5855) -OUTPUT(NET_5856) -OUTPUT(NET_5857) -OUTPUT(NET_5858) -OUTPUT(NET_5859) -OUTPUT(NET_5860) -OUTPUT(NET_5861) -OUTPUT(NET_5862) -OUTPUT(NET_5863) -OUTPUT(NET_5864) -OUTPUT(NET_5898) -OUTPUT(NET_5905) -OUTPUT(NET_5906) -OUTPUT(NET_6021) -OUTPUT(NET_6030) -OUTPUT(NET_6031) -OUTPUT(NET_6057) -OUTPUT(NET_6063) -OUTPUT(NET_6064) -OUTPUT(NET_6202) -OUTPUT(NET_6385) -OUTPUT(NET_6512) -OUTPUT(NET_6612) -OUTPUT(NET_6826) -OUTPUT(NET_7016) -OUTPUT(NET_7149) -OUTPUT(NET_7694) -OUTPUT(NET_7827) -OUTPUT(NET_8012) -OUTPUT(NET_8233) -OUTPUT(NET_8710) -OUTPUT(NET_8737) -OUTPUT(NET_8777) -OUTPUT(NET_9028) -OUTPUT(NET_9041) -OUTPUT(NET_9192) -OUTPUT(NET_9240) -OUTPUT(NET_9360) -OUTPUT(NET_9370) -OUTPUT(NET_9495) -OUTPUT(NET_9527) -OUTPUT(NET_9720) -OUTPUT(NET_9726) -OUTPUT(NET_9730) -OUTPUT(NET_9737) -OUTPUT(NET_9855) -OUTPUT(NET_9856) -OUTPUT(NET_9857) -OUTPUT(NET_9858) -OUTPUT(NET_9936) -OUTPUT(NET_9944) -OUTPUT(NET_9968) -OUTPUT(NET_9994) -OUTPUT(NET_9995) -OUTPUT(NET_9996) -OUTPUT(NET_9997) -OUTPUT(NET_9998) -OUTPUT(NET_9999) -new_n1525_ = NOT ( NET_683 ) -new_n1526_ = OR ( new_n1525_, NET_438, NET_276, NET_193 ) -new_n1527_ = NOT ( NET_193 ) -new_n1528_ = NOT ( NET_438 ) -new_n1529_ = OR ( NET_683, NET_521, new_n1528_, new_n1527_ ) -new_n1530_ = NAND ( new_n1529_, new_n1526_ ) -new_n1531_ = NOT ( new_n1530_ ) -new_n1532_ = NOT ( NET_16 ) -new_n1533_ = NOT ( NET_474 ) -new_n1534_ = NAND ( new_n1530_, new_n1533_ ) -new_n1535_ = OR ( new_n1530_, NET_229 ) -new_n1536_ = NAND ( new_n1535_, new_n1534_ ) -new_n1537_ = OR ( new_n1536_, new_n1532_ ) -new_n1538_ = NAND ( new_n1536_, new_n1532_ ) -new_n1539_ = NAND ( new_n1538_, new_n1537_ ) -new_n1540_ = NOT ( NET_17 ) -new_n1541_ = NOT ( NET_473 ) -new_n1542_ = NAND ( new_n1530_, new_n1541_ ) -new_n1543_ = OR ( new_n1530_, NET_228 ) -new_n1544_ = NAND ( new_n1543_, new_n1542_ ) -new_n1545_ = NOR ( new_n1544_, new_n1540_ ) -new_n1546_ = NOT ( new_n1545_ ) -new_n1547_ = NOT ( NET_18 ) -new_n1548_ = NOT ( NET_472 ) -new_n1549_ = NAND ( new_n1530_, new_n1548_ ) -new_n1550_ = OR ( new_n1530_, NET_227 ) -new_n1551_ = NAND ( new_n1550_, new_n1549_ ) -new_n1552_ = NOR ( new_n1551_, new_n1547_ ) -new_n1553_ = NOT ( new_n1552_ ) -new_n1554_ = NAND ( new_n1551_, new_n1547_ ) -new_n1555_ = NOT ( NET_21 ) -new_n1556_ = NOT ( NET_469 ) -new_n1557_ = NAND ( new_n1530_, new_n1556_ ) -new_n1558_ = OR ( new_n1530_, NET_224 ) -new_n1559_ = NAND ( new_n1558_, new_n1557_ ) -new_n1560_ = NOR ( new_n1559_, new_n1555_ ) -new_n1561_ = NOT ( new_n1560_ ) -new_n1562_ = NOT ( NET_22 ) -new_n1563_ = NOT ( NET_468 ) -new_n1564_ = NAND ( new_n1530_, new_n1563_ ) -new_n1565_ = OR ( new_n1530_, NET_223 ) -new_n1566_ = NAND ( new_n1565_, new_n1564_ ) -new_n1567_ = NOR ( new_n1566_, new_n1562_ ) -new_n1568_ = NOT ( new_n1567_ ) -new_n1569_ = NAND ( new_n1566_, new_n1562_ ) -new_n1570_ = NOT ( NET_25 ) -new_n1571_ = NOT ( NET_465 ) -new_n1572_ = NAND ( new_n1530_, new_n1571_ ) -new_n1573_ = OR ( new_n1530_, NET_220 ) -new_n1574_ = NAND ( new_n1573_, new_n1572_ ) -new_n1575_ = OR ( new_n1574_, new_n1570_ ) -new_n1576_ = NAND ( new_n1574_, new_n1570_ ) -new_n1577_ = NOT ( NET_26 ) -new_n1578_ = NOT ( NET_464 ) -new_n1579_ = NAND ( new_n1530_, new_n1578_ ) -new_n1580_ = OR ( new_n1530_, NET_219 ) -new_n1581_ = NAND ( new_n1580_, new_n1579_ ) -new_n1582_ = OR ( new_n1581_, new_n1577_ ) -new_n1583_ = NOT ( NET_28 ) -new_n1584_ = NOT ( NET_462 ) -new_n1585_ = NAND ( new_n1530_, new_n1584_ ) -new_n1586_ = OR ( new_n1530_, NET_217 ) -new_n1587_ = NAND ( new_n1586_, new_n1585_ ) -new_n1588_ = OR ( new_n1587_, new_n1583_ ) -new_n1589_ = NOT ( NET_31 ) -new_n1590_ = NOT ( NET_32 ) -new_n1591_ = NOT ( NET_458 ) -new_n1592_ = NAND ( new_n1530_, new_n1591_ ) -new_n1593_ = OR ( new_n1530_, NET_213 ) -new_n1594_ = NAND ( new_n1593_, new_n1592_ ) -new_n1595_ = OR ( new_n1594_, new_n1590_ ) -new_n1596_ = OR ( new_n1595_, new_n1589_ ) -new_n1597_ = AND ( new_n1595_, new_n1589_ ) -new_n1598_ = NOT ( NET_459 ) -new_n1599_ = NAND ( new_n1530_, new_n1598_ ) -new_n1600_ = OR ( new_n1530_, NET_214 ) -new_n1601_ = NAND ( new_n1600_, new_n1599_ ) -new_n1602_ = OR ( new_n1601_, new_n1597_ ) -new_n1603_ = NAND ( new_n1602_, new_n1596_ ) -new_n1604_ = NOT ( NET_30 ) -new_n1605_ = NOT ( NET_460 ) -new_n1606_ = NAND ( new_n1530_, new_n1605_ ) -new_n1607_ = OR ( new_n1530_, NET_215 ) -new_n1608_ = NAND ( new_n1607_, new_n1606_ ) -new_n1609_ = NAND ( new_n1608_, new_n1604_ ) -new_n1610_ = NAND ( new_n1609_, new_n1603_ ) -new_n1611_ = OR ( new_n1608_, new_n1604_ ) -new_n1612_ = NAND ( new_n1611_, new_n1610_ ) -new_n1613_ = NOT ( NET_29 ) -new_n1614_ = NOT ( NET_461 ) -new_n1615_ = NAND ( new_n1530_, new_n1614_ ) -new_n1616_ = OR ( new_n1530_, NET_216 ) -new_n1617_ = NAND ( new_n1616_, new_n1615_ ) -new_n1618_ = NAND ( new_n1617_, new_n1613_ ) -new_n1619_ = NAND ( new_n1618_, new_n1612_ ) -new_n1620_ = OR ( new_n1617_, new_n1613_ ) -new_n1621_ = NAND ( new_n1620_, new_n1619_ ) -new_n1622_ = NAND ( new_n1587_, new_n1583_ ) -new_n1623_ = NAND ( new_n1622_, new_n1621_ ) -new_n1624_ = NAND ( new_n1623_, new_n1588_ ) -new_n1625_ = NOT ( NET_27 ) -new_n1626_ = NOT ( NET_463 ) -new_n1627_ = NAND ( new_n1530_, new_n1626_ ) -new_n1628_ = OR ( new_n1530_, NET_218 ) -new_n1629_ = NAND ( new_n1628_, new_n1627_ ) -new_n1630_ = NAND ( new_n1629_, new_n1625_ ) -new_n1631_ = NAND ( new_n1630_, new_n1624_ ) -new_n1632_ = OR ( new_n1629_, new_n1625_ ) -new_n1633_ = NAND ( new_n1632_, new_n1631_ ) -new_n1634_ = NAND ( new_n1581_, new_n1577_ ) -new_n1635_ = NAND ( new_n1634_, new_n1633_ ) -new_n1636_ = NAND ( new_n1635_, new_n1582_ ) -new_n1637_ = NAND ( new_n1636_, new_n1576_ ) -new_n1638_ = NAND ( new_n1637_, new_n1575_ ) -new_n1639_ = NOT ( NET_24 ) -new_n1640_ = NOT ( NET_466 ) -new_n1641_ = NAND ( new_n1530_, new_n1640_ ) -new_n1642_ = OR ( new_n1530_, NET_221 ) -new_n1643_ = NAND ( new_n1642_, new_n1641_ ) -new_n1644_ = NAND ( new_n1643_, new_n1639_ ) -new_n1645_ = NAND ( new_n1644_, new_n1638_ ) -new_n1646_ = OR ( new_n1643_, new_n1639_ ) -new_n1647_ = NAND ( new_n1646_, new_n1645_ ) -new_n1648_ = NOT ( NET_23 ) -new_n1649_ = NOT ( NET_467 ) -new_n1650_ = NAND ( new_n1530_, new_n1649_ ) -new_n1651_ = OR ( new_n1530_, NET_222 ) -new_n1652_ = NAND ( new_n1651_, new_n1650_ ) -new_n1653_ = NAND ( new_n1652_, new_n1648_ ) -new_n1654_ = NAND ( new_n1653_, new_n1647_ ) -new_n1655_ = OR ( new_n1652_, new_n1648_ ) -new_n1656_ = NAND ( new_n1655_, new_n1654_ ) -new_n1657_ = NAND ( new_n1656_, new_n1569_ ) -new_n1658_ = AND ( new_n1657_, new_n1568_ ) -new_n1659_ = AND ( new_n1559_, new_n1555_ ) -new_n1660_ = OR ( new_n1659_, new_n1658_ ) -new_n1661_ = NAND ( new_n1660_, new_n1561_ ) -new_n1662_ = NOT ( NET_20 ) -new_n1663_ = NOT ( NET_470 ) -new_n1664_ = NAND ( new_n1530_, new_n1663_ ) -new_n1665_ = OR ( new_n1530_, NET_225 ) -new_n1666_ = NAND ( new_n1665_, new_n1664_ ) -new_n1667_ = NAND ( new_n1666_, new_n1662_ ) -new_n1668_ = NAND ( new_n1667_, new_n1661_ ) -new_n1669_ = OR ( new_n1666_, new_n1662_ ) -new_n1670_ = NAND ( new_n1669_, new_n1668_ ) -new_n1671_ = NOT ( NET_19 ) -new_n1672_ = NOT ( NET_471 ) -new_n1673_ = NAND ( new_n1530_, new_n1672_ ) -new_n1674_ = OR ( new_n1530_, NET_226 ) -new_n1675_ = NAND ( new_n1674_, new_n1673_ ) -new_n1676_ = NAND ( new_n1675_, new_n1671_ ) -new_n1677_ = NAND ( new_n1676_, new_n1670_ ) -new_n1678_ = OR ( new_n1675_, new_n1671_ ) -new_n1679_ = NAND ( new_n1678_, new_n1677_ ) -new_n1680_ = NAND ( new_n1679_, new_n1554_ ) -new_n1681_ = AND ( new_n1680_, new_n1553_ ) -new_n1682_ = AND ( new_n1544_, new_n1540_ ) -new_n1683_ = OR ( new_n1682_, new_n1681_ ) -new_n1684_ = NAND ( new_n1683_, new_n1546_ ) -new_n1685_ = XNOR ( new_n1684_, new_n1539_ ) -new_n1686_ = OR ( new_n1685_, new_n1531_ ) -new_n1687_ = OR ( new_n1530_, NET_474 ) -new_n1688_ = NAND ( new_n1687_, new_n1686_ ) -new_n1689_ = OR ( new_n1688_, NET_275 ) -new_n1690_ = NOT ( NET_49 ) -NET_35973 = NOT ( NET_275 ) -new_n1692_ = OR ( NET_64, NET_35973 ) -new_n1693_ = OR ( new_n1692_, new_n1690_ ) -new_n1694_ = NOT ( NET_64 ) -new_n1695_ = NOR ( new_n1694_, NET_35973 ) -new_n1696_ = NOT ( new_n1695_ ) -new_n1697_ = NOT ( NET_37 ) -new_n1698_ = NOT ( NET_40 ) -new_n1699_ = NOR ( NET_36, NET_35, NET_34, NET_33 ) -new_n1700_ = NOR ( NET_39, NET_38 ) -new_n1701_ = NAND ( new_n1700_, new_n1699_, new_n1698_, new_n1697_ ) -new_n1702_ = OR ( NET_43, NET_42 ) -new_n1703_ = OR ( new_n1702_, new_n1701_, NET_44, NET_41 ) -new_n1704_ = NOR ( NET_47, NET_46 ) -new_n1705_ = NOT ( new_n1704_ ) -new_n1706_ = OR ( new_n1705_, new_n1703_, NET_48, NET_45 ) -new_n1707_ = XOR ( new_n1706_, new_n1690_ ) -new_n1708_ = OR ( new_n1707_, new_n1696_ ) -NET_10069 = NAND ( new_n1708_, new_n1693_, new_n1689_ ) -new_n1710_ = NOT ( NET_52 ) -new_n1711_ = NOR ( NET_64, new_n1710_ ) -new_n1712_ = NOR ( new_n1706_, NET_49 ) -new_n1713_ = NOR ( NET_51, NET_50 ) -new_n1714_ = NAND ( new_n1713_, new_n1712_ ) -new_n1715_ = XOR ( new_n1714_, new_n1710_ ) -new_n1716_ = NOR ( new_n1715_, new_n1694_ ) -new_n1717_ = NOR ( new_n1716_, new_n1711_ ) -new_n1718_ = NOT ( NET_54 ) -new_n1719_ = OR ( NET_64, new_n1718_ ) -new_n1720_ = NOT ( new_n1713_ ) -new_n1721_ = OR ( new_n1720_, new_n1706_, NET_52, NET_49 ) -new_n1722_ = OR ( new_n1721_, NET_53 ) -new_n1723_ = XOR ( new_n1722_, new_n1718_ ) -new_n1724_ = OR ( new_n1723_, new_n1694_ ) -new_n1725_ = NAND ( new_n1724_, new_n1719_ ) -new_n1726_ = NOT ( new_n1725_ ) -new_n1727_ = OR ( new_n1726_, new_n1717_ ) -new_n1728_ = NOT ( new_n1717_ ) -new_n1729_ = NOT ( NET_55 ) -new_n1730_ = OR ( NET_64, new_n1729_ ) -new_n1731_ = OR ( new_n1722_, NET_54 ) -new_n1732_ = NAND ( new_n1731_, NET_55 ) -new_n1733_ = NOT ( NET_53 ) -new_n1734_ = NOR ( new_n1720_, new_n1706_, NET_52, NET_49 ) -new_n1735_ = NOR ( NET_55, NET_54 ) -new_n1736_ = NAND ( new_n1735_, new_n1734_, new_n1733_ ) -new_n1737_ = NAND ( new_n1736_, new_n1732_ ) -new_n1738_ = OR ( new_n1737_, new_n1694_ ) -new_n1739_ = AND ( new_n1738_, new_n1730_ ) -new_n1740_ = NOR ( new_n1739_, new_n1728_ ) -new_n1741_ = NOR ( NET_64, new_n1733_ ) -new_n1742_ = XOR ( new_n1721_, new_n1733_ ) -new_n1743_ = NOR ( new_n1742_, new_n1694_ ) -new_n1744_ = NOR ( new_n1743_, new_n1741_ ) -new_n1745_ = NAND ( new_n1744_, new_n1740_ ) -new_n1746_ = OR ( new_n1745_, new_n1725_ ) -new_n1747_ = NOT ( new_n1739_ ) -new_n1748_ = NOT ( new_n1744_ ) -new_n1749_ = NOR ( new_n1748_, new_n1728_ ) -new_n1750_ = NAND ( new_n1749_, new_n1725_ ) -new_n1751_ = OR ( new_n1750_, new_n1747_ ) -new_n1752_ = AND ( new_n1751_, new_n1746_ ) -new_n1753_ = AND ( new_n1748_, new_n1740_ ) -new_n1754_ = NOT ( new_n1753_ ) -new_n1755_ = NOR ( new_n1744_, new_n1726_ ) -new_n1756_ = NOT ( new_n1755_ ) -new_n1757_ = AND ( new_n1756_, new_n1754_, new_n1752_ ) -new_n1758_ = NAND ( new_n1757_, new_n1727_ ) -new_n1759_ = OR ( NET_64, NET_59 ) -new_n1760_ = NOT ( NET_56 ) -new_n1761_ = NAND ( new_n1735_, new_n1734_, new_n1760_, new_n1733_ ) -new_n1762_ = OR ( new_n1761_, NET_57 ) -new_n1763_ = OR ( new_n1762_, NET_59, NET_58 ) -new_n1764_ = OR ( new_n1761_, NET_58, NET_57 ) -new_n1765_ = NAND ( new_n1764_, NET_59 ) -new_n1766_ = NAND ( new_n1765_, new_n1763_ ) -new_n1767_ = NAND ( new_n1766_, NET_64 ) -new_n1768_ = NAND ( new_n1767_, new_n1759_ ) -new_n1769_ = NOT ( NET_58 ) -new_n1770_ = NOR ( NET_64, new_n1769_ ) -new_n1771_ = XOR ( new_n1762_, new_n1769_ ) -new_n1772_ = NOR ( new_n1771_, new_n1694_ ) -new_n1773_ = NOR ( new_n1772_, new_n1770_ ) -new_n1774_ = NOR ( NET_64, NET_57 ) -new_n1775_ = XOR ( new_n1761_, NET_57 ) -new_n1776_ = NOR ( new_n1775_, new_n1694_ ) -new_n1777_ = NOR ( new_n1776_, new_n1774_ ) -new_n1778_ = NOT ( NET_245 ) -new_n1779_ = NOR ( new_n1777_, new_n1778_ ) -new_n1780_ = NOR ( new_n1772_, new_n1770_, NET_245 ) -new_n1781_ = NAND ( new_n1773_, new_n1768_ ) -new_n1782_ = NOT ( NET_66 ) -new_n1783_ = AND ( new_n1767_, new_n1759_ ) -new_n1784_ = NAND ( new_n1779_, new_n1773_, new_n1767_, new_n1759_ ) -new_n1785_ = NAND ( new_n1780_, new_n1777_, new_n1767_, new_n1759_ ) -new_n1786_ = NAND ( new_n1785_, new_n1784_, new_n1783_, new_n1782_ ) -new_n1787_ = NAND ( new_n1786_, new_n1781_ ) -new_n1788_ = NAND ( new_n1773_, new_n1767_, new_n1759_ ) -new_n1789_ = NOT ( new_n1777_ ) -new_n1790_ = NAND ( new_n1789_, new_n1788_, new_n1768_ ) -new_n1791_ = NOT ( NET_65 ) -new_n1792_ = NAND ( new_n1785_, new_n1784_, new_n1783_, new_n1791_ ) -new_n1793_ = AND ( new_n1792_, new_n1790_ ) -new_n1794_ = NOR ( new_n1793_, new_n1787_ ) -new_n1795_ = NOR ( new_n1739_, new_n1726_ ) -new_n1796_ = NOT ( new_n1795_ ) -new_n1797_ = OR ( new_n1796_, new_n1749_ ) -new_n1798_ = NAND ( new_n1785_, new_n1784_, new_n1783_ ) -new_n1799_ = NOT ( NET_82 ) -new_n1800_ = NOT ( NET_83 ) -new_n1801_ = NOR ( NET_89, NET_88, NET_87, NET_86 ) -new_n1802_ = NOR ( NET_85, NET_84 ) -new_n1803_ = NAND ( new_n1802_, new_n1801_, new_n1800_, new_n1799_ ) -new_n1804_ = NOT ( NET_94 ) -new_n1805_ = NOT ( NET_95 ) -new_n1806_ = NOT ( NET_96 ) -new_n1807_ = NOR ( NET_93, NET_92, NET_91, NET_90 ) -new_n1808_ = NAND ( new_n1807_, new_n1806_, new_n1805_, new_n1804_ ) -new_n1809_ = NOT ( NET_70 ) -new_n1810_ = NOT ( NET_71 ) -new_n1811_ = NOT ( NET_72 ) -new_n1812_ = NOT ( NET_73 ) -new_n1813_ = NAND ( new_n1812_, new_n1811_, new_n1810_, new_n1809_ ) -new_n1814_ = OR ( new_n1813_, NET_69, NET_68 ) -new_n1815_ = NOT ( NET_74 ) -new_n1816_ = NOT ( NET_75 ) -new_n1817_ = NOR ( NET_81, NET_80, NET_79, NET_78 ) -new_n1818_ = NOR ( NET_77, NET_76 ) -new_n1819_ = NAND ( new_n1818_, new_n1817_, new_n1816_, new_n1815_ ) -new_n1820_ = NOR ( new_n1819_, new_n1814_, new_n1808_, new_n1803_ ) -new_n1821_ = NOR ( new_n1820_, new_n1798_ ) -new_n1822_ = NOT ( NET_67 ) -new_n1823_ = NOR ( new_n1798_, new_n1822_ ) -new_n1824_ = NOR ( new_n1823_, new_n1821_ ) -new_n1825_ = NAND ( new_n1824_, new_n1797_, new_n1794_ ) -new_n1826_ = NAND ( new_n1739_, new_n1726_, new_n1728_ ) -new_n1827_ = NOR ( new_n1826_, new_n1748_ ) -new_n1828_ = NOT ( new_n1827_ ) -new_n1829_ = NAND ( new_n1828_, new_n1825_ ) -new_n1830_ = OR ( NET_64, NET_56 ) -new_n1831_ = XOR ( new_n1736_, NET_56 ) -new_n1832_ = OR ( new_n1831_, new_n1694_ ) -new_n1833_ = NAND ( new_n1832_, new_n1830_ ) -new_n1834_ = NAND ( new_n1777_, new_n1783_ ) -new_n1835_ = OR ( new_n1834_, new_n1773_ ) -new_n1836_ = NAND ( new_n1835_, new_n1833_ ) -new_n1837_ = NOR ( new_n1836_, NET_35973 ) -new_n1838_ = NAND ( new_n1837_, new_n1829_ ) -new_n1839_ = NOT ( new_n1838_ ) -new_n1840_ = NAND ( new_n1839_, new_n1758_ ) -new_n1841_ = NOT ( new_n1833_ ) -new_n1842_ = AND ( new_n1835_, new_n1833_, new_n1755_ ) -new_n1843_ = NOR ( new_n1842_, new_n1841_ ) -new_n1844_ = NOT ( new_n1843_ ) -new_n1845_ = NOR ( new_n1834_, new_n1773_ ) -new_n1846_ = NOR ( new_n1748_, new_n1717_ ) -new_n1847_ = NAND ( new_n1846_, new_n1793_, new_n1787_ ) -new_n1848_ = AND ( new_n1786_, new_n1781_ ) -new_n1849_ = NAND ( new_n1792_, new_n1790_ ) -new_n1850_ = NAND ( new_n1846_, new_n1849_, new_n1848_ ) -new_n1851_ = NAND ( new_n1846_, new_n1849_, new_n1787_ ) -new_n1852_ = AND ( new_n1851_, new_n1850_, new_n1847_ ) -new_n1853_ = NOR ( new_n1852_, new_n1845_, new_n1726_ ) -new_n1854_ = NOR ( new_n1849_, new_n1787_ ) -new_n1855_ = NAND ( new_n1835_, new_n1753_, new_n1726_ ) -new_n1856_ = OR ( new_n1855_, new_n1854_ ) -new_n1857_ = OR ( new_n1845_, new_n1750_ ) -new_n1858_ = OR ( new_n1857_, new_n1854_ ) -new_n1859_ = NOR ( new_n1849_, new_n1848_ ) -new_n1860_ = NOR ( new_n1845_, new_n1745_ ) -new_n1861_ = NAND ( new_n1860_, new_n1859_ ) -new_n1862_ = NAND ( new_n1860_, new_n1794_ ) -new_n1863_ = NAND ( new_n1862_, new_n1861_, new_n1858_, new_n1856_ ) -new_n1864_ = NAND ( new_n1854_, new_n1846_, new_n1835_, new_n1725_ ) -new_n1865_ = OR ( new_n1849_, new_n1787_ ) -new_n1866_ = OR ( new_n1857_, new_n1865_ ) -new_n1867_ = OR ( new_n1855_, new_n1865_ ) -new_n1868_ = NAND ( new_n1860_, new_n1854_ ) -new_n1869_ = NAND ( new_n1868_, new_n1867_, new_n1866_, new_n1864_ ) -new_n1870_ = OR ( new_n1869_, new_n1863_, new_n1853_ ) -new_n1871_ = NAND ( new_n1694_, NET_63, NET_62 ) -new_n1872_ = NOT ( NET_63 ) -new_n1873_ = OR ( new_n1763_, NET_60 ) -new_n1874_ = OR ( new_n1873_, NET_62, NET_61 ) -new_n1875_ = OR ( new_n1873_, NET_61 ) -new_n1876_ = NAND ( new_n1875_, NET_62 ) -new_n1877_ = NAND ( new_n1876_, new_n1874_, NET_64, new_n1872_ ) -new_n1878_ = NAND ( new_n1877_, new_n1871_ ) -new_n1879_ = NAND ( new_n1878_, NET_255 ) -new_n1880_ = NOT ( NET_161 ) -new_n1881_ = NOR ( new_n1872_, NET_62 ) -new_n1882_ = OR ( new_n1881_, NET_64 ) -new_n1883_ = NAND ( new_n1876_, new_n1874_ ) -new_n1884_ = XOR ( new_n1874_, NET_63 ) -new_n1885_ = NAND ( new_n1884_, new_n1883_ ) -new_n1886_ = NAND ( new_n1885_, NET_64 ) -new_n1887_ = NAND ( new_n1886_, new_n1882_ ) -new_n1888_ = OR ( new_n1887_, new_n1880_ ) -new_n1889_ = NOT ( NET_129 ) -new_n1890_ = NOT ( NET_62 ) -new_n1891_ = NOR ( NET_63, new_n1890_ ) -new_n1892_ = OR ( new_n1891_, NET_64 ) -new_n1893_ = OR ( new_n1884_, new_n1883_ ) -new_n1894_ = NAND ( new_n1893_, NET_64 ) -new_n1895_ = NAND ( new_n1894_, new_n1892_ ) -new_n1896_ = OR ( new_n1895_, new_n1889_ ) -new_n1897_ = NOR ( NET_63, NET_62 ) -new_n1898_ = OR ( new_n1897_, NET_64 ) -new_n1899_ = NOT ( new_n1884_ ) -new_n1900_ = NAND ( new_n1899_, new_n1883_ ) -new_n1901_ = NAND ( new_n1900_, NET_64 ) -new_n1902_ = NAND ( new_n1901_, new_n1898_, NET_97 ) -new_n1903_ = NAND ( new_n1902_, new_n1896_, new_n1888_, new_n1879_ ) -new_n1904_ = NAND ( new_n1903_, new_n1870_ ) -new_n1905_ = NAND ( new_n1594_, new_n1590_ ) -new_n1906_ = AND ( new_n1905_, new_n1595_ ) -new_n1907_ = OR ( new_n1906_, new_n1531_ ) -new_n1908_ = OR ( new_n1530_, NET_458 ) -new_n1909_ = NAND ( new_n1908_, new_n1907_ ) -new_n1910_ = NOT ( NET_60 ) -new_n1911_ = OR ( NET_64, new_n1910_ ) -new_n1912_ = XOR ( new_n1763_, new_n1910_ ) -new_n1913_ = OR ( new_n1912_, new_n1694_ ) -new_n1914_ = NAND ( new_n1913_, new_n1911_ ) -new_n1915_ = NOT ( new_n1914_ ) -new_n1916_ = NOT ( NET_61 ) -new_n1917_ = OR ( NET_64, new_n1916_ ) -new_n1918_ = XOR ( new_n1873_, new_n1916_ ) -new_n1919_ = OR ( new_n1918_, new_n1694_ ) -new_n1920_ = AND ( new_n1919_, new_n1917_ ) -new_n1921_ = NAND ( new_n1920_, new_n1915_ ) -new_n1922_ = NAND ( new_n1921_, new_n1909_ ) -new_n1923_ = NOT ( NET_33 ) -new_n1924_ = NOR ( NET_64, new_n1923_ ) -new_n1925_ = NOR ( new_n1694_, new_n1923_ ) -new_n1926_ = NOR ( new_n1925_, new_n1924_ ) -new_n1927_ = NOT ( new_n1926_ ) -new_n1928_ = OR ( new_n1927_, new_n1921_ ) -new_n1929_ = AND ( new_n1928_, new_n1922_ ) -new_n1930_ = OR ( new_n1836_, new_n1756_ ) -new_n1931_ = NAND ( new_n1793_, new_n1787_, new_n1717_ ) -new_n1932_ = NAND ( new_n1849_, new_n1787_, new_n1717_ ) -new_n1933_ = NAND ( new_n1849_, new_n1848_, new_n1717_ ) -new_n1934_ = AND ( new_n1933_, new_n1932_, new_n1931_ ) -new_n1935_ = NOR ( new_n1934_, new_n1930_ ) -new_n1936_ = NAND ( new_n1854_, new_n1842_, new_n1717_ ) -new_n1937_ = NAND ( new_n1865_, new_n1842_, new_n1728_ ) -new_n1938_ = NOR ( new_n1793_, new_n1848_ ) -new_n1939_ = NAND ( new_n1860_, new_n1938_ ) -new_n1940_ = NAND ( new_n1854_, new_n1842_, new_n1728_ ) -new_n1941_ = NAND ( new_n1940_, new_n1939_, new_n1937_, new_n1936_ ) -new_n1942_ = OR ( new_n1941_, new_n1935_ ) -new_n1943_ = NAND ( new_n1942_, new_n1929_ ) -new_n1944_ = OR ( new_n1914_, NET_129 ) -new_n1945_ = NAND ( new_n1914_, new_n1880_ ) -new_n1946_ = NAND ( new_n1945_, new_n1944_ ) -new_n1947_ = OR ( new_n1835_, new_n1841_ ) -new_n1948_ = OR ( new_n1947_, new_n1946_ ) -new_n1949_ = NOR ( new_n1747_, new_n1726_ ) -new_n1950_ = NOR ( new_n1949_, new_n1740_ ) -new_n1951_ = NAND ( new_n1950_, new_n1915_, new_n1835_ ) -new_n1952_ = NAND ( new_n1950_, new_n1914_, new_n1835_ ) -new_n1953_ = NAND ( new_n1952_, new_n1951_ ) -new_n1954_ = NAND ( new_n1953_, new_n1927_ ) -new_n1955_ = NAND ( new_n1954_, new_n1948_, new_n1943_, new_n1904_ ) -new_n1956_ = NAND ( new_n1955_, new_n1843_ ) -new_n1957_ = OR ( new_n1955_, new_n1843_ ) -new_n1958_ = NAND ( new_n1957_, new_n1956_ ) -new_n1959_ = NAND ( new_n1929_, new_n1870_ ) -new_n1960_ = OR ( new_n1941_, new_n1935_, new_n1841_ ) -new_n1961_ = NAND ( new_n1960_, new_n1903_ ) -new_n1962_ = OR ( new_n1947_, new_n1926_ ) -new_n1963_ = OR ( new_n1952_, new_n1880_ ) -new_n1964_ = OR ( new_n1951_, new_n1889_ ) -new_n1965_ = AND ( new_n1964_, new_n1963_, new_n1962_ ) -new_n1966_ = NAND ( new_n1965_, new_n1961_, new_n1959_ ) -new_n1967_ = XNOR ( new_n1966_, new_n1958_ ) -new_n1968_ = XOR ( new_n1967_, new_n1844_ ) -new_n1969_ = NOR ( new_n1968_, new_n1840_ ) -new_n1970_ = NOR ( new_n1747_, new_n1728_ ) -new_n1971_ = NAND ( new_n1970_, new_n1726_ ) -new_n1972_ = OR ( new_n1971_, new_n1748_ ) -new_n1973_ = OR ( new_n1739_, new_n1717_ ) -new_n1974_ = NAND ( new_n1973_, new_n1972_ ) -new_n1975_ = NAND ( new_n1974_, new_n1839_ ) -new_n1976_ = NAND ( new_n1744_, new_n1726_, new_n1717_ ) -new_n1977_ = AND ( new_n1976_, new_n1903_ ) -new_n1978_ = NAND ( new_n1748_, new_n1725_, new_n1728_ ) -new_n1979_ = NAND ( new_n1978_, new_n1929_ ) -new_n1980_ = OR ( new_n1979_, new_n1977_ ) -new_n1981_ = NAND ( new_n1979_, new_n1977_ ) -new_n1982_ = AND ( new_n1981_, new_n1980_ ) -new_n1983_ = NOR ( new_n1982_, new_n1975_ ) -new_n1984_ = NOT ( new_n1929_ ) -new_n1985_ = OR ( new_n1971_, new_n1744_ ) -new_n1986_ = NAND ( new_n1748_, new_n1739_, new_n1728_ ) -new_n1987_ = OR ( new_n1986_, new_n1725_ ) -new_n1988_ = NAND ( new_n1987_, new_n1985_ ) -new_n1989_ = NAND ( new_n1988_, new_n1839_ ) -new_n1990_ = OR ( new_n1989_, new_n1984_ ) -new_n1991_ = NOT ( new_n1920_ ) -new_n1992_ = NOR ( new_n1991_, new_n1796_ ) -new_n1993_ = NOT ( new_n1992_ ) -new_n1994_ = NOR ( new_n1993_, new_n1838_ ) -new_n1995_ = NAND ( new_n1878_, NET_265 ) -new_n1996_ = NOT ( NET_162 ) -new_n1997_ = OR ( new_n1887_, new_n1996_ ) -new_n1998_ = NOT ( NET_130 ) -new_n1999_ = OR ( new_n1895_, new_n1998_ ) -new_n2000_ = NAND ( new_n1901_, new_n1898_, NET_98 ) -new_n2001_ = NAND ( new_n2000_, new_n1999_, new_n1997_, new_n1995_ ) -new_n2002_ = NAND ( new_n2001_, new_n1994_ ) -new_n2003_ = NAND ( new_n1838_, NET_161 ) -new_n2004_ = NOT ( new_n1837_ ) -new_n2005_ = NOR ( new_n2004_, new_n1828_ ) -new_n2006_ = NAND ( new_n2005_, NET_255 ) -new_n2007_ = NAND ( new_n2006_, new_n2003_, new_n2002_, new_n1990_ ) -NET_10070 = OR ( new_n2007_, new_n1983_, new_n1969_ ) -new_n2009_ = NAND ( new_n1854_, new_n1824_ ) -new_n2010_ = NOT ( new_n2009_ ) -new_n2011_ = NAND ( new_n1753_, new_n1726_ ) -new_n2012_ = NAND ( new_n1846_, new_n1725_ ) -new_n2013_ = OR ( new_n2012_, new_n1747_ ) -new_n2014_ = NAND ( new_n1755_, new_n1739_ ) -new_n2015_ = NAND ( new_n2014_, new_n2013_, new_n2011_, new_n1752_ ) -new_n2016_ = NAND ( new_n2015_, new_n2010_, new_n1837_ ) -new_n2017_ = NOR ( new_n2016_, new_n1968_ ) -new_n2018_ = OR ( new_n1973_, new_n1725_ ) -new_n2019_ = NAND ( new_n2018_, new_n1972_ ) -new_n2020_ = NAND ( new_n2019_, new_n2010_, new_n1837_ ) -new_n2021_ = NOR ( new_n2020_, new_n1982_ ) -new_n2022_ = NOR ( new_n1750_, new_n1739_ ) -new_n2023_ = NOT ( new_n2022_ ) -new_n2024_ = NOR ( new_n2023_, new_n1841_ ) -new_n2025_ = NAND ( new_n2024_, new_n1835_, NET_275 ) -new_n2026_ = NAND ( new_n1988_, new_n1837_ ) -new_n2027_ = NAND ( new_n2026_, new_n2025_ ) -new_n2028_ = NAND ( new_n2027_, new_n2009_ ) -new_n2029_ = NOR ( new_n2019_, new_n2015_ ) -new_n2030_ = OR ( new_n2029_, new_n2010_ ) -new_n2031_ = NAND ( new_n2030_, new_n1797_ ) -new_n2032_ = AND ( new_n2031_, new_n1837_ ) -new_n2033_ = NOR ( new_n1833_, NET_35973 ) -NET_35975 = NOR ( new_n1947_, NET_35973 ) -new_n2035_ = NOR ( NET_35975, new_n2033_, new_n2032_ ) -new_n2036_ = NAND ( new_n2035_, new_n2028_ ) -new_n2037_ = NAND ( new_n2036_, NET_255 ) -new_n2038_ = NOR ( new_n2026_, new_n2009_ ) -new_n2039_ = NOR ( new_n2038_, new_n2005_ ) -new_n2040_ = OR ( new_n2039_, new_n1984_ ) -new_n2041_ = NAND ( NET_35973, NET_255 ) -new_n2042_ = NOT ( new_n2025_ ) -new_n2043_ = NOR ( new_n2009_, new_n1991_ ) -new_n2044_ = NAND ( new_n2043_, new_n2042_, new_n2001_ ) -new_n2045_ = NAND ( new_n2044_, new_n2041_, new_n2040_, new_n2037_ ) -NET_10071 = OR ( new_n2045_, new_n2021_, new_n2017_ ) -new_n2047_ = NOT ( NET_229 ) -new_n2048_ = NAND ( new_n1530_, new_n2047_ ) -new_n2049_ = OR ( new_n1685_, new_n1530_ ) -new_n2050_ = NAND ( new_n2049_, new_n2048_ ) -new_n2051_ = OR ( new_n2050_, NET_520 ) -new_n2052_ = NOT ( NET_294 ) -NET_35976 = NOT ( NET_520 ) -new_n2054_ = OR ( NET_35976, NET_309 ) -new_n2055_ = OR ( new_n2054_, new_n2052_ ) -new_n2056_ = NOT ( NET_309 ) -new_n2057_ = NOR ( NET_35976, new_n2056_ ) -new_n2058_ = NOT ( new_n2057_ ) -new_n2059_ = NOT ( NET_291 ) -new_n2060_ = NOT ( NET_292 ) -new_n2061_ = NOT ( NET_287 ) -new_n2062_ = NOT ( NET_288 ) -new_n2063_ = NOT ( NET_282 ) -new_n2064_ = NOT ( NET_283 ) -new_n2065_ = NOT ( NET_284 ) -new_n2066_ = NOT ( NET_280 ) -new_n2067_ = NOR ( NET_279, NET_278 ) -new_n2068_ = NAND ( new_n2067_, new_n2066_ ) -new_n2069_ = NOR ( new_n2068_, NET_281 ) -new_n2070_ = NAND ( new_n2069_, new_n2065_, new_n2064_, new_n2063_ ) -new_n2071_ = OR ( new_n2070_, NET_285 ) -new_n2072_ = NOR ( new_n2071_, NET_286 ) -new_n2073_ = NAND ( new_n2072_, new_n2062_, new_n2061_ ) -new_n2074_ = OR ( new_n2073_, NET_289 ) -new_n2075_ = NOR ( new_n2074_, NET_290 ) -new_n2076_ = NAND ( new_n2075_, new_n2060_, new_n2059_ ) -new_n2077_ = OR ( new_n2076_, NET_293 ) -new_n2078_ = XOR ( new_n2077_, new_n2052_ ) -new_n2079_ = OR ( new_n2078_, new_n2058_ ) -NET_10095 = NAND ( new_n2079_, new_n2055_, new_n2051_ ) -new_n2081_ = OR ( NET_309, NET_304 ) -new_n2082_ = NOT ( NET_303 ) -new_n2083_ = NOT ( NET_304 ) -new_n2084_ = NOT ( NET_299 ) -new_n2085_ = NOT ( NET_300 ) -new_n2086_ = NOT ( NET_295 ) -new_n2087_ = NOT ( NET_296 ) -new_n2088_ = NOR ( new_n2077_, NET_294 ) -new_n2089_ = NAND ( new_n2088_, new_n2087_, new_n2086_ ) -new_n2090_ = OR ( new_n2089_, NET_297 ) -new_n2091_ = NOR ( new_n2090_, NET_298 ) -new_n2092_ = NAND ( new_n2091_, new_n2085_, new_n2084_ ) -new_n2093_ = OR ( new_n2092_, NET_301 ) -new_n2094_ = NOR ( new_n2093_, NET_302 ) -new_n2095_ = NAND ( new_n2094_, new_n2083_, new_n2082_ ) -new_n2096_ = NAND ( new_n2094_, new_n2082_ ) -new_n2097_ = NAND ( new_n2096_, NET_304 ) -new_n2098_ = NAND ( new_n2097_, new_n2095_ ) -new_n2099_ = NAND ( new_n2098_, NET_309 ) -new_n2100_ = NAND ( new_n2099_, new_n2081_ ) -new_n2101_ = NOT ( new_n2100_ ) -new_n2102_ = NOR ( NET_309, new_n2082_ ) -new_n2103_ = XOR ( new_n2094_, NET_303 ) -new_n2104_ = NOR ( new_n2103_, new_n2056_ ) -new_n2105_ = NOR ( new_n2104_, new_n2102_ ) -new_n2106_ = NOR ( NET_309, NET_302 ) -new_n2107_ = AND ( new_n2093_, NET_302 ) -new_n2108_ = NOR ( new_n2107_, new_n2094_ ) -new_n2109_ = NOR ( new_n2108_, new_n2056_ ) -new_n2110_ = NOR ( new_n2109_, new_n2106_ ) -new_n2111_ = NOT ( new_n2110_ ) -new_n2112_ = NAND ( new_n2111_, new_n2105_, new_n2101_, NET_490 ) -new_n2113_ = NOT ( NET_490 ) -new_n2114_ = NOR ( new_n2111_, new_n2100_ ) -new_n2115_ = NAND ( new_n2114_, new_n2105_, new_n2113_ ) -new_n2116_ = NAND ( new_n2115_, new_n2112_, new_n2101_ ) -new_n2117_ = NOT ( new_n2116_ ) -new_n2118_ = NAND ( new_n2105_, new_n2100_ ) -new_n2119_ = OR ( new_n2118_, new_n2117_ ) -new_n2120_ = OR ( new_n2116_, NET_311 ) -new_n2121_ = NAND ( new_n2120_, new_n2119_ ) -new_n2122_ = NOT ( new_n2121_ ) -new_n2123_ = NAND ( new_n2105_, new_n2101_ ) -new_n2124_ = NAND ( new_n2111_, new_n2123_ ) -new_n2125_ = OR ( new_n2124_, new_n2117_ ) -new_n2126_ = OR ( new_n2116_, NET_310 ) -new_n2127_ = NAND ( new_n2126_, new_n2125_ ) -new_n2128_ = NOR ( NET_309, NET_298 ) -new_n2129_ = NOT ( NET_298 ) -new_n2130_ = XOR ( new_n2090_, new_n2129_ ) -new_n2131_ = AND ( new_n2130_, NET_309 ) -new_n2132_ = NOR ( new_n2131_, new_n2128_ ) -new_n2133_ = NOR ( NET_309, NET_297 ) -new_n2134_ = NOT ( NET_297 ) -new_n2135_ = XOR ( new_n2089_, new_n2134_ ) -new_n2136_ = AND ( new_n2135_, NET_309 ) -new_n2137_ = NOR ( new_n2136_, new_n2133_ ) -new_n2138_ = NOR ( new_n2137_, new_n2132_ ) -new_n2139_ = NOT ( new_n2138_ ) -new_n2140_ = OR ( NET_309, NET_299 ) -new_n2141_ = XOR ( new_n2091_, new_n2084_ ) -new_n2142_ = OR ( new_n2141_, new_n2056_ ) -new_n2143_ = NAND ( new_n2142_, new_n2140_ ) -new_n2144_ = OR ( NET_309, new_n2085_ ) -new_n2145_ = NAND ( new_n2091_, new_n2084_ ) -new_n2146_ = NAND ( new_n2145_, NET_300 ) -new_n2147_ = NAND ( new_n2146_, new_n2092_ ) -new_n2148_ = OR ( new_n2147_, new_n2056_ ) -new_n2149_ = NAND ( new_n2148_, new_n2144_ ) -new_n2150_ = NOT ( new_n2149_ ) -new_n2151_ = NOR ( new_n2150_, new_n2143_ ) -new_n2152_ = NAND ( new_n2151_, new_n2139_ ) -new_n2153_ = NOT ( NET_327 ) -new_n2154_ = NOT ( NET_328 ) -new_n2155_ = NOR ( NET_334, NET_333, NET_332, NET_331 ) -new_n2156_ = NOR ( NET_330, NET_329 ) -new_n2157_ = NAND ( new_n2156_, new_n2155_, new_n2154_, new_n2153_ ) -new_n2158_ = NOT ( NET_339 ) -new_n2159_ = NOT ( NET_340 ) -new_n2160_ = NOT ( NET_341 ) -new_n2161_ = NOR ( NET_338, NET_337, NET_336, NET_335 ) -new_n2162_ = NAND ( new_n2161_, new_n2160_, new_n2159_, new_n2158_ ) -new_n2163_ = NOT ( NET_315 ) -new_n2164_ = NOT ( NET_316 ) -new_n2165_ = NOT ( NET_317 ) -new_n2166_ = NOT ( NET_318 ) -new_n2167_ = NAND ( new_n2166_, new_n2165_, new_n2164_, new_n2163_ ) -new_n2168_ = OR ( new_n2167_, NET_314, NET_313 ) -new_n2169_ = NOT ( NET_319 ) -new_n2170_ = NOT ( NET_320 ) -new_n2171_ = NOR ( NET_326, NET_325, NET_324, NET_323 ) -new_n2172_ = NOR ( NET_322, NET_321 ) -new_n2173_ = NAND ( new_n2172_, new_n2171_, new_n2170_, new_n2169_ ) -new_n2174_ = NOR ( new_n2173_, new_n2168_, new_n2162_, new_n2157_ ) -new_n2175_ = NOR ( new_n2174_, new_n2116_ ) -new_n2176_ = NOT ( NET_312 ) -new_n2177_ = NOR ( new_n2116_, new_n2176_ ) -new_n2178_ = NOR ( new_n2177_, new_n2175_ ) -new_n2179_ = NAND ( new_n2178_, new_n2152_, new_n2127_, new_n2122_ ) -new_n2180_ = NOT ( new_n2143_ ) -new_n2181_ = NOT ( new_n2137_ ) -new_n2182_ = OR ( new_n2149_, new_n2181_ ) -new_n2183_ = NOR ( new_n2182_, new_n2180_ ) -new_n2184_ = NOT ( new_n2183_ ) -new_n2185_ = NOR ( new_n2184_, new_n2132_ ) -new_n2186_ = NOT ( new_n2185_ ) -new_n2187_ = NAND ( new_n2186_, new_n2179_ ) -new_n2188_ = NOT ( new_n2114_ ) -new_n2189_ = NOR ( new_n2188_, new_n2105_ ) -new_n2190_ = NOR ( NET_309, NET_301 ) -new_n2191_ = XOR ( new_n2092_, NET_301 ) -new_n2192_ = NOR ( new_n2191_, new_n2056_ ) -new_n2193_ = NOR ( new_n2192_, new_n2190_ ) -new_n2194_ = OR ( new_n2193_, new_n2189_ ) -new_n2195_ = NOR ( new_n2194_, NET_35976 ) -new_n2196_ = NAND ( new_n2195_, new_n2187_ ) -new_n2197_ = NOR ( new_n2143_, new_n2181_ ) -new_n2198_ = NAND ( new_n2149_, new_n2181_ ) -new_n2199_ = OR ( new_n2198_, new_n2180_ ) -new_n2200_ = NOR ( new_n2199_, new_n2132_ ) -new_n2201_ = NOT ( new_n2200_ ) -new_n2202_ = NAND ( new_n2149_, new_n2137_ ) -new_n2203_ = NOT ( new_n2132_ ) -new_n2204_ = NOR ( new_n2143_, new_n2203_ ) -new_n2205_ = NOT ( new_n2204_ ) -new_n2206_ = NAND ( new_n2205_, new_n2202_, new_n2201_ ) -new_n2207_ = NOR ( new_n2206_, new_n2197_ ) -new_n2208_ = OR ( new_n2207_, new_n2196_ ) -new_n2209_ = NOT ( new_n2193_ ) -new_n2210_ = NOR ( new_n2205_, new_n2194_ ) -new_n2211_ = NOT ( new_n2210_ ) -new_n2212_ = NOR ( new_n2202_, new_n2180_ ) -new_n2213_ = NOT ( new_n2212_ ) -new_n2214_ = OR ( new_n2213_, new_n2189_ ) -new_n2215_ = NOR ( new_n2181_, new_n2132_ ) -new_n2216_ = NAND ( new_n2215_, new_n2149_ ) -new_n2217_ = OR ( new_n2216_, new_n2189_ ) -new_n2218_ = NAND ( new_n2217_, new_n2214_, new_n2211_, new_n2209_ ) -new_n2219_ = NAND ( new_n2056_, NET_308, NET_307 ) -new_n2220_ = NOT ( NET_308 ) -new_n2221_ = NOT ( NET_306 ) -new_n2222_ = NOT ( NET_307 ) -new_n2223_ = NOR ( new_n2095_, NET_305 ) -new_n2224_ = NAND ( new_n2223_, new_n2222_, new_n2221_ ) -new_n2225_ = NAND ( new_n2223_, new_n2221_ ) -new_n2226_ = NAND ( new_n2225_, NET_307 ) -new_n2227_ = NAND ( new_n2226_, new_n2224_, NET_309, new_n2220_ ) -new_n2228_ = NAND ( new_n2227_, new_n2219_ ) -new_n2229_ = NAND ( new_n2228_, NET_500 ) -new_n2230_ = NOT ( NET_406 ) -new_n2231_ = NOR ( new_n2220_, NET_307 ) -new_n2232_ = OR ( new_n2231_, NET_309 ) -new_n2233_ = NAND ( new_n2226_, new_n2224_ ) -new_n2234_ = XOR ( new_n2224_, new_n2220_ ) -new_n2235_ = NOT ( new_n2234_ ) -new_n2236_ = NAND ( new_n2235_, new_n2233_ ) -new_n2237_ = NAND ( new_n2236_, NET_309 ) -new_n2238_ = NAND ( new_n2237_, new_n2232_ ) -new_n2239_ = OR ( new_n2238_, new_n2230_ ) -new_n2240_ = NOT ( NET_374 ) -new_n2241_ = NOR ( NET_308, new_n2222_ ) -new_n2242_ = OR ( new_n2241_, NET_309 ) -new_n2243_ = OR ( new_n2235_, new_n2233_ ) -new_n2244_ = NAND ( new_n2243_, NET_309 ) -new_n2245_ = NAND ( new_n2244_, new_n2242_ ) -new_n2246_ = OR ( new_n2245_, new_n2240_ ) -new_n2247_ = NOR ( NET_308, NET_307 ) -new_n2248_ = OR ( new_n2247_, NET_309 ) -new_n2249_ = NAND ( new_n2234_, new_n2233_ ) -new_n2250_ = NAND ( new_n2249_, NET_309 ) -new_n2251_ = NAND ( new_n2250_, new_n2248_, NET_342 ) -new_n2252_ = NAND ( new_n2251_, new_n2246_, new_n2239_, new_n2229_ ) -new_n2253_ = NOR ( new_n2127_, new_n2122_ ) -new_n2254_ = NAND ( new_n2253_, new_n2180_ ) -new_n2255_ = NAND ( new_n2127_, new_n2121_ ) -new_n2256_ = OR ( new_n2255_, new_n2143_ ) -new_n2257_ = NAND ( new_n2180_, new_n2127_, new_n2122_ ) -new_n2258_ = NAND ( new_n2257_, new_n2256_, new_n2254_ ) -new_n2259_ = NOT ( new_n2215_ ) -new_n2260_ = NOR ( new_n2259_, new_n2189_ ) -new_n2261_ = NAND ( new_n2260_, new_n2258_ ) -new_n2262_ = NOR ( new_n2127_, new_n2121_ ) -new_n2263_ = NOT ( new_n2189_ ) -new_n2264_ = NOR ( new_n2150_, new_n2139_ ) -new_n2265_ = NAND ( new_n2264_, new_n2263_ ) -new_n2266_ = OR ( new_n2265_, new_n2262_ ) -new_n2267_ = NAND ( new_n2266_, new_n2261_ ) -new_n2268_ = NOT ( new_n2262_ ) -new_n2269_ = NOR ( new_n2268_, new_n2143_ ) -new_n2270_ = NAND ( new_n2269_, new_n2260_ ) -new_n2271_ = OR ( new_n2265_, new_n2268_ ) -new_n2272_ = NAND ( new_n2271_, new_n2270_ ) -new_n2273_ = NOR ( new_n2272_, new_n2267_ ) -new_n2274_ = NOT ( new_n2273_ ) -new_n2275_ = AND ( new_n2274_, new_n2252_ ) -new_n2276_ = NOT ( NET_213 ) -new_n2277_ = NAND ( new_n1530_, new_n2276_ ) -new_n2278_ = OR ( new_n1906_, new_n1530_ ) -new_n2279_ = NAND ( new_n2278_, new_n2277_ ) -new_n2280_ = NOR ( NET_309, NET_306 ) -new_n2281_ = XOR ( new_n2223_, new_n2221_ ) -new_n2282_ = NOR ( new_n2281_, new_n2056_ ) -new_n2283_ = NOR ( new_n2282_, new_n2280_ ) -new_n2284_ = OR ( NET_309, NET_305 ) -new_n2285_ = XOR ( new_n2095_, NET_305 ) -new_n2286_ = OR ( new_n2285_, new_n2056_ ) -new_n2287_ = NAND ( new_n2286_, new_n2284_ ) -new_n2288_ = NOT ( new_n2287_ ) -new_n2289_ = NOR ( new_n2288_, new_n2283_ ) -new_n2290_ = NOT ( new_n2289_ ) -new_n2291_ = NAND ( new_n2290_, new_n2279_ ) -new_n2292_ = NOT ( NET_278 ) -new_n2293_ = OR ( NET_309, new_n2292_ ) -new_n2294_ = NAND ( NET_309, NET_278 ) -new_n2295_ = NAND ( new_n2294_, new_n2293_ ) -new_n2296_ = OR ( new_n2295_, new_n2290_ ) -new_n2297_ = NAND ( new_n2296_, new_n2291_ ) -new_n2298_ = NAND ( new_n2212_, new_n2263_, new_n2132_ ) -new_n2299_ = OR ( new_n2298_, new_n2262_ ) -new_n2300_ = NAND ( new_n2268_, new_n2210_, new_n2137_ ) -new_n2301_ = NAND ( new_n2268_, new_n2210_, new_n2181_ ) -new_n2302_ = OR ( new_n2262_, new_n2217_ ) -new_n2303_ = NAND ( new_n2302_, new_n2301_, new_n2300_, new_n2299_ ) -new_n2304_ = OR ( new_n2268_, new_n2217_ ) -new_n2305_ = NAND ( new_n2262_, new_n2210_, new_n2137_ ) -new_n2306_ = OR ( new_n2298_, new_n2268_ ) -new_n2307_ = NAND ( new_n2262_, new_n2210_, new_n2181_ ) -new_n2308_ = NAND ( new_n2307_, new_n2306_, new_n2305_, new_n2304_ ) -new_n2309_ = NOR ( new_n2308_, new_n2303_ ) -new_n2310_ = OR ( new_n2309_, new_n2297_ ) -new_n2311_ = NAND ( new_n2183_, new_n2132_ ) -new_n2312_ = NOR ( new_n2137_, new_n2203_ ) -new_n2313_ = NAND ( new_n2312_, new_n2150_, new_n2143_ ) -new_n2314_ = NAND ( new_n2313_, new_n2311_ ) -new_n2315_ = NAND ( new_n2312_, new_n2149_ ) -new_n2316_ = NOR ( new_n2315_, new_n2180_ ) -new_n2317_ = NOT ( new_n2316_ ) -new_n2318_ = NAND ( new_n2180_, new_n2138_ ) -new_n2319_ = NAND ( new_n2150_, new_n2143_, new_n2181_ ) -new_n2320_ = OR ( new_n2319_, new_n2132_ ) -new_n2321_ = NAND ( new_n2320_, new_n2318_, new_n2317_, new_n2186_ ) -new_n2322_ = OR ( new_n2321_, new_n2314_ ) -new_n2323_ = NAND ( new_n2322_, new_n2287_, new_n2263_ ) -new_n2324_ = NAND ( new_n2322_, new_n2288_, new_n2263_ ) -new_n2325_ = NAND ( new_n2324_, new_n2323_ ) -new_n2326_ = NAND ( new_n2325_, new_n2295_ ) -new_n2327_ = NOR ( new_n2288_, new_n2193_ ) -new_n2328_ = NAND ( new_n2327_, new_n2189_ ) -new_n2329_ = OR ( new_n2328_, new_n2240_ ) -new_n2330_ = NAND ( new_n2288_, new_n2209_, new_n2189_ ) -new_n2331_ = OR ( new_n2330_, new_n2230_ ) -new_n2332_ = NAND ( new_n2331_, new_n2329_, new_n2326_, new_n2310_ ) -new_n2333_ = NOR ( new_n2332_, new_n2275_ ) -new_n2334_ = XNOR ( new_n2333_, new_n2218_ ) -new_n2335_ = NOR ( new_n2297_, new_n2273_ ) -new_n2336_ = NAND ( new_n2309_, new_n2209_ ) -new_n2337_ = NAND ( new_n2336_, new_n2252_ ) -new_n2338_ = NAND ( new_n2209_, new_n2189_ ) -new_n2339_ = NOT ( new_n2338_ ) -new_n2340_ = NAND ( new_n2339_, new_n2295_ ) -new_n2341_ = OR ( new_n2323_, new_n2240_ ) -new_n2342_ = OR ( new_n2324_, new_n2230_ ) -new_n2343_ = NAND ( new_n2342_, new_n2341_, new_n2340_, new_n2337_ ) -new_n2344_ = NOR ( new_n2343_, new_n2335_ ) -new_n2345_ = XOR ( new_n2344_, new_n2334_ ) -new_n2346_ = XOR ( new_n2345_, new_n2218_ ) -new_n2347_ = NOR ( new_n2346_, new_n2208_ ) -new_n2348_ = NOR ( new_n2180_, new_n2132_ ) -new_n2349_ = NOT ( new_n2348_ ) -new_n2350_ = OR ( new_n2349_, new_n2297_ ) -new_n2351_ = NAND ( new_n2349_, new_n2252_ ) -new_n2352_ = NAND ( new_n2351_, new_n2350_ ) -new_n2353_ = NAND ( new_n2352_, new_n2348_ ) -new_n2354_ = OR ( new_n2352_, new_n2348_ ) -new_n2355_ = NAND ( new_n2354_, new_n2353_ ) -new_n2356_ = OR ( new_n2348_, new_n2297_ ) -new_n2357_ = XNOR ( new_n2356_, new_n2355_ ) -new_n2358_ = XNOR ( new_n2357_, new_n2349_ ) -new_n2359_ = NOT ( new_n2196_ ) -new_n2360_ = OR ( new_n2318_, new_n2149_ ) -new_n2361_ = NAND ( new_n2360_, new_n2320_, new_n2315_ ) -new_n2362_ = NAND ( new_n2361_, new_n2359_ ) -new_n2363_ = NOR ( new_n2362_, new_n2358_ ) -new_n2364_ = NAND ( new_n2314_, new_n2359_ ) -new_n2365_ = OR ( new_n2364_, new_n2297_ ) -new_n2366_ = NOT ( new_n2151_ ) -new_n2367_ = NOR ( new_n2283_, new_n2366_ ) -new_n2368_ = NOT ( new_n2367_ ) -new_n2369_ = NOR ( new_n2368_, new_n2196_ ) -new_n2370_ = NAND ( new_n2228_, NET_510 ) -new_n2371_ = NOT ( NET_407 ) -new_n2372_ = OR ( new_n2238_, new_n2371_ ) -new_n2373_ = NOT ( NET_375 ) -new_n2374_ = OR ( new_n2245_, new_n2373_ ) -new_n2375_ = NAND ( new_n2250_, new_n2248_, NET_343 ) -new_n2376_ = NAND ( new_n2375_, new_n2374_, new_n2372_, new_n2370_ ) -new_n2377_ = NAND ( new_n2376_, new_n2369_ ) -new_n2378_ = NAND ( new_n2196_, NET_406 ) -new_n2379_ = NOT ( new_n2195_ ) -new_n2380_ = NOR ( new_n2379_, new_n2186_ ) -new_n2381_ = NAND ( new_n2380_, NET_500 ) -new_n2382_ = NAND ( new_n2381_, new_n2378_, new_n2377_, new_n2365_ ) -NET_10096 = OR ( new_n2382_, new_n2363_, new_n2347_ ) -new_n2384_ = NAND ( new_n2262_, new_n2178_ ) -new_n2385_ = NOT ( new_n2384_ ) -new_n2386_ = OR ( new_n2205_, new_n2149_ ) -new_n2387_ = OR ( new_n2259_, new_n2143_ ) -new_n2388_ = OR ( new_n2387_, new_n2149_ ) -new_n2389_ = NAND ( new_n2388_, new_n2386_, new_n2213_, new_n2201_ ) -new_n2390_ = NAND ( new_n2389_, new_n2385_, new_n2195_ ) -new_n2391_ = NOR ( new_n2390_, new_n2346_ ) -new_n2392_ = NAND ( new_n2360_, new_n2320_, new_n2317_ ) -new_n2393_ = NAND ( new_n2392_, new_n2385_, new_n2195_ ) -new_n2394_ = NOR ( new_n2393_, new_n2358_ ) -new_n2395_ = NOR ( new_n2318_, new_n2150_ ) -new_n2396_ = AND ( new_n2395_, new_n2209_ ) -new_n2397_ = NAND ( new_n2396_, new_n2263_, NET_520 ) -new_n2398_ = NAND ( new_n2314_, new_n2195_ ) -new_n2399_ = NAND ( new_n2398_, new_n2397_ ) -new_n2400_ = NAND ( new_n2399_, new_n2384_ ) -new_n2401_ = OR ( new_n2392_, new_n2389_ ) -new_n2402_ = NAND ( new_n2401_, new_n2384_ ) -new_n2403_ = NAND ( new_n2402_, new_n2152_ ) -new_n2404_ = AND ( new_n2403_, new_n2195_ ) -new_n2405_ = NAND ( new_n2209_, new_n2189_ ) -NET_35978 = NOR ( new_n2405_, NET_35976 ) -new_n2407_ = NOR ( new_n2209_, NET_35976 ) -new_n2408_ = NOR ( new_n2407_, NET_35978, new_n2404_ ) -new_n2409_ = NAND ( new_n2408_, new_n2400_ ) -new_n2410_ = NAND ( new_n2409_, NET_500 ) -new_n2411_ = NOR ( new_n2398_, new_n2384_ ) -new_n2412_ = NOR ( new_n2411_, new_n2380_ ) -new_n2413_ = OR ( new_n2412_, new_n2297_ ) -new_n2414_ = NAND ( NET_35976, NET_500 ) -new_n2415_ = NOT ( new_n2397_ ) -new_n2416_ = NOR ( new_n2384_, new_n2283_ ) -new_n2417_ = NAND ( new_n2416_, new_n2415_, new_n2376_ ) -new_n2418_ = NAND ( new_n2417_, new_n2414_, new_n2413_, new_n2410_ ) -NET_10097 = OR ( new_n2418_, new_n2394_, new_n2391_ ) -new_n2420_ = OR ( NET_554, NET_549 ) -new_n2421_ = NOT ( NET_547 ) -new_n2422_ = NOT ( NET_548 ) -new_n2423_ = NOT ( NET_549 ) -new_n2424_ = NOT ( NET_544 ) -new_n2425_ = NOT ( NET_545 ) -new_n2426_ = NOT ( NET_540 ) -new_n2427_ = NOT ( NET_541 ) -new_n2428_ = NOT ( NET_536 ) -new_n2429_ = NOT ( NET_537 ) -new_n2430_ = NOT ( NET_532 ) -new_n2431_ = NOT ( NET_533 ) -new_n2432_ = NOT ( NET_527 ) -new_n2433_ = NOT ( NET_528 ) -new_n2434_ = NOT ( NET_529 ) -new_n2435_ = NOT ( NET_525 ) -new_n2436_ = NOR ( NET_524, NET_523 ) -new_n2437_ = NAND ( new_n2436_, new_n2435_ ) -new_n2438_ = NOR ( new_n2437_, NET_526 ) -new_n2439_ = NAND ( new_n2438_, new_n2434_, new_n2433_, new_n2432_ ) -new_n2440_ = OR ( new_n2439_, NET_530 ) -new_n2441_ = NOR ( new_n2440_, NET_531 ) -new_n2442_ = NAND ( new_n2441_, new_n2431_, new_n2430_ ) -new_n2443_ = OR ( new_n2442_, NET_534 ) -new_n2444_ = NOR ( new_n2443_, NET_535 ) -new_n2445_ = NAND ( new_n2444_, new_n2429_, new_n2428_ ) -new_n2446_ = OR ( new_n2445_, NET_538 ) -new_n2447_ = NOR ( new_n2446_, NET_539 ) -new_n2448_ = NAND ( new_n2447_, new_n2427_, new_n2426_ ) -new_n2449_ = OR ( new_n2448_, NET_542 ) -new_n2450_ = NOR ( new_n2449_, NET_543 ) -new_n2451_ = NAND ( new_n2450_, new_n2425_, new_n2424_ ) -new_n2452_ = NOR ( new_n2451_, NET_546 ) -new_n2453_ = NAND ( new_n2452_, new_n2423_, new_n2422_, new_n2421_ ) -new_n2454_ = NAND ( new_n2452_, new_n2421_ ) -new_n2455_ = OR ( new_n2454_, NET_548 ) -new_n2456_ = NAND ( new_n2455_, NET_549 ) -new_n2457_ = NAND ( new_n2456_, new_n2453_ ) -new_n2458_ = NAND ( new_n2457_, NET_554 ) -new_n2459_ = AND ( new_n2458_, new_n2420_ ) -new_n2460_ = NOR ( NET_554, new_n2422_ ) -new_n2461_ = NOT ( NET_554 ) -new_n2462_ = XOR ( new_n2454_, new_n2422_ ) -new_n2463_ = NOR ( new_n2462_, new_n2461_ ) -new_n2464_ = NOR ( new_n2463_, new_n2460_ ) -new_n2465_ = NOR ( NET_554, new_n2421_ ) -new_n2466_ = XOR ( new_n2452_, NET_547 ) -new_n2467_ = NOR ( new_n2466_, new_n2461_ ) -new_n2468_ = NOR ( new_n2467_, new_n2465_ ) -new_n2469_ = NAND ( new_n2468_, new_n2464_, new_n2459_, NET_735 ) -new_n2470_ = NOT ( new_n2468_ ) -new_n2471_ = NAND ( new_n2470_, new_n2459_ ) -new_n2472_ = OR ( new_n2471_, NET_735 ) -new_n2473_ = NAND ( new_n2472_, new_n2469_, new_n2459_ ) -new_n2474_ = NAND ( new_n2464_, new_n2459_ ) -new_n2475_ = NAND ( new_n2468_, new_n2474_ ) -new_n2476_ = NAND ( new_n2475_, new_n2473_ ) -new_n2477_ = NOT ( NET_555 ) -new_n2478_ = OR ( new_n2473_, new_n2477_ ) -new_n2479_ = NAND ( new_n2478_, new_n2476_ ) -new_n2480_ = OR ( new_n2463_, new_n2460_, new_n2459_ ) -new_n2481_ = NAND ( new_n2480_, new_n2473_ ) -new_n2482_ = NOT ( NET_556 ) -new_n2483_ = OR ( new_n2473_, new_n2482_ ) -new_n2484_ = NAND ( new_n2483_, new_n2481_ ) -new_n2485_ = NAND ( new_n2484_, new_n2479_ ) -new_n2486_ = NOR ( NET_554, new_n2424_ ) -new_n2487_ = XOR ( new_n2450_, NET_544 ) -new_n2488_ = NOR ( new_n2487_, new_n2461_ ) -new_n2489_ = NOR ( new_n2488_, new_n2486_ ) -new_n2490_ = NOT ( new_n2489_ ) -new_n2491_ = NOR ( NET_554, NET_542 ) -new_n2492_ = NOT ( NET_542 ) -new_n2493_ = XOR ( new_n2448_, new_n2492_ ) -new_n2494_ = AND ( new_n2493_, NET_554 ) -new_n2495_ = NOR ( new_n2494_, new_n2491_ ) -new_n2496_ = NOR ( NET_554, NET_543 ) -new_n2497_ = NOT ( NET_543 ) -new_n2498_ = XOR ( new_n2449_, new_n2497_ ) -new_n2499_ = AND ( new_n2498_, NET_554 ) -new_n2500_ = NOR ( new_n2499_, new_n2496_ ) -new_n2501_ = NOR ( new_n2500_, new_n2495_ ) -new_n2502_ = NAND ( new_n2501_, new_n2490_ ) -new_n2503_ = NOR ( new_n2471_, new_n2464_ ) -new_n2504_ = NOR ( new_n2503_, new_n2502_ ) -new_n2505_ = NAND ( new_n2504_, new_n2485_ ) -new_n2506_ = NOT ( new_n2495_ ) -new_n2507_ = NOR ( new_n2503_, new_n2490_ ) -new_n2508_ = NAND ( new_n2507_, new_n2506_ ) -new_n2509_ = NOT ( new_n2508_ ) -new_n2510_ = NAND ( new_n2509_, new_n2500_, new_n2485_ ) -new_n2511_ = NOR ( new_n2500_, new_n2506_ ) -new_n2512_ = NAND ( new_n2511_, new_n2490_ ) -new_n2513_ = NOR ( new_n2512_, new_n2503_ ) -new_n2514_ = NAND ( new_n2513_, new_n2485_ ) -new_n2515_ = NOT ( new_n2500_ ) -new_n2516_ = NAND ( new_n2509_, new_n2515_, new_n2485_ ) -new_n2517_ = NAND ( new_n2516_, new_n2514_, new_n2510_, new_n2505_ ) -new_n2518_ = NOT ( new_n2485_ ) -new_n2519_ = NAND ( new_n2509_, new_n2515_, new_n2518_ ) -new_n2520_ = NAND ( new_n2513_, new_n2518_ ) -new_n2521_ = NAND ( new_n2504_, new_n2518_ ) -new_n2522_ = NAND ( new_n2509_, new_n2500_, new_n2518_ ) -new_n2523_ = NAND ( new_n2522_, new_n2521_, new_n2520_, new_n2519_ ) -new_n2524_ = NOR ( new_n2523_, new_n2517_ ) -new_n2525_ = XNOR ( NET_459, NET_214 ) -new_n2526_ = NOR ( new_n1591_, NET_213 ) -new_n2527_ = XOR ( new_n2526_, new_n2525_ ) -new_n2528_ = NAND ( new_n2527_, new_n1530_ ) -new_n2529_ = OR ( new_n1530_, NET_31 ) -new_n2530_ = NAND ( new_n2529_, new_n2528_ ) -new_n2531_ = NOT ( NET_550 ) -new_n2532_ = XOR ( new_n2453_, new_n2531_ ) -new_n2533_ = NOR ( new_n2532_, new_n2461_ ) -new_n2534_ = NOR ( NET_554, new_n2531_ ) -new_n2535_ = NOR ( new_n2534_, new_n2533_ ) -new_n2536_ = NOR ( NET_554, NET_551 ) -new_n2537_ = NOT ( NET_551 ) -new_n2538_ = NOR ( new_n2453_, NET_550 ) -new_n2539_ = XOR ( new_n2538_, new_n2537_ ) -new_n2540_ = NOR ( new_n2539_, new_n2461_ ) -new_n2541_ = NOR ( new_n2540_, new_n2536_ ) -new_n2542_ = NOT ( new_n2541_ ) -new_n2543_ = NAND ( new_n2542_, new_n2535_ ) -new_n2544_ = NAND ( new_n2543_, new_n2530_ ) -new_n2545_ = NOR ( NET_554, NET_524 ) -new_n2546_ = NOT ( NET_523 ) -new_n2547_ = NOT ( NET_524 ) -new_n2548_ = NOR ( new_n2547_, new_n2546_ ) -new_n2549_ = NOR ( new_n2548_, new_n2436_ ) -new_n2550_ = NOR ( new_n2549_, new_n2461_ ) -new_n2551_ = NOR ( new_n2550_, new_n2545_ ) -new_n2552_ = OR ( new_n2551_, new_n2543_ ) -new_n2553_ = NAND ( new_n2552_, new_n2544_ ) -new_n2554_ = OR ( new_n2553_, new_n2524_ ) -new_n2555_ = NOT ( NET_546 ) -new_n2556_ = NOR ( NET_554, new_n2555_ ) -new_n2557_ = XOR ( new_n2451_, new_n2555_ ) -new_n2558_ = NOR ( new_n2557_, new_n2461_ ) -new_n2559_ = NOR ( new_n2558_, new_n2556_ ) -new_n2560_ = NOT ( new_n2559_ ) -new_n2561_ = NOR ( new_n2560_, new_n2503_ ) -new_n2562_ = AND ( new_n2561_, new_n2500_, new_n2490_ ) -new_n2563_ = NAND ( new_n2562_, new_n2495_ ) -new_n2564_ = OR ( new_n2563_, new_n2518_ ) -new_n2565_ = NAND ( new_n2511_, new_n2507_, new_n2485_ ) -new_n2566_ = NAND ( new_n2562_, new_n2506_ ) -new_n2567_ = OR ( new_n2566_, new_n2518_ ) -new_n2568_ = NOR ( new_n2484_, new_n2479_ ) -new_n2569_ = NOR ( new_n2515_, new_n2506_ ) -new_n2570_ = NAND ( new_n2569_, new_n2507_ ) -new_n2571_ = OR ( new_n2570_, new_n2568_ ) -new_n2572_ = NAND ( new_n2571_, new_n2567_, new_n2565_, new_n2564_ ) -new_n2573_ = NAND ( new_n2511_, new_n2507_, new_n2518_ ) -new_n2574_ = OR ( new_n2563_, new_n2485_ ) -new_n2575_ = NAND ( new_n2569_, new_n2568_, new_n2507_ ) -new_n2576_ = OR ( new_n2566_, new_n2485_ ) -new_n2577_ = NAND ( new_n2576_, new_n2575_, new_n2574_, new_n2573_ ) -new_n2578_ = NOR ( new_n2577_, new_n2572_ ) -new_n2579_ = NOT ( new_n2578_ ) -new_n2580_ = NAND ( new_n2461_, NET_553, NET_552 ) -new_n2581_ = NOT ( NET_553 ) -new_n2582_ = NOT ( NET_552 ) -new_n2583_ = NAND ( new_n2538_, new_n2582_, new_n2537_ ) -new_n2584_ = NAND ( new_n2538_, new_n2537_ ) -new_n2585_ = NAND ( new_n2584_, NET_552 ) -new_n2586_ = NAND ( new_n2585_, new_n2583_, NET_554, new_n2581_ ) -new_n2587_ = NAND ( new_n2586_, new_n2580_ ) -new_n2588_ = NAND ( new_n2587_, NET_755 ) -new_n2589_ = NOT ( NET_652 ) -new_n2590_ = NOR ( new_n2581_, NET_552 ) -new_n2591_ = OR ( new_n2590_, NET_554 ) -new_n2592_ = NAND ( new_n2585_, new_n2583_ ) -new_n2593_ = XOR ( new_n2583_, new_n2581_ ) -new_n2594_ = NOT ( new_n2593_ ) -new_n2595_ = NAND ( new_n2594_, new_n2592_ ) -new_n2596_ = NAND ( new_n2595_, NET_554 ) -new_n2597_ = NAND ( new_n2596_, new_n2591_ ) -new_n2598_ = OR ( new_n2597_, new_n2589_ ) -new_n2599_ = NOT ( NET_620 ) -new_n2600_ = NOR ( NET_553, new_n2582_ ) -new_n2601_ = OR ( new_n2600_, NET_554 ) -new_n2602_ = OR ( new_n2594_, new_n2592_ ) -new_n2603_ = NAND ( new_n2602_, NET_554 ) -new_n2604_ = NAND ( new_n2603_, new_n2601_ ) -new_n2605_ = OR ( new_n2604_, new_n2599_ ) -new_n2606_ = NOR ( NET_553, NET_552 ) -new_n2607_ = OR ( new_n2606_, NET_554 ) -new_n2608_ = NAND ( new_n2593_, new_n2592_ ) -new_n2609_ = NAND ( new_n2608_, NET_554 ) -new_n2610_ = NAND ( new_n2609_, new_n2607_, NET_588 ) -new_n2611_ = NAND ( new_n2610_, new_n2605_, new_n2598_, new_n2588_ ) -new_n2612_ = NAND ( new_n2611_, new_n2579_ ) -new_n2613_ = NAND ( new_n2559_, new_n2503_ ) -new_n2614_ = NOT ( new_n2613_ ) -new_n2615_ = NAND ( new_n2614_, new_n2551_ ) -new_n2616_ = NAND ( new_n2615_, new_n2612_, new_n2554_ ) -new_n2617_ = OR ( new_n2500_, new_n2489_ ) -new_n2618_ = NAND ( new_n2617_, new_n2561_, new_n2508_ ) -new_n2619_ = XOR ( new_n2618_, new_n2616_ ) -new_n2620_ = NAND ( new_n2559_, new_n2524_ ) -new_n2621_ = NAND ( new_n2620_, new_n2611_ ) -new_n2622_ = OR ( new_n2578_, new_n2553_ ) -new_n2623_ = NOR ( new_n2560_, new_n2535_ ) -new_n2624_ = NAND ( new_n2623_, new_n2503_ ) -new_n2625_ = OR ( new_n2624_, new_n2589_ ) -new_n2626_ = NAND ( new_n2559_, new_n2535_, new_n2503_ ) -new_n2627_ = OR ( new_n2626_, new_n2599_ ) -new_n2628_ = NAND ( new_n2627_, new_n2625_, new_n2622_, new_n2621_ ) -new_n2629_ = OR ( new_n2628_, new_n2619_ ) -new_n2630_ = NAND ( new_n2628_, new_n2619_ ) -new_n2631_ = NAND ( new_n2630_, new_n2629_ ) -new_n2632_ = NAND ( new_n2587_, NET_745 ) -new_n2633_ = NOT ( NET_651 ) -new_n2634_ = OR ( new_n2597_, new_n2633_ ) -new_n2635_ = NOT ( NET_619 ) -new_n2636_ = OR ( new_n2604_, new_n2635_ ) -new_n2637_ = NAND ( new_n2609_, new_n2607_, NET_587 ) -new_n2638_ = NAND ( new_n2637_, new_n2636_, new_n2634_, new_n2632_ ) -new_n2639_ = NAND ( new_n2638_, new_n2620_ ) -new_n2640_ = XNOR ( NET_458, NET_213 ) -new_n2641_ = NAND ( new_n2640_, new_n1530_ ) -new_n2642_ = OR ( new_n1530_, NET_32 ) -new_n2643_ = NAND ( new_n2642_, new_n2641_ ) -new_n2644_ = NAND ( new_n2643_, new_n2543_ ) -new_n2645_ = OR ( NET_554, new_n2546_ ) -new_n2646_ = NAND ( NET_554, NET_523 ) -new_n2647_ = NAND ( new_n2646_, new_n2645_ ) -new_n2648_ = OR ( new_n2647_, new_n2543_ ) -new_n2649_ = NAND ( new_n2648_, new_n2644_ ) -new_n2650_ = OR ( new_n2649_, new_n2578_ ) -new_n2651_ = OR ( new_n2624_, new_n2633_ ) -new_n2652_ = OR ( new_n2626_, new_n2635_ ) -new_n2653_ = NAND ( new_n2652_, new_n2651_, new_n2650_, new_n2639_ ) -new_n2654_ = OR ( new_n2649_, new_n2524_ ) -new_n2655_ = NAND ( new_n2638_, new_n2579_ ) -new_n2656_ = NAND ( new_n2647_, new_n2614_ ) -new_n2657_ = NAND ( new_n2656_, new_n2655_, new_n2654_ ) -new_n2658_ = NAND ( new_n2657_, new_n2653_ ) -new_n2659_ = NAND ( new_n2656_, new_n2655_, new_n2654_, new_n2618_ ) -new_n2660_ = NAND ( new_n2659_, new_n2658_ ) -new_n2661_ = XNOR ( new_n2660_, new_n2631_ ) -new_n2662_ = OR ( NET_554, new_n2425_ ) -new_n2663_ = NAND ( new_n2450_, new_n2424_ ) -new_n2664_ = NAND ( new_n2663_, NET_545 ) -new_n2665_ = NAND ( new_n2664_, new_n2451_ ) -new_n2666_ = OR ( new_n2665_, new_n2461_ ) -new_n2667_ = NAND ( new_n2666_, new_n2662_ ) -new_n2668_ = NOR ( new_n2515_, new_n2495_ ) -new_n2669_ = OR ( new_n2668_, new_n2490_ ) -new_n2670_ = NAND ( new_n2669_, new_n2667_ ) -new_n2671_ = NOT ( new_n2479_ ) -new_n2672_ = NOT ( NET_572 ) -new_n2673_ = NOT ( NET_573 ) -new_n2674_ = NOR ( NET_579, NET_578, NET_577, NET_576 ) -new_n2675_ = NOR ( NET_575, NET_574 ) -new_n2676_ = NAND ( new_n2675_, new_n2674_, new_n2673_, new_n2672_ ) -new_n2677_ = NOT ( NET_584 ) -new_n2678_ = NOT ( NET_585 ) -new_n2679_ = NOT ( NET_586 ) -new_n2680_ = NOR ( NET_583, NET_582, NET_581, NET_580 ) -new_n2681_ = NAND ( new_n2680_, new_n2679_, new_n2678_, new_n2677_ ) -new_n2682_ = NOT ( NET_560 ) -new_n2683_ = NOT ( NET_561 ) -new_n2684_ = NOT ( NET_562 ) -new_n2685_ = NOT ( NET_563 ) -new_n2686_ = NAND ( new_n2685_, new_n2684_, new_n2683_, new_n2682_ ) -new_n2687_ = OR ( new_n2686_, NET_559, NET_558 ) -new_n2688_ = NOT ( NET_564 ) -new_n2689_ = NOT ( NET_565 ) -new_n2690_ = NOR ( NET_571, NET_570, NET_569, NET_568 ) -new_n2691_ = NOR ( NET_567, NET_566 ) -new_n2692_ = NAND ( new_n2691_, new_n2690_, new_n2689_, new_n2688_ ) -new_n2693_ = NOR ( new_n2692_, new_n2687_, new_n2681_, new_n2676_ ) -new_n2694_ = NOR ( new_n2693_, new_n2473_ ) -new_n2695_ = NOT ( NET_557 ) -new_n2696_ = NOR ( new_n2473_, new_n2695_ ) -new_n2697_ = NOR ( new_n2696_, new_n2694_ ) -new_n2698_ = AND ( new_n2697_, new_n2484_, new_n2671_ ) -new_n2699_ = NAND ( new_n2698_, new_n2670_ ) -new_n2700_ = NOR ( new_n2667_, new_n2500_, new_n2506_, new_n2490_ ) -new_n2701_ = NOT ( new_n2700_ ) -new_n2702_ = NOR ( new_n2484_, new_n2671_ ) -new_n2703_ = AND ( new_n2668_, new_n2667_ ) -new_n2704_ = NAND ( new_n2703_, new_n2489_ ) -new_n2705_ = NOT ( new_n2667_ ) -new_n2706_ = NOR ( new_n2705_, new_n2502_ ) -new_n2707_ = NOT ( new_n2706_ ) -new_n2708_ = NAND ( new_n2707_, new_n2704_ ) -new_n2709_ = NAND ( new_n2708_, new_n2702_, new_n2697_ ) -new_n2710_ = NAND ( new_n2709_, new_n2701_, new_n2699_ ) -new_n2711_ = NAND ( new_n2561_, NET_765 ) -new_n2712_ = NOT ( new_n2711_ ) -new_n2713_ = NAND ( new_n2712_, new_n2710_ ) -new_n2714_ = NOT ( new_n2713_ ) -new_n2715_ = NAND ( new_n2569_, new_n2490_ ) -new_n2716_ = NAND ( new_n2668_, new_n2490_ ) -new_n2717_ = AND ( new_n2716_, new_n2715_, new_n2512_ ) -new_n2718_ = NAND ( new_n2667_, new_n2511_ ) -new_n2719_ = NAND ( new_n2667_, new_n2569_ ) -new_n2720_ = AND ( new_n2719_, new_n2718_, new_n2717_ ) -new_n2721_ = OR ( new_n2667_, new_n2502_ ) -new_n2722_ = NAND ( new_n2667_, new_n2489_ ) -new_n2723_ = OR ( new_n2722_, new_n2495_ ) -new_n2724_ = AND ( new_n2723_, new_n2721_ ) -new_n2725_ = NAND ( new_n2724_, new_n2720_ ) -new_n2726_ = NAND ( new_n2725_, new_n2714_, new_n2661_ ) -new_n2727_ = NOR ( NET_551, NET_550 ) -new_n2728_ = OR ( new_n2727_, NET_554 ) -new_n2729_ = NOT ( new_n2532_ ) -new_n2730_ = NOR ( new_n2539_, new_n2729_ ) -new_n2731_ = OR ( new_n2730_, new_n2461_ ) -new_n2732_ = NAND ( new_n2731_, new_n2728_ ) -new_n2733_ = NOT ( new_n2732_ ) -new_n2734_ = NAND ( new_n2733_, new_n2551_ ) -new_n2735_ = NOT ( new_n2543_ ) -new_n2736_ = OR ( new_n2735_, new_n2530_ ) -new_n2737_ = NAND ( new_n2736_, new_n2734_ ) -new_n2738_ = NAND ( new_n2705_, new_n2500_, new_n2495_ ) -new_n2739_ = OR ( new_n2738_, new_n2490_ ) -new_n2740_ = NOR ( new_n2667_, new_n2490_ ) -new_n2741_ = NAND ( new_n2740_, new_n2506_ ) -new_n2742_ = NAND ( new_n2741_, new_n2739_ ) -new_n2743_ = NAND ( new_n2742_, new_n2714_ ) -new_n2744_ = NOT ( new_n2743_ ) -new_n2745_ = NAND ( new_n2744_, new_n2737_ ) -new_n2746_ = NAND ( new_n2713_, NET_652 ) -new_n2747_ = NOR ( new_n2705_, new_n2489_ ) -new_n2748_ = NAND ( new_n2539_, new_n2532_, NET_554 ) -new_n2749_ = OR ( new_n2539_, new_n2532_, new_n2461_ ) -new_n2750_ = NOR ( new_n2534_, NET_551 ) -new_n2751_ = NOR ( NET_554, NET_550 ) -new_n2752_ = NOR ( new_n2751_, new_n2537_ ) -new_n2753_ = OR ( new_n2752_, new_n2750_ ) -new_n2754_ = NAND ( new_n2753_, new_n2749_, new_n2748_ ) -new_n2755_ = AND ( new_n2754_, new_n2747_ ) -new_n2756_ = AND ( new_n2755_, new_n2714_ ) -new_n2757_ = NAND ( new_n2756_, new_n2638_ ) -new_n2758_ = NOR ( new_n2713_, new_n2701_ ) -new_n2759_ = NAND ( new_n2758_, NET_755 ) -new_n2760_ = NAND ( new_n2539_, new_n2533_ ) -new_n2761_ = NAND ( new_n2534_, NET_551 ) -new_n2762_ = NAND ( new_n2761_, new_n2760_ ) -new_n2763_ = OR ( new_n2762_, new_n2733_ ) -new_n2764_ = AND ( new_n2763_, new_n2747_ ) -new_n2765_ = AND ( new_n2764_, new_n2714_ ) -new_n2766_ = NAND ( new_n2609_, new_n2607_, NET_589 ) -new_n2767_ = NAND ( new_n2587_, NET_740 ) -new_n2768_ = NOT ( NET_653 ) -new_n2769_ = OR ( new_n2597_, new_n2768_ ) -new_n2770_ = NOT ( NET_621 ) -new_n2771_ = OR ( new_n2604_, new_n2770_ ) -new_n2772_ = NAND ( new_n2771_, new_n2769_, new_n2767_, new_n2766_ ) -new_n2773_ = NAND ( new_n2772_, new_n2765_ ) -new_n2774_ = AND ( new_n2773_, new_n2759_, new_n2757_ ) -NET_10122 = NAND ( new_n2774_, new_n2746_, new_n2745_, new_n2726_ ) -new_n2776_ = NOR ( new_n1991_, new_n1915_ ) -new_n2777_ = NOT ( new_n2776_ ) -new_n2778_ = NAND ( new_n2777_, new_n1950_ ) -new_n2779_ = OR ( new_n2778_, new_n1968_ ) -new_n2780_ = AND ( new_n2012_, new_n1756_, new_n1754_ ) -new_n2781_ = NAND ( new_n2780_, new_n1750_, new_n1745_ ) -new_n2782_ = OR ( new_n2781_, new_n1950_ ) -new_n2783_ = NAND ( new_n2782_, new_n1920_ ) -new_n2784_ = OR ( new_n2783_, new_n1926_ ) -new_n2785_ = NOR ( new_n1946_, new_n1926_ ) -new_n2786_ = NOT ( new_n2785_ ) -new_n2787_ = NAND ( new_n1946_, new_n1926_ ) -new_n2788_ = NAND ( new_n2787_, new_n2786_ ) -new_n2789_ = NAND ( new_n2781_, new_n2777_ ) -new_n2790_ = OR ( new_n2789_, new_n2788_ ) -new_n2791_ = NAND ( new_n2790_, new_n2784_, new_n2779_ ) -new_n2792_ = OR ( new_n1836_, new_n1795_ ) -new_n2793_ = NAND ( new_n2792_, new_n1833_ ) -new_n2794_ = NAND ( new_n2793_, new_n1921_ ) -new_n2795_ = NAND ( new_n2794_, new_n1947_, NET_275 ) -new_n2796_ = AND ( new_n2795_, new_n1837_ ) -new_n2797_ = AND ( new_n2796_, new_n2791_ ) -new_n2798_ = AND ( new_n2795_, new_n1920_, new_n1841_, NET_275 ) -new_n2799_ = NAND ( new_n2798_, new_n1927_ ) -new_n2800_ = NOR ( new_n1920_, new_n1915_ ) -new_n2801_ = NAND ( new_n2800_, new_n1841_ ) -new_n2802_ = OR ( new_n1914_, new_n1833_ ) -new_n2803_ = NAND ( new_n2802_, new_n2801_ ) -new_n2804_ = NAND ( new_n2803_, new_n2795_, NET_275 ) -new_n2805_ = OR ( new_n2804_, new_n2788_ ) -new_n2806_ = NAND ( new_n2794_, new_n1947_, NET_275, NET_212 ) -new_n2807_ = NAND ( new_n2806_, new_n2805_, new_n2799_, new_n2041_ ) -NET_10194 = OR ( new_n2807_, new_n2797_ ) -new_n2809_ = NAND ( new_n2001_, new_n1870_ ) -new_n2810_ = OR ( new_n1601_, new_n1595_ ) -new_n2811_ = NAND ( new_n1601_, new_n1595_ ) -new_n2812_ = NAND ( new_n2811_, new_n2810_, new_n1589_ ) -new_n2813_ = OR ( new_n2811_, new_n1589_ ) -new_n2814_ = OR ( new_n1601_, new_n1596_ ) -new_n2815_ = NAND ( new_n2814_, new_n2813_, new_n2812_ ) -new_n2816_ = OR ( new_n2815_, new_n1531_ ) -new_n2817_ = OR ( new_n1530_, NET_459 ) -new_n2818_ = NAND ( new_n2817_, new_n2816_ ) -new_n2819_ = NAND ( new_n2818_, new_n1921_ ) -new_n2820_ = NOR ( NET_64, NET_34 ) -new_n2821_ = NOR ( NET_34, NET_33 ) -new_n2822_ = NOT ( NET_34 ) -new_n2823_ = NOR ( new_n2822_, new_n1923_ ) -new_n2824_ = NOR ( new_n2823_, new_n2821_ ) -new_n2825_ = NOR ( new_n2824_, new_n1694_ ) -new_n2826_ = NOR ( new_n2825_, new_n2820_ ) -new_n2827_ = OR ( new_n2826_, new_n1921_ ) -new_n2828_ = NAND ( new_n2827_, new_n2819_ ) -new_n2829_ = NOT ( new_n2828_ ) -new_n2830_ = NAND ( new_n2829_, new_n1942_ ) -new_n2831_ = NAND ( new_n2826_, new_n1953_ ) -new_n2832_ = NAND ( new_n2831_, new_n2830_, new_n2809_ ) -new_n2833_ = XOR ( new_n2832_, new_n1844_ ) -new_n2834_ = NAND ( new_n2001_, new_n1960_ ) -new_n2835_ = NAND ( new_n2829_, new_n1870_ ) -new_n2836_ = OR ( new_n1951_, new_n1998_ ) -new_n2837_ = OR ( new_n1952_, new_n1996_ ) -new_n2838_ = NAND ( new_n2837_, new_n2836_, new_n2835_, new_n2834_ ) -new_n2839_ = OR ( new_n2838_, new_n2833_ ) -new_n2840_ = NAND ( new_n2838_, new_n2833_ ) -new_n2841_ = NAND ( new_n2840_, new_n2839_ ) -new_n2842_ = NAND ( new_n1966_, new_n1955_ ) -new_n2843_ = NAND ( new_n2842_, new_n1957_ ) -new_n2844_ = XOR ( new_n2843_, new_n2841_ ) -new_n2845_ = NOR ( new_n2844_, new_n2016_ ) -new_n2846_ = NAND ( new_n2001_, new_n1976_ ) -new_n2847_ = NAND ( new_n2829_, new_n1978_ ) -new_n2848_ = XOR ( new_n2847_, new_n2846_ ) -new_n2849_ = XNOR ( new_n2848_, new_n1980_ ) -new_n2850_ = NOT ( new_n2849_ ) -new_n2851_ = NOR ( new_n2850_, new_n2020_ ) -new_n2852_ = OR ( new_n2026_, new_n2010_ ) -new_n2853_ = NAND ( new_n2852_, new_n2035_ ) -new_n2854_ = NAND ( new_n2853_, NET_265 ) -new_n2855_ = NAND ( new_n1901_, new_n1898_, NET_99 ) -new_n2856_ = NAND ( new_n1878_, NET_250 ) -new_n2857_ = NOT ( NET_163 ) -new_n2858_ = OR ( new_n1887_, new_n2857_ ) -new_n2859_ = NOT ( NET_131 ) -new_n2860_ = OR ( new_n1895_, new_n2859_ ) -new_n2861_ = NAND ( new_n2860_, new_n2858_, new_n2856_, new_n2855_ ) -new_n2862_ = NAND ( new_n2861_, new_n2043_ ) -new_n2863_ = NAND ( new_n2009_, NET_265 ) -new_n2864_ = NOR ( new_n2009_, new_n1920_ ) -new_n2865_ = NAND ( new_n2864_, new_n1903_ ) -new_n2866_ = NAND ( new_n2865_, new_n2863_, new_n2862_ ) -new_n2867_ = NAND ( new_n2866_, new_n2042_ ) -new_n2868_ = NAND ( NET_35973, NET_265 ) -new_n2869_ = OR ( new_n2828_, new_n2039_ ) -new_n2870_ = NAND ( new_n2869_, new_n2868_, new_n2867_, new_n2854_ ) -NET_10195 = OR ( new_n2870_, new_n2851_, new_n2845_ ) -new_n2872_ = NAND ( new_n1846_, new_n1739_ ) -new_n2873_ = AND ( new_n2872_, new_n1757_ ) -new_n2874_ = OR ( new_n2873_, new_n1968_ ) -new_n2875_ = NOT ( new_n1982_ ) -new_n2876_ = NOR ( new_n1747_, new_n1725_ ) -new_n2877_ = NAND ( new_n2876_, new_n1744_ ) -new_n2878_ = NAND ( new_n2877_, new_n1973_ ) -new_n2879_ = NAND ( new_n2878_, new_n2875_ ) -new_n2880_ = NAND ( new_n2001_, new_n1992_ ) -new_n2881_ = NAND ( new_n1985_, new_n1826_ ) -new_n2882_ = NAND ( new_n2881_, new_n1929_ ) -new_n2883_ = NAND ( new_n2882_, new_n2880_, new_n2879_, new_n2874_ ) -new_n2884_ = NOR ( new_n1744_, new_n1725_ ) -new_n2885_ = NAND ( new_n2884_, new_n1938_ ) -new_n2886_ = OR ( new_n1932_, new_n1748_ ) -new_n2887_ = NOR ( new_n2876_, new_n1795_ ) -new_n2888_ = NAND ( new_n2887_, new_n1938_ ) -new_n2889_ = NAND ( new_n2888_, new_n2886_, new_n2885_ ) -new_n2890_ = AND ( new_n1837_, new_n1824_ ) -new_n2891_ = NAND ( new_n2890_, new_n2889_ ) -new_n2892_ = NOT ( new_n2891_ ) -new_n2893_ = NAND ( new_n2892_, new_n2883_ ) -new_n2894_ = NAND ( new_n2891_, NET_97 ) -NET_10196 = NAND ( new_n2894_, new_n2893_ ) -new_n2896_ = NAND ( new_n2884_, new_n1859_ ) -new_n2897_ = OR ( new_n1931_, new_n1748_ ) -new_n2898_ = NAND ( new_n2887_, new_n1859_ ) -new_n2899_ = NAND ( new_n2898_, new_n2897_, new_n2896_ ) -new_n2900_ = NAND ( new_n2899_, new_n2890_ ) -new_n2901_ = NOT ( new_n2900_ ) -new_n2902_ = NAND ( new_n2901_, new_n2883_ ) -new_n2903_ = NAND ( new_n2900_, NET_129 ) -NET_10197 = NAND ( new_n2903_, new_n2902_ ) -new_n2905_ = AND ( new_n2376_, new_n2274_ ) -new_n2906_ = NOT ( NET_214 ) -new_n2907_ = NAND ( new_n1530_, new_n2906_ ) -new_n2908_ = OR ( new_n2815_, new_n1530_ ) -new_n2909_ = NAND ( new_n2908_, new_n2907_ ) -new_n2910_ = NAND ( new_n2909_, new_n2290_ ) -new_n2911_ = NOR ( NET_309, NET_279 ) -new_n2912_ = NOT ( NET_279 ) -new_n2913_ = NOR ( new_n2912_, new_n2292_ ) -new_n2914_ = NOR ( new_n2913_, new_n2067_ ) -new_n2915_ = NOR ( new_n2914_, new_n2056_ ) -new_n2916_ = NOR ( new_n2915_, new_n2911_ ) -new_n2917_ = NOT ( new_n2916_ ) -new_n2918_ = NAND ( new_n2917_, new_n2289_ ) -new_n2919_ = NAND ( new_n2918_, new_n2910_ ) -new_n2920_ = OR ( new_n2919_, new_n2309_ ) -new_n2921_ = NAND ( new_n2916_, new_n2325_ ) -new_n2922_ = OR ( new_n2328_, new_n2373_ ) -new_n2923_ = OR ( new_n2330_, new_n2371_ ) -new_n2924_ = NAND ( new_n2923_, new_n2922_, new_n2921_, new_n2920_ ) -new_n2925_ = NOR ( new_n2924_, new_n2905_ ) -new_n2926_ = XNOR ( new_n2925_, new_n2218_ ) -new_n2927_ = NOT ( new_n2926_ ) -new_n2928_ = NOR ( new_n2919_, new_n2273_ ) -new_n2929_ = NAND ( new_n2376_, new_n2336_ ) -new_n2930_ = OR ( new_n2917_, new_n2338_ ) -new_n2931_ = OR ( new_n2323_, new_n2373_ ) -new_n2932_ = OR ( new_n2324_, new_n2371_ ) -new_n2933_ = NAND ( new_n2932_, new_n2931_, new_n2930_, new_n2929_ ) -new_n2934_ = NOR ( new_n2933_, new_n2928_ ) -new_n2935_ = NAND ( new_n2934_, new_n2927_ ) -new_n2936_ = OR ( new_n2934_, new_n2927_ ) -new_n2937_ = NAND ( new_n2936_, new_n2935_ ) -new_n2938_ = OR ( new_n2344_, new_n2333_ ) -new_n2939_ = NAND ( new_n2333_, new_n2218_ ) -new_n2940_ = NAND ( new_n2939_, new_n2938_ ) -new_n2941_ = XNOR ( new_n2940_, new_n2937_ ) -new_n2942_ = OR ( new_n2202_, new_n2203_ ) -new_n2943_ = NAND ( new_n2204_, new_n2137_ ) -new_n2944_ = NAND ( new_n2312_, new_n2180_ ) -new_n2945_ = AND ( new_n2944_, new_n2387_ ) -new_n2946_ = NAND ( new_n2945_, new_n2943_, new_n2942_, new_n2216_ ) -new_n2947_ = OR ( new_n2946_, new_n2200_ ) -new_n2948_ = NAND ( new_n2947_, new_n2941_, new_n2359_ ) -new_n2949_ = OR ( new_n2919_, new_n2349_ ) -new_n2950_ = NAND ( new_n2376_, new_n2349_ ) -new_n2951_ = NAND ( new_n2950_, new_n2949_ ) -new_n2952_ = XOR ( new_n2951_, new_n2349_ ) -new_n2953_ = OR ( new_n2919_, new_n2348_ ) -new_n2954_ = NAND ( new_n2953_, new_n2952_ ) -new_n2955_ = OR ( new_n2953_, new_n2952_ ) -new_n2956_ = NAND ( new_n2955_, new_n2954_ ) -new_n2957_ = NAND ( new_n2356_, new_n2352_ ) -new_n2958_ = NAND ( new_n2957_, new_n2354_ ) -new_n2959_ = XNOR ( new_n2958_, new_n2956_ ) -new_n2960_ = OR ( new_n2959_, new_n2362_ ) -new_n2961_ = OR ( new_n2919_, new_n2364_ ) -new_n2962_ = NAND ( new_n2196_, NET_407 ) -new_n2963_ = NAND ( new_n2380_, NET_510 ) -new_n2964_ = AND ( new_n2963_, new_n2962_, new_n2961_ ) -new_n2965_ = NOT ( new_n2283_ ) -new_n2966_ = NOR ( new_n2965_, new_n2366_ ) -new_n2967_ = NOT ( new_n2966_ ) -new_n2968_ = NOR ( new_n2967_, new_n2196_ ) -new_n2969_ = NAND ( new_n2968_, new_n2252_ ) -new_n2970_ = NAND ( new_n2250_, new_n2248_, NET_344 ) -new_n2971_ = NAND ( new_n2228_, NET_495 ) -new_n2972_ = NOT ( NET_408 ) -new_n2973_ = OR ( new_n2238_, new_n2972_ ) -new_n2974_ = NOT ( NET_376 ) -new_n2975_ = OR ( new_n2245_, new_n2974_ ) -new_n2976_ = NAND ( new_n2975_, new_n2973_, new_n2971_, new_n2970_ ) -new_n2977_ = NAND ( new_n2976_, new_n2369_ ) -new_n2978_ = AND ( new_n2977_, new_n2969_ ) -NET_10230 = NAND ( new_n2978_, new_n2964_, new_n2960_, new_n2948_ ) -new_n2980_ = NAND ( new_n2320_, new_n2318_, new_n2315_, new_n2186_ ) -new_n2981_ = NOR ( new_n2980_, new_n2314_ ) -new_n2982_ = NOR ( new_n2287_, new_n2283_ ) -new_n2983_ = OR ( new_n2982_, new_n2981_ ) -new_n2984_ = OR ( new_n2983_, new_n2346_ ) -new_n2985_ = NOR ( new_n2946_, new_n2264_ ) -new_n2986_ = NAND ( new_n2985_, new_n2981_ ) -new_n2987_ = NAND ( new_n2986_, new_n2965_ ) -new_n2988_ = NOT ( new_n2987_ ) -new_n2989_ = NAND ( new_n2988_, new_n2295_ ) -new_n2990_ = NOR ( new_n2288_, new_n2209_ ) -new_n2991_ = NOR ( new_n2990_, new_n2327_ ) -new_n2992_ = OR ( new_n2991_, new_n2240_ ) -new_n2993_ = OR ( new_n2287_, new_n2230_ ) -new_n2994_ = NAND ( new_n2993_, new_n2992_ ) -new_n2995_ = NAND ( new_n2994_, new_n2295_ ) -new_n2996_ = OR ( new_n2994_, new_n2295_ ) -new_n2997_ = NAND ( new_n2996_, new_n2995_ ) -new_n2998_ = NOR ( new_n2985_, new_n2982_ ) -new_n2999_ = NOT ( new_n2998_ ) -new_n3000_ = OR ( new_n2999_, new_n2997_ ) -new_n3001_ = NAND ( new_n3000_, new_n2989_, new_n2984_ ) -new_n3002_ = OR ( new_n2194_, new_n2151_ ) -new_n3003_ = NAND ( new_n3002_, new_n2209_ ) -new_n3004_ = NAND ( new_n3003_, new_n2290_ ) -new_n3005_ = NAND ( new_n3004_, new_n2405_, NET_520 ) -new_n3006_ = AND ( new_n3005_, new_n2195_ ) -new_n3007_ = NAND ( new_n3006_, new_n3001_ ) -new_n3008_ = NAND ( NET_35978, new_n2283_ ) -new_n3009_ = OR ( new_n3008_, new_n2346_ ) -new_n3010_ = NAND ( new_n3005_, new_n2407_, new_n2965_ ) -new_n3011_ = NAND ( NET_35978, new_n2965_ ) -new_n3012_ = NAND ( new_n3011_, new_n3010_ ) -new_n3013_ = NAND ( new_n3012_, new_n2295_ ) -new_n3014_ = AND ( new_n2288_, new_n2283_, new_n2193_ ) -new_n3015_ = OR ( new_n3014_, new_n2990_ ) -new_n3016_ = NAND ( new_n3015_, new_n3005_, NET_520 ) -new_n3017_ = OR ( new_n3016_, new_n2997_ ) -new_n3018_ = NAND ( new_n3004_, new_n2405_, NET_520, NET_457 ) -new_n3019_ = AND ( new_n3018_, new_n3017_, new_n2414_ ) -NET_10231 = NAND ( new_n3019_, new_n3013_, new_n3009_, new_n3007_ ) -new_n3021_ = NOT ( new_n2941_ ) -new_n3022_ = NOR ( new_n3021_, new_n2390_ ) -new_n3023_ = NOR ( new_n2959_, new_n2393_ ) -new_n3024_ = OR ( new_n2398_, new_n2385_ ) -new_n3025_ = NAND ( new_n3024_, new_n2408_ ) -new_n3026_ = NAND ( new_n3025_, NET_510 ) -new_n3027_ = NAND ( new_n2976_, new_n2416_ ) -new_n3028_ = NAND ( new_n2384_, NET_510 ) -new_n3029_ = NOR ( new_n2384_, new_n2965_ ) -new_n3030_ = NAND ( new_n3029_, new_n2252_ ) -new_n3031_ = NAND ( new_n3030_, new_n3028_, new_n3027_ ) -new_n3032_ = NAND ( new_n3031_, new_n2415_ ) -new_n3033_ = NAND ( NET_35976, NET_510 ) -new_n3034_ = OR ( new_n2919_, new_n2412_ ) -new_n3035_ = NAND ( new_n3034_, new_n3033_, new_n3032_, new_n3026_ ) -NET_10232 = OR ( new_n3035_, new_n3023_, new_n3022_ ) -new_n3037_ = NOR ( new_n2215_, new_n2206_ ) -new_n3038_ = OR ( new_n3037_, new_n2346_ ) -new_n3039_ = NOR ( new_n2349_, new_n2149_ ) -new_n3040_ = NOT ( new_n3039_ ) -new_n3041_ = AND ( new_n3040_, new_n2360_, new_n2315_ ) -new_n3042_ = OR ( new_n3041_, new_n2358_ ) -new_n3043_ = NAND ( new_n2376_, new_n2367_ ) -new_n3044_ = NAND ( new_n2313_, new_n2184_ ) -new_n3045_ = NOT ( new_n3044_ ) -new_n3046_ = OR ( new_n3045_, new_n2297_ ) -new_n3047_ = NAND ( new_n3046_, new_n3043_, new_n3042_, new_n3038_ ) -new_n3048_ = NOR ( new_n3039_, new_n2151_ ) -new_n3049_ = OR ( new_n3048_, new_n2138_ ) -new_n3050_ = NAND ( new_n3049_, new_n2195_, new_n2178_ ) -new_n3051_ = NOR ( new_n3050_, new_n2255_ ) -new_n3052_ = NAND ( new_n3051_, new_n3047_ ) -new_n3053_ = NOT ( new_n3051_ ) -new_n3054_ = NAND ( new_n3053_, NET_342 ) -NET_10233 = NAND ( new_n3054_, new_n3052_ ) -new_n3056_ = NOT ( new_n2253_ ) -new_n3057_ = NOR ( new_n3050_, new_n3056_ ) -new_n3058_ = NAND ( new_n3057_, new_n3047_ ) -new_n3059_ = OR ( new_n3057_, new_n2240_ ) -NET_10234 = NAND ( new_n3059_, new_n3058_ ) -new_n3061_ = NOT ( NET_479 ) -new_n3062_ = NOR ( new_n3061_, NET_234 ) -new_n3063_ = NOT ( NET_234 ) -new_n3064_ = NOR ( NET_479, new_n3063_ ) -new_n3065_ = OR ( new_n3064_, new_n3062_ ) -new_n3066_ = NOR ( new_n2526_, NET_459 ) -new_n3067_ = OR ( new_n3066_, NET_214 ) -new_n3068_ = NAND ( new_n2526_, NET_459 ) -new_n3069_ = NAND ( new_n3068_, new_n3067_ ) -new_n3070_ = NOT ( new_n3069_ ) -new_n3071_ = NOT ( NET_215 ) -new_n3072_ = NOR ( NET_460, new_n3071_ ) -new_n3073_ = NOR ( new_n3072_, new_n3070_ ) -new_n3074_ = NOR ( new_n1605_, NET_215 ) -new_n3075_ = NOR ( new_n3074_, new_n3073_ ) -new_n3076_ = NOT ( NET_216 ) -new_n3077_ = NOR ( NET_461, new_n3076_ ) -new_n3078_ = NOR ( new_n3077_, new_n3075_ ) -new_n3079_ = NOR ( new_n1614_, NET_216 ) -new_n3080_ = NOR ( new_n3079_, new_n3078_ ) -new_n3081_ = NOT ( NET_217 ) -new_n3082_ = NOR ( NET_462, new_n3081_ ) -new_n3083_ = NOR ( new_n3082_, new_n3080_ ) -new_n3084_ = NOR ( new_n1584_, NET_217 ) -new_n3085_ = NOR ( new_n3084_, new_n3083_ ) -new_n3086_ = NOT ( NET_218 ) -new_n3087_ = NOR ( NET_463, new_n3086_ ) -new_n3088_ = NOR ( new_n3087_, new_n3085_ ) -new_n3089_ = NOR ( new_n1626_, NET_218 ) -new_n3090_ = NOR ( new_n3089_, new_n3088_ ) -new_n3091_ = NOT ( NET_219 ) -new_n3092_ = NOR ( NET_464, new_n3091_ ) -new_n3093_ = NOR ( new_n3092_, new_n3090_ ) -new_n3094_ = NOR ( new_n1578_, NET_219 ) -new_n3095_ = NOR ( new_n3094_, new_n3093_ ) -new_n3096_ = NOT ( NET_220 ) -new_n3097_ = NOR ( NET_465, new_n3096_ ) -new_n3098_ = NOR ( new_n3097_, new_n3095_ ) -new_n3099_ = NOR ( new_n1571_, NET_220 ) -new_n3100_ = NOR ( new_n3099_, new_n3098_ ) -new_n3101_ = NOT ( NET_221 ) -new_n3102_ = NOR ( NET_466, new_n3101_ ) -new_n3103_ = NOR ( new_n3102_, new_n3100_ ) -new_n3104_ = NOR ( new_n1640_, NET_221 ) -new_n3105_ = NOR ( new_n3104_, new_n3103_ ) -new_n3106_ = NOT ( NET_222 ) -new_n3107_ = NOR ( NET_467, new_n3106_ ) -new_n3108_ = NOR ( new_n3107_, new_n3105_ ) -new_n3109_ = NOR ( new_n1649_, NET_222 ) -new_n3110_ = NOR ( new_n3109_, new_n3108_ ) -new_n3111_ = NOT ( NET_223 ) -new_n3112_ = NOR ( NET_468, new_n3111_ ) -new_n3113_ = NOR ( new_n3112_, new_n3110_ ) -new_n3114_ = NOR ( new_n1563_, NET_223 ) -new_n3115_ = NOR ( new_n3114_, new_n3113_ ) -new_n3116_ = NOT ( NET_224 ) -new_n3117_ = NOR ( NET_469, new_n3116_ ) -new_n3118_ = NOR ( new_n3117_, new_n3115_ ) -new_n3119_ = NOR ( new_n1556_, NET_224 ) -new_n3120_ = NOR ( new_n3119_, new_n3118_ ) -new_n3121_ = NOT ( NET_225 ) -new_n3122_ = NOR ( NET_470, new_n3121_ ) -new_n3123_ = NOR ( new_n3122_, new_n3120_ ) -new_n3124_ = NOR ( new_n1663_, NET_225 ) -new_n3125_ = NOR ( new_n3124_, new_n3123_ ) -new_n3126_ = NOT ( NET_226 ) -new_n3127_ = NOR ( NET_471, new_n3126_ ) -new_n3128_ = NOR ( new_n3127_, new_n3125_ ) -new_n3129_ = NOR ( new_n1672_, NET_226 ) -new_n3130_ = NOR ( new_n3129_, new_n3128_ ) -new_n3131_ = NOT ( NET_227 ) -new_n3132_ = NOR ( NET_472, new_n3131_ ) -new_n3133_ = NOR ( new_n3132_, new_n3130_ ) -new_n3134_ = NOR ( new_n1548_, NET_227 ) -new_n3135_ = NOR ( new_n3134_, new_n3133_ ) -new_n3136_ = NOT ( NET_228 ) -new_n3137_ = NOR ( NET_473, new_n3136_ ) -new_n3138_ = NOR ( new_n3137_, new_n3135_ ) -new_n3139_ = NOR ( new_n1541_, NET_228 ) -new_n3140_ = NOR ( new_n3139_, new_n3138_ ) -new_n3141_ = NOR ( NET_474, new_n2047_ ) -new_n3142_ = NOR ( new_n3141_, new_n3140_ ) -new_n3143_ = NOR ( new_n1533_, NET_229 ) -new_n3144_ = NOR ( new_n3143_, new_n3142_ ) -new_n3145_ = NOT ( NET_230 ) -new_n3146_ = NOR ( NET_475, new_n3145_ ) -new_n3147_ = NOR ( new_n3146_, new_n3144_ ) -new_n3148_ = NOT ( NET_475 ) -new_n3149_ = NOR ( new_n3148_, NET_230 ) -new_n3150_ = NOR ( new_n3149_, new_n3147_ ) -new_n3151_ = NOT ( NET_231 ) -new_n3152_ = NOR ( NET_476, new_n3151_ ) -new_n3153_ = NOR ( new_n3152_, new_n3150_ ) -new_n3154_ = NOT ( NET_476 ) -new_n3155_ = NOR ( new_n3154_, NET_231 ) -new_n3156_ = NOR ( new_n3155_, new_n3153_ ) -new_n3157_ = NOT ( NET_232 ) -new_n3158_ = NOR ( NET_477, new_n3157_ ) -new_n3159_ = NOR ( new_n3158_, new_n3156_ ) -new_n3160_ = NOT ( NET_477 ) -new_n3161_ = NOR ( new_n3160_, NET_232 ) -new_n3162_ = NOR ( new_n3161_, new_n3159_ ) -new_n3163_ = NOT ( NET_233 ) -new_n3164_ = NOR ( NET_478, new_n3163_ ) -new_n3165_ = NOR ( new_n3164_, new_n3162_ ) -new_n3166_ = NOT ( NET_478 ) -new_n3167_ = NOR ( new_n3166_, NET_233 ) -new_n3168_ = NOR ( new_n3167_, new_n3165_ ) -new_n3169_ = XOR ( new_n3168_, new_n3065_ ) -new_n3170_ = NAND ( new_n3169_, new_n1530_ ) -new_n3171_ = OR ( new_n1530_, NET_11 ) -new_n3172_ = NAND ( new_n3171_, new_n3170_ ) -new_n3173_ = OR ( new_n3172_, NET_765 ) -NET_35979 = NOT ( NET_765 ) -new_n3175_ = OR ( NET_35979, NET_554 ) -new_n3176_ = OR ( new_n3175_, new_n2424_ ) -new_n3177_ = NOR ( NET_35979, new_n2461_ ) -new_n3178_ = NOT ( new_n3177_ ) -new_n3179_ = OR ( new_n3178_, new_n2487_ ) -NET_10262 = NAND ( new_n3179_, new_n3176_, new_n3173_ ) -new_n3181_ = OR ( new_n2722_, new_n2506_ ) -new_n3182_ = OR ( new_n3181_, new_n2515_ ) -new_n3183_ = NAND ( new_n3182_, new_n2707_ ) -new_n3184_ = NAND ( new_n2697_, new_n2518_ ) -new_n3185_ = NOT ( new_n3184_ ) -new_n3186_ = NAND ( new_n3185_, new_n3183_ ) -new_n3187_ = NAND ( new_n2667_, new_n2515_ ) -new_n3188_ = NAND ( new_n3187_, new_n2495_ ) -new_n3189_ = NAND ( new_n3188_, new_n2489_ ) -new_n3190_ = NOR ( new_n2500_, new_n2490_ ) -new_n3191_ = OR ( new_n3190_, new_n2667_ ) -new_n3192_ = NAND ( new_n3191_, new_n3189_ ) -new_n3193_ = NAND ( new_n2697_, new_n2568_ ) -new_n3194_ = NOT ( new_n3193_ ) -new_n3195_ = NAND ( new_n3194_, new_n3192_ ) -new_n3196_ = NAND ( new_n3195_, new_n3186_ ) -new_n3197_ = NAND ( new_n3196_, new_n2712_ ) -new_n3198_ = NOT ( new_n3197_ ) -new_n3199_ = OR ( new_n2740_, new_n2515_ ) -new_n3200_ = NAND ( new_n3199_, new_n2724_ ) -new_n3201_ = OR ( new_n3200_, new_n2511_ ) -new_n3202_ = NAND ( new_n3201_, new_n3198_ ) -new_n3203_ = OR ( new_n3074_, new_n3072_ ) -new_n3204_ = XOR ( new_n3203_, new_n3069_ ) -new_n3205_ = NAND ( new_n3204_, new_n1530_ ) -new_n3206_ = OR ( new_n1530_, new_n1604_ ) -new_n3207_ = NAND ( new_n3206_, new_n3205_ ) -new_n3208_ = OR ( new_n3207_, new_n2735_ ) -new_n3209_ = NOR ( NET_554, new_n2435_ ) -new_n3210_ = OR ( new_n2436_, new_n2435_ ) -new_n3211_ = NAND ( new_n3210_, new_n2437_ ) -new_n3212_ = NOR ( new_n3211_, new_n2461_ ) -new_n3213_ = NOR ( new_n3212_, new_n3209_ ) -new_n3214_ = NOT ( new_n3213_ ) -new_n3215_ = OR ( new_n3214_, new_n2543_ ) -new_n3216_ = NAND ( new_n3215_, new_n3208_ ) -new_n3217_ = OR ( new_n3216_, new_n2524_ ) -new_n3218_ = NAND ( new_n2772_, new_n2579_ ) -new_n3219_ = OR ( new_n3213_, new_n2613_ ) -new_n3220_ = NAND ( new_n3219_, new_n3218_, new_n3217_ ) -new_n3221_ = XOR ( new_n3220_, new_n2618_ ) -new_n3222_ = NAND ( new_n2772_, new_n2620_ ) -new_n3223_ = OR ( new_n3216_, new_n2578_ ) -new_n3224_ = OR ( new_n2624_, new_n2768_ ) -new_n3225_ = OR ( new_n2626_, new_n2770_ ) -new_n3226_ = NAND ( new_n3225_, new_n3224_, new_n3223_, new_n3222_ ) -new_n3227_ = OR ( new_n3226_, new_n3221_ ) -new_n3228_ = NAND ( new_n3226_, new_n3221_ ) -new_n3229_ = NAND ( new_n3228_, new_n3227_ ) -new_n3230_ = NAND ( new_n2660_, new_n2629_ ) -new_n3231_ = NAND ( new_n3230_, new_n3229_, new_n2630_ ) -new_n3232_ = NAND ( new_n3230_, new_n2630_ ) -new_n3233_ = NAND ( new_n3232_, new_n3228_, new_n3227_ ) -new_n3234_ = NAND ( new_n3233_, new_n3231_ ) -new_n3235_ = OR ( new_n3234_, new_n3202_ ) -new_n3236_ = OR ( new_n3213_, new_n2732_ ) -new_n3237_ = NAND ( new_n3207_, new_n2543_ ) -new_n3238_ = NAND ( new_n3237_, new_n3236_ ) -new_n3239_ = NOT ( new_n2740_ ) -new_n3240_ = NOR ( new_n3197_, new_n3239_ ) -new_n3241_ = NAND ( new_n3240_, new_n3238_ ) -new_n3242_ = NAND ( new_n3197_, NET_589 ) -new_n3243_ = AND ( new_n3198_, new_n2764_ ) -new_n3244_ = NAND ( new_n2609_, new_n2607_, NET_590 ) -new_n3245_ = NOT ( NET_759 ) -new_n3246_ = NAND ( new_n2587_, new_n3245_ ) -new_n3247_ = NOT ( NET_654 ) -new_n3248_ = OR ( new_n2597_, new_n3247_ ) -new_n3249_ = NOT ( NET_622 ) -new_n3250_ = OR ( new_n2604_, new_n3249_ ) -new_n3251_ = NAND ( new_n3250_, new_n3248_, new_n3246_, new_n3244_ ) -new_n3252_ = NAND ( new_n3251_, new_n3243_ ) -new_n3253_ = AND ( new_n3198_, new_n2755_ ) -new_n3254_ = NAND ( new_n3253_, new_n2611_ ) -new_n3255_ = AND ( new_n3254_, new_n3252_ ) -NET_10263 = NAND ( new_n3255_, new_n3242_, new_n3241_, new_n3235_ ) -new_n3257_ = NAND ( new_n3190_, new_n2506_ ) -new_n3258_ = NAND ( new_n3257_, new_n3191_, new_n3181_ ) -new_n3259_ = NAND ( new_n3258_, new_n2702_, new_n2697_ ) -new_n3260_ = NAND ( new_n2708_, new_n2698_ ) -new_n3261_ = NAND ( new_n3260_, new_n3259_ ) -new_n3262_ = NAND ( new_n3261_, new_n2712_ ) -new_n3263_ = NOT ( new_n3262_ ) -new_n3264_ = NAND ( new_n3263_, new_n3201_ ) -new_n3265_ = OR ( new_n3264_, new_n3234_ ) -new_n3266_ = NOR ( new_n3262_, new_n3239_ ) -new_n3267_ = NAND ( new_n3266_, new_n3238_ ) -new_n3268_ = NAND ( new_n3262_, NET_621 ) -new_n3269_ = AND ( new_n3263_, new_n2764_ ) -new_n3270_ = NAND ( new_n3269_, new_n3251_ ) -new_n3271_ = AND ( new_n3263_, new_n2755_ ) -new_n3272_ = NAND ( new_n3271_, new_n2611_ ) -new_n3273_ = AND ( new_n3272_, new_n3270_ ) -NET_10264 = NAND ( new_n3273_, new_n3268_, new_n3267_, new_n3265_ ) -NET_35981 = NOR ( new_n2613_, NET_35979 ) -new_n3276_ = NAND ( NET_35981, new_n2542_ ) -new_n3277_ = OR ( new_n3276_, new_n3234_ ) -new_n3278_ = AND ( new_n2701_, new_n2705_, new_n2502_ ) -new_n3279_ = NAND ( new_n3278_, new_n2741_, new_n2739_, new_n2720_ ) -new_n3280_ = NAND ( new_n3279_, new_n2623_ ) -new_n3281_ = NOT ( new_n3280_ ) -new_n3282_ = NOR ( new_n2559_, new_n2535_ ) -new_n3283_ = NOR ( new_n3282_, new_n3281_ ) -new_n3284_ = OR ( new_n3283_, new_n2768_ ) -new_n3285_ = NAND ( new_n3279_, new_n2559_, new_n2535_ ) -new_n3286_ = NAND ( new_n2560_, new_n2535_ ) -new_n3287_ = NAND ( new_n3286_, new_n3285_ ) -new_n3288_ = NAND ( new_n3287_, NET_621 ) -new_n3289_ = NAND ( new_n3288_, new_n3284_ ) -new_n3290_ = NAND ( new_n3289_, new_n3213_ ) -new_n3291_ = OR ( new_n3289_, new_n3213_ ) -new_n3292_ = NAND ( new_n3291_, new_n3290_ ) -new_n3293_ = NOR ( new_n3283_, new_n2633_ ) -new_n3294_ = NAND ( new_n3287_, NET_619 ) -new_n3295_ = NOT ( new_n3294_ ) -new_n3296_ = NOR ( new_n3295_, new_n3293_ ) -new_n3297_ = NOR ( new_n3296_, new_n2647_ ) -new_n3298_ = OR ( new_n3283_, new_n2589_ ) -new_n3299_ = NAND ( new_n3287_, NET_620 ) -new_n3300_ = NAND ( new_n3299_, new_n3298_ ) -new_n3301_ = NOR ( new_n3300_, new_n3297_ ) -new_n3302_ = OR ( new_n3301_, new_n2551_ ) -new_n3303_ = NAND ( new_n3300_, new_n3297_ ) -new_n3304_ = NAND ( new_n3303_, new_n3302_ ) -new_n3305_ = NAND ( new_n3304_, new_n3292_ ) -new_n3306_ = OR ( new_n3304_, new_n3292_ ) -new_n3307_ = NOR ( new_n2559_, NET_35979 ) -new_n3308_ = NAND ( new_n3307_, new_n2541_ ) -new_n3309_ = NOT ( new_n2747_ ) -new_n3310_ = NAND ( new_n3309_, new_n2561_ ) -new_n3311_ = NAND ( new_n3310_, new_n2559_ ) -new_n3312_ = NAND ( new_n3311_, new_n2543_ ) -NET_35980 = NAND ( new_n3312_, NET_765 ) -new_n3314_ = OR ( NET_35980, new_n2614_ ) -new_n3315_ = NAND ( new_n3314_, new_n3279_, new_n2712_, new_n2541_ ) -new_n3316_ = NAND ( new_n3315_, new_n3308_ ) -new_n3317_ = NAND ( new_n3316_, new_n3306_, new_n3305_ ) -new_n3318_ = NAND ( new_n3314_, new_n3307_, new_n2542_ ) -new_n3319_ = OR ( NET_35981, new_n2542_ ) -new_n3320_ = NAND ( new_n3314_, new_n3279_, new_n2712_ ) -new_n3321_ = NAND ( new_n3320_, new_n2542_ ) -new_n3322_ = NAND ( new_n3321_, new_n3319_ ) -new_n3323_ = NAND ( new_n3322_, new_n3318_ ) -new_n3324_ = NAND ( new_n3323_, new_n3214_ ) -new_n3325_ = NOT ( NET_700 ) -new_n3326_ = OR ( new_n3314_, new_n3325_ ) -new_n3327_ = NAND ( NET_35979, NET_740 ) -new_n3328_ = AND ( new_n3327_, new_n3326_, new_n3324_ ) -NET_10265 = NAND ( new_n3328_, new_n3317_, new_n3277_ ) -new_n3330_ = NAND ( new_n2668_, new_n2705_ ) -new_n3331_ = AND ( new_n3330_, new_n2738_ ) -new_n3332_ = OR ( new_n3331_, new_n2489_ ) -new_n3333_ = OR ( new_n3181_, new_n2500_ ) -new_n3334_ = OR ( new_n2667_, new_n2512_ ) -new_n3335_ = NAND ( new_n3334_, new_n3333_, new_n3332_, new_n2724_ ) -new_n3336_ = NAND ( new_n3335_, new_n3185_ ) -new_n3337_ = OR ( new_n3193_, new_n3182_ ) -new_n3338_ = NAND ( new_n3337_, new_n3336_ ) -new_n3339_ = NAND ( new_n3338_, new_n2712_ ) -new_n3340_ = OR ( new_n3339_, new_n3234_ ) -new_n3341_ = NOT ( NET_35981 ) -new_n3342_ = NOT ( new_n3307_ ) -new_n3343_ = NAND ( new_n3335_, new_n3184_ ) -new_n3344_ = OR ( new_n3194_, new_n3182_ ) -new_n3345_ = OR ( new_n3309_, new_n2501_ ) -new_n3346_ = NAND ( new_n3345_, new_n3344_, new_n3343_ ) -new_n3347_ = NAND ( new_n3346_, new_n2712_ ) -new_n3348_ = NAND ( new_n2742_, new_n2712_ ) -new_n3349_ = OR ( new_n3348_, new_n3185_ ) -new_n3350_ = NAND ( new_n3349_, new_n3347_, new_n3342_, new_n3341_ ) -new_n3351_ = NAND ( new_n3350_, NET_740 ) -new_n3352_ = AND ( new_n3194_, new_n2763_ ) -new_n3353_ = NAND ( new_n3352_, new_n3251_ ) -new_n3354_ = NAND ( new_n3193_, NET_740 ) -new_n3355_ = AND ( new_n3194_, new_n2754_ ) -new_n3356_ = NAND ( new_n3355_, new_n2611_ ) -new_n3357_ = NAND ( new_n3356_, new_n3354_, new_n3353_ ) -new_n3358_ = NAND ( new_n2706_, new_n2559_ ) -new_n3359_ = NOR ( new_n3358_, new_n2503_, NET_35979 ) -new_n3360_ = NAND ( new_n3359_, new_n3357_ ) -new_n3361_ = NOR ( new_n3348_, new_n3184_ ) -new_n3362_ = NAND ( new_n3361_, new_n3238_ ) -new_n3363_ = NOR ( new_n2711_, new_n2701_ ) -new_n3364_ = NOT ( new_n3363_ ) -new_n3365_ = OR ( new_n3364_, new_n3216_ ) -new_n3366_ = AND ( new_n3365_, new_n3362_, new_n3327_ ) -NET_10266 = NAND ( new_n3366_, new_n3360_, new_n3351_, new_n3340_ ) -new_n3368_ = NOT ( NET_684 ) -new_n3369_ = NOT ( NET_196 ) -new_n3370_ = NOT ( NET_441 ) -new_n3371_ = NOR ( new_n3370_, new_n3369_ ) -new_n3372_ = NOT ( NET_197 ) -new_n3373_ = NOT ( NET_442 ) -new_n3374_ = NOR ( new_n3373_, new_n3372_ ) -new_n3375_ = NOT ( NET_198 ) -new_n3376_ = NOT ( NET_443 ) -new_n3377_ = NOR ( new_n3376_, new_n3375_ ) -new_n3378_ = NOT ( new_n3377_ ) -new_n3379_ = OR ( NET_443, NET_198 ) -new_n3380_ = NAND ( NET_446, NET_201 ) -new_n3381_ = NOT ( NET_202 ) -new_n3382_ = NOT ( NET_447 ) -new_n3383_ = NOR ( new_n3382_, new_n3381_ ) -new_n3384_ = NOT ( new_n3383_ ) -new_n3385_ = OR ( NET_447, NET_202 ) -new_n3386_ = NAND ( NET_451, NET_206 ) -new_n3387_ = NAND ( NET_453, NET_208 ) -new_n3388_ = NOT ( NET_456 ) -new_n3389_ = NAND ( NET_457, NET_212 ) -new_n3390_ = NAND ( new_n3389_, new_n3388_ ) -new_n3391_ = NAND ( new_n3390_, NET_211 ) -new_n3392_ = OR ( new_n3389_, new_n3388_ ) -new_n3393_ = NAND ( new_n3392_, new_n3391_ ) -new_n3394_ = OR ( NET_455, NET_210 ) -new_n3395_ = NAND ( new_n3394_, new_n3393_ ) -new_n3396_ = NAND ( NET_455, NET_210 ) -new_n3397_ = NAND ( new_n3396_, new_n3395_ ) -new_n3398_ = OR ( NET_454, NET_209 ) -new_n3399_ = NAND ( new_n3398_, new_n3397_ ) -new_n3400_ = NAND ( NET_454, NET_209 ) -new_n3401_ = NAND ( new_n3400_, new_n3399_ ) -new_n3402_ = OR ( NET_453, NET_208 ) -new_n3403_ = NAND ( new_n3402_, new_n3401_ ) -new_n3404_ = NAND ( new_n3403_, new_n3387_ ) -new_n3405_ = OR ( NET_452, NET_207 ) -new_n3406_ = NAND ( new_n3405_, new_n3404_ ) -new_n3407_ = NAND ( NET_452, NET_207 ) -new_n3408_ = NAND ( new_n3407_, new_n3406_ ) -new_n3409_ = OR ( NET_451, NET_206 ) -new_n3410_ = NAND ( new_n3409_, new_n3408_ ) -new_n3411_ = NAND ( new_n3410_, new_n3386_ ) -new_n3412_ = OR ( NET_450, NET_205 ) -new_n3413_ = NAND ( new_n3412_, new_n3411_ ) -new_n3414_ = NAND ( NET_450, NET_205 ) -new_n3415_ = NAND ( new_n3414_, new_n3413_ ) -new_n3416_ = OR ( NET_449, NET_204 ) -new_n3417_ = NAND ( new_n3416_, new_n3415_ ) -new_n3418_ = NAND ( NET_449, NET_204 ) -new_n3419_ = NAND ( new_n3418_, new_n3417_ ) -new_n3420_ = OR ( NET_448, NET_203 ) -new_n3421_ = NAND ( new_n3420_, new_n3419_ ) -new_n3422_ = NAND ( NET_448, NET_203 ) -new_n3423_ = NAND ( new_n3422_, new_n3421_ ) -new_n3424_ = NAND ( new_n3423_, new_n3385_ ) -new_n3425_ = NAND ( new_n3424_, new_n3384_ ) -new_n3426_ = OR ( NET_446, NET_201 ) -new_n3427_ = NAND ( new_n3426_, new_n3425_ ) -new_n3428_ = NAND ( new_n3427_, new_n3380_ ) -new_n3429_ = OR ( NET_445, NET_200 ) -new_n3430_ = NAND ( new_n3429_, new_n3428_ ) -new_n3431_ = NAND ( NET_445, NET_200 ) -new_n3432_ = NAND ( new_n3431_, new_n3430_ ) -new_n3433_ = OR ( NET_444, NET_199 ) -new_n3434_ = NAND ( new_n3433_, new_n3432_ ) -new_n3435_ = NAND ( NET_444, NET_199 ) -new_n3436_ = NAND ( new_n3435_, new_n3434_ ) -new_n3437_ = NAND ( new_n3436_, new_n3379_ ) -new_n3438_ = NAND ( new_n3437_, new_n3378_ ) -new_n3439_ = NOT ( new_n3438_ ) -new_n3440_ = NOR ( NET_442, NET_197 ) -new_n3441_ = NOR ( new_n3440_, new_n3439_ ) -new_n3442_ = NOR ( new_n3441_, new_n3374_, new_n3371_ ) -new_n3443_ = NOR ( NET_441, NET_196 ) -new_n3444_ = OR ( new_n3443_, new_n3442_ ) -new_n3445_ = NAND ( NET_440, NET_195 ) -new_n3446_ = NAND ( new_n3445_, new_n3444_ ) -new_n3447_ = OR ( NET_440, NET_195 ) -new_n3448_ = NAND ( new_n3447_, new_n3446_ ) -new_n3449_ = NOR ( NET_439, NET_194 ) -new_n3450_ = NOT ( new_n3449_ ) -new_n3451_ = NAND ( NET_439, NET_194 ) -new_n3452_ = NAND ( new_n3451_, new_n3450_ ) -new_n3453_ = XOR ( new_n3452_, new_n3448_ ) -new_n3454_ = NAND ( new_n3453_, new_n3368_ ) -new_n3455_ = NOR ( new_n3453_, new_n3368_ ) -new_n3456_ = NOT ( new_n3455_ ) -new_n3457_ = NAND ( new_n3456_, new_n3454_ ) -new_n3458_ = NOT ( NET_702 ) -new_n3459_ = OR ( NET_457, NET_212 ) -new_n3460_ = AND ( new_n3459_, new_n3389_ ) -new_n3461_ = NOR ( new_n3460_, new_n3458_ ) -new_n3462_ = NOR ( new_n3461_, NET_701 ) -new_n3463_ = NOT ( NET_211 ) -new_n3464_ = OR ( new_n3389_, new_n3463_ ) -new_n3465_ = NAND ( new_n3389_, new_n3463_ ) -new_n3466_ = NAND ( new_n3465_, new_n3464_, new_n3388_ ) -new_n3467_ = NAND ( new_n3389_, NET_456 ) -new_n3468_ = NAND ( new_n3467_, new_n3463_ ) -new_n3469_ = NAND ( new_n3392_, NET_211 ) -new_n3470_ = NAND ( new_n3469_, new_n3468_ ) -new_n3471_ = NAND ( new_n3470_, new_n3466_ ) -new_n3472_ = OR ( new_n3471_, new_n3462_ ) -new_n3473_ = NAND ( new_n3461_, NET_701 ) -new_n3474_ = NAND ( new_n3473_, new_n3472_ ) -new_n3475_ = NAND ( new_n3396_, new_n3394_ ) -new_n3476_ = XNOR ( new_n3475_, new_n3393_ ) -new_n3477_ = NAND ( new_n3476_, new_n3325_ ) -new_n3478_ = NAND ( new_n3477_, new_n3474_ ) -new_n3479_ = OR ( new_n3476_, new_n3325_ ) -new_n3480_ = NAND ( new_n3479_, new_n3478_ ) -new_n3481_ = NOT ( NET_699 ) -new_n3482_ = NAND ( new_n3400_, new_n3398_ ) -new_n3483_ = XNOR ( new_n3482_, new_n3397_ ) -new_n3484_ = NAND ( new_n3483_, new_n3481_ ) -new_n3485_ = NAND ( new_n3484_, new_n3480_ ) -new_n3486_ = NOR ( new_n3483_, new_n3481_ ) -new_n3487_ = NOT ( new_n3486_ ) -new_n3488_ = NAND ( new_n3487_, new_n3485_ ) -new_n3489_ = NOT ( NET_698 ) -new_n3490_ = NAND ( new_n3402_, new_n3387_ ) -new_n3491_ = XNOR ( new_n3490_, new_n3401_ ) -new_n3492_ = NAND ( new_n3491_, new_n3489_ ) -new_n3493_ = NAND ( new_n3492_, new_n3488_ ) -new_n3494_ = NOR ( new_n3491_, new_n3489_ ) -new_n3495_ = NOT ( new_n3494_ ) -new_n3496_ = NAND ( new_n3495_, new_n3493_ ) -new_n3497_ = NOT ( NET_697 ) -new_n3498_ = NAND ( new_n3407_, new_n3405_ ) -new_n3499_ = XNOR ( new_n3498_, new_n3404_ ) -new_n3500_ = NAND ( new_n3499_, new_n3497_ ) -new_n3501_ = NAND ( new_n3500_, new_n3496_ ) -new_n3502_ = NOR ( new_n3499_, new_n3497_ ) -new_n3503_ = NOT ( new_n3502_ ) -new_n3504_ = NAND ( new_n3503_, new_n3501_ ) -new_n3505_ = NOT ( NET_696 ) -new_n3506_ = NAND ( new_n3409_, new_n3386_ ) -new_n3507_ = XNOR ( new_n3506_, new_n3408_ ) -new_n3508_ = NAND ( new_n3507_, new_n3505_ ) -new_n3509_ = NAND ( new_n3508_, new_n3504_ ) -new_n3510_ = NOR ( new_n3507_, new_n3505_ ) -new_n3511_ = NOT ( new_n3510_ ) -new_n3512_ = NAND ( new_n3511_, new_n3509_ ) -new_n3513_ = NOT ( NET_695 ) -new_n3514_ = NAND ( new_n3414_, new_n3412_ ) -new_n3515_ = XNOR ( new_n3514_, new_n3411_ ) -new_n3516_ = NAND ( new_n3515_, new_n3513_ ) -new_n3517_ = AND ( new_n3516_, new_n3512_ ) -new_n3518_ = NOR ( new_n3515_, new_n3513_ ) -new_n3519_ = NOR ( new_n3518_, new_n3517_ ) -new_n3520_ = NOT ( NET_694 ) -new_n3521_ = NAND ( new_n3418_, new_n3416_ ) -new_n3522_ = XNOR ( new_n3521_, new_n3415_ ) -new_n3523_ = AND ( new_n3522_, new_n3520_ ) -new_n3524_ = NOR ( new_n3523_, new_n3519_ ) -new_n3525_ = NOR ( new_n3522_, new_n3520_ ) -new_n3526_ = NOR ( new_n3525_, new_n3524_ ) -new_n3527_ = NOT ( NET_693 ) -new_n3528_ = NAND ( new_n3422_, new_n3420_ ) -new_n3529_ = XNOR ( new_n3528_, new_n3419_ ) -new_n3530_ = AND ( new_n3529_, new_n3527_ ) -new_n3531_ = NOR ( new_n3530_, new_n3526_ ) -new_n3532_ = NOR ( new_n3529_, new_n3527_ ) -new_n3533_ = NOR ( new_n3532_, new_n3531_ ) -new_n3534_ = NAND ( new_n3385_, new_n3384_ ) -new_n3535_ = NAND ( new_n3534_, new_n3422_, new_n3421_ ) -new_n3536_ = OR ( new_n3424_, new_n3383_ ) -new_n3537_ = NAND ( new_n3536_, new_n3535_ ) -new_n3538_ = NOR ( new_n3537_, NET_692 ) -new_n3539_ = OR ( new_n3538_, new_n3533_ ) -new_n3540_ = NAND ( new_n3537_, NET_692 ) -new_n3541_ = NAND ( new_n3540_, new_n3539_ ) -new_n3542_ = NOT ( NET_446 ) -new_n3543_ = OR ( new_n3542_, NET_201 ) -new_n3544_ = NOT ( NET_201 ) -new_n3545_ = OR ( NET_446, new_n3544_ ) -new_n3546_ = NAND ( new_n3545_, new_n3543_, new_n3424_, new_n3384_ ) -new_n3547_ = NAND ( new_n3426_, new_n3425_, new_n3380_ ) -new_n3548_ = NAND ( new_n3547_, new_n3546_ ) -new_n3549_ = OR ( new_n3548_, NET_691 ) -new_n3550_ = NAND ( new_n3549_, new_n3541_ ) -new_n3551_ = NAND ( new_n3548_, NET_691 ) -new_n3552_ = NAND ( new_n3551_, new_n3550_ ) -new_n3553_ = NOT ( NET_690 ) -new_n3554_ = NAND ( new_n3431_, new_n3429_ ) -new_n3555_ = XNOR ( new_n3554_, new_n3428_ ) -new_n3556_ = NAND ( new_n3555_, new_n3553_ ) -new_n3557_ = NAND ( new_n3556_, new_n3552_ ) -new_n3558_ = OR ( new_n3555_, new_n3553_ ) -new_n3559_ = NAND ( new_n3558_, new_n3557_ ) -new_n3560_ = NOT ( NET_689 ) -new_n3561_ = NAND ( new_n3435_, new_n3433_ ) -new_n3562_ = XNOR ( new_n3561_, new_n3432_ ) -new_n3563_ = NAND ( new_n3562_, new_n3560_ ) -new_n3564_ = NAND ( new_n3563_, new_n3559_ ) -new_n3565_ = OR ( new_n3562_, new_n3560_ ) -new_n3566_ = NAND ( new_n3565_, new_n3564_ ) -new_n3567_ = OR ( new_n3437_, new_n3377_ ) -new_n3568_ = NAND ( new_n3379_, new_n3378_ ) -new_n3569_ = NAND ( new_n3568_, new_n3435_, new_n3434_ ) -new_n3570_ = NAND ( new_n3569_, new_n3567_ ) -new_n3571_ = OR ( new_n3570_, NET_688 ) -new_n3572_ = NAND ( new_n3571_, new_n3566_ ) -new_n3573_ = NAND ( new_n3570_, NET_688 ) -new_n3574_ = NAND ( new_n3573_, new_n3572_ ) -new_n3575_ = NOR ( new_n3440_, new_n3374_ ) -new_n3576_ = OR ( new_n3575_, new_n3438_ ) -new_n3577_ = OR ( new_n3440_, new_n3439_, new_n3374_ ) -new_n3578_ = NAND ( new_n3577_, new_n3576_ ) -new_n3579_ = OR ( new_n3578_, NET_687 ) -new_n3580_ = NAND ( new_n3579_, new_n3574_ ) -new_n3581_ = NAND ( new_n3578_, NET_687 ) -new_n3582_ = NAND ( new_n3581_, new_n3580_ ) -new_n3583_ = NOT ( NET_686 ) -new_n3584_ = NOR ( new_n3441_, new_n3374_ ) -new_n3585_ = NOR ( new_n3443_, new_n3371_ ) -new_n3586_ = XNOR ( new_n3585_, new_n3584_ ) -new_n3587_ = NAND ( new_n3586_, new_n3583_ ) -new_n3588_ = NAND ( new_n3587_, new_n3582_ ) -new_n3589_ = OR ( new_n3586_, new_n3583_ ) -new_n3590_ = NAND ( new_n3589_, new_n3588_ ) -new_n3591_ = NOT ( NET_685 ) -new_n3592_ = NAND ( new_n3447_, new_n3445_ ) -new_n3593_ = XOR ( new_n3592_, new_n3444_ ) -new_n3594_ = NAND ( new_n3593_, new_n3591_ ) -new_n3595_ = NAND ( new_n3594_, new_n3590_ ) -new_n3596_ = OR ( new_n3593_, new_n3591_ ) -new_n3597_ = NAND ( new_n3596_, new_n3595_ ) -NET_10336 = XOR ( new_n3597_, new_n3457_ ) -new_n3599_ = NOT ( NET_15 ) -new_n3600_ = NAND ( new_n1530_, new_n3148_ ) -new_n3601_ = OR ( new_n1530_, NET_230 ) -new_n3602_ = NAND ( new_n3601_, new_n3600_ ) -new_n3603_ = OR ( new_n3602_, new_n3599_ ) -new_n3604_ = NAND ( new_n3602_, new_n3599_ ) -new_n3605_ = NAND ( new_n3604_, new_n3603_ ) -new_n3606_ = NAND ( new_n1684_, new_n1538_ ) -new_n3607_ = NAND ( new_n3606_, new_n1537_ ) -new_n3608_ = XNOR ( new_n3607_, new_n3605_ ) -new_n3609_ = OR ( new_n3608_, new_n1531_ ) -new_n3610_ = OR ( new_n1530_, NET_475 ) -new_n3611_ = NAND ( new_n3610_, new_n3609_ ) -new_n3612_ = OR ( new_n3611_, NET_275 ) -new_n3613_ = NOT ( NET_50 ) -new_n3614_ = OR ( new_n1692_, new_n3613_ ) -new_n3615_ = XOR ( new_n1712_, NET_50 ) -new_n3616_ = OR ( new_n3615_, new_n1696_ ) -NET_10344 = NAND ( new_n3616_, new_n3614_, new_n3612_ ) -new_n3618_ = OR ( new_n2844_, new_n2778_ ) -new_n3619_ = NOT ( new_n2826_ ) -new_n3620_ = OR ( new_n3619_, new_n2783_ ) -new_n3621_ = NAND ( new_n2826_, new_n2785_ ) -new_n3622_ = OR ( new_n2826_, new_n2785_ ) -new_n3623_ = OR ( new_n1914_, NET_130 ) -new_n3624_ = NAND ( new_n1914_, new_n1996_ ) -new_n3625_ = NAND ( new_n3624_, new_n3623_ ) -new_n3626_ = NAND ( new_n3625_, new_n3622_, new_n3621_ ) -new_n3627_ = NOR ( new_n3625_, new_n2786_ ) -new_n3628_ = NOR ( new_n3627_, new_n3619_ ) -new_n3629_ = NOR ( new_n3625_, new_n2785_ ) -new_n3630_ = NOR ( new_n3629_, new_n2826_ ) -new_n3631_ = OR ( new_n3630_, new_n3628_ ) -new_n3632_ = NAND ( new_n3631_, new_n3626_ ) -new_n3633_ = NAND ( new_n3632_, new_n2781_, new_n2777_ ) -new_n3634_ = NAND ( new_n3633_, new_n3620_, new_n3618_ ) -new_n3635_ = AND ( new_n3634_, new_n2796_ ) -new_n3636_ = NAND ( new_n2826_, new_n2798_ ) -new_n3637_ = NAND ( new_n3632_, new_n2803_, new_n2795_, NET_275 ) -new_n3638_ = OR ( new_n2795_, new_n3463_ ) -new_n3639_ = NAND ( new_n3638_, new_n3637_, new_n3636_, new_n2868_ ) -NET_10345 = OR ( new_n3639_, new_n3635_ ) -new_n3641_ = OR ( new_n2873_, new_n2844_ ) -new_n3642_ = NAND ( new_n2878_, new_n2849_ ) -new_n3643_ = NAND ( new_n2881_, new_n2829_ ) -new_n3644_ = NOR ( new_n1920_, new_n1796_ ) -new_n3645_ = NAND ( new_n3644_, new_n1903_ ) -new_n3646_ = NAND ( new_n2861_, new_n1992_ ) -new_n3647_ = AND ( new_n3646_, new_n3645_ ) -new_n3648_ = NAND ( new_n3647_, new_n3643_, new_n3642_, new_n3641_ ) -new_n3649_ = NAND ( new_n3648_, new_n2892_ ) -new_n3650_ = NAND ( new_n2891_, NET_98 ) -NET_10346 = NAND ( new_n3650_, new_n3649_ ) -new_n3652_ = NAND ( new_n3648_, new_n2901_ ) -new_n3653_ = NAND ( new_n2900_, NET_130 ) -NET_10348 = NAND ( new_n3653_, new_n3652_ ) -new_n3655_ = NAND ( new_n1838_, NET_162 ) -new_n3656_ = AND ( new_n2780_, new_n1752_ ) -new_n3657_ = NOR ( new_n3656_, new_n2844_ ) -new_n3658_ = NAND ( new_n2849_, new_n1974_ ) -new_n3659_ = NAND ( new_n1827_, NET_265 ) -new_n3660_ = NAND ( new_n2829_, new_n1988_ ) -new_n3661_ = NAND ( new_n3660_, new_n3659_, new_n3658_, new_n3647_ ) -new_n3662_ = NOR ( new_n3661_, new_n3657_ ) -new_n3663_ = OR ( new_n3662_, new_n1838_ ) -NET_10349 = NAND ( new_n3663_, new_n3655_ ) -new_n3665_ = NAND ( new_n1530_, new_n3145_ ) -new_n3666_ = OR ( new_n3608_, new_n1530_ ) -new_n3667_ = NAND ( new_n3666_, new_n3665_ ) -new_n3668_ = OR ( new_n3667_, NET_520 ) -new_n3669_ = OR ( new_n2054_, new_n2086_ ) -new_n3670_ = XOR ( new_n2088_, NET_295 ) -new_n3671_ = OR ( new_n3670_, new_n2058_ ) -NET_10369 = NAND ( new_n3671_, new_n3669_, new_n3668_ ) -new_n3673_ = OR ( new_n2983_, new_n3021_ ) -new_n3674_ = OR ( new_n2987_, new_n2917_ ) -new_n3675_ = OR ( new_n2995_, new_n2917_ ) -new_n3676_ = NAND ( new_n2995_, new_n2917_ ) -new_n3677_ = OR ( new_n2991_, new_n2373_ ) -new_n3678_ = OR ( new_n2287_, new_n2371_ ) -new_n3679_ = NAND ( new_n3678_, new_n3677_, new_n3676_, new_n3675_ ) -new_n3680_ = NOT ( new_n2995_ ) -new_n3681_ = NAND ( new_n3678_, new_n3677_ ) -new_n3682_ = NAND ( new_n3681_, new_n3680_ ) -new_n3683_ = NAND ( new_n3682_, new_n2916_ ) -new_n3684_ = NAND ( new_n3681_, new_n2995_ ) -new_n3685_ = NAND ( new_n3684_, new_n2917_ ) -new_n3686_ = NAND ( new_n3685_, new_n3683_ ) -new_n3687_ = NAND ( new_n3686_, new_n3679_ ) -new_n3688_ = NAND ( new_n3687_, new_n2998_ ) -new_n3689_ = NAND ( new_n3688_, new_n3674_, new_n3673_ ) -new_n3690_ = NAND ( new_n3689_, new_n3006_ ) -new_n3691_ = OR ( new_n3008_, new_n3021_ ) -new_n3692_ = NAND ( new_n3012_, new_n2916_ ) -new_n3693_ = NAND ( new_n3687_, new_n3015_, new_n3005_, NET_520 ) -new_n3694_ = OR ( new_n3005_, new_n3388_ ) -new_n3695_ = AND ( new_n3694_, new_n3693_, new_n3033_ ) -NET_10370 = NAND ( new_n3695_, new_n3692_, new_n3691_, new_n3690_ ) -new_n3697_ = NOR ( new_n3037_, new_n3021_ ) -new_n3698_ = OR ( new_n3041_, new_n2959_ ) -new_n3699_ = NAND ( new_n2976_, new_n2367_ ) -new_n3700_ = OR ( new_n3045_, new_n2919_ ) -new_n3701_ = NAND ( new_n2966_, new_n2252_ ) -new_n3702_ = NAND ( new_n3701_, new_n3700_, new_n3699_, new_n3698_ ) -new_n3703_ = NOR ( new_n3702_, new_n3697_ ) -new_n3704_ = OR ( new_n3703_, new_n3053_ ) -new_n3705_ = NAND ( new_n3053_, NET_343 ) -NET_10371 = NAND ( new_n3705_, new_n3704_ ) -new_n3707_ = NOT ( new_n3057_ ) -new_n3708_ = OR ( new_n3703_, new_n3707_ ) -new_n3709_ = OR ( new_n3057_, new_n2373_ ) -NET_10373 = NAND ( new_n3709_, new_n3708_ ) -new_n3711_ = NOR ( new_n3079_, new_n3077_ ) -new_n3712_ = XOR ( new_n3711_, new_n3075_ ) -new_n3713_ = NAND ( new_n3712_, new_n1530_ ) -new_n3714_ = OR ( new_n1530_, new_n1613_ ) -new_n3715_ = NAND ( new_n3714_, new_n3713_ ) -new_n3716_ = NAND ( new_n3715_, new_n2543_ ) -new_n3717_ = NOT ( NET_526 ) -new_n3718_ = NOR ( NET_554, new_n3717_ ) -new_n3719_ = XOR ( new_n2437_, new_n3717_ ) -new_n3720_ = NOR ( new_n3719_, new_n2461_ ) -new_n3721_ = NOR ( new_n3720_, new_n3718_ ) -new_n3722_ = OR ( new_n3721_, new_n2543_ ) -new_n3723_ = NAND ( new_n3722_, new_n3716_ ) -new_n3724_ = NOT ( new_n3723_ ) -new_n3725_ = OR ( new_n3724_, new_n2524_ ) -new_n3726_ = NAND ( new_n3251_, new_n2579_ ) -new_n3727_ = OR ( new_n3721_, new_n2613_ ) -new_n3728_ = NAND ( new_n3727_, new_n3726_, new_n3725_ ) -new_n3729_ = XOR ( new_n3728_, new_n2618_ ) -new_n3730_ = NAND ( new_n3251_, new_n2620_ ) -new_n3731_ = OR ( new_n3724_, new_n2578_ ) -new_n3732_ = OR ( new_n2624_, new_n3247_ ) -new_n3733_ = OR ( new_n2626_, new_n3249_ ) -new_n3734_ = NAND ( new_n3733_, new_n3732_, new_n3731_, new_n3730_ ) -new_n3735_ = OR ( new_n3734_, new_n3729_ ) -new_n3736_ = NAND ( new_n3734_, new_n3729_ ) -new_n3737_ = NAND ( new_n3736_, new_n3735_ ) -new_n3738_ = NAND ( new_n3232_, new_n3227_ ) -new_n3739_ = NAND ( new_n3738_, new_n3228_ ) -new_n3740_ = XOR ( new_n3739_, new_n3737_ ) -new_n3741_ = NOR ( new_n3740_, new_n3202_ ) -new_n3742_ = OR ( new_n3721_, new_n2732_ ) -new_n3743_ = NAND ( new_n3742_, new_n3716_ ) -new_n3744_ = NAND ( new_n3743_, new_n3240_ ) -new_n3745_ = NAND ( new_n3197_, NET_590 ) -new_n3746_ = NAND ( new_n2609_, new_n2607_, NET_591 ) -new_n3747_ = XNOR ( NET_759, NET_747 ) -new_n3748_ = NAND ( new_n3747_, new_n2587_ ) -new_n3749_ = NOT ( NET_655 ) -new_n3750_ = OR ( new_n2597_, new_n3749_ ) -new_n3751_ = NOT ( NET_623 ) -new_n3752_ = OR ( new_n2604_, new_n3751_ ) -new_n3753_ = NAND ( new_n3752_, new_n3750_, new_n3748_, new_n3746_ ) -new_n3754_ = NAND ( new_n3753_, new_n3243_ ) -new_n3755_ = NAND ( new_n3253_, new_n2772_ ) -new_n3756_ = NAND ( new_n3755_, new_n3754_, new_n3745_, new_n3744_ ) -NET_10393 = OR ( new_n3756_, new_n3741_ ) -new_n3758_ = NOR ( new_n3740_, new_n3264_ ) -new_n3759_ = NAND ( new_n3743_, new_n3266_ ) -new_n3760_ = NAND ( new_n3262_, NET_622 ) -new_n3761_ = NAND ( new_n3753_, new_n3269_ ) -new_n3762_ = NAND ( new_n3271_, new_n2772_ ) -new_n3763_ = NAND ( new_n3762_, new_n3761_, new_n3760_, new_n3759_ ) -NET_10394 = OR ( new_n3763_, new_n3758_ ) -new_n3765_ = NOR ( new_n2740_, new_n2506_ ) -new_n3766_ = NOR ( new_n3765_, new_n3200_ ) -new_n3767_ = OR ( new_n3766_, new_n2713_ ) -new_n3768_ = OR ( new_n3767_, new_n3234_ ) -new_n3769_ = NAND ( new_n3251_, new_n2765_ ) -new_n3770_ = NAND ( new_n2713_, NET_653 ) -new_n3771_ = NAND ( new_n3238_, new_n2744_ ) -new_n3772_ = NAND ( new_n2756_, new_n2611_ ) -new_n3773_ = NAND ( new_n2758_, NET_740 ) -new_n3774_ = AND ( new_n3773_, new_n3772_, new_n3771_ ) -NET_10395 = NAND ( new_n3774_, new_n3770_, new_n3769_, new_n3768_ ) -new_n3776_ = NOR ( new_n3740_, new_n3276_ ) -new_n3777_ = OR ( new_n3283_, new_n3247_ ) -new_n3778_ = NAND ( new_n3287_, NET_622 ) -new_n3779_ = NAND ( new_n3778_, new_n3777_ ) -new_n3780_ = NAND ( new_n3779_, new_n3721_ ) -new_n3781_ = OR ( new_n3779_, new_n3721_ ) -new_n3782_ = NAND ( new_n3781_, new_n3780_ ) -new_n3783_ = NAND ( new_n3304_, new_n3291_ ) -new_n3784_ = NAND ( new_n3783_, new_n3290_ ) -new_n3785_ = NAND ( new_n3784_, new_n3782_ ) -new_n3786_ = OR ( new_n3784_, new_n3782_ ) -new_n3787_ = NAND ( new_n3786_, new_n3785_, new_n3316_ ) -new_n3788_ = NOT ( new_n3721_ ) -new_n3789_ = NAND ( new_n3788_, new_n3323_ ) -new_n3790_ = OR ( new_n3314_, new_n3481_ ) -new_n3791_ = OR ( NET_765, new_n3245_ ) -new_n3792_ = NAND ( new_n3791_, new_n3790_, new_n3789_, new_n3787_ ) -NET_10396 = OR ( new_n3792_, new_n3776_ ) -new_n3794_ = OR ( new_n3740_, new_n3339_ ) -new_n3795_ = NAND ( new_n3350_, new_n3245_ ) -new_n3796_ = NAND ( new_n3753_, new_n3352_ ) -new_n3797_ = NAND ( new_n3193_, new_n3245_ ) -new_n3798_ = NAND ( new_n3355_, new_n2772_ ) -new_n3799_ = NAND ( new_n3798_, new_n3797_, new_n3796_ ) -new_n3800_ = NAND ( new_n3799_, new_n3359_ ) -new_n3801_ = NAND ( new_n3743_, new_n3361_ ) -new_n3802_ = NAND ( new_n3723_, new_n3363_ ) -new_n3803_ = AND ( new_n3802_, new_n3801_, new_n3791_ ) -NET_10397 = NAND ( new_n3803_, new_n3800_, new_n3795_, new_n3794_ ) -new_n3805_ = OR ( new_n3597_, new_n3455_ ) -new_n3806_ = OR ( new_n3449_, new_n3448_ ) -new_n3807_ = OR ( new_n1528_, NET_193 ) -new_n3808_ = OR ( NET_438, new_n1527_ ) -new_n3809_ = NAND ( new_n3808_, new_n3807_, new_n3806_, new_n3451_ ) -new_n3810_ = NAND ( new_n3451_, new_n3448_ ) -new_n3811_ = NAND ( new_n3808_, new_n3807_ ) -new_n3812_ = NAND ( new_n3811_, new_n3810_, new_n3450_ ) -new_n3813_ = NAND ( new_n3812_, new_n3809_ ) -new_n3814_ = OR ( new_n3813_, NET_683 ) -new_n3815_ = NAND ( new_n3813_, NET_683 ) -new_n3816_ = NAND ( new_n3815_, new_n3814_, new_n3805_, new_n3454_ ) -new_n3817_ = NAND ( new_n3597_, new_n3454_ ) -new_n3818_ = NAND ( new_n3815_, new_n3814_ ) -new_n3819_ = NAND ( new_n3818_, new_n3817_, new_n3456_ ) -NET_10461 = NAND ( new_n3819_, new_n3816_ ) -new_n3821_ = NAND ( new_n2861_, new_n1870_ ) -new_n3822_ = NAND ( new_n1611_, new_n1609_ ) -new_n3823_ = XNOR ( new_n3822_, new_n1603_ ) -new_n3824_ = OR ( new_n3823_, new_n1531_ ) -new_n3825_ = OR ( new_n1530_, NET_460 ) -new_n3826_ = NAND ( new_n3825_, new_n3824_ ) -new_n3827_ = NAND ( new_n3826_, new_n1921_ ) -new_n3828_ = NOT ( NET_35 ) -new_n3829_ = NOR ( NET_64, new_n3828_ ) -new_n3830_ = NAND ( new_n2821_, new_n3828_ ) -new_n3831_ = OR ( new_n2821_, new_n3828_ ) -new_n3832_ = NAND ( new_n3831_, new_n3830_ ) -new_n3833_ = NOR ( new_n3832_, new_n1694_ ) -new_n3834_ = OR ( new_n3833_, new_n3829_ ) -new_n3835_ = OR ( new_n3834_, new_n1921_ ) -new_n3836_ = AND ( new_n3835_, new_n3827_ ) -new_n3837_ = NAND ( new_n3836_, new_n1942_ ) -new_n3838_ = NAND ( new_n3834_, new_n1953_ ) -new_n3839_ = NAND ( new_n3838_, new_n3837_, new_n3821_ ) -new_n3840_ = XOR ( new_n3839_, new_n1844_ ) -new_n3841_ = NAND ( new_n2861_, new_n1960_ ) -new_n3842_ = NAND ( new_n3836_, new_n1870_ ) -new_n3843_ = OR ( new_n1951_, new_n2859_ ) -new_n3844_ = OR ( new_n1952_, new_n2857_ ) -new_n3845_ = NAND ( new_n3844_, new_n3843_, new_n3842_, new_n3841_ ) -new_n3846_ = OR ( new_n3845_, new_n3840_ ) -new_n3847_ = NAND ( new_n3845_, new_n3840_ ) -new_n3848_ = NAND ( new_n3847_, new_n3846_ ) -new_n3849_ = NAND ( new_n2843_, new_n2839_ ) -new_n3850_ = NAND ( new_n3849_, new_n3848_, new_n2840_ ) -new_n3851_ = NAND ( new_n3849_, new_n2840_ ) -new_n3852_ = NAND ( new_n3851_, new_n3847_, new_n3846_ ) -new_n3853_ = NAND ( new_n3852_, new_n3850_ ) -new_n3854_ = OR ( new_n3853_, new_n1840_ ) -new_n3855_ = AND ( new_n2861_, new_n1976_ ) -new_n3856_ = NAND ( new_n3836_, new_n1978_ ) -new_n3857_ = NAND ( new_n3856_, new_n3855_ ) -new_n3858_ = OR ( new_n3856_, new_n3855_ ) -new_n3859_ = NAND ( new_n3858_, new_n3857_ ) -new_n3860_ = NAND ( new_n2847_, new_n1980_ ) -new_n3861_ = NAND ( new_n3860_, new_n2846_ ) -new_n3862_ = OR ( new_n2847_, new_n1980_ ) -new_n3863_ = NAND ( new_n3862_, new_n3861_ ) -new_n3864_ = XNOR ( new_n3863_, new_n3859_ ) -new_n3865_ = OR ( new_n3864_, new_n1975_ ) -new_n3866_ = NOT ( new_n3644_ ) -new_n3867_ = NOR ( new_n3866_, new_n1838_ ) -new_n3868_ = NAND ( new_n3867_, new_n2001_ ) -new_n3869_ = NAND ( new_n1838_, NET_163 ) -new_n3870_ = NAND ( new_n2005_, NET_250 ) -new_n3871_ = AND ( new_n3870_, new_n3869_, new_n3868_ ) -new_n3872_ = NAND ( new_n1901_, new_n1898_, NET_100 ) -new_n3873_ = NOT ( NET_269 ) -new_n3874_ = NAND ( new_n1878_, new_n3873_ ) -new_n3875_ = NOT ( NET_164 ) -new_n3876_ = OR ( new_n1887_, new_n3875_ ) -new_n3877_ = NOT ( NET_132 ) -new_n3878_ = OR ( new_n1895_, new_n3877_ ) -new_n3879_ = NAND ( new_n3878_, new_n3876_, new_n3874_, new_n3872_ ) -new_n3880_ = NAND ( new_n3879_, new_n1994_ ) -new_n3881_ = NOT ( new_n3836_ ) -new_n3882_ = OR ( new_n3881_, new_n1989_ ) -new_n3883_ = AND ( new_n3882_, new_n3880_ ) -NET_10468 = NAND ( new_n3883_, new_n3871_, new_n3865_, new_n3854_ ) -new_n3885_ = OR ( new_n3853_, new_n2016_ ) -new_n3886_ = OR ( new_n3864_, new_n2020_ ) -new_n3887_ = NAND ( new_n2853_, NET_250 ) -new_n3888_ = NAND ( new_n3879_, new_n2043_ ) -new_n3889_ = NAND ( new_n2009_, NET_250 ) -new_n3890_ = NAND ( new_n2864_, new_n2001_ ) -new_n3891_ = NAND ( new_n3890_, new_n3889_, new_n3888_ ) -new_n3892_ = NAND ( new_n3891_, new_n2042_ ) -new_n3893_ = NAND ( NET_35973, NET_250 ) -new_n3894_ = OR ( new_n3881_, new_n2039_ ) -new_n3895_ = AND ( new_n3894_, new_n3893_, new_n3892_ ) -NET_10469 = NAND ( new_n3895_, new_n3887_, new_n3886_, new_n3885_ ) -new_n3897_ = AND ( new_n2976_, new_n2274_ ) -new_n3898_ = NAND ( new_n1530_, new_n3071_ ) -new_n3899_ = OR ( new_n3823_, new_n1530_ ) -new_n3900_ = NAND ( new_n3899_, new_n3898_ ) -new_n3901_ = NAND ( new_n3900_, new_n2290_ ) -new_n3902_ = NOR ( NET_309, new_n2066_ ) -new_n3903_ = OR ( new_n2067_, new_n2066_ ) -new_n3904_ = NAND ( new_n3903_, new_n2068_ ) -new_n3905_ = NOR ( new_n3904_, new_n2056_ ) -new_n3906_ = NOR ( new_n3905_, new_n3902_ ) -new_n3907_ = NAND ( new_n3906_, new_n2289_ ) -new_n3908_ = NAND ( new_n3907_, new_n3901_ ) -new_n3909_ = OR ( new_n3908_, new_n2309_ ) -new_n3910_ = NOT ( new_n3906_ ) -new_n3911_ = NAND ( new_n3910_, new_n2325_ ) -new_n3912_ = OR ( new_n2328_, new_n2974_ ) -new_n3913_ = OR ( new_n2330_, new_n2972_ ) -new_n3914_ = NAND ( new_n3913_, new_n3912_, new_n3911_, new_n3909_ ) -new_n3915_ = NOR ( new_n3914_, new_n3897_ ) -new_n3916_ = XOR ( new_n3915_, new_n2218_ ) -new_n3917_ = NOR ( new_n3908_, new_n2273_ ) -new_n3918_ = NAND ( new_n2976_, new_n2336_ ) -new_n3919_ = OR ( new_n3906_, new_n2338_ ) -new_n3920_ = OR ( new_n2323_, new_n2974_ ) -new_n3921_ = OR ( new_n2324_, new_n2972_ ) -new_n3922_ = NAND ( new_n3921_, new_n3920_, new_n3919_, new_n3918_ ) -new_n3923_ = NOR ( new_n3922_, new_n3917_ ) -new_n3924_ = NOR ( new_n3923_, new_n3916_ ) -new_n3925_ = NAND ( new_n3923_, new_n3916_ ) -new_n3926_ = NAND ( new_n2940_, new_n2935_ ) -new_n3927_ = NAND ( new_n3926_, new_n2936_ ) -new_n3928_ = NAND ( new_n3927_, new_n3925_ ) -new_n3929_ = OR ( new_n3928_, new_n3924_ ) -new_n3930_ = NOT ( new_n3924_ ) -new_n3931_ = NAND ( new_n3925_, new_n3930_ ) -new_n3932_ = NAND ( new_n3931_, new_n3926_, new_n2936_ ) -new_n3933_ = NAND ( new_n3932_, new_n3929_ ) -new_n3934_ = OR ( new_n3933_, new_n2208_ ) -new_n3935_ = OR ( new_n3908_, new_n2349_ ) -new_n3936_ = NAND ( new_n2976_, new_n2349_ ) -new_n3937_ = NAND ( new_n3936_, new_n3935_ ) -new_n3938_ = XOR ( new_n3937_, new_n2349_ ) -new_n3939_ = OR ( new_n3908_, new_n2348_ ) -new_n3940_ = NAND ( new_n3939_, new_n3938_ ) -new_n3941_ = NOR ( new_n3939_, new_n3938_ ) -new_n3942_ = NOT ( new_n3941_ ) -new_n3943_ = AND ( new_n3942_, new_n3940_ ) -new_n3944_ = NAND ( new_n2957_, new_n2954_, new_n2354_ ) -new_n3945_ = NAND ( new_n3944_, new_n2955_ ) -new_n3946_ = OR ( new_n3945_, new_n3943_ ) -new_n3947_ = NAND ( new_n3945_, new_n3940_ ) -new_n3948_ = OR ( new_n3947_, new_n3941_ ) -new_n3949_ = NAND ( new_n3948_, new_n3946_ ) -new_n3950_ = OR ( new_n3949_, new_n2362_ ) -new_n3951_ = NAND ( new_n2968_, new_n2376_ ) -new_n3952_ = NAND ( new_n2196_, NET_408 ) -new_n3953_ = NAND ( new_n2380_, NET_495 ) -new_n3954_ = AND ( new_n3953_, new_n3952_, new_n3951_ ) -new_n3955_ = NAND ( new_n2250_, new_n2248_, NET_345 ) -new_n3956_ = NOT ( NET_514 ) -new_n3957_ = NAND ( new_n2228_, new_n3956_ ) -new_n3958_ = NOT ( NET_409 ) -new_n3959_ = OR ( new_n2238_, new_n3958_ ) -new_n3960_ = NOT ( NET_377 ) -new_n3961_ = OR ( new_n2245_, new_n3960_ ) -new_n3962_ = NAND ( new_n3961_, new_n3959_, new_n3957_, new_n3955_ ) -new_n3963_ = NAND ( new_n3962_, new_n2369_ ) -new_n3964_ = OR ( new_n3908_, new_n2364_ ) -new_n3965_ = AND ( new_n3964_, new_n3963_ ) -NET_10493 = NAND ( new_n3965_, new_n3954_, new_n3950_, new_n3934_ ) -new_n3967_ = OR ( new_n3933_, new_n2390_ ) -new_n3968_ = OR ( new_n3949_, new_n2393_ ) -new_n3969_ = NAND ( new_n3025_, NET_495 ) -new_n3970_ = NAND ( new_n3962_, new_n2416_ ) -new_n3971_ = NAND ( new_n2384_, NET_495 ) -new_n3972_ = NAND ( new_n3029_, new_n2376_ ) -new_n3973_ = NAND ( new_n3972_, new_n3971_, new_n3970_ ) -new_n3974_ = NAND ( new_n3973_, new_n2415_ ) -new_n3975_ = NAND ( NET_35976, NET_495 ) -new_n3976_ = OR ( new_n3908_, new_n2412_ ) -new_n3977_ = AND ( new_n3976_, new_n3975_, new_n3974_ ) -NET_10494 = NAND ( new_n3977_, new_n3969_, new_n3968_, new_n3967_ ) -new_n3979_ = NOT ( NET_480 ) -new_n3980_ = NOR ( new_n3979_, NET_235 ) -new_n3981_ = NOT ( NET_235 ) -new_n3982_ = NOR ( NET_480, new_n3981_ ) -new_n3983_ = OR ( new_n3982_, new_n3980_ ) -new_n3984_ = NOR ( new_n3168_, new_n3064_ ) -new_n3985_ = NOR ( new_n3984_, new_n3062_ ) -new_n3986_ = XOR ( new_n3985_, new_n3983_ ) -new_n3987_ = NAND ( new_n3986_, new_n1530_ ) -new_n3988_ = OR ( new_n1530_, NET_10 ) -new_n3989_ = NAND ( new_n3988_, new_n3987_ ) -new_n3990_ = OR ( new_n3989_, NET_765 ) -new_n3991_ = OR ( new_n3175_, new_n2425_ ) -new_n3992_ = OR ( new_n3178_, new_n2665_ ) -NET_10516 = NAND ( new_n3992_, new_n3991_, new_n3990_ ) -new_n3994_ = OR ( new_n3767_, new_n3740_ ) -new_n3995_ = NAND ( new_n3753_, new_n2765_ ) -new_n3996_ = NAND ( new_n2713_, NET_654 ) -new_n3997_ = NAND ( new_n3743_, new_n2744_ ) -new_n3998_ = NAND ( new_n2772_, new_n2756_ ) -new_n3999_ = NAND ( new_n2758_, new_n3245_ ) -new_n4000_ = AND ( new_n3999_, new_n3998_, new_n3997_ ) -NET_10517 = NAND ( new_n4000_, new_n3996_, new_n3995_, new_n3994_ ) -new_n4002_ = NOT ( NET_14 ) -new_n4003_ = NAND ( new_n1530_, new_n3154_ ) -new_n4004_ = OR ( new_n1530_, NET_231 ) -new_n4005_ = NAND ( new_n4004_, new_n4003_ ) -new_n4006_ = OR ( new_n4005_, new_n4002_ ) -new_n4007_ = NAND ( new_n4005_, new_n4002_ ) -new_n4008_ = NAND ( new_n4007_, new_n4006_ ) -new_n4009_ = NAND ( new_n3607_, new_n3604_ ) -new_n4010_ = NAND ( new_n4009_, new_n3603_ ) -new_n4011_ = XNOR ( new_n4010_, new_n4008_ ) -new_n4012_ = OR ( new_n4011_, new_n1531_ ) -new_n4013_ = OR ( new_n1530_, NET_476 ) -new_n4014_ = NAND ( new_n4013_, new_n4012_ ) -new_n4015_ = OR ( new_n4014_, NET_275 ) -new_n4016_ = NOT ( NET_51 ) -new_n4017_ = OR ( new_n1692_, new_n4016_ ) -new_n4018_ = NAND ( new_n1712_, new_n3613_ ) -new_n4019_ = NAND ( new_n4018_, NET_51 ) -new_n4020_ = NAND ( new_n4019_, new_n1714_ ) -new_n4021_ = OR ( new_n4020_, new_n1696_ ) -NET_10588 = NAND ( new_n4021_, new_n4017_, new_n4015_ ) -new_n4023_ = NAND ( new_n3879_, new_n1870_ ) -new_n4024_ = NAND ( new_n1620_, new_n1618_ ) -new_n4025_ = XNOR ( new_n4024_, new_n1612_ ) -new_n4026_ = OR ( new_n4025_, new_n1531_ ) -new_n4027_ = OR ( new_n1530_, NET_461 ) -new_n4028_ = NAND ( new_n4027_, new_n4026_ ) -new_n4029_ = NAND ( new_n4028_, new_n1921_ ) -new_n4030_ = NOT ( NET_36 ) -new_n4031_ = NOR ( NET_64, new_n4030_ ) -new_n4032_ = XOR ( new_n3830_, new_n4030_ ) -new_n4033_ = NOR ( new_n4032_, new_n1694_ ) -new_n4034_ = OR ( new_n4033_, new_n4031_ ) -new_n4035_ = OR ( new_n4034_, new_n1921_ ) -new_n4036_ = NAND ( new_n4035_, new_n4029_ ) -new_n4037_ = NOT ( new_n4036_ ) -new_n4038_ = NAND ( new_n4037_, new_n1942_ ) -new_n4039_ = NAND ( new_n4034_, new_n1953_ ) -new_n4040_ = NAND ( new_n4039_, new_n4038_, new_n4023_ ) -new_n4041_ = XOR ( new_n4040_, new_n1844_ ) -new_n4042_ = NAND ( new_n3879_, new_n1960_ ) -new_n4043_ = NAND ( new_n4037_, new_n1870_ ) -new_n4044_ = OR ( new_n1951_, new_n3877_ ) -new_n4045_ = OR ( new_n1952_, new_n3875_ ) -new_n4046_ = NAND ( new_n4045_, new_n4044_, new_n4043_, new_n4042_ ) -new_n4047_ = OR ( new_n4046_, new_n4041_ ) -new_n4048_ = NAND ( new_n4046_, new_n4041_ ) -new_n4049_ = NAND ( new_n4048_, new_n4047_ ) -new_n4050_ = NAND ( new_n3851_, new_n3846_ ) -new_n4051_ = NAND ( new_n4050_, new_n3847_ ) -new_n4052_ = XOR ( new_n4051_, new_n4049_ ) -new_n4053_ = NOR ( new_n4052_, new_n1840_ ) -new_n4054_ = NAND ( new_n3879_, new_n1976_ ) -new_n4055_ = AND ( new_n4037_, new_n1978_ ) -new_n4056_ = OR ( new_n4055_, new_n4054_ ) -new_n4057_ = NAND ( new_n4055_, new_n4054_ ) -new_n4058_ = NAND ( new_n4057_, new_n4056_ ) -new_n4059_ = NAND ( new_n3863_, new_n3857_ ) -new_n4060_ = NAND ( new_n4059_, new_n3858_ ) -new_n4061_ = XNOR ( new_n4060_, new_n4058_ ) -new_n4062_ = OR ( new_n4061_, new_n1975_ ) -new_n4063_ = NAND ( new_n3867_, new_n2861_ ) -new_n4064_ = NAND ( new_n1838_, NET_164 ) -new_n4065_ = NAND ( new_n2005_, new_n3873_ ) -new_n4066_ = AND ( new_n4065_, new_n4064_, new_n4063_ ) -new_n4067_ = NAND ( new_n1901_, new_n1898_, NET_101 ) -new_n4068_ = OR ( NET_269, NET_257 ) -new_n4069_ = NAND ( NET_269, NET_257 ) -new_n4070_ = AND ( new_n4069_, new_n4068_ ) -new_n4071_ = NAND ( new_n4070_, new_n1878_ ) -new_n4072_ = NOT ( NET_165 ) -new_n4073_ = OR ( new_n1887_, new_n4072_ ) -new_n4074_ = NOT ( NET_133 ) -new_n4075_ = OR ( new_n1895_, new_n4074_ ) -new_n4076_ = NAND ( new_n4075_, new_n4073_, new_n4071_, new_n4067_ ) -new_n4077_ = NAND ( new_n4076_, new_n1994_ ) -new_n4078_ = OR ( new_n4036_, new_n1989_ ) -new_n4079_ = NAND ( new_n4078_, new_n4077_, new_n4066_, new_n4062_ ) -NET_10589 = OR ( new_n4079_, new_n4053_ ) -new_n4081_ = OR ( new_n3853_, new_n2778_ ) -new_n4082_ = NOT ( new_n2783_ ) -new_n4083_ = NAND ( new_n3834_, new_n4082_ ) -new_n4084_ = OR ( new_n1914_, new_n2859_ ) -new_n4085_ = NAND ( new_n1914_, NET_163 ) -new_n4086_ = NAND ( new_n4085_, new_n4084_ ) -new_n4087_ = XNOR ( new_n4086_, new_n3834_ ) -new_n4088_ = NAND ( new_n3625_, new_n2786_ ) -new_n4089_ = AND ( new_n4088_, new_n2826_ ) -new_n4090_ = OR ( new_n4089_, new_n3627_ ) -new_n4091_ = XOR ( new_n4090_, new_n4087_ ) -new_n4092_ = OR ( new_n4091_, new_n2789_ ) -new_n4093_ = NAND ( new_n4092_, new_n4083_, new_n4081_ ) -new_n4094_ = NAND ( new_n4093_, new_n2796_ ) -new_n4095_ = NAND ( new_n1968_, new_n1991_ ) -new_n4096_ = NAND ( new_n1926_, new_n1920_ ) -new_n4097_ = NAND ( new_n4096_, new_n4095_, NET_35975 ) -new_n4098_ = NAND ( new_n3834_, new_n2798_ ) -new_n4099_ = OR ( new_n4091_, new_n2804_ ) -new_n4100_ = NAND ( new_n2794_, new_n1947_, NET_275, NET_210 ) -new_n4101_ = AND ( new_n4100_, new_n4099_, new_n3893_ ) -NET_10590 = NAND ( new_n4101_, new_n4098_, new_n4097_, new_n4094_ ) -new_n4103_ = NOR ( new_n4052_, new_n2016_ ) -new_n4104_ = NOR ( new_n4061_, new_n2020_ ) -new_n4105_ = NAND ( new_n2853_, new_n3873_ ) -new_n4106_ = NAND ( new_n4076_, new_n2043_ ) -new_n4107_ = NAND ( new_n2009_, new_n3873_ ) -new_n4108_ = NAND ( new_n2864_, new_n2861_ ) -new_n4109_ = NAND ( new_n4108_, new_n4107_, new_n4106_ ) -new_n4110_ = NAND ( new_n4109_, new_n2042_ ) -new_n4111_ = OR ( NET_275, new_n3873_ ) -new_n4112_ = OR ( new_n4036_, new_n2039_ ) -new_n4113_ = NAND ( new_n4112_, new_n4111_, new_n4110_, new_n4105_ ) -NET_10591 = OR ( new_n4113_, new_n4104_, new_n4103_ ) -new_n4115_ = OR ( new_n3853_, new_n2873_ ) -new_n4116_ = NOT ( new_n3864_ ) -new_n4117_ = NAND ( new_n4116_, new_n2878_ ) -new_n4118_ = NAND ( new_n3879_, new_n1992_ ) -new_n4119_ = NAND ( new_n3836_, new_n2881_ ) -new_n4120_ = NAND ( new_n3644_, new_n2001_ ) -new_n4121_ = AND ( new_n4120_, new_n4119_, new_n4118_ ) -new_n4122_ = NAND ( new_n4121_, new_n4117_, new_n4115_ ) -new_n4123_ = NAND ( new_n4122_, new_n2892_ ) -new_n4124_ = NAND ( new_n2891_, NET_99 ) -NET_10592 = NAND ( new_n4124_, new_n4123_ ) -new_n4126_ = NAND ( new_n4122_, new_n2901_ ) -new_n4127_ = NAND ( new_n2900_, NET_131 ) -NET_10594 = NAND ( new_n4127_, new_n4126_ ) -new_n4129_ = NAND ( new_n1530_, new_n3151_ ) -new_n4130_ = OR ( new_n4011_, new_n1530_ ) -new_n4131_ = NAND ( new_n4130_, new_n4129_ ) -new_n4132_ = OR ( new_n4131_, NET_520 ) -new_n4133_ = OR ( new_n2054_, new_n2087_ ) -new_n4134_ = NAND ( new_n2088_, new_n2086_ ) -new_n4135_ = NAND ( new_n4134_, NET_296 ) -new_n4136_ = NAND ( new_n4135_, new_n2089_ ) -new_n4137_ = OR ( new_n4136_, new_n2058_ ) -NET_10606 = NAND ( new_n4137_, new_n4133_, new_n4132_ ) -new_n4139_ = AND ( new_n3962_, new_n2274_ ) -new_n4140_ = NAND ( new_n1530_, new_n3076_ ) -new_n4141_ = OR ( new_n4025_, new_n1530_ ) -new_n4142_ = NAND ( new_n4141_, new_n4140_ ) -new_n4143_ = NAND ( new_n4142_, new_n2290_ ) -new_n4144_ = NOT ( NET_281 ) -new_n4145_ = NOR ( NET_309, new_n4144_ ) -new_n4146_ = XOR ( new_n2068_, new_n4144_ ) -new_n4147_ = NOR ( new_n4146_, new_n2056_ ) -new_n4148_ = NOR ( new_n4147_, new_n4145_ ) -new_n4149_ = NAND ( new_n4148_, new_n2289_ ) -new_n4150_ = NAND ( new_n4149_, new_n4143_ ) -new_n4151_ = OR ( new_n4150_, new_n2309_ ) -new_n4152_ = NOT ( new_n4148_ ) -new_n4153_ = NAND ( new_n4152_, new_n2325_ ) -new_n4154_ = OR ( new_n2328_, new_n3960_ ) -new_n4155_ = OR ( new_n2330_, new_n3958_ ) -new_n4156_ = NAND ( new_n4155_, new_n4154_, new_n4153_, new_n4151_ ) -new_n4157_ = NOR ( new_n4156_, new_n4139_ ) -new_n4158_ = XNOR ( new_n4157_, new_n2218_ ) -new_n4159_ = NOT ( new_n4158_ ) -new_n4160_ = NOR ( new_n4150_, new_n2273_ ) -new_n4161_ = NAND ( new_n3962_, new_n2336_ ) -new_n4162_ = OR ( new_n4148_, new_n2338_ ) -new_n4163_ = OR ( new_n2323_, new_n3960_ ) -new_n4164_ = OR ( new_n2324_, new_n3958_ ) -new_n4165_ = NAND ( new_n4164_, new_n4163_, new_n4162_, new_n4161_ ) -new_n4166_ = NOR ( new_n4165_, new_n4160_ ) -new_n4167_ = NAND ( new_n4166_, new_n4159_ ) -new_n4168_ = OR ( new_n4166_, new_n4159_ ) -new_n4169_ = NAND ( new_n4168_, new_n4167_ ) -new_n4170_ = NAND ( new_n3928_, new_n3930_ ) -new_n4171_ = XOR ( new_n4170_, new_n4169_ ) -new_n4172_ = NOR ( new_n4171_, new_n2208_ ) -new_n4173_ = OR ( new_n4150_, new_n2349_ ) -new_n4174_ = NAND ( new_n3962_, new_n2349_ ) -new_n4175_ = NAND ( new_n4174_, new_n4173_ ) -new_n4176_ = XOR ( new_n4175_, new_n2349_ ) -new_n4177_ = OR ( new_n4150_, new_n2348_ ) -new_n4178_ = NAND ( new_n4177_, new_n4176_ ) -new_n4179_ = OR ( new_n4177_, new_n4176_ ) -new_n4180_ = NAND ( new_n4179_, new_n4178_ ) -new_n4181_ = NAND ( new_n3947_, new_n3942_ ) -new_n4182_ = XOR ( new_n4181_, new_n4180_ ) -new_n4183_ = OR ( new_n4182_, new_n2362_ ) -new_n4184_ = NAND ( new_n2976_, new_n2968_ ) -new_n4185_ = NAND ( new_n2196_, NET_409 ) -new_n4186_ = NAND ( new_n2380_, new_n3956_ ) -new_n4187_ = AND ( new_n4186_, new_n4185_, new_n4184_ ) -new_n4188_ = NAND ( new_n2250_, new_n2248_, NET_346 ) -new_n4189_ = OR ( NET_514, NET_502 ) -new_n4190_ = NAND ( NET_514, NET_502 ) -new_n4191_ = AND ( new_n4190_, new_n4189_ ) -new_n4192_ = NAND ( new_n4191_, new_n2228_ ) -new_n4193_ = NOT ( NET_410 ) -new_n4194_ = OR ( new_n2238_, new_n4193_ ) -new_n4195_ = NOT ( NET_378 ) -new_n4196_ = OR ( new_n2245_, new_n4195_ ) -new_n4197_ = NAND ( new_n4196_, new_n4194_, new_n4192_, new_n4188_ ) -new_n4198_ = NAND ( new_n4197_, new_n2369_ ) -new_n4199_ = OR ( new_n4150_, new_n2364_ ) -new_n4200_ = NAND ( new_n4199_, new_n4198_, new_n4187_, new_n4183_ ) -NET_10607 = OR ( new_n4200_, new_n4172_ ) -new_n4202_ = OR ( new_n3933_, new_n2983_ ) -new_n4203_ = OR ( new_n3906_, new_n2987_ ) -new_n4204_ = OR ( new_n2991_, new_n2974_ ) -new_n4205_ = OR ( new_n2287_, new_n2972_ ) -new_n4206_ = NAND ( new_n4205_, new_n4204_ ) -new_n4207_ = XOR ( new_n4206_, new_n3906_ ) -new_n4208_ = NOR ( new_n3681_, new_n3680_ ) -new_n4209_ = OR ( new_n4208_, new_n2917_ ) -new_n4210_ = NAND ( new_n4209_, new_n3682_ ) -new_n4211_ = XOR ( new_n4210_, new_n4207_ ) -new_n4212_ = OR ( new_n4211_, new_n2999_ ) -new_n4213_ = NAND ( new_n4212_, new_n4203_, new_n4202_ ) -new_n4214_ = NAND ( new_n4213_, new_n3006_ ) -new_n4215_ = OR ( new_n3933_, new_n3008_ ) -new_n4216_ = NAND ( new_n3910_, new_n3012_ ) -new_n4217_ = OR ( new_n4211_, new_n3016_ ) -new_n4218_ = NAND ( new_n3004_, new_n2405_, NET_520, NET_455 ) -new_n4219_ = AND ( new_n4218_, new_n4217_, new_n3975_ ) -NET_10608 = NAND ( new_n4219_, new_n4216_, new_n4215_, new_n4214_ ) -new_n4221_ = NOR ( new_n4171_, new_n2390_ ) -new_n4222_ = NOR ( new_n4182_, new_n2393_ ) -new_n4223_ = NAND ( new_n3025_, new_n3956_ ) -new_n4224_ = NAND ( new_n4197_, new_n2416_ ) -new_n4225_ = NAND ( new_n2384_, new_n3956_ ) -new_n4226_ = NAND ( new_n3029_, new_n2976_ ) -new_n4227_ = NAND ( new_n4226_, new_n4225_, new_n4224_ ) -new_n4228_ = NAND ( new_n4227_, new_n2415_ ) -new_n4229_ = OR ( NET_520, new_n3956_ ) -new_n4230_ = OR ( new_n4150_, new_n2412_ ) -new_n4231_ = NAND ( new_n4230_, new_n4229_, new_n4228_, new_n4223_ ) -NET_10609 = OR ( new_n4231_, new_n4222_, new_n4221_ ) -new_n4233_ = OR ( new_n3933_, new_n3037_ ) -new_n4234_ = OR ( new_n3949_, new_n3041_ ) -new_n4235_ = NAND ( new_n3962_, new_n2367_ ) -new_n4236_ = OR ( new_n3908_, new_n3045_ ) -new_n4237_ = NAND ( new_n2966_, new_n2376_ ) -new_n4238_ = AND ( new_n4237_, new_n4236_, new_n4235_ ) -new_n4239_ = NAND ( new_n4238_, new_n4234_, new_n4233_ ) -new_n4240_ = NAND ( new_n4239_, new_n3051_ ) -new_n4241_ = NAND ( new_n3053_, NET_344 ) -NET_10610 = NAND ( new_n4241_, new_n4240_ ) -new_n4243_ = NAND ( new_n4239_, new_n3057_ ) -new_n4244_ = OR ( new_n3057_, new_n2974_ ) -NET_10612 = NAND ( new_n4244_, new_n4243_ ) -new_n4246_ = OR ( new_n4052_, new_n2778_ ) -new_n4247_ = NAND ( new_n4034_, new_n4082_ ) -new_n4248_ = OR ( new_n1914_, new_n3877_ ) -new_n4249_ = NAND ( new_n1914_, NET_164 ) -new_n4250_ = NAND ( new_n4249_, new_n4248_ ) -new_n4251_ = XNOR ( new_n4250_, new_n4034_ ) -new_n4252_ = OR ( new_n4086_, new_n3834_ ) -new_n4253_ = NAND ( new_n4252_, new_n4090_ ) -new_n4254_ = NAND ( new_n4086_, new_n3834_ ) -new_n4255_ = NAND ( new_n4254_, new_n4253_ ) -new_n4256_ = XOR ( new_n4255_, new_n4251_ ) -new_n4257_ = OR ( new_n4256_, new_n2789_ ) -new_n4258_ = NAND ( new_n4257_, new_n4247_, new_n4246_ ) -new_n4259_ = AND ( new_n4258_, new_n2796_ ) -new_n4260_ = NAND ( new_n4034_, new_n2798_ ) -new_n4261_ = OR ( new_n4256_, new_n2804_ ) -new_n4262_ = NAND ( new_n2794_, new_n1947_, NET_275, NET_209 ) -new_n4263_ = NAND ( new_n4262_, new_n4261_, new_n4260_, new_n4111_ ) -NET_10694 = OR ( new_n4263_, new_n4259_ ) -new_n4265_ = NOR ( new_n4052_, new_n2873_ ) -new_n4266_ = NOT ( new_n4061_ ) -new_n4267_ = NAND ( new_n4266_, new_n2878_ ) -new_n4268_ = NAND ( new_n4076_, new_n1992_ ) -new_n4269_ = NOT ( new_n2881_ ) -new_n4270_ = OR ( new_n4036_, new_n4269_ ) -new_n4271_ = NAND ( new_n3644_, new_n2861_ ) -new_n4272_ = NAND ( new_n4271_, new_n4270_, new_n4268_, new_n4267_ ) -new_n4273_ = NOR ( new_n4272_, new_n4265_ ) -new_n4274_ = OR ( new_n4273_, new_n2891_ ) -new_n4275_ = NAND ( new_n2891_, NET_100 ) -NET_10695 = NAND ( new_n4275_, new_n4274_ ) -new_n4277_ = OR ( new_n4273_, new_n2900_ ) -new_n4278_ = NAND ( new_n2900_, NET_132 ) -NET_10696 = NAND ( new_n4278_, new_n4277_ ) -new_n4280_ = OR ( new_n4171_, new_n2983_ ) -new_n4281_ = OR ( new_n4148_, new_n2987_ ) -new_n4282_ = OR ( new_n2991_, new_n3960_ ) -new_n4283_ = OR ( new_n2287_, new_n3958_ ) -new_n4284_ = NAND ( new_n4283_, new_n4282_ ) -new_n4285_ = XOR ( new_n4284_, new_n4148_ ) -new_n4286_ = OR ( new_n4206_, new_n3910_ ) -new_n4287_ = NAND ( new_n4286_, new_n4210_ ) -new_n4288_ = NAND ( new_n4206_, new_n3910_ ) -new_n4289_ = NAND ( new_n4288_, new_n4287_ ) -new_n4290_ = XOR ( new_n4289_, new_n4285_ ) -new_n4291_ = OR ( new_n4290_, new_n2999_ ) -new_n4292_ = NAND ( new_n4291_, new_n4281_, new_n4280_ ) -new_n4293_ = NAND ( new_n4292_, new_n3006_ ) -new_n4294_ = OR ( new_n4171_, new_n3008_ ) -new_n4295_ = OR ( new_n4290_, new_n3016_ ) -new_n4296_ = NAND ( new_n4152_, new_n3012_ ) -new_n4297_ = NAND ( new_n3004_, new_n2405_, NET_520, NET_454 ) -new_n4298_ = AND ( new_n4297_, new_n4296_, new_n4229_ ) -NET_10716 = NAND ( new_n4298_, new_n4295_, new_n4294_, new_n4293_ ) -new_n4300_ = NOR ( new_n4171_, new_n3037_ ) -new_n4301_ = OR ( new_n4182_, new_n3041_ ) -new_n4302_ = NAND ( new_n4197_, new_n2367_ ) -new_n4303_ = OR ( new_n4150_, new_n3045_ ) -new_n4304_ = NAND ( new_n2976_, new_n2966_ ) -new_n4305_ = NAND ( new_n4304_, new_n4303_, new_n4302_, new_n4301_ ) -new_n4306_ = NOR ( new_n4305_, new_n4300_ ) -new_n4307_ = OR ( new_n4306_, new_n3053_ ) -new_n4308_ = NAND ( new_n3053_, NET_345 ) -NET_10717 = NAND ( new_n4308_, new_n4307_ ) -new_n4310_ = OR ( new_n4306_, new_n3707_ ) -new_n4311_ = OR ( new_n3057_, new_n3960_ ) -NET_10718 = NAND ( new_n4311_, new_n4310_ ) -new_n4313_ = NOT ( NET_481 ) -new_n4314_ = NOR ( new_n4313_, NET_236 ) -new_n4315_ = NOT ( NET_236 ) -new_n4316_ = NOR ( NET_481, new_n4315_ ) -new_n4317_ = OR ( new_n4316_, new_n4314_ ) -new_n4318_ = NOR ( new_n3985_, new_n3982_ ) -new_n4319_ = NOR ( new_n4318_, new_n3980_ ) -new_n4320_ = XOR ( new_n4319_, new_n4317_ ) -new_n4321_ = NAND ( new_n4320_, new_n1530_ ) -new_n4322_ = OR ( new_n1530_, NET_9 ) -new_n4323_ = NAND ( new_n4322_, new_n4321_ ) -new_n4324_ = OR ( new_n4323_, NET_765 ) -new_n4325_ = OR ( new_n3175_, new_n2555_ ) -new_n4326_ = OR ( new_n3178_, new_n2557_ ) -NET_10742 = NAND ( new_n4326_, new_n4325_, new_n4324_ ) -new_n4328_ = NOT ( new_n2524_ ) -new_n4329_ = NOR ( new_n3084_, new_n3082_ ) -new_n4330_ = XOR ( new_n4329_, new_n3080_ ) -new_n4331_ = NAND ( new_n4330_, new_n1530_ ) -new_n4332_ = OR ( new_n1530_, new_n1583_ ) -new_n4333_ = NAND ( new_n4332_, new_n4331_ ) -new_n4334_ = NAND ( new_n4333_, new_n2543_ ) -new_n4335_ = NOR ( NET_554, new_n2432_ ) -new_n4336_ = XOR ( new_n2438_, NET_527 ) -new_n4337_ = NOR ( new_n4336_, new_n2461_ ) -new_n4338_ = NOR ( new_n4337_, new_n4335_ ) -new_n4339_ = OR ( new_n4338_, new_n2543_ ) -new_n4340_ = NAND ( new_n4339_, new_n4334_ ) -new_n4341_ = NAND ( new_n4340_, new_n4328_ ) -new_n4342_ = NAND ( new_n3753_, new_n2579_ ) -new_n4343_ = OR ( new_n4338_, new_n2613_ ) -new_n4344_ = NAND ( new_n4343_, new_n4342_, new_n4341_ ) -new_n4345_ = XOR ( new_n4344_, new_n2618_ ) -new_n4346_ = NAND ( new_n3753_, new_n2620_ ) -new_n4347_ = NAND ( new_n4340_, new_n2579_ ) -new_n4348_ = OR ( new_n2624_, new_n3749_ ) -new_n4349_ = OR ( new_n2626_, new_n3751_ ) -new_n4350_ = NAND ( new_n4349_, new_n4348_, new_n4347_, new_n4346_ ) -new_n4351_ = NAND ( new_n4350_, new_n4345_ ) -new_n4352_ = OR ( new_n4350_, new_n4345_ ) -new_n4353_ = NAND ( new_n4352_, new_n4351_ ) -new_n4354_ = NAND ( new_n3739_, new_n3735_ ) -new_n4355_ = NAND ( new_n4354_, new_n3736_ ) -new_n4356_ = XOR ( new_n4355_, new_n4353_ ) -new_n4357_ = NOR ( new_n4356_, new_n3202_ ) -new_n4358_ = OR ( new_n4338_, new_n2732_ ) -new_n4359_ = NAND ( new_n4358_, new_n4334_ ) -new_n4360_ = NAND ( new_n4359_, new_n3240_ ) -new_n4361_ = NAND ( new_n3197_, NET_591 ) -new_n4362_ = NAND ( new_n2609_, new_n2607_, NET_592 ) -new_n4363_ = NOR ( NET_759, NET_747 ) -new_n4364_ = XOR ( new_n4363_, NET_750 ) -new_n4365_ = NAND ( new_n4364_, new_n2587_ ) -new_n4366_ = NOT ( NET_656 ) -new_n4367_ = OR ( new_n2597_, new_n4366_ ) -new_n4368_ = NOT ( NET_624 ) -new_n4369_ = OR ( new_n2604_, new_n4368_ ) -new_n4370_ = NAND ( new_n4369_, new_n4367_, new_n4365_, new_n4362_ ) -new_n4371_ = NAND ( new_n4370_, new_n3243_ ) -new_n4372_ = NAND ( new_n3253_, new_n3251_ ) -new_n4373_ = NAND ( new_n4372_, new_n4371_, new_n4361_, new_n4360_ ) -NET_10743 = OR ( new_n4373_, new_n4357_ ) -new_n4375_ = NOR ( new_n4356_, new_n3264_ ) -new_n4376_ = NAND ( new_n4359_, new_n3266_ ) -new_n4377_ = NAND ( new_n3262_, NET_623 ) -new_n4378_ = NAND ( new_n4370_, new_n3269_ ) -new_n4379_ = NAND ( new_n3271_, new_n3251_ ) -new_n4380_ = NAND ( new_n4379_, new_n4378_, new_n4377_, new_n4376_ ) -NET_10744 = OR ( new_n4380_, new_n4375_ ) -new_n4382_ = OR ( new_n4356_, new_n3767_ ) -new_n4383_ = NAND ( new_n2713_, NET_655 ) -new_n4384_ = NAND ( new_n4370_, new_n2765_ ) -new_n4385_ = NAND ( new_n4359_, new_n2744_ ) -new_n4386_ = NAND ( new_n3251_, new_n2756_ ) -new_n4387_ = NAND ( new_n3747_, new_n2758_ ) -new_n4388_ = AND ( new_n4387_, new_n4386_, new_n4385_ ) -NET_10745 = NAND ( new_n4388_, new_n4384_, new_n4383_, new_n4382_ ) -new_n4390_ = NOR ( new_n4356_, new_n3276_ ) -new_n4391_ = OR ( new_n3283_, new_n3749_ ) -new_n4392_ = NAND ( new_n3287_, NET_623 ) -new_n4393_ = NAND ( new_n4392_, new_n4391_ ) -new_n4394_ = NAND ( new_n4393_, new_n4338_ ) -new_n4395_ = OR ( new_n4393_, new_n4338_ ) -new_n4396_ = NAND ( new_n4395_, new_n4394_ ) -new_n4397_ = NAND ( new_n3784_, new_n3781_ ) -new_n4398_ = NAND ( new_n4397_, new_n3780_ ) -new_n4399_ = NAND ( new_n4398_, new_n4396_ ) -new_n4400_ = OR ( new_n4398_, new_n4396_ ) -new_n4401_ = NAND ( new_n4400_, new_n4399_, new_n3316_ ) -new_n4402_ = NOT ( new_n4338_ ) -new_n4403_ = NAND ( new_n4402_, new_n3323_ ) -new_n4404_ = OR ( new_n3314_, new_n3489_ ) -new_n4405_ = NAND ( NET_35979, NET_747 ) -new_n4406_ = NAND ( new_n4405_, new_n4404_, new_n4403_, new_n4401_ ) -NET_10746 = OR ( new_n4406_, new_n4390_ ) -new_n4408_ = OR ( new_n4356_, new_n3339_ ) -new_n4409_ = NAND ( new_n3747_, new_n3350_ ) -new_n4410_ = NAND ( new_n4370_, new_n3352_ ) -new_n4411_ = NAND ( new_n3747_, new_n3193_ ) -new_n4412_ = NAND ( new_n3355_, new_n3251_ ) -new_n4413_ = NAND ( new_n4412_, new_n4411_, new_n4410_ ) -new_n4414_ = NAND ( new_n4413_, new_n3359_ ) -new_n4415_ = NAND ( new_n4359_, new_n3361_ ) -new_n4416_ = NAND ( new_n4340_, new_n3363_ ) -new_n4417_ = AND ( new_n4416_, new_n4415_, new_n4405_ ) -NET_10747 = NAND ( new_n4417_, new_n4414_, new_n4409_, new_n4408_ ) -new_n4419_ = NOT ( NET_13 ) -new_n4420_ = NAND ( new_n1530_, new_n3160_ ) -new_n4421_ = OR ( new_n1530_, NET_232 ) -new_n4422_ = NAND ( new_n4421_, new_n4420_ ) -new_n4423_ = OR ( new_n4422_, new_n4419_ ) -new_n4424_ = NAND ( new_n4422_, new_n4419_ ) -new_n4425_ = NAND ( new_n4424_, new_n4423_ ) -new_n4426_ = NAND ( new_n4010_, new_n4007_ ) -new_n4427_ = NAND ( new_n4426_, new_n4006_ ) -new_n4428_ = XNOR ( new_n4427_, new_n4425_ ) -new_n4429_ = OR ( new_n4428_, new_n1531_ ) -new_n4430_ = OR ( new_n1530_, NET_477 ) -new_n4431_ = NAND ( new_n4430_, new_n4429_ ) -new_n4432_ = OR ( new_n4431_, NET_275 ) -new_n4433_ = OR ( new_n1692_, new_n1710_ ) -new_n4434_ = OR ( new_n1715_, new_n1696_ ) -NET_10823 = NAND ( new_n4434_, new_n4433_, new_n4432_ ) -new_n4436_ = NAND ( new_n4076_, new_n1870_ ) -new_n4437_ = NAND ( new_n1622_, new_n1588_ ) -new_n4438_ = XNOR ( new_n4437_, new_n1621_ ) -new_n4439_ = OR ( new_n4438_, new_n1531_ ) -new_n4440_ = OR ( new_n1530_, NET_462 ) -new_n4441_ = NAND ( new_n4440_, new_n4439_ ) -new_n4442_ = NAND ( new_n4441_, new_n1921_ ) -new_n4443_ = NOR ( NET_64, new_n1697_ ) -new_n4444_ = XOR ( new_n1699_, NET_37 ) -new_n4445_ = NOR ( new_n4444_, new_n1694_ ) -new_n4446_ = OR ( new_n4445_, new_n4443_ ) -new_n4447_ = OR ( new_n4446_, new_n1921_ ) -new_n4448_ = NAND ( new_n4447_, new_n4442_ ) -new_n4449_ = NOT ( new_n4448_ ) -new_n4450_ = NAND ( new_n4449_, new_n1942_ ) -new_n4451_ = NAND ( new_n4446_, new_n1953_ ) -new_n4452_ = NAND ( new_n4451_, new_n4450_, new_n4436_ ) -new_n4453_ = XOR ( new_n4452_, new_n1844_ ) -new_n4454_ = NAND ( new_n4076_, new_n1960_ ) -new_n4455_ = NAND ( new_n4449_, new_n1870_ ) -new_n4456_ = OR ( new_n1951_, new_n4074_ ) -new_n4457_ = OR ( new_n1952_, new_n4072_ ) -new_n4458_ = NAND ( new_n4457_, new_n4456_, new_n4455_, new_n4454_ ) -new_n4459_ = NAND ( new_n4458_, new_n4453_ ) -new_n4460_ = OR ( new_n4458_, new_n4453_ ) -new_n4461_ = NAND ( new_n4460_, new_n4459_ ) -new_n4462_ = NAND ( new_n4051_, new_n4047_ ) -new_n4463_ = NAND ( new_n4462_, new_n4048_ ) -new_n4464_ = XOR ( new_n4463_, new_n4461_ ) -new_n4465_ = NOR ( new_n4464_, new_n1840_ ) -new_n4466_ = NAND ( new_n4076_, new_n1976_ ) -new_n4467_ = AND ( new_n4449_, new_n1978_ ) -new_n4468_ = OR ( new_n4467_, new_n4466_ ) -new_n4469_ = NAND ( new_n4467_, new_n4466_ ) -new_n4470_ = NAND ( new_n4469_, new_n4468_ ) -new_n4471_ = NAND ( new_n4060_, new_n4056_ ) -new_n4472_ = NAND ( new_n4471_, new_n4057_ ) -new_n4473_ = XNOR ( new_n4472_, new_n4470_ ) -new_n4474_ = OR ( new_n4473_, new_n1975_ ) -new_n4475_ = NAND ( new_n3879_, new_n3867_ ) -new_n4476_ = NAND ( new_n1838_, NET_165 ) -new_n4477_ = NAND ( new_n4070_, new_n2005_ ) -new_n4478_ = AND ( new_n4477_, new_n4476_, new_n4475_ ) -new_n4479_ = NAND ( new_n1901_, new_n1898_, NET_102 ) -new_n4480_ = NOT ( NET_260 ) -new_n4481_ = AND ( new_n4069_, new_n4480_ ) -new_n4482_ = NOR ( new_n4069_, new_n4480_ ) -new_n4483_ = NOR ( new_n4482_, new_n4481_ ) -new_n4484_ = NAND ( new_n4483_, new_n1878_ ) -new_n4485_ = NOT ( NET_166 ) -new_n4486_ = OR ( new_n1887_, new_n4485_ ) -new_n4487_ = NOT ( NET_134 ) -new_n4488_ = OR ( new_n1895_, new_n4487_ ) -new_n4489_ = NAND ( new_n4488_, new_n4486_, new_n4484_, new_n4479_ ) -new_n4490_ = NAND ( new_n4489_, new_n1994_ ) -new_n4491_ = OR ( new_n4448_, new_n1989_ ) -new_n4492_ = NAND ( new_n4491_, new_n4490_, new_n4478_, new_n4474_ ) -NET_10824 = OR ( new_n4492_, new_n4465_ ) -new_n4494_ = NAND ( new_n1530_, new_n3157_ ) -new_n4495_ = OR ( new_n4428_, new_n1530_ ) -new_n4496_ = NAND ( new_n4495_, new_n4494_ ) -new_n4497_ = OR ( new_n4496_, NET_520 ) -new_n4498_ = OR ( new_n2054_, new_n2134_ ) -new_n4499_ = OR ( new_n2135_, new_n2058_ ) -NET_10840 = NAND ( new_n4499_, new_n4498_, new_n4497_ ) -new_n4501_ = AND ( new_n4197_, new_n2274_ ) -new_n4502_ = NAND ( new_n1530_, new_n3081_ ) -new_n4503_ = OR ( new_n4438_, new_n1530_ ) -new_n4504_ = NAND ( new_n4503_, new_n4502_ ) -new_n4505_ = NAND ( new_n4504_, new_n2290_ ) -new_n4506_ = NOR ( NET_309, new_n2063_ ) -new_n4507_ = XOR ( new_n2069_, NET_282 ) -new_n4508_ = NOR ( new_n4507_, new_n2056_ ) -new_n4509_ = NOR ( new_n4508_, new_n4506_ ) -new_n4510_ = NAND ( new_n4509_, new_n2289_ ) -new_n4511_ = NAND ( new_n4510_, new_n4505_ ) -new_n4512_ = OR ( new_n4511_, new_n2309_ ) -new_n4513_ = NOT ( new_n4509_ ) -new_n4514_ = NAND ( new_n4513_, new_n2325_ ) -new_n4515_ = OR ( new_n2328_, new_n4195_ ) -new_n4516_ = OR ( new_n2330_, new_n4193_ ) -new_n4517_ = NAND ( new_n4516_, new_n4515_, new_n4514_, new_n4512_ ) -new_n4518_ = NOR ( new_n4517_, new_n4501_ ) -new_n4519_ = XNOR ( new_n4518_, new_n2218_ ) -new_n4520_ = NOT ( new_n4519_ ) -new_n4521_ = NOR ( new_n4511_, new_n2273_ ) -new_n4522_ = NAND ( new_n4197_, new_n2336_ ) -new_n4523_ = OR ( new_n4509_, new_n2338_ ) -new_n4524_ = OR ( new_n2323_, new_n4195_ ) -new_n4525_ = OR ( new_n2324_, new_n4193_ ) -new_n4526_ = NAND ( new_n4525_, new_n4524_, new_n4523_, new_n4522_ ) -new_n4527_ = NOR ( new_n4526_, new_n4521_ ) -new_n4528_ = OR ( new_n4527_, new_n4520_ ) -new_n4529_ = NAND ( new_n4527_, new_n4520_ ) -new_n4530_ = NAND ( new_n4529_, new_n4528_ ) -new_n4531_ = NAND ( new_n4170_, new_n4167_ ) -new_n4532_ = NAND ( new_n4531_, new_n4168_ ) -new_n4533_ = XOR ( new_n4532_, new_n4530_ ) -new_n4534_ = NOR ( new_n4533_, new_n2390_ ) -new_n4535_ = OR ( new_n4511_, new_n2349_ ) -new_n4536_ = NAND ( new_n4197_, new_n2349_ ) -new_n4537_ = NAND ( new_n4536_, new_n4535_ ) -new_n4538_ = XOR ( new_n4537_, new_n2349_ ) -new_n4539_ = OR ( new_n4511_, new_n2348_ ) -new_n4540_ = OR ( new_n4539_, new_n4538_ ) -new_n4541_ = NAND ( new_n4539_, new_n4538_ ) -new_n4542_ = NAND ( new_n4541_, new_n4540_ ) -new_n4543_ = NAND ( new_n4181_, new_n4178_ ) -new_n4544_ = NAND ( new_n4543_, new_n4179_ ) -new_n4545_ = XOR ( new_n4544_, new_n4542_ ) -new_n4546_ = NOR ( new_n4545_, new_n2393_ ) -new_n4547_ = NAND ( new_n4191_, new_n3025_ ) -new_n4548_ = NAND ( new_n2250_, new_n2248_, NET_347 ) -new_n4549_ = NOT ( NET_505 ) -new_n4550_ = AND ( new_n4190_, new_n4549_ ) -new_n4551_ = NOR ( new_n4190_, new_n4549_ ) -new_n4552_ = NOR ( new_n4551_, new_n4550_ ) -new_n4553_ = NAND ( new_n4552_, new_n2228_ ) -new_n4554_ = NOT ( NET_411 ) -new_n4555_ = OR ( new_n2238_, new_n4554_ ) -new_n4556_ = NOT ( NET_379 ) -new_n4557_ = OR ( new_n2245_, new_n4556_ ) -new_n4558_ = NAND ( new_n4557_, new_n4555_, new_n4553_, new_n4548_ ) -new_n4559_ = NAND ( new_n4558_, new_n2416_ ) -new_n4560_ = NAND ( new_n4191_, new_n2384_ ) -new_n4561_ = NAND ( new_n3962_, new_n3029_ ) -new_n4562_ = NAND ( new_n4561_, new_n4560_, new_n4559_ ) -new_n4563_ = NAND ( new_n4562_, new_n2415_ ) -new_n4564_ = OR ( new_n4511_, new_n2412_ ) -new_n4565_ = NAND ( NET_35976, NET_502 ) -new_n4566_ = NAND ( new_n4565_, new_n4564_, new_n4563_, new_n4547_ ) -NET_10841 = OR ( new_n4566_, new_n4546_, new_n4534_ ) -new_n4568_ = NOR ( new_n4464_, new_n2016_ ) -new_n4569_ = NOR ( new_n4473_, new_n2020_ ) -new_n4570_ = NAND ( new_n4070_, new_n2853_ ) -new_n4571_ = NAND ( new_n4489_, new_n2043_ ) -new_n4572_ = NAND ( new_n4070_, new_n2009_ ) -new_n4573_ = NAND ( new_n3879_, new_n2864_ ) -new_n4574_ = NAND ( new_n4573_, new_n4572_, new_n4571_ ) -new_n4575_ = NAND ( new_n4574_, new_n2042_ ) -new_n4576_ = NAND ( NET_35973, NET_257 ) -new_n4577_ = OR ( new_n4448_, new_n2039_ ) -new_n4578_ = NAND ( new_n4577_, new_n4576_, new_n4575_, new_n4570_ ) -NET_10918 = OR ( new_n4578_, new_n4569_, new_n4568_ ) -new_n4580_ = NOR ( new_n4533_, new_n2208_ ) -new_n4581_ = OR ( new_n4545_, new_n2362_ ) -new_n4582_ = NAND ( new_n3962_, new_n2968_ ) -new_n4583_ = NAND ( new_n2196_, NET_410 ) -new_n4584_ = NAND ( new_n4191_, new_n2380_ ) -new_n4585_ = AND ( new_n4584_, new_n4583_, new_n4582_ ) -new_n4586_ = NAND ( new_n4558_, new_n2369_ ) -new_n4587_ = OR ( new_n4511_, new_n2364_ ) -new_n4588_ = NAND ( new_n4587_, new_n4586_, new_n4585_, new_n4581_ ) -NET_10941 = OR ( new_n4588_, new_n4580_ ) -new_n4590_ = NOT ( NET_482 ) -new_n4591_ = NOR ( new_n4590_, NET_237 ) -new_n4592_ = NOT ( NET_237 ) -new_n4593_ = NOR ( NET_482, new_n4592_ ) -new_n4594_ = OR ( new_n4593_, new_n4591_ ) -new_n4595_ = NOR ( new_n4319_, new_n4316_ ) -new_n4596_ = NOR ( new_n4595_, new_n4314_ ) -new_n4597_ = XOR ( new_n4596_, new_n4594_ ) -new_n4598_ = NAND ( new_n4597_, new_n1530_ ) -new_n4599_ = OR ( new_n1530_, NET_8 ) -new_n4600_ = NAND ( new_n4599_, new_n4598_ ) -new_n4601_ = OR ( new_n4600_, NET_765 ) -new_n4602_ = OR ( new_n3175_, new_n2421_ ) -new_n4603_ = OR ( new_n3178_, new_n2466_ ) -NET_10966 = NAND ( new_n4603_, new_n4602_, new_n4601_ ) -new_n4605_ = NOR ( new_n3089_, new_n3087_ ) -new_n4606_ = XOR ( new_n4605_, new_n3085_ ) -new_n4607_ = NAND ( new_n4606_, new_n1530_ ) -new_n4608_ = OR ( new_n1530_, new_n1625_ ) -new_n4609_ = NAND ( new_n4608_, new_n4607_ ) -new_n4610_ = NAND ( new_n4609_, new_n2543_ ) -new_n4611_ = NOR ( NET_554, new_n2433_ ) -new_n4612_ = NAND ( new_n2438_, new_n2432_ ) -new_n4613_ = XOR ( new_n4612_, new_n2433_ ) -new_n4614_ = NOR ( new_n4613_, new_n2461_ ) -new_n4615_ = NOR ( new_n4614_, new_n4611_ ) -new_n4616_ = OR ( new_n4615_, new_n2543_ ) -new_n4617_ = NAND ( new_n4616_, new_n4610_ ) -new_n4618_ = NAND ( new_n4617_, new_n4328_ ) -new_n4619_ = NAND ( new_n4370_, new_n2579_ ) -new_n4620_ = OR ( new_n4615_, new_n2613_ ) -new_n4621_ = NAND ( new_n4620_, new_n4619_, new_n4618_ ) -new_n4622_ = XOR ( new_n4621_, new_n2618_ ) -new_n4623_ = NAND ( new_n4370_, new_n2620_ ) -new_n4624_ = NAND ( new_n4617_, new_n2579_ ) -new_n4625_ = OR ( new_n2624_, new_n4366_ ) -new_n4626_ = OR ( new_n2626_, new_n4368_ ) -new_n4627_ = NAND ( new_n4626_, new_n4625_, new_n4624_, new_n4623_ ) -new_n4628_ = OR ( new_n4627_, new_n4622_ ) -new_n4629_ = NAND ( new_n4627_, new_n4622_ ) -new_n4630_ = NAND ( new_n4629_, new_n4628_ ) -new_n4631_ = NAND ( new_n4355_, new_n4352_ ) -new_n4632_ = NAND ( new_n4631_, new_n4351_ ) -new_n4633_ = XOR ( new_n4632_, new_n4630_ ) -new_n4634_ = NOR ( new_n4633_, new_n3202_ ) -new_n4635_ = OR ( new_n4615_, new_n2732_ ) -new_n4636_ = NAND ( new_n4635_, new_n4610_ ) -new_n4637_ = NAND ( new_n4636_, new_n3240_ ) -new_n4638_ = NAND ( new_n3197_, NET_592 ) -new_n4639_ = NOT ( NET_593 ) -new_n4640_ = NAND ( new_n2609_, new_n2607_ ) -new_n4641_ = OR ( new_n4640_, new_n4639_ ) -new_n4642_ = NOT ( NET_738 ) -new_n4643_ = NOT ( NET_750 ) -new_n4644_ = NAND ( new_n4363_, new_n4643_ ) -new_n4645_ = XOR ( new_n4644_, new_n4642_ ) -new_n4646_ = NAND ( new_n4645_, new_n2587_ ) -new_n4647_ = NOT ( NET_657 ) -new_n4648_ = OR ( new_n2597_, new_n4647_ ) -new_n4649_ = NOT ( NET_625 ) -new_n4650_ = OR ( new_n2604_, new_n4649_ ) -new_n4651_ = NAND ( new_n4650_, new_n4648_, new_n4646_, new_n4641_ ) -new_n4652_ = NAND ( new_n4651_, new_n3243_ ) -new_n4653_ = NAND ( new_n3753_, new_n3253_ ) -new_n4654_ = NAND ( new_n4653_, new_n4652_, new_n4638_, new_n4637_ ) -NET_10967 = OR ( new_n4654_, new_n4634_ ) -new_n4656_ = NOR ( new_n4633_, new_n3264_ ) -new_n4657_ = NAND ( new_n4636_, new_n3266_ ) -new_n4658_ = NAND ( new_n3262_, NET_624 ) -new_n4659_ = NAND ( new_n4651_, new_n3269_ ) -new_n4660_ = NAND ( new_n3753_, new_n3271_ ) -new_n4661_ = NAND ( new_n4660_, new_n4659_, new_n4658_, new_n4657_ ) -NET_10968 = OR ( new_n4661_, new_n4656_ ) -new_n4663_ = OR ( new_n4633_, new_n3767_ ) -new_n4664_ = NAND ( new_n2713_, NET_656 ) -new_n4665_ = NAND ( new_n4651_, new_n2765_ ) -new_n4666_ = NAND ( new_n4636_, new_n2744_ ) -new_n4667_ = NAND ( new_n3753_, new_n2756_ ) -new_n4668_ = NAND ( new_n4364_, new_n2758_ ) -new_n4669_ = AND ( new_n4668_, new_n4667_, new_n4666_ ) -NET_10969 = NAND ( new_n4669_, new_n4665_, new_n4664_, new_n4663_ ) -new_n4671_ = NOR ( new_n4633_, new_n3276_ ) -new_n4672_ = OR ( new_n3283_, new_n4366_ ) -new_n4673_ = NAND ( new_n3287_, NET_624 ) -new_n4674_ = NAND ( new_n4673_, new_n4672_ ) -new_n4675_ = NAND ( new_n4674_, new_n4615_ ) -new_n4676_ = OR ( new_n4674_, new_n4615_ ) -new_n4677_ = NAND ( new_n4676_, new_n4675_ ) -new_n4678_ = NAND ( new_n4398_, new_n4395_ ) -new_n4679_ = NAND ( new_n4678_, new_n4394_ ) -new_n4680_ = NAND ( new_n4679_, new_n4677_ ) -new_n4681_ = OR ( new_n4679_, new_n4677_ ) -new_n4682_ = NAND ( new_n4681_, new_n4680_, new_n3316_ ) -new_n4683_ = NOT ( new_n4615_ ) -new_n4684_ = NAND ( new_n4683_, new_n3323_ ) -new_n4685_ = OR ( new_n3314_, new_n3497_ ) -new_n4686_ = OR ( NET_765, new_n4643_ ) -new_n4687_ = NAND ( new_n4686_, new_n4685_, new_n4684_, new_n4682_ ) -NET_10970 = OR ( new_n4687_, new_n4671_ ) -new_n4689_ = OR ( new_n4633_, new_n3339_ ) -new_n4690_ = NAND ( new_n4364_, new_n3350_ ) -new_n4691_ = NAND ( new_n4651_, new_n3352_ ) -new_n4692_ = NAND ( new_n4364_, new_n3193_ ) -new_n4693_ = NAND ( new_n3753_, new_n3355_ ) -new_n4694_ = NAND ( new_n4693_, new_n4692_, new_n4691_ ) -new_n4695_ = NAND ( new_n4694_, new_n3359_ ) -new_n4696_ = NAND ( new_n4636_, new_n3361_ ) -new_n4697_ = NAND ( new_n4617_, new_n3363_ ) -new_n4698_ = AND ( new_n4697_, new_n4696_, new_n4686_ ) -NET_10971 = NAND ( new_n4698_, new_n4695_, new_n4690_, new_n4689_ ) -new_n4700_ = NAND ( new_n1530_, new_n3166_ ) -new_n4701_ = OR ( new_n1530_, NET_233 ) -new_n4702_ = NAND ( new_n4701_, new_n4700_ ) -new_n4703_ = XOR ( new_n4702_, NET_12 ) -new_n4704_ = NAND ( new_n4427_, new_n4424_ ) -new_n4705_ = NAND ( new_n4704_, new_n4423_ ) -new_n4706_ = XNOR ( new_n4705_, new_n4703_ ) -new_n4707_ = OR ( new_n4706_, new_n1531_ ) -new_n4708_ = OR ( new_n1530_, NET_478 ) -new_n4709_ = NAND ( new_n4708_, new_n4707_ ) -new_n4710_ = OR ( new_n4709_, NET_275 ) -new_n4711_ = OR ( new_n1692_, new_n1733_ ) -new_n4712_ = OR ( new_n1742_, new_n1696_ ) -NET_11051 = NAND ( new_n4712_, new_n4711_, new_n4710_ ) -new_n4714_ = NAND ( new_n4489_, new_n1870_ ) -new_n4715_ = NAND ( new_n1632_, new_n1630_ ) -new_n4716_ = XNOR ( new_n4715_, new_n1624_ ) -new_n4717_ = OR ( new_n4716_, new_n1531_ ) -new_n4718_ = OR ( new_n1530_, NET_463 ) -new_n4719_ = NAND ( new_n4718_, new_n4717_ ) -new_n4720_ = NAND ( new_n4719_, new_n1921_ ) -new_n4721_ = NOT ( NET_38 ) -new_n4722_ = NOR ( NET_64, new_n4721_ ) -new_n4723_ = NAND ( new_n1699_, new_n1697_ ) -new_n4724_ = XOR ( new_n4723_, new_n4721_ ) -new_n4725_ = NOR ( new_n4724_, new_n1694_ ) -new_n4726_ = OR ( new_n4725_, new_n4722_ ) -new_n4727_ = OR ( new_n4726_, new_n1921_ ) -new_n4728_ = NAND ( new_n4727_, new_n4720_ ) -new_n4729_ = NOT ( new_n4728_ ) -new_n4730_ = NAND ( new_n4729_, new_n1942_ ) -new_n4731_ = NAND ( new_n4726_, new_n1953_ ) -new_n4732_ = NAND ( new_n4731_, new_n4730_, new_n4714_ ) -new_n4733_ = XOR ( new_n4732_, new_n1844_ ) -new_n4734_ = NAND ( new_n4489_, new_n1960_ ) -new_n4735_ = NAND ( new_n4729_, new_n1870_ ) -new_n4736_ = OR ( new_n1951_, new_n4487_ ) -new_n4737_ = OR ( new_n1952_, new_n4485_ ) -new_n4738_ = NAND ( new_n4737_, new_n4736_, new_n4735_, new_n4734_ ) -new_n4739_ = OR ( new_n4738_, new_n4733_ ) -new_n4740_ = NAND ( new_n4738_, new_n4733_ ) -new_n4741_ = NAND ( new_n4740_, new_n4739_ ) -new_n4742_ = NAND ( new_n4463_, new_n4460_ ) -new_n4743_ = NAND ( new_n4742_, new_n4459_ ) -new_n4744_ = XOR ( new_n4743_, new_n4741_ ) -new_n4745_ = NOR ( new_n4744_, new_n1840_ ) -new_n4746_ = NAND ( new_n4489_, new_n1976_ ) -new_n4747_ = AND ( new_n4729_, new_n1978_ ) -new_n4748_ = OR ( new_n4747_, new_n4746_ ) -new_n4749_ = NAND ( new_n4747_, new_n4746_ ) -new_n4750_ = NAND ( new_n4749_, new_n4748_ ) -new_n4751_ = NAND ( new_n4472_, new_n4468_ ) -new_n4752_ = NAND ( new_n4751_, new_n4469_ ) -new_n4753_ = XNOR ( new_n4752_, new_n4750_ ) -new_n4754_ = OR ( new_n4753_, new_n1975_ ) -new_n4755_ = NAND ( new_n4076_, new_n3867_ ) -new_n4756_ = NAND ( new_n1838_, NET_166 ) -new_n4757_ = NAND ( new_n4483_, new_n2005_ ) -new_n4758_ = AND ( new_n4757_, new_n4756_, new_n4755_ ) -new_n4759_ = NAND ( new_n1901_, new_n1898_, NET_103 ) -new_n4760_ = OR ( new_n4482_, NET_248 ) -new_n4761_ = NAND ( new_n4482_, NET_248 ) -new_n4762_ = AND ( new_n4761_, new_n4760_ ) -new_n4763_ = NAND ( new_n4762_, new_n1878_ ) -new_n4764_ = NOT ( NET_167 ) -new_n4765_ = OR ( new_n1887_, new_n4764_ ) -new_n4766_ = NOT ( NET_135 ) -new_n4767_ = OR ( new_n1895_, new_n4766_ ) -new_n4768_ = NAND ( new_n4767_, new_n4765_, new_n4763_, new_n4759_ ) -new_n4769_ = NAND ( new_n4768_, new_n1994_ ) -new_n4770_ = OR ( new_n4728_, new_n1989_ ) -new_n4771_ = NAND ( new_n4770_, new_n4769_, new_n4758_, new_n4754_ ) -NET_11052 = OR ( new_n4771_, new_n4745_ ) -new_n4773_ = OR ( new_n4464_, new_n2778_ ) -new_n4774_ = NAND ( new_n4446_, new_n4082_ ) -new_n4775_ = OR ( new_n1914_, new_n4074_ ) -new_n4776_ = NAND ( new_n1914_, NET_165 ) -new_n4777_ = NAND ( new_n4776_, new_n4775_ ) -new_n4778_ = NAND ( new_n4777_, new_n4446_ ) -new_n4779_ = OR ( new_n4777_, new_n4446_ ) -new_n4780_ = NAND ( new_n4779_, new_n4778_ ) -new_n4781_ = OR ( new_n4250_, new_n4034_ ) -new_n4782_ = NAND ( new_n4781_, new_n4255_ ) -new_n4783_ = NAND ( new_n4250_, new_n4034_ ) -new_n4784_ = NAND ( new_n4783_, new_n4782_ ) -new_n4785_ = XOR ( new_n4784_, new_n4780_ ) -new_n4786_ = OR ( new_n4785_, new_n2789_ ) -new_n4787_ = NAND ( new_n4786_, new_n4774_, new_n4773_ ) -new_n4788_ = NAND ( new_n4787_, new_n2796_ ) -new_n4789_ = OR ( new_n4785_, new_n2804_ ) -new_n4790_ = NAND ( new_n4446_, new_n2798_ ) -new_n4791_ = NAND ( new_n2794_, new_n1947_, NET_275, NET_208 ) -new_n4792_ = AND ( new_n4791_, new_n4790_, new_n4576_ ) -NET_11053 = NAND ( new_n4792_, new_n4789_, new_n4788_, new_n4097_ ) -new_n4794_ = NOR ( new_n4744_, new_n2016_ ) -new_n4795_ = NOR ( new_n4753_, new_n2020_ ) -new_n4796_ = NAND ( new_n4483_, new_n2853_ ) -new_n4797_ = NAND ( new_n4768_, new_n2043_ ) -new_n4798_ = NAND ( new_n4483_, new_n2009_ ) -new_n4799_ = NAND ( new_n4076_, new_n2864_ ) -new_n4800_ = NAND ( new_n4799_, new_n4798_, new_n4797_ ) -new_n4801_ = NAND ( new_n4800_, new_n2042_ ) -new_n4802_ = OR ( new_n4728_, new_n2039_ ) -new_n4803_ = OR ( NET_275, new_n4480_ ) -new_n4804_ = NAND ( new_n4803_, new_n4802_, new_n4801_, new_n4796_ ) -NET_11054 = OR ( new_n4804_, new_n4795_, new_n4794_ ) -new_n4806_ = NOR ( new_n4464_, new_n2873_ ) -new_n4807_ = NOT ( new_n4473_ ) -new_n4808_ = NAND ( new_n4807_, new_n2878_ ) -new_n4809_ = NAND ( new_n4489_, new_n1992_ ) -new_n4810_ = OR ( new_n4448_, new_n4269_ ) -new_n4811_ = NAND ( new_n3879_, new_n3644_ ) -new_n4812_ = NAND ( new_n4811_, new_n4810_, new_n4809_, new_n4808_ ) -new_n4813_ = NOR ( new_n4812_, new_n4806_ ) -new_n4814_ = OR ( new_n4813_, new_n2891_ ) -new_n4815_ = NAND ( new_n2891_, NET_101 ) -NET_11055 = NAND ( new_n4815_, new_n4814_ ) -new_n4817_ = OR ( new_n4813_, new_n2900_ ) -new_n4818_ = NAND ( new_n2900_, NET_133 ) -NET_11056 = NAND ( new_n4818_, new_n4817_ ) -new_n4820_ = NAND ( new_n1530_, new_n3163_ ) -new_n4821_ = OR ( new_n4706_, new_n1530_ ) -new_n4822_ = NAND ( new_n4821_, new_n4820_ ) -new_n4823_ = OR ( new_n4822_, NET_520 ) -new_n4824_ = OR ( new_n2054_, new_n2129_ ) -new_n4825_ = OR ( new_n2130_, new_n2058_ ) -NET_11080 = NAND ( new_n4825_, new_n4824_, new_n4823_ ) -new_n4827_ = OR ( new_n4533_, new_n2983_ ) -new_n4828_ = OR ( new_n4509_, new_n2987_ ) -new_n4829_ = OR ( new_n2991_, new_n4195_ ) -new_n4830_ = OR ( new_n2287_, new_n4193_ ) -new_n4831_ = NAND ( new_n4830_, new_n4829_ ) -new_n4832_ = NAND ( new_n4831_, new_n4513_ ) -new_n4833_ = OR ( new_n4831_, new_n4513_ ) -new_n4834_ = NAND ( new_n4833_, new_n4832_ ) -new_n4835_ = OR ( new_n4284_, new_n4152_ ) -new_n4836_ = NAND ( new_n4835_, new_n4289_ ) -new_n4837_ = NAND ( new_n4284_, new_n4152_ ) -new_n4838_ = NAND ( new_n4837_, new_n4836_ ) -new_n4839_ = XOR ( new_n4838_, new_n4834_ ) -new_n4840_ = OR ( new_n4839_, new_n2999_ ) -new_n4841_ = NAND ( new_n4840_, new_n4828_, new_n4827_ ) -new_n4842_ = NAND ( new_n4841_, new_n3006_ ) -new_n4843_ = OR ( new_n4533_, new_n3008_ ) -new_n4844_ = OR ( new_n4839_, new_n3016_ ) -new_n4845_ = NAND ( new_n4513_, new_n3012_ ) -new_n4846_ = NAND ( new_n3004_, new_n2405_, NET_520, NET_453 ) -new_n4847_ = AND ( new_n4846_, new_n4845_, new_n4565_ ) -NET_11081 = NAND ( new_n4847_, new_n4844_, new_n4843_, new_n4842_ ) -new_n4849_ = NAND ( new_n4558_, new_n2274_ ) -new_n4850_ = NAND ( new_n1530_, new_n3086_ ) -new_n4851_ = OR ( new_n4716_, new_n1530_ ) -new_n4852_ = NAND ( new_n4851_, new_n4850_ ) -new_n4853_ = NAND ( new_n4852_, new_n2290_ ) -new_n4854_ = NOR ( NET_309, new_n2064_ ) -new_n4855_ = NAND ( new_n2069_, new_n2063_ ) -new_n4856_ = XOR ( new_n4855_, new_n2064_ ) -new_n4857_ = NOR ( new_n4856_, new_n2056_ ) -new_n4858_ = NOR ( new_n4857_, new_n4854_ ) -new_n4859_ = NAND ( new_n4858_, new_n2289_ ) -new_n4860_ = NAND ( new_n4859_, new_n4853_ ) -new_n4861_ = OR ( new_n4860_, new_n2309_ ) -new_n4862_ = NOT ( new_n4858_ ) -new_n4863_ = NAND ( new_n4862_, new_n2325_ ) -new_n4864_ = OR ( new_n2328_, new_n4556_ ) -new_n4865_ = OR ( new_n2330_, new_n4554_ ) -new_n4866_ = AND ( new_n4865_, new_n4864_, new_n4863_ ) -new_n4867_ = NAND ( new_n4866_, new_n4861_, new_n4849_ ) -new_n4868_ = XOR ( new_n4867_, new_n2218_ ) -new_n4869_ = OR ( new_n4860_, new_n2273_ ) -new_n4870_ = NAND ( new_n4558_, new_n2336_ ) -new_n4871_ = OR ( new_n4858_, new_n2338_ ) -new_n4872_ = OR ( new_n2323_, new_n4556_ ) -new_n4873_ = OR ( new_n2324_, new_n4554_ ) -new_n4874_ = AND ( new_n4873_, new_n4872_, new_n4871_ ) -new_n4875_ = NAND ( new_n4874_, new_n4870_, new_n4869_ ) -new_n4876_ = OR ( new_n4875_, new_n4868_ ) -new_n4877_ = NAND ( new_n4875_, new_n4868_ ) -new_n4878_ = NAND ( new_n4877_, new_n4876_ ) -new_n4879_ = NAND ( new_n4532_, new_n4529_ ) -new_n4880_ = NAND ( new_n4879_, new_n4528_ ) -new_n4881_ = XOR ( new_n4880_, new_n4878_ ) -new_n4882_ = NOR ( new_n4881_, new_n2390_ ) -new_n4883_ = OR ( new_n4860_, new_n2349_ ) -new_n4884_ = NAND ( new_n4558_, new_n2349_ ) -new_n4885_ = NAND ( new_n4884_, new_n4883_ ) -new_n4886_ = XOR ( new_n4885_, new_n2349_ ) -new_n4887_ = OR ( new_n4860_, new_n2348_ ) -new_n4888_ = NAND ( new_n4887_, new_n4886_ ) -new_n4889_ = OR ( new_n4887_, new_n4886_ ) -new_n4890_ = NAND ( new_n4889_, new_n4888_ ) -new_n4891_ = NAND ( new_n4544_, new_n4541_ ) -new_n4892_ = NAND ( new_n4891_, new_n4540_ ) -new_n4893_ = XOR ( new_n4892_, new_n4890_ ) -new_n4894_ = NOR ( new_n4893_, new_n2393_ ) -new_n4895_ = NAND ( new_n4552_, new_n3025_ ) -new_n4896_ = NAND ( new_n2250_, new_n2248_, NET_348 ) -new_n4897_ = OR ( new_n4551_, NET_493 ) -new_n4898_ = NAND ( new_n4551_, NET_493 ) -new_n4899_ = AND ( new_n4898_, new_n4897_ ) -new_n4900_ = NAND ( new_n4899_, new_n2228_ ) -new_n4901_ = NOT ( NET_412 ) -new_n4902_ = OR ( new_n2238_, new_n4901_ ) -new_n4903_ = NOT ( NET_380 ) -new_n4904_ = OR ( new_n2245_, new_n4903_ ) -new_n4905_ = NAND ( new_n4904_, new_n4902_, new_n4900_, new_n4896_ ) -new_n4906_ = NAND ( new_n4905_, new_n2416_ ) -new_n4907_ = NAND ( new_n4552_, new_n2384_ ) -new_n4908_ = NAND ( new_n4197_, new_n3029_ ) -new_n4909_ = NAND ( new_n4908_, new_n4907_, new_n4906_ ) -new_n4910_ = NAND ( new_n4909_, new_n2415_ ) -new_n4911_ = OR ( new_n4860_, new_n2412_ ) -new_n4912_ = OR ( NET_520, new_n4549_ ) -new_n4913_ = NAND ( new_n4912_, new_n4911_, new_n4910_, new_n4895_ ) -NET_11082 = OR ( new_n4913_, new_n4894_, new_n4882_ ) -new_n4915_ = NOR ( new_n4533_, new_n3037_ ) -new_n4916_ = OR ( new_n4545_, new_n3041_ ) -new_n4917_ = NAND ( new_n4558_, new_n2367_ ) -new_n4918_ = OR ( new_n4511_, new_n3045_ ) -new_n4919_ = NAND ( new_n3962_, new_n2966_ ) -new_n4920_ = NAND ( new_n4919_, new_n4918_, new_n4917_, new_n4916_ ) -new_n4921_ = NOR ( new_n4920_, new_n4915_ ) -new_n4922_ = OR ( new_n4921_, new_n3053_ ) -new_n4923_ = NAND ( new_n3053_, NET_346 ) -NET_11083 = NAND ( new_n4923_, new_n4922_ ) -new_n4925_ = OR ( new_n4921_, new_n3707_ ) -new_n4926_ = OR ( new_n3057_, new_n4195_ ) -NET_11084 = NAND ( new_n4926_, new_n4925_ ) -new_n4928_ = NOR ( new_n4881_, new_n2208_ ) -new_n4929_ = OR ( new_n4893_, new_n2362_ ) -new_n4930_ = NAND ( new_n4197_, new_n2968_ ) -new_n4931_ = NAND ( new_n2196_, NET_411 ) -new_n4932_ = NAND ( new_n4552_, new_n2380_ ) -new_n4933_ = AND ( new_n4932_, new_n4931_, new_n4930_ ) -new_n4934_ = NAND ( new_n4905_, new_n2369_ ) -new_n4935_ = OR ( new_n4860_, new_n2364_ ) -new_n4936_ = NAND ( new_n4935_, new_n4934_, new_n4933_, new_n4929_ ) -NET_11184 = OR ( new_n4936_, new_n4928_ ) -new_n4938_ = NOT ( NET_483 ) -new_n4939_ = NOR ( new_n4938_, NET_238 ) -new_n4940_ = NOT ( NET_238 ) -new_n4941_ = NOR ( NET_483, new_n4940_ ) -new_n4942_ = OR ( new_n4941_, new_n4939_ ) -new_n4943_ = NOR ( new_n4596_, new_n4593_ ) -new_n4944_ = NOR ( new_n4943_, new_n4591_ ) -new_n4945_ = XOR ( new_n4944_, new_n4942_ ) -new_n4946_ = NAND ( new_n4945_, new_n1530_ ) -new_n4947_ = OR ( new_n1530_, NET_7 ) -new_n4948_ = NAND ( new_n4947_, new_n4946_ ) -new_n4949_ = OR ( new_n4948_, NET_765 ) -new_n4950_ = OR ( new_n3175_, new_n2422_ ) -new_n4951_ = OR ( new_n3178_, new_n2462_ ) -NET_11202 = NAND ( new_n4951_, new_n4950_, new_n4949_ ) -new_n4953_ = NOR ( new_n3094_, new_n3092_ ) -new_n4954_ = XOR ( new_n4953_, new_n3090_ ) -new_n4955_ = NAND ( new_n4954_, new_n1530_ ) -new_n4956_ = OR ( new_n1530_, new_n1577_ ) -new_n4957_ = NAND ( new_n4956_, new_n4955_ ) -new_n4958_ = OR ( new_n4957_, new_n2735_ ) -new_n4959_ = OR ( NET_554, new_n2434_ ) -new_n4960_ = OR ( new_n4612_, NET_528 ) -new_n4961_ = NAND ( new_n4960_, NET_529 ) -new_n4962_ = NAND ( new_n4961_, new_n2439_ ) -new_n4963_ = OR ( new_n4962_, new_n2461_ ) -new_n4964_ = NAND ( new_n4963_, new_n4959_ ) -new_n4965_ = OR ( new_n4964_, new_n2543_ ) -new_n4966_ = NAND ( new_n4965_, new_n4958_ ) -new_n4967_ = OR ( new_n4966_, new_n2524_ ) -new_n4968_ = NAND ( new_n4651_, new_n2579_ ) -new_n4969_ = NOT ( new_n4964_ ) -new_n4970_ = OR ( new_n4969_, new_n2613_ ) -new_n4971_ = NAND ( new_n4970_, new_n4968_, new_n4967_ ) -new_n4972_ = XOR ( new_n4971_, new_n2618_ ) -new_n4973_ = NAND ( new_n4651_, new_n2620_ ) -new_n4974_ = OR ( new_n4966_, new_n2578_ ) -new_n4975_ = OR ( new_n2624_, new_n4647_ ) -new_n4976_ = OR ( new_n2626_, new_n4649_ ) -new_n4977_ = NAND ( new_n4976_, new_n4975_, new_n4974_, new_n4973_ ) -new_n4978_ = OR ( new_n4977_, new_n4972_ ) -new_n4979_ = NAND ( new_n4977_, new_n4972_ ) -new_n4980_ = NAND ( new_n4979_, new_n4978_ ) -new_n4981_ = NAND ( new_n4632_, new_n4628_ ) -new_n4982_ = NAND ( new_n4981_, new_n4980_, new_n4629_ ) -new_n4983_ = NAND ( new_n4981_, new_n4629_ ) -new_n4984_ = NAND ( new_n4983_, new_n4979_, new_n4978_ ) -new_n4985_ = NAND ( new_n4984_, new_n4982_ ) -new_n4986_ = OR ( new_n4985_, new_n3202_ ) -new_n4987_ = NOT ( new_n3240_ ) -new_n4988_ = OR ( new_n4969_, new_n2732_ ) -new_n4989_ = NAND ( new_n4957_, new_n2543_ ) -new_n4990_ = NAND ( new_n4989_, new_n4988_ ) -new_n4991_ = NOT ( new_n4990_ ) -new_n4992_ = NOR ( new_n4991_, new_n4987_ ) -new_n4993_ = NOR ( new_n3198_, new_n4639_ ) -new_n4994_ = NOR ( new_n4993_, new_n4992_ ) -new_n4995_ = NAND ( new_n2609_, new_n2607_, NET_594 ) -new_n4996_ = NOR ( new_n4644_, NET_738 ) -new_n4997_ = XOR ( new_n4996_, NET_764 ) -new_n4998_ = NAND ( new_n4997_, new_n2587_ ) -new_n4999_ = NOT ( NET_658 ) -new_n5000_ = OR ( new_n2597_, new_n4999_ ) -new_n5001_ = NOT ( NET_626 ) -new_n5002_ = OR ( new_n2604_, new_n5001_ ) -new_n5003_ = NAND ( new_n5002_, new_n5000_, new_n4998_, new_n4995_ ) -new_n5004_ = NAND ( new_n5003_, new_n3243_ ) -new_n5005_ = NAND ( new_n4370_, new_n3253_ ) -NET_11203 = NAND ( new_n5005_, new_n5004_, new_n4994_, new_n4986_ ) -new_n5007_ = OR ( new_n4985_, new_n3264_ ) -new_n5008_ = NOT ( new_n3266_ ) -new_n5009_ = NOR ( new_n4991_, new_n5008_ ) -new_n5010_ = NOR ( new_n3263_, new_n4649_ ) -new_n5011_ = NOR ( new_n5010_, new_n5009_ ) -new_n5012_ = NAND ( new_n5003_, new_n3269_ ) -new_n5013_ = NAND ( new_n4370_, new_n3271_ ) -NET_11204 = NAND ( new_n5013_, new_n5012_, new_n5011_, new_n5007_ ) -new_n5015_ = OR ( new_n4985_, new_n3767_ ) -new_n5016_ = NAND ( new_n2713_, NET_657 ) -new_n5017_ = NAND ( new_n5003_, new_n2765_ ) -new_n5018_ = OR ( new_n4991_, new_n2743_ ) -new_n5019_ = NAND ( new_n4370_, new_n2756_ ) -new_n5020_ = NAND ( new_n4645_, new_n2758_ ) -new_n5021_ = AND ( new_n5020_, new_n5019_, new_n5018_ ) -NET_11205 = NAND ( new_n5021_, new_n5017_, new_n5016_, new_n5015_ ) -new_n5023_ = OR ( new_n4985_, new_n3276_ ) -new_n5024_ = OR ( new_n3283_, new_n4647_ ) -new_n5025_ = NAND ( new_n3287_, NET_625 ) -new_n5026_ = NAND ( new_n5025_, new_n5024_ ) -new_n5027_ = NAND ( new_n5026_, new_n4969_ ) -new_n5028_ = OR ( new_n5026_, new_n4969_ ) -new_n5029_ = NAND ( new_n5028_, new_n5027_ ) -new_n5030_ = NAND ( new_n4679_, new_n4676_ ) -new_n5031_ = NAND ( new_n5030_, new_n4675_ ) -new_n5032_ = NAND ( new_n5031_, new_n5029_ ) -new_n5033_ = OR ( new_n5031_, new_n5029_ ) -new_n5034_ = NAND ( new_n5033_, new_n5032_, new_n3316_ ) -new_n5035_ = NAND ( new_n4964_, new_n3323_ ) -new_n5036_ = OR ( new_n3314_, new_n3505_ ) -new_n5037_ = OR ( NET_765, new_n4642_ ) -new_n5038_ = AND ( new_n5037_, new_n5036_, new_n5035_ ) -NET_11206 = NAND ( new_n5038_, new_n5034_, new_n5023_ ) -new_n5040_ = OR ( new_n4985_, new_n3339_ ) -new_n5041_ = NAND ( new_n4645_, new_n3350_ ) -new_n5042_ = NAND ( new_n5003_, new_n3352_ ) -new_n5043_ = NAND ( new_n4645_, new_n3193_ ) -new_n5044_ = NAND ( new_n4370_, new_n3355_ ) -new_n5045_ = NAND ( new_n5044_, new_n5043_, new_n5042_ ) -new_n5046_ = NAND ( new_n5045_, new_n3359_ ) -new_n5047_ = NAND ( new_n4990_, new_n3361_ ) -new_n5048_ = OR ( new_n4966_, new_n3364_ ) -new_n5049_ = AND ( new_n5048_, new_n5047_, new_n5037_ ) -NET_11207 = NAND ( new_n5049_, new_n5046_, new_n5041_, new_n5040_ ) -new_n5051_ = NAND ( new_n1530_, new_n3061_ ) -new_n5052_ = OR ( new_n1530_, NET_234 ) -new_n5053_ = NAND ( new_n5052_, new_n5051_ ) -new_n5054_ = XOR ( new_n5053_, NET_11 ) -new_n5055_ = NOT ( NET_12 ) -new_n5056_ = NAND ( new_n4702_, new_n5055_ ) -new_n5057_ = NAND ( new_n5056_, new_n4705_ ) -new_n5058_ = OR ( new_n4702_, new_n5055_ ) -new_n5059_ = NAND ( new_n5058_, new_n5057_ ) -new_n5060_ = XNOR ( new_n5059_, new_n5054_ ) -new_n5061_ = OR ( new_n5060_, new_n1531_ ) -new_n5062_ = OR ( new_n1530_, NET_479 ) -new_n5063_ = NAND ( new_n5062_, new_n5061_ ) -new_n5064_ = OR ( new_n5063_, NET_275 ) -new_n5065_ = OR ( new_n1692_, new_n1718_ ) -new_n5066_ = OR ( new_n1723_, new_n1696_ ) -NET_11288 = NAND ( new_n5066_, new_n5065_, new_n5064_ ) -new_n5068_ = NAND ( new_n4768_, new_n1870_ ) -new_n5069_ = NAND ( new_n1634_, new_n1582_ ) -new_n5070_ = XNOR ( new_n5069_, new_n1633_ ) -new_n5071_ = OR ( new_n5070_, new_n1531_ ) -new_n5072_ = OR ( new_n1530_, NET_464 ) -new_n5073_ = NAND ( new_n5072_, new_n5071_ ) -new_n5074_ = NAND ( new_n5073_, new_n1921_ ) -new_n5075_ = NOT ( NET_39 ) -new_n5076_ = OR ( NET_64, new_n5075_ ) -new_n5077_ = NAND ( new_n1700_, new_n1699_, new_n1697_ ) -new_n5078_ = OR ( new_n4723_, NET_38 ) -new_n5079_ = NAND ( new_n5078_, NET_39 ) -new_n5080_ = NAND ( new_n5079_, new_n5077_ ) -new_n5081_ = OR ( new_n5080_, new_n1694_ ) -new_n5082_ = NAND ( new_n5081_, new_n5076_ ) -new_n5083_ = OR ( new_n5082_, new_n1921_ ) -new_n5084_ = NAND ( new_n5083_, new_n5074_ ) -new_n5085_ = NOT ( new_n5084_ ) -new_n5086_ = NAND ( new_n5085_, new_n1942_ ) -new_n5087_ = NAND ( new_n5082_, new_n1953_ ) -new_n5088_ = NAND ( new_n5087_, new_n5086_, new_n5068_ ) -new_n5089_ = XOR ( new_n5088_, new_n1844_ ) -new_n5090_ = NAND ( new_n4768_, new_n1960_ ) -new_n5091_ = NAND ( new_n5085_, new_n1870_ ) -new_n5092_ = OR ( new_n1951_, new_n4766_ ) -new_n5093_ = OR ( new_n1952_, new_n4764_ ) -new_n5094_ = NAND ( new_n5093_, new_n5092_, new_n5091_, new_n5090_ ) -new_n5095_ = OR ( new_n5094_, new_n5089_ ) -new_n5096_ = NAND ( new_n5094_, new_n5089_ ) -new_n5097_ = NAND ( new_n5096_, new_n5095_ ) -new_n5098_ = NAND ( new_n4743_, new_n4739_ ) -new_n5099_ = NAND ( new_n5098_, new_n5097_, new_n4740_ ) -new_n5100_ = NAND ( new_n5098_, new_n4740_ ) -new_n5101_ = NAND ( new_n5100_, new_n5096_, new_n5095_ ) -new_n5102_ = NAND ( new_n5101_, new_n5099_ ) -new_n5103_ = OR ( new_n5102_, new_n1840_ ) -new_n5104_ = NAND ( new_n4768_, new_n1976_ ) -new_n5105_ = AND ( new_n5085_, new_n1978_ ) -new_n5106_ = OR ( new_n5105_, new_n5104_ ) -new_n5107_ = NAND ( new_n5105_, new_n5104_ ) -new_n5108_ = NAND ( new_n5107_, new_n5106_ ) -new_n5109_ = NAND ( new_n4752_, new_n4748_ ) -new_n5110_ = NAND ( new_n5109_, new_n4749_ ) -new_n5111_ = XNOR ( new_n5110_, new_n5108_ ) -new_n5112_ = OR ( new_n5111_, new_n1975_ ) -new_n5113_ = NAND ( new_n4489_, new_n3867_ ) -new_n5114_ = NAND ( new_n1838_, NET_167 ) -new_n5115_ = NAND ( new_n4762_, new_n2005_ ) -new_n5116_ = NAND ( new_n5115_, new_n5114_, new_n5113_ ) -new_n5117_ = NAND ( new_n1901_, new_n1898_, NET_104 ) -new_n5118_ = NOT ( NET_274 ) -new_n5119_ = XOR ( new_n4761_, new_n5118_ ) -new_n5120_ = NAND ( new_n5119_, new_n1878_ ) -new_n5121_ = NOT ( NET_168 ) -new_n5122_ = OR ( new_n1887_, new_n5121_ ) -new_n5123_ = NOT ( NET_136 ) -new_n5124_ = OR ( new_n1895_, new_n5123_ ) -new_n5125_ = NAND ( new_n5124_, new_n5122_, new_n5120_, new_n5117_ ) -new_n5126_ = AND ( new_n5125_, new_n1994_ ) -new_n5127_ = NOR ( new_n5084_, new_n1989_ ) -new_n5128_ = NOR ( new_n5127_, new_n5126_, new_n5116_ ) -NET_11289 = NAND ( new_n5128_, new_n5112_, new_n5103_ ) -new_n5130_ = OR ( new_n4744_, new_n2778_ ) -new_n5131_ = NAND ( new_n4726_, new_n4082_ ) -new_n5132_ = OR ( new_n1914_, new_n4487_ ) -new_n5133_ = NAND ( new_n1914_, NET_166 ) -new_n5134_ = NAND ( new_n5133_, new_n5132_ ) -new_n5135_ = OR ( new_n5134_, new_n4726_ ) -new_n5136_ = NAND ( new_n5134_, new_n4726_ ) -new_n5137_ = NAND ( new_n5136_, new_n5135_ ) -new_n5138_ = NAND ( new_n4784_, new_n4779_ ) -new_n5139_ = NAND ( new_n5138_, new_n4778_ ) -new_n5140_ = XOR ( new_n5139_, new_n5137_ ) -new_n5141_ = OR ( new_n5140_, new_n2789_ ) -new_n5142_ = NAND ( new_n5141_, new_n5131_, new_n5130_ ) -new_n5143_ = AND ( new_n5142_, new_n2796_ ) -new_n5144_ = OR ( new_n5140_, new_n2804_ ) -new_n5145_ = NAND ( new_n4726_, new_n2798_ ) -new_n5146_ = NAND ( new_n2794_, new_n1947_, NET_275, NET_207 ) -new_n5147_ = NAND ( new_n5146_, new_n5145_, new_n5144_, new_n4803_ ) -NET_11290 = OR ( new_n5147_, new_n5143_ ) -new_n5149_ = OR ( new_n5102_, new_n2016_ ) -new_n5150_ = OR ( new_n5111_, new_n2020_ ) -new_n5151_ = NAND ( new_n4762_, new_n2853_ ) -new_n5152_ = NAND ( new_n5125_, new_n2043_ ) -new_n5153_ = NAND ( new_n4762_, new_n2009_ ) -new_n5154_ = NAND ( new_n4489_, new_n2864_ ) -new_n5155_ = NAND ( new_n5154_, new_n5153_, new_n5152_ ) -new_n5156_ = NAND ( new_n5155_, new_n2042_ ) -new_n5157_ = OR ( new_n5084_, new_n2039_ ) -new_n5158_ = NAND ( NET_35973, NET_248 ) -new_n5159_ = AND ( new_n5158_, new_n5157_, new_n5156_ ) -NET_11291 = NAND ( new_n5159_, new_n5151_, new_n5150_, new_n5149_ ) -new_n5161_ = NOR ( new_n4744_, new_n2873_ ) -new_n5162_ = NOT ( new_n4753_ ) -new_n5163_ = NAND ( new_n5162_, new_n2878_ ) -new_n5164_ = NAND ( new_n4768_, new_n1992_ ) -new_n5165_ = OR ( new_n4728_, new_n4269_ ) -new_n5166_ = NAND ( new_n4076_, new_n3644_ ) -new_n5167_ = NAND ( new_n5166_, new_n5165_, new_n5164_, new_n5163_ ) -new_n5168_ = NOR ( new_n5167_, new_n5161_ ) -new_n5169_ = OR ( new_n5168_, new_n2891_ ) -new_n5170_ = NAND ( new_n2891_, NET_102 ) -NET_11292 = NAND ( new_n5170_, new_n5169_ ) -new_n5172_ = OR ( new_n5168_, new_n2900_ ) -new_n5173_ = NAND ( new_n2900_, NET_134 ) -NET_11293 = NAND ( new_n5173_, new_n5172_ ) -new_n5175_ = NAND ( new_n1530_, new_n3063_ ) -new_n5176_ = OR ( new_n5060_, new_n1530_ ) -new_n5177_ = NAND ( new_n5176_, new_n5175_ ) -new_n5178_ = OR ( new_n5177_, NET_520 ) -new_n5179_ = OR ( new_n2054_, new_n2084_ ) -new_n5180_ = NAND ( new_n2141_, new_n2057_ ) -NET_11316 = NAND ( new_n5180_, new_n5179_, new_n5178_ ) -new_n5182_ = OR ( new_n4881_, new_n2983_ ) -new_n5183_ = OR ( new_n4858_, new_n2987_ ) -new_n5184_ = OR ( new_n2991_, new_n4556_ ) -new_n5185_ = OR ( new_n2287_, new_n4554_ ) -new_n5186_ = NAND ( new_n5185_, new_n5184_ ) -new_n5187_ = OR ( new_n5186_, new_n4862_ ) -new_n5188_ = NAND ( new_n5186_, new_n4862_ ) -new_n5189_ = NAND ( new_n5188_, new_n5187_ ) -new_n5190_ = NAND ( new_n4838_, new_n4833_ ) -new_n5191_ = NAND ( new_n5190_, new_n4832_ ) -new_n5192_ = XOR ( new_n5191_, new_n5189_ ) -new_n5193_ = OR ( new_n5192_, new_n2999_ ) -new_n5194_ = NAND ( new_n5193_, new_n5183_, new_n5182_ ) -new_n5195_ = NAND ( new_n5194_, new_n3006_ ) -new_n5196_ = OR ( new_n4881_, new_n3008_ ) -new_n5197_ = OR ( new_n5192_, new_n3016_ ) -new_n5198_ = NAND ( new_n4862_, new_n3012_ ) -new_n5199_ = NAND ( new_n3004_, new_n2405_, NET_520, NET_452 ) -new_n5200_ = AND ( new_n5199_, new_n5198_, new_n4912_ ) -NET_11317 = NAND ( new_n5200_, new_n5197_, new_n5196_, new_n5195_ ) -new_n5202_ = NAND ( new_n4905_, new_n2274_ ) -new_n5203_ = NAND ( new_n1530_, new_n3091_ ) -new_n5204_ = OR ( new_n5070_, new_n1530_ ) -new_n5205_ = NAND ( new_n5204_, new_n5203_ ) -new_n5206_ = NAND ( new_n5205_, new_n2290_ ) -new_n5207_ = OR ( NET_309, new_n2065_ ) -new_n5208_ = OR ( new_n4855_, NET_283 ) -new_n5209_ = NAND ( new_n5208_, NET_284 ) -new_n5210_ = NAND ( new_n5209_, new_n2070_ ) -new_n5211_ = OR ( new_n5210_, new_n2056_ ) -new_n5212_ = NAND ( new_n5211_, new_n5207_ ) -new_n5213_ = OR ( new_n5212_, new_n2290_ ) -new_n5214_ = NAND ( new_n5213_, new_n5206_ ) -new_n5215_ = OR ( new_n5214_, new_n2309_ ) -new_n5216_ = NAND ( new_n5212_, new_n2325_ ) -new_n5217_ = OR ( new_n2328_, new_n4903_ ) -new_n5218_ = OR ( new_n2330_, new_n4901_ ) -new_n5219_ = AND ( new_n5218_, new_n5217_, new_n5216_ ) -new_n5220_ = NAND ( new_n5219_, new_n5215_, new_n5202_ ) -new_n5221_ = XOR ( new_n5220_, new_n2218_ ) -new_n5222_ = OR ( new_n5214_, new_n2273_ ) -new_n5223_ = NAND ( new_n4905_, new_n2336_ ) -new_n5224_ = NAND ( new_n5212_, new_n2339_ ) -new_n5225_ = OR ( new_n2323_, new_n4903_ ) -new_n5226_ = OR ( new_n2324_, new_n4901_ ) -new_n5227_ = AND ( new_n5226_, new_n5225_, new_n5224_ ) -new_n5228_ = NAND ( new_n5227_, new_n5223_, new_n5222_ ) -new_n5229_ = NAND ( new_n5228_, new_n5221_ ) -new_n5230_ = OR ( new_n5228_, new_n5221_ ) -new_n5231_ = NAND ( new_n4880_, new_n4876_ ) -new_n5232_ = NAND ( new_n5231_, new_n4877_ ) -new_n5233_ = NAND ( new_n5232_, new_n5230_, new_n5229_ ) -new_n5234_ = NAND ( new_n5230_, new_n5229_ ) -new_n5235_ = NAND ( new_n5234_, new_n5231_, new_n4877_ ) -new_n5236_ = NAND ( new_n5235_, new_n5233_ ) -new_n5237_ = OR ( new_n5236_, new_n2390_ ) -new_n5238_ = OR ( new_n5214_, new_n2349_ ) -new_n5239_ = NAND ( new_n4905_, new_n2349_ ) -new_n5240_ = NAND ( new_n5239_, new_n5238_ ) -new_n5241_ = XOR ( new_n5240_, new_n2349_ ) -new_n5242_ = OR ( new_n5214_, new_n2348_ ) -new_n5243_ = NAND ( new_n5242_, new_n5241_ ) -new_n5244_ = NOR ( new_n5242_, new_n5241_ ) -new_n5245_ = NOT ( new_n5244_ ) -new_n5246_ = NAND ( new_n5245_, new_n5243_ ) -new_n5247_ = NAND ( new_n4892_, new_n4888_ ) -new_n5248_ = NAND ( new_n5247_, new_n5246_, new_n4889_ ) -new_n5249_ = NAND ( new_n5247_, new_n4889_ ) -new_n5250_ = NAND ( new_n5249_, new_n5243_ ) -new_n5251_ = OR ( new_n5250_, new_n5244_ ) -new_n5252_ = NAND ( new_n5251_, new_n5248_ ) -new_n5253_ = OR ( new_n5252_, new_n2393_ ) -new_n5254_ = NAND ( new_n4899_, new_n3025_ ) -new_n5255_ = NAND ( new_n2250_, new_n2248_, NET_349 ) -new_n5256_ = NOT ( NET_519 ) -new_n5257_ = XOR ( new_n4898_, new_n5256_ ) -new_n5258_ = NAND ( new_n5257_, new_n2228_ ) -new_n5259_ = NOT ( NET_413 ) -new_n5260_ = OR ( new_n2238_, new_n5259_ ) -new_n5261_ = NOT ( NET_381 ) -new_n5262_ = OR ( new_n2245_, new_n5261_ ) -new_n5263_ = NAND ( new_n5262_, new_n5260_, new_n5258_, new_n5255_ ) -new_n5264_ = NAND ( new_n5263_, new_n2416_ ) -new_n5265_ = NAND ( new_n4899_, new_n2384_ ) -new_n5266_ = NAND ( new_n4558_, new_n3029_ ) -new_n5267_ = NAND ( new_n5266_, new_n5265_, new_n5264_ ) -new_n5268_ = NAND ( new_n5267_, new_n2415_ ) -new_n5269_ = OR ( new_n5214_, new_n2412_ ) -new_n5270_ = NAND ( NET_35976, NET_493 ) -new_n5271_ = AND ( new_n5270_, new_n5269_, new_n5268_ ) -NET_11318 = NAND ( new_n5271_, new_n5254_, new_n5253_, new_n5237_ ) -new_n5273_ = NOR ( new_n4881_, new_n3037_ ) -new_n5274_ = OR ( new_n4893_, new_n3041_ ) -new_n5275_ = NAND ( new_n4905_, new_n2367_ ) -new_n5276_ = OR ( new_n4860_, new_n3045_ ) -new_n5277_ = NAND ( new_n4197_, new_n2966_ ) -new_n5278_ = NAND ( new_n5277_, new_n5276_, new_n5275_, new_n5274_ ) -new_n5279_ = NOR ( new_n5278_, new_n5273_ ) -new_n5280_ = OR ( new_n5279_, new_n3053_ ) -new_n5281_ = NAND ( new_n3053_, NET_347 ) -NET_11319 = NAND ( new_n5281_, new_n5280_ ) -new_n5283_ = OR ( new_n5279_, new_n3707_ ) -new_n5284_ = OR ( new_n3057_, new_n4556_ ) -NET_11320 = NAND ( new_n5284_, new_n5283_ ) -new_n5286_ = NOR ( new_n3099_, new_n3097_ ) -new_n5287_ = XOR ( new_n5286_, new_n3095_ ) -new_n5288_ = NAND ( new_n5287_, new_n1530_ ) -new_n5289_ = OR ( new_n1530_, new_n1570_ ) -new_n5290_ = NAND ( new_n5289_, new_n5288_ ) -new_n5291_ = NAND ( new_n5290_, new_n2543_ ) -new_n5292_ = NOT ( NET_530 ) -new_n5293_ = NOR ( NET_554, new_n5292_ ) -new_n5294_ = XOR ( new_n2439_, new_n5292_ ) -new_n5295_ = NOR ( new_n5294_, new_n2461_ ) -new_n5296_ = NOR ( new_n5295_, new_n5293_ ) -new_n5297_ = OR ( new_n5296_, new_n2543_ ) -new_n5298_ = NAND ( new_n5297_, new_n5291_ ) -new_n5299_ = NOT ( new_n5298_ ) -new_n5300_ = OR ( new_n5299_, new_n2524_ ) -new_n5301_ = NAND ( new_n5003_, new_n2579_ ) -new_n5302_ = OR ( new_n5296_, new_n2613_ ) -new_n5303_ = NAND ( new_n5302_, new_n5301_, new_n5300_ ) -new_n5304_ = XOR ( new_n5303_, new_n2618_ ) -new_n5305_ = NAND ( new_n5003_, new_n2620_ ) -new_n5306_ = OR ( new_n5299_, new_n2578_ ) -new_n5307_ = OR ( new_n2624_, new_n4999_ ) -new_n5308_ = OR ( new_n2626_, new_n5001_ ) -new_n5309_ = NAND ( new_n5308_, new_n5307_, new_n5306_, new_n5305_ ) -new_n5310_ = OR ( new_n5309_, new_n5304_ ) -new_n5311_ = NAND ( new_n5309_, new_n5304_ ) -new_n5312_ = NAND ( new_n5311_, new_n5310_ ) -new_n5313_ = NAND ( new_n4983_, new_n4978_ ) -new_n5314_ = NAND ( new_n5313_, new_n4979_ ) -new_n5315_ = XOR ( new_n5314_, new_n5312_ ) -new_n5316_ = NOR ( new_n5315_, new_n3202_ ) -new_n5317_ = OR ( new_n5296_, new_n2732_ ) -new_n5318_ = NAND ( new_n5317_, new_n5291_ ) -new_n5319_ = NAND ( new_n5318_, new_n3240_ ) -new_n5320_ = NAND ( new_n3197_, NET_594 ) -new_n5321_ = NAND ( new_n2609_, new_n2607_, NET_595 ) -new_n5322_ = NOT ( NET_756 ) -new_n5323_ = NOT ( NET_764 ) -new_n5324_ = NAND ( new_n4996_, new_n5323_ ) -new_n5325_ = XOR ( new_n5324_, new_n5322_ ) -new_n5326_ = NAND ( new_n5325_, new_n2587_ ) -new_n5327_ = NOT ( NET_659 ) -new_n5328_ = OR ( new_n2597_, new_n5327_ ) -new_n5329_ = NOT ( NET_627 ) -new_n5330_ = OR ( new_n2604_, new_n5329_ ) -new_n5331_ = NAND ( new_n5330_, new_n5328_, new_n5326_, new_n5321_ ) -new_n5332_ = NAND ( new_n5331_, new_n3243_ ) -new_n5333_ = NAND ( new_n4651_, new_n3253_ ) -new_n5334_ = NAND ( new_n5333_, new_n5332_, new_n5320_, new_n5319_ ) -NET_11349 = OR ( new_n5334_, new_n5316_ ) -new_n5336_ = NOR ( new_n5315_, new_n3264_ ) -new_n5337_ = NAND ( new_n5318_, new_n3266_ ) -new_n5338_ = NAND ( new_n3262_, NET_626 ) -new_n5339_ = NAND ( new_n5331_, new_n3269_ ) -new_n5340_ = NAND ( new_n4651_, new_n3271_ ) -new_n5341_ = NAND ( new_n5340_, new_n5339_, new_n5338_, new_n5337_ ) -NET_11350 = OR ( new_n5341_, new_n5336_ ) -new_n5343_ = OR ( new_n5315_, new_n3767_ ) -new_n5344_ = NAND ( new_n2713_, NET_658 ) -new_n5345_ = NAND ( new_n5331_, new_n2765_ ) -new_n5346_ = NAND ( new_n5318_, new_n2744_ ) -new_n5347_ = NAND ( new_n4651_, new_n2756_ ) -new_n5348_ = NAND ( new_n4997_, new_n2758_ ) -new_n5349_ = AND ( new_n5348_, new_n5347_, new_n5346_ ) -NET_11351 = NAND ( new_n5349_, new_n5345_, new_n5344_, new_n5343_ ) -new_n5351_ = NOR ( new_n5315_, new_n3276_ ) -new_n5352_ = OR ( new_n3283_, new_n4999_ ) -new_n5353_ = NAND ( new_n3287_, NET_626 ) -new_n5354_ = NAND ( new_n5353_, new_n5352_ ) -new_n5355_ = NAND ( new_n5354_, new_n5296_ ) -new_n5356_ = OR ( new_n5354_, new_n5296_ ) -new_n5357_ = NAND ( new_n5356_, new_n5355_ ) -new_n5358_ = NAND ( new_n5031_, new_n5028_ ) -new_n5359_ = NAND ( new_n5358_, new_n5027_ ) -new_n5360_ = NAND ( new_n5359_, new_n5357_ ) -new_n5361_ = OR ( new_n5359_, new_n5357_ ) -new_n5362_ = NAND ( new_n5361_, new_n5360_, new_n3316_ ) -new_n5363_ = NOT ( new_n5296_ ) -new_n5364_ = NAND ( new_n5363_, new_n3323_ ) -new_n5365_ = OR ( new_n3314_, new_n3513_ ) -new_n5366_ = OR ( NET_765, new_n5323_ ) -new_n5367_ = NAND ( new_n5366_, new_n5365_, new_n5364_, new_n5362_ ) -NET_11352 = OR ( new_n5367_, new_n5351_ ) -new_n5369_ = OR ( new_n5315_, new_n3339_ ) -new_n5370_ = NAND ( new_n4997_, new_n3350_ ) -new_n5371_ = NAND ( new_n5331_, new_n3352_ ) -new_n5372_ = NAND ( new_n4997_, new_n3193_ ) -new_n5373_ = NAND ( new_n4651_, new_n3355_ ) -new_n5374_ = NAND ( new_n5373_, new_n5372_, new_n5371_ ) -new_n5375_ = NAND ( new_n5374_, new_n3359_ ) -new_n5376_ = NAND ( new_n5318_, new_n3361_ ) -new_n5377_ = NAND ( new_n5298_, new_n3363_ ) -new_n5378_ = AND ( new_n5377_, new_n5376_, new_n5366_ ) -NET_11353 = NAND ( new_n5378_, new_n5375_, new_n5370_, new_n5369_ ) -new_n5380_ = NAND ( new_n5125_, new_n1870_ ) -new_n5381_ = NAND ( new_n1576_, new_n1575_ ) -new_n5382_ = XNOR ( new_n5381_, new_n1636_ ) -new_n5383_ = OR ( new_n5382_, new_n1531_ ) -new_n5384_ = OR ( new_n1530_, NET_465 ) -new_n5385_ = NAND ( new_n5384_, new_n5383_ ) -new_n5386_ = NAND ( new_n5385_, new_n1921_ ) -new_n5387_ = NOR ( NET_64, new_n1698_ ) -new_n5388_ = XOR ( new_n5077_, new_n1698_ ) -new_n5389_ = NOR ( new_n5388_, new_n1694_ ) -new_n5390_ = OR ( new_n5389_, new_n5387_ ) -new_n5391_ = OR ( new_n5390_, new_n1921_ ) -new_n5392_ = NAND ( new_n5391_, new_n5386_ ) -new_n5393_ = NOT ( new_n5392_ ) -new_n5394_ = NAND ( new_n5393_, new_n1942_ ) -new_n5395_ = NAND ( new_n5390_, new_n1953_ ) -new_n5396_ = NAND ( new_n5395_, new_n5394_, new_n5380_ ) -new_n5397_ = XOR ( new_n5396_, new_n1844_ ) -new_n5398_ = NAND ( new_n5125_, new_n1960_ ) -new_n5399_ = NAND ( new_n5393_, new_n1870_ ) -new_n5400_ = OR ( new_n1951_, new_n5123_ ) -new_n5401_ = OR ( new_n1952_, new_n5121_ ) -new_n5402_ = NAND ( new_n5401_, new_n5400_, new_n5399_, new_n5398_ ) -new_n5403_ = OR ( new_n5402_, new_n5397_ ) -new_n5404_ = NAND ( new_n5402_, new_n5397_ ) -new_n5405_ = NAND ( new_n5404_, new_n5403_ ) -new_n5406_ = NAND ( new_n5100_, new_n5095_ ) -new_n5407_ = NAND ( new_n5406_, new_n5096_ ) -new_n5408_ = XOR ( new_n5407_, new_n5405_ ) -new_n5409_ = NOR ( new_n5408_, new_n1840_ ) -new_n5410_ = NAND ( new_n5125_, new_n1976_ ) -new_n5411_ = AND ( new_n5393_, new_n1978_ ) -new_n5412_ = OR ( new_n5411_, new_n5410_ ) -new_n5413_ = NAND ( new_n5411_, new_n5410_ ) -new_n5414_ = NAND ( new_n5413_, new_n5412_ ) -new_n5415_ = NAND ( new_n5110_, new_n5106_ ) -new_n5416_ = NAND ( new_n5415_, new_n5107_ ) -new_n5417_ = XNOR ( new_n5416_, new_n5414_ ) -new_n5418_ = OR ( new_n5417_, new_n1975_ ) -new_n5419_ = NAND ( new_n4768_, new_n3867_ ) -new_n5420_ = NAND ( new_n1838_, NET_168 ) -new_n5421_ = NAND ( new_n5119_, new_n2005_ ) -new_n5422_ = AND ( new_n5421_, new_n5420_, new_n5419_ ) -new_n5423_ = NAND ( new_n1901_, new_n1898_, NET_105 ) -new_n5424_ = NOT ( NET_266 ) -new_n5425_ = NAND ( new_n4482_, NET_274, NET_248 ) -new_n5426_ = NAND ( new_n5425_, new_n5424_ ) -new_n5427_ = OR ( new_n5425_, new_n5424_ ) -new_n5428_ = AND ( new_n5427_, new_n5426_ ) -new_n5429_ = NAND ( new_n5428_, new_n1878_ ) -new_n5430_ = NOT ( NET_169 ) -new_n5431_ = OR ( new_n1887_, new_n5430_ ) -new_n5432_ = NOT ( NET_137 ) -new_n5433_ = OR ( new_n1895_, new_n5432_ ) -new_n5434_ = NAND ( new_n5433_, new_n5431_, new_n5429_, new_n5423_ ) -new_n5435_ = NAND ( new_n5434_, new_n1994_ ) -new_n5436_ = OR ( new_n5392_, new_n1989_ ) -new_n5437_ = NAND ( new_n5436_, new_n5435_, new_n5422_, new_n5418_ ) -NET_11418 = OR ( new_n5437_, new_n5409_ ) -new_n5439_ = NOR ( new_n5408_, new_n2016_ ) -new_n5440_ = NOR ( new_n5417_, new_n2020_ ) -new_n5441_ = NAND ( new_n5119_, new_n2853_ ) -new_n5442_ = NAND ( new_n5434_, new_n2043_ ) -new_n5443_ = NAND ( new_n5119_, new_n2009_ ) -new_n5444_ = NAND ( new_n4768_, new_n2864_ ) -new_n5445_ = NAND ( new_n5444_, new_n5443_, new_n5442_ ) -new_n5446_ = NAND ( new_n5445_, new_n2042_ ) -new_n5447_ = OR ( new_n5392_, new_n2039_ ) -new_n5448_ = OR ( NET_275, new_n5118_ ) -new_n5449_ = NAND ( new_n5448_, new_n5447_, new_n5446_, new_n5441_ ) -NET_11419 = OR ( new_n5449_, new_n5440_, new_n5439_ ) -new_n5451_ = OR ( new_n5236_, new_n2208_ ) -new_n5452_ = OR ( new_n5252_, new_n2362_ ) -new_n5453_ = NAND ( new_n4558_, new_n2968_ ) -new_n5454_ = NAND ( new_n2196_, NET_412 ) -new_n5455_ = NAND ( new_n4899_, new_n2380_ ) -new_n5456_ = NAND ( new_n5455_, new_n5454_, new_n5453_ ) -new_n5457_ = AND ( new_n5263_, new_n2369_ ) -new_n5458_ = NOR ( new_n5214_, new_n2364_ ) -new_n5459_ = NOR ( new_n5458_, new_n5457_, new_n5456_ ) -NET_11436 = NAND ( new_n5459_, new_n5452_, new_n5451_ ) -new_n5461_ = NAND ( new_n5263_, new_n2274_ ) -new_n5462_ = NAND ( new_n1530_, new_n3096_ ) -new_n5463_ = OR ( new_n5382_, new_n1530_ ) -new_n5464_ = NAND ( new_n5463_, new_n5462_ ) -new_n5465_ = NAND ( new_n5464_, new_n2290_ ) -new_n5466_ = NOT ( NET_285 ) -new_n5467_ = NOR ( NET_309, new_n5466_ ) -new_n5468_ = XOR ( new_n2070_, new_n5466_ ) -new_n5469_ = NOR ( new_n5468_, new_n2056_ ) -new_n5470_ = NOR ( new_n5469_, new_n5467_ ) -new_n5471_ = NAND ( new_n5470_, new_n2289_ ) -new_n5472_ = NAND ( new_n5471_, new_n5465_ ) -new_n5473_ = OR ( new_n5472_, new_n2309_ ) -new_n5474_ = NOT ( new_n5470_ ) -new_n5475_ = NAND ( new_n5474_, new_n2325_ ) -new_n5476_ = OR ( new_n2328_, new_n5261_ ) -new_n5477_ = OR ( new_n2330_, new_n5259_ ) -new_n5478_ = AND ( new_n5477_, new_n5476_, new_n5475_ ) -new_n5479_ = NAND ( new_n5478_, new_n5473_, new_n5461_ ) -new_n5480_ = XOR ( new_n5479_, new_n2218_ ) -new_n5481_ = OR ( new_n5472_, new_n2273_ ) -new_n5482_ = NAND ( new_n5263_, new_n2336_ ) -new_n5483_ = OR ( new_n5470_, new_n2338_ ) -new_n5484_ = OR ( new_n2323_, new_n5261_ ) -new_n5485_ = OR ( new_n2324_, new_n5259_ ) -new_n5486_ = AND ( new_n5485_, new_n5484_, new_n5483_ ) -new_n5487_ = NAND ( new_n5486_, new_n5482_, new_n5481_ ) -new_n5488_ = OR ( new_n5487_, new_n5480_ ) -new_n5489_ = NAND ( new_n5487_, new_n5480_ ) -new_n5490_ = NAND ( new_n5489_, new_n5488_ ) -new_n5491_ = NAND ( new_n5232_, new_n5230_ ) -new_n5492_ = NAND ( new_n5491_, new_n5229_ ) -new_n5493_ = XOR ( new_n5492_, new_n5490_ ) -new_n5494_ = NOR ( new_n5493_, new_n2390_ ) -new_n5495_ = OR ( new_n5472_, new_n2349_ ) -new_n5496_ = NAND ( new_n5263_, new_n2349_ ) -new_n5497_ = NAND ( new_n5496_, new_n5495_ ) -new_n5498_ = XOR ( new_n5497_, new_n2349_ ) -new_n5499_ = OR ( new_n5472_, new_n2348_ ) -new_n5500_ = NAND ( new_n5499_, new_n5498_ ) -new_n5501_ = OR ( new_n5499_, new_n5498_ ) -new_n5502_ = NAND ( new_n5501_, new_n5500_ ) -new_n5503_ = NAND ( new_n5250_, new_n5245_ ) -new_n5504_ = XOR ( new_n5503_, new_n5502_ ) -new_n5505_ = NOR ( new_n5504_, new_n2393_ ) -new_n5506_ = NAND ( new_n5257_, new_n3025_ ) -new_n5507_ = NAND ( new_n2250_, new_n2248_, NET_350 ) -new_n5508_ = NOT ( NET_511 ) -new_n5509_ = NAND ( new_n4551_, NET_519, NET_493 ) -new_n5510_ = NAND ( new_n5509_, new_n5508_ ) -new_n5511_ = OR ( new_n5509_, new_n5508_ ) -new_n5512_ = AND ( new_n5511_, new_n5510_ ) -new_n5513_ = NAND ( new_n5512_, new_n2228_ ) -new_n5514_ = NOT ( NET_414 ) -new_n5515_ = OR ( new_n2238_, new_n5514_ ) -new_n5516_ = NOT ( NET_382 ) -new_n5517_ = OR ( new_n2245_, new_n5516_ ) -new_n5518_ = NAND ( new_n5517_, new_n5515_, new_n5513_, new_n5507_ ) -new_n5519_ = NAND ( new_n5518_, new_n2416_ ) -new_n5520_ = NAND ( new_n5257_, new_n2384_ ) -new_n5521_ = NAND ( new_n4905_, new_n3029_ ) -new_n5522_ = NAND ( new_n5521_, new_n5520_, new_n5519_ ) -new_n5523_ = NAND ( new_n5522_, new_n2415_ ) -new_n5524_ = OR ( new_n5472_, new_n2412_ ) -new_n5525_ = OR ( NET_520, new_n5256_ ) -new_n5526_ = NAND ( new_n5525_, new_n5524_, new_n5523_, new_n5506_ ) -NET_11437 = OR ( new_n5526_, new_n5505_, new_n5494_ ) -new_n5528_ = NOT ( NET_484 ) -new_n5529_ = NOR ( new_n5528_, NET_239 ) -new_n5530_ = NOT ( NET_239 ) -new_n5531_ = NOR ( NET_484, new_n5530_ ) -new_n5532_ = OR ( new_n5531_, new_n5529_ ) -new_n5533_ = NOR ( new_n4944_, new_n4941_ ) -new_n5534_ = NOR ( new_n5533_, new_n4939_ ) -new_n5535_ = XOR ( new_n5534_, new_n5532_ ) -new_n5536_ = NAND ( new_n5535_, new_n1530_ ) -new_n5537_ = OR ( new_n1530_, NET_6 ) -new_n5538_ = NAND ( new_n5537_, new_n5536_ ) -new_n5539_ = OR ( new_n5538_, NET_765 ) -new_n5540_ = OR ( new_n3175_, new_n2423_ ) -new_n5541_ = OR ( new_n3178_, new_n2457_ ) -NET_11450 = NAND ( new_n5541_, new_n5540_, new_n5539_ ) -new_n5543_ = NAND ( new_n1530_, new_n3979_ ) -new_n5544_ = OR ( new_n1530_, NET_235 ) -new_n5545_ = NAND ( new_n5544_, new_n5543_ ) -new_n5546_ = XOR ( new_n5545_, NET_10 ) -new_n5547_ = NOT ( NET_11 ) -new_n5548_ = NAND ( new_n5053_, new_n5547_ ) -new_n5549_ = NAND ( new_n5548_, new_n5059_ ) -new_n5550_ = OR ( new_n5053_, new_n5547_ ) -new_n5551_ = NAND ( new_n5550_, new_n5549_ ) -new_n5552_ = XNOR ( new_n5551_, new_n5546_ ) -new_n5553_ = OR ( new_n5552_, new_n1531_ ) -new_n5554_ = OR ( new_n1530_, NET_480 ) -new_n5555_ = NAND ( new_n5554_, new_n5553_ ) -new_n5556_ = OR ( new_n5555_, NET_275 ) -new_n5557_ = OR ( new_n1692_, new_n1729_ ) -new_n5558_ = OR ( new_n1737_, new_n1696_ ) -NET_11519 = NAND ( new_n5558_, new_n5557_, new_n5556_ ) -new_n5560_ = OR ( new_n5102_, new_n2778_ ) -new_n5561_ = NAND ( new_n5082_, new_n4082_ ) -new_n5562_ = OR ( new_n1914_, new_n4766_ ) -new_n5563_ = NAND ( new_n1914_, NET_167 ) -new_n5564_ = NAND ( new_n5563_, new_n5562_ ) -new_n5565_ = NAND ( new_n5564_, new_n5082_ ) -new_n5566_ = OR ( new_n5564_, new_n5082_ ) -new_n5567_ = NAND ( new_n5566_, new_n5565_ ) -new_n5568_ = NAND ( new_n5139_, new_n5135_ ) -new_n5569_ = NAND ( new_n5568_, new_n5136_ ) -new_n5570_ = XOR ( new_n5569_, new_n5567_ ) -new_n5571_ = OR ( new_n5570_, new_n2789_ ) -new_n5572_ = NAND ( new_n5571_, new_n5561_, new_n5560_ ) -new_n5573_ = AND ( new_n5572_, new_n2796_ ) -new_n5574_ = OR ( new_n5570_, new_n2804_ ) -new_n5575_ = NAND ( new_n5082_, new_n2798_ ) -new_n5576_ = NAND ( new_n2794_, new_n1947_, NET_275, NET_206 ) -new_n5577_ = NAND ( new_n5576_, new_n5575_, new_n5574_, new_n5158_ ) -NET_11520 = OR ( new_n5577_, new_n5573_ ) -new_n5579_ = OR ( new_n5102_, new_n2873_ ) -new_n5580_ = NOT ( new_n5111_ ) -new_n5581_ = NAND ( new_n5580_, new_n2878_ ) -new_n5582_ = NAND ( new_n5125_, new_n1992_ ) -new_n5583_ = OR ( new_n5084_, new_n4269_ ) -new_n5584_ = NAND ( new_n4489_, new_n3644_ ) -new_n5585_ = AND ( new_n5584_, new_n5583_, new_n5582_ ) -new_n5586_ = NAND ( new_n5585_, new_n5581_, new_n5579_ ) -new_n5587_ = NAND ( new_n5586_, new_n2892_ ) -new_n5588_ = NAND ( new_n2891_, NET_103 ) -NET_11521 = NAND ( new_n5588_, new_n5587_ ) -new_n5590_ = NAND ( new_n5586_, new_n2901_ ) -new_n5591_ = NAND ( new_n2900_, NET_135 ) -NET_11522 = NAND ( new_n5591_, new_n5590_ ) -new_n5593_ = NAND ( new_n1530_, new_n3981_ ) -new_n5594_ = OR ( new_n5552_, new_n1530_ ) -new_n5595_ = NAND ( new_n5594_, new_n5593_ ) -new_n5596_ = OR ( new_n5595_, NET_520 ) -new_n5597_ = OR ( new_n2054_, new_n2085_ ) -new_n5598_ = OR ( new_n2147_, new_n2058_ ) -NET_11539 = NAND ( new_n5598_, new_n5597_, new_n5596_ ) -new_n5600_ = NOR ( new_n5493_, new_n2208_ ) -new_n5601_ = OR ( new_n5504_, new_n2362_ ) -new_n5602_ = NAND ( new_n4905_, new_n2968_ ) -new_n5603_ = NAND ( new_n2196_, NET_413 ) -new_n5604_ = NAND ( new_n5257_, new_n2380_ ) -new_n5605_ = AND ( new_n5604_, new_n5603_, new_n5602_ ) -new_n5606_ = NAND ( new_n5518_, new_n2369_ ) -new_n5607_ = OR ( new_n5472_, new_n2364_ ) -new_n5608_ = NAND ( new_n5607_, new_n5606_, new_n5605_, new_n5601_ ) -NET_11540 = OR ( new_n5608_, new_n5600_ ) -new_n5610_ = OR ( new_n5236_, new_n2983_ ) -new_n5611_ = NAND ( new_n5212_, new_n2988_ ) -new_n5612_ = OR ( new_n2991_, new_n4903_ ) -new_n5613_ = OR ( new_n2287_, new_n4901_ ) -new_n5614_ = NAND ( new_n5613_, new_n5612_ ) -new_n5615_ = NAND ( new_n5614_, new_n5212_ ) -new_n5616_ = OR ( new_n5614_, new_n5212_ ) -new_n5617_ = NAND ( new_n5616_, new_n5615_ ) -new_n5618_ = NAND ( new_n5191_, new_n5187_ ) -new_n5619_ = NAND ( new_n5618_, new_n5188_ ) -new_n5620_ = XOR ( new_n5619_, new_n5617_ ) -new_n5621_ = OR ( new_n5620_, new_n2999_ ) -new_n5622_ = NAND ( new_n5621_, new_n5611_, new_n5610_ ) -new_n5623_ = NAND ( new_n5622_, new_n3006_ ) -new_n5624_ = OR ( new_n5236_, new_n3008_ ) -new_n5625_ = OR ( new_n5620_, new_n3016_ ) -new_n5626_ = NAND ( new_n5212_, new_n3012_ ) -new_n5627_ = NAND ( new_n3004_, new_n2405_, NET_520, NET_451 ) -new_n5628_ = AND ( new_n5627_, new_n5626_, new_n5270_ ) -NET_11541 = NAND ( new_n5628_, new_n5625_, new_n5624_, new_n5623_ ) -new_n5630_ = OR ( new_n5236_, new_n3037_ ) -new_n5631_ = OR ( new_n5252_, new_n3041_ ) -new_n5632_ = NAND ( new_n5263_, new_n2367_ ) -new_n5633_ = OR ( new_n5214_, new_n3045_ ) -new_n5634_ = NAND ( new_n4558_, new_n2966_ ) -new_n5635_ = AND ( new_n5634_, new_n5633_, new_n5632_ ) -new_n5636_ = NAND ( new_n5635_, new_n5631_, new_n5630_ ) -new_n5637_ = NAND ( new_n5636_, new_n3051_ ) -new_n5638_ = NAND ( new_n3053_, NET_348 ) -NET_11542 = NAND ( new_n5638_, new_n5637_ ) -new_n5640_ = NAND ( new_n5636_, new_n3057_ ) -new_n5641_ = OR ( new_n3057_, new_n4903_ ) -NET_11543 = NAND ( new_n5641_, new_n5640_ ) -new_n5643_ = OR ( new_n5408_, new_n2778_ ) -new_n5644_ = NAND ( new_n5390_, new_n4082_ ) -new_n5645_ = OR ( new_n1914_, new_n5123_ ) -new_n5646_ = NAND ( new_n1914_, NET_168 ) -new_n5647_ = NAND ( new_n5646_, new_n5645_ ) -new_n5648_ = XNOR ( new_n5647_, new_n5390_ ) -new_n5649_ = NAND ( new_n5569_, new_n5566_ ) -new_n5650_ = NAND ( new_n5649_, new_n5565_ ) -new_n5651_ = XOR ( new_n5650_, new_n5648_ ) -new_n5652_ = OR ( new_n5651_, new_n2789_ ) -new_n5653_ = NAND ( new_n5652_, new_n5644_, new_n5643_ ) -new_n5654_ = AND ( new_n5653_, new_n2796_ ) -new_n5655_ = OR ( new_n5651_, new_n2804_ ) -new_n5656_ = NAND ( new_n5390_, new_n2798_ ) -new_n5657_ = NAND ( new_n2794_, new_n1947_, NET_275, NET_205 ) -new_n5658_ = NAND ( new_n5657_, new_n5656_, new_n5655_, new_n5448_ ) -NET_11634 = OR ( new_n5658_, new_n5654_ ) -new_n5660_ = NOR ( new_n5408_, new_n2873_ ) -new_n5661_ = NOT ( new_n5417_ ) -new_n5662_ = NAND ( new_n5661_, new_n2878_ ) -new_n5663_ = NAND ( new_n5434_, new_n1992_ ) -new_n5664_ = OR ( new_n5392_, new_n4269_ ) -new_n5665_ = NAND ( new_n4768_, new_n3644_ ) -new_n5666_ = NAND ( new_n5665_, new_n5664_, new_n5663_, new_n5662_ ) -new_n5667_ = NOR ( new_n5666_, new_n5660_ ) -new_n5668_ = OR ( new_n5667_, new_n2891_ ) -new_n5669_ = NAND ( new_n2891_, NET_104 ) -NET_11636 = NAND ( new_n5669_, new_n5668_ ) -new_n5671_ = OR ( new_n5667_, new_n2900_ ) -new_n5672_ = NAND ( new_n2900_, NET_136 ) -NET_11637 = NAND ( new_n5672_, new_n5671_ ) -new_n5674_ = OR ( new_n5493_, new_n2983_ ) -new_n5675_ = OR ( new_n5470_, new_n2987_ ) -new_n5676_ = OR ( new_n2991_, new_n5261_ ) -new_n5677_ = OR ( new_n2287_, new_n5259_ ) -new_n5678_ = NAND ( new_n5677_, new_n5676_ ) -new_n5679_ = XOR ( new_n5678_, new_n5470_ ) -new_n5680_ = NAND ( new_n5619_, new_n5616_ ) -new_n5681_ = NAND ( new_n5680_, new_n5615_ ) -new_n5682_ = XOR ( new_n5681_, new_n5679_ ) -new_n5683_ = OR ( new_n5682_, new_n2999_ ) -new_n5684_ = NAND ( new_n5683_, new_n5675_, new_n5674_ ) -new_n5685_ = NAND ( new_n5684_, new_n3006_ ) -new_n5686_ = OR ( new_n5493_, new_n3008_ ) -new_n5687_ = OR ( new_n5682_, new_n3016_ ) -new_n5688_ = NAND ( new_n5474_, new_n3012_ ) -new_n5689_ = NAND ( new_n3004_, new_n2405_, NET_520, NET_450 ) -new_n5690_ = AND ( new_n5689_, new_n5688_, new_n5525_ ) -NET_11651 = NAND ( new_n5690_, new_n5687_, new_n5686_, new_n5685_ ) -new_n5692_ = NOR ( new_n5493_, new_n3037_ ) -new_n5693_ = OR ( new_n5504_, new_n3041_ ) -new_n5694_ = NAND ( new_n5518_, new_n2367_ ) -new_n5695_ = OR ( new_n5472_, new_n3045_ ) -new_n5696_ = NAND ( new_n4905_, new_n2966_ ) -new_n5697_ = NAND ( new_n5696_, new_n5695_, new_n5694_, new_n5693_ ) -new_n5698_ = NOR ( new_n5697_, new_n5692_ ) -new_n5699_ = OR ( new_n5698_, new_n3053_ ) -new_n5700_ = NAND ( new_n3053_, NET_349 ) -NET_11653 = NAND ( new_n5700_, new_n5699_ ) -new_n5702_ = OR ( new_n5698_, new_n3707_ ) -new_n5703_ = OR ( new_n3057_, new_n5261_ ) -NET_11654 = NAND ( new_n5703_, new_n5702_ ) -new_n5705_ = NOT ( NET_485 ) -new_n5706_ = NOR ( new_n5705_, NET_240 ) -new_n5707_ = NOT ( NET_240 ) -new_n5708_ = NOR ( NET_485, new_n5707_ ) -new_n5709_ = OR ( new_n5708_, new_n5706_ ) -new_n5710_ = NOR ( new_n5534_, new_n5531_ ) -new_n5711_ = NOR ( new_n5710_, new_n5529_ ) -new_n5712_ = XOR ( new_n5711_, new_n5709_ ) -new_n5713_ = NAND ( new_n5712_, new_n1530_ ) -new_n5714_ = OR ( new_n1530_, NET_5 ) -new_n5715_ = NAND ( new_n5714_, new_n5713_ ) -new_n5716_ = OR ( new_n5715_, NET_765 ) -new_n5717_ = OR ( new_n3175_, new_n2531_ ) -new_n5718_ = OR ( new_n3178_, new_n2532_ ) -NET_11668 = NAND ( new_n5718_, new_n5717_, new_n5716_ ) -new_n5720_ = NOR ( new_n3104_, new_n3102_ ) -new_n5721_ = XOR ( new_n5720_, new_n3100_ ) -new_n5722_ = NAND ( new_n5721_, new_n1530_ ) -new_n5723_ = OR ( new_n1530_, new_n1639_ ) -new_n5724_ = NAND ( new_n5723_, new_n5722_ ) -new_n5725_ = NAND ( new_n5724_, new_n2543_ ) -new_n5726_ = NOT ( NET_531 ) -new_n5727_ = NOR ( NET_554, new_n5726_ ) -new_n5728_ = XOR ( new_n2440_, new_n5726_ ) -new_n5729_ = NOR ( new_n5728_, new_n2461_ ) -new_n5730_ = NOR ( new_n5729_, new_n5727_ ) -new_n5731_ = OR ( new_n5730_, new_n2543_ ) -new_n5732_ = NAND ( new_n5731_, new_n5725_ ) -new_n5733_ = NAND ( new_n5732_, new_n4328_ ) -new_n5734_ = NAND ( new_n5331_, new_n2579_ ) -new_n5735_ = OR ( new_n5730_, new_n2613_ ) -new_n5736_ = NAND ( new_n5735_, new_n5734_, new_n5733_ ) -new_n5737_ = XOR ( new_n5736_, new_n2618_ ) -new_n5738_ = NAND ( new_n5331_, new_n2620_ ) -new_n5739_ = NAND ( new_n5732_, new_n2579_ ) -new_n5740_ = OR ( new_n2624_, new_n5327_ ) -new_n5741_ = OR ( new_n2626_, new_n5329_ ) -new_n5742_ = NAND ( new_n5741_, new_n5740_, new_n5739_, new_n5738_ ) -new_n5743_ = OR ( new_n5742_, new_n5737_ ) -new_n5744_ = NAND ( new_n5742_, new_n5737_ ) -new_n5745_ = NAND ( new_n5744_, new_n5743_ ) -new_n5746_ = NAND ( new_n5314_, new_n5310_ ) -new_n5747_ = NAND ( new_n5746_, new_n5311_ ) -new_n5748_ = XOR ( new_n5747_, new_n5745_ ) -new_n5749_ = NOR ( new_n5748_, new_n3202_ ) -new_n5750_ = OR ( new_n5730_, new_n2732_ ) -new_n5751_ = NAND ( new_n5750_, new_n5725_ ) -new_n5752_ = NAND ( new_n5751_, new_n3240_ ) -new_n5753_ = NAND ( new_n3197_, NET_595 ) -new_n5754_ = NAND ( new_n2609_, new_n2607_, NET_596 ) -new_n5755_ = NOT ( NET_746 ) -new_n5756_ = OR ( new_n5324_, NET_756 ) -new_n5757_ = XOR ( new_n5756_, new_n5755_ ) -new_n5758_ = NAND ( new_n5757_, new_n2587_ ) -new_n5759_ = NOT ( NET_660 ) -new_n5760_ = OR ( new_n2597_, new_n5759_ ) -new_n5761_ = NOT ( NET_628 ) -new_n5762_ = OR ( new_n2604_, new_n5761_ ) -new_n5763_ = NAND ( new_n5762_, new_n5760_, new_n5758_, new_n5754_ ) -new_n5764_ = NAND ( new_n5763_, new_n3243_ ) -new_n5765_ = NAND ( new_n5003_, new_n3253_ ) -new_n5766_ = NAND ( new_n5765_, new_n5764_, new_n5753_, new_n5752_ ) -NET_11669 = OR ( new_n5766_, new_n5749_ ) -new_n5768_ = NOR ( new_n5748_, new_n3264_ ) -new_n5769_ = NAND ( new_n5751_, new_n3266_ ) -new_n5770_ = NAND ( new_n3262_, NET_627 ) -new_n5771_ = NAND ( new_n5763_, new_n3269_ ) -new_n5772_ = NAND ( new_n5003_, new_n3271_ ) -new_n5773_ = NAND ( new_n5772_, new_n5771_, new_n5770_, new_n5769_ ) -NET_11670 = OR ( new_n5773_, new_n5768_ ) -new_n5775_ = OR ( new_n5748_, new_n3767_ ) -new_n5776_ = NAND ( new_n2713_, NET_659 ) -new_n5777_ = NAND ( new_n5763_, new_n2765_ ) -new_n5778_ = NAND ( new_n5751_, new_n2744_ ) -new_n5779_ = NAND ( new_n5003_, new_n2756_ ) -new_n5780_ = NAND ( new_n5325_, new_n2758_ ) -new_n5781_ = AND ( new_n5780_, new_n5779_, new_n5778_ ) -NET_11671 = NAND ( new_n5781_, new_n5777_, new_n5776_, new_n5775_ ) -new_n5783_ = NOR ( new_n5748_, new_n3276_ ) -new_n5784_ = OR ( new_n3283_, new_n5327_ ) -new_n5785_ = NAND ( new_n3287_, NET_627 ) -new_n5786_ = NAND ( new_n5785_, new_n5784_ ) -new_n5787_ = NAND ( new_n5786_, new_n5730_ ) -new_n5788_ = OR ( new_n5786_, new_n5730_ ) -new_n5789_ = NAND ( new_n5788_, new_n5787_ ) -new_n5790_ = NAND ( new_n5359_, new_n5356_ ) -new_n5791_ = NAND ( new_n5790_, new_n5355_ ) -new_n5792_ = NAND ( new_n5791_, new_n5789_ ) -new_n5793_ = OR ( new_n5791_, new_n5789_ ) -new_n5794_ = NAND ( new_n5793_, new_n5792_, new_n3316_ ) -new_n5795_ = NOT ( new_n5730_ ) -new_n5796_ = NAND ( new_n5795_, new_n3323_ ) -new_n5797_ = OR ( new_n3314_, new_n3520_ ) -new_n5798_ = OR ( NET_765, new_n5322_ ) -new_n5799_ = NAND ( new_n5798_, new_n5797_, new_n5796_, new_n5794_ ) -NET_11672 = OR ( new_n5799_, new_n5783_ ) -new_n5801_ = OR ( new_n5748_, new_n3339_ ) -new_n5802_ = NAND ( new_n5325_, new_n3350_ ) -new_n5803_ = NAND ( new_n5763_, new_n3352_ ) -new_n5804_ = NAND ( new_n5325_, new_n3193_ ) -new_n5805_ = NAND ( new_n5003_, new_n3355_ ) -new_n5806_ = NAND ( new_n5805_, new_n5804_, new_n5803_ ) -new_n5807_ = NAND ( new_n5806_, new_n3359_ ) -new_n5808_ = NAND ( new_n5751_, new_n3361_ ) -new_n5809_ = NAND ( new_n5732_, new_n3363_ ) -new_n5810_ = AND ( new_n5809_, new_n5808_, new_n5798_ ) -NET_11673 = NAND ( new_n5810_, new_n5807_, new_n5802_, new_n5801_ ) -new_n5812_ = NAND ( new_n1530_, new_n4313_ ) -new_n5813_ = OR ( new_n1530_, NET_236 ) -new_n5814_ = NAND ( new_n5813_, new_n5812_ ) -new_n5815_ = XOR ( new_n5814_, NET_9 ) -new_n5816_ = NOT ( NET_10 ) -new_n5817_ = NAND ( new_n5545_, new_n5816_ ) -new_n5818_ = NAND ( new_n5817_, new_n5551_ ) -new_n5819_ = OR ( new_n5545_, new_n5816_ ) -new_n5820_ = NAND ( new_n5819_, new_n5818_ ) -new_n5821_ = XNOR ( new_n5820_, new_n5815_ ) -new_n5822_ = OR ( new_n5821_, new_n1531_ ) -new_n5823_ = OR ( new_n1530_, NET_481 ) -new_n5824_ = NAND ( new_n5823_, new_n5822_ ) -new_n5825_ = OR ( new_n5824_, NET_275 ) -new_n5826_ = OR ( new_n1692_, new_n1760_ ) -new_n5827_ = NAND ( new_n1831_, new_n1695_ ) -NET_11745 = NAND ( new_n5827_, new_n5826_, new_n5825_ ) -new_n5829_ = NAND ( new_n5434_, new_n1870_ ) -new_n5830_ = NAND ( new_n1646_, new_n1644_ ) -new_n5831_ = XNOR ( new_n5830_, new_n1638_ ) -new_n5832_ = OR ( new_n5831_, new_n1531_ ) -new_n5833_ = OR ( new_n1530_, NET_466 ) -new_n5834_ = NAND ( new_n5833_, new_n5832_ ) -new_n5835_ = NAND ( new_n5834_, new_n1921_ ) -new_n5836_ = NOT ( NET_41 ) -new_n5837_ = NOR ( NET_64, new_n5836_ ) -new_n5838_ = XOR ( new_n1701_, new_n5836_ ) -new_n5839_ = NOR ( new_n5838_, new_n1694_ ) -new_n5840_ = OR ( new_n5839_, new_n5837_ ) -new_n5841_ = OR ( new_n5840_, new_n1921_ ) -new_n5842_ = NAND ( new_n5841_, new_n5835_ ) -new_n5843_ = NOT ( new_n5842_ ) -new_n5844_ = NAND ( new_n5843_, new_n1942_ ) -new_n5845_ = NAND ( new_n5840_, new_n1953_ ) -new_n5846_ = NAND ( new_n5845_, new_n5844_, new_n5829_ ) -new_n5847_ = XOR ( new_n5846_, new_n1844_ ) -new_n5848_ = NAND ( new_n5434_, new_n1960_ ) -new_n5849_ = NAND ( new_n5843_, new_n1870_ ) -new_n5850_ = OR ( new_n1951_, new_n5432_ ) -new_n5851_ = OR ( new_n1952_, new_n5430_ ) -new_n5852_ = NAND ( new_n5851_, new_n5850_, new_n5849_, new_n5848_ ) -new_n5853_ = OR ( new_n5852_, new_n5847_ ) -new_n5854_ = NAND ( new_n5852_, new_n5847_ ) -new_n5855_ = NAND ( new_n5854_, new_n5853_ ) -new_n5856_ = NAND ( new_n5407_, new_n5403_ ) -new_n5857_ = NAND ( new_n5856_, new_n5404_ ) -new_n5858_ = XOR ( new_n5857_, new_n5855_ ) -new_n5859_ = NOR ( new_n5858_, new_n1840_ ) -new_n5860_ = NAND ( new_n5434_, new_n1976_ ) -new_n5861_ = AND ( new_n5843_, new_n1978_ ) -new_n5862_ = OR ( new_n5861_, new_n5860_ ) -new_n5863_ = NAND ( new_n5861_, new_n5860_ ) -new_n5864_ = NAND ( new_n5863_, new_n5862_ ) -new_n5865_ = NAND ( new_n5416_, new_n5412_ ) -new_n5866_ = NAND ( new_n5865_, new_n5413_ ) -new_n5867_ = XNOR ( new_n5866_, new_n5864_ ) -new_n5868_ = OR ( new_n5867_, new_n1975_ ) -new_n5869_ = NAND ( new_n5125_, new_n3867_ ) -new_n5870_ = NAND ( new_n1838_, NET_169 ) -new_n5871_ = NAND ( new_n5428_, new_n2005_ ) -new_n5872_ = AND ( new_n5871_, new_n5870_, new_n5869_ ) -new_n5873_ = NAND ( new_n1901_, new_n1898_, NET_106 ) -new_n5874_ = NOT ( NET_256 ) -new_n5875_ = AND ( new_n5427_, new_n5874_ ) -new_n5876_ = NOR ( new_n5427_, new_n5874_ ) -new_n5877_ = NOR ( new_n5876_, new_n5875_ ) -new_n5878_ = NAND ( new_n5877_, new_n1878_ ) -new_n5879_ = NOT ( NET_170 ) -new_n5880_ = OR ( new_n1887_, new_n5879_ ) -new_n5881_ = NOT ( NET_138 ) -new_n5882_ = OR ( new_n1895_, new_n5881_ ) -new_n5883_ = NAND ( new_n5882_, new_n5880_, new_n5878_, new_n5873_ ) -new_n5884_ = NAND ( new_n5883_, new_n1994_ ) -new_n5885_ = OR ( new_n5842_, new_n1989_ ) -new_n5886_ = NAND ( new_n5885_, new_n5884_, new_n5872_, new_n5868_ ) -NET_11746 = OR ( new_n5886_, new_n5859_ ) -new_n5888_ = NOR ( new_n5858_, new_n2016_ ) -new_n5889_ = NOR ( new_n5867_, new_n2020_ ) -new_n5890_ = NAND ( new_n5428_, new_n2853_ ) -new_n5891_ = NAND ( new_n5883_, new_n2043_ ) -new_n5892_ = NAND ( new_n5428_, new_n2009_ ) -new_n5893_ = NAND ( new_n5125_, new_n2864_ ) -new_n5894_ = NAND ( new_n5893_, new_n5892_, new_n5891_ ) -new_n5895_ = NAND ( new_n5894_, new_n2042_ ) -new_n5896_ = OR ( new_n5842_, new_n2039_ ) -new_n5897_ = OR ( NET_275, new_n5424_ ) -new_n5898_ = NAND ( new_n5897_, new_n5896_, new_n5895_, new_n5890_ ) -NET_11747 = OR ( new_n5898_, new_n5889_, new_n5888_ ) -new_n5900_ = NAND ( new_n1530_, new_n4315_ ) -new_n5901_ = OR ( new_n5821_, new_n1530_ ) -new_n5902_ = NAND ( new_n5901_, new_n5900_ ) -new_n5903_ = OR ( new_n5902_, NET_520 ) -new_n5904_ = NAND ( NET_520, new_n2056_, NET_301 ) -new_n5905_ = NAND ( new_n2191_, new_n2057_ ) -NET_11766 = NAND ( new_n5905_, new_n5904_, new_n5903_ ) -new_n5907_ = NAND ( new_n5518_, new_n2274_ ) -new_n5908_ = NAND ( new_n1530_, new_n3101_ ) -new_n5909_ = OR ( new_n5831_, new_n1530_ ) -new_n5910_ = NAND ( new_n5909_, new_n5908_ ) -new_n5911_ = NAND ( new_n5910_, new_n2290_ ) -new_n5912_ = NOR ( NET_309, NET_286 ) -new_n5913_ = NOT ( NET_286 ) -new_n5914_ = XOR ( new_n2071_, new_n5913_ ) -new_n5915_ = AND ( new_n5914_, NET_309 ) -new_n5916_ = NOR ( new_n5915_, new_n5912_ ) -new_n5917_ = NOT ( new_n5916_ ) -new_n5918_ = NAND ( new_n5917_, new_n2289_ ) -new_n5919_ = NAND ( new_n5918_, new_n5911_ ) -new_n5920_ = OR ( new_n5919_, new_n2309_ ) -new_n5921_ = NAND ( new_n5916_, new_n2325_ ) -new_n5922_ = OR ( new_n2328_, new_n5516_ ) -new_n5923_ = OR ( new_n2330_, new_n5514_ ) -new_n5924_ = AND ( new_n5923_, new_n5922_, new_n5921_ ) -new_n5925_ = NAND ( new_n5924_, new_n5920_, new_n5907_ ) -new_n5926_ = XOR ( new_n5925_, new_n2218_ ) -new_n5927_ = OR ( new_n5919_, new_n2273_ ) -new_n5928_ = NAND ( new_n5518_, new_n2336_ ) -new_n5929_ = OR ( new_n5917_, new_n2338_ ) -new_n5930_ = OR ( new_n2323_, new_n5516_ ) -new_n5931_ = OR ( new_n2324_, new_n5514_ ) -new_n5932_ = AND ( new_n5931_, new_n5930_, new_n5929_ ) -new_n5933_ = NAND ( new_n5932_, new_n5928_, new_n5927_ ) -new_n5934_ = OR ( new_n5933_, new_n5926_ ) -new_n5935_ = NAND ( new_n5933_, new_n5926_ ) -new_n5936_ = NAND ( new_n5935_, new_n5934_ ) -new_n5937_ = NAND ( new_n5492_, new_n5488_ ) -new_n5938_ = NAND ( new_n5937_, new_n5489_ ) -new_n5939_ = XOR ( new_n5938_, new_n5936_ ) -new_n5940_ = NOR ( new_n5939_, new_n2390_ ) -new_n5941_ = OR ( new_n5919_, new_n2349_ ) -new_n5942_ = NAND ( new_n5518_, new_n2349_ ) -new_n5943_ = NAND ( new_n5942_, new_n5941_ ) -new_n5944_ = XOR ( new_n5943_, new_n2349_ ) -new_n5945_ = OR ( new_n5919_, new_n2348_ ) -new_n5946_ = NAND ( new_n5945_, new_n5944_ ) -new_n5947_ = OR ( new_n5945_, new_n5944_ ) -new_n5948_ = NAND ( new_n5947_, new_n5946_ ) -new_n5949_ = NAND ( new_n5503_, new_n5500_ ) -new_n5950_ = NAND ( new_n5949_, new_n5501_ ) -new_n5951_ = XOR ( new_n5950_, new_n5948_ ) -new_n5952_ = NOR ( new_n5951_, new_n2393_ ) -new_n5953_ = NAND ( new_n5512_, new_n3025_ ) -new_n5954_ = NAND ( new_n2250_, new_n2248_, NET_351 ) -new_n5955_ = NOT ( NET_501 ) -new_n5956_ = AND ( new_n5511_, new_n5955_ ) -new_n5957_ = NOR ( new_n5511_, new_n5955_ ) -new_n5958_ = NOR ( new_n5957_, new_n5956_ ) -new_n5959_ = NAND ( new_n5958_, new_n2228_ ) -new_n5960_ = NOT ( NET_415 ) -new_n5961_ = OR ( new_n2238_, new_n5960_ ) -new_n5962_ = NOT ( NET_383 ) -new_n5963_ = OR ( new_n2245_, new_n5962_ ) -new_n5964_ = NAND ( new_n5963_, new_n5961_, new_n5959_, new_n5954_ ) -new_n5965_ = NAND ( new_n5964_, new_n2416_ ) -new_n5966_ = NAND ( new_n5512_, new_n2384_ ) -new_n5967_ = NAND ( new_n5263_, new_n3029_ ) -new_n5968_ = NAND ( new_n5967_, new_n5966_, new_n5965_ ) -new_n5969_ = NAND ( new_n5968_, new_n2415_ ) -new_n5970_ = OR ( new_n5919_, new_n2412_ ) -new_n5971_ = OR ( NET_520, new_n5508_ ) -new_n5972_ = NAND ( new_n5971_, new_n5970_, new_n5969_, new_n5953_ ) -NET_11767 = OR ( new_n5972_, new_n5952_, new_n5940_ ) -new_n5974_ = NOR ( new_n5939_, new_n2208_ ) -new_n5975_ = OR ( new_n5951_, new_n2362_ ) -new_n5976_ = NAND ( new_n5263_, new_n2968_ ) -new_n5977_ = NAND ( new_n2196_, NET_414 ) -new_n5978_ = NAND ( new_n5512_, new_n2380_ ) -new_n5979_ = AND ( new_n5978_, new_n5977_, new_n5976_ ) -new_n5980_ = NAND ( new_n5964_, new_n2369_ ) -new_n5981_ = OR ( new_n5919_, new_n2364_ ) -new_n5982_ = NAND ( new_n5981_, new_n5980_, new_n5979_, new_n5975_ ) -NET_11876 = OR ( new_n5982_, new_n5974_ ) -new_n5984_ = NOT ( NET_486 ) -new_n5985_ = NOR ( new_n5984_, NET_241 ) -new_n5986_ = NOT ( NET_241 ) -new_n5987_ = NOR ( NET_486, new_n5986_ ) -new_n5988_ = OR ( new_n5987_, new_n5985_ ) -new_n5989_ = NOR ( new_n5711_, new_n5708_ ) -new_n5990_ = NOR ( new_n5989_, new_n5706_ ) -new_n5991_ = XOR ( new_n5990_, new_n5988_ ) -new_n5992_ = NAND ( new_n5991_, new_n1530_ ) -new_n5993_ = OR ( new_n1530_, NET_4 ) -new_n5994_ = NAND ( new_n5993_, new_n5992_ ) -new_n5995_ = OR ( new_n5994_, NET_765 ) -new_n5996_ = OR ( new_n3175_, new_n2537_ ) -new_n5997_ = NAND ( new_n3177_, new_n2539_ ) -NET_11892 = NAND ( new_n5997_, new_n5996_, new_n5995_ ) -new_n5999_ = NOR ( new_n3109_, new_n3107_ ) -new_n6000_ = XOR ( new_n5999_, new_n3105_ ) -new_n6001_ = NAND ( new_n6000_, new_n1530_ ) -new_n6002_ = OR ( new_n1530_, new_n1648_ ) -new_n6003_ = NAND ( new_n6002_, new_n6001_ ) -new_n6004_ = NAND ( new_n6003_, new_n2543_ ) -new_n6005_ = NOR ( NET_554, new_n2430_ ) -new_n6006_ = XOR ( new_n2441_, NET_532 ) -new_n6007_ = NOR ( new_n6006_, new_n2461_ ) -new_n6008_ = NOR ( new_n6007_, new_n6005_ ) -new_n6009_ = OR ( new_n6008_, new_n2543_ ) -new_n6010_ = NAND ( new_n6009_, new_n6004_ ) -new_n6011_ = NAND ( new_n6010_, new_n4328_ ) -new_n6012_ = NAND ( new_n5763_, new_n2579_ ) -new_n6013_ = OR ( new_n6008_, new_n2613_ ) -new_n6014_ = NAND ( new_n6013_, new_n6012_, new_n6011_ ) -new_n6015_ = XOR ( new_n6014_, new_n2618_ ) -new_n6016_ = NAND ( new_n5763_, new_n2620_ ) -new_n6017_ = NAND ( new_n6010_, new_n2579_ ) -new_n6018_ = OR ( new_n2624_, new_n5759_ ) -new_n6019_ = OR ( new_n2626_, new_n5761_ ) -new_n6020_ = NAND ( new_n6019_, new_n6018_, new_n6017_, new_n6016_ ) -new_n6021_ = OR ( new_n6020_, new_n6015_ ) -new_n6022_ = NAND ( new_n6020_, new_n6015_ ) -new_n6023_ = NAND ( new_n6022_, new_n6021_ ) -new_n6024_ = NAND ( new_n5747_, new_n5743_ ) -new_n6025_ = NAND ( new_n6024_, new_n5744_ ) -new_n6026_ = XOR ( new_n6025_, new_n6023_ ) -new_n6027_ = NOR ( new_n6026_, new_n3202_ ) -new_n6028_ = OR ( new_n6008_, new_n2732_ ) -new_n6029_ = NAND ( new_n6028_, new_n6004_ ) -new_n6030_ = NAND ( new_n6029_, new_n3240_ ) -new_n6031_ = NAND ( new_n3197_, NET_596 ) -new_n6032_ = NOT ( NET_597 ) -new_n6033_ = OR ( new_n4640_, new_n6032_ ) -new_n6034_ = NOT ( NET_760 ) -new_n6035_ = OR ( new_n5756_, NET_746 ) -new_n6036_ = XOR ( new_n6035_, new_n6034_ ) -new_n6037_ = NAND ( new_n6036_, new_n2587_ ) -new_n6038_ = NOT ( NET_661 ) -new_n6039_ = OR ( new_n2597_, new_n6038_ ) -new_n6040_ = NOT ( NET_629 ) -new_n6041_ = OR ( new_n2604_, new_n6040_ ) -new_n6042_ = NAND ( new_n6041_, new_n6039_, new_n6037_, new_n6033_ ) -new_n6043_ = NAND ( new_n6042_, new_n3243_ ) -new_n6044_ = NAND ( new_n5331_, new_n3253_ ) -new_n6045_ = NAND ( new_n6044_, new_n6043_, new_n6031_, new_n6030_ ) -NET_11893 = OR ( new_n6045_, new_n6027_ ) -new_n6047_ = NOR ( new_n6026_, new_n3264_ ) -new_n6048_ = NAND ( new_n6029_, new_n3266_ ) -new_n6049_ = NAND ( new_n3262_, NET_628 ) -new_n6050_ = NAND ( new_n6042_, new_n3269_ ) -new_n6051_ = NAND ( new_n5331_, new_n3271_ ) -new_n6052_ = NAND ( new_n6051_, new_n6050_, new_n6049_, new_n6048_ ) -NET_11894 = OR ( new_n6052_, new_n6047_ ) -new_n6054_ = OR ( new_n6026_, new_n3767_ ) -new_n6055_ = NAND ( new_n2713_, NET_660 ) -new_n6056_ = NAND ( new_n6042_, new_n2765_ ) -new_n6057_ = NAND ( new_n6029_, new_n2744_ ) -new_n6058_ = NAND ( new_n5331_, new_n2756_ ) -new_n6059_ = NAND ( new_n5757_, new_n2758_ ) -new_n6060_ = AND ( new_n6059_, new_n6058_, new_n6057_ ) -NET_11895 = NAND ( new_n6060_, new_n6056_, new_n6055_, new_n6054_ ) -new_n6062_ = NOR ( new_n6026_, new_n3276_ ) -new_n6063_ = OR ( new_n3283_, new_n5759_ ) -new_n6064_ = NAND ( new_n3287_, NET_628 ) -new_n6065_ = NAND ( new_n6064_, new_n6063_ ) -new_n6066_ = NAND ( new_n6065_, new_n6008_ ) -new_n6067_ = OR ( new_n6065_, new_n6008_ ) -new_n6068_ = NAND ( new_n6067_, new_n6066_ ) -new_n6069_ = NAND ( new_n5791_, new_n5788_ ) -new_n6070_ = NAND ( new_n6069_, new_n5787_ ) -new_n6071_ = NAND ( new_n6070_, new_n6068_ ) -new_n6072_ = OR ( new_n6070_, new_n6068_ ) -new_n6073_ = NAND ( new_n6072_, new_n6071_, new_n3316_ ) -new_n6074_ = NOT ( new_n6008_ ) -new_n6075_ = NAND ( new_n6074_, new_n3323_ ) -new_n6076_ = OR ( new_n3314_, new_n3527_ ) -new_n6077_ = OR ( NET_765, new_n5755_ ) -new_n6078_ = NAND ( new_n6077_, new_n6076_, new_n6075_, new_n6073_ ) -NET_11896 = OR ( new_n6078_, new_n6062_ ) -new_n6080_ = OR ( new_n6026_, new_n3339_ ) -new_n6081_ = NAND ( new_n5757_, new_n3350_ ) -new_n6082_ = NAND ( new_n6042_, new_n3352_ ) -new_n6083_ = NAND ( new_n5757_, new_n3193_ ) -new_n6084_ = NAND ( new_n5331_, new_n3355_ ) -new_n6085_ = NAND ( new_n6084_, new_n6083_, new_n6082_ ) -new_n6086_ = NAND ( new_n6085_, new_n3359_ ) -new_n6087_ = NAND ( new_n6029_, new_n3361_ ) -new_n6088_ = NAND ( new_n6010_, new_n3363_ ) -new_n6089_ = AND ( new_n6088_, new_n6087_, new_n6077_ ) -NET_11897 = NAND ( new_n6089_, new_n6086_, new_n6081_, new_n6080_ ) -new_n6091_ = NAND ( new_n1530_, new_n4590_ ) -new_n6092_ = OR ( new_n1530_, NET_237 ) -new_n6093_ = NAND ( new_n6092_, new_n6091_ ) -new_n6094_ = XOR ( new_n6093_, NET_8 ) -new_n6095_ = NOT ( NET_9 ) -new_n6096_ = NAND ( new_n5814_, new_n6095_ ) -new_n6097_ = NAND ( new_n6096_, new_n5820_ ) -new_n6098_ = OR ( new_n5814_, new_n6095_ ) -new_n6099_ = NAND ( new_n6098_, new_n6097_ ) -new_n6100_ = XNOR ( new_n6099_, new_n6094_ ) -new_n6101_ = OR ( new_n6100_, new_n1531_ ) -new_n6102_ = OR ( new_n1530_, NET_482 ) -new_n6103_ = NAND ( new_n6102_, new_n6101_ ) -new_n6104_ = OR ( new_n6103_, NET_275 ) -new_n6105_ = NAND ( new_n1694_, NET_57, NET_275 ) -new_n6106_ = NAND ( new_n1775_, new_n1695_ ) -NET_11969 = NAND ( new_n6106_, new_n6105_, new_n6104_ ) -new_n6108_ = NAND ( new_n5883_, new_n1870_ ) -new_n6109_ = NAND ( new_n1655_, new_n1653_ ) -new_n6110_ = XNOR ( new_n6109_, new_n1647_ ) -new_n6111_ = OR ( new_n6110_, new_n1531_ ) -new_n6112_ = OR ( new_n1530_, NET_467 ) -new_n6113_ = NAND ( new_n6112_, new_n6111_ ) -new_n6114_ = NAND ( new_n6113_, new_n1921_ ) -new_n6115_ = NOR ( NET_64, NET_42 ) -new_n6116_ = NOR ( new_n1701_, NET_41 ) -new_n6117_ = XOR ( new_n6116_, NET_42 ) -new_n6118_ = AND ( new_n6117_, NET_64 ) -new_n6119_ = NOR ( new_n6118_, new_n6115_ ) -new_n6120_ = OR ( new_n6119_, new_n1921_ ) -new_n6121_ = NAND ( new_n6120_, new_n6114_ ) -new_n6122_ = NOT ( new_n6121_ ) -new_n6123_ = NAND ( new_n6122_, new_n1942_ ) -new_n6124_ = NAND ( new_n6119_, new_n1953_ ) -new_n6125_ = NAND ( new_n6124_, new_n6123_, new_n6108_ ) -new_n6126_ = XOR ( new_n6125_, new_n1844_ ) -new_n6127_ = NAND ( new_n5883_, new_n1960_ ) -new_n6128_ = NAND ( new_n6122_, new_n1870_ ) -new_n6129_ = OR ( new_n1951_, new_n5881_ ) -new_n6130_ = OR ( new_n1952_, new_n5879_ ) -new_n6131_ = NAND ( new_n6130_, new_n6129_, new_n6128_, new_n6127_ ) -new_n6132_ = OR ( new_n6131_, new_n6126_ ) -new_n6133_ = NAND ( new_n6131_, new_n6126_ ) -new_n6134_ = NAND ( new_n6133_, new_n6132_ ) -new_n6135_ = NAND ( new_n5857_, new_n5853_ ) -new_n6136_ = NAND ( new_n6135_, new_n5854_ ) -new_n6137_ = XOR ( new_n6136_, new_n6134_ ) -new_n6138_ = NOR ( new_n6137_, new_n1840_ ) -new_n6139_ = NAND ( new_n5883_, new_n1976_ ) -new_n6140_ = AND ( new_n6122_, new_n1978_ ) -new_n6141_ = OR ( new_n6140_, new_n6139_ ) -new_n6142_ = NAND ( new_n6140_, new_n6139_ ) -new_n6143_ = NAND ( new_n6142_, new_n6141_ ) -new_n6144_ = NAND ( new_n5866_, new_n5862_ ) -new_n6145_ = NAND ( new_n6144_, new_n5863_ ) -new_n6146_ = XNOR ( new_n6145_, new_n6143_ ) -new_n6147_ = OR ( new_n6146_, new_n1975_ ) -new_n6148_ = NAND ( new_n5434_, new_n3867_ ) -new_n6149_ = NAND ( new_n1838_, NET_170 ) -new_n6150_ = NAND ( new_n5877_, new_n2005_ ) -new_n6151_ = AND ( new_n6150_, new_n6149_, new_n6148_ ) -new_n6152_ = NAND ( new_n1901_, new_n1898_, NET_107 ) -new_n6153_ = NOR ( new_n5876_, NET_270 ) -new_n6154_ = AND ( new_n5876_, NET_270 ) -new_n6155_ = NOR ( new_n6154_, new_n6153_ ) -new_n6156_ = NAND ( new_n6155_, new_n1878_ ) -new_n6157_ = NOT ( NET_171 ) -new_n6158_ = OR ( new_n1887_, new_n6157_ ) -new_n6159_ = NOT ( NET_139 ) -new_n6160_ = OR ( new_n1895_, new_n6159_ ) -new_n6161_ = NAND ( new_n6160_, new_n6158_, new_n6156_, new_n6152_ ) -new_n6162_ = NAND ( new_n6161_, new_n1994_ ) -new_n6163_ = OR ( new_n6121_, new_n1989_ ) -new_n6164_ = NAND ( new_n6163_, new_n6162_, new_n6151_, new_n6147_ ) -NET_11970 = OR ( new_n6164_, new_n6138_ ) -new_n6166_ = OR ( new_n5858_, new_n2778_ ) -new_n6167_ = NAND ( new_n5840_, new_n4082_ ) -new_n6168_ = OR ( new_n1914_, new_n5432_ ) -new_n6169_ = NAND ( new_n1914_, NET_169 ) -new_n6170_ = NAND ( new_n6169_, new_n6168_ ) -new_n6171_ = XNOR ( new_n6170_, new_n5840_ ) -new_n6172_ = OR ( new_n5647_, new_n5390_ ) -new_n6173_ = NAND ( new_n6172_, new_n5650_ ) -new_n6174_ = NAND ( new_n5647_, new_n5390_ ) -new_n6175_ = NAND ( new_n6174_, new_n6173_ ) -new_n6176_ = XOR ( new_n6175_, new_n6171_ ) -new_n6177_ = OR ( new_n6176_, new_n2789_ ) -new_n6178_ = NAND ( new_n6177_, new_n6167_, new_n6166_ ) -new_n6179_ = AND ( new_n6178_, new_n2796_ ) -new_n6180_ = OR ( new_n6176_, new_n2804_ ) -new_n6181_ = NAND ( new_n5840_, new_n2798_ ) -new_n6182_ = NAND ( new_n2794_, new_n1947_, NET_275, NET_204 ) -new_n6183_ = NAND ( new_n6182_, new_n6181_, new_n6180_, new_n5897_ ) -NET_11971 = OR ( new_n6183_, new_n6179_ ) -new_n6185_ = NOR ( new_n6137_, new_n2016_ ) -new_n6186_ = NOR ( new_n6146_, new_n2020_ ) -new_n6187_ = NAND ( new_n5877_, new_n2853_ ) -new_n6188_ = NAND ( new_n6161_, new_n2043_ ) -new_n6189_ = NAND ( new_n5877_, new_n2009_ ) -new_n6190_ = NAND ( new_n5434_, new_n2864_ ) -new_n6191_ = NAND ( new_n6190_, new_n6189_, new_n6188_ ) -new_n6192_ = NAND ( new_n6191_, new_n2042_ ) -new_n6193_ = OR ( new_n6121_, new_n2039_ ) -new_n6194_ = OR ( NET_275, new_n5874_ ) -new_n6195_ = NAND ( new_n6194_, new_n6193_, new_n6192_, new_n6187_ ) -NET_11972 = OR ( new_n6195_, new_n6186_, new_n6185_ ) -new_n6197_ = NOR ( new_n5858_, new_n2873_ ) -new_n6198_ = NOT ( new_n5867_ ) -new_n6199_ = NAND ( new_n6198_, new_n2878_ ) -new_n6200_ = NAND ( new_n5883_, new_n1992_ ) -new_n6201_ = OR ( new_n5842_, new_n4269_ ) -new_n6202_ = NAND ( new_n5125_, new_n3644_ ) -new_n6203_ = NAND ( new_n6202_, new_n6201_, new_n6200_, new_n6199_ ) -new_n6204_ = NOR ( new_n6203_, new_n6197_ ) -new_n6205_ = OR ( new_n6204_, new_n2891_ ) -new_n6206_ = NAND ( new_n2891_, NET_105 ) -NET_11973 = NAND ( new_n6206_, new_n6205_ ) -new_n6208_ = OR ( new_n6204_, new_n2900_ ) -new_n6209_ = NAND ( new_n2900_, NET_137 ) -NET_11974 = NAND ( new_n6209_, new_n6208_ ) -new_n6211_ = NAND ( new_n1530_, new_n4592_ ) -new_n6212_ = OR ( new_n6100_, new_n1530_ ) -new_n6213_ = NAND ( new_n6212_, new_n6211_ ) -new_n6214_ = OR ( new_n6213_, NET_520 ) -new_n6215_ = NAND ( NET_520, new_n2056_, NET_302 ) -new_n6216_ = NAND ( new_n2108_, new_n2057_ ) -NET_11993 = NAND ( new_n6216_, new_n6215_, new_n6214_ ) -new_n6218_ = OR ( new_n5939_, new_n2983_ ) -new_n6219_ = OR ( new_n5917_, new_n2987_ ) -new_n6220_ = OR ( new_n2991_, new_n5516_ ) -new_n6221_ = OR ( new_n2287_, new_n5514_ ) -new_n6222_ = NAND ( new_n6221_, new_n6220_ ) -new_n6223_ = XOR ( new_n6222_, new_n5917_ ) -new_n6224_ = OR ( new_n5678_, new_n5474_ ) -new_n6225_ = NAND ( new_n6224_, new_n5681_ ) -new_n6226_ = NAND ( new_n5678_, new_n5474_ ) -new_n6227_ = NAND ( new_n6226_, new_n6225_ ) -new_n6228_ = XOR ( new_n6227_, new_n6223_ ) -new_n6229_ = OR ( new_n6228_, new_n2999_ ) -new_n6230_ = NAND ( new_n6229_, new_n6219_, new_n6218_ ) -new_n6231_ = NAND ( new_n6230_, new_n3006_ ) -new_n6232_ = OR ( new_n5939_, new_n3008_ ) -new_n6233_ = OR ( new_n6228_, new_n3016_ ) -new_n6234_ = NAND ( new_n5916_, new_n3012_ ) -new_n6235_ = NAND ( new_n3004_, new_n2405_, NET_520, NET_449 ) -new_n6236_ = AND ( new_n6235_, new_n6234_, new_n5971_ ) -NET_11994 = NAND ( new_n6236_, new_n6233_, new_n6232_, new_n6231_ ) -new_n6238_ = NOT ( new_n5964_ ) -new_n6239_ = OR ( new_n6238_, new_n2273_ ) -new_n6240_ = NAND ( new_n1530_, new_n3106_ ) -new_n6241_ = OR ( new_n6110_, new_n1530_ ) -new_n6242_ = NAND ( new_n6241_, new_n6240_ ) -new_n6243_ = NAND ( new_n6242_, new_n2290_ ) -new_n6244_ = NOR ( NET_309, NET_287 ) -new_n6245_ = XOR ( new_n2072_, NET_287 ) -new_n6246_ = AND ( new_n6245_, NET_309 ) -new_n6247_ = NOR ( new_n6246_, new_n6244_ ) -new_n6248_ = NOT ( new_n6247_ ) -new_n6249_ = NAND ( new_n6248_, new_n2289_ ) -new_n6250_ = NAND ( new_n6249_, new_n6243_ ) -new_n6251_ = OR ( new_n6250_, new_n2309_ ) -new_n6252_ = NAND ( new_n6247_, new_n2325_ ) -new_n6253_ = OR ( new_n2328_, new_n5962_ ) -new_n6254_ = OR ( new_n2330_, new_n5960_ ) -new_n6255_ = AND ( new_n6254_, new_n6253_, new_n6252_ ) -new_n6256_ = NAND ( new_n6255_, new_n6251_, new_n6239_ ) -new_n6257_ = XOR ( new_n6256_, new_n2218_ ) -new_n6258_ = OR ( new_n6250_, new_n2273_ ) -new_n6259_ = NAND ( new_n5964_, new_n2336_ ) -new_n6260_ = OR ( new_n6248_, new_n2338_ ) -new_n6261_ = OR ( new_n2323_, new_n5962_ ) -new_n6262_ = OR ( new_n2324_, new_n5960_ ) -new_n6263_ = AND ( new_n6262_, new_n6261_, new_n6260_ ) -new_n6264_ = NAND ( new_n6263_, new_n6259_, new_n6258_ ) -new_n6265_ = OR ( new_n6264_, new_n6257_ ) -new_n6266_ = NAND ( new_n6264_, new_n6257_ ) -new_n6267_ = NAND ( new_n6266_, new_n6265_ ) -new_n6268_ = NAND ( new_n5938_, new_n5934_ ) -new_n6269_ = NAND ( new_n6268_, new_n5935_ ) -new_n6270_ = XOR ( new_n6269_, new_n6267_ ) -new_n6271_ = NOR ( new_n6270_, new_n2390_ ) -new_n6272_ = OR ( new_n6250_, new_n2349_ ) -new_n6273_ = NAND ( new_n5964_, new_n2349_ ) -new_n6274_ = NAND ( new_n6273_, new_n6272_ ) -new_n6275_ = XOR ( new_n6274_, new_n2349_ ) -new_n6276_ = OR ( new_n6250_, new_n2348_ ) -new_n6277_ = NAND ( new_n6276_, new_n6275_ ) -new_n6278_ = OR ( new_n6276_, new_n6275_ ) -new_n6279_ = NAND ( new_n6278_, new_n6277_ ) -new_n6280_ = NAND ( new_n5950_, new_n5946_ ) -new_n6281_ = NAND ( new_n6280_, new_n5947_ ) -new_n6282_ = XOR ( new_n6281_, new_n6279_ ) -new_n6283_ = NOR ( new_n6282_, new_n2393_ ) -new_n6284_ = NAND ( new_n5958_, new_n3025_ ) -new_n6285_ = NAND ( new_n2250_, new_n2248_, NET_352 ) -new_n6286_ = NOR ( new_n5957_, NET_515 ) -new_n6287_ = AND ( new_n5957_, NET_515 ) -new_n6288_ = NOR ( new_n6287_, new_n6286_ ) -new_n6289_ = NAND ( new_n6288_, new_n2228_ ) -new_n6290_ = NOT ( NET_416 ) -new_n6291_ = OR ( new_n2238_, new_n6290_ ) -new_n6292_ = NOT ( NET_384 ) -new_n6293_ = OR ( new_n2245_, new_n6292_ ) -new_n6294_ = NAND ( new_n6293_, new_n6291_, new_n6289_, new_n6285_ ) -new_n6295_ = NAND ( new_n6294_, new_n2416_ ) -new_n6296_ = NAND ( new_n5958_, new_n2384_ ) -new_n6297_ = NAND ( new_n5518_, new_n3029_ ) -new_n6298_ = NAND ( new_n6297_, new_n6296_, new_n6295_ ) -new_n6299_ = NAND ( new_n6298_, new_n2415_ ) -new_n6300_ = OR ( new_n6250_, new_n2412_ ) -new_n6301_ = OR ( NET_520, new_n5955_ ) -new_n6302_ = NAND ( new_n6301_, new_n6300_, new_n6299_, new_n6284_ ) -NET_11995 = OR ( new_n6302_, new_n6283_, new_n6271_ ) -new_n6304_ = NOR ( new_n5939_, new_n3037_ ) -new_n6305_ = OR ( new_n5951_, new_n3041_ ) -new_n6306_ = NAND ( new_n5964_, new_n2367_ ) -new_n6307_ = OR ( new_n5919_, new_n3045_ ) -new_n6308_ = NAND ( new_n5263_, new_n2966_ ) -new_n6309_ = NAND ( new_n6308_, new_n6307_, new_n6306_, new_n6305_ ) -new_n6310_ = NOR ( new_n6309_, new_n6304_ ) -new_n6311_ = OR ( new_n6310_, new_n3053_ ) -new_n6312_ = NAND ( new_n3053_, NET_350 ) -NET_11996 = NAND ( new_n6312_, new_n6311_ ) -new_n6314_ = OR ( new_n6310_, new_n3707_ ) -new_n6315_ = OR ( new_n3057_, new_n5516_ ) -NET_11997 = NAND ( new_n6315_, new_n6314_ ) -new_n6317_ = NOR ( new_n6270_, new_n2208_ ) -new_n6318_ = OR ( new_n6282_, new_n2362_ ) -new_n6319_ = NAND ( new_n5518_, new_n2968_ ) -new_n6320_ = NAND ( new_n2196_, NET_415 ) -new_n6321_ = NAND ( new_n5958_, new_n2380_ ) -new_n6322_ = AND ( new_n6321_, new_n6320_, new_n6319_ ) -new_n6323_ = NAND ( new_n6294_, new_n2369_ ) -new_n6324_ = OR ( new_n6250_, new_n2364_ ) -new_n6325_ = NAND ( new_n6324_, new_n6323_, new_n6322_, new_n6318_ ) -NET_12098 = OR ( new_n6325_, new_n6317_ ) -new_n6327_ = NOT ( NET_487 ) -new_n6328_ = NOR ( new_n6327_, NET_242 ) -new_n6329_ = NOT ( NET_242 ) -new_n6330_ = NOR ( NET_487, new_n6329_ ) -new_n6331_ = OR ( new_n6330_, new_n6328_ ) -new_n6332_ = NOR ( new_n5990_, new_n5987_ ) -new_n6333_ = NOR ( new_n6332_, new_n5985_ ) -new_n6334_ = XOR ( new_n6333_, new_n6331_ ) -new_n6335_ = NAND ( new_n6334_, new_n1530_ ) -new_n6336_ = OR ( new_n1530_, NET_3 ) -new_n6337_ = NAND ( new_n6336_, new_n6335_ ) -new_n6338_ = OR ( new_n6337_, NET_765 ) -new_n6339_ = OR ( new_n3175_, new_n2582_ ) -new_n6340_ = OR ( new_n3178_, new_n2592_ ) -NET_12115 = NAND ( new_n6340_, new_n6339_, new_n6338_ ) -new_n6342_ = NOR ( new_n3114_, new_n3112_ ) -new_n6343_ = XOR ( new_n6342_, new_n3110_ ) -new_n6344_ = NAND ( new_n6343_, new_n1530_ ) -new_n6345_ = OR ( new_n1530_, new_n1562_ ) -new_n6346_ = NAND ( new_n6345_, new_n6344_ ) -new_n6347_ = OR ( new_n6346_, new_n2735_ ) -new_n6348_ = OR ( NET_554, new_n2431_ ) -new_n6349_ = NAND ( new_n2441_, new_n2430_ ) -new_n6350_ = NAND ( new_n6349_, NET_533 ) -new_n6351_ = NAND ( new_n6350_, new_n2442_ ) -new_n6352_ = OR ( new_n6351_, new_n2461_ ) -new_n6353_ = NAND ( new_n6352_, new_n6348_ ) -new_n6354_ = OR ( new_n6353_, new_n2543_ ) -new_n6355_ = NAND ( new_n6354_, new_n6347_ ) -new_n6356_ = OR ( new_n6355_, new_n2524_ ) -new_n6357_ = NAND ( new_n6042_, new_n2579_ ) -new_n6358_ = NOT ( new_n6353_ ) -new_n6359_ = OR ( new_n6358_, new_n2613_ ) -new_n6360_ = NAND ( new_n6359_, new_n6357_, new_n6356_ ) -new_n6361_ = XOR ( new_n6360_, new_n2618_ ) -new_n6362_ = NAND ( new_n6042_, new_n2620_ ) -new_n6363_ = OR ( new_n6355_, new_n2578_ ) -new_n6364_ = OR ( new_n2624_, new_n6038_ ) -new_n6365_ = OR ( new_n2626_, new_n6040_ ) -new_n6366_ = NAND ( new_n6365_, new_n6364_, new_n6363_, new_n6362_ ) -new_n6367_ = OR ( new_n6366_, new_n6361_ ) -new_n6368_ = NAND ( new_n6366_, new_n6361_ ) -new_n6369_ = NAND ( new_n6368_, new_n6367_ ) -new_n6370_ = NAND ( new_n6025_, new_n6021_ ) -new_n6371_ = NAND ( new_n6370_, new_n6369_, new_n6022_ ) -new_n6372_ = NAND ( new_n6370_, new_n6022_ ) -new_n6373_ = NAND ( new_n6372_, new_n6368_, new_n6367_ ) -new_n6374_ = NAND ( new_n6373_, new_n6371_ ) -new_n6375_ = OR ( new_n6374_, new_n3202_ ) -new_n6376_ = OR ( new_n6358_, new_n2732_ ) -new_n6377_ = NAND ( new_n6346_, new_n2543_ ) -new_n6378_ = NAND ( new_n6377_, new_n6376_ ) -new_n6379_ = NOT ( new_n6378_ ) -new_n6380_ = NOR ( new_n6379_, new_n4987_ ) -new_n6381_ = NOR ( new_n3198_, new_n6032_ ) -new_n6382_ = NOR ( new_n6381_, new_n6380_ ) -new_n6383_ = NAND ( new_n2609_, new_n2607_, NET_598 ) -new_n6384_ = NOR ( new_n6035_, NET_760 ) -new_n6385_ = XOR ( new_n6384_, NET_741 ) -new_n6386_ = NAND ( new_n6385_, new_n2587_ ) -new_n6387_ = NOT ( NET_662 ) -new_n6388_ = OR ( new_n2597_, new_n6387_ ) -new_n6389_ = NOT ( NET_630 ) -new_n6390_ = OR ( new_n2604_, new_n6389_ ) -new_n6391_ = NAND ( new_n6390_, new_n6388_, new_n6386_, new_n6383_ ) -new_n6392_ = NAND ( new_n6391_, new_n3243_ ) -new_n6393_ = NAND ( new_n5763_, new_n3253_ ) -NET_12116 = NAND ( new_n6393_, new_n6392_, new_n6382_, new_n6375_ ) -new_n6395_ = OR ( new_n6374_, new_n3264_ ) -new_n6396_ = NOR ( new_n6379_, new_n5008_ ) -new_n6397_ = NOR ( new_n3263_, new_n6040_ ) -new_n6398_ = NOR ( new_n6397_, new_n6396_ ) -new_n6399_ = NAND ( new_n6391_, new_n3269_ ) -new_n6400_ = NAND ( new_n5763_, new_n3271_ ) -NET_12117 = NAND ( new_n6400_, new_n6399_, new_n6398_, new_n6395_ ) -new_n6402_ = OR ( new_n6374_, new_n3767_ ) -new_n6403_ = NAND ( new_n2713_, NET_661 ) -new_n6404_ = NAND ( new_n6391_, new_n2765_ ) -new_n6405_ = OR ( new_n6379_, new_n2743_ ) -new_n6406_ = NAND ( new_n5763_, new_n2756_ ) -new_n6407_ = NAND ( new_n6036_, new_n2758_ ) -new_n6408_ = AND ( new_n6407_, new_n6406_, new_n6405_ ) -NET_12118 = NAND ( new_n6408_, new_n6404_, new_n6403_, new_n6402_ ) -new_n6410_ = OR ( new_n6374_, new_n3276_ ) -new_n6411_ = OR ( new_n3283_, new_n6038_ ) -new_n6412_ = NAND ( new_n3287_, NET_629 ) -new_n6413_ = NAND ( new_n6412_, new_n6411_ ) -new_n6414_ = NAND ( new_n6413_, new_n6358_ ) -new_n6415_ = OR ( new_n6413_, new_n6358_ ) -new_n6416_ = NAND ( new_n6415_, new_n6414_ ) -new_n6417_ = NAND ( new_n6070_, new_n6067_ ) -new_n6418_ = NAND ( new_n6417_, new_n6066_ ) -new_n6419_ = NAND ( new_n6418_, new_n6416_ ) -new_n6420_ = OR ( new_n6418_, new_n6416_ ) -new_n6421_ = NAND ( new_n6420_, new_n6419_, new_n3316_ ) -new_n6422_ = NAND ( new_n6353_, new_n3323_ ) -new_n6423_ = NAND ( new_n3312_, new_n2613_, NET_765, NET_692 ) -new_n6424_ = OR ( NET_765, new_n6034_ ) -new_n6425_ = AND ( new_n6424_, new_n6423_, new_n6422_ ) -NET_12119 = NAND ( new_n6425_, new_n6421_, new_n6410_ ) -new_n6427_ = OR ( new_n6374_, new_n3339_ ) -new_n6428_ = NAND ( new_n6036_, new_n3350_ ) -new_n6429_ = NAND ( new_n6391_, new_n3352_ ) -new_n6430_ = NAND ( new_n6036_, new_n3193_ ) -new_n6431_ = NAND ( new_n5763_, new_n3355_ ) -new_n6432_ = NAND ( new_n6431_, new_n6430_, new_n6429_ ) -new_n6433_ = NAND ( new_n6432_, new_n3359_ ) -new_n6434_ = NAND ( new_n6378_, new_n3361_ ) -new_n6435_ = OR ( new_n6355_, new_n3364_ ) -new_n6436_ = AND ( new_n6435_, new_n6434_, new_n6424_ ) -NET_12120 = NAND ( new_n6436_, new_n6433_, new_n6428_, new_n6427_ ) -new_n6438_ = NAND ( new_n1530_, new_n4938_ ) -new_n6439_ = OR ( new_n1530_, NET_238 ) -new_n6440_ = NAND ( new_n6439_, new_n6438_ ) -new_n6441_ = XOR ( new_n6440_, NET_7 ) -new_n6442_ = NOT ( NET_8 ) -new_n6443_ = NAND ( new_n6093_, new_n6442_ ) -new_n6444_ = NAND ( new_n6443_, new_n6099_ ) -new_n6445_ = OR ( new_n6093_, new_n6442_ ) -new_n6446_ = NAND ( new_n6445_, new_n6444_ ) -new_n6447_ = XNOR ( new_n6446_, new_n6441_ ) -new_n6448_ = OR ( new_n6447_, new_n1531_ ) -new_n6449_ = OR ( new_n1530_, NET_483 ) -new_n6450_ = NAND ( new_n6449_, new_n6448_ ) -new_n6451_ = OR ( new_n6450_, NET_275 ) -new_n6452_ = OR ( new_n1692_, new_n1769_ ) -new_n6453_ = OR ( new_n1771_, new_n1696_ ) -NET_12186 = NAND ( new_n6453_, new_n6452_, new_n6451_ ) -new_n6455_ = NAND ( new_n6161_, new_n1870_ ) -new_n6456_ = NAND ( new_n1569_, new_n1568_ ) -new_n6457_ = NAND ( new_n6456_, new_n1655_, new_n1654_ ) -new_n6458_ = OR ( new_n1657_, new_n1567_ ) -new_n6459_ = NAND ( new_n6458_, new_n6457_ ) -new_n6460_ = NAND ( new_n6459_, new_n1530_ ) -new_n6461_ = OR ( new_n1530_, NET_468 ) -new_n6462_ = NAND ( new_n6461_, new_n6460_ ) -new_n6463_ = NAND ( new_n6462_, new_n1921_ ) -new_n6464_ = NOT ( NET_43 ) -new_n6465_ = OR ( NET_64, new_n6464_ ) -new_n6466_ = NOT ( NET_42 ) -new_n6467_ = NAND ( new_n6116_, new_n6464_, new_n6466_ ) -new_n6468_ = NAND ( new_n6116_, new_n6466_ ) -new_n6469_ = NAND ( new_n6468_, NET_43 ) -new_n6470_ = NAND ( new_n6469_, new_n6467_ ) -new_n6471_ = OR ( new_n6470_, new_n1694_ ) -new_n6472_ = NAND ( new_n6471_, new_n6465_ ) -new_n6473_ = OR ( new_n6472_, new_n1921_ ) -new_n6474_ = AND ( new_n6473_, new_n6463_ ) -new_n6475_ = NAND ( new_n6474_, new_n1942_ ) -new_n6476_ = NAND ( new_n6472_, new_n1953_ ) -new_n6477_ = NAND ( new_n6476_, new_n6475_, new_n6455_ ) -new_n6478_ = XOR ( new_n6477_, new_n1844_ ) -new_n6479_ = NAND ( new_n6161_, new_n1960_ ) -new_n6480_ = NAND ( new_n6474_, new_n1870_ ) -new_n6481_ = OR ( new_n1951_, new_n6159_ ) -new_n6482_ = OR ( new_n1952_, new_n6157_ ) -new_n6483_ = NAND ( new_n6482_, new_n6481_, new_n6480_, new_n6479_ ) -new_n6484_ = OR ( new_n6483_, new_n6478_ ) -new_n6485_ = NAND ( new_n6483_, new_n6478_ ) -new_n6486_ = NAND ( new_n6485_, new_n6484_ ) -new_n6487_ = NAND ( new_n6136_, new_n6132_ ) -new_n6488_ = NAND ( new_n6487_, new_n6486_, new_n6133_ ) -new_n6489_ = NAND ( new_n6487_, new_n6133_ ) -new_n6490_ = NAND ( new_n6489_, new_n6485_, new_n6484_ ) -new_n6491_ = NAND ( new_n6490_, new_n6488_ ) -new_n6492_ = OR ( new_n6491_, new_n1840_ ) -new_n6493_ = NAND ( new_n6161_, new_n1976_ ) -new_n6494_ = AND ( new_n6474_, new_n1978_ ) -new_n6495_ = OR ( new_n6494_, new_n6493_ ) -new_n6496_ = NAND ( new_n6494_, new_n6493_ ) -new_n6497_ = NAND ( new_n6496_, new_n6495_ ) -new_n6498_ = NAND ( new_n6145_, new_n6141_ ) -new_n6499_ = NAND ( new_n6498_, new_n6142_ ) -new_n6500_ = XNOR ( new_n6499_, new_n6497_ ) -new_n6501_ = OR ( new_n6500_, new_n1975_ ) -new_n6502_ = NAND ( new_n5883_, new_n3867_ ) -new_n6503_ = NAND ( new_n1838_, NET_171 ) -new_n6504_ = NAND ( new_n6155_, new_n2005_ ) -new_n6505_ = NAND ( new_n6504_, new_n6503_, new_n6502_ ) -new_n6506_ = NAND ( new_n1901_, new_n1898_, NET_108 ) -new_n6507_ = XOR ( new_n6154_, NET_251 ) -new_n6508_ = NAND ( new_n6507_, new_n1878_ ) -new_n6509_ = NOT ( NET_172 ) -new_n6510_ = OR ( new_n1887_, new_n6509_ ) -new_n6511_ = NOT ( NET_140 ) -new_n6512_ = OR ( new_n1895_, new_n6511_ ) -new_n6513_ = NAND ( new_n6512_, new_n6510_, new_n6508_, new_n6506_ ) -new_n6514_ = AND ( new_n6513_, new_n1994_ ) -new_n6515_ = NOT ( new_n6474_ ) -new_n6516_ = NOR ( new_n6515_, new_n1989_ ) -new_n6517_ = NOR ( new_n6516_, new_n6514_, new_n6505_ ) -NET_12187 = NAND ( new_n6517_, new_n6501_, new_n6492_ ) -new_n6519_ = OR ( new_n6137_, new_n2778_ ) -new_n6520_ = NAND ( new_n6119_, new_n4082_ ) -new_n6521_ = OR ( new_n1914_, new_n5881_ ) -new_n6522_ = NAND ( new_n1914_, NET_170 ) -new_n6523_ = NAND ( new_n6522_, new_n6521_ ) -new_n6524_ = XNOR ( new_n6523_, new_n6119_ ) -new_n6525_ = OR ( new_n6170_, new_n5840_ ) -new_n6526_ = NAND ( new_n6525_, new_n6175_ ) -new_n6527_ = NAND ( new_n6170_, new_n5840_ ) -new_n6528_ = NAND ( new_n6527_, new_n6526_ ) -new_n6529_ = XOR ( new_n6528_, new_n6524_ ) -new_n6530_ = OR ( new_n6529_, new_n2789_ ) -new_n6531_ = NAND ( new_n6530_, new_n6520_, new_n6519_ ) -new_n6532_ = AND ( new_n6531_, new_n2796_ ) -new_n6533_ = OR ( new_n6529_, new_n2804_ ) -new_n6534_ = NAND ( new_n6119_, new_n2798_ ) -new_n6535_ = NAND ( new_n2794_, new_n1947_, NET_275, NET_203 ) -new_n6536_ = NAND ( new_n6535_, new_n6534_, new_n6533_, new_n6194_ ) -NET_12188 = OR ( new_n6536_, new_n6532_ ) -new_n6538_ = OR ( new_n6491_, new_n2016_ ) -new_n6539_ = OR ( new_n6500_, new_n2020_ ) -new_n6540_ = NAND ( new_n6155_, new_n2853_ ) -new_n6541_ = NAND ( new_n6513_, new_n2043_ ) -new_n6542_ = NAND ( new_n6155_, new_n2009_ ) -new_n6543_ = NAND ( new_n5883_, new_n2864_ ) -new_n6544_ = NAND ( new_n6543_, new_n6542_, new_n6541_ ) -new_n6545_ = NAND ( new_n6544_, new_n2042_ ) -new_n6546_ = NOT ( new_n2039_ ) -new_n6547_ = NAND ( new_n6474_, new_n6546_ ) -new_n6548_ = NAND ( NET_35973, NET_270 ) -new_n6549_ = AND ( new_n6548_, new_n6547_, new_n6545_ ) -NET_12189 = NAND ( new_n6549_, new_n6540_, new_n6539_, new_n6538_ ) -new_n6551_ = NOR ( new_n6137_, new_n2873_ ) -new_n6552_ = NOT ( new_n6146_ ) -new_n6553_ = NAND ( new_n6552_, new_n2878_ ) -new_n6554_ = NAND ( new_n6161_, new_n1992_ ) -new_n6555_ = OR ( new_n6121_, new_n4269_ ) -new_n6556_ = NAND ( new_n5434_, new_n3644_ ) -new_n6557_ = NAND ( new_n6556_, new_n6555_, new_n6554_, new_n6553_ ) -new_n6558_ = NOR ( new_n6557_, new_n6551_ ) -new_n6559_ = OR ( new_n6558_, new_n2891_ ) -new_n6560_ = NAND ( new_n2891_, NET_106 ) -NET_12190 = NAND ( new_n6560_, new_n6559_ ) -new_n6562_ = OR ( new_n6558_, new_n2900_ ) -new_n6563_ = NAND ( new_n2900_, NET_138 ) -NET_12191 = NAND ( new_n6563_, new_n6562_ ) -new_n6565_ = NAND ( new_n1530_, new_n4940_ ) -new_n6566_ = OR ( new_n6447_, new_n1530_ ) -new_n6567_ = NAND ( new_n6566_, new_n6565_ ) -new_n6568_ = OR ( new_n6567_, NET_520 ) -new_n6569_ = OR ( new_n2054_, new_n2082_ ) -new_n6570_ = OR ( new_n2103_, new_n2058_ ) -NET_12216 = NAND ( new_n6570_, new_n6569_, new_n6568_ ) -new_n6572_ = OR ( new_n6270_, new_n2983_ ) -new_n6573_ = OR ( new_n6248_, new_n2987_ ) -new_n6574_ = OR ( new_n2991_, new_n5962_ ) -new_n6575_ = OR ( new_n2287_, new_n5960_ ) -new_n6576_ = NAND ( new_n6575_, new_n6574_ ) -new_n6577_ = XOR ( new_n6576_, new_n6248_ ) -new_n6578_ = OR ( new_n6222_, new_n5916_ ) -new_n6579_ = NAND ( new_n6578_, new_n6227_ ) -new_n6580_ = NAND ( new_n6222_, new_n5916_ ) -new_n6581_ = NAND ( new_n6580_, new_n6579_ ) -new_n6582_ = XOR ( new_n6581_, new_n6577_ ) -new_n6583_ = OR ( new_n6582_, new_n2999_ ) -new_n6584_ = NAND ( new_n6583_, new_n6573_, new_n6572_ ) -new_n6585_ = NAND ( new_n6584_, new_n3006_ ) -new_n6586_ = OR ( new_n6270_, new_n3008_ ) -new_n6587_ = OR ( new_n6582_, new_n3016_ ) -new_n6588_ = NAND ( new_n6247_, new_n3012_ ) -new_n6589_ = NAND ( new_n3004_, new_n2405_, NET_520, NET_448 ) -new_n6590_ = AND ( new_n6589_, new_n6588_, new_n6301_ ) -NET_12217 = NAND ( new_n6590_, new_n6587_, new_n6586_, new_n6585_ ) -new_n6592_ = NAND ( new_n6294_, new_n2274_ ) -new_n6593_ = NAND ( new_n1530_, new_n3111_ ) -new_n6594_ = NAND ( new_n6459_, new_n1531_ ) -new_n6595_ = NAND ( new_n6594_, new_n6593_ ) -new_n6596_ = NAND ( new_n6595_, new_n2290_ ) -new_n6597_ = OR ( NET_309, new_n2062_ ) -new_n6598_ = NAND ( new_n2072_, new_n2061_ ) -new_n6599_ = NAND ( new_n6598_, NET_288 ) -new_n6600_ = NAND ( new_n6599_, new_n2073_ ) -new_n6601_ = OR ( new_n6600_, new_n2056_ ) -new_n6602_ = NAND ( new_n6601_, new_n6597_ ) -new_n6603_ = OR ( new_n6602_, new_n2290_ ) -new_n6604_ = NAND ( new_n6603_, new_n6596_ ) -new_n6605_ = OR ( new_n6604_, new_n2309_ ) -new_n6606_ = NAND ( new_n6602_, new_n2325_ ) -new_n6607_ = OR ( new_n2328_, new_n6292_ ) -new_n6608_ = OR ( new_n2330_, new_n6290_ ) -new_n6609_ = AND ( new_n6608_, new_n6607_, new_n6606_ ) -new_n6610_ = NAND ( new_n6609_, new_n6605_, new_n6592_ ) -new_n6611_ = XOR ( new_n6610_, new_n2218_ ) -new_n6612_ = OR ( new_n6604_, new_n2273_ ) -new_n6613_ = NAND ( new_n6294_, new_n2336_ ) -new_n6614_ = NAND ( new_n6602_, new_n2339_ ) -new_n6615_ = OR ( new_n2323_, new_n6292_ ) -new_n6616_ = OR ( new_n2324_, new_n6290_ ) -new_n6617_ = AND ( new_n6616_, new_n6615_, new_n6614_ ) -new_n6618_ = NAND ( new_n6617_, new_n6613_, new_n6612_ ) -new_n6619_ = NAND ( new_n6618_, new_n6611_ ) -new_n6620_ = OR ( new_n6618_, new_n6611_ ) -new_n6621_ = NAND ( new_n6269_, new_n6265_ ) -new_n6622_ = NAND ( new_n6621_, new_n6266_ ) -new_n6623_ = NAND ( new_n6622_, new_n6620_, new_n6619_ ) -new_n6624_ = NAND ( new_n6620_, new_n6619_ ) -new_n6625_ = NAND ( new_n6624_, new_n6621_, new_n6266_ ) -new_n6626_ = NAND ( new_n6625_, new_n6623_ ) -new_n6627_ = OR ( new_n6626_, new_n2390_ ) -new_n6628_ = OR ( new_n6604_, new_n2349_ ) -new_n6629_ = NAND ( new_n6294_, new_n2349_ ) -new_n6630_ = NAND ( new_n6629_, new_n6628_ ) -new_n6631_ = XOR ( new_n6630_, new_n2349_ ) -new_n6632_ = OR ( new_n6604_, new_n2348_ ) -new_n6633_ = NAND ( new_n6632_, new_n6631_ ) -new_n6634_ = NOR ( new_n6632_, new_n6631_ ) -new_n6635_ = NOT ( new_n6634_ ) -new_n6636_ = NAND ( new_n6635_, new_n6633_ ) -new_n6637_ = NAND ( new_n6281_, new_n6277_ ) -new_n6638_ = NAND ( new_n6637_, new_n6636_, new_n6278_ ) -new_n6639_ = NAND ( new_n6637_, new_n6278_ ) -new_n6640_ = NAND ( new_n6639_, new_n6633_ ) -new_n6641_ = OR ( new_n6640_, new_n6634_ ) -new_n6642_ = NAND ( new_n6641_, new_n6638_ ) -new_n6643_ = OR ( new_n6642_, new_n2393_ ) -new_n6644_ = NAND ( new_n6288_, new_n3025_ ) -new_n6645_ = NAND ( new_n2250_, new_n2248_, NET_353 ) -new_n6646_ = XOR ( new_n6287_, NET_496 ) -new_n6647_ = NAND ( new_n6646_, new_n2228_ ) -new_n6648_ = NOT ( NET_417 ) -new_n6649_ = OR ( new_n2238_, new_n6648_ ) -new_n6650_ = NOT ( NET_385 ) -new_n6651_ = OR ( new_n2245_, new_n6650_ ) -new_n6652_ = NAND ( new_n6651_, new_n6649_, new_n6647_, new_n6645_ ) -new_n6653_ = NAND ( new_n6652_, new_n2416_ ) -new_n6654_ = NAND ( new_n6288_, new_n2384_ ) -new_n6655_ = NAND ( new_n5964_, new_n3029_ ) -new_n6656_ = NAND ( new_n6655_, new_n6654_, new_n6653_ ) -new_n6657_ = NAND ( new_n6656_, new_n2415_ ) -new_n6658_ = OR ( new_n6604_, new_n2412_ ) -new_n6659_ = NAND ( NET_35976, NET_515 ) -new_n6660_ = AND ( new_n6659_, new_n6658_, new_n6657_ ) -NET_12218 = NAND ( new_n6660_, new_n6644_, new_n6643_, new_n6627_ ) -new_n6662_ = NOR ( new_n6270_, new_n3037_ ) -new_n6663_ = OR ( new_n6282_, new_n3041_ ) -new_n6664_ = NAND ( new_n6294_, new_n2367_ ) -new_n6665_ = OR ( new_n6250_, new_n3045_ ) -new_n6666_ = NAND ( new_n5518_, new_n2966_ ) -new_n6667_ = NAND ( new_n6666_, new_n6665_, new_n6664_, new_n6663_ ) -new_n6668_ = NOR ( new_n6667_, new_n6662_ ) -new_n6669_ = OR ( new_n6668_, new_n3053_ ) -new_n6670_ = NAND ( new_n3053_, NET_351 ) -NET_12219 = NAND ( new_n6670_, new_n6669_ ) -new_n6672_ = OR ( new_n6668_, new_n3707_ ) -new_n6673_ = OR ( new_n3057_, new_n5962_ ) -NET_12220 = NAND ( new_n6673_, new_n6672_ ) -new_n6675_ = NOR ( new_n3119_, new_n3117_ ) -new_n6676_ = XOR ( new_n6675_, new_n3115_ ) -new_n6677_ = NAND ( new_n6676_, new_n1530_ ) -new_n6678_ = OR ( new_n1530_, new_n1555_ ) -new_n6679_ = NAND ( new_n6678_, new_n6677_ ) -new_n6680_ = NAND ( new_n6679_, new_n2543_ ) -new_n6681_ = NOT ( NET_534 ) -new_n6682_ = NOR ( NET_554, new_n6681_ ) -new_n6683_ = XOR ( new_n2442_, new_n6681_ ) -new_n6684_ = NOR ( new_n6683_, new_n2461_ ) -new_n6685_ = NOR ( new_n6684_, new_n6682_ ) -new_n6686_ = OR ( new_n6685_, new_n2543_ ) -new_n6687_ = NAND ( new_n6686_, new_n6680_ ) -new_n6688_ = NOT ( new_n6687_ ) -new_n6689_ = OR ( new_n6688_, new_n2524_ ) -new_n6690_ = NAND ( new_n6391_, new_n2579_ ) -new_n6691_ = OR ( new_n6685_, new_n2613_ ) -new_n6692_ = NAND ( new_n6691_, new_n6690_, new_n6689_ ) -new_n6693_ = XOR ( new_n6692_, new_n2618_ ) -new_n6694_ = NAND ( new_n6391_, new_n2620_ ) -new_n6695_ = OR ( new_n6688_, new_n2578_ ) -new_n6696_ = OR ( new_n2624_, new_n6387_ ) -new_n6697_ = OR ( new_n2626_, new_n6389_ ) -new_n6698_ = NAND ( new_n6697_, new_n6696_, new_n6695_, new_n6694_ ) -new_n6699_ = OR ( new_n6698_, new_n6693_ ) -new_n6700_ = NAND ( new_n6698_, new_n6693_ ) -new_n6701_ = NAND ( new_n6700_, new_n6699_ ) -new_n6702_ = NAND ( new_n6372_, new_n6367_ ) -new_n6703_ = NAND ( new_n6702_, new_n6368_ ) -new_n6704_ = XOR ( new_n6703_, new_n6701_ ) -new_n6705_ = NOR ( new_n6704_, new_n3202_ ) -new_n6706_ = OR ( new_n6685_, new_n2732_ ) -new_n6707_ = NAND ( new_n6706_, new_n6680_ ) -new_n6708_ = NAND ( new_n6707_, new_n3240_ ) -new_n6709_ = NAND ( new_n3197_, NET_598 ) -new_n6710_ = NAND ( new_n2609_, new_n2607_, NET_599 ) -new_n6711_ = NOT ( NET_753 ) -new_n6712_ = NOT ( NET_741 ) -new_n6713_ = NAND ( new_n6384_, new_n6712_ ) -new_n6714_ = XOR ( new_n6713_, new_n6711_ ) -new_n6715_ = NAND ( new_n6714_, new_n2587_ ) -new_n6716_ = NOT ( NET_663 ) -new_n6717_ = OR ( new_n2597_, new_n6716_ ) -new_n6718_ = NOT ( NET_631 ) -new_n6719_ = OR ( new_n2604_, new_n6718_ ) -new_n6720_ = NAND ( new_n6719_, new_n6717_, new_n6715_, new_n6710_ ) -new_n6721_ = NAND ( new_n6720_, new_n3243_ ) -new_n6722_ = NAND ( new_n6042_, new_n3253_ ) -new_n6723_ = NAND ( new_n6722_, new_n6721_, new_n6709_, new_n6708_ ) -NET_12248 = OR ( new_n6723_, new_n6705_ ) -new_n6725_ = NOR ( new_n6704_, new_n3264_ ) -new_n6726_ = NAND ( new_n6707_, new_n3266_ ) -new_n6727_ = NAND ( new_n3262_, NET_630 ) -new_n6728_ = NAND ( new_n6720_, new_n3269_ ) -new_n6729_ = NAND ( new_n6042_, new_n3271_ ) -new_n6730_ = NAND ( new_n6729_, new_n6728_, new_n6727_, new_n6726_ ) -NET_12249 = OR ( new_n6730_, new_n6725_ ) -new_n6732_ = OR ( new_n6704_, new_n3767_ ) -new_n6733_ = NAND ( new_n2713_, NET_662 ) -new_n6734_ = NAND ( new_n6720_, new_n2765_ ) -new_n6735_ = NAND ( new_n6707_, new_n2744_ ) -new_n6736_ = NAND ( new_n6042_, new_n2756_ ) -new_n6737_ = NAND ( new_n6385_, new_n2758_ ) -new_n6738_ = AND ( new_n6737_, new_n6736_, new_n6735_ ) -NET_12250 = NAND ( new_n6738_, new_n6734_, new_n6733_, new_n6732_ ) -new_n6740_ = NOR ( new_n6704_, new_n3276_ ) -new_n6741_ = OR ( new_n3283_, new_n6387_ ) -new_n6742_ = NAND ( new_n3287_, NET_630 ) -new_n6743_ = NAND ( new_n6742_, new_n6741_ ) -new_n6744_ = NAND ( new_n6743_, new_n6685_ ) -new_n6745_ = OR ( new_n6743_, new_n6685_ ) -new_n6746_ = NAND ( new_n6745_, new_n6744_ ) -new_n6747_ = NAND ( new_n6418_, new_n6415_ ) -new_n6748_ = NAND ( new_n6747_, new_n6414_ ) -new_n6749_ = NAND ( new_n6748_, new_n6746_ ) -new_n6750_ = OR ( new_n6748_, new_n6746_ ) -new_n6751_ = NAND ( new_n6750_, new_n6749_, new_n3316_ ) -new_n6752_ = NOT ( new_n6685_ ) -new_n6753_ = NAND ( new_n6752_, new_n3323_ ) -new_n6754_ = NAND ( new_n3312_, new_n2613_, NET_765, NET_691 ) -new_n6755_ = OR ( NET_765, new_n6712_ ) -new_n6756_ = NAND ( new_n6755_, new_n6754_, new_n6753_, new_n6751_ ) -NET_12251 = OR ( new_n6756_, new_n6740_ ) -new_n6758_ = OR ( new_n6704_, new_n3339_ ) -new_n6759_ = NAND ( new_n6385_, new_n3350_ ) -new_n6760_ = NAND ( new_n6720_, new_n3352_ ) -new_n6761_ = NAND ( new_n6385_, new_n3193_ ) -new_n6762_ = NAND ( new_n6042_, new_n3355_ ) -new_n6763_ = NAND ( new_n6762_, new_n6761_, new_n6760_ ) -new_n6764_ = NAND ( new_n6763_, new_n3359_ ) -new_n6765_ = NAND ( new_n6707_, new_n3361_ ) -new_n6766_ = NAND ( new_n6687_, new_n3363_ ) -new_n6767_ = AND ( new_n6766_, new_n6765_, new_n6755_ ) -NET_12252 = NAND ( new_n6767_, new_n6764_, new_n6759_, new_n6758_ ) -new_n6769_ = NAND ( new_n6513_, new_n1870_ ) -new_n6770_ = NAND ( new_n1559_, NET_21 ) -new_n6771_ = OR ( new_n1559_, NET_21 ) -new_n6772_ = NAND ( new_n6771_, new_n6770_, new_n1658_ ) -new_n6773_ = OR ( new_n1660_, new_n1560_ ) -new_n6774_ = NAND ( new_n6773_, new_n6772_ ) -new_n6775_ = NAND ( new_n6774_, new_n1530_ ) -new_n6776_ = OR ( new_n1530_, NET_469 ) -new_n6777_ = NAND ( new_n6776_, new_n6775_ ) -new_n6778_ = NAND ( new_n6777_, new_n1921_ ) -new_n6779_ = NOT ( NET_44 ) -new_n6780_ = NOR ( NET_64, new_n6779_ ) -new_n6781_ = XOR ( new_n6467_, new_n6779_ ) -new_n6782_ = NOR ( new_n6781_, new_n1694_ ) -new_n6783_ = OR ( new_n6782_, new_n6780_ ) -new_n6784_ = OR ( new_n6783_, new_n1921_ ) -new_n6785_ = AND ( new_n6784_, new_n6778_ ) -new_n6786_ = NAND ( new_n6785_, new_n1942_ ) -new_n6787_ = NAND ( new_n6783_, new_n1953_ ) -new_n6788_ = NAND ( new_n6787_, new_n6786_, new_n6769_ ) -new_n6789_ = XOR ( new_n6788_, new_n1844_ ) -new_n6790_ = NAND ( new_n6513_, new_n1960_ ) -new_n6791_ = NAND ( new_n6785_, new_n1870_ ) -new_n6792_ = OR ( new_n1951_, new_n6511_ ) -new_n6793_ = OR ( new_n1952_, new_n6509_ ) -new_n6794_ = NAND ( new_n6793_, new_n6792_, new_n6791_, new_n6790_ ) -new_n6795_ = OR ( new_n6794_, new_n6789_ ) -new_n6796_ = NAND ( new_n6794_, new_n6789_ ) -new_n6797_ = NAND ( new_n6796_, new_n6795_ ) -new_n6798_ = NAND ( new_n6489_, new_n6484_ ) -new_n6799_ = NAND ( new_n6798_, new_n6485_ ) -new_n6800_ = XOR ( new_n6799_, new_n6797_ ) -new_n6801_ = NOR ( new_n6800_, new_n1840_ ) -new_n6802_ = NAND ( new_n6513_, new_n1976_ ) -new_n6803_ = AND ( new_n6785_, new_n1978_ ) -new_n6804_ = OR ( new_n6803_, new_n6802_ ) -new_n6805_ = NAND ( new_n6803_, new_n6802_ ) -new_n6806_ = NAND ( new_n6805_, new_n6804_ ) -new_n6807_ = NAND ( new_n6499_, new_n6495_ ) -new_n6808_ = NAND ( new_n6807_, new_n6496_ ) -new_n6809_ = XNOR ( new_n6808_, new_n6806_ ) -new_n6810_ = OR ( new_n6809_, new_n1975_ ) -new_n6811_ = NAND ( new_n6161_, new_n3867_ ) -new_n6812_ = NAND ( new_n1838_, NET_172 ) -new_n6813_ = NAND ( new_n6507_, new_n2005_ ) -new_n6814_ = AND ( new_n6813_, new_n6812_, new_n6811_ ) -new_n6815_ = NAND ( new_n1901_, new_n1898_, NET_109 ) -new_n6816_ = NOT ( NET_263 ) -new_n6817_ = NAND ( new_n5876_, NET_270, NET_251 ) -new_n6818_ = NAND ( new_n6817_, new_n6816_ ) -new_n6819_ = OR ( new_n6817_, new_n6816_ ) -new_n6820_ = AND ( new_n6819_, new_n6818_ ) -new_n6821_ = NAND ( new_n6820_, new_n1878_ ) -new_n6822_ = NOT ( NET_173 ) -new_n6823_ = OR ( new_n1887_, new_n6822_ ) -new_n6824_ = NOT ( NET_141 ) -new_n6825_ = OR ( new_n1895_, new_n6824_ ) -new_n6826_ = NAND ( new_n6825_, new_n6823_, new_n6821_, new_n6815_ ) -new_n6827_ = NAND ( new_n6826_, new_n1994_ ) -new_n6828_ = NOT ( new_n1989_ ) -new_n6829_ = NAND ( new_n6785_, new_n6828_ ) -new_n6830_ = NAND ( new_n6829_, new_n6827_, new_n6814_, new_n6810_ ) -NET_12313 = OR ( new_n6830_, new_n6801_ ) -new_n6832_ = NOR ( new_n6800_, new_n2016_ ) -new_n6833_ = NOR ( new_n6809_, new_n2020_ ) -new_n6834_ = NAND ( new_n6507_, new_n2853_ ) -new_n6835_ = NAND ( new_n6826_, new_n2043_ ) -new_n6836_ = NAND ( new_n6507_, new_n2009_ ) -new_n6837_ = NAND ( new_n6161_, new_n2864_ ) -new_n6838_ = NAND ( new_n6837_, new_n6836_, new_n6835_ ) -new_n6839_ = NAND ( new_n6838_, new_n2042_ ) -new_n6840_ = NAND ( new_n6785_, new_n6546_ ) -new_n6841_ = NAND ( NET_35973, NET_251 ) -new_n6842_ = NAND ( new_n6841_, new_n6840_, new_n6839_, new_n6834_ ) -NET_12314 = OR ( new_n6842_, new_n6833_, new_n6832_ ) -new_n6844_ = OR ( new_n6626_, new_n2208_ ) -new_n6845_ = OR ( new_n6642_, new_n2362_ ) -new_n6846_ = NAND ( new_n5964_, new_n2968_ ) -new_n6847_ = NAND ( new_n2196_, NET_416 ) -new_n6848_ = NAND ( new_n6288_, new_n2380_ ) -new_n6849_ = NAND ( new_n6848_, new_n6847_, new_n6846_ ) -new_n6850_ = AND ( new_n6652_, new_n2369_ ) -new_n6851_ = NOR ( new_n6604_, new_n2364_ ) -new_n6852_ = NOR ( new_n6851_, new_n6850_, new_n6849_ ) -NET_12329 = NAND ( new_n6852_, new_n6845_, new_n6844_ ) -new_n6854_ = NOT ( new_n6652_ ) -new_n6855_ = OR ( new_n6854_, new_n2273_ ) -new_n6856_ = NAND ( new_n1530_, new_n3116_ ) -new_n6857_ = NAND ( new_n6774_, new_n1531_ ) -new_n6858_ = NAND ( new_n6857_, new_n6856_ ) -new_n6859_ = NAND ( new_n6858_, new_n2290_ ) -new_n6860_ = NOR ( NET_309, NET_289 ) -new_n6861_ = NOT ( NET_289 ) -new_n6862_ = XOR ( new_n2073_, new_n6861_ ) -new_n6863_ = AND ( new_n6862_, NET_309 ) -new_n6864_ = NOR ( new_n6863_, new_n6860_ ) -new_n6865_ = NOT ( new_n6864_ ) -new_n6866_ = NAND ( new_n6865_, new_n2289_ ) -new_n6867_ = NAND ( new_n6866_, new_n6859_ ) -new_n6868_ = OR ( new_n6867_, new_n2309_ ) -new_n6869_ = NAND ( new_n6864_, new_n2325_ ) -new_n6870_ = OR ( new_n2328_, new_n6650_ ) -new_n6871_ = OR ( new_n2330_, new_n6648_ ) -new_n6872_ = AND ( new_n6871_, new_n6870_, new_n6869_ ) -new_n6873_ = NAND ( new_n6872_, new_n6868_, new_n6855_ ) -new_n6874_ = XOR ( new_n6873_, new_n2218_ ) -new_n6875_ = OR ( new_n6867_, new_n2273_ ) -new_n6876_ = NAND ( new_n6652_, new_n2336_ ) -new_n6877_ = OR ( new_n6865_, new_n2338_ ) -new_n6878_ = OR ( new_n2323_, new_n6650_ ) -new_n6879_ = OR ( new_n2324_, new_n6648_ ) -new_n6880_ = AND ( new_n6879_, new_n6878_, new_n6877_ ) -new_n6881_ = NAND ( new_n6880_, new_n6876_, new_n6875_ ) -new_n6882_ = OR ( new_n6881_, new_n6874_ ) -new_n6883_ = NAND ( new_n6881_, new_n6874_ ) -new_n6884_ = NAND ( new_n6883_, new_n6882_ ) -new_n6885_ = NAND ( new_n6622_, new_n6620_ ) -new_n6886_ = NAND ( new_n6885_, new_n6619_ ) -new_n6887_ = XOR ( new_n6886_, new_n6884_ ) -new_n6888_ = NOR ( new_n6887_, new_n2390_ ) -new_n6889_ = OR ( new_n6867_, new_n2349_ ) -new_n6890_ = NAND ( new_n6652_, new_n2349_ ) -new_n6891_ = NAND ( new_n6890_, new_n6889_ ) -new_n6892_ = XOR ( new_n6891_, new_n2349_ ) -new_n6893_ = OR ( new_n6867_, new_n2348_ ) -new_n6894_ = NAND ( new_n6893_, new_n6892_ ) -new_n6895_ = OR ( new_n6893_, new_n6892_ ) -new_n6896_ = NAND ( new_n6895_, new_n6894_ ) -new_n6897_ = NAND ( new_n6640_, new_n6635_ ) -new_n6898_ = XOR ( new_n6897_, new_n6896_ ) -new_n6899_ = NOR ( new_n6898_, new_n2393_ ) -new_n6900_ = NAND ( new_n6646_, new_n3025_ ) -new_n6901_ = NAND ( new_n2250_, new_n2248_, NET_354 ) -new_n6902_ = NOT ( NET_508 ) -new_n6903_ = NAND ( new_n5957_, NET_515, NET_496 ) -new_n6904_ = NAND ( new_n6903_, new_n6902_ ) -new_n6905_ = OR ( new_n6903_, new_n6902_ ) -new_n6906_ = AND ( new_n6905_, new_n6904_ ) -new_n6907_ = NAND ( new_n6906_, new_n2228_ ) -new_n6908_ = NOT ( NET_418 ) -new_n6909_ = OR ( new_n2238_, new_n6908_ ) -new_n6910_ = NOT ( NET_386 ) -new_n6911_ = OR ( new_n2245_, new_n6910_ ) -new_n6912_ = NAND ( new_n6911_, new_n6909_, new_n6907_, new_n6901_ ) -new_n6913_ = NAND ( new_n6912_, new_n2416_ ) -new_n6914_ = NAND ( new_n6646_, new_n2384_ ) -new_n6915_ = NAND ( new_n6294_, new_n3029_ ) -new_n6916_ = NAND ( new_n6915_, new_n6914_, new_n6913_ ) -new_n6917_ = NAND ( new_n6916_, new_n2415_ ) -new_n6918_ = OR ( new_n6867_, new_n2412_ ) -new_n6919_ = NAND ( NET_35976, NET_496 ) -new_n6920_ = NAND ( new_n6919_, new_n6918_, new_n6917_, new_n6900_ ) -NET_12330 = OR ( new_n6920_, new_n6899_, new_n6888_ ) -new_n6922_ = NOT ( NET_243 ) -new_n6923_ = NOR ( NET_488, new_n6922_ ) -new_n6924_ = NOT ( NET_488 ) -new_n6925_ = NOR ( new_n6924_, NET_243 ) -new_n6926_ = OR ( new_n6925_, new_n6923_ ) -new_n6927_ = NOR ( new_n6333_, new_n6330_ ) -new_n6928_ = NOR ( new_n6927_, new_n6328_ ) -new_n6929_ = XOR ( new_n6928_, new_n6926_ ) -new_n6930_ = NAND ( new_n6929_, new_n1530_ ) -new_n6931_ = OR ( new_n1530_, NET_2 ) -new_n6932_ = NAND ( new_n6931_, new_n6930_ ) -new_n6933_ = OR ( new_n6932_, NET_765 ) -new_n6934_ = OR ( new_n3175_, new_n2581_ ) -new_n6935_ = OR ( new_n3178_, new_n2593_ ) -NET_12345 = NAND ( new_n6935_, new_n6934_, new_n6933_ ) -new_n6937_ = NAND ( new_n1530_, new_n5528_ ) -new_n6938_ = OR ( new_n1530_, NET_239 ) -new_n6939_ = NAND ( new_n6938_, new_n6937_ ) -new_n6940_ = XOR ( new_n6939_, NET_6 ) -new_n6941_ = NOT ( NET_7 ) -new_n6942_ = NAND ( new_n6440_, new_n6941_ ) -new_n6943_ = NAND ( new_n6942_, new_n6446_ ) -new_n6944_ = OR ( new_n6440_, new_n6941_ ) -new_n6945_ = NAND ( new_n6944_, new_n6943_ ) -new_n6946_ = XNOR ( new_n6945_, new_n6940_ ) -new_n6947_ = OR ( new_n6946_, new_n1531_ ) -new_n6948_ = OR ( new_n1530_, NET_484 ) -new_n6949_ = NAND ( new_n6948_, new_n6947_ ) -new_n6950_ = OR ( new_n6949_, NET_275 ) -new_n6951_ = NAND ( new_n1694_, NET_59, NET_275 ) -new_n6952_ = OR ( new_n1766_, new_n1696_ ) -NET_12406 = NAND ( new_n6952_, new_n6951_, new_n6950_ ) -new_n6954_ = OR ( new_n6491_, new_n2778_ ) -new_n6955_ = NAND ( new_n6472_, new_n4082_ ) -new_n6956_ = OR ( new_n1914_, new_n6159_ ) -new_n6957_ = NAND ( new_n1914_, NET_171 ) -new_n6958_ = NAND ( new_n6957_, new_n6956_ ) -new_n6959_ = NAND ( new_n6958_, new_n6472_ ) -new_n6960_ = OR ( new_n6958_, new_n6472_ ) -new_n6961_ = NAND ( new_n6960_, new_n6959_ ) -new_n6962_ = OR ( new_n6523_, new_n6119_ ) -new_n6963_ = NAND ( new_n6962_, new_n6528_ ) -new_n6964_ = NAND ( new_n6523_, new_n6119_ ) -new_n6965_ = NAND ( new_n6964_, new_n6963_, new_n6961_ ) -new_n6966_ = NAND ( new_n6964_, new_n6963_ ) -new_n6967_ = NAND ( new_n6966_, new_n6960_, new_n6959_ ) -new_n6968_ = NAND ( new_n6967_, new_n6965_ ) -new_n6969_ = OR ( new_n6968_, new_n2789_ ) -new_n6970_ = NAND ( new_n6969_, new_n6955_, new_n6954_ ) -new_n6971_ = AND ( new_n6970_, new_n2796_ ) -new_n6972_ = OR ( new_n6968_, new_n2804_ ) -new_n6973_ = NAND ( new_n6472_, new_n2798_ ) -new_n6974_ = OR ( new_n2795_, new_n3381_ ) -new_n6975_ = NAND ( new_n6974_, new_n6973_, new_n6972_, new_n6548_ ) -NET_12407 = OR ( new_n6975_, new_n6971_ ) -new_n6977_ = OR ( new_n6491_, new_n2873_ ) -new_n6978_ = NOT ( new_n6500_ ) -new_n6979_ = NAND ( new_n6978_, new_n2878_ ) -new_n6980_ = NAND ( new_n6474_, new_n2881_ ) -new_n6981_ = NAND ( new_n5883_, new_n3644_ ) -new_n6982_ = NAND ( new_n6513_, new_n1992_ ) -new_n6983_ = AND ( new_n6982_, new_n6981_ ) -new_n6984_ = NAND ( new_n6983_, new_n6980_, new_n6979_, new_n6977_ ) -new_n6985_ = NAND ( new_n6984_, new_n2892_ ) -new_n6986_ = NAND ( new_n2891_, NET_107 ) -NET_12408 = NAND ( new_n6986_, new_n6985_ ) -new_n6988_ = NAND ( new_n6984_, new_n2901_ ) -new_n6989_ = NAND ( new_n2900_, NET_139 ) -NET_12409 = NAND ( new_n6989_, new_n6988_ ) -new_n6991_ = NAND ( new_n1530_, new_n5530_ ) -new_n6992_ = OR ( new_n6946_, new_n1530_ ) -new_n6993_ = NAND ( new_n6992_, new_n6991_ ) -new_n6994_ = OR ( new_n6993_, NET_520 ) -new_n6995_ = OR ( new_n2054_, new_n2083_ ) -new_n6996_ = OR ( new_n2098_, new_n2058_ ) -NET_12428 = NAND ( new_n6996_, new_n6995_, new_n6994_ ) -new_n6998_ = NOR ( new_n6887_, new_n2208_ ) -new_n6999_ = OR ( new_n6898_, new_n2362_ ) -new_n7000_ = NAND ( new_n6294_, new_n2968_ ) -new_n7001_ = NAND ( new_n2196_, NET_417 ) -new_n7002_ = NAND ( new_n6646_, new_n2380_ ) -new_n7003_ = AND ( new_n7002_, new_n7001_, new_n7000_ ) -new_n7004_ = NAND ( new_n6912_, new_n2369_ ) -new_n7005_ = OR ( new_n6867_, new_n2364_ ) -new_n7006_ = NAND ( new_n7005_, new_n7004_, new_n7003_, new_n6999_ ) -NET_12429 = OR ( new_n7006_, new_n6998_ ) -new_n7008_ = OR ( new_n6626_, new_n2983_ ) -new_n7009_ = NAND ( new_n6602_, new_n2988_ ) -new_n7010_ = OR ( new_n2991_, new_n6292_ ) -new_n7011_ = OR ( new_n2287_, new_n6290_ ) -new_n7012_ = NAND ( new_n7011_, new_n7010_ ) -new_n7013_ = NAND ( new_n7012_, new_n6602_ ) -new_n7014_ = OR ( new_n7012_, new_n6602_ ) -new_n7015_ = NAND ( new_n7014_, new_n7013_ ) -new_n7016_ = OR ( new_n6576_, new_n6247_ ) -new_n7017_ = NAND ( new_n7016_, new_n6581_ ) -new_n7018_ = NAND ( new_n6576_, new_n6247_ ) -new_n7019_ = NAND ( new_n7018_, new_n7017_, new_n7015_ ) -new_n7020_ = NAND ( new_n7018_, new_n7017_ ) -new_n7021_ = NAND ( new_n7020_, new_n7014_, new_n7013_ ) -new_n7022_ = NAND ( new_n7021_, new_n7019_ ) -new_n7023_ = OR ( new_n7022_, new_n2999_ ) -new_n7024_ = NAND ( new_n7023_, new_n7009_, new_n7008_ ) -new_n7025_ = NAND ( new_n7024_, new_n3006_ ) -new_n7026_ = OR ( new_n6626_, new_n3008_ ) -new_n7027_ = OR ( new_n7022_, new_n3016_ ) -new_n7028_ = NAND ( new_n6602_, new_n3012_ ) -new_n7029_ = OR ( new_n3005_, new_n3382_ ) -new_n7030_ = AND ( new_n7029_, new_n7028_, new_n6659_ ) -NET_12430 = NAND ( new_n7030_, new_n7027_, new_n7026_, new_n7025_ ) -new_n7032_ = OR ( new_n6626_, new_n3037_ ) -new_n7033_ = OR ( new_n6642_, new_n3041_ ) -new_n7034_ = OR ( new_n6604_, new_n3045_ ) -new_n7035_ = NOR ( new_n6238_, new_n2967_ ) -new_n7036_ = NOR ( new_n6854_, new_n2368_ ) -new_n7037_ = NOR ( new_n7036_, new_n7035_ ) -new_n7038_ = NAND ( new_n7037_, new_n7034_, new_n7033_, new_n7032_ ) -new_n7039_ = NAND ( new_n7038_, new_n3051_ ) -new_n7040_ = NAND ( new_n3053_, NET_352 ) -NET_12431 = NAND ( new_n7040_, new_n7039_ ) -new_n7042_ = NAND ( new_n7038_, new_n3057_ ) -new_n7043_ = OR ( new_n3057_, new_n6292_ ) -NET_12432 = NAND ( new_n7043_, new_n7042_ ) -new_n7045_ = NOR ( new_n6928_, new_n6923_ ) -new_n7046_ = NOT ( NET_489 ) -new_n7047_ = OR ( new_n7046_, NET_244 ) -new_n7048_ = NOT ( NET_244 ) -new_n7049_ = OR ( NET_489, new_n7048_ ) -new_n7050_ = AND ( new_n7049_, new_n7047_ ) -new_n7051_ = OR ( new_n7050_, new_n7045_, new_n6925_ ) -new_n7052_ = NOT ( new_n6923_ ) -new_n7053_ = OR ( new_n6927_, new_n6925_, new_n6328_ ) -new_n7054_ = NAND ( new_n7053_, new_n7049_, new_n7047_, new_n7052_ ) -new_n7055_ = NAND ( new_n7054_, new_n7051_, new_n1530_ ) -new_n7056_ = OR ( new_n1530_, NET_1 ) -new_n7057_ = NAND ( new_n7056_, new_n7055_ ) -new_n7058_ = OR ( new_n7057_, NET_765 ) -new_n7059_ = OR ( new_n2583_, NET_35979, new_n2461_, NET_553 ) -NET_12450 = NAND ( new_n7059_, new_n7058_ ) -new_n7061_ = NOR ( new_n6932_, new_n2735_ ) -new_n7062_ = NAND ( new_n7061_, new_n3240_ ) -new_n7063_ = NAND ( new_n3197_, NET_617 ) -new_n7064_ = NOT ( NET_735 ) -new_n7065_ = NAND ( new_n2762_, new_n7064_ ) -new_n7066_ = NAND ( new_n7065_, new_n2732_ ) -new_n7067_ = NAND ( new_n7066_, new_n2747_ ) -new_n7068_ = NOT ( NET_752 ) -new_n7069_ = NOT ( NET_761 ) -new_n7070_ = NOT ( NET_744 ) -new_n7071_ = NOT ( NET_749 ) -new_n7072_ = NOT ( NET_762 ) -new_n7073_ = OR ( new_n6713_, NET_753 ) -new_n7074_ = NOR ( new_n7073_, NET_743 ) -new_n7075_ = NAND ( new_n7074_, new_n7072_ ) -new_n7076_ = OR ( new_n7075_, NET_736 ) -new_n7077_ = NOR ( new_n7076_, NET_751 ) -new_n7078_ = NAND ( new_n7077_, new_n7071_ ) -new_n7079_ = OR ( new_n7078_, NET_739 ) -new_n7080_ = NOR ( new_n7079_, NET_758 ) -new_n7081_ = NAND ( new_n7080_, new_n7070_ ) -new_n7082_ = OR ( new_n7081_, NET_754 ) -new_n7083_ = NOR ( new_n7082_, NET_742 ) -new_n7084_ = NAND ( new_n7083_, new_n7069_ ) -new_n7085_ = NOR ( new_n7084_, NET_748 ) -new_n7086_ = NAND ( new_n7085_, new_n7068_ ) -new_n7087_ = OR ( new_n7086_, NET_737 ) -new_n7088_ = OR ( new_n7087_, NET_763 ) -new_n7089_ = NOR ( new_n7088_, NET_757 ) -new_n7090_ = NAND ( new_n7089_, new_n2587_ ) -new_n7091_ = NAND ( new_n2596_, new_n2591_, NET_682 ) -new_n7092_ = NAND ( new_n2603_, new_n2601_, NET_650 ) -new_n7093_ = NAND ( new_n2609_, new_n2607_, NET_618 ) -new_n7094_ = AND ( new_n7093_, new_n7092_, new_n7091_, new_n7090_ ) -new_n7095_ = NOR ( new_n7094_, new_n7067_ ) -new_n7096_ = NAND ( new_n7095_, new_n3198_ ) -NET_12451 = NAND ( new_n7096_, new_n7063_, new_n7062_ ) -new_n7098_ = NAND ( new_n7061_, new_n3266_ ) -new_n7099_ = NAND ( new_n3262_, NET_649 ) -new_n7100_ = NAND ( new_n7095_, new_n3263_ ) -NET_12452 = NAND ( new_n7100_, new_n7099_, new_n7098_ ) -new_n7102_ = NAND ( new_n7061_, new_n2744_ ) -new_n7103_ = NAND ( new_n2713_, NET_681 ) -new_n7104_ = NAND ( new_n7095_, new_n2714_ ) -new_n7105_ = NAND ( new_n7089_, new_n2758_ ) -new_n7106_ = AND ( new_n7105_, new_n7104_ ) -NET_12453 = NAND ( new_n7106_, new_n7103_, new_n7102_ ) -new_n7108_ = OR ( new_n6800_, new_n2778_ ) -new_n7109_ = NAND ( new_n6783_, new_n4082_ ) -new_n7110_ = NAND ( new_n6966_, new_n6960_ ) -new_n7111_ = NAND ( new_n7110_, new_n6959_ ) -new_n7112_ = OR ( new_n1914_, new_n6511_ ) -new_n7113_ = NAND ( new_n1914_, NET_172 ) -new_n7114_ = NAND ( new_n7113_, new_n7112_ ) -new_n7115_ = XOR ( new_n7114_, new_n6783_ ) -new_n7116_ = OR ( new_n7115_, new_n7111_ ) -new_n7117_ = NAND ( new_n7114_, new_n6783_ ) -new_n7118_ = OR ( new_n7114_, new_n6783_ ) -new_n7119_ = NAND ( new_n7118_, new_n7117_, new_n7111_ ) -new_n7120_ = NAND ( new_n7119_, new_n7116_ ) -new_n7121_ = OR ( new_n7120_, new_n2789_ ) -new_n7122_ = NAND ( new_n7121_, new_n7109_, new_n7108_ ) -new_n7123_ = AND ( new_n7122_, new_n2796_ ) -new_n7124_ = OR ( new_n7120_, new_n2804_ ) -new_n7125_ = NAND ( new_n6783_, new_n2798_ ) -new_n7126_ = OR ( new_n2795_, new_n3544_ ) -new_n7127_ = NAND ( new_n7126_, new_n7125_, new_n7124_, new_n6841_ ) -NET_12533 = OR ( new_n7127_, new_n7123_ ) -new_n7129_ = NOR ( new_n6800_, new_n2873_ ) -new_n7130_ = NOT ( new_n6809_ ) -new_n7131_ = NAND ( new_n7130_, new_n2878_ ) -new_n7132_ = NAND ( new_n6785_, new_n2881_ ) -new_n7133_ = NAND ( new_n6161_, new_n3644_ ) -new_n7134_ = NAND ( new_n6826_, new_n1992_ ) -new_n7135_ = NAND ( new_n7134_, new_n7133_, new_n7132_, new_n7131_ ) -new_n7136_ = NOR ( new_n7135_, new_n7129_ ) -new_n7137_ = OR ( new_n7136_, new_n2891_ ) -new_n7138_ = NAND ( new_n2891_, NET_108 ) -NET_12534 = NAND ( new_n7138_, new_n7137_ ) -new_n7140_ = OR ( new_n7136_, new_n2900_ ) -new_n7141_ = NAND ( new_n2900_, NET_140 ) -NET_12535 = NAND ( new_n7141_, new_n7140_ ) -new_n7143_ = OR ( new_n6887_, new_n2983_ ) -new_n7144_ = OR ( new_n6865_, new_n2987_ ) -new_n7145_ = NAND ( new_n7020_, new_n7014_ ) -new_n7146_ = OR ( new_n2991_, new_n6650_ ) -new_n7147_ = OR ( new_n2287_, new_n6648_ ) -new_n7148_ = NAND ( new_n7147_, new_n7146_ ) -new_n7149_ = NAND ( new_n7148_, new_n6865_ ) -new_n7150_ = OR ( new_n7148_, new_n6865_ ) -new_n7151_ = NAND ( new_n7150_, new_n7149_, new_n7145_, new_n7013_ ) -new_n7152_ = NAND ( new_n7145_, new_n7013_ ) -new_n7153_ = NAND ( new_n7148_, new_n6864_ ) -new_n7154_ = OR ( new_n7148_, new_n6864_ ) -new_n7155_ = NAND ( new_n7154_, new_n7153_, new_n7152_ ) -new_n7156_ = NAND ( new_n7155_, new_n7151_ ) -new_n7157_ = OR ( new_n7156_, new_n2999_ ) -new_n7158_ = NAND ( new_n7157_, new_n7144_, new_n7143_ ) -new_n7159_ = NAND ( new_n7158_, new_n3006_ ) -new_n7160_ = OR ( new_n6887_, new_n3008_ ) -new_n7161_ = OR ( new_n7156_, new_n3016_ ) -new_n7162_ = NAND ( new_n6864_, new_n3012_ ) -new_n7163_ = OR ( new_n3005_, new_n3542_ ) -new_n7164_ = AND ( new_n7163_, new_n7162_, new_n6919_ ) -NET_12548 = NAND ( new_n7164_, new_n7161_, new_n7160_, new_n7159_ ) -new_n7166_ = NOR ( new_n6887_, new_n3037_ ) -new_n7167_ = OR ( new_n6898_, new_n3041_ ) -new_n7168_ = OR ( new_n6867_, new_n3045_ ) -new_n7169_ = NAND ( new_n6294_, new_n2966_ ) -new_n7170_ = NAND ( new_n6912_, new_n2367_ ) -new_n7171_ = NAND ( new_n7170_, new_n7169_, new_n7168_, new_n7167_ ) -new_n7172_ = NOR ( new_n7171_, new_n7166_ ) -new_n7173_ = OR ( new_n7172_, new_n3053_ ) -new_n7174_ = NAND ( new_n3053_, NET_353 ) -NET_12549 = NAND ( new_n7174_, new_n7173_ ) -new_n7176_ = OR ( new_n7172_, new_n3707_ ) -new_n7177_ = OR ( new_n3057_, new_n6650_ ) -NET_12550 = NAND ( new_n7177_, new_n7176_ ) -new_n7179_ = NOR ( new_n3124_, new_n3122_ ) -new_n7180_ = XOR ( new_n7179_, new_n3120_ ) -new_n7181_ = NAND ( new_n7180_, new_n1530_ ) -new_n7182_ = OR ( new_n1530_, new_n1662_ ) -new_n7183_ = NAND ( new_n7182_, new_n7181_ ) -new_n7184_ = OR ( new_n7183_, new_n2735_ ) -new_n7185_ = NOR ( NET_554, NET_535 ) -new_n7186_ = NOT ( NET_535 ) -new_n7187_ = XOR ( new_n2443_, new_n7186_ ) -new_n7188_ = AND ( new_n7187_, NET_554 ) -new_n7189_ = NOR ( new_n7188_, new_n7185_ ) -new_n7190_ = OR ( new_n7189_, new_n2543_ ) -new_n7191_ = NAND ( new_n7190_, new_n7184_ ) -new_n7192_ = OR ( new_n7191_, new_n2524_ ) -new_n7193_ = NAND ( new_n6720_, new_n2579_ ) -new_n7194_ = NOT ( new_n7189_ ) -new_n7195_ = OR ( new_n7194_, new_n2613_ ) -new_n7196_ = NAND ( new_n7195_, new_n7193_, new_n7192_ ) -new_n7197_ = XOR ( new_n7196_, new_n2618_ ) -new_n7198_ = NAND ( new_n6720_, new_n2620_ ) -new_n7199_ = OR ( new_n7191_, new_n2578_ ) -new_n7200_ = OR ( new_n2624_, new_n6716_ ) -new_n7201_ = OR ( new_n2626_, new_n6718_ ) -new_n7202_ = NAND ( new_n7201_, new_n7200_, new_n7199_, new_n7198_ ) -new_n7203_ = OR ( new_n7202_, new_n7197_ ) -new_n7204_ = NAND ( new_n7202_, new_n7197_ ) -new_n7205_ = NAND ( new_n7204_, new_n7203_ ) -new_n7206_ = NAND ( new_n6703_, new_n6699_ ) -new_n7207_ = NAND ( new_n7206_, new_n6700_ ) -new_n7208_ = XOR ( new_n7207_, new_n7205_ ) -new_n7209_ = NOR ( new_n7208_, new_n3202_ ) -new_n7210_ = OR ( new_n7194_, new_n2732_ ) -new_n7211_ = NAND ( new_n7183_, new_n2543_ ) -new_n7212_ = NAND ( new_n7211_, new_n7210_ ) -new_n7213_ = NAND ( new_n7212_, new_n3240_ ) -new_n7214_ = NAND ( new_n3197_, NET_599 ) -new_n7215_ = NAND ( new_n2609_, new_n2607_, NET_600 ) -new_n7216_ = NOT ( NET_743 ) -new_n7217_ = XOR ( new_n7073_, new_n7216_ ) -new_n7218_ = NAND ( new_n7217_, new_n2587_ ) -new_n7219_ = NOT ( NET_664 ) -new_n7220_ = OR ( new_n2597_, new_n7219_ ) -new_n7221_ = NOT ( NET_632 ) -new_n7222_ = OR ( new_n2604_, new_n7221_ ) -new_n7223_ = NAND ( new_n7222_, new_n7220_, new_n7218_, new_n7215_ ) -new_n7224_ = NAND ( new_n7223_, new_n3243_ ) -new_n7225_ = NAND ( new_n6391_, new_n3253_ ) -new_n7226_ = NAND ( new_n7225_, new_n7224_, new_n7214_, new_n7213_ ) -NET_12564 = OR ( new_n7226_, new_n7209_ ) -new_n7228_ = NOR ( new_n7057_, new_n2735_ ) -new_n7229_ = NAND ( new_n7228_, new_n3240_ ) -new_n7230_ = NAND ( new_n3197_, NET_618 ) -NET_12565 = NAND ( new_n7230_, new_n7229_, new_n7096_ ) -new_n7232_ = NOR ( new_n7208_, new_n3264_ ) -new_n7233_ = NAND ( new_n7212_, new_n3266_ ) -new_n7234_ = NAND ( new_n3262_, NET_631 ) -new_n7235_ = NAND ( new_n7223_, new_n3269_ ) -new_n7236_ = NAND ( new_n6391_, new_n3271_ ) -new_n7237_ = NAND ( new_n7236_, new_n7235_, new_n7234_, new_n7233_ ) -NET_12566 = OR ( new_n7237_, new_n7232_ ) -new_n7239_ = NAND ( new_n7228_, new_n3266_ ) -new_n7240_ = NAND ( new_n3262_, NET_650 ) -NET_12567 = NAND ( new_n7240_, new_n7239_, new_n7100_ ) -new_n7242_ = OR ( new_n7208_, new_n3767_ ) -new_n7243_ = NAND ( new_n2713_, NET_663 ) -new_n7244_ = NAND ( new_n7223_, new_n2765_ ) -new_n7245_ = NAND ( new_n7212_, new_n2744_ ) -new_n7246_ = NAND ( new_n6391_, new_n2756_ ) -new_n7247_ = NAND ( new_n6714_, new_n2758_ ) -new_n7248_ = AND ( new_n7247_, new_n7246_, new_n7245_ ) -NET_12568 = NAND ( new_n7248_, new_n7244_, new_n7243_, new_n7242_ ) -new_n7250_ = NAND ( new_n7228_, new_n2744_ ) -new_n7251_ = NAND ( new_n2713_, NET_682 ) -NET_12569 = NAND ( new_n7251_, new_n7250_, new_n7106_ ) -new_n7253_ = NOR ( new_n7208_, new_n3276_ ) -new_n7254_ = OR ( new_n3283_, new_n6716_ ) -new_n7255_ = NAND ( new_n3287_, NET_631 ) -new_n7256_ = NAND ( new_n7255_, new_n7254_ ) -new_n7257_ = NAND ( new_n7256_, new_n7194_ ) -new_n7258_ = OR ( new_n7256_, new_n7194_ ) -new_n7259_ = NAND ( new_n7258_, new_n7257_ ) -new_n7260_ = NAND ( new_n6748_, new_n6745_ ) -new_n7261_ = NAND ( new_n7260_, new_n6744_ ) -new_n7262_ = NAND ( new_n7261_, new_n7259_ ) -new_n7263_ = OR ( new_n7261_, new_n7259_ ) -new_n7264_ = NAND ( new_n7263_, new_n7262_, new_n3316_ ) -new_n7265_ = NAND ( new_n7189_, new_n3323_ ) -new_n7266_ = OR ( new_n3314_, new_n3553_ ) -new_n7267_ = OR ( NET_765, new_n6711_ ) -new_n7268_ = NAND ( new_n7267_, new_n7266_, new_n7265_, new_n7264_ ) -NET_12570 = OR ( new_n7268_, new_n7253_ ) -new_n7270_ = OR ( new_n7208_, new_n3339_ ) -new_n7271_ = NAND ( new_n6714_, new_n3350_ ) -new_n7272_ = NAND ( new_n7223_, new_n3352_ ) -new_n7273_ = NAND ( new_n6714_, new_n3193_ ) -new_n7274_ = NAND ( new_n6391_, new_n3355_ ) -new_n7275_ = NAND ( new_n7274_, new_n7273_, new_n7272_ ) -new_n7276_ = NAND ( new_n7275_, new_n3359_ ) -new_n7277_ = NAND ( new_n7212_, new_n3361_ ) -new_n7278_ = OR ( new_n7191_, new_n3364_ ) -new_n7279_ = AND ( new_n7278_, new_n7277_, new_n7267_ ) -NET_12571 = NAND ( new_n7279_, new_n7276_, new_n7271_, new_n7270_ ) -new_n7281_ = NAND ( new_n6826_, new_n1870_ ) -new_n7282_ = NAND ( new_n1669_, new_n1667_ ) -new_n7283_ = XNOR ( new_n7282_, new_n1661_ ) -new_n7284_ = OR ( new_n7283_, new_n1531_ ) -new_n7285_ = OR ( new_n1530_, NET_470 ) -new_n7286_ = NAND ( new_n7285_, new_n7284_ ) -new_n7287_ = NAND ( new_n7286_, new_n1921_ ) -new_n7288_ = NOT ( NET_45 ) -new_n7289_ = NOR ( NET_64, new_n7288_ ) -new_n7290_ = XOR ( new_n1703_, new_n7288_ ) -new_n7291_ = NOR ( new_n7290_, new_n1694_ ) -new_n7292_ = OR ( new_n7291_, new_n7289_ ) -new_n7293_ = OR ( new_n7292_, new_n1921_ ) -new_n7294_ = NAND ( new_n7293_, new_n7287_ ) -new_n7295_ = NOT ( new_n7294_ ) -new_n7296_ = NAND ( new_n7295_, new_n1942_ ) -new_n7297_ = NAND ( new_n7292_, new_n1953_ ) -new_n7298_ = NAND ( new_n7297_, new_n7296_, new_n7281_ ) -new_n7299_ = XOR ( new_n7298_, new_n1844_ ) -new_n7300_ = NAND ( new_n6826_, new_n1960_ ) -new_n7301_ = NAND ( new_n7295_, new_n1870_ ) -new_n7302_ = OR ( new_n1951_, new_n6824_ ) -new_n7303_ = OR ( new_n1952_, new_n6822_ ) -new_n7304_ = NAND ( new_n7303_, new_n7302_, new_n7301_, new_n7300_ ) -new_n7305_ = OR ( new_n7304_, new_n7299_ ) -new_n7306_ = NAND ( new_n7304_, new_n7299_ ) -new_n7307_ = NAND ( new_n7306_, new_n7305_ ) -new_n7308_ = NAND ( new_n6799_, new_n6795_ ) -new_n7309_ = NAND ( new_n7308_, new_n6796_ ) -new_n7310_ = XOR ( new_n7309_, new_n7307_ ) -new_n7311_ = NOR ( new_n7310_, new_n1840_ ) -new_n7312_ = NAND ( new_n6826_, new_n1976_ ) -new_n7313_ = AND ( new_n7295_, new_n1978_ ) -new_n7314_ = OR ( new_n7313_, new_n7312_ ) -new_n7315_ = NAND ( new_n7313_, new_n7312_ ) -new_n7316_ = NAND ( new_n7315_, new_n7314_ ) -new_n7317_ = NAND ( new_n6808_, new_n6804_ ) -new_n7318_ = NAND ( new_n7317_, new_n6805_ ) -new_n7319_ = XNOR ( new_n7318_, new_n7316_ ) -new_n7320_ = OR ( new_n7319_, new_n1975_ ) -new_n7321_ = NAND ( new_n6513_, new_n3867_ ) -new_n7322_ = NAND ( new_n1838_, NET_173 ) -new_n7323_ = NAND ( new_n6820_, new_n2005_ ) -new_n7324_ = AND ( new_n7323_, new_n7322_, new_n7321_ ) -new_n7325_ = NAND ( new_n1901_, new_n1898_, NET_110 ) -new_n7326_ = NOT ( NET_253 ) -new_n7327_ = XOR ( new_n6819_, new_n7326_ ) -new_n7328_ = NAND ( new_n7327_, new_n1878_ ) -new_n7329_ = NOT ( NET_174 ) -new_n7330_ = OR ( new_n1887_, new_n7329_ ) -new_n7331_ = NOT ( NET_142 ) -new_n7332_ = OR ( new_n1895_, new_n7331_ ) -new_n7333_ = NAND ( new_n7332_, new_n7330_, new_n7328_, new_n7325_ ) -new_n7334_ = NAND ( new_n7333_, new_n1994_ ) -new_n7335_ = OR ( new_n7294_, new_n1989_ ) -new_n7336_ = NAND ( new_n7335_, new_n7334_, new_n7324_, new_n7320_ ) -NET_12623 = OR ( new_n7336_, new_n7311_ ) -new_n7338_ = NOR ( new_n7310_, new_n2016_ ) -new_n7339_ = NOR ( new_n7319_, new_n2020_ ) -new_n7340_ = NAND ( new_n6820_, new_n2853_ ) -new_n7341_ = NAND ( new_n7333_, new_n2043_ ) -new_n7342_ = NAND ( new_n6820_, new_n2009_ ) -new_n7343_ = NAND ( new_n6513_, new_n2864_ ) -new_n7344_ = NAND ( new_n7343_, new_n7342_, new_n7341_ ) -new_n7345_ = NAND ( new_n7344_, new_n2042_ ) -new_n7346_ = OR ( new_n7294_, new_n2039_ ) -new_n7347_ = OR ( NET_275, new_n6816_ ) -new_n7348_ = NAND ( new_n7347_, new_n7346_, new_n7345_, new_n7340_ ) -NET_12624 = OR ( new_n7348_, new_n7339_, new_n7338_ ) -new_n7350_ = NAND ( new_n6912_, new_n2274_ ) -new_n7351_ = NAND ( new_n1530_, new_n3121_ ) -new_n7352_ = OR ( new_n7283_, new_n1530_ ) -new_n7353_ = NAND ( new_n7352_, new_n7351_ ) -new_n7354_ = NAND ( new_n7353_, new_n2290_ ) -new_n7355_ = NOR ( NET_309, NET_290 ) -new_n7356_ = NOT ( NET_290 ) -new_n7357_ = XOR ( new_n2074_, new_n7356_ ) -new_n7358_ = AND ( new_n7357_, NET_309 ) -new_n7359_ = NOR ( new_n7358_, new_n7355_ ) -new_n7360_ = NOT ( new_n7359_ ) -new_n7361_ = NAND ( new_n7360_, new_n2289_ ) -new_n7362_ = NAND ( new_n7361_, new_n7354_ ) -new_n7363_ = OR ( new_n7362_, new_n2309_ ) -new_n7364_ = NAND ( new_n7359_, new_n2325_ ) -new_n7365_ = OR ( new_n2328_, new_n6910_ ) -new_n7366_ = OR ( new_n2330_, new_n6908_ ) -new_n7367_ = AND ( new_n7366_, new_n7365_, new_n7364_ ) -new_n7368_ = NAND ( new_n7367_, new_n7363_, new_n7350_ ) -new_n7369_ = XOR ( new_n7368_, new_n2218_ ) -new_n7370_ = OR ( new_n7362_, new_n2273_ ) -new_n7371_ = NAND ( new_n6912_, new_n2336_ ) -new_n7372_ = OR ( new_n7360_, new_n2338_ ) -new_n7373_ = OR ( new_n2323_, new_n6910_ ) -new_n7374_ = OR ( new_n2324_, new_n6908_ ) -new_n7375_ = AND ( new_n7374_, new_n7373_, new_n7372_ ) -new_n7376_ = NAND ( new_n7375_, new_n7371_, new_n7370_ ) -new_n7377_ = OR ( new_n7376_, new_n7369_ ) -new_n7378_ = NAND ( new_n7376_, new_n7369_ ) -new_n7379_ = NAND ( new_n7378_, new_n7377_ ) -new_n7380_ = NAND ( new_n6886_, new_n6882_ ) -new_n7381_ = NAND ( new_n7380_, new_n6883_ ) -new_n7382_ = XOR ( new_n7381_, new_n7379_ ) -new_n7383_ = NOR ( new_n7382_, new_n2390_ ) -new_n7384_ = OR ( new_n7362_, new_n2349_ ) -new_n7385_ = NAND ( new_n6912_, new_n2349_ ) -new_n7386_ = NAND ( new_n7385_, new_n7384_ ) -new_n7387_ = XOR ( new_n7386_, new_n2349_ ) -new_n7388_ = OR ( new_n7362_, new_n2348_ ) -new_n7389_ = NAND ( new_n7388_, new_n7387_ ) -new_n7390_ = OR ( new_n7388_, new_n7387_ ) -new_n7391_ = NAND ( new_n7390_, new_n7389_ ) -new_n7392_ = NAND ( new_n6897_, new_n6894_ ) -new_n7393_ = NAND ( new_n7392_, new_n6895_ ) -new_n7394_ = XOR ( new_n7393_, new_n7391_ ) -new_n7395_ = NOR ( new_n7394_, new_n2393_ ) -new_n7396_ = NAND ( new_n6906_, new_n3025_ ) -new_n7397_ = NAND ( new_n2250_, new_n2248_, NET_355 ) -new_n7398_ = NOT ( NET_498 ) -new_n7399_ = XOR ( new_n6905_, new_n7398_ ) -new_n7400_ = NAND ( new_n7399_, new_n2228_ ) -new_n7401_ = NOT ( NET_419 ) -new_n7402_ = OR ( new_n2238_, new_n7401_ ) -new_n7403_ = NOT ( NET_387 ) -new_n7404_ = OR ( new_n2245_, new_n7403_ ) -new_n7405_ = NAND ( new_n7404_, new_n7402_, new_n7400_, new_n7397_ ) -new_n7406_ = NAND ( new_n7405_, new_n2416_ ) -new_n7407_ = NAND ( new_n6906_, new_n2384_ ) -new_n7408_ = NAND ( new_n6652_, new_n3029_ ) -new_n7409_ = NAND ( new_n7408_, new_n7407_, new_n7406_ ) -new_n7410_ = NAND ( new_n7409_, new_n2415_ ) -new_n7411_ = OR ( new_n7362_, new_n2412_ ) -new_n7412_ = OR ( NET_520, new_n6902_ ) -new_n7413_ = NAND ( new_n7412_, new_n7411_, new_n7410_, new_n7396_ ) -NET_12634 = OR ( new_n7413_, new_n7395_, new_n7383_ ) -new_n7415_ = NOT ( NET_5 ) -new_n7416_ = NAND ( new_n1530_, new_n5705_ ) -new_n7417_ = OR ( new_n1530_, NET_240 ) -new_n7418_ = NAND ( new_n7417_, new_n7416_ ) -new_n7419_ = NOR ( new_n7418_, new_n7415_ ) -new_n7420_ = NOT ( new_n7419_ ) -new_n7421_ = NAND ( new_n7418_, new_n7415_ ) -new_n7422_ = NAND ( new_n7421_, new_n7420_ ) -new_n7423_ = NOT ( NET_6 ) -new_n7424_ = NAND ( new_n6939_, new_n7423_ ) -new_n7425_ = NAND ( new_n7424_, new_n6945_ ) -new_n7426_ = OR ( new_n6939_, new_n7423_ ) -new_n7427_ = NAND ( new_n7426_, new_n7425_, new_n7422_ ) -new_n7428_ = NAND ( new_n7426_, new_n7425_ ) -new_n7429_ = NAND ( new_n7428_, new_n7421_ ) -new_n7430_ = OR ( new_n7429_, new_n7419_ ) -new_n7431_ = NAND ( new_n7430_, new_n7427_ ) -new_n7432_ = NAND ( new_n7431_, new_n1530_ ) -new_n7433_ = OR ( new_n1530_, NET_485 ) -new_n7434_ = NAND ( new_n7433_, new_n7432_ ) -new_n7435_ = OR ( new_n7434_, NET_275 ) -new_n7436_ = OR ( new_n1692_, new_n1910_ ) -new_n7437_ = OR ( new_n1912_, new_n1696_ ) -NET_12702 = NAND ( new_n7437_, new_n7436_, new_n7435_ ) -new_n7439_ = NAND ( new_n1530_, new_n5707_ ) -new_n7440_ = NAND ( new_n7431_, new_n1531_ ) -new_n7441_ = NAND ( new_n7440_, new_n7439_ ) -new_n7442_ = OR ( new_n7441_, NET_520 ) -new_n7443_ = NAND ( NET_520, new_n2056_, NET_305 ) -new_n7444_ = NAND ( new_n2285_, new_n2057_ ) -NET_12725 = NAND ( new_n7444_, new_n7443_, new_n7442_ ) -new_n7446_ = NOR ( new_n7382_, new_n2208_ ) -new_n7447_ = OR ( new_n7394_, new_n2362_ ) -new_n7448_ = NAND ( new_n6652_, new_n2968_ ) -new_n7449_ = NAND ( new_n2196_, NET_418 ) -new_n7450_ = NAND ( new_n6906_, new_n2380_ ) -new_n7451_ = AND ( new_n7450_, new_n7449_, new_n7448_ ) -new_n7452_ = NAND ( new_n7405_, new_n2369_ ) -new_n7453_ = OR ( new_n7362_, new_n2364_ ) -new_n7454_ = NAND ( new_n7453_, new_n7452_, new_n7451_, new_n7447_ ) -NET_12726 = OR ( new_n7454_, new_n7446_ ) -new_n7456_ = NOR ( new_n3129_, new_n3127_ ) -new_n7457_ = XOR ( new_n7456_, new_n3125_ ) -new_n7458_ = NAND ( new_n7457_, new_n1530_ ) -new_n7459_ = OR ( new_n1530_, new_n1671_ ) -new_n7460_ = NAND ( new_n7459_, new_n7458_ ) -new_n7461_ = OR ( new_n7460_, new_n2735_ ) -new_n7462_ = NOR ( NET_554, NET_536 ) -new_n7463_ = XOR ( new_n2444_, NET_536 ) -new_n7464_ = AND ( new_n7463_, NET_554 ) -new_n7465_ = NOR ( new_n7464_, new_n7462_ ) -new_n7466_ = OR ( new_n7465_, new_n2543_ ) -new_n7467_ = NAND ( new_n7466_, new_n7461_ ) -new_n7468_ = OR ( new_n7467_, new_n2524_ ) -new_n7469_ = NAND ( new_n7223_, new_n2579_ ) -new_n7470_ = NOT ( new_n7465_ ) -new_n7471_ = OR ( new_n7470_, new_n2613_ ) -new_n7472_ = NAND ( new_n7471_, new_n7469_, new_n7468_ ) -new_n7473_ = XOR ( new_n7472_, new_n2618_ ) -new_n7474_ = NAND ( new_n7223_, new_n2620_ ) -new_n7475_ = OR ( new_n7467_, new_n2578_ ) -new_n7476_ = OR ( new_n2624_, new_n7219_ ) -new_n7477_ = OR ( new_n2626_, new_n7221_ ) -new_n7478_ = NAND ( new_n7477_, new_n7476_, new_n7475_, new_n7474_ ) -new_n7479_ = OR ( new_n7478_, new_n7473_ ) -new_n7480_ = NAND ( new_n7478_, new_n7473_ ) -new_n7481_ = NAND ( new_n7480_, new_n7479_ ) -new_n7482_ = NAND ( new_n7207_, new_n7203_ ) -new_n7483_ = NAND ( new_n7482_, new_n7204_ ) -new_n7484_ = XOR ( new_n7483_, new_n7481_ ) -new_n7485_ = NOR ( new_n7484_, new_n3202_ ) -new_n7486_ = OR ( new_n7470_, new_n2732_ ) -new_n7487_ = NAND ( new_n7460_, new_n2543_ ) -new_n7488_ = NAND ( new_n7487_, new_n7486_ ) -new_n7489_ = NAND ( new_n7488_, new_n3240_ ) -new_n7490_ = NAND ( new_n3197_, NET_600 ) -new_n7491_ = NOT ( NET_601 ) -new_n7492_ = OR ( new_n4640_, new_n7491_ ) -new_n7493_ = XOR ( new_n7074_, NET_762 ) -new_n7494_ = NAND ( new_n7493_, new_n2587_ ) -new_n7495_ = NOT ( NET_665 ) -new_n7496_ = OR ( new_n2597_, new_n7495_ ) -new_n7497_ = NOT ( NET_633 ) -new_n7498_ = OR ( new_n2604_, new_n7497_ ) -new_n7499_ = NAND ( new_n7498_, new_n7496_, new_n7494_, new_n7492_ ) -new_n7500_ = NAND ( new_n7499_, new_n3243_ ) -new_n7501_ = NAND ( new_n6720_, new_n3253_ ) -new_n7502_ = NAND ( new_n7501_, new_n7500_, new_n7490_, new_n7489_ ) -NET_12750 = OR ( new_n7502_, new_n7485_ ) -new_n7504_ = NOR ( new_n7484_, new_n3264_ ) -new_n7505_ = NAND ( new_n7488_, new_n3266_ ) -new_n7506_ = NAND ( new_n3262_, NET_632 ) -new_n7507_ = NAND ( new_n7499_, new_n3269_ ) -new_n7508_ = NAND ( new_n6720_, new_n3271_ ) -new_n7509_ = NAND ( new_n7508_, new_n7507_, new_n7506_, new_n7505_ ) -NET_12751 = OR ( new_n7509_, new_n7504_ ) -new_n7511_ = OR ( new_n7484_, new_n3767_ ) -new_n7512_ = NAND ( new_n2713_, NET_664 ) -new_n7513_ = NAND ( new_n7499_, new_n2765_ ) -new_n7514_ = NAND ( new_n7488_, new_n2744_ ) -new_n7515_ = NAND ( new_n6720_, new_n2756_ ) -new_n7516_ = NAND ( new_n7217_, new_n2758_ ) -new_n7517_ = AND ( new_n7516_, new_n7515_, new_n7514_ ) -NET_12752 = NAND ( new_n7517_, new_n7513_, new_n7512_, new_n7511_ ) -new_n7519_ = NOR ( new_n7484_, new_n3276_ ) -new_n7520_ = OR ( new_n3283_, new_n7219_ ) -new_n7521_ = NAND ( new_n3287_, NET_632 ) -new_n7522_ = NAND ( new_n7521_, new_n7520_ ) -new_n7523_ = NAND ( new_n7522_, new_n7470_ ) -new_n7524_ = OR ( new_n7522_, new_n7470_ ) -new_n7525_ = NAND ( new_n7524_, new_n7523_ ) -new_n7526_ = NAND ( new_n7261_, new_n7258_ ) -new_n7527_ = NAND ( new_n7526_, new_n7257_ ) -new_n7528_ = NAND ( new_n7527_, new_n7525_ ) -new_n7529_ = OR ( new_n7527_, new_n7525_ ) -new_n7530_ = NAND ( new_n7529_, new_n7528_, new_n3316_ ) -new_n7531_ = NAND ( new_n7465_, new_n3323_ ) -new_n7532_ = OR ( new_n3314_, new_n3560_ ) -new_n7533_ = OR ( NET_765, new_n7216_ ) -new_n7534_ = NAND ( new_n7533_, new_n7532_, new_n7531_, new_n7530_ ) -NET_12753 = OR ( new_n7534_, new_n7519_ ) -new_n7536_ = OR ( new_n7484_, new_n3339_ ) -new_n7537_ = NAND ( new_n7217_, new_n3350_ ) -new_n7538_ = NAND ( new_n7499_, new_n3352_ ) -new_n7539_ = NAND ( new_n7217_, new_n3193_ ) -new_n7540_ = NAND ( new_n6720_, new_n3355_ ) -new_n7541_ = NAND ( new_n7540_, new_n7539_, new_n7538_ ) -new_n7542_ = NAND ( new_n7541_, new_n3359_ ) -new_n7543_ = NAND ( new_n7488_, new_n3361_ ) -new_n7544_ = OR ( new_n7467_, new_n3364_ ) -new_n7545_ = AND ( new_n7544_, new_n7543_, new_n7533_ ) -NET_12754 = NAND ( new_n7545_, new_n7542_, new_n7537_, new_n7536_ ) -new_n7547_ = NAND ( new_n1678_, new_n1676_ ) -new_n7548_ = XNOR ( new_n7547_, new_n1670_ ) -new_n7549_ = OR ( new_n7548_, new_n1531_ ) -new_n7550_ = OR ( new_n1530_, NET_471 ) -new_n7551_ = NAND ( new_n7550_, new_n7549_ ) -new_n7552_ = NAND ( new_n7551_, new_n1921_ ) -new_n7553_ = NOR ( NET_64, NET_46 ) -new_n7554_ = NOR ( new_n1703_, NET_45 ) -new_n7555_ = XOR ( new_n7554_, NET_46 ) -new_n7556_ = AND ( new_n7555_, NET_64 ) -new_n7557_ = NOR ( new_n7556_, new_n7553_ ) -new_n7558_ = OR ( new_n7557_, new_n1921_ ) -new_n7559_ = NAND ( new_n7558_, new_n7552_ ) -new_n7560_ = NOT ( new_n7559_ ) -new_n7561_ = NAND ( new_n7560_, new_n1942_ ) -new_n7562_ = NAND ( new_n7333_, new_n1870_ ) -new_n7563_ = NAND ( new_n7557_, new_n1953_ ) -new_n7564_ = NAND ( new_n7563_, new_n7562_, new_n7561_ ) -new_n7565_ = XOR ( new_n7564_, new_n1844_ ) -new_n7566_ = NAND ( new_n7333_, new_n1960_ ) -new_n7567_ = NAND ( new_n7560_, new_n1870_ ) -new_n7568_ = OR ( new_n1951_, new_n7331_ ) -new_n7569_ = OR ( new_n1952_, new_n7329_ ) -new_n7570_ = NAND ( new_n7569_, new_n7568_, new_n7567_, new_n7566_ ) -new_n7571_ = OR ( new_n7570_, new_n7565_ ) -new_n7572_ = NAND ( new_n7570_, new_n7565_ ) -new_n7573_ = NAND ( new_n7572_, new_n7571_ ) -new_n7574_ = NAND ( new_n7309_, new_n7305_ ) -new_n7575_ = NAND ( new_n7574_, new_n7306_ ) -new_n7576_ = XOR ( new_n7575_, new_n7573_ ) -new_n7577_ = OR ( new_n7576_, new_n1840_ ) -new_n7578_ = NAND ( new_n7333_, new_n1976_ ) -new_n7579_ = AND ( new_n7560_, new_n1978_ ) -new_n7580_ = OR ( new_n7579_, new_n7578_ ) -new_n7581_ = NAND ( new_n7579_, new_n7578_ ) -new_n7582_ = NAND ( new_n7581_, new_n7580_ ) -new_n7583_ = NAND ( new_n7318_, new_n7314_ ) -new_n7584_ = NAND ( new_n7583_, new_n7315_ ) -new_n7585_ = XNOR ( new_n7584_, new_n7582_ ) -new_n7586_ = OR ( new_n7585_, new_n1975_ ) -new_n7587_ = OR ( new_n7559_, new_n1989_ ) -new_n7588_ = NAND ( new_n1901_, new_n1898_, NET_111 ) -new_n7589_ = NOT ( NET_272 ) -new_n7590_ = OR ( new_n6817_, new_n6816_, new_n7326_ ) -new_n7591_ = NAND ( new_n7590_, new_n7589_ ) -new_n7592_ = OR ( new_n7590_, new_n7589_ ) -new_n7593_ = AND ( new_n7592_, new_n7591_ ) -new_n7594_ = NAND ( new_n7593_, new_n1878_ ) -new_n7595_ = NOT ( NET_175 ) -new_n7596_ = OR ( new_n1887_, new_n7595_ ) -new_n7597_ = NOT ( NET_143 ) -new_n7598_ = OR ( new_n1895_, new_n7597_ ) -new_n7599_ = NAND ( new_n7598_, new_n7596_, new_n7594_, new_n7588_ ) -new_n7600_ = NAND ( new_n7599_, new_n1994_ ) -new_n7601_ = NAND ( new_n6826_, new_n3867_ ) -new_n7602_ = NAND ( new_n1838_, NET_174 ) -new_n7603_ = NAND ( new_n7327_, new_n2005_ ) -new_n7604_ = AND ( new_n7603_, new_n7602_, new_n7601_, new_n7600_ ) -NET_12799 = NAND ( new_n7604_, new_n7587_, new_n7586_, new_n7577_ ) -new_n7606_ = OR ( new_n7310_, new_n2778_ ) -new_n7607_ = NAND ( new_n7292_, new_n4082_ ) -new_n7608_ = OR ( new_n1914_, new_n6824_ ) -new_n7609_ = NAND ( new_n1914_, NET_173 ) -new_n7610_ = NAND ( new_n7609_, new_n7608_ ) -new_n7611_ = XNOR ( new_n7610_, new_n7292_ ) -new_n7612_ = NAND ( new_n7118_, new_n7111_ ) -new_n7613_ = NAND ( new_n7612_, new_n7117_ ) -new_n7614_ = XOR ( new_n7613_, new_n7611_ ) -new_n7615_ = OR ( new_n7614_, new_n2789_ ) -new_n7616_ = NAND ( new_n7615_, new_n7607_, new_n7606_ ) -new_n7617_ = AND ( new_n7616_, new_n2796_ ) -new_n7618_ = OR ( new_n7614_, new_n2804_ ) -new_n7619_ = NAND ( new_n7292_, new_n2798_ ) -new_n7620_ = NAND ( new_n2794_, new_n1947_, NET_275, NET_200 ) -new_n7621_ = NAND ( new_n7620_, new_n7619_, new_n7618_, new_n7347_ ) -NET_12800 = OR ( new_n7621_, new_n7617_ ) -new_n7623_ = NOR ( new_n7576_, new_n2016_ ) -new_n7624_ = NOR ( new_n7585_, new_n2020_ ) -new_n7625_ = NAND ( new_n7327_, new_n2853_ ) -new_n7626_ = OR ( new_n7559_, new_n2039_ ) -new_n7627_ = NAND ( new_n7599_, new_n2043_ ) -new_n7628_ = NAND ( new_n7327_, new_n2009_ ) -new_n7629_ = NAND ( new_n6826_, new_n2864_ ) -new_n7630_ = NAND ( new_n7629_, new_n7628_, new_n7627_ ) -new_n7631_ = NAND ( new_n7630_, new_n2042_ ) -new_n7632_ = OR ( NET_275, new_n7326_ ) -new_n7633_ = NAND ( new_n7632_, new_n7631_, new_n7626_, new_n7625_ ) -NET_12801 = OR ( new_n7633_, new_n7624_, new_n7623_ ) -new_n7635_ = NOR ( new_n7310_, new_n2873_ ) -new_n7636_ = NOT ( new_n7319_ ) -new_n7637_ = NAND ( new_n7636_, new_n2878_ ) -new_n7638_ = OR ( new_n7294_, new_n4269_ ) -new_n7639_ = NAND ( new_n6513_, new_n3644_ ) -new_n7640_ = NAND ( new_n7333_, new_n1992_ ) -new_n7641_ = NAND ( new_n7640_, new_n7639_, new_n7638_, new_n7637_ ) -new_n7642_ = NOR ( new_n7641_, new_n7635_ ) -new_n7643_ = OR ( new_n7642_, new_n2891_ ) -new_n7644_ = NAND ( new_n2891_, NET_109 ) -NET_12803 = NAND ( new_n7644_, new_n7643_ ) -new_n7646_ = OR ( new_n7642_, new_n2900_ ) -new_n7647_ = NAND ( new_n2900_, NET_141 ) -NET_12804 = NAND ( new_n7647_, new_n7646_ ) -new_n7649_ = OR ( new_n7382_, new_n2983_ ) -new_n7650_ = OR ( new_n7360_, new_n2987_ ) -new_n7651_ = OR ( new_n2991_, new_n6910_ ) -new_n7652_ = OR ( new_n2287_, new_n6908_ ) -new_n7653_ = NAND ( new_n7652_, new_n7651_ ) -new_n7654_ = XOR ( new_n7653_, new_n7360_ ) -new_n7655_ = NAND ( new_n7154_, new_n7152_ ) -new_n7656_ = NAND ( new_n7655_, new_n7153_ ) -new_n7657_ = XOR ( new_n7656_, new_n7654_ ) -new_n7658_ = OR ( new_n7657_, new_n2999_ ) -new_n7659_ = NAND ( new_n7658_, new_n7650_, new_n7649_ ) -new_n7660_ = NAND ( new_n7659_, new_n3006_ ) -new_n7661_ = OR ( new_n7382_, new_n3008_ ) -new_n7662_ = OR ( new_n7657_, new_n3016_ ) -new_n7663_ = NAND ( new_n7359_, new_n3012_ ) -new_n7664_ = NAND ( new_n3004_, new_n2405_, NET_520, NET_445 ) -new_n7665_ = AND ( new_n7664_, new_n7663_, new_n7412_ ) -NET_12819 = NAND ( new_n7665_, new_n7662_, new_n7661_, new_n7660_ ) -new_n7667_ = NOT ( new_n7405_ ) -new_n7668_ = OR ( new_n7667_, new_n2273_ ) -new_n7669_ = NAND ( new_n1530_, new_n3126_ ) -new_n7670_ = OR ( new_n7548_, new_n1530_ ) -new_n7671_ = NAND ( new_n7670_, new_n7669_ ) -new_n7672_ = NAND ( new_n7671_, new_n2290_ ) -new_n7673_ = NOR ( NET_309, NET_291 ) -new_n7674_ = XOR ( new_n2075_, NET_291 ) -new_n7675_ = AND ( new_n7674_, NET_309 ) -new_n7676_ = NOR ( new_n7675_, new_n7673_ ) -new_n7677_ = NOT ( new_n7676_ ) -new_n7678_ = NAND ( new_n7677_, new_n2289_ ) -new_n7679_ = NAND ( new_n7678_, new_n7672_ ) -new_n7680_ = OR ( new_n7679_, new_n2309_ ) -new_n7681_ = NAND ( new_n7676_, new_n2325_ ) -new_n7682_ = OR ( new_n2328_, new_n7403_ ) -new_n7683_ = OR ( new_n2330_, new_n7401_ ) -new_n7684_ = AND ( new_n7683_, new_n7682_, new_n7681_ ) -new_n7685_ = NAND ( new_n7684_, new_n7680_, new_n7668_ ) -new_n7686_ = XOR ( new_n7685_, new_n2218_ ) -new_n7687_ = OR ( new_n7679_, new_n2273_ ) -new_n7688_ = NAND ( new_n7405_, new_n2336_ ) -new_n7689_ = OR ( new_n7677_, new_n2338_ ) -new_n7690_ = OR ( new_n2323_, new_n7403_ ) -new_n7691_ = OR ( new_n2324_, new_n7401_ ) -new_n7692_ = AND ( new_n7691_, new_n7690_, new_n7689_ ) -new_n7693_ = NAND ( new_n7692_, new_n7688_, new_n7687_ ) -new_n7694_ = OR ( new_n7693_, new_n7686_ ) -new_n7695_ = NAND ( new_n7693_, new_n7686_ ) -new_n7696_ = NAND ( new_n7695_, new_n7694_ ) -new_n7697_ = NAND ( new_n7381_, new_n7377_ ) -new_n7698_ = NAND ( new_n7697_, new_n7378_ ) -new_n7699_ = XOR ( new_n7698_, new_n7696_ ) -new_n7700_ = NOR ( new_n7699_, new_n2390_ ) -new_n7701_ = OR ( new_n7679_, new_n2349_ ) -new_n7702_ = NAND ( new_n7405_, new_n2349_ ) -new_n7703_ = NAND ( new_n7702_, new_n7701_ ) -new_n7704_ = XOR ( new_n7703_, new_n2349_ ) -new_n7705_ = OR ( new_n7679_, new_n2348_ ) -new_n7706_ = NAND ( new_n7705_, new_n7704_ ) -new_n7707_ = OR ( new_n7705_, new_n7704_ ) -new_n7708_ = NAND ( new_n7707_, new_n7706_ ) -new_n7709_ = NAND ( new_n7393_, new_n7389_ ) -new_n7710_ = NAND ( new_n7709_, new_n7390_ ) -new_n7711_ = XOR ( new_n7710_, new_n7708_ ) -new_n7712_ = NOR ( new_n7711_, new_n2393_ ) -new_n7713_ = NAND ( new_n7399_, new_n3025_ ) -new_n7714_ = OR ( new_n7679_, new_n2412_ ) -new_n7715_ = NAND ( new_n2250_, new_n2248_, NET_356 ) -new_n7716_ = NOT ( NET_517 ) -new_n7717_ = OR ( new_n6903_, new_n6902_, new_n7398_ ) -new_n7718_ = NAND ( new_n7717_, new_n7716_ ) -new_n7719_ = OR ( new_n7717_, new_n7716_ ) -new_n7720_ = AND ( new_n7719_, new_n7718_ ) -new_n7721_ = NAND ( new_n7720_, new_n2228_ ) -new_n7722_ = NOT ( NET_420 ) -new_n7723_ = OR ( new_n2238_, new_n7722_ ) -new_n7724_ = NOT ( NET_388 ) -new_n7725_ = OR ( new_n2245_, new_n7724_ ) -new_n7726_ = NAND ( new_n7725_, new_n7723_, new_n7721_, new_n7715_ ) -new_n7727_ = NAND ( new_n7726_, new_n2416_ ) -new_n7728_ = NAND ( new_n7399_, new_n2384_ ) -new_n7729_ = NAND ( new_n6912_, new_n3029_ ) -new_n7730_ = NAND ( new_n7729_, new_n7728_, new_n7727_ ) -new_n7731_ = NAND ( new_n7730_, new_n2415_ ) -new_n7732_ = OR ( NET_520, new_n7398_ ) -new_n7733_ = NAND ( new_n7732_, new_n7731_, new_n7714_, new_n7713_ ) -NET_12820 = OR ( new_n7733_, new_n7712_, new_n7700_ ) -new_n7735_ = NOR ( new_n7382_, new_n3037_ ) -new_n7736_ = OR ( new_n7394_, new_n3041_ ) -new_n7737_ = OR ( new_n7362_, new_n3045_ ) -new_n7738_ = NAND ( new_n6652_, new_n2966_ ) -new_n7739_ = NAND ( new_n7405_, new_n2367_ ) -new_n7740_ = NAND ( new_n7739_, new_n7738_, new_n7737_, new_n7736_ ) -new_n7741_ = NOR ( new_n7740_, new_n7735_ ) -new_n7742_ = OR ( new_n7741_, new_n3053_ ) -new_n7743_ = NAND ( new_n3053_, NET_354 ) -NET_12822 = NAND ( new_n7743_, new_n7742_ ) -new_n7745_ = OR ( new_n7741_, new_n3707_ ) -new_n7746_ = OR ( new_n3057_, new_n6910_ ) -NET_12823 = NAND ( new_n7746_, new_n7745_ ) -new_n7748_ = NAND ( new_n1530_, new_n5984_ ) -new_n7749_ = OR ( new_n1530_, NET_241 ) -new_n7750_ = NAND ( new_n7749_, new_n7748_ ) -new_n7751_ = XOR ( new_n7750_, NET_4 ) -new_n7752_ = NAND ( new_n7429_, new_n7420_ ) -new_n7753_ = XNOR ( new_n7752_, new_n7751_ ) -new_n7754_ = OR ( new_n7753_, new_n1531_ ) -new_n7755_ = OR ( new_n1530_, NET_486 ) -new_n7756_ = NAND ( new_n7755_, new_n7754_ ) -new_n7757_ = OR ( new_n7756_, NET_275 ) -new_n7758_ = OR ( new_n1692_, new_n1916_ ) -new_n7759_ = OR ( new_n1918_, new_n1696_ ) -NET_12876 = NAND ( new_n7759_, new_n7758_, new_n7757_ ) -new_n7761_ = NAND ( new_n1530_, new_n5986_ ) -new_n7762_ = OR ( new_n7753_, new_n1530_ ) -new_n7763_ = NAND ( new_n7762_, new_n7761_ ) -new_n7764_ = OR ( new_n7763_, NET_520 ) -new_n7765_ = OR ( new_n2054_, new_n2221_ ) -new_n7766_ = NAND ( new_n2281_, new_n2057_ ) -NET_12894 = NAND ( new_n7766_, new_n7765_, new_n7764_ ) -new_n7768_ = OR ( new_n7699_, new_n2208_ ) -new_n7769_ = OR ( new_n7711_, new_n2362_ ) -new_n7770_ = OR ( new_n7679_, new_n2364_ ) -new_n7771_ = NAND ( new_n7726_, new_n2369_ ) -new_n7772_ = NAND ( new_n6912_, new_n2968_ ) -new_n7773_ = NAND ( new_n2196_, NET_419 ) -new_n7774_ = NAND ( new_n7399_, new_n2380_ ) -new_n7775_ = AND ( new_n7774_, new_n7773_, new_n7772_, new_n7771_ ) -NET_12895 = NAND ( new_n7775_, new_n7770_, new_n7769_, new_n7768_ ) -new_n7777_ = OR ( new_n7576_, new_n2778_ ) -new_n7778_ = NAND ( new_n7557_, new_n4082_ ) -new_n7779_ = OR ( new_n1914_, new_n7331_ ) -new_n7780_ = NAND ( new_n1914_, NET_174 ) -new_n7781_ = NAND ( new_n7780_, new_n7779_ ) -new_n7782_ = XNOR ( new_n7781_, new_n7557_ ) -new_n7783_ = OR ( new_n7610_, new_n7292_ ) -new_n7784_ = NAND ( new_n7783_, new_n7613_ ) -new_n7785_ = NAND ( new_n7610_, new_n7292_ ) -new_n7786_ = NAND ( new_n7785_, new_n7784_ ) -new_n7787_ = XOR ( new_n7786_, new_n7782_ ) -new_n7788_ = OR ( new_n7787_, new_n2789_ ) -new_n7789_ = NAND ( new_n7788_, new_n7778_, new_n7777_ ) -new_n7790_ = AND ( new_n7789_, new_n2796_ ) -new_n7791_ = OR ( new_n7787_, new_n2804_ ) -new_n7792_ = NAND ( new_n7557_, new_n2798_ ) -new_n7793_ = NAND ( new_n2794_, new_n1947_, NET_275, NET_199 ) -new_n7794_ = NAND ( new_n7793_, new_n7792_, new_n7791_, new_n7632_ ) -NET_12960 = OR ( new_n7794_, new_n7790_ ) -new_n7796_ = NOR ( new_n7576_, new_n2873_ ) -new_n7797_ = NOT ( new_n7585_ ) -new_n7798_ = NAND ( new_n7797_, new_n2878_ ) -new_n7799_ = OR ( new_n7559_, new_n4269_ ) -new_n7800_ = NAND ( new_n6826_, new_n3644_ ) -new_n7801_ = NAND ( new_n7599_, new_n1992_ ) -new_n7802_ = NAND ( new_n7801_, new_n7800_, new_n7799_, new_n7798_ ) -new_n7803_ = NOR ( new_n7802_, new_n7796_ ) -new_n7804_ = OR ( new_n7803_, new_n2891_ ) -new_n7805_ = NAND ( new_n2891_, NET_110 ) -NET_12962 = NAND ( new_n7805_, new_n7804_ ) -new_n7807_ = OR ( new_n7803_, new_n2900_ ) -new_n7808_ = NAND ( new_n2900_, NET_142 ) -NET_12963 = NAND ( new_n7808_, new_n7807_ ) -new_n7810_ = OR ( new_n7699_, new_n2983_ ) -new_n7811_ = OR ( new_n7677_, new_n2987_ ) -new_n7812_ = OR ( new_n2991_, new_n7403_ ) -new_n7813_ = OR ( new_n2287_, new_n7401_ ) -new_n7814_ = NAND ( new_n7813_, new_n7812_ ) -new_n7815_ = XOR ( new_n7814_, new_n7677_ ) -new_n7816_ = OR ( new_n7653_, new_n7359_ ) -new_n7817_ = NAND ( new_n7816_, new_n7656_ ) -new_n7818_ = NAND ( new_n7653_, new_n7359_ ) -new_n7819_ = NAND ( new_n7818_, new_n7817_ ) -new_n7820_ = XOR ( new_n7819_, new_n7815_ ) -new_n7821_ = OR ( new_n7820_, new_n2999_ ) -new_n7822_ = NAND ( new_n7821_, new_n7811_, new_n7810_ ) -new_n7823_ = NAND ( new_n7822_, new_n3006_ ) -new_n7824_ = OR ( new_n7699_, new_n3008_ ) -new_n7825_ = OR ( new_n7820_, new_n3016_ ) -new_n7826_ = NAND ( new_n7676_, new_n3012_ ) -new_n7827_ = NAND ( new_n3004_, new_n2405_, NET_520, NET_444 ) -new_n7828_ = AND ( new_n7827_, new_n7826_, new_n7732_ ) -NET_12979 = NAND ( new_n7828_, new_n7825_, new_n7824_, new_n7823_ ) -new_n7830_ = NOR ( new_n7699_, new_n3037_ ) -new_n7831_ = OR ( new_n7711_, new_n3041_ ) -new_n7832_ = OR ( new_n7679_, new_n3045_ ) -new_n7833_ = NAND ( new_n6912_, new_n2966_ ) -new_n7834_ = NAND ( new_n7726_, new_n2367_ ) -new_n7835_ = NAND ( new_n7834_, new_n7833_, new_n7832_, new_n7831_ ) -new_n7836_ = NOR ( new_n7835_, new_n7830_ ) -new_n7837_ = OR ( new_n7836_, new_n3053_ ) -new_n7838_ = NAND ( new_n3053_, NET_355 ) -NET_12982 = NAND ( new_n7838_, new_n7837_ ) -new_n7840_ = OR ( new_n7836_, new_n3707_ ) -new_n7841_ = OR ( new_n3057_, new_n7403_ ) -NET_12983 = NAND ( new_n7841_, new_n7840_ ) -new_n7843_ = NOR ( new_n3134_, new_n3132_ ) -new_n7844_ = XOR ( new_n7843_, new_n3130_ ) -new_n7845_ = NAND ( new_n7844_, new_n1530_ ) -new_n7846_ = OR ( new_n1530_, new_n1547_ ) -new_n7847_ = NAND ( new_n7846_, new_n7845_ ) -new_n7848_ = OR ( new_n7847_, new_n2735_ ) -new_n7849_ = OR ( NET_554, new_n2429_ ) -new_n7850_ = NAND ( new_n2444_, new_n2428_ ) -new_n7851_ = NAND ( new_n7850_, NET_537 ) -new_n7852_ = NAND ( new_n7851_, new_n2445_ ) -new_n7853_ = OR ( new_n7852_, new_n2461_ ) -new_n7854_ = NAND ( new_n7853_, new_n7849_ ) -new_n7855_ = OR ( new_n7854_, new_n2543_ ) -new_n7856_ = NAND ( new_n7855_, new_n7848_ ) -new_n7857_ = OR ( new_n7856_, new_n2524_ ) -new_n7858_ = NAND ( new_n7499_, new_n2579_ ) -new_n7859_ = NOT ( new_n7854_ ) -new_n7860_ = OR ( new_n7859_, new_n2613_ ) -new_n7861_ = NAND ( new_n7860_, new_n7858_, new_n7857_ ) -new_n7862_ = XOR ( new_n7861_, new_n2618_ ) -new_n7863_ = NAND ( new_n7499_, new_n2620_ ) -new_n7864_ = OR ( new_n7856_, new_n2578_ ) -new_n7865_ = OR ( new_n2624_, new_n7495_ ) -new_n7866_ = OR ( new_n2626_, new_n7497_ ) -new_n7867_ = NAND ( new_n7866_, new_n7865_, new_n7864_, new_n7863_ ) -new_n7868_ = OR ( new_n7867_, new_n7862_ ) -new_n7869_ = NAND ( new_n7867_, new_n7862_ ) -new_n7870_ = NAND ( new_n7869_, new_n7868_ ) -new_n7871_ = NAND ( new_n7483_, new_n7479_ ) -new_n7872_ = NAND ( new_n7871_, new_n7870_, new_n7480_ ) -new_n7873_ = NAND ( new_n7871_, new_n7480_ ) -new_n7874_ = NAND ( new_n7873_, new_n7869_, new_n7868_ ) -new_n7875_ = NAND ( new_n7874_, new_n7872_ ) -new_n7876_ = OR ( new_n7875_, new_n3202_ ) -new_n7877_ = OR ( new_n7859_, new_n2732_ ) -new_n7878_ = NAND ( new_n7847_, new_n2543_ ) -new_n7879_ = NAND ( new_n7878_, new_n7877_ ) -new_n7880_ = NOT ( new_n7879_ ) -new_n7881_ = NOR ( new_n7880_, new_n4987_ ) -new_n7882_ = NOR ( new_n3198_, new_n7491_ ) -new_n7883_ = NOR ( new_n7882_, new_n7881_ ) -new_n7884_ = NAND ( new_n2609_, new_n2607_, NET_602 ) -new_n7885_ = NOT ( NET_736 ) -new_n7886_ = XOR ( new_n7075_, new_n7885_ ) -new_n7887_ = NAND ( new_n7886_, new_n2587_ ) -new_n7888_ = NOT ( NET_666 ) -new_n7889_ = OR ( new_n2597_, new_n7888_ ) -new_n7890_ = NOT ( NET_634 ) -new_n7891_ = OR ( new_n2604_, new_n7890_ ) -new_n7892_ = NAND ( new_n7891_, new_n7889_, new_n7887_, new_n7884_ ) -new_n7893_ = NAND ( new_n7892_, new_n3243_ ) -new_n7894_ = NAND ( new_n7223_, new_n3253_ ) -NET_12998 = NAND ( new_n7894_, new_n7893_, new_n7883_, new_n7876_ ) -new_n7896_ = OR ( new_n7875_, new_n3264_ ) -new_n7897_ = NOR ( new_n7880_, new_n5008_ ) -new_n7898_ = NOR ( new_n3263_, new_n7497_ ) -new_n7899_ = NOR ( new_n7898_, new_n7897_ ) -new_n7900_ = NAND ( new_n7892_, new_n3269_ ) -new_n7901_ = NAND ( new_n7223_, new_n3271_ ) -NET_12999 = NAND ( new_n7901_, new_n7900_, new_n7899_, new_n7896_ ) -new_n7903_ = OR ( new_n7875_, new_n3767_ ) -new_n7904_ = NAND ( new_n2713_, NET_665 ) -new_n7905_ = NAND ( new_n7892_, new_n2765_ ) -new_n7906_ = NAND ( new_n7879_, new_n2744_ ) -new_n7907_ = NAND ( new_n7223_, new_n2756_ ) -new_n7908_ = NAND ( new_n7493_, new_n2758_ ) -new_n7909_ = AND ( new_n7908_, new_n7907_, new_n7906_ ) -NET_13000 = NAND ( new_n7909_, new_n7905_, new_n7904_, new_n7903_ ) -new_n7911_ = OR ( new_n7875_, new_n3276_ ) -new_n7912_ = OR ( new_n3283_, new_n7495_ ) -new_n7913_ = NAND ( new_n3287_, NET_633 ) -new_n7914_ = NAND ( new_n7913_, new_n7912_ ) -new_n7915_ = NAND ( new_n7914_, new_n7859_ ) -new_n7916_ = OR ( new_n7914_, new_n7859_ ) -new_n7917_ = NAND ( new_n7916_, new_n7915_ ) -new_n7918_ = NAND ( new_n7527_, new_n7524_ ) -new_n7919_ = NAND ( new_n7918_, new_n7523_ ) -new_n7920_ = NAND ( new_n7919_, new_n7917_ ) -new_n7921_ = OR ( new_n7919_, new_n7917_ ) -new_n7922_ = NAND ( new_n7921_, new_n7920_, new_n3316_ ) -new_n7923_ = NAND ( new_n7854_, new_n3323_ ) -new_n7924_ = NAND ( new_n3312_, new_n2613_, NET_765, NET_688 ) -new_n7925_ = OR ( NET_765, new_n7072_ ) -new_n7926_ = AND ( new_n7925_, new_n7924_, new_n7923_ ) -NET_13001 = NAND ( new_n7926_, new_n7922_, new_n7911_ ) -new_n7928_ = OR ( new_n7875_, new_n3339_ ) -new_n7929_ = NAND ( new_n7493_, new_n3350_ ) -new_n7930_ = NAND ( new_n7892_, new_n3352_ ) -new_n7931_ = NAND ( new_n7493_, new_n3193_ ) -new_n7932_ = NAND ( new_n7223_, new_n3355_ ) -new_n7933_ = NAND ( new_n7932_, new_n7931_, new_n7930_ ) -new_n7934_ = NAND ( new_n7933_, new_n3359_ ) -new_n7935_ = NAND ( new_n7879_, new_n3361_ ) -new_n7936_ = OR ( new_n7856_, new_n3364_ ) -new_n7937_ = AND ( new_n7936_, new_n7935_, new_n7925_ ) -NET_13002 = NAND ( new_n7937_, new_n7934_, new_n7929_, new_n7928_ ) -new_n7939_ = NOT ( NET_3 ) -new_n7940_ = NAND ( new_n1530_, new_n6327_ ) -new_n7941_ = OR ( new_n1530_, NET_242 ) -new_n7942_ = NAND ( new_n7941_, new_n7940_ ) -new_n7943_ = OR ( new_n7942_, new_n7939_ ) -new_n7944_ = NAND ( new_n7942_, new_n7939_ ) -new_n7945_ = NAND ( new_n7944_, new_n7943_ ) -new_n7946_ = NOT ( NET_4 ) -new_n7947_ = NOR ( new_n7750_, new_n7946_ ) -new_n7948_ = OR ( new_n7947_, new_n7752_ ) -new_n7949_ = NAND ( new_n7750_, new_n7946_ ) -new_n7950_ = NAND ( new_n7949_, new_n7948_ ) -new_n7951_ = XOR ( new_n7950_, new_n7945_ ) -new_n7952_ = OR ( new_n7951_, new_n1531_ ) -new_n7953_ = OR ( new_n1530_, NET_487 ) -new_n7954_ = NAND ( new_n7953_, new_n7952_ ) -new_n7955_ = OR ( new_n7954_, NET_275 ) -new_n7956_ = OR ( new_n1692_, new_n1890_ ) -new_n7957_ = OR ( new_n1883_, new_n1696_ ) -NET_13068 = NAND ( new_n7957_, new_n7956_, new_n7955_ ) -new_n7959_ = NAND ( new_n1554_, new_n1553_ ) -new_n7960_ = NAND ( new_n7959_, new_n1678_, new_n1677_ ) -new_n7961_ = OR ( new_n1680_, new_n1552_ ) -new_n7962_ = NAND ( new_n7961_, new_n7960_ ) -new_n7963_ = NAND ( new_n7962_, new_n1530_ ) -new_n7964_ = OR ( new_n1530_, NET_472 ) -new_n7965_ = NAND ( new_n7964_, new_n7963_ ) -new_n7966_ = NAND ( new_n7965_, new_n1921_ ) -new_n7967_ = NOT ( NET_47 ) -new_n7968_ = OR ( NET_64, new_n7967_ ) -new_n7969_ = NAND ( new_n1704_, new_n7554_ ) -new_n7970_ = NOT ( NET_46 ) -new_n7971_ = NAND ( new_n7554_, new_n7970_ ) -new_n7972_ = NAND ( new_n7971_, NET_47 ) -new_n7973_ = NAND ( new_n7972_, new_n7969_ ) -new_n7974_ = OR ( new_n7973_, new_n1694_ ) -new_n7975_ = NAND ( new_n7974_, new_n7968_ ) -new_n7976_ = OR ( new_n7975_, new_n1921_ ) -new_n7977_ = AND ( new_n7976_, new_n7966_ ) -new_n7978_ = NAND ( new_n7977_, new_n1942_ ) -new_n7979_ = NAND ( new_n7599_, new_n1870_ ) -new_n7980_ = NAND ( new_n7975_, new_n1953_ ) -new_n7981_ = NAND ( new_n7980_, new_n7979_, new_n7978_ ) -new_n7982_ = XOR ( new_n7981_, new_n1844_ ) -new_n7983_ = NAND ( new_n7977_, new_n1870_ ) -new_n7984_ = NAND ( new_n7599_, new_n1960_ ) -new_n7985_ = OR ( new_n1951_, new_n7597_ ) -new_n7986_ = OR ( new_n1952_, new_n7595_ ) -new_n7987_ = NAND ( new_n7986_, new_n7985_, new_n7984_, new_n7983_ ) -new_n7988_ = OR ( new_n7987_, new_n7982_ ) -new_n7989_ = NAND ( new_n7987_, new_n7982_ ) -new_n7990_ = NAND ( new_n7989_, new_n7988_ ) -new_n7991_ = NAND ( new_n7575_, new_n7571_ ) -new_n7992_ = NAND ( new_n7991_, new_n7990_, new_n7572_ ) -new_n7993_ = NAND ( new_n7991_, new_n7572_ ) -new_n7994_ = NAND ( new_n7993_, new_n7989_, new_n7988_ ) -new_n7995_ = NAND ( new_n7994_, new_n7992_ ) -new_n7996_ = OR ( new_n7995_, new_n1840_ ) -new_n7997_ = NAND ( new_n7599_, new_n1976_ ) -new_n7998_ = AND ( new_n7977_, new_n1978_ ) -new_n7999_ = OR ( new_n7998_, new_n7997_ ) -new_n8000_ = NAND ( new_n7998_, new_n7997_ ) -new_n8001_ = NAND ( new_n8000_, new_n7999_ ) -new_n8002_ = NAND ( new_n7584_, new_n7580_ ) -new_n8003_ = NAND ( new_n8002_, new_n7581_ ) -new_n8004_ = XNOR ( new_n8003_, new_n8001_ ) -new_n8005_ = OR ( new_n8004_, new_n1975_ ) -new_n8006_ = NAND ( new_n7977_, new_n6828_ ) -new_n8007_ = NAND ( new_n1901_, new_n1898_, NET_112 ) -new_n8008_ = NOT ( NET_246 ) -new_n8009_ = XOR ( new_n7592_, new_n8008_ ) -new_n8010_ = NAND ( new_n8009_, new_n1878_ ) -new_n8011_ = NOT ( NET_176 ) -new_n8012_ = OR ( new_n1887_, new_n8011_ ) -new_n8013_ = NOT ( NET_144 ) -new_n8014_ = OR ( new_n1895_, new_n8013_ ) -new_n8015_ = NAND ( new_n8014_, new_n8012_, new_n8010_, new_n8007_ ) -new_n8016_ = NAND ( new_n8015_, new_n1994_ ) -new_n8017_ = NAND ( new_n7333_, new_n3867_ ) -new_n8018_ = NAND ( new_n1838_, NET_175 ) -new_n8019_ = NAND ( new_n7593_, new_n2005_ ) -new_n8020_ = AND ( new_n8019_, new_n8018_, new_n8017_, new_n8016_ ) -NET_13069 = NAND ( new_n8020_, new_n8006_, new_n8005_, new_n7996_ ) -new_n8022_ = OR ( new_n7995_, new_n2016_ ) -new_n8023_ = OR ( new_n8004_, new_n2020_ ) -new_n8024_ = NAND ( new_n7977_, new_n6546_ ) -new_n8025_ = NAND ( new_n7593_, new_n2853_ ) -new_n8026_ = NAND ( new_n8015_, new_n2043_ ) -new_n8027_ = NAND ( new_n7593_, new_n2009_ ) -new_n8028_ = NAND ( new_n7333_, new_n2864_ ) -new_n8029_ = NAND ( new_n8028_, new_n8027_, new_n8026_ ) -new_n8030_ = NAND ( new_n8029_, new_n2042_ ) -new_n8031_ = OR ( NET_275, new_n7589_ ) -new_n8032_ = AND ( new_n8031_, new_n8030_, new_n8025_ ) -NET_13070 = NAND ( new_n8032_, new_n8024_, new_n8023_, new_n8022_ ) -new_n8034_ = NAND ( new_n1530_, new_n6329_ ) -new_n8035_ = OR ( new_n7951_, new_n1530_ ) -new_n8036_ = NAND ( new_n8035_, new_n8034_ ) -new_n8037_ = OR ( new_n8036_, NET_520 ) -new_n8038_ = OR ( new_n2054_, new_n2222_ ) -new_n8039_ = OR ( new_n2233_, new_n2058_ ) -NET_13091 = NAND ( new_n8039_, new_n8038_, new_n8037_ ) -new_n8041_ = NAND ( new_n1530_, new_n3131_ ) -new_n8042_ = NAND ( new_n7962_, new_n1531_ ) -new_n8043_ = NAND ( new_n8042_, new_n8041_ ) -new_n8044_ = NAND ( new_n8043_, new_n2290_ ) -new_n8045_ = OR ( NET_309, new_n2060_ ) -new_n8046_ = NAND ( new_n2075_, new_n2059_ ) -new_n8047_ = NAND ( new_n8046_, NET_292 ) -new_n8048_ = NAND ( new_n8047_, new_n2076_ ) -new_n8049_ = OR ( new_n8048_, new_n2056_ ) -new_n8050_ = NAND ( new_n8049_, new_n8045_ ) -new_n8051_ = OR ( new_n8050_, new_n2290_ ) -new_n8052_ = NAND ( new_n8051_, new_n8044_ ) -new_n8053_ = OR ( new_n8052_, new_n2309_ ) -new_n8054_ = NAND ( new_n7726_, new_n2274_ ) -new_n8055_ = NAND ( new_n8050_, new_n2325_ ) -new_n8056_ = OR ( new_n2328_, new_n7724_ ) -new_n8057_ = OR ( new_n2330_, new_n7722_ ) -new_n8058_ = AND ( new_n8057_, new_n8056_, new_n8055_ ) -new_n8059_ = NAND ( new_n8058_, new_n8054_, new_n8053_ ) -new_n8060_ = XOR ( new_n8059_, new_n2218_ ) -new_n8061_ = OR ( new_n8052_, new_n2273_ ) -new_n8062_ = NAND ( new_n7726_, new_n2336_ ) -new_n8063_ = NAND ( new_n8050_, new_n2339_ ) -new_n8064_ = OR ( new_n2323_, new_n7724_ ) -new_n8065_ = OR ( new_n2324_, new_n7722_ ) -new_n8066_ = AND ( new_n8065_, new_n8064_, new_n8063_ ) -new_n8067_ = NAND ( new_n8066_, new_n8062_, new_n8061_ ) -new_n8068_ = NAND ( new_n8067_, new_n8060_ ) -new_n8069_ = OR ( new_n8067_, new_n8060_ ) -new_n8070_ = NAND ( new_n7698_, new_n7694_ ) -new_n8071_ = NAND ( new_n8070_, new_n7695_ ) -new_n8072_ = NAND ( new_n8071_, new_n8069_, new_n8068_ ) -new_n8073_ = NAND ( new_n8069_, new_n8068_ ) -new_n8074_ = NAND ( new_n8073_, new_n8070_, new_n7695_ ) -new_n8075_ = NAND ( new_n8074_, new_n8072_ ) -new_n8076_ = OR ( new_n8075_, new_n2390_ ) -new_n8077_ = OR ( new_n8052_, new_n2349_ ) -new_n8078_ = NAND ( new_n7726_, new_n2349_ ) -new_n8079_ = NAND ( new_n8078_, new_n8077_ ) -new_n8080_ = XOR ( new_n8079_, new_n2349_ ) -new_n8081_ = OR ( new_n8052_, new_n2348_ ) -new_n8082_ = NAND ( new_n8081_, new_n8080_ ) -new_n8083_ = NOR ( new_n8081_, new_n8080_ ) -new_n8084_ = NOT ( new_n8083_ ) -new_n8085_ = NAND ( new_n8084_, new_n8082_ ) -new_n8086_ = NAND ( new_n7710_, new_n7706_ ) -new_n8087_ = NAND ( new_n8086_, new_n8085_, new_n7707_ ) -new_n8088_ = NAND ( new_n8086_, new_n7707_ ) -new_n8089_ = NAND ( new_n8088_, new_n8082_ ) -new_n8090_ = OR ( new_n8089_, new_n8083_ ) -new_n8091_ = NAND ( new_n8090_, new_n8087_ ) -new_n8092_ = OR ( new_n8091_, new_n2393_ ) -new_n8093_ = OR ( new_n8052_, new_n2412_ ) -new_n8094_ = NAND ( new_n7720_, new_n3025_ ) -new_n8095_ = NAND ( new_n2250_, new_n2248_, NET_357 ) -new_n8096_ = NOT ( NET_491 ) -new_n8097_ = XOR ( new_n7719_, new_n8096_ ) -new_n8098_ = NAND ( new_n8097_, new_n2228_ ) -new_n8099_ = NOT ( NET_421 ) -new_n8100_ = OR ( new_n2238_, new_n8099_ ) -new_n8101_ = NOT ( NET_389 ) -new_n8102_ = OR ( new_n2245_, new_n8101_ ) -new_n8103_ = NAND ( new_n8102_, new_n8100_, new_n8098_, new_n8095_ ) -new_n8104_ = NAND ( new_n8103_, new_n2416_ ) -new_n8105_ = NAND ( new_n7720_, new_n2384_ ) -new_n8106_ = NAND ( new_n7405_, new_n3029_ ) -new_n8107_ = NAND ( new_n8106_, new_n8105_, new_n8104_ ) -new_n8108_ = NAND ( new_n8107_, new_n2415_ ) -new_n8109_ = OR ( NET_520, new_n7716_ ) -new_n8110_ = AND ( new_n8109_, new_n8108_, new_n8094_ ) -NET_13092 = NAND ( new_n8110_, new_n8093_, new_n8092_, new_n8076_ ) -new_n8112_ = NOR ( new_n3139_, new_n3137_ ) -new_n8113_ = XOR ( new_n8112_, new_n3135_ ) -new_n8114_ = NAND ( new_n8113_, new_n1530_ ) -new_n8115_ = OR ( new_n1530_, new_n1540_ ) -new_n8116_ = NAND ( new_n8115_, new_n8114_ ) -new_n8117_ = OR ( new_n8116_, new_n2735_ ) -new_n8118_ = NOR ( NET_554, NET_538 ) -new_n8119_ = NOT ( NET_538 ) -new_n8120_ = XOR ( new_n2445_, new_n8119_ ) -new_n8121_ = AND ( new_n8120_, NET_554 ) -new_n8122_ = NOR ( new_n8121_, new_n8118_ ) -new_n8123_ = OR ( new_n8122_, new_n2543_ ) -new_n8124_ = NAND ( new_n8123_, new_n8117_ ) -new_n8125_ = OR ( new_n8124_, new_n2524_ ) -new_n8126_ = NOT ( new_n7892_ ) -new_n8127_ = OR ( new_n8126_, new_n2578_ ) -new_n8128_ = NOT ( new_n8122_ ) -new_n8129_ = OR ( new_n8128_, new_n2613_ ) -new_n8130_ = NAND ( new_n8129_, new_n8127_, new_n8125_ ) -new_n8131_ = XOR ( new_n8130_, new_n2618_ ) -new_n8132_ = NAND ( new_n7892_, new_n2620_ ) -new_n8133_ = OR ( new_n8124_, new_n2578_ ) -new_n8134_ = OR ( new_n2624_, new_n7888_ ) -new_n8135_ = OR ( new_n2626_, new_n7890_ ) -new_n8136_ = NAND ( new_n8135_, new_n8134_, new_n8133_, new_n8132_ ) -new_n8137_ = OR ( new_n8136_, new_n8131_ ) -new_n8138_ = NAND ( new_n8136_, new_n8131_ ) -new_n8139_ = NAND ( new_n8138_, new_n8137_ ) -new_n8140_ = NAND ( new_n7873_, new_n7868_ ) -new_n8141_ = NAND ( new_n8140_, new_n7869_ ) -new_n8142_ = XOR ( new_n8141_, new_n8139_ ) -new_n8143_ = NOR ( new_n8142_, new_n3202_ ) -new_n8144_ = OR ( new_n8128_, new_n2732_ ) -new_n8145_ = NAND ( new_n8116_, new_n2543_ ) -new_n8146_ = NAND ( new_n8145_, new_n8144_ ) -new_n8147_ = NAND ( new_n8146_, new_n3240_ ) -new_n8148_ = NAND ( new_n3197_, NET_602 ) -new_n8149_ = NAND ( new_n2609_, new_n2607_, NET_603 ) -new_n8150_ = NOT ( NET_751 ) -new_n8151_ = XOR ( new_n7076_, new_n8150_ ) -new_n8152_ = NAND ( new_n8151_, new_n2587_ ) -new_n8153_ = NOT ( NET_667 ) -new_n8154_ = OR ( new_n2597_, new_n8153_ ) -new_n8155_ = NOT ( NET_635 ) -new_n8156_ = OR ( new_n2604_, new_n8155_ ) -new_n8157_ = NAND ( new_n8156_, new_n8154_, new_n8152_, new_n8149_ ) -new_n8158_ = NAND ( new_n8157_, new_n3243_ ) -new_n8159_ = NAND ( new_n7499_, new_n3253_ ) -new_n8160_ = NAND ( new_n8159_, new_n8158_, new_n8148_, new_n8147_ ) -NET_13116 = OR ( new_n8160_, new_n8143_ ) -new_n8162_ = NOR ( new_n8142_, new_n3264_ ) -new_n8163_ = NAND ( new_n8146_, new_n3266_ ) -new_n8164_ = NAND ( new_n3262_, NET_634 ) -new_n8165_ = NAND ( new_n8157_, new_n3269_ ) -new_n8166_ = NAND ( new_n7499_, new_n3271_ ) -new_n8167_ = NAND ( new_n8166_, new_n8165_, new_n8164_, new_n8163_ ) -NET_13117 = OR ( new_n8167_, new_n8162_ ) -new_n8169_ = OR ( new_n8142_, new_n3767_ ) -new_n8170_ = NAND ( new_n2713_, NET_666 ) -new_n8171_ = NAND ( new_n8157_, new_n2765_ ) -new_n8172_ = NAND ( new_n8146_, new_n2744_ ) -new_n8173_ = NAND ( new_n7499_, new_n2756_ ) -new_n8174_ = NAND ( new_n7886_, new_n2758_ ) -new_n8175_ = AND ( new_n8174_, new_n8173_, new_n8172_ ) -NET_13118 = NAND ( new_n8175_, new_n8171_, new_n8170_, new_n8169_ ) -new_n8177_ = NOR ( new_n8142_, new_n3276_ ) -new_n8178_ = OR ( new_n3283_, new_n7888_ ) -new_n8179_ = NAND ( new_n3287_, NET_634 ) -new_n8180_ = NAND ( new_n8179_, new_n8178_ ) -new_n8181_ = NAND ( new_n8180_, new_n8128_ ) -new_n8182_ = OR ( new_n8180_, new_n8128_ ) -new_n8183_ = NAND ( new_n8182_, new_n8181_ ) -new_n8184_ = NAND ( new_n7919_, new_n7916_ ) -new_n8185_ = NAND ( new_n8184_, new_n7915_ ) -new_n8186_ = NAND ( new_n8185_, new_n8183_ ) -new_n8187_ = OR ( new_n8185_, new_n8183_ ) -new_n8188_ = NAND ( new_n8187_, new_n8186_, new_n3316_ ) -new_n8189_ = NAND ( new_n8122_, new_n3323_ ) -new_n8190_ = NAND ( new_n3312_, new_n2613_, NET_765, NET_687 ) -new_n8191_ = OR ( NET_765, new_n7885_ ) -new_n8192_ = NAND ( new_n8191_, new_n8190_, new_n8189_, new_n8188_ ) -NET_13119 = OR ( new_n8192_, new_n8177_ ) -new_n8194_ = NAND ( new_n1544_, NET_17 ) -new_n8195_ = OR ( new_n1544_, NET_17 ) -new_n8196_ = NAND ( new_n8195_, new_n8194_, new_n1681_ ) -new_n8197_ = OR ( new_n1683_, new_n1545_ ) -new_n8198_ = NAND ( new_n8197_, new_n8196_ ) -new_n8199_ = NAND ( new_n8198_, new_n1530_ ) -new_n8200_ = OR ( new_n1530_, NET_473 ) -new_n8201_ = NAND ( new_n8200_, new_n8199_ ) -new_n8202_ = NAND ( new_n8201_, new_n1921_ ) -new_n8203_ = NOT ( NET_48 ) -new_n8204_ = NOR ( NET_64, new_n8203_ ) -new_n8205_ = XOR ( new_n7969_, new_n8203_ ) -new_n8206_ = NOR ( new_n8205_, new_n1694_ ) -new_n8207_ = OR ( new_n8206_, new_n8204_ ) -new_n8208_ = OR ( new_n8207_, new_n1921_ ) -new_n8209_ = AND ( new_n8208_, new_n8202_ ) -new_n8210_ = NAND ( new_n8209_, new_n1942_ ) -new_n8211_ = NAND ( new_n8015_, new_n1870_ ) -new_n8212_ = NAND ( new_n8207_, new_n1953_ ) -new_n8213_ = NAND ( new_n8212_, new_n8211_, new_n8210_ ) -new_n8214_ = XOR ( new_n8213_, new_n1844_ ) -new_n8215_ = NAND ( new_n8209_, new_n1870_ ) -new_n8216_ = NAND ( new_n8015_, new_n1960_ ) -new_n8217_ = OR ( new_n1951_, new_n8013_ ) -new_n8218_ = OR ( new_n1952_, new_n8011_ ) -new_n8219_ = NAND ( new_n8218_, new_n8217_, new_n8216_, new_n8215_ ) -new_n8220_ = OR ( new_n8219_, new_n8214_ ) -new_n8221_ = NAND ( new_n8219_, new_n8214_ ) -new_n8222_ = NAND ( new_n8221_, new_n8220_ ) -new_n8223_ = NAND ( new_n7993_, new_n7988_ ) -new_n8224_ = NAND ( new_n8223_, new_n7989_ ) -new_n8225_ = XOR ( new_n8224_, new_n8222_ ) -new_n8226_ = OR ( new_n8225_, new_n1840_ ) -new_n8227_ = NAND ( new_n8015_, new_n1976_ ) -new_n8228_ = AND ( new_n8209_, new_n1978_ ) -new_n8229_ = OR ( new_n8228_, new_n8227_ ) -new_n8230_ = NAND ( new_n8228_, new_n8227_ ) -new_n8231_ = NAND ( new_n8230_, new_n8229_ ) -new_n8232_ = NAND ( new_n8003_, new_n7999_ ) -new_n8233_ = NAND ( new_n8232_, new_n8000_ ) -new_n8234_ = XNOR ( new_n8233_, new_n8231_ ) -new_n8235_ = OR ( new_n8234_, new_n1975_ ) -new_n8236_ = NAND ( new_n8209_, new_n6828_ ) -new_n8237_ = NAND ( new_n1901_, new_n1898_, NET_113 ) -new_n8238_ = NOR ( new_n7590_, new_n7589_, new_n8008_ ) -new_n8239_ = OR ( new_n8238_, NET_261 ) -new_n8240_ = NAND ( new_n8238_, NET_261 ) -new_n8241_ = AND ( new_n8240_, new_n8239_ ) -new_n8242_ = NAND ( new_n8241_, new_n1878_ ) -new_n8243_ = NOT ( NET_177 ) -new_n8244_ = OR ( new_n1887_, new_n8243_ ) -new_n8245_ = NOT ( NET_145 ) -new_n8246_ = OR ( new_n1895_, new_n8245_ ) -new_n8247_ = NAND ( new_n8246_, new_n8244_, new_n8242_, new_n8237_ ) -new_n8248_ = NAND ( new_n8247_, new_n1994_ ) -new_n8249_ = NAND ( new_n7599_, new_n3867_ ) -new_n8250_ = NAND ( new_n1838_, NET_176 ) -new_n8251_ = NAND ( new_n8009_, new_n2005_ ) -new_n8252_ = AND ( new_n8251_, new_n8250_, new_n8249_, new_n8248_ ) -NET_13196 = NAND ( new_n8252_, new_n8236_, new_n8235_, new_n8226_ ) -new_n8254_ = NOR ( new_n8225_, new_n2016_ ) -new_n8255_ = NOR ( new_n8234_, new_n2020_ ) -new_n8256_ = NAND ( new_n8209_, new_n6546_ ) -new_n8257_ = NAND ( new_n8009_, new_n2853_ ) -new_n8258_ = NAND ( new_n8247_, new_n2043_ ) -new_n8259_ = NAND ( new_n8009_, new_n2009_ ) -new_n8260_ = NAND ( new_n7599_, new_n2864_ ) -new_n8261_ = NAND ( new_n8260_, new_n8259_, new_n8258_ ) -new_n8262_ = NAND ( new_n8261_, new_n2042_ ) -new_n8263_ = OR ( NET_275, new_n8008_ ) -new_n8264_ = NAND ( new_n8263_, new_n8262_, new_n8257_, new_n8256_ ) -NET_13197 = OR ( new_n8264_, new_n8255_, new_n8254_ ) -new_n8266_ = OR ( new_n8075_, new_n2208_ ) -new_n8267_ = OR ( new_n8091_, new_n2362_ ) -new_n8268_ = OR ( new_n8052_, new_n2364_ ) -new_n8269_ = NAND ( new_n8103_, new_n2369_ ) -new_n8270_ = NAND ( new_n7405_, new_n2968_ ) -new_n8271_ = NAND ( new_n2196_, NET_420 ) -new_n8272_ = NAND ( new_n7720_, new_n2380_ ) -new_n8273_ = AND ( new_n8272_, new_n8271_, new_n8270_, new_n8269_ ) -NET_13214 = NAND ( new_n8273_, new_n8268_, new_n8267_, new_n8266_ ) -new_n8275_ = NAND ( new_n1530_, new_n3136_ ) -new_n8276_ = NAND ( new_n8198_, new_n1531_ ) -new_n8277_ = NAND ( new_n8276_, new_n8275_ ) -new_n8278_ = NAND ( new_n8277_, new_n2290_ ) -new_n8279_ = NOR ( NET_309, NET_293 ) -new_n8280_ = NOT ( NET_293 ) -new_n8281_ = XOR ( new_n2076_, new_n8280_ ) -new_n8282_ = AND ( new_n8281_, NET_309 ) -new_n8283_ = NOR ( new_n8282_, new_n8279_ ) -new_n8284_ = NOT ( new_n8283_ ) -new_n8285_ = NAND ( new_n8284_, new_n2289_ ) -new_n8286_ = NAND ( new_n8285_, new_n8278_ ) -new_n8287_ = OR ( new_n8286_, new_n2309_ ) -new_n8288_ = NOT ( new_n8103_ ) -new_n8289_ = OR ( new_n8288_, new_n2273_ ) -new_n8290_ = NAND ( new_n8283_, new_n2325_ ) -new_n8291_ = OR ( new_n2328_, new_n8101_ ) -new_n8292_ = OR ( new_n2330_, new_n8099_ ) -new_n8293_ = AND ( new_n8292_, new_n8291_, new_n8290_ ) -new_n8294_ = NAND ( new_n8293_, new_n8289_, new_n8287_ ) -new_n8295_ = XOR ( new_n8294_, new_n2218_ ) -new_n8296_ = OR ( new_n8286_, new_n2273_ ) -new_n8297_ = NAND ( new_n8103_, new_n2336_ ) -new_n8298_ = OR ( new_n8284_, new_n2338_ ) -new_n8299_ = OR ( new_n2323_, new_n8101_ ) -new_n8300_ = OR ( new_n2324_, new_n8099_ ) -new_n8301_ = AND ( new_n8300_, new_n8299_, new_n8298_ ) -new_n8302_ = NAND ( new_n8301_, new_n8297_, new_n8296_ ) -new_n8303_ = OR ( new_n8302_, new_n8295_ ) -new_n8304_ = NAND ( new_n8302_, new_n8295_ ) -new_n8305_ = NAND ( new_n8304_, new_n8303_ ) -new_n8306_ = NAND ( new_n8071_, new_n8069_ ) -new_n8307_ = NAND ( new_n8306_, new_n8068_ ) -new_n8308_ = XOR ( new_n8307_, new_n8305_ ) -new_n8309_ = NOR ( new_n8308_, new_n2390_ ) -new_n8310_ = OR ( new_n8286_, new_n2349_ ) -new_n8311_ = NAND ( new_n8103_, new_n2349_ ) -new_n8312_ = NAND ( new_n8311_, new_n8310_ ) -new_n8313_ = XOR ( new_n8312_, new_n2349_ ) -new_n8314_ = OR ( new_n8286_, new_n2348_ ) -new_n8315_ = NAND ( new_n8314_, new_n8313_ ) -new_n8316_ = OR ( new_n8314_, new_n8313_ ) -new_n8317_ = NAND ( new_n8316_, new_n8315_ ) -new_n8318_ = NAND ( new_n8089_, new_n8084_ ) -new_n8319_ = XOR ( new_n8318_, new_n8317_ ) -new_n8320_ = NOR ( new_n8319_, new_n2393_ ) -new_n8321_ = OR ( new_n8286_, new_n2412_ ) -new_n8322_ = NAND ( new_n8097_, new_n3025_ ) -new_n8323_ = NAND ( new_n2250_, new_n2248_, NET_358 ) -new_n8324_ = NOR ( new_n7717_, new_n7716_, new_n8096_ ) -new_n8325_ = OR ( new_n8324_, NET_506 ) -new_n8326_ = NAND ( new_n8324_, NET_506 ) -new_n8327_ = AND ( new_n8326_, new_n8325_ ) -new_n8328_ = NAND ( new_n8327_, new_n2228_ ) -new_n8329_ = NOT ( NET_422 ) -new_n8330_ = OR ( new_n2238_, new_n8329_ ) -new_n8331_ = NOT ( NET_390 ) -new_n8332_ = OR ( new_n2245_, new_n8331_ ) -new_n8333_ = NAND ( new_n8332_, new_n8330_, new_n8328_, new_n8323_ ) -new_n8334_ = NAND ( new_n8333_, new_n2416_ ) -new_n8335_ = NAND ( new_n8097_, new_n2384_ ) -new_n8336_ = NAND ( new_n7726_, new_n3029_ ) -new_n8337_ = NAND ( new_n8336_, new_n8335_, new_n8334_ ) -new_n8338_ = NAND ( new_n8337_, new_n2415_ ) -new_n8339_ = OR ( NET_520, new_n8096_ ) -new_n8340_ = NAND ( new_n8339_, new_n8338_, new_n8322_, new_n8321_ ) -NET_13215 = OR ( new_n8340_, new_n8320_, new_n8309_ ) -new_n8342_ = NOR ( new_n8142_, new_n3339_ ) -new_n8343_ = AND ( new_n7886_, new_n3350_ ) -new_n8344_ = NAND ( new_n8157_, new_n3352_ ) -new_n8345_ = NAND ( new_n7886_, new_n3193_ ) -new_n8346_ = NAND ( new_n7499_, new_n3355_ ) -new_n8347_ = NAND ( new_n8346_, new_n8345_, new_n8344_ ) -new_n8348_ = NAND ( new_n8347_, new_n3359_ ) -new_n8349_ = OR ( new_n8124_, new_n3364_ ) -new_n8350_ = NAND ( new_n8146_, new_n3361_ ) -new_n8351_ = NAND ( new_n8350_, new_n8349_, new_n8348_, new_n8191_ ) -NET_13224 = OR ( new_n8351_, new_n8343_, new_n8342_ ) -new_n8353_ = OR ( new_n7995_, new_n2778_ ) -new_n8354_ = NAND ( new_n7975_, new_n4082_ ) -new_n8355_ = OR ( new_n1914_, new_n7597_ ) -new_n8356_ = NAND ( new_n1914_, NET_175 ) -new_n8357_ = NAND ( new_n8356_, new_n8355_ ) -new_n8358_ = NAND ( new_n8357_, new_n7975_ ) -new_n8359_ = OR ( new_n8357_, new_n7975_ ) -new_n8360_ = OR ( new_n7781_, new_n7557_ ) -new_n8361_ = NAND ( new_n8360_, new_n7786_ ) -new_n8362_ = NAND ( new_n7781_, new_n7557_ ) -new_n8363_ = NAND ( new_n8362_, new_n8361_ ) -new_n8364_ = NAND ( new_n8363_, new_n8359_, new_n8358_ ) -new_n8365_ = NAND ( new_n8359_, new_n8358_ ) -new_n8366_ = NAND ( new_n8365_, new_n8362_, new_n8361_ ) -new_n8367_ = NAND ( new_n8366_, new_n8364_ ) -new_n8368_ = OR ( new_n8367_, new_n2789_ ) -new_n8369_ = NAND ( new_n8368_, new_n8354_, new_n8353_ ) -new_n8370_ = AND ( new_n8369_, new_n2796_ ) -new_n8371_ = OR ( new_n8367_, new_n2804_ ) -new_n8372_ = NAND ( new_n7975_, new_n2798_ ) -new_n8373_ = OR ( new_n2795_, new_n3375_ ) -new_n8374_ = NAND ( new_n8373_, new_n8372_, new_n8371_, new_n8031_ ) -NET_13282 = OR ( new_n8374_, new_n8370_ ) -new_n8376_ = OR ( new_n7995_, new_n2873_ ) -new_n8377_ = NOT ( new_n8004_ ) -new_n8378_ = NAND ( new_n8377_, new_n2878_ ) -new_n8379_ = NAND ( new_n7977_, new_n2881_ ) -new_n8380_ = NOT ( new_n7333_ ) -new_n8381_ = NOR ( new_n8380_, new_n3866_ ) -new_n8382_ = NOT ( new_n8015_ ) -new_n8383_ = NOR ( new_n8382_, new_n1993_ ) -new_n8384_ = NOR ( new_n8383_, new_n8381_ ) -new_n8385_ = NAND ( new_n8384_, new_n8379_, new_n8378_, new_n8376_ ) -new_n8386_ = NAND ( new_n8385_, new_n2892_ ) -new_n8387_ = NAND ( new_n2891_, NET_111 ) -NET_13284 = NAND ( new_n8387_, new_n8386_ ) -new_n8389_ = NAND ( new_n8385_, new_n2901_ ) -new_n8390_ = NAND ( new_n2900_, NET_143 ) -NET_13285 = NAND ( new_n8390_, new_n8389_ ) -new_n8392_ = OR ( new_n8308_, new_n2208_ ) -new_n8393_ = OR ( new_n8319_, new_n2362_ ) -new_n8394_ = OR ( new_n8286_, new_n2364_ ) -new_n8395_ = NAND ( new_n8333_, new_n2369_ ) -new_n8396_ = NAND ( new_n7726_, new_n2968_ ) -new_n8397_ = NAND ( new_n2196_, NET_421 ) -new_n8398_ = NAND ( new_n8097_, new_n2380_ ) -new_n8399_ = AND ( new_n8398_, new_n8397_, new_n8396_, new_n8395_ ) -NET_13302 = NAND ( new_n8399_, new_n8394_, new_n8393_, new_n8392_ ) -new_n8401_ = OR ( new_n8075_, new_n2983_ ) -new_n8402_ = NAND ( new_n8050_, new_n2988_ ) -new_n8403_ = OR ( new_n2991_, new_n7724_ ) -new_n8404_ = OR ( new_n2287_, new_n7722_ ) -new_n8405_ = NAND ( new_n8404_, new_n8403_ ) -new_n8406_ = NAND ( new_n8405_, new_n8050_ ) -new_n8407_ = OR ( new_n8405_, new_n8050_ ) -new_n8408_ = OR ( new_n7814_, new_n7676_ ) -new_n8409_ = NAND ( new_n8408_, new_n7819_ ) -new_n8410_ = NAND ( new_n7814_, new_n7676_ ) -new_n8411_ = NAND ( new_n8410_, new_n8409_ ) -new_n8412_ = NAND ( new_n8411_, new_n8407_, new_n8406_ ) -new_n8413_ = NAND ( new_n8407_, new_n8406_ ) -new_n8414_ = NAND ( new_n8413_, new_n8410_, new_n8409_ ) -new_n8415_ = NAND ( new_n8414_, new_n8412_ ) -new_n8416_ = OR ( new_n8415_, new_n2999_ ) -new_n8417_ = NAND ( new_n8416_, new_n8402_, new_n8401_ ) -new_n8418_ = NAND ( new_n8417_, new_n3006_ ) -new_n8419_ = OR ( new_n8075_, new_n3008_ ) -new_n8420_ = OR ( new_n8415_, new_n3016_ ) -new_n8421_ = NAND ( new_n8050_, new_n3012_ ) -new_n8422_ = OR ( new_n3005_, new_n3376_ ) -new_n8423_ = AND ( new_n8422_, new_n8421_, new_n8109_ ) -NET_13303 = NAND ( new_n8423_, new_n8420_, new_n8419_, new_n8418_ ) -new_n8425_ = OR ( new_n8075_, new_n3037_ ) -new_n8426_ = OR ( new_n8091_, new_n3041_ ) -new_n8427_ = OR ( new_n8052_, new_n3045_ ) -new_n8428_ = NOR ( new_n7667_, new_n2967_ ) -new_n8429_ = NOR ( new_n8288_, new_n2368_ ) -new_n8430_ = NOR ( new_n8429_, new_n8428_ ) -new_n8431_ = NAND ( new_n8430_, new_n8427_, new_n8426_, new_n8425_ ) -new_n8432_ = NAND ( new_n8431_, new_n3051_ ) -new_n8433_ = NAND ( new_n3053_, NET_356 ) -NET_13305 = NAND ( new_n8433_, new_n8432_ ) -new_n8435_ = NAND ( new_n8431_, new_n3057_ ) -new_n8436_ = OR ( new_n3057_, new_n7724_ ) -NET_13306 = NAND ( new_n8436_, new_n8435_ ) -new_n8438_ = NOR ( new_n3143_, new_n3141_ ) -new_n8439_ = XOR ( new_n8438_, new_n3140_ ) -new_n8440_ = NAND ( new_n8439_, new_n1530_ ) -new_n8441_ = OR ( new_n1530_, new_n1532_ ) -new_n8442_ = NAND ( new_n8441_, new_n8440_ ) -new_n8443_ = OR ( new_n8442_, new_n2735_ ) -new_n8444_ = NOR ( NET_554, NET_539 ) -new_n8445_ = NOT ( NET_539 ) -new_n8446_ = XOR ( new_n2446_, new_n8445_ ) -new_n8447_ = AND ( new_n8446_, NET_554 ) -new_n8448_ = NOR ( new_n8447_, new_n8444_ ) -new_n8449_ = OR ( new_n8448_, new_n2543_ ) -new_n8450_ = NAND ( new_n8449_, new_n8443_ ) -new_n8451_ = OR ( new_n8450_, new_n2524_ ) -new_n8452_ = NAND ( new_n8157_, new_n2579_ ) -new_n8453_ = NOT ( new_n8448_ ) -new_n8454_ = OR ( new_n8453_, new_n2613_ ) -new_n8455_ = NAND ( new_n8454_, new_n8452_, new_n8451_ ) -new_n8456_ = XOR ( new_n8455_, new_n2618_ ) -new_n8457_ = OR ( new_n8450_, new_n2578_ ) -new_n8458_ = NAND ( new_n8157_, new_n2620_ ) -new_n8459_ = OR ( new_n2624_, new_n8153_ ) -new_n8460_ = OR ( new_n2626_, new_n8155_ ) -new_n8461_ = NAND ( new_n8460_, new_n8459_, new_n8458_, new_n8457_ ) -new_n8462_ = OR ( new_n8461_, new_n8456_ ) -new_n8463_ = NAND ( new_n8461_, new_n8456_ ) -new_n8464_ = NAND ( new_n8463_, new_n8462_ ) -new_n8465_ = NAND ( new_n8141_, new_n8137_ ) -new_n8466_ = NAND ( new_n8465_, new_n8138_ ) -new_n8467_ = XOR ( new_n8466_, new_n8464_ ) -new_n8468_ = NOR ( new_n8467_, new_n3202_ ) -new_n8469_ = OR ( new_n8453_, new_n2732_ ) -new_n8470_ = NAND ( new_n8442_, new_n2543_ ) -new_n8471_ = NAND ( new_n8470_, new_n8469_ ) -new_n8472_ = NAND ( new_n8471_, new_n3240_ ) -new_n8473_ = NAND ( new_n7892_, new_n3253_ ) -new_n8474_ = NAND ( new_n3197_, NET_603 ) -new_n8475_ = NAND ( new_n2609_, new_n2607_, NET_604 ) -new_n8476_ = XOR ( new_n7077_, NET_749 ) -new_n8477_ = NAND ( new_n8476_, new_n2587_ ) -new_n8478_ = NOT ( NET_668 ) -new_n8479_ = OR ( new_n2597_, new_n8478_ ) -new_n8480_ = NOT ( NET_636 ) -new_n8481_ = OR ( new_n2604_, new_n8480_ ) -new_n8482_ = NAND ( new_n8481_, new_n8479_, new_n8477_, new_n8475_ ) -new_n8483_ = NAND ( new_n8482_, new_n3243_ ) -new_n8484_ = NAND ( new_n8483_, new_n8474_, new_n8473_, new_n8472_ ) -NET_13321 = OR ( new_n8484_, new_n8468_ ) -new_n8486_ = NOR ( new_n8467_, new_n3264_ ) -new_n8487_ = NAND ( new_n8471_, new_n3266_ ) -new_n8488_ = NAND ( new_n7892_, new_n3271_ ) -new_n8489_ = NAND ( new_n3262_, NET_635 ) -new_n8490_ = NAND ( new_n8482_, new_n3269_ ) -new_n8491_ = NAND ( new_n8490_, new_n8489_, new_n8488_, new_n8487_ ) -NET_13322 = OR ( new_n8491_, new_n8486_ ) -new_n8493_ = NOR ( new_n8467_, new_n3767_ ) -new_n8494_ = AND ( new_n8471_, new_n2744_ ) -new_n8495_ = NAND ( new_n2713_, NET_667 ) -new_n8496_ = NAND ( new_n8482_, new_n2765_ ) -new_n8497_ = NAND ( new_n7892_, new_n2756_ ) -new_n8498_ = NAND ( new_n8151_, new_n2758_ ) -new_n8499_ = NAND ( new_n8498_, new_n8497_, new_n8496_, new_n8495_ ) -NET_13323 = OR ( new_n8499_, new_n8494_, new_n8493_ ) -new_n8501_ = NOR ( new_n8467_, new_n3276_ ) -new_n8502_ = OR ( new_n3283_, new_n8153_ ) -new_n8503_ = NAND ( new_n3287_, NET_635 ) -new_n8504_ = NAND ( new_n8503_, new_n8502_ ) -new_n8505_ = NAND ( new_n8504_, new_n8453_ ) -new_n8506_ = OR ( new_n8504_, new_n8453_ ) -new_n8507_ = NAND ( new_n8506_, new_n8505_ ) -new_n8508_ = NAND ( new_n8185_, new_n8182_ ) -new_n8509_ = NAND ( new_n8508_, new_n8181_ ) -new_n8510_ = NAND ( new_n8509_, new_n8507_ ) -new_n8511_ = OR ( new_n8509_, new_n8507_ ) -new_n8512_ = NAND ( new_n8511_, new_n8510_, new_n3316_ ) -new_n8513_ = NAND ( new_n8448_, new_n3323_ ) -new_n8514_ = OR ( new_n3314_, new_n3583_ ) -new_n8515_ = OR ( NET_765, new_n8150_ ) -new_n8516_ = NAND ( new_n8515_, new_n8514_, new_n8513_, new_n8512_ ) -NET_13324 = OR ( new_n8516_, new_n8501_ ) -new_n8518_ = OR ( new_n8467_, new_n3339_ ) -new_n8519_ = NAND ( new_n8471_, new_n3361_ ) -new_n8520_ = OR ( new_n8450_, new_n3364_ ) -new_n8521_ = NAND ( new_n8151_, new_n3350_ ) -new_n8522_ = NAND ( new_n8482_, new_n3352_ ) -new_n8523_ = NAND ( new_n8151_, new_n3193_ ) -new_n8524_ = NAND ( new_n7892_, new_n3355_ ) -new_n8525_ = NAND ( new_n8524_, new_n8523_, new_n8522_ ) -new_n8526_ = NAND ( new_n8525_, new_n3359_ ) -new_n8527_ = AND ( new_n8526_, new_n8521_, new_n8515_ ) -NET_13325 = NAND ( new_n8527_, new_n8520_, new_n8519_, new_n8518_ ) -new_n8529_ = NOT ( NET_2 ) -new_n8530_ = NAND ( new_n1530_, new_n6924_ ) -new_n8531_ = OR ( new_n1530_, NET_243 ) -new_n8532_ = NAND ( new_n8531_, new_n8530_ ) -new_n8533_ = OR ( new_n8532_, new_n8529_ ) -new_n8534_ = NAND ( new_n8532_, new_n8529_ ) -new_n8535_ = NAND ( new_n8534_, new_n8533_ ) -new_n8536_ = NAND ( new_n7950_, new_n7943_ ) -new_n8537_ = NAND ( new_n8536_, new_n7944_ ) -new_n8538_ = XOR ( new_n8537_, new_n8535_ ) -new_n8539_ = OR ( new_n8538_, new_n1531_ ) -new_n8540_ = OR ( new_n1530_, NET_488 ) -new_n8541_ = NAND ( new_n8540_, new_n8539_ ) -new_n8542_ = OR ( new_n8541_, NET_275 ) -new_n8543_ = OR ( new_n1692_, new_n1872_ ) -new_n8544_ = NAND ( new_n1884_, new_n1695_ ) -NET_13388 = NAND ( new_n8544_, new_n8543_, new_n8542_ ) -new_n8546_ = NAND ( new_n1921_, new_n1688_ ) -new_n8547_ = NOR ( NET_64, new_n1690_ ) -new_n8548_ = NOR ( new_n1707_, new_n1694_ ) -new_n8549_ = OR ( new_n8548_, new_n8547_ ) -new_n8550_ = OR ( new_n8549_, new_n1921_ ) -new_n8551_ = NAND ( new_n8550_, new_n8546_ ) -new_n8552_ = NOT ( new_n8551_ ) -new_n8553_ = NAND ( new_n8552_, new_n1942_ ) -new_n8554_ = NAND ( new_n8247_, new_n1870_ ) -new_n8555_ = NAND ( new_n8549_, new_n1953_ ) -new_n8556_ = NAND ( new_n8555_, new_n8554_, new_n8553_ ) -new_n8557_ = XOR ( new_n8556_, new_n1844_ ) -new_n8558_ = NAND ( new_n8552_, new_n1870_ ) -new_n8559_ = NAND ( new_n8247_, new_n1960_ ) -new_n8560_ = OR ( new_n1951_, new_n8245_ ) -new_n8561_ = OR ( new_n1952_, new_n8243_ ) -new_n8562_ = NAND ( new_n8561_, new_n8560_, new_n8559_, new_n8558_ ) -new_n8563_ = OR ( new_n8562_, new_n8557_ ) -new_n8564_ = NAND ( new_n8562_, new_n8557_ ) -new_n8565_ = NAND ( new_n8564_, new_n8563_ ) -new_n8566_ = NAND ( new_n8224_, new_n8220_ ) -new_n8567_ = NAND ( new_n8566_, new_n8221_ ) -new_n8568_ = XOR ( new_n8567_, new_n8565_ ) -new_n8569_ = OR ( new_n8568_, new_n1840_ ) -new_n8570_ = NAND ( new_n8247_, new_n1976_ ) -new_n8571_ = AND ( new_n8552_, new_n1978_ ) -new_n8572_ = OR ( new_n8571_, new_n8570_ ) -new_n8573_ = NAND ( new_n8571_, new_n8570_ ) -new_n8574_ = NAND ( new_n8573_, new_n8572_ ) -new_n8575_ = NAND ( new_n8233_, new_n8229_ ) -new_n8576_ = NAND ( new_n8575_, new_n8230_ ) -new_n8577_ = XNOR ( new_n8576_, new_n8574_ ) -new_n8578_ = OR ( new_n8577_, new_n1975_ ) -new_n8579_ = OR ( new_n8551_, new_n1989_ ) -new_n8580_ = NAND ( new_n1901_, new_n1898_, NET_114 ) -new_n8581_ = NOT ( NET_259 ) -new_n8582_ = XOR ( new_n8240_, new_n8581_ ) -new_n8583_ = NAND ( new_n8582_, new_n1878_ ) -new_n8584_ = NOT ( NET_178 ) -new_n8585_ = OR ( new_n1887_, new_n8584_ ) -new_n8586_ = NOT ( NET_146 ) -new_n8587_ = OR ( new_n1895_, new_n8586_ ) -new_n8588_ = NAND ( new_n8587_, new_n8585_, new_n8583_, new_n8580_ ) -new_n8589_ = NAND ( new_n8588_, new_n1994_ ) -new_n8590_ = NAND ( new_n8015_, new_n3867_ ) -new_n8591_ = NAND ( new_n1838_, NET_177 ) -new_n8592_ = NAND ( new_n8241_, new_n2005_ ) -new_n8593_ = AND ( new_n8592_, new_n8591_, new_n8590_, new_n8589_ ) -NET_13389 = NAND ( new_n8593_, new_n8579_, new_n8578_, new_n8569_ ) -new_n8595_ = OR ( new_n8225_, new_n2778_ ) -new_n8596_ = NAND ( new_n8207_, new_n4082_ ) -new_n8597_ = NAND ( new_n8363_, new_n8359_ ) -new_n8598_ = OR ( new_n1914_, new_n8013_ ) -new_n8599_ = NAND ( new_n1914_, NET_176 ) -new_n8600_ = NAND ( new_n8599_, new_n8598_ ) -new_n8601_ = NAND ( new_n8600_, new_n8207_ ) -new_n8602_ = OR ( new_n8600_, new_n8207_ ) -new_n8603_ = NAND ( new_n8602_, new_n8601_ ) -new_n8604_ = NAND ( new_n8603_, new_n8597_, new_n8358_ ) -new_n8605_ = NAND ( new_n8597_, new_n8358_ ) -new_n8606_ = NAND ( new_n8605_, new_n8602_, new_n8601_ ) -new_n8607_ = NAND ( new_n8606_, new_n8604_ ) -new_n8608_ = OR ( new_n8607_, new_n2789_ ) -new_n8609_ = NAND ( new_n8608_, new_n8596_, new_n8595_ ) -new_n8610_ = AND ( new_n8609_, new_n2796_ ) -new_n8611_ = OR ( new_n8607_, new_n2804_ ) -new_n8612_ = NAND ( new_n8207_, new_n2798_ ) -new_n8613_ = OR ( new_n2795_, new_n3372_ ) -new_n8614_ = NAND ( new_n8613_, new_n8612_, new_n8611_, new_n8263_ ) -NET_13390 = OR ( new_n8614_, new_n8610_ ) -new_n8616_ = NOR ( new_n8568_, new_n2016_ ) -new_n8617_ = NOR ( new_n8577_, new_n2020_ ) -new_n8618_ = OR ( new_n8551_, new_n2039_ ) -new_n8619_ = NAND ( new_n8241_, new_n2853_ ) -new_n8620_ = NAND ( new_n8588_, new_n2043_ ) -new_n8621_ = NAND ( new_n8241_, new_n2009_ ) -new_n8622_ = NAND ( new_n8015_, new_n2864_ ) -new_n8623_ = NAND ( new_n8622_, new_n8621_, new_n8620_ ) -new_n8624_ = NAND ( new_n8623_, new_n2042_ ) -new_n8625_ = NAND ( NET_35973, NET_261 ) -new_n8626_ = NAND ( new_n8625_, new_n8624_, new_n8619_, new_n8618_ ) -NET_13391 = OR ( new_n8626_, new_n8617_, new_n8616_ ) -new_n8628_ = NOR ( new_n8225_, new_n2873_ ) -new_n8629_ = NOT ( new_n8234_ ) -new_n8630_ = NAND ( new_n8629_, new_n2878_ ) -new_n8631_ = NAND ( new_n8209_, new_n2881_ ) -new_n8632_ = NAND ( new_n7599_, new_n3644_ ) -new_n8633_ = NAND ( new_n8247_, new_n1992_ ) -new_n8634_ = NAND ( new_n8633_, new_n8632_, new_n8631_, new_n8630_ ) -new_n8635_ = NOR ( new_n8634_, new_n8628_ ) -new_n8636_ = OR ( new_n8635_, new_n2891_ ) -new_n8637_ = NAND ( new_n2891_, NET_112 ) -NET_13393 = NAND ( new_n8637_, new_n8636_ ) -new_n8639_ = OR ( new_n8635_, new_n2900_ ) -new_n8640_ = NAND ( new_n2900_, NET_144 ) -NET_13394 = NAND ( new_n8640_, new_n8639_ ) -new_n8642_ = NAND ( new_n1530_, new_n6922_ ) -new_n8643_ = OR ( new_n8538_, new_n1530_ ) -new_n8644_ = NAND ( new_n8643_, new_n8642_ ) -new_n8645_ = OR ( new_n8644_, NET_520 ) -new_n8646_ = OR ( new_n2054_, new_n2220_ ) -new_n8647_ = OR ( new_n2234_, new_n2058_ ) -NET_13409 = NAND ( new_n8647_, new_n8646_, new_n8645_ ) -new_n8649_ = OR ( new_n8308_, new_n2983_ ) -new_n8650_ = OR ( new_n8284_, new_n2987_ ) -new_n8651_ = NAND ( new_n8411_, new_n8407_ ) -new_n8652_ = OR ( new_n2991_, new_n8101_ ) -new_n8653_ = OR ( new_n2287_, new_n8099_ ) -new_n8654_ = NAND ( new_n8653_, new_n8652_ ) -new_n8655_ = NAND ( new_n8654_, new_n8283_ ) -new_n8656_ = OR ( new_n8654_, new_n8283_ ) -new_n8657_ = NAND ( new_n8656_, new_n8655_ ) -new_n8658_ = NAND ( new_n8657_, new_n8651_, new_n8406_ ) -new_n8659_ = NAND ( new_n8651_, new_n8406_ ) -new_n8660_ = NAND ( new_n8659_, new_n8656_, new_n8655_ ) -new_n8661_ = NAND ( new_n8660_, new_n8658_ ) -new_n8662_ = OR ( new_n8661_, new_n2999_ ) -new_n8663_ = NAND ( new_n8662_, new_n8650_, new_n8649_ ) -new_n8664_ = NAND ( new_n8663_, new_n3006_ ) -new_n8665_ = OR ( new_n8308_, new_n3008_ ) -new_n8666_ = OR ( new_n8661_, new_n3016_ ) -new_n8667_ = NAND ( new_n8283_, new_n3012_ ) -new_n8668_ = OR ( new_n3005_, new_n3373_ ) -new_n8669_ = AND ( new_n8668_, new_n8667_, new_n8339_ ) -NET_13410 = NAND ( new_n8669_, new_n8666_, new_n8665_, new_n8664_ ) -new_n8671_ = NAND ( new_n2290_, new_n2050_ ) -new_n8672_ = NOR ( NET_309, NET_294 ) -new_n8673_ = AND ( new_n2078_, NET_309 ) -new_n8674_ = NOR ( new_n8673_, new_n8672_ ) -new_n8675_ = NOT ( new_n8674_ ) -new_n8676_ = NAND ( new_n8675_, new_n2289_ ) -new_n8677_ = NAND ( new_n8676_, new_n8671_ ) -new_n8678_ = OR ( new_n8677_, new_n2309_ ) -new_n8679_ = NAND ( new_n8333_, new_n2274_ ) -new_n8680_ = NAND ( new_n8674_, new_n2325_ ) -new_n8681_ = OR ( new_n2328_, new_n8331_ ) -new_n8682_ = OR ( new_n2330_, new_n8329_ ) -new_n8683_ = AND ( new_n8682_, new_n8681_, new_n8680_ ) -new_n8684_ = NAND ( new_n8683_, new_n8679_, new_n8678_ ) -new_n8685_ = XOR ( new_n8684_, new_n2218_ ) -new_n8686_ = OR ( new_n8677_, new_n2273_ ) -new_n8687_ = NAND ( new_n8333_, new_n2336_ ) -new_n8688_ = OR ( new_n8675_, new_n2338_ ) -new_n8689_ = OR ( new_n2323_, new_n8331_ ) -new_n8690_ = OR ( new_n2324_, new_n8329_ ) -new_n8691_ = AND ( new_n8690_, new_n8689_, new_n8688_ ) -new_n8692_ = NAND ( new_n8691_, new_n8687_, new_n8686_ ) -new_n8693_ = OR ( new_n8692_, new_n8685_ ) -new_n8694_ = NAND ( new_n8692_, new_n8685_ ) -new_n8695_ = NAND ( new_n8694_, new_n8693_ ) -new_n8696_ = NAND ( new_n8307_, new_n8303_ ) -new_n8697_ = NAND ( new_n8696_, new_n8304_ ) -new_n8698_ = XOR ( new_n8697_, new_n8695_ ) -new_n8699_ = NOR ( new_n8698_, new_n2390_ ) -new_n8700_ = OR ( new_n8677_, new_n2349_ ) -new_n8701_ = NAND ( new_n8333_, new_n2349_ ) -new_n8702_ = NAND ( new_n8701_, new_n8700_ ) -new_n8703_ = XOR ( new_n8702_, new_n2349_ ) -new_n8704_ = OR ( new_n8677_, new_n2348_ ) -new_n8705_ = NAND ( new_n8704_, new_n8703_ ) -new_n8706_ = OR ( new_n8704_, new_n8703_ ) -new_n8707_ = NAND ( new_n8706_, new_n8705_ ) -new_n8708_ = NAND ( new_n8318_, new_n8315_ ) -new_n8709_ = NAND ( new_n8708_, new_n8316_ ) -new_n8710_ = XOR ( new_n8709_, new_n8707_ ) -new_n8711_ = NOR ( new_n8710_, new_n2393_ ) -new_n8712_ = OR ( new_n8677_, new_n2412_ ) -new_n8713_ = NAND ( new_n8327_, new_n3025_ ) -new_n8714_ = NAND ( new_n2250_, new_n2248_, NET_359 ) -new_n8715_ = NOT ( NET_504 ) -new_n8716_ = XOR ( new_n8326_, new_n8715_ ) -new_n8717_ = NAND ( new_n8716_, new_n2228_ ) -new_n8718_ = NOT ( NET_423 ) -new_n8719_ = OR ( new_n2238_, new_n8718_ ) -new_n8720_ = NOT ( NET_391 ) -new_n8721_ = OR ( new_n2245_, new_n8720_ ) -new_n8722_ = NAND ( new_n8721_, new_n8719_, new_n8717_, new_n8714_ ) -new_n8723_ = NAND ( new_n8722_, new_n2416_ ) -new_n8724_ = NAND ( new_n8327_, new_n2384_ ) -new_n8725_ = NAND ( new_n8103_, new_n3029_ ) -new_n8726_ = NAND ( new_n8725_, new_n8724_, new_n8723_ ) -new_n8727_ = NAND ( new_n8726_, new_n2415_ ) -new_n8728_ = NAND ( NET_35976, NET_506 ) -new_n8729_ = NAND ( new_n8728_, new_n8727_, new_n8713_, new_n8712_ ) -NET_13411 = OR ( new_n8729_, new_n8711_, new_n8699_ ) -new_n8731_ = NOR ( new_n8308_, new_n3037_ ) -new_n8732_ = OR ( new_n8319_, new_n3041_ ) -new_n8733_ = OR ( new_n8286_, new_n3045_ ) -new_n8734_ = NAND ( new_n7726_, new_n2966_ ) -new_n8735_ = NAND ( new_n8333_, new_n2367_ ) -new_n8736_ = NAND ( new_n8735_, new_n8734_, new_n8733_, new_n8732_ ) -new_n8737_ = NOR ( new_n8736_, new_n8731_ ) -new_n8738_ = OR ( new_n8737_, new_n3053_ ) -new_n8739_ = NAND ( new_n3053_, NET_357 ) -NET_13413 = NAND ( new_n8739_, new_n8738_ ) -new_n8741_ = OR ( new_n8737_, new_n3707_ ) -new_n8742_ = OR ( new_n3057_, new_n8101_ ) -NET_13414 = NAND ( new_n8742_, new_n8741_ ) -new_n8744_ = NAND ( new_n8536_, new_n8534_, new_n7944_ ) -new_n8745_ = NAND ( new_n1530_, new_n7046_ ) -new_n8746_ = OR ( new_n1530_, NET_244 ) -new_n8747_ = NAND ( new_n8746_, new_n8745_ ) -new_n8748_ = NAND ( new_n8747_, NET_1 ) -new_n8749_ = OR ( new_n8747_, NET_1 ) -new_n8750_ = NAND ( new_n8749_, new_n8748_, new_n8744_, new_n8533_ ) -new_n8751_ = NAND ( new_n8537_, new_n8533_ ) -new_n8752_ = NAND ( new_n8749_, new_n8748_ ) -new_n8753_ = NAND ( new_n8752_, new_n8751_, new_n8534_ ) -new_n8754_ = NAND ( new_n8753_, new_n8750_ ) -new_n8755_ = NAND ( new_n8754_, new_n1530_ ) -new_n8756_ = OR ( new_n1530_, NET_489 ) -new_n8757_ = NAND ( new_n8756_, new_n8755_ ) -new_n8758_ = OR ( new_n8757_, NET_275 ) -new_n8759_ = OR ( new_n1874_, new_n1694_, NET_63, NET_35973 ) -NET_13490 = NAND ( new_n8759_, new_n8758_ ) -new_n8761_ = NAND ( new_n1530_, new_n7048_ ) -new_n8762_ = NAND ( new_n8754_, new_n1531_ ) -new_n8763_ = NAND ( new_n8762_, new_n8761_ ) -new_n8764_ = OR ( new_n8763_, NET_520 ) -new_n8765_ = OR ( new_n2224_, NET_35976, new_n2056_, NET_308 ) -NET_13511 = NAND ( new_n8765_, new_n8764_ ) -new_n8767_ = OR ( new_n8698_, new_n2208_ ) -new_n8768_ = OR ( new_n8710_, new_n2362_ ) -new_n8769_ = OR ( new_n8677_, new_n2364_ ) -new_n8770_ = NAND ( new_n8722_, new_n2369_ ) -new_n8771_ = NAND ( new_n8103_, new_n2968_ ) -new_n8772_ = NAND ( new_n2196_, NET_422 ) -new_n8773_ = NAND ( new_n8327_, new_n2380_ ) -new_n8774_ = AND ( new_n8773_, new_n8772_, new_n8771_, new_n8770_ ) -NET_13512 = NAND ( new_n8774_, new_n8769_, new_n8768_, new_n8767_ ) -new_n8776_ = NOR ( new_n3149_, new_n3146_ ) -new_n8777_ = XOR ( new_n8776_, new_n3144_ ) -new_n8778_ = NAND ( new_n8777_, new_n1530_ ) -new_n8779_ = OR ( new_n1530_, new_n3599_ ) -new_n8780_ = NAND ( new_n8779_, new_n8778_ ) -new_n8781_ = OR ( new_n8780_, new_n2735_ ) -new_n8782_ = NOR ( NET_554, NET_540 ) -new_n8783_ = XOR ( new_n2447_, NET_540 ) -new_n8784_ = AND ( new_n8783_, NET_554 ) -new_n8785_ = NOR ( new_n8784_, new_n8782_ ) -new_n8786_ = OR ( new_n8785_, new_n2543_ ) -new_n8787_ = NAND ( new_n8786_, new_n8781_ ) -new_n8788_ = OR ( new_n8787_, new_n2524_ ) -new_n8789_ = NOT ( new_n8482_ ) -new_n8790_ = OR ( new_n8789_, new_n2578_ ) -new_n8791_ = NOT ( new_n8785_ ) -new_n8792_ = OR ( new_n8791_, new_n2613_ ) -new_n8793_ = NAND ( new_n8792_, new_n8790_, new_n8788_ ) -new_n8794_ = XOR ( new_n8793_, new_n2618_ ) -new_n8795_ = OR ( new_n8787_, new_n2578_ ) -new_n8796_ = NAND ( new_n8482_, new_n2620_ ) -new_n8797_ = OR ( new_n2624_, new_n8478_ ) -new_n8798_ = OR ( new_n2626_, new_n8480_ ) -new_n8799_ = NAND ( new_n8798_, new_n8797_, new_n8796_, new_n8795_ ) -new_n8800_ = OR ( new_n8799_, new_n8794_ ) -new_n8801_ = NAND ( new_n8799_, new_n8794_ ) -new_n8802_ = NAND ( new_n8801_, new_n8800_ ) -new_n8803_ = NAND ( new_n8466_, new_n8462_ ) -new_n8804_ = NAND ( new_n8803_, new_n8463_ ) -new_n8805_ = XOR ( new_n8804_, new_n8802_ ) -new_n8806_ = NOR ( new_n8805_, new_n3202_ ) -new_n8807_ = OR ( new_n8791_, new_n2732_ ) -new_n8808_ = NAND ( new_n8780_, new_n2543_ ) -new_n8809_ = NAND ( new_n8808_, new_n8807_ ) -new_n8810_ = NAND ( new_n8809_, new_n3240_ ) -new_n8811_ = NAND ( new_n8157_, new_n3253_ ) -new_n8812_ = NAND ( new_n3197_, NET_604 ) -new_n8813_ = NAND ( new_n2609_, new_n2607_, NET_605 ) -new_n8814_ = NOT ( NET_739 ) -new_n8815_ = XOR ( new_n7078_, new_n8814_ ) -new_n8816_ = NAND ( new_n8815_, new_n2587_ ) -new_n8817_ = NOT ( NET_669 ) -new_n8818_ = OR ( new_n2597_, new_n8817_ ) -new_n8819_ = NOT ( NET_637 ) -new_n8820_ = OR ( new_n2604_, new_n8819_ ) -new_n8821_ = NAND ( new_n8820_, new_n8818_, new_n8816_, new_n8813_ ) -new_n8822_ = NAND ( new_n8821_, new_n3243_ ) -new_n8823_ = NAND ( new_n8822_, new_n8812_, new_n8811_, new_n8810_ ) -NET_13533 = OR ( new_n8823_, new_n8806_ ) -new_n8825_ = NOR ( new_n8805_, new_n3264_ ) -new_n8826_ = NAND ( new_n8809_, new_n3266_ ) -new_n8827_ = NAND ( new_n8157_, new_n3271_ ) -new_n8828_ = NAND ( new_n3262_, NET_636 ) -new_n8829_ = NAND ( new_n8821_, new_n3269_ ) -new_n8830_ = NAND ( new_n8829_, new_n8828_, new_n8827_, new_n8826_ ) -NET_13534 = OR ( new_n8830_, new_n8825_ ) -new_n8832_ = NOR ( new_n8805_, new_n3767_ ) -new_n8833_ = AND ( new_n8809_, new_n2744_ ) -new_n8834_ = NAND ( new_n2713_, NET_668 ) -new_n8835_ = NAND ( new_n8821_, new_n2765_ ) -new_n8836_ = NAND ( new_n8157_, new_n2756_ ) -new_n8837_ = NAND ( new_n8476_, new_n2758_ ) -new_n8838_ = NAND ( new_n8837_, new_n8836_, new_n8835_, new_n8834_ ) -NET_13535 = OR ( new_n8838_, new_n8833_, new_n8832_ ) -new_n8840_ = NOR ( new_n8805_, new_n3276_ ) -new_n8841_ = OR ( new_n3283_, new_n8478_ ) -new_n8842_ = NAND ( new_n3287_, NET_636 ) -new_n8843_ = NAND ( new_n8842_, new_n8841_ ) -new_n8844_ = NAND ( new_n8843_, new_n8791_ ) -new_n8845_ = OR ( new_n8843_, new_n8791_ ) -new_n8846_ = NAND ( new_n8845_, new_n8844_ ) -new_n8847_ = NAND ( new_n8509_, new_n8506_ ) -new_n8848_ = NAND ( new_n8847_, new_n8505_ ) -new_n8849_ = NAND ( new_n8848_, new_n8846_ ) -new_n8850_ = OR ( new_n8848_, new_n8846_ ) -new_n8851_ = NAND ( new_n8850_, new_n8849_, new_n3316_ ) -new_n8852_ = NAND ( new_n8785_, new_n3323_ ) -new_n8853_ = OR ( new_n3314_, new_n3591_ ) -new_n8854_ = OR ( NET_765, new_n7071_ ) -new_n8855_ = NAND ( new_n8854_, new_n8853_, new_n8852_, new_n8851_ ) -NET_13536 = OR ( new_n8855_, new_n8840_ ) -new_n8857_ = OR ( new_n8805_, new_n3339_ ) -new_n8858_ = NAND ( new_n8809_, new_n3361_ ) -new_n8859_ = OR ( new_n8787_, new_n3364_ ) -new_n8860_ = NAND ( new_n8476_, new_n3350_ ) -new_n8861_ = NAND ( new_n8821_, new_n3352_ ) -new_n8862_ = NAND ( new_n8476_, new_n3193_ ) -new_n8863_ = NAND ( new_n8157_, new_n3355_ ) -new_n8864_ = NAND ( new_n8863_, new_n8862_, new_n8861_ ) -new_n8865_ = NAND ( new_n8864_, new_n3359_ ) -new_n8866_ = AND ( new_n8865_, new_n8860_, new_n8854_ ) -NET_13537 = NAND ( new_n8866_, new_n8859_, new_n8858_, new_n8857_ ) -new_n8868_ = NAND ( new_n3611_, new_n1921_ ) -new_n8869_ = NOR ( NET_64, NET_50 ) -new_n8870_ = AND ( new_n3615_, NET_64 ) -new_n8871_ = NOR ( new_n8870_, new_n8869_ ) -new_n8872_ = OR ( new_n8871_, new_n1921_ ) -new_n8873_ = NAND ( new_n8872_, new_n8868_ ) -new_n8874_ = NOT ( new_n8873_ ) -new_n8875_ = NAND ( new_n8874_, new_n1942_ ) -new_n8876_ = NAND ( new_n8588_, new_n1870_ ) -new_n8877_ = NAND ( new_n8871_, new_n1953_ ) -new_n8878_ = NAND ( new_n8877_, new_n8876_, new_n8875_ ) -new_n8879_ = XOR ( new_n8878_, new_n1844_ ) -new_n8880_ = NAND ( new_n8874_, new_n1870_ ) -new_n8881_ = NAND ( new_n8588_, new_n1960_ ) -new_n8882_ = OR ( new_n1951_, new_n8586_ ) -new_n8883_ = OR ( new_n1952_, new_n8584_ ) -new_n8884_ = NAND ( new_n8883_, new_n8882_, new_n8881_, new_n8880_ ) -new_n8885_ = OR ( new_n8884_, new_n8879_ ) -new_n8886_ = NAND ( new_n8884_, new_n8879_ ) -new_n8887_ = NAND ( new_n8886_, new_n8885_ ) -new_n8888_ = NAND ( new_n8567_, new_n8563_ ) -new_n8889_ = NAND ( new_n8888_, new_n8564_ ) -new_n8890_ = XOR ( new_n8889_, new_n8887_ ) -new_n8891_ = OR ( new_n8890_, new_n1840_ ) -new_n8892_ = NAND ( new_n8588_, new_n1976_ ) -new_n8893_ = AND ( new_n8874_, new_n1978_ ) -new_n8894_ = OR ( new_n8893_, new_n8892_ ) -new_n8895_ = NAND ( new_n8893_, new_n8892_ ) -new_n8896_ = NAND ( new_n8895_, new_n8894_ ) -new_n8897_ = NAND ( new_n8576_, new_n8572_ ) -new_n8898_ = NAND ( new_n8897_, new_n8573_ ) -new_n8899_ = XNOR ( new_n8898_, new_n8896_ ) -new_n8900_ = OR ( new_n8899_, new_n1975_ ) -new_n8901_ = OR ( new_n8873_, new_n1989_ ) -new_n8902_ = NAND ( new_n1901_, new_n1898_, NET_115 ) -new_n8903_ = NOT ( NET_249 ) -new_n8904_ = NAND ( new_n8238_, NET_261, NET_259 ) -new_n8905_ = NAND ( new_n8904_, new_n8903_ ) -new_n8906_ = OR ( new_n8904_, new_n8903_ ) -new_n8907_ = AND ( new_n8906_, new_n8905_ ) -new_n8908_ = NAND ( new_n8907_, new_n1878_ ) -new_n8909_ = NOT ( NET_179 ) -new_n8910_ = OR ( new_n1887_, new_n8909_ ) -new_n8911_ = NOT ( NET_147 ) -new_n8912_ = OR ( new_n1895_, new_n8911_ ) -new_n8913_ = NAND ( new_n8912_, new_n8910_, new_n8908_, new_n8902_ ) -new_n8914_ = NAND ( new_n8913_, new_n1994_ ) -new_n8915_ = NAND ( new_n8247_, new_n3867_ ) -new_n8916_ = NAND ( new_n1838_, NET_178 ) -new_n8917_ = NAND ( new_n8582_, new_n2005_ ) -new_n8918_ = AND ( new_n8917_, new_n8916_, new_n8915_, new_n8914_ ) -NET_13577 = NAND ( new_n8918_, new_n8901_, new_n8900_, new_n8891_ ) -new_n8920_ = OR ( new_n8568_, new_n2778_ ) -new_n8921_ = NAND ( new_n8549_, new_n4082_ ) -new_n8922_ = OR ( new_n1914_, new_n8245_ ) -new_n8923_ = NAND ( new_n1914_, NET_177 ) -new_n8924_ = NAND ( new_n8923_, new_n8922_ ) -new_n8925_ = XNOR ( new_n8924_, new_n8549_ ) -new_n8926_ = NAND ( new_n8605_, new_n8602_ ) -new_n8927_ = NAND ( new_n8926_, new_n8601_ ) -new_n8928_ = XOR ( new_n8927_, new_n8925_ ) -new_n8929_ = OR ( new_n8928_, new_n2789_ ) -new_n8930_ = NAND ( new_n8929_, new_n8921_, new_n8920_ ) -new_n8931_ = AND ( new_n8930_, new_n2796_ ) -new_n8932_ = OR ( new_n8928_, new_n2804_ ) -new_n8933_ = NAND ( new_n8549_, new_n2798_ ) -new_n8934_ = OR ( new_n2795_, new_n3369_ ) -new_n8935_ = NAND ( new_n8934_, new_n8933_, new_n8932_, new_n8625_ ) -NET_13578 = OR ( new_n8935_, new_n8931_ ) -new_n8937_ = NOR ( new_n8890_, new_n2016_ ) -new_n8938_ = NOR ( new_n8899_, new_n2020_ ) -new_n8939_ = OR ( new_n8873_, new_n2039_ ) -new_n8940_ = NAND ( new_n8582_, new_n2853_ ) -new_n8941_ = NAND ( new_n8913_, new_n2043_ ) -new_n8942_ = NAND ( new_n8582_, new_n2009_ ) -new_n8943_ = NAND ( new_n8247_, new_n2864_ ) -new_n8944_ = NAND ( new_n8943_, new_n8942_, new_n8941_ ) -new_n8945_ = NAND ( new_n8944_, new_n2042_ ) -new_n8946_ = OR ( NET_275, new_n8581_ ) -new_n8947_ = NAND ( new_n8946_, new_n8945_, new_n8940_, new_n8939_ ) -NET_13579 = OR ( new_n8947_, new_n8938_, new_n8937_ ) -new_n8949_ = NOR ( new_n8568_, new_n2873_ ) -new_n8950_ = NOT ( new_n8577_ ) -new_n8951_ = NAND ( new_n8950_, new_n2878_ ) -new_n8952_ = OR ( new_n8551_, new_n4269_ ) -new_n8953_ = NAND ( new_n8015_, new_n3644_ ) -new_n8954_ = NAND ( new_n8588_, new_n1992_ ) -new_n8955_ = NAND ( new_n8954_, new_n8953_, new_n8952_, new_n8951_ ) -new_n8956_ = NOR ( new_n8955_, new_n8949_ ) -new_n8957_ = OR ( new_n8956_, new_n2891_ ) -new_n8958_ = NAND ( new_n2891_, NET_113 ) -NET_13580 = NAND ( new_n8958_, new_n8957_ ) -new_n8960_ = OR ( new_n8956_, new_n2900_ ) -new_n8961_ = NAND ( new_n2900_, NET_145 ) -NET_13581 = NAND ( new_n8961_, new_n8960_ ) -new_n8963_ = OR ( new_n8698_, new_n2983_ ) -new_n8964_ = OR ( new_n8675_, new_n2987_ ) -new_n8965_ = OR ( new_n2991_, new_n8331_ ) -new_n8966_ = OR ( new_n2287_, new_n8329_ ) -new_n8967_ = NAND ( new_n8966_, new_n8965_ ) -new_n8968_ = XOR ( new_n8967_, new_n8675_ ) -new_n8969_ = NAND ( new_n8659_, new_n8656_ ) -new_n8970_ = NAND ( new_n8969_, new_n8655_ ) -new_n8971_ = XOR ( new_n8970_, new_n8968_ ) -new_n8972_ = OR ( new_n8971_, new_n2999_ ) -new_n8973_ = NAND ( new_n8972_, new_n8964_, new_n8963_ ) -new_n8974_ = NAND ( new_n8973_, new_n3006_ ) -new_n8975_ = OR ( new_n8698_, new_n3008_ ) -new_n8976_ = OR ( new_n8971_, new_n3016_ ) -new_n8977_ = NAND ( new_n8674_, new_n3012_ ) -new_n8978_ = OR ( new_n3005_, new_n3370_ ) -new_n8979_ = AND ( new_n8978_, new_n8977_, new_n8728_ ) -NET_13592 = NAND ( new_n8979_, new_n8976_, new_n8975_, new_n8974_ ) -new_n8981_ = NAND ( new_n3667_, new_n2290_ ) -new_n8982_ = NOR ( NET_309, NET_295 ) -new_n8983_ = AND ( new_n3670_, NET_309 ) -new_n8984_ = NOR ( new_n8983_, new_n8982_ ) -new_n8985_ = OR ( new_n8984_, new_n2290_ ) -new_n8986_ = NAND ( new_n8985_, new_n8981_ ) -new_n8987_ = OR ( new_n8986_, new_n2309_ ) -new_n8988_ = NAND ( new_n8722_, new_n2274_ ) -new_n8989_ = NAND ( new_n8984_, new_n2325_ ) -new_n8990_ = OR ( new_n2328_, new_n8720_ ) -new_n8991_ = OR ( new_n2330_, new_n8718_ ) -new_n8992_ = AND ( new_n8991_, new_n8990_, new_n8989_ ) -new_n8993_ = NAND ( new_n8992_, new_n8988_, new_n8987_ ) -new_n8994_ = XOR ( new_n8993_, new_n2218_ ) -new_n8995_ = OR ( new_n8986_, new_n2273_ ) -new_n8996_ = NAND ( new_n8722_, new_n2336_ ) -new_n8997_ = NAND ( new_n8984_, new_n2339_ ) -new_n8998_ = OR ( new_n2323_, new_n8720_ ) -new_n8999_ = OR ( new_n2324_, new_n8718_ ) -new_n9000_ = AND ( new_n8999_, new_n8998_, new_n8997_ ) -new_n9001_ = NAND ( new_n9000_, new_n8996_, new_n8995_ ) -new_n9002_ = OR ( new_n9001_, new_n8994_ ) -new_n9003_ = NAND ( new_n9001_, new_n8994_ ) -new_n9004_ = NAND ( new_n9003_, new_n9002_ ) -new_n9005_ = NAND ( new_n8697_, new_n8693_ ) -new_n9006_ = NAND ( new_n9005_, new_n8694_ ) -new_n9007_ = XOR ( new_n9006_, new_n9004_ ) -new_n9008_ = NOR ( new_n9007_, new_n2390_ ) -new_n9009_ = OR ( new_n8986_, new_n2349_ ) -new_n9010_ = NAND ( new_n8722_, new_n2349_ ) -new_n9011_ = NAND ( new_n9010_, new_n9009_ ) -new_n9012_ = XOR ( new_n9011_, new_n2349_ ) -new_n9013_ = OR ( new_n8986_, new_n2348_ ) -new_n9014_ = NAND ( new_n9013_, new_n9012_ ) -new_n9015_ = OR ( new_n9013_, new_n9012_ ) -new_n9016_ = NAND ( new_n9015_, new_n9014_ ) -new_n9017_ = NAND ( new_n8709_, new_n8705_ ) -new_n9018_ = NAND ( new_n9017_, new_n8706_ ) -new_n9019_ = XOR ( new_n9018_, new_n9016_ ) -new_n9020_ = NOR ( new_n9019_, new_n2393_ ) -new_n9021_ = OR ( new_n8986_, new_n2412_ ) -new_n9022_ = NAND ( new_n8716_, new_n3025_ ) -new_n9023_ = NAND ( new_n2250_, new_n2248_, NET_360 ) -new_n9024_ = NOT ( NET_494 ) -new_n9025_ = NAND ( new_n8324_, NET_506, NET_504 ) -new_n9026_ = NAND ( new_n9025_, new_n9024_ ) -new_n9027_ = OR ( new_n9025_, new_n9024_ ) -new_n9028_ = AND ( new_n9027_, new_n9026_ ) -new_n9029_ = NAND ( new_n9028_, new_n2228_ ) -new_n9030_ = NOT ( NET_424 ) -new_n9031_ = OR ( new_n2238_, new_n9030_ ) -new_n9032_ = NOT ( NET_392 ) -new_n9033_ = OR ( new_n2245_, new_n9032_ ) -new_n9034_ = NAND ( new_n9033_, new_n9031_, new_n9029_, new_n9023_ ) -new_n9035_ = NAND ( new_n9034_, new_n2416_ ) -new_n9036_ = NAND ( new_n8716_, new_n2384_ ) -new_n9037_ = NAND ( new_n8333_, new_n3029_ ) -new_n9038_ = NAND ( new_n9037_, new_n9036_, new_n9035_ ) -new_n9039_ = NAND ( new_n9038_, new_n2415_ ) -new_n9040_ = OR ( NET_520, new_n8715_ ) -new_n9041_ = NAND ( new_n9040_, new_n9039_, new_n9022_, new_n9021_ ) -NET_13593 = OR ( new_n9041_, new_n9020_, new_n9008_ ) -new_n9043_ = NOR ( new_n8698_, new_n3037_ ) -new_n9044_ = OR ( new_n8710_, new_n3041_ ) -new_n9045_ = OR ( new_n8677_, new_n3045_ ) -new_n9046_ = NAND ( new_n8103_, new_n2966_ ) -new_n9047_ = NAND ( new_n8722_, new_n2367_ ) -new_n9048_ = NAND ( new_n9047_, new_n9046_, new_n9045_, new_n9044_ ) -new_n9049_ = NOR ( new_n9048_, new_n9043_ ) -new_n9050_ = OR ( new_n9049_, new_n3053_ ) -new_n9051_ = NAND ( new_n3053_, NET_358 ) -NET_13594 = NAND ( new_n9051_, new_n9050_ ) -new_n9053_ = OR ( new_n9049_, new_n3707_ ) -new_n9054_ = OR ( new_n3057_, new_n8331_ ) -NET_13595 = NAND ( new_n9054_, new_n9053_ ) -new_n9056_ = OR ( new_n9007_, new_n2208_ ) -new_n9057_ = OR ( new_n9019_, new_n2362_ ) -new_n9058_ = OR ( new_n8986_, new_n2364_ ) -new_n9059_ = NAND ( new_n9034_, new_n2369_ ) -new_n9060_ = NAND ( new_n8333_, new_n2968_ ) -new_n9061_ = NAND ( new_n2196_, NET_423 ) -new_n9062_ = NAND ( new_n8716_, new_n2380_ ) -new_n9063_ = AND ( new_n9062_, new_n9061_, new_n9060_, new_n9059_ ) -NET_13656 = NAND ( new_n9063_, new_n9058_, new_n9057_, new_n9056_ ) -new_n9065_ = NOR ( new_n3155_, new_n3152_ ) -new_n9066_ = XOR ( new_n9065_, new_n3150_ ) -new_n9067_ = NAND ( new_n9066_, new_n1530_ ) -new_n9068_ = OR ( new_n1530_, new_n4002_ ) -new_n9069_ = NAND ( new_n9068_, new_n9067_ ) -new_n9070_ = NAND ( new_n9069_, new_n2543_ ) -new_n9071_ = OR ( NET_554, new_n2427_ ) -new_n9072_ = NAND ( new_n2447_, new_n2426_ ) -new_n9073_ = NAND ( new_n9072_, NET_541 ) -new_n9074_ = NAND ( new_n9073_, new_n2448_ ) -new_n9075_ = OR ( new_n9074_, new_n2461_ ) -new_n9076_ = NAND ( new_n9075_, new_n9071_ ) -new_n9077_ = NAND ( new_n9076_, new_n2735_ ) -new_n9078_ = NAND ( new_n9077_, new_n9070_ ) -new_n9079_ = NAND ( new_n9078_, new_n4328_ ) -new_n9080_ = NAND ( new_n8821_, new_n2579_ ) -new_n9081_ = NAND ( new_n9076_, new_n2614_ ) -new_n9082_ = NAND ( new_n9081_, new_n9080_, new_n9079_ ) -new_n9083_ = XOR ( new_n9082_, new_n2618_ ) -new_n9084_ = NAND ( new_n9078_, new_n2579_ ) -new_n9085_ = NAND ( new_n8821_, new_n2620_ ) -new_n9086_ = OR ( new_n2624_, new_n8817_ ) -new_n9087_ = OR ( new_n2626_, new_n8819_ ) -new_n9088_ = NAND ( new_n9087_, new_n9086_, new_n9085_, new_n9084_ ) -new_n9089_ = OR ( new_n9088_, new_n9083_ ) -new_n9090_ = NAND ( new_n9088_, new_n9083_ ) -new_n9091_ = NAND ( new_n9090_, new_n9089_ ) -new_n9092_ = NAND ( new_n8804_, new_n8800_ ) -new_n9093_ = NAND ( new_n9092_, new_n8801_ ) -new_n9094_ = XOR ( new_n9093_, new_n9091_ ) -new_n9095_ = NOR ( new_n9094_, new_n3202_ ) -new_n9096_ = NAND ( new_n9076_, new_n2733_ ) -new_n9097_ = NAND ( new_n9096_, new_n9070_ ) -new_n9098_ = NAND ( new_n9097_, new_n3240_ ) -new_n9099_ = NAND ( new_n8482_, new_n3253_ ) -new_n9100_ = NAND ( new_n3197_, NET_605 ) -new_n9101_ = NAND ( new_n2609_, new_n2607_, NET_606 ) -new_n9102_ = NOT ( NET_758 ) -new_n9103_ = XOR ( new_n7079_, new_n9102_ ) -new_n9104_ = NAND ( new_n9103_, new_n2587_ ) -new_n9105_ = NOT ( NET_670 ) -new_n9106_ = OR ( new_n2597_, new_n9105_ ) -new_n9107_ = NOT ( NET_638 ) -new_n9108_ = OR ( new_n2604_, new_n9107_ ) -new_n9109_ = NAND ( new_n9108_, new_n9106_, new_n9104_, new_n9101_ ) -new_n9110_ = NAND ( new_n9109_, new_n3243_ ) -new_n9111_ = NAND ( new_n9110_, new_n9100_, new_n9099_, new_n9098_ ) -NET_13670 = OR ( new_n9111_, new_n9095_ ) -new_n9113_ = NOR ( new_n9094_, new_n3264_ ) -new_n9114_ = NAND ( new_n9097_, new_n3266_ ) -new_n9115_ = NAND ( new_n8482_, new_n3271_ ) -new_n9116_ = NAND ( new_n3262_, NET_637 ) -new_n9117_ = NAND ( new_n9109_, new_n3269_ ) -new_n9118_ = NAND ( new_n9117_, new_n9116_, new_n9115_, new_n9114_ ) -NET_13671 = OR ( new_n9118_, new_n9113_ ) -new_n9120_ = NOR ( new_n9094_, new_n3767_ ) -new_n9121_ = AND ( new_n9097_, new_n2744_ ) -new_n9122_ = NAND ( new_n2713_, NET_669 ) -new_n9123_ = NAND ( new_n9109_, new_n2765_ ) -new_n9124_ = NAND ( new_n8482_, new_n2756_ ) -new_n9125_ = NAND ( new_n8815_, new_n2758_ ) -new_n9126_ = NAND ( new_n9125_, new_n9124_, new_n9123_, new_n9122_ ) -NET_13672 = OR ( new_n9126_, new_n9121_, new_n9120_ ) -new_n9128_ = NOR ( new_n9094_, new_n3276_ ) -new_n9129_ = OR ( new_n3283_, new_n8817_ ) -new_n9130_ = NAND ( new_n3287_, NET_637 ) -new_n9131_ = AND ( new_n9130_, new_n9129_ ) -new_n9132_ = NAND ( new_n9131_, new_n9076_ ) -new_n9133_ = NOR ( new_n9131_, new_n9076_ ) -new_n9134_ = NOT ( new_n9133_ ) -new_n9135_ = NAND ( new_n9134_, new_n9132_ ) -new_n9136_ = NAND ( new_n8848_, new_n8845_ ) -new_n9137_ = NAND ( new_n9136_, new_n8844_ ) -new_n9138_ = NAND ( new_n9137_, new_n9135_ ) -new_n9139_ = OR ( new_n9137_, new_n9135_ ) -new_n9140_ = NAND ( new_n9139_, new_n9138_, new_n3316_ ) -new_n9141_ = NAND ( new_n9076_, new_n3323_ ) -new_n9142_ = OR ( new_n3314_, new_n3368_ ) -new_n9143_ = OR ( NET_765, new_n8814_ ) -new_n9144_ = NAND ( new_n9143_, new_n9142_, new_n9141_, new_n9140_ ) -NET_13673 = OR ( new_n9144_, new_n9128_ ) -new_n9146_ = OR ( new_n9094_, new_n3339_ ) -new_n9147_ = NAND ( new_n9097_, new_n3361_ ) -new_n9148_ = NAND ( new_n9078_, new_n3363_ ) -new_n9149_ = NAND ( new_n8815_, new_n3350_ ) -new_n9150_ = NAND ( new_n9109_, new_n3352_ ) -new_n9151_ = NAND ( new_n8815_, new_n3193_ ) -new_n9152_ = NAND ( new_n8482_, new_n3355_ ) -new_n9153_ = NAND ( new_n9152_, new_n9151_, new_n9150_ ) -new_n9154_ = NAND ( new_n9153_, new_n3359_ ) -new_n9155_ = AND ( new_n9154_, new_n9149_, new_n9143_ ) -NET_13674 = NAND ( new_n9155_, new_n9148_, new_n9147_, new_n9146_ ) -new_n9157_ = NAND ( new_n4014_, new_n1921_ ) -new_n9158_ = OR ( NET_64, new_n4016_ ) -new_n9159_ = OR ( new_n4020_, new_n1694_ ) -new_n9160_ = NAND ( new_n9159_, new_n9158_ ) -new_n9161_ = OR ( new_n9160_, new_n1921_ ) -new_n9162_ = NAND ( new_n9161_, new_n9157_ ) -new_n9163_ = NOT ( new_n9162_ ) -new_n9164_ = NAND ( new_n9163_, new_n1942_ ) -new_n9165_ = NAND ( new_n8913_, new_n1870_ ) -new_n9166_ = NAND ( new_n9160_, new_n1953_ ) -new_n9167_ = NAND ( new_n9166_, new_n9165_, new_n9164_ ) -new_n9168_ = XOR ( new_n9167_, new_n1844_ ) -new_n9169_ = NAND ( new_n9163_, new_n1870_ ) -new_n9170_ = NAND ( new_n8913_, new_n1960_ ) -new_n9171_ = OR ( new_n1951_, new_n8911_ ) -new_n9172_ = OR ( new_n1952_, new_n8909_ ) -new_n9173_ = NAND ( new_n9172_, new_n9171_, new_n9170_, new_n9169_ ) -new_n9174_ = OR ( new_n9173_, new_n9168_ ) -new_n9175_ = NAND ( new_n9173_, new_n9168_ ) -new_n9176_ = NAND ( new_n9175_, new_n9174_ ) -new_n9177_ = NAND ( new_n8889_, new_n8885_ ) -new_n9178_ = NAND ( new_n9177_, new_n8886_ ) -new_n9179_ = XOR ( new_n9178_, new_n9176_ ) -new_n9180_ = OR ( new_n9179_, new_n1840_ ) -new_n9181_ = NAND ( new_n8913_, new_n1976_ ) -new_n9182_ = AND ( new_n9163_, new_n1978_ ) -new_n9183_ = OR ( new_n9182_, new_n9181_ ) -new_n9184_ = NAND ( new_n9182_, new_n9181_ ) -new_n9185_ = NAND ( new_n9184_, new_n9183_ ) -new_n9186_ = NAND ( new_n8898_, new_n8894_ ) -new_n9187_ = NAND ( new_n9186_, new_n8895_ ) -new_n9188_ = XNOR ( new_n9187_, new_n9185_ ) -new_n9189_ = OR ( new_n9188_, new_n1975_ ) -new_n9190_ = OR ( new_n9162_, new_n1989_ ) -new_n9191_ = NAND ( new_n1901_, new_n1898_, NET_116 ) -new_n9192_ = NOT ( NET_268 ) -new_n9193_ = XOR ( new_n8906_, new_n9192_ ) -new_n9194_ = NAND ( new_n9193_, new_n1878_ ) -new_n9195_ = NOT ( NET_180 ) -new_n9196_ = OR ( new_n1887_, new_n9195_ ) -new_n9197_ = NOT ( NET_148 ) -new_n9198_ = OR ( new_n1895_, new_n9197_ ) -new_n9199_ = NAND ( new_n9198_, new_n9196_, new_n9194_, new_n9191_ ) -new_n9200_ = NAND ( new_n9199_, new_n1994_ ) -new_n9201_ = NAND ( new_n8588_, new_n3867_ ) -new_n9202_ = NAND ( new_n1838_, NET_179 ) -new_n9203_ = NAND ( new_n8907_, new_n2005_ ) -new_n9204_ = AND ( new_n9203_, new_n9202_, new_n9201_, new_n9200_ ) -NET_13706 = NAND ( new_n9204_, new_n9190_, new_n9189_, new_n9180_ ) -new_n9206_ = OR ( new_n8890_, new_n2778_ ) -new_n9207_ = NAND ( new_n8871_, new_n4082_ ) -new_n9208_ = OR ( new_n1914_, new_n8586_ ) -new_n9209_ = NAND ( new_n1914_, NET_178 ) -new_n9210_ = NAND ( new_n9209_, new_n9208_ ) -new_n9211_ = OR ( new_n9210_, new_n8871_ ) -new_n9212_ = NAND ( new_n9210_, new_n8871_ ) -new_n9213_ = NAND ( new_n9212_, new_n9211_ ) -new_n9214_ = NAND ( new_n8924_, new_n8549_ ) -new_n9215_ = NAND ( new_n9214_, new_n8926_, new_n8601_ ) -new_n9216_ = OR ( new_n8924_, new_n8549_ ) -new_n9217_ = NAND ( new_n9216_, new_n9215_ ) -new_n9218_ = XNOR ( new_n9217_, new_n9213_ ) -new_n9219_ = OR ( new_n9218_, new_n2789_ ) -new_n9220_ = NAND ( new_n9219_, new_n9207_, new_n9206_ ) -new_n9221_ = AND ( new_n9220_, new_n2796_ ) -new_n9222_ = OR ( new_n9218_, new_n2804_ ) -new_n9223_ = NAND ( new_n8871_, new_n2798_ ) -new_n9224_ = NAND ( new_n2794_, new_n1947_, NET_275, NET_195 ) -new_n9225_ = NAND ( new_n9224_, new_n9223_, new_n9222_, new_n8946_ ) -NET_13707 = OR ( new_n9225_, new_n9221_ ) -new_n9227_ = NOR ( new_n9179_, new_n2016_ ) -new_n9228_ = NOR ( new_n9188_, new_n2020_ ) -new_n9229_ = OR ( new_n9162_, new_n2039_ ) -new_n9230_ = NAND ( new_n8907_, new_n2853_ ) -new_n9231_ = NAND ( new_n9199_, new_n2043_ ) -new_n9232_ = NAND ( new_n8907_, new_n2009_ ) -new_n9233_ = NAND ( new_n8588_, new_n2864_ ) -new_n9234_ = NAND ( new_n9233_, new_n9232_, new_n9231_ ) -new_n9235_ = NAND ( new_n9234_, new_n2042_ ) -new_n9236_ = OR ( NET_275, new_n8903_ ) -new_n9237_ = NAND ( new_n9236_, new_n9235_, new_n9230_, new_n9229_ ) -NET_13708 = OR ( new_n9237_, new_n9228_, new_n9227_ ) -new_n9239_ = NOR ( new_n8890_, new_n2873_ ) -new_n9240_ = NOT ( new_n8899_ ) -new_n9241_ = NAND ( new_n9240_, new_n2878_ ) -new_n9242_ = OR ( new_n8873_, new_n4269_ ) -new_n9243_ = NAND ( new_n8247_, new_n3644_ ) -new_n9244_ = NAND ( new_n8913_, new_n1992_ ) -new_n9245_ = NAND ( new_n9244_, new_n9243_, new_n9242_, new_n9241_ ) -new_n9246_ = NOR ( new_n9245_, new_n9239_ ) -new_n9247_ = OR ( new_n9246_, new_n2891_ ) -new_n9248_ = NAND ( new_n2891_, NET_114 ) -NET_13710 = NAND ( new_n9248_, new_n9247_ ) -new_n9250_ = OR ( new_n9246_, new_n2900_ ) -new_n9251_ = NAND ( new_n2900_, NET_146 ) -NET_13711 = NAND ( new_n9251_, new_n9250_ ) -new_n9253_ = OR ( new_n9007_, new_n2983_ ) -new_n9254_ = NAND ( new_n8984_, new_n2988_ ) -new_n9255_ = OR ( new_n2991_, new_n8720_ ) -new_n9256_ = OR ( new_n2287_, new_n8718_ ) -new_n9257_ = NAND ( new_n9256_, new_n9255_ ) -new_n9258_ = NAND ( new_n9257_, new_n8984_ ) -new_n9259_ = OR ( new_n9257_, new_n8984_ ) -new_n9260_ = NAND ( new_n9259_, new_n9258_ ) -new_n9261_ = NAND ( new_n8967_, new_n8674_ ) -new_n9262_ = NAND ( new_n9261_, new_n8969_, new_n8655_ ) -new_n9263_ = OR ( new_n8967_, new_n8674_ ) -new_n9264_ = NAND ( new_n9263_, new_n9262_ ) -new_n9265_ = XNOR ( new_n9264_, new_n9260_ ) -new_n9266_ = OR ( new_n9265_, new_n2999_ ) -new_n9267_ = NAND ( new_n9266_, new_n9254_, new_n9253_ ) -new_n9268_ = NAND ( new_n9267_, new_n3006_ ) -new_n9269_ = OR ( new_n9007_, new_n3008_ ) -new_n9270_ = OR ( new_n9265_, new_n3016_ ) -new_n9271_ = NAND ( new_n8984_, new_n3012_ ) -new_n9272_ = NAND ( new_n3004_, new_n2405_, NET_520, NET_440 ) -new_n9273_ = AND ( new_n9272_, new_n9271_, new_n9040_ ) -NET_13718 = NAND ( new_n9273_, new_n9270_, new_n9269_, new_n9268_ ) -new_n9275_ = NAND ( new_n4131_, new_n2290_ ) -new_n9276_ = OR ( NET_309, new_n2087_ ) -new_n9277_ = OR ( new_n4136_, new_n2056_ ) -new_n9278_ = NAND ( new_n9277_, new_n9276_ ) -new_n9279_ = OR ( new_n9278_, new_n2290_ ) -new_n9280_ = NAND ( new_n9279_, new_n9275_ ) -new_n9281_ = OR ( new_n9280_, new_n2309_ ) -new_n9282_ = NAND ( new_n9034_, new_n2274_ ) -new_n9283_ = NAND ( new_n9278_, new_n2325_ ) -new_n9284_ = OR ( new_n2328_, new_n9032_ ) -new_n9285_ = OR ( new_n2330_, new_n9030_ ) -new_n9286_ = AND ( new_n9285_, new_n9284_, new_n9283_ ) -new_n9287_ = NAND ( new_n9286_, new_n9282_, new_n9281_ ) -new_n9288_ = XOR ( new_n9287_, new_n2218_ ) -new_n9289_ = OR ( new_n9280_, new_n2273_ ) -new_n9290_ = NAND ( new_n9034_, new_n2336_ ) -new_n9291_ = NAND ( new_n9278_, new_n2339_ ) -new_n9292_ = OR ( new_n2323_, new_n9032_ ) -new_n9293_ = OR ( new_n2324_, new_n9030_ ) -new_n9294_ = AND ( new_n9293_, new_n9292_, new_n9291_ ) -new_n9295_ = NAND ( new_n9294_, new_n9290_, new_n9289_ ) -new_n9296_ = OR ( new_n9295_, new_n9288_ ) -new_n9297_ = NAND ( new_n9295_, new_n9288_ ) -new_n9298_ = NAND ( new_n9297_, new_n9296_ ) -new_n9299_ = NAND ( new_n9006_, new_n9002_ ) -new_n9300_ = NAND ( new_n9299_, new_n9003_ ) -new_n9301_ = XOR ( new_n9300_, new_n9298_ ) -new_n9302_ = NOR ( new_n9301_, new_n2390_ ) -new_n9303_ = OR ( new_n9280_, new_n2349_ ) -new_n9304_ = NAND ( new_n9034_, new_n2349_ ) -new_n9305_ = NAND ( new_n9304_, new_n9303_ ) -new_n9306_ = XOR ( new_n9305_, new_n2349_ ) -new_n9307_ = OR ( new_n9280_, new_n2348_ ) -new_n9308_ = NAND ( new_n9307_, new_n9306_ ) -new_n9309_ = OR ( new_n9307_, new_n9306_ ) -new_n9310_ = NAND ( new_n9309_, new_n9308_ ) -new_n9311_ = NAND ( new_n9018_, new_n9014_ ) -new_n9312_ = NAND ( new_n9311_, new_n9015_ ) -new_n9313_ = XOR ( new_n9312_, new_n9310_ ) -new_n9314_ = NOR ( new_n9313_, new_n2393_ ) -new_n9315_ = OR ( new_n9280_, new_n2412_ ) -new_n9316_ = NAND ( new_n9028_, new_n3025_ ) -new_n9317_ = NAND ( new_n2250_, new_n2248_, NET_361 ) -new_n9318_ = NOT ( NET_513 ) -new_n9319_ = XOR ( new_n9027_, new_n9318_ ) -new_n9320_ = NAND ( new_n9319_, new_n2228_ ) -new_n9321_ = NOT ( NET_425 ) -new_n9322_ = OR ( new_n2238_, new_n9321_ ) -new_n9323_ = NOT ( NET_393 ) -new_n9324_ = OR ( new_n2245_, new_n9323_ ) -new_n9325_ = NAND ( new_n9324_, new_n9322_, new_n9320_, new_n9317_ ) -new_n9326_ = NAND ( new_n9325_, new_n2416_ ) -new_n9327_ = NAND ( new_n9028_, new_n2384_ ) -new_n9328_ = NAND ( new_n8722_, new_n3029_ ) -new_n9329_ = NAND ( new_n9328_, new_n9327_, new_n9326_ ) -new_n9330_ = NAND ( new_n9329_, new_n2415_ ) -new_n9331_ = OR ( NET_520, new_n9024_ ) -new_n9332_ = NAND ( new_n9331_, new_n9330_, new_n9316_, new_n9315_ ) -NET_13719 = OR ( new_n9332_, new_n9314_, new_n9302_ ) -new_n9334_ = NOR ( new_n9007_, new_n3037_ ) -new_n9335_ = OR ( new_n9019_, new_n3041_ ) -new_n9336_ = OR ( new_n8986_, new_n3045_ ) -new_n9337_ = NAND ( new_n8333_, new_n2966_ ) -new_n9338_ = NAND ( new_n9034_, new_n2367_ ) -new_n9339_ = NAND ( new_n9338_, new_n9337_, new_n9336_, new_n9335_ ) -new_n9340_ = NOR ( new_n9339_, new_n9334_ ) -new_n9341_ = OR ( new_n9340_, new_n3053_ ) -new_n9342_ = NAND ( new_n3053_, NET_359 ) -NET_13721 = NAND ( new_n9342_, new_n9341_ ) -new_n9344_ = OR ( new_n9340_, new_n3707_ ) -new_n9345_ = OR ( new_n3057_, new_n8720_ ) -NET_13722 = NAND ( new_n9345_, new_n9344_ ) -new_n9347_ = OR ( new_n9301_, new_n2208_ ) -new_n9348_ = OR ( new_n9313_, new_n2362_ ) -new_n9349_ = OR ( new_n9280_, new_n2364_ ) -new_n9350_ = NAND ( new_n9325_, new_n2369_ ) -new_n9351_ = NAND ( new_n8722_, new_n2968_ ) -new_n9352_ = NAND ( new_n2196_, NET_424 ) -new_n9353_ = NAND ( new_n9028_, new_n2380_ ) -new_n9354_ = AND ( new_n9353_, new_n9352_, new_n9351_, new_n9350_ ) -NET_13777 = NAND ( new_n9354_, new_n9349_, new_n9348_, new_n9347_ ) -new_n9356_ = NOR ( new_n3161_, new_n3158_ ) -new_n9357_ = XOR ( new_n9356_, new_n3156_ ) -new_n9358_ = NAND ( new_n9357_, new_n1530_ ) -new_n9359_ = OR ( new_n1530_, new_n4419_ ) -new_n9360_ = NAND ( new_n9359_, new_n9358_ ) -new_n9361_ = OR ( new_n9360_, new_n2735_ ) -new_n9362_ = OR ( new_n2543_, new_n2495_ ) -new_n9363_ = NAND ( new_n9362_, new_n9361_ ) -new_n9364_ = OR ( new_n9363_, new_n2524_ ) -new_n9365_ = NOT ( new_n9109_ ) -new_n9366_ = OR ( new_n9365_, new_n2578_ ) -new_n9367_ = OR ( new_n2613_, new_n2506_ ) -new_n9368_ = NAND ( new_n9367_, new_n9366_, new_n9364_ ) -new_n9369_ = XOR ( new_n9368_, new_n2618_ ) -new_n9370_ = OR ( new_n9363_, new_n2578_ ) -new_n9371_ = NAND ( new_n9109_, new_n2620_ ) -new_n9372_ = NOR ( new_n2624_, new_n9105_ ) -new_n9373_ = NOR ( new_n2626_, new_n9107_ ) -new_n9374_ = NOR ( new_n9373_, new_n9372_ ) -new_n9375_ = NAND ( new_n9374_, new_n9371_, new_n9370_ ) -new_n9376_ = OR ( new_n9375_, new_n9369_ ) -new_n9377_ = NAND ( new_n9375_, new_n9369_ ) -new_n9378_ = NAND ( new_n9377_, new_n9376_ ) -new_n9379_ = NAND ( new_n9093_, new_n9089_ ) -new_n9380_ = NAND ( new_n9379_, new_n9090_ ) -new_n9381_ = XOR ( new_n9380_, new_n9378_ ) -new_n9382_ = NOR ( new_n9381_, new_n3202_ ) -new_n9383_ = OR ( new_n2732_, new_n2506_ ) -new_n9384_ = NAND ( new_n9360_, new_n2543_ ) -new_n9385_ = NAND ( new_n9384_, new_n9383_ ) -new_n9386_ = NAND ( new_n9385_, new_n3240_ ) -new_n9387_ = NAND ( new_n8821_, new_n3253_ ) -new_n9388_ = NAND ( new_n3197_, NET_606 ) -new_n9389_ = NAND ( new_n2596_, new_n2591_, NET_671 ) -new_n9390_ = NAND ( new_n2603_, new_n2601_, NET_639 ) -new_n9391_ = NAND ( new_n2609_, new_n2607_, NET_607 ) -new_n9392_ = XOR ( new_n7080_, NET_744 ) -new_n9393_ = NAND ( new_n9392_, new_n2587_ ) -new_n9394_ = NAND ( new_n9393_, new_n9391_, new_n9390_, new_n9389_ ) -new_n9395_ = NAND ( new_n9394_, new_n3243_ ) -new_n9396_ = NAND ( new_n9395_, new_n9388_, new_n9387_, new_n9386_ ) -NET_13793 = OR ( new_n9396_, new_n9382_ ) -new_n9398_ = NOR ( new_n9381_, new_n3264_ ) -new_n9399_ = NAND ( new_n9385_, new_n3266_ ) -new_n9400_ = NAND ( new_n8821_, new_n3271_ ) -new_n9401_ = NAND ( new_n3262_, NET_638 ) -new_n9402_ = NAND ( new_n9394_, new_n3269_ ) -new_n9403_ = NAND ( new_n9402_, new_n9401_, new_n9400_, new_n9399_ ) -NET_13794 = OR ( new_n9403_, new_n9398_ ) -new_n9405_ = NOR ( new_n9381_, new_n3767_ ) -new_n9406_ = AND ( new_n9385_, new_n2744_ ) -new_n9407_ = NAND ( new_n2713_, NET_670 ) -new_n9408_ = NAND ( new_n9394_, new_n2765_ ) -new_n9409_ = NAND ( new_n8821_, new_n2756_ ) -new_n9410_ = NAND ( new_n9103_, new_n2758_ ) -new_n9411_ = NAND ( new_n9410_, new_n9409_, new_n9408_, new_n9407_ ) -NET_13795 = OR ( new_n9411_, new_n9406_, new_n9405_ ) -new_n9413_ = NOR ( new_n9381_, new_n3276_ ) -new_n9414_ = OR ( new_n9137_, new_n9133_ ) -new_n9415_ = OR ( new_n3283_, new_n9105_ ) -new_n9416_ = NAND ( new_n3287_, NET_638 ) -new_n9417_ = NAND ( new_n9416_, new_n9415_ ) -new_n9418_ = OR ( new_n9417_, new_n2506_ ) -new_n9419_ = NAND ( new_n9417_, new_n2506_ ) -new_n9420_ = NAND ( new_n9419_, new_n9418_, new_n9414_, new_n9132_ ) -new_n9421_ = NAND ( new_n9137_, new_n9132_ ) -new_n9422_ = NAND ( new_n9419_, new_n9418_ ) -new_n9423_ = NAND ( new_n9422_, new_n9421_, new_n9134_ ) -new_n9424_ = NAND ( new_n9423_, new_n9420_ ) -new_n9425_ = NAND ( new_n9424_, new_n3316_ ) -new_n9426_ = NAND ( new_n3323_, new_n2495_ ) -new_n9427_ = OR ( new_n3314_, new_n1525_ ) -new_n9428_ = OR ( NET_765, new_n9102_ ) -new_n9429_ = NAND ( new_n9428_, new_n9427_, new_n9426_, new_n9425_ ) -NET_13796 = OR ( new_n9429_, new_n9413_ ) -new_n9431_ = OR ( new_n9381_, new_n3339_ ) -new_n9432_ = NAND ( new_n9385_, new_n3361_ ) -new_n9433_ = OR ( new_n9363_, new_n3364_ ) -new_n9434_ = NAND ( new_n9103_, new_n3350_ ) -new_n9435_ = NAND ( new_n9394_, new_n3352_ ) -new_n9436_ = NAND ( new_n9103_, new_n3193_ ) -new_n9437_ = NAND ( new_n8821_, new_n3355_ ) -new_n9438_ = NAND ( new_n9437_, new_n9436_, new_n9435_ ) -new_n9439_ = NAND ( new_n9438_, new_n3359_ ) -new_n9440_ = AND ( new_n9439_, new_n9434_, new_n9428_ ) -NET_13797 = NAND ( new_n9440_, new_n9433_, new_n9432_, new_n9431_ ) -new_n9442_ = NAND ( new_n4431_, new_n1921_ ) -new_n9443_ = OR ( new_n1921_, new_n1728_ ) -new_n9444_ = NAND ( new_n9443_, new_n9442_ ) -new_n9445_ = NOT ( new_n9444_ ) -new_n9446_ = NAND ( new_n9445_, new_n1942_ ) -new_n9447_ = NAND ( new_n9199_, new_n1870_ ) -new_n9448_ = NAND ( new_n1953_, new_n1728_ ) -new_n9449_ = NAND ( new_n9448_, new_n9447_, new_n9446_ ) -new_n9450_ = XOR ( new_n9449_, new_n1844_ ) -new_n9451_ = NAND ( new_n9445_, new_n1870_ ) -new_n9452_ = NAND ( new_n9199_, new_n1960_ ) -new_n9453_ = NOR ( new_n1951_, new_n9197_ ) -new_n9454_ = NOR ( new_n1952_, new_n9195_ ) -new_n9455_ = NOR ( new_n9454_, new_n9453_ ) -new_n9456_ = NAND ( new_n9455_, new_n9452_, new_n9451_ ) -new_n9457_ = OR ( new_n9456_, new_n9450_ ) -new_n9458_ = NAND ( new_n9456_, new_n9450_ ) -new_n9459_ = NAND ( new_n9458_, new_n9457_ ) -new_n9460_ = NAND ( new_n9178_, new_n9174_ ) -new_n9461_ = NAND ( new_n9460_, new_n9175_ ) -new_n9462_ = XOR ( new_n9461_, new_n9459_ ) -new_n9463_ = OR ( new_n9462_, new_n1840_ ) -new_n9464_ = NAND ( new_n9199_, new_n1976_ ) -new_n9465_ = AND ( new_n9445_, new_n1978_ ) -new_n9466_ = OR ( new_n9465_, new_n9464_ ) -new_n9467_ = NAND ( new_n9465_, new_n9464_ ) -new_n9468_ = NAND ( new_n9467_, new_n9466_ ) -new_n9469_ = NAND ( new_n9187_, new_n9183_ ) -new_n9470_ = NAND ( new_n9469_, new_n9184_ ) -new_n9471_ = XNOR ( new_n9470_, new_n9468_ ) -new_n9472_ = OR ( new_n9471_, new_n1975_ ) -new_n9473_ = OR ( new_n9444_, new_n1989_ ) -new_n9474_ = NAND ( new_n1886_, new_n1882_, NET_181 ) -new_n9475_ = NAND ( new_n1894_, new_n1892_, NET_149 ) -new_n9476_ = NAND ( new_n1901_, new_n1898_, NET_117 ) -new_n9477_ = NOT ( NET_254 ) -new_n9478_ = OR ( new_n8904_, new_n9192_, new_n8903_ ) -new_n9479_ = NAND ( new_n9478_, new_n9477_ ) -new_n9480_ = OR ( new_n9478_, new_n9477_ ) -new_n9481_ = AND ( new_n9480_, new_n9479_ ) -new_n9482_ = NAND ( new_n9481_, new_n1878_ ) -new_n9483_ = NAND ( new_n9482_, new_n9476_, new_n9475_, new_n9474_ ) -new_n9484_ = NAND ( new_n9483_, new_n1994_ ) -new_n9485_ = NAND ( new_n8913_, new_n3867_ ) -new_n9486_ = NAND ( new_n1838_, NET_180 ) -new_n9487_ = NAND ( new_n9193_, new_n2005_ ) -new_n9488_ = AND ( new_n9487_, new_n9486_, new_n9485_, new_n9484_ ) -NET_13824 = NAND ( new_n9488_, new_n9473_, new_n9472_, new_n9463_ ) -new_n9490_ = OR ( new_n9179_, new_n2778_ ) -new_n9491_ = NAND ( new_n9160_, new_n4082_ ) -new_n9492_ = OR ( new_n1914_, new_n8911_ ) -new_n9493_ = NAND ( new_n1914_, NET_179 ) -new_n9494_ = NAND ( new_n9493_, new_n9492_ ) -new_n9495_ = NOR ( new_n9494_, new_n9160_ ) -new_n9496_ = NOT ( new_n9495_ ) -new_n9497_ = NAND ( new_n9494_, new_n9160_ ) -new_n9498_ = NAND ( new_n9497_, new_n9496_ ) -new_n9499_ = NAND ( new_n9217_, new_n9212_ ) -new_n9500_ = NAND ( new_n9499_, new_n9211_ ) -new_n9501_ = XNOR ( new_n9500_, new_n9498_ ) -new_n9502_ = OR ( new_n9501_, new_n2789_ ) -new_n9503_ = NAND ( new_n9502_, new_n9491_, new_n9490_ ) -new_n9504_ = AND ( new_n9503_, new_n2796_ ) -new_n9505_ = OR ( new_n9501_, new_n2804_ ) -new_n9506_ = NAND ( new_n9160_, new_n2798_ ) -new_n9507_ = NAND ( new_n2794_, new_n1947_, NET_275, NET_194 ) -new_n9508_ = NAND ( new_n9507_, new_n9506_, new_n9505_, new_n9236_ ) -NET_13825 = OR ( new_n9508_, new_n9504_ ) -new_n9510_ = NOR ( new_n9462_, new_n2016_ ) -new_n9511_ = NOR ( new_n9471_, new_n2020_ ) -new_n9512_ = OR ( new_n9444_, new_n2039_ ) -new_n9513_ = NAND ( new_n9193_, new_n2853_ ) -new_n9514_ = NAND ( new_n9483_, new_n2043_ ) -new_n9515_ = NAND ( new_n9193_, new_n2009_ ) -new_n9516_ = NAND ( new_n8913_, new_n2864_ ) -new_n9517_ = NAND ( new_n9516_, new_n9515_, new_n9514_ ) -new_n9518_ = NAND ( new_n9517_, new_n2042_ ) -new_n9519_ = OR ( NET_275, new_n9192_ ) -new_n9520_ = NAND ( new_n9519_, new_n9518_, new_n9513_, new_n9512_ ) -NET_13826 = OR ( new_n9520_, new_n9511_, new_n9510_ ) -new_n9522_ = NOR ( new_n9179_, new_n2873_ ) -new_n9523_ = NOT ( new_n9188_ ) -new_n9524_ = NAND ( new_n9523_, new_n2878_ ) -new_n9525_ = OR ( new_n9162_, new_n4269_ ) -new_n9526_ = NAND ( new_n8588_, new_n3644_ ) -new_n9527_ = NAND ( new_n9199_, new_n1992_ ) -new_n9528_ = NAND ( new_n9527_, new_n9526_, new_n9525_, new_n9524_ ) -new_n9529_ = NOR ( new_n9528_, new_n9522_ ) -new_n9530_ = OR ( new_n9529_, new_n2891_ ) -new_n9531_ = NAND ( new_n2891_, NET_115 ) -NET_13827 = NAND ( new_n9531_, new_n9530_ ) -new_n9533_ = OR ( new_n9529_, new_n2900_ ) -new_n9534_ = NAND ( new_n2900_, NET_147 ) -NET_13828 = NAND ( new_n9534_, new_n9533_ ) -new_n9536_ = OR ( new_n9301_, new_n2983_ ) -new_n9537_ = NAND ( new_n9278_, new_n2988_ ) -new_n9538_ = OR ( new_n2991_, new_n9032_ ) -new_n9539_ = OR ( new_n2287_, new_n9030_ ) -new_n9540_ = NAND ( new_n9539_, new_n9538_ ) -new_n9541_ = NAND ( new_n9540_, new_n9278_ ) -new_n9542_ = NOR ( new_n9540_, new_n9278_ ) -new_n9543_ = NOT ( new_n9542_ ) -new_n9544_ = NAND ( new_n9543_, new_n9541_ ) -new_n9545_ = NAND ( new_n9264_, new_n9258_ ) -new_n9546_ = NAND ( new_n9545_, new_n9259_ ) -new_n9547_ = XNOR ( new_n9546_, new_n9544_ ) -new_n9548_ = OR ( new_n9547_, new_n2999_ ) -new_n9549_ = NAND ( new_n9548_, new_n9537_, new_n9536_ ) -new_n9550_ = NAND ( new_n9549_, new_n3006_ ) -new_n9551_ = OR ( new_n9301_, new_n3008_ ) -new_n9552_ = OR ( new_n9547_, new_n3016_ ) -new_n9553_ = NAND ( new_n9278_, new_n3012_ ) -new_n9554_ = NAND ( new_n3004_, new_n2405_, NET_520, NET_439 ) -new_n9555_ = AND ( new_n9554_, new_n9553_, new_n9331_ ) -NET_13837 = NAND ( new_n9555_, new_n9552_, new_n9551_, new_n9550_ ) -new_n9557_ = NAND ( new_n4496_, new_n2290_ ) -new_n9558_ = NAND ( new_n2289_, new_n2181_ ) -new_n9559_ = NAND ( new_n9558_, new_n9557_ ) -new_n9560_ = OR ( new_n9559_, new_n2309_ ) -new_n9561_ = NAND ( new_n9325_, new_n2274_ ) -new_n9562_ = NAND ( new_n2325_, new_n2137_ ) -new_n9563_ = OR ( new_n2328_, new_n9323_ ) -new_n9564_ = OR ( new_n2330_, new_n9321_ ) -new_n9565_ = AND ( new_n9564_, new_n9563_, new_n9562_ ) -new_n9566_ = NAND ( new_n9565_, new_n9561_, new_n9560_ ) -new_n9567_ = XOR ( new_n9566_, new_n2218_ ) -new_n9568_ = OR ( new_n9559_, new_n2273_ ) -new_n9569_ = NAND ( new_n9325_, new_n2336_ ) -new_n9570_ = OR ( new_n2338_, new_n2181_ ) -new_n9571_ = NOR ( new_n2323_, new_n9323_ ) -new_n9572_ = NOR ( new_n2324_, new_n9321_ ) -new_n9573_ = NOR ( new_n9572_, new_n9571_ ) -new_n9574_ = NAND ( new_n9573_, new_n9570_, new_n9569_, new_n9568_ ) -new_n9575_ = OR ( new_n9574_, new_n9567_ ) -new_n9576_ = NAND ( new_n9574_, new_n9567_ ) -new_n9577_ = NAND ( new_n9576_, new_n9575_ ) -new_n9578_ = NAND ( new_n9300_, new_n9296_ ) -new_n9579_ = NAND ( new_n9578_, new_n9297_ ) -new_n9580_ = XOR ( new_n9579_, new_n9577_ ) -new_n9581_ = NOR ( new_n9580_, new_n2390_ ) -new_n9582_ = OR ( new_n9559_, new_n2349_ ) -new_n9583_ = NAND ( new_n9325_, new_n2349_ ) -new_n9584_ = NAND ( new_n9583_, new_n9582_ ) -new_n9585_ = XOR ( new_n9584_, new_n2349_ ) -new_n9586_ = OR ( new_n9559_, new_n2348_ ) -new_n9587_ = NAND ( new_n9586_, new_n9585_ ) -new_n9588_ = OR ( new_n9586_, new_n9585_ ) -new_n9589_ = NAND ( new_n9588_, new_n9587_ ) -new_n9590_ = NAND ( new_n9312_, new_n9308_ ) -new_n9591_ = NAND ( new_n9590_, new_n9309_ ) -new_n9592_ = XOR ( new_n9591_, new_n9589_ ) -new_n9593_ = NOR ( new_n9592_, new_n2393_ ) -new_n9594_ = OR ( new_n9559_, new_n2412_ ) -new_n9595_ = NAND ( new_n9319_, new_n3025_ ) -new_n9596_ = NAND ( new_n2237_, new_n2232_, NET_426 ) -new_n9597_ = NAND ( new_n2244_, new_n2242_, NET_394 ) -new_n9598_ = NAND ( new_n2250_, new_n2248_, NET_362 ) -new_n9599_ = NOT ( NET_499 ) -new_n9600_ = OR ( new_n9025_, new_n9318_, new_n9024_ ) -new_n9601_ = NAND ( new_n9600_, new_n9599_ ) -new_n9602_ = OR ( new_n9600_, new_n9599_ ) -new_n9603_ = AND ( new_n9602_, new_n9601_ ) -new_n9604_ = NAND ( new_n9603_, new_n2228_ ) -new_n9605_ = NAND ( new_n9604_, new_n9598_, new_n9597_, new_n9596_ ) -new_n9606_ = NAND ( new_n9605_, new_n2416_ ) -new_n9607_ = NAND ( new_n9319_, new_n2384_ ) -new_n9608_ = NAND ( new_n9034_, new_n3029_ ) -new_n9609_ = NAND ( new_n9608_, new_n9607_, new_n9606_ ) -new_n9610_ = NAND ( new_n9609_, new_n2415_ ) -new_n9611_ = OR ( NET_520, new_n9318_ ) -new_n9612_ = NAND ( new_n9611_, new_n9610_, new_n9595_, new_n9594_ ) -NET_13838 = OR ( new_n9612_, new_n9593_, new_n9581_ ) -new_n9614_ = NOR ( new_n9301_, new_n3037_ ) -new_n9615_ = OR ( new_n9313_, new_n3041_ ) -new_n9616_ = OR ( new_n9280_, new_n3045_ ) -new_n9617_ = NAND ( new_n8722_, new_n2966_ ) -new_n9618_ = NAND ( new_n9325_, new_n2367_ ) -new_n9619_ = NAND ( new_n9618_, new_n9617_, new_n9616_, new_n9615_ ) -new_n9620_ = NOR ( new_n9619_, new_n9614_ ) -new_n9621_ = OR ( new_n9620_, new_n3053_ ) -new_n9622_ = NAND ( new_n3053_, NET_360 ) -NET_13839 = NAND ( new_n9622_, new_n9621_ ) -new_n9624_ = OR ( new_n9620_, new_n3707_ ) -new_n9625_ = OR ( new_n3057_, new_n9032_ ) -NET_13840 = NAND ( new_n9625_, new_n9624_ ) -new_n9627_ = OR ( new_n9580_, new_n2208_ ) -new_n9628_ = OR ( new_n9592_, new_n2362_ ) -new_n9629_ = OR ( new_n9559_, new_n2364_ ) -new_n9630_ = NAND ( new_n9605_, new_n2369_ ) -new_n9631_ = NAND ( new_n9034_, new_n2968_ ) -new_n9632_ = NAND ( new_n2196_, NET_425 ) -new_n9633_ = NAND ( new_n9319_, new_n2380_ ) -new_n9634_ = AND ( new_n9633_, new_n9632_, new_n9631_, new_n9630_ ) -NET_13887 = NAND ( new_n9634_, new_n9629_, new_n9628_, new_n9627_ ) -new_n9636_ = OR ( new_n3167_, new_n3164_ ) -new_n9637_ = XOR ( new_n9636_, new_n3162_ ) -new_n9638_ = NAND ( new_n9637_, new_n1530_ ) -new_n9639_ = OR ( new_n1530_, NET_12 ) -new_n9640_ = NAND ( new_n9639_, new_n9638_ ) -new_n9641_ = NOR ( new_n9640_, new_n2735_ ) -new_n9642_ = NAND ( new_n9641_, new_n4328_ ) -new_n9643_ = NAND ( new_n9394_, new_n2579_ ) -new_n9644_ = NAND ( new_n9643_, new_n9642_, new_n9367_ ) -new_n9645_ = XOR ( new_n9644_, new_n2618_ ) -new_n9646_ = NAND ( new_n9641_, new_n2579_ ) -new_n9647_ = NAND ( new_n9394_, new_n2620_ ) -new_n9648_ = NAND ( new_n9647_, new_n9646_, new_n9374_ ) -new_n9649_ = OR ( new_n9648_, new_n9645_ ) -new_n9650_ = NAND ( new_n9648_, new_n9645_ ) -new_n9651_ = NAND ( new_n9650_, new_n9649_ ) -new_n9652_ = NAND ( new_n9380_, new_n9376_ ) -new_n9653_ = NAND ( new_n9652_, new_n9377_ ) -new_n9654_ = XOR ( new_n9653_, new_n9651_ ) -new_n9655_ = NOR ( new_n9654_, new_n3202_ ) -new_n9656_ = NAND ( new_n9641_, new_n3240_ ) -new_n9657_ = NAND ( new_n9109_, new_n3253_ ) -new_n9658_ = NAND ( new_n3197_, NET_607 ) -new_n9659_ = NAND ( new_n2596_, new_n2591_, NET_672 ) -new_n9660_ = NAND ( new_n2603_, new_n2601_, NET_640 ) -new_n9661_ = NAND ( new_n2609_, new_n2607_, NET_608 ) -new_n9662_ = NOT ( NET_754 ) -new_n9663_ = XOR ( new_n7081_, new_n9662_ ) -new_n9664_ = NAND ( new_n9663_, new_n2587_ ) -new_n9665_ = NAND ( new_n9664_, new_n9661_, new_n9660_, new_n9659_ ) -new_n9666_ = NAND ( new_n9665_, new_n3243_ ) -new_n9667_ = NAND ( new_n9666_, new_n9658_, new_n9657_, new_n9656_ ) -NET_13899 = OR ( new_n9667_, new_n9655_ ) -new_n9669_ = NOR ( new_n9654_, new_n3264_ ) -new_n9670_ = NAND ( new_n9641_, new_n3266_ ) -new_n9671_ = NAND ( new_n9109_, new_n3271_ ) -new_n9672_ = NAND ( new_n3262_, NET_639 ) -new_n9673_ = NAND ( new_n9665_, new_n3269_ ) -new_n9674_ = NAND ( new_n9673_, new_n9672_, new_n9671_, new_n9670_ ) -NET_13900 = OR ( new_n9674_, new_n9669_ ) -new_n9676_ = NOR ( new_n9654_, new_n3767_ ) -new_n9677_ = AND ( new_n9641_, new_n2744_ ) -new_n9678_ = NAND ( new_n2713_, NET_671 ) -new_n9679_ = NAND ( new_n9665_, new_n2765_ ) -new_n9680_ = NAND ( new_n9109_, new_n2756_ ) -new_n9681_ = NAND ( new_n9392_, new_n2758_ ) -new_n9682_ = NAND ( new_n9681_, new_n9680_, new_n9679_, new_n9678_ ) -NET_13901 = OR ( new_n9682_, new_n9677_, new_n9676_ ) -new_n9684_ = NOR ( new_n9654_, new_n3339_ ) -new_n9685_ = NAND ( new_n3185_, new_n2742_ ) -new_n9686_ = AND ( new_n9685_, new_n2701_ ) -new_n9687_ = NOR ( new_n9686_, new_n2711_ ) -new_n9688_ = NAND ( new_n9687_, new_n9641_ ) -new_n9689_ = NAND ( new_n9392_, new_n3350_ ) -new_n9690_ = NAND ( new_n9665_, new_n3352_ ) -new_n9691_ = NAND ( new_n9392_, new_n3193_ ) -new_n9692_ = NAND ( new_n9109_, new_n3355_ ) -new_n9693_ = NAND ( new_n9692_, new_n9691_, new_n9690_ ) -new_n9694_ = NAND ( new_n9693_, new_n3359_ ) -new_n9695_ = OR ( NET_765, new_n7070_ ) -new_n9696_ = NAND ( new_n9695_, new_n9694_, new_n9689_, new_n9688_ ) -NET_13902 = OR ( new_n9696_, new_n9684_ ) -new_n9698_ = NOT ( new_n1921_ ) -new_n9699_ = NOR ( new_n4709_, new_n9698_ ) -new_n9700_ = NAND ( new_n9699_, new_n1942_ ) -new_n9701_ = NAND ( new_n9483_, new_n1870_ ) -new_n9702_ = NAND ( new_n9701_, new_n9700_, new_n9448_ ) -new_n9703_ = XOR ( new_n9702_, new_n1844_ ) -new_n9704_ = NAND ( new_n9699_, new_n1870_ ) -new_n9705_ = NAND ( new_n9483_, new_n1960_ ) -new_n9706_ = NAND ( new_n9705_, new_n9704_, new_n9455_ ) -new_n9707_ = OR ( new_n9706_, new_n9703_ ) -new_n9708_ = NAND ( new_n9706_, new_n9703_ ) -new_n9709_ = NAND ( new_n9708_, new_n9707_ ) -new_n9710_ = NAND ( new_n9461_, new_n9457_ ) -new_n9711_ = NAND ( new_n9710_, new_n9458_ ) -new_n9712_ = XOR ( new_n9711_, new_n9709_ ) -new_n9713_ = OR ( new_n9712_, new_n1840_ ) -new_n9714_ = NAND ( new_n9483_, new_n1976_ ) -new_n9715_ = NAND ( new_n1748_, new_n1725_, new_n1728_ ) -new_n9716_ = AND ( new_n9715_, new_n9699_ ) -new_n9717_ = OR ( new_n9716_, new_n9714_ ) -new_n9718_ = NAND ( new_n9716_, new_n9714_ ) -new_n9719_ = NAND ( new_n9718_, new_n9717_ ) -new_n9720_ = NAND ( new_n9470_, new_n9466_ ) -new_n9721_ = NAND ( new_n9720_, new_n9467_ ) -new_n9722_ = XNOR ( new_n9721_, new_n9719_ ) -new_n9723_ = OR ( new_n9722_, new_n1975_ ) -new_n9724_ = NAND ( new_n9699_, new_n6828_ ) -new_n9725_ = NAND ( new_n1886_, new_n1882_, NET_182 ) -new_n9726_ = NAND ( new_n1894_, new_n1892_, NET_150 ) -new_n9727_ = NAND ( new_n1901_, new_n1898_, NET_118 ) -new_n9728_ = NOT ( NET_264 ) -new_n9729_ = XOR ( new_n9480_, new_n9728_ ) -new_n9730_ = NAND ( new_n9729_, new_n1878_ ) -new_n9731_ = NAND ( new_n9730_, new_n9727_, new_n9726_, new_n9725_ ) -new_n9732_ = NAND ( new_n9731_, new_n1994_ ) -new_n9733_ = NAND ( new_n9199_, new_n3867_ ) -new_n9734_ = NAND ( new_n1838_, NET_181 ) -new_n9735_ = NAND ( new_n9481_, new_n2005_ ) -new_n9736_ = AND ( new_n9735_, new_n9734_, new_n9733_, new_n9732_ ) -NET_13922 = NAND ( new_n9736_, new_n9724_, new_n9723_, new_n9713_ ) -new_n9738_ = OR ( new_n9462_, new_n2778_ ) -new_n9739_ = OR ( new_n2783_, new_n1717_ ) -new_n9740_ = OR ( new_n9500_, new_n9495_ ) -new_n9741_ = OR ( new_n1914_, NET_148 ) -new_n9742_ = NAND ( new_n1914_, new_n9195_ ) -new_n9743_ = NAND ( new_n9742_, new_n9741_ ) -new_n9744_ = OR ( new_n9743_, new_n1728_ ) -new_n9745_ = NAND ( new_n9743_, new_n1728_ ) -new_n9746_ = NAND ( new_n9745_, new_n9744_, new_n9740_, new_n9497_ ) -new_n9747_ = NAND ( new_n9500_, new_n9497_ ) -new_n9748_ = NAND ( new_n9745_, new_n9744_ ) -new_n9749_ = NAND ( new_n9748_, new_n9747_, new_n9496_ ) -new_n9750_ = NAND ( new_n9749_, new_n9746_ ) -new_n9751_ = OR ( new_n9750_, new_n2789_ ) -new_n9752_ = NAND ( new_n9751_, new_n9739_, new_n9738_ ) -new_n9753_ = AND ( new_n9752_, new_n2796_ ) -new_n9754_ = OR ( new_n9750_, new_n2804_ ) -new_n9755_ = NOR ( new_n1833_, new_n1717_ ) -new_n9756_ = NAND ( new_n9755_, new_n2795_, new_n1920_, NET_275 ) -new_n9757_ = OR ( new_n2795_, new_n1527_ ) -new_n9758_ = NAND ( new_n9757_, new_n9756_, new_n9754_, new_n9519_ ) -NET_13923 = OR ( new_n9758_, new_n9753_ ) -new_n9760_ = NOR ( new_n9712_, new_n2016_ ) -new_n9761_ = NOR ( new_n9722_, new_n2020_ ) -new_n9762_ = NAND ( new_n2010_, new_n1988_ ) -new_n9763_ = AND ( new_n9762_, new_n1828_ ) -new_n9764_ = NOR ( new_n9763_, new_n2004_ ) -new_n9765_ = NAND ( new_n9764_, new_n9699_ ) -new_n9766_ = NAND ( new_n9481_, new_n2853_ ) -new_n9767_ = OR ( NET_275, new_n9477_ ) -new_n9768_ = NAND ( new_n9731_, new_n2043_ ) -new_n9769_ = NAND ( new_n9481_, new_n2009_ ) -new_n9770_ = NAND ( new_n9199_, new_n2864_ ) -new_n9771_ = NAND ( new_n9770_, new_n9769_, new_n9768_ ) -new_n9772_ = NAND ( new_n9771_, new_n2042_ ) -new_n9773_ = NAND ( new_n9772_, new_n9767_, new_n9766_, new_n9765_ ) -NET_13924 = OR ( new_n9773_, new_n9761_, new_n9760_ ) -new_n9775_ = NOR ( new_n9462_, new_n2873_ ) -new_n9776_ = NOT ( new_n9471_ ) -new_n9777_ = NAND ( new_n9776_, new_n2878_ ) -new_n9778_ = OR ( new_n9444_, new_n4269_ ) -new_n9779_ = NAND ( new_n8913_, new_n3644_ ) -new_n9780_ = NAND ( new_n9483_, new_n1992_ ) -new_n9781_ = NAND ( new_n9780_, new_n9779_, new_n9778_, new_n9777_ ) -new_n9782_ = NOR ( new_n9781_, new_n9775_ ) -new_n9783_ = OR ( new_n9782_, new_n2891_ ) -new_n9784_ = NAND ( new_n2891_, NET_116 ) -NET_13925 = NAND ( new_n9784_, new_n9783_ ) -new_n9786_ = OR ( new_n9782_, new_n2900_ ) -new_n9787_ = NAND ( new_n2900_, NET_148 ) -NET_13926 = NAND ( new_n9787_, new_n9786_ ) -new_n9789_ = OR ( new_n9580_, new_n2983_ ) -new_n9790_ = OR ( new_n2987_, new_n2181_ ) -new_n9791_ = OR ( new_n9546_, new_n9542_ ) -new_n9792_ = OR ( new_n2991_, new_n9323_ ) -new_n9793_ = OR ( new_n2287_, new_n9321_ ) -new_n9794_ = NAND ( new_n9793_, new_n9792_ ) -new_n9795_ = NAND ( new_n9794_, new_n2181_ ) -new_n9796_ = OR ( new_n9794_, new_n2181_ ) -new_n9797_ = NAND ( new_n9796_, new_n9795_, new_n9791_, new_n9541_ ) -new_n9798_ = NAND ( new_n9546_, new_n9541_ ) -new_n9799_ = NAND ( new_n9796_, new_n9795_ ) -new_n9800_ = NAND ( new_n9799_, new_n9798_, new_n9543_ ) -new_n9801_ = NAND ( new_n9800_, new_n9797_ ) -new_n9802_ = OR ( new_n9801_, new_n2999_ ) -new_n9803_ = NAND ( new_n9802_, new_n9790_, new_n9789_ ) -new_n9804_ = NAND ( new_n9803_, new_n3006_ ) -new_n9805_ = OR ( new_n9580_, new_n3008_ ) -new_n9806_ = OR ( new_n9801_, new_n3016_ ) -new_n9807_ = NAND ( new_n3012_, new_n2137_ ) -new_n9808_ = OR ( new_n3005_, new_n1528_ ) -new_n9809_ = AND ( new_n9808_, new_n9807_, new_n9611_ ) -NET_13933 = NAND ( new_n9809_, new_n9806_, new_n9805_, new_n9804_ ) -new_n9811_ = NOR ( new_n9580_, new_n3037_ ) -new_n9812_ = OR ( new_n9592_, new_n3041_ ) -new_n9813_ = OR ( new_n9559_, new_n3045_ ) -new_n9814_ = NAND ( new_n9034_, new_n2966_ ) -new_n9815_ = NAND ( new_n9605_, new_n2367_ ) -new_n9816_ = NAND ( new_n9815_, new_n9814_, new_n9813_, new_n9812_ ) -new_n9817_ = NOR ( new_n9816_, new_n9811_ ) -new_n9818_ = OR ( new_n9817_, new_n3053_ ) -new_n9819_ = NAND ( new_n3053_, NET_361 ) -NET_13934 = NAND ( new_n9819_, new_n9818_ ) -new_n9821_ = OR ( new_n9817_, new_n3707_ ) -new_n9822_ = OR ( new_n3057_, new_n9323_ ) -NET_13935 = NAND ( new_n9822_, new_n9821_ ) -new_n9824_ = NOT ( new_n2309_ ) -new_n9825_ = NOR ( new_n4822_, new_n2289_ ) -new_n9826_ = NAND ( new_n9825_, new_n9824_ ) -new_n9827_ = NAND ( new_n9605_, new_n2274_ ) -new_n9828_ = NAND ( new_n9827_, new_n9826_, new_n9562_ ) -new_n9829_ = XOR ( new_n9828_, new_n2218_ ) -new_n9830_ = NAND ( new_n9825_, new_n2274_ ) -new_n9831_ = NAND ( new_n9605_, new_n2336_ ) -new_n9832_ = NAND ( new_n9831_, new_n9830_, new_n9573_ ) -new_n9833_ = OR ( new_n9832_, new_n9829_ ) -new_n9834_ = NAND ( new_n9832_, new_n9829_ ) -new_n9835_ = NAND ( new_n9834_, new_n9833_ ) -new_n9836_ = NAND ( new_n9579_, new_n9575_ ) -new_n9837_ = NAND ( new_n9836_, new_n9576_ ) -new_n9838_ = XOR ( new_n9837_, new_n9835_ ) -new_n9839_ = OR ( new_n9838_, new_n2208_ ) -new_n9840_ = NAND ( new_n9825_, new_n2348_ ) -new_n9841_ = NAND ( new_n9605_, new_n2349_ ) -new_n9842_ = NAND ( new_n9841_, new_n9840_ ) -new_n9843_ = XOR ( new_n9842_, new_n2349_ ) -new_n9844_ = NAND ( new_n9825_, new_n2349_ ) -new_n9845_ = NAND ( new_n9844_, new_n9843_ ) -new_n9846_ = OR ( new_n9844_, new_n9843_ ) -new_n9847_ = NAND ( new_n9846_, new_n9845_ ) -new_n9848_ = NAND ( new_n9591_, new_n9587_ ) -new_n9849_ = NAND ( new_n9848_, new_n9588_ ) -new_n9850_ = XOR ( new_n9849_, new_n9847_ ) -new_n9851_ = OR ( new_n9850_, new_n2362_ ) -new_n9852_ = NOT ( new_n2364_ ) -new_n9853_ = NAND ( new_n9825_, new_n9852_ ) -new_n9854_ = NAND ( new_n2237_, new_n2232_, NET_427 ) -new_n9855_ = NAND ( new_n2244_, new_n2242_, NET_395 ) -new_n9856_ = NAND ( new_n2250_, new_n2248_, NET_363 ) -new_n9857_ = NOT ( NET_509 ) -new_n9858_ = XOR ( new_n9602_, new_n9857_ ) -new_n9859_ = NAND ( new_n9858_, new_n2228_ ) -new_n9860_ = NAND ( new_n9859_, new_n9856_, new_n9855_, new_n9854_ ) -new_n9861_ = NAND ( new_n9860_, new_n2369_ ) -new_n9862_ = NAND ( new_n9325_, new_n2968_ ) -new_n9863_ = NAND ( new_n2196_, NET_426 ) -new_n9864_ = NAND ( new_n9603_, new_n2380_ ) -new_n9865_ = AND ( new_n9864_, new_n9863_, new_n9862_, new_n9861_ ) -NET_13977 = NAND ( new_n9865_, new_n9853_, new_n9851_, new_n9839_ ) -new_n9867_ = NOR ( new_n9838_, new_n2390_ ) -new_n9868_ = NOR ( new_n9850_, new_n2393_ ) -new_n9869_ = NAND ( new_n2385_, new_n2314_ ) -new_n9870_ = AND ( new_n9869_, new_n2186_ ) -new_n9871_ = NOR ( new_n9870_, new_n2379_ ) -new_n9872_ = NAND ( new_n9871_, new_n9825_ ) -new_n9873_ = NAND ( new_n9603_, new_n3025_ ) -new_n9874_ = OR ( NET_520, new_n9599_ ) -new_n9875_ = NAND ( new_n9860_, new_n2416_ ) -new_n9876_ = NAND ( new_n9603_, new_n2384_ ) -new_n9877_ = NAND ( new_n9325_, new_n3029_ ) -new_n9878_ = NAND ( new_n9877_, new_n9876_, new_n9875_ ) -new_n9879_ = NAND ( new_n9878_, new_n2415_ ) -new_n9880_ = NAND ( new_n9879_, new_n9874_, new_n9873_, new_n9872_ ) -NET_13978 = OR ( new_n9880_, new_n9868_, new_n9867_ ) -new_n9882_ = NOR ( new_n3172_, new_n2735_ ) -new_n9883_ = NAND ( new_n9882_, new_n4328_ ) -new_n9884_ = NOT ( new_n9665_ ) -new_n9885_ = OR ( new_n9884_, new_n2578_ ) -new_n9886_ = NAND ( new_n9885_, new_n9883_, new_n9367_ ) -new_n9887_ = XOR ( new_n9886_, new_n2618_ ) -new_n9888_ = NAND ( new_n9882_, new_n2579_ ) -new_n9889_ = NAND ( new_n9665_, new_n2620_ ) -new_n9890_ = NAND ( new_n9889_, new_n9888_, new_n9374_ ) -new_n9891_ = OR ( new_n9890_, new_n9887_ ) -new_n9892_ = NAND ( new_n9890_, new_n9887_ ) -new_n9893_ = NAND ( new_n9892_, new_n9891_ ) -new_n9894_ = NAND ( new_n9653_, new_n9649_ ) -new_n9895_ = NAND ( new_n9894_, new_n9650_ ) -new_n9896_ = XOR ( new_n9895_, new_n9893_ ) -new_n9897_ = NOR ( new_n9896_, new_n3202_ ) -new_n9898_ = NAND ( new_n9882_, new_n3240_ ) -new_n9899_ = NAND ( new_n9394_, new_n3253_ ) -new_n9900_ = NAND ( new_n3197_, NET_608 ) -new_n9901_ = NAND ( new_n2596_, new_n2591_, NET_673 ) -new_n9902_ = NAND ( new_n2603_, new_n2601_, NET_641 ) -new_n9903_ = NAND ( new_n2609_, new_n2607_, NET_609 ) -new_n9904_ = NOT ( NET_742 ) -new_n9905_ = XOR ( new_n7082_, new_n9904_ ) -new_n9906_ = NAND ( new_n9905_, new_n2587_ ) -new_n9907_ = NAND ( new_n9906_, new_n9903_, new_n9902_, new_n9901_ ) -new_n9908_ = NAND ( new_n9907_, new_n3243_ ) -new_n9909_ = NAND ( new_n9908_, new_n9900_, new_n9899_, new_n9898_ ) -NET_13990 = OR ( new_n9909_, new_n9897_ ) -new_n9911_ = NOR ( new_n9896_, new_n3264_ ) -new_n9912_ = NAND ( new_n9882_, new_n3266_ ) -new_n9913_ = NAND ( new_n9394_, new_n3271_ ) -new_n9914_ = NAND ( new_n3262_, NET_640 ) -new_n9915_ = NAND ( new_n9907_, new_n3269_ ) -new_n9916_ = NAND ( new_n9915_, new_n9914_, new_n9913_, new_n9912_ ) -NET_13991 = OR ( new_n9916_, new_n9911_ ) -new_n9918_ = NOR ( new_n9896_, new_n3767_ ) -new_n9919_ = AND ( new_n9882_, new_n2744_ ) -new_n9920_ = NAND ( new_n2713_, NET_672 ) -new_n9921_ = NAND ( new_n9907_, new_n2765_ ) -new_n9922_ = NAND ( new_n9394_, new_n2756_ ) -new_n9923_ = NAND ( new_n9663_, new_n2758_ ) -new_n9924_ = NAND ( new_n9923_, new_n9922_, new_n9921_, new_n9920_ ) -NET_13992 = OR ( new_n9924_, new_n9919_, new_n9918_ ) -new_n9926_ = NOR ( new_n9896_, new_n3339_ ) -new_n9927_ = NAND ( new_n9882_, new_n9687_ ) -new_n9928_ = NAND ( new_n9663_, new_n3350_ ) -new_n9929_ = NAND ( new_n9907_, new_n3352_ ) -new_n9930_ = NAND ( new_n9663_, new_n3193_ ) -new_n9931_ = NAND ( new_n9394_, new_n3355_ ) -new_n9932_ = NAND ( new_n9931_, new_n9930_, new_n9929_ ) -new_n9933_ = NAND ( new_n9932_, new_n3359_ ) -new_n9934_ = OR ( NET_765, new_n9662_ ) -new_n9935_ = NAND ( new_n9934_, new_n9933_, new_n9928_, new_n9927_ ) -NET_13993 = OR ( new_n9935_, new_n9926_ ) -new_n9937_ = NOR ( new_n5063_, new_n9698_ ) -new_n9938_ = NAND ( new_n9937_, new_n1942_ ) -new_n9939_ = NAND ( new_n9731_, new_n1870_ ) -new_n9940_ = NAND ( new_n9939_, new_n9938_, new_n9448_ ) -new_n9941_ = XOR ( new_n9940_, new_n1844_ ) -new_n9942_ = NAND ( new_n9937_, new_n1870_ ) -new_n9943_ = NAND ( new_n9731_, new_n1960_ ) -new_n9944_ = NAND ( new_n9943_, new_n9942_, new_n9455_ ) -new_n9945_ = OR ( new_n9944_, new_n9941_ ) -new_n9946_ = NAND ( new_n9944_, new_n9941_ ) -new_n9947_ = NAND ( new_n9946_, new_n9945_ ) -new_n9948_ = NAND ( new_n9711_, new_n9707_ ) -new_n9949_ = NAND ( new_n9948_, new_n9708_ ) -new_n9950_ = XOR ( new_n9949_, new_n9947_ ) -new_n9951_ = OR ( new_n9950_, new_n1840_ ) -new_n9952_ = NAND ( new_n9731_, new_n1976_ ) -new_n9953_ = AND ( new_n9937_, new_n9715_ ) -new_n9954_ = OR ( new_n9953_, new_n9952_ ) -new_n9955_ = NAND ( new_n9953_, new_n9952_ ) -new_n9956_ = NAND ( new_n9955_, new_n9954_ ) -new_n9957_ = NAND ( new_n9721_, new_n9717_ ) -new_n9958_ = NAND ( new_n9957_, new_n9718_ ) -new_n9959_ = XNOR ( new_n9958_, new_n9956_ ) -new_n9960_ = OR ( new_n9959_, new_n1975_ ) -new_n9961_ = NAND ( new_n9937_, new_n6828_ ) -new_n9962_ = NAND ( new_n1886_, new_n1882_, NET_183 ) -new_n9963_ = NAND ( new_n1894_, new_n1892_, NET_151 ) -new_n9964_ = NAND ( new_n1901_, new_n1898_, NET_119 ) -new_n9965_ = NOR ( new_n9478_, new_n9728_, new_n9477_ ) -new_n9966_ = OR ( new_n9965_, NET_252 ) -new_n9967_ = NAND ( new_n9965_, NET_252 ) -new_n9968_ = AND ( new_n9967_, new_n9966_ ) -new_n9969_ = NAND ( new_n9968_, new_n1878_ ) -new_n9970_ = NAND ( new_n9969_, new_n9964_, new_n9963_, new_n9962_ ) -new_n9971_ = NAND ( new_n9970_, new_n1994_ ) -new_n9972_ = NAND ( new_n9483_, new_n3867_ ) -new_n9973_ = NAND ( new_n1838_, NET_182 ) -new_n9974_ = NAND ( new_n9729_, new_n2005_ ) -new_n9975_ = AND ( new_n9974_, new_n9973_, new_n9972_, new_n9971_ ) -NET_14015 = NAND ( new_n9975_, new_n9961_, new_n9960_, new_n9951_ ) -new_n9977_ = NOR ( new_n9950_, new_n2016_ ) -new_n9978_ = NOR ( new_n9959_, new_n2020_ ) -new_n9979_ = NAND ( new_n9937_, new_n9764_ ) -new_n9980_ = NAND ( new_n9729_, new_n2853_ ) -new_n9981_ = OR ( NET_275, new_n9728_ ) -new_n9982_ = NAND ( new_n9970_, new_n2043_ ) -new_n9983_ = NAND ( new_n9729_, new_n2009_ ) -new_n9984_ = NAND ( new_n9483_, new_n2864_ ) -new_n9985_ = NAND ( new_n9984_, new_n9983_, new_n9982_ ) -new_n9986_ = NAND ( new_n9985_, new_n2042_ ) -new_n9987_ = NAND ( new_n9986_, new_n9981_, new_n9980_, new_n9979_ ) -NET_14016 = OR ( new_n9987_, new_n9978_, new_n9977_ ) -new_n9989_ = NOR ( new_n9712_, new_n2873_ ) -new_n9990_ = NOT ( new_n9722_ ) -new_n9991_ = NAND ( new_n9990_, new_n2878_ ) -new_n9992_ = NAND ( new_n9699_, new_n2881_ ) -new_n9993_ = NAND ( new_n9199_, new_n3644_ ) -new_n9994_ = NAND ( new_n9731_, new_n1992_ ) -new_n9995_ = NAND ( new_n9994_, new_n9993_, new_n9992_, new_n9991_ ) -new_n9996_ = NOR ( new_n9995_, new_n9989_ ) -new_n9997_ = OR ( new_n9996_, new_n2891_ ) -new_n9998_ = NAND ( new_n2891_, NET_117 ) -NET_14017 = NAND ( new_n9998_, new_n9997_ ) -new_n10000_ = OR ( new_n9996_, new_n2900_ ) -new_n10001_ = NAND ( new_n2900_, NET_149 ) -NET_14018 = NAND ( new_n10001_, new_n10000_ ) -new_n10003_ = NOR ( new_n9838_, new_n3037_ ) -new_n10004_ = OR ( new_n9850_, new_n3041_ ) -new_n10005_ = NAND ( new_n9825_, new_n3044_ ) -new_n10006_ = NAND ( new_n9325_, new_n2966_ ) -new_n10007_ = NAND ( new_n9860_, new_n2367_ ) -new_n10008_ = NAND ( new_n10007_, new_n10006_, new_n10005_, new_n10004_ ) -new_n10009_ = NOR ( new_n10008_, new_n10003_ ) -new_n10010_ = OR ( new_n10009_, new_n3053_ ) -new_n10011_ = NAND ( new_n3053_, NET_362 ) -NET_14024 = NAND ( new_n10011_, new_n10010_ ) -new_n10013_ = OR ( new_n10009_, new_n3707_ ) -new_n10014_ = NAND ( new_n3707_, NET_394 ) -NET_14025 = NAND ( new_n10014_, new_n10013_ ) -new_n10016_ = NOR ( new_n5177_, new_n2289_ ) -new_n10017_ = NAND ( new_n10016_, new_n9824_ ) -new_n10018_ = NAND ( new_n9860_, new_n2274_ ) -new_n10019_ = NAND ( new_n10018_, new_n10017_, new_n9562_ ) -new_n10020_ = XOR ( new_n10019_, new_n2218_ ) -new_n10021_ = NAND ( new_n10016_, new_n2274_ ) -new_n10022_ = NAND ( new_n9860_, new_n2336_ ) -new_n10023_ = NAND ( new_n10022_, new_n10021_, new_n9573_ ) -new_n10024_ = OR ( new_n10023_, new_n10020_ ) -new_n10025_ = NAND ( new_n10023_, new_n10020_ ) -new_n10026_ = NAND ( new_n10025_, new_n10024_ ) -new_n10027_ = NAND ( new_n9837_, new_n9833_ ) -new_n10028_ = NAND ( new_n10027_, new_n9834_ ) -new_n10029_ = XOR ( new_n10028_, new_n10026_ ) -new_n10030_ = OR ( new_n10029_, new_n2208_ ) -new_n10031_ = NAND ( new_n10016_, new_n2348_ ) -new_n10032_ = NAND ( new_n9860_, new_n2349_ ) -new_n10033_ = NAND ( new_n10032_, new_n10031_ ) -new_n10034_ = XOR ( new_n10033_, new_n2349_ ) -new_n10035_ = NAND ( new_n10016_, new_n2349_ ) -new_n10036_ = NAND ( new_n10035_, new_n10034_ ) -new_n10037_ = OR ( new_n10035_, new_n10034_ ) -new_n10038_ = NAND ( new_n10037_, new_n10036_ ) -new_n10039_ = NAND ( new_n9849_, new_n9845_ ) -new_n10040_ = NAND ( new_n10039_, new_n9846_ ) -new_n10041_ = XOR ( new_n10040_, new_n10038_ ) -new_n10042_ = OR ( new_n10041_, new_n2362_ ) -new_n10043_ = NAND ( new_n10016_, new_n9852_ ) -new_n10044_ = NAND ( new_n2237_, new_n2232_, NET_428 ) -new_n10045_ = NAND ( new_n2244_, new_n2242_, NET_396 ) -new_n10046_ = NAND ( new_n2250_, new_n2248_, NET_364 ) -new_n10047_ = NOR ( new_n9600_, new_n9857_, new_n9599_ ) -new_n10048_ = OR ( new_n10047_, NET_497 ) -new_n10049_ = NAND ( new_n10047_, NET_497 ) -new_n10050_ = AND ( new_n10049_, new_n10048_ ) -new_n10051_ = NAND ( new_n10050_, new_n2228_ ) -new_n10052_ = NAND ( new_n10051_, new_n10046_, new_n10045_, new_n10044_ ) -new_n10053_ = NAND ( new_n10052_, new_n2369_ ) -new_n10054_ = NAND ( new_n9605_, new_n2968_ ) -new_n10055_ = NAND ( new_n2196_, NET_427 ) -new_n10056_ = NAND ( new_n9858_, new_n2380_ ) -new_n10057_ = AND ( new_n10056_, new_n10055_, new_n10054_, new_n10053_ ) -NET_14066 = NAND ( new_n10057_, new_n10043_, new_n10042_, new_n10030_ ) -new_n10059_ = NOR ( new_n10029_, new_n2390_ ) -new_n10060_ = NOR ( new_n10041_, new_n2393_ ) -new_n10061_ = NAND ( new_n10016_, new_n9871_ ) -new_n10062_ = NAND ( new_n9858_, new_n3025_ ) -new_n10063_ = OR ( NET_520, new_n9857_ ) -new_n10064_ = NAND ( new_n10052_, new_n2416_ ) -new_n10065_ = NAND ( new_n9858_, new_n2384_ ) -new_n10066_ = NAND ( new_n9605_, new_n3029_ ) -new_n10067_ = NAND ( new_n10066_, new_n10065_, new_n10064_ ) -new_n10068_ = NAND ( new_n10067_, new_n2415_ ) -new_n10069_ = NAND ( new_n10068_, new_n10063_, new_n10062_, new_n10061_ ) -NET_14067 = OR ( new_n10069_, new_n10060_, new_n10059_ ) -new_n10071_ = NOR ( new_n3989_, new_n2735_ ) -new_n10072_ = NAND ( new_n10071_, new_n4328_ ) -new_n10073_ = NAND ( new_n9907_, new_n2579_ ) -new_n10074_ = NAND ( new_n10073_, new_n10072_, new_n9367_ ) -new_n10075_ = XOR ( new_n10074_, new_n2618_ ) -new_n10076_ = NAND ( new_n10071_, new_n2579_ ) -new_n10077_ = NAND ( new_n9907_, new_n2620_ ) -new_n10078_ = NAND ( new_n10077_, new_n10076_, new_n9374_ ) -new_n10079_ = OR ( new_n10078_, new_n10075_ ) -new_n10080_ = NAND ( new_n10078_, new_n10075_ ) -new_n10081_ = NAND ( new_n10080_, new_n10079_ ) -new_n10082_ = NAND ( new_n9895_, new_n9891_ ) -new_n10083_ = NAND ( new_n10082_, new_n9892_ ) -new_n10084_ = XOR ( new_n10083_, new_n10081_ ) -new_n10085_ = NOR ( new_n10084_, new_n3202_ ) -new_n10086_ = NAND ( new_n10071_, new_n3240_ ) -new_n10087_ = NAND ( new_n9665_, new_n3253_ ) -new_n10088_ = NAND ( new_n3197_, NET_609 ) -new_n10089_ = NAND ( new_n2596_, new_n2591_, NET_674 ) -new_n10090_ = NAND ( new_n2603_, new_n2601_, NET_642 ) -new_n10091_ = NAND ( new_n2609_, new_n2607_, NET_610 ) -new_n10092_ = XOR ( new_n7083_, NET_761 ) -new_n10093_ = NAND ( new_n10092_, new_n2587_ ) -new_n10094_ = NAND ( new_n10093_, new_n10091_, new_n10090_, new_n10089_ ) -new_n10095_ = NAND ( new_n10094_, new_n3243_ ) -new_n10096_ = NAND ( new_n10095_, new_n10088_, new_n10087_, new_n10086_ ) -NET_14077 = OR ( new_n10096_, new_n10085_ ) -new_n10098_ = NOR ( new_n10084_, new_n3264_ ) -new_n10099_ = NAND ( new_n10071_, new_n3266_ ) -new_n10100_ = NAND ( new_n9665_, new_n3271_ ) -new_n10101_ = NAND ( new_n3262_, NET_641 ) -new_n10102_ = NAND ( new_n10094_, new_n3269_ ) -new_n10103_ = NAND ( new_n10102_, new_n10101_, new_n10100_, new_n10099_ ) -NET_14078 = OR ( new_n10103_, new_n10098_ ) -new_n10105_ = NOR ( new_n10084_, new_n3767_ ) -new_n10106_ = NOT ( new_n10071_ ) -new_n10107_ = NOR ( new_n10106_, new_n2743_ ) -new_n10108_ = NAND ( new_n2713_, NET_673 ) -new_n10109_ = NAND ( new_n10094_, new_n2765_ ) -new_n10110_ = NAND ( new_n9665_, new_n2756_ ) -new_n10111_ = NAND ( new_n9905_, new_n2758_ ) -new_n10112_ = NAND ( new_n10111_, new_n10110_, new_n10109_, new_n10108_ ) -NET_14079 = OR ( new_n10112_, new_n10107_, new_n10105_ ) -new_n10114_ = NOR ( new_n10084_, new_n3339_ ) -new_n10115_ = NAND ( new_n10071_, new_n9687_ ) -new_n10116_ = NAND ( new_n9905_, new_n3350_ ) -new_n10117_ = NAND ( new_n10094_, new_n3352_ ) -new_n10118_ = NAND ( new_n9905_, new_n3193_ ) -new_n10119_ = NAND ( new_n9665_, new_n3355_ ) -new_n10120_ = NAND ( new_n10119_, new_n10118_, new_n10117_ ) -new_n10121_ = NAND ( new_n10120_, new_n3359_ ) -new_n10122_ = OR ( NET_765, new_n9904_ ) -new_n10123_ = NAND ( new_n10122_, new_n10121_, new_n10116_, new_n10115_ ) -NET_14080 = OR ( new_n10123_, new_n10114_ ) -new_n10125_ = NOR ( new_n5555_, new_n9698_ ) -new_n10126_ = NAND ( new_n10125_, new_n1942_ ) -new_n10127_ = NAND ( new_n9970_, new_n1870_ ) -new_n10128_ = NAND ( new_n10127_, new_n10126_, new_n9448_ ) -new_n10129_ = XOR ( new_n10128_, new_n1844_ ) -new_n10130_ = NAND ( new_n10125_, new_n1870_ ) -new_n10131_ = NAND ( new_n9970_, new_n1960_ ) -new_n10132_ = NAND ( new_n10131_, new_n10130_, new_n9455_ ) -new_n10133_ = OR ( new_n10132_, new_n10129_ ) -new_n10134_ = NAND ( new_n10132_, new_n10129_ ) -new_n10135_ = NAND ( new_n10134_, new_n10133_ ) -new_n10136_ = NAND ( new_n9949_, new_n9945_ ) -new_n10137_ = NAND ( new_n10136_, new_n9946_ ) -new_n10138_ = XOR ( new_n10137_, new_n10135_ ) -new_n10139_ = OR ( new_n10138_, new_n1840_ ) -new_n10140_ = NAND ( new_n9970_, new_n1976_ ) -new_n10141_ = AND ( new_n10125_, new_n9715_ ) -new_n10142_ = OR ( new_n10141_, new_n10140_ ) -new_n10143_ = NAND ( new_n10141_, new_n10140_ ) -new_n10144_ = NAND ( new_n10143_, new_n10142_ ) -new_n10145_ = NAND ( new_n9958_, new_n9954_ ) -new_n10146_ = NAND ( new_n10145_, new_n9955_ ) -new_n10147_ = XNOR ( new_n10146_, new_n10144_ ) -new_n10148_ = OR ( new_n10147_, new_n1975_ ) -new_n10149_ = NAND ( new_n10125_, new_n6828_ ) -new_n10150_ = NAND ( new_n1886_, new_n1882_, NET_184 ) -new_n10151_ = NAND ( new_n1894_, new_n1892_, NET_152 ) -new_n10152_ = NAND ( new_n1901_, new_n1898_, NET_120 ) -new_n10153_ = NOT ( NET_271 ) -new_n10154_ = XOR ( new_n9967_, new_n10153_ ) -new_n10155_ = NAND ( new_n10154_, new_n1878_ ) -new_n10156_ = NAND ( new_n10155_, new_n10152_, new_n10151_, new_n10150_ ) -new_n10157_ = NAND ( new_n10156_, new_n1994_ ) -new_n10158_ = NAND ( new_n9731_, new_n3867_ ) -new_n10159_ = NAND ( new_n1838_, NET_183 ) -new_n10160_ = NAND ( new_n9968_, new_n2005_ ) -new_n10161_ = AND ( new_n10160_, new_n10159_, new_n10158_, new_n10157_ ) -NET_14100 = NAND ( new_n10161_, new_n10149_, new_n10148_, new_n10139_ ) -new_n10163_ = NOR ( new_n10138_, new_n2016_ ) -new_n10164_ = NOR ( new_n10147_, new_n2020_ ) -new_n10165_ = NAND ( new_n10125_, new_n9764_ ) -new_n10166_ = NAND ( new_n9968_, new_n2853_ ) -new_n10167_ = NAND ( NET_35973, NET_252 ) -new_n10168_ = NAND ( new_n10156_, new_n2043_ ) -new_n10169_ = NAND ( new_n9968_, new_n2009_ ) -new_n10170_ = NAND ( new_n9731_, new_n2864_ ) -new_n10171_ = NAND ( new_n10170_, new_n10169_, new_n10168_ ) -new_n10172_ = NAND ( new_n10171_, new_n2042_ ) -new_n10173_ = NAND ( new_n10172_, new_n10167_, new_n10166_, new_n10165_ ) -NET_14101 = OR ( new_n10173_, new_n10164_, new_n10163_ ) -new_n10175_ = NOR ( new_n9950_, new_n2873_ ) -new_n10176_ = NOT ( new_n9959_ ) -new_n10177_ = NAND ( new_n10176_, new_n2878_ ) -new_n10178_ = NAND ( new_n9937_, new_n2881_ ) -new_n10179_ = NAND ( new_n9483_, new_n3644_ ) -new_n10180_ = NAND ( new_n9970_, new_n1992_ ) -new_n10181_ = NAND ( new_n10180_, new_n10179_, new_n10178_, new_n10177_ ) -new_n10182_ = NOR ( new_n10181_, new_n10175_ ) -new_n10183_ = OR ( new_n10182_, new_n2891_ ) -new_n10184_ = NAND ( new_n2891_, NET_118 ) -NET_14102 = NAND ( new_n10184_, new_n10183_ ) -new_n10186_ = OR ( new_n10182_, new_n2900_ ) -new_n10187_ = NAND ( new_n2900_, NET_150 ) -NET_14103 = NAND ( new_n10187_, new_n10186_ ) -new_n10189_ = NOR ( new_n10029_, new_n3037_ ) -new_n10190_ = OR ( new_n10041_, new_n3041_ ) -new_n10191_ = NAND ( new_n10016_, new_n3044_ ) -new_n10192_ = NAND ( new_n9605_, new_n2966_ ) -new_n10193_ = NAND ( new_n10052_, new_n2367_ ) -new_n10194_ = NAND ( new_n10193_, new_n10192_, new_n10191_, new_n10190_ ) -new_n10195_ = NOR ( new_n10194_, new_n10189_ ) -new_n10196_ = OR ( new_n10195_, new_n3053_ ) -new_n10197_ = NAND ( new_n3053_, NET_363 ) -NET_14109 = NAND ( new_n10197_, new_n10196_ ) -new_n10199_ = OR ( new_n10195_, new_n3707_ ) -new_n10200_ = NAND ( new_n3707_, NET_395 ) -NET_14110 = NAND ( new_n10200_, new_n10199_ ) -new_n10202_ = NOR ( new_n5595_, new_n2289_ ) -new_n10203_ = NAND ( new_n10202_, new_n9824_ ) -new_n10204_ = NAND ( new_n10052_, new_n2274_ ) -new_n10205_ = NAND ( new_n10204_, new_n10203_, new_n9562_ ) -new_n10206_ = XOR ( new_n10205_, new_n2218_ ) -new_n10207_ = NAND ( new_n10202_, new_n2274_ ) -new_n10208_ = NAND ( new_n10052_, new_n2336_ ) -new_n10209_ = NAND ( new_n10208_, new_n10207_, new_n9573_ ) -new_n10210_ = OR ( new_n10209_, new_n10206_ ) -new_n10211_ = NAND ( new_n10209_, new_n10206_ ) -new_n10212_ = NAND ( new_n10211_, new_n10210_ ) -new_n10213_ = NAND ( new_n10028_, new_n10024_ ) -new_n10214_ = NAND ( new_n10213_, new_n10025_ ) -new_n10215_ = XOR ( new_n10214_, new_n10212_ ) -new_n10216_ = OR ( new_n10215_, new_n2208_ ) -new_n10217_ = NAND ( new_n10202_, new_n2348_ ) -new_n10218_ = NAND ( new_n10052_, new_n2349_ ) -new_n10219_ = NAND ( new_n10218_, new_n10217_ ) -new_n10220_ = XOR ( new_n10219_, new_n2349_ ) -new_n10221_ = NAND ( new_n10202_, new_n2349_ ) -new_n10222_ = NAND ( new_n10221_, new_n10220_ ) -new_n10223_ = OR ( new_n10221_, new_n10220_ ) -new_n10224_ = NAND ( new_n10223_, new_n10222_ ) -new_n10225_ = NAND ( new_n10040_, new_n10036_ ) -new_n10226_ = NAND ( new_n10225_, new_n10037_ ) -new_n10227_ = XOR ( new_n10226_, new_n10224_ ) -new_n10228_ = OR ( new_n10227_, new_n2362_ ) -new_n10229_ = NAND ( new_n10202_, new_n9852_ ) -new_n10230_ = NAND ( new_n2237_, new_n2232_, NET_429 ) -new_n10231_ = NAND ( new_n2244_, new_n2242_, NET_397 ) -new_n10232_ = NAND ( new_n2250_, new_n2248_, NET_365 ) -new_n10233_ = NOT ( NET_516 ) -new_n10234_ = XOR ( new_n10049_, new_n10233_ ) -new_n10235_ = NAND ( new_n10234_, new_n2228_ ) -new_n10236_ = NAND ( new_n10235_, new_n10232_, new_n10231_, new_n10230_ ) -new_n10237_ = NAND ( new_n10236_, new_n2369_ ) -new_n10238_ = NAND ( new_n9860_, new_n2968_ ) -new_n10239_ = NAND ( new_n2196_, NET_428 ) -new_n10240_ = NAND ( new_n10050_, new_n2380_ ) -new_n10241_ = AND ( new_n10240_, new_n10239_, new_n10238_, new_n10237_ ) -NET_14152 = NAND ( new_n10241_, new_n10229_, new_n10228_, new_n10216_ ) -new_n10243_ = NOR ( new_n10215_, new_n2390_ ) -new_n10244_ = NOR ( new_n10227_, new_n2393_ ) -new_n10245_ = NAND ( new_n10202_, new_n9871_ ) -new_n10246_ = NAND ( new_n10050_, new_n3025_ ) -new_n10247_ = NAND ( NET_35976, NET_497 ) -new_n10248_ = NAND ( new_n10236_, new_n2416_ ) -new_n10249_ = NAND ( new_n10050_, new_n2384_ ) -new_n10250_ = NAND ( new_n9860_, new_n3029_ ) -new_n10251_ = NAND ( new_n10250_, new_n10249_, new_n10248_ ) -new_n10252_ = NAND ( new_n10251_, new_n2415_ ) -new_n10253_ = NAND ( new_n10252_, new_n10247_, new_n10246_, new_n10245_ ) -NET_14153 = OR ( new_n10253_, new_n10244_, new_n10243_ ) -new_n10255_ = NOR ( new_n4323_, new_n2735_ ) -new_n10256_ = NAND ( new_n10255_, new_n4328_ ) -new_n10257_ = NOT ( new_n10094_ ) -new_n10258_ = OR ( new_n10257_, new_n2578_ ) -new_n10259_ = NAND ( new_n10258_, new_n10256_, new_n9367_ ) -new_n10260_ = XOR ( new_n10259_, new_n2618_ ) -new_n10261_ = NAND ( new_n10255_, new_n2579_ ) -new_n10262_ = NAND ( new_n10094_, new_n2620_ ) -new_n10263_ = NAND ( new_n10262_, new_n10261_, new_n9374_ ) -new_n10264_ = OR ( new_n10263_, new_n10260_ ) -new_n10265_ = NAND ( new_n10263_, new_n10260_ ) -new_n10266_ = NAND ( new_n10265_, new_n10264_ ) -new_n10267_ = NAND ( new_n10083_, new_n10079_ ) -new_n10268_ = NAND ( new_n10267_, new_n10080_ ) -new_n10269_ = XOR ( new_n10268_, new_n10266_ ) -new_n10270_ = NOR ( new_n10269_, new_n3202_ ) -new_n10271_ = NAND ( new_n10255_, new_n3240_ ) -new_n10272_ = NAND ( new_n9907_, new_n3253_ ) -new_n10273_ = NAND ( new_n3197_, NET_610 ) -new_n10274_ = NAND ( new_n2596_, new_n2591_, NET_675 ) -new_n10275_ = NAND ( new_n2603_, new_n2601_, NET_643 ) -new_n10276_ = NAND ( new_n2609_, new_n2607_, NET_611 ) -new_n10277_ = NOT ( NET_748 ) -new_n10278_ = XOR ( new_n7084_, new_n10277_ ) -new_n10279_ = NAND ( new_n10278_, new_n2587_ ) -new_n10280_ = NAND ( new_n10279_, new_n10276_, new_n10275_, new_n10274_ ) -new_n10281_ = NAND ( new_n10280_, new_n3243_ ) -new_n10282_ = NAND ( new_n10281_, new_n10273_, new_n10272_, new_n10271_ ) -NET_14164 = OR ( new_n10282_, new_n10270_ ) -new_n10284_ = NOR ( new_n10269_, new_n3264_ ) -new_n10285_ = NAND ( new_n10255_, new_n3266_ ) -new_n10286_ = NAND ( new_n9907_, new_n3271_ ) -new_n10287_ = NAND ( new_n3262_, NET_642 ) -new_n10288_ = NAND ( new_n10280_, new_n3269_ ) -new_n10289_ = NAND ( new_n10288_, new_n10287_, new_n10286_, new_n10285_ ) -NET_14165 = OR ( new_n10289_, new_n10284_ ) -new_n10291_ = NOR ( new_n10269_, new_n3767_ ) -new_n10292_ = AND ( new_n10255_, new_n2744_ ) -new_n10293_ = NAND ( new_n2713_, NET_674 ) -new_n10294_ = NAND ( new_n10280_, new_n2765_ ) -new_n10295_ = NAND ( new_n9907_, new_n2756_ ) -new_n10296_ = NAND ( new_n10092_, new_n2758_ ) -new_n10297_ = NAND ( new_n10296_, new_n10295_, new_n10294_, new_n10293_ ) -NET_14166 = OR ( new_n10297_, new_n10292_, new_n10291_ ) -new_n10299_ = NOR ( new_n10269_, new_n3339_ ) -new_n10300_ = NAND ( new_n10255_, new_n9687_ ) -new_n10301_ = NAND ( new_n10092_, new_n3350_ ) -new_n10302_ = NAND ( new_n10280_, new_n3352_ ) -new_n10303_ = NAND ( new_n10092_, new_n3193_ ) -new_n10304_ = NAND ( new_n9907_, new_n3355_ ) -new_n10305_ = NAND ( new_n10304_, new_n10303_, new_n10302_ ) -new_n10306_ = NAND ( new_n10305_, new_n3359_ ) -new_n10307_ = OR ( NET_765, new_n7069_ ) -new_n10308_ = NAND ( new_n10307_, new_n10306_, new_n10301_, new_n10300_ ) -NET_14167 = OR ( new_n10308_, new_n10299_ ) -new_n10310_ = NOR ( new_n5824_, new_n9698_ ) -new_n10311_ = NAND ( new_n10310_, new_n1942_ ) -new_n10312_ = NAND ( new_n10156_, new_n1870_ ) -new_n10313_ = NAND ( new_n10312_, new_n10311_, new_n9448_ ) -new_n10314_ = XOR ( new_n10313_, new_n1844_ ) -new_n10315_ = NAND ( new_n10310_, new_n1870_ ) -new_n10316_ = NAND ( new_n10156_, new_n1960_ ) -new_n10317_ = NAND ( new_n10316_, new_n10315_, new_n9455_ ) -new_n10318_ = OR ( new_n10317_, new_n10314_ ) -new_n10319_ = NAND ( new_n10317_, new_n10314_ ) -new_n10320_ = NAND ( new_n10319_, new_n10318_ ) -new_n10321_ = NAND ( new_n10137_, new_n10133_ ) -new_n10322_ = NAND ( new_n10321_, new_n10134_ ) -new_n10323_ = XOR ( new_n10322_, new_n10320_ ) -new_n10324_ = OR ( new_n10323_, new_n1840_ ) -new_n10325_ = NAND ( new_n10156_, new_n1976_ ) -new_n10326_ = AND ( new_n10310_, new_n9715_ ) -new_n10327_ = OR ( new_n10326_, new_n10325_ ) -new_n10328_ = NAND ( new_n10326_, new_n10325_ ) -new_n10329_ = NAND ( new_n10328_, new_n10327_ ) -new_n10330_ = NAND ( new_n10146_, new_n10142_ ) -new_n10331_ = NAND ( new_n10330_, new_n10143_ ) -new_n10332_ = XNOR ( new_n10331_, new_n10329_ ) -new_n10333_ = OR ( new_n10332_, new_n1975_ ) -new_n10334_ = NAND ( new_n10310_, new_n6828_ ) -new_n10335_ = NAND ( new_n1886_, new_n1882_, NET_185 ) -new_n10336_ = NAND ( new_n1894_, new_n1892_, NET_153 ) -new_n10337_ = NAND ( new_n1901_, new_n1898_, NET_121 ) -new_n10338_ = NOT ( NET_258 ) -new_n10339_ = NAND ( new_n9965_, NET_271, NET_252 ) -new_n10340_ = NAND ( new_n10339_, new_n10338_ ) -new_n10341_ = OR ( new_n10339_, new_n10338_ ) -new_n10342_ = AND ( new_n10341_, new_n10340_ ) -new_n10343_ = NAND ( new_n10342_, new_n1878_ ) -new_n10344_ = NAND ( new_n10343_, new_n10337_, new_n10336_, new_n10335_ ) -new_n10345_ = NAND ( new_n10344_, new_n1994_ ) -new_n10346_ = NAND ( new_n9970_, new_n3867_ ) -new_n10347_ = NAND ( new_n1838_, NET_184 ) -new_n10348_ = NAND ( new_n10154_, new_n2005_ ) -new_n10349_ = AND ( new_n10348_, new_n10347_, new_n10346_, new_n10345_ ) -NET_14189 = NAND ( new_n10349_, new_n10334_, new_n10333_, new_n10324_ ) -new_n10351_ = NOR ( new_n10323_, new_n2016_ ) -new_n10352_ = NOR ( new_n10332_, new_n2020_ ) -new_n10353_ = NAND ( new_n10310_, new_n9764_ ) -new_n10354_ = NAND ( new_n10154_, new_n2853_ ) -new_n10355_ = OR ( NET_275, new_n10153_ ) -new_n10356_ = NAND ( new_n10344_, new_n2043_ ) -new_n10357_ = NAND ( new_n10154_, new_n2009_ ) -new_n10358_ = NAND ( new_n9970_, new_n2864_ ) -new_n10359_ = NAND ( new_n10358_, new_n10357_, new_n10356_ ) -new_n10360_ = NAND ( new_n10359_, new_n2042_ ) -new_n10361_ = NAND ( new_n10360_, new_n10355_, new_n10354_, new_n10353_ ) -NET_14190 = OR ( new_n10361_, new_n10352_, new_n10351_ ) -new_n10363_ = NOR ( new_n10138_, new_n2873_ ) -new_n10364_ = NOT ( new_n10147_ ) -new_n10365_ = NAND ( new_n10364_, new_n2878_ ) -new_n10366_ = NAND ( new_n10125_, new_n2881_ ) -new_n10367_ = NAND ( new_n9731_, new_n3644_ ) -new_n10368_ = NAND ( new_n10156_, new_n1992_ ) -new_n10369_ = NAND ( new_n10368_, new_n10367_, new_n10366_, new_n10365_ ) -new_n10370_ = NOR ( new_n10369_, new_n10363_ ) -new_n10371_ = OR ( new_n10370_, new_n2891_ ) -new_n10372_ = NAND ( new_n2891_, NET_119 ) -NET_14191 = NAND ( new_n10372_, new_n10371_ ) -new_n10374_ = OR ( new_n10370_, new_n2900_ ) -new_n10375_ = NAND ( new_n2900_, NET_151 ) -NET_14192 = NAND ( new_n10375_, new_n10374_ ) -new_n10377_ = NOR ( new_n10215_, new_n3037_ ) -new_n10378_ = OR ( new_n10227_, new_n3041_ ) -new_n10379_ = NAND ( new_n10202_, new_n3044_ ) -new_n10380_ = NAND ( new_n9860_, new_n2966_ ) -new_n10381_ = NAND ( new_n10236_, new_n2367_ ) -new_n10382_ = NAND ( new_n10381_, new_n10380_, new_n10379_, new_n10378_ ) -new_n10383_ = NOR ( new_n10382_, new_n10377_ ) -new_n10384_ = OR ( new_n10383_, new_n3053_ ) -new_n10385_ = NAND ( new_n3053_, NET_364 ) -NET_14200 = NAND ( new_n10385_, new_n10384_ ) -new_n10387_ = OR ( new_n10383_, new_n3707_ ) -new_n10388_ = NAND ( new_n3707_, NET_396 ) -NET_14201 = NAND ( new_n10388_, new_n10387_ ) -new_n10390_ = NOR ( new_n5902_, new_n2289_ ) -new_n10391_ = NAND ( new_n10390_, new_n9824_ ) -new_n10392_ = NAND ( new_n10236_, new_n2274_ ) -new_n10393_ = NAND ( new_n10392_, new_n10391_, new_n9562_ ) -new_n10394_ = XOR ( new_n10393_, new_n2218_ ) -new_n10395_ = NAND ( new_n10390_, new_n2274_ ) -new_n10396_ = NAND ( new_n10236_, new_n2336_ ) -new_n10397_ = NAND ( new_n10396_, new_n10395_, new_n9573_ ) -new_n10398_ = OR ( new_n10397_, new_n10394_ ) -new_n10399_ = NAND ( new_n10397_, new_n10394_ ) -new_n10400_ = NAND ( new_n10399_, new_n10398_ ) -new_n10401_ = NAND ( new_n10214_, new_n10210_ ) -new_n10402_ = NAND ( new_n10401_, new_n10211_ ) -new_n10403_ = XOR ( new_n10402_, new_n10400_ ) -new_n10404_ = OR ( new_n10403_, new_n2208_ ) -new_n10405_ = NAND ( new_n10390_, new_n2348_ ) -new_n10406_ = NAND ( new_n10236_, new_n2349_ ) -new_n10407_ = NAND ( new_n10406_, new_n10405_ ) -new_n10408_ = XOR ( new_n10407_, new_n2349_ ) -new_n10409_ = NAND ( new_n10390_, new_n2349_ ) -new_n10410_ = NAND ( new_n10409_, new_n10408_ ) -new_n10411_ = OR ( new_n10409_, new_n10408_ ) -new_n10412_ = NAND ( new_n10411_, new_n10410_ ) -new_n10413_ = NAND ( new_n10226_, new_n10222_ ) -new_n10414_ = NAND ( new_n10413_, new_n10223_ ) -new_n10415_ = XOR ( new_n10414_, new_n10412_ ) -new_n10416_ = OR ( new_n10415_, new_n2362_ ) -new_n10417_ = NAND ( new_n10390_, new_n9852_ ) -new_n10418_ = NAND ( new_n2237_, new_n2232_, NET_430 ) -new_n10419_ = NAND ( new_n2244_, new_n2242_, NET_398 ) -new_n10420_ = NAND ( new_n2250_, new_n2248_, NET_366 ) -new_n10421_ = NOT ( NET_503 ) -new_n10422_ = NAND ( new_n10047_, NET_516, NET_497 ) -new_n10423_ = NAND ( new_n10422_, new_n10421_ ) -new_n10424_ = OR ( new_n10422_, new_n10421_ ) -new_n10425_ = AND ( new_n10424_, new_n10423_ ) -new_n10426_ = NAND ( new_n10425_, new_n2228_ ) -new_n10427_ = NAND ( new_n10426_, new_n10420_, new_n10419_, new_n10418_ ) -new_n10428_ = NAND ( new_n10427_, new_n2369_ ) -new_n10429_ = NAND ( new_n10052_, new_n2968_ ) -new_n10430_ = NAND ( new_n2196_, NET_429 ) -new_n10431_ = NAND ( new_n10234_, new_n2380_ ) -new_n10432_ = AND ( new_n10431_, new_n10430_, new_n10429_, new_n10428_ ) -NET_14240 = NAND ( new_n10432_, new_n10417_, new_n10416_, new_n10404_ ) -new_n10434_ = NOR ( new_n10403_, new_n2390_ ) -new_n10435_ = NOR ( new_n10415_, new_n2393_ ) -new_n10436_ = NAND ( new_n10390_, new_n9871_ ) -new_n10437_ = NAND ( new_n10234_, new_n3025_ ) -new_n10438_ = OR ( NET_520, new_n10233_ ) -new_n10439_ = NAND ( new_n10427_, new_n2416_ ) -new_n10440_ = NAND ( new_n10234_, new_n2384_ ) -new_n10441_ = NAND ( new_n10052_, new_n3029_ ) -new_n10442_ = NAND ( new_n10441_, new_n10440_, new_n10439_ ) -new_n10443_ = NAND ( new_n10442_, new_n2415_ ) -new_n10444_ = NAND ( new_n10443_, new_n10438_, new_n10437_, new_n10436_ ) -NET_14241 = OR ( new_n10444_, new_n10435_, new_n10434_ ) -new_n10446_ = NOR ( new_n4600_, new_n2735_ ) -new_n10447_ = NAND ( new_n10446_, new_n4328_ ) -new_n10448_ = NAND ( new_n10280_, new_n2579_ ) -new_n10449_ = NAND ( new_n10448_, new_n10447_, new_n9367_ ) -new_n10450_ = XOR ( new_n10449_, new_n2618_ ) -new_n10451_ = NAND ( new_n10446_, new_n2579_ ) -new_n10452_ = NAND ( new_n10280_, new_n2620_ ) -new_n10453_ = NAND ( new_n10452_, new_n10451_, new_n9374_ ) -new_n10454_ = OR ( new_n10453_, new_n10450_ ) -new_n10455_ = NAND ( new_n10453_, new_n10450_ ) -new_n10456_ = NAND ( new_n10455_, new_n10454_ ) -new_n10457_ = NAND ( new_n10268_, new_n10264_ ) -new_n10458_ = NAND ( new_n10457_, new_n10265_ ) -new_n10459_ = XOR ( new_n10458_, new_n10456_ ) -new_n10460_ = NOR ( new_n10459_, new_n3202_ ) -new_n10461_ = NAND ( new_n10446_, new_n3240_ ) -new_n10462_ = NAND ( new_n10094_, new_n3253_ ) -new_n10463_ = NAND ( new_n3197_, NET_611 ) -new_n10464_ = NAND ( new_n2596_, new_n2591_, NET_676 ) -new_n10465_ = NAND ( new_n2603_, new_n2601_, NET_644 ) -new_n10466_ = NAND ( new_n2609_, new_n2607_, NET_612 ) -new_n10467_ = XOR ( new_n7085_, NET_752 ) -new_n10468_ = NAND ( new_n10467_, new_n2587_ ) -new_n10469_ = NAND ( new_n10468_, new_n10466_, new_n10465_, new_n10464_ ) -new_n10470_ = NAND ( new_n10469_, new_n3243_ ) -new_n10471_ = NAND ( new_n10470_, new_n10463_, new_n10462_, new_n10461_ ) -NET_14251 = OR ( new_n10471_, new_n10460_ ) -new_n10473_ = NOR ( new_n10459_, new_n3264_ ) -new_n10474_ = NAND ( new_n10446_, new_n3266_ ) -new_n10475_ = NAND ( new_n10094_, new_n3271_ ) -new_n10476_ = NAND ( new_n3262_, NET_643 ) -new_n10477_ = NAND ( new_n10469_, new_n3269_ ) -new_n10478_ = NAND ( new_n10477_, new_n10476_, new_n10475_, new_n10474_ ) -NET_14252 = OR ( new_n10478_, new_n10473_ ) -new_n10480_ = NOR ( new_n10459_, new_n3767_ ) -new_n10481_ = NOT ( new_n10446_ ) -new_n10482_ = NOR ( new_n10481_, new_n2743_ ) -new_n10483_ = NAND ( new_n2713_, NET_675 ) -new_n10484_ = NAND ( new_n10469_, new_n2765_ ) -new_n10485_ = NAND ( new_n10094_, new_n2756_ ) -new_n10486_ = NAND ( new_n10278_, new_n2758_ ) -new_n10487_ = NAND ( new_n10486_, new_n10485_, new_n10484_, new_n10483_ ) -NET_14253 = OR ( new_n10487_, new_n10482_, new_n10480_ ) -new_n10489_ = NOR ( new_n10459_, new_n3339_ ) -new_n10490_ = NAND ( new_n10446_, new_n9687_ ) -new_n10491_ = NAND ( new_n10278_, new_n3350_ ) -new_n10492_ = NAND ( new_n10469_, new_n3352_ ) -new_n10493_ = NAND ( new_n10278_, new_n3193_ ) -new_n10494_ = NAND ( new_n10094_, new_n3355_ ) -new_n10495_ = NAND ( new_n10494_, new_n10493_, new_n10492_ ) -new_n10496_ = NAND ( new_n10495_, new_n3359_ ) -new_n10497_ = OR ( NET_765, new_n10277_ ) -new_n10498_ = NAND ( new_n10497_, new_n10496_, new_n10491_, new_n10490_ ) -NET_14254 = OR ( new_n10498_, new_n10489_ ) -new_n10500_ = NOR ( new_n6103_, new_n9698_ ) -new_n10501_ = NAND ( new_n10500_, new_n1942_ ) -new_n10502_ = NAND ( new_n10344_, new_n1870_ ) -new_n10503_ = NAND ( new_n10502_, new_n10501_, new_n9448_ ) -new_n10504_ = XOR ( new_n10503_, new_n1844_ ) -new_n10505_ = NAND ( new_n10500_, new_n1870_ ) -new_n10506_ = NAND ( new_n10344_, new_n1960_ ) -new_n10507_ = NAND ( new_n10506_, new_n10505_, new_n9455_ ) -new_n10508_ = OR ( new_n10507_, new_n10504_ ) -new_n10509_ = NAND ( new_n10507_, new_n10504_ ) -new_n10510_ = NAND ( new_n10509_, new_n10508_ ) -new_n10511_ = NAND ( new_n10322_, new_n10318_ ) -new_n10512_ = NAND ( new_n10511_, new_n10319_ ) -new_n10513_ = XOR ( new_n10512_, new_n10510_ ) -new_n10514_ = OR ( new_n10513_, new_n1840_ ) -new_n10515_ = NAND ( new_n10344_, new_n1976_ ) -new_n10516_ = AND ( new_n10500_, new_n9715_ ) -new_n10517_ = OR ( new_n10516_, new_n10515_ ) -new_n10518_ = NAND ( new_n10516_, new_n10515_ ) -new_n10519_ = NAND ( new_n10518_, new_n10517_ ) -new_n10520_ = NAND ( new_n10331_, new_n10327_ ) -new_n10521_ = NAND ( new_n10520_, new_n10328_ ) -new_n10522_ = XNOR ( new_n10521_, new_n10519_ ) -new_n10523_ = OR ( new_n10522_, new_n1975_ ) -new_n10524_ = NAND ( new_n10500_, new_n6828_ ) -new_n10525_ = NAND ( new_n1886_, new_n1882_, NET_186 ) -new_n10526_ = NAND ( new_n1894_, new_n1892_, NET_154 ) -new_n10527_ = NAND ( new_n1901_, new_n1898_, NET_122 ) -new_n10528_ = NOT ( NET_262 ) -new_n10529_ = XOR ( new_n10341_, new_n10528_ ) -new_n10530_ = NAND ( new_n10529_, new_n1878_ ) -new_n10531_ = NAND ( new_n10530_, new_n10527_, new_n10526_, new_n10525_ ) -new_n10532_ = NAND ( new_n10531_, new_n1994_ ) -new_n10533_ = NAND ( new_n10156_, new_n3867_ ) -new_n10534_ = NAND ( new_n1838_, NET_185 ) -new_n10535_ = NAND ( new_n10342_, new_n2005_ ) -new_n10536_ = AND ( new_n10535_, new_n10534_, new_n10533_, new_n10532_ ) -NET_14274 = NAND ( new_n10536_, new_n10524_, new_n10523_, new_n10514_ ) -new_n10538_ = NOR ( new_n10513_, new_n2016_ ) -new_n10539_ = NOR ( new_n10522_, new_n2020_ ) -new_n10540_ = NAND ( new_n10500_, new_n9764_ ) -new_n10541_ = NAND ( new_n10342_, new_n2853_ ) -new_n10542_ = OR ( NET_275, new_n10338_ ) -new_n10543_ = NAND ( new_n10531_, new_n2043_ ) -new_n10544_ = NAND ( new_n10342_, new_n2009_ ) -new_n10545_ = NAND ( new_n10156_, new_n2864_ ) -new_n10546_ = NAND ( new_n10545_, new_n10544_, new_n10543_ ) -new_n10547_ = NAND ( new_n10546_, new_n2042_ ) -new_n10548_ = NAND ( new_n10547_, new_n10542_, new_n10541_, new_n10540_ ) -NET_14275 = OR ( new_n10548_, new_n10539_, new_n10538_ ) -new_n10550_ = NOR ( new_n10323_, new_n2873_ ) -new_n10551_ = NOT ( new_n10332_ ) -new_n10552_ = NAND ( new_n10551_, new_n2878_ ) -new_n10553_ = NAND ( new_n10310_, new_n2881_ ) -new_n10554_ = NAND ( new_n9970_, new_n3644_ ) -new_n10555_ = NAND ( new_n10344_, new_n1992_ ) -new_n10556_ = NAND ( new_n10555_, new_n10554_, new_n10553_, new_n10552_ ) -new_n10557_ = NOR ( new_n10556_, new_n10550_ ) -new_n10558_ = OR ( new_n10557_, new_n2891_ ) -new_n10559_ = NAND ( new_n2891_, NET_120 ) -NET_14276 = NAND ( new_n10559_, new_n10558_ ) -new_n10561_ = OR ( new_n10557_, new_n2900_ ) -new_n10562_ = NAND ( new_n2900_, NET_152 ) -NET_14277 = NAND ( new_n10562_, new_n10561_ ) -new_n10564_ = NOR ( new_n10403_, new_n3037_ ) -new_n10565_ = OR ( new_n10415_, new_n3041_ ) -new_n10566_ = NAND ( new_n10390_, new_n3044_ ) -new_n10567_ = NAND ( new_n10052_, new_n2966_ ) -new_n10568_ = NAND ( new_n10427_, new_n2367_ ) -new_n10569_ = NAND ( new_n10568_, new_n10567_, new_n10566_, new_n10565_ ) -new_n10570_ = NOR ( new_n10569_, new_n10564_ ) -new_n10571_ = OR ( new_n10570_, new_n3053_ ) -new_n10572_ = NAND ( new_n3053_, NET_365 ) -NET_14283 = NAND ( new_n10572_, new_n10571_ ) -new_n10574_ = OR ( new_n10570_, new_n3707_ ) -new_n10575_ = NAND ( new_n3707_, NET_397 ) -NET_14284 = NAND ( new_n10575_, new_n10574_ ) -new_n10577_ = NOR ( new_n6213_, new_n2289_ ) -new_n10578_ = NAND ( new_n10577_, new_n9824_ ) -new_n10579_ = NOT ( new_n10427_ ) -new_n10580_ = OR ( new_n10579_, new_n2273_ ) -new_n10581_ = NAND ( new_n10580_, new_n10578_, new_n9562_ ) -new_n10582_ = XOR ( new_n10581_, new_n2218_ ) -new_n10583_ = NAND ( new_n10577_, new_n2274_ ) -new_n10584_ = NAND ( new_n10427_, new_n2336_ ) -new_n10585_ = NAND ( new_n10584_, new_n10583_, new_n9573_ ) -new_n10586_ = OR ( new_n10585_, new_n10582_ ) -new_n10587_ = NAND ( new_n10585_, new_n10582_ ) -new_n10588_ = NAND ( new_n10587_, new_n10586_ ) -new_n10589_ = NAND ( new_n10402_, new_n10398_ ) -new_n10590_ = NAND ( new_n10589_, new_n10399_ ) -new_n10591_ = XOR ( new_n10590_, new_n10588_ ) -new_n10592_ = OR ( new_n10591_, new_n2208_ ) -new_n10593_ = NAND ( new_n10577_, new_n2348_ ) -new_n10594_ = NAND ( new_n10427_, new_n2349_ ) -new_n10595_ = NAND ( new_n10594_, new_n10593_ ) -new_n10596_ = XOR ( new_n10595_, new_n2349_ ) -new_n10597_ = NAND ( new_n10577_, new_n2349_ ) -new_n10598_ = NAND ( new_n10597_, new_n10596_ ) -new_n10599_ = OR ( new_n10597_, new_n10596_ ) -new_n10600_ = NAND ( new_n10599_, new_n10598_ ) -new_n10601_ = NAND ( new_n10414_, new_n10410_ ) -new_n10602_ = NAND ( new_n10601_, new_n10411_ ) -new_n10603_ = XOR ( new_n10602_, new_n10600_ ) -new_n10604_ = OR ( new_n10603_, new_n2362_ ) -new_n10605_ = NAND ( new_n10577_, new_n9852_ ) -new_n10606_ = NAND ( new_n2237_, new_n2232_, NET_431 ) -new_n10607_ = NAND ( new_n2244_, new_n2242_, NET_399 ) -new_n10608_ = NAND ( new_n2250_, new_n2248_, NET_367 ) -new_n10609_ = NOT ( NET_507 ) -new_n10610_ = XOR ( new_n10424_, new_n10609_ ) -new_n10611_ = NAND ( new_n10610_, new_n2228_ ) -new_n10612_ = NAND ( new_n10611_, new_n10608_, new_n10607_, new_n10606_ ) -new_n10613_ = NAND ( new_n10612_, new_n2369_ ) -new_n10614_ = NAND ( new_n10236_, new_n2968_ ) -new_n10615_ = NAND ( new_n2196_, NET_430 ) -new_n10616_ = NAND ( new_n10425_, new_n2380_ ) -new_n10617_ = AND ( new_n10616_, new_n10615_, new_n10614_, new_n10613_ ) -NET_14327 = NAND ( new_n10617_, new_n10605_, new_n10604_, new_n10592_ ) -new_n10619_ = NOR ( new_n10591_, new_n2390_ ) -new_n10620_ = NOR ( new_n10603_, new_n2393_ ) -new_n10621_ = NAND ( new_n10577_, new_n9871_ ) -new_n10622_ = NAND ( new_n10425_, new_n3025_ ) -new_n10623_ = OR ( NET_520, new_n10421_ ) -new_n10624_ = NAND ( new_n10612_, new_n2416_ ) -new_n10625_ = NAND ( new_n10425_, new_n2384_ ) -new_n10626_ = NAND ( new_n10236_, new_n3029_ ) -new_n10627_ = NAND ( new_n10626_, new_n10625_, new_n10624_ ) -new_n10628_ = NAND ( new_n10627_, new_n2415_ ) -new_n10629_ = NAND ( new_n10628_, new_n10623_, new_n10622_, new_n10621_ ) -NET_14328 = OR ( new_n10629_, new_n10620_, new_n10619_ ) -new_n10631_ = NOR ( new_n4948_, new_n2735_ ) -new_n10632_ = NAND ( new_n10631_, new_n4328_ ) -new_n10633_ = NOT ( new_n10469_ ) -new_n10634_ = OR ( new_n10633_, new_n2578_ ) -new_n10635_ = NAND ( new_n10634_, new_n10632_, new_n9367_ ) -new_n10636_ = XOR ( new_n10635_, new_n2618_ ) -new_n10637_ = NAND ( new_n10631_, new_n2579_ ) -new_n10638_ = NAND ( new_n10469_, new_n2620_ ) -new_n10639_ = NAND ( new_n10638_, new_n10637_, new_n9374_ ) -new_n10640_ = OR ( new_n10639_, new_n10636_ ) -new_n10641_ = NAND ( new_n10639_, new_n10636_ ) -new_n10642_ = NAND ( new_n10641_, new_n10640_ ) -new_n10643_ = NAND ( new_n10458_, new_n10454_ ) -new_n10644_ = NAND ( new_n10643_, new_n10455_ ) -new_n10645_ = XOR ( new_n10644_, new_n10642_ ) -new_n10646_ = NOR ( new_n10645_, new_n3202_ ) -new_n10647_ = NAND ( new_n10631_, new_n3240_ ) -new_n10648_ = NAND ( new_n10280_, new_n3253_ ) -new_n10649_ = NAND ( new_n3197_, NET_612 ) -new_n10650_ = NAND ( new_n2596_, new_n2591_, NET_677 ) -new_n10651_ = NAND ( new_n2603_, new_n2601_, NET_645 ) -new_n10652_ = NAND ( new_n2609_, new_n2607_, NET_613 ) -new_n10653_ = NOT ( NET_737 ) -new_n10654_ = XOR ( new_n7086_, new_n10653_ ) -new_n10655_ = NAND ( new_n10654_, new_n2587_ ) -new_n10656_ = NAND ( new_n10655_, new_n10652_, new_n10651_, new_n10650_ ) -new_n10657_ = NAND ( new_n10656_, new_n3243_ ) -new_n10658_ = NAND ( new_n10657_, new_n10649_, new_n10648_, new_n10647_ ) -NET_14338 = OR ( new_n10658_, new_n10646_ ) -new_n10660_ = NOR ( new_n10645_, new_n3264_ ) -new_n10661_ = NAND ( new_n10631_, new_n3266_ ) -new_n10662_ = NAND ( new_n10280_, new_n3271_ ) -new_n10663_ = NAND ( new_n3262_, NET_644 ) -new_n10664_ = NAND ( new_n10656_, new_n3269_ ) -new_n10665_ = NAND ( new_n10664_, new_n10663_, new_n10662_, new_n10661_ ) -NET_14339 = OR ( new_n10665_, new_n10660_ ) -new_n10667_ = NOR ( new_n10645_, new_n3767_ ) -new_n10668_ = AND ( new_n10631_, new_n2744_ ) -new_n10669_ = NAND ( new_n2713_, NET_676 ) -new_n10670_ = NAND ( new_n10656_, new_n2765_ ) -new_n10671_ = NAND ( new_n10280_, new_n2756_ ) -new_n10672_ = NAND ( new_n10467_, new_n2758_ ) -new_n10673_ = NAND ( new_n10672_, new_n10671_, new_n10670_, new_n10669_ ) -NET_14340 = OR ( new_n10673_, new_n10668_, new_n10667_ ) -new_n10675_ = NOR ( new_n10645_, new_n3339_ ) -new_n10676_ = NAND ( new_n10631_, new_n9687_ ) -new_n10677_ = NAND ( new_n10467_, new_n3350_ ) -new_n10678_ = NAND ( new_n10656_, new_n3352_ ) -new_n10679_ = NAND ( new_n10467_, new_n3193_ ) -new_n10680_ = NAND ( new_n10280_, new_n3355_ ) -new_n10681_ = NAND ( new_n10680_, new_n10679_, new_n10678_ ) -new_n10682_ = NAND ( new_n10681_, new_n3359_ ) -new_n10683_ = OR ( NET_765, new_n7068_ ) -new_n10684_ = NAND ( new_n10683_, new_n10682_, new_n10677_, new_n10676_ ) -NET_14341 = OR ( new_n10684_, new_n10675_ ) -new_n10686_ = NOR ( new_n6450_, new_n9698_ ) -new_n10687_ = NAND ( new_n10686_, new_n1942_ ) -new_n10688_ = NAND ( new_n10531_, new_n1870_ ) -new_n10689_ = NAND ( new_n10688_, new_n10687_, new_n9448_ ) -new_n10690_ = XOR ( new_n10689_, new_n1844_ ) -new_n10691_ = NAND ( new_n10686_, new_n1870_ ) -new_n10692_ = NAND ( new_n10531_, new_n1960_ ) -new_n10693_ = NAND ( new_n10692_, new_n10691_, new_n9455_ ) -new_n10694_ = OR ( new_n10693_, new_n10690_ ) -new_n10695_ = NAND ( new_n10693_, new_n10690_ ) -new_n10696_ = NAND ( new_n10695_, new_n10694_ ) -new_n10697_ = NAND ( new_n10512_, new_n10508_ ) -new_n10698_ = NAND ( new_n10697_, new_n10509_ ) -new_n10699_ = XOR ( new_n10698_, new_n10696_ ) -new_n10700_ = OR ( new_n10699_, new_n1840_ ) -new_n10701_ = NAND ( new_n10531_, new_n1976_ ) -new_n10702_ = AND ( new_n10686_, new_n9715_ ) -new_n10703_ = OR ( new_n10702_, new_n10701_ ) -new_n10704_ = NAND ( new_n10702_, new_n10701_ ) -new_n10705_ = NAND ( new_n10704_, new_n10703_ ) -new_n10706_ = NAND ( new_n10521_, new_n10517_ ) -new_n10707_ = NAND ( new_n10706_, new_n10518_ ) -new_n10708_ = XNOR ( new_n10707_, new_n10705_ ) -new_n10709_ = OR ( new_n10708_, new_n1975_ ) -new_n10710_ = NAND ( new_n10686_, new_n6828_ ) -new_n10711_ = NAND ( new_n1886_, new_n1882_, NET_187 ) -new_n10712_ = NAND ( new_n1894_, new_n1892_, NET_155 ) -new_n10713_ = NAND ( new_n1901_, new_n1898_, NET_123 ) -new_n10714_ = NOT ( NET_247 ) -new_n10715_ = OR ( new_n10339_, new_n10528_, new_n10338_ ) -new_n10716_ = NAND ( new_n10715_, new_n10714_ ) -new_n10717_ = OR ( new_n10715_, new_n10714_ ) -new_n10718_ = AND ( new_n10717_, new_n10716_ ) -new_n10719_ = NAND ( new_n10718_, new_n1878_ ) -new_n10720_ = NAND ( new_n10719_, new_n10713_, new_n10712_, new_n10711_ ) -new_n10721_ = NAND ( new_n10720_, new_n1994_ ) -new_n10722_ = NAND ( new_n10344_, new_n3867_ ) -new_n10723_ = NAND ( new_n1838_, NET_186 ) -new_n10724_ = NAND ( new_n10529_, new_n2005_ ) -new_n10725_ = AND ( new_n10724_, new_n10723_, new_n10722_, new_n10721_ ) -NET_14363 = NAND ( new_n10725_, new_n10710_, new_n10709_, new_n10700_ ) -new_n10727_ = NOR ( new_n10699_, new_n2016_ ) -new_n10728_ = NOR ( new_n10708_, new_n2020_ ) -new_n10729_ = NAND ( new_n10686_, new_n9764_ ) -new_n10730_ = NAND ( new_n10529_, new_n2853_ ) -new_n10731_ = OR ( NET_275, new_n10528_ ) -new_n10732_ = NAND ( new_n10720_, new_n2043_ ) -new_n10733_ = NAND ( new_n10529_, new_n2009_ ) -new_n10734_ = NAND ( new_n10344_, new_n2864_ ) -new_n10735_ = NAND ( new_n10734_, new_n10733_, new_n10732_ ) -new_n10736_ = NAND ( new_n10735_, new_n2042_ ) -new_n10737_ = NAND ( new_n10736_, new_n10731_, new_n10730_, new_n10729_ ) -NET_14364 = OR ( new_n10737_, new_n10728_, new_n10727_ ) -new_n10739_ = NOR ( new_n10513_, new_n2873_ ) -new_n10740_ = NOT ( new_n10522_ ) -new_n10741_ = NAND ( new_n10740_, new_n2878_ ) -new_n10742_ = NAND ( new_n10500_, new_n2881_ ) -new_n10743_ = NAND ( new_n10156_, new_n3644_ ) -new_n10744_ = NAND ( new_n10531_, new_n1992_ ) -new_n10745_ = NAND ( new_n10744_, new_n10743_, new_n10742_, new_n10741_ ) -new_n10746_ = NOR ( new_n10745_, new_n10739_ ) -new_n10747_ = OR ( new_n10746_, new_n2891_ ) -new_n10748_ = NAND ( new_n2891_, NET_121 ) -NET_14365 = NAND ( new_n10748_, new_n10747_ ) -new_n10750_ = OR ( new_n10746_, new_n2900_ ) -new_n10751_ = NAND ( new_n2900_, NET_153 ) -NET_14366 = NAND ( new_n10751_, new_n10750_ ) -new_n10753_ = NOR ( new_n10591_, new_n3037_ ) -new_n10754_ = OR ( new_n10603_, new_n3041_ ) -new_n10755_ = NAND ( new_n10577_, new_n3044_ ) -new_n10756_ = NAND ( new_n10236_, new_n2966_ ) -new_n10757_ = NAND ( new_n10612_, new_n2367_ ) -new_n10758_ = NAND ( new_n10757_, new_n10756_, new_n10755_, new_n10754_ ) -new_n10759_ = NOR ( new_n10758_, new_n10753_ ) -new_n10760_ = OR ( new_n10759_, new_n3053_ ) -new_n10761_ = NAND ( new_n3053_, NET_366 ) -NET_14374 = NAND ( new_n10761_, new_n10760_ ) -new_n10763_ = OR ( new_n10759_, new_n3707_ ) -new_n10764_ = NAND ( new_n3707_, NET_398 ) -NET_14375 = NAND ( new_n10764_, new_n10763_ ) -new_n10766_ = NOR ( new_n6567_, new_n2289_ ) -new_n10767_ = NAND ( new_n10766_, new_n9824_ ) -new_n10768_ = NAND ( new_n10612_, new_n2274_ ) -new_n10769_ = NAND ( new_n10768_, new_n10767_, new_n9562_ ) -new_n10770_ = XOR ( new_n10769_, new_n2218_ ) -new_n10771_ = NAND ( new_n10766_, new_n2274_ ) -new_n10772_ = NAND ( new_n10612_, new_n2336_ ) -new_n10773_ = NAND ( new_n10772_, new_n10771_, new_n9573_ ) -new_n10774_ = OR ( new_n10773_, new_n10770_ ) -new_n10775_ = NAND ( new_n10773_, new_n10770_ ) -new_n10776_ = NAND ( new_n10775_, new_n10774_ ) -new_n10777_ = NAND ( new_n10590_, new_n10586_ ) -new_n10778_ = NAND ( new_n10777_, new_n10587_ ) -new_n10779_ = XOR ( new_n10778_, new_n10776_ ) -new_n10780_ = OR ( new_n10779_, new_n2208_ ) -new_n10781_ = NAND ( new_n10766_, new_n2348_ ) -new_n10782_ = NAND ( new_n10612_, new_n2349_ ) -new_n10783_ = NAND ( new_n10782_, new_n10781_ ) -new_n10784_ = XOR ( new_n10783_, new_n2349_ ) -new_n10785_ = NAND ( new_n10766_, new_n2349_ ) -new_n10786_ = NAND ( new_n10785_, new_n10784_ ) -new_n10787_ = OR ( new_n10785_, new_n10784_ ) -new_n10788_ = NAND ( new_n10787_, new_n10786_ ) -new_n10789_ = NAND ( new_n10602_, new_n10598_ ) -new_n10790_ = NAND ( new_n10789_, new_n10599_ ) -new_n10791_ = XOR ( new_n10790_, new_n10788_ ) -new_n10792_ = OR ( new_n10791_, new_n2362_ ) -new_n10793_ = NAND ( new_n10766_, new_n9852_ ) -new_n10794_ = NAND ( new_n2237_, new_n2232_, NET_432 ) -new_n10795_ = NAND ( new_n2244_, new_n2242_, NET_400 ) -new_n10796_ = NAND ( new_n2250_, new_n2248_, NET_368 ) -new_n10797_ = NOT ( NET_492 ) -new_n10798_ = OR ( new_n10422_, new_n10609_, new_n10421_ ) -new_n10799_ = NAND ( new_n10798_, new_n10797_ ) -new_n10800_ = OR ( new_n10798_, new_n10797_ ) -new_n10801_ = AND ( new_n10800_, new_n10799_ ) -new_n10802_ = NAND ( new_n10801_, new_n2228_ ) -new_n10803_ = NAND ( new_n10802_, new_n10796_, new_n10795_, new_n10794_ ) -new_n10804_ = NAND ( new_n10803_, new_n2369_ ) -new_n10805_ = NAND ( new_n10427_, new_n2968_ ) -new_n10806_ = NAND ( new_n2196_, NET_431 ) -new_n10807_ = NAND ( new_n10610_, new_n2380_ ) -new_n10808_ = AND ( new_n10807_, new_n10806_, new_n10805_, new_n10804_ ) -NET_14414 = NAND ( new_n10808_, new_n10793_, new_n10792_, new_n10780_ ) -new_n10810_ = NOR ( new_n10779_, new_n2390_ ) -new_n10811_ = NOR ( new_n10791_, new_n2393_ ) -new_n10812_ = NAND ( new_n10766_, new_n9871_ ) -new_n10813_ = NAND ( new_n10610_, new_n3025_ ) -new_n10814_ = OR ( NET_520, new_n10609_ ) -new_n10815_ = NAND ( new_n10803_, new_n2416_ ) -new_n10816_ = NAND ( new_n10610_, new_n2384_ ) -new_n10817_ = NAND ( new_n10427_, new_n3029_ ) -new_n10818_ = NAND ( new_n10817_, new_n10816_, new_n10815_ ) -new_n10819_ = NAND ( new_n10818_, new_n2415_ ) -new_n10820_ = NAND ( new_n10819_, new_n10814_, new_n10813_, new_n10812_ ) -NET_14415 = OR ( new_n10820_, new_n10811_, new_n10810_ ) -new_n10822_ = NOR ( new_n5538_, new_n2735_ ) -new_n10823_ = NAND ( new_n10822_, new_n4328_ ) -new_n10824_ = NAND ( new_n10656_, new_n2579_ ) -new_n10825_ = NAND ( new_n10824_, new_n10823_, new_n9367_ ) -new_n10826_ = XOR ( new_n10825_, new_n2618_ ) -new_n10827_ = NAND ( new_n10822_, new_n2579_ ) -new_n10828_ = NAND ( new_n10656_, new_n2620_ ) -new_n10829_ = NAND ( new_n10828_, new_n10827_, new_n9374_ ) -new_n10830_ = OR ( new_n10829_, new_n10826_ ) -new_n10831_ = NAND ( new_n10829_, new_n10826_ ) -new_n10832_ = NAND ( new_n10831_, new_n10830_ ) -new_n10833_ = NAND ( new_n10644_, new_n10640_ ) -new_n10834_ = NAND ( new_n10833_, new_n10641_ ) -new_n10835_ = XOR ( new_n10834_, new_n10832_ ) -new_n10836_ = NOR ( new_n10835_, new_n3202_ ) -new_n10837_ = NAND ( new_n10822_, new_n3240_ ) -new_n10838_ = NAND ( new_n10469_, new_n3253_ ) -new_n10839_ = NAND ( new_n3197_, NET_613 ) -new_n10840_ = NAND ( new_n2596_, new_n2591_, NET_678 ) -new_n10841_ = NAND ( new_n2603_, new_n2601_, NET_646 ) -new_n10842_ = NAND ( new_n2609_, new_n2607_, NET_614 ) -new_n10843_ = NOT ( NET_763 ) -new_n10844_ = XOR ( new_n7087_, new_n10843_ ) -new_n10845_ = NAND ( new_n10844_, new_n2587_ ) -new_n10846_ = NAND ( new_n10845_, new_n10842_, new_n10841_, new_n10840_ ) -new_n10847_ = NAND ( new_n10846_, new_n3243_ ) -new_n10848_ = NAND ( new_n10847_, new_n10839_, new_n10838_, new_n10837_ ) -NET_14426 = OR ( new_n10848_, new_n10836_ ) -new_n10850_ = NOR ( new_n10835_, new_n3264_ ) -new_n10851_ = NAND ( new_n10822_, new_n3266_ ) -new_n10852_ = NAND ( new_n10469_, new_n3271_ ) -new_n10853_ = NAND ( new_n3262_, NET_645 ) -new_n10854_ = NAND ( new_n10846_, new_n3269_ ) -new_n10855_ = NAND ( new_n10854_, new_n10853_, new_n10852_, new_n10851_ ) -NET_14427 = OR ( new_n10855_, new_n10850_ ) -new_n10857_ = NOR ( new_n10835_, new_n3767_ ) -new_n10858_ = NOT ( new_n10822_ ) -new_n10859_ = NOR ( new_n10858_, new_n2743_ ) -new_n10860_ = NAND ( new_n2713_, NET_677 ) -new_n10861_ = NAND ( new_n10846_, new_n2765_ ) -new_n10862_ = NAND ( new_n10469_, new_n2756_ ) -new_n10863_ = NAND ( new_n10654_, new_n2758_ ) -new_n10864_ = NAND ( new_n10863_, new_n10862_, new_n10861_, new_n10860_ ) -NET_14428 = OR ( new_n10864_, new_n10859_, new_n10857_ ) -new_n10866_ = NOR ( new_n10835_, new_n3339_ ) -new_n10867_ = NAND ( new_n10822_, new_n9687_ ) -new_n10868_ = NAND ( new_n10654_, new_n3350_ ) -new_n10869_ = NAND ( new_n10846_, new_n3352_ ) -new_n10870_ = NAND ( new_n10654_, new_n3193_ ) -new_n10871_ = NAND ( new_n10469_, new_n3355_ ) -new_n10872_ = NAND ( new_n10871_, new_n10870_, new_n10869_ ) -new_n10873_ = NAND ( new_n10872_, new_n3359_ ) -new_n10874_ = OR ( NET_765, new_n10653_ ) -new_n10875_ = NAND ( new_n10874_, new_n10873_, new_n10868_, new_n10867_ ) -NET_14429 = OR ( new_n10875_, new_n10866_ ) -new_n10877_ = NOR ( new_n6949_, new_n9698_ ) -new_n10878_ = NAND ( new_n10877_, new_n1942_ ) -new_n10879_ = NAND ( new_n10720_, new_n1870_ ) -new_n10880_ = NAND ( new_n10879_, new_n10878_, new_n9448_ ) -new_n10881_ = XOR ( new_n10880_, new_n1844_ ) -new_n10882_ = NAND ( new_n10877_, new_n1870_ ) -new_n10883_ = NAND ( new_n10720_, new_n1960_ ) -new_n10884_ = NAND ( new_n10883_, new_n10882_, new_n9455_ ) -new_n10885_ = OR ( new_n10884_, new_n10881_ ) -new_n10886_ = NAND ( new_n10884_, new_n10881_ ) -new_n10887_ = NAND ( new_n10886_, new_n10885_ ) -new_n10888_ = NAND ( new_n10698_, new_n10694_ ) -new_n10889_ = NAND ( new_n10888_, new_n10695_ ) -new_n10890_ = XOR ( new_n10889_, new_n10887_ ) -new_n10891_ = OR ( new_n10890_, new_n1840_ ) -new_n10892_ = NAND ( new_n10720_, new_n1976_ ) -new_n10893_ = AND ( new_n10877_, new_n9715_ ) -new_n10894_ = OR ( new_n10893_, new_n10892_ ) -new_n10895_ = NAND ( new_n10893_, new_n10892_ ) -new_n10896_ = NAND ( new_n10895_, new_n10894_ ) -new_n10897_ = NAND ( new_n10707_, new_n10703_ ) -new_n10898_ = NAND ( new_n10897_, new_n10704_ ) -new_n10899_ = XNOR ( new_n10898_, new_n10896_ ) -new_n10900_ = OR ( new_n10899_, new_n1975_ ) -new_n10901_ = NAND ( new_n10877_, new_n6828_ ) -new_n10902_ = NAND ( new_n1886_, new_n1882_, NET_188 ) -new_n10903_ = NAND ( new_n1894_, new_n1892_, NET_156 ) -new_n10904_ = NAND ( new_n1901_, new_n1898_, NET_124 ) -new_n10905_ = NOT ( NET_273 ) -new_n10906_ = AND ( new_n10717_, new_n10905_ ) -new_n10907_ = NOR ( new_n10717_, new_n10905_ ) -new_n10908_ = NOR ( new_n10907_, new_n10906_ ) -new_n10909_ = NAND ( new_n10908_, new_n1878_ ) -new_n10910_ = NAND ( new_n10909_, new_n10904_, new_n10903_, new_n10902_ ) -new_n10911_ = NAND ( new_n10910_, new_n1994_ ) -new_n10912_ = NAND ( new_n10531_, new_n3867_ ) -new_n10913_ = NAND ( new_n1838_, NET_187 ) -new_n10914_ = NAND ( new_n10718_, new_n2005_ ) -new_n10915_ = AND ( new_n10914_, new_n10913_, new_n10912_, new_n10911_ ) -NET_14448 = NAND ( new_n10915_, new_n10901_, new_n10900_, new_n10891_ ) -new_n10917_ = NOR ( new_n10890_, new_n2016_ ) -new_n10918_ = NOR ( new_n10899_, new_n2020_ ) -new_n10919_ = NAND ( new_n10877_, new_n9764_ ) -new_n10920_ = NAND ( new_n10718_, new_n2853_ ) -new_n10921_ = OR ( NET_275, new_n10714_ ) -new_n10922_ = NAND ( new_n10910_, new_n2043_ ) -new_n10923_ = NAND ( new_n10718_, new_n2009_ ) -new_n10924_ = NAND ( new_n10531_, new_n2864_ ) -new_n10925_ = NAND ( new_n10924_, new_n10923_, new_n10922_ ) -new_n10926_ = NAND ( new_n10925_, new_n2042_ ) -new_n10927_ = NAND ( new_n10926_, new_n10921_, new_n10920_, new_n10919_ ) -NET_14449 = OR ( new_n10927_, new_n10918_, new_n10917_ ) -new_n10929_ = NOR ( new_n10699_, new_n2873_ ) -new_n10930_ = NOT ( new_n10708_ ) -new_n10931_ = NAND ( new_n10930_, new_n2878_ ) -new_n10932_ = NAND ( new_n10686_, new_n2881_ ) -new_n10933_ = NAND ( new_n10344_, new_n3644_ ) -new_n10934_ = NAND ( new_n10720_, new_n1992_ ) -new_n10935_ = NAND ( new_n10934_, new_n10933_, new_n10932_, new_n10931_ ) -new_n10936_ = NOR ( new_n10935_, new_n10929_ ) -new_n10937_ = OR ( new_n10936_, new_n2891_ ) -new_n10938_ = NAND ( new_n2891_, NET_122 ) -NET_14450 = NAND ( new_n10938_, new_n10937_ ) -new_n10940_ = OR ( new_n10936_, new_n2900_ ) -new_n10941_ = NAND ( new_n2900_, NET_154 ) -NET_14451 = NAND ( new_n10941_, new_n10940_ ) -new_n10943_ = NOR ( new_n10779_, new_n3037_ ) -new_n10944_ = OR ( new_n10791_, new_n3041_ ) -new_n10945_ = NAND ( new_n10766_, new_n3044_ ) -new_n10946_ = NAND ( new_n10427_, new_n2966_ ) -new_n10947_ = NAND ( new_n10803_, new_n2367_ ) -new_n10948_ = NAND ( new_n10947_, new_n10946_, new_n10945_, new_n10944_ ) -new_n10949_ = NOR ( new_n10948_, new_n10943_ ) -new_n10950_ = OR ( new_n10949_, new_n3053_ ) -new_n10951_ = NAND ( new_n3053_, NET_367 ) -NET_14456 = NAND ( new_n10951_, new_n10950_ ) -new_n10953_ = OR ( new_n10949_, new_n3707_ ) -new_n10954_ = NAND ( new_n3707_, NET_399 ) -NET_14457 = NAND ( new_n10954_, new_n10953_ ) -new_n10956_ = NOR ( new_n6993_, new_n2289_ ) -new_n10957_ = NAND ( new_n10956_, new_n9824_ ) -new_n10958_ = NAND ( new_n10803_, new_n2274_ ) -new_n10959_ = NAND ( new_n10958_, new_n10957_, new_n9562_ ) -new_n10960_ = XOR ( new_n10959_, new_n2218_ ) -new_n10961_ = NAND ( new_n10956_, new_n2274_ ) -new_n10962_ = NAND ( new_n10803_, new_n2336_ ) -new_n10963_ = NAND ( new_n10962_, new_n10961_, new_n9573_ ) -new_n10964_ = OR ( new_n10963_, new_n10960_ ) -new_n10965_ = NAND ( new_n10963_, new_n10960_ ) -new_n10966_ = NAND ( new_n10965_, new_n10964_ ) -new_n10967_ = NAND ( new_n10778_, new_n10774_ ) -new_n10968_ = NAND ( new_n10967_, new_n10775_ ) -new_n10969_ = XOR ( new_n10968_, new_n10966_ ) -new_n10970_ = OR ( new_n10969_, new_n2208_ ) -new_n10971_ = NAND ( new_n10956_, new_n2348_ ) -new_n10972_ = NAND ( new_n10803_, new_n2349_ ) -new_n10973_ = NAND ( new_n10972_, new_n10971_ ) -new_n10974_ = XOR ( new_n10973_, new_n2349_ ) -new_n10975_ = NAND ( new_n10956_, new_n2349_ ) -new_n10976_ = NAND ( new_n10975_, new_n10974_ ) -new_n10977_ = OR ( new_n10975_, new_n10974_ ) -new_n10978_ = NAND ( new_n10977_, new_n10976_ ) -new_n10979_ = NAND ( new_n10790_, new_n10786_ ) -new_n10980_ = NAND ( new_n10979_, new_n10787_ ) -new_n10981_ = XOR ( new_n10980_, new_n10978_ ) -new_n10982_ = OR ( new_n10981_, new_n2362_ ) -new_n10983_ = NAND ( new_n10956_, new_n9852_ ) -new_n10984_ = NAND ( new_n2237_, new_n2232_, NET_433 ) -new_n10985_ = NAND ( new_n2244_, new_n2242_, NET_401 ) -new_n10986_ = NAND ( new_n2250_, new_n2248_, NET_369 ) -new_n10987_ = NOT ( NET_518 ) -new_n10988_ = AND ( new_n10800_, new_n10987_ ) -new_n10989_ = NOR ( new_n10800_, new_n10987_ ) -new_n10990_ = NOR ( new_n10989_, new_n10988_ ) -new_n10991_ = NAND ( new_n10990_, new_n2228_ ) -new_n10992_ = NAND ( new_n10991_, new_n10986_, new_n10985_, new_n10984_ ) -new_n10993_ = NAND ( new_n10992_, new_n2369_ ) -new_n10994_ = NAND ( new_n10612_, new_n2968_ ) -new_n10995_ = NAND ( new_n2196_, NET_432 ) -new_n10996_ = NAND ( new_n10801_, new_n2380_ ) -new_n10997_ = AND ( new_n10996_, new_n10995_, new_n10994_, new_n10993_ ) -NET_14500 = NAND ( new_n10997_, new_n10983_, new_n10982_, new_n10970_ ) -new_n10999_ = NOR ( new_n10969_, new_n2390_ ) -new_n11000_ = NOR ( new_n10981_, new_n2393_ ) -new_n11001_ = NAND ( new_n10956_, new_n9871_ ) -new_n11002_ = NAND ( new_n10801_, new_n3025_ ) -new_n11003_ = OR ( NET_520, new_n10797_ ) -new_n11004_ = NAND ( new_n10992_, new_n2416_ ) -new_n11005_ = NAND ( new_n10801_, new_n2384_ ) -new_n11006_ = NAND ( new_n10612_, new_n3029_ ) -new_n11007_ = NAND ( new_n11006_, new_n11005_, new_n11004_ ) -new_n11008_ = NAND ( new_n11007_, new_n2415_ ) -new_n11009_ = NAND ( new_n11008_, new_n11003_, new_n11002_, new_n11001_ ) -NET_14501 = OR ( new_n11009_, new_n11000_, new_n10999_ ) -new_n11011_ = NOR ( new_n5715_, new_n2735_ ) -new_n11012_ = NAND ( new_n11011_, new_n4328_ ) -new_n11013_ = NOT ( new_n10846_ ) -new_n11014_ = OR ( new_n11013_, new_n2578_ ) -new_n11015_ = NAND ( new_n11014_, new_n11012_, new_n9367_ ) -new_n11016_ = XOR ( new_n11015_, new_n2618_ ) -new_n11017_ = NAND ( new_n11011_, new_n2579_ ) -new_n11018_ = NAND ( new_n10846_, new_n2620_ ) -new_n11019_ = NAND ( new_n11018_, new_n11017_, new_n9374_ ) -new_n11020_ = OR ( new_n11019_, new_n11016_ ) -new_n11021_ = NAND ( new_n11019_, new_n11016_ ) -new_n11022_ = NAND ( new_n11021_, new_n11020_ ) -new_n11023_ = NAND ( new_n10834_, new_n10830_ ) -new_n11024_ = NAND ( new_n11023_, new_n10831_ ) -new_n11025_ = XOR ( new_n11024_, new_n11022_ ) -new_n11026_ = NOR ( new_n11025_, new_n3202_ ) -new_n11027_ = NAND ( new_n11011_, new_n3240_ ) -new_n11028_ = NAND ( new_n10656_, new_n3253_ ) -new_n11029_ = NAND ( new_n3197_, NET_614 ) -new_n11030_ = NAND ( new_n2596_, new_n2591_, NET_679 ) -new_n11031_ = NAND ( new_n2603_, new_n2601_, NET_647 ) -new_n11032_ = NAND ( new_n2609_, new_n2607_, NET_615 ) -new_n11033_ = NOT ( NET_757 ) -new_n11034_ = XOR ( new_n7088_, new_n11033_ ) -new_n11035_ = NAND ( new_n11034_, new_n2587_ ) -new_n11036_ = NAND ( new_n11035_, new_n11032_, new_n11031_, new_n11030_ ) -new_n11037_ = NAND ( new_n11036_, new_n3243_ ) -new_n11038_ = NAND ( new_n11037_, new_n11029_, new_n11028_, new_n11027_ ) -NET_14511 = OR ( new_n11038_, new_n11026_ ) -new_n11040_ = NOR ( new_n11025_, new_n3264_ ) -new_n11041_ = NAND ( new_n11011_, new_n3266_ ) -new_n11042_ = NAND ( new_n10656_, new_n3271_ ) -new_n11043_ = NAND ( new_n3262_, NET_646 ) -new_n11044_ = NAND ( new_n11036_, new_n3269_ ) -new_n11045_ = NAND ( new_n11044_, new_n11043_, new_n11042_, new_n11041_ ) -NET_14512 = OR ( new_n11045_, new_n11040_ ) -new_n11047_ = NOR ( new_n11025_, new_n3767_ ) -new_n11048_ = AND ( new_n11011_, new_n2744_ ) -new_n11049_ = NAND ( new_n2713_, NET_678 ) -new_n11050_ = NAND ( new_n11036_, new_n2765_ ) -new_n11051_ = NAND ( new_n10656_, new_n2756_ ) -new_n11052_ = NAND ( new_n10844_, new_n2758_ ) -new_n11053_ = NAND ( new_n11052_, new_n11051_, new_n11050_, new_n11049_ ) -NET_14513 = OR ( new_n11053_, new_n11048_, new_n11047_ ) -new_n11055_ = NOR ( new_n11025_, new_n3339_ ) -new_n11056_ = NAND ( new_n11011_, new_n9687_ ) -new_n11057_ = NAND ( new_n10844_, new_n3350_ ) -new_n11058_ = NAND ( new_n11036_, new_n3352_ ) -new_n11059_ = NAND ( new_n10844_, new_n3193_ ) -new_n11060_ = NAND ( new_n10656_, new_n3355_ ) -new_n11061_ = NAND ( new_n11060_, new_n11059_, new_n11058_ ) -new_n11062_ = NAND ( new_n11061_, new_n3359_ ) -new_n11063_ = OR ( NET_765, new_n10843_ ) -new_n11064_ = NAND ( new_n11063_, new_n11062_, new_n11057_, new_n11056_ ) -NET_14514 = OR ( new_n11064_, new_n11055_ ) -new_n11066_ = NOR ( new_n7434_, new_n9698_ ) -new_n11067_ = NAND ( new_n11066_, new_n1942_ ) -new_n11068_ = NAND ( new_n10910_, new_n1870_ ) -new_n11069_ = NAND ( new_n11068_, new_n11067_, new_n9448_ ) -new_n11070_ = XOR ( new_n11069_, new_n1844_ ) -new_n11071_ = NAND ( new_n11066_, new_n1870_ ) -new_n11072_ = NAND ( new_n10910_, new_n1960_ ) -new_n11073_ = NAND ( new_n11072_, new_n11071_, new_n9455_ ) -new_n11074_ = OR ( new_n11073_, new_n11070_ ) -new_n11075_ = NAND ( new_n11073_, new_n11070_ ) -new_n11076_ = NAND ( new_n11075_, new_n11074_ ) -new_n11077_ = NAND ( new_n10889_, new_n10885_ ) -new_n11078_ = NAND ( new_n11077_, new_n10886_ ) -new_n11079_ = XOR ( new_n11078_, new_n11076_ ) -new_n11080_ = OR ( new_n11079_, new_n1840_ ) -new_n11081_ = NAND ( new_n10910_, new_n1976_ ) -new_n11082_ = AND ( new_n11066_, new_n9715_ ) -new_n11083_ = OR ( new_n11082_, new_n11081_ ) -new_n11084_ = NAND ( new_n11082_, new_n11081_ ) -new_n11085_ = NAND ( new_n11084_, new_n11083_ ) -new_n11086_ = NAND ( new_n10898_, new_n10894_ ) -new_n11087_ = NAND ( new_n11086_, new_n10895_ ) -new_n11088_ = XNOR ( new_n11087_, new_n11085_ ) -new_n11089_ = OR ( new_n11088_, new_n1975_ ) -new_n11090_ = NAND ( new_n11066_, new_n6828_ ) -new_n11091_ = NAND ( new_n1886_, new_n1882_, NET_189 ) -new_n11092_ = NAND ( new_n1894_, new_n1892_, NET_157 ) -new_n11093_ = NAND ( new_n1901_, new_n1898_, NET_125 ) -new_n11094_ = XOR ( new_n10907_, NET_267 ) -new_n11095_ = NAND ( new_n11094_, new_n1878_ ) -new_n11096_ = NAND ( new_n11095_, new_n11093_, new_n11092_, new_n11091_ ) -new_n11097_ = NAND ( new_n11096_, new_n1994_ ) -new_n11098_ = NAND ( new_n10720_, new_n3867_ ) -new_n11099_ = NAND ( new_n1838_, NET_188 ) -new_n11100_ = NAND ( new_n10908_, new_n2005_ ) -new_n11101_ = AND ( new_n11100_, new_n11099_, new_n11098_, new_n11097_ ) -NET_14538 = NAND ( new_n11101_, new_n11090_, new_n11089_, new_n11080_ ) -new_n11103_ = NOR ( new_n11079_, new_n2016_ ) -new_n11104_ = NOR ( new_n11088_, new_n2020_ ) -new_n11105_ = NAND ( new_n11066_, new_n9764_ ) -new_n11106_ = NAND ( new_n10908_, new_n2853_ ) -new_n11107_ = OR ( NET_275, new_n10905_ ) -new_n11108_ = NAND ( new_n11096_, new_n2043_ ) -new_n11109_ = NAND ( new_n10908_, new_n2009_ ) -new_n11110_ = NAND ( new_n10720_, new_n2864_ ) -new_n11111_ = NAND ( new_n11110_, new_n11109_, new_n11108_ ) -new_n11112_ = NAND ( new_n11111_, new_n2042_ ) -new_n11113_ = NAND ( new_n11112_, new_n11107_, new_n11106_, new_n11105_ ) -NET_14539 = OR ( new_n11113_, new_n11104_, new_n11103_ ) -new_n11115_ = NOR ( new_n10890_, new_n2873_ ) -new_n11116_ = NOT ( new_n10899_ ) -new_n11117_ = NAND ( new_n11116_, new_n2878_ ) -new_n11118_ = NAND ( new_n10877_, new_n2881_ ) -new_n11119_ = NAND ( new_n10531_, new_n3644_ ) -new_n11120_ = NAND ( new_n10910_, new_n1992_ ) -new_n11121_ = NAND ( new_n11120_, new_n11119_, new_n11118_, new_n11117_ ) -new_n11122_ = NOR ( new_n11121_, new_n11115_ ) -new_n11123_ = OR ( new_n11122_, new_n2891_ ) -new_n11124_ = NAND ( new_n2891_, NET_123 ) -NET_14540 = NAND ( new_n11124_, new_n11123_ ) -new_n11126_ = OR ( new_n11122_, new_n2900_ ) -new_n11127_ = NAND ( new_n2900_, NET_155 ) -NET_14541 = NAND ( new_n11127_, new_n11126_ ) -new_n11129_ = NOR ( new_n10969_, new_n3037_ ) -new_n11130_ = OR ( new_n10981_, new_n3041_ ) -new_n11131_ = NAND ( new_n10956_, new_n3044_ ) -new_n11132_ = NAND ( new_n10612_, new_n2966_ ) -new_n11133_ = NAND ( new_n10992_, new_n2367_ ) -new_n11134_ = NAND ( new_n11133_, new_n11132_, new_n11131_, new_n11130_ ) -new_n11135_ = NOR ( new_n11134_, new_n11129_ ) -new_n11136_ = OR ( new_n11135_, new_n3053_ ) -new_n11137_ = NAND ( new_n3053_, NET_368 ) -NET_14547 = NAND ( new_n11137_, new_n11136_ ) -new_n11139_ = OR ( new_n11135_, new_n3707_ ) -new_n11140_ = NAND ( new_n3707_, NET_400 ) -NET_14548 = NAND ( new_n11140_, new_n11139_ ) -new_n11142_ = NOR ( new_n7441_, new_n2289_ ) -new_n11143_ = NAND ( new_n11142_, new_n9824_ ) -new_n11144_ = NAND ( new_n10992_, new_n2274_ ) -new_n11145_ = NAND ( new_n11144_, new_n11143_, new_n9562_ ) -new_n11146_ = XOR ( new_n11145_, new_n2218_ ) -new_n11147_ = NAND ( new_n11142_, new_n2274_ ) -new_n11148_ = NAND ( new_n10992_, new_n2336_ ) -new_n11149_ = NAND ( new_n11148_, new_n11147_, new_n9573_ ) -new_n11150_ = OR ( new_n11149_, new_n11146_ ) -new_n11151_ = NAND ( new_n11149_, new_n11146_ ) -new_n11152_ = NAND ( new_n11151_, new_n11150_ ) -new_n11153_ = NAND ( new_n10968_, new_n10964_ ) -new_n11154_ = NAND ( new_n11153_, new_n10965_ ) -new_n11155_ = XOR ( new_n11154_, new_n11152_ ) -new_n11156_ = OR ( new_n11155_, new_n2208_ ) -new_n11157_ = NAND ( new_n11142_, new_n2348_ ) -new_n11158_ = NAND ( new_n10992_, new_n2349_ ) -new_n11159_ = NAND ( new_n11158_, new_n11157_ ) -new_n11160_ = XOR ( new_n11159_, new_n2349_ ) -new_n11161_ = NAND ( new_n11142_, new_n2349_ ) -new_n11162_ = NAND ( new_n11161_, new_n11160_ ) -new_n11163_ = OR ( new_n11161_, new_n11160_ ) -new_n11164_ = NAND ( new_n11163_, new_n11162_ ) -new_n11165_ = NAND ( new_n10980_, new_n10976_ ) -new_n11166_ = NAND ( new_n11165_, new_n10977_ ) -new_n11167_ = XOR ( new_n11166_, new_n11164_ ) -new_n11168_ = OR ( new_n11167_, new_n2362_ ) -new_n11169_ = NAND ( new_n11142_, new_n9852_ ) -new_n11170_ = NAND ( new_n2237_, new_n2232_, NET_434 ) -new_n11171_ = NAND ( new_n2244_, new_n2242_, NET_402 ) -new_n11172_ = NAND ( new_n2250_, new_n2248_, NET_370 ) -new_n11173_ = XOR ( new_n10989_, NET_512 ) -new_n11174_ = NAND ( new_n11173_, new_n2228_ ) -new_n11175_ = NAND ( new_n11174_, new_n11172_, new_n11171_, new_n11170_ ) -new_n11176_ = NAND ( new_n11175_, new_n2369_ ) -new_n11177_ = NAND ( new_n10803_, new_n2968_ ) -new_n11178_ = NAND ( new_n2196_, NET_433 ) -new_n11179_ = NAND ( new_n10990_, new_n2380_ ) -new_n11180_ = AND ( new_n11179_, new_n11178_, new_n11177_, new_n11176_ ) -NET_14587 = NAND ( new_n11180_, new_n11169_, new_n11168_, new_n11156_ ) -new_n11182_ = NOR ( new_n11155_, new_n2390_ ) -new_n11183_ = NOR ( new_n11167_, new_n2393_ ) -new_n11184_ = NAND ( new_n11142_, new_n9871_ ) -new_n11185_ = NAND ( new_n10990_, new_n3025_ ) -new_n11186_ = OR ( NET_520, new_n10987_ ) -new_n11187_ = NAND ( new_n11175_, new_n2416_ ) -new_n11188_ = NAND ( new_n10990_, new_n2384_ ) -new_n11189_ = NAND ( new_n10803_, new_n3029_ ) -new_n11190_ = NAND ( new_n11189_, new_n11188_, new_n11187_ ) -new_n11191_ = NAND ( new_n11190_, new_n2415_ ) -new_n11192_ = NAND ( new_n11191_, new_n11186_, new_n11185_, new_n11184_ ) -NET_14588 = OR ( new_n11192_, new_n11183_, new_n11182_ ) -new_n11194_ = NOR ( new_n5994_, new_n2735_ ) -new_n11195_ = NAND ( new_n11194_, new_n4328_ ) -new_n11196_ = NAND ( new_n11036_, new_n2579_ ) -new_n11197_ = NAND ( new_n11196_, new_n11195_, new_n9367_ ) -new_n11198_ = XOR ( new_n11197_, new_n2618_ ) -new_n11199_ = NAND ( new_n11194_, new_n2579_ ) -new_n11200_ = NAND ( new_n11036_, new_n2620_ ) -new_n11201_ = NAND ( new_n11200_, new_n11199_, new_n9374_ ) -new_n11202_ = OR ( new_n11201_, new_n11198_ ) -new_n11203_ = NAND ( new_n11201_, new_n11198_ ) -new_n11204_ = NAND ( new_n11203_, new_n11202_ ) -new_n11205_ = NAND ( new_n11024_, new_n11020_ ) -new_n11206_ = NAND ( new_n11205_, new_n11021_ ) -new_n11207_ = XOR ( new_n11206_, new_n11204_ ) -new_n11208_ = NOR ( new_n11207_, new_n3202_ ) -new_n11209_ = NAND ( new_n11194_, new_n3240_ ) -new_n11210_ = NAND ( new_n10846_, new_n3253_ ) -new_n11211_ = NAND ( new_n3197_, NET_615 ) -new_n11212_ = NAND ( new_n2596_, new_n2591_, NET_680 ) -new_n11213_ = NAND ( new_n2603_, new_n2601_, NET_648 ) -new_n11214_ = NAND ( new_n2609_, new_n2607_, NET_616 ) -new_n11215_ = NAND ( new_n11214_, new_n11213_, new_n11212_, new_n7090_ ) -new_n11216_ = NAND ( new_n11215_, new_n3243_ ) -new_n11217_ = NAND ( new_n11216_, new_n11211_, new_n11210_, new_n11209_ ) -NET_14598 = OR ( new_n11217_, new_n11208_ ) -new_n11219_ = NOR ( new_n11207_, new_n3264_ ) -new_n11220_ = NAND ( new_n11194_, new_n3266_ ) -new_n11221_ = NAND ( new_n10846_, new_n3271_ ) -new_n11222_ = NAND ( new_n3262_, NET_647 ) -new_n11223_ = NAND ( new_n11215_, new_n3269_ ) -new_n11224_ = NAND ( new_n11223_, new_n11222_, new_n11221_, new_n11220_ ) -NET_14599 = OR ( new_n11224_, new_n11219_ ) -new_n11226_ = NOR ( new_n11207_, new_n3767_ ) -new_n11227_ = NOT ( new_n11194_ ) -new_n11228_ = NOR ( new_n11227_, new_n2743_ ) -new_n11229_ = NAND ( new_n2713_, NET_679 ) -new_n11230_ = NAND ( new_n11215_, new_n2765_ ) -new_n11231_ = NAND ( new_n10846_, new_n2756_ ) -new_n11232_ = NAND ( new_n11034_, new_n2758_ ) -new_n11233_ = NAND ( new_n11232_, new_n11231_, new_n11230_, new_n11229_ ) -NET_14600 = OR ( new_n11233_, new_n11228_, new_n11226_ ) -new_n11235_ = NOR ( new_n11207_, new_n3339_ ) -new_n11236_ = NAND ( new_n11194_, new_n9687_ ) -new_n11237_ = NAND ( new_n11034_, new_n3350_ ) -new_n11238_ = NAND ( new_n11215_, new_n3352_ ) -new_n11239_ = NAND ( new_n11034_, new_n3193_ ) -new_n11240_ = NAND ( new_n10846_, new_n3355_ ) -new_n11241_ = NAND ( new_n11240_, new_n11239_, new_n11238_ ) -new_n11242_ = NAND ( new_n11241_, new_n3359_ ) -new_n11243_ = OR ( NET_765, new_n11033_ ) -new_n11244_ = NAND ( new_n11243_, new_n11242_, new_n11237_, new_n11236_ ) -NET_14601 = OR ( new_n11244_, new_n11235_ ) -new_n11246_ = NOR ( new_n7756_, new_n9698_ ) -new_n11247_ = NAND ( new_n11246_, new_n1942_ ) -new_n11248_ = NAND ( new_n11096_, new_n1870_ ) -new_n11249_ = NAND ( new_n11248_, new_n11247_, new_n9448_ ) -new_n11250_ = XOR ( new_n11249_, new_n1844_ ) -new_n11251_ = NAND ( new_n11246_, new_n1870_ ) -new_n11252_ = NAND ( new_n11096_, new_n1960_ ) -new_n11253_ = NAND ( new_n11252_, new_n11251_, new_n9455_ ) -new_n11254_ = OR ( new_n11253_, new_n11250_ ) -new_n11255_ = NAND ( new_n11253_, new_n11250_ ) -new_n11256_ = NAND ( new_n11255_, new_n11254_ ) -new_n11257_ = NAND ( new_n11078_, new_n11074_ ) -new_n11258_ = NAND ( new_n11257_, new_n11075_ ) -new_n11259_ = XOR ( new_n11258_, new_n11256_ ) -new_n11260_ = OR ( new_n11259_, new_n1840_ ) -new_n11261_ = NAND ( new_n11096_, new_n1976_ ) -new_n11262_ = AND ( new_n11246_, new_n9715_ ) -new_n11263_ = OR ( new_n11262_, new_n11261_ ) -new_n11264_ = NAND ( new_n11262_, new_n11261_ ) -new_n11265_ = NAND ( new_n11264_, new_n11263_ ) -new_n11266_ = NAND ( new_n11087_, new_n11083_ ) -new_n11267_ = NAND ( new_n11266_, new_n11084_ ) -new_n11268_ = XNOR ( new_n11267_, new_n11265_ ) -new_n11269_ = OR ( new_n11268_, new_n1975_ ) -new_n11270_ = NAND ( new_n11246_, new_n6828_ ) -new_n11271_ = NAND ( new_n10907_, new_n1878_, NET_267 ) -new_n11272_ = NAND ( new_n1886_, new_n1882_, NET_190 ) -new_n11273_ = NAND ( new_n1894_, new_n1892_, NET_158 ) -new_n11274_ = NAND ( new_n1901_, new_n1898_, NET_126 ) -new_n11275_ = NAND ( new_n11274_, new_n11273_, new_n11272_, new_n11271_ ) -new_n11276_ = NAND ( new_n11275_, new_n1994_ ) -new_n11277_ = NAND ( new_n10910_, new_n3867_ ) -new_n11278_ = NAND ( new_n1838_, NET_189 ) -new_n11279_ = NAND ( new_n11094_, new_n2005_ ) -new_n11280_ = AND ( new_n11279_, new_n11278_, new_n11277_, new_n11276_ ) -NET_14617 = NAND ( new_n11280_, new_n11270_, new_n11269_, new_n11260_ ) -new_n11282_ = NOR ( new_n11259_, new_n2016_ ) -new_n11283_ = NOR ( new_n11268_, new_n2020_ ) -new_n11284_ = NAND ( new_n11246_, new_n9764_ ) -new_n11285_ = NAND ( new_n11094_, new_n2853_ ) -new_n11286_ = NAND ( NET_35973, NET_267 ) -new_n11287_ = NAND ( new_n11275_, new_n2043_ ) -new_n11288_ = NAND ( new_n11094_, new_n2009_ ) -new_n11289_ = NAND ( new_n10910_, new_n2864_ ) -new_n11290_ = NAND ( new_n11289_, new_n11288_, new_n11287_ ) -new_n11291_ = NAND ( new_n11290_, new_n2042_ ) -new_n11292_ = NAND ( new_n11291_, new_n11286_, new_n11285_, new_n11284_ ) -NET_14618 = OR ( new_n11292_, new_n11283_, new_n11282_ ) -new_n11294_ = NOR ( new_n11079_, new_n2873_ ) -new_n11295_ = NOT ( new_n11088_ ) -new_n11296_ = NAND ( new_n11295_, new_n2878_ ) -new_n11297_ = NAND ( new_n11066_, new_n2881_ ) -new_n11298_ = NAND ( new_n10720_, new_n3644_ ) -new_n11299_ = NAND ( new_n11096_, new_n1992_ ) -new_n11300_ = NAND ( new_n11299_, new_n11298_, new_n11297_, new_n11296_ ) -new_n11301_ = NOR ( new_n11300_, new_n11294_ ) -new_n11302_ = OR ( new_n11301_, new_n2891_ ) -new_n11303_ = NAND ( new_n2891_, NET_124 ) -NET_14619 = NAND ( new_n11303_, new_n11302_ ) -new_n11305_ = OR ( new_n11301_, new_n2900_ ) -new_n11306_ = NAND ( new_n2900_, NET_156 ) -NET_14620 = NAND ( new_n11306_, new_n11305_ ) -new_n11308_ = NOR ( new_n11155_, new_n3037_ ) -new_n11309_ = OR ( new_n11167_, new_n3041_ ) -new_n11310_ = NAND ( new_n11142_, new_n3044_ ) -new_n11311_ = NAND ( new_n10803_, new_n2966_ ) -new_n11312_ = NAND ( new_n11175_, new_n2367_ ) -new_n11313_ = NAND ( new_n11312_, new_n11311_, new_n11310_, new_n11309_ ) -new_n11314_ = NOR ( new_n11313_, new_n11308_ ) -new_n11315_ = OR ( new_n11314_, new_n3053_ ) -new_n11316_ = NAND ( new_n3053_, NET_369 ) -NET_14629 = NAND ( new_n11316_, new_n11315_ ) -new_n11318_ = OR ( new_n11314_, new_n3707_ ) -new_n11319_ = NAND ( new_n3707_, NET_401 ) -NET_14630 = NAND ( new_n11319_, new_n11318_ ) -new_n11321_ = NAND ( new_n11267_, new_n11263_ ) -new_n11322_ = NAND ( new_n11321_, new_n11264_ ) -new_n11323_ = NAND ( new_n11275_, new_n1725_ ) -new_n11324_ = NOT ( new_n1846_ ) -new_n11325_ = OR ( new_n1865_, new_n11324_ ) -new_n11326_ = NAND ( new_n2884_, new_n1854_ ) -new_n11327_ = NAND ( new_n11326_, new_n11325_ ) -new_n11328_ = NAND ( new_n11096_, new_n11327_ ) -new_n11329_ = NAND ( new_n2884_, new_n1794_ ) -new_n11330_ = NAND ( new_n2896_, new_n11329_, new_n2885_, new_n1852_ ) -new_n11331_ = NAND ( new_n11330_, new_n11275_ ) -new_n11332_ = AND ( new_n11331_, new_n11328_ ) -new_n11333_ = NAND ( new_n11332_, new_n11323_ ) -new_n11334_ = NOT ( new_n11333_ ) -new_n11335_ = NOT ( new_n1934_ ) -new_n11336_ = NOR ( new_n7954_, new_n9698_ ) -new_n11337_ = NAND ( new_n11336_, new_n11335_ ) -new_n11338_ = NOR ( new_n1865_, new_n1728_ ) -new_n11339_ = OR ( new_n11327_, new_n11338_ ) -new_n11340_ = NAND ( new_n11339_, new_n11246_ ) -new_n11341_ = NAND ( new_n11336_, new_n11330_ ) -new_n11342_ = AND ( new_n11341_, new_n11340_ ) -new_n11343_ = NAND ( new_n11342_, new_n11337_ ) -new_n11344_ = OR ( new_n11343_, new_n11334_ ) -new_n11345_ = NAND ( new_n11344_, new_n11322_ ) -new_n11346_ = NAND ( new_n11343_, new_n11334_ ) -new_n11347_ = NAND ( new_n11346_, new_n11345_ ) -new_n11348_ = NAND ( new_n1894_, new_n1892_, NET_159 ) -new_n11349_ = NAND ( new_n1901_, new_n1898_, NET_127 ) -new_n11350_ = NAND ( new_n1886_, new_n1882_, NET_191 ) -new_n11351_ = NAND ( new_n11350_, new_n11349_, new_n11348_ ) -new_n11352_ = NAND ( new_n11351_, new_n1725_ ) -new_n11353_ = AND ( new_n11352_, new_n11332_ ) -new_n11354_ = NOR ( new_n8541_, new_n9698_ ) -new_n11355_ = NAND ( new_n11354_, new_n11335_ ) -new_n11356_ = NAND ( new_n11355_, new_n11342_, new_n1726_ ) -new_n11357_ = OR ( new_n11356_, new_n11353_ ) -new_n11358_ = NAND ( new_n11356_, new_n11353_ ) -new_n11359_ = NAND ( new_n11358_, new_n11357_ ) -new_n11360_ = XNOR ( new_n11359_, new_n11347_ ) -new_n11361_ = OR ( new_n11360_, new_n1972_ ) -new_n11362_ = NAND ( new_n1894_, new_n1892_, NET_160 ) -new_n11363_ = NAND ( new_n1901_, new_n1898_, NET_128 ) -new_n11364_ = NAND ( new_n1886_, new_n1882_, NET_192 ) -new_n11365_ = NAND ( new_n11364_, new_n11363_, new_n11362_ ) -new_n11366_ = NAND ( new_n1920_, new_n1778_ ) -new_n11367_ = NAND ( new_n11366_, new_n1921_ ) -new_n11368_ = NAND ( new_n11367_, new_n11365_, new_n1795_ ) -new_n11369_ = NAND ( new_n11368_, new_n11361_ ) -new_n11370_ = NAND ( new_n11369_, new_n1839_ ) -new_n11371_ = NAND ( new_n11354_, new_n6828_ ) -new_n11372_ = NAND ( new_n1838_, NET_191 ) -NET_14658 = NAND ( new_n11372_, new_n11371_, new_n11370_ ) -new_n11374_ = OR ( new_n11360_, new_n2877_ ) -new_n11375_ = NAND ( new_n11354_, new_n2881_ ) -new_n11376_ = NAND ( new_n11375_, new_n11374_, new_n11368_ ) -new_n11377_ = NAND ( new_n11376_, new_n2892_ ) -new_n11378_ = NAND ( new_n2891_, NET_127 ) -NET_14659 = NAND ( new_n11378_, new_n11377_ ) -new_n11380_ = NAND ( new_n11376_, new_n2901_ ) -new_n11381_ = NAND ( new_n2900_, NET_159 ) -NET_14660 = NAND ( new_n11381_, new_n11380_ ) -new_n11383_ = NOR ( new_n7763_, new_n2289_ ) -new_n11384_ = NAND ( new_n11383_, new_n9824_ ) -new_n11385_ = NAND ( new_n11175_, new_n2274_ ) -new_n11386_ = NAND ( new_n11385_, new_n11384_, new_n9562_ ) -new_n11387_ = XOR ( new_n11386_, new_n2218_ ) -new_n11388_ = NAND ( new_n11383_, new_n2274_ ) -new_n11389_ = NAND ( new_n11175_, new_n2336_ ) -new_n11390_ = NAND ( new_n11389_, new_n11388_, new_n9573_ ) -new_n11391_ = OR ( new_n11390_, new_n11387_ ) -new_n11392_ = NAND ( new_n11390_, new_n11387_ ) -new_n11393_ = NAND ( new_n11392_, new_n11391_ ) -new_n11394_ = NAND ( new_n11154_, new_n11150_ ) -new_n11395_ = NAND ( new_n11394_, new_n11151_ ) -new_n11396_ = XOR ( new_n11395_, new_n11393_ ) -new_n11397_ = OR ( new_n11396_, new_n2208_ ) -new_n11398_ = NAND ( new_n11383_, new_n2348_ ) -new_n11399_ = NAND ( new_n11175_, new_n2349_ ) -new_n11400_ = NAND ( new_n11399_, new_n11398_ ) -new_n11401_ = XOR ( new_n11400_, new_n2349_ ) -new_n11402_ = NAND ( new_n11383_, new_n2349_ ) -new_n11403_ = OR ( new_n11402_, new_n11401_ ) -new_n11404_ = NAND ( new_n11402_, new_n11401_ ) -new_n11405_ = NAND ( new_n11404_, new_n11403_ ) -new_n11406_ = NAND ( new_n11166_, new_n11162_ ) -new_n11407_ = NAND ( new_n11406_, new_n11163_ ) -new_n11408_ = XOR ( new_n11407_, new_n11405_ ) -new_n11409_ = OR ( new_n11408_, new_n2362_ ) -new_n11410_ = NAND ( new_n11383_, new_n9852_ ) -new_n11411_ = NAND ( new_n10989_, new_n2228_, NET_512 ) -new_n11412_ = NAND ( new_n2237_, new_n2232_, NET_435 ) -new_n11413_ = NAND ( new_n2244_, new_n2242_, NET_403 ) -new_n11414_ = NAND ( new_n2250_, new_n2248_, NET_371 ) -new_n11415_ = NAND ( new_n11414_, new_n11413_, new_n11412_, new_n11411_ ) -new_n11416_ = NAND ( new_n11415_, new_n2369_ ) -new_n11417_ = NAND ( new_n10992_, new_n2968_ ) -new_n11418_ = NAND ( new_n2196_, NET_434 ) -new_n11419_ = NAND ( new_n11173_, new_n2380_ ) -new_n11420_ = AND ( new_n11419_, new_n11418_, new_n11417_, new_n11416_ ) -NET_14670 = NAND ( new_n11420_, new_n11410_, new_n11409_, new_n11397_ ) -new_n11422_ = NOR ( new_n11396_, new_n2390_ ) -new_n11423_ = NOR ( new_n11408_, new_n2393_ ) -new_n11424_ = NAND ( new_n11383_, new_n9871_ ) -new_n11425_ = NAND ( new_n11173_, new_n3025_ ) -new_n11426_ = NAND ( NET_35976, NET_512 ) -new_n11427_ = NAND ( new_n11415_, new_n2416_ ) -new_n11428_ = NAND ( new_n11173_, new_n2384_ ) -new_n11429_ = NAND ( new_n10992_, new_n3029_ ) -new_n11430_ = NAND ( new_n11429_, new_n11428_, new_n11427_ ) -new_n11431_ = NAND ( new_n11430_, new_n2415_ ) -new_n11432_ = NAND ( new_n11431_, new_n11426_, new_n11425_, new_n11424_ ) -NET_14671 = OR ( new_n11432_, new_n11423_, new_n11422_ ) -new_n11434_ = NOR ( new_n6337_, new_n2735_ ) -new_n11435_ = NAND ( new_n11434_, new_n2517_ ) -new_n11436_ = NAND ( new_n11194_, new_n2523_ ) -new_n11437_ = NAND ( new_n11036_, new_n2577_ ) -new_n11438_ = NAND ( new_n11215_, new_n2572_ ) -new_n11439_ = AND ( new_n11438_, new_n11437_, new_n9367_ ) -new_n11440_ = NAND ( new_n11439_, new_n11436_, new_n11435_ ) -new_n11441_ = XOR ( new_n11440_, new_n2618_ ) -new_n11442_ = NAND ( new_n11215_, new_n2560_ ) -new_n11443_ = NAND ( new_n11434_, new_n2572_ ) -new_n11444_ = NAND ( new_n11194_, new_n2577_ ) -new_n11445_ = NAND ( new_n11036_, new_n2523_ ) -new_n11446_ = NAND ( new_n11215_, new_n2517_ ) -new_n11447_ = AND ( new_n11446_, new_n11445_, new_n9374_ ) -new_n11448_ = AND ( new_n11447_, new_n11444_, new_n11443_ ) -new_n11449_ = NAND ( new_n11448_, new_n11442_ ) -new_n11450_ = NAND ( new_n11449_, new_n11441_ ) -new_n11451_ = OR ( new_n11449_, new_n11441_ ) -new_n11452_ = NAND ( new_n11451_, new_n11450_ ) -new_n11453_ = NAND ( new_n11206_, new_n11202_ ) -new_n11454_ = NAND ( new_n11453_, new_n11203_ ) -new_n11455_ = XOR ( new_n11454_, new_n11452_ ) -new_n11456_ = NOR ( new_n11455_, new_n3202_ ) -new_n11457_ = NAND ( new_n11434_, new_n3240_ ) -new_n11458_ = NAND ( new_n11036_, new_n3253_ ) -new_n11459_ = NAND ( new_n3197_, NET_616 ) -new_n11460_ = NAND ( new_n2596_, new_n2591_, NET_681 ) -new_n11461_ = NAND ( new_n2603_, new_n2601_, NET_649 ) -new_n11462_ = NAND ( new_n2609_, new_n2607_, NET_617 ) -new_n11463_ = NAND ( new_n11462_, new_n11461_, new_n11460_, new_n7090_ ) -new_n11464_ = AND ( new_n11463_, new_n7066_, new_n2747_ ) -new_n11465_ = NAND ( new_n11464_, new_n3198_ ) -new_n11466_ = NAND ( new_n11465_, new_n11459_, new_n11458_, new_n11457_ ) -NET_14679 = OR ( new_n11466_, new_n11456_ ) -new_n11468_ = NOR ( new_n11455_, new_n3264_ ) -new_n11469_ = NAND ( new_n11434_, new_n3266_ ) -new_n11470_ = NAND ( new_n11036_, new_n3271_ ) -new_n11471_ = NAND ( new_n3262_, NET_648 ) -new_n11472_ = NAND ( new_n11464_, new_n3263_ ) -new_n11473_ = NAND ( new_n11472_, new_n11471_, new_n11470_, new_n11469_ ) -NET_14680 = OR ( new_n11473_, new_n11468_ ) -new_n11475_ = OR ( new_n11455_, new_n3767_ ) -new_n11476_ = NAND ( new_n11434_, new_n2744_ ) -new_n11477_ = NAND ( new_n11036_, new_n2756_ ) -new_n11478_ = NAND ( new_n2713_, NET_680 ) -new_n11479_ = NAND ( new_n11464_, new_n2714_ ) -new_n11480_ = AND ( new_n11479_, new_n11478_, new_n7105_ ) -NET_14681 = NAND ( new_n11480_, new_n11477_, new_n11476_, new_n11475_ ) -new_n11482_ = NOT ( new_n1935_ ) -new_n11483_ = NAND ( new_n1939_, new_n1937_, new_n11482_ ) -new_n11484_ = NAND ( new_n11483_, new_n11336_ ) -new_n11485_ = NAND ( new_n1940_, new_n1936_ ) -new_n11486_ = NAND ( new_n11485_, new_n11246_ ) -new_n11487_ = OR ( new_n1863_, new_n1853_ ) -new_n11488_ = NAND ( new_n11275_, new_n11487_ ) -new_n11489_ = NAND ( new_n11096_, new_n1869_ ) -new_n11490_ = AND ( new_n11489_, new_n11488_, new_n9448_ ) -new_n11491_ = NAND ( new_n11490_, new_n11486_, new_n11484_ ) -new_n11492_ = XOR ( new_n11491_, new_n1844_ ) -new_n11493_ = NAND ( new_n11275_, new_n1841_ ) -new_n11494_ = NAND ( new_n11336_, new_n11487_ ) -new_n11495_ = NAND ( new_n11246_, new_n1869_ ) -new_n11496_ = NAND ( new_n11483_, new_n11275_ ) -new_n11497_ = NAND ( new_n11485_, new_n11096_ ) -new_n11498_ = AND ( new_n11497_, new_n11496_, new_n9455_ ) -new_n11499_ = AND ( new_n11498_, new_n11495_, new_n11494_ ) -new_n11500_ = NAND ( new_n11499_, new_n11493_ ) -new_n11501_ = OR ( new_n11500_, new_n11492_ ) -new_n11502_ = NAND ( new_n11500_, new_n11492_ ) -new_n11503_ = NAND ( new_n11502_, new_n11501_ ) -new_n11504_ = NAND ( new_n11258_, new_n11254_ ) -new_n11505_ = NAND ( new_n11504_, new_n11255_ ) -new_n11506_ = XOR ( new_n11505_, new_n11503_ ) -new_n11507_ = OR ( new_n11506_, new_n1840_ ) -new_n11508_ = NAND ( new_n11346_, new_n11344_ ) -new_n11509_ = XOR ( new_n11508_, new_n11322_ ) -new_n11510_ = NAND ( new_n11509_, new_n1974_, new_n1839_ ) -new_n11511_ = NAND ( new_n11336_, new_n6828_ ) -new_n11512_ = NAND ( new_n11367_, new_n11351_ ) -new_n11513_ = NAND ( new_n11096_, new_n1991_ ) -new_n11514_ = NAND ( new_n11513_, new_n11512_ ) -new_n11515_ = NAND ( new_n11514_, new_n1795_ ) -new_n11516_ = OR ( new_n11515_, new_n1838_ ) -new_n11517_ = NAND ( new_n1838_, NET_190 ) -new_n11518_ = NAND ( new_n10907_, new_n2005_, NET_267 ) -new_n11519_ = AND ( new_n11518_, new_n11517_, new_n11516_ ) -NET_14704 = NAND ( new_n11519_, new_n11511_, new_n11510_, new_n11507_ ) -new_n11521_ = NAND ( new_n11358_, new_n11346_, new_n11345_ ) -new_n11522_ = NAND ( new_n11365_, new_n1725_ ) -new_n11523_ = NAND ( new_n11522_, new_n11332_ ) -new_n11524_ = NOT ( new_n11523_ ) -new_n11525_ = NOR ( new_n8757_, new_n9698_ ) -new_n11526_ = NAND ( new_n11525_, new_n11335_ ) -new_n11527_ = NAND ( new_n11526_, new_n11342_ ) -new_n11528_ = OR ( new_n11527_, new_n11524_ ) -new_n11529_ = NAND ( new_n11527_, new_n11524_ ) -new_n11530_ = NAND ( new_n11529_, new_n11528_, new_n11521_, new_n11357_ ) -new_n11531_ = NAND ( new_n11357_, new_n11347_ ) -new_n11532_ = NAND ( new_n11529_, new_n11528_ ) -new_n11533_ = NAND ( new_n11532_, new_n11531_, new_n11358_ ) -new_n11534_ = AND ( new_n11533_, new_n11530_ ) -new_n11535_ = OR ( new_n11534_, new_n1972_ ) -new_n11536_ = NAND ( new_n11535_, new_n11368_ ) -new_n11537_ = NAND ( new_n11536_, new_n1839_ ) -new_n11538_ = NAND ( new_n11525_, new_n6828_ ) -new_n11539_ = NAND ( new_n1838_, NET_192 ) -NET_14705 = NAND ( new_n11539_, new_n11538_, new_n11537_ ) -new_n11541_ = NOR ( new_n11259_, new_n2873_ ) -new_n11542_ = NOT ( new_n11268_ ) -new_n11543_ = NAND ( new_n11542_, new_n2878_ ) -new_n11544_ = NAND ( new_n11246_, new_n2881_ ) -new_n11545_ = NAND ( new_n10910_, new_n3644_ ) -new_n11546_ = NAND ( new_n11275_, new_n1992_ ) -new_n11547_ = NAND ( new_n11546_, new_n11545_, new_n11544_, new_n11543_ ) -new_n11548_ = NOR ( new_n11547_, new_n11541_ ) -new_n11549_ = OR ( new_n11548_, new_n2891_ ) -new_n11550_ = NAND ( new_n2891_, NET_125 ) -NET_14706 = NAND ( new_n11550_, new_n11549_ ) -new_n11552_ = OR ( new_n11534_, new_n2877_ ) -new_n11553_ = NAND ( new_n11525_, new_n2881_ ) -new_n11554_ = NAND ( new_n11553_, new_n11552_, new_n11368_ ) -new_n11555_ = NAND ( new_n11554_, new_n2892_ ) -new_n11556_ = NAND ( new_n2891_, NET_128 ) -NET_14707 = NAND ( new_n11556_, new_n11555_ ) -new_n11558_ = OR ( new_n11548_, new_n2900_ ) -new_n11559_ = NAND ( new_n2900_, NET_157 ) -NET_14708 = NAND ( new_n11559_, new_n11558_ ) -new_n11561_ = NAND ( new_n11554_, new_n2901_ ) -new_n11562_ = NAND ( new_n2900_, NET_160 ) -NET_14709 = NAND ( new_n11562_, new_n11561_ ) -new_n11564_ = NOR ( new_n8036_, new_n2289_ ) -new_n11565_ = NAND ( new_n11564_, new_n2303_ ) -new_n11566_ = NAND ( new_n11383_, new_n2308_ ) -new_n11567_ = NAND ( new_n11415_, new_n2267_ ) -new_n11568_ = NAND ( new_n11175_, new_n2272_ ) -new_n11569_ = AND ( new_n11568_, new_n9562_ ) -new_n11570_ = NAND ( new_n11569_, new_n11567_, new_n11566_, new_n11565_ ) -new_n11571_ = XNOR ( new_n11570_, new_n2218_ ) -new_n11572_ = NOT ( new_n11571_ ) -new_n11573_ = NAND ( new_n11415_, new_n2193_ ) -new_n11574_ = NAND ( new_n11564_, new_n2267_ ) -new_n11575_ = NAND ( new_n11383_, new_n2272_ ) -new_n11576_ = NAND ( new_n11175_, new_n2308_ ) -new_n11577_ = NAND ( new_n11415_, new_n2303_ ) -new_n11578_ = AND ( new_n11577_, new_n11576_, new_n9573_ ) -new_n11579_ = AND ( new_n11578_, new_n11575_, new_n11574_ ) -new_n11580_ = NAND ( new_n11579_, new_n11573_ ) -new_n11581_ = OR ( new_n11580_, new_n11572_ ) -new_n11582_ = NAND ( new_n11580_, new_n11572_ ) -new_n11583_ = NAND ( new_n11582_, new_n11581_ ) -new_n11584_ = NAND ( new_n11395_, new_n11391_ ) -new_n11585_ = NAND ( new_n11584_, new_n11392_ ) -new_n11586_ = XOR ( new_n11585_, new_n11583_ ) -new_n11587_ = NOR ( new_n11586_, new_n2208_ ) -new_n11588_ = NAND ( new_n11564_, new_n2348_, new_n2268_ ) -new_n11589_ = NAND ( new_n11383_, new_n2348_, new_n2262_ ) -new_n11590_ = NOR ( new_n2268_, new_n2203_ ) -new_n11591_ = OR ( new_n11590_, new_n2269_ ) -new_n11592_ = NAND ( new_n11591_, new_n11175_ ) -new_n11593_ = NOR ( new_n2262_, new_n2203_ ) -new_n11594_ = OR ( new_n11593_, new_n2258_ ) -new_n11595_ = NAND ( new_n11594_, new_n11415_ ) -new_n11596_ = AND ( new_n11595_, new_n11592_, new_n11589_ ) -new_n11597_ = NAND ( new_n11596_, new_n11588_ ) -new_n11598_ = XNOR ( new_n11597_, new_n2349_ ) -new_n11599_ = NAND ( new_n11591_, new_n11383_ ) -new_n11600_ = NAND ( new_n11594_, new_n11564_ ) -new_n11601_ = NAND ( new_n11600_, new_n11599_ ) -new_n11602_ = OR ( new_n11601_, new_n11598_ ) -new_n11603_ = NAND ( new_n11601_, new_n11598_ ) -new_n11604_ = NAND ( new_n11603_, new_n11602_ ) -new_n11605_ = NAND ( new_n11407_, new_n11404_ ) -new_n11606_ = NAND ( new_n11605_, new_n11403_ ) -new_n11607_ = XOR ( new_n11606_, new_n11604_ ) -new_n11608_ = NOR ( new_n11607_, new_n2362_ ) -new_n11609_ = NAND ( new_n11564_, new_n9852_ ) -new_n11610_ = NOR ( new_n2283_, NET_490 ) -new_n11611_ = OR ( new_n11610_, new_n2289_ ) -new_n11612_ = NAND ( new_n2244_, new_n2242_, NET_404 ) -new_n11613_ = NAND ( new_n2250_, new_n2248_, NET_372 ) -new_n11614_ = NAND ( new_n2237_, new_n2232_, NET_436 ) -new_n11615_ = NAND ( new_n11614_, new_n11613_, new_n11612_ ) -new_n11616_ = NAND ( new_n11615_, new_n11611_ ) -new_n11617_ = NAND ( new_n11175_, new_n2283_ ) -new_n11618_ = NAND ( new_n11617_, new_n11616_ ) -new_n11619_ = NAND ( new_n11618_, new_n2151_ ) -new_n11620_ = OR ( new_n11619_, new_n2196_ ) -new_n11621_ = NAND ( new_n2196_, NET_435 ) -new_n11622_ = NAND ( new_n10989_, new_n2380_, NET_512 ) -new_n11623_ = NAND ( new_n11622_, new_n11621_, new_n11620_, new_n11609_ ) -NET_14712 = OR ( new_n11623_, new_n11608_, new_n11587_ ) -new_n11625_ = NOR ( new_n11396_, new_n3037_ ) -new_n11626_ = OR ( new_n11408_, new_n3041_ ) -new_n11627_ = NAND ( new_n11383_, new_n3044_ ) -new_n11628_ = NAND ( new_n10992_, new_n2966_ ) -new_n11629_ = NAND ( new_n11415_, new_n2367_ ) -new_n11630_ = NAND ( new_n11629_, new_n11628_, new_n11627_, new_n11626_ ) -new_n11631_ = NOR ( new_n11630_, new_n11625_ ) -new_n11632_ = OR ( new_n11631_, new_n3053_ ) -new_n11633_ = NAND ( new_n3053_, NET_370 ) -NET_14713 = NAND ( new_n11633_, new_n11632_ ) -new_n11635_ = OR ( new_n11631_, new_n3707_ ) -new_n11636_ = NAND ( new_n3707_, NET_402 ) -NET_14714 = NAND ( new_n11636_, new_n11635_ ) -new_n11638_ = OR ( new_n11506_, new_n2873_ ) -new_n11639_ = NAND ( new_n11509_, new_n2878_ ) -new_n11640_ = NAND ( new_n11336_, new_n2881_ ) -new_n11641_ = NAND ( new_n11640_, new_n11639_, new_n11638_, new_n11515_ ) -new_n11642_ = NAND ( new_n11641_, new_n2892_ ) -new_n11643_ = NAND ( new_n2891_, NET_126 ) -NET_14748 = NAND ( new_n11643_, new_n11642_ ) -new_n11645_ = NAND ( new_n11641_, new_n2901_ ) -new_n11646_ = NAND ( new_n2900_, NET_158 ) -NET_14749 = NAND ( new_n11646_, new_n11645_ ) -new_n11648_ = OR ( new_n11586_, new_n3037_ ) -new_n11649_ = OR ( new_n11607_, new_n3041_ ) -new_n11650_ = NAND ( new_n11564_, new_n3044_ ) -new_n11651_ = NAND ( new_n11650_, new_n11649_, new_n11648_, new_n11619_ ) -new_n11652_ = NAND ( new_n11651_, new_n3051_ ) -new_n11653_ = NAND ( new_n3053_, NET_371 ) -NET_14752 = NAND ( new_n11653_, new_n11652_ ) -new_n11655_ = NAND ( new_n11651_, new_n3057_ ) -new_n11656_ = NAND ( new_n3707_, NET_403 ) -NET_14753 = NAND ( new_n11656_, new_n11655_ ) -new_n11658_ = NOR ( new_n8644_, new_n2289_ ) -new_n11659_ = NAND ( new_n11658_, new_n2348_, new_n2268_ ) -new_n11660_ = NAND ( new_n11659_, new_n11596_ ) -new_n11661_ = XNOR ( new_n11660_, new_n2349_ ) -new_n11662_ = OR ( new_n11661_, new_n11601_ ) -new_n11663_ = NAND ( new_n11606_, new_n11602_ ) -new_n11664_ = NAND ( new_n11663_, new_n11603_ ) -new_n11665_ = NAND ( new_n11664_, new_n11662_ ) -new_n11666_ = NOT ( new_n11665_ ) -new_n11667_ = NAND ( new_n11661_, new_n11601_ ) -new_n11668_ = NAND ( new_n11667_, new_n11666_ ) -new_n11669_ = NAND ( new_n11667_, new_n11662_ ) -new_n11670_ = NAND ( new_n11669_, new_n11663_, new_n11603_ ) -new_n11671_ = NAND ( new_n11670_, new_n11668_ ) -new_n11672_ = OR ( new_n11671_, new_n2320_ ) -new_n11673_ = NAND ( new_n2244_, new_n2242_, NET_405 ) -new_n11674_ = NAND ( new_n2250_, new_n2248_, NET_373 ) -new_n11675_ = NAND ( new_n2237_, new_n2232_, NET_437 ) -new_n11676_ = NAND ( new_n11675_, new_n11674_, new_n11673_ ) -new_n11677_ = NAND ( new_n11676_, new_n11611_, new_n2151_ ) -new_n11678_ = NAND ( new_n11677_, new_n11672_ ) -new_n11679_ = NAND ( new_n11678_, new_n2359_ ) -new_n11680_ = NAND ( new_n11658_, new_n9852_ ) -new_n11681_ = NAND ( new_n2196_, NET_436 ) -NET_14798 = NAND ( new_n11681_, new_n11680_, new_n11679_ ) -new_n11683_ = OR ( new_n11671_, new_n3040_ ) -new_n11684_ = NAND ( new_n11658_, new_n3044_ ) -new_n11685_ = NAND ( new_n11684_, new_n11683_, new_n11677_ ) -new_n11686_ = NAND ( new_n11685_, new_n3051_ ) -new_n11687_ = NAND ( new_n3053_, NET_372 ) -NET_14799 = NAND ( new_n11687_, new_n11686_ ) -new_n11689_ = NAND ( new_n11685_, new_n3057_ ) -new_n11690_ = NAND ( new_n3707_, NET_404 ) -NET_14800 = NAND ( new_n11690_, new_n11689_ ) -new_n11692_ = NAND ( new_n11667_, new_n11665_ ) -new_n11693_ = NAND ( new_n11692_, new_n11601_ ) -new_n11694_ = OR ( new_n11666_, new_n11601_ ) -new_n11695_ = NAND ( new_n11694_, new_n11693_ ) -new_n11696_ = NOR ( new_n8763_, new_n2289_ ) -new_n11697_ = NAND ( new_n11696_, new_n2348_, new_n2268_ ) -new_n11698_ = NAND ( new_n11697_, new_n11596_ ) -new_n11699_ = XNOR ( new_n11698_, new_n2349_ ) -new_n11700_ = XOR ( new_n11699_, new_n11695_ ) -new_n11701_ = OR ( new_n11700_, new_n2320_ ) -new_n11702_ = NAND ( new_n11701_, new_n11677_ ) -new_n11703_ = NAND ( new_n11702_, new_n2359_ ) -new_n11704_ = NAND ( new_n11696_, new_n9852_ ) -new_n11705_ = NAND ( new_n2196_, NET_437 ) -NET_14817 = NAND ( new_n11705_, new_n11704_, new_n11703_ ) -new_n11707_ = OR ( new_n11700_, new_n3040_ ) -new_n11708_ = NAND ( new_n11696_, new_n3044_ ) -new_n11709_ = NAND ( new_n11708_, new_n11707_, new_n11677_ ) -new_n11710_ = NAND ( new_n11709_, new_n3051_ ) -new_n11711_ = NAND ( new_n3053_, NET_373 ) -NET_14818 = NAND ( new_n11711_, new_n11710_ ) -new_n11713_ = NAND ( new_n11709_, new_n3057_ ) -new_n11714_ = NAND ( new_n3707_, NET_405 ) -NET_14819 = NAND ( new_n11714_, new_n11713_ ) -new_n11716_ = NOT ( new_n7228_ ) -new_n11717_ = NAND ( new_n11463_, new_n7094_ ) -new_n11718_ = NAND ( new_n11717_, new_n2703_ ) -new_n11719_ = OR ( new_n2488_, new_n2486_ ) -new_n11720_ = NAND ( new_n11719_, new_n11718_ ) -new_n11721_ = NAND ( new_n11720_, new_n2611_ ) -new_n11722_ = NAND ( new_n11463_, new_n7094_, new_n2703_ ) -new_n11723_ = NOT ( new_n11722_ ) -new_n11724_ = NAND ( new_n11723_, new_n2611_ ) -new_n11725_ = NAND ( new_n3331_, new_n2719_ ) -new_n11726_ = NOR ( new_n11725_, new_n2559_ ) -new_n11727_ = NAND ( new_n2706_, new_n2560_ ) -new_n11728_ = NAND ( new_n11727_, new_n2721_, new_n2512_ ) -new_n11729_ = NOT ( new_n11728_ ) -new_n11730_ = OR ( new_n11729_, new_n2553_ ) -new_n11731_ = NAND ( new_n11730_, new_n11726_, new_n11724_, new_n11721_ ) -new_n11732_ = NOR ( new_n11728_, new_n11725_ ) -new_n11733_ = NOT ( new_n11732_ ) -new_n11734_ = NAND ( new_n11733_, new_n2611_ ) -new_n11735_ = NAND ( new_n2638_, new_n2559_ ) -new_n11736_ = NOT ( new_n11719_ ) -new_n11737_ = NOR ( new_n11736_, new_n2703_ ) -new_n11738_ = OR ( new_n11737_, new_n2553_ ) -new_n11739_ = AND ( new_n11738_, new_n11735_, new_n11734_ ) -new_n11740_ = NAND ( new_n11739_, new_n11731_ ) -new_n11741_ = NAND ( new_n11720_, new_n2638_ ) -new_n11742_ = NAND ( new_n11723_, new_n2638_ ) -new_n11743_ = NAND ( new_n11733_, new_n2638_ ) -new_n11744_ = OR ( new_n11737_, new_n2649_ ) -new_n11745_ = NAND ( new_n11744_, new_n11743_ ) -new_n11746_ = OR ( new_n11729_, new_n2649_ ) -new_n11747_ = AND ( new_n11746_, new_n11745_, new_n11726_ ) -new_n11748_ = NAND ( new_n11747_, new_n11742_, new_n11741_, new_n11740_ ) -new_n11749_ = NAND ( new_n11733_, new_n2772_ ) -new_n11750_ = NAND ( new_n2611_, new_n2559_ ) -new_n11751_ = OR ( new_n11737_, new_n3216_ ) -new_n11752_ = AND ( new_n11751_, new_n11750_, new_n11749_ ) -new_n11753_ = NAND ( new_n11720_, new_n2772_ ) -new_n11754_ = NAND ( new_n11723_, new_n2772_ ) -new_n11755_ = OR ( new_n11729_, new_n3216_ ) -new_n11756_ = NAND ( new_n11755_, new_n11754_, new_n11753_, new_n11726_ ) -new_n11757_ = OR ( new_n11756_, new_n11752_ ) -new_n11758_ = OR ( new_n11739_, new_n11731_ ) -new_n11759_ = NAND ( new_n11758_, new_n11757_, new_n11748_ ) -new_n11760_ = NAND ( new_n11720_, new_n3251_ ) -new_n11761_ = NAND ( new_n11723_, new_n3251_ ) -new_n11762_ = NAND ( new_n11728_, new_n3723_ ) -new_n11763_ = NAND ( new_n11762_, new_n11761_, new_n11760_, new_n11726_ ) -new_n11764_ = NAND ( new_n11733_, new_n3251_ ) -new_n11765_ = NAND ( new_n2772_, new_n2559_ ) -new_n11766_ = NOT ( new_n11737_ ) -new_n11767_ = NAND ( new_n11766_, new_n3723_ ) -new_n11768_ = AND ( new_n11767_, new_n11765_, new_n11764_ ) -new_n11769_ = NAND ( new_n11768_, new_n11763_ ) -new_n11770_ = NAND ( new_n11756_, new_n11752_ ) -new_n11771_ = NAND ( new_n11770_, new_n11769_, new_n11759_ ) -new_n11772_ = NAND ( new_n11733_, new_n3753_ ) -new_n11773_ = NAND ( new_n3251_, new_n2559_ ) -new_n11774_ = NAND ( new_n11766_, new_n4340_ ) -new_n11775_ = AND ( new_n11774_, new_n11773_, new_n11772_ ) -new_n11776_ = NAND ( new_n11720_, new_n3753_ ) -new_n11777_ = NAND ( new_n11723_, new_n3753_ ) -new_n11778_ = NAND ( new_n11728_, new_n4340_ ) -new_n11779_ = NAND ( new_n11778_, new_n11777_, new_n11776_, new_n11726_ ) -new_n11780_ = OR ( new_n11779_, new_n11775_ ) -new_n11781_ = OR ( new_n11768_, new_n11763_ ) -new_n11782_ = NAND ( new_n11781_, new_n11780_, new_n11771_ ) -new_n11783_ = NAND ( new_n11720_, new_n4370_ ) -new_n11784_ = NAND ( new_n11723_, new_n4370_ ) -new_n11785_ = NAND ( new_n11728_, new_n4617_ ) -new_n11786_ = NAND ( new_n11785_, new_n11784_, new_n11783_, new_n11726_ ) -new_n11787_ = NAND ( new_n11733_, new_n4370_ ) -new_n11788_ = NAND ( new_n3753_, new_n2559_ ) -new_n11789_ = NAND ( new_n11766_, new_n4617_ ) -new_n11790_ = AND ( new_n11789_, new_n11788_, new_n11787_ ) -new_n11791_ = NAND ( new_n11790_, new_n11786_ ) -new_n11792_ = NAND ( new_n11779_, new_n11775_ ) -new_n11793_ = NAND ( new_n11792_, new_n11791_, new_n11782_ ) -new_n11794_ = NAND ( new_n11733_, new_n4651_ ) -new_n11795_ = NAND ( new_n4370_, new_n2559_ ) -new_n11796_ = OR ( new_n11737_, new_n4966_ ) -new_n11797_ = AND ( new_n11796_, new_n11795_, new_n11794_ ) -new_n11798_ = NAND ( new_n11720_, new_n4651_ ) -new_n11799_ = NAND ( new_n11723_, new_n4651_ ) -new_n11800_ = OR ( new_n11729_, new_n4966_ ) -new_n11801_ = NAND ( new_n11800_, new_n11799_, new_n11798_, new_n11726_ ) -new_n11802_ = OR ( new_n11801_, new_n11797_ ) -new_n11803_ = OR ( new_n11790_, new_n11786_ ) -new_n11804_ = NAND ( new_n11803_, new_n11802_, new_n11793_ ) -new_n11805_ = NAND ( new_n11720_, new_n5003_ ) -new_n11806_ = NAND ( new_n11723_, new_n5003_ ) -new_n11807_ = NAND ( new_n11728_, new_n5298_ ) -new_n11808_ = NAND ( new_n11807_, new_n11806_, new_n11805_, new_n11726_ ) -new_n11809_ = NAND ( new_n11733_, new_n5003_ ) -new_n11810_ = NAND ( new_n4651_, new_n2559_ ) -new_n11811_ = NAND ( new_n11766_, new_n5298_ ) -new_n11812_ = AND ( new_n11811_, new_n11810_, new_n11809_ ) -new_n11813_ = NAND ( new_n11812_, new_n11808_ ) -new_n11814_ = NAND ( new_n11801_, new_n11797_ ) -new_n11815_ = NAND ( new_n11814_, new_n11813_, new_n11804_ ) -new_n11816_ = NAND ( new_n11733_, new_n5331_ ) -new_n11817_ = NAND ( new_n5003_, new_n2559_ ) -new_n11818_ = NAND ( new_n11766_, new_n5732_ ) -new_n11819_ = AND ( new_n11818_, new_n11817_, new_n11816_ ) -new_n11820_ = NAND ( new_n11720_, new_n5331_ ) -new_n11821_ = NAND ( new_n11723_, new_n5331_ ) -new_n11822_ = NAND ( new_n11728_, new_n5732_ ) -new_n11823_ = NAND ( new_n11822_, new_n11821_, new_n11820_, new_n11726_ ) -new_n11824_ = OR ( new_n11823_, new_n11819_ ) -new_n11825_ = OR ( new_n11812_, new_n11808_ ) -new_n11826_ = NAND ( new_n11825_, new_n11824_, new_n11815_ ) -new_n11827_ = NAND ( new_n11720_, new_n5763_ ) -new_n11828_ = NAND ( new_n11723_, new_n5763_ ) -new_n11829_ = NAND ( new_n11728_, new_n6010_ ) -new_n11830_ = NAND ( new_n11829_, new_n11828_, new_n11827_, new_n11726_ ) -new_n11831_ = NAND ( new_n11733_, new_n5763_ ) -new_n11832_ = NAND ( new_n5331_, new_n2559_ ) -new_n11833_ = NAND ( new_n11766_, new_n6010_ ) -new_n11834_ = AND ( new_n11833_, new_n11832_, new_n11831_ ) -new_n11835_ = NAND ( new_n11834_, new_n11830_ ) -new_n11836_ = NAND ( new_n11823_, new_n11819_ ) -new_n11837_ = NAND ( new_n11836_, new_n11835_, new_n11826_ ) -new_n11838_ = NAND ( new_n11733_, new_n6042_ ) -new_n11839_ = NAND ( new_n5763_, new_n2559_ ) -new_n11840_ = OR ( new_n11737_, new_n6355_ ) -new_n11841_ = AND ( new_n11840_, new_n11839_, new_n11838_ ) -new_n11842_ = NAND ( new_n11720_, new_n6042_ ) -new_n11843_ = NAND ( new_n11723_, new_n6042_ ) -new_n11844_ = OR ( new_n11729_, new_n6355_ ) -new_n11845_ = NAND ( new_n11844_, new_n11843_, new_n11842_, new_n11726_ ) -new_n11846_ = OR ( new_n11845_, new_n11841_ ) -new_n11847_ = OR ( new_n11834_, new_n11830_ ) -new_n11848_ = NAND ( new_n11847_, new_n11846_, new_n11837_ ) -new_n11849_ = NAND ( new_n11720_, new_n6391_ ) -new_n11850_ = NAND ( new_n11723_, new_n6391_ ) -new_n11851_ = NAND ( new_n11728_, new_n6687_ ) -new_n11852_ = NAND ( new_n11851_, new_n11850_, new_n11849_, new_n11726_ ) -new_n11853_ = NAND ( new_n11733_, new_n6391_ ) -new_n11854_ = NAND ( new_n6042_, new_n2559_ ) -new_n11855_ = NAND ( new_n11766_, new_n6687_ ) -new_n11856_ = AND ( new_n11855_, new_n11854_, new_n11853_ ) -new_n11857_ = NAND ( new_n11856_, new_n11852_ ) -new_n11858_ = NAND ( new_n11845_, new_n11841_ ) -new_n11859_ = NAND ( new_n11858_, new_n11857_, new_n11848_ ) -new_n11860_ = OR ( new_n11737_, new_n7191_ ) -new_n11861_ = NAND ( new_n6391_, new_n2559_ ) -new_n11862_ = NAND ( new_n11733_, new_n6720_ ) -new_n11863_ = AND ( new_n11862_, new_n11861_, new_n11860_ ) -new_n11864_ = NAND ( new_n11720_, new_n6720_ ) -new_n11865_ = NAND ( new_n11723_, new_n6720_ ) -new_n11866_ = OR ( new_n11729_, new_n7191_ ) -new_n11867_ = NAND ( new_n11866_, new_n11865_, new_n11864_, new_n11726_ ) -new_n11868_ = OR ( new_n11867_, new_n11863_ ) -new_n11869_ = OR ( new_n11856_, new_n11852_ ) -new_n11870_ = NAND ( new_n11869_, new_n11868_, new_n11859_ ) -new_n11871_ = NAND ( new_n11720_, new_n7223_ ) -new_n11872_ = OR ( new_n11729_, new_n7467_ ) -new_n11873_ = NAND ( new_n11723_, new_n7223_ ) -new_n11874_ = NAND ( new_n11873_, new_n11872_, new_n11871_, new_n11726_ ) -new_n11875_ = OR ( new_n11737_, new_n7467_ ) -new_n11876_ = NAND ( new_n6720_, new_n2559_ ) -new_n11877_ = NAND ( new_n11733_, new_n7223_ ) -new_n11878_ = AND ( new_n11877_, new_n11876_, new_n11875_ ) -new_n11879_ = NAND ( new_n11878_, new_n11874_ ) -new_n11880_ = NAND ( new_n11867_, new_n11863_ ) -new_n11881_ = NAND ( new_n11880_, new_n11879_, new_n11870_ ) -new_n11882_ = OR ( new_n11737_, new_n7856_ ) -new_n11883_ = NAND ( new_n7223_, new_n2559_ ) -new_n11884_ = NAND ( new_n11733_, new_n7499_ ) -new_n11885_ = AND ( new_n11884_, new_n11883_, new_n11882_ ) -new_n11886_ = OR ( new_n11729_, new_n7856_ ) -new_n11887_ = NAND ( new_n11720_, new_n7499_ ) -new_n11888_ = NAND ( new_n11723_, new_n7499_ ) -new_n11889_ = NAND ( new_n11888_, new_n11887_, new_n11886_, new_n11726_ ) -new_n11890_ = OR ( new_n11889_, new_n11885_ ) -new_n11891_ = OR ( new_n11878_, new_n11874_ ) -new_n11892_ = NAND ( new_n11891_, new_n11890_, new_n11881_ ) -new_n11893_ = OR ( new_n11729_, new_n8124_ ) -new_n11894_ = NAND ( new_n11720_, new_n7892_ ) -new_n11895_ = OR ( new_n11722_, new_n8126_ ) -new_n11896_ = NAND ( new_n11895_, new_n11894_, new_n11893_, new_n11726_ ) -new_n11897_ = OR ( new_n11737_, new_n8124_ ) -new_n11898_ = NAND ( new_n7499_, new_n2559_ ) -new_n11899_ = NAND ( new_n11733_, new_n7892_ ) -new_n11900_ = AND ( new_n11899_, new_n11898_, new_n11897_ ) -new_n11901_ = NAND ( new_n11900_, new_n11896_ ) -new_n11902_ = NAND ( new_n11889_, new_n11885_ ) -new_n11903_ = NAND ( new_n11902_, new_n11901_, new_n11892_ ) -new_n11904_ = OR ( new_n11737_, new_n8450_ ) -new_n11905_ = NAND ( new_n7892_, new_n2559_ ) -new_n11906_ = NAND ( new_n11733_, new_n8157_ ) -new_n11907_ = AND ( new_n11906_, new_n11905_, new_n11904_ ) -new_n11908_ = OR ( new_n11729_, new_n8450_ ) -new_n11909_ = NAND ( new_n11720_, new_n8157_ ) -new_n11910_ = NAND ( new_n11723_, new_n8157_ ) -new_n11911_ = NAND ( new_n11910_, new_n11909_, new_n11908_, new_n11726_ ) -new_n11912_ = OR ( new_n11911_, new_n11907_ ) -new_n11913_ = OR ( new_n11900_, new_n11896_ ) -new_n11914_ = NAND ( new_n11913_, new_n11912_, new_n11903_ ) -new_n11915_ = OR ( new_n11729_, new_n8787_ ) -new_n11916_ = NAND ( new_n11720_, new_n8482_ ) -new_n11917_ = OR ( new_n11722_, new_n8789_ ) -new_n11918_ = NAND ( new_n11917_, new_n11916_, new_n11915_, new_n11726_ ) -new_n11919_ = OR ( new_n11737_, new_n8787_ ) -new_n11920_ = NAND ( new_n8157_, new_n2559_ ) -new_n11921_ = NAND ( new_n11733_, new_n8482_ ) -new_n11922_ = AND ( new_n11921_, new_n11920_, new_n11919_ ) -new_n11923_ = NAND ( new_n11922_, new_n11918_ ) -new_n11924_ = NAND ( new_n11911_, new_n11907_ ) -new_n11925_ = NAND ( new_n11924_, new_n11923_, new_n11914_ ) -new_n11926_ = NAND ( new_n11766_, new_n9078_ ) -new_n11927_ = NAND ( new_n8482_, new_n2559_ ) -new_n11928_ = NAND ( new_n11733_, new_n8821_ ) -new_n11929_ = AND ( new_n11928_, new_n11927_, new_n11926_ ) -new_n11930_ = NAND ( new_n11728_, new_n9078_ ) -new_n11931_ = NAND ( new_n11720_, new_n8821_ ) -new_n11932_ = NAND ( new_n11723_, new_n8821_ ) -new_n11933_ = NAND ( new_n11932_, new_n11931_, new_n11930_, new_n11726_ ) -new_n11934_ = OR ( new_n11933_, new_n11929_ ) -new_n11935_ = OR ( new_n11922_, new_n11918_ ) -new_n11936_ = NAND ( new_n11935_, new_n11934_, new_n11925_ ) -new_n11937_ = OR ( new_n11729_, new_n9363_ ) -new_n11938_ = NAND ( new_n11720_, new_n9109_ ) -new_n11939_ = OR ( new_n11722_, new_n9365_ ) -new_n11940_ = NAND ( new_n11939_, new_n11938_, new_n11937_, new_n11726_ ) -new_n11941_ = OR ( new_n11737_, new_n9363_ ) -new_n11942_ = NAND ( new_n8821_, new_n2559_ ) -new_n11943_ = NAND ( new_n11733_, new_n9109_ ) -new_n11944_ = AND ( new_n11943_, new_n11942_, new_n11941_ ) -new_n11945_ = NAND ( new_n11944_, new_n11940_ ) -new_n11946_ = NAND ( new_n11933_, new_n11929_ ) -new_n11947_ = NAND ( new_n11946_, new_n11945_, new_n11936_ ) -new_n11948_ = NAND ( new_n11766_, new_n9641_ ) -new_n11949_ = NAND ( new_n9109_, new_n2559_ ) -new_n11950_ = NAND ( new_n11733_, new_n9394_ ) -new_n11951_ = AND ( new_n11950_, new_n11949_, new_n11948_ ) -new_n11952_ = NAND ( new_n11728_, new_n9641_ ) -new_n11953_ = NAND ( new_n11720_, new_n9394_ ) -new_n11954_ = NAND ( new_n11723_, new_n9394_ ) -new_n11955_ = NAND ( new_n11954_, new_n11953_, new_n11952_, new_n11726_ ) -new_n11956_ = OR ( new_n11955_, new_n11951_ ) -new_n11957_ = OR ( new_n11944_, new_n11940_ ) -new_n11958_ = NAND ( new_n11957_, new_n11956_, new_n11947_ ) -new_n11959_ = NAND ( new_n11728_, new_n9882_ ) -new_n11960_ = NAND ( new_n11720_, new_n9665_ ) -new_n11961_ = OR ( new_n11722_, new_n9884_ ) -new_n11962_ = NAND ( new_n11961_, new_n11960_, new_n11959_, new_n11726_ ) -new_n11963_ = NAND ( new_n11766_, new_n9882_ ) -new_n11964_ = NAND ( new_n9394_, new_n2559_ ) -new_n11965_ = NAND ( new_n11733_, new_n9665_ ) -new_n11966_ = AND ( new_n11965_, new_n11964_, new_n11963_ ) -new_n11967_ = NAND ( new_n11966_, new_n11962_ ) -new_n11968_ = NAND ( new_n11955_, new_n11951_ ) -new_n11969_ = NAND ( new_n11968_, new_n11967_, new_n11958_ ) -new_n11970_ = NAND ( new_n11766_, new_n10071_ ) -new_n11971_ = NAND ( new_n9665_, new_n2559_ ) -new_n11972_ = NAND ( new_n11733_, new_n9907_ ) -new_n11973_ = AND ( new_n11972_, new_n11971_, new_n11970_ ) -new_n11974_ = NAND ( new_n11728_, new_n10071_ ) -new_n11975_ = NAND ( new_n11720_, new_n9907_ ) -new_n11976_ = NAND ( new_n11723_, new_n9907_ ) -new_n11977_ = NAND ( new_n11976_, new_n11975_, new_n11974_, new_n11726_ ) -new_n11978_ = OR ( new_n11977_, new_n11973_ ) -new_n11979_ = OR ( new_n11966_, new_n11962_ ) -new_n11980_ = NAND ( new_n11979_, new_n11978_, new_n11969_ ) -new_n11981_ = NAND ( new_n11728_, new_n10255_ ) -new_n11982_ = NAND ( new_n11720_, new_n10094_ ) -new_n11983_ = OR ( new_n11722_, new_n10257_ ) -new_n11984_ = NAND ( new_n11983_, new_n11982_, new_n11981_, new_n11726_ ) -new_n11985_ = NAND ( new_n11766_, new_n10255_ ) -new_n11986_ = NAND ( new_n9907_, new_n2559_ ) -new_n11987_ = NAND ( new_n11733_, new_n10094_ ) -new_n11988_ = AND ( new_n11987_, new_n11986_, new_n11985_ ) -new_n11989_ = NAND ( new_n11988_, new_n11984_ ) -new_n11990_ = NAND ( new_n11977_, new_n11973_ ) -new_n11991_ = NAND ( new_n11990_, new_n11989_, new_n11980_ ) -new_n11992_ = NAND ( new_n11766_, new_n10446_ ) -new_n11993_ = NAND ( new_n10094_, new_n2559_ ) -new_n11994_ = NAND ( new_n11733_, new_n10280_ ) -new_n11995_ = AND ( new_n11994_, new_n11993_, new_n11992_ ) -new_n11996_ = NAND ( new_n11728_, new_n10446_ ) -new_n11997_ = NAND ( new_n11720_, new_n10280_ ) -new_n11998_ = NAND ( new_n11723_, new_n10280_ ) -new_n11999_ = NAND ( new_n11998_, new_n11997_, new_n11996_, new_n11726_ ) -new_n12000_ = OR ( new_n11999_, new_n11995_ ) -new_n12001_ = OR ( new_n11988_, new_n11984_ ) -new_n12002_ = NAND ( new_n12001_, new_n12000_, new_n11991_ ) -new_n12003_ = NAND ( new_n11728_, new_n10631_ ) -new_n12004_ = NAND ( new_n11720_, new_n10469_ ) -new_n12005_ = OR ( new_n11722_, new_n10633_ ) -new_n12006_ = NAND ( new_n12005_, new_n12004_, new_n12003_, new_n11726_ ) -new_n12007_ = NAND ( new_n11766_, new_n10631_ ) -new_n12008_ = NAND ( new_n10280_, new_n2559_ ) -new_n12009_ = NAND ( new_n11733_, new_n10469_ ) -new_n12010_ = AND ( new_n12009_, new_n12008_, new_n12007_ ) -new_n12011_ = NAND ( new_n12010_, new_n12006_ ) -new_n12012_ = NAND ( new_n11999_, new_n11995_ ) -new_n12013_ = NAND ( new_n12012_, new_n12011_, new_n12002_ ) -new_n12014_ = NAND ( new_n11766_, new_n10822_ ) -new_n12015_ = NAND ( new_n10469_, new_n2559_ ) -new_n12016_ = NAND ( new_n11733_, new_n10656_ ) -new_n12017_ = AND ( new_n12016_, new_n12015_, new_n12014_ ) -new_n12018_ = NAND ( new_n11728_, new_n10822_ ) -new_n12019_ = NAND ( new_n11720_, new_n10656_ ) -new_n12020_ = NAND ( new_n11723_, new_n10656_ ) -new_n12021_ = NAND ( new_n12020_, new_n12019_, new_n12018_, new_n11726_ ) -new_n12022_ = OR ( new_n12021_, new_n12017_ ) -new_n12023_ = OR ( new_n12010_, new_n12006_ ) -new_n12024_ = NAND ( new_n12023_, new_n12022_, new_n12013_ ) -new_n12025_ = NAND ( new_n11728_, new_n11011_ ) -new_n12026_ = NAND ( new_n11720_, new_n10846_ ) -new_n12027_ = OR ( new_n11722_, new_n11013_ ) -new_n12028_ = NAND ( new_n12027_, new_n12026_, new_n12025_, new_n11726_ ) -new_n12029_ = NAND ( new_n11766_, new_n11011_ ) -new_n12030_ = NAND ( new_n10656_, new_n2559_ ) -new_n12031_ = NAND ( new_n11733_, new_n10846_ ) -new_n12032_ = AND ( new_n12031_, new_n12030_, new_n12029_ ) -new_n12033_ = NAND ( new_n12032_, new_n12028_ ) -new_n12034_ = NAND ( new_n12021_, new_n12017_ ) -new_n12035_ = NAND ( new_n12034_, new_n12033_, new_n12024_ ) -new_n12036_ = NAND ( new_n11766_, new_n11194_ ) -new_n12037_ = NAND ( new_n10846_, new_n2559_ ) -new_n12038_ = NAND ( new_n11733_, new_n11036_ ) -new_n12039_ = AND ( new_n12038_, new_n12037_, new_n12036_ ) -new_n12040_ = NAND ( new_n11728_, new_n11194_ ) -new_n12041_ = NAND ( new_n11720_, new_n11036_ ) -new_n12042_ = NAND ( new_n11723_, new_n11036_ ) -new_n12043_ = NAND ( new_n12042_, new_n12041_, new_n12040_, new_n11726_ ) -new_n12044_ = OR ( new_n12043_, new_n12039_ ) -new_n12045_ = OR ( new_n12032_, new_n12028_ ) -new_n12046_ = NAND ( new_n12045_, new_n12044_, new_n12035_ ) -new_n12047_ = NAND ( new_n11728_, new_n11434_ ) -new_n12048_ = NAND ( new_n11720_, new_n11215_ ) -new_n12049_ = NOT ( new_n11215_ ) -new_n12050_ = OR ( new_n11722_, new_n12049_ ) -new_n12051_ = NAND ( new_n12050_, new_n12048_, new_n12047_, new_n11726_ ) -new_n12052_ = NAND ( new_n11766_, new_n11434_ ) -new_n12053_ = NAND ( new_n11036_, new_n2559_ ) -new_n12054_ = NAND ( new_n11733_, new_n11215_ ) -new_n12055_ = AND ( new_n12054_, new_n12053_, new_n12052_ ) -new_n12056_ = NAND ( new_n12055_, new_n12051_ ) -new_n12057_ = NAND ( new_n12043_, new_n12039_ ) -new_n12058_ = NAND ( new_n12057_, new_n12056_, new_n12046_ ) -new_n12059_ = NAND ( new_n11733_, new_n11463_ ) -new_n12060_ = NAND ( new_n11766_, new_n7061_ ) -new_n12061_ = NAND ( new_n12060_, new_n12059_ ) -new_n12062_ = NAND ( new_n11728_, new_n7061_ ) -new_n12063_ = NOT ( new_n11720_ ) -new_n12064_ = NAND ( new_n12063_, new_n11463_ ) -new_n12065_ = OR ( new_n11723_, new_n11463_ ) -new_n12066_ = NAND ( new_n12065_, new_n12064_ ) -new_n12067_ = NAND ( new_n12066_, new_n12062_ ) -new_n12068_ = NOT ( new_n12067_ ) -new_n12069_ = NAND ( new_n12068_, new_n12061_ ) -new_n12070_ = OR ( new_n12055_, new_n12051_ ) -new_n12071_ = NAND ( new_n12070_, new_n12069_, new_n12058_ ) -new_n12072_ = NAND ( new_n11728_, new_n7228_ ) -new_n12073_ = XNOR ( new_n11463_, new_n7094_ ) -new_n12074_ = OR ( new_n12073_, new_n11722_ ) -new_n12075_ = OR ( new_n12063_, new_n7094_ ) -new_n12076_ = NAND ( new_n12075_, new_n12074_, new_n12072_ ) -new_n12077_ = OR ( new_n11732_, new_n7094_ ) -new_n12078_ = NAND ( new_n11766_, new_n7228_ ) -new_n12079_ = NAND ( new_n12078_, new_n12077_ ) -new_n12080_ = NOT ( new_n12079_ ) -new_n12081_ = OR ( new_n12080_, new_n12076_ ) -new_n12082_ = NAND ( new_n12080_, new_n12076_ ) -new_n12083_ = OR ( new_n12068_, new_n12061_ ) -new_n12084_ = NAND ( new_n12083_, new_n12082_, new_n12081_, new_n12071_ ) -new_n12085_ = OR ( new_n12076_, new_n3358_ ) -new_n12086_ = NAND ( new_n12085_, new_n12079_ ) -new_n12087_ = NAND ( new_n12076_, new_n3358_ ) -new_n12088_ = NAND ( new_n12087_, new_n12080_ ) -new_n12089_ = NAND ( new_n12088_, new_n12086_ ) -new_n12090_ = NAND ( new_n12089_, new_n12084_ ) -new_n12091_ = NAND ( new_n11463_, new_n2560_ ) -new_n12092_ = NAND ( new_n12091_, new_n11448_ ) -new_n12093_ = OR ( new_n11440_, new_n2560_ ) -new_n12094_ = XOR ( new_n12093_, new_n2618_ ) -new_n12095_ = OR ( new_n12094_, new_n12092_ ) -new_n12096_ = NAND ( new_n11454_, new_n11451_ ) -new_n12097_ = NAND ( new_n12096_, new_n11450_ ) -new_n12098_ = NAND ( new_n12097_, new_n12095_ ) -new_n12099_ = NAND ( new_n12094_, new_n12092_ ) -new_n12100_ = NAND ( new_n12099_, new_n12098_ ) -new_n12101_ = OR ( new_n7094_, new_n2559_ ) -new_n12102_ = NAND ( new_n12101_, new_n11448_ ) -new_n12103_ = NAND ( new_n12102_, new_n12100_ ) -new_n12104_ = NAND ( new_n12101_, new_n12099_, new_n12098_, new_n11448_ ) -new_n12105_ = NAND ( new_n12104_, new_n12103_ ) -new_n12106_ = XNOR ( new_n12105_, new_n11441_ ) -new_n12107_ = NAND ( new_n12106_, new_n12090_ ) -new_n12108_ = OR ( new_n12090_, new_n7094_ ) -new_n12109_ = NAND ( new_n12108_, new_n12107_ ) -new_n12110_ = NAND ( new_n12109_, new_n11716_ ) -new_n12111_ = OR ( new_n12109_, new_n11716_ ) -new_n12112_ = NOT ( new_n2649_ ) -new_n12113_ = NOT ( new_n2553_ ) -new_n12114_ = NOT ( new_n2661_ ) -new_n12115_ = NAND ( new_n12090_, new_n12114_ ) -new_n12116_ = OR ( new_n12090_, new_n2611_ ) -new_n12117_ = NAND ( new_n12116_, new_n12115_ ) -new_n12118_ = OR ( new_n12117_, new_n12113_ ) -new_n12119_ = NOT ( new_n12090_ ) -new_n12120_ = NAND ( new_n12119_, new_n2638_ ) -new_n12121_ = XNOR ( new_n2657_, new_n2618_ ) -new_n12122_ = XOR ( new_n12121_, new_n2653_ ) -new_n12123_ = XOR ( new_n12122_, new_n2618_ ) -new_n12124_ = OR ( new_n12123_, new_n12119_ ) -new_n12125_ = NAND ( new_n12124_, new_n12120_, new_n12118_, new_n12112_ ) -new_n12126_ = OR ( new_n12119_, new_n3234_ ) -new_n12127_ = NAND ( new_n12119_, new_n2772_ ) -new_n12128_ = NAND ( new_n12127_, new_n12126_ ) -new_n12129_ = OR ( new_n12128_, new_n3216_ ) -new_n12130_ = NAND ( new_n12117_, new_n12113_ ) -new_n12131_ = NAND ( new_n12130_, new_n12129_, new_n12125_ ) -new_n12132_ = OR ( new_n12119_, new_n3740_ ) -new_n12133_ = NAND ( new_n12119_, new_n3251_ ) -new_n12134_ = NAND ( new_n12133_, new_n12132_ ) -new_n12135_ = NAND ( new_n12134_, new_n3724_ ) -new_n12136_ = NAND ( new_n12128_, new_n3216_ ) -new_n12137_ = NAND ( new_n12136_, new_n12135_, new_n12131_ ) -new_n12138_ = NAND ( new_n12090_, new_n4356_ ) -new_n12139_ = OR ( new_n12090_, new_n3753_ ) -new_n12140_ = NAND ( new_n12139_, new_n12138_ ) -new_n12141_ = NAND ( new_n12140_, new_n4340_ ) -new_n12142_ = OR ( new_n12134_, new_n3724_ ) -new_n12143_ = NAND ( new_n12142_, new_n12141_, new_n12137_ ) -new_n12144_ = NAND ( new_n12090_, new_n4633_ ) -new_n12145_ = OR ( new_n12090_, new_n4370_ ) -new_n12146_ = NAND ( new_n12145_, new_n12144_ ) -new_n12147_ = OR ( new_n12146_, new_n4617_ ) -new_n12148_ = OR ( new_n12140_, new_n4340_ ) -new_n12149_ = NAND ( new_n12148_, new_n12147_, new_n12143_ ) -new_n12150_ = OR ( new_n12119_, new_n4985_ ) -new_n12151_ = NAND ( new_n12119_, new_n4651_ ) -new_n12152_ = NAND ( new_n12151_, new_n12150_ ) -new_n12153_ = OR ( new_n12152_, new_n4966_ ) -new_n12154_ = NAND ( new_n12146_, new_n4617_ ) -new_n12155_ = NAND ( new_n12154_, new_n12153_, new_n12149_ ) -new_n12156_ = OR ( new_n12119_, new_n5315_ ) -new_n12157_ = NAND ( new_n12119_, new_n5003_ ) -new_n12158_ = NAND ( new_n12157_, new_n12156_ ) -new_n12159_ = NAND ( new_n12158_, new_n5299_ ) -new_n12160_ = NAND ( new_n12152_, new_n4966_ ) -new_n12161_ = NAND ( new_n12160_, new_n12159_, new_n12155_ ) -new_n12162_ = NAND ( new_n12090_, new_n5748_ ) -new_n12163_ = OR ( new_n12090_, new_n5331_ ) -new_n12164_ = NAND ( new_n12163_, new_n12162_ ) -new_n12165_ = NAND ( new_n12164_, new_n5732_ ) -new_n12166_ = OR ( new_n12158_, new_n5299_ ) -new_n12167_ = NAND ( new_n12166_, new_n12165_, new_n12161_ ) -new_n12168_ = NAND ( new_n12090_, new_n6026_ ) -new_n12169_ = OR ( new_n12090_, new_n5763_ ) -new_n12170_ = NAND ( new_n12169_, new_n12168_ ) -new_n12171_ = OR ( new_n12170_, new_n6010_ ) -new_n12172_ = OR ( new_n12164_, new_n5732_ ) -new_n12173_ = NAND ( new_n12172_, new_n12171_, new_n12167_ ) -new_n12174_ = OR ( new_n12119_, new_n6374_ ) -new_n12175_ = NAND ( new_n12119_, new_n6042_ ) -new_n12176_ = NAND ( new_n12175_, new_n12174_ ) -new_n12177_ = OR ( new_n12176_, new_n6355_ ) -new_n12178_ = NAND ( new_n12170_, new_n6010_ ) -new_n12179_ = NAND ( new_n12178_, new_n12177_, new_n12173_ ) -new_n12180_ = OR ( new_n12119_, new_n6704_ ) -new_n12181_ = NAND ( new_n12119_, new_n6391_ ) -new_n12182_ = NAND ( new_n12181_, new_n12180_ ) -new_n12183_ = NAND ( new_n12182_, new_n6688_ ) -new_n12184_ = NAND ( new_n12176_, new_n6355_ ) -new_n12185_ = NAND ( new_n12184_, new_n12183_, new_n12179_ ) -new_n12186_ = NOT ( new_n7191_ ) -new_n12187_ = NAND ( new_n12090_, new_n7208_ ) -new_n12188_ = OR ( new_n12090_, new_n6720_ ) -new_n12189_ = NAND ( new_n12188_, new_n12187_ ) -new_n12190_ = NAND ( new_n12189_, new_n12186_ ) -new_n12191_ = OR ( new_n12182_, new_n6688_ ) -new_n12192_ = NAND ( new_n12191_, new_n12190_, new_n12185_ ) -new_n12193_ = NOT ( new_n7467_ ) -new_n12194_ = NAND ( new_n12090_, new_n7484_ ) -new_n12195_ = OR ( new_n12090_, new_n7223_ ) -new_n12196_ = NAND ( new_n12195_, new_n12194_ ) -new_n12197_ = OR ( new_n12196_, new_n12193_ ) -new_n12198_ = OR ( new_n12189_, new_n12186_ ) -new_n12199_ = NAND ( new_n12198_, new_n12197_, new_n12192_ ) -new_n12200_ = OR ( new_n12119_, new_n7875_ ) -new_n12201_ = NAND ( new_n12119_, new_n7499_ ) -new_n12202_ = NAND ( new_n12201_, new_n12200_ ) -new_n12203_ = OR ( new_n12202_, new_n7856_ ) -new_n12204_ = NAND ( new_n12196_, new_n12193_ ) -new_n12205_ = NAND ( new_n12204_, new_n12203_, new_n12199_ ) -new_n12206_ = NOT ( new_n8124_ ) -new_n12207_ = NAND ( new_n12090_, new_n8142_ ) -new_n12208_ = OR ( new_n12090_, new_n7892_ ) -new_n12209_ = NAND ( new_n12208_, new_n12207_ ) -new_n12210_ = OR ( new_n12209_, new_n12206_ ) -new_n12211_ = NAND ( new_n12202_, new_n7856_ ) -new_n12212_ = NAND ( new_n12211_, new_n12210_, new_n12205_ ) -new_n12213_ = NOT ( new_n8450_ ) -new_n12214_ = NAND ( new_n12090_, new_n8467_ ) -new_n12215_ = OR ( new_n12090_, new_n8157_ ) -new_n12216_ = NAND ( new_n12215_, new_n12214_ ) -new_n12217_ = NAND ( new_n12216_, new_n12213_ ) -new_n12218_ = NAND ( new_n12209_, new_n12206_ ) -new_n12219_ = NAND ( new_n12218_, new_n12217_, new_n12212_ ) -new_n12220_ = NOT ( new_n8787_ ) -new_n12221_ = NAND ( new_n12090_, new_n8805_ ) -new_n12222_ = OR ( new_n12090_, new_n8482_ ) -new_n12223_ = NAND ( new_n12222_, new_n12221_ ) -new_n12224_ = OR ( new_n12223_, new_n12220_ ) -new_n12225_ = OR ( new_n12216_, new_n12213_ ) -new_n12226_ = NAND ( new_n12225_, new_n12224_, new_n12219_ ) -new_n12227_ = NAND ( new_n12090_, new_n9094_ ) -new_n12228_ = OR ( new_n12090_, new_n8821_ ) -new_n12229_ = NAND ( new_n12228_, new_n12227_ ) -new_n12230_ = NAND ( new_n12229_, new_n9078_ ) -new_n12231_ = NAND ( new_n12223_, new_n12220_ ) -new_n12232_ = NAND ( new_n12231_, new_n12230_, new_n12226_ ) -new_n12233_ = NOT ( new_n9363_ ) -new_n12234_ = NAND ( new_n12090_, new_n9381_ ) -new_n12235_ = OR ( new_n12090_, new_n9109_ ) -new_n12236_ = NAND ( new_n12235_, new_n12234_ ) -new_n12237_ = OR ( new_n12236_, new_n12233_ ) -new_n12238_ = OR ( new_n12229_, new_n9078_ ) -new_n12239_ = NAND ( new_n12238_, new_n12237_, new_n12232_ ) -new_n12240_ = NAND ( new_n12090_, new_n9654_ ) -new_n12241_ = OR ( new_n12090_, new_n9394_ ) -new_n12242_ = NAND ( new_n12241_, new_n12240_ ) -new_n12243_ = NAND ( new_n12242_, new_n9641_ ) -new_n12244_ = NAND ( new_n12236_, new_n12233_ ) -new_n12245_ = NAND ( new_n12244_, new_n12243_, new_n12239_ ) -new_n12246_ = NAND ( new_n12090_, new_n9896_ ) -new_n12247_ = OR ( new_n12090_, new_n9665_ ) -new_n12248_ = NAND ( new_n12247_, new_n12246_ ) -new_n12249_ = OR ( new_n12248_, new_n9882_ ) -new_n12250_ = OR ( new_n12242_, new_n9641_ ) -new_n12251_ = NAND ( new_n12250_, new_n12249_, new_n12245_ ) -new_n12252_ = NAND ( new_n12090_, new_n10084_ ) -new_n12253_ = OR ( new_n12090_, new_n9907_ ) -new_n12254_ = NAND ( new_n12253_, new_n12252_ ) -new_n12255_ = NAND ( new_n12254_, new_n10071_ ) -new_n12256_ = NAND ( new_n12248_, new_n9882_ ) -new_n12257_ = NAND ( new_n12256_, new_n12255_, new_n12251_ ) -new_n12258_ = NAND ( new_n12090_, new_n10269_ ) -new_n12259_ = OR ( new_n12090_, new_n10094_ ) -new_n12260_ = NAND ( new_n12259_, new_n12258_ ) -new_n12261_ = OR ( new_n12260_, new_n10255_ ) -new_n12262_ = OR ( new_n12254_, new_n10071_ ) -new_n12263_ = NAND ( new_n12262_, new_n12261_, new_n12257_ ) -new_n12264_ = NAND ( new_n12090_, new_n10459_ ) -new_n12265_ = OR ( new_n12090_, new_n10280_ ) -new_n12266_ = NAND ( new_n12265_, new_n12264_ ) -new_n12267_ = NAND ( new_n12266_, new_n10446_ ) -new_n12268_ = NAND ( new_n12260_, new_n10255_ ) -new_n12269_ = NAND ( new_n12268_, new_n12267_, new_n12263_ ) -new_n12270_ = NAND ( new_n12090_, new_n10645_ ) -new_n12271_ = OR ( new_n12090_, new_n10469_ ) -new_n12272_ = NAND ( new_n12271_, new_n12270_ ) -new_n12273_ = OR ( new_n12272_, new_n10631_ ) -new_n12274_ = OR ( new_n12266_, new_n10446_ ) -new_n12275_ = NAND ( new_n12274_, new_n12273_, new_n12269_ ) -new_n12276_ = NAND ( new_n12090_, new_n10835_ ) -new_n12277_ = OR ( new_n12090_, new_n10656_ ) -new_n12278_ = NAND ( new_n12277_, new_n12276_ ) -new_n12279_ = NAND ( new_n12278_, new_n10822_ ) -new_n12280_ = NAND ( new_n12272_, new_n10631_ ) -new_n12281_ = NAND ( new_n12280_, new_n12279_, new_n12275_ ) -new_n12282_ = NAND ( new_n12090_, new_n11025_ ) -new_n12283_ = OR ( new_n12090_, new_n10846_ ) -new_n12284_ = NAND ( new_n12283_, new_n12282_ ) -new_n12285_ = OR ( new_n12284_, new_n11011_ ) -new_n12286_ = OR ( new_n12278_, new_n10822_ ) -new_n12287_ = NAND ( new_n12286_, new_n12285_, new_n12281_ ) -new_n12288_ = NAND ( new_n12090_, new_n11207_ ) -new_n12289_ = OR ( new_n12090_, new_n11036_ ) -new_n12290_ = NAND ( new_n12289_, new_n12288_ ) -new_n12291_ = NAND ( new_n12290_, new_n11194_ ) -new_n12292_ = NAND ( new_n12284_, new_n11011_ ) -new_n12293_ = NAND ( new_n12292_, new_n12291_, new_n12287_ ) -new_n12294_ = NAND ( new_n12090_, new_n11455_ ) -new_n12295_ = OR ( new_n12090_, new_n11215_ ) -new_n12296_ = NAND ( new_n12295_, new_n12294_ ) -new_n12297_ = OR ( new_n12296_, new_n11434_ ) -new_n12298_ = OR ( new_n12290_, new_n11194_ ) -new_n12299_ = NAND ( new_n12298_, new_n12297_, new_n12293_ ) -new_n12300_ = NAND ( new_n12099_, new_n12097_, new_n12095_ ) -new_n12301_ = NAND ( new_n12099_, new_n12095_ ) -new_n12302_ = NAND ( new_n12301_, new_n12096_, new_n11450_ ) -new_n12303_ = NAND ( new_n12302_, new_n12300_ ) -new_n12304_ = NAND ( new_n12303_, new_n12090_ ) -new_n12305_ = OR ( new_n12090_, new_n11463_ ) -new_n12306_ = NAND ( new_n12305_, new_n12304_ ) -new_n12307_ = NAND ( new_n12306_, new_n7061_ ) -new_n12308_ = NAND ( new_n12296_, new_n11434_ ) -new_n12309_ = NAND ( new_n12308_, new_n12307_, new_n12299_ ) -new_n12310_ = OR ( new_n12306_, new_n7061_ ) -new_n12311_ = NAND ( new_n12310_, new_n12309_, new_n12111_ ) -new_n12312_ = NAND ( new_n12311_, new_n12110_ ) -new_n12313_ = NAND ( new_n12312_, new_n2705_, new_n2490_ ) -new_n12314_ = NAND ( new_n12090_, new_n2747_ ) -new_n12315_ = XNOR ( new_n2649_, new_n2638_ ) -new_n12316_ = NOT ( new_n7061_ ) -new_n12317_ = OR ( new_n11463_, new_n12316_ ) -new_n12318_ = NAND ( new_n11463_, new_n12316_ ) -new_n12319_ = NAND ( new_n11434_, new_n12049_ ) -new_n12320_ = NOR ( new_n11434_, new_n12049_ ) -new_n12321_ = OR ( new_n11227_, new_n11036_ ) -new_n12322_ = NAND ( new_n11227_, new_n11036_ ) -new_n12323_ = NAND ( new_n11011_, new_n11013_ ) -new_n12324_ = NOR ( new_n11011_, new_n11013_ ) -new_n12325_ = OR ( new_n10858_, new_n10656_ ) -new_n12326_ = NAND ( new_n10858_, new_n10656_ ) -new_n12327_ = NAND ( new_n10631_, new_n10633_ ) -new_n12328_ = NOR ( new_n10631_, new_n10633_ ) -new_n12329_ = OR ( new_n10481_, new_n10280_ ) -new_n12330_ = NAND ( new_n10481_, new_n10280_ ) -new_n12331_ = NAND ( new_n10255_, new_n10257_ ) -new_n12332_ = NOR ( new_n10255_, new_n10257_ ) -new_n12333_ = OR ( new_n10106_, new_n9907_ ) -new_n12334_ = NAND ( new_n10106_, new_n9907_ ) -new_n12335_ = NAND ( new_n9882_, new_n9884_ ) -new_n12336_ = NOR ( new_n9882_, new_n9884_ ) -new_n12337_ = NOR ( new_n12233_, new_n9365_ ) -new_n12338_ = OR ( new_n9363_, new_n9109_ ) -new_n12339_ = NOT ( new_n9078_ ) -new_n12340_ = OR ( new_n12339_, new_n8821_ ) -new_n12341_ = NAND ( new_n12339_, new_n8821_ ) -new_n12342_ = NOR ( new_n12220_, new_n8789_ ) -new_n12343_ = OR ( new_n8787_, new_n8482_ ) -new_n12344_ = NAND ( new_n8450_, new_n8157_ ) -new_n12345_ = OR ( new_n8450_, new_n8157_ ) -new_n12346_ = NOR ( new_n12206_, new_n8126_ ) -new_n12347_ = OR ( new_n8124_, new_n7892_ ) -new_n12348_ = NAND ( new_n7856_, new_n7499_ ) -new_n12349_ = OR ( new_n7856_, new_n7499_ ) -new_n12350_ = NAND ( new_n7467_, new_n7223_ ) -new_n12351_ = OR ( new_n7467_, new_n7223_ ) -new_n12352_ = XNOR ( new_n6687_, new_n6391_ ) -new_n12353_ = XOR ( new_n7191_, new_n6720_ ) -new_n12354_ = AND ( new_n12353_, new_n12352_, new_n12351_, new_n12350_ ) -new_n12355_ = NAND ( new_n12354_, new_n12349_, new_n12348_, new_n12347_ ) -new_n12356_ = NOR ( new_n12355_, new_n12346_ ) -new_n12357_ = NAND ( new_n12356_, new_n12345_, new_n12344_, new_n12343_ ) -new_n12358_ = NOR ( new_n12357_, new_n12342_ ) -new_n12359_ = NAND ( new_n12358_, new_n12341_, new_n12340_, new_n12338_ ) -new_n12360_ = XOR ( new_n9641_, new_n9394_ ) -new_n12361_ = NOR ( new_n12360_, new_n12359_, new_n12337_, new_n12336_ ) -new_n12362_ = NAND ( new_n12361_, new_n12335_, new_n12334_, new_n12333_ ) -new_n12363_ = NOR ( new_n12362_, new_n12332_ ) -new_n12364_ = NAND ( new_n12363_, new_n12331_, new_n12330_, new_n12329_ ) -new_n12365_ = NOR ( new_n12364_, new_n12328_ ) -new_n12366_ = NAND ( new_n12365_, new_n12327_, new_n12326_, new_n12325_ ) -new_n12367_ = NOR ( new_n12366_, new_n12324_ ) -new_n12368_ = NAND ( new_n12367_, new_n12323_, new_n12322_, new_n12321_ ) -new_n12369_ = NOR ( new_n12368_, new_n12320_ ) -new_n12370_ = NAND ( new_n12369_, new_n12319_, new_n12318_, new_n12317_ ) -new_n12371_ = XNOR ( new_n7228_, new_n7094_ ) -new_n12372_ = OR ( new_n12371_, new_n12370_ ) -new_n12373_ = XOR ( new_n3216_, new_n2772_ ) -new_n12374_ = XOR ( new_n2611_, new_n2553_ ) -new_n12375_ = XNOR ( new_n5298_, new_n5003_ ) -new_n12376_ = XNOR ( new_n4340_, new_n3753_ ) -new_n12377_ = NAND ( new_n12376_, new_n12375_, new_n12374_, new_n12373_ ) -new_n12378_ = XOR ( new_n4617_, new_n4370_ ) -new_n12379_ = XNOR ( new_n4966_, new_n4651_ ) -new_n12380_ = XOR ( new_n6355_, new_n6042_ ) -new_n12381_ = XNOR ( new_n6010_, new_n5763_ ) -new_n12382_ = XNOR ( new_n3723_, new_n3251_ ) -new_n12383_ = XNOR ( new_n5732_, new_n5331_ ) -new_n12384_ = NAND ( new_n12383_, new_n12382_, new_n12381_, new_n12380_ ) -new_n12385_ = OR ( new_n12384_, new_n12379_, new_n12378_, new_n12377_ ) -new_n12386_ = NOR ( new_n12385_, new_n12372_, new_n2722_ ) -new_n12387_ = OR ( new_n12385_, new_n12372_ ) -new_n12388_ = NOR ( new_n12387_, new_n3239_ ) -new_n12389_ = NOR ( new_n12388_, new_n12386_ ) -new_n12390_ = OR ( new_n12389_, new_n12315_ ) -new_n12391_ = NAND ( new_n12390_, new_n12314_, new_n12313_, new_n2500_ ) -new_n12392_ = OR ( new_n12090_, new_n2489_ ) -new_n12393_ = NAND ( new_n12090_, new_n2489_ ) -new_n12394_ = NAND ( new_n12393_, new_n12392_, new_n2515_ ) -new_n12395_ = NAND ( new_n12394_, new_n12391_, new_n2560_, new_n2506_ ) -new_n12396_ = OR ( new_n12312_, new_n2715_ ) -new_n12397_ = OR ( new_n12119_, new_n2512_ ) -new_n12398_ = NAND ( new_n12119_, new_n2511_, new_n2489_ ) -new_n12399_ = NOR ( new_n12385_, new_n12372_, new_n12315_ ) -new_n12400_ = OR ( new_n12399_, new_n2739_ ) -new_n12401_ = NAND ( new_n12400_, new_n12398_, new_n12397_, new_n12396_ ) -new_n12402_ = NAND ( new_n12401_, new_n2560_ ) -new_n12403_ = NOR ( new_n12387_, new_n12315_ ) -new_n12404_ = NAND ( new_n2667_, new_n2569_, new_n2489_ ) -new_n12405_ = OR ( new_n12404_, new_n12403_, new_n2559_ ) -new_n12406_ = NAND ( new_n12405_, new_n12402_, new_n12395_ ) -new_n12407_ = NAND ( new_n12406_, NET_765 ) -new_n12408_ = AND ( new_n2706_, new_n2541_, new_n2535_ ) -new_n12409_ = NAND ( new_n12408_, new_n12090_, new_n2712_ ) -new_n12410_ = NAND ( new_n12408_, new_n2559_ ) -new_n12411_ = OR ( new_n2667_, new_n2559_ ) -new_n12412_ = NAND ( new_n12411_, new_n12410_ ) -new_n12413_ = NAND ( new_n12412_, new_n2613_, NET_765 ) -new_n12414_ = NAND ( new_n12413_, NET_735 ) -NET_14954 = NAND ( new_n12414_, new_n12409_, new_n12407_ ) -new_n12416_ = OR ( new_n11570_, new_n2193_ ) -new_n12417_ = XOR ( new_n12416_, new_n2218_ ) -new_n12418_ = NAND ( new_n11615_, new_n2193_ ) -new_n12419_ = NAND ( new_n12418_, new_n11579_ ) -new_n12420_ = OR ( new_n12419_, new_n12417_ ) -new_n12421_ = NAND ( new_n11585_, new_n11581_ ) -new_n12422_ = NAND ( new_n12421_, new_n11582_ ) -new_n12423_ = NAND ( new_n12422_, new_n12420_ ) -new_n12424_ = NAND ( new_n12419_, new_n12417_ ) -new_n12425_ = NAND ( new_n12424_, new_n12423_ ) -new_n12426_ = NAND ( new_n11676_, new_n2193_ ) -new_n12427_ = NAND ( new_n12426_, new_n11579_ ) -new_n12428_ = NAND ( new_n12427_, new_n12425_ ) -new_n12429_ = NAND ( new_n12426_, new_n12424_, new_n12423_, new_n11579_ ) -new_n12430_ = NAND ( new_n12429_, new_n12428_ ) -new_n12431_ = OR ( new_n12430_, new_n11571_ ) -new_n12432_ = NAND ( new_n12430_, new_n11571_ ) -new_n12433_ = NOT ( new_n11615_ ) -new_n12434_ = NOR ( new_n11676_, new_n12433_ ) -new_n12435_ = NOR ( NET_309, new_n2129_ ) -new_n12436_ = NOR ( new_n2130_, new_n2056_ ) -new_n12437_ = NOR ( new_n12436_, new_n12435_ ) -new_n12438_ = NOT ( new_n12437_ ) -new_n12439_ = NAND ( new_n12438_, new_n12434_ ) -new_n12440_ = NOT ( new_n12439_ ) -new_n12441_ = NAND ( new_n12440_, new_n12432_, new_n12431_ ) -new_n12442_ = NAND ( new_n2395_, new_n2193_ ) -new_n12443_ = NAND ( new_n12442_, new_n2388_ ) -new_n12444_ = NAND ( new_n12443_, new_n11696_ ) -new_n12445_ = NOR ( new_n12437_, new_n12434_ ) -new_n12446_ = OR ( new_n2387_, new_n2150_ ) -new_n12447_ = AND ( new_n12446_, new_n2360_, new_n2319_ ) -new_n12448_ = NAND ( new_n12447_, new_n2213_, new_n2199_, new_n2184_ ) -new_n12449_ = OR ( new_n12448_, new_n12445_ ) -new_n12450_ = NAND ( new_n12449_, new_n11676_ ) -new_n12451_ = NAND ( new_n12450_, new_n12444_, new_n12441_ ) -new_n12452_ = NOR ( new_n12448_, new_n12438_ ) -new_n12453_ = NOT ( new_n12452_ ) -new_n12454_ = NAND ( new_n12453_, new_n11696_ ) -new_n12455_ = NAND ( new_n12443_, new_n11676_ ) -new_n12456_ = NAND ( new_n12455_, new_n12454_ ) -new_n12457_ = NOT ( new_n12456_ ) -new_n12458_ = OR ( new_n12457_, new_n12451_ ) -new_n12459_ = NAND ( new_n12457_, new_n12451_ ) -new_n12460_ = OR ( new_n12439_, new_n8075_ ) -new_n12461_ = NOT ( new_n12443_ ) -new_n12462_ = OR ( new_n12461_, new_n8052_ ) -new_n12463_ = NAND ( new_n12449_, new_n7726_ ) -new_n12464_ = NAND ( new_n12463_, new_n12462_, new_n12460_, new_n2193_ ) -new_n12465_ = OR ( new_n12452_, new_n8052_ ) -new_n12466_ = NAND ( new_n7405_, new_n2209_ ) -new_n12467_ = NAND ( new_n12443_, new_n7726_ ) -new_n12468_ = AND ( new_n12467_, new_n12466_, new_n12465_ ) -new_n12469_ = NAND ( new_n12468_, new_n12464_ ) -new_n12470_ = OR ( new_n12439_, new_n6626_ ) -new_n12471_ = NAND ( new_n12449_, new_n6294_ ) -new_n12472_ = OR ( new_n12461_, new_n6604_ ) -new_n12473_ = NAND ( new_n12472_, new_n12471_, new_n12470_, new_n2193_ ) -new_n12474_ = OR ( new_n12452_, new_n6604_ ) -new_n12475_ = NAND ( new_n5964_, new_n2209_ ) -new_n12476_ = NAND ( new_n12443_, new_n6294_ ) -new_n12477_ = AND ( new_n12476_, new_n12475_, new_n12474_ ) -new_n12478_ = NAND ( new_n12477_, new_n12473_ ) -new_n12479_ = OR ( new_n12439_, new_n5236_ ) -new_n12480_ = NAND ( new_n12449_, new_n4905_ ) -new_n12481_ = OR ( new_n12461_, new_n5214_ ) -new_n12482_ = NAND ( new_n12481_, new_n12480_, new_n12479_, new_n2193_ ) -new_n12483_ = NAND ( new_n12443_, new_n4905_ ) -new_n12484_ = NAND ( new_n4558_, new_n2209_ ) -new_n12485_ = OR ( new_n12452_, new_n5214_ ) -new_n12486_ = AND ( new_n12485_, new_n12484_, new_n12483_ ) -new_n12487_ = NAND ( new_n12486_, new_n12482_ ) -new_n12488_ = OR ( new_n12439_, new_n2346_ ) -new_n12489_ = NAND ( new_n12449_, new_n2252_ ) -new_n12490_ = OR ( new_n12461_, new_n2297_ ) -new_n12491_ = NAND ( new_n12490_, new_n12489_, new_n12488_, new_n2193_ ) -new_n12492_ = OR ( new_n12452_, new_n2297_ ) -new_n12493_ = NAND ( new_n12443_, new_n2252_ ) -new_n12494_ = AND ( new_n12493_, new_n12492_ ) -new_n12495_ = NAND ( new_n12494_, new_n12491_ ) -new_n12496_ = AND ( new_n2193_, new_n2180_, new_n2203_ ) -new_n12497_ = NAND ( new_n12496_, new_n12495_, new_n2198_, new_n2182_ ) -new_n12498_ = NAND ( new_n12443_, new_n2376_ ) -new_n12499_ = NAND ( new_n2252_, new_n2209_ ) -new_n12500_ = OR ( new_n12452_, new_n2919_ ) -new_n12501_ = AND ( new_n12500_, new_n12499_, new_n12498_ ) -new_n12502_ = NAND ( new_n12440_, new_n2941_ ) -new_n12503_ = NAND ( new_n12449_, new_n2376_ ) -new_n12504_ = OR ( new_n12461_, new_n2919_ ) -new_n12505_ = NAND ( new_n12504_, new_n12503_, new_n12502_, new_n2193_ ) -new_n12506_ = OR ( new_n12505_, new_n12501_ ) -new_n12507_ = OR ( new_n12494_, new_n12491_ ) -new_n12508_ = NAND ( new_n12507_, new_n12506_, new_n12497_ ) -new_n12509_ = OR ( new_n12439_, new_n3933_ ) -new_n12510_ = NAND ( new_n12449_, new_n2976_ ) -new_n12511_ = OR ( new_n12461_, new_n3908_ ) -new_n12512_ = NAND ( new_n12511_, new_n12510_, new_n12509_, new_n2193_ ) -new_n12513_ = NAND ( new_n12443_, new_n2976_ ) -new_n12514_ = NAND ( new_n2376_, new_n2209_ ) -new_n12515_ = OR ( new_n12452_, new_n3908_ ) -new_n12516_ = AND ( new_n12515_, new_n12514_, new_n12513_ ) -new_n12517_ = NAND ( new_n12516_, new_n12512_ ) -new_n12518_ = NAND ( new_n12505_, new_n12501_ ) -new_n12519_ = NAND ( new_n12518_, new_n12517_, new_n12508_ ) -new_n12520_ = NAND ( new_n12443_, new_n3962_ ) -new_n12521_ = NAND ( new_n2976_, new_n2209_ ) -new_n12522_ = OR ( new_n12452_, new_n4150_ ) -new_n12523_ = AND ( new_n12522_, new_n12521_, new_n12520_ ) -new_n12524_ = OR ( new_n12439_, new_n4171_ ) -new_n12525_ = NAND ( new_n12449_, new_n3962_ ) -new_n12526_ = OR ( new_n12461_, new_n4150_ ) -new_n12527_ = NAND ( new_n12526_, new_n12525_, new_n12524_, new_n2193_ ) -new_n12528_ = OR ( new_n12527_, new_n12523_ ) -new_n12529_ = OR ( new_n12516_, new_n12512_ ) -new_n12530_ = NAND ( new_n12529_, new_n12528_, new_n12519_ ) -new_n12531_ = OR ( new_n12439_, new_n4533_ ) -new_n12532_ = NAND ( new_n12449_, new_n4197_ ) -new_n12533_ = OR ( new_n12461_, new_n4511_ ) -new_n12534_ = NAND ( new_n12533_, new_n12532_, new_n12531_, new_n2193_ ) -new_n12535_ = NAND ( new_n12443_, new_n4197_ ) -new_n12536_ = NAND ( new_n3962_, new_n2209_ ) -new_n12537_ = OR ( new_n12452_, new_n4511_ ) -new_n12538_ = AND ( new_n12537_, new_n12536_, new_n12535_ ) -new_n12539_ = NAND ( new_n12538_, new_n12534_ ) -new_n12540_ = NAND ( new_n12527_, new_n12523_ ) -new_n12541_ = NAND ( new_n12540_, new_n12539_, new_n12530_ ) -new_n12542_ = NAND ( new_n12443_, new_n4558_ ) -new_n12543_ = NAND ( new_n4197_, new_n2209_ ) -new_n12544_ = OR ( new_n12452_, new_n4860_ ) -new_n12545_ = AND ( new_n12544_, new_n12543_, new_n12542_ ) -new_n12546_ = OR ( new_n12439_, new_n4881_ ) -new_n12547_ = NAND ( new_n12449_, new_n4558_ ) -new_n12548_ = OR ( new_n12461_, new_n4860_ ) -new_n12549_ = NAND ( new_n12548_, new_n12547_, new_n12546_, new_n2193_ ) -new_n12550_ = OR ( new_n12549_, new_n12545_ ) -new_n12551_ = OR ( new_n12538_, new_n12534_ ) -new_n12552_ = NAND ( new_n12551_, new_n12550_, new_n12541_ ) -new_n12553_ = NAND ( new_n12549_, new_n12545_ ) -new_n12554_ = NAND ( new_n12553_, new_n12552_, new_n12487_ ) -new_n12555_ = NAND ( new_n12443_, new_n5263_ ) -new_n12556_ = NAND ( new_n4905_, new_n2209_ ) -new_n12557_ = OR ( new_n12452_, new_n5472_ ) -new_n12558_ = AND ( new_n12557_, new_n12556_, new_n12555_ ) -new_n12559_ = OR ( new_n12439_, new_n5493_ ) -new_n12560_ = NAND ( new_n12449_, new_n5263_ ) -new_n12561_ = OR ( new_n12461_, new_n5472_ ) -new_n12562_ = NAND ( new_n12561_, new_n12560_, new_n12559_, new_n2193_ ) -new_n12563_ = OR ( new_n12562_, new_n12558_ ) -new_n12564_ = OR ( new_n12486_, new_n12482_ ) -new_n12565_ = NAND ( new_n12564_, new_n12563_, new_n12554_ ) -new_n12566_ = OR ( new_n12439_, new_n5939_ ) -new_n12567_ = NAND ( new_n12449_, new_n5518_ ) -new_n12568_ = OR ( new_n12461_, new_n5919_ ) -new_n12569_ = NAND ( new_n12568_, new_n12567_, new_n12566_, new_n2193_ ) -new_n12570_ = NAND ( new_n12443_, new_n5518_ ) -new_n12571_ = NAND ( new_n5263_, new_n2209_ ) -new_n12572_ = OR ( new_n12452_, new_n5919_ ) -new_n12573_ = AND ( new_n12572_, new_n12571_, new_n12570_ ) -new_n12574_ = NAND ( new_n12573_, new_n12569_ ) -new_n12575_ = NAND ( new_n12562_, new_n12558_ ) -new_n12576_ = NAND ( new_n12575_, new_n12574_, new_n12565_ ) -new_n12577_ = NAND ( new_n12443_, new_n5964_ ) -new_n12578_ = NAND ( new_n5518_, new_n2209_ ) -new_n12579_ = OR ( new_n12452_, new_n6250_ ) -new_n12580_ = AND ( new_n12579_, new_n12578_, new_n12577_ ) -new_n12581_ = OR ( new_n12439_, new_n6270_ ) -new_n12582_ = NAND ( new_n12449_, new_n5964_ ) -new_n12583_ = OR ( new_n12461_, new_n6250_ ) -new_n12584_ = NAND ( new_n12583_, new_n12582_, new_n12581_, new_n2193_ ) -new_n12585_ = OR ( new_n12584_, new_n12580_ ) -new_n12586_ = OR ( new_n12573_, new_n12569_ ) -new_n12587_ = NAND ( new_n12586_, new_n12585_, new_n12576_ ) -new_n12588_ = NAND ( new_n12584_, new_n12580_ ) -new_n12589_ = NAND ( new_n12588_, new_n12587_, new_n12478_ ) -new_n12590_ = OR ( new_n12452_, new_n6867_ ) -new_n12591_ = NAND ( new_n6294_, new_n2209_ ) -new_n12592_ = NAND ( new_n12443_, new_n6652_ ) -new_n12593_ = AND ( new_n12592_, new_n12591_, new_n12590_ ) -new_n12594_ = OR ( new_n12439_, new_n6887_ ) -new_n12595_ = OR ( new_n12461_, new_n6867_ ) -new_n12596_ = NAND ( new_n12449_, new_n6652_ ) -new_n12597_ = NAND ( new_n12596_, new_n12595_, new_n12594_, new_n2193_ ) -new_n12598_ = OR ( new_n12597_, new_n12593_ ) -new_n12599_ = OR ( new_n12477_, new_n12473_ ) -new_n12600_ = NAND ( new_n12599_, new_n12598_, new_n12589_ ) -new_n12601_ = OR ( new_n12439_, new_n7382_ ) -new_n12602_ = OR ( new_n12461_, new_n7362_ ) -new_n12603_ = NAND ( new_n12449_, new_n6912_ ) -new_n12604_ = NAND ( new_n12603_, new_n12602_, new_n12601_, new_n2193_ ) -new_n12605_ = OR ( new_n12452_, new_n7362_ ) -new_n12606_ = NAND ( new_n6652_, new_n2209_ ) -new_n12607_ = NAND ( new_n12443_, new_n6912_ ) -new_n12608_ = AND ( new_n12607_, new_n12606_, new_n12605_ ) -new_n12609_ = NAND ( new_n12608_, new_n12604_ ) -new_n12610_ = NAND ( new_n12597_, new_n12593_ ) -new_n12611_ = NAND ( new_n12610_, new_n12609_, new_n12600_ ) -new_n12612_ = OR ( new_n12452_, new_n7679_ ) -new_n12613_ = NAND ( new_n6912_, new_n2209_ ) -new_n12614_ = NAND ( new_n12443_, new_n7405_ ) -new_n12615_ = AND ( new_n12614_, new_n12613_, new_n12612_ ) -new_n12616_ = OR ( new_n12439_, new_n7699_ ) -new_n12617_ = OR ( new_n12461_, new_n7679_ ) -new_n12618_ = NAND ( new_n12449_, new_n7405_ ) -new_n12619_ = NAND ( new_n12618_, new_n12617_, new_n12616_, new_n2193_ ) -new_n12620_ = OR ( new_n12619_, new_n12615_ ) -new_n12621_ = OR ( new_n12608_, new_n12604_ ) -new_n12622_ = NAND ( new_n12621_, new_n12620_, new_n12611_ ) -new_n12623_ = NAND ( new_n12619_, new_n12615_ ) -new_n12624_ = NAND ( new_n12623_, new_n12622_, new_n12469_ ) -new_n12625_ = OR ( new_n12452_, new_n8286_ ) -new_n12626_ = NAND ( new_n7726_, new_n2209_ ) -new_n12627_ = NAND ( new_n12443_, new_n8103_ ) -new_n12628_ = AND ( new_n12627_, new_n12626_, new_n12625_ ) -new_n12629_ = OR ( new_n12439_, new_n8308_ ) -new_n12630_ = OR ( new_n12461_, new_n8286_ ) -new_n12631_ = NAND ( new_n12449_, new_n8103_ ) -new_n12632_ = NAND ( new_n12631_, new_n12630_, new_n12629_, new_n2193_ ) -new_n12633_ = OR ( new_n12632_, new_n12628_ ) -new_n12634_ = OR ( new_n12468_, new_n12464_ ) -new_n12635_ = NAND ( new_n12634_, new_n12633_, new_n12624_ ) -new_n12636_ = OR ( new_n12439_, new_n8698_ ) -new_n12637_ = OR ( new_n12461_, new_n8677_ ) -new_n12638_ = NAND ( new_n12449_, new_n8333_ ) -new_n12639_ = NAND ( new_n12638_, new_n12637_, new_n12636_, new_n2193_ ) -new_n12640_ = OR ( new_n12452_, new_n8677_ ) -new_n12641_ = NAND ( new_n8103_, new_n2209_ ) -new_n12642_ = NAND ( new_n12443_, new_n8333_ ) -new_n12643_ = AND ( new_n12642_, new_n12641_, new_n12640_ ) -new_n12644_ = NAND ( new_n12643_, new_n12639_ ) -new_n12645_ = NAND ( new_n12632_, new_n12628_ ) -new_n12646_ = NAND ( new_n12645_, new_n12644_, new_n12635_ ) -new_n12647_ = OR ( new_n12452_, new_n8986_ ) -new_n12648_ = NAND ( new_n8333_, new_n2209_ ) -new_n12649_ = NAND ( new_n12443_, new_n8722_ ) -new_n12650_ = AND ( new_n12649_, new_n12648_, new_n12647_ ) -new_n12651_ = OR ( new_n12439_, new_n9007_ ) -new_n12652_ = OR ( new_n12461_, new_n8986_ ) -new_n12653_ = NAND ( new_n12449_, new_n8722_ ) -new_n12654_ = NAND ( new_n12653_, new_n12652_, new_n12651_, new_n2193_ ) -new_n12655_ = OR ( new_n12654_, new_n12650_ ) -new_n12656_ = OR ( new_n12643_, new_n12639_ ) -new_n12657_ = NAND ( new_n12656_, new_n12655_, new_n12646_ ) -new_n12658_ = OR ( new_n12439_, new_n9301_ ) -new_n12659_ = OR ( new_n12461_, new_n9280_ ) -new_n12660_ = NAND ( new_n12449_, new_n9034_ ) -new_n12661_ = NAND ( new_n12660_, new_n12659_, new_n12658_, new_n2193_ ) -new_n12662_ = OR ( new_n12452_, new_n9280_ ) -new_n12663_ = NAND ( new_n8722_, new_n2209_ ) -new_n12664_ = NAND ( new_n12443_, new_n9034_ ) -new_n12665_ = AND ( new_n12664_, new_n12663_, new_n12662_ ) -new_n12666_ = NAND ( new_n12665_, new_n12661_ ) -new_n12667_ = NAND ( new_n12654_, new_n12650_ ) -new_n12668_ = NAND ( new_n12667_, new_n12666_, new_n12657_ ) -new_n12669_ = OR ( new_n12452_, new_n9559_ ) -new_n12670_ = NAND ( new_n9034_, new_n2209_ ) -new_n12671_ = NAND ( new_n12443_, new_n9325_ ) -new_n12672_ = AND ( new_n12671_, new_n12670_, new_n12669_ ) -new_n12673_ = OR ( new_n12439_, new_n9580_ ) -new_n12674_ = OR ( new_n12461_, new_n9559_ ) -new_n12675_ = NAND ( new_n12449_, new_n9325_ ) -new_n12676_ = NAND ( new_n12675_, new_n12674_, new_n12673_, new_n2193_ ) -new_n12677_ = OR ( new_n12676_, new_n12672_ ) -new_n12678_ = OR ( new_n12665_, new_n12661_ ) -new_n12679_ = NAND ( new_n12678_, new_n12677_, new_n12668_ ) -new_n12680_ = OR ( new_n12439_, new_n9838_ ) -new_n12681_ = NAND ( new_n12443_, new_n9825_ ) -new_n12682_ = NAND ( new_n12449_, new_n9605_ ) -new_n12683_ = NAND ( new_n12682_, new_n12681_, new_n12680_, new_n2193_ ) -new_n12684_ = NAND ( new_n12453_, new_n9825_ ) -new_n12685_ = NAND ( new_n9325_, new_n2209_ ) -new_n12686_ = NAND ( new_n12443_, new_n9605_ ) -new_n12687_ = AND ( new_n12686_, new_n12685_, new_n12684_ ) -new_n12688_ = NAND ( new_n12687_, new_n12683_ ) -new_n12689_ = NAND ( new_n12676_, new_n12672_ ) -new_n12690_ = NAND ( new_n12689_, new_n12688_, new_n12679_ ) -new_n12691_ = NAND ( new_n12453_, new_n10016_ ) -new_n12692_ = NAND ( new_n9605_, new_n2209_ ) -new_n12693_ = NAND ( new_n12443_, new_n9860_ ) -new_n12694_ = AND ( new_n12693_, new_n12692_, new_n12691_ ) -new_n12695_ = OR ( new_n12439_, new_n10029_ ) -new_n12696_ = NAND ( new_n12443_, new_n10016_ ) -new_n12697_ = NAND ( new_n12449_, new_n9860_ ) -new_n12698_ = NAND ( new_n12697_, new_n12696_, new_n12695_, new_n2193_ ) -new_n12699_ = OR ( new_n12698_, new_n12694_ ) -new_n12700_ = OR ( new_n12687_, new_n12683_ ) -new_n12701_ = NAND ( new_n12700_, new_n12699_, new_n12690_ ) -new_n12702_ = OR ( new_n12439_, new_n10215_ ) -new_n12703_ = NAND ( new_n12443_, new_n10202_ ) -new_n12704_ = NAND ( new_n12449_, new_n10052_ ) -new_n12705_ = NAND ( new_n12704_, new_n12703_, new_n12702_, new_n2193_ ) -new_n12706_ = NAND ( new_n12453_, new_n10202_ ) -new_n12707_ = NAND ( new_n9860_, new_n2209_ ) -new_n12708_ = NAND ( new_n12443_, new_n10052_ ) -new_n12709_ = AND ( new_n12708_, new_n12707_, new_n12706_ ) -new_n12710_ = NAND ( new_n12709_, new_n12705_ ) -new_n12711_ = NAND ( new_n12698_, new_n12694_ ) -new_n12712_ = NAND ( new_n12711_, new_n12710_, new_n12701_ ) -new_n12713_ = NAND ( new_n12453_, new_n10390_ ) -new_n12714_ = NAND ( new_n10052_, new_n2209_ ) -new_n12715_ = NAND ( new_n12443_, new_n10236_ ) -new_n12716_ = AND ( new_n12715_, new_n12714_, new_n12713_ ) -new_n12717_ = OR ( new_n12439_, new_n10403_ ) -new_n12718_ = NAND ( new_n12443_, new_n10390_ ) -new_n12719_ = NAND ( new_n12449_, new_n10236_ ) -new_n12720_ = NAND ( new_n12719_, new_n12718_, new_n12717_, new_n2193_ ) -new_n12721_ = OR ( new_n12720_, new_n12716_ ) -new_n12722_ = OR ( new_n12709_, new_n12705_ ) -new_n12723_ = NAND ( new_n12722_, new_n12721_, new_n12712_ ) -new_n12724_ = OR ( new_n12439_, new_n10591_ ) -new_n12725_ = NAND ( new_n12443_, new_n10577_ ) -new_n12726_ = NAND ( new_n12449_, new_n10427_ ) -new_n12727_ = NAND ( new_n12726_, new_n12725_, new_n12724_, new_n2193_ ) -new_n12728_ = NAND ( new_n12453_, new_n10577_ ) -new_n12729_ = NAND ( new_n10236_, new_n2209_ ) -new_n12730_ = NAND ( new_n12443_, new_n10427_ ) -new_n12731_ = AND ( new_n12730_, new_n12729_, new_n12728_ ) -new_n12732_ = NAND ( new_n12731_, new_n12727_ ) -new_n12733_ = NAND ( new_n12720_, new_n12716_ ) -new_n12734_ = NAND ( new_n12733_, new_n12732_, new_n12723_ ) -new_n12735_ = NAND ( new_n12453_, new_n10766_ ) -new_n12736_ = NAND ( new_n10427_, new_n2209_ ) -new_n12737_ = NAND ( new_n12443_, new_n10612_ ) -new_n12738_ = AND ( new_n12737_, new_n12736_, new_n12735_ ) -new_n12739_ = OR ( new_n12439_, new_n10779_ ) -new_n12740_ = NAND ( new_n12443_, new_n10766_ ) -new_n12741_ = NAND ( new_n12449_, new_n10612_ ) -new_n12742_ = NAND ( new_n12741_, new_n12740_, new_n12739_, new_n2193_ ) -new_n12743_ = OR ( new_n12742_, new_n12738_ ) -new_n12744_ = OR ( new_n12731_, new_n12727_ ) -new_n12745_ = NAND ( new_n12744_, new_n12743_, new_n12734_ ) -new_n12746_ = OR ( new_n12439_, new_n10969_ ) -new_n12747_ = NAND ( new_n12443_, new_n10956_ ) -new_n12748_ = NAND ( new_n12449_, new_n10803_ ) -new_n12749_ = NAND ( new_n12748_, new_n12747_, new_n12746_, new_n2193_ ) -new_n12750_ = NAND ( new_n12453_, new_n10956_ ) -new_n12751_ = NAND ( new_n10612_, new_n2209_ ) -new_n12752_ = NAND ( new_n12443_, new_n10803_ ) -new_n12753_ = AND ( new_n12752_, new_n12751_, new_n12750_ ) -new_n12754_ = NAND ( new_n12753_, new_n12749_ ) -new_n12755_ = NAND ( new_n12742_, new_n12738_ ) -new_n12756_ = NAND ( new_n12755_, new_n12754_, new_n12745_ ) -new_n12757_ = NAND ( new_n12453_, new_n11142_ ) -new_n12758_ = NAND ( new_n10803_, new_n2209_ ) -new_n12759_ = NAND ( new_n12443_, new_n10992_ ) -new_n12760_ = AND ( new_n12759_, new_n12758_, new_n12757_ ) -new_n12761_ = OR ( new_n12439_, new_n11155_ ) -new_n12762_ = NAND ( new_n12443_, new_n11142_ ) -new_n12763_ = NAND ( new_n12449_, new_n10992_ ) -new_n12764_ = NAND ( new_n12763_, new_n12762_, new_n12761_, new_n2193_ ) -new_n12765_ = OR ( new_n12764_, new_n12760_ ) -new_n12766_ = OR ( new_n12753_, new_n12749_ ) -new_n12767_ = NAND ( new_n12766_, new_n12765_, new_n12756_ ) -new_n12768_ = OR ( new_n12439_, new_n11396_ ) -new_n12769_ = NAND ( new_n12443_, new_n11383_ ) -new_n12770_ = NAND ( new_n12449_, new_n11175_ ) -new_n12771_ = NAND ( new_n12770_, new_n12769_, new_n12768_, new_n2193_ ) -new_n12772_ = NAND ( new_n12453_, new_n11383_ ) -new_n12773_ = NAND ( new_n10992_, new_n2209_ ) -new_n12774_ = NAND ( new_n12443_, new_n11175_ ) -new_n12775_ = AND ( new_n12774_, new_n12773_, new_n12772_ ) -new_n12776_ = NAND ( new_n12775_, new_n12771_ ) -new_n12777_ = NAND ( new_n12764_, new_n12760_ ) -new_n12778_ = NAND ( new_n12777_, new_n12776_, new_n12767_ ) -new_n12779_ = NAND ( new_n12453_, new_n11564_ ) -new_n12780_ = NAND ( new_n11175_, new_n2209_ ) -new_n12781_ = NAND ( new_n12443_, new_n11415_ ) -new_n12782_ = AND ( new_n12781_, new_n12780_, new_n12779_ ) -new_n12783_ = OR ( new_n12439_, new_n11586_ ) -new_n12784_ = NAND ( new_n12443_, new_n11564_ ) -new_n12785_ = NAND ( new_n12449_, new_n11415_ ) -new_n12786_ = NAND ( new_n12785_, new_n12784_, new_n12783_, new_n2193_ ) -new_n12787_ = OR ( new_n12786_, new_n12782_ ) -new_n12788_ = OR ( new_n12775_, new_n12771_ ) -new_n12789_ = NAND ( new_n12788_, new_n12787_, new_n12778_ ) -new_n12790_ = NAND ( new_n12424_, new_n12422_, new_n12420_ ) -new_n12791_ = NAND ( new_n12424_, new_n12420_ ) -new_n12792_ = NAND ( new_n12791_, new_n12421_, new_n11582_ ) -new_n12793_ = NAND ( new_n12792_, new_n12790_, new_n12440_ ) -new_n12794_ = NAND ( new_n12443_, new_n11658_ ) -new_n12795_ = NAND ( new_n12449_, new_n11615_ ) -new_n12796_ = NAND ( new_n12795_, new_n12794_, new_n12793_ ) -new_n12797_ = AND ( new_n12453_, new_n11658_ ) -new_n12798_ = NOR ( new_n12461_, new_n12433_ ) -new_n12799_ = NOR ( new_n12798_, new_n12797_ ) -new_n12800_ = NAND ( new_n12799_, new_n12796_ ) -new_n12801_ = NAND ( new_n12786_, new_n12782_ ) -new_n12802_ = NAND ( new_n12801_, new_n12800_, new_n12789_ ) -new_n12803_ = OR ( new_n12799_, new_n12796_ ) -new_n12804_ = NAND ( new_n12803_, new_n12802_, new_n12459_, new_n12458_ ) -new_n12805_ = NAND ( new_n12450_, new_n12444_, new_n12441_, new_n2396_ ) -new_n12806_ = NAND ( new_n12456_, new_n12451_ ) -new_n12807_ = OR ( new_n12456_, new_n2396_ ) -new_n12808_ = NAND ( new_n12807_, new_n12806_, new_n12805_ ) -new_n12809_ = NAND ( new_n2150_, new_n2180_, new_n2203_ ) -new_n12810_ = NAND ( new_n2348_, new_n2181_ ) -new_n12811_ = NAND ( new_n12810_, new_n12809_, new_n2944_ ) -new_n12812_ = NAND ( new_n12811_, new_n12808_, new_n12804_ ) -new_n12813_ = NAND ( new_n12808_, new_n12804_ ) -new_n12814_ = NAND ( new_n2151_, new_n2203_ ) -new_n12815_ = NAND ( new_n2348_, new_n2137_ ) -new_n12816_ = NAND ( new_n12815_, new_n12814_, new_n2943_ ) -new_n12817_ = NAND ( new_n12816_, new_n12813_ ) -new_n12818_ = NAND ( new_n11658_, new_n12433_ ) -new_n12819_ = OR ( new_n11658_, new_n12433_ ) -new_n12820_ = NOT ( new_n11415_ ) -new_n12821_ = NAND ( new_n11564_, new_n12820_ ) -new_n12822_ = NOR ( new_n11564_, new_n12820_ ) -new_n12823_ = NOT ( new_n11142_ ) -new_n12824_ = OR ( new_n12823_, new_n10992_ ) -new_n12825_ = NAND ( new_n12823_, new_n10992_ ) -new_n12826_ = NOT ( new_n10956_ ) -new_n12827_ = NAND ( new_n12826_, new_n10803_ ) -new_n12828_ = OR ( new_n12826_, new_n10803_ ) -new_n12829_ = NOT ( new_n10766_ ) -new_n12830_ = NAND ( new_n12829_, new_n10612_ ) -new_n12831_ = OR ( new_n12829_, new_n10612_ ) -new_n12832_ = NOR ( new_n10577_, new_n10579_ ) -new_n12833_ = NAND ( new_n10577_, new_n10579_ ) -new_n12834_ = NOT ( new_n10390_ ) -new_n12835_ = NAND ( new_n12834_, new_n10236_ ) -new_n12836_ = OR ( new_n12834_, new_n10236_ ) -new_n12837_ = NOT ( new_n10202_ ) -new_n12838_ = AND ( new_n12837_, new_n10052_ ) -new_n12839_ = NOR ( new_n12837_, new_n10052_ ) -new_n12840_ = NOT ( new_n10016_ ) -new_n12841_ = AND ( new_n12840_, new_n9860_ ) -new_n12842_ = OR ( new_n12840_, new_n9860_ ) -new_n12843_ = OR ( new_n9559_, new_n9325_ ) -new_n12844_ = AND ( new_n9559_, new_n9325_ ) -new_n12845_ = AND ( new_n9280_, new_n9034_ ) -new_n12846_ = OR ( new_n9280_, new_n9034_ ) -new_n12847_ = NAND ( new_n8986_, new_n8722_ ) -new_n12848_ = OR ( new_n8986_, new_n8722_ ) -new_n12849_ = AND ( new_n8286_, new_n8103_ ) -new_n12850_ = OR ( new_n8286_, new_n8103_ ) -new_n12851_ = NAND ( new_n8052_, new_n7726_ ) -new_n12852_ = OR ( new_n8052_, new_n7726_ ) -new_n12853_ = AND ( new_n7679_, new_n7405_ ) -new_n12854_ = OR ( new_n7679_, new_n7405_ ) -new_n12855_ = NAND ( new_n7362_, new_n6912_ ) -new_n12856_ = OR ( new_n7362_, new_n6912_ ) -new_n12857_ = XOR ( new_n6867_, new_n6652_ ) -new_n12858_ = NAND ( new_n12857_, new_n12856_, new_n12855_, new_n12854_ ) -new_n12859_ = NOR ( new_n12858_, new_n12853_ ) -new_n12860_ = NAND ( new_n12859_, new_n12852_, new_n12851_, new_n12850_ ) -new_n12861_ = XNOR ( new_n8677_, new_n8333_ ) -new_n12862_ = NOR ( new_n12861_, new_n12860_, new_n12849_ ) -new_n12863_ = NAND ( new_n12862_, new_n12848_, new_n12847_, new_n12846_ ) -new_n12864_ = NOR ( new_n12863_, new_n12845_, new_n12844_ ) -new_n12865_ = XNOR ( new_n9825_, new_n9605_ ) -new_n12866_ = NAND ( new_n12865_, new_n12864_, new_n12843_, new_n12842_ ) -new_n12867_ = NOR ( new_n12866_, new_n12841_, new_n12839_, new_n12838_ ) -new_n12868_ = NAND ( new_n12867_, new_n12836_, new_n12835_, new_n12833_ ) -new_n12869_ = NOR ( new_n12868_, new_n12832_ ) -new_n12870_ = AND ( new_n12869_, new_n12831_, new_n12830_, new_n12828_ ) -new_n12871_ = NAND ( new_n12870_, new_n12827_, new_n12825_, new_n12824_ ) -new_n12872_ = XOR ( new_n11383_, new_n11175_ ) -new_n12873_ = NOR ( new_n12872_, new_n12871_, new_n12822_ ) -new_n12874_ = NAND ( new_n12873_, new_n12821_, new_n12819_, new_n12818_ ) -new_n12875_ = XOR ( new_n11696_, new_n11676_ ) -new_n12876_ = NOR ( new_n12875_, new_n12874_ ) -new_n12877_ = XOR ( new_n2297_, new_n2252_ ) -new_n12878_ = AND ( new_n6604_, new_n6294_ ) -new_n12879_ = OR ( new_n6604_, new_n6294_ ) -new_n12880_ = OR ( new_n5214_, new_n4905_ ) -new_n12881_ = NAND ( new_n5214_, new_n4905_ ) -new_n12882_ = XOR ( new_n5472_, new_n5263_ ) -new_n12883_ = NAND ( new_n12882_, new_n12881_, new_n12880_, new_n12879_ ) -new_n12884_ = XOR ( new_n4511_, new_n4197_ ) -new_n12885_ = OR ( new_n3908_, new_n2976_ ) -new_n12886_ = NAND ( new_n3908_, new_n2976_ ) -new_n12887_ = XOR ( new_n2919_, new_n2376_ ) -new_n12888_ = NAND ( new_n12887_, new_n12886_, new_n12885_, new_n12884_ ) -new_n12889_ = XOR ( new_n6250_, new_n5964_ ) -new_n12890_ = XOR ( new_n4860_, new_n4558_ ) -new_n12891_ = XOR ( new_n4150_, new_n3962_ ) -new_n12892_ = XOR ( new_n5919_, new_n5518_ ) -new_n12893_ = NAND ( new_n12892_, new_n12891_, new_n12890_, new_n12889_ ) -new_n12894_ = NOR ( new_n12893_, new_n12888_, new_n12883_, new_n12878_ ) -new_n12895_ = NAND ( new_n12894_, new_n12877_, new_n12876_ ) -new_n12896_ = NAND ( new_n12895_, new_n2212_, new_n2132_ ) -new_n12897_ = NAND ( new_n12894_, new_n12877_, new_n12876_, new_n2316_ ) -new_n12898_ = NAND ( new_n12895_, new_n2183_, new_n2132_ ) -new_n12899_ = OR ( new_n12895_, new_n2313_ ) -new_n12900_ = AND ( new_n12899_, new_n12898_, new_n12897_, new_n12896_ ) -new_n12901_ = NAND ( new_n12900_, new_n12817_, new_n12812_ ) -new_n12902_ = NAND ( new_n12901_, new_n2407_ ) -new_n12903_ = NAND ( new_n2395_, new_n2288_, new_n2283_ ) -new_n12904_ = NAND ( new_n12903_, new_n2209_ ) -new_n12905_ = NAND ( new_n2193_, new_n2149_ ) -new_n12906_ = NAND ( new_n12905_, new_n12904_, new_n2405_, NET_520 ) -new_n12907_ = NAND ( new_n12906_, NET_490 ) -new_n12908_ = OR ( new_n12903_, new_n12813_, new_n2379_ ) -NET_15004 = NAND ( new_n12908_, new_n12907_, new_n12902_ ) -new_n12910_ = NOT ( new_n11351_ ) -new_n12911_ = NOR ( new_n11365_, new_n12910_ ) -new_n12912_ = NOT ( new_n1970_ ) -new_n12913_ = NOR ( new_n12912_, new_n1744_ ) -new_n12914_ = NAND ( new_n12913_, new_n12911_ ) -new_n12915_ = OR ( new_n11491_, new_n1841_ ) -new_n12916_ = XOR ( new_n12915_, new_n1844_ ) -new_n12917_ = NAND ( new_n11351_, new_n1841_ ) -new_n12918_ = NAND ( new_n12917_, new_n11499_ ) -new_n12919_ = OR ( new_n12918_, new_n12916_ ) -new_n12920_ = NAND ( new_n11505_, new_n11501_ ) -new_n12921_ = NAND ( new_n12920_, new_n11502_ ) -new_n12922_ = NAND ( new_n12921_, new_n12919_ ) -new_n12923_ = NAND ( new_n12918_, new_n12916_ ) -new_n12924_ = NAND ( new_n12923_, new_n12922_ ) -new_n12925_ = NAND ( new_n11365_, new_n1841_ ) -new_n12926_ = NAND ( new_n12925_, new_n11499_ ) -new_n12927_ = NAND ( new_n12926_, new_n12924_ ) -new_n12928_ = NAND ( new_n12925_, new_n12923_, new_n12922_, new_n11499_ ) -new_n12929_ = NAND ( new_n12928_, new_n12927_ ) -new_n12930_ = XOR ( new_n12929_, new_n11492_ ) -new_n12931_ = OR ( new_n12930_, new_n12914_ ) -new_n12932_ = NOT ( new_n12913_ ) -new_n12933_ = OR ( new_n12932_, new_n12911_ ) -new_n12934_ = OR ( new_n1739_, new_n1725_ ) -new_n12935_ = AND ( new_n12934_, new_n1826_ ) -new_n12936_ = NAND ( new_n12935_, new_n12933_ ) -new_n12937_ = NAND ( new_n12936_, new_n11365_ ) -new_n12938_ = NAND ( new_n2022_, new_n1841_ ) -new_n12939_ = NAND ( new_n12938_, new_n2012_, new_n1971_, new_n1751_ ) -new_n12940_ = NAND ( new_n1986_, new_n1754_ ) -new_n12941_ = NOR ( new_n12940_, new_n12939_ ) -new_n12942_ = NOT ( new_n12941_ ) -new_n12943_ = NAND ( new_n12942_, new_n11525_ ) -new_n12944_ = AND ( new_n12943_, new_n12937_, new_n12931_ ) -new_n12945_ = NAND ( new_n12940_, new_n12911_ ) -new_n12946_ = OR ( new_n12945_, new_n12930_ ) -new_n12947_ = NOT ( new_n12911_ ) -new_n12948_ = AND ( new_n12940_, new_n12947_ ) -new_n12949_ = NOR ( new_n1973_, new_n1744_ ) -new_n12950_ = OR ( new_n12949_, new_n12948_, new_n12939_ ) -new_n12951_ = NAND ( new_n12950_, new_n11365_ ) -new_n12952_ = NAND ( new_n12935_, new_n12932_ ) -new_n12953_ = NAND ( new_n12952_, new_n11525_ ) -new_n12954_ = NAND ( new_n12953_, new_n12951_, new_n12946_ ) -new_n12955_ = NAND ( new_n12954_, new_n12944_ ) -new_n12956_ = OR ( new_n12954_, new_n12944_ ) -new_n12957_ = NAND ( new_n12923_, new_n12921_, new_n12919_ ) -new_n12958_ = NAND ( new_n12923_, new_n12919_ ) -new_n12959_ = NAND ( new_n12958_, new_n12920_, new_n11502_ ) -new_n12960_ = NAND ( new_n12959_, new_n12957_ ) -new_n12961_ = OR ( new_n12960_, new_n12914_ ) -new_n12962_ = NAND ( new_n12936_, new_n11351_ ) -new_n12963_ = NAND ( new_n12942_, new_n11354_ ) -new_n12964_ = NAND ( new_n12963_, new_n12962_, new_n12961_ ) -new_n12965_ = OR ( new_n12960_, new_n12945_ ) -new_n12966_ = NAND ( new_n12950_, new_n11351_ ) -new_n12967_ = NAND ( new_n12952_, new_n11354_ ) -new_n12968_ = AND ( new_n12967_, new_n12966_, new_n12965_ ) -new_n12969_ = NAND ( new_n12968_, new_n12964_ ) -new_n12970_ = OR ( new_n12914_, new_n7995_ ) -new_n12971_ = NAND ( new_n12942_, new_n7977_ ) -new_n12972_ = NOR ( new_n12949_, new_n1833_ ) -new_n12973_ = NAND ( new_n12936_, new_n7599_ ) -new_n12974_ = NAND ( new_n12973_, new_n12972_, new_n12971_, new_n12970_ ) -new_n12975_ = OR ( new_n12945_, new_n7995_ ) -new_n12976_ = NAND ( new_n12952_, new_n7977_ ) -new_n12977_ = NAND ( new_n12950_, new_n7599_ ) -new_n12978_ = NAND ( new_n7333_, new_n1833_ ) -new_n12979_ = NAND ( new_n12978_, new_n12977_, new_n12976_, new_n12975_ ) -new_n12980_ = NOT ( new_n12979_ ) -new_n12981_ = NAND ( new_n12980_, new_n12974_ ) -new_n12982_ = OR ( new_n12914_, new_n6491_ ) -new_n12983_ = NAND ( new_n12936_, new_n6161_ ) -new_n12984_ = NAND ( new_n12942_, new_n6474_ ) -new_n12985_ = NAND ( new_n12984_, new_n12983_, new_n12982_, new_n12972_ ) -new_n12986_ = OR ( new_n12945_, new_n6491_ ) -new_n12987_ = NAND ( new_n12950_, new_n6161_ ) -new_n12988_ = NAND ( new_n12952_, new_n6474_ ) -new_n12989_ = NAND ( new_n5883_, new_n1833_ ) -new_n12990_ = NAND ( new_n12989_, new_n12988_, new_n12987_, new_n12986_ ) -new_n12991_ = NOT ( new_n12990_ ) -new_n12992_ = NAND ( new_n12991_, new_n12985_ ) -new_n12993_ = OR ( new_n12914_, new_n5102_ ) -new_n12994_ = NAND ( new_n12936_, new_n4768_ ) -new_n12995_ = OR ( new_n12941_, new_n5084_ ) -new_n12996_ = NAND ( new_n12995_, new_n12994_, new_n12993_, new_n12972_ ) -new_n12997_ = OR ( new_n12945_, new_n5102_ ) -new_n12998_ = NAND ( new_n12950_, new_n4768_ ) -new_n12999_ = NOT ( new_n12952_ ) -new_n13000_ = OR ( new_n12999_, new_n5084_ ) -new_n13001_ = NAND ( new_n4489_, new_n1833_ ) -new_n13002_ = NAND ( new_n13001_, new_n13000_, new_n12998_, new_n12997_ ) -new_n13003_ = NOT ( new_n13002_ ) -new_n13004_ = NAND ( new_n13003_, new_n12996_ ) -new_n13005_ = OR ( new_n12914_, new_n1968_ ) -new_n13006_ = NAND ( new_n12936_, new_n1903_ ) -new_n13007_ = OR ( new_n12941_, new_n1984_ ) -new_n13008_ = NAND ( new_n13007_, new_n13006_, new_n13005_, new_n12972_ ) -new_n13009_ = OR ( new_n12945_, new_n1968_ ) -new_n13010_ = NAND ( new_n12950_, new_n1903_ ) -new_n13011_ = NAND ( new_n12952_, new_n1929_ ) -new_n13012_ = AND ( new_n13011_, new_n13010_, new_n13009_ ) -new_n13013_ = NAND ( new_n13012_, new_n13008_ ) -new_n13014_ = OR ( new_n1970_, new_n1725_ ) -new_n13015_ = NAND ( new_n1744_, new_n1725_ ) -new_n13016_ = AND ( new_n13015_, new_n1973_, new_n1841_ ) -new_n13017_ = NAND ( new_n13016_, new_n13014_, new_n13013_, new_n12932_ ) -new_n13018_ = OR ( new_n12945_, new_n2844_ ) -new_n13019_ = NAND ( new_n12950_, new_n2001_ ) -new_n13020_ = NAND ( new_n12952_, new_n2829_ ) -new_n13021_ = NAND ( new_n1903_, new_n1833_ ) -new_n13022_ = NAND ( new_n13021_, new_n13020_, new_n13019_, new_n13018_ ) -new_n13023_ = OR ( new_n12914_, new_n2844_ ) -new_n13024_ = NAND ( new_n12936_, new_n2001_ ) -new_n13025_ = OR ( new_n12941_, new_n2828_ ) -new_n13026_ = NAND ( new_n13025_, new_n13024_, new_n13023_, new_n12972_ ) -new_n13027_ = NOT ( new_n13026_ ) -new_n13028_ = NAND ( new_n13027_, new_n13022_ ) -new_n13029_ = OR ( new_n13012_, new_n13008_ ) -new_n13030_ = NAND ( new_n13029_, new_n13028_, new_n13017_ ) -new_n13031_ = OR ( new_n12914_, new_n3853_ ) -new_n13032_ = NAND ( new_n12936_, new_n2861_ ) -new_n13033_ = OR ( new_n12941_, new_n3881_ ) -new_n13034_ = NAND ( new_n13033_, new_n13032_, new_n13031_, new_n12972_ ) -new_n13035_ = OR ( new_n12945_, new_n3853_ ) -new_n13036_ = NAND ( new_n12950_, new_n2861_ ) -new_n13037_ = NAND ( new_n12952_, new_n3836_ ) -new_n13038_ = NAND ( new_n2001_, new_n1833_ ) -new_n13039_ = NAND ( new_n13038_, new_n13037_, new_n13036_, new_n13035_ ) -new_n13040_ = NOT ( new_n13039_ ) -new_n13041_ = NAND ( new_n13040_, new_n13034_ ) -new_n13042_ = OR ( new_n13027_, new_n13022_ ) -new_n13043_ = NAND ( new_n13042_, new_n13041_, new_n13030_ ) -new_n13044_ = OR ( new_n12945_, new_n4052_ ) -new_n13045_ = NAND ( new_n12950_, new_n3879_ ) -new_n13046_ = NAND ( new_n12952_, new_n4037_ ) -new_n13047_ = NAND ( new_n2861_, new_n1833_ ) -new_n13048_ = NAND ( new_n13047_, new_n13046_, new_n13045_, new_n13044_ ) -new_n13049_ = OR ( new_n12914_, new_n4052_ ) -new_n13050_ = NAND ( new_n12936_, new_n3879_ ) -new_n13051_ = OR ( new_n12941_, new_n4036_ ) -new_n13052_ = NAND ( new_n13051_, new_n13050_, new_n13049_, new_n12972_ ) -new_n13053_ = NOT ( new_n13052_ ) -new_n13054_ = NAND ( new_n13053_, new_n13048_ ) -new_n13055_ = OR ( new_n13040_, new_n13034_ ) -new_n13056_ = NAND ( new_n13055_, new_n13054_, new_n13043_ ) -new_n13057_ = OR ( new_n12914_, new_n4464_ ) -new_n13058_ = NAND ( new_n12936_, new_n4076_ ) -new_n13059_ = OR ( new_n12941_, new_n4448_ ) -new_n13060_ = NAND ( new_n13059_, new_n13058_, new_n13057_, new_n12972_ ) -new_n13061_ = OR ( new_n12945_, new_n4464_ ) -new_n13062_ = NAND ( new_n12950_, new_n4076_ ) -new_n13063_ = OR ( new_n12999_, new_n4448_ ) -new_n13064_ = NAND ( new_n3879_, new_n1833_ ) -new_n13065_ = NAND ( new_n13064_, new_n13063_, new_n13062_, new_n13061_ ) -new_n13066_ = NOT ( new_n13065_ ) -new_n13067_ = NAND ( new_n13066_, new_n13060_ ) -new_n13068_ = OR ( new_n13053_, new_n13048_ ) -new_n13069_ = NAND ( new_n13068_, new_n13067_, new_n13056_ ) -new_n13070_ = OR ( new_n12945_, new_n4744_ ) -new_n13071_ = NAND ( new_n12950_, new_n4489_ ) -new_n13072_ = OR ( new_n12999_, new_n4728_ ) -new_n13073_ = NAND ( new_n4076_, new_n1833_ ) -new_n13074_ = NAND ( new_n13073_, new_n13072_, new_n13071_, new_n13070_ ) -new_n13075_ = OR ( new_n12914_, new_n4744_ ) -new_n13076_ = NAND ( new_n12936_, new_n4489_ ) -new_n13077_ = OR ( new_n12941_, new_n4728_ ) -new_n13078_ = NAND ( new_n13077_, new_n13076_, new_n13075_, new_n12972_ ) -new_n13079_ = NOT ( new_n13078_ ) -new_n13080_ = NAND ( new_n13079_, new_n13074_ ) -new_n13081_ = OR ( new_n13066_, new_n13060_ ) -new_n13082_ = NAND ( new_n13081_, new_n13080_, new_n13069_ ) -new_n13083_ = OR ( new_n13079_, new_n13074_ ) -new_n13084_ = NAND ( new_n13083_, new_n13082_, new_n13004_ ) -new_n13085_ = OR ( new_n12945_, new_n5408_ ) -new_n13086_ = NAND ( new_n12950_, new_n5125_ ) -new_n13087_ = OR ( new_n12999_, new_n5392_ ) -new_n13088_ = NAND ( new_n4768_, new_n1833_ ) -new_n13089_ = NAND ( new_n13088_, new_n13087_, new_n13086_, new_n13085_ ) -new_n13090_ = OR ( new_n12914_, new_n5408_ ) -new_n13091_ = NAND ( new_n12936_, new_n5125_ ) -new_n13092_ = OR ( new_n12941_, new_n5392_ ) -new_n13093_ = NAND ( new_n13092_, new_n13091_, new_n13090_, new_n12972_ ) -new_n13094_ = NOT ( new_n13093_ ) -new_n13095_ = NAND ( new_n13094_, new_n13089_ ) -new_n13096_ = OR ( new_n13003_, new_n12996_ ) -new_n13097_ = NAND ( new_n13096_, new_n13095_, new_n13084_ ) -new_n13098_ = OR ( new_n12914_, new_n5858_ ) -new_n13099_ = NAND ( new_n12936_, new_n5434_ ) -new_n13100_ = OR ( new_n12941_, new_n5842_ ) -new_n13101_ = NAND ( new_n13100_, new_n13099_, new_n13098_, new_n12972_ ) -new_n13102_ = OR ( new_n12945_, new_n5858_ ) -new_n13103_ = NAND ( new_n12950_, new_n5434_ ) -new_n13104_ = OR ( new_n12999_, new_n5842_ ) -new_n13105_ = NAND ( new_n5125_, new_n1833_ ) -new_n13106_ = NAND ( new_n13105_, new_n13104_, new_n13103_, new_n13102_ ) -new_n13107_ = NOT ( new_n13106_ ) -new_n13108_ = NAND ( new_n13107_, new_n13101_ ) -new_n13109_ = OR ( new_n13094_, new_n13089_ ) -new_n13110_ = NAND ( new_n13109_, new_n13108_, new_n13097_ ) -new_n13111_ = OR ( new_n12945_, new_n6137_ ) -new_n13112_ = NAND ( new_n12950_, new_n5883_ ) -new_n13113_ = OR ( new_n12999_, new_n6121_ ) -new_n13114_ = NAND ( new_n5434_, new_n1833_ ) -new_n13115_ = NAND ( new_n13114_, new_n13113_, new_n13112_, new_n13111_ ) -new_n13116_ = OR ( new_n12914_, new_n6137_ ) -new_n13117_ = NAND ( new_n12936_, new_n5883_ ) -new_n13118_ = OR ( new_n12941_, new_n6121_ ) -new_n13119_ = NAND ( new_n13118_, new_n13117_, new_n13116_, new_n12972_ ) -new_n13120_ = NOT ( new_n13119_ ) -new_n13121_ = NAND ( new_n13120_, new_n13115_ ) -new_n13122_ = OR ( new_n13107_, new_n13101_ ) -new_n13123_ = NAND ( new_n13122_, new_n13121_, new_n13110_ ) -new_n13124_ = OR ( new_n13120_, new_n13115_ ) -new_n13125_ = NAND ( new_n13124_, new_n13123_, new_n12992_ ) -new_n13126_ = OR ( new_n12945_, new_n6800_ ) -new_n13127_ = NAND ( new_n12952_, new_n6785_ ) -new_n13128_ = NAND ( new_n12950_, new_n6513_ ) -new_n13129_ = NAND ( new_n6161_, new_n1833_ ) -new_n13130_ = NAND ( new_n13129_, new_n13128_, new_n13127_, new_n13126_ ) -new_n13131_ = OR ( new_n12914_, new_n6800_ ) -new_n13132_ = NAND ( new_n12942_, new_n6785_ ) -new_n13133_ = NAND ( new_n12936_, new_n6513_ ) -new_n13134_ = NAND ( new_n13133_, new_n13132_, new_n13131_, new_n12972_ ) -new_n13135_ = NOT ( new_n13134_ ) -new_n13136_ = NAND ( new_n13135_, new_n13130_ ) -new_n13137_ = OR ( new_n12991_, new_n12985_ ) -new_n13138_ = NAND ( new_n13137_, new_n13136_, new_n13125_ ) -new_n13139_ = OR ( new_n12914_, new_n7310_ ) -new_n13140_ = OR ( new_n12941_, new_n7294_ ) -new_n13141_ = NAND ( new_n12936_, new_n6826_ ) -new_n13142_ = NAND ( new_n13141_, new_n13140_, new_n13139_, new_n12972_ ) -new_n13143_ = OR ( new_n12945_, new_n7310_ ) -new_n13144_ = OR ( new_n12999_, new_n7294_ ) -new_n13145_ = NAND ( new_n12950_, new_n6826_ ) -new_n13146_ = NAND ( new_n6513_, new_n1833_ ) -new_n13147_ = NAND ( new_n13146_, new_n13145_, new_n13144_, new_n13143_ ) -new_n13148_ = NOT ( new_n13147_ ) -new_n13149_ = NAND ( new_n13148_, new_n13142_ ) -new_n13150_ = OR ( new_n13135_, new_n13130_ ) -new_n13151_ = NAND ( new_n13150_, new_n13149_, new_n13138_ ) -new_n13152_ = OR ( new_n12945_, new_n7576_ ) -new_n13153_ = OR ( new_n12999_, new_n7559_ ) -new_n13154_ = NAND ( new_n12950_, new_n7333_ ) -new_n13155_ = NAND ( new_n6826_, new_n1833_ ) -new_n13156_ = NAND ( new_n13155_, new_n13154_, new_n13153_, new_n13152_ ) -new_n13157_ = OR ( new_n12914_, new_n7576_ ) -new_n13158_ = OR ( new_n12941_, new_n7559_ ) -new_n13159_ = NAND ( new_n12936_, new_n7333_ ) -new_n13160_ = NAND ( new_n13159_, new_n13158_, new_n13157_, new_n12972_ ) -new_n13161_ = NOT ( new_n13160_ ) -new_n13162_ = NAND ( new_n13161_, new_n13156_ ) -new_n13163_ = OR ( new_n13148_, new_n13142_ ) -new_n13164_ = NAND ( new_n13163_, new_n13162_, new_n13151_ ) -new_n13165_ = OR ( new_n13161_, new_n13156_ ) -new_n13166_ = NAND ( new_n13165_, new_n13164_, new_n12981_ ) -new_n13167_ = OR ( new_n12945_, new_n8225_ ) -new_n13168_ = NAND ( new_n12952_, new_n8209_ ) -new_n13169_ = NAND ( new_n12950_, new_n8015_ ) -new_n13170_ = NAND ( new_n7599_, new_n1833_ ) -new_n13171_ = NAND ( new_n13170_, new_n13169_, new_n13168_, new_n13167_ ) -new_n13172_ = OR ( new_n12914_, new_n8225_ ) -new_n13173_ = NAND ( new_n12942_, new_n8209_ ) -new_n13174_ = NAND ( new_n12936_, new_n8015_ ) -new_n13175_ = NAND ( new_n13174_, new_n13173_, new_n13172_, new_n12972_ ) -new_n13176_ = NOT ( new_n13175_ ) -new_n13177_ = NAND ( new_n13176_, new_n13171_ ) -new_n13178_ = OR ( new_n12980_, new_n12974_ ) -new_n13179_ = NAND ( new_n13178_, new_n13177_, new_n13166_ ) -new_n13180_ = OR ( new_n12914_, new_n8568_ ) -new_n13181_ = OR ( new_n12941_, new_n8551_ ) -new_n13182_ = NAND ( new_n12936_, new_n8247_ ) -new_n13183_ = NAND ( new_n13182_, new_n13181_, new_n13180_, new_n12972_ ) -new_n13184_ = OR ( new_n12945_, new_n8568_ ) -new_n13185_ = OR ( new_n12999_, new_n8551_ ) -new_n13186_ = NAND ( new_n12950_, new_n8247_ ) -new_n13187_ = NAND ( new_n8015_, new_n1833_ ) -new_n13188_ = NAND ( new_n13187_, new_n13186_, new_n13185_, new_n13184_ ) -new_n13189_ = NOT ( new_n13188_ ) -new_n13190_ = NAND ( new_n13189_, new_n13183_ ) -new_n13191_ = OR ( new_n13176_, new_n13171_ ) -new_n13192_ = NAND ( new_n13191_, new_n13190_, new_n13179_ ) -new_n13193_ = OR ( new_n12945_, new_n8890_ ) -new_n13194_ = OR ( new_n12999_, new_n8873_ ) -new_n13195_ = NAND ( new_n12950_, new_n8588_ ) -new_n13196_ = NAND ( new_n8247_, new_n1833_ ) -new_n13197_ = NAND ( new_n13196_, new_n13195_, new_n13194_, new_n13193_ ) -new_n13198_ = OR ( new_n12914_, new_n8890_ ) -new_n13199_ = OR ( new_n12941_, new_n8873_ ) -new_n13200_ = NAND ( new_n12936_, new_n8588_ ) -new_n13201_ = NAND ( new_n13200_, new_n13199_, new_n13198_, new_n12972_ ) -new_n13202_ = NOT ( new_n13201_ ) -new_n13203_ = NAND ( new_n13202_, new_n13197_ ) -new_n13204_ = OR ( new_n13189_, new_n13183_ ) -new_n13205_ = NAND ( new_n13204_, new_n13203_, new_n13192_ ) -new_n13206_ = OR ( new_n12914_, new_n9179_ ) -new_n13207_ = OR ( new_n12941_, new_n9162_ ) -new_n13208_ = NAND ( new_n12936_, new_n8913_ ) -new_n13209_ = NAND ( new_n13208_, new_n13207_, new_n13206_, new_n12972_ ) -new_n13210_ = OR ( new_n12945_, new_n9179_ ) -new_n13211_ = OR ( new_n12999_, new_n9162_ ) -new_n13212_ = NAND ( new_n12950_, new_n8913_ ) -new_n13213_ = NAND ( new_n8588_, new_n1833_ ) -new_n13214_ = NAND ( new_n13213_, new_n13212_, new_n13211_, new_n13210_ ) -new_n13215_ = NOT ( new_n13214_ ) -new_n13216_ = NAND ( new_n13215_, new_n13209_ ) -new_n13217_ = OR ( new_n13202_, new_n13197_ ) -new_n13218_ = NAND ( new_n13217_, new_n13216_, new_n13205_ ) -new_n13219_ = OR ( new_n12945_, new_n9462_ ) -new_n13220_ = OR ( new_n12999_, new_n9444_ ) -new_n13221_ = NAND ( new_n12950_, new_n9199_ ) -new_n13222_ = NAND ( new_n8913_, new_n1833_ ) -new_n13223_ = NAND ( new_n13222_, new_n13221_, new_n13220_, new_n13219_ ) -new_n13224_ = OR ( new_n12914_, new_n9462_ ) -new_n13225_ = OR ( new_n12941_, new_n9444_ ) -new_n13226_ = NAND ( new_n12936_, new_n9199_ ) -new_n13227_ = NAND ( new_n13226_, new_n13225_, new_n13224_, new_n12972_ ) -new_n13228_ = NOT ( new_n13227_ ) -new_n13229_ = NAND ( new_n13228_, new_n13223_ ) -new_n13230_ = OR ( new_n13215_, new_n13209_ ) -new_n13231_ = NAND ( new_n13230_, new_n13229_, new_n13218_ ) -new_n13232_ = OR ( new_n12914_, new_n9712_ ) -new_n13233_ = NAND ( new_n12942_, new_n9699_ ) -new_n13234_ = NAND ( new_n12936_, new_n9483_ ) -new_n13235_ = NAND ( new_n13234_, new_n13233_, new_n13232_, new_n12972_ ) -new_n13236_ = OR ( new_n12945_, new_n9712_ ) -new_n13237_ = NAND ( new_n12952_, new_n9699_ ) -new_n13238_ = NAND ( new_n12950_, new_n9483_ ) -new_n13239_ = NAND ( new_n9199_, new_n1833_ ) -new_n13240_ = NAND ( new_n13239_, new_n13238_, new_n13237_, new_n13236_ ) -new_n13241_ = NOT ( new_n13240_ ) -new_n13242_ = NAND ( new_n13241_, new_n13235_ ) -new_n13243_ = OR ( new_n13228_, new_n13223_ ) -new_n13244_ = NAND ( new_n13243_, new_n13242_, new_n13231_ ) -new_n13245_ = OR ( new_n12945_, new_n9950_ ) -new_n13246_ = NAND ( new_n12952_, new_n9937_ ) -new_n13247_ = NAND ( new_n12950_, new_n9731_ ) -new_n13248_ = NAND ( new_n9483_, new_n1833_ ) -new_n13249_ = NAND ( new_n13248_, new_n13247_, new_n13246_, new_n13245_ ) -new_n13250_ = OR ( new_n12914_, new_n9950_ ) -new_n13251_ = NAND ( new_n12942_, new_n9937_ ) -new_n13252_ = NAND ( new_n12936_, new_n9731_ ) -new_n13253_ = NAND ( new_n13252_, new_n13251_, new_n13250_, new_n12972_ ) -new_n13254_ = NOT ( new_n13253_ ) -new_n13255_ = NAND ( new_n13254_, new_n13249_ ) -new_n13256_ = OR ( new_n13241_, new_n13235_ ) -new_n13257_ = NAND ( new_n13256_, new_n13255_, new_n13244_ ) -new_n13258_ = OR ( new_n12914_, new_n10138_ ) -new_n13259_ = NAND ( new_n12942_, new_n10125_ ) -new_n13260_ = NAND ( new_n12936_, new_n9970_ ) -new_n13261_ = NAND ( new_n13260_, new_n13259_, new_n13258_, new_n12972_ ) -new_n13262_ = OR ( new_n12945_, new_n10138_ ) -new_n13263_ = NAND ( new_n12952_, new_n10125_ ) -new_n13264_ = NAND ( new_n12950_, new_n9970_ ) -new_n13265_ = NAND ( new_n9731_, new_n1833_ ) -new_n13266_ = NAND ( new_n13265_, new_n13264_, new_n13263_, new_n13262_ ) -new_n13267_ = NOT ( new_n13266_ ) -new_n13268_ = NAND ( new_n13267_, new_n13261_ ) -new_n13269_ = OR ( new_n13254_, new_n13249_ ) -new_n13270_ = NAND ( new_n13269_, new_n13268_, new_n13257_ ) -new_n13271_ = OR ( new_n12945_, new_n10323_ ) -new_n13272_ = NAND ( new_n12952_, new_n10310_ ) -new_n13273_ = NAND ( new_n12950_, new_n10156_ ) -new_n13274_ = NAND ( new_n9970_, new_n1833_ ) -new_n13275_ = NAND ( new_n13274_, new_n13273_, new_n13272_, new_n13271_ ) -new_n13276_ = OR ( new_n12914_, new_n10323_ ) -new_n13277_ = NAND ( new_n12942_, new_n10310_ ) -new_n13278_ = NAND ( new_n12936_, new_n10156_ ) -new_n13279_ = NAND ( new_n13278_, new_n13277_, new_n13276_, new_n12972_ ) -new_n13280_ = NOT ( new_n13279_ ) -new_n13281_ = NAND ( new_n13280_, new_n13275_ ) -new_n13282_ = OR ( new_n13267_, new_n13261_ ) -new_n13283_ = NAND ( new_n13282_, new_n13281_, new_n13270_ ) -new_n13284_ = OR ( new_n12914_, new_n10513_ ) -new_n13285_ = NAND ( new_n12942_, new_n10500_ ) -new_n13286_ = NAND ( new_n12936_, new_n10344_ ) -new_n13287_ = NAND ( new_n13286_, new_n13285_, new_n13284_, new_n12972_ ) -new_n13288_ = OR ( new_n12945_, new_n10513_ ) -new_n13289_ = NAND ( new_n12952_, new_n10500_ ) -new_n13290_ = NAND ( new_n12950_, new_n10344_ ) -new_n13291_ = NAND ( new_n10156_, new_n1833_ ) -new_n13292_ = NAND ( new_n13291_, new_n13290_, new_n13289_, new_n13288_ ) -new_n13293_ = NOT ( new_n13292_ ) -new_n13294_ = NAND ( new_n13293_, new_n13287_ ) -new_n13295_ = OR ( new_n13280_, new_n13275_ ) -new_n13296_ = NAND ( new_n13295_, new_n13294_, new_n13283_ ) -new_n13297_ = OR ( new_n12945_, new_n10699_ ) -new_n13298_ = NAND ( new_n12952_, new_n10686_ ) -new_n13299_ = NAND ( new_n12950_, new_n10531_ ) -new_n13300_ = NAND ( new_n10344_, new_n1833_ ) -new_n13301_ = NAND ( new_n13300_, new_n13299_, new_n13298_, new_n13297_ ) -new_n13302_ = OR ( new_n12914_, new_n10699_ ) -new_n13303_ = NAND ( new_n12942_, new_n10686_ ) -new_n13304_ = NAND ( new_n12936_, new_n10531_ ) -new_n13305_ = NAND ( new_n13304_, new_n13303_, new_n13302_, new_n12972_ ) -new_n13306_ = NOT ( new_n13305_ ) -new_n13307_ = NAND ( new_n13306_, new_n13301_ ) -new_n13308_ = OR ( new_n13293_, new_n13287_ ) -new_n13309_ = NAND ( new_n13308_, new_n13307_, new_n13296_ ) -new_n13310_ = OR ( new_n12914_, new_n10890_ ) -new_n13311_ = NAND ( new_n12942_, new_n10877_ ) -new_n13312_ = NAND ( new_n12936_, new_n10720_ ) -new_n13313_ = NAND ( new_n13312_, new_n13311_, new_n13310_, new_n12972_ ) -new_n13314_ = OR ( new_n12945_, new_n10890_ ) -new_n13315_ = NAND ( new_n12952_, new_n10877_ ) -new_n13316_ = NAND ( new_n12950_, new_n10720_ ) -new_n13317_ = NAND ( new_n10531_, new_n1833_ ) -new_n13318_ = NAND ( new_n13317_, new_n13316_, new_n13315_, new_n13314_ ) -new_n13319_ = NOT ( new_n13318_ ) -new_n13320_ = NAND ( new_n13319_, new_n13313_ ) -new_n13321_ = OR ( new_n13306_, new_n13301_ ) -new_n13322_ = NAND ( new_n13321_, new_n13320_, new_n13309_ ) -new_n13323_ = OR ( new_n12945_, new_n11079_ ) -new_n13324_ = NAND ( new_n12952_, new_n11066_ ) -new_n13325_ = NAND ( new_n12950_, new_n10910_ ) -new_n13326_ = NAND ( new_n10720_, new_n1833_ ) -new_n13327_ = NAND ( new_n13326_, new_n13325_, new_n13324_, new_n13323_ ) -new_n13328_ = OR ( new_n12914_, new_n11079_ ) -new_n13329_ = NAND ( new_n12942_, new_n11066_ ) -new_n13330_ = NAND ( new_n12936_, new_n10910_ ) -new_n13331_ = NAND ( new_n13330_, new_n13329_, new_n13328_, new_n12972_ ) -new_n13332_ = NOT ( new_n13331_ ) -new_n13333_ = NAND ( new_n13332_, new_n13327_ ) -new_n13334_ = OR ( new_n13319_, new_n13313_ ) -new_n13335_ = NAND ( new_n13334_, new_n13333_, new_n13322_ ) -new_n13336_ = OR ( new_n12914_, new_n11259_ ) -new_n13337_ = NAND ( new_n12942_, new_n11246_ ) -new_n13338_ = NAND ( new_n12936_, new_n11096_ ) -new_n13339_ = NAND ( new_n13338_, new_n13337_, new_n13336_, new_n12972_ ) -new_n13340_ = OR ( new_n12945_, new_n11259_ ) -new_n13341_ = NAND ( new_n12952_, new_n11246_ ) -new_n13342_ = NAND ( new_n12950_, new_n11096_ ) -new_n13343_ = NAND ( new_n10910_, new_n1833_ ) -new_n13344_ = NAND ( new_n13343_, new_n13342_, new_n13341_, new_n13340_ ) -new_n13345_ = NOT ( new_n13344_ ) -new_n13346_ = NAND ( new_n13345_, new_n13339_ ) -new_n13347_ = OR ( new_n13332_, new_n13327_ ) -new_n13348_ = NAND ( new_n13347_, new_n13346_, new_n13335_ ) -new_n13349_ = OR ( new_n12945_, new_n11506_ ) -new_n13350_ = NAND ( new_n12952_, new_n11336_ ) -new_n13351_ = NAND ( new_n12950_, new_n11275_ ) -new_n13352_ = NAND ( new_n11096_, new_n1833_ ) -new_n13353_ = NAND ( new_n13352_, new_n13351_, new_n13350_, new_n13349_ ) -new_n13354_ = OR ( new_n12914_, new_n11506_ ) -new_n13355_ = NAND ( new_n12942_, new_n11336_ ) -new_n13356_ = NAND ( new_n12936_, new_n11275_ ) -new_n13357_ = NAND ( new_n13356_, new_n13355_, new_n13354_, new_n12972_ ) -new_n13358_ = NOT ( new_n13357_ ) -new_n13359_ = NAND ( new_n13358_, new_n13353_ ) -new_n13360_ = OR ( new_n13345_, new_n13339_ ) -new_n13361_ = NAND ( new_n13360_, new_n13359_, new_n13348_ ) -new_n13362_ = OR ( new_n13358_, new_n13353_ ) -new_n13363_ = NAND ( new_n13362_, new_n13361_, new_n12969_ ) -new_n13364_ = OR ( new_n12968_, new_n12964_ ) -new_n13365_ = NAND ( new_n13364_, new_n13363_, new_n12956_, new_n12955_ ) -new_n13366_ = NAND ( new_n12943_, new_n12937_, new_n12931_ ) -new_n13367_ = NAND ( new_n12954_, new_n13366_ ) -new_n13368_ = NAND ( new_n13366_, new_n2024_ ) -new_n13369_ = NOT ( new_n2024_ ) -new_n13370_ = NAND ( new_n12954_, new_n13369_ ) -new_n13371_ = NAND ( new_n13370_, new_n13368_ ) -new_n13372_ = NAND ( new_n13371_, new_n13367_ ) -new_n13373_ = AND ( new_n13372_, new_n13365_ ) -new_n13374_ = NAND ( new_n13373_, new_n2849_ ) -new_n13375_ = NAND ( new_n13372_, new_n13365_ ) -new_n13376_ = NAND ( new_n13375_, new_n2001_ ) -new_n13377_ = NAND ( new_n13376_, new_n13374_ ) -new_n13378_ = NAND ( new_n13377_, new_n2828_ ) -new_n13379_ = NAND ( new_n13375_, new_n1903_ ) -new_n13380_ = OR ( new_n13375_, new_n1982_ ) -new_n13381_ = NAND ( new_n13380_, new_n13379_, new_n13378_, new_n1929_ ) -new_n13382_ = OR ( new_n13375_, new_n3864_ ) -new_n13383_ = NAND ( new_n13375_, new_n2861_ ) -new_n13384_ = NAND ( new_n13383_, new_n13382_ ) -new_n13385_ = OR ( new_n13384_, new_n3881_ ) -new_n13386_ = OR ( new_n13377_, new_n2828_ ) -new_n13387_ = NAND ( new_n13386_, new_n13385_, new_n13381_ ) -new_n13388_ = OR ( new_n13375_, new_n4061_ ) -new_n13389_ = NAND ( new_n13375_, new_n3879_ ) -new_n13390_ = NAND ( new_n13389_, new_n13388_ ) -new_n13391_ = NAND ( new_n13390_, new_n4036_ ) -new_n13392_ = NAND ( new_n13384_, new_n3881_ ) -new_n13393_ = NAND ( new_n13392_, new_n13391_, new_n13387_ ) -new_n13394_ = OR ( new_n13375_, new_n4473_ ) -new_n13395_ = NAND ( new_n13375_, new_n4076_ ) -new_n13396_ = NAND ( new_n13395_, new_n13394_ ) -new_n13397_ = OR ( new_n13396_, new_n4448_ ) -new_n13398_ = OR ( new_n13390_, new_n4036_ ) -new_n13399_ = NAND ( new_n13398_, new_n13397_, new_n13393_ ) -new_n13400_ = OR ( new_n13375_, new_n4753_ ) -new_n13401_ = NAND ( new_n13375_, new_n4489_ ) -new_n13402_ = NAND ( new_n13401_, new_n13400_ ) -new_n13403_ = NAND ( new_n13402_, new_n4728_ ) -new_n13404_ = NAND ( new_n13396_, new_n4448_ ) -new_n13405_ = NAND ( new_n13404_, new_n13403_, new_n13399_ ) -new_n13406_ = OR ( new_n13375_, new_n5111_ ) -new_n13407_ = NAND ( new_n13375_, new_n4768_ ) -new_n13408_ = NAND ( new_n13407_, new_n13406_ ) -new_n13409_ = OR ( new_n13408_, new_n5084_ ) -new_n13410_ = OR ( new_n13402_, new_n4728_ ) -new_n13411_ = NAND ( new_n13410_, new_n13409_, new_n13405_ ) -new_n13412_ = OR ( new_n13375_, new_n5417_ ) -new_n13413_ = NAND ( new_n13375_, new_n5125_ ) -new_n13414_ = NAND ( new_n13413_, new_n13412_ ) -new_n13415_ = NAND ( new_n13414_, new_n5392_ ) -new_n13416_ = NAND ( new_n13408_, new_n5084_ ) -new_n13417_ = NAND ( new_n13416_, new_n13415_, new_n13411_ ) -new_n13418_ = OR ( new_n13375_, new_n5867_ ) -new_n13419_ = NAND ( new_n13375_, new_n5434_ ) -new_n13420_ = NAND ( new_n13419_, new_n13418_ ) -new_n13421_ = OR ( new_n13420_, new_n5842_ ) -new_n13422_ = OR ( new_n13414_, new_n5392_ ) -new_n13423_ = NAND ( new_n13422_, new_n13421_, new_n13417_ ) -new_n13424_ = OR ( new_n13375_, new_n6146_ ) -new_n13425_ = NAND ( new_n13375_, new_n5883_ ) -new_n13426_ = NAND ( new_n13425_, new_n13424_ ) -new_n13427_ = NAND ( new_n13426_, new_n6121_ ) -new_n13428_ = NAND ( new_n13420_, new_n5842_ ) -new_n13429_ = NAND ( new_n13428_, new_n13427_, new_n13423_ ) -new_n13430_ = OR ( new_n13375_, new_n6500_ ) -new_n13431_ = NAND ( new_n13375_, new_n6161_ ) -new_n13432_ = NAND ( new_n13431_, new_n13430_ ) -new_n13433_ = OR ( new_n13432_, new_n6515_ ) -new_n13434_ = OR ( new_n13426_, new_n6121_ ) -new_n13435_ = NAND ( new_n13434_, new_n13433_, new_n13429_ ) -new_n13436_ = NOT ( new_n6785_ ) -new_n13437_ = OR ( new_n13375_, new_n6809_ ) -new_n13438_ = NAND ( new_n13375_, new_n6513_ ) -new_n13439_ = NAND ( new_n13438_, new_n13437_ ) -new_n13440_ = NAND ( new_n13439_, new_n13436_ ) -new_n13441_ = NAND ( new_n13432_, new_n6515_ ) -new_n13442_ = NAND ( new_n13441_, new_n13440_, new_n13435_ ) -new_n13443_ = OR ( new_n13375_, new_n7319_ ) -new_n13444_ = NAND ( new_n13375_, new_n6826_ ) -new_n13445_ = NAND ( new_n13444_, new_n13443_ ) -new_n13446_ = OR ( new_n13445_, new_n7294_ ) -new_n13447_ = OR ( new_n13439_, new_n13436_ ) -new_n13448_ = NAND ( new_n13447_, new_n13446_, new_n13442_ ) -new_n13449_ = OR ( new_n13375_, new_n7585_ ) -new_n13450_ = NAND ( new_n13375_, new_n7333_ ) -new_n13451_ = NAND ( new_n13450_, new_n13449_ ) -new_n13452_ = NAND ( new_n13451_, new_n7559_ ) -new_n13453_ = NAND ( new_n13445_, new_n7294_ ) -new_n13454_ = NAND ( new_n13453_, new_n13452_, new_n13448_ ) -new_n13455_ = NOT ( new_n7977_ ) -new_n13456_ = OR ( new_n13375_, new_n8004_ ) -new_n13457_ = NAND ( new_n13375_, new_n7599_ ) -new_n13458_ = NAND ( new_n13457_, new_n13456_ ) -new_n13459_ = OR ( new_n13458_, new_n13455_ ) -new_n13460_ = OR ( new_n13451_, new_n7559_ ) -new_n13461_ = NAND ( new_n13460_, new_n13459_, new_n13454_ ) -new_n13462_ = NOT ( new_n8209_ ) -new_n13463_ = OR ( new_n13375_, new_n8234_ ) -new_n13464_ = NAND ( new_n13375_, new_n8015_ ) -new_n13465_ = NAND ( new_n13464_, new_n13463_ ) -new_n13466_ = NAND ( new_n13465_, new_n13462_ ) -new_n13467_ = NAND ( new_n13458_, new_n13455_ ) -new_n13468_ = NAND ( new_n13467_, new_n13466_, new_n13461_ ) -new_n13469_ = OR ( new_n13375_, new_n8577_ ) -new_n13470_ = NAND ( new_n13375_, new_n8247_ ) -new_n13471_ = NAND ( new_n13470_, new_n13469_ ) -new_n13472_ = OR ( new_n13471_, new_n8551_ ) -new_n13473_ = OR ( new_n13465_, new_n13462_ ) -new_n13474_ = NAND ( new_n13473_, new_n13472_, new_n13468_ ) -new_n13475_ = OR ( new_n13375_, new_n8899_ ) -new_n13476_ = NAND ( new_n13375_, new_n8588_ ) -new_n13477_ = NAND ( new_n13476_, new_n13475_ ) -new_n13478_ = NAND ( new_n13477_, new_n8873_ ) -new_n13479_ = NAND ( new_n13471_, new_n8551_ ) -new_n13480_ = NAND ( new_n13479_, new_n13478_, new_n13474_ ) -new_n13481_ = OR ( new_n13375_, new_n9188_ ) -new_n13482_ = NAND ( new_n13375_, new_n8913_ ) -new_n13483_ = NAND ( new_n13482_, new_n13481_ ) -new_n13484_ = OR ( new_n13483_, new_n9162_ ) -new_n13485_ = OR ( new_n13477_, new_n8873_ ) -new_n13486_ = NAND ( new_n13485_, new_n13484_, new_n13480_ ) -new_n13487_ = OR ( new_n13375_, new_n9471_ ) -new_n13488_ = NAND ( new_n13375_, new_n9199_ ) -new_n13489_ = NAND ( new_n13488_, new_n13487_ ) -new_n13490_ = NAND ( new_n13489_, new_n9444_ ) -new_n13491_ = NAND ( new_n13483_, new_n9162_ ) -new_n13492_ = NAND ( new_n13491_, new_n13490_, new_n13486_ ) -new_n13493_ = NOT ( new_n9699_ ) -new_n13494_ = OR ( new_n13375_, new_n9722_ ) -new_n13495_ = NAND ( new_n13375_, new_n9483_ ) -new_n13496_ = NAND ( new_n13495_, new_n13494_ ) -new_n13497_ = OR ( new_n13496_, new_n13493_ ) -new_n13498_ = OR ( new_n13489_, new_n9444_ ) -new_n13499_ = NAND ( new_n13498_, new_n13497_, new_n13492_ ) -new_n13500_ = NOT ( new_n9937_ ) -new_n13501_ = OR ( new_n13375_, new_n9959_ ) -new_n13502_ = NAND ( new_n13375_, new_n9731_ ) -new_n13503_ = NAND ( new_n13502_, new_n13501_ ) -new_n13504_ = NAND ( new_n13503_, new_n13500_ ) -new_n13505_ = NAND ( new_n13496_, new_n13493_ ) -new_n13506_ = NAND ( new_n13505_, new_n13504_, new_n13499_ ) -new_n13507_ = NOT ( new_n10125_ ) -new_n13508_ = OR ( new_n13375_, new_n10147_ ) -new_n13509_ = NAND ( new_n13375_, new_n9970_ ) -new_n13510_ = NAND ( new_n13509_, new_n13508_ ) -new_n13511_ = OR ( new_n13510_, new_n13507_ ) -new_n13512_ = OR ( new_n13503_, new_n13500_ ) -new_n13513_ = NAND ( new_n13512_, new_n13511_, new_n13506_ ) -new_n13514_ = NOT ( new_n10310_ ) -new_n13515_ = OR ( new_n13375_, new_n10332_ ) -new_n13516_ = NAND ( new_n13375_, new_n10156_ ) -new_n13517_ = NAND ( new_n13516_, new_n13515_ ) -new_n13518_ = NAND ( new_n13517_, new_n13514_ ) -new_n13519_ = NAND ( new_n13510_, new_n13507_ ) -new_n13520_ = NAND ( new_n13519_, new_n13518_, new_n13513_ ) -new_n13521_ = NOT ( new_n10500_ ) -new_n13522_ = OR ( new_n13375_, new_n10522_ ) -new_n13523_ = NAND ( new_n13375_, new_n10344_ ) -new_n13524_ = NAND ( new_n13523_, new_n13522_ ) -new_n13525_ = OR ( new_n13524_, new_n13521_ ) -new_n13526_ = OR ( new_n13517_, new_n13514_ ) -new_n13527_ = NAND ( new_n13526_, new_n13525_, new_n13520_ ) -new_n13528_ = NOT ( new_n10686_ ) -new_n13529_ = OR ( new_n13375_, new_n10708_ ) -new_n13530_ = NAND ( new_n13375_, new_n10531_ ) -new_n13531_ = NAND ( new_n13530_, new_n13529_ ) -new_n13532_ = NAND ( new_n13531_, new_n13528_ ) -new_n13533_ = NAND ( new_n13524_, new_n13521_ ) -new_n13534_ = NAND ( new_n13533_, new_n13532_, new_n13527_ ) -new_n13535_ = NOT ( new_n10877_ ) -new_n13536_ = OR ( new_n13375_, new_n10899_ ) -new_n13537_ = NAND ( new_n13375_, new_n10720_ ) -new_n13538_ = NAND ( new_n13537_, new_n13536_ ) -new_n13539_ = OR ( new_n13538_, new_n13535_ ) -new_n13540_ = OR ( new_n13531_, new_n13528_ ) -new_n13541_ = NAND ( new_n13540_, new_n13539_, new_n13534_ ) -new_n13542_ = NOT ( new_n11066_ ) -new_n13543_ = OR ( new_n13375_, new_n11088_ ) -new_n13544_ = NAND ( new_n13375_, new_n10910_ ) -new_n13545_ = NAND ( new_n13544_, new_n13543_ ) -new_n13546_ = NAND ( new_n13545_, new_n13542_ ) -new_n13547_ = NAND ( new_n13538_, new_n13535_ ) -new_n13548_ = NAND ( new_n13547_, new_n13546_, new_n13541_ ) -new_n13549_ = NOT ( new_n11246_ ) -new_n13550_ = OR ( new_n13375_, new_n11268_ ) -new_n13551_ = NAND ( new_n13375_, new_n11096_ ) -new_n13552_ = NAND ( new_n13551_, new_n13550_ ) -new_n13553_ = OR ( new_n13552_, new_n13549_ ) -new_n13554_ = OR ( new_n13545_, new_n13542_ ) -new_n13555_ = NAND ( new_n13554_, new_n13553_, new_n13548_ ) -new_n13556_ = NOT ( new_n11336_ ) -new_n13557_ = NAND ( new_n13373_, new_n11509_ ) -new_n13558_ = NAND ( new_n13375_, new_n11275_ ) -new_n13559_ = NAND ( new_n13558_, new_n13557_ ) -new_n13560_ = NAND ( new_n13559_, new_n13556_ ) -new_n13561_ = NAND ( new_n13552_, new_n13549_ ) -new_n13562_ = NAND ( new_n13561_, new_n13560_, new_n13555_ ) -new_n13563_ = NOT ( new_n11354_ ) -new_n13564_ = OR ( new_n13375_, new_n11360_ ) -new_n13565_ = NAND ( new_n13375_, new_n11351_ ) -new_n13566_ = NAND ( new_n13565_, new_n13564_ ) -new_n13567_ = OR ( new_n13566_, new_n13563_ ) -new_n13568_ = OR ( new_n13559_, new_n13556_ ) -new_n13569_ = NAND ( new_n13568_, new_n13567_, new_n13562_ ) -new_n13570_ = NOT ( new_n11525_ ) -new_n13571_ = OR ( new_n13375_, new_n11534_ ) -new_n13572_ = NAND ( new_n13375_, new_n11365_ ) -new_n13573_ = NAND ( new_n13572_, new_n13571_ ) -new_n13574_ = OR ( new_n13573_, new_n13570_ ) -new_n13575_ = NAND ( new_n13566_, new_n13563_ ) -new_n13576_ = NAND ( new_n13575_, new_n13574_, new_n13569_ ) -new_n13577_ = NAND ( new_n13573_, new_n13570_ ) -new_n13578_ = AND ( new_n1841_, new_n1755_, new_n1747_, new_n1728_ ) -new_n13579_ = NAND ( new_n13578_, new_n13577_, new_n13576_ ) -new_n13580_ = NAND ( new_n1970_, new_n1841_ ) -new_n13581_ = OR ( new_n13580_, new_n13373_ ) -new_n13582_ = NAND ( new_n1841_, new_n1747_, new_n1717_ ) -new_n13583_ = NAND ( new_n13582_, new_n13373_ ) -new_n13584_ = NOT ( new_n9755_ ) -new_n13585_ = NAND ( new_n13375_, new_n13584_ ) -new_n13586_ = NAND ( new_n13585_, new_n13583_ ) -new_n13587_ = NAND ( new_n13586_, new_n1726_ ) -new_n13588_ = OR ( new_n13375_, new_n13584_ ) -new_n13589_ = NAND ( new_n13588_, new_n1725_ ) -new_n13590_ = NAND ( new_n13589_, new_n13587_ ) -new_n13591_ = NAND ( new_n13590_, new_n13581_ ) -new_n13592_ = NAND ( new_n13591_, new_n1744_ ) -new_n13593_ = NAND ( new_n11354_, new_n12910_ ) -new_n13594_ = OR ( new_n11354_, new_n12910_ ) -new_n13595_ = NOT ( new_n11275_ ) -new_n13596_ = NAND ( new_n11336_, new_n13595_ ) -new_n13597_ = NOR ( new_n11336_, new_n13595_ ) -new_n13598_ = OR ( new_n13542_, new_n10910_ ) -new_n13599_ = NAND ( new_n13542_, new_n10910_ ) -new_n13600_ = NOT ( new_n10720_ ) -new_n13601_ = NAND ( new_n10877_, new_n13600_ ) -new_n13602_ = NOR ( new_n10877_, new_n13600_ ) -new_n13603_ = OR ( new_n13528_, new_n10531_ ) -new_n13604_ = NAND ( new_n13528_, new_n10531_ ) -new_n13605_ = NOT ( new_n10344_ ) -new_n13606_ = NAND ( new_n10500_, new_n13605_ ) -new_n13607_ = NOR ( new_n10500_, new_n13605_ ) -new_n13608_ = OR ( new_n13514_, new_n10156_ ) -new_n13609_ = NAND ( new_n13514_, new_n10156_ ) -new_n13610_ = NOT ( new_n9970_ ) -new_n13611_ = NAND ( new_n10125_, new_n13610_ ) -new_n13612_ = NOR ( new_n10125_, new_n13610_ ) -new_n13613_ = OR ( new_n13500_, new_n9731_ ) -new_n13614_ = NAND ( new_n13500_, new_n9731_ ) -new_n13615_ = AND ( new_n9444_, new_n9199_ ) -new_n13616_ = NOR ( new_n9444_, new_n9199_ ) -new_n13617_ = AND ( new_n9162_, new_n8913_ ) -new_n13618_ = OR ( new_n9162_, new_n8913_ ) -new_n13619_ = NAND ( new_n8873_, new_n8588_ ) -new_n13620_ = OR ( new_n8873_, new_n8588_ ) -new_n13621_ = NOR ( new_n8209_, new_n8382_ ) -new_n13622_ = NAND ( new_n8209_, new_n8382_ ) -new_n13623_ = NAND ( new_n13455_, new_n7599_ ) -new_n13624_ = OR ( new_n13455_, new_n7599_ ) -new_n13625_ = NOR ( new_n7560_, new_n8380_ ) -new_n13626_ = OR ( new_n7559_, new_n7333_ ) -new_n13627_ = NAND ( new_n7294_, new_n6826_ ) -new_n13628_ = OR ( new_n7294_, new_n6826_ ) -new_n13629_ = XNOR ( new_n6785_, new_n6513_ ) -new_n13630_ = NAND ( new_n13629_, new_n13628_, new_n13627_, new_n13626_ ) -new_n13631_ = NOR ( new_n13630_, new_n13625_ ) -new_n13632_ = NAND ( new_n13631_, new_n13624_, new_n13623_, new_n13622_ ) -new_n13633_ = XNOR ( new_n8551_, new_n8247_ ) -new_n13634_ = NOR ( new_n13633_, new_n13632_, new_n13621_ ) -new_n13635_ = NAND ( new_n13634_, new_n13620_, new_n13619_, new_n13618_ ) -new_n13636_ = NOR ( new_n13635_, new_n13617_, new_n13616_, new_n13615_ ) -new_n13637_ = XNOR ( new_n9699_, new_n9483_ ) -new_n13638_ = NAND ( new_n13637_, new_n13636_, new_n13614_, new_n13613_ ) -new_n13639_ = NOR ( new_n13638_, new_n13612_ ) -new_n13640_ = NAND ( new_n13639_, new_n13611_, new_n13609_, new_n13608_ ) -new_n13641_ = NOR ( new_n13640_, new_n13607_ ) -new_n13642_ = NAND ( new_n13641_, new_n13606_, new_n13604_, new_n13603_ ) -new_n13643_ = NOR ( new_n13642_, new_n13602_ ) -new_n13644_ = NAND ( new_n13643_, new_n13601_, new_n13599_, new_n13598_ ) -new_n13645_ = XOR ( new_n11246_, new_n11096_ ) -new_n13646_ = NOR ( new_n13645_, new_n13644_, new_n13597_ ) -new_n13647_ = NAND ( new_n13646_, new_n13596_, new_n13594_, new_n13593_ ) -new_n13648_ = XOR ( new_n11525_, new_n11365_ ) -new_n13649_ = OR ( new_n13648_, new_n13647_ ) -new_n13650_ = XNOR ( new_n1984_, new_n1903_ ) -new_n13651_ = AND ( new_n6515_, new_n6161_ ) -new_n13652_ = OR ( new_n6515_, new_n6161_ ) -new_n13653_ = OR ( new_n5084_, new_n4768_ ) -new_n13654_ = NAND ( new_n5084_, new_n4768_ ) -new_n13655_ = XOR ( new_n5392_, new_n5125_ ) -new_n13656_ = NAND ( new_n13655_, new_n13654_, new_n13653_, new_n13652_ ) -new_n13657_ = XOR ( new_n4448_, new_n4076_ ) -new_n13658_ = OR ( new_n3881_, new_n2861_ ) -new_n13659_ = NAND ( new_n3881_, new_n2861_ ) -new_n13660_ = XOR ( new_n2828_, new_n2001_ ) -new_n13661_ = NAND ( new_n13660_, new_n13659_, new_n13658_, new_n13657_ ) -new_n13662_ = XOR ( new_n6121_, new_n5883_ ) -new_n13663_ = XOR ( new_n4728_, new_n4489_ ) -new_n13664_ = XOR ( new_n4036_, new_n3879_ ) -new_n13665_ = XOR ( new_n5842_, new_n5434_ ) -new_n13666_ = NAND ( new_n13665_, new_n13664_, new_n13663_, new_n13662_ ) -new_n13667_ = OR ( new_n13666_, new_n13661_, new_n13656_, new_n13651_ ) -new_n13668_ = OR ( new_n13667_, new_n13650_, new_n13649_ ) -new_n13669_ = NAND ( new_n13668_, new_n9755_ ) -new_n13670_ = OR ( new_n13667_, new_n13649_ ) -new_n13671_ = NOR ( new_n13670_, new_n13582_ ) -new_n13672_ = NOR ( new_n13670_, new_n13580_ ) -new_n13673_ = NOR ( new_n13672_, new_n13671_ ) -new_n13674_ = OR ( new_n13673_, new_n13650_ ) -new_n13675_ = NAND ( new_n13674_, new_n13669_ ) -new_n13676_ = NAND ( new_n13675_, new_n2884_ ) -new_n13677_ = NAND ( new_n1841_, new_n1739_ ) -new_n13678_ = OR ( new_n13677_, new_n1756_ ) -new_n13679_ = NAND ( new_n13678_, new_n13373_ ) -new_n13680_ = OR ( new_n13582_, new_n1726_ ) -new_n13681_ = NAND ( new_n13680_, new_n13375_ ) -new_n13682_ = NAND ( new_n13681_, new_n13679_ ) -new_n13683_ = NAND ( new_n13682_, new_n13676_, new_n13592_, new_n13579_ ) -new_n13684_ = NAND ( new_n13683_, NET_275 ) -new_n13685_ = NAND ( new_n13373_, new_n2800_, new_n2022_, new_n1837_ ) -new_n13686_ = NAND ( new_n2800_, new_n2022_, new_n1833_ ) -new_n13687_ = NAND ( new_n13686_, new_n13677_ ) -new_n13688_ = NAND ( new_n13687_, new_n1947_, NET_275 ) -new_n13689_ = NAND ( new_n13688_, NET_245 ) -NET_15071 = NAND ( new_n13689_, new_n13685_, new_n13684_ ) -new_n13691_ = AND ( NET_521, NET_276 ) -new_n13692_ = NOR ( NET_521, NET_276 ) -NET_1759 = OR ( new_n13692_, new_n13691_, NET_766 ) -new_n13694_ = AND ( NET_522, NET_277 ) -new_n13695_ = NOR ( NET_522, NET_277 ) -NET_1760 = OR ( new_n13695_, new_n13694_, NET_767 ) -new_n13697_ = NOT ( new_n3461_ ) -new_n13698_ = NAND ( new_n3460_, new_n3458_ ) -NET_1951 = NAND ( new_n13698_, new_n13697_ ) -new_n13700_ = OR ( new_n2643_, NET_765 ) -new_n13701_ = OR ( new_n3175_, new_n2546_ ) -new_n13702_ = NAND ( new_n3177_, NET_523 ) -NET_2077 = NAND ( new_n13702_, new_n13701_, new_n13700_ ) -new_n13704_ = OR ( new_n2530_, NET_765 ) -new_n13705_ = OR ( new_n3175_, new_n2547_ ) -new_n13706_ = NAND ( new_n3177_, new_n2549_ ) -NET_2209 = NAND ( new_n13706_, new_n13705_, new_n13704_ ) -new_n13708_ = NOT ( NET_701 ) -new_n13709_ = XOR ( new_n3471_, new_n13708_ ) -NET_2348 = XOR ( new_n13709_, new_n13697_ ) -new_n13711_ = NAND ( new_n3207_, NET_35979 ) -new_n13712_ = OR ( new_n3175_, new_n2435_ ) -new_n13713_ = OR ( new_n3211_, new_n3178_ ) -NET_2360 = NAND ( new_n13713_, new_n13712_, new_n13711_ ) -new_n13715_ = NAND ( new_n3479_, new_n3477_ ) -NET_2469 = XOR ( new_n13715_, new_n3474_ ) -new_n13717_ = OR ( new_n1909_, NET_275 ) -new_n13718_ = NAND ( NET_33, NET_275 ) -NET_2473 = NAND ( new_n13718_, new_n13717_ ) -new_n13720_ = OR ( new_n2279_, NET_520 ) -new_n13721_ = OR ( new_n2054_, new_n2292_ ) -new_n13722_ = NAND ( new_n2057_, NET_278 ) -NET_2479 = NAND ( new_n13722_, new_n13721_, new_n13720_ ) -new_n13724_ = NAND ( new_n3715_, NET_35979 ) -new_n13725_ = OR ( new_n3175_, new_n3717_ ) -new_n13726_ = OR ( new_n3719_, new_n3178_ ) -NET_2485 = NAND ( new_n13726_, new_n13725_, new_n13724_ ) -new_n13728_ = NAND ( new_n3487_, new_n3484_ ) -NET_2599 = XOR ( new_n13728_, new_n3480_ ) -new_n13730_ = OR ( new_n2818_, NET_275 ) -new_n13731_ = OR ( new_n1692_, new_n2822_ ) -new_n13732_ = NAND ( new_n2824_, new_n1695_ ) -NET_2603 = NAND ( new_n13732_, new_n13731_, new_n13730_ ) -new_n13734_ = OR ( new_n2909_, NET_520 ) -new_n13735_ = OR ( new_n2054_, new_n2912_ ) -new_n13736_ = NAND ( new_n2914_, new_n2057_ ) -NET_2607 = NAND ( new_n13736_, new_n13735_, new_n13734_ ) -new_n13738_ = NAND ( new_n4333_, NET_35979 ) -new_n13739_ = OR ( new_n3175_, new_n2432_ ) -new_n13740_ = OR ( new_n4336_, new_n3178_ ) -NET_2611 = NAND ( new_n13740_, new_n13739_, new_n13738_ ) -new_n13742_ = OR ( new_n3826_, NET_275 ) -new_n13743_ = OR ( new_n1692_, new_n3828_ ) -new_n13744_ = OR ( new_n3832_, new_n1696_ ) -NET_2720 = NAND ( new_n13744_, new_n13743_, new_n13742_ ) -new_n13746_ = OR ( new_n3900_, NET_520 ) -new_n13747_ = OR ( new_n2054_, new_n2066_ ) -new_n13748_ = OR ( new_n3904_, new_n2058_ ) -NET_2725 = NAND ( new_n13748_, new_n13747_, new_n13746_ ) -new_n13750_ = NAND ( new_n4609_, NET_35979 ) -new_n13751_ = OR ( new_n3175_, new_n2433_ ) -new_n13752_ = OR ( new_n4613_, new_n3178_ ) -NET_2730 = NAND ( new_n13752_, new_n13751_, new_n13750_ ) -new_n13754_ = NAND ( new_n3495_, new_n3492_ ) -NET_2768 = XOR ( new_n13754_, new_n3488_ ) -new_n13756_ = OR ( new_n4028_, NET_275 ) -new_n13757_ = OR ( new_n1692_, new_n4030_ ) -new_n13758_ = OR ( new_n4032_, new_n1696_ ) -NET_2820 = NAND ( new_n13758_, new_n13757_, new_n13756_ ) -new_n13760_ = OR ( new_n4142_, NET_520 ) -new_n13761_ = OR ( new_n2054_, new_n4144_ ) -new_n13762_ = OR ( new_n4146_, new_n2058_ ) -NET_2828 = NAND ( new_n13762_, new_n13761_, new_n13760_ ) -new_n13764_ = NAND ( new_n4957_, NET_35979 ) -new_n13765_ = OR ( new_n3175_, new_n2434_ ) -new_n13766_ = OR ( new_n4962_, new_n3178_ ) -NET_2835 = NAND ( new_n13766_, new_n13765_, new_n13764_ ) -new_n13768_ = NAND ( new_n3503_, new_n3500_ ) -NET_2932 = XOR ( new_n13768_, new_n3496_ ) -new_n13770_ = NAND ( new_n5290_, NET_35979 ) -new_n13771_ = OR ( new_n3175_, new_n5292_ ) -new_n13772_ = OR ( new_n5294_, new_n3178_ ) -NET_2973 = NAND ( new_n13772_, new_n13771_, new_n13770_ ) -new_n13774_ = OR ( new_n4441_, NET_275 ) -new_n13775_ = OR ( new_n1692_, new_n1697_ ) -new_n13776_ = OR ( new_n4444_, new_n1696_ ) -NET_3025 = NAND ( new_n13776_, new_n13775_, new_n13774_ ) -new_n13778_ = OR ( new_n4504_, NET_520 ) -new_n13779_ = OR ( new_n2054_, new_n2063_ ) -new_n13780_ = OR ( new_n4507_, new_n2058_ ) -NET_3047 = NAND ( new_n13780_, new_n13779_, new_n13778_ ) -new_n13782_ = NAND ( new_n5724_, NET_35979 ) -new_n13783_ = OR ( new_n3175_, new_n5726_ ) -new_n13784_ = OR ( new_n5728_, new_n3178_ ) -NET_3169 = NAND ( new_n13784_, new_n13783_, new_n13782_ ) -new_n13786_ = NAND ( new_n3511_, new_n3508_ ) -NET_3214 = XOR ( new_n13786_, new_n3504_ ) -new_n13788_ = OR ( new_n4719_, NET_275 ) -new_n13789_ = OR ( new_n1692_, new_n4721_ ) -new_n13790_ = OR ( new_n4724_, new_n1696_ ) -NET_3350 = NAND ( new_n13790_, new_n13789_, new_n13788_ ) -new_n13792_ = OR ( new_n4852_, NET_520 ) -new_n13793_ = OR ( new_n2054_, new_n2064_ ) -new_n13794_ = OR ( new_n4856_, new_n2058_ ) -NET_3399 = NAND ( new_n13794_, new_n13793_, new_n13792_ ) -new_n13796_ = NAND ( new_n6003_, NET_35979 ) -new_n13797_ = OR ( new_n3175_, new_n2430_ ) -new_n13798_ = OR ( new_n6006_, new_n3178_ ) -NET_3422 = NAND ( new_n13798_, new_n13797_, new_n13796_ ) -new_n13800_ = NOT ( new_n3518_ ) -new_n13801_ = NAND ( new_n13800_, new_n3516_ ) -NET_3485 = XOR ( new_n13801_, new_n3512_ ) -NET_35974 = NAND ( new_n2794_, NET_275 ) -NET_35977 = NAND ( new_n3004_, NET_520 ) -new_n13805_ = NAND ( new_n6346_, NET_35979 ) -new_n13806_ = OR ( new_n3175_, new_n2431_ ) -new_n13807_ = OR ( new_n6351_, new_n3178_ ) -NET_4056 = NAND ( new_n13807_, new_n13806_, new_n13805_ ) -new_n13809_ = NOR ( new_n3525_, new_n3523_ ) -NET_4252 = XOR ( new_n13809_, new_n3519_ ) -new_n13811_ = OR ( new_n5073_, NET_275 ) -new_n13812_ = OR ( new_n1692_, new_n5075_ ) -new_n13813_ = OR ( new_n5080_, new_n1696_ ) -NET_4258 = NAND ( new_n13813_, new_n13812_, new_n13811_ ) -new_n13815_ = OR ( new_n5205_, NET_520 ) -new_n13816_ = OR ( new_n2054_, new_n2065_ ) -new_n13817_ = OR ( new_n5210_, new_n2058_ ) -NET_4352 = NAND ( new_n13817_, new_n13816_, new_n13815_ ) -new_n13819_ = NAND ( new_n6679_, NET_35979 ) -new_n13820_ = OR ( new_n3175_, new_n6681_ ) -new_n13821_ = OR ( new_n6683_, new_n3178_ ) -NET_5018 = NAND ( new_n13821_, new_n13820_, new_n13819_ ) -new_n13823_ = NOR ( new_n3532_, new_n3530_ ) -NET_5315 = XOR ( new_n13823_, new_n3526_ ) -new_n13825_ = OR ( new_n5385_, NET_275 ) -new_n13826_ = OR ( new_n1692_, new_n1698_ ) -new_n13827_ = OR ( new_n5388_, new_n1696_ ) -NET_5320 = NAND ( new_n13827_, new_n13826_, new_n13825_ ) -new_n13829_ = AND ( new_n1837_, new_n1798_ ) -NET_5321 = NOR ( new_n13829_, new_n1822_ ) -new_n13831_ = NOT ( NET_68 ) -NET_5322 = NOR ( new_n13829_, new_n13831_ ) -new_n13833_ = NOT ( NET_69 ) -NET_5323 = NOR ( new_n13829_, new_n13833_ ) -NET_5324 = NOR ( new_n13829_, new_n1809_ ) -NET_5325 = NOR ( new_n13829_, new_n1810_ ) -NET_5326 = NOR ( new_n13829_, new_n1811_ ) -NET_5327 = NOR ( new_n13829_, new_n1812_ ) -NET_5328 = NOR ( new_n13829_, new_n1815_ ) -NET_5329 = NOR ( new_n13829_, new_n1816_ ) -new_n13841_ = NOT ( NET_76 ) -NET_5330 = NOR ( new_n13829_, new_n13841_ ) -new_n13843_ = NOT ( NET_77 ) -NET_5331 = NOR ( new_n13829_, new_n13843_ ) -new_n13845_ = NOT ( NET_78 ) -NET_5332 = NOR ( new_n13829_, new_n13845_ ) -new_n13847_ = NOT ( NET_79 ) -NET_5333 = NOR ( new_n13829_, new_n13847_ ) -new_n13849_ = NOT ( NET_80 ) -NET_5334 = NOR ( new_n13829_, new_n13849_ ) -new_n13851_ = NOT ( NET_81 ) -NET_5335 = NOR ( new_n13829_, new_n13851_ ) -NET_5336 = NOR ( new_n13829_, new_n1799_ ) -NET_5337 = NOR ( new_n13829_, new_n1800_ ) -new_n13855_ = NOT ( NET_84 ) -NET_5338 = NOR ( new_n13829_, new_n13855_ ) -new_n13857_ = NOT ( NET_85 ) -NET_5339 = NOR ( new_n13829_, new_n13857_ ) -new_n13859_ = NOT ( NET_86 ) -NET_5340 = NOR ( new_n13829_, new_n13859_ ) -new_n13861_ = NOT ( NET_87 ) -NET_5341 = NOR ( new_n13829_, new_n13861_ ) -new_n13863_ = NOT ( NET_88 ) -NET_5342 = NOR ( new_n13829_, new_n13863_ ) -new_n13865_ = NOT ( NET_89 ) -NET_5343 = NOR ( new_n13829_, new_n13865_ ) -new_n13867_ = NOT ( NET_90 ) -NET_5344 = NOR ( new_n13829_, new_n13867_ ) -new_n13869_ = NOT ( NET_91 ) -NET_5345 = NOR ( new_n13829_, new_n13869_ ) -new_n13871_ = NOT ( NET_92 ) -NET_5346 = NOR ( new_n13829_, new_n13871_ ) -new_n13873_ = NOT ( NET_93 ) -NET_5347 = NOR ( new_n13829_, new_n13873_ ) -NET_5348 = NOR ( new_n13829_, new_n1804_ ) -NET_5349 = NOR ( new_n13829_, new_n1805_ ) -NET_5350 = NOR ( new_n13829_, new_n1806_ ) -new_n13878_ = OR ( new_n5464_, NET_520 ) -new_n13879_ = OR ( new_n2054_, new_n5466_ ) -new_n13880_ = OR ( new_n5468_, new_n2058_ ) -NET_5429 = NAND ( new_n13880_, new_n13879_, new_n13878_ ) -new_n13882_ = NOR ( new_n2379_, new_n2117_ ) -NET_5430 = NOR ( new_n13882_, new_n2176_ ) -new_n13884_ = NOT ( NET_313 ) -NET_5431 = NOR ( new_n13882_, new_n13884_ ) -new_n13886_ = NOT ( NET_314 ) -NET_5432 = NOR ( new_n13882_, new_n13886_ ) -NET_5433 = NOR ( new_n13882_, new_n2163_ ) -NET_5434 = NOR ( new_n13882_, new_n2164_ ) -NET_5435 = NOR ( new_n13882_, new_n2165_ ) -NET_5436 = NOR ( new_n13882_, new_n2166_ ) -NET_5437 = NOR ( new_n13882_, new_n2169_ ) -NET_5438 = NOR ( new_n13882_, new_n2170_ ) -new_n13894_ = NOT ( NET_321 ) -NET_5439 = NOR ( new_n13882_, new_n13894_ ) -new_n13896_ = NOT ( NET_322 ) -NET_5440 = NOR ( new_n13882_, new_n13896_ ) -new_n13898_ = NOT ( NET_323 ) -NET_5441 = NOR ( new_n13882_, new_n13898_ ) -new_n13900_ = NOT ( NET_324 ) -NET_5442 = NOR ( new_n13882_, new_n13900_ ) -new_n13902_ = NOT ( NET_325 ) -NET_5443 = NOR ( new_n13882_, new_n13902_ ) -new_n13904_ = NOT ( NET_326 ) -NET_5444 = NOR ( new_n13882_, new_n13904_ ) -NET_5445 = NOR ( new_n13882_, new_n2153_ ) -NET_5446 = NOR ( new_n13882_, new_n2154_ ) -new_n13908_ = NOT ( NET_329 ) -NET_5447 = NOR ( new_n13882_, new_n13908_ ) -new_n13910_ = NOT ( NET_330 ) -NET_5448 = NOR ( new_n13882_, new_n13910_ ) -new_n13912_ = NOT ( NET_331 ) -NET_5449 = NOR ( new_n13882_, new_n13912_ ) -new_n13914_ = NOT ( NET_332 ) -NET_5450 = NOR ( new_n13882_, new_n13914_ ) -new_n13916_ = NOT ( NET_333 ) -NET_5451 = NOR ( new_n13882_, new_n13916_ ) -new_n13918_ = NOT ( NET_334 ) -NET_5452 = NOR ( new_n13882_, new_n13918_ ) -new_n13920_ = NOT ( NET_335 ) -NET_5453 = NOR ( new_n13882_, new_n13920_ ) -new_n13922_ = NOT ( NET_336 ) -NET_5454 = NOR ( new_n13882_, new_n13922_ ) -new_n13924_ = NOT ( NET_337 ) -NET_5455 = NOR ( new_n13882_, new_n13924_ ) -new_n13926_ = NOT ( NET_338 ) -NET_5456 = NOR ( new_n13882_, new_n13926_ ) -NET_5457 = NOR ( new_n13882_, new_n2158_ ) -NET_5458 = NOR ( new_n13882_, new_n2159_ ) -NET_5459 = NOR ( new_n13882_, new_n2160_ ) -new_n13931_ = AND ( new_n2712_, new_n2473_ ) -NET_5560 = NOR ( new_n13931_, new_n2695_ ) -new_n13933_ = NOT ( NET_558 ) -NET_5561 = NOR ( new_n13931_, new_n13933_ ) -new_n13935_ = NOT ( NET_559 ) -NET_5562 = NOR ( new_n13931_, new_n13935_ ) -NET_5563 = NOR ( new_n13931_, new_n2682_ ) -NET_5564 = NOR ( new_n13931_, new_n2683_ ) -NET_5565 = NOR ( new_n13931_, new_n2684_ ) -NET_5566 = NOR ( new_n13931_, new_n2685_ ) -NET_5567 = NOR ( new_n13931_, new_n2688_ ) -NET_5568 = NOR ( new_n13931_, new_n2689_ ) -new_n13943_ = NOT ( NET_566 ) -NET_5569 = NOR ( new_n13931_, new_n13943_ ) -new_n13945_ = NOT ( NET_567 ) -NET_5570 = NOR ( new_n13931_, new_n13945_ ) -new_n13947_ = NOT ( NET_568 ) -NET_5571 = NOR ( new_n13931_, new_n13947_ ) -new_n13949_ = NOT ( NET_569 ) -NET_5572 = NOR ( new_n13931_, new_n13949_ ) -new_n13951_ = NOT ( NET_570 ) -NET_5573 = NOR ( new_n13931_, new_n13951_ ) -new_n13953_ = NOT ( NET_571 ) -NET_5574 = NOR ( new_n13931_, new_n13953_ ) -NET_5575 = NOR ( new_n13931_, new_n2672_ ) -NET_5576 = NOR ( new_n13931_, new_n2673_ ) -new_n13957_ = NOT ( NET_574 ) -NET_5577 = NOR ( new_n13931_, new_n13957_ ) -new_n13959_ = NOT ( NET_575 ) -NET_5578 = NOR ( new_n13931_, new_n13959_ ) -new_n13961_ = NOT ( NET_576 ) -NET_5579 = NOR ( new_n13931_, new_n13961_ ) -new_n13963_ = NOT ( NET_577 ) -NET_5580 = NOR ( new_n13931_, new_n13963_ ) -new_n13965_ = NOT ( NET_578 ) -NET_5581 = NOR ( new_n13931_, new_n13965_ ) -new_n13967_ = NOT ( NET_579 ) -NET_5582 = NOR ( new_n13931_, new_n13967_ ) -new_n13969_ = NOT ( NET_580 ) -NET_5583 = NOR ( new_n13931_, new_n13969_ ) -new_n13971_ = NOT ( NET_581 ) -NET_5584 = NOR ( new_n13931_, new_n13971_ ) -new_n13973_ = NOT ( NET_582 ) -NET_5585 = NOR ( new_n13931_, new_n13973_ ) -new_n13975_ = NOT ( NET_583 ) -NET_5586 = NOR ( new_n13931_, new_n13975_ ) -NET_5587 = NOR ( new_n13931_, new_n2677_ ) -NET_5588 = NOR ( new_n13931_, new_n2678_ ) -NET_5589 = NOR ( new_n13931_, new_n2679_ ) -new_n13980_ = NAND ( new_n3341_, NET_703 ) -new_n13981_ = NAND ( NET_35981, new_n2638_ ) -NET_5591 = NAND ( new_n13981_, new_n13980_ ) -new_n13983_ = NAND ( new_n3341_, NET_704 ) -new_n13984_ = NAND ( NET_35981, new_n2611_ ) -NET_5592 = NAND ( new_n13984_, new_n13983_ ) -new_n13986_ = NAND ( new_n3341_, NET_705 ) -new_n13987_ = NAND ( NET_35981, new_n2772_ ) -NET_5593 = NAND ( new_n13987_, new_n13986_ ) -new_n13989_ = NAND ( new_n3341_, NET_706 ) -new_n13990_ = NAND ( NET_35981, new_n3251_ ) -NET_5594 = NAND ( new_n13990_, new_n13989_ ) -new_n13992_ = NAND ( new_n3341_, NET_707 ) -new_n13993_ = NAND ( new_n3753_, NET_35981 ) -NET_5595 = NAND ( new_n13993_, new_n13992_ ) -new_n13995_ = NAND ( new_n3341_, NET_708 ) -new_n13996_ = NAND ( new_n4370_, NET_35981 ) -NET_5596 = NAND ( new_n13996_, new_n13995_ ) -new_n13998_ = NAND ( new_n3341_, NET_709 ) -new_n13999_ = NAND ( new_n4651_, NET_35981 ) -NET_5597 = NAND ( new_n13999_, new_n13998_ ) -new_n14001_ = NAND ( new_n3341_, NET_710 ) -new_n14002_ = NAND ( new_n5003_, NET_35981 ) -NET_5598 = NAND ( new_n14002_, new_n14001_ ) -new_n14004_ = NAND ( new_n3341_, NET_711 ) -new_n14005_ = NAND ( new_n5331_, NET_35981 ) -NET_5599 = NAND ( new_n14005_, new_n14004_ ) -new_n14007_ = NAND ( new_n3341_, NET_712 ) -new_n14008_ = NAND ( new_n5763_, NET_35981 ) -NET_5600 = NAND ( new_n14008_, new_n14007_ ) -new_n14010_ = NAND ( new_n3341_, NET_713 ) -new_n14011_ = NAND ( new_n6042_, NET_35981 ) -NET_5601 = NAND ( new_n14011_, new_n14010_ ) -new_n14013_ = NAND ( new_n3341_, NET_714 ) -new_n14014_ = NAND ( new_n6391_, NET_35981 ) -NET_5602 = NAND ( new_n14014_, new_n14013_ ) -new_n14016_ = NAND ( new_n3341_, NET_715 ) -new_n14017_ = NAND ( new_n6720_, NET_35981 ) -NET_5603 = NAND ( new_n14017_, new_n14016_ ) -new_n14019_ = NAND ( new_n3341_, NET_716 ) -new_n14020_ = NAND ( new_n7223_, NET_35981 ) -NET_5604 = NAND ( new_n14020_, new_n14019_ ) -new_n14022_ = NAND ( new_n3341_, NET_717 ) -new_n14023_ = NAND ( new_n7499_, NET_35981 ) -NET_5605 = NAND ( new_n14023_, new_n14022_ ) -new_n14025_ = NAND ( new_n3341_, NET_718 ) -new_n14026_ = NAND ( new_n7892_, NET_35981 ) -NET_5606 = NAND ( new_n14026_, new_n14025_ ) -new_n14028_ = NAND ( new_n3341_, NET_719 ) -new_n14029_ = NAND ( new_n8157_, NET_35981 ) -NET_5607 = NAND ( new_n14029_, new_n14028_ ) -new_n14031_ = NAND ( new_n3341_, NET_720 ) -new_n14032_ = NAND ( new_n8482_, NET_35981 ) -NET_5608 = NAND ( new_n14032_, new_n14031_ ) -new_n14034_ = NAND ( new_n3341_, NET_721 ) -new_n14035_ = NAND ( new_n8821_, NET_35981 ) -NET_5609 = NAND ( new_n14035_, new_n14034_ ) -new_n14037_ = NAND ( new_n3341_, NET_722 ) -new_n14038_ = NAND ( new_n9109_, NET_35981 ) -NET_5610 = NAND ( new_n14038_, new_n14037_ ) -new_n14040_ = NAND ( new_n3341_, NET_723 ) -new_n14041_ = NAND ( new_n9394_, NET_35981 ) -NET_5611 = NAND ( new_n14041_, new_n14040_ ) -new_n14043_ = NAND ( new_n3341_, NET_724 ) -new_n14044_ = NAND ( new_n9665_, NET_35981 ) -NET_5612 = NAND ( new_n14044_, new_n14043_ ) -new_n14046_ = NAND ( new_n3341_, NET_725 ) -new_n14047_ = NAND ( new_n9907_, NET_35981 ) -NET_5613 = NAND ( new_n14047_, new_n14046_ ) -new_n14049_ = NAND ( new_n3341_, NET_726 ) -new_n14050_ = NAND ( new_n10094_, NET_35981 ) -NET_5614 = NAND ( new_n14050_, new_n14049_ ) -new_n14052_ = NAND ( new_n3341_, NET_727 ) -new_n14053_ = NAND ( new_n10280_, NET_35981 ) -NET_5615 = NAND ( new_n14053_, new_n14052_ ) -new_n14055_ = NAND ( new_n3341_, NET_728 ) -new_n14056_ = NAND ( new_n10469_, NET_35981 ) -NET_5616 = NAND ( new_n14056_, new_n14055_ ) -new_n14058_ = NAND ( new_n3341_, NET_729 ) -new_n14059_ = NAND ( new_n10656_, NET_35981 ) -NET_5617 = NAND ( new_n14059_, new_n14058_ ) -new_n14061_ = NAND ( new_n3341_, NET_730 ) -new_n14062_ = NAND ( new_n10846_, NET_35981 ) -NET_5618 = NAND ( new_n14062_, new_n14061_ ) -new_n14064_ = NAND ( new_n3341_, NET_731 ) -new_n14065_ = NAND ( new_n11036_, NET_35981 ) -NET_5619 = NAND ( new_n14065_, new_n14064_ ) -new_n14067_ = NAND ( new_n3341_, NET_732 ) -new_n14068_ = NAND ( new_n11215_, NET_35981 ) -NET_5620 = NAND ( new_n14068_, new_n14067_ ) -new_n14070_ = NAND ( new_n3341_, NET_733 ) -new_n14071_ = NAND ( new_n11463_, NET_35981 ) -NET_5621 = NAND ( new_n14071_, new_n14070_ ) -new_n14073_ = NAND ( new_n3341_, NET_734 ) -new_n14074_ = OR ( new_n7094_, new_n3341_ ) -NET_5622 = NAND ( new_n14074_, new_n14073_ ) -new_n14076_ = OR ( NET_35975, new_n2276_ ) -new_n14077_ = NAND ( NET_35975, new_n1903_ ) -NET_5772 = NAND ( new_n14077_, new_n14076_ ) -new_n14079_ = OR ( NET_35975, new_n2906_ ) -new_n14080_ = NAND ( NET_35975, new_n2001_ ) -NET_5773 = NAND ( new_n14080_, new_n14079_ ) -new_n14082_ = OR ( NET_35975, new_n3071_ ) -new_n14083_ = NAND ( new_n2861_, NET_35975 ) -NET_5774 = NAND ( new_n14083_, new_n14082_ ) -new_n14085_ = OR ( NET_35975, new_n3076_ ) -new_n14086_ = NAND ( new_n3879_, NET_35975 ) -NET_5775 = NAND ( new_n14086_, new_n14085_ ) -new_n14088_ = OR ( NET_35975, new_n3081_ ) -new_n14089_ = NAND ( new_n4076_, NET_35975 ) -NET_5776 = NAND ( new_n14089_, new_n14088_ ) -new_n14091_ = OR ( NET_35975, new_n3086_ ) -new_n14092_ = NAND ( new_n4489_, NET_35975 ) -NET_5777 = NAND ( new_n14092_, new_n14091_ ) -new_n14094_ = OR ( NET_35975, new_n3091_ ) -new_n14095_ = NAND ( new_n4768_, NET_35975 ) -NET_5778 = NAND ( new_n14095_, new_n14094_ ) -new_n14097_ = OR ( NET_35975, new_n3096_ ) -new_n14098_ = NAND ( new_n5125_, NET_35975 ) -NET_5779 = NAND ( new_n14098_, new_n14097_ ) -new_n14100_ = OR ( NET_35975, new_n3101_ ) -new_n14101_ = NAND ( new_n5434_, NET_35975 ) -NET_5780 = NAND ( new_n14101_, new_n14100_ ) -new_n14103_ = OR ( NET_35975, new_n3106_ ) -new_n14104_ = NAND ( new_n5883_, NET_35975 ) -NET_5781 = NAND ( new_n14104_, new_n14103_ ) -new_n14106_ = OR ( NET_35975, new_n3111_ ) -new_n14107_ = NAND ( new_n6161_, NET_35975 ) -NET_5782 = NAND ( new_n14107_, new_n14106_ ) -new_n14109_ = OR ( NET_35975, new_n3116_ ) -new_n14110_ = NAND ( new_n6513_, NET_35975 ) -NET_5783 = NAND ( new_n14110_, new_n14109_ ) -new_n14112_ = OR ( NET_35975, new_n3121_ ) -new_n14113_ = NAND ( new_n6826_, NET_35975 ) -NET_5784 = NAND ( new_n14113_, new_n14112_ ) -new_n14115_ = OR ( NET_35975, new_n3126_ ) -new_n14116_ = NAND ( new_n7333_, NET_35975 ) -NET_5785 = NAND ( new_n14116_, new_n14115_ ) -new_n14118_ = OR ( NET_35975, new_n3131_ ) -new_n14119_ = NAND ( new_n7599_, NET_35975 ) -NET_5786 = NAND ( new_n14119_, new_n14118_ ) -new_n14121_ = OR ( NET_35975, new_n3136_ ) -new_n14122_ = NAND ( new_n8015_, NET_35975 ) -NET_5787 = NAND ( new_n14122_, new_n14121_ ) -new_n14124_ = OR ( NET_35975, new_n2047_ ) -new_n14125_ = NAND ( new_n8247_, NET_35975 ) -NET_5788 = NAND ( new_n14125_, new_n14124_ ) -new_n14127_ = OR ( NET_35975, new_n3145_ ) -new_n14128_ = NAND ( new_n8588_, NET_35975 ) -NET_5789 = NAND ( new_n14128_, new_n14127_ ) -new_n14130_ = OR ( NET_35975, new_n3151_ ) -new_n14131_ = NAND ( new_n8913_, NET_35975 ) -NET_5790 = NAND ( new_n14131_, new_n14130_ ) -new_n14133_ = OR ( NET_35975, new_n3157_ ) -new_n14134_ = NAND ( new_n9199_, NET_35975 ) -NET_5791 = NAND ( new_n14134_, new_n14133_ ) -new_n14136_ = OR ( NET_35975, new_n3163_ ) -new_n14137_ = NAND ( new_n9483_, NET_35975 ) -NET_5792 = NAND ( new_n14137_, new_n14136_ ) -new_n14139_ = OR ( NET_35975, new_n3063_ ) -new_n14140_ = NAND ( new_n9731_, NET_35975 ) -NET_5793 = NAND ( new_n14140_, new_n14139_ ) -new_n14142_ = OR ( NET_35975, new_n3981_ ) -new_n14143_ = NAND ( new_n9970_, NET_35975 ) -NET_5794 = NAND ( new_n14143_, new_n14142_ ) -new_n14145_ = OR ( NET_35975, new_n4315_ ) -new_n14146_ = NAND ( new_n10156_, NET_35975 ) -NET_5795 = NAND ( new_n14146_, new_n14145_ ) -new_n14148_ = OR ( NET_35975, new_n4592_ ) -new_n14149_ = NAND ( new_n10344_, NET_35975 ) -NET_5796 = NAND ( new_n14149_, new_n14148_ ) -new_n14151_ = OR ( NET_35975, new_n4940_ ) -new_n14152_ = NAND ( new_n10531_, NET_35975 ) -NET_5797 = NAND ( new_n14152_, new_n14151_ ) -new_n14154_ = OR ( NET_35975, new_n5530_ ) -new_n14155_ = NAND ( new_n10720_, NET_35975 ) -NET_5798 = NAND ( new_n14155_, new_n14154_ ) -new_n14157_ = OR ( NET_35975, new_n5707_ ) -new_n14158_ = NAND ( new_n10910_, NET_35975 ) -NET_5799 = NAND ( new_n14158_, new_n14157_ ) -new_n14160_ = OR ( NET_35975, new_n5986_ ) -new_n14161_ = NAND ( new_n11096_, NET_35975 ) -NET_5800 = NAND ( new_n14161_, new_n14160_ ) -new_n14163_ = OR ( NET_35975, new_n6329_ ) -new_n14164_ = NAND ( new_n11275_, NET_35975 ) -NET_5801 = NAND ( new_n14164_, new_n14163_ ) -new_n14166_ = OR ( NET_35975, new_n6922_ ) -new_n14167_ = NAND ( new_n11351_, NET_35975 ) -NET_5802 = NAND ( new_n14167_, new_n14166_ ) -new_n14169_ = OR ( NET_35975, new_n7048_ ) -new_n14170_ = NAND ( new_n11365_, NET_35975 ) -NET_5803 = NAND ( new_n14170_, new_n14169_ ) -new_n14172_ = OR ( NET_35978, new_n1591_ ) -new_n14173_ = NAND ( NET_35978, new_n2252_ ) -NET_5833 = NAND ( new_n14173_, new_n14172_ ) -new_n14175_ = OR ( NET_35978, new_n1598_ ) -new_n14176_ = NAND ( NET_35978, new_n2376_ ) -NET_5834 = NAND ( new_n14176_, new_n14175_ ) -new_n14178_ = OR ( NET_35978, new_n1605_ ) -new_n14179_ = NAND ( new_n2976_, NET_35978 ) -NET_5835 = NAND ( new_n14179_, new_n14178_ ) -new_n14181_ = OR ( NET_35978, new_n1614_ ) -new_n14182_ = NAND ( new_n3962_, NET_35978 ) -NET_5836 = NAND ( new_n14182_, new_n14181_ ) -new_n14184_ = OR ( NET_35978, new_n1584_ ) -new_n14185_ = NAND ( new_n4197_, NET_35978 ) -NET_5837 = NAND ( new_n14185_, new_n14184_ ) -new_n14187_ = OR ( NET_35978, new_n1626_ ) -new_n14188_ = NAND ( new_n4558_, NET_35978 ) -NET_5838 = NAND ( new_n14188_, new_n14187_ ) -new_n14190_ = OR ( NET_35978, new_n1578_ ) -new_n14191_ = NAND ( new_n4905_, NET_35978 ) -NET_5839 = NAND ( new_n14191_, new_n14190_ ) -new_n14193_ = OR ( NET_35978, new_n1571_ ) -new_n14194_ = NAND ( new_n5263_, NET_35978 ) -NET_5840 = NAND ( new_n14194_, new_n14193_ ) -new_n14196_ = OR ( NET_35978, new_n1640_ ) -new_n14197_ = NAND ( new_n5518_, NET_35978 ) -NET_5841 = NAND ( new_n14197_, new_n14196_ ) -new_n14199_ = OR ( NET_35978, new_n1649_ ) -new_n14200_ = NAND ( new_n5964_, NET_35978 ) -NET_5842 = NAND ( new_n14200_, new_n14199_ ) -new_n14202_ = OR ( NET_35978, new_n1563_ ) -new_n14203_ = NAND ( new_n6294_, NET_35978 ) -NET_5843 = NAND ( new_n14203_, new_n14202_ ) -new_n14205_ = OR ( NET_35978, new_n1556_ ) -new_n14206_ = NAND ( new_n6652_, NET_35978 ) -NET_5844 = NAND ( new_n14206_, new_n14205_ ) -new_n14208_ = OR ( NET_35978, new_n1663_ ) -new_n14209_ = NAND ( new_n6912_, NET_35978 ) -NET_5845 = NAND ( new_n14209_, new_n14208_ ) -new_n14211_ = OR ( NET_35978, new_n1672_ ) -new_n14212_ = NAND ( new_n7405_, NET_35978 ) -NET_5846 = NAND ( new_n14212_, new_n14211_ ) -new_n14214_ = OR ( NET_35978, new_n1548_ ) -new_n14215_ = NAND ( new_n7726_, NET_35978 ) -NET_5847 = NAND ( new_n14215_, new_n14214_ ) -new_n14217_ = OR ( NET_35978, new_n1541_ ) -new_n14218_ = NAND ( new_n8103_, NET_35978 ) -NET_5848 = NAND ( new_n14218_, new_n14217_ ) -new_n14220_ = OR ( NET_35978, new_n1533_ ) -new_n14221_ = NAND ( new_n8333_, NET_35978 ) -NET_5849 = NAND ( new_n14221_, new_n14220_ ) -new_n14223_ = OR ( NET_35978, new_n3148_ ) -new_n14224_ = NAND ( new_n8722_, NET_35978 ) -NET_5850 = NAND ( new_n14224_, new_n14223_ ) -new_n14226_ = OR ( NET_35978, new_n3154_ ) -new_n14227_ = NAND ( new_n9034_, NET_35978 ) -NET_5851 = NAND ( new_n14227_, new_n14226_ ) -new_n14229_ = OR ( NET_35978, new_n3160_ ) -new_n14230_ = NAND ( new_n9325_, NET_35978 ) -NET_5852 = NAND ( new_n14230_, new_n14229_ ) -new_n14232_ = OR ( NET_35978, new_n3166_ ) -new_n14233_ = NAND ( new_n9605_, NET_35978 ) -NET_5853 = NAND ( new_n14233_, new_n14232_ ) -new_n14235_ = OR ( NET_35978, new_n3061_ ) -new_n14236_ = NAND ( new_n9860_, NET_35978 ) -NET_5854 = NAND ( new_n14236_, new_n14235_ ) -new_n14238_ = OR ( NET_35978, new_n3979_ ) -new_n14239_ = NAND ( new_n10052_, NET_35978 ) -NET_5855 = NAND ( new_n14239_, new_n14238_ ) -new_n14241_ = OR ( NET_35978, new_n4313_ ) -new_n14242_ = NAND ( new_n10236_, NET_35978 ) -NET_5856 = NAND ( new_n14242_, new_n14241_ ) -new_n14244_ = OR ( NET_35978, new_n4590_ ) -new_n14245_ = NAND ( new_n10427_, NET_35978 ) -NET_5857 = NAND ( new_n14245_, new_n14244_ ) -new_n14247_ = OR ( NET_35978, new_n4938_ ) -new_n14248_ = NAND ( new_n10612_, NET_35978 ) -NET_5858 = NAND ( new_n14248_, new_n14247_ ) -new_n14250_ = OR ( NET_35978, new_n5528_ ) -new_n14251_ = NAND ( new_n10803_, NET_35978 ) -NET_5859 = NAND ( new_n14251_, new_n14250_ ) -new_n14253_ = OR ( NET_35978, new_n5705_ ) -new_n14254_ = NAND ( new_n10992_, NET_35978 ) -NET_5860 = NAND ( new_n14254_, new_n14253_ ) -new_n14256_ = OR ( NET_35978, new_n5984_ ) -new_n14257_ = NAND ( new_n11175_, NET_35978 ) -NET_5861 = NAND ( new_n14257_, new_n14256_ ) -new_n14259_ = OR ( NET_35978, new_n6327_ ) -new_n14260_ = NAND ( new_n11415_, NET_35978 ) -NET_5862 = NAND ( new_n14260_, new_n14259_ ) -new_n14262_ = OR ( NET_35978, new_n6924_ ) -new_n14263_ = NAND ( new_n11615_, NET_35978 ) -NET_5863 = NAND ( new_n14263_, new_n14262_ ) -new_n14265_ = OR ( NET_35978, new_n7046_ ) -new_n14266_ = NAND ( new_n11676_, NET_35978 ) -NET_5864 = NAND ( new_n14266_, new_n14265_ ) -new_n14268_ = NAND ( new_n7183_, NET_35979 ) -new_n14269_ = OR ( new_n3175_, new_n7186_ ) -new_n14270_ = OR ( new_n7187_, new_n3178_ ) -NET_5898 = NAND ( new_n14270_, new_n14269_, new_n14268_ ) -new_n14272_ = OR ( new_n13931_, new_n2477_ ) -new_n14273_ = NAND ( new_n13931_, new_n2475_ ) -NET_5905 = NAND ( new_n14273_, new_n14272_ ) -new_n14275_ = OR ( new_n13931_, new_n2482_ ) -new_n14276_ = NAND ( new_n13931_, new_n2480_ ) -NET_5906 = NAND ( new_n14276_, new_n14275_ ) -new_n14278_ = OR ( new_n5834_, NET_275 ) -new_n14279_ = OR ( new_n1692_, new_n5836_ ) -new_n14280_ = OR ( new_n5838_, new_n1696_ ) -NET_6021 = NAND ( new_n14280_, new_n14279_, new_n14278_ ) -new_n14282_ = OR ( new_n13829_, new_n1791_ ) -new_n14283_ = NAND ( new_n1789_, new_n1788_ ) -new_n14284_ = NAND ( new_n13829_, new_n14283_ ) -NET_6030 = NAND ( new_n14284_, new_n14282_ ) -new_n14286_ = OR ( new_n13829_, new_n1782_ ) -new_n14287_ = NAND ( new_n1773_, new_n1768_ ) -new_n14288_ = NAND ( new_n13829_, new_n14287_ ) -NET_6031 = NAND ( new_n14288_, new_n14286_ ) -new_n14290_ = OR ( new_n5910_, NET_520 ) -new_n14291_ = OR ( new_n2054_, new_n5913_ ) -new_n14292_ = OR ( new_n5914_, new_n2058_ ) -NET_6057 = NAND ( new_n14292_, new_n14291_, new_n14290_ ) -new_n14294_ = NOT ( NET_310 ) -new_n14295_ = OR ( new_n13882_, new_n14294_ ) -new_n14296_ = NAND ( new_n13882_, new_n2124_ ) -NET_6063 = NAND ( new_n14296_, new_n14295_ ) -new_n14298_ = NOT ( NET_311 ) -new_n14299_ = OR ( new_n13882_, new_n14298_ ) -new_n14300_ = NAND ( new_n13882_, new_n2118_ ) -NET_6064 = NAND ( new_n14300_, new_n14299_ ) -new_n14302_ = NOT ( new_n3538_ ) -new_n14303_ = NAND ( new_n3540_, new_n14302_ ) -NET_6202 = XNOR ( new_n14303_, new_n3533_ ) -new_n14305_ = NAND ( new_n7460_, NET_35979 ) -new_n14306_ = OR ( new_n3175_, new_n2428_ ) -new_n14307_ = OR ( new_n7463_, new_n3178_ ) -NET_6385 = NAND ( new_n14307_, new_n14306_, new_n14305_ ) -new_n14309_ = OR ( new_n6113_, NET_275 ) -new_n14310_ = OR ( new_n1692_, new_n6466_ ) -new_n14311_ = OR ( new_n6117_, new_n1696_ ) -NET_6512 = NAND ( new_n14311_, new_n14310_, new_n14309_ ) -new_n14313_ = OR ( new_n6242_, NET_520 ) -new_n14314_ = OR ( new_n2054_, new_n2061_ ) -new_n14315_ = OR ( new_n6245_, new_n2058_ ) -NET_6612 = NAND ( new_n14315_, new_n14314_, new_n14313_ ) -new_n14317_ = NAND ( new_n3551_, new_n3549_ ) -NET_6826 = XOR ( new_n14317_, new_n3541_ ) -new_n14319_ = NAND ( new_n7847_, NET_35979 ) -new_n14320_ = OR ( new_n3175_, new_n2429_ ) -new_n14321_ = OR ( new_n7852_, new_n3178_ ) -NET_7016 = NAND ( new_n14321_, new_n14320_, new_n14319_ ) -new_n14323_ = NAND ( new_n3558_, new_n3556_ ) -NET_7149 = XOR ( new_n14323_, new_n3552_ ) -new_n14325_ = OR ( new_n6462_, NET_275 ) -new_n14326_ = OR ( new_n1692_, new_n6464_ ) -new_n14327_ = OR ( new_n6470_, new_n1696_ ) -NET_7694 = NAND ( new_n14327_, new_n14326_, new_n14325_ ) -new_n14329_ = OR ( new_n6595_, NET_520 ) -new_n14330_ = OR ( new_n2054_, new_n2062_ ) -new_n14331_ = OR ( new_n6600_, new_n2058_ ) -NET_7827 = NAND ( new_n14331_, new_n14330_, new_n14329_ ) -new_n14333_ = NAND ( new_n8116_, NET_35979 ) -new_n14334_ = OR ( new_n3175_, new_n8119_ ) -new_n14335_ = OR ( new_n8120_, new_n3178_ ) -NET_8012 = NAND ( new_n14335_, new_n14334_, new_n14333_ ) -new_n14337_ = NAND ( new_n3565_, new_n3563_ ) -NET_8233 = XOR ( new_n14337_, new_n3559_ ) -new_n14339_ = OR ( new_n6777_, NET_275 ) -new_n14340_ = OR ( new_n1692_, new_n6779_ ) -new_n14341_ = OR ( new_n6781_, new_n1696_ ) -NET_8710 = NAND ( new_n14341_, new_n14340_, new_n14339_ ) -new_n14343_ = OR ( new_n6858_, NET_520 ) -new_n14344_ = OR ( new_n2054_, new_n6861_ ) -new_n14345_ = OR ( new_n6862_, new_n2058_ ) -NET_8737 = NAND ( new_n14345_, new_n14344_, new_n14343_ ) -new_n14347_ = NAND ( new_n8442_, NET_35979 ) -new_n14348_ = OR ( new_n3175_, new_n8445_ ) -new_n14349_ = OR ( new_n8446_, new_n3178_ ) -NET_8777 = NAND ( new_n14349_, new_n14348_, new_n14347_ ) -new_n14351_ = OR ( new_n7286_, NET_275 ) -new_n14352_ = OR ( new_n1692_, new_n7288_ ) -new_n14353_ = OR ( new_n7290_, new_n1696_ ) -NET_9028 = NAND ( new_n14353_, new_n14352_, new_n14351_ ) -new_n14355_ = OR ( new_n7353_, NET_520 ) -new_n14356_ = OR ( new_n2054_, new_n7356_ ) -new_n14357_ = OR ( new_n7357_, new_n2058_ ) -NET_9041 = NAND ( new_n14357_, new_n14356_, new_n14355_ ) -new_n14359_ = NAND ( new_n3573_, new_n3571_ ) -NET_9192 = XOR ( new_n14359_, new_n3566_ ) -new_n14361_ = NAND ( new_n8780_, NET_35979 ) -new_n14362_ = OR ( new_n3175_, new_n2426_ ) -new_n14363_ = OR ( new_n8783_, new_n3178_ ) -NET_9240 = NAND ( new_n14363_, new_n14362_, new_n14361_ ) -new_n14365_ = OR ( new_n7551_, NET_275 ) -new_n14366_ = OR ( new_n1692_, new_n7970_ ) -new_n14367_ = OR ( new_n7555_, new_n1696_ ) -NET_9360 = NAND ( new_n14367_, new_n14366_, new_n14365_ ) -new_n14369_ = OR ( new_n7671_, NET_520 ) -new_n14370_ = OR ( new_n2054_, new_n2059_ ) -new_n14371_ = OR ( new_n7674_, new_n2058_ ) -NET_9370 = NAND ( new_n14371_, new_n14370_, new_n14369_ ) -new_n14373_ = NAND ( new_n3581_, new_n3579_ ) -NET_9495 = XOR ( new_n14373_, new_n3574_ ) -new_n14375_ = NAND ( new_n9069_, NET_35979 ) -new_n14376_ = OR ( new_n3175_, new_n2427_ ) -new_n14377_ = OR ( new_n9074_, new_n3178_ ) -NET_9527 = NAND ( new_n14377_, new_n14376_, new_n14375_ ) -new_n14379_ = NAND ( new_n3589_, new_n3587_ ) -NET_9720 = XOR ( new_n14379_, new_n3582_ ) -new_n14381_ = OR ( new_n7965_, NET_275 ) -new_n14382_ = OR ( new_n1692_, new_n7967_ ) -new_n14383_ = OR ( new_n7973_, new_n1696_ ) -NET_9726 = NAND ( new_n14383_, new_n14382_, new_n14381_ ) -new_n14385_ = OR ( new_n8043_, NET_520 ) -new_n14386_ = OR ( new_n2054_, new_n2060_ ) -new_n14387_ = OR ( new_n8048_, new_n2058_ ) -NET_9730 = NAND ( new_n14387_, new_n14386_, new_n14385_ ) -new_n14389_ = NAND ( new_n9360_, NET_35979 ) -new_n14390_ = OR ( new_n3175_, new_n2492_ ) -new_n14391_ = OR ( new_n3178_, new_n2493_ ) -NET_9737 = NAND ( new_n14391_, new_n14390_, new_n14389_ ) -new_n14393_ = OR ( new_n12123_, new_n3202_ ) -new_n14394_ = NAND ( new_n2733_, new_n2647_ ) -new_n14395_ = OR ( new_n2643_, new_n2735_ ) -new_n14396_ = NAND ( new_n14395_, new_n14394_ ) -new_n14397_ = NAND ( new_n14396_, new_n3240_ ) -new_n14398_ = NAND ( new_n3243_, new_n2611_ ) -new_n14399_ = NAND ( new_n3197_, NET_587 ) -NET_9855 = NAND ( new_n14399_, new_n14398_, new_n14397_, new_n14393_ ) -new_n14401_ = OR ( new_n12123_, new_n3264_ ) -new_n14402_ = NAND ( new_n14396_, new_n3266_ ) -new_n14403_ = NAND ( new_n3269_, new_n2611_ ) -new_n14404_ = NAND ( new_n3262_, NET_619 ) -NET_9856 = NAND ( new_n14404_, new_n14403_, new_n14402_, new_n14401_ ) -new_n14406_ = NOR ( new_n12123_, new_n3767_ ) -new_n14407_ = NAND ( new_n14396_, new_n2744_ ) -new_n14408_ = NAND ( new_n2713_, NET_651 ) -new_n14409_ = NAND ( new_n2758_, NET_745 ) -new_n14410_ = NAND ( new_n2765_, new_n2611_ ) -new_n14411_ = NAND ( new_n14410_, new_n14409_, new_n14408_, new_n14407_ ) -NET_9857 = OR ( new_n14411_, new_n14406_ ) -new_n14413_ = NOR ( new_n12123_, new_n3276_ ) -new_n14414_ = NAND ( new_n3323_, new_n2647_ ) -new_n14415_ = XNOR ( new_n3296_, new_n2647_ ) -new_n14416_ = NAND ( new_n14415_, new_n3316_ ) -new_n14417_ = OR ( new_n3314_, new_n3458_ ) -new_n14418_ = NAND ( NET_35979, NET_745 ) -new_n14419_ = NAND ( new_n14418_, new_n14417_, new_n14416_, new_n14414_ ) -NET_9858 = OR ( new_n14419_, new_n14413_ ) -new_n14421_ = NAND ( new_n3596_, new_n3594_ ) -NET_9936 = XOR ( new_n14421_, new_n3590_ ) -new_n14423_ = OR ( new_n8201_, NET_275 ) -new_n14424_ = OR ( new_n1692_, new_n8203_ ) -new_n14425_ = OR ( new_n8205_, new_n1696_ ) -NET_9944 = NAND ( new_n14425_, new_n14424_, new_n14423_ ) -new_n14427_ = OR ( new_n8277_, NET_520 ) -new_n14428_ = OR ( new_n2054_, new_n8280_ ) -new_n14429_ = OR ( new_n8281_, new_n2058_ ) -NET_9968 = NAND ( new_n14429_, new_n14428_, new_n14427_ ) -new_n14431_ = OR ( new_n9640_, NET_765 ) -new_n14432_ = OR ( new_n3175_, new_n2497_ ) -new_n14433_ = OR ( new_n3178_, new_n2498_ ) -NET_9994 = NAND ( new_n14433_, new_n14432_, new_n14431_ ) -new_n14435_ = NOR ( new_n3202_, new_n12114_ ) -new_n14436_ = NAND ( new_n3240_, new_n2737_ ) -new_n14437_ = NAND ( new_n3197_, NET_588 ) -new_n14438_ = NAND ( new_n3243_, new_n2772_ ) -new_n14439_ = NAND ( new_n3253_, new_n2638_ ) -new_n14440_ = NAND ( new_n14439_, new_n14438_, new_n14437_, new_n14436_ ) -NET_9995 = OR ( new_n14440_, new_n14435_ ) -new_n14442_ = NOR ( new_n3264_, new_n12114_ ) -new_n14443_ = NAND ( new_n3266_, new_n2737_ ) -new_n14444_ = NAND ( new_n3262_, NET_620 ) -new_n14445_ = NAND ( new_n3269_, new_n2772_ ) -new_n14446_ = NAND ( new_n3271_, new_n2638_ ) -new_n14447_ = NAND ( new_n14446_, new_n14445_, new_n14444_, new_n14443_ ) -NET_9996 = OR ( new_n14447_, new_n14442_ ) -new_n14449_ = NOR ( new_n3276_, new_n12114_ ) -new_n14450_ = NAND ( new_n3323_, new_n2551_ ) -new_n14451_ = XOR ( new_n3300_, new_n2551_ ) -new_n14452_ = NAND ( new_n14451_, new_n3297_ ) -new_n14453_ = OR ( new_n14451_, new_n3297_ ) -new_n14454_ = NAND ( new_n14453_, new_n14452_, new_n3316_ ) -new_n14455_ = NAND ( NET_35979, NET_755 ) -new_n14456_ = OR ( new_n3314_, new_n13708_ ) -new_n14457_ = NAND ( new_n14456_, new_n14455_, new_n14454_, new_n14450_ ) -NET_9997 = OR ( new_n14457_, new_n14449_ ) -new_n14459_ = OR ( new_n12123_, new_n3339_ ) -new_n14460_ = AND ( new_n3359_, new_n3193_ ) -new_n14461_ = OR ( new_n14460_, new_n3350_ ) -new_n14462_ = NAND ( new_n14461_, NET_745 ) -new_n14463_ = NAND ( new_n3359_, new_n3352_, new_n2611_ ) -new_n14464_ = NAND ( new_n14396_, new_n3361_ ) -new_n14465_ = NAND ( new_n3363_, new_n12112_ ) -new_n14466_ = AND ( new_n14465_, new_n14464_, new_n14418_ ) -NET_9998 = NAND ( new_n14466_, new_n14463_, new_n14462_, new_n14459_ ) -new_n14468_ = OR ( new_n3339_, new_n12114_ ) -new_n14469_ = NAND ( new_n3350_, NET_755 ) -new_n14470_ = NAND ( new_n3352_, new_n2772_ ) -new_n14471_ = NAND ( new_n3193_, NET_755 ) -new_n14472_ = NAND ( new_n3355_, new_n2638_ ) -new_n14473_ = NAND ( new_n14472_, new_n14471_, new_n14470_ ) -new_n14474_ = NAND ( new_n14473_, new_n3359_ ) -new_n14475_ = NAND ( new_n3361_, new_n2737_ ) -new_n14476_ = NAND ( new_n3363_, new_n12113_ ) -new_n14477_ = AND ( new_n14476_, new_n14475_, new_n14455_ ) -NET_9999 = NAND ( new_n14477_, new_n14474_, new_n14469_, new_n14468_ ) diff --git a/atpg b/atpg index 61e543ff7b735adda7a0c7130780a7c6df14b3ec..b1492b727ae2badc40a52817cc924882ccaeaa63 100755 GIT binary patch delta 42525 zcma&P34Bb~`#(N&GnbHMLX(OmgvJsCA!!W>87ACeqSRWu4k@*k394bjB7>3l`LhfCH9@F<&LEkwSUa-{hWIzndbZb|6ku>=A839&w0*sp7WgNJm=gq znLD}smJL<%qiYtm*0EQbn&=)adB6GB)ngl|#n=Y#pKj%J?@>$sR2QL^^+*hqy`z>Z zr%5eTxIYc7R|O~`o;du^^e7?mTF~ah@kruy{)!w*ggewitr(EX-{}uDy8j4Byeg+> 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a/bench_test/c1355.bench +++ /dev/null @@ -1,623 +0,0 @@ -# c1355 - -INPUT(1) -INPUT(8) -INPUT(15) -INPUT(22) -INPUT(29) -INPUT(36) -INPUT(43) -INPUT(50) -INPUT(57) -INPUT(64) -INPUT(71) -INPUT(78) -INPUT(85) -INPUT(92) -INPUT(99) -INPUT(106) -INPUT(113) -INPUT(120) -INPUT(127) -INPUT(134) -INPUT(141) -INPUT(148) -INPUT(155) -INPUT(162) -INPUT(169) -INPUT(176) -INPUT(183) -INPUT(190) -INPUT(197) -INPUT(204) -INPUT(211) -INPUT(218) -INPUT(225) -INPUT(226) -INPUT(227) -INPUT(228) -INPUT(229) -INPUT(230) -INPUT(231) -INPUT(232) -INPUT(233) - -OUTPUT(1324) -OUTPUT(1325) -OUTPUT(1326) -OUTPUT(1327) -OUTPUT(1328) -OUTPUT(1329) -OUTPUT(1330) -OUTPUT(1331) -OUTPUT(1332) -OUTPUT(1333) -OUTPUT(1334) -OUTPUT(1335) -OUTPUT(1336) -OUTPUT(1337) -OUTPUT(1338) -OUTPUT(1339) -OUTPUT(1340) -OUTPUT(1341) -OUTPUT(1342) -OUTPUT(1343) -OUTPUT(1344) -OUTPUT(1345) -OUTPUT(1346) -OUTPUT(1347) -OUTPUT(1348) -OUTPUT(1349) -OUTPUT(1350) -OUTPUT(1351) -OUTPUT(1352) -OUTPUT(1353) -OUTPUT(1354) -OUTPUT(1355) - -242 = AND(225, 233) -245 = AND(226, 233) -248 = AND(227, 233) -251 = AND(228, 233) -254 = AND(229, 233) -257 = AND(230, 233) -260 = AND(231, 233) -263 = AND(232, 233) -266 = NAND(1, 8) -269 = NAND(15, 22) -272 = NAND(29, 36) -275 = NAND(43, 50) -278 = NAND(57, 64) -281 = NAND(71, 78) -284 = NAND(85, 92) -287 = NAND(99, 106) -290 = NAND(113, 120) -293 = NAND(127, 134) -296 = NAND(141, 148) -299 = NAND(155, 162) -302 = NAND(169, 176) -305 = NAND(183, 190) -308 = NAND(197, 204) -311 = NAND(211, 218) -314 = NAND(1, 29) -317 = NAND(57, 85) -320 = NAND(8, 36) -323 = NAND(64, 92) -326 = NAND(15, 43) -329 = NAND(71, 99) -332 = NAND(22, 50) -335 = NAND(78, 106) -338 = NAND(113, 141) -341 = NAND(169, 197) -344 = NAND(120, 148) -347 = NAND(176, 204) -350 = NAND(127, 155) -353 = NAND(183, 211) -356 = NAND(134, 162) -359 = NAND(190, 218) -362 = NAND(1, 266) -363 = NAND(8, 266) -364 = NAND(15, 269) -365 = NAND(22, 269) -366 = NAND(29, 272) -367 = NAND(36, 272) -368 = NAND(43, 275) -369 = NAND(50, 275) -370 = NAND(57, 278) -371 = NAND(64, 278) -372 = NAND(71, 281) -373 = NAND(78, 281) -374 = NAND(85, 284) -375 = NAND(92, 284) -376 = NAND(99, 287) -377 = NAND(106, 287) -378 = NAND(113, 290) -379 = NAND(120, 290) -380 = NAND(127, 293) -381 = NAND(134, 293) -382 = NAND(141, 296) -383 = NAND(148, 296) -384 = NAND(155, 299) -385 = NAND(162, 299) -386 = NAND(169, 302) -387 = NAND(176, 302) -388 = NAND(183, 305) -389 = NAND(190, 305) -390 = NAND(197, 308) -391 = NAND(204, 308) -392 = NAND(211, 311) -393 = NAND(218, 311) -394 = NAND(1, 314) -395 = NAND(29, 314) -396 = NAND(57, 317) -397 = NAND(85, 317) -398 = NAND(8, 320) -399 = NAND(36, 320) -400 = NAND(64, 323) -401 = NAND(92, 323) -402 = NAND(15, 326) -403 = NAND(43, 326) -404 = NAND(71, 329) -405 = NAND(99, 329) -406 = NAND(22, 332) -407 = NAND(50, 332) -408 = NAND(78, 335) -409 = NAND(106, 335) -410 = NAND(113, 338) -411 = NAND(141, 338) -412 = NAND(169, 341) -413 = NAND(197, 341) -414 = NAND(120, 344) -415 = NAND(148, 344) -416 = NAND(176, 347) -417 = NAND(204, 347) -418 = NAND(127, 350) -419 = NAND(155, 350) -420 = NAND(183, 353) -421 = NAND(211, 353) -422 = NAND(134, 356) -423 = NAND(162, 356) -424 = NAND(190, 359) -425 = NAND(218, 359) -426 = NAND(362, 363) -429 = NAND(364, 365) -432 = NAND(366, 367) -435 = NAND(368, 369) -438 = NAND(370, 371) -441 = NAND(372, 373) -444 = NAND(374, 375) -447 = NAND(376, 377) -450 = NAND(378, 379) -453 = NAND(380, 381) -456 = NAND(382, 383) -459 = NAND(384, 385) -462 = NAND(386, 387) -465 = NAND(388, 389) -468 = NAND(390, 391) -471 = NAND(392, 393) -474 = NAND(394, 395) -477 = NAND(396, 397) -480 = NAND(398, 399) -483 = NAND(400, 401) -486 = NAND(402, 403) -489 = NAND(404, 405) -492 = NAND(406, 407) -495 = NAND(408, 409) -498 = NAND(410, 411) -501 = NAND(412, 413) -504 = NAND(414, 415) -507 = NAND(416, 417) -510 = NAND(418, 419) -513 = NAND(420, 421) -516 = NAND(422, 423) -519 = NAND(424, 425) -522 = NAND(426, 429) -525 = NAND(432, 435) -528 = NAND(438, 441) -531 = NAND(444, 447) -534 = NAND(450, 453) -537 = NAND(456, 459) -540 = NAND(462, 465) -543 = NAND(468, 471) -546 = NAND(474, 477) -549 = NAND(480, 483) -552 = NAND(486, 489) -555 = NAND(492, 495) -558 = NAND(498, 501) -561 = NAND(504, 507) -564 = NAND(510, 513) -567 = NAND(516, 519) -570 = NAND(426, 522) -571 = NAND(429, 522) -572 = NAND(432, 525) -573 = NAND(435, 525) -574 = NAND(438, 528) -575 = NAND(441, 528) -576 = NAND(444, 531) -577 = NAND(447, 531) -578 = NAND(450, 534) -579 = NAND(453, 534) -580 = NAND(456, 537) -581 = NAND(459, 537) -582 = NAND(462, 540) -583 = NAND(465, 540) -584 = NAND(468, 543) -585 = NAND(471, 543) -586 = NAND(474, 546) -587 = NAND(477, 546) -588 = NAND(480, 549) -589 = NAND(483, 549) -590 = NAND(486, 552) -591 = NAND(489, 552) -592 = NAND(492, 555) -593 = NAND(495, 555) -594 = NAND(498, 558) -595 = NAND(501, 558) -596 = NAND(504, 561) -597 = NAND(507, 561) -598 = NAND(510, 564) -599 = NAND(513, 564) -600 = NAND(516, 567) -601 = NAND(519, 567) -602 = NAND(570, 571) -607 = NAND(572, 573) -612 = NAND(574, 575) -617 = NAND(576, 577) -622 = NAND(578, 579) -627 = NAND(580, 581) -632 = NAND(582, 583) -637 = NAND(584, 585) -642 = NAND(586, 587) -645 = NAND(588, 589) -648 = NAND(590, 591) -651 = NAND(592, 593) -654 = NAND(594, 595) -657 = NAND(596, 597) -660 = NAND(598, 599) -663 = NAND(600, 601) -666 = NAND(602, 607) -669 = NAND(612, 617) -672 = NAND(602, 612) -675 = NAND(607, 617) -678 = NAND(622, 627) -681 = NAND(632, 637) -684 = NAND(622, 632) -687 = NAND(627, 637) -690 = NAND(602, 666) -691 = NAND(607, 666) -692 = NAND(612, 669) -693 = NAND(617, 669) -694 = NAND(602, 672) -695 = NAND(612, 672) -696 = NAND(607, 675) -697 = NAND(617, 675) -698 = NAND(622, 678) -699 = NAND(627, 678) -700 = NAND(632, 681) -701 = NAND(637, 681) -702 = NAND(622, 684) -703 = NAND(632, 684) -704 = NAND(627, 687) -705 = NAND(637, 687) -706 = NAND(690, 691) -709 = NAND(692, 693) -712 = NAND(694, 695) -715 = NAND(696, 697) -718 = NAND(698, 699) -721 = NAND(700, 701) -724 = NAND(702, 703) -727 = NAND(704, 705) -730 = NAND(242, 718) -733 = NAND(245, 721) -736 = NAND(248, 724) -739 = NAND(251, 727) -742 = NAND(254, 706) -745 = NAND(257, 709) -748 = NAND(260, 712) -751 = NAND(263, 715) -754 = NAND(242, 730) -755 = NAND(718, 730) -756 = NAND(245, 733) -757 = NAND(721, 733) -758 = NAND(248, 736) -759 = NAND(724, 736) -760 = NAND(251, 739) -761 = NAND(727, 739) -762 = NAND(254, 742) -763 = NAND(706, 742) -764 = NAND(257, 745) -765 = NAND(709, 745) -766 = NAND(260, 748) -767 = NAND(712, 748) -768 = NAND(263, 751) -769 = NAND(715, 751) -770 = NAND(754, 755) -773 = NAND(756, 757) -776 = NAND(758, 759) -779 = NAND(760, 761) -782 = NAND(762, 763) -785 = NAND(764, 765) -788 = NAND(766, 767) -791 = NAND(768, 769) -794 = NAND(642, 770) -797 = NAND(645, 773) -800 = NAND(648, 776) -803 = NAND(651, 779) -806 = NAND(654, 782) -809 = NAND(657, 785) -812 = NAND(660, 788) -815 = NAND(663, 791) -818 = NAND(642, 794) -819 = NAND(770, 794) -820 = NAND(645, 797) -821 = NAND(773, 797) -822 = NAND(648, 800) -823 = NAND(776, 800) -824 = NAND(651, 803) -825 = NAND(779, 803) -826 = NAND(654, 806) -827 = NAND(782, 806) -828 = NAND(657, 809) -829 = NAND(785, 809) -830 = NAND(660, 812) -831 = NAND(788, 812) -832 = NAND(663, 815) -833 = NAND(791, 815) -834 = NAND(818, 819) -847 = NAND(820, 821) -860 = NAND(822, 823) -873 = NAND(824, 825) -886 = NAND(828, 829) -899 = NAND(832, 833) -912 = NAND(830, 831) -925 = NAND(826, 827) -938 = NOT(834) -939 = NOT(847) -940 = NOT(860) -941 = NOT(834) -942 = NOT(847) -943 = NOT(873) -944 = NOT(834) -945 = NOT(860) -946 = NOT(873) -947 = NOT(847) -948 = NOT(860) -949 = NOT(873) -950 = NOT(886) -951 = NOT(899) -952 = NOT(886) -953 = NOT(912) -954 = NOT(925) -955 = NOT(899) -956 = NOT(925) -957 = NOT(912) -958 = NOT(925) -959 = NOT(886) -960 = NOT(912) -961 = NOT(925) -962 = NOT(886) -963 = NOT(899) -964 = NOT(925) -965 = NOT(912) -966 = NOT(899) -967 = NOT(886) -968 = NOT(912) -969 = NOT(899) -970 = NOT(847) -971 = NOT(873) -972 = NOT(847) -973 = NOT(860) -974 = NOT(834) -975 = NOT(873) -976 = NOT(834) -977 = NOT(860) -978 = AND(938, 939, 940, 873) -979 = AND(941, 942, 860, 943) -980 = AND(944, 847, 945, 946) -981 = AND(834, 947, 948, 949) -982 = AND(958, 959, 960, 899) -983 = AND(961, 962, 912, 963) -984 = AND(964, 886, 965, 966) -985 = AND(925, 967, 968, 969) -986 = OR(978, 979, 980, 981) -991 = OR(982, 983, 984, 985) -996 = AND(925, 950, 912, 951, 986) -1001 = AND(925, 952, 953, 899, 986) -1006 = AND(954, 886, 912, 955, 986) -1011 = AND(956, 886, 957, 899, 986) -1016 = AND(834, 970, 860, 971, 991) -1021 = AND(834, 972, 973, 873, 991) -1026 = AND(974, 847, 860, 975, 991) -1031 = AND(976, 847, 977, 873, 991) -1036 = AND(834, 996) -1039 = AND(847, 996) -1042 = AND(860, 996) -1045 = AND(873, 996) -1048 = AND(834, 1001) -1051 = AND(847, 1001) -1054 = AND(860, 1001) -1057 = AND(873, 1001) -1060 = AND(834, 1006) -1063 = AND(847, 1006) -1066 = AND(860, 1006) -1069 = AND(873, 1006) -1072 = AND(834, 1011) -1075 = AND(847, 1011) -1078 = AND(860, 1011) -1081 = AND(873, 1011) -1084 = AND(925, 1016) -1087 = AND(886, 1016) -1090 = AND(912, 1016) -1093 = AND(899, 1016) -1096 = AND(925, 1021) -1099 = AND(886, 1021) -1102 = AND(912, 1021) -1105 = AND(899, 1021) -1108 = AND(925, 1026) -1111 = AND(886, 1026) -1114 = AND(912, 1026) -1117 = AND(899, 1026) -1120 = AND(925, 1031) -1123 = AND(886, 1031) -1126 = AND(912, 1031) -1129 = AND(899, 1031) -1132 = NAND(1, 1036) -1135 = NAND(8, 1039) -1138 = NAND(15, 1042) -1141 = NAND(22, 1045) -1144 = NAND(29, 1048) -1147 = NAND(36, 1051) -1150 = NAND(43, 1054) -1153 = NAND(50, 1057) -1156 = NAND(57, 1060) -1159 = NAND(64, 1063) -1162 = NAND(71, 1066) -1165 = NAND(78, 1069) -1168 = NAND(85, 1072) -1171 = NAND(92, 1075) -1174 = NAND(99, 1078) -1177 = NAND(106, 1081) -1180 = NAND(113, 1084) -1183 = NAND(120, 1087) -1186 = NAND(127, 1090) -1189 = NAND(134, 1093) -1192 = NAND(141, 1096) -1195 = NAND(148, 1099) -1198 = NAND(155, 1102) -1201 = NAND(162, 1105) -1204 = NAND(169, 1108) -1207 = NAND(176, 1111) -1210 = NAND(183, 1114) -1213 = NAND(190, 1117) -1216 = NAND(197, 1120) -1219 = NAND(204, 1123) -1222 = NAND(211, 1126) -1225 = NAND(218, 1129) -1228 = NAND(1, 1132) -1229 = NAND(1036, 1132) -1230 = NAND(8, 1135) -1231 = NAND(1039, 1135) -1232 = NAND(15, 1138) -1233 = NAND(1042, 1138) -1234 = NAND(22, 1141) -1235 = NAND(1045, 1141) -1236 = NAND(29, 1144) -1237 = NAND(1048, 1144) -1238 = NAND(36, 1147) -1239 = NAND(1051, 1147) -1240 = NAND(43, 1150) -1241 = NAND(1054, 1150) -1242 = NAND(50, 1153) -1243 = NAND(1057, 1153) -1244 = NAND(57, 1156) -1245 = NAND(1060, 1156) -1246 = NAND(64, 1159) -1247 = NAND(1063, 1159) -1248 = NAND(71, 1162) -1249 = NAND(1066, 1162) -1250 = NAND(78, 1165) -1251 = NAND(1069, 1165) -1252 = NAND(85, 1168) -1253 = NAND(1072, 1168) -1254 = NAND(92, 1171) -1255 = NAND(1075, 1171) -1256 = NAND(99, 1174) -1257 = NAND(1078, 1174) -1258 = NAND(106, 1177) -1259 = NAND(1081, 1177) -1260 = NAND(113, 1180) -1261 = NAND(1084, 1180) -1262 = NAND(120, 1183) -1263 = NAND(1087, 1183) -1264 = NAND(127, 1186) -1265 = NAND(1090, 1186) -1266 = NAND(134, 1189) -1267 = NAND(1093, 1189) -1268 = NAND(141, 1192) -1269 = NAND(1096, 1192) -1270 = NAND(148, 1195) -1271 = NAND(1099, 1195) -1272 = NAND(155, 1198) -1273 = NAND(1102, 1198) -1274 = NAND(162, 1201) -1275 = NAND(1105, 1201) -1276 = NAND(169, 1204) -1277 = NAND(1108, 1204) -1278 = NAND(176, 1207) -1279 = NAND(1111, 1207) -1280 = NAND(183, 1210) -1281 = NAND(1114, 1210) -1282 = NAND(190, 1213) -1283 = NAND(1117, 1213) -1284 = NAND(197, 1216) -1285 = NAND(1120, 1216) -1286 = NAND(204, 1219) -1287 = NAND(1123, 1219) -1288 = NAND(211, 1222) -1289 = NAND(1126, 1222) -1290 = NAND(218, 1225) -1291 = NAND(1129, 1225) -1292 = NAND(1228, 1229) -1293 = NAND(1230, 1231) -1294 = NAND(1232, 1233) -1295 = NAND(1234, 1235) -1296 = NAND(1236, 1237) -1297 = NAND(1238, 1239) -1298 = NAND(1240, 1241) -1299 = NAND(1242, 1243) -1300 = NAND(1244, 1245) -1301 = NAND(1246, 1247) -1302 = NAND(1248, 1249) -1303 = NAND(1250, 1251) -1304 = NAND(1252, 1253) -1305 = NAND(1254, 1255) -1306 = NAND(1256, 1257) -1307 = NAND(1258, 1259) -1308 = NAND(1260, 1261) -1309 = NAND(1262, 1263) -1310 = NAND(1264, 1265) -1311 = NAND(1266, 1267) -1312 = NAND(1268, 1269) -1313 = NAND(1270, 1271) -1314 = NAND(1272, 1273) -1315 = NAND(1274, 1275) -1316 = NAND(1276, 1277) -1317 = NAND(1278, 1279) -1318 = NAND(1280, 1281) -1319 = NAND(1282, 1283) -1320 = NAND(1284, 1285) -1321 = NAND(1286, 1287) -1322 = NAND(1288, 1289) -1323 = NAND(1290, 1291) -1324 = BUFF(1292) -1325 = BUFF(1293) -1326 = BUFF(1294) -1327 = BUFF(1295) -1328 = BUFF(1296) -1329 = BUFF(1297) -1330 = BUFF(1298) -1331 = BUFF(1299) -1332 = BUFF(1300) -1333 = BUFF(1301) -1334 = BUFF(1302) -1335 = BUFF(1303) -1336 = BUFF(1304) -1337 = BUFF(1305) -1338 = BUFF(1306) -1339 = BUFF(1307) -1340 = BUFF(1308) -1341 = BUFF(1309) -1342 = BUFF(1310) -1343 = BUFF(1311) -1344 = BUFF(1312) -1345 = BUFF(1313) -1346 = BUFF(1314) -1347 = BUFF(1315) -1348 = BUFF(1316) -1349 = BUFF(1317) -1350 = BUFF(1318) -1351 = BUFF(1319) -1352 = BUFF(1320) -1353 = BUFF(1321) -1354 = BUFF(1322) -1355 = BUFF(1323) diff --git a/bench_test/c1908.bench b/bench_test/c1908.bench deleted file mode 100644 index 4ddacb4..0000000 --- a/bench_test/c1908.bench +++ /dev/null @@ -1,942 +0,0 @@ -# c1908 - -INPUT(1) -INPUT(4) -INPUT(7) -INPUT(10) -INPUT(13) -INPUT(16) -INPUT(19) -INPUT(22) -INPUT(25) -INPUT(28) -INPUT(31) -INPUT(34) -INPUT(37) -INPUT(40) -INPUT(43) -INPUT(46) -INPUT(49) -INPUT(53) -INPUT(56) -INPUT(60) -INPUT(63) -INPUT(66) -INPUT(69) -INPUT(72) -INPUT(76) -INPUT(79) -INPUT(82) -INPUT(85) -INPUT(88) -INPUT(91) -INPUT(94) -INPUT(99) -INPUT(104) - -OUTPUT(2753) -OUTPUT(2754) -OUTPUT(2755) -OUTPUT(2756) -OUTPUT(2762) -OUTPUT(2767) -OUTPUT(2768) -OUTPUT(2779) -OUTPUT(2780) -OUTPUT(2781) -OUTPUT(2782) -OUTPUT(2783) -OUTPUT(2784) -OUTPUT(2785) -OUTPUT(2786) -OUTPUT(2787) -OUTPUT(2811) -OUTPUT(2886) -OUTPUT(2887) -OUTPUT(2888) -OUTPUT(2889) -OUTPUT(2890) -OUTPUT(2891) -OUTPUT(2892) -OUTPUT(2899) - -190 = NOT(1) -194 = NOT(4) -197 = NOT(7) -201 = NOT(10) -206 = NOT(13) -209 = NOT(16) -212 = NOT(19) -216 = NOT(22) -220 = NOT(25) -225 = NOT(28) -229 = NOT(31) -232 = NOT(34) -235 = NOT(37) -239 = NOT(40) -243 = NOT(43) -247 = NOT(46) -251 = NAND(63, 88) -252 = NAND(66, 91) -253 = NOT(72) -256 = NOT(72) -257 = BUFF(69) -260 = BUFF(69) -263 = NOT(76) -266 = NOT(79) -269 = NOT(82) -272 = NOT(85) -275 = NOT(104) -276 = NOT(104) -277 = NOT(88) -280 = NOT(91) -283 = BUFF(94) -290 = NOT(94) -297 = BUFF(94) -300 = NOT(94) -303 = BUFF(99) -306 = NOT(99) -313 = NOT(99) -316 = BUFF(104) -319 = NOT(104) -326 = BUFF(104) -331 = BUFF(104) -338 = NOT(104) -343 = BUFF(1) -346 = BUFF(4) -349 = BUFF(7) -352 = BUFF(10) -355 = BUFF(13) -358 = BUFF(16) -361 = BUFF(19) -364 = BUFF(22) -367 = BUFF(25) -370 = BUFF(28) -373 = BUFF(31) -376 = BUFF(34) -379 = BUFF(37) -382 = BUFF(40) -385 = BUFF(43) -388 = BUFF(46) -534 = NOT(343) -535 = NOT(346) -536 = NOT(349) -537 = NOT(352) -538 = NOT(355) -539 = NOT(358) -540 = NOT(361) -541 = NOT(364) -542 = NOT(367) -543 = NOT(370) -544 = NOT(373) -545 = NOT(376) -546 = NOT(379) -547 = NOT(382) -548 = NOT(385) -549 = NOT(388) -550 = NAND(306, 331) -551 = NAND(306, 331) -552 = NAND(306, 331) -553 = NAND(306, 331) -554 = NAND(306, 331) -555 = NAND(306, 331) -556 = BUFF(190) -559 = BUFF(194) -562 = BUFF(206) -565 = BUFF(209) -568 = BUFF(225) -571 = BUFF(243) -574 = AND(63, 319) -577 = BUFF(220) -580 = BUFF(229) -583 = BUFF(232) -586 = AND(66, 319) -589 = BUFF(239) -592 = AND(49, 253, 319) -595 = BUFF(247) -598 = BUFF(239) -601 = NAND(326, 277) -602 = NAND(326, 280) -603 = NAND(260, 72) -608 = NAND(260, 300) -612 = NAND(256, 300) -616 = BUFF(201) -619 = BUFF(216) -622 = BUFF(220) -625 = BUFF(239) -628 = BUFF(190) -631 = BUFF(190) -634 = BUFF(194) -637 = BUFF(229) -640 = BUFF(197) -643 = AND(56, 257, 319) -646 = BUFF(232) -649 = BUFF(201) -652 = BUFF(235) -655 = AND(60, 257, 319) -658 = BUFF(263) -661 = BUFF(263) -664 = BUFF(266) -667 = BUFF(266) -670 = BUFF(269) -673 = BUFF(269) -676 = BUFF(272) -679 = BUFF(272) -682 = AND(251, 316) -685 = AND(252, 316) -688 = BUFF(197) -691 = BUFF(197) -694 = BUFF(212) -697 = BUFF(212) -700 = BUFF(247) -703 = BUFF(247) -706 = BUFF(235) -709 = BUFF(235) -712 = BUFF(201) -715 = BUFF(201) -718 = BUFF(206) -721 = BUFF(216) -724 = AND(53, 253, 319) -727 = BUFF(243) -730 = BUFF(220) -733 = BUFF(220) -736 = BUFF(209) -739 = BUFF(216) -742 = BUFF(225) -745 = BUFF(243) -748 = BUFF(212) -751 = BUFF(225) -886 = NOT(682) -887 = NOT(685) -888 = NOT(616) -889 = NOT(619) -890 = NOT(622) -891 = NOT(625) -892 = NOT(631) -893 = NOT(643) -894 = NOT(649) -895 = NOT(652) -896 = NOT(655) -897 = AND(49, 612) -898 = AND(56, 608) -899 = NAND(53, 612) -903 = NAND(60, 608) -907 = NAND(49, 612) -910 = NAND(56, 608) -913 = NOT(661) -914 = NOT(658) -915 = NOT(667) -916 = NOT(664) -917 = NOT(673) -918 = NOT(670) -919 = NOT(679) -920 = NOT(676) -921 = NAND(277, 297, 326, 603) -922 = NAND(280, 297, 326, 603) -923 = NAND(303, 338, 603) -926 = AND(303, 338, 603) -935 = BUFF(556) -938 = NOT(688) -939 = BUFF(556) -942 = NOT(691) -943 = BUFF(562) -946 = NOT(694) -947 = BUFF(562) -950 = NOT(697) -951 = BUFF(568) -954 = NOT(700) -955 = BUFF(568) -958 = NOT(703) -959 = BUFF(574) -962 = BUFF(574) -965 = BUFF(580) -968 = NOT(706) -969 = BUFF(580) -972 = NOT(709) -973 = BUFF(586) -976 = NOT(712) -977 = BUFF(586) -980 = NOT(715) -981 = BUFF(592) -984 = NOT(628) -985 = BUFF(592) -988 = NOT(718) -989 = NOT(721) -990 = NOT(634) -991 = NOT(724) -992 = NOT(727) -993 = NOT(637) -994 = BUFF(595) -997 = NOT(730) -998 = BUFF(595) -1001 = NOT(733) -1002 = NOT(736) -1003 = NOT(739) -1004 = NOT(640) -1005 = NOT(742) -1006 = NOT(745) -1007 = NOT(646) -1008 = NOT(748) -1009 = NOT(751) -1010 = BUFF(559) -1013 = BUFF(559) -1016 = BUFF(565) -1019 = BUFF(565) -1022 = BUFF(571) -1025 = BUFF(571) -1028 = BUFF(577) -1031 = BUFF(577) -1034 = BUFF(583) -1037 = BUFF(583) -1040 = BUFF(589) -1043 = BUFF(589) -1046 = BUFF(598) -1049 = BUFF(598) -1054 = NAND(619, 888) -1055 = NAND(616, 889) -1063 = NAND(625, 890) -1064 = NAND(622, 891) -1067 = NAND(655, 895) -1068 = NAND(652, 896) -1119 = NAND(721, 988) -1120 = NAND(718, 989) -1121 = NAND(727, 991) -1122 = NAND(724, 992) -1128 = NAND(739, 1002) -1129 = NAND(736, 1003) -1130 = NAND(745, 1005) -1131 = NAND(742, 1006) -1132 = NAND(751, 1008) -1133 = NAND(748, 1009) -1148 = NOT(939) -1149 = NOT(935) -1150 = NAND(1054, 1055) -1151 = NOT(943) -1152 = NOT(947) -1153 = NOT(955) -1154 = NOT(951) -1155 = NOT(962) -1156 = NOT(969) -1157 = NOT(977) -1158 = NAND(1063, 1064) -1159 = NOT(985) -1160 = NAND(985, 892) -1161 = NOT(998) -1162 = NAND(1067, 1068) -1163 = NOT(899) -1164 = BUFF(899) -1167 = NOT(903) -1168 = BUFF(903) -1171 = NAND(921, 923) -1188 = NAND(922, 923) -1205 = NOT(1010) -1206 = NAND(1010, 938) -1207 = NOT(1013) -1208 = NAND(1013, 942) -1209 = NOT(1016) -1210 = NAND(1016, 946) -1211 = NOT(1019) -1212 = NAND(1019, 950) -1213 = NOT(1022) -1214 = NAND(1022, 954) -1215 = NOT(1025) -1216 = NAND(1025, 958) -1217 = NOT(1028) -1218 = NOT(959) -1219 = NOT(1031) -1220 = NOT(1034) -1221 = NAND(1034, 968) -1222 = NOT(965) -1223 = NOT(1037) -1224 = NAND(1037, 972) -1225 = NOT(1040) -1226 = NAND(1040, 976) -1227 = NOT(973) -1228 = NOT(1043) -1229 = NAND(1043, 980) -1230 = NOT(981) -1231 = NAND(981, 984) -1232 = NAND(1119, 1120) -1235 = NAND(1121, 1122) -1238 = NOT(1046) -1239 = NAND(1046, 997) -1240 = NOT(994) -1241 = NOT(1049) -1242 = NAND(1049, 1001) -1243 = NAND(1128, 1129) -1246 = NAND(1130, 1131) -1249 = NAND(1132, 1133) -1252 = BUFF(907) -1255 = BUFF(907) -1258 = BUFF(910) -1261 = BUFF(910) -1264 = NOT(1150) -1267 = NAND(631, 1159) -1309 = NAND(688, 1205) -1310 = NAND(691, 1207) -1311 = NAND(694, 1209) -1312 = NAND(697, 1211) -1313 = NAND(700, 1213) -1314 = NAND(703, 1215) -1315 = NAND(706, 1220) -1316 = NAND(709, 1223) -1317 = NAND(712, 1225) -1318 = NAND(715, 1228) -1319 = NOT(1158) -1322 = NAND(628, 1230) -1327 = NAND(730, 1238) -1328 = NAND(733, 1241) -1334 = NOT(1162) -1344 = NAND(1267, 1160) -1345 = NAND(1249, 894) -1346 = NOT(1249) -1348 = NOT(1255) -1349 = NOT(1252) -1350 = NOT(1261) -1351 = NOT(1258) -1352 = NAND(1309, 1206) -1355 = NAND(1310, 1208) -1358 = NAND(1311, 1210) -1361 = NAND(1312, 1212) -1364 = NAND(1313, 1214) -1367 = NAND(1314, 1216) -1370 = NAND(1315, 1221) -1373 = NAND(1316, 1224) -1376 = NAND(1317, 1226) -1379 = NAND(1318, 1229) -1383 = NAND(1322, 1231) -1386 = NOT(1232) -1387 = NAND(1232, 990) -1388 = NOT(1235) -1389 = NAND(1235, 993) -1390 = NAND(1327, 1239) -1393 = NAND(1328, 1242) -1396 = NOT(1243) -1397 = NAND(1243, 1004) -1398 = NOT(1246) -1399 = NAND(1246, 1007) -1409 = NOT(1319) -1412 = NAND(649, 1346) -1413 = NOT(1334) -1416 = BUFF(1264) -1419 = BUFF(1264) -1433 = NAND(634, 1386) -1434 = NAND(637, 1388) -1438 = NAND(640, 1396) -1439 = NAND(646, 1398) -1440 = NOT(1344) -1443 = NAND(1355, 1148) -1444 = NOT(1355) -1445 = NAND(1352, 1149) -1446 = NOT(1352) -1447 = NAND(1358, 1151) -1448 = NOT(1358) -1451 = NAND(1361, 1152) -1452 = NOT(1361) -1453 = NAND(1367, 1153) -1454 = NOT(1367) -1455 = NAND(1364, 1154) -1456 = NOT(1364) -1457 = NAND(1373, 1156) -1458 = NOT(1373) -1459 = NAND(1379, 1157) -1460 = NOT(1379) -1461 = NOT(1383) -1462 = NAND(1393, 1161) -1463 = NOT(1393) -1464 = NAND(1345, 1412) -1468 = NOT(1370) -1469 = NAND(1370, 1222) -1470 = NOT(1376) -1471 = NAND(1376, 1227) -1472 = NAND(1387, 1433) -1475 = NOT(1390) -1476 = NAND(1390, 1240) -1478 = NAND(1389, 1434) -1481 = NAND(1399, 1439) -1484 = NAND(1397, 1438) -1487 = NAND(939, 1444) -1488 = NAND(935, 1446) -1489 = NAND(943, 1448) -1490 = NOT(1419) -1491 = NOT(1416) -1492 = NAND(947, 1452) -1493 = NAND(955, 1454) -1494 = NAND(951, 1456) -1495 = NAND(969, 1458) -1496 = NAND(977, 1460) -1498 = NAND(998, 1463) -1499 = NOT(1440) -1500 = NAND(965, 1468) -1501 = NAND(973, 1470) -1504 = NAND(994, 1475) -1510 = NOT(1464) -1513 = NAND(1443, 1487) -1514 = NAND(1445, 1488) -1517 = NAND(1447, 1489) -1520 = NAND(1451, 1492) -1521 = NAND(1453, 1493) -1522 = NAND(1455, 1494) -1526 = NAND(1457, 1495) -1527 = NAND(1459, 1496) -1528 = NOT(1472) -1529 = NAND(1462, 1498) -1530 = NOT(1478) -1531 = NOT(1481) -1532 = NOT(1484) -1534 = NAND(1471, 1501) -1537 = NAND(1469, 1500) -1540 = NAND(1476, 1504) -1546 = NOT(1513) -1554 = NOT(1521) -1557 = NOT(1526) -1561 = NOT(1520) -1567 = NAND(1484, 1531) -1568 = NAND(1481, 1532) -1569 = NOT(1510) -1571 = NOT(1527) -1576 = NOT(1529) -1588 = BUFF(1522) -1591 = NOT(1534) -1593 = NOT(1537) -1594 = NAND(1540, 1530) -1595 = NOT(1540) -1596 = NAND(1567, 1568) -1600 = BUFF(1517) -1603 = BUFF(1517) -1606 = BUFF(1522) -1609 = BUFF(1522) -1612 = BUFF(1514) -1615 = BUFF(1514) -1620 = BUFF(1557) -1623 = BUFF(1554) -1635 = NOT(1571) -1636 = NAND(1478, 1595) -1638 = NAND(1576, 1569) -1639 = NOT(1576) -1640 = BUFF(1561) -1643 = BUFF(1561) -1647 = BUFF(1546) -1651 = BUFF(1546) -1658 = BUFF(1554) -1661 = BUFF(1557) -1664 = BUFF(1557) -1671 = NAND(1596, 893) -1672 = NOT(1596) -1675 = NOT(1600) -1677 = NOT(1603) -1678 = NAND(1606, 1217) -1679 = NOT(1606) -1680 = NAND(1609, 1219) -1681 = NOT(1609) -1682 = NOT(1612) -1683 = NOT(1615) -1685 = NAND(1594, 1636) -1688 = NAND(1510, 1639) -1697 = BUFF(1588) -1701 = BUFF(1588) -1706 = NAND(643, 1672) -1707 = NOT(1643) -1708 = NAND(1647, 1675) -1709 = NOT(1647) -1710 = NAND(1651, 1677) -1711 = NOT(1651) -1712 = NAND(1028, 1679) -1713 = NAND(1031, 1681) -1714 = BUFF(1620) -1717 = BUFF(1620) -1720 = NAND(1658, 1593) -1721 = NOT(1658) -1723 = NAND(1638, 1688) -1727 = NOT(1661) -1728 = NOT(1640) -1730 = NOT(1664) -1731 = BUFF(1623) -1734 = BUFF(1623) -1740 = NAND(1685, 1528) -1741 = NOT(1685) -1742 = NAND(1671, 1706) -1746 = NAND(1600, 1709) -1747 = NAND(1603, 1711) -1748 = NAND(1678, 1712) -1751 = NAND(1680, 1713) -1759 = NAND(1537, 1721) -1761 = NOT(1697) -1762 = NAND(1697, 1727) -1763 = NOT(1701) -1764 = NAND(1701, 1730) -1768 = NOT(1717) -1769 = NAND(1472, 1741) -1772 = NAND(1723, 1413) -1773 = NOT(1723) -1774 = NAND(1708, 1746) -1777 = NAND(1710, 1747) -1783 = NOT(1731) -1784 = NAND(1731, 1682) -1785 = NOT(1714) -1786 = NOT(1734) -1787 = NAND(1734, 1683) -1788 = NAND(1720, 1759) -1791 = NAND(1661, 1761) -1792 = NAND(1664, 1763) -1795 = NAND(1751, 1155) -1796 = NOT(1751) -1798 = NAND(1740, 1769) -1801 = NAND(1334, 1773) -1802 = NAND(1742, 290) -1807 = NOT(1748) -1808 = NAND(1748, 1218) -1809 = NAND(1612, 1783) -1810 = NAND(1615, 1786) -1812 = NAND(1791, 1762) -1815 = NAND(1792, 1764) -1818 = BUFF(1742) -1821 = NAND(1777, 1490) -1822 = NOT(1777) -1823 = NAND(1774, 1491) -1824 = NOT(1774) -1825 = NAND(962, 1796) -1826 = NAND(1788, 1409) -1827 = NOT(1788) -1830 = NAND(1772, 1801) -1837 = NAND(959, 1807) -1838 = NAND(1809, 1784) -1841 = NAND(1810, 1787) -1848 = NAND(1419, 1822) -1849 = NAND(1416, 1824) -1850 = NAND(1795, 1825) -1852 = NAND(1319, 1827) -1855 = NAND(1815, 1707) -1856 = NOT(1815) -1857 = NOT(1818) -1858 = NAND(1798, 290) -1864 = NOT(1812) -1865 = NAND(1812, 1728) -1866 = BUFF(1798) -1869 = BUFF(1802) -1872 = BUFF(1802) -1875 = NAND(1808, 1837) -1878 = NAND(1821, 1848) -1879 = NAND(1823, 1849) -1882 = NAND(1841, 1768) -1883 = NOT(1841) -1884 = NAND(1826, 1852) -1885 = NAND(1643, 1856) -1889 = NAND(1830, 290) -1895 = NOT(1838) -1896 = NAND(1838, 1785) -1897 = NAND(1640, 1864) -1898 = NOT(1850) -1902 = BUFF(1830) -1910 = NOT(1878) -1911 = NAND(1717, 1883) -1912 = NOT(1884) -1913 = NAND(1855, 1885) -1915 = NOT(1866) -1919 = NAND(1872, 919) -1920 = NOT(1872) -1921 = NAND(1869, 920) -1922 = NOT(1869) -1923 = NOT(1875) -1924 = NAND(1714, 1895) -1927 = BUFF(1858) -1930 = BUFF(1858) -1933 = NAND(1865, 1897) -1936 = NAND(1882, 1911) -1937 = NOT(1898) -1938 = NOT(1902) -1941 = NAND(679, 1920) -1942 = NAND(676, 1922) -1944 = BUFF(1879) -1947 = NOT(1913) -1950 = BUFF(1889) -1953 = BUFF(1889) -1958 = BUFF(1879) -1961 = NAND(1896, 1924) -1965 = AND(1910, 601) -1968 = AND(602, 1912) -1975 = NAND(1930, 917) -1976 = NOT(1930) -1977 = NAND(1927, 918) -1978 = NOT(1927) -1979 = NAND(1919, 1941) -1980 = NAND(1921, 1942) -1985 = NOT(1933) -1987 = NOT(1936) -1999 = NOT(1944) -2000 = NAND(1944, 1937) -2002 = NOT(1947) -2003 = NAND(1947, 1499) -2004 = NAND(1953, 1350) -2005 = NOT(1953) -2006 = NAND(1950, 1351) -2007 = NOT(1950) -2008 = NAND(673, 1976) -2009 = NAND(670, 1978) -2012 = NOT(1979) -2013 = NOT(1958) -2014 = NAND(1958, 1923) -2015 = NOT(1961) -2016 = NAND(1961, 1635) -2018 = NOT(1965) -2019 = NOT(1968) -2020 = NAND(1898, 1999) -2021 = NOT(1987) -2022 = NAND(1987, 1591) -2023 = NAND(1440, 2002) -2024 = NAND(1261, 2005) -2025 = NAND(1258, 2007) -2026 = NAND(1975, 2008) -2027 = NAND(1977, 2009) -2030 = NOT(1980) -2033 = BUFF(1980) -2036 = NAND(1875, 2013) -2037 = NAND(1571, 2015) -2038 = NAND(2020, 2000) -2039 = NAND(1534, 2021) -2040 = NAND(2023, 2003) -2041 = NAND(2004, 2024) -2042 = NAND(2006, 2025) -2047 = NOT(2026) -2052 = NAND(2036, 2014) -2055 = NAND(2037, 2016) -2060 = NOT(2038) -2061 = NAND(2039, 2022) -2062 = NAND(2040, 290) -2067 = NOT(2041) -2068 = NOT(2027) -2071 = BUFF(2027) -2076 = NOT(2052) -2077 = NOT(2055) -2078 = NAND(2060, 290) -2081 = NAND(2061, 290) -2086 = NOT(2042) -2089 = BUFF(2042) -2104 = AND(2030, 2068) -2119 = AND(2033, 2068) -2129 = AND(2030, 2071) -2143 = AND(2033, 2071) -2148 = BUFF(2062) -2151 = BUFF(2062) -2196 = BUFF(2078) -2199 = BUFF(2078) -2202 = BUFF(2081) -2205 = BUFF(2081) -2214 = NAND(2151, 915) -2215 = NOT(2151) -2216 = NAND(2148, 916) -2217 = NOT(2148) -2222 = NAND(2199, 1348) -2223 = NOT(2199) -2224 = NAND(2196, 1349) -2225 = NOT(2196) -2226 = NAND(2205, 913) -2227 = NOT(2205) -2228 = NAND(2202, 914) -2229 = NOT(2202) -2230 = NAND(667, 2215) -2231 = NAND(664, 2217) -2232 = NAND(1255, 2223) -2233 = NAND(1252, 2225) -2234 = NAND(661, 2227) -2235 = NAND(658, 2229) -2236 = NAND(2214, 2230) -2237 = NAND(2216, 2231) -2240 = NAND(2222, 2232) -2241 = NAND(2224, 2233) -2244 = NAND(2226, 2234) -2245 = NAND(2228, 2235) -2250 = NOT(2236) -2253 = NOT(2240) -2256 = NOT(2244) -2257 = NOT(2237) -2260 = BUFF(2237) -2263 = NOT(2241) -2266 = AND(1164, 2241) -2269 = NOT(2245) -2272 = AND(1168, 2245) -2279 = NAND(2067, 2012, 2047, 2250, 899, 2256, 2253, 903) -2286 = BUFF(2266) -2297 = BUFF(2266) -2315 = BUFF(2272) -2326 = BUFF(2272) -2340 = AND(2086, 2257) -2353 = AND(2089, 2257) -2361 = AND(2086, 2260) -2375 = AND(2089, 2260) -2384 = AND(338, 2279, 313, 313) -2385 = AND(1163, 2263) -2386 = AND(1164, 2263) -2426 = AND(1167, 2269) -2427 = AND(1168, 2269) -2537 = NAND(2286, 2315, 2361, 2104, 1171) -2540 = NAND(2286, 2315, 2340, 2129, 1171) -2543 = NAND(2286, 2315, 2340, 2119, 1171) -2546 = NAND(2286, 2315, 2353, 2104, 1171) -2549 = NAND(2297, 2315, 2375, 2119, 1188) -2552 = NAND(2297, 2326, 2361, 2143, 1188) -2555 = NAND(2297, 2326, 2375, 2129, 1188) -2558 = AND(2286, 2315, 2361, 2104, 1171) -2561 = AND(2286, 2315, 2340, 2129, 1171) -2564 = AND(2286, 2315, 2340, 2119, 1171) -2567 = AND(2286, 2315, 2353, 2104, 1171) -2570 = AND(2297, 2315, 2375, 2119, 1188) -2573 = AND(2297, 2326, 2361, 2143, 1188) -2576 = AND(2297, 2326, 2375, 2129, 1188) -2594 = NAND(2286, 2427, 2361, 2129, 1171) -2597 = NAND(2297, 2427, 2361, 2119, 1171) -2600 = NAND(2297, 2427, 2375, 2104, 1171) -2603 = NAND(2297, 2427, 2340, 2143, 1171) -2606 = NAND(2297, 2427, 2353, 2129, 1188) -2611 = NAND(2386, 2326, 2361, 2129, 1188) -2614 = NAND(2386, 2326, 2361, 2119, 1188) -2617 = NAND(2386, 2326, 2375, 2104, 1188) -2620 = NAND(2386, 2326, 2353, 2129, 1188) -2627 = NAND(2297, 2427, 2340, 2104, 926) -2628 = NAND(2386, 2326, 2340, 2104, 926) -2629 = NAND(2386, 2427, 2361, 2104, 926) -2630 = NAND(2386, 2427, 2340, 2129, 926) -2631 = NAND(2386, 2427, 2340, 2119, 926) -2632 = NAND(2386, 2427, 2353, 2104, 926) -2633 = NAND(2386, 2426, 2340, 2104, 926) -2634 = NAND(2385, 2427, 2340, 2104, 926) -2639 = AND(2286, 2427, 2361, 2129, 1171) -2642 = AND(2297, 2427, 2361, 2119, 1171) -2645 = AND(2297, 2427, 2375, 2104, 1171) -2648 = AND(2297, 2427, 2340, 2143, 1171) -2651 = AND(2297, 2427, 2353, 2129, 1188) -2655 = AND(2386, 2326, 2361, 2129, 1188) -2658 = AND(2386, 2326, 2361, 2119, 1188) -2661 = AND(2386, 2326, 2375, 2104, 1188) -2664 = AND(2386, 2326, 2353, 2129, 1188) -2669 = NAND(2558, 534) -2670 = NOT(2558) -2671 = NAND(2561, 535) -2672 = NOT(2561) -2673 = NAND(2564, 536) -2674 = NOT(2564) -2675 = NAND(2567, 537) -2676 = NOT(2567) -2682 = NAND(2570, 543) -2683 = NOT(2570) -2688 = NAND(2573, 548) -2689 = NOT(2573) -2690 = NAND(2576, 549) -2691 = NOT(2576) -2710 = AND(2627, 2628, 2629, 2630, 2631, 2632, 2633, 2634) -2720 = NAND(343, 2670) -2721 = NAND(346, 2672) -2722 = NAND(349, 2674) -2723 = NAND(352, 2676) -2724 = NAND(2639, 538) -2725 = NOT(2639) -2726 = NAND(2642, 539) -2727 = NOT(2642) -2728 = NAND(2645, 540) -2729 = NOT(2645) -2730 = NAND(2648, 541) -2731 = NOT(2648) -2732 = NAND(2651, 542) -2733 = NOT(2651) -2734 = NAND(370, 2683) -2735 = NAND(2655, 544) -2736 = NOT(2655) -2737 = NAND(2658, 545) -2738 = NOT(2658) -2739 = NAND(2661, 546) -2740 = NOT(2661) -2741 = NAND(2664, 547) -2742 = NOT(2664) -2743 = NAND(385, 2689) -2744 = NAND(388, 2691) -2745 = NAND(2537, 2540, 2543, 2546, 2594, 2597, 2600, 2603) -2746 = NAND(2606, 2549, 2611, 2614, 2617, 2620, 2552, 2555) -2747 = AND(2537, 2540, 2543, 2546, 2594, 2597, 2600, 2603) -2750 = AND(2606, 2549, 2611, 2614, 2617, 2620, 2552, 2555) -2753 = NAND(2669, 2720) -2754 = NAND(2671, 2721) -2755 = NAND(2673, 2722) -2756 = NAND(2675, 2723) -2757 = NAND(355, 2725) -2758 = NAND(358, 2727) -2759 = NAND(361, 2729) -2760 = NAND(364, 2731) -2761 = NAND(367, 2733) -2762 = NAND(2682, 2734) -2763 = NAND(373, 2736) -2764 = NAND(376, 2738) -2765 = NAND(379, 2740) -2766 = NAND(382, 2742) -2767 = NAND(2688, 2743) -2768 = NAND(2690, 2744) -2773 = AND(2745, 275) -2776 = AND(2746, 276) -2779 = NAND(2724, 2757) -2780 = NAND(2726, 2758) -2781 = NAND(2728, 2759) -2782 = NAND(2730, 2760) -2783 = NAND(2732, 2761) -2784 = NAND(2735, 2763) -2785 = NAND(2737, 2764) -2786 = NAND(2739, 2765) -2787 = NAND(2741, 2766) -2788 = AND(2747, 2750, 2710) -2789 = NAND(2747, 2750) -2800 = AND(338, 2279, 99, 2788) -2807 = NAND(2773, 2018) -2808 = NOT(2773) -2809 = NAND(2776, 2019) -2810 = NOT(2776) -2811 = NOR(2384, 2800) -2812 = AND(897, 283, 2789) -2815 = AND(76, 283, 2789) -2818 = AND(82, 283, 2789) -2821 = AND(85, 283, 2789) -2824 = AND(898, 283, 2789) -2827 = NAND(1965, 2808) -2828 = NAND(1968, 2810) -2829 = AND(79, 283, 2789) -2843 = NAND(2807, 2827) -2846 = NAND(2809, 2828) -2850 = NAND(2812, 2076) -2851 = NAND(2815, 2077) -2852 = NAND(2818, 1915) -2853 = NAND(2821, 1857) -2854 = NAND(2824, 1938) -2857 = NOT(2812) -2858 = NOT(2815) -2859 = NOT(2818) -2860 = NOT(2821) -2861 = NOT(2824) -2862 = NOT(2829) -2863 = NAND(2829, 1985) -2866 = NAND(2052, 2857) -2867 = NAND(2055, 2858) -2868 = NAND(1866, 2859) -2869 = NAND(1818, 2860) -2870 = NAND(1902, 2861) -2871 = NAND(2843, 886) -2872 = NOT(2843) -2873 = NAND(2846, 887) -2874 = NOT(2846) -2875 = NAND(1933, 2862) -2876 = NAND(2866, 2850) -2877 = NAND(2867, 2851) -2878 = NAND(2868, 2852) -2879 = NAND(2869, 2853) -2880 = NAND(2870, 2854) -2881 = NAND(682, 2872) -2882 = NAND(685, 2874) -2883 = NAND(2875, 2863) -2886 = AND(2876, 550) -2887 = AND(551, 2877) -2888 = AND(553, 2878) -2889 = AND(2879, 554) -2890 = AND(555, 2880) -2891 = NAND(2871, 2881) -2892 = NAND(2873, 2882) -2895 = NAND(2883, 1461) -2896 = NOT(2883) -2897 = NAND(1383, 2896) -2898 = NAND(2895, 2897) -2899 = AND(2898, 552) diff --git a/bench_test/c3540.bench b/bench_test/c3540.bench deleted file mode 100644 index 12a91f3..0000000 --- a/bench_test/c3540.bench +++ /dev/null @@ -1,1745 +0,0 @@ -# c3540 - -INPUT(1) -INPUT(13) -INPUT(20) -INPUT(33) -INPUT(41) -INPUT(45) -INPUT(50) -INPUT(58) -INPUT(68) -INPUT(77) -INPUT(87) -INPUT(97) -INPUT(107) -INPUT(116) -INPUT(124) -INPUT(125) -INPUT(128) -INPUT(132) -INPUT(137) -INPUT(143) -INPUT(150) -INPUT(159) -INPUT(169) -INPUT(179) -INPUT(190) -INPUT(200) -INPUT(213) -INPUT(222) -INPUT(223) -INPUT(226) -INPUT(232) -INPUT(238) -INPUT(244) -INPUT(250) -INPUT(257) -INPUT(264) -INPUT(270) -INPUT(274) -INPUT(283) -INPUT(294) -INPUT(303) -INPUT(311) -INPUT(317) -INPUT(322) -INPUT(326) -INPUT(329) -INPUT(330) -INPUT(343) -INPUT(349) -INPUT(350) - -OUTPUT(1713) -OUTPUT(1947) -OUTPUT(3195) -OUTPUT(3833) -OUTPUT(3987) -OUTPUT(4028) -OUTPUT(4145) -OUTPUT(4589) -OUTPUT(4667) -OUTPUT(4815) -OUTPUT(4944) -OUTPUT(5002) -OUTPUT(5045) -OUTPUT(5047) -OUTPUT(5078) -OUTPUT(5102) -OUTPUT(5120) -OUTPUT(5121) -OUTPUT(5192) -OUTPUT(5231) -OUTPUT(5360) -OUTPUT(5361) - -655 = BUFF(50) -665 = NOT(50) -670 = BUFF(58) -679 = NOT(58) -683 = BUFF(68) -686 = NOT(68) -690 = BUFF(68) -699 = BUFF(77) -702 = NOT(77) -706 = BUFF(77) -715 = BUFF(87) -724 = NOT(87) -727 = BUFF(97) -736 = NOT(97) -740 = BUFF(107) -749 = NOT(107) -753 = BUFF(116) -763 = NOT(116) -768 = OR(257, 264) -769 = NOT(1) -772 = BUFF(1) -779 = NOT(1) -782 = BUFF(13) -786 = NOT(13) -793 = AND(13, 20) -794 = NOT(20) -798 = BUFF(20) -803 = NOT(20) -820 = NOT(33) -821 = BUFF(33) -825 = NOT(33) -829 = AND(33, 41) -832 = NOT(41) -835 = OR(41, 45) -836 = BUFF(45) -839 = NOT(45) -842 = NOT(50) -845 = BUFF(58) -848 = NOT(58) -851 = BUFF(68) -854 = NOT(68) -858 = BUFF(87) -861 = NOT(87) -864 = BUFF(97) -867 = NOT(97) -870 = NOT(107) -874 = BUFF(1) -877 = BUFF(68) -880 = BUFF(107) -883 = NOT(20) -886 = BUFF(190) -889 = NOT(200) -890 = AND(20, 200) -891 = NAND(20, 200) -892 = AND(20, 179) -895 = NOT(20) -896 = OR(349, 33) -913 = NAND(1, 13) -914 = NAND(1, 20, 33) -915 = NOT(20) -916 = NOT(33) -917 = BUFF(179) -920 = NOT(213) -923 = BUFF(343) -926 = BUFF(226) -929 = BUFF(232) -932 = BUFF(238) -935 = BUFF(244) -938 = BUFF(250) -941 = BUFF(257) -944 = BUFF(264) -947 = BUFF(270) -950 = BUFF(50) -953 = BUFF(58) -956 = BUFF(58) -959 = BUFF(97) -962 = BUFF(97) -965 = BUFF(330) -1067 = AND(250, 768) -1117 = OR(820, 20) -1179 = OR(895, 169) -1196 = NOT(793) -1197 = OR(915, 1) -1202 = AND(913, 914) -1219 = OR(916, 1) -1250 = AND(842, 848, 854) -1251 = NAND(226, 655) -1252 = NAND(232, 670) -1253 = NAND(238, 690) -1254 = NAND(244, 706) -1255 = NAND(250, 715) -1256 = NAND(257, 727) -1257 = NAND(264, 740) -1258 = NAND(270, 753) -1259 = NOT(926) -1260 = NOT(929) -1261 = NOT(932) -1262 = NOT(935) -1263 = NAND(679, 686) -1264 = NAND(736, 749) -1267 = NAND(683, 699) -1268 = BUFF(665) -1271 = NOT(953) -1272 = NOT(959) -1273 = BUFF(839) -1276 = BUFF(839) -1279 = BUFF(782) -1298 = BUFF(825) -1302 = BUFF(832) -1306 = AND(779, 835) -1315 = AND(779, 836, 832) -1322 = AND(769, 836) -1325 = AND(772, 786, 798) -1328 = NAND(772, 786, 798) -1331 = NAND(772, 786) -1334 = BUFF(874) -1337 = NAND(782, 794, 45) -1338 = NAND(842, 848, 854) -1339 = NOT(956) -1340 = AND(861, 867, 870) -1343 = NAND(861, 867, 870) -1344 = NOT(962) -1345 = NOT(803) -1346 = NOT(803) -1347 = NOT(803) -1348 = NOT(803) -1349 = NOT(803) -1350 = NOT(803) -1351 = NOT(803) -1352 = NOT(803) -1353 = OR(883, 886) -1358 = NOR(883, 886) -1363 = BUFF(892) -1366 = NOT(892) -1369 = BUFF(821) -1384 = BUFF(825) -1401 = NOT(896) -1402 = NOT(896) -1403 = NOT(896) -1404 = NOT(896) -1405 = NOT(896) -1406 = NOT(896) -1407 = NOT(896) -1408 = NOT(896) -1409 = OR(1, 1196) -1426 = NOT(829) -1427 = NOT(829) -1452 = AND(769, 782, 794) -1459 = NOT(917) -1460 = NOT(965) -1461 = OR(920, 923) -1464 = NOR(920, 923) -1467 = NOT(938) -1468 = NOT(941) -1469 = NOT(944) -1470 = NOT(947) -1471 = BUFF(679) -1474 = NOT(950) -1475 = BUFF(686) -1478 = BUFF(702) -1481 = BUFF(724) -1484 = BUFF(736) -1487 = BUFF(749) -1490 = BUFF(763) -1493 = BUFF(877) -1496 = BUFF(877) -1499 = BUFF(880) -1502 = BUFF(880) -1505 = NAND(702, 1250) -1507 = AND(1251, 1252, 1253, 1254) -1508 = AND(1255, 1256, 1257, 1258) -1509 = NAND(929, 1259) -1510 = NAND(926, 1260) -1511 = NAND(935, 1261) -1512 = NAND(932, 1262) -1520 = AND(655, 1263) -1562 = AND(874, 1337) -1579 = NOT(1117) -1580 = AND(803, 1117) -1581 = AND(1338, 1345) -1582 = NOT(1117) -1583 = AND(803, 1117) -1584 = NOT(1117) -1585 = AND(803, 1117) -1586 = AND(854, 1347) -1587 = NOT(1117) -1588 = AND(803, 1117) -1589 = AND(77, 1348) -1590 = NOT(1117) -1591 = AND(803, 1117) -1592 = AND(1343, 1349) -1593 = NOT(1117) -1594 = AND(803, 1117) -1595 = NOT(1117) -1596 = AND(803, 1117) -1597 = AND(870, 1351) -1598 = NOT(1117) -1599 = AND(803, 1117) -1600 = AND(116, 1352) -1643 = AND(222, 1401) -1644 = AND(223, 1402) -1645 = AND(226, 1403) -1646 = AND(232, 1404) -1647 = AND(238, 1405) -1648 = AND(244, 1406) -1649 = AND(250, 1407) -1650 = AND(257, 1408) -1667 = AND(1, 13, 1426) -1670 = AND(1, 13, 1427) -1673 = NOT(1202) -1674 = NOT(1202) -1675 = NOT(1202) -1676 = NOT(1202) -1677 = NOT(1202) -1678 = NOT(1202) -1679 = NOT(1202) -1680 = NOT(1202) -1691 = NAND(941, 1467) -1692 = NAND(938, 1468) -1693 = NAND(947, 1469) -1694 = NAND(944, 1470) -1713 = NOT(1505) -1714 = AND(87, 1264) -1715 = NAND(1509, 1510) -1718 = NAND(1511, 1512) -1721 = NAND(1507, 1508) -1722 = AND(763, 1340) -1725 = NAND(763, 1340) -1726 = NOT(1268) -1727 = NAND(1493, 1271) -1728 = NOT(1493) -1729 = AND(683, 1268) -1730 = NAND(1499, 1272) -1731 = NOT(1499) -1735 = NAND(87, 1264) -1736 = NOT(1273) -1737 = NOT(1276) -1738 = NAND(1325, 821) -1747 = NAND(1325, 825) -1756 = NAND(772, 1279, 798) -1761 = NAND(772, 786, 798, 1302) -1764 = NAND(1496, 1339) -1765 = NOT(1496) -1766 = NAND(1502, 1344) -1767 = NOT(1502) -1768 = NOT(1328) -1769 = NOT(1334) -1770 = NOT(1331) -1787 = AND(845, 1579) -1788 = AND(150, 1580) -1789 = AND(851, 1582) -1790 = AND(159, 1583) -1791 = AND(77, 1584) -1792 = AND(50, 1585) -1793 = AND(858, 1587) -1794 = AND(845, 1588) -1795 = AND(864, 1590) -1796 = AND(851, 1591) -1797 = AND(107, 1593) -1798 = AND(77, 1594) -1799 = AND(116, 1595) -1800 = AND(858, 1596) -1801 = AND(283, 1598) -1802 = AND(864, 1599) -1803 = AND(200, 1363) -1806 = AND(889, 1363) -1809 = AND(890, 1366) -1812 = AND(891, 1366) -1815 = NAND(1298, 1302) -1818 = NAND(821, 1302) -1821 = NAND(772, 1279, 1179) -1824 = NAND(786, 794, 1298) -1833 = NAND(786, 1298) -1842 = NOT(1369) -1843 = NOT(1369) -1844 = NOT(1369) -1845 = NOT(1369) -1846 = NOT(1369) -1847 = NOT(1369) -1848 = NOT(1369) -1849 = NOT(1384) -1850 = AND(1384, 896) -1851 = NOT(1384) -1852 = AND(1384, 896) -1853 = NOT(1384) -1854 = AND(1384, 896) -1855 = NOT(1384) -1856 = AND(1384, 896) -1857 = NOT(1384) -1858 = AND(1384, 896) -1859 = NOT(1384) -1860 = AND(1384, 896) -1861 = NOT(1384) -1862 = AND(1384, 896) -1863 = NOT(1384) -1864 = AND(1384, 896) -1869 = AND(1202, 1409) -1870 = NOR(50, 1409) -1873 = NOT(1306) -1874 = AND(1202, 1409) -1875 = NOR(58, 1409) -1878 = NOT(1306) -1879 = AND(1202, 1409) -1880 = NOR(68, 1409) -1883 = NOT(1306) -1884 = AND(1202, 1409) -1885 = NOR(77, 1409) -1888 = NOT(1306) -1889 = AND(1202, 1409) -1890 = NOR(87, 1409) -1893 = NOT(1322) -1894 = AND(1202, 1409) -1895 = NOR(97, 1409) -1898 = NOT(1315) -1899 = AND(1202, 1409) -1900 = NOR(107, 1409) -1903 = NOT(1315) -1904 = AND(1202, 1409) -1905 = NOR(116, 1409) -1908 = NOT(1315) -1909 = AND(1452, 213) -1912 = NAND(1452, 213) -1913 = AND(1452, 213, 343) -1917 = NAND(1452, 213, 343) -1922 = AND(1452, 213, 343) -1926 = NAND(1452, 213, 343) -1930 = BUFF(1464) -1933 = NAND(1691, 1692) -1936 = NAND(1693, 1694) -1939 = NOT(1471) -1940 = NAND(1471, 1474) -1941 = NOT(1475) -1942 = NOT(1478) -1943 = NOT(1481) -1944 = NOT(1484) -1945 = NOT(1487) -1946 = NOT(1490) -1947 = NOT(1714) -1960 = NAND(953, 1728) -1961 = NAND(959, 1731) -1966 = AND(1520, 1276) -1981 = NAND(956, 1765) -1982 = NAND(962, 1767) -1983 = AND(1067, 1768) -1986 = OR(1581, 1787, 1788) -1987 = OR(1586, 1791, 1792) -1988 = OR(1589, 1793, 1794) -1989 = OR(1592, 1795, 1796) -1990 = OR(1597, 1799, 1800) -1991 = OR(1600, 1801, 1802) -2022 = AND(77, 1849) -2023 = AND(223, 1850) -2024 = AND(87, 1851) -2025 = AND(226, 1852) -2026 = AND(97, 1853) -2027 = AND(232, 1854) -2028 = AND(107, 1855) -2029 = AND(238, 1856) -2030 = AND(116, 1857) -2031 = AND(244, 1858) -2032 = AND(283, 1859) -2033 = AND(250, 1860) -2034 = AND(294, 1861) -2035 = AND(257, 1862) -2036 = AND(303, 1863) -2037 = AND(264, 1864) -2038 = BUFF(1667) -2043 = NOT(1667) -2052 = BUFF(1670) -2057 = NOT(1670) -2068 = AND(50, 1197, 1869) -2073 = AND(58, 1197, 1874) -2078 = AND(68, 1197, 1879) -2083 = AND(77, 1197, 1884) -2088 = AND(87, 1219, 1889) -2093 = AND(97, 1219, 1894) -2098 = AND(107, 1219, 1899) -2103 = AND(116, 1219, 1904) -2121 = NOT(1562) -2122 = NOT(1562) -2123 = NOT(1562) -2124 = NOT(1562) -2125 = NOT(1562) -2126 = NOT(1562) -2127 = NOT(1562) -2128 = NOT(1562) -2133 = NAND(950, 1939) -2134 = NAND(1478, 1941) -2135 = NAND(1475, 1942) -2136 = NAND(1484, 1943) -2137 = NAND(1481, 1944) -2138 = NAND(1490, 1945) -2139 = NAND(1487, 1946) -2141 = NOT(1933) -2142 = NOT(1936) -2143 = NOT(1738) -2144 = AND(1738, 1747) -2145 = NOT(1747) -2146 = NAND(1727, 1960) -2147 = NAND(1730, 1961) -2148 = AND(1722, 1267, 665, 58) -2149 = NOT(1738) -2150 = AND(1738, 1747) -2151 = NOT(1747) -2152 = NOT(1738) -2153 = NOT(1747) -2154 = AND(1738, 1747) -2155 = NOT(1738) -2156 = NOT(1747) -2157 = AND(1738, 1747) -2158 = BUFF(1761) -2175 = BUFF(1761) -2178 = NAND(1764, 1981) -2179 = NAND(1766, 1982) -2180 = NOT(1756) -2181 = AND(1756, 1328) -2183 = NOT(1756) -2184 = AND(1331, 1756) -2185 = NAND(1358, 1812) -2188 = NAND(1358, 1809) -2191 = NAND(1353, 1812) -2194 = NAND(1353, 1809) -2197 = NAND(1358, 1806) -2200 = NAND(1358, 1803) -2203 = NAND(1353, 1806) -2206 = NAND(1353, 1803) -2209 = NOT(1815) -2210 = NOT(1818) -2211 = AND(1815, 1818) -2212 = BUFF(1821) -2221 = BUFF(1821) -2230 = NOT(1833) -2231 = NOT(1833) -2232 = NOT(1833) -2233 = NOT(1833) -2234 = NOT(1824) -2235 = NOT(1824) -2236 = NOT(1824) -2237 = NOT(1824) -2238 = OR(2022, 1643, 2023) -2239 = OR(2024, 1644, 2025) -2240 = OR(2026, 1645, 2027) -2241 = OR(2028, 1646, 2029) -2242 = OR(2030, 1647, 2031) -2243 = OR(2032, 1648, 2033) -2244 = OR(2034, 1649, 2035) -2245 = OR(2036, 1650, 2037) -2270 = AND(1986, 1673) -2277 = AND(1987, 1675) -2282 = AND(1988, 1676) -2287 = AND(1989, 1677) -2294 = AND(1990, 1679) -2299 = AND(1991, 1680) -2304 = BUFF(1917) -2307 = AND(1930, 350) -2310 = NAND(1930, 350) -2313 = BUFF(1715) -2316 = BUFF(1718) -2319 = BUFF(1715) -2322 = BUFF(1718) -2325 = NAND(1940, 2133) -2328 = NAND(2134, 2135) -2331 = NAND(2136, 2137) -2334 = NAND(2138, 2139) -2341 = NAND(1936, 2141) -2342 = NAND(1933, 2142) -2347 = AND(724, 2144) -2348 = AND(2146, 699, 1726) -2349 = AND(753, 2147) -2350 = AND(2148, 1273) -2351 = AND(736, 2150) -2352 = AND(1735, 2153) -2353 = AND(763, 2154) -2354 = AND(1725, 2156) -2355 = AND(749, 2157) -2374 = NOT(2178) -2375 = NOT(2179) -2376 = AND(1520, 2180) -2379 = AND(1721, 2181) -2398 = AND(665, 2211) -2417 = AND(2057, 226, 1873) -2418 = AND(2057, 274, 1306) -2419 = AND(2052, 2238) -2420 = AND(2057, 232, 1878) -2421 = AND(2057, 274, 1306) -2422 = AND(2052, 2239) -2425 = AND(2057, 238, 1883) -2426 = AND(2057, 274, 1306) -2427 = AND(2052, 2240) -2430 = AND(2057, 244, 1888) -2431 = AND(2057, 274, 1306) -2432 = AND(2052, 2241) -2435 = AND(2043, 250, 1893) -2436 = AND(2043, 274, 1322) -2437 = AND(2038, 2242) -2438 = AND(2043, 257, 1898) -2439 = AND(2043, 274, 1315) -2440 = AND(2038, 2243) -2443 = AND(2043, 264, 1903) -2444 = AND(2043, 274, 1315) -2445 = AND(2038, 2244) -2448 = AND(2043, 270, 1908) -2449 = AND(2043, 274, 1315) -2450 = AND(2038, 2245) -2467 = NOT(2313) -2468 = NOT(2316) -2469 = NOT(2319) -2470 = NOT(2322) -2471 = NAND(2341, 2342) -2474 = NOT(2325) -2475 = NOT(2328) -2476 = NOT(2331) -2477 = NOT(2334) -2478 = OR(2348, 1729) -2481 = NOT(2175) -2482 = AND(2175, 1334) -2483 = AND(2349, 2183) -2486 = AND(2374, 1346) -2487 = AND(2375, 1350) -2488 = BUFF(2185) -2497 = BUFF(2188) -2506 = BUFF(2191) -2515 = BUFF(2194) -2524 = BUFF(2197) -2533 = BUFF(2200) -2542 = BUFF(2203) -2551 = BUFF(2206) -2560 = BUFF(2185) -2569 = BUFF(2188) -2578 = BUFF(2191) -2587 = BUFF(2194) -2596 = BUFF(2197) -2605 = BUFF(2200) -2614 = BUFF(2203) -2623 = BUFF(2206) -2632 = NOT(2212) -2633 = AND(2212, 1833) -2634 = NOT(2212) -2635 = AND(2212, 1833) -2636 = NOT(2212) -2637 = AND(2212, 1833) -2638 = NOT(2212) -2639 = AND(2212, 1833) -2640 = NOT(2221) -2641 = AND(2221, 1824) -2642 = NOT(2221) -2643 = AND(2221, 1824) -2644 = NOT(2221) -2645 = AND(2221, 1824) -2646 = NOT(2221) -2647 = AND(2221, 1824) -2648 = OR(2270, 1870, 2068) -2652 = NOR(2270, 1870, 2068) -2656 = OR(2417, 2418, 2419) -2659 = OR(2420, 2421, 2422) -2662 = OR(2277, 1880, 2078) -2666 = NOR(2277, 1880, 2078) -2670 = OR(2425, 2426, 2427) -2673 = OR(2282, 1885, 2083) -2677 = NOR(2282, 1885, 2083) -2681 = OR(2430, 2431, 2432) -2684 = OR(2287, 1890, 2088) -2688 = NOR(2287, 1890, 2088) -2692 = OR(2435, 2436, 2437) -2697 = OR(2438, 2439, 2440) -2702 = OR(2294, 1900, 2098) -2706 = NOR(2294, 1900, 2098) -2710 = OR(2443, 2444, 2445) -2715 = OR(2299, 1905, 2103) -2719 = NOR(2299, 1905, 2103) -2723 = OR(2448, 2449, 2450) -2728 = NOT(2304) -2729 = NOT(2158) -2730 = AND(1562, 2158) -2731 = NOT(2158) -2732 = AND(1562, 2158) -2733 = NOT(2158) -2734 = AND(1562, 2158) -2735 = NOT(2158) -2736 = AND(1562, 2158) -2737 = NOT(2158) -2738 = AND(1562, 2158) -2739 = NOT(2158) -2740 = AND(1562, 2158) -2741 = NOT(2158) -2742 = AND(1562, 2158) -2743 = NOT(2158) -2744 = AND(1562, 2158) -2745 = OR(2376, 1983, 2379) -2746 = NOR(2376, 1983, 2379) -2748 = NAND(2316, 2467) -2749 = NAND(2313, 2468) -2750 = NAND(2322, 2469) -2751 = NAND(2319, 2470) -2754 = NAND(2328, 2474) -2755 = NAND(2325, 2475) -2756 = NAND(2334, 2476) -2757 = NAND(2331, 2477) -2758 = AND(1520, 2481) -2761 = AND(1722, 2482) -2764 = AND(2478, 1770) -2768 = OR(2486, 1789, 1790) -2769 = OR(2487, 1797, 1798) -2898 = AND(665, 2633) -2899 = AND(679, 2635) -2900 = AND(686, 2637) -2901 = AND(702, 2639) -2962 = NOT(2746) -2966 = NAND(2748, 2749) -2967 = NAND(2750, 2751) -2970 = BUFF(2471) -2973 = NAND(2754, 2755) -2977 = NAND(2756, 2757) -2980 = AND(2471, 2143) -2984 = NOT(2488) -2985 = NOT(2497) -2986 = NOT(2506) -2987 = NOT(2515) -2988 = NOT(2524) -2989 = NOT(2533) -2990 = NOT(2542) -2991 = NOT(2551) -2992 = NOT(2488) -2993 = NOT(2497) -2994 = NOT(2506) -2995 = NOT(2515) -2996 = NOT(2524) -2997 = NOT(2533) -2998 = NOT(2542) -2999 = NOT(2551) -3000 = NOT(2488) -3001 = NOT(2497) -3002 = NOT(2506) -3003 = NOT(2515) -3004 = NOT(2524) -3005 = NOT(2533) -3006 = NOT(2542) -3007 = NOT(2551) -3008 = NOT(2488) -3009 = NOT(2497) -3010 = NOT(2506) -3011 = NOT(2515) -3012 = NOT(2524) -3013 = NOT(2533) -3014 = NOT(2542) -3015 = NOT(2551) -3016 = NOT(2488) -3017 = NOT(2497) -3018 = NOT(2506) -3019 = NOT(2515) -3020 = NOT(2524) -3021 = NOT(2533) -3022 = NOT(2542) -3023 = NOT(2551) -3024 = NOT(2488) -3025 = NOT(2497) -3026 = NOT(2506) -3027 = NOT(2515) -3028 = NOT(2524) -3029 = NOT(2533) -3030 = NOT(2542) -3031 = NOT(2551) -3032 = NOT(2488) -3033 = NOT(2497) -3034 = NOT(2506) -3035 = NOT(2515) -3036 = NOT(2524) -3037 = NOT(2533) -3038 = NOT(2542) -3039 = NOT(2551) -3040 = NOT(2488) -3041 = NOT(2497) -3042 = NOT(2506) -3043 = NOT(2515) -3044 = NOT(2524) -3045 = NOT(2533) -3046 = NOT(2542) -3047 = NOT(2551) -3048 = NOT(2560) -3049 = NOT(2569) -3050 = NOT(2578) -3051 = NOT(2587) -3052 = NOT(2596) -3053 = NOT(2605) -3054 = NOT(2614) -3055 = NOT(2623) -3056 = NOT(2560) -3057 = NOT(2569) -3058 = NOT(2578) -3059 = NOT(2587) -3060 = NOT(2596) -3061 = NOT(2605) -3062 = NOT(2614) -3063 = NOT(2623) -3064 = NOT(2560) -3065 = NOT(2569) -3066 = NOT(2578) -3067 = NOT(2587) -3068 = NOT(2596) -3069 = NOT(2605) -3070 = NOT(2614) -3071 = NOT(2623) -3072 = NOT(2560) -3073 = NOT(2569) -3074 = NOT(2578) -3075 = NOT(2587) -3076 = NOT(2596) -3077 = NOT(2605) -3078 = NOT(2614) -3079 = NOT(2623) -3080 = NOT(2560) -3081 = NOT(2569) -3082 = NOT(2578) -3083 = NOT(2587) -3084 = NOT(2596) -3085 = NOT(2605) -3086 = NOT(2614) -3087 = NOT(2623) -3088 = NOT(2560) -3089 = NOT(2569) -3090 = NOT(2578) -3091 = NOT(2587) -3092 = NOT(2596) -3093 = NOT(2605) -3094 = NOT(2614) -3095 = NOT(2623) -3096 = NOT(2560) -3097 = NOT(2569) -3098 = NOT(2578) -3099 = NOT(2587) -3100 = NOT(2596) -3101 = NOT(2605) -3102 = NOT(2614) -3103 = NOT(2623) -3104 = NOT(2560) -3105 = NOT(2569) -3106 = NOT(2578) -3107 = NOT(2587) -3108 = NOT(2596) -3109 = NOT(2605) -3110 = NOT(2614) -3111 = NOT(2623) -3112 = BUFF(2656) -3115 = NOT(2656) -3118 = NOT(2652) -3119 = AND(2768, 1674) -3122 = BUFF(2659) -3125 = NOT(2659) -3128 = BUFF(2670) -3131 = NOT(2670) -3134 = NOT(2666) -3135 = BUFF(2681) -3138 = NOT(2681) -3141 = NOT(2677) -3142 = BUFF(2692) -3145 = NOT(2692) -3148 = NOT(2688) -3149 = AND(2769, 1678) -3152 = BUFF(2697) -3155 = NOT(2697) -3158 = BUFF(2710) -3161 = NOT(2710) -3164 = NOT(2706) -3165 = BUFF(2723) -3168 = NOT(2723) -3171 = NOT(2719) -3172 = AND(1909, 2648) -3175 = AND(1913, 2662) -3178 = AND(1913, 2673) -3181 = AND(1913, 2684) -3184 = AND(1922, 2702) -3187 = AND(1922, 2715) -3190 = NOT(2692) -3191 = NOT(2697) -3192 = NOT(2710) -3193 = NOT(2723) -3194 = AND(2692, 2697, 2710, 2723, 1459) -3195 = NAND(2745, 2962) -3196 = NOT(2966) -3206 = OR(2980, 2145, 2347) -3207 = AND(124, 2984) -3208 = AND(159, 2985) -3209 = AND(150, 2986) -3210 = AND(143, 2987) -3211 = AND(137, 2988) -3212 = AND(132, 2989) -3213 = AND(128, 2990) -3214 = AND(125, 2991) -3215 = AND(125, 2992) -3216 = AND(655, 2993) -3217 = AND(159, 2994) -3218 = AND(150, 2995) -3219 = AND(143, 2996) -3220 = AND(137, 2997) -3221 = AND(132, 2998) -3222 = AND(128, 2999) -3223 = AND(128, 3000) -3224 = AND(670, 3001) -3225 = AND(655, 3002) -3226 = AND(159, 3003) -3227 = AND(150, 3004) -3228 = AND(143, 3005) -3229 = AND(137, 3006) -3230 = AND(132, 3007) -3231 = AND(132, 3008) -3232 = AND(690, 3009) -3233 = AND(670, 3010) -3234 = AND(655, 3011) -3235 = AND(159, 3012) -3236 = AND(150, 3013) -3237 = AND(143, 3014) -3238 = AND(137, 3015) -3239 = AND(137, 3016) -3240 = AND(706, 3017) -3241 = AND(690, 3018) -3242 = AND(670, 3019) -3243 = AND(655, 3020) -3244 = AND(159, 3021) -3245 = AND(150, 3022) -3246 = AND(143, 3023) -3247 = AND(143, 3024) -3248 = AND(715, 3025) -3249 = AND(706, 3026) -3250 = AND(690, 3027) -3251 = AND(670, 3028) -3252 = AND(655, 3029) -3253 = AND(159, 3030) -3254 = AND(150, 3031) -3255 = AND(150, 3032) -3256 = AND(727, 3033) -3257 = AND(715, 3034) -3258 = AND(706, 3035) -3259 = AND(690, 3036) -3260 = AND(670, 3037) -3261 = AND(655, 3038) -3262 = AND(159, 3039) -3263 = AND(159, 3040) -3264 = AND(740, 3041) -3265 = AND(727, 3042) -3266 = AND(715, 3043) -3267 = AND(706, 3044) -3268 = AND(690, 3045) -3269 = AND(670, 3046) -3270 = AND(655, 3047) -3271 = AND(283, 3048) -3272 = AND(670, 3049) -3273 = AND(690, 3050) -3274 = AND(706, 3051) -3275 = AND(715, 3052) -3276 = AND(727, 3053) -3277 = AND(740, 3054) -3278 = AND(753, 3055) -3279 = AND(294, 3056) -3280 = AND(690, 3057) -3281 = AND(706, 3058) -3282 = AND(715, 3059) -3283 = AND(727, 3060) -3284 = AND(740, 3061) -3285 = AND(753, 3062) -3286 = AND(283, 3063) -3287 = AND(303, 3064) -3288 = AND(706, 3065) -3289 = AND(715, 3066) -3290 = AND(727, 3067) -3291 = AND(740, 3068) -3292 = AND(753, 3069) -3293 = AND(283, 3070) -3294 = AND(294, 3071) -3295 = AND(311, 3072) -3296 = AND(715, 3073) -3297 = AND(727, 3074) -3298 = AND(740, 3075) -3299 = AND(753, 3076) -3300 = AND(283, 3077) -3301 = AND(294, 3078) -3302 = AND(303, 3079) -3303 = AND(317, 3080) -3304 = AND(727, 3081) -3305 = AND(740, 3082) -3306 = AND(753, 3083) -3307 = AND(283, 3084) -3308 = AND(294, 3085) -3309 = AND(303, 3086) -3310 = AND(311, 3087) -3311 = AND(322, 3088) -3312 = AND(740, 3089) -3313 = AND(753, 3090) -3314 = AND(283, 3091) -3315 = AND(294, 3092) -3316 = AND(303, 3093) -3317 = AND(311, 3094) -3318 = AND(317, 3095) -3319 = AND(326, 3096) -3320 = AND(753, 3097) -3321 = AND(283, 3098) -3322 = AND(294, 3099) -3323 = AND(303, 3100) -3324 = AND(311, 3101) -3325 = AND(317, 3102) -3326 = AND(322, 3103) -3327 = AND(329, 3104) -3328 = AND(283, 3105) -3329 = AND(294, 3106) -3330 = AND(303, 3107) -3331 = AND(311, 3108) -3332 = AND(317, 3109) -3333 = AND(322, 3110) -3334 = AND(326, 3111) -3383 = AND(3190, 3191, 3192, 3193, 917) -3384 = BUFF(2977) -3387 = AND(3196, 1736) -3388 = AND(2977, 2149) -3389 = AND(2973, 1737) -3390 = NOR(3207, 3208, 3209, 3210, 3211, 3212, 3213, 3214) -3391 = NOR(3215, 3216, 3217, 3218, 3219, 3220, 3221, 3222) -3392 = NOR(3223, 3224, 3225, 3226, 3227, 3228, 3229, 3230) -3393 = NOR(3231, 3232, 3233, 3234, 3235, 3236, 3237, 3238) -3394 = NOR(3239, 3240, 3241, 3242, 3243, 3244, 3245, 3246) -3395 = NOR(3247, 3248, 3249, 3250, 3251, 3252, 3253, 3254) -3396 = NOR(3255, 3256, 3257, 3258, 3259, 3260, 3261, 3262) -3397 = NOR(3263, 3264, 3265, 3266, 3267, 3268, 3269, 3270) -3398 = NOR(3271, 3272, 3273, 3274, 3275, 3276, 3277, 3278) -3399 = NOR(3279, 3280, 3281, 3282, 3283, 3284, 3285, 3286) -3400 = NOR(3287, 3288, 3289, 3290, 3291, 3292, 3293, 3294) -3401 = NOR(3295, 3296, 3297, 3298, 3299, 3300, 3301, 3302) -3402 = NOR(3303, 3304, 3305, 3306, 3307, 3308, 3309, 3310) -3403 = NOR(3311, 3312, 3313, 3314, 3315, 3316, 3317, 3318) -3404 = NOR(3319, 3320, 3321, 3322, 3323, 3324, 3325, 3326) -3405 = NOR(3327, 3328, 3329, 3330, 3331, 3332, 3333, 3334) -3406 = AND(3206, 2641) -3407 = AND(169, 2648, 3112) -3410 = AND(179, 2648, 3115) -3413 = AND(190, 2652, 3115) -3414 = AND(200, 2652, 3112) -3415 = OR(3119, 1875, 2073) -3419 = NOR(3119, 1875, 2073) -3423 = AND(169, 2662, 3128) -3426 = AND(179, 2662, 3131) -3429 = AND(190, 2666, 3131) -3430 = AND(200, 2666, 3128) -3431 = AND(169, 2673, 3135) -3434 = AND(179, 2673, 3138) -3437 = AND(190, 2677, 3138) -3438 = AND(200, 2677, 3135) -3439 = AND(169, 2684, 3142) -3442 = AND(179, 2684, 3145) -3445 = AND(190, 2688, 3145) -3446 = AND(200, 2688, 3142) -3447 = OR(3149, 1895, 2093) -3451 = NOR(3149, 1895, 2093) -3455 = AND(169, 2702, 3158) -3458 = AND(179, 2702, 3161) -3461 = AND(190, 2706, 3161) -3462 = AND(200, 2706, 3158) -3463 = AND(169, 2715, 3165) -3466 = AND(179, 2715, 3168) -3469 = AND(190, 2719, 3168) -3470 = AND(200, 2719, 3165) -3471 = OR(3194, 3383) -3472 = BUFF(2967) -3475 = BUFF(2970) -3478 = BUFF(2967) -3481 = BUFF(2970) -3484 = BUFF(2973) -3487 = BUFF(2973) -3490 = BUFF(3172) -3493 = BUFF(3172) -3496 = BUFF(3175) -3499 = BUFF(3175) -3502 = BUFF(3178) -3505 = BUFF(3178) -3508 = BUFF(3181) -3511 = BUFF(3181) -3514 = BUFF(3184) -3517 = BUFF(3184) -3520 = BUFF(3187) -3523 = BUFF(3187) -3534 = NOR(3387, 2350) -3535 = OR(3388, 2151, 2351) -3536 = NOR(3389, 1966) -3537 = AND(3390, 2209) -3538 = AND(3398, 2210) -3539 = AND(3391, 1842) -3540 = AND(3399, 1369) -3541 = AND(3392, 1843) -3542 = AND(3400, 1369) -3543 = AND(3393, 1844) -3544 = AND(3401, 1369) -3545 = AND(3394, 1845) -3546 = AND(3402, 1369) -3547 = AND(3395, 1846) -3548 = AND(3403, 1369) -3549 = AND(3396, 1847) -3550 = AND(3404, 1369) -3551 = AND(3397, 1848) -3552 = AND(3405, 1369) -3557 = OR(3413, 3414, 3118) -3568 = OR(3429, 3430, 3134) -3573 = OR(3437, 3438, 3141) -3578 = OR(3445, 3446, 3148) -3589 = OR(3461, 3462, 3164) -3594 = OR(3469, 3470, 3171) -3605 = AND(3471, 2728) -3626 = NOT(3478) -3627 = NOT(3481) -3628 = NOT(3487) -3629 = NOT(3484) -3630 = NOT(3472) -3631 = NOT(3475) -3632 = AND(3536, 2152) -3633 = AND(3534, 2155) -3634 = OR(3537, 3538, 2398) -3635 = OR(3539, 3540) -3636 = OR(3541, 3542) -3637 = OR(3543, 3544) -3638 = OR(3545, 3546) -3639 = OR(3547, 3548) -3640 = OR(3549, 3550) -3641 = OR(3551, 3552) -3642 = AND(3535, 2643) -3643 = OR(3407, 3410) -3644 = NOR(3407, 3410) -3645 = AND(169, 3415, 3122) -3648 = AND(179, 3415, 3125) -3651 = AND(190, 3419, 3125) -3652 = AND(200, 3419, 3122) -3653 = NOT(3419) -3654 = OR(3423, 3426) -3657 = NOR(3423, 3426) -3658 = OR(3431, 3434) -3661 = NOR(3431, 3434) -3662 = OR(3439, 3442) -3663 = NOR(3439, 3442) -3664 = AND(169, 3447, 3152) -3667 = AND(179, 3447, 3155) -3670 = AND(190, 3451, 3155) -3671 = AND(200, 3451, 3152) -3672 = NOT(3451) -3673 = OR(3455, 3458) -3676 = NOR(3455, 3458) -3677 = OR(3463, 3466) -3680 = NOR(3463, 3466) -3681 = NOT(3493) -3682 = AND(1909, 3415) -3685 = NOT(3496) -3686 = NOT(3499) -3687 = NOT(3502) -3688 = NOT(3505) -3689 = NOT(3511) -3690 = AND(1922, 3447) -3693 = NOT(3517) -3694 = NOT(3520) -3695 = NOT(3523) -3696 = NOT(3514) -3697 = BUFF(3384) -3700 = BUFF(3384) -3703 = NOT(3490) -3704 = NOT(3508) -3705 = NAND(3475, 3630) -3706 = NAND(3472, 3631) -3707 = NAND(3481, 3626) -3708 = NAND(3478, 3627) -3711 = OR(3632, 2352, 2353) -3712 = OR(3633, 2354, 2355) -3713 = AND(3634, 2632) -3714 = AND(3635, 2634) -3715 = AND(3636, 2636) -3716 = AND(3637, 2638) -3717 = AND(3638, 2640) -3718 = AND(3639, 2642) -3719 = AND(3640, 2644) -3720 = AND(3641, 2646) -3721 = AND(3644, 3557) -3731 = OR(3651, 3652, 3653) -3734 = AND(3657, 3568) -3740 = AND(3661, 3573) -3743 = AND(3663, 3578) -3753 = OR(3670, 3671, 3672) -3756 = AND(3676, 3589) -3762 = AND(3680, 3594) -3765 = NOT(3643) -3766 = NOT(3662) -3773 = NAND(3705, 3706) -3774 = NAND(3707, 3708) -3775 = NAND(3700, 3628) -3776 = NOT(3700) -3777 = NAND(3697, 3629) -3778 = NOT(3697) -3779 = AND(3712, 2645) -3780 = AND(3711, 2647) -3786 = OR(3645, 3648) -3789 = NOR(3645, 3648) -3800 = OR(3664, 3667) -3803 = NOR(3664, 3667) -3809 = AND(3654, 1917) -3812 = AND(3658, 1917) -3815 = AND(3673, 1926) -3818 = AND(3677, 1926) -3821 = BUFF(3682) -3824 = BUFF(3682) -3827 = BUFF(3690) -3830 = BUFF(3690) -3833 = NAND(3773, 3774) -3834 = NAND(3487, 3776) -3835 = NAND(3484, 3778) -3838 = AND(3789, 3731) -3845 = AND(3803, 3753) -3850 = BUFF(3721) -3855 = BUFF(3734) -3858 = BUFF(3740) -3861 = BUFF(3743) -3865 = BUFF(3756) -3868 = BUFF(3762) -3884 = NAND(3775, 3834) -3885 = NAND(3777, 3835) -3894 = NAND(3721, 3786) -3895 = NAND(3743, 3800) -3898 = NOT(3821) -3899 = NOT(3824) -3906 = NOT(3830) -3911 = NOT(3827) -3912 = AND(3786, 1912) -3913 = BUFF(3812) -3916 = AND(3800, 1917) -3917 = BUFF(3818) -3920 = NOT(3809) -3921 = BUFF(3818) -3924 = NOT(3884) -3925 = NOT(3885) -3926 = AND(3721, 3838, 3734, 3740) -3930 = NAND(3721, 3838, 3654) -3931 = NAND(3658, 3838, 3734, 3721) -3932 = AND(3743, 3845, 3756, 3762) -3935 = NAND(3743, 3845, 3673) -3936 = NAND(3677, 3845, 3756, 3743) -3937 = BUFF(3838) -3940 = BUFF(3845) -3947 = NOT(3912) -3948 = NOT(3916) -3950 = BUFF(3850) -3953 = BUFF(3850) -3956 = BUFF(3855) -3959 = BUFF(3855) -3962 = BUFF(3858) -3965 = BUFF(3858) -3968 = BUFF(3861) -3971 = BUFF(3861) -3974 = BUFF(3865) -3977 = BUFF(3865) -3980 = BUFF(3868) -3983 = BUFF(3868) -3987 = NAND(3924, 3925) -3992 = NAND(3765, 3894, 3930, 3931) -3996 = NAND(3766, 3895, 3935, 3936) -4013 = NOT(3921) -4028 = AND(3932, 3926) -4029 = NAND(3953, 3681) -4030 = NAND(3959, 3686) -4031 = NAND(3965, 3688) -4032 = NAND(3971, 3689) -4033 = NAND(3977, 3693) -4034 = NAND(3983, 3695) -4035 = BUFF(3926) -4042 = NOT(3953) -4043 = NOT(3956) -4044 = NAND(3956, 3685) -4045 = NOT(3959) -4046 = NOT(3962) -4047 = NAND(3962, 3687) -4048 = NOT(3965) -4049 = NOT(3971) -4050 = NOT(3977) -4051 = NOT(3980) -4052 = NAND(3980, 3694) -4053 = NOT(3983) -4054 = NOT(3974) -4055 = NAND(3974, 3696) -4056 = AND(3932, 2304) -4057 = NOT(3950) -4058 = NAND(3950, 3703) -4059 = BUFF(3937) -4062 = BUFF(3937) -4065 = NOT(3968) -4066 = NAND(3968, 3704) -4067 = BUFF(3940) -4070 = BUFF(3940) -4073 = NAND(3926, 3996) -4074 = NOT(3992) -4075 = NAND(3493, 4042) -4076 = NAND(3499, 4045) -4077 = NAND(3505, 4048) -4078 = NAND(3511, 4049) -4079 = NAND(3517, 4050) -4080 = NAND(3523, 4053) -4085 = NAND(3496, 4043) -4086 = NAND(3502, 4046) -4088 = NAND(3520, 4051) -4090 = NAND(3514, 4054) -4091 = AND(3996, 1926) -4094 = OR(3605, 4056) -4098 = NAND(3490, 4057) -4101 = NAND(3508, 4065) -4104 = AND(4073, 4074) -4105 = NAND(4075, 4029) -4106 = NAND(4062, 3899) -4107 = NAND(4076, 4030) -4108 = NAND(4077, 4031) -4109 = NAND(4078, 4032) -4110 = NAND(4070, 3906) -4111 = NAND(4079, 4033) -4112 = NAND(4080, 4034) -4113 = NOT(4059) -4114 = NAND(4059, 3898) -4115 = NOT(4062) -4116 = NAND(4085, 4044) -4119 = NAND(4086, 4047) -4122 = NOT(4070) -4123 = NAND(4088, 4052) -4126 = NOT(4067) -4127 = NAND(4067, 3911) -4128 = NAND(4090, 4055) -4139 = NAND(4098, 4058) -4142 = NAND(4101, 4066) -4145 = NOT(4104) -4146 = NOT(4105) -4147 = NAND(3824, 4115) -4148 = NOT(4107) -4149 = NOT(4108) -4150 = NOT(4109) -4151 = NAND(3830, 4122) -4152 = NOT(4111) -4153 = NOT(4112) -4154 = NAND(3821, 4113) -4161 = NAND(3827, 4126) -4167 = BUFF(4091) -4174 = BUFF(4094) -4182 = BUFF(4091) -4186 = AND(330, 4094) -4189 = AND(4146, 2230) -4190 = NAND(4147, 4106) -4191 = AND(4148, 2232) -4192 = AND(4149, 2233) -4193 = AND(4150, 2234) -4194 = NAND(4151, 4110) -4195 = AND(4152, 2236) -4196 = AND(4153, 2237) -4197 = NAND(4154, 4114) -4200 = BUFF(4116) -4203 = BUFF(4116) -4209 = BUFF(4119) -4213 = BUFF(4119) -4218 = NAND(4161, 4127) -4223 = BUFF(4123) -4238 = AND(4128, 3917) -4239 = NOT(4139) -4241 = NOT(4142) -4242 = AND(330, 4123) -4247 = BUFF(4128) -4251 = NOR(3713, 4189, 2898) -4252 = NOT(4190) -4253 = NOR(3715, 4191, 2900) -4254 = NOR(3716, 4192, 2901) -4255 = NOR(3717, 4193, 3406) -4256 = NOT(4194) -4257 = NOR(3719, 4195, 3779) -4258 = NOR(3720, 4196, 3780) -4283 = AND(4167, 4035) -4284 = AND(4174, 4035) -4287 = OR(3815, 4238) -4291 = NOT(4186) -4295 = NOT(4167) -4296 = BUFF(4167) -4299 = NOT(4182) -4303 = AND(4252, 2231) -4304 = AND(4256, 2235) -4305 = BUFF(4197) -4310 = OR(3992, 4283) -4316 = AND(4174, 4213, 4203) -4317 = AND(4174, 4209) -4318 = AND(4223, 4128, 4218) -4319 = AND(4223, 4128) -4322 = AND(4167, 4209) -4325 = NAND(4203, 3913) -4326 = NAND(4203, 4213, 4167) -4327 = NAND(4218, 3815) -4328 = NAND(4218, 4128, 3917) -4329 = NAND(4247, 4013) -4330 = NOT(4247) -4331 = AND(330, 4094, 4295) -4335 = AND(4251, 2730) -4338 = AND(4253, 2734) -4341 = AND(4254, 2736) -4344 = AND(4255, 2738) -4347 = AND(4257, 2742) -4350 = AND(4258, 2744) -4353 = BUFF(4197) -4356 = BUFF(4203) -4359 = BUFF(4209) -4362 = BUFF(4218) -4365 = BUFF(4242) -4368 = BUFF(4242) -4371 = AND(4223, 4223) -4376 = NOR(3714, 4303, 2899) -4377 = NOR(3718, 4304, 3642) -4387 = AND(330, 4317) -4390 = AND(330, 4318) -4393 = NAND(3921, 4330) -4398 = BUFF(4287) -4413 = BUFF(4284) -4416 = NAND(3920, 4325, 4326) -4421 = OR(3812, 4322) -4427 = NAND(3948, 4327, 4328) -4430 = BUFF(4287) -4435 = AND(330, 4316) -4442 = OR(4331, 4296) -4443 = AND(4174, 4305, 4203, 4213) -4446 = NAND(4305, 3809) -4447 = NAND(4305, 4200, 3913) -4448 = NAND(4305, 4200, 4213, 4167) -4452 = NOT(4356) -4458 = NAND(4329, 4393) -4461 = NOT(4365) -4462 = NOT(4368) -4463 = NAND(4371, 1460) -4464 = NOT(4371) -4465 = BUFF(4310) -4468 = NOR(4331, 4296) -4472 = AND(4376, 2732) -4475 = AND(4377, 2740) -4479 = BUFF(4310) -4484 = NOT(4353) -4486 = NOT(4359) -4487 = NAND(4359, 4299) -4491 = NOT(4362) -4493 = AND(330, 4319) -4496 = NOT(4398) -4497 = AND(4287, 4398) -4498 = AND(4442, 1769) -4503 = NAND(3947, 4446, 4447, 4448) -4506 = NOT(4413) -4507 = NOT(4435) -4508 = NOT(4421) -4509 = NAND(4421, 4452) -4510 = NOT(4427) -4511 = NAND(4427, 4241) -4515 = NAND(965, 4464) -4526 = NOT(4416) -4527 = NAND(4416, 4484) -4528 = NAND(4182, 4486) -4529 = NOT(4430) -4530 = NAND(4430, 4491) -4531 = BUFF(4387) -4534 = BUFF(4387) -4537 = BUFF(4390) -4540 = BUFF(4390) -4545 = AND(330, 4319, 4496) -4549 = AND(330, 4443) -4552 = NAND(4356, 4508) -4555 = NAND(4142, 4510) -4558 = NOT(4493) -4559 = NAND(4463, 4515) -4562 = NOT(4465) -4563 = AND(4310, 4465) -4564 = BUFF(4468) -4568 = NOT(4479) -4569 = BUFF(4443) -4572 = NAND(4353, 4526) -4573 = NAND(4362, 4529) -4576 = NAND(4487, 4528) -4581 = BUFF(4458) -4584 = BUFF(4458) -4587 = OR(2758, 4498, 2761) -4588 = NOR(2758, 4498, 2761) -4589 = OR(4545, 4497) -4593 = NAND(4552, 4509) -4596 = NOT(4531) -4597 = NOT(4534) -4599 = NAND(4555, 4511) -4602 = NOT(4537) -4603 = NOT(4540) -4608 = AND(330, 4284, 4562) -4613 = BUFF(4503) -4616 = BUFF(4503) -4619 = NAND(4572, 4527) -4623 = NAND(4573, 4530) -4628 = NOT(4588) -4629 = NAND(4569, 4506) -4630 = NOT(4569) -4635 = NOT(4576) -4636 = NAND(4576, 4291) -4640 = NOT(4581) -4641 = NAND(4581, 4461) -4642 = NOT(4584) -4643 = NAND(4584, 4462) -4644 = NOR(4608, 4563) -4647 = AND(4559, 2128) -4650 = AND(4559, 2743) -4656 = BUFF(4549) -4659 = BUFF(4549) -4664 = BUFF(4564) -4667 = AND(4587, 4628) -4668 = NAND(4413, 4630) -4669 = NOT(4616) -4670 = NAND(4616, 4239) -4673 = NOT(4619) -4674 = NAND(4619, 4507) -4675 = NAND(4186, 4635) -4676 = NOT(4623) -4677 = NAND(4623, 4558) -4678 = NAND(4365, 4640) -4679 = NAND(4368, 4642) -4687 = NOT(4613) -4688 = NAND(4613, 4568) -4691 = BUFF(4593) -4694 = BUFF(4593) -4697 = BUFF(4599) -4700 = BUFF(4599) -4704 = NAND(4629, 4668) -4705 = NAND(4139, 4669) -4706 = NOT(4656) -4707 = NOT(4659) -4708 = NAND(4435, 4673) -4711 = NAND(4675, 4636) -4716 = NAND(4493, 4676) -4717 = NAND(4678, 4641) -4721 = NAND(4679, 4643) -4722 = BUFF(4644) -4726 = NOT(4664) -4727 = OR(4647, 4650, 4350) -4730 = NOR(4647, 4650, 4350) -4733 = NAND(4479, 4687) -4740 = NAND(4705, 4670) -4743 = NAND(4708, 4674) -4747 = NOT(4691) -4748 = NAND(4691, 4596) -4749 = NOT(4694) -4750 = NAND(4694, 4597) -4753 = NOT(4697) -4754 = NAND(4697, 4602) -4755 = NOT(4700) -4756 = NAND(4700, 4603) -4757 = NAND(4716, 4677) -4769 = NAND(4733, 4688) -4772 = AND(330, 4704) -4775 = NOT(4721) -4778 = NOT(4730) -4786 = NAND(4531, 4747) -4787 = NAND(4534, 4749) -4788 = NAND(4537, 4753) -4789 = NAND(4540, 4755) -4794 = AND(4711, 2124) -4797 = AND(4711, 2735) -4800 = AND(4717, 2127) -4805 = BUFF(4722) -4808 = AND(4717, 4468) -4812 = BUFF(4727) -4815 = AND(4727, 4778) -4816 = NOT(4769) -4817 = NOT(4772) -4818 = NAND(4786, 4748) -4822 = NAND(4787, 4750) -4823 = NAND(4788, 4754) -4826 = NAND(4789, 4756) -4829 = NAND(4775, 4726) -4830 = NOT(4775) -4831 = AND(4743, 2122) -4838 = AND(4757, 2126) -4844 = BUFF(4740) -4847 = BUFF(4740) -4850 = BUFF(4743) -4854 = BUFF(4757) -4859 = NAND(4772, 4816) -4860 = NAND(4769, 4817) -4868 = NOT(4826) -4870 = NOT(4805) -4872 = NOT(4808) -4873 = NAND(4664, 4830) -4876 = OR(4794, 4797, 4341) -4880 = NOR(4794, 4797, 4341) -4885 = NOT(4812) -4889 = NOT(4822) -4895 = NAND(4859, 4860) -4896 = NOT(4844) -4897 = NAND(4844, 4706) -4898 = NOT(4847) -4899 = NAND(4847, 4707) -4900 = NOR(4868, 4564) -4901 = AND(4717, 4757, 4823, 4564) -4902 = NOT(4850) -4904 = NOT(4854) -4905 = NAND(4854, 4872) -4906 = NAND(4873, 4829) -4907 = AND(4818, 2123) -4913 = AND(4823, 2125) -4916 = AND(4818, 4644) -4920 = NOT(4880) -4921 = AND(4895, 2184) -4924 = NAND(4656, 4896) -4925 = NAND(4659, 4898) -4926 = OR(4900, 4901) -4928 = NAND(4889, 4870) -4929 = NOT(4889) -4930 = NAND(4808, 4904) -4931 = NOT(4906) -4937 = BUFF(4876) -4940 = BUFF(4876) -4944 = AND(4876, 4920) -4946 = NAND(4924, 4897) -4949 = NAND(4925, 4899) -4950 = NAND(4916, 4902) -4951 = NOT(4916) -4952 = NAND(4805, 4929) -4953 = NAND(4930, 4905) -4954 = AND(4926, 2737) -4957 = AND(4931, 2741) -4964 = OR(2764, 2483, 4921) -4965 = NOR(2764, 2483, 4921) -4968 = NOT(4949) -4969 = NAND(4850, 4951) -4970 = NAND(4952, 4928) -4973 = AND(4953, 2739) -4978 = NOT(4937) -4979 = NOT(4940) -4980 = NOT(4965) -4981 = NOR(4968, 4722) -4982 = AND(4818, 4743, 4946, 4722) -4983 = NAND(4950, 4969) -4984 = NOT(4970) -4985 = AND(4946, 2121) -4988 = OR(4913, 4954, 4344) -4991 = NOR(4913, 4954, 4344) -4996 = OR(4800, 4957, 4347) -4999 = NOR(4800, 4957, 4347) -5002 = AND(4964, 4980) -5007 = OR(4981, 4982) -5010 = AND(4983, 2731) -5013 = AND(4984, 2733) -5018 = OR(4838, 4973, 4475) -5021 = NOR(4838, 4973, 4475) -5026 = NOT(4991) -5029 = NOT(4999) -5030 = AND(5007, 2729) -5039 = BUFF(4996) -5042 = BUFF(4988) -5045 = AND(4988, 5026) -5046 = NOT(5021) -5047 = AND(4996, 5029) -5050 = OR(4831, 5010, 4472) -5055 = NOR(4831, 5010, 4472) -5058 = OR(4907, 5013, 4338) -5061 = NOR(4907, 5013, 4338) -5066 = AND(4730, 4999, 5021, 4991) -5070 = BUFF(5018) -5078 = AND(5018, 5046) -5080 = OR(4985, 5030, 4335) -5085 = NOR(4985, 5030, 4335) -5094 = NAND(5039, 4885) -5095 = NOT(5039) -5097 = NOT(5042) -5102 = AND(5050, 5050) -5103 = NOT(5061) -5108 = NAND(4812, 5095) -5109 = NOT(5070) -5110 = NAND(5070, 5097) -5111 = BUFF(5058) -5114 = AND(5050, 1461) -5117 = BUFF(5050) -5120 = AND(5080, 5080) -5121 = AND(5058, 5103) -5122 = NAND(5094, 5108) -5125 = NAND(5042, 5109) -5128 = AND(1461, 5080) -5133 = AND(4880, 5061, 5055, 5085) -5136 = AND(5055, 5085, 1464) -5139 = BUFF(5080) -5145 = NAND(5125, 5110) -5151 = BUFF(5111) -5154 = BUFF(5111) -5159 = NOT(5117) -5160 = BUFF(5114) -5163 = BUFF(5114) -5166 = AND(5066, 5133) -5173 = AND(5066, 5133) -5174 = BUFF(5122) -5177 = BUFF(5122) -5182 = NOT(5139) -5183 = NAND(5139, 5159) -5184 = BUFF(5128) -5188 = BUFF(5128) -5192 = NOT(5166) -5193 = NOR(5136, 5173) -5196 = NAND(5151, 4978) -5197 = NOT(5151) -5198 = NAND(5154, 4979) -5199 = NOT(5154) -5201 = NOT(5160) -5203 = NOT(5163) -5205 = BUFF(5145) -5209 = BUFF(5145) -5212 = NAND(5117, 5182) -5215 = AND(213, 5193) -5217 = NOT(5174) -5219 = NOT(5177) -5220 = NAND(4937, 5197) -5221 = NAND(4940, 5199) -5222 = NOT(5184) -5223 = NAND(5184, 5201) -5224 = NAND(5188, 5203) -5225 = NOT(5188) -5228 = NAND(5183, 5212) -5231 = NOT(5215) -5232 = NAND(5205, 5217) -5233 = NOT(5205) -5234 = NAND(5209, 5219) -5235 = NOT(5209) -5236 = NAND(5196, 5220) -5240 = NAND(5198, 5221) -5242 = NAND(5160, 5222) -5243 = NAND(5163, 5225) -5245 = NAND(5174, 5233) -5246 = NAND(5177, 5235) -5250 = NOT(5240) -5253 = NOT(5228) -5254 = NAND(5242, 5223) -5257 = NAND(5243, 5224) -5258 = NAND(5232, 5245) -5261 = NAND(5234, 5246) -5266 = NOT(5257) -5269 = BUFF(5236) -5277 = AND(5236, 5254, 2307) -5278 = AND(5250, 5254, 2310) -5279 = NOT(5261) -5283 = NOT(5269) -5284 = NAND(5269, 5253) -5285 = AND(5236, 5266, 2310) -5286 = AND(5250, 5266, 2307) -5289 = BUFF(5258) -5292 = BUFF(5258) -5295 = NAND(5228, 5283) -5298 = OR(5277, 5285, 5278, 5286) -5303 = BUFF(5279) -5306 = BUFF(5279) -5309 = NAND(5295, 5284) -5312 = NOT(5292) -5313 = NOT(5289) -5322 = NOT(5306) -5323 = NOT(5303) -5324 = BUFF(5298) -5327 = BUFF(5298) -5332 = BUFF(5309) -5335 = BUFF(5309) -5340 = NAND(5324, 5323) -5341 = NAND(5327, 5322) -5344 = NOT(5327) -5345 = NOT(5324) -5348 = NAND(5332, 5313) -5349 = NAND(5335, 5312) -5350 = NAND(5303, 5345) -5351 = NAND(5306, 5344) -5352 = NOT(5335) -5353 = NOT(5332) -5354 = NAND(5289, 5353) -5355 = NAND(5292, 5352) -5356 = NAND(5350, 5340) -5357 = NAND(5351, 5341) -5358 = NAND(5348, 5354) -5359 = NAND(5349, 5355) -5360 = AND(5356, 5357) -5361 = NAND(5358, 5359) diff --git a/bench_test/c499.bench b/bench_test/c499.bench deleted file mode 100644 index 21ca030..0000000 --- a/bench_test/c499.bench +++ /dev/null @@ -1,279 +0,0 @@ -# c499 - -INPUT(1) -INPUT(5) -INPUT(9) -INPUT(13) -INPUT(17) -INPUT(21) -INPUT(25) -INPUT(29) -INPUT(33) -INPUT(37) -INPUT(41) -INPUT(45) -INPUT(49) -INPUT(53) -INPUT(57) -INPUT(61) -INPUT(65) -INPUT(69) -INPUT(73) -INPUT(77) -INPUT(81) -INPUT(85) -INPUT(89) -INPUT(93) -INPUT(97) -INPUT(101) -INPUT(105) -INPUT(109) -INPUT(113) -INPUT(117) -INPUT(121) -INPUT(125) -INPUT(129) -INPUT(130) -INPUT(131) -INPUT(132) -INPUT(133) -INPUT(134) -INPUT(135) -INPUT(136) -INPUT(137) - -OUTPUT(724) -OUTPUT(725) -OUTPUT(726) -OUTPUT(727) -OUTPUT(728) -OUTPUT(729) -OUTPUT(730) -OUTPUT(731) -OUTPUT(732) -OUTPUT(733) -OUTPUT(734) -OUTPUT(735) -OUTPUT(736) -OUTPUT(737) -OUTPUT(738) -OUTPUT(739) -OUTPUT(740) -OUTPUT(741) -OUTPUT(742) -OUTPUT(743) -OUTPUT(744) -OUTPUT(745) -OUTPUT(746) -OUTPUT(747) -OUTPUT(748) -OUTPUT(749) -OUTPUT(750) -OUTPUT(751) -OUTPUT(752) -OUTPUT(753) -OUTPUT(754) -OUTPUT(755) - -250 = XOR(1, 5) -251 = XOR(9, 13) -252 = XOR(17, 21) -253 = XOR(25, 29) -254 = XOR(33, 37) -255 = XOR(41, 45) -256 = XOR(49, 53) -257 = XOR(57, 61) -258 = XOR(65, 69) -259 = XOR(73, 77) -260 = XOR(81, 85) -261 = XOR(89, 93) -262 = XOR(97, 101) -263 = XOR(105, 109) -264 = XOR(113, 117) -265 = XOR(121, 125) -266 = AND(129, 137) -267 = AND(130, 137) -268 = AND(131, 137) -269 = AND(132, 137) -270 = AND(133, 137) -271 = AND(134, 137) -272 = AND(135, 137) -273 = AND(136, 137) -274 = XOR(1, 17) -275 = XOR(33, 49) -276 = XOR(5, 21) -277 = XOR(37, 53) -278 = XOR(9, 25) -279 = XOR(41, 57) -280 = XOR(13, 29) -281 = XOR(45, 61) -282 = XOR(65, 81) -283 = XOR(97, 113) -284 = XOR(69, 85) -285 = XOR(101, 117) -286 = XOR(73, 89) -287 = XOR(105, 121) -288 = XOR(77, 93) -289 = XOR(109, 125) -290 = XOR(250, 251) -293 = XOR(252, 253) -296 = XOR(254, 255) -299 = XOR(256, 257) -302 = XOR(258, 259) -305 = XOR(260, 261) -308 = XOR(262, 263) -311 = XOR(264, 265) -314 = XOR(274, 275) -315 = XOR(276, 277) -316 = XOR(278, 279) -317 = XOR(280, 281) -318 = XOR(282, 283) -319 = XOR(284, 285) -320 = XOR(286, 287) -321 = XOR(288, 289) -338 = XOR(290, 293) -339 = XOR(296, 299) -340 = XOR(290, 296) -341 = XOR(293, 299) -342 = XOR(302, 305) -343 = XOR(308, 311) -344 = XOR(302, 308) -345 = XOR(305, 311) -346 = XOR(266, 342) -347 = XOR(267, 343) -348 = XOR(268, 344) -349 = XOR(269, 345) -350 = XOR(270, 338) -351 = XOR(271, 339) -352 = XOR(272, 340) -353 = XOR(273, 341) -354 = XOR(314, 346) -367 = XOR(315, 347) -380 = XOR(316, 348) -393 = XOR(317, 349) -406 = XOR(318, 350) -419 = XOR(319, 351) -432 = XOR(320, 352) -445 = XOR(321, 353) -554 = NOT(354) -555 = NOT(367) -556 = NOT(380) -557 = NOT(354) -558 = NOT(367) -559 = NOT(393) -560 = NOT(354) -561 = NOT(380) -562 = NOT(393) -563 = NOT(367) -564 = NOT(380) -565 = NOT(393) -566 = NOT(419) -567 = NOT(445) -568 = NOT(419) -569 = NOT(432) -570 = NOT(406) -571 = NOT(445) -572 = NOT(406) -573 = NOT(432) -574 = NOT(406) -575 = NOT(419) -576 = NOT(432) -577 = NOT(406) -578 = NOT(419) -579 = NOT(445) -580 = NOT(406) -581 = NOT(432) -582 = NOT(445) -583 = NOT(419) -584 = NOT(432) -585 = NOT(445) -586 = NOT(367) -587 = NOT(393) -588 = NOT(367) -589 = NOT(380) -590 = NOT(354) -591 = NOT(393) -592 = NOT(354) -593 = NOT(380) -594 = AND(554, 555, 556, 393) -595 = AND(557, 558, 380, 559) -596 = AND(560, 367, 561, 562) -597 = AND(354, 563, 564, 565) -598 = AND(574, 575, 576, 445) -599 = AND(577, 578, 432, 579) -600 = AND(580, 419, 581, 582) -601 = AND(406, 583, 584, 585) -602 = OR(594, 595, 596, 597) -607 = OR(598, 599, 600, 601) -620 = AND(406, 566, 432, 567, 602) -625 = AND(406, 568, 569, 445, 602) -630 = AND(570, 419, 432, 571, 602) -635 = AND(572, 419, 573, 445, 602) -640 = AND(354, 586, 380, 587, 607) -645 = AND(354, 588, 589, 393, 607) -650 = AND(590, 367, 380, 591, 607) -655 = AND(592, 367, 593, 393, 607) -692 = AND(354, 620) -693 = AND(367, 620) -694 = AND(380, 620) -695 = AND(393, 620) -696 = AND(354, 625) -697 = AND(367, 625) -698 = AND(380, 625) -699 = AND(393, 625) -700 = AND(354, 630) -701 = AND(367, 630) -702 = AND(380, 630) -703 = AND(393, 630) -704 = AND(354, 635) -705 = AND(367, 635) -706 = AND(380, 635) -707 = AND(393, 635) -708 = AND(406, 640) -709 = AND(419, 640) -710 = AND(432, 640) -711 = AND(445, 640) -712 = AND(406, 645) -713 = AND(419, 645) -714 = AND(432, 645) -715 = AND(445, 645) -716 = AND(406, 650) -717 = AND(419, 650) -718 = AND(432, 650) -719 = AND(445, 650) -720 = AND(406, 655) -721 = AND(419, 655) -722 = AND(432, 655) -723 = AND(445, 655) -724 = XOR(1, 692) -725 = XOR(5, 693) -726 = XOR(9, 694) -727 = XOR(13, 695) -728 = XOR(17, 696) -729 = XOR(21, 697) -730 = XOR(25, 698) -731 = XOR(29, 699) -732 = XOR(33, 700) -733 = XOR(37, 701) -734 = XOR(41, 702) -735 = XOR(45, 703) -736 = XOR(49, 704) -737 = XOR(53, 705) -738 = XOR(57, 706) -739 = XOR(61, 707) -740 = XOR(65, 708) -741 = XOR(69, 709) -742 = XOR(73, 710) -743 = XOR(77, 711) -744 = XOR(81, 712) -745 = XOR(85, 713) -746 = XOR(89, 714) -747 = XOR(93, 715) -748 = XOR(97, 716) -749 = XOR(101, 717) -750 = XOR(105, 718) -751 = XOR(109, 719) -752 = XOR(113, 720) -753 = XOR(117, 721) -754 = XOR(121, 722) -755 = XOR(125, 723) diff --git a/bench_test/c6288.bench b/bench_test/c6288.bench deleted file mode 100644 index d578950..0000000 --- a/bench_test/c6288.bench +++ /dev/null @@ -1,2484 +0,0 @@ -# c6288 - -INPUT(1) -INPUT(18) -INPUT(35) -INPUT(52) -INPUT(69) -INPUT(86) -INPUT(103) -INPUT(120) -INPUT(137) -INPUT(154) -INPUT(171) -INPUT(188) -INPUT(205) -INPUT(222) -INPUT(239) -INPUT(256) -INPUT(273) -INPUT(290) -INPUT(307) -INPUT(324) -INPUT(341) -INPUT(358) -INPUT(375) -INPUT(392) -INPUT(409) -INPUT(426) -INPUT(443) -INPUT(460) -INPUT(477) -INPUT(494) -INPUT(511) -INPUT(528) - -OUTPUT(545) -OUTPUT(1581) -OUTPUT(1901) -OUTPUT(2223) -OUTPUT(2548) -OUTPUT(2877) -OUTPUT(3211) -OUTPUT(3552) -OUTPUT(3895) -OUTPUT(4241) -OUTPUT(4591) -OUTPUT(4946) -OUTPUT(5308) -OUTPUT(5672) -OUTPUT(5971) -OUTPUT(6123) -OUTPUT(6150) -OUTPUT(6160) -OUTPUT(6170) -OUTPUT(6180) -OUTPUT(6190) -OUTPUT(6200) -OUTPUT(6210) -OUTPUT(6220) -OUTPUT(6230) -OUTPUT(6240) -OUTPUT(6250) -OUTPUT(6260) -OUTPUT(6270) -OUTPUT(6280) -OUTPUT(6287) -OUTPUT(6288) - -545 = AND(1, 273) -546 = AND(1, 290) -549 = AND(1, 307) -552 = AND(1, 324) -555 = AND(1, 341) -558 = AND(1, 358) -561 = AND(1, 375) -564 = AND(1, 392) -567 = AND(1, 409) -570 = AND(1, 426) -573 = AND(1, 443) -576 = AND(1, 460) -579 = AND(1, 477) -582 = AND(1, 494) -585 = AND(1, 511) -588 = AND(1, 528) -591 = AND(18, 273) -594 = AND(18, 290) -597 = AND(18, 307) -600 = AND(18, 324) -603 = AND(18, 341) -606 = AND(18, 358) -609 = AND(18, 375) -612 = AND(18, 392) -615 = AND(18, 409) -618 = AND(18, 426) -621 = AND(18, 443) -624 = AND(18, 460) -627 = AND(18, 477) -630 = AND(18, 494) -633 = AND(18, 511) -636 = AND(18, 528) -639 = AND(35, 273) -642 = AND(35, 290) -645 = AND(35, 307) -648 = AND(35, 324) -651 = AND(35, 341) -654 = AND(35, 358) -657 = AND(35, 375) -660 = AND(35, 392) -663 = AND(35, 409) -666 = AND(35, 426) -669 = AND(35, 443) -672 = AND(35, 460) -675 = AND(35, 477) -678 = AND(35, 494) -681 = AND(35, 511) -684 = AND(35, 528) -687 = AND(52, 273) -690 = AND(52, 290) -693 = AND(52, 307) -696 = AND(52, 324) -699 = AND(52, 341) -702 = AND(52, 358) -705 = AND(52, 375) -708 = AND(52, 392) -711 = AND(52, 409) -714 = AND(52, 426) -717 = AND(52, 443) -720 = AND(52, 460) -723 = AND(52, 477) -726 = AND(52, 494) -729 = AND(52, 511) -732 = AND(52, 528) -735 = AND(69, 273) -738 = AND(69, 290) -741 = AND(69, 307) -744 = AND(69, 324) -747 = AND(69, 341) -750 = AND(69, 358) -753 = AND(69, 375) -756 = AND(69, 392) -759 = AND(69, 409) -762 = AND(69, 426) -765 = AND(69, 443) -768 = AND(69, 460) -771 = AND(69, 477) -774 = AND(69, 494) -777 = AND(69, 511) -780 = AND(69, 528) -783 = AND(86, 273) -786 = AND(86, 290) -789 = AND(86, 307) -792 = AND(86, 324) -795 = AND(86, 341) -798 = AND(86, 358) -801 = AND(86, 375) -804 = AND(86, 392) -807 = AND(86, 409) -810 = AND(86, 426) -813 = AND(86, 443) -816 = AND(86, 460) -819 = AND(86, 477) -822 = AND(86, 494) -825 = AND(86, 511) -828 = AND(86, 528) -831 = AND(103, 273) -834 = AND(103, 290) -837 = AND(103, 307) -840 = AND(103, 324) -843 = AND(103, 341) -846 = AND(103, 358) -849 = AND(103, 375) -852 = AND(103, 392) -855 = AND(103, 409) -858 = AND(103, 426) -861 = AND(103, 443) -864 = AND(103, 460) -867 = AND(103, 477) -870 = AND(103, 494) -873 = AND(103, 511) -876 = AND(103, 528) -879 = AND(120, 273) -882 = AND(120, 290) -885 = AND(120, 307) -888 = AND(120, 324) -891 = AND(120, 341) -894 = AND(120, 358) -897 = AND(120, 375) -900 = AND(120, 392) -903 = AND(120, 409) -906 = AND(120, 426) -909 = AND(120, 443) -912 = AND(120, 460) -915 = AND(120, 477) -918 = AND(120, 494) -921 = AND(120, 511) -924 = AND(120, 528) -927 = AND(137, 273) -930 = AND(137, 290) -933 = AND(137, 307) -936 = AND(137, 324) -939 = AND(137, 341) -942 = AND(137, 358) -945 = AND(137, 375) -948 = AND(137, 392) -951 = AND(137, 409) -954 = AND(137, 426) -957 = AND(137, 443) -960 = AND(137, 460) -963 = AND(137, 477) -966 = AND(137, 494) -969 = AND(137, 511) -972 = AND(137, 528) -975 = AND(154, 273) -978 = AND(154, 290) -981 = AND(154, 307) -984 = AND(154, 324) -987 = AND(154, 341) -990 = AND(154, 358) -993 = AND(154, 375) -996 = AND(154, 392) -999 = AND(154, 409) -1002 = AND(154, 426) -1005 = AND(154, 443) -1008 = AND(154, 460) -1011 = AND(154, 477) -1014 = AND(154, 494) -1017 = AND(154, 511) -1020 = AND(154, 528) -1023 = AND(171, 273) -1026 = AND(171, 290) -1029 = AND(171, 307) -1032 = AND(171, 324) -1035 = AND(171, 341) -1038 = AND(171, 358) -1041 = AND(171, 375) -1044 = AND(171, 392) -1047 = AND(171, 409) -1050 = AND(171, 426) -1053 = AND(171, 443) -1056 = AND(171, 460) -1059 = AND(171, 477) -1062 = AND(171, 494) -1065 = AND(171, 511) -1068 = AND(171, 528) -1071 = AND(188, 273) -1074 = AND(188, 290) -1077 = AND(188, 307) -1080 = AND(188, 324) -1083 = AND(188, 341) -1086 = AND(188, 358) -1089 = AND(188, 375) -1092 = AND(188, 392) -1095 = AND(188, 409) -1098 = AND(188, 426) -1101 = AND(188, 443) -1104 = AND(188, 460) -1107 = AND(188, 477) -1110 = AND(188, 494) -1113 = AND(188, 511) -1116 = AND(188, 528) -1119 = AND(205, 273) -1122 = AND(205, 290) -1125 = AND(205, 307) -1128 = AND(205, 324) -1131 = AND(205, 341) -1134 = AND(205, 358) -1137 = AND(205, 375) -1140 = AND(205, 392) -1143 = AND(205, 409) -1146 = AND(205, 426) -1149 = AND(205, 443) -1152 = AND(205, 460) -1155 = AND(205, 477) -1158 = AND(205, 494) -1161 = AND(205, 511) -1164 = AND(205, 528) -1167 = AND(222, 273) -1170 = AND(222, 290) -1173 = AND(222, 307) -1176 = AND(222, 324) -1179 = AND(222, 341) -1182 = AND(222, 358) -1185 = AND(222, 375) -1188 = AND(222, 392) -1191 = AND(222, 409) -1194 = AND(222, 426) -1197 = AND(222, 443) -1200 = AND(222, 460) -1203 = AND(222, 477) -1206 = AND(222, 494) -1209 = AND(222, 511) -1212 = AND(222, 528) -1215 = AND(239, 273) -1218 = AND(239, 290) -1221 = AND(239, 307) -1224 = AND(239, 324) -1227 = AND(239, 341) -1230 = AND(239, 358) -1233 = AND(239, 375) -1236 = AND(239, 392) -1239 = AND(239, 409) -1242 = AND(239, 426) -1245 = AND(239, 443) -1248 = AND(239, 460) -1251 = AND(239, 477) -1254 = AND(239, 494) -1257 = AND(239, 511) -1260 = AND(239, 528) -1263 = AND(256, 273) -1266 = AND(256, 290) -1269 = AND(256, 307) -1272 = AND(256, 324) -1275 = AND(256, 341) -1278 = AND(256, 358) -1281 = AND(256, 375) -1284 = AND(256, 392) -1287 = AND(256, 409) -1290 = AND(256, 426) -1293 = AND(256, 443) -1296 = AND(256, 460) -1299 = AND(256, 477) -1302 = AND(256, 494) -1305 = AND(256, 511) -1308 = AND(256, 528) -1311 = NOT(591) -1315 = NOT(639) -1319 = NOT(687) -1323 = NOT(735) -1327 = NOT(783) -1331 = NOT(831) -1335 = NOT(879) -1339 = NOT(927) -1343 = NOT(975) -1347 = NOT(1023) -1351 = NOT(1071) -1355 = NOT(1119) -1359 = NOT(1167) -1363 = NOT(1215) -1367 = NOT(1263) -1371 = NOR(591, 1311) -1372 = NOT(1311) -1373 = NOR(639, 1315) -1374 = NOT(1315) -1375 = NOR(687, 1319) -1376 = NOT(1319) -1377 = NOR(735, 1323) -1378 = NOT(1323) -1379 = NOR(783, 1327) -1380 = NOT(1327) -1381 = NOR(831, 1331) -1382 = NOT(1331) -1383 = NOR(879, 1335) -1384 = NOT(1335) -1385 = NOR(927, 1339) -1386 = NOT(1339) -1387 = NOR(975, 1343) -1388 = NOT(1343) -1389 = NOR(1023, 1347) -1390 = NOT(1347) -1391 = NOR(1071, 1351) -1392 = NOT(1351) -1393 = NOR(1119, 1355) -1394 = NOT(1355) -1395 = NOR(1167, 1359) -1396 = NOT(1359) -1397 = NOR(1215, 1363) -1398 = NOT(1363) -1399 = NOR(1263, 1367) -1400 = NOT(1367) -1401 = NOR(1371, 1372) -1404 = NOR(1373, 1374) -1407 = NOR(1375, 1376) -1410 = NOR(1377, 1378) -1413 = NOR(1379, 1380) -1416 = NOR(1381, 1382) -1419 = NOR(1383, 1384) -1422 = NOR(1385, 1386) -1425 = NOR(1387, 1388) -1428 = NOR(1389, 1390) -1431 = NOR(1391, 1392) -1434 = NOR(1393, 1394) -1437 = NOR(1395, 1396) -1440 = NOR(1397, 1398) -1443 = NOR(1399, 1400) -1446 = NOR(1401, 546) -1450 = NOR(1404, 594) -1454 = NOR(1407, 642) -1458 = NOR(1410, 690) -1462 = NOR(1413, 738) -1466 = NOR(1416, 786) -1470 = NOR(1419, 834) -1474 = NOR(1422, 882) -1478 = NOR(1425, 930) -1482 = NOR(1428, 978) -1486 = NOR(1431, 1026) -1490 = NOR(1434, 1074) -1494 = NOR(1437, 1122) -1498 = NOR(1440, 1170) -1502 = NOR(1443, 1218) -1506 = NOR(1401, 1446) -1507 = NOR(1446, 546) -1508 = NOR(1311, 1446) -1511 = NOR(1404, 1450) -1512 = NOR(1450, 594) -1513 = NOR(1315, 1450) -1516 = NOR(1407, 1454) -1517 = NOR(1454, 642) -1518 = NOR(1319, 1454) -1521 = NOR(1410, 1458) -1522 = NOR(1458, 690) -1523 = NOR(1323, 1458) -1526 = NOR(1413, 1462) -1527 = NOR(1462, 738) -1528 = NOR(1327, 1462) -1531 = NOR(1416, 1466) -1532 = NOR(1466, 786) -1533 = NOR(1331, 1466) -1536 = NOR(1419, 1470) -1537 = NOR(1470, 834) -1538 = NOR(1335, 1470) -1541 = NOR(1422, 1474) -1542 = NOR(1474, 882) -1543 = NOR(1339, 1474) -1546 = NOR(1425, 1478) -1547 = NOR(1478, 930) -1548 = NOR(1343, 1478) -1551 = NOR(1428, 1482) -1552 = NOR(1482, 978) -1553 = NOR(1347, 1482) -1556 = NOR(1431, 1486) -1557 = NOR(1486, 1026) -1558 = NOR(1351, 1486) -1561 = NOR(1434, 1490) -1562 = NOR(1490, 1074) -1563 = NOR(1355, 1490) -1566 = NOR(1437, 1494) -1567 = NOR(1494, 1122) -1568 = NOR(1359, 1494) -1571 = NOR(1440, 1498) -1572 = NOR(1498, 1170) -1573 = NOR(1363, 1498) -1576 = NOR(1443, 1502) -1577 = NOR(1502, 1218) -1578 = NOR(1367, 1502) -1581 = NOR(1506, 1507) -1582 = NOR(1511, 1512) -1585 = NOR(1516, 1517) -1588 = NOR(1521, 1522) -1591 = NOR(1526, 1527) -1594 = NOR(1531, 1532) -1597 = NOR(1536, 1537) -1600 = NOR(1541, 1542) -1603 = NOR(1546, 1547) -1606 = NOR(1551, 1552) -1609 = NOR(1556, 1557) -1612 = NOR(1561, 1562) -1615 = NOR(1566, 1567) -1618 = NOR(1571, 1572) -1621 = NOR(1576, 1577) -1624 = NOR(1266, 1578) -1628 = NOR(1582, 1508) -1632 = NOR(1585, 1513) -1636 = NOR(1588, 1518) -1640 = NOR(1591, 1523) -1644 = NOR(1594, 1528) -1648 = NOR(1597, 1533) -1652 = NOR(1600, 1538) -1656 = NOR(1603, 1543) -1660 = NOR(1606, 1548) -1664 = NOR(1609, 1553) -1668 = NOR(1612, 1558) -1672 = NOR(1615, 1563) -1676 = NOR(1618, 1568) -1680 = NOR(1621, 1573) -1684 = NOR(1266, 1624) -1685 = NOR(1624, 1578) -1686 = NOR(1582, 1628) -1687 = NOR(1628, 1508) -1688 = NOR(1585, 1632) -1689 = NOR(1632, 1513) -1690 = NOR(1588, 1636) -1691 = NOR(1636, 1518) -1692 = NOR(1591, 1640) -1693 = NOR(1640, 1523) -1694 = NOR(1594, 1644) -1695 = NOR(1644, 1528) -1696 = NOR(1597, 1648) -1697 = NOR(1648, 1533) -1698 = NOR(1600, 1652) -1699 = NOR(1652, 1538) -1700 = NOR(1603, 1656) -1701 = NOR(1656, 1543) -1702 = NOR(1606, 1660) -1703 = NOR(1660, 1548) -1704 = NOR(1609, 1664) -1705 = NOR(1664, 1553) -1706 = NOR(1612, 1668) -1707 = NOR(1668, 1558) -1708 = NOR(1615, 1672) -1709 = NOR(1672, 1563) -1710 = NOR(1618, 1676) -1711 = NOR(1676, 1568) -1712 = NOR(1621, 1680) -1713 = NOR(1680, 1573) -1714 = NOR(1684, 1685) -1717 = NOR(1686, 1687) -1720 = NOR(1688, 1689) -1723 = NOR(1690, 1691) -1726 = NOR(1692, 1693) -1729 = NOR(1694, 1695) -1732 = NOR(1696, 1697) -1735 = NOR(1698, 1699) -1738 = NOR(1700, 1701) -1741 = NOR(1702, 1703) -1744 = NOR(1704, 1705) -1747 = NOR(1706, 1707) -1750 = NOR(1708, 1709) -1753 = NOR(1710, 1711) -1756 = NOR(1712, 1713) -1759 = NOR(1714, 1221) -1763 = NOR(1717, 549) -1767 = NOR(1720, 597) -1771 = NOR(1723, 645) -1775 = NOR(1726, 693) -1779 = NOR(1729, 741) -1783 = NOR(1732, 789) -1787 = NOR(1735, 837) -1791 = NOR(1738, 885) -1795 = NOR(1741, 933) -1799 = NOR(1744, 981) -1803 = NOR(1747, 1029) -1807 = NOR(1750, 1077) -1811 = NOR(1753, 1125) -1815 = NOR(1756, 1173) -1819 = NOR(1714, 1759) -1820 = NOR(1759, 1221) -1821 = NOR(1624, 1759) -1824 = NOR(1717, 1763) -1825 = NOR(1763, 549) -1826 = NOR(1628, 1763) -1829 = NOR(1720, 1767) -1830 = NOR(1767, 597) -1831 = NOR(1632, 1767) -1834 = NOR(1723, 1771) -1835 = NOR(1771, 645) -1836 = NOR(1636, 1771) -1839 = NOR(1726, 1775) -1840 = NOR(1775, 693) -1841 = NOR(1640, 1775) -1844 = NOR(1729, 1779) -1845 = NOR(1779, 741) -1846 = NOR(1644, 1779) -1849 = NOR(1732, 1783) -1850 = NOR(1783, 789) -1851 = NOR(1648, 1783) -1854 = NOR(1735, 1787) -1855 = NOR(1787, 837) -1856 = NOR(1652, 1787) -1859 = NOR(1738, 1791) -1860 = NOR(1791, 885) -1861 = NOR(1656, 1791) -1864 = NOR(1741, 1795) -1865 = NOR(1795, 933) -1866 = NOR(1660, 1795) -1869 = NOR(1744, 1799) -1870 = NOR(1799, 981) -1871 = NOR(1664, 1799) -1874 = NOR(1747, 1803) -1875 = NOR(1803, 1029) -1876 = NOR(1668, 1803) -1879 = NOR(1750, 1807) -1880 = NOR(1807, 1077) -1881 = NOR(1672, 1807) -1884 = NOR(1753, 1811) -1885 = NOR(1811, 1125) -1886 = NOR(1676, 1811) -1889 = NOR(1756, 1815) -1890 = NOR(1815, 1173) -1891 = NOR(1680, 1815) -1894 = NOR(1819, 1820) -1897 = NOR(1269, 1821) -1901 = NOR(1824, 1825) -1902 = NOR(1829, 1830) -1905 = NOR(1834, 1835) -1908 = NOR(1839, 1840) -1911 = NOR(1844, 1845) -1914 = NOR(1849, 1850) -1917 = NOR(1854, 1855) -1920 = NOR(1859, 1860) -1923 = NOR(1864, 1865) -1926 = NOR(1869, 1870) -1929 = NOR(1874, 1875) -1932 = NOR(1879, 1880) -1935 = NOR(1884, 1885) -1938 = NOR(1889, 1890) -1941 = NOR(1894, 1891) -1945 = NOR(1269, 1897) -1946 = NOR(1897, 1821) -1947 = NOR(1902, 1826) -1951 = NOR(1905, 1831) -1955 = NOR(1908, 1836) -1959 = NOR(1911, 1841) -1963 = NOR(1914, 1846) -1967 = NOR(1917, 1851) -1971 = NOR(1920, 1856) -1975 = NOR(1923, 1861) -1979 = NOR(1926, 1866) -1983 = NOR(1929, 1871) -1987 = NOR(1932, 1876) -1991 = NOR(1935, 1881) -1995 = NOR(1938, 1886) -1999 = NOR(1894, 1941) -2000 = NOR(1941, 1891) -2001 = NOR(1945, 1946) -2004 = NOR(1902, 1947) -2005 = NOR(1947, 1826) -2006 = NOR(1905, 1951) -2007 = NOR(1951, 1831) -2008 = NOR(1908, 1955) -2009 = NOR(1955, 1836) -2010 = NOR(1911, 1959) -2011 = NOR(1959, 1841) -2012 = NOR(1914, 1963) -2013 = NOR(1963, 1846) -2014 = NOR(1917, 1967) -2015 = NOR(1967, 1851) -2016 = NOR(1920, 1971) -2017 = NOR(1971, 1856) -2018 = NOR(1923, 1975) -2019 = NOR(1975, 1861) -2020 = NOR(1926, 1979) -2021 = NOR(1979, 1866) -2022 = NOR(1929, 1983) -2023 = NOR(1983, 1871) -2024 = NOR(1932, 1987) -2025 = NOR(1987, 1876) -2026 = NOR(1935, 1991) -2027 = NOR(1991, 1881) -2028 = NOR(1938, 1995) -2029 = NOR(1995, 1886) -2030 = NOR(1999, 2000) -2033 = NOR(2001, 1224) -2037 = NOR(2004, 2005) -2040 = NOR(2006, 2007) -2043 = NOR(2008, 2009) -2046 = NOR(2010, 2011) -2049 = NOR(2012, 2013) -2052 = NOR(2014, 2015) -2055 = NOR(2016, 2017) -2058 = NOR(2018, 2019) -2061 = NOR(2020, 2021) -2064 = NOR(2022, 2023) -2067 = NOR(2024, 2025) -2070 = NOR(2026, 2027) -2073 = NOR(2028, 2029) -2076 = NOR(2030, 1176) -2080 = NOR(2001, 2033) -2081 = NOR(2033, 1224) -2082 = NOR(1897, 2033) -2085 = NOR(2037, 552) -2089 = NOR(2040, 600) -2093 = NOR(2043, 648) -2097 = NOR(2046, 696) -2101 = NOR(2049, 744) -2105 = NOR(2052, 792) -2109 = NOR(2055, 840) -2113 = NOR(2058, 888) -2117 = NOR(2061, 936) -2121 = NOR(2064, 984) -2125 = NOR(2067, 1032) -2129 = NOR(2070, 1080) -2133 = NOR(2073, 1128) -2137 = NOR(2030, 2076) -2138 = NOR(2076, 1176) -2139 = NOR(1941, 2076) -2142 = NOR(2080, 2081) -2145 = NOR(1272, 2082) -2149 = NOR(2037, 2085) -2150 = NOR(2085, 552) -2151 = NOR(1947, 2085) -2154 = NOR(2040, 2089) -2155 = NOR(2089, 600) -2156 = NOR(1951, 2089) -2159 = NOR(2043, 2093) -2160 = NOR(2093, 648) -2161 = NOR(1955, 2093) -2164 = NOR(2046, 2097) -2165 = NOR(2097, 696) -2166 = NOR(1959, 2097) -2169 = NOR(2049, 2101) -2170 = NOR(2101, 744) -2171 = NOR(1963, 2101) -2174 = NOR(2052, 2105) -2175 = NOR(2105, 792) -2176 = NOR(1967, 2105) -2179 = NOR(2055, 2109) -2180 = NOR(2109, 840) -2181 = NOR(1971, 2109) -2184 = NOR(2058, 2113) -2185 = NOR(2113, 888) -2186 = NOR(1975, 2113) -2189 = NOR(2061, 2117) -2190 = NOR(2117, 936) -2191 = NOR(1979, 2117) -2194 = NOR(2064, 2121) -2195 = NOR(2121, 984) -2196 = NOR(1983, 2121) -2199 = NOR(2067, 2125) -2200 = NOR(2125, 1032) -2201 = NOR(1987, 2125) -2204 = NOR(2070, 2129) -2205 = NOR(2129, 1080) -2206 = NOR(1991, 2129) -2209 = NOR(2073, 2133) -2210 = NOR(2133, 1128) -2211 = NOR(1995, 2133) -2214 = NOR(2137, 2138) -2217 = NOR(2142, 2139) -2221 = NOR(1272, 2145) -2222 = NOR(2145, 2082) -2223 = NOR(2149, 2150) -2224 = NOR(2154, 2155) -2227 = NOR(2159, 2160) -2230 = NOR(2164, 2165) -2233 = NOR(2169, 2170) -2236 = NOR(2174, 2175) -2239 = NOR(2179, 2180) -2242 = NOR(2184, 2185) -2245 = NOR(2189, 2190) -2248 = NOR(2194, 2195) -2251 = NOR(2199, 2200) -2254 = NOR(2204, 2205) -2257 = NOR(2209, 2210) -2260 = NOR(2214, 2211) -2264 = NOR(2142, 2217) -2265 = NOR(2217, 2139) -2266 = NOR(2221, 2222) -2269 = NOR(2224, 2151) -2273 = NOR(2227, 2156) -2277 = NOR(2230, 2161) -2281 = NOR(2233, 2166) -2285 = NOR(2236, 2171) -2289 = NOR(2239, 2176) -2293 = NOR(2242, 2181) -2297 = NOR(2245, 2186) -2301 = NOR(2248, 2191) -2305 = NOR(2251, 2196) -2309 = NOR(2254, 2201) -2313 = NOR(2257, 2206) -2317 = NOR(2214, 2260) -2318 = NOR(2260, 2211) -2319 = NOR(2264, 2265) -2322 = NOR(2266, 1227) -2326 = NOR(2224, 2269) -2327 = NOR(2269, 2151) -2328 = NOR(2227, 2273) -2329 = NOR(2273, 2156) -2330 = NOR(2230, 2277) -2331 = NOR(2277, 2161) -2332 = NOR(2233, 2281) -2333 = NOR(2281, 2166) -2334 = NOR(2236, 2285) -2335 = NOR(2285, 2171) -2336 = NOR(2239, 2289) -2337 = NOR(2289, 2176) -2338 = NOR(2242, 2293) -2339 = NOR(2293, 2181) -2340 = NOR(2245, 2297) -2341 = NOR(2297, 2186) -2342 = NOR(2248, 2301) -2343 = NOR(2301, 2191) -2344 = NOR(2251, 2305) -2345 = NOR(2305, 2196) -2346 = NOR(2254, 2309) -2347 = NOR(2309, 2201) -2348 = NOR(2257, 2313) -2349 = NOR(2313, 2206) -2350 = NOR(2317, 2318) -2353 = NOR(2319, 1179) -2357 = NOR(2266, 2322) -2358 = NOR(2322, 1227) -2359 = NOR(2145, 2322) -2362 = NOR(2326, 2327) -2365 = NOR(2328, 2329) -2368 = NOR(2330, 2331) -2371 = NOR(2332, 2333) -2374 = NOR(2334, 2335) -2377 = NOR(2336, 2337) -2380 = NOR(2338, 2339) -2383 = NOR(2340, 2341) -2386 = NOR(2342, 2343) -2389 = NOR(2344, 2345) -2392 = NOR(2346, 2347) -2395 = NOR(2348, 2349) -2398 = NOR(2350, 1131) -2402 = NOR(2319, 2353) -2403 = NOR(2353, 1179) -2404 = NOR(2217, 2353) -2407 = NOR(2357, 2358) -2410 = NOR(1275, 2359) -2414 = NOR(2362, 555) -2418 = NOR(2365, 603) -2422 = NOR(2368, 651) -2426 = NOR(2371, 699) -2430 = NOR(2374, 747) -2434 = NOR(2377, 795) -2438 = NOR(2380, 843) -2442 = NOR(2383, 891) -2446 = NOR(2386, 939) -2450 = NOR(2389, 987) -2454 = NOR(2392, 1035) -2458 = NOR(2395, 1083) -2462 = NOR(2350, 2398) -2463 = NOR(2398, 1131) -2464 = NOR(2260, 2398) -2467 = NOR(2402, 2403) -2470 = NOR(2407, 2404) -2474 = NOR(1275, 2410) -2475 = NOR(2410, 2359) -2476 = NOR(2362, 2414) -2477 = NOR(2414, 555) -2478 = NOR(2269, 2414) -2481 = NOR(2365, 2418) -2482 = NOR(2418, 603) -2483 = NOR(2273, 2418) -2486 = NOR(2368, 2422) -2487 = NOR(2422, 651) -2488 = NOR(2277, 2422) -2491 = NOR(2371, 2426) -2492 = NOR(2426, 699) -2493 = NOR(2281, 2426) -2496 = NOR(2374, 2430) -2497 = NOR(2430, 747) -2498 = NOR(2285, 2430) -2501 = NOR(2377, 2434) -2502 = NOR(2434, 795) -2503 = NOR(2289, 2434) -2506 = NOR(2380, 2438) -2507 = NOR(2438, 843) -2508 = NOR(2293, 2438) -2511 = NOR(2383, 2442) -2512 = NOR(2442, 891) -2513 = NOR(2297, 2442) -2516 = NOR(2386, 2446) -2517 = NOR(2446, 939) -2518 = NOR(2301, 2446) -2521 = NOR(2389, 2450) -2522 = NOR(2450, 987) -2523 = NOR(2305, 2450) -2526 = NOR(2392, 2454) -2527 = NOR(2454, 1035) -2528 = NOR(2309, 2454) -2531 = NOR(2395, 2458) -2532 = NOR(2458, 1083) -2533 = NOR(2313, 2458) -2536 = NOR(2462, 2463) -2539 = NOR(2467, 2464) -2543 = NOR(2407, 2470) -2544 = NOR(2470, 2404) -2545 = NOR(2474, 2475) -2548 = NOR(2476, 2477) -2549 = NOR(2481, 2482) -2552 = NOR(2486, 2487) -2555 = NOR(2491, 2492) -2558 = NOR(2496, 2497) -2561 = NOR(2501, 2502) -2564 = NOR(2506, 2507) -2567 = NOR(2511, 2512) -2570 = NOR(2516, 2517) -2573 = NOR(2521, 2522) -2576 = NOR(2526, 2527) -2579 = NOR(2531, 2532) -2582 = NOR(2536, 2533) -2586 = NOR(2467, 2539) -2587 = NOR(2539, 2464) -2588 = NOR(2543, 2544) -2591 = NOR(2545, 1230) -2595 = NOR(2549, 2478) -2599 = NOR(2552, 2483) -2603 = NOR(2555, 2488) -2607 = NOR(2558, 2493) -2611 = NOR(2561, 2498) -2615 = NOR(2564, 2503) -2619 = NOR(2567, 2508) -2623 = NOR(2570, 2513) -2627 = NOR(2573, 2518) -2631 = NOR(2576, 2523) -2635 = NOR(2579, 2528) -2639 = NOR(2536, 2582) -2640 = NOR(2582, 2533) -2641 = NOR(2586, 2587) -2644 = NOR(2588, 1182) -2648 = NOR(2545, 2591) -2649 = NOR(2591, 1230) -2650 = NOR(2410, 2591) -2653 = NOR(2549, 2595) -2654 = NOR(2595, 2478) -2655 = NOR(2552, 2599) -2656 = NOR(2599, 2483) -2657 = NOR(2555, 2603) -2658 = NOR(2603, 2488) -2659 = NOR(2558, 2607) -2660 = NOR(2607, 2493) -2661 = NOR(2561, 2611) -2662 = NOR(2611, 2498) -2663 = NOR(2564, 2615) -2664 = NOR(2615, 2503) -2665 = NOR(2567, 2619) -2666 = NOR(2619, 2508) -2667 = NOR(2570, 2623) -2668 = NOR(2623, 2513) -2669 = NOR(2573, 2627) -2670 = NOR(2627, 2518) -2671 = NOR(2576, 2631) -2672 = NOR(2631, 2523) -2673 = NOR(2579, 2635) -2674 = NOR(2635, 2528) -2675 = NOR(2639, 2640) -2678 = NOR(2641, 1134) -2682 = NOR(2588, 2644) -2683 = NOR(2644, 1182) -2684 = NOR(2470, 2644) -2687 = NOR(2648, 2649) -2690 = NOR(1278, 2650) -2694 = NOR(2653, 2654) -2697 = NOR(2655, 2656) -2700 = NOR(2657, 2658) -2703 = NOR(2659, 2660) -2706 = NOR(2661, 2662) -2709 = NOR(2663, 2664) -2712 = NOR(2665, 2666) -2715 = NOR(2667, 2668) -2718 = NOR(2669, 2670) -2721 = NOR(2671, 2672) -2724 = NOR(2673, 2674) -2727 = NOR(2675, 1086) -2731 = NOR(2641, 2678) -2732 = NOR(2678, 1134) -2733 = NOR(2539, 2678) -2736 = NOR(2682, 2683) -2739 = NOR(2687, 2684) -2743 = NOR(1278, 2690) -2744 = NOR(2690, 2650) -2745 = NOR(2694, 558) -2749 = NOR(2697, 606) -2753 = NOR(2700, 654) -2757 = NOR(2703, 702) -2761 = NOR(2706, 750) -2765 = NOR(2709, 798) -2769 = NOR(2712, 846) -2773 = NOR(2715, 894) -2777 = NOR(2718, 942) -2781 = NOR(2721, 990) -2785 = NOR(2724, 1038) -2789 = NOR(2675, 2727) -2790 = NOR(2727, 1086) -2791 = NOR(2582, 2727) -2794 = NOR(2731, 2732) -2797 = NOR(2736, 2733) -2801 = NOR(2687, 2739) -2802 = NOR(2739, 2684) -2803 = NOR(2743, 2744) -2806 = NOR(2694, 2745) -2807 = NOR(2745, 558) -2808 = NOR(2595, 2745) -2811 = NOR(2697, 2749) -2812 = NOR(2749, 606) -2813 = NOR(2599, 2749) -2816 = NOR(2700, 2753) -2817 = NOR(2753, 654) -2818 = NOR(2603, 2753) -2821 = NOR(2703, 2757) -2822 = NOR(2757, 702) -2823 = NOR(2607, 2757) -2826 = NOR(2706, 2761) -2827 = NOR(2761, 750) -2828 = NOR(2611, 2761) -2831 = NOR(2709, 2765) -2832 = NOR(2765, 798) -2833 = NOR(2615, 2765) -2836 = NOR(2712, 2769) -2837 = NOR(2769, 846) -2838 = NOR(2619, 2769) -2841 = NOR(2715, 2773) -2842 = NOR(2773, 894) -2843 = NOR(2623, 2773) -2846 = NOR(2718, 2777) -2847 = NOR(2777, 942) -2848 = NOR(2627, 2777) -2851 = NOR(2721, 2781) -2852 = NOR(2781, 990) -2853 = NOR(2631, 2781) -2856 = NOR(2724, 2785) -2857 = NOR(2785, 1038) -2858 = NOR(2635, 2785) -2861 = NOR(2789, 2790) -2864 = NOR(2794, 2791) -2868 = NOR(2736, 2797) -2869 = NOR(2797, 2733) -2870 = NOR(2801, 2802) -2873 = NOR(2803, 1233) -2877 = NOR(2806, 2807) -2878 = NOR(2811, 2812) -2881 = NOR(2816, 2817) -2884 = NOR(2821, 2822) -2887 = NOR(2826, 2827) -2890 = NOR(2831, 2832) -2893 = NOR(2836, 2837) -2896 = NOR(2841, 2842) -2899 = NOR(2846, 2847) -2902 = NOR(2851, 2852) -2905 = NOR(2856, 2857) -2908 = NOR(2861, 2858) -2912 = NOR(2794, 2864) -2913 = NOR(2864, 2791) -2914 = NOR(2868, 2869) -2917 = NOR(2870, 1185) -2921 = NOR(2803, 2873) -2922 = NOR(2873, 1233) -2923 = NOR(2690, 2873) -2926 = NOR(2878, 2808) -2930 = NOR(2881, 2813) -2934 = NOR(2884, 2818) -2938 = NOR(2887, 2823) -2942 = NOR(2890, 2828) -2946 = NOR(2893, 2833) -2950 = NOR(2896, 2838) -2954 = NOR(2899, 2843) -2958 = NOR(2902, 2848) -2962 = NOR(2905, 2853) -2966 = NOR(2861, 2908) -2967 = NOR(2908, 2858) -2968 = NOR(2912, 2913) -2971 = NOR(2914, 1137) -2975 = NOR(2870, 2917) -2976 = NOR(2917, 1185) -2977 = NOR(2739, 2917) -2980 = NOR(2921, 2922) -2983 = NOR(1281, 2923) -2987 = NOR(2878, 2926) -2988 = NOR(2926, 2808) -2989 = NOR(2881, 2930) -2990 = NOR(2930, 2813) -2991 = NOR(2884, 2934) -2992 = NOR(2934, 2818) -2993 = NOR(2887, 2938) -2994 = NOR(2938, 2823) -2995 = NOR(2890, 2942) -2996 = NOR(2942, 2828) -2997 = NOR(2893, 2946) -2998 = NOR(2946, 2833) -2999 = NOR(2896, 2950) -3000 = NOR(2950, 2838) -3001 = NOR(2899, 2954) -3002 = NOR(2954, 2843) -3003 = NOR(2902, 2958) -3004 = NOR(2958, 2848) -3005 = NOR(2905, 2962) -3006 = NOR(2962, 2853) -3007 = NOR(2966, 2967) -3010 = NOR(2968, 1089) -3014 = NOR(2914, 2971) -3015 = NOR(2971, 1137) -3016 = NOR(2797, 2971) -3019 = NOR(2975, 2976) -3022 = NOR(2980, 2977) -3026 = NOR(1281, 2983) -3027 = NOR(2983, 2923) -3028 = NOR(2987, 2988) -3031 = NOR(2989, 2990) -3034 = NOR(2991, 2992) -3037 = NOR(2993, 2994) -3040 = NOR(2995, 2996) -3043 = NOR(2997, 2998) -3046 = NOR(2999, 3000) -3049 = NOR(3001, 3002) -3052 = NOR(3003, 3004) -3055 = NOR(3005, 3006) -3058 = NOR(3007, 1041) -3062 = NOR(2968, 3010) -3063 = NOR(3010, 1089) -3064 = NOR(2864, 3010) -3067 = NOR(3014, 3015) -3070 = NOR(3019, 3016) -3074 = NOR(2980, 3022) -3075 = NOR(3022, 2977) -3076 = NOR(3026, 3027) -3079 = NOR(3028, 561) -3083 = NOR(3031, 609) -3087 = NOR(3034, 657) -3091 = NOR(3037, 705) -3095 = NOR(3040, 753) -3099 = NOR(3043, 801) -3103 = NOR(3046, 849) -3107 = NOR(3049, 897) -3111 = NOR(3052, 945) -3115 = NOR(3055, 993) -3119 = NOR(3007, 3058) -3120 = NOR(3058, 1041) -3121 = NOR(2908, 3058) -3124 = NOR(3062, 3063) -3127 = NOR(3067, 3064) -3131 = NOR(3019, 3070) -3132 = NOR(3070, 3016) -3133 = NOR(3074, 3075) -3136 = NOR(3076, 1236) -3140 = NOR(3028, 3079) -3141 = NOR(3079, 561) -3142 = NOR(2926, 3079) -3145 = NOR(3031, 3083) -3146 = NOR(3083, 609) -3147 = NOR(2930, 3083) -3150 = NOR(3034, 3087) -3151 = NOR(3087, 657) -3152 = NOR(2934, 3087) -3155 = NOR(3037, 3091) -3156 = NOR(3091, 705) -3157 = NOR(2938, 3091) -3160 = NOR(3040, 3095) -3161 = NOR(3095, 753) -3162 = NOR(2942, 3095) -3165 = NOR(3043, 3099) -3166 = NOR(3099, 801) -3167 = NOR(2946, 3099) -3170 = NOR(3046, 3103) -3171 = NOR(3103, 849) -3172 = NOR(2950, 3103) -3175 = NOR(3049, 3107) -3176 = NOR(3107, 897) -3177 = NOR(2954, 3107) -3180 = NOR(3052, 3111) -3181 = NOR(3111, 945) -3182 = NOR(2958, 3111) -3185 = NOR(3055, 3115) -3186 = NOR(3115, 993) -3187 = NOR(2962, 3115) -3190 = NOR(3119, 3120) -3193 = NOR(3124, 3121) -3197 = NOR(3067, 3127) -3198 = NOR(3127, 3064) -3199 = NOR(3131, 3132) -3202 = NOR(3133, 1188) -3206 = NOR(3076, 3136) -3207 = NOR(3136, 1236) -3208 = NOR(2983, 3136) -3211 = NOR(3140, 3141) -3212 = NOR(3145, 3146) -3215 = NOR(3150, 3151) -3218 = NOR(3155, 3156) -3221 = NOR(3160, 3161) -3224 = NOR(3165, 3166) -3227 = NOR(3170, 3171) -3230 = NOR(3175, 3176) -3233 = NOR(3180, 3181) -3236 = NOR(3185, 3186) -3239 = NOR(3190, 3187) -3243 = NOR(3124, 3193) -3244 = NOR(3193, 3121) -3245 = NOR(3197, 3198) -3248 = NOR(3199, 1140) -3252 = NOR(3133, 3202) -3253 = NOR(3202, 1188) -3254 = NOR(3022, 3202) -3257 = NOR(3206, 3207) -3260 = NOR(1284, 3208) -3264 = NOR(3212, 3142) -3268 = NOR(3215, 3147) -3272 = NOR(3218, 3152) -3276 = NOR(3221, 3157) -3280 = NOR(3224, 3162) -3284 = NOR(3227, 3167) -3288 = NOR(3230, 3172) -3292 = NOR(3233, 3177) -3296 = NOR(3236, 3182) -3300 = NOR(3190, 3239) -3301 = NOR(3239, 3187) -3302 = NOR(3243, 3244) -3305 = NOR(3245, 1092) -3309 = NOR(3199, 3248) -3310 = NOR(3248, 1140) -3311 = NOR(3070, 3248) -3314 = NOR(3252, 3253) -3317 = NOR(3257, 3254) -3321 = NOR(1284, 3260) -3322 = NOR(3260, 3208) -3323 = NOR(3212, 3264) -3324 = NOR(3264, 3142) -3325 = NOR(3215, 3268) -3326 = NOR(3268, 3147) -3327 = NOR(3218, 3272) -3328 = NOR(3272, 3152) -3329 = NOR(3221, 3276) -3330 = NOR(3276, 3157) -3331 = NOR(3224, 3280) -3332 = NOR(3280, 3162) -3333 = NOR(3227, 3284) -3334 = NOR(3284, 3167) -3335 = NOR(3230, 3288) -3336 = NOR(3288, 3172) -3337 = NOR(3233, 3292) -3338 = NOR(3292, 3177) -3339 = NOR(3236, 3296) -3340 = NOR(3296, 3182) -3341 = NOR(3300, 3301) -3344 = NOR(3302, 1044) -3348 = NOR(3245, 3305) -3349 = NOR(3305, 1092) -3350 = NOR(3127, 3305) -3353 = NOR(3309, 3310) -3356 = NOR(3314, 3311) -3360 = NOR(3257, 3317) -3361 = NOR(3317, 3254) -3362 = NOR(3321, 3322) -3365 = NOR(3323, 3324) -3368 = NOR(3325, 3326) -3371 = NOR(3327, 3328) -3374 = NOR(3329, 3330) -3377 = NOR(3331, 3332) -3380 = NOR(3333, 3334) -3383 = NOR(3335, 3336) -3386 = NOR(3337, 3338) -3389 = NOR(3339, 3340) -3392 = NOR(3341, 996) -3396 = NOR(3302, 3344) -3397 = NOR(3344, 1044) -3398 = NOR(3193, 3344) -3401 = NOR(3348, 3349) -3404 = NOR(3353, 3350) -3408 = NOR(3314, 3356) -3409 = NOR(3356, 3311) -3410 = NOR(3360, 3361) -3413 = NOR(3362, 1239) -3417 = NOR(3365, 564) -3421 = NOR(3368, 612) -3425 = NOR(3371, 660) -3429 = NOR(3374, 708) -3433 = NOR(3377, 756) -3437 = NOR(3380, 804) -3441 = NOR(3383, 852) -3445 = NOR(3386, 900) -3449 = NOR(3389, 948) -3453 = NOR(3341, 3392) -3454 = NOR(3392, 996) -3455 = NOR(3239, 3392) -3458 = NOR(3396, 3397) -3461 = NOR(3401, 3398) -3465 = NOR(3353, 3404) -3466 = NOR(3404, 3350) -3467 = NOR(3408, 3409) -3470 = NOR(3410, 1191) -3474 = NOR(3362, 3413) -3475 = NOR(3413, 1239) -3476 = NOR(3260, 3413) -3479 = NOR(3365, 3417) -3480 = NOR(3417, 564) -3481 = NOR(3264, 3417) -3484 = NOR(3368, 3421) -3485 = NOR(3421, 612) -3486 = NOR(3268, 3421) -3489 = NOR(3371, 3425) -3490 = NOR(3425, 660) -3491 = NOR(3272, 3425) -3494 = NOR(3374, 3429) -3495 = NOR(3429, 708) -3496 = NOR(3276, 3429) -3499 = NOR(3377, 3433) -3500 = NOR(3433, 756) -3501 = NOR(3280, 3433) -3504 = NOR(3380, 3437) -3505 = NOR(3437, 804) -3506 = NOR(3284, 3437) -3509 = NOR(3383, 3441) -3510 = NOR(3441, 852) -3511 = NOR(3288, 3441) -3514 = NOR(3386, 3445) -3515 = NOR(3445, 900) -3516 = NOR(3292, 3445) -3519 = NOR(3389, 3449) -3520 = NOR(3449, 948) -3521 = NOR(3296, 3449) -3524 = NOR(3453, 3454) -3527 = NOR(3458, 3455) -3531 = NOR(3401, 3461) -3532 = NOR(3461, 3398) -3533 = NOR(3465, 3466) -3536 = NOR(3467, 1143) -3540 = NOR(3410, 3470) -3541 = NOR(3470, 1191) -3542 = NOR(3317, 3470) -3545 = NOR(3474, 3475) -3548 = NOR(1287, 3476) -3552 = NOR(3479, 3480) -3553 = NOR(3484, 3485) -3556 = NOR(3489, 3490) -3559 = NOR(3494, 3495) -3562 = NOR(3499, 3500) -3565 = NOR(3504, 3505) -3568 = NOR(3509, 3510) -3571 = NOR(3514, 3515) -3574 = NOR(3519, 3520) -3577 = NOR(3524, 3521) -3581 = NOR(3458, 3527) -3582 = NOR(3527, 3455) -3583 = NOR(3531, 3532) -3586 = NOR(3533, 1095) -3590 = NOR(3467, 3536) -3591 = NOR(3536, 1143) -3592 = NOR(3356, 3536) -3595 = NOR(3540, 3541) -3598 = NOR(3545, 3542) -3602 = NOR(1287, 3548) -3603 = NOR(3548, 3476) -3604 = NOR(3553, 3481) -3608 = NOR(3556, 3486) -3612 = NOR(3559, 3491) -3616 = NOR(3562, 3496) -3620 = NOR(3565, 3501) -3624 = NOR(3568, 3506) -3628 = NOR(3571, 3511) -3632 = NOR(3574, 3516) -3636 = NOR(3524, 3577) -3637 = NOR(3577, 3521) -3638 = NOR(3581, 3582) -3641 = NOR(3583, 1047) -3645 = NOR(3533, 3586) -3646 = NOR(3586, 1095) -3647 = NOR(3404, 3586) -3650 = NOR(3590, 3591) -3653 = NOR(3595, 3592) -3657 = NOR(3545, 3598) -3658 = NOR(3598, 3542) -3659 = NOR(3602, 3603) -3662 = NOR(3553, 3604) -3663 = NOR(3604, 3481) -3664 = NOR(3556, 3608) -3665 = NOR(3608, 3486) -3666 = NOR(3559, 3612) -3667 = NOR(3612, 3491) -3668 = NOR(3562, 3616) -3669 = NOR(3616, 3496) -3670 = NOR(3565, 3620) -3671 = NOR(3620, 3501) -3672 = NOR(3568, 3624) -3673 = NOR(3624, 3506) -3674 = NOR(3571, 3628) -3675 = NOR(3628, 3511) -3676 = NOR(3574, 3632) -3677 = NOR(3632, 3516) -3678 = NOR(3636, 3637) -3681 = NOR(3638, 999) -3685 = NOR(3583, 3641) -3686 = NOR(3641, 1047) -3687 = NOR(3461, 3641) -3690 = NOR(3645, 3646) -3693 = NOR(3650, 3647) -3697 = NOR(3595, 3653) -3698 = NOR(3653, 3592) -3699 = NOR(3657, 3658) -3702 = NOR(3659, 1242) -3706 = NOR(3662, 3663) -3709 = NOR(3664, 3665) -3712 = NOR(3666, 3667) -3715 = NOR(3668, 3669) -3718 = NOR(3670, 3671) -3721 = NOR(3672, 3673) -3724 = NOR(3674, 3675) -3727 = NOR(3676, 3677) -3730 = NOR(3678, 951) -3734 = NOR(3638, 3681) -3735 = NOR(3681, 999) -3736 = NOR(3527, 3681) -3739 = NOR(3685, 3686) -3742 = NOR(3690, 3687) -3746 = NOR(3650, 3693) -3747 = NOR(3693, 3647) -3748 = NOR(3697, 3698) -3751 = NOR(3699, 1194) -3755 = NOR(3659, 3702) -3756 = NOR(3702, 1242) -3757 = NOR(3548, 3702) -3760 = NOR(3706, 567) -3764 = NOR(3709, 615) -3768 = NOR(3712, 663) -3772 = NOR(3715, 711) -3776 = NOR(3718, 759) -3780 = NOR(3721, 807) -3784 = NOR(3724, 855) -3788 = NOR(3727, 903) -3792 = NOR(3678, 3730) -3793 = NOR(3730, 951) -3794 = NOR(3577, 3730) -3797 = NOR(3734, 3735) -3800 = NOR(3739, 3736) -3804 = NOR(3690, 3742) -3805 = NOR(3742, 3687) -3806 = NOR(3746, 3747) -3809 = NOR(3748, 1146) -3813 = NOR(3699, 3751) -3814 = NOR(3751, 1194) -3815 = NOR(3598, 3751) -3818 = NOR(3755, 3756) -3821 = NOR(1290, 3757) -3825 = NOR(3706, 3760) -3826 = NOR(3760, 567) -3827 = NOR(3604, 3760) -3830 = NOR(3709, 3764) -3831 = NOR(3764, 615) -3832 = NOR(3608, 3764) -3835 = NOR(3712, 3768) -3836 = NOR(3768, 663) -3837 = NOR(3612, 3768) -3840 = NOR(3715, 3772) -3841 = NOR(3772, 711) -3842 = NOR(3616, 3772) -3845 = NOR(3718, 3776) -3846 = NOR(3776, 759) -3847 = NOR(3620, 3776) -3850 = NOR(3721, 3780) -3851 = NOR(3780, 807) -3852 = NOR(3624, 3780) -3855 = NOR(3724, 3784) -3856 = NOR(3784, 855) -3857 = NOR(3628, 3784) -3860 = NOR(3727, 3788) -3861 = NOR(3788, 903) -3862 = NOR(3632, 3788) -3865 = NOR(3792, 3793) -3868 = NOR(3797, 3794) -3872 = NOR(3739, 3800) -3873 = NOR(3800, 3736) -3874 = NOR(3804, 3805) -3877 = NOR(3806, 1098) -3881 = NOR(3748, 3809) -3882 = NOR(3809, 1146) -3883 = NOR(3653, 3809) -3886 = NOR(3813, 3814) -3889 = NOR(3818, 3815) -3893 = NOR(1290, 3821) -3894 = NOR(3821, 3757) -3895 = NOR(3825, 3826) -3896 = NOR(3830, 3831) -3899 = NOR(3835, 3836) -3902 = NOR(3840, 3841) -3905 = NOR(3845, 3846) -3908 = NOR(3850, 3851) -3911 = NOR(3855, 3856) -3914 = NOR(3860, 3861) -3917 = NOR(3865, 3862) -3921 = NOR(3797, 3868) -3922 = NOR(3868, 3794) -3923 = NOR(3872, 3873) -3926 = NOR(3874, 1050) -3930 = NOR(3806, 3877) -3931 = NOR(3877, 1098) -3932 = NOR(3693, 3877) -3935 = NOR(3881, 3882) -3938 = NOR(3886, 3883) -3942 = NOR(3818, 3889) -3943 = NOR(3889, 3815) -3944 = NOR(3893, 3894) -3947 = NOR(3896, 3827) -3951 = NOR(3899, 3832) -3955 = NOR(3902, 3837) -3959 = NOR(3905, 3842) -3963 = NOR(3908, 3847) -3967 = NOR(3911, 3852) -3971 = NOR(3914, 3857) -3975 = NOR(3865, 3917) -3976 = NOR(3917, 3862) -3977 = NOR(3921, 3922) -3980 = NOR(3923, 1002) -3984 = NOR(3874, 3926) -3985 = NOR(3926, 1050) -3986 = NOR(3742, 3926) -3989 = NOR(3930, 3931) -3992 = NOR(3935, 3932) -3996 = NOR(3886, 3938) -3997 = NOR(3938, 3883) -3998 = NOR(3942, 3943) -4001 = NOR(3944, 1245) -4005 = NOR(3896, 3947) -4006 = NOR(3947, 3827) -4007 = NOR(3899, 3951) -4008 = NOR(3951, 3832) -4009 = NOR(3902, 3955) -4010 = NOR(3955, 3837) -4011 = NOR(3905, 3959) -4012 = NOR(3959, 3842) -4013 = NOR(3908, 3963) -4014 = NOR(3963, 3847) -4015 = NOR(3911, 3967) -4016 = NOR(3967, 3852) -4017 = NOR(3914, 3971) -4018 = NOR(3971, 3857) -4019 = NOR(3975, 3976) -4022 = NOR(3977, 954) -4026 = NOR(3923, 3980) -4027 = NOR(3980, 1002) -4028 = NOR(3800, 3980) -4031 = NOR(3984, 3985) -4034 = NOR(3989, 3986) -4038 = NOR(3935, 3992) -4039 = NOR(3992, 3932) -4040 = NOR(3996, 3997) -4043 = NOR(3998, 1197) -4047 = NOR(3944, 4001) -4048 = NOR(4001, 1245) -4049 = NOR(3821, 4001) -4052 = NOR(4005, 4006) -4055 = NOR(4007, 4008) -4058 = NOR(4009, 4010) -4061 = NOR(4011, 4012) -4064 = NOR(4013, 4014) -4067 = NOR(4015, 4016) -4070 = NOR(4017, 4018) -4073 = NOR(4019, 906) -4077 = NOR(3977, 4022) -4078 = NOR(4022, 954) -4079 = NOR(3868, 4022) -4082 = NOR(4026, 4027) -4085 = NOR(4031, 4028) -4089 = NOR(3989, 4034) -4090 = NOR(4034, 3986) -4091 = NOR(4038, 4039) -4094 = NOR(4040, 1149) -4098 = NOR(3998, 4043) -4099 = NOR(4043, 1197) -4100 = NOR(3889, 4043) -4103 = NOR(4047, 4048) -4106 = NOR(1293, 4049) -4110 = NOR(4052, 570) -4114 = NOR(4055, 618) -4118 = NOR(4058, 666) -4122 = NOR(4061, 714) -4126 = NOR(4064, 762) -4130 = NOR(4067, 810) -4134 = NOR(4070, 858) -4138 = NOR(4019, 4073) -4139 = NOR(4073, 906) -4140 = NOR(3917, 4073) -4143 = NOR(4077, 4078) -4146 = NOR(4082, 4079) -4150 = NOR(4031, 4085) -4151 = NOR(4085, 4028) -4152 = NOR(4089, 4090) -4155 = NOR(4091, 1101) -4159 = NOR(4040, 4094) -4160 = NOR(4094, 1149) -4161 = NOR(3938, 4094) -4164 = NOR(4098, 4099) -4167 = NOR(4103, 4100) -4171 = NOR(1293, 4106) -4172 = NOR(4106, 4049) -4173 = NOR(4052, 4110) -4174 = NOR(4110, 570) -4175 = NOR(3947, 4110) -4178 = NOR(4055, 4114) -4179 = NOR(4114, 618) -4180 = NOR(3951, 4114) -4183 = NOR(4058, 4118) -4184 = NOR(4118, 666) -4185 = NOR(3955, 4118) -4188 = NOR(4061, 4122) -4189 = NOR(4122, 714) -4190 = NOR(3959, 4122) -4193 = NOR(4064, 4126) -4194 = NOR(4126, 762) -4195 = NOR(3963, 4126) -4198 = NOR(4067, 4130) -4199 = NOR(4130, 810) -4200 = NOR(3967, 4130) -4203 = NOR(4070, 4134) -4204 = NOR(4134, 858) -4205 = NOR(3971, 4134) -4208 = NOR(4138, 4139) -4211 = NOR(4143, 4140) -4215 = NOR(4082, 4146) -4216 = NOR(4146, 4079) -4217 = NOR(4150, 4151) -4220 = NOR(4152, 1053) -4224 = NOR(4091, 4155) -4225 = NOR(4155, 1101) -4226 = NOR(3992, 4155) -4229 = NOR(4159, 4160) -4232 = NOR(4164, 4161) -4236 = NOR(4103, 4167) -4237 = NOR(4167, 4100) -4238 = NOR(4171, 4172) -4241 = NOR(4173, 4174) -4242 = NOR(4178, 4179) -4245 = NOR(4183, 4184) -4248 = NOR(4188, 4189) -4251 = NOR(4193, 4194) -4254 = NOR(4198, 4199) -4257 = NOR(4203, 4204) -4260 = NOR(4208, 4205) -4264 = NOR(4143, 4211) -4265 = NOR(4211, 4140) -4266 = NOR(4215, 4216) -4269 = NOR(4217, 1005) -4273 = NOR(4152, 4220) -4274 = NOR(4220, 1053) -4275 = NOR(4034, 4220) -4278 = NOR(4224, 4225) -4281 = NOR(4229, 4226) -4285 = NOR(4164, 4232) -4286 = NOR(4232, 4161) -4287 = NOR(4236, 4237) -4290 = NOR(4238, 1248) -4294 = NOR(4242, 4175) -4298 = NOR(4245, 4180) -4302 = NOR(4248, 4185) -4306 = NOR(4251, 4190) -4310 = NOR(4254, 4195) -4314 = NOR(4257, 4200) -4318 = NOR(4208, 4260) -4319 = NOR(4260, 4205) -4320 = NOR(4264, 4265) -4323 = NOR(4266, 957) -4327 = NOR(4217, 4269) -4328 = NOR(4269, 1005) -4329 = NOR(4085, 4269) -4332 = NOR(4273, 4274) -4335 = NOR(4278, 4275) -4339 = NOR(4229, 4281) -4340 = NOR(4281, 4226) -4341 = NOR(4285, 4286) -4344 = NOR(4287, 1200) -4348 = NOR(4238, 4290) -4349 = NOR(4290, 1248) -4350 = NOR(4106, 4290) -4353 = NOR(4242, 4294) -4354 = NOR(4294, 4175) -4355 = NOR(4245, 4298) -4356 = NOR(4298, 4180) -4357 = NOR(4248, 4302) -4358 = NOR(4302, 4185) -4359 = NOR(4251, 4306) -4360 = NOR(4306, 4190) -4361 = NOR(4254, 4310) -4362 = NOR(4310, 4195) -4363 = NOR(4257, 4314) -4364 = NOR(4314, 4200) -4365 = NOR(4318, 4319) -4368 = NOR(4320, 909) -4372 = NOR(4266, 4323) -4373 = NOR(4323, 957) -4374 = NOR(4146, 4323) -4377 = NOR(4327, 4328) -4380 = NOR(4332, 4329) -4384 = NOR(4278, 4335) -4385 = NOR(4335, 4275) -4386 = NOR(4339, 4340) -4389 = NOR(4341, 1152) -4393 = NOR(4287, 4344) -4394 = NOR(4344, 1200) -4395 = NOR(4167, 4344) -4398 = NOR(4348, 4349) -4401 = NOR(1296, 4350) -4405 = NOR(4353, 4354) -4408 = NOR(4355, 4356) -4411 = NOR(4357, 4358) -4414 = NOR(4359, 4360) -4417 = NOR(4361, 4362) -4420 = NOR(4363, 4364) -4423 = NOR(4365, 861) -4427 = NOR(4320, 4368) -4428 = NOR(4368, 909) -4429 = NOR(4211, 4368) -4432 = NOR(4372, 4373) -4435 = NOR(4377, 4374) -4439 = NOR(4332, 4380) -4440 = NOR(4380, 4329) -4441 = NOR(4384, 4385) -4444 = NOR(4386, 1104) -4448 = NOR(4341, 4389) -4449 = NOR(4389, 1152) -4450 = NOR(4232, 4389) -4453 = NOR(4393, 4394) -4456 = NOR(4398, 4395) -4460 = NOR(1296, 4401) -4461 = NOR(4401, 4350) -4462 = NOR(4405, 573) -4466 = NOR(4408, 621) -4470 = NOR(4411, 669) -4474 = NOR(4414, 717) -4478 = NOR(4417, 765) -4482 = NOR(4420, 813) -4486 = NOR(4365, 4423) -4487 = NOR(4423, 861) -4488 = NOR(4260, 4423) -4491 = NOR(4427, 4428) -4494 = NOR(4432, 4429) -4498 = NOR(4377, 4435) -4499 = NOR(4435, 4374) -4500 = NOR(4439, 4440) -4503 = NOR(4441, 1056) -4507 = NOR(4386, 4444) -4508 = NOR(4444, 1104) -4509 = NOR(4281, 4444) -4512 = NOR(4448, 4449) -4515 = NOR(4453, 4450) -4519 = NOR(4398, 4456) -4520 = NOR(4456, 4395) -4521 = NOR(4460, 4461) -4524 = NOR(4405, 4462) -4525 = NOR(4462, 573) -4526 = NOR(4294, 4462) -4529 = NOR(4408, 4466) -4530 = NOR(4466, 621) -4531 = NOR(4298, 4466) -4534 = NOR(4411, 4470) -4535 = NOR(4470, 669) -4536 = NOR(4302, 4470) -4539 = NOR(4414, 4474) -4540 = NOR(4474, 717) -4541 = NOR(4306, 4474) -4544 = NOR(4417, 4478) -4545 = NOR(4478, 765) -4546 = NOR(4310, 4478) -4549 = NOR(4420, 4482) -4550 = NOR(4482, 813) -4551 = NOR(4314, 4482) -4554 = NOR(4486, 4487) -4557 = NOR(4491, 4488) -4561 = NOR(4432, 4494) -4562 = NOR(4494, 4429) -4563 = NOR(4498, 4499) -4566 = NOR(4500, 1008) -4570 = NOR(4441, 4503) -4571 = NOR(4503, 1056) -4572 = NOR(4335, 4503) -4575 = NOR(4507, 4508) -4578 = NOR(4512, 4509) -4582 = NOR(4453, 4515) -4583 = NOR(4515, 4450) -4584 = NOR(4519, 4520) -4587 = NOR(4521, 1251) -4591 = NOR(4524, 4525) -4592 = NOR(4529, 4530) -4595 = NOR(4534, 4535) -4598 = NOR(4539, 4540) -4601 = NOR(4544, 4545) -4604 = NOR(4549, 4550) -4607 = NOR(4554, 4551) -4611 = NOR(4491, 4557) -4612 = NOR(4557, 4488) -4613 = NOR(4561, 4562) -4616 = NOR(4563, 960) -4620 = NOR(4500, 4566) -4621 = NOR(4566, 1008) -4622 = NOR(4380, 4566) -4625 = NOR(4570, 4571) -4628 = NOR(4575, 4572) -4632 = NOR(4512, 4578) -4633 = NOR(4578, 4509) -4634 = NOR(4582, 4583) -4637 = NOR(4584, 1203) -4641 = NOR(4521, 4587) -4642 = NOR(4587, 1251) -4643 = NOR(4401, 4587) -4646 = NOR(4592, 4526) -4650 = NOR(4595, 4531) -4654 = NOR(4598, 4536) -4658 = NOR(4601, 4541) -4662 = NOR(4604, 4546) -4666 = NOR(4554, 4607) -4667 = NOR(4607, 4551) -4668 = NOR(4611, 4612) -4671 = NOR(4613, 912) -4675 = NOR(4563, 4616) -4676 = NOR(4616, 960) -4677 = NOR(4435, 4616) -4680 = NOR(4620, 4621) -4683 = NOR(4625, 4622) -4687 = NOR(4575, 4628) -4688 = NOR(4628, 4572) -4689 = NOR(4632, 4633) -4692 = NOR(4634, 1155) -4696 = NOR(4584, 4637) -4697 = NOR(4637, 1203) -4698 = NOR(4456, 4637) -4701 = NOR(4641, 4642) -4704 = NOR(1299, 4643) -4708 = NOR(4592, 4646) -4709 = NOR(4646, 4526) -4710 = NOR(4595, 4650) -4711 = NOR(4650, 4531) -4712 = NOR(4598, 4654) -4713 = NOR(4654, 4536) -4714 = NOR(4601, 4658) -4715 = NOR(4658, 4541) -4716 = NOR(4604, 4662) -4717 = NOR(4662, 4546) -4718 = NOR(4666, 4667) -4721 = NOR(4668, 864) -4725 = NOR(4613, 4671) -4726 = NOR(4671, 912) -4727 = NOR(4494, 4671) -4730 = NOR(4675, 4676) -4733 = NOR(4680, 4677) -4737 = NOR(4625, 4683) -4738 = NOR(4683, 4622) -4739 = NOR(4687, 4688) -4742 = NOR(4689, 1107) -4746 = NOR(4634, 4692) -4747 = NOR(4692, 1155) -4748 = NOR(4515, 4692) -4751 = NOR(4696, 4697) -4754 = NOR(4701, 4698) -4758 = NOR(1299, 4704) -4759 = NOR(4704, 4643) -4760 = NOR(4708, 4709) -4763 = NOR(4710, 4711) -4766 = NOR(4712, 4713) -4769 = NOR(4714, 4715) -4772 = NOR(4716, 4717) -4775 = NOR(4718, 816) -4779 = NOR(4668, 4721) -4780 = NOR(4721, 864) -4781 = NOR(4557, 4721) -4784 = NOR(4725, 4726) -4787 = NOR(4730, 4727) -4791 = NOR(4680, 4733) -4792 = NOR(4733, 4677) -4793 = NOR(4737, 4738) -4796 = NOR(4739, 1059) -4800 = NOR(4689, 4742) -4801 = NOR(4742, 1107) -4802 = NOR(4578, 4742) -4805 = NOR(4746, 4747) -4808 = NOR(4751, 4748) -4812 = NOR(4701, 4754) -4813 = NOR(4754, 4698) -4814 = NOR(4758, 4759) -4817 = NOR(4760, 576) -4821 = NOR(4763, 624) -4825 = NOR(4766, 672) -4829 = NOR(4769, 720) -4833 = NOR(4772, 768) -4837 = NOR(4718, 4775) -4838 = NOR(4775, 816) -4839 = NOR(4607, 4775) -4842 = NOR(4779, 4780) -4845 = NOR(4784, 4781) -4849 = NOR(4730, 4787) -4850 = NOR(4787, 4727) -4851 = NOR(4791, 4792) -4854 = NOR(4793, 1011) -4858 = NOR(4739, 4796) -4859 = NOR(4796, 1059) -4860 = NOR(4628, 4796) -4863 = NOR(4800, 4801) -4866 = NOR(4805, 4802) -4870 = NOR(4751, 4808) -4871 = NOR(4808, 4748) -4872 = NOR(4812, 4813) -4875 = NOR(4814, 1254) -4879 = NOR(4760, 4817) -4880 = NOR(4817, 576) -4881 = NOR(4646, 4817) -4884 = NOR(4763, 4821) -4885 = NOR(4821, 624) -4886 = NOR(4650, 4821) -4889 = NOR(4766, 4825) -4890 = NOR(4825, 672) -4891 = NOR(4654, 4825) -4894 = NOR(4769, 4829) -4895 = NOR(4829, 720) -4896 = NOR(4658, 4829) -4899 = NOR(4772, 4833) -4900 = NOR(4833, 768) -4901 = NOR(4662, 4833) -4904 = NOR(4837, 4838) -4907 = NOR(4842, 4839) -4911 = NOR(4784, 4845) -4912 = NOR(4845, 4781) -4913 = NOR(4849, 4850) -4916 = NOR(4851, 963) -4920 = NOR(4793, 4854) -4921 = NOR(4854, 1011) -4922 = NOR(4683, 4854) -4925 = NOR(4858, 4859) -4928 = NOR(4863, 4860) -4932 = NOR(4805, 4866) -4933 = NOR(4866, 4802) -4934 = NOR(4870, 4871) -4937 = NOR(4872, 1206) -4941 = NOR(4814, 4875) -4942 = NOR(4875, 1254) -4943 = NOR(4704, 4875) -4946 = NOR(4879, 4880) -4947 = NOR(4884, 4885) -4950 = NOR(4889, 4890) -4953 = NOR(4894, 4895) -4956 = NOR(4899, 4900) -4959 = NOR(4904, 4901) -4963 = NOR(4842, 4907) -4964 = NOR(4907, 4839) -4965 = NOR(4911, 4912) -4968 = NOR(4913, 915) -4972 = NOR(4851, 4916) -4973 = NOR(4916, 963) -4974 = NOR(4733, 4916) -4977 = NOR(4920, 4921) -4980 = NOR(4925, 4922) -4984 = NOR(4863, 4928) -4985 = NOR(4928, 4860) -4986 = NOR(4932, 4933) -4989 = NOR(4934, 1158) -4993 = NOR(4872, 4937) -4994 = NOR(4937, 1206) -4995 = NOR(4754, 4937) -4998 = NOR(4941, 4942) -5001 = NOR(1302, 4943) -5005 = NOR(4947, 4881) -5009 = NOR(4950, 4886) -5013 = NOR(4953, 4891) -5017 = NOR(4956, 4896) -5021 = NOR(4904, 4959) -5022 = NOR(4959, 4901) -5023 = NOR(4963, 4964) -5026 = NOR(4965, 867) -5030 = NOR(4913, 4968) -5031 = NOR(4968, 915) -5032 = NOR(4787, 4968) -5035 = NOR(4972, 4973) -5038 = NOR(4977, 4974) -5042 = NOR(4925, 4980) -5043 = NOR(4980, 4922) -5044 = NOR(4984, 4985) -5047 = NOR(4986, 1110) -5051 = NOR(4934, 4989) -5052 = NOR(4989, 1158) -5053 = NOR(4808, 4989) -5056 = NOR(4993, 4994) -5059 = NOR(4998, 4995) -5063 = NOR(1302, 5001) -5064 = NOR(5001, 4943) -5065 = NOR(4947, 5005) -5066 = NOR(5005, 4881) -5067 = NOR(4950, 5009) -5068 = NOR(5009, 4886) -5069 = NOR(4953, 5013) -5070 = NOR(5013, 4891) -5071 = NOR(4956, 5017) -5072 = NOR(5017, 4896) -5073 = NOR(5021, 5022) -5076 = NOR(5023, 819) -5080 = NOR(4965, 5026) -5081 = NOR(5026, 867) -5082 = NOR(4845, 5026) -5085 = NOR(5030, 5031) -5088 = NOR(5035, 5032) -5092 = NOR(4977, 5038) -5093 = NOR(5038, 4974) -5094 = NOR(5042, 5043) -5097 = NOR(5044, 1062) -5101 = NOR(4986, 5047) -5102 = NOR(5047, 1110) -5103 = NOR(4866, 5047) -5106 = NOR(5051, 5052) -5109 = NOR(5056, 5053) -5113 = NOR(4998, 5059) -5114 = NOR(5059, 4995) -5115 = NOR(5063, 5064) -5118 = NOR(5065, 5066) -5121 = NOR(5067, 5068) -5124 = NOR(5069, 5070) -5127 = NOR(5071, 5072) -5130 = NOR(5073, 771) -5134 = NOR(5023, 5076) -5135 = NOR(5076, 819) -5136 = NOR(4907, 5076) -5139 = NOR(5080, 5081) -5142 = NOR(5085, 5082) -5146 = NOR(5035, 5088) -5147 = NOR(5088, 5032) -5148 = NOR(5092, 5093) -5151 = NOR(5094, 1014) -5155 = NOR(5044, 5097) -5156 = NOR(5097, 1062) -5157 = NOR(4928, 5097) -5160 = NOR(5101, 5102) -5163 = NOR(5106, 5103) -5167 = NOR(5056, 5109) -5168 = NOR(5109, 5053) -5169 = NOR(5113, 5114) -5172 = NOR(5115, 1257) -5176 = NOR(5118, 579) -5180 = NOR(5121, 627) -5184 = NOR(5124, 675) -5188 = NOR(5127, 723) -5192 = NOR(5073, 5130) -5193 = NOR(5130, 771) -5194 = NOR(4959, 5130) -5197 = NOR(5134, 5135) -5200 = NOR(5139, 5136) -5204 = NOR(5085, 5142) -5205 = NOR(5142, 5082) -5206 = NOR(5146, 5147) -5209 = NOR(5148, 966) -5213 = NOR(5094, 5151) -5214 = NOR(5151, 1014) -5215 = NOR(4980, 5151) -5218 = NOR(5155, 5156) -5221 = NOR(5160, 5157) -5225 = NOR(5106, 5163) -5226 = NOR(5163, 5103) -5227 = NOR(5167, 5168) -5230 = NOR(5169, 1209) -5234 = NOR(5115, 5172) -5235 = NOR(5172, 1257) -5236 = NOR(5001, 5172) -5239 = NOR(5118, 5176) -5240 = NOR(5176, 579) -5241 = NOR(5005, 5176) -5244 = NOR(5121, 5180) -5245 = NOR(5180, 627) -5246 = NOR(5009, 5180) -5249 = NOR(5124, 5184) -5250 = NOR(5184, 675) -5251 = NOR(5013, 5184) -5254 = NOR(5127, 5188) -5255 = NOR(5188, 723) -5256 = NOR(5017, 5188) -5259 = NOR(5192, 5193) -5262 = NOR(5197, 5194) -5266 = NOR(5139, 5200) -5267 = NOR(5200, 5136) -5268 = NOR(5204, 5205) -5271 = NOR(5206, 918) -5275 = NOR(5148, 5209) -5276 = NOR(5209, 966) -5277 = NOR(5038, 5209) -5280 = NOR(5213, 5214) -5283 = NOR(5218, 5215) -5287 = NOR(5160, 5221) -5288 = NOR(5221, 5157) -5289 = NOR(5225, 5226) -5292 = NOR(5227, 1161) -5296 = NOR(5169, 5230) -5297 = NOR(5230, 1209) -5298 = NOR(5059, 5230) -5301 = NOR(5234, 5235) -5304 = NOR(1305, 5236) -5308 = NOR(5239, 5240) -5309 = NOR(5244, 5245) -5312 = NOR(5249, 5250) -5315 = NOR(5254, 5255) -5318 = NOR(5259, 5256) -5322 = NOR(5197, 5262) -5323 = NOR(5262, 5194) -5324 = NOR(5266, 5267) -5327 = NOR(5268, 870) -5331 = NOR(5206, 5271) -5332 = NOR(5271, 918) -5333 = NOR(5088, 5271) -5336 = NOR(5275, 5276) -5339 = NOR(5280, 5277) -5343 = NOR(5218, 5283) -5344 = NOR(5283, 5215) -5345 = NOR(5287, 5288) -5348 = NOR(5289, 1113) -5352 = NOR(5227, 5292) -5353 = NOR(5292, 1161) -5354 = NOR(5109, 5292) -5357 = NOR(5296, 5297) -5360 = NOR(5301, 5298) -5364 = NOR(1305, 5304) -5365 = NOR(5304, 5236) -5366 = NOR(5309, 5241) -5370 = NOR(5312, 5246) -5374 = NOR(5315, 5251) -5378 = NOR(5259, 5318) -5379 = NOR(5318, 5256) -5380 = NOR(5322, 5323) -5383 = NOR(5324, 822) -5387 = NOR(5268, 5327) -5388 = NOR(5327, 870) -5389 = NOR(5142, 5327) -5392 = NOR(5331, 5332) -5395 = NOR(5336, 5333) -5399 = NOR(5280, 5339) -5400 = NOR(5339, 5277) -5401 = NOR(5343, 5344) -5404 = NOR(5345, 1065) -5408 = NOR(5289, 5348) -5409 = NOR(5348, 1113) -5410 = NOR(5163, 5348) -5413 = NOR(5352, 5353) -5416 = NOR(5357, 5354) -5420 = NOR(5301, 5360) -5421 = NOR(5360, 5298) -5422 = NOR(5364, 5365) -5425 = NOR(5309, 5366) -5426 = NOR(5366, 5241) -5427 = NOR(5312, 5370) -5428 = NOR(5370, 5246) -5429 = NOR(5315, 5374) -5430 = NOR(5374, 5251) -5431 = NOR(5378, 5379) -5434 = NOR(5380, 774) -5438 = NOR(5324, 5383) -5439 = NOR(5383, 822) -5440 = NOR(5200, 5383) -5443 = NOR(5387, 5388) -5446 = NOR(5392, 5389) -5450 = NOR(5336, 5395) -5451 = NOR(5395, 5333) -5452 = NOR(5399, 5400) -5455 = NOR(5401, 1017) -5459 = NOR(5345, 5404) -5460 = NOR(5404, 1065) -5461 = NOR(5221, 5404) -5464 = NOR(5408, 5409) -5467 = NOR(5413, 5410) -5471 = NOR(5357, 5416) -5472 = NOR(5416, 5354) -5473 = NOR(5420, 5421) -5476 = NOR(5422, 1260) -5480 = NOR(5425, 5426) -5483 = NOR(5427, 5428) -5486 = NOR(5429, 5430) -5489 = NOR(5431, 726) -5493 = NOR(5380, 5434) -5494 = NOR(5434, 774) -5495 = NOR(5262, 5434) -5498 = NOR(5438, 5439) -5501 = NOR(5443, 5440) -5505 = NOR(5392, 5446) -5506 = NOR(5446, 5389) -5507 = NOR(5450, 5451) -5510 = NOR(5452, 969) -5514 = NOR(5401, 5455) -5515 = NOR(5455, 1017) -5516 = NOR(5283, 5455) -5519 = NOR(5459, 5460) -5522 = NOR(5464, 5461) -5526 = NOR(5413, 5467) -5527 = NOR(5467, 5410) -5528 = NOR(5471, 5472) -5531 = NOR(5473, 1212) -5535 = NOR(5422, 5476) -5536 = NOR(5476, 1260) -5537 = NOR(5304, 5476) -5540 = NOR(5480, 582) -5544 = NOR(5483, 630) -5548 = NOR(5486, 678) -5552 = NOR(5431, 5489) -5553 = NOR(5489, 726) -5554 = NOR(5318, 5489) -5557 = NOR(5493, 5494) -5560 = NOR(5498, 5495) -5564 = NOR(5443, 5501) -5565 = NOR(5501, 5440) -5566 = NOR(5505, 5506) -5569 = NOR(5507, 921) -5573 = NOR(5452, 5510) -5574 = NOR(5510, 969) -5575 = NOR(5339, 5510) -5578 = NOR(5514, 5515) -5581 = NOR(5519, 5516) -5585 = NOR(5464, 5522) -5586 = NOR(5522, 5461) -5587 = NOR(5526, 5527) -5590 = NOR(5528, 1164) -5594 = NOR(5473, 5531) -5595 = NOR(5531, 1212) -5596 = NOR(5360, 5531) -5599 = NOR(5535, 5536) -5602 = NOR(1308, 5537) -5606 = NOR(5480, 5540) -5607 = NOR(5540, 582) -5608 = NOR(5366, 5540) -5611 = NOR(5483, 5544) -5612 = NOR(5544, 630) -5613 = NOR(5370, 5544) -5616 = NOR(5486, 5548) -5617 = NOR(5548, 678) -5618 = NOR(5374, 5548) -5621 = NOR(5552, 5553) -5624 = NOR(5557, 5554) -5628 = NOR(5498, 5560) -5629 = NOR(5560, 5495) -5630 = NOR(5564, 5565) -5633 = NOR(5566, 873) -5637 = NOR(5507, 5569) -5638 = NOR(5569, 921) -5639 = NOR(5395, 5569) -5642 = NOR(5573, 5574) -5645 = NOR(5578, 5575) -5649 = NOR(5519, 5581) -5650 = NOR(5581, 5516) -5651 = NOR(5585, 5586) -5654 = NOR(5587, 1116) -5658 = NOR(5528, 5590) -5659 = NOR(5590, 1164) -5660 = NOR(5416, 5590) -5663 = NOR(5594, 5595) -5666 = NOR(5599, 5596) -5670 = NOR(1308, 5602) -5671 = NOR(5602, 5537) -5672 = NOR(5606, 5607) -5673 = NOR(5611, 5612) -5676 = NOR(5616, 5617) -5679 = NOR(5621, 5618) -5683 = NOR(5557, 5624) -5684 = NOR(5624, 5554) -5685 = NOR(5628, 5629) -5688 = NOR(5630, 825) -5692 = NOR(5566, 5633) -5693 = NOR(5633, 873) -5694 = NOR(5446, 5633) -5697 = NOR(5637, 5638) -5700 = NOR(5642, 5639) -5704 = NOR(5578, 5645) -5705 = NOR(5645, 5575) -5706 = NOR(5649, 5650) -5709 = NOR(5651, 1068) -5713 = NOR(5587, 5654) -5714 = NOR(5654, 1116) -5715 = NOR(5467, 5654) -5718 = NOR(5658, 5659) -5721 = NOR(5663, 5660) -5725 = NOR(5599, 5666) -5726 = NOR(5666, 5596) -5727 = NOR(5670, 5671) -5730 = NOR(5673, 5608) -5734 = NOR(5676, 5613) -5738 = NOR(5621, 5679) -5739 = NOR(5679, 5618) -5740 = NOR(5683, 5684) -5743 = NOR(5685, 777) -5747 = NOR(5630, 5688) -5748 = NOR(5688, 825) -5749 = NOR(5501, 5688) -5752 = NOR(5692, 5693) -5755 = NOR(5697, 5694) -5759 = NOR(5642, 5700) -5760 = NOR(5700, 5639) -5761 = NOR(5704, 5705) -5764 = NOR(5706, 1020) -5768 = NOR(5651, 5709) -5769 = NOR(5709, 1068) -5770 = NOR(5522, 5709) -5773 = NOR(5713, 5714) -5776 = NOR(5718, 5715) -5780 = NOR(5663, 5721) -5781 = NOR(5721, 5660) -5782 = NOR(5725, 5726) -5785 = NOR(5673, 5730) -5786 = NOR(5730, 5608) -5787 = NOR(5676, 5734) -5788 = NOR(5734, 5613) -5789 = NOR(5738, 5739) -5792 = NOR(5740, 729) -5796 = NOR(5685, 5743) -5797 = NOR(5743, 777) -5798 = NOR(5560, 5743) -5801 = NOR(5747, 5748) -5804 = NOR(5752, 5749) -5808 = NOR(5697, 5755) -5809 = NOR(5755, 5694) -5810 = NOR(5759, 5760) -5813 = NOR(5761, 972) -5817 = NOR(5706, 5764) -5818 = NOR(5764, 1020) -5819 = NOR(5581, 5764) -5822 = NOR(5768, 5769) -5825 = NOR(5773, 5770) -5829 = NOR(5718, 5776) -5830 = NOR(5776, 5715) -5831 = NOR(5780, 5781) -5834 = NOR(5785, 5786) -5837 = NOR(5787, 5788) -5840 = NOR(5789, 681) -5844 = NOR(5740, 5792) -5845 = NOR(5792, 729) -5846 = NOR(5624, 5792) -5849 = NOR(5796, 5797) -5852 = NOR(5801, 5798) -5856 = NOR(5752, 5804) -5857 = NOR(5804, 5749) -5858 = NOR(5808, 5809) -5861 = NOR(5810, 924) -5865 = NOR(5761, 5813) -5866 = NOR(5813, 972) -5867 = NOR(5645, 5813) -5870 = NOR(5817, 5818) -5873 = NOR(5822, 5819) -5877 = NOR(5773, 5825) -5878 = NOR(5825, 5770) -5879 = NOR(5829, 5830) -5882 = NOR(5834, 585) -5886 = NOR(5837, 633) -5890 = NOR(5789, 5840) -5891 = NOR(5840, 681) -5892 = NOR(5679, 5840) -5895 = NOR(5844, 5845) -5898 = NOR(5849, 5846) -5902 = NOR(5801, 5852) -5903 = NOR(5852, 5798) -5904 = NOR(5856, 5857) -5907 = NOR(5858, 876) -5911 = NOR(5810, 5861) -5912 = NOR(5861, 924) -5913 = NOR(5700, 5861) -5916 = NOR(5865, 5866) -5919 = NOR(5870, 5867) -5923 = NOR(5822, 5873) -5924 = NOR(5873, 5819) -5925 = NOR(5877, 5878) -5928 = NOR(5834, 5882) -5929 = NOR(5882, 585) -5930 = NOR(5730, 5882) -5933 = NOR(5837, 5886) -5934 = NOR(5886, 633) -5935 = NOR(5734, 5886) -5938 = NOR(5890, 5891) -5941 = NOR(5895, 5892) -5945 = NOR(5849, 5898) -5946 = NOR(5898, 5846) -5947 = NOR(5902, 5903) -5950 = NOR(5904, 828) -5954 = NOR(5858, 5907) -5955 = NOR(5907, 876) -5956 = NOR(5755, 5907) -5959 = NOR(5911, 5912) -5962 = NOR(5916, 5913) -5966 = NOR(5870, 5919) -5967 = NOR(5919, 5867) -5968 = NOR(5923, 5924) -5971 = NOR(5928, 5929) -5972 = NOR(5933, 5934) -5975 = NOR(5938, 5935) -5979 = NOR(5895, 5941) -5980 = NOR(5941, 5892) -5981 = NOR(5945, 5946) -5984 = NOR(5947, 780) -5988 = NOR(5904, 5950) -5989 = NOR(5950, 828) -5990 = NOR(5804, 5950) -5993 = NOR(5954, 5955) -5996 = NOR(5959, 5956) -6000 = NOR(5916, 5962) -6001 = NOR(5962, 5913) -6002 = NOR(5966, 5967) -6005 = NOR(5972, 5930) -6009 = NOR(5938, 5975) -6010 = NOR(5975, 5935) -6011 = NOR(5979, 5980) -6014 = NOR(5981, 732) -6018 = NOR(5947, 5984) -6019 = NOR(5984, 780) -6020 = NOR(5852, 5984) -6023 = NOR(5988, 5989) -6026 = NOR(5993, 5990) -6030 = NOR(5959, 5996) -6031 = NOR(5996, 5956) -6032 = NOR(6000, 6001) -6035 = NOR(5972, 6005) -6036 = NOR(6005, 5930) -6037 = NOR(6009, 6010) -6040 = NOR(6011, 684) -6044 = NOR(5981, 6014) -6045 = NOR(6014, 732) -6046 = NOR(5898, 6014) -6049 = NOR(6018, 6019) -6052 = NOR(6023, 6020) -6056 = NOR(5993, 6026) -6057 = NOR(6026, 5990) -6058 = NOR(6030, 6031) -6061 = NOR(6035, 6036) -6064 = NOR(6037, 636) -6068 = NOR(6011, 6040) -6069 = NOR(6040, 684) -6070 = NOR(5941, 6040) -6073 = NOR(6044, 6045) -6076 = NOR(6049, 6046) -6080 = NOR(6023, 6052) -6081 = NOR(6052, 6020) -6082 = NOR(6056, 6057) -6085 = NOR(6061, 588) -6089 = NOR(6037, 6064) -6090 = NOR(6064, 636) -6091 = NOR(5975, 6064) -6094 = NOR(6068, 6069) -6097 = NOR(6073, 6070) -6101 = NOR(6049, 6076) -6102 = NOR(6076, 6046) -6103 = NOR(6080, 6081) -6106 = NOR(6061, 6085) -6107 = NOR(6085, 588) -6108 = NOR(6005, 6085) -6111 = NOR(6089, 6090) -6114 = NOR(6094, 6091) -6118 = NOR(6073, 6097) -6119 = NOR(6097, 6070) -6120 = NOR(6101, 6102) -6123 = NOR(6106, 6107) -6124 = NOR(6111, 6108) -6128 = NOR(6094, 6114) -6129 = NOR(6114, 6091) -6130 = NOR(6118, 6119) -6133 = NOR(6111, 6124) -6134 = NOR(6124, 6108) -6135 = NOR(6128, 6129) -6138 = NOR(6133, 6134) -6141 = NOT(6138) -6145 = NOR(6138, 6141) -6146 = NOT(6141) -6147 = NOR(6124, 6141) -6150 = NOR(6145, 6146) -6151 = NOR(6135, 6147) -6155 = NOR(6135, 6151) -6156 = NOR(6151, 6147) -6157 = NOR(6114, 6151) -6160 = NOR(6155, 6156) -6161 = NOR(6130, 6157) -6165 = NOR(6130, 6161) -6166 = NOR(6161, 6157) -6167 = NOR(6097, 6161) -6170 = NOR(6165, 6166) -6171 = NOR(6120, 6167) -6175 = NOR(6120, 6171) -6176 = NOR(6171, 6167) -6177 = NOR(6076, 6171) -6180 = NOR(6175, 6176) -6181 = NOR(6103, 6177) -6185 = NOR(6103, 6181) -6186 = NOR(6181, 6177) -6187 = NOR(6052, 6181) -6190 = NOR(6185, 6186) -6191 = NOR(6082, 6187) -6195 = NOR(6082, 6191) -6196 = NOR(6191, 6187) -6197 = NOR(6026, 6191) -6200 = NOR(6195, 6196) -6201 = NOR(6058, 6197) -6205 = NOR(6058, 6201) -6206 = NOR(6201, 6197) -6207 = NOR(5996, 6201) -6210 = NOR(6205, 6206) -6211 = NOR(6032, 6207) -6215 = NOR(6032, 6211) -6216 = NOR(6211, 6207) -6217 = NOR(5962, 6211) -6220 = NOR(6215, 6216) -6221 = NOR(6002, 6217) -6225 = NOR(6002, 6221) -6226 = NOR(6221, 6217) -6227 = NOR(5919, 6221) -6230 = NOR(6225, 6226) -6231 = NOR(5968, 6227) -6235 = NOR(5968, 6231) -6236 = NOR(6231, 6227) -6237 = NOR(5873, 6231) -6240 = NOR(6235, 6236) -6241 = NOR(5925, 6237) -6245 = NOR(5925, 6241) -6246 = NOR(6241, 6237) -6247 = NOR(5825, 6241) -6250 = NOR(6245, 6246) -6251 = NOR(5879, 6247) -6255 = NOR(5879, 6251) -6256 = NOR(6251, 6247) -6257 = NOR(5776, 6251) -6260 = NOR(6255, 6256) -6261 = NOR(5831, 6257) -6265 = NOR(5831, 6261) -6266 = NOR(6261, 6257) -6267 = NOR(5721, 6261) -6270 = NOR(6265, 6266) -6271 = NOR(5782, 6267) -6275 = NOR(5782, 6271) -6276 = NOR(6271, 6267) -6277 = NOR(5666, 6271) -6280 = NOR(6275, 6276) -6281 = NOR(5727, 6277) -6285 = NOR(5727, 6281) -6286 = NOR(6281, 6277) -6287 = NOR(5602, 6281) -6288 = NOR(6285, 6286) diff --git a/bench_test/c880.bench b/bench_test/c880.bench deleted file mode 100644 index cda033f..0000000 --- a/bench_test/c880.bench +++ /dev/null @@ -1,473 +0,0 @@ -# c880 - -INPUT(1) -INPUT(8) -INPUT(13) -INPUT(17) -INPUT(26) -INPUT(29) -INPUT(36) -INPUT(42) -INPUT(51) -INPUT(55) -INPUT(59) -INPUT(68) -INPUT(72) -INPUT(73) -INPUT(74) -INPUT(75) -INPUT(80) -INPUT(85) -INPUT(86) -INPUT(87) -INPUT(88) -INPUT(89) -INPUT(90) -INPUT(91) -INPUT(96) -INPUT(101) -INPUT(106) -INPUT(111) -INPUT(116) -INPUT(121) -INPUT(126) -INPUT(130) -INPUT(135) -INPUT(138) -INPUT(143) -INPUT(146) -INPUT(149) -INPUT(152) -INPUT(153) -INPUT(156) -INPUT(159) -INPUT(165) -INPUT(171) -INPUT(177) -INPUT(183) -INPUT(189) -INPUT(195) -INPUT(201) -INPUT(207) -INPUT(210) -INPUT(219) -INPUT(228) -INPUT(237) -INPUT(246) -INPUT(255) -INPUT(259) -INPUT(260) -INPUT(261) -INPUT(267) -INPUT(268) - -OUTPUT(388) -OUTPUT(389) -OUTPUT(390) -OUTPUT(391) -OUTPUT(418) -OUTPUT(419) -OUTPUT(420) -OUTPUT(421) -OUTPUT(422) -OUTPUT(423) -OUTPUT(446) -OUTPUT(447) -OUTPUT(448) -OUTPUT(449) -OUTPUT(450) -OUTPUT(767) -OUTPUT(768) -OUTPUT(850) -OUTPUT(863) -OUTPUT(864) -OUTPUT(865) -OUTPUT(866) -OUTPUT(874) -OUTPUT(878) -OUTPUT(879) -OUTPUT(880) - -269 = NAND(1, 8, 13, 17) -270 = NAND(1, 26, 13, 17) -273 = AND(29, 36, 42) -276 = AND(1, 26, 51) -279 = NAND(1, 8, 51, 17) -280 = NAND(1, 8, 13, 55) -284 = NAND(59, 42, 68, 72) -285 = NAND(29, 68) -286 = NAND(59, 68, 74) -287 = AND(29, 75, 80) -290 = AND(29, 75, 42) -291 = AND(29, 36, 80) -292 = AND(29, 36, 42) -293 = AND(59, 75, 80) -294 = AND(59, 75, 42) -295 = AND(59, 36, 80) -296 = AND(59, 36, 42) -297 = AND(85, 86) -298 = OR(87, 88) -301 = NAND(91, 96) -302 = OR(91, 96) -303 = NAND(101, 106) -304 = OR(101, 106) -305 = NAND(111, 116) -306 = OR(111, 116) -307 = NAND(121, 126) -308 = OR(121, 126) -309 = AND(8, 138) -310 = NOT(268) -316 = AND(51, 138) -317 = AND(17, 138) -318 = AND(152, 138) -319 = NAND(59, 156) -322 = NOR(17, 42) -323 = AND(17, 42) -324 = NAND(159, 165) -325 = OR(159, 165) -326 = NAND(171, 177) -327 = OR(171, 177) -328 = NAND(183, 189) -329 = OR(183, 189) -330 = NAND(195, 201) -331 = OR(195, 201) -332 = AND(210, 91) -333 = AND(210, 96) -334 = AND(210, 101) -335 = AND(210, 106) -336 = AND(210, 111) -337 = AND(255, 259) -338 = AND(210, 116) -339 = AND(255, 260) -340 = AND(210, 121) -341 = AND(255, 267) -342 = NOT(269) -343 = NOT(273) -344 = OR(270, 273) -345 = NOT(276) -346 = NOT(276) -347 = NOT(279) -348 = NOR(280, 284) -349 = OR(280, 285) -350 = OR(280, 286) -351 = NOT(293) -352 = NOT(294) -353 = NOT(295) -354 = NOT(296) -355 = NAND(89, 298) -356 = AND(90, 298) -357 = NAND(301, 302) -360 = NAND(303, 304) -363 = NAND(305, 306) -366 = NAND(307, 308) -369 = NOT(310) -375 = NOR(322, 323) -376 = NAND(324, 325) -379 = NAND(326, 327) -382 = NAND(328, 329) -385 = NAND(330, 331) -388 = BUFF(290) -389 = BUFF(291) -390 = BUFF(292) -391 = BUFF(297) -392 = OR(270, 343) -393 = NOT(345) -399 = NOT(346) -400 = AND(348, 73) -401 = NOT(349) -402 = NOT(350) -403 = NOT(355) -404 = NOT(357) -405 = NOT(360) -406 = AND(357, 360) -407 = NOT(363) -408 = NOT(366) -409 = AND(363, 366) -410 = NAND(347, 352) -411 = NOT(376) -412 = NOT(379) -413 = AND(376, 379) -414 = NOT(382) -415 = NOT(385) -416 = AND(382, 385) -417 = AND(210, 369) -418 = BUFF(342) -419 = BUFF(344) -420 = BUFF(351) -421 = BUFF(353) -422 = BUFF(354) -423 = BUFF(356) -424 = NOT(400) -425 = AND(404, 405) -426 = AND(407, 408) -427 = AND(319, 393, 55) -432 = AND(393, 17, 287) -437 = NAND(393, 287, 55) -442 = NAND(375, 59, 156, 393) -443 = NAND(393, 319, 17) -444 = AND(411, 412) -445 = AND(414, 415) -446 = BUFF(392) -447 = BUFF(399) -448 = BUFF(401) -449 = BUFF(402) -450 = BUFF(403) -451 = NOT(424) -460 = NOR(406, 425) -463 = NOR(409, 426) -466 = NAND(442, 410) -475 = AND(143, 427) -476 = AND(310, 432) -477 = AND(146, 427) -478 = AND(310, 432) -479 = AND(149, 427) -480 = AND(310, 432) -481 = AND(153, 427) -482 = AND(310, 432) -483 = NAND(443, 1) -488 = OR(369, 437) -489 = OR(369, 437) -490 = OR(369, 437) -491 = OR(369, 437) -492 = NOR(413, 444) -495 = NOR(416, 445) -498 = NAND(130, 460) -499 = OR(130, 460) -500 = NAND(463, 135) -501 = OR(463, 135) -502 = AND(91, 466) -503 = NOR(475, 476) -504 = AND(96, 466) -505 = NOR(477, 478) -506 = AND(101, 466) -507 = NOR(479, 480) -508 = AND(106, 466) -509 = NOR(481, 482) -510 = AND(143, 483) -511 = AND(111, 466) -512 = AND(146, 483) -513 = AND(116, 466) -514 = AND(149, 483) -515 = AND(121, 466) -516 = AND(153, 483) -517 = AND(126, 466) -518 = NAND(130, 492) -519 = OR(130, 492) -520 = NAND(495, 207) -521 = OR(495, 207) -522 = AND(451, 159) -523 = AND(451, 165) -524 = AND(451, 171) -525 = AND(451, 177) -526 = AND(451, 183) -527 = NAND(451, 189) -528 = NAND(451, 195) -529 = NAND(451, 201) -530 = NAND(498, 499) -533 = NAND(500, 501) -536 = NOR(309, 502) -537 = NOR(316, 504) -538 = NOR(317, 506) -539 = NOR(318, 508) -540 = NOR(510, 511) -541 = NOR(512, 513) -542 = NOR(514, 515) -543 = NOR(516, 517) -544 = NAND(518, 519) -547 = NAND(520, 521) -550 = NOT(530) -551 = NOT(533) -552 = AND(530, 533) -553 = NAND(536, 503) -557 = NAND(537, 505) -561 = NAND(538, 507) -565 = NAND(539, 509) -569 = NAND(488, 540) -573 = NAND(489, 541) -577 = NAND(490, 542) -581 = NAND(491, 543) -585 = NOT(544) -586 = NOT(547) -587 = AND(544, 547) -588 = AND(550, 551) -589 = AND(585, 586) -590 = NAND(553, 159) -593 = OR(553, 159) -596 = AND(246, 553) -597 = NAND(557, 165) -600 = OR(557, 165) -605 = AND(246, 557) -606 = NAND(561, 171) -609 = OR(561, 171) -615 = AND(246, 561) -616 = NAND(565, 177) -619 = OR(565, 177) -624 = AND(246, 565) -625 = NAND(569, 183) -628 = OR(569, 183) -631 = AND(246, 569) -632 = NAND(573, 189) -635 = OR(573, 189) -640 = AND(246, 573) -641 = NAND(577, 195) -644 = OR(577, 195) -650 = AND(246, 577) -651 = NAND(581, 201) -654 = OR(581, 201) -659 = AND(246, 581) -660 = NOR(552, 588) -661 = NOR(587, 589) -662 = NOT(590) -665 = AND(593, 590) -669 = NOR(596, 522) -670 = NOT(597) -673 = AND(600, 597) -677 = NOR(605, 523) -678 = NOT(606) -682 = AND(609, 606) -686 = NOR(615, 524) -687 = NOT(616) -692 = AND(619, 616) -696 = NOR(624, 525) -697 = NOT(625) -700 = AND(628, 625) -704 = NOR(631, 526) -705 = NOT(632) -708 = AND(635, 632) -712 = NOR(337, 640) -713 = NOT(641) -717 = AND(644, 641) -721 = NOR(339, 650) -722 = NOT(651) -727 = AND(654, 651) -731 = NOR(341, 659) -732 = NAND(654, 261) -733 = NAND(644, 654, 261) -734 = NAND(635, 644, 654, 261) -735 = NOT(662) -736 = AND(228, 665) -737 = AND(237, 662) -738 = NOT(670) -739 = AND(228, 673) -740 = AND(237, 670) -741 = NOT(678) -742 = AND(228, 682) -743 = AND(237, 678) -744 = NOT(687) -745 = AND(228, 692) -746 = AND(237, 687) -747 = NOT(697) -748 = AND(228, 700) -749 = AND(237, 697) -750 = NOT(705) -751 = AND(228, 708) -752 = AND(237, 705) -753 = NOT(713) -754 = AND(228, 717) -755 = AND(237, 713) -756 = NOT(722) -757 = NOR(727, 261) -758 = AND(727, 261) -759 = AND(228, 727) -760 = AND(237, 722) -761 = NAND(644, 722) -762 = NAND(635, 713) -763 = NAND(635, 644, 722) -764 = NAND(609, 687) -765 = NAND(600, 678) -766 = NAND(600, 609, 687) -767 = BUFF(660) -768 = BUFF(661) -769 = NOR(736, 737) -770 = NOR(739, 740) -771 = NOR(742, 743) -772 = NOR(745, 746) -773 = NAND(750, 762, 763, 734) -777 = NOR(748, 749) -778 = NAND(753, 761, 733) -781 = NOR(751, 752) -782 = NAND(756, 732) -785 = NOR(754, 755) -786 = NOR(757, 758) -787 = NOR(759, 760) -788 = NOR(700, 773) -789 = AND(700, 773) -790 = NOR(708, 778) -791 = AND(708, 778) -792 = NOR(717, 782) -793 = AND(717, 782) -794 = AND(219, 786) -795 = NAND(628, 773) -796 = NAND(795, 747) -802 = NOR(788, 789) -803 = NOR(790, 791) -804 = NOR(792, 793) -805 = NOR(340, 794) -806 = NOR(692, 796) -807 = AND(692, 796) -808 = AND(219, 802) -809 = AND(219, 803) -810 = AND(219, 804) -811 = NAND(805, 787, 731, 529) -812 = NAND(619, 796) -813 = NAND(609, 619, 796) -814 = NAND(600, 609, 619, 796) -815 = NAND(738, 765, 766, 814) -819 = NAND(741, 764, 813) -822 = NAND(744, 812) -825 = NOR(806, 807) -826 = NOR(335, 808) -827 = NOR(336, 809) -828 = NOR(338, 810) -829 = NOT(811) -830 = NOR(665, 815) -831 = AND(665, 815) -832 = NOR(673, 819) -833 = AND(673, 819) -834 = NOR(682, 822) -835 = AND(682, 822) -836 = AND(219, 825) -837 = NAND(826, 777, 704) -838 = NAND(827, 781, 712, 527) -839 = NAND(828, 785, 721, 528) -840 = NOT(829) -841 = NAND(815, 593) -842 = NOR(830, 831) -843 = NOR(832, 833) -844 = NOR(834, 835) -845 = NOR(334, 836) -846 = NOT(837) -847 = NOT(838) -848 = NOT(839) -849 = AND(735, 841) -850 = BUFF(840) -851 = AND(219, 842) -852 = AND(219, 843) -853 = AND(219, 844) -854 = NAND(845, 772, 696) -855 = NOT(846) -856 = NOT(847) -857 = NOT(848) -858 = NOT(849) -859 = NOR(417, 851) -860 = NOR(332, 852) -861 = NOR(333, 853) -862 = NOT(854) -863 = BUFF(855) -864 = BUFF(856) -865 = BUFF(857) -866 = BUFF(858) -867 = NAND(859, 769, 669) -868 = NAND(860, 770, 677) -869 = NAND(861, 771, 686) -870 = NOT(862) -871 = NOT(867) -872 = NOT(868) -873 = NOT(869) -874 = BUFF(870) -875 = NOT(871) -876 = NOT(872) -877 = NOT(873) -878 = BUFF(875) -879 = BUFF(876) -880 = BUFF(877) diff --git a/exp_result/ATPG-LS_b01.bench.txt b/exp_result/ATPG-LS_b01.bench.txt deleted file mode 100644 index 568cd6f..0000000 --- a/exp_result/ATPG-LS_b01.bench.txt +++ /dev/null @@ -1,92 +0,0 @@ -make: 'atpg' is up to date. -======================== -parsing file ./benchmark/b01.bench ... Done. -====== Circuit Statistics ====== -PI: 7 -PO: 7 -Gate: 48 -Stem: 28 -Level: 3 -================================ -[SOL] flip: 0, stem: 0, fault:181. flip_cnt: 0, stem_cnt: 28, fault_cnt:41 -coverage: 42.708% pattern: 1 before: 96 now: 55 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:227. flip_cnt: 0, stem_cnt: 28, fault_cnt:37 -coverage: 64.583% pattern: 2 before: 55 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:59. flip_cnt: 0, stem_cnt: 28, fault_cnt:38 -coverage: 77.083% pattern: 3 before: 34 now: 22 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:71. flip_cnt: 0, stem_cnt: 28, fault_cnt:39 -coverage: 82.292% pattern: 4 before: 22 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:5. flip_cnt: 0, stem_cnt: 28, fault_cnt:39 -coverage: 85.417% pattern: 5 before: 17 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 28, fault_cnt:21 -coverage: 85.417% pattern: 5 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:51. flip_cnt: 0, stem_cnt: 28, fault_cnt:37 -coverage: 88.542% pattern: 6 before: 14 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:66. flip_cnt: 0, stem_cnt: 28, fault_cnt:32 -coverage: 92.708% pattern: 7 before: 11 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 28, fault_cnt:21 -coverage: 92.708% pattern: 7 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 28, fault_cnt:38 -coverage: 92.708% pattern: 7 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:13. flip_cnt: 0, stem_cnt: 28, fault_cnt:31 -coverage: 93.750% pattern: 8 before: 7 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 28, fault_cnt:34 -coverage: 95.833% pattern: 9 before: 6 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:6. flip_cnt: 0, stem_cnt: 28, fault_cnt:37 -coverage: 96.875% pattern: 10 before: 4 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:6. flip_cnt: 0, stem_cnt: 28, fault_cnt:28 -coverage: 97.917% pattern: 11 before: 3 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 28, fault_cnt:37 -coverage: 97.917% pattern: 11 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 28, fault_cnt:38 -coverage: 97.917% pattern: 11 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 28, fault_cnt:21 -coverage: 97.917% pattern: 11 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 28, fault_cnt:33 -coverage: 98.958% pattern: 12 before: 2 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 28, fault_cnt:24 -coverage: 98.958% pattern: 12 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 28, fault_cnt:21 -coverage: 98.958% pattern: 12 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 28, fault_cnt:39 -coverage: 98.958% pattern: 12 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 28, fault_cnt:38 -coverage: 98.958% pattern: 12 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 28, fault_cnt:25 -coverage: 98.958% pattern: 12 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 28, fault_cnt:34 -coverage: 98.958% pattern: 12 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 28, fault_cnt:31 -coverage: 98.958% pattern: 12 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:17. flip_cnt: 0, stem_cnt: 28, fault_cnt:31 -coverage: 100.000% pattern: 13 before: 1 now: 0 -checking valid circuit ... result: 1. - -real 0m0.239s -user 0m0.237s -sys 0m0.000s diff --git a/exp_result/ATPG-LS_b03.bench.txt b/exp_result/ATPG-LS_b03.bench.txt deleted file mode 100644 index 57a0c0e..0000000 --- a/exp_result/ATPG-LS_b03.bench.txt +++ /dev/null @@ -1,101 +0,0 @@ -make: 'atpg' is up to date. -======================== -parsing file ./benchmark/b03.bench ... Done. -====== Circuit Statistics ====== -PI: 34 -PO: 34 -Gate: 152 -Stem: 86 -Level: 3 -================================ -[SOL] flip: 0, stem: 0, fault:741. flip_cnt: 0, stem_cnt: 86, fault_cnt:117 -coverage: 38.487% pattern: 1 before: 304 now: 187 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:440. flip_cnt: 0, stem_cnt: 86, fault_cnt:114 -coverage: 65.789% pattern: 2 before: 187 now: 104 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:338. flip_cnt: 0, stem_cnt: 86, fault_cnt:119 -coverage: 78.618% pattern: 3 before: 104 now: 65 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:113. flip_cnt: 0, stem_cnt: 86, fault_cnt:119 -coverage: 84.539% pattern: 4 before: 65 now: 47 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:137. flip_cnt: 0, stem_cnt: 86, fault_cnt:111 -coverage: 92.434% pattern: 5 before: 47 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:32. flip_cnt: 0, stem_cnt: 86, fault_cnt:107 -coverage: 94.737% pattern: 6 before: 23 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:4. flip_cnt: 0, stem_cnt: 86, fault_cnt:108 -coverage: 95.724% pattern: 7 before: 16 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:2. flip_cnt: 0, stem_cnt: 86, fault_cnt:112 -coverage: 96.382% pattern: 8 before: 13 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:2. flip_cnt: 0, stem_cnt: 86, fault_cnt:120 -coverage: 96.711% pattern: 9 before: 11 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 86, fault_cnt:112 -coverage: 96.711% pattern: 9 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 86, fault_cnt:115 -coverage: 98.355% pattern: 10 before: 10 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 86, fault_cnt:120 -coverage: 98.355% pattern: 10 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 86, fault_cnt:125 -coverage: 98.355% pattern: 10 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 86, fault_cnt:118 -coverage: 98.355% pattern: 10 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 86, fault_cnt:111 -coverage: 98.355% pattern: 10 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 86, fault_cnt:124 -coverage: 98.355% pattern: 10 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 86, fault_cnt:123 -coverage: 98.355% pattern: 10 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 86, fault_cnt:125 -coverage: 98.355% pattern: 10 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 86, fault_cnt:118 -coverage: 98.355% pattern: 10 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:15. flip_cnt: 0, stem_cnt: 86, fault_cnt:109 -coverage: 99.342% pattern: 11 before: 5 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 86, fault_cnt:109 -coverage: 99.342% pattern: 11 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 86, fault_cnt:112 -coverage: 99.342% pattern: 11 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:1. flip_cnt: 0, stem_cnt: 86, fault_cnt:115 -coverage: 99.671% pattern: 12 before: 2 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 86, fault_cnt:115 -coverage: 99.671% pattern: 12 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 86, fault_cnt:114 -coverage: 99.671% pattern: 12 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 86, fault_cnt:116 -coverage: 99.671% pattern: 12 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 86, fault_cnt:111 -coverage: 99.671% pattern: 12 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 86, fault_cnt:117 -coverage: 99.671% pattern: 12 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:3. flip_cnt: 0, stem_cnt: 86, fault_cnt:114 -coverage: 100.000% pattern: 13 before: 1 now: 0 -checking valid circuit ... result: 1. - -real 0m0.783s -user 0m0.778s -sys 0m0.004s diff --git a/exp_result/ATPG-LS_b04.bench.txt b/exp_result/ATPG-LS_b04.bench.txt deleted file mode 100644 index 1a38e7e..0000000 --- a/exp_result/ATPG-LS_b04.bench.txt +++ /dev/null @@ -1,38440 +0,0 @@ -make: 'atpg' is up to date. -======================== -parsing file ./benchmark/b04.bench ... Done. -====== Circuit Statistics ====== -PI: 77 -PO: 74 -Gate: 587 -Stem: 262 -Level: 7 -================================ -[SOL] flip: 0, stem: 0, fault:3232. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 27.172% pattern: 1 before: 1174 now: 855 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:1939. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 49.233% pattern: 2 before: 855 now: 596 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:679. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 58.518% pattern: 3 before: 596 now: 487 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:1731. flip_cnt: 0, stem_cnt: 262, fault_cnt:415 -coverage: 71.465% pattern: 4 before: 487 now: 335 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:61. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 72.061% pattern: 5 before: 335 now: 328 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 72.402% pattern: 6 before: 328 now: 324 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:6. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 72.487% pattern: 7 before: 324 now: 323 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:12. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 73.169% pattern: 8 before: 323 now: 315 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:285. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 74.446% pattern: 9 before: 315 now: 300 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 74.446% pattern: 9 before: 300 now: 300 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 74.446% pattern: 9 before: 300 now: 300 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 74.446% pattern: 9 before: 300 now: 300 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 74.446% pattern: 9 before: 300 now: 300 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 74.446% pattern: 9 before: 300 now: 300 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:185. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 76.746% pattern: 10 before: 300 now: 273 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 76.746% pattern: 10 before: 273 now: 273 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 76.746% pattern: 10 before: 273 now: 273 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 76.746% pattern: 10 before: 273 now: 273 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 76.746% pattern: 10 before: 273 now: 273 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 76.746% pattern: 10 before: 273 now: 273 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:257 -coverage: 76.746% pattern: 10 before: 273 now: 273 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 76.746% pattern: 10 before: 273 now: 273 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 76.746% pattern: 10 before: 273 now: 273 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 76.746% pattern: 10 before: 273 now: 273 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 76.746% pattern: 10 before: 273 now: 273 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:338 -coverage: 76.746% pattern: 10 before: 273 now: 273 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:211. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 77.768% pattern: 11 before: 273 now: 261 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:228. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 78.790% pattern: 12 before: 261 now: 249 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 78.790% pattern: 12 before: 249 now: 249 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 78.790% pattern: 12 before: 249 now: 249 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:267 -coverage: 78.790% pattern: 12 before: 249 now: 249 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 78.790% pattern: 12 before: 249 now: 249 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 78.790% pattern: 12 before: 249 now: 249 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:282 -coverage: 78.790% pattern: 12 before: 249 now: 249 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:6. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 78.876% pattern: 13 before: 249 now: 248 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 78.876% pattern: 13 before: 248 now: 248 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 78.876% pattern: 13 before: 248 now: 248 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 78.876% pattern: 13 before: 248 now: 248 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 78.876% pattern: 13 before: 248 now: 248 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 78.876% pattern: 13 before: 248 now: 248 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 79.216% pattern: 14 before: 248 now: 244 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:778. flip_cnt: 0, stem_cnt: 262, fault_cnt:381 -coverage: 83.731% pattern: 15 before: 244 now: 191 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 83.731% pattern: 15 before: 191 now: 191 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:1207. flip_cnt: 0, stem_cnt: 262, fault_cnt:411 -coverage: 89.438% pattern: 16 before: 191 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 89.693% pattern: 17 before: 124 now: 121 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 89.693% pattern: 17 before: 121 now: 121 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 89.693% pattern: 17 before: 121 now: 121 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 89.693% pattern: 17 before: 121 now: 121 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:266 -coverage: 89.693% pattern: 17 before: 121 now: 121 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 89.693% pattern: 17 before: 121 now: 121 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 89.693% pattern: 17 before: 121 now: 121 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:341 -coverage: 89.693% pattern: 17 before: 121 now: 121 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 89.693% pattern: 17 before: 121 now: 121 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 89.864% pattern: 18 before: 121 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 89.864% pattern: 18 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 89.864% pattern: 18 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 89.864% pattern: 18 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 89.864% pattern: 18 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 89.864% pattern: 18 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 89.864% pattern: 18 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 89.864% pattern: 18 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 89.864% pattern: 18 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 89.864% pattern: 18 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 262, fault_cnt:269 -coverage: 90.034% pattern: 19 before: 119 now: 117 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:340 -coverage: 90.034% pattern: 19 before: 117 now: 117 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 90.034% pattern: 19 before: 117 now: 117 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 90.204% pattern: 20 before: 117 now: 115 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 90.204% pattern: 20 before: 115 now: 115 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 90.204% pattern: 20 before: 115 now: 115 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 90.204% pattern: 20 before: 115 now: 115 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:341 -coverage: 90.204% pattern: 20 before: 115 now: 115 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:267 -coverage: 90.204% pattern: 20 before: 115 now: 115 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 90.290% pattern: 21 before: 115 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 90.290% pattern: 21 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 90.290% pattern: 21 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:258 -coverage: 90.290% pattern: 21 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:338 -coverage: 90.290% pattern: 21 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 90.290% pattern: 21 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 90.290% pattern: 21 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 90.290% pattern: 21 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 90.290% pattern: 21 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 90.290% pattern: 21 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 90.290% pattern: 21 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 90.290% pattern: 21 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 90.290% pattern: 21 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:114. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 90.801% pattern: 22 before: 114 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:344 -coverage: 90.801% pattern: 22 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 90.801% pattern: 22 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 90.801% pattern: 22 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 90.886% pattern: 23 before: 108 now: 107 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 90.886% pattern: 23 before: 107 now: 107 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:304. flip_cnt: 0, stem_cnt: 262, fault_cnt:407 -coverage: 92.249% pattern: 24 before: 107 now: 91 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 92.249% pattern: 24 before: 91 now: 91 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 92.249% pattern: 24 before: 91 now: 91 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 92.249% pattern: 24 before: 91 now: 91 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 92.249% pattern: 24 before: 91 now: 91 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 92.249% pattern: 24 before: 91 now: 91 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 92.249% pattern: 24 before: 91 now: 91 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 92.249% pattern: 24 before: 91 now: 91 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 92.249% pattern: 24 before: 91 now: 91 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:259 -coverage: 92.249% pattern: 24 before: 91 now: 91 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 92.249% pattern: 24 before: 91 now: 91 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 92.249% pattern: 24 before: 91 now: 91 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:341 -coverage: 92.249% pattern: 24 before: 91 now: 91 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 92.249% pattern: 24 before: 91 now: 91 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 92.249% pattern: 24 before: 91 now: 91 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 92.249% pattern: 24 before: 91 now: 91 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 92.249% pattern: 24 before: 91 now: 91 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 92.249% pattern: 24 before: 91 now: 91 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 92.249% pattern: 24 before: 91 now: 91 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:262. flip_cnt: 0, stem_cnt: 262, fault_cnt:435 -coverage: 93.697% pattern: 25 before: 91 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 93.697% pattern: 25 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:256 -coverage: 93.697% pattern: 25 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 93.697% pattern: 25 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:265 -coverage: 93.697% pattern: 25 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 93.697% pattern: 25 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:265 -coverage: 93.697% pattern: 25 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 93.782% pattern: 26 before: 74 now: 73 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:361. flip_cnt: 0, stem_cnt: 262, fault_cnt:412 -coverage: 95.400% pattern: 27 before: 73 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 95.400% pattern: 27 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 95.400% pattern: 27 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 95.486% pattern: 28 before: 54 now: 53 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 262, fault_cnt:396 -coverage: 95.571% pattern: 29 before: 53 now: 52 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 95.571% pattern: 29 before: 52 now: 52 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 95.571% pattern: 29 before: 52 now: 52 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 262, fault_cnt:397 -coverage: 95.656% pattern: 30 before: 52 now: 51 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 95.656% pattern: 30 before: 51 now: 51 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 95.656% pattern: 30 before: 51 now: 51 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 262, fault_cnt:433 -coverage: 95.741% pattern: 31 before: 51 now: 50 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 262, fault_cnt:400 -coverage: 95.826% pattern: 32 before: 50 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 95.826% pattern: 32 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 95.826% pattern: 32 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:344 -coverage: 95.826% pattern: 32 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 95.826% pattern: 32 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 95.826% pattern: 32 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 95.826% pattern: 32 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 95.826% pattern: 32 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:274 -coverage: 95.826% pattern: 32 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 95.826% pattern: 32 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 262, fault_cnt:402 -coverage: 96.252% pattern: 33 before: 49 now: 44 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 96.252% pattern: 33 before: 44 now: 44 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 262, fault_cnt:392 -coverage: 96.422% pattern: 34 before: 44 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 96.422% pattern: 34 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 96.593% pattern: 35 before: 42 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 96.593% pattern: 35 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 96.593% pattern: 35 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 96.593% pattern: 35 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 96.593% pattern: 35 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:342 -coverage: 96.593% pattern: 35 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 262, fault_cnt:379 -coverage: 96.763% pattern: 36 before: 40 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 96.763% pattern: 36 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 96.763% pattern: 36 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 96.763% pattern: 36 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 96.763% pattern: 36 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 96.763% pattern: 36 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 96.763% pattern: 36 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 96.763% pattern: 36 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 96.848% pattern: 37 before: 38 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 96.848% pattern: 37 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 96.848% pattern: 37 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:1. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 96.934% pattern: 38 before: 37 now: 36 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 262, fault_cnt:400 -coverage: 97.019% pattern: 39 before: 36 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 97.019% pattern: 39 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:265 -coverage: 97.019% pattern: 39 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 97.019% pattern: 39 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:390 -coverage: 97.019% pattern: 39 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 97.019% pattern: 39 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:285 -coverage: 97.019% pattern: 39 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 97.019% pattern: 39 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 97.019% pattern: 39 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 97.019% pattern: 39 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:342 -coverage: 97.019% pattern: 39 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 97.019% pattern: 39 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 97.019% pattern: 39 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 97.019% pattern: 39 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:277 -coverage: 97.019% pattern: 39 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 97.019% pattern: 39 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:424 -coverage: 97.019% pattern: 39 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:282 -coverage: 97.019% pattern: 39 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 97.019% pattern: 39 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 97.019% pattern: 39 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 262, fault_cnt:398 -coverage: 97.359% pattern: 40 before: 35 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 97.359% pattern: 40 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 97.359% pattern: 40 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 97.359% pattern: 40 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 97.359% pattern: 40 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 97.359% pattern: 40 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 97.359% pattern: 40 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 97.359% pattern: 40 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 97.359% pattern: 40 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 97.359% pattern: 40 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 97.359% pattern: 40 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 97.359% pattern: 40 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 97.359% pattern: 40 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 97.359% pattern: 40 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:269 -coverage: 97.359% pattern: 40 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 97.359% pattern: 40 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:417 -coverage: 97.359% pattern: 40 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 97.359% pattern: 40 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:283 -coverage: 97.359% pattern: 40 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 97.359% pattern: 40 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 97.359% pattern: 40 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 97.359% pattern: 40 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 97.359% pattern: 40 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 97.359% pattern: 40 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:381 -coverage: 97.359% pattern: 40 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 97.359% pattern: 40 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 97.359% pattern: 40 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 97.359% pattern: 40 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 97.359% pattern: 40 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 97.359% pattern: 40 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 97.359% pattern: 40 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 97.359% pattern: 40 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 97.359% pattern: 40 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 97.359% pattern: 40 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 97.359% pattern: 40 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 97.359% pattern: 40 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 97.359% pattern: 40 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 262, fault_cnt:401 -coverage: 97.700% pattern: 41 before: 31 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 97.700% pattern: 41 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 97.700% pattern: 41 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 97.700% pattern: 41 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:339 -coverage: 97.700% pattern: 41 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 262, fault_cnt:390 -coverage: 97.785% pattern: 42 before: 27 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 97.785% pattern: 42 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 97.785% pattern: 42 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 97.785% pattern: 42 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 97.785% pattern: 42 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 97.785% pattern: 42 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 97.785% pattern: 42 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 97.785% pattern: 42 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:396 -coverage: 97.785% pattern: 42 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 97.785% pattern: 42 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 97.785% pattern: 42 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 97.785% pattern: 42 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 97.785% pattern: 42 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 97.785% pattern: 42 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 97.785% pattern: 42 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:281 -coverage: 97.785% pattern: 42 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:411 -coverage: 97.785% pattern: 42 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 262, fault_cnt:368 -coverage: 97.871% pattern: 43 before: 26 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:365 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:391 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:273 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:259 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:350 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:285 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:380 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:372 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:385 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:400 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:272 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:376 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:369 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:278 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:412 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 97.871% pattern: 43 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 262, fault_cnt:367 -coverage: 98.041% pattern: 44 before: 25 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 98.041% pattern: 44 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 98.041% pattern: 44 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 98.041% pattern: 44 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 98.041% pattern: 44 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:353 -coverage: 98.041% pattern: 44 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 98.041% pattern: 44 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:283 -coverage: 98.041% pattern: 44 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:277 -coverage: 98.041% pattern: 44 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 262, fault_cnt:387 -coverage: 98.211% pattern: 45 before: 23 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 98.211% pattern: 45 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 98.211% pattern: 45 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 98.211% pattern: 45 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 98.211% pattern: 45 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 98.211% pattern: 45 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 98.211% pattern: 45 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 98.211% pattern: 45 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 98.211% pattern: 45 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 98.211% pattern: 45 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 98.211% pattern: 45 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 98.211% pattern: 45 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 98.211% pattern: 45 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 98.211% pattern: 45 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 98.211% pattern: 45 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 98.211% pattern: 45 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 98.211% pattern: 45 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 98.211% pattern: 45 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:274 -coverage: 98.211% pattern: 45 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 98.211% pattern: 45 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:387 -coverage: 98.211% pattern: 45 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 98.211% pattern: 45 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 98.211% pattern: 45 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:265 -coverage: 98.211% pattern: 45 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:403 -coverage: 98.211% pattern: 45 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:388 -coverage: 98.211% pattern: 45 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 98.211% pattern: 45 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:339 -coverage: 98.211% pattern: 45 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 98.211% pattern: 45 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 98.211% pattern: 45 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 98.211% pattern: 45 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 98.211% pattern: 45 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 98.211% pattern: 45 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 98.211% pattern: 45 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 98.211% pattern: 45 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 98.211% pattern: 45 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:259 -coverage: 98.211% pattern: 45 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 98.211% pattern: 45 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 98.211% pattern: 45 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 98.211% pattern: 45 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 98.211% pattern: 45 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:395 -coverage: 98.211% pattern: 45 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:407 -coverage: 98.211% pattern: 45 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:384 -coverage: 98.211% pattern: 45 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 98.211% pattern: 45 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 98.211% pattern: 45 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 98.211% pattern: 45 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:405 -coverage: 98.211% pattern: 45 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:396 -coverage: 98.211% pattern: 45 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:393 -coverage: 98.211% pattern: 45 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 98.211% pattern: 45 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 98.211% pattern: 45 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:396 -coverage: 98.211% pattern: 45 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 98.211% pattern: 45 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 98.211% pattern: 45 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:274 -coverage: 98.211% pattern: 45 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 98.211% pattern: 45 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 98.211% pattern: 45 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 98.211% pattern: 45 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:397 -coverage: 98.211% pattern: 45 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:397 -coverage: 98.211% pattern: 45 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 262, fault_cnt:390 -coverage: 98.467% pattern: 46 before: 21 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 98.467% pattern: 46 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 98.467% pattern: 46 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 98.467% pattern: 46 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:418 -coverage: 98.467% pattern: 46 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 98.467% pattern: 46 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 98.467% pattern: 46 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:383 -coverage: 98.467% pattern: 46 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:257 -coverage: 98.467% pattern: 46 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 98.467% pattern: 46 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:377 -coverage: 98.467% pattern: 46 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 98.467% pattern: 46 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 98.467% pattern: 46 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 98.467% pattern: 46 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 98.467% pattern: 46 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 98.467% pattern: 46 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 98.467% pattern: 46 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 98.467% pattern: 46 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 98.467% pattern: 46 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 98.467% pattern: 46 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 98.467% pattern: 46 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:412 -coverage: 98.467% pattern: 46 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:341 -coverage: 98.467% pattern: 46 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 98.467% pattern: 46 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 98.467% pattern: 46 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 98.467% pattern: 46 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 98.467% pattern: 46 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:254 -coverage: 98.467% pattern: 46 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:340 -coverage: 98.467% pattern: 46 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 98.467% pattern: 46 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 98.467% pattern: 46 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 98.467% pattern: 46 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 98.467% pattern: 46 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 98.467% pattern: 46 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:412 -coverage: 98.467% pattern: 46 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 98.467% pattern: 46 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:275 -coverage: 98.467% pattern: 46 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 98.467% pattern: 46 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 98.467% pattern: 46 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 98.467% pattern: 46 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:374 -coverage: 98.467% pattern: 46 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 98.467% pattern: 46 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 98.467% pattern: 46 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:358 -coverage: 98.467% pattern: 46 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:350 -coverage: 98.467% pattern: 46 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 98.467% pattern: 46 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 98.467% pattern: 46 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 98.467% pattern: 46 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 98.467% pattern: 46 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 98.467% pattern: 46 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 98.467% pattern: 46 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 98.467% pattern: 46 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 98.467% pattern: 46 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 98.467% pattern: 46 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 98.467% pattern: 46 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 98.467% pattern: 46 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 98.467% pattern: 46 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 98.467% pattern: 46 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:387 -coverage: 98.467% pattern: 46 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 98.467% pattern: 46 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 98.467% pattern: 46 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 98.467% pattern: 46 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 98.467% pattern: 46 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 98.467% pattern: 46 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 262, fault_cnt:389 -coverage: 98.893% pattern: 47 before: 18 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:266 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:257 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:393 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:267 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:265 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:417 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:373 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:283 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:403 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:399 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:393 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:265 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:338 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:393 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:421 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:419 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:392 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:369 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:385 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:348 -coverage: 98.893% pattern: 47 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 262, fault_cnt:392 -coverage: 99.063% pattern: 48 before: 13 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:391 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:418 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:343 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:392 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:258 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:371 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:276 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:266 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:338 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:394 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:266 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:273 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:386 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:395 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:273 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:265 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:404 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:386 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:265 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:403 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:387 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:280 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:399 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:389 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:339 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:345 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:394 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:280 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:338 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:389 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:394 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:275 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:405 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:341 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:401 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:370 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:388 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:342 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:385 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:402 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:265 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:285 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:282 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:394 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:278 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:371 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:377 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:268 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:399 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:385 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:280 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:268 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:398 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:415 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:383 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:283 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:397 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:280 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:404 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:266 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:394 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:421 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:285 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:401 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:371 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:349 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:390 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:401 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:393 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:280 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:283 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:388 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:338 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:420 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:251 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:377 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:414 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:396 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:384 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:382 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:421 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:392 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:374 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:422 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:369 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:279 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:382 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:357 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:253 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:259 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:385 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:391 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:399 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:275 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:344 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:371 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:340 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:368 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:283 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:401 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:406 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:380 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:259 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:395 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:418 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:342 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:408 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:407 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:409 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:408 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:341 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:430 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:266 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:394 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:340 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:363 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:265 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:266 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:402 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:391 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:408 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:377 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:422 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:258 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:368 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:257 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:281 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:420 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:413 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:411 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:281 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:412 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:424 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:380 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:418 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:255 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:343 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:416 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:265 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:361 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:282 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:403 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:394 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:408 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:257 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:355 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:399 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:279 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:384 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:429 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:406 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:365 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:267 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:282 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:393 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:373 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:285 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:392 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:362 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:338 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:384 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:411 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:403 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:258 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:405 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:282 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:357 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:283 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:407 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:397 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:412 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:390 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:342 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:401 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:419 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:345 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:259 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:362 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:414 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:399 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:392 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:401 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:401 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:338 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:398 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:403 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:259 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:402 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:392 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:258 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:418 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:416 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:259 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:391 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:383 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:266 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:272 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:379 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:255 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:348 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:410 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:369 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:256 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:341 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:425 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:417 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:344 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:379 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:373 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:339 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:274 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:404 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:339 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:340 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:414 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:277 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:265 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:266 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:425 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:380 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:266 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:402 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:376 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:383 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:377 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:419 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:365 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:254 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:339 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:363 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:402 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:407 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:278 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:268 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:388 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:283 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:348 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:266 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:357 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:342 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:398 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:280 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:411 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:338 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:386 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:281 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:379 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:427 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:383 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:282 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:267 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:338 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:265 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:265 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:396 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:401 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:372 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:265 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:366 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:283 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:410 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:269 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:266 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:383 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:379 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:366 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:359 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:340 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:391 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:282 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:285 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:441 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:399 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:278 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:258 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:252 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:278 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:376 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:384 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:395 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:392 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:369 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:338 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:259 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:387 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:367 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:395 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:368 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:358 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:258 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:345 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:401 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:360 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:340 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:387 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:365 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:380 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:348 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:351 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:344 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:390 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:267 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:405 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:379 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:285 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:416 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:410 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:403 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:369 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:276 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:365 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:366 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:258 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:279 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:390 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:411 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:422 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:400 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:401 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:257 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:402 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:285 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:380 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:346 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:399 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:409 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:259 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:276 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:396 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:367 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:400 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:268 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:407 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:399 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:283 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:402 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:392 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:340 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:392 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:376 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:282 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:259 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:399 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:265 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:253 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:412 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:385 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:265 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:387 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:285 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:266 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:408 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:339 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:389 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:346 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:370 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:390 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:397 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:400 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:417 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:375 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:339 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:340 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:397 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:361 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:267 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:283 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:394 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:285 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:376 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:282 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:255 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:360 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:429 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:277 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:374 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:385 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:396 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:389 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:385 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:419 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:258 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:397 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:390 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:351 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:259 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:386 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:386 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:360 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:382 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:383 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:410 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:418 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:266 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:338 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:356 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:393 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:389 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:393 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:402 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:398 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:393 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:338 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:377 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:274 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:342 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:388 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:386 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:414 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:278 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:282 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:377 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:429 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:397 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:399 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:377 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:269 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:391 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:380 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:394 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:417 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:342 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:345 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:413 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:393 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:388 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:265 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:400 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:365 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:407 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:277 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:395 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:382 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:404 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:352 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:366 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:377 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:404 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:419 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:426 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:401 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:371 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:342 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:398 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:278 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:265 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:397 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:392 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:376 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:398 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:268 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:281 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:382 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:420 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:383 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:398 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:366 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:257 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:389 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:340 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:397 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:423 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:446 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:371 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:386 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:372 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:393 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:407 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:338 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:389 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:282 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:265 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:397 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:373 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:387 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:253 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:354 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:394 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:381 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:384 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:381 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:402 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:346 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:283 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:427 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:406 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:338 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:398 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:347 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:340 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:285 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:385 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:392 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:372 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:266 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:375 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:257 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:410 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:367 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:378 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:279 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:411 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:417 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:389 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:408 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:390 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:395 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:381 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:385 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:269 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:420 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:372 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:389 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:372 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:406 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:375 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:276 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:422 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:418 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:370 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:381 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:403 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:386 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:385 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:282 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:357 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:398 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:379 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:386 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:339 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:387 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:273 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:265 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:403 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:412 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:416 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:273 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:408 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:258 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:410 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:282 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:420 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:417 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:409 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:382 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:267 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:362 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:271 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:273 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:382 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:272 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:434 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:383 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:339 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:407 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:340 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:400 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:424 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:383 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:347 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:377 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:278 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:415 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:352 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:273 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:358 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:256 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:339 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:393 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:266 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:282 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:255 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:391 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:402 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:394 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:275 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:282 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:280 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:363 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:258 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:413 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:400 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:282 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:265 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:345 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:404 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:375 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:393 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:344 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:248 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:375 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:283 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:280 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:387 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:391 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:372 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:276 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:370 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:280 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:401 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:419 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:347 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:421 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:285 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:343 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:254 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:399 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:399 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:415 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:253 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:345 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:346 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:396 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:266 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:364 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:378 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:359 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:392 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:410 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:363 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:373 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:283 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:366 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:386 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:341 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:356 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:418 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:403 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:407 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:282 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:259 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:283 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:369 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:265 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:258 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:399 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:369 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:371 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:339 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:392 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:401 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:406 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:277 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:422 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:272 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:390 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:366 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:339 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:395 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:423 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:338 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:279 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:266 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:266 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:407 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:406 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:384 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:378 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:374 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:342 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:385 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:421 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:370 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:363 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:282 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:265 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:405 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:408 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:382 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:273 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:393 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:409 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:357 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:392 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:341 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:363 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:416 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:419 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:390 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:393 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:382 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:281 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:406 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:267 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:397 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:363 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:343 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:418 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:401 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:393 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:269 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:383 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:385 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:393 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:363 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:267 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:377 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:396 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:391 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:258 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:275 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:370 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:265 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:384 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:266 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:280 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:390 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:381 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:397 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:398 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:397 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:340 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:392 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:274 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:251 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:389 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:407 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:412 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:399 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:278 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:389 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:410 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:338 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:375 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:280 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:265 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:404 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:338 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:339 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:403 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:265 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:400 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:257 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:283 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:380 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:342 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:274 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:413 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:280 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:390 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:356 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:385 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:341 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:281 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:384 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:282 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:350 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:409 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:390 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:415 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:395 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:404 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:257 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:373 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:386 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:268 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:366 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:397 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:351 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:349 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:375 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:361 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:345 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:374 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:278 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:406 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:345 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:376 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:267 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:382 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:347 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:390 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:381 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:386 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:258 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:403 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:394 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:384 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:283 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:377 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:265 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:383 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:395 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:420 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:388 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:341 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:397 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:265 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:398 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:282 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:381 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:385 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:397 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:282 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:358 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:389 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:407 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:258 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:397 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:396 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:391 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:411 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:385 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:381 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:380 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:282 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:398 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:343 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:259 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:267 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:384 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:377 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:338 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:251 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:400 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:408 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:257 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:259 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:266 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:393 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:397 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:419 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:401 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:412 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:344 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:366 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.063% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.148% pattern: 49 before: 11 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:383 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:267 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:407 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:340 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:378 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:340 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:375 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:396 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:397 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:280 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:376 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:360 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:371 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:417 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:407 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:395 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:359 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:380 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:397 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:397 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:399 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:377 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:407 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:274 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:384 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:399 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:382 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:428 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:405 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:387 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:272 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:407 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:268 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:365 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:386 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:275 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:340 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:403 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:341 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:371 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:257 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:405 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:392 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:359 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:385 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:367 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:366 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:396 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:399 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:378 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:283 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:257 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:380 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:259 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:370 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:414 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:398 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:365 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:386 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:256 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:401 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:407 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:388 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:390 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:374 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:368 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:268 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:393 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:421 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:346 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:365 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:383 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:265 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:385 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:376 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:356 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:389 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:428 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:393 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:399 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:266 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:393 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:377 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:385 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:258 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:285 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:408 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:257 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:377 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:388 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:413 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:385 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:257 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:375 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:377 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:384 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:399 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:423 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:386 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:403 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:371 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:281 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:272 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:402 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:265 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:384 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:398 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:383 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:363 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:397 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:409 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:251 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:410 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:369 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:415 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:365 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:383 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:269 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:364 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:267 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:381 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:354 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:259 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:364 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:404 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:403 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:267 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:387 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:267 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:414 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:366 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:377 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:373 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:422 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:403 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:393 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:392 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:402 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:374 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:279 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:398 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:340 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:266 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:279 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:381 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:268 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:422 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:405 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:395 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:283 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:407 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:340 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:402 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:381 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:402 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:281 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:414 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:402 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:393 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:409 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:392 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:390 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:379 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:266 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:285 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:428 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:360 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:257 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:285 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:397 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:404 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:282 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:385 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:376 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:401 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:363 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:368 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:341 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:375 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:388 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:413 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:368 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:397 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:391 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:399 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:279 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:367 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:256 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:391 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:397 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:354 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:414 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:340 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:406 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:386 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:366 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:392 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:415 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:367 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:285 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:396 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:353 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:373 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:418 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:265 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:388 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:282 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:397 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:419 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:283 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:338 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:272 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:397 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:401 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:389 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:283 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:400 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:403 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:342 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:342 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:364 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:357 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:281 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:394 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:269 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:266 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:338 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:340 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:367 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:257 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:394 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:394 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:414 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:275 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:347 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:269 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:265 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:399 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:268 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:364 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:341 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:271 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:428 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:338 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:281 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:401 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:340 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:409 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:382 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:387 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:392 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:390 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:339 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:388 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:413 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:257 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:283 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:268 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:266 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:410 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:338 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:254 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:393 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:339 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:399 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:381 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:280 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:416 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:411 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:340 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:400 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:341 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:370 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:266 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:361 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:283 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:282 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:360 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:388 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:418 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:278 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:390 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:380 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:413 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:415 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:385 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:383 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:363 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:412 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:265 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:345 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:385 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:396 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:395 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:391 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:357 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:413 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:274 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:340 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:389 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:266 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:344 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:413 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:370 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:383 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:389 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:343 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:387 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:274 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:398 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:256 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:368 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:367 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:417 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:388 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:384 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:281 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:397 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:401 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:376 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:279 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:279 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:341 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:266 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:398 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:366 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:373 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:256 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:347 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:398 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:382 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:280 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:401 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:373 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:355 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:387 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:391 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:409 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:405 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:393 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:342 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:259 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:390 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:404 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:259 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:398 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:266 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:408 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:266 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:397 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.148% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:114. flip_cnt: 0, stem_cnt: 262, fault_cnt:423 -coverage: 99.659% pattern: 50 before: 10 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:277 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:259 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:402 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:280 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:272 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:343 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:277 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:370 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:398 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:281 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:285 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:365 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:266 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:389 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:283 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:282 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:279 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:278 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:282 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:372 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:404 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:377 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:353 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:259 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:283 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:345 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:400 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:349 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:362 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:395 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:396 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:391 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:265 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:281 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:285 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:348 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:401 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:283 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:257 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:354 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:259 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:402 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:413 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:280 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:401 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:409 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:355 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:402 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:270 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:396 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:377 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:341 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:425 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:368 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:403 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:256 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:391 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:402 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:360 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:394 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:259 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:416 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:391 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:271 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:259 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:409 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:276 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:339 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:375 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:280 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:259 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:360 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:402 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:399 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:257 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:258 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:344 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:393 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:401 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:412 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:259 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:423 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:259 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:354 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:402 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:272 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:371 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:267 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:427 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:341 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:380 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:409 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:372 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:391 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:392 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:279 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:339 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:347 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:283 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:273 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:386 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:278 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:346 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:396 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:259 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:360 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:406 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:418 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:281 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:376 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:339 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:342 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:394 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:363 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:408 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:348 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:338 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:361 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:285 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:267 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:342 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:430 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:390 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:344 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:272 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:371 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:278 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:259 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:266 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:283 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:267 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:400 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:379 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:372 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:362 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:377 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:368 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:340 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:276 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:376 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:268 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:285 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:397 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:406 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:414 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:265 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:256 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:285 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:380 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:415 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:342 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:266 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:410 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:281 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:421 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:273 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:410 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:275 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:285 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:253 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:267 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:267 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:395 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:380 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:428 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:372 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:424 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:283 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:267 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:338 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:424 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:259 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:346 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:283 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:341 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:412 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:279 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:257 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:420 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:398 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:280 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:342 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:364 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:357 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:255 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:396 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:377 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:258 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:393 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:356 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:265 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:338 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:381 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:255 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:338 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:258 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:400 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:281 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:398 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:389 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:283 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:279 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:272 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:400 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:266 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:266 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:382 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:266 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:282 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:273 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:370 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:253 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:269 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:278 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:364 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:391 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:281 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:366 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:387 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:345 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:282 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:283 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:342 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:257 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:441 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:396 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:258 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:268 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:419 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:345 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:278 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:345 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:338 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:341 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:255 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:400 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:346 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:340 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:282 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:394 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:258 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:266 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:339 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:386 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:278 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:257 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:407 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:265 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:401 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:285 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:283 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:271 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:265 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:351 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:283 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:283 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:268 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:285 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:283 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:281 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:279 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:393 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:361 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:380 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:411 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:265 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:268 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:277 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:396 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:366 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:410 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:345 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:417 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:257 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:339 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:363 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:343 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:282 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:341 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:348 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:400 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:385 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:269 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:362 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:272 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:258 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:256 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:280 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:265 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:404 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:257 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:382 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:351 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:266 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:265 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:412 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:282 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:395 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:373 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:381 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:339 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:406 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:282 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:372 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:381 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:276 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:348 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:285 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:389 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:281 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:256 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:410 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:271 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:373 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:280 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:266 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:274 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:356 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:338 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:258 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:383 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:389 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:350 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:420 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:381 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:395 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:341 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:259 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:339 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:271 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:387 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:389 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:389 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:283 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:369 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:392 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:267 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:359 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:282 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:359 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:269 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:371 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:342 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:267 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:383 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:372 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:345 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:340 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:385 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:274 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:409 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:281 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:375 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:393 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:403 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:283 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:339 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:403 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:394 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:270 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:385 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:285 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:276 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:378 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:256 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:413 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:395 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:360 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:270 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:285 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:408 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:405 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:283 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:430 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:404 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:257 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:340 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:406 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:341 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:415 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:281 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:408 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:338 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:266 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:428 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:405 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:394 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:342 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:340 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:381 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:342 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:392 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:343 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:369 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:258 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:340 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:373 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:400 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:341 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:368 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:344 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:283 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:341 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:277 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:339 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:370 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:339 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:405 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:285 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:347 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:338 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:281 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:249 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:401 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:408 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:390 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:270 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:279 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:349 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:275 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:268 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:341 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:339 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:280 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:270 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:345 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:258 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:411 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:401 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:390 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:338 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:348 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:387 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:339 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:392 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:423 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:381 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:376 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:393 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:280 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:385 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:285 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:378 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:343 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:283 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:371 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:342 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:373 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:376 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:395 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:373 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:275 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:339 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:401 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:372 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:338 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:259 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:266 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:341 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:279 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:387 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:384 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:435 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:267 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:265 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:360 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:426 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:265 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:259 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:275 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:420 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:361 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:401 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:274 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:408 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:279 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:265 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:374 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:435 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:392 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:371 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:345 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:397 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:378 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:351 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:367 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:367 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:338 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:393 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:338 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:250 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:402 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:274 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:402 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:342 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:391 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:371 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:388 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:282 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:278 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:283 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:257 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:348 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:250 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:393 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:255 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:281 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:376 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:364 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:389 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:425 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:367 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:266 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:265 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:378 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:410 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:356 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:350 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:265 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:377 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:382 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:340 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:258 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:249 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:268 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:341 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:280 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:399 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:397 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:341 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:281 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:365 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:367 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:375 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:266 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:401 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:257 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:338 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:277 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:283 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:266 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:394 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:374 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:341 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:280 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:268 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:414 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:346 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:381 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:267 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:403 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:390 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:283 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:384 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:277 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:370 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:420 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:394 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:361 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:274 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:276 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:370 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:402 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:381 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:343 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:371 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:265 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:269 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:411 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:259 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:338 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:379 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:390 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:371 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:388 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:380 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:416 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:350 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:397 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:423 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:409 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:402 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:371 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:413 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:265 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:259 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:344 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:253 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:340 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:282 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:279 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:377 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:395 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:408 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:408 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:338 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:379 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:390 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:415 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:386 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:343 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:381 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:376 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:269 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:275 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:338 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:340 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:410 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:408 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:365 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:407 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:383 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:390 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:282 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:400 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:281 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:415 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:339 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:361 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:340 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:282 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:371 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:381 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:376 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:400 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:411 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:285 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:377 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:418 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:379 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:273 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:389 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:258 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:280 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:401 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:347 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:257 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:280 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:369 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:282 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:279 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:362 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:395 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:379 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:373 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:283 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:415 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:340 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:285 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:422 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:342 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:259 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:283 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:378 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:338 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:258 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:256 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:391 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:282 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:283 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:367 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:268 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:266 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:341 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:403 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:279 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:412 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:258 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:285 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:283 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:364 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:386 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:396 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:343 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:339 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:358 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:267 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:350 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:372 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:251 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:407 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:339 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:257 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:275 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:341 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:429 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:338 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:340 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:347 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:408 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:276 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:266 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:403 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:338 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:392 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:381 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:265 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:253 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:404 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:398 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:343 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:267 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:281 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:378 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:271 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:280 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:364 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:259 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:399 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:352 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:342 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:386 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:418 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:416 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:272 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:348 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:276 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:266 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:279 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:275 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:269 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:338 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:285 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:282 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:338 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:399 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:395 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:386 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:340 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:278 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:345 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:282 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:361 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:416 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:342 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:338 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:398 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:380 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:285 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:399 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:380 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:277 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:285 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:280 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:279 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:276 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:279 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:376 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:409 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:396 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:254 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:259 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:285 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:251 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:383 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:266 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:268 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:253 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:340 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:418 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:277 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:361 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:386 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:279 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:394 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:368 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:399 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:285 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:426 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:343 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:402 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:418 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:271 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:345 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:277 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:280 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:363 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:400 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:422 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:340 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:281 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:280 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:398 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:257 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:368 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:283 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:391 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:279 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:387 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:345 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:426 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:285 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:285 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:257 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:403 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:265 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:272 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:259 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:270 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:382 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:386 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:277 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:277 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:274 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:384 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:338 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:268 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:285 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:373 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:256 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:392 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:283 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:412 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:278 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:405 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:341 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:361 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:254 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:412 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:265 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:422 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:422 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:343 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:368 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:386 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:408 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:341 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:338 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:342 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:411 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:281 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:417 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:255 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:394 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:352 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:366 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:281 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:409 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:438 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:349 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:343 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:281 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:281 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:268 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:270 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:259 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:388 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:338 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:257 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:399 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:340 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:391 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:395 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:283 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:265 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:350 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:276 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:402 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:408 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:412 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:272 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:355 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:412 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:265 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:281 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:396 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:259 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:339 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:256 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:384 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:266 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:252 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:283 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:339 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:339 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:414 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:431 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:402 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:278 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:383 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:344 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:397 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:258 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:347 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:259 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:420 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:257 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:276 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:344 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:390 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:342 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:370 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:358 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:397 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:271 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:349 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:404 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:259 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:394 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:392 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:282 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:278 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:276 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:283 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:387 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:259 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:415 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:374 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:402 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:285 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:257 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:255 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:252 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:368 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:362 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:381 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:259 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:395 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:281 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:363 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:402 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:368 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:339 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:271 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:424 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:359 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:257 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:341 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:345 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:420 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:259 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:256 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:413 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:347 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:285 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:381 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:268 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:376 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:267 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:273 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:255 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:267 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:340 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:387 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:283 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:338 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:339 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:253 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:257 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:353 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:379 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:338 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:258 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:410 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:285 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:347 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:273 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:402 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:405 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:268 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:282 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:354 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:345 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:373 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:266 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:407 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:369 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:347 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:283 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:389 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:339 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:378 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:340 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:416 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:390 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:416 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:361 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:402 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:267 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:400 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:384 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:381 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:415 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:339 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:259 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:409 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:362 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:390 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:377 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:421 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:283 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:401 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:282 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:370 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:254 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:387 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:414 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:419 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:339 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:280 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:408 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:352 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:376 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:385 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:259 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:254 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:285 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:397 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:415 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:411 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:341 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:265 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:384 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:266 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:403 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:401 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:374 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:276 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:394 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:374 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:256 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:369 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:375 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:378 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:382 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:350 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:339 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:340 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:346 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:347 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:344 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:361 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:265 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:282 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:265 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:285 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:375 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:275 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:388 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:285 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:338 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:340 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:253 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:401 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:391 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:398 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:265 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:408 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:405 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:343 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:339 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:344 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:374 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:270 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:265 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:355 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:412 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:283 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:278 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:412 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:268 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:347 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:278 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:282 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:339 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:374 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:379 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:404 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:362 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:395 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:399 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:408 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:417 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:364 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:256 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:259 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:283 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:347 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:401 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:266 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:283 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:381 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:383 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:349 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:342 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:281 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:283 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:341 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:265 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:383 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:279 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:282 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:417 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:345 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:396 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:270 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:404 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:403 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:388 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:278 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:402 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:365 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:435 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:280 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:267 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:398 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:285 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:339 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:402 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:391 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:378 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:406 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:386 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:379 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:368 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:282 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:414 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:408 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:276 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:379 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:365 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:450 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:371 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:278 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:377 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:268 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:359 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:395 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:283 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:402 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:429 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:402 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:281 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:395 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:389 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:258 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:282 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:277 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:269 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:354 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:275 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:384 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:282 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:278 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:367 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:404 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:384 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:338 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:285 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:283 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:372 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:415 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:340 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:342 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:341 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:269 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:363 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:360 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:343 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:279 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:376 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:413 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:367 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:394 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:407 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:282 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:347 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:257 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:396 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:393 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:377 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:395 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:273 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:340 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:339 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:276 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:267 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:339 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:374 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:353 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:343 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:357 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:378 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:273 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:350 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:251 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:266 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:342 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:363 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:267 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:285 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:272 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:257 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:287 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:415 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:372 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:378 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:344 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:412 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:376 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:358 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:396 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:404 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:279 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:266 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:390 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:344 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:373 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:340 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:392 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:281 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:371 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:266 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:282 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:405 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:264 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:399 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:266 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:406 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:283 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:384 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:278 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:285 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:361 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:283 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:404 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:381 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:370 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:334 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:416 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:386 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:282 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:349 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:285 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:285 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:400 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:382 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:336 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:265 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:374 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:259 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:333 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:335 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:285 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:283 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:388 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:401 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:288 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:337 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:261 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:317 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:263 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:296 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:376 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:284 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:340 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:255 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:339 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:300 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:298 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:342 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:275 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:274 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:331 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:396 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:280 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:326 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:370 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:292 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:361 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:415 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:340 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:417 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:390 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:267 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:260 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:328 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:318 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:329 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:365 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:303 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:304 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:299 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:273 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:282 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:332 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:301 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:322 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:293 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:319 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:295 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:320 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:307 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:325 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:313 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:297 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:305 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:314 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:309 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:289 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:311 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:262 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:258 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:324 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:286 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:291 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:310 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:312 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:302 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:306 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:315 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:321 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:330 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:308 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:327 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:323 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:294 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:290 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 262, fault_cnt:316 -coverage: 99.659% pattern: 50 before: 4 now: 4 -checking valid circuit ... result: 1. diff --git a/exp_result/ATPG-LS_b06.bench.txt b/exp_result/ATPG-LS_b06.bench.txt deleted file mode 100644 index e8ec51b..0000000 --- a/exp_result/ATPG-LS_b06.bench.txt +++ /dev/null @@ -1,74 +0,0 @@ -make: 'atpg' is up to date. -======================== -parsing file ./benchmark/b06.bench ... Done. -====== Circuit Statistics ====== -PI: 11 -PO: 15 -Gate: 56 -Stem: 42 -Level: 3 -================================ -[SOL] flip: 0, stem: 0, fault:159. flip_cnt: 0, stem_cnt: 42, fault_cnt:43 -coverage: 38.393% pattern: 1 before: 112 now: 69 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:107. flip_cnt: 0, stem_cnt: 42, fault_cnt:43 -coverage: 65.179% pattern: 2 before: 69 now: 39 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:23. flip_cnt: 0, stem_cnt: 42, fault_cnt:45 -coverage: 78.571% pattern: 3 before: 39 now: 24 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:64. flip_cnt: 0, stem_cnt: 42, fault_cnt:46 -coverage: 90.179% pattern: 4 before: 24 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 42, fault_cnt:41 -coverage: 91.071% pattern: 5 before: 11 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:54. flip_cnt: 0, stem_cnt: 42, fault_cnt:45 -coverage: 94.643% pattern: 6 before: 10 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:18. flip_cnt: 0, stem_cnt: 42, fault_cnt:36 -coverage: 97.321% pattern: 7 before: 6 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:14. flip_cnt: 0, stem_cnt: 42, fault_cnt:43 -coverage: 98.214% pattern: 8 before: 3 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 42, fault_cnt:40 -coverage: 98.214% pattern: 8 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 42, fault_cnt:44 -coverage: 98.214% pattern: 8 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 42, fault_cnt:34 -coverage: 98.214% pattern: 8 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 42, fault_cnt:46 -coverage: 98.214% pattern: 8 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 42, fault_cnt:45 -coverage: 98.214% pattern: 8 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 42, fault_cnt:35 -coverage: 98.214% pattern: 8 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 42, fault_cnt:36 -coverage: 98.214% pattern: 8 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 42, fault_cnt:41 -coverage: 98.214% pattern: 8 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:13. flip_cnt: 0, stem_cnt: 42, fault_cnt:47 -coverage: 99.107% pattern: 9 before: 2 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 42, fault_cnt:41 -coverage: 99.107% pattern: 9 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 42, fault_cnt:46 -coverage: 99.107% pattern: 9 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:15. flip_cnt: 0, stem_cnt: 42, fault_cnt:44 -coverage: 100.000% pattern: 10 before: 1 now: 0 -checking valid circuit ... result: 1. - -real 0m0.107s -user 0m0.105s -sys 0m0.000s diff --git a/exp_result/ATPG-LS_b07.bench.txt b/exp_result/ATPG-LS_b07.bench.txt deleted file mode 100644 index 9755090..0000000 --- a/exp_result/ATPG-LS_b07.bench.txt +++ /dev/null @@ -1,53773 +0,0 @@ -make: 'atpg' is up to date. -======================== -parsing file ./benchmark/b07.bench ... Done. -====== Circuit Statistics ====== -PI: 50 -PO: 57 -Gate: 419 -Stem: 224 -Level: 5 -================================ -[SOL] flip: 0, stem: 0, fault:2800. flip_cnt: 0, stem_cnt: 224, fault_cnt:225 -coverage: 26.850% pattern: 1 before: 838 now: 613 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:3058. flip_cnt: 0, stem_cnt: 224, fault_cnt:333 -coverage: 56.086% pattern: 2 before: 613 now: 368 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:2180. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 71.480% pattern: 3 before: 368 now: 239 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:360. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 75.418% pattern: 4 before: 239 now: 206 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:171. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 76.492% pattern: 5 before: 206 now: 197 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:205. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 78.520% pattern: 6 before: 197 now: 180 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:721. flip_cnt: 0, stem_cnt: 224, fault_cnt:338 -coverage: 84.129% pattern: 7 before: 180 now: 133 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:260. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 86.038% pattern: 8 before: 133 now: 117 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 86.158% pattern: 9 before: 117 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:195. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 88.186% pattern: 10 before: 116 now: 99 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:133. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 89.021% pattern: 11 before: 99 now: 92 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:216. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 90.811% pattern: 12 before: 92 now: 77 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 91.050% pattern: 13 before: 77 now: 75 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 91.050% pattern: 13 before: 75 now: 75 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:244. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 93.079% pattern: 14 before: 75 now: 58 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 93.079% pattern: 14 before: 58 now: 58 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 93.317% pattern: 15 before: 58 now: 56 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:58. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 93.795% pattern: 16 before: 56 now: 52 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 93.795% pattern: 16 before: 52 now: 52 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 94.153% pattern: 17 before: 52 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 94.272% pattern: 18 before: 49 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 94.272% pattern: 18 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 94.511% pattern: 19 before: 48 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 94.630% pattern: 20 before: 46 now: 45 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 94.630% pattern: 20 before: 45 now: 45 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 94.869% pattern: 21 before: 45 now: 43 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 94.869% pattern: 21 before: 43 now: 43 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 94.869% pattern: 21 before: 43 now: 43 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 94.988% pattern: 22 before: 43 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 94.988% pattern: 22 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 94.988% pattern: 22 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 95.107% pattern: 23 before: 42 now: 41 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 95.107% pattern: 23 before: 41 now: 41 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 95.107% pattern: 23 before: 41 now: 41 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 95.107% pattern: 23 before: 41 now: 41 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 95.107% pattern: 23 before: 41 now: 41 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:90. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 96.062% pattern: 24 before: 41 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 96.062% pattern: 24 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 96.062% pattern: 24 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 96.062% pattern: 24 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 96.062% pattern: 24 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 96.062% pattern: 24 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 96.062% pattern: 24 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 96.062% pattern: 24 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 96.062% pattern: 24 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:280 -coverage: 96.062% pattern: 24 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:13. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 96.181% pattern: 25 before: 33 now: 32 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 96.181% pattern: 25 before: 32 now: 32 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 96.181% pattern: 25 before: 32 now: 32 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:229 -coverage: 96.181% pattern: 25 before: 32 now: 32 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 96.181% pattern: 25 before: 32 now: 32 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 96.181% pattern: 25 before: 32 now: 32 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:215 -coverage: 96.181% pattern: 25 before: 32 now: 32 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 96.181% pattern: 25 before: 32 now: 32 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:259 -coverage: 96.181% pattern: 25 before: 32 now: 32 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:16. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 96.301% pattern: 26 before: 32 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 96.301% pattern: 26 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 96.301% pattern: 26 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 96.301% pattern: 26 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 96.301% pattern: 26 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 96.301% pattern: 26 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 96.301% pattern: 26 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 96.301% pattern: 26 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 96.301% pattern: 26 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 96.301% pattern: 26 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 96.301% pattern: 26 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 96.301% pattern: 26 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 96.301% pattern: 26 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 96.301% pattern: 26 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 96.301% pattern: 26 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 96.301% pattern: 26 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 96.301% pattern: 26 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 96.301% pattern: 26 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 96.301% pattern: 26 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 96.301% pattern: 26 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 96.301% pattern: 26 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 96.301% pattern: 26 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 96.301% pattern: 26 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 96.301% pattern: 26 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 96.301% pattern: 26 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 96.301% pattern: 26 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 96.301% pattern: 26 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:4. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 96.659% pattern: 27 before: 31 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:229 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:332 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:229 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:222 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:283 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:289 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:211 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:223 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:212 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:213 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:333 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:333 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:222 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:283 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:332 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:283 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:227 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 96.659% pattern: 27 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 96.778% pattern: 28 before: 28 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 96.778% pattern: 28 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 96.778% pattern: 28 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 96.778% pattern: 28 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 96.778% pattern: 28 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 96.778% pattern: 28 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 96.778% pattern: 28 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 96.778% pattern: 28 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 96.778% pattern: 28 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 96.778% pattern: 28 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 96.778% pattern: 28 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 96.778% pattern: 28 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 96.778% pattern: 28 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 96.778% pattern: 28 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 96.778% pattern: 28 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:208 -coverage: 96.778% pattern: 28 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 96.778% pattern: 28 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 96.778% pattern: 28 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 96.778% pattern: 28 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 96.778% pattern: 28 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 96.778% pattern: 28 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 96.778% pattern: 28 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 96.778% pattern: 28 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 96.778% pattern: 28 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 96.778% pattern: 28 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 96.778% pattern: 28 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 96.778% pattern: 28 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 96.778% pattern: 28 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 96.778% pattern: 28 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 96.778% pattern: 28 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 96.778% pattern: 28 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 96.778% pattern: 28 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 96.778% pattern: 28 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 96.778% pattern: 28 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 96.778% pattern: 28 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:225 -coverage: 96.778% pattern: 28 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 96.778% pattern: 28 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 96.778% pattern: 28 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 96.778% pattern: 28 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 96.778% pattern: 28 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 96.778% pattern: 28 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 96.778% pattern: 28 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 96.778% pattern: 28 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 96.778% pattern: 28 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 96.778% pattern: 28 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 96.778% pattern: 28 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 96.778% pattern: 28 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 96.897% pattern: 29 before: 27 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:211 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:228 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:254 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:286 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:222 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:332 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:227 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:208 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:288 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:283 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:259 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:335 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:206 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:228 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:214 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:337 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:229 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:332 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:284 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:279 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:224 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:280 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:288 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:222 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:226 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:288 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:333 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:289 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:283 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:222 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:225 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:225 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:284 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:228 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:334 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:278 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:332 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:289 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:332 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:226 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:289 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:287 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:282 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:222 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:214 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:222 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:283 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:225 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:254 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:289 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:289 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:214 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:333 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:254 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:206 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:288 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:285 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:284 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:213 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:255 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:229 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:213 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:255 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:210 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:227 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:214 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:288 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:214 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:228 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:288 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:215 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:285 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:213 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:226 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 96.897% pattern: 29 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:79. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 97.613% pattern: 30 before: 26 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:332 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:335 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:226 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:284 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:227 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:212 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:333 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:288 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:254 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:340 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:282 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:289 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:288 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:215 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:332 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:208 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:215 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:334 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:256 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:225 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:288 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:215 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:334 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:288 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:288 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:335 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:332 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:208 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:209 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:212 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:223 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:286 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:223 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:332 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:254 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:336 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:288 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:254 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:212 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:287 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:288 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:283 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:342 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:332 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:226 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:222 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:254 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:229 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:213 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 97.613% pattern: 30 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 224, fault_cnt:341 -coverage: 98.091% pattern: 31 before: 20 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:229 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:257 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:225 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:333 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:336 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:214 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:210 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:224 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:222 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:225 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:337 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:212 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:332 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:341 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:225 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:215 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:204 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:224 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:229 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:226 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:222 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:283 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:256 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:283 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:215 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:213 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:225 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:258 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:336 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:224 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:225 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:223 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:228 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:289 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:281 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:332 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:212 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:281 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:224 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:289 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:222 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:334 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:227 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:222 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:258 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:332 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:215 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:254 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:255 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:222 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:207 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:334 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:336 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:228 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:224 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:210 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:229 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:261 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:289 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:226 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:215 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:282 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:226 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:225 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:289 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:333 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:229 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:288 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:335 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:210 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:288 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:333 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:214 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:225 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:224 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:226 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:222 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:224 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:225 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:285 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:214 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:229 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:209 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:223 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:333 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:289 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:280 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:257 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:285 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:215 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:267 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:212 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:213 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:224 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:222 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:257 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:283 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:212 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:280 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:229 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:261 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:224 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:215 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:211 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:260 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:332 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.091% pattern: 31 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.449% pattern: 32 before: 16 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:340 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:225 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:336 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:214 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:226 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:229 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:286 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:287 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:280 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:333 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:285 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:288 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:210 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:213 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:229 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:332 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:215 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:334 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:210 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:209 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:254 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:285 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:227 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:289 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:262 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:341 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:210 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:336 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:227 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:261 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:281 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:286 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:256 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:256 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:254 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:226 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:336 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:332 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:214 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:208 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:229 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:288 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:226 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:284 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:332 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:332 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:211 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:282 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:258 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:229 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:333 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:225 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:254 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:280 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:332 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:286 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:226 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:226 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:334 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:254 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:333 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:222 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:222 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:332 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:256 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:281 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:213 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:215 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:214 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:333 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:289 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:212 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:222 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:344 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:215 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:336 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:278 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:226 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:229 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:285 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:226 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:288 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:224 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:228 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:334 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:255 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:227 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:229 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:224 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:260 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:334 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:215 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:256 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:289 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:284 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:343 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:334 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:215 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:287 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:215 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:256 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:280 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:212 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:213 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:228 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:223 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:212 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:213 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:224 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:285 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:225 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:287 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:215 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:332 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:284 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:288 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:339 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:255 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:287 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:228 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:332 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:275 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:334 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:280 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:209 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:288 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:257 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:288 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:213 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:223 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:229 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:223 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:339 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:287 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:228 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:203 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:335 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:261 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.449% pattern: 32 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.568% pattern: 33 before: 13 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:334 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:336 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:212 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:212 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:288 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:224 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:336 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:254 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:333 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:335 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:285 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:226 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:254 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:335 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:288 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:224 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:289 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:340 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:342 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:337 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:257 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:226 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:212 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:214 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:223 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:213 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:215 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:226 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:209 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:227 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:213 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:227 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:222 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:211 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:281 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:229 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:335 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:286 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:283 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:279 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:332 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:227 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:227 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:228 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:288 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:254 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:283 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:332 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:280 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:285 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:214 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:282 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:224 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:280 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:351 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:226 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:333 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:336 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:213 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:223 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:333 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:335 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:204 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:289 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:283 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:213 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:333 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:258 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:257 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:274 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:289 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:284 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:333 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:229 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:215 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:332 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:335 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:338 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:225 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:214 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:214 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:288 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:289 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:258 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:222 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:289 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:227 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:224 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:255 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:289 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:336 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:287 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:335 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:224 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:286 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:337 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:287 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:215 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:258 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:284 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:288 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:202 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.568% pattern: 33 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 12 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:256 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:336 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:335 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:206 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:282 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:285 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:214 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:336 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:228 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:289 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:339 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:289 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:334 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:285 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:332 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:229 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:214 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:271 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:255 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:289 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:288 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:212 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:259 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:340 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:224 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:227 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:285 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:211 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:228 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:225 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:223 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:265 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:286 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:278 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:334 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:207 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:211 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:223 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:213 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:227 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:334 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:213 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:227 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:223 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:214 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:333 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:333 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:334 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:228 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:334 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:254 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:214 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:226 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:224 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:223 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:229 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:225 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:213 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:215 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:287 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:223 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:272 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:289 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:254 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:254 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:257 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:222 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:279 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:258 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:289 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:259 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:224 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:229 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:333 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:266 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:288 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:215 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:287 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:215 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:355 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:346 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:336 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:341 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:282 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:288 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:284 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:337 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:289 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:229 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:289 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:213 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:281 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:285 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:272 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:257 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:254 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:229 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:346 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:288 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:227 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:276 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:226 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:338 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:332 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:228 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:222 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:255 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:256 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:335 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:288 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:336 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:212 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:228 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:334 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:283 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:335 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:224 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:287 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:223 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:222 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:256 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:212 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:281 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:222 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:333 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:214 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:213 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:332 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:223 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:255 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:223 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:215 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:332 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:255 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:210 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:229 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:287 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:283 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:226 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:209 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:332 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:214 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:254 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:281 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:213 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:212 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:224 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:337 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:223 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:222 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:336 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:336 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:283 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:227 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:227 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:332 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:213 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:288 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:333 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:227 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:224 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:229 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:223 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:333 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:332 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:340 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:210 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:213 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:333 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:254 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:226 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:207 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:228 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:256 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:337 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:282 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:333 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:280 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:226 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:223 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:214 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:334 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:338 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:335 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:254 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:288 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:213 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:257 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:228 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:272 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:225 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:227 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:223 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:255 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:214 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:229 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:215 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:212 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:212 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:210 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:332 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:255 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:224 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:258 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:334 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:214 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:214 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:223 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:289 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:214 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:228 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:215 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:223 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:223 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:214 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:212 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:215 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:212 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:264 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:259 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:229 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:336 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:227 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:289 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:336 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:287 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:285 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:281 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:227 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:224 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:289 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:214 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:213 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:281 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:210 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:214 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:336 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:333 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:333 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:215 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:287 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:222 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:214 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:336 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:333 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:206 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:254 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:279 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:283 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:333 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:214 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:277 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:229 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:254 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:277 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:334 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:222 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:211 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:258 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:229 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:332 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:228 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:205 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:214 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:282 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:337 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:225 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:255 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:283 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:215 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:215 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:262 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:215 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:337 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:335 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:282 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:333 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:229 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:208 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:275 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:222 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:225 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:215 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:224 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:332 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:204 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:225 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:226 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:226 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:213 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:332 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:283 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:254 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:229 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:270 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:226 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:257 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:288 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:288 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:212 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:334 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:214 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:289 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:278 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:210 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:255 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:278 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:333 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:229 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:288 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:286 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:225 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:332 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:333 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:222 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:215 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:224 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:254 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:226 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:212 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:229 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:215 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:228 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:223 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:287 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:222 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:226 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:288 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:215 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:229 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:287 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:258 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:283 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:223 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:229 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:215 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:228 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:222 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:214 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:284 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:332 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:229 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:209 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:333 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:227 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:227 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:254 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:256 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:229 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:254 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:211 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:229 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:336 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:225 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:256 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:214 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:225 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:214 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:288 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:254 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:332 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:333 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:282 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:282 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:258 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:337 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:211 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:214 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:224 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:289 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:209 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:214 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:226 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:288 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:214 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:285 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:214 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:210 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:211 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:211 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:213 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:211 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:208 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:228 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:228 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:212 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:288 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:223 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:228 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:281 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:343 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:288 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:281 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:336 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:257 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:213 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:224 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:210 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:337 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:213 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:283 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:224 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:223 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:254 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:222 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:334 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:337 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:334 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:209 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:214 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:211 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:255 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:223 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:215 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:287 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:286 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:225 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:225 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:229 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:229 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:223 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:213 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:209 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:225 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:213 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:282 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:336 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:214 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:224 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:211 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:284 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:222 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:215 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:214 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:211 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:209 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:278 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:289 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:332 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:334 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:215 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:282 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:345 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:228 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:332 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:213 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:254 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:212 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:288 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:222 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:222 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:215 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:206 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:285 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:255 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:222 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:223 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:223 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:288 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:283 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:333 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:223 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:289 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:227 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:223 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:215 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:335 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:223 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:229 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:255 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:334 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:336 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:224 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:209 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:332 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:286 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:225 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:333 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:225 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:224 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:211 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:286 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:215 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:288 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:225 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:288 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:255 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:224 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:287 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:260 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:337 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:258 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:209 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:227 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:333 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:214 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:214 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:224 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:336 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:340 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:254 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:332 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:214 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:341 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:333 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:228 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:212 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:256 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:212 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:225 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:256 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:281 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:228 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:214 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:214 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:255 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:229 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:224 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:208 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:282 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:333 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:255 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:335 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:259 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:255 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:226 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:229 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:288 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:227 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:213 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:211 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:256 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:222 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:213 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:229 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:335 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:224 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:223 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:207 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:212 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:255 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:289 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:257 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:222 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:224 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:287 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:226 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:285 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:260 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:261 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:211 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:334 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:254 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:229 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:222 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:213 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:214 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:226 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:284 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:335 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:215 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:222 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:334 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:215 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:229 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:289 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:332 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:289 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:222 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:211 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:284 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:256 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:258 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:285 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:285 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:223 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:287 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:229 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:287 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:254 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:340 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:337 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:286 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:210 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:204 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:354 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:341 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:214 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:225 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:228 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:335 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:214 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:341 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:209 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:257 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:223 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:259 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:222 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:213 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:257 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:215 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:222 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:209 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:228 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:255 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:213 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:224 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:205 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:334 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:288 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:223 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:212 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:285 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:337 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:223 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:224 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:255 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:213 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:226 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:228 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:334 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:210 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:228 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:255 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:212 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:226 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:229 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:215 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:223 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:255 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:212 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:254 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:228 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:222 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:224 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:332 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:214 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:285 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:289 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:215 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:287 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:255 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:288 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:257 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:333 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:214 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:223 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:215 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:336 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:343 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:226 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:222 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:225 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:333 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:339 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:214 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:289 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:254 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:212 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:254 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:333 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:223 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:213 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:223 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:335 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:227 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:288 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:224 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:213 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:333 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:332 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:257 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:215 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:222 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:209 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:212 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:286 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:213 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:334 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:336 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:256 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:333 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:285 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:285 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:333 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:289 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:211 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:228 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:215 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:214 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:222 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:257 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:254 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:280 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:289 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:256 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:282 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:288 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:288 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:212 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:214 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:258 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:210 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:202 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:254 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:332 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:227 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:215 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:335 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:214 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:288 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:254 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:222 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:333 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:222 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:285 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:289 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:334 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:282 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:256 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:255 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:257 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:333 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:226 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:282 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:226 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:224 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:222 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:227 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:229 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:214 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:276 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:223 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:289 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:210 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:339 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:288 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:215 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:226 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:255 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:223 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:255 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:210 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:222 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:267 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:255 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:224 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:333 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:223 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:334 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:332 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:333 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:276 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:222 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:333 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:223 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:212 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:213 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:333 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:256 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:208 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:212 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:229 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:212 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:257 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:257 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:288 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:255 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:254 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:222 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:336 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:277 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:289 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:338 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:278 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:333 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:229 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:284 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:224 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:282 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:215 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:284 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:254 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:334 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:223 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:333 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:334 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:208 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:210 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:223 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:211 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:211 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:257 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:224 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:264 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:226 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:289 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:258 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:288 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:277 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:283 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:256 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:263 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:213 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:226 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:213 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:212 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:211 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:228 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:212 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:257 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:211 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:276 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:227 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:215 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:210 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:289 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:204 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:287 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:258 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:289 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:262 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:332 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:215 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:254 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:336 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:224 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:274 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:254 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:213 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:336 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:206 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:208 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:335 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:214 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:336 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:255 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:289 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:282 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:336 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:288 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:215 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:261 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:332 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:212 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:254 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:286 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:208 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:332 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:256 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:223 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:261 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:260 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:332 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:227 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:286 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:255 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:286 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:335 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:337 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:215 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:227 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:339 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:289 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:214 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:225 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:210 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:332 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:223 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:254 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:333 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:213 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:227 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:225 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:229 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:211 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:339 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:225 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:260 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:285 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:208 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:225 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:223 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:344 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:289 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:283 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:285 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:224 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:286 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:223 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:285 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:283 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:279 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:332 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:222 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:227 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:332 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:256 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:215 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:341 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:214 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:223 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:206 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:222 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:215 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:214 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:334 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:292 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:286 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:226 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:332 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:223 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:227 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:222 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:221 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:211 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:226 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:212 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:215 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:229 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:254 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:333 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:335 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:332 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:215 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:337 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:224 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:223 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:223 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:289 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:333 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:255 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:231 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:288 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:257 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:224 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:226 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:333 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:289 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:294 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:212 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:280 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:336 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:222 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:255 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:257 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:227 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:288 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:211 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:278 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:257 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:213 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:335 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:229 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:332 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:285 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:227 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:257 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:333 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:289 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:227 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:210 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:225 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:213 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:225 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:212 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:330 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:208 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:253 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:332 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:214 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:335 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:326 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:235 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:219 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:223 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:223 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:228 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:220 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:216 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:319 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:331 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:334 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:327 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:229 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:302 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:215 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:296 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:336 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:250 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:335 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:287 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:308 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:301 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:305 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:233 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:230 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:290 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:312 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:328 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:318 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:333 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:217 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:313 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:287 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:298 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:315 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:329 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:232 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:303 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:335 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:244 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:218 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:251 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:297 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:213 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:317 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:252 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:247 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:306 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:300 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:316 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:309 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:246 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:293 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:299 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:243 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:310 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:311 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:222 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:248 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:307 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:234 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:325 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:249 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:324 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:240 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:322 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:304 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:236 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:242 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:321 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:238 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:237 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:320 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:291 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:323 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:245 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:314 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:241 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:295 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 224, fault_cnt:239 -coverage: 98.687% pattern: 34 before: 11 now: 11 -checking valid circuit ... result: 1. diff --git a/exp_result/ATPG-LS_b08.bench.txt b/exp_result/ATPG-LS_b08.bench.txt deleted file mode 100644 index 6bf6393..0000000 --- a/exp_result/ATPG-LS_b08.bench.txt +++ /dev/null @@ -1,3653 +0,0 @@ -make: 'atpg' is up to date. -======================== -parsing file ./benchmark/b08.bench ... Done. -====== Circuit Statistics ====== -PI: 30 -PO: 25 -Gate: 167 -Stem: 98 -Level: 3 -================================ -[SOL] flip: 0, stem: 0, fault:408. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 31.437% pattern: 1 before: 334 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:595. flip_cnt: 0, stem_cnt: 98, fault_cnt:103 -coverage: 54.491% pattern: 2 before: 229 now: 152 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:698. flip_cnt: 0, stem_cnt: 98, fault_cnt:113 -coverage: 67.964% pattern: 3 before: 152 now: 107 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:90. flip_cnt: 0, stem_cnt: 98, fault_cnt:97 -coverage: 70.060% pattern: 4 before: 107 now: 100 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:148. flip_cnt: 0, stem_cnt: 98, fault_cnt:91 -coverage: 76.347% pattern: 5 before: 100 now: 79 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:133. flip_cnt: 0, stem_cnt: 98, fault_cnt:114 -coverage: 78.443% pattern: 6 before: 79 now: 72 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:171. flip_cnt: 0, stem_cnt: 98, fault_cnt:86 -coverage: 81.138% pattern: 7 before: 72 now: 63 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:96 -coverage: 81.138% pattern: 7 before: 63 now: 63 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:9. flip_cnt: 0, stem_cnt: 98, fault_cnt:87 -coverage: 82.036% pattern: 8 before: 63 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:20. flip_cnt: 0, stem_cnt: 98, fault_cnt:84 -coverage: 82.635% pattern: 9 before: 60 now: 58 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:101 -coverage: 82.635% pattern: 9 before: 58 now: 58 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 98, fault_cnt:108 -coverage: 83.533% pattern: 10 before: 58 now: 55 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:86 -coverage: 83.533% pattern: 10 before: 55 now: 55 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:99 -coverage: 83.533% pattern: 10 before: 55 now: 55 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:107 -coverage: 83.533% pattern: 10 before: 55 now: 55 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:171. flip_cnt: 0, stem_cnt: 98, fault_cnt:117 -coverage: 86.826% pattern: 11 before: 55 now: 44 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:100 -coverage: 86.826% pattern: 11 before: 44 now: 44 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:99 -coverage: 86.826% pattern: 11 before: 44 now: 44 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 98, fault_cnt:102 -coverage: 87.425% pattern: 12 before: 44 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 98, fault_cnt:111 -coverage: 88.623% pattern: 13 before: 42 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 89.222% pattern: 14 before: 38 now: 36 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 98, fault_cnt:114 -coverage: 90.120% pattern: 15 before: 36 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:94 -coverage: 90.120% pattern: 15 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:27. flip_cnt: 0, stem_cnt: 98, fault_cnt:134 -coverage: 92.515% pattern: 16 before: 33 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:100 -coverage: 92.515% pattern: 16 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:32. flip_cnt: 0, stem_cnt: 98, fault_cnt:110 -coverage: 93.114% pattern: 17 before: 25 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:4. flip_cnt: 0, stem_cnt: 98, fault_cnt:109 -coverage: 93.413% pattern: 18 before: 23 now: 22 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:88 -coverage: 93.413% pattern: 18 before: 22 now: 22 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:89 -coverage: 93.413% pattern: 18 before: 22 now: 22 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:103 -coverage: 93.413% pattern: 18 before: 22 now: 22 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:103 -coverage: 93.413% pattern: 18 before: 22 now: 22 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 93.413% pattern: 18 before: 22 now: 22 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:89 -coverage: 93.413% pattern: 18 before: 22 now: 22 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:107 -coverage: 93.413% pattern: 18 before: 22 now: 22 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 98, fault_cnt:108 -coverage: 94.012% pattern: 19 before: 22 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:90 -coverage: 94.012% pattern: 19 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:87 -coverage: 94.012% pattern: 19 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 94.012% pattern: 19 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 98, fault_cnt:109 -coverage: 94.311% pattern: 20 before: 20 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:108 -coverage: 94.311% pattern: 20 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 94.311% pattern: 20 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 98, fault_cnt:113 -coverage: 94.910% pattern: 21 before: 19 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:88 -coverage: 94.910% pattern: 21 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:112 -coverage: 94.910% pattern: 21 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 94.910% pattern: 21 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:101 -coverage: 94.910% pattern: 21 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:103 -coverage: 94.910% pattern: 21 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:88 -coverage: 94.910% pattern: 21 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:110 -coverage: 94.910% pattern: 21 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:111 -coverage: 94.910% pattern: 21 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:98 -coverage: 94.910% pattern: 21 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:94 -coverage: 94.910% pattern: 21 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:99 -coverage: 94.910% pattern: 21 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:103 -coverage: 94.910% pattern: 21 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 94.910% pattern: 21 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:99 -coverage: 94.910% pattern: 21 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:3. flip_cnt: 0, stem_cnt: 98, fault_cnt:108 -coverage: 95.210% pattern: 22 before: 17 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:88 -coverage: 95.210% pattern: 22 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:97 -coverage: 95.210% pattern: 22 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:101 -coverage: 95.210% pattern: 22 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 95.210% pattern: 22 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:98 -coverage: 95.210% pattern: 22 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:94 -coverage: 95.210% pattern: 22 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 95.210% pattern: 22 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:85 -coverage: 95.210% pattern: 22 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:101 -coverage: 95.210% pattern: 22 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:101 -coverage: 95.210% pattern: 22 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 95.210% pattern: 22 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 95.210% pattern: 22 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:98 -coverage: 95.210% pattern: 22 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:114 -coverage: 95.210% pattern: 22 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:86 -coverage: 95.210% pattern: 22 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:84 -coverage: 95.210% pattern: 22 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:107 -coverage: 95.210% pattern: 22 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:108 -coverage: 95.210% pattern: 22 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:14. flip_cnt: 0, stem_cnt: 98, fault_cnt:126 -coverage: 95.808% pattern: 23 before: 16 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:103 -coverage: 95.808% pattern: 23 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 95.808% pattern: 23 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:86 -coverage: 95.808% pattern: 23 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:2. flip_cnt: 0, stem_cnt: 98, fault_cnt:122 -coverage: 96.407% pattern: 24 before: 14 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:108 -coverage: 96.407% pattern: 24 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:98 -coverage: 96.407% pattern: 24 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:107 -coverage: 96.407% pattern: 24 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:110 -coverage: 96.407% pattern: 24 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:88 -coverage: 96.407% pattern: 24 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:101 -coverage: 96.407% pattern: 24 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:108 -coverage: 96.407% pattern: 24 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:97 -coverage: 96.407% pattern: 24 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:110 -coverage: 96.407% pattern: 24 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:99 -coverage: 96.407% pattern: 24 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:97 -coverage: 96.407% pattern: 24 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:102 -coverage: 96.407% pattern: 24 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:103 -coverage: 96.407% pattern: 24 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:107 -coverage: 96.407% pattern: 24 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:84 -coverage: 96.407% pattern: 24 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:89 -coverage: 96.407% pattern: 24 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:98 -coverage: 96.407% pattern: 24 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:107 -coverage: 96.407% pattern: 24 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:101 -coverage: 96.407% pattern: 24 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 96.407% pattern: 24 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:86 -coverage: 96.407% pattern: 24 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:6. flip_cnt: 0, stem_cnt: 98, fault_cnt:102 -coverage: 96.707% pattern: 25 before: 12 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:101 -coverage: 96.707% pattern: 25 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:8. flip_cnt: 0, stem_cnt: 98, fault_cnt:119 -coverage: 97.006% pattern: 26 before: 11 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:100 -coverage: 97.006% pattern: 26 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:100 -coverage: 97.006% pattern: 26 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:103 -coverage: 97.006% pattern: 26 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:98 -coverage: 97.006% pattern: 26 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:102 -coverage: 97.006% pattern: 26 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 97.006% pattern: 26 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:6. flip_cnt: 0, stem_cnt: 98, fault_cnt:112 -coverage: 97.305% pattern: 27 before: 10 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:101 -coverage: 97.305% pattern: 27 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:100 -coverage: 97.305% pattern: 27 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:109 -coverage: 97.305% pattern: 27 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:102 -coverage: 97.305% pattern: 27 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:87 -coverage: 97.305% pattern: 27 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:110 -coverage: 97.305% pattern: 27 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:96 -coverage: 97.305% pattern: 27 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:107 -coverage: 97.305% pattern: 27 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:87 -coverage: 97.305% pattern: 27 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:86 -coverage: 97.305% pattern: 27 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 97.305% pattern: 27 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:113 -coverage: 97.305% pattern: 27 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:87 -coverage: 97.305% pattern: 27 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 97.305% pattern: 27 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:96 -coverage: 97.305% pattern: 27 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:102 -coverage: 97.305% pattern: 27 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:99 -coverage: 97.305% pattern: 27 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 97.305% pattern: 27 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:89 -coverage: 97.305% pattern: 27 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:94 -coverage: 97.305% pattern: 27 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:110 -coverage: 97.305% pattern: 27 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 97.305% pattern: 27 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:102 -coverage: 97.305% pattern: 27 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 97.305% pattern: 27 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:101 -coverage: 97.305% pattern: 27 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:4. flip_cnt: 0, stem_cnt: 98, fault_cnt:102 -coverage: 97.605% pattern: 28 before: 9 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:108 -coverage: 97.605% pattern: 28 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:94 -coverage: 97.605% pattern: 28 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:103 -coverage: 97.605% pattern: 28 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:95 -coverage: 97.605% pattern: 28 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:99 -coverage: 97.605% pattern: 28 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:86 -coverage: 97.605% pattern: 28 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:107 -coverage: 97.605% pattern: 28 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:98 -coverage: 97.605% pattern: 28 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:102 -coverage: 97.605% pattern: 28 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:99 -coverage: 97.605% pattern: 28 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 97.605% pattern: 28 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:99 -coverage: 97.605% pattern: 28 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:103 -coverage: 97.605% pattern: 28 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 97.605% pattern: 28 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:87 -coverage: 97.605% pattern: 28 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 97.605% pattern: 28 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:101 -coverage: 97.605% pattern: 28 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:86 -coverage: 97.605% pattern: 28 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:111 -coverage: 97.605% pattern: 28 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:108 -coverage: 97.605% pattern: 28 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 97.904% pattern: 29 before: 8 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 97.904% pattern: 29 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:94 -coverage: 97.904% pattern: 29 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:97 -coverage: 97.904% pattern: 29 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:88 -coverage: 97.904% pattern: 29 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:108 -coverage: 97.904% pattern: 29 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:113 -coverage: 97.904% pattern: 29 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:16. flip_cnt: 0, stem_cnt: 98, fault_cnt:109 -coverage: 98.204% pattern: 30 before: 7 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:103 -coverage: 98.204% pattern: 30 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 98.204% pattern: 30 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:110 -coverage: 98.204% pattern: 30 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:96 -coverage: 98.204% pattern: 30 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:107 -coverage: 98.204% pattern: 30 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:87 -coverage: 98.204% pattern: 30 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:97 -coverage: 98.204% pattern: 30 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:108 -coverage: 98.204% pattern: 30 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:102 -coverage: 98.204% pattern: 30 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:101 -coverage: 98.204% pattern: 30 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:7. flip_cnt: 0, stem_cnt: 98, fault_cnt:101 -coverage: 98.503% pattern: 31 before: 6 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:100 -coverage: 98.503% pattern: 31 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:85 -coverage: 98.503% pattern: 31 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:103 -coverage: 98.503% pattern: 31 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:102 -coverage: 98.503% pattern: 31 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:102 -coverage: 98.503% pattern: 31 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:101 -coverage: 98.503% pattern: 31 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:87 -coverage: 98.503% pattern: 31 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:87 -coverage: 98.503% pattern: 31 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:102 -coverage: 98.503% pattern: 31 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:98 -coverage: 98.503% pattern: 31 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:91 -coverage: 98.503% pattern: 31 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 98, fault_cnt:116 -coverage: 98.802% pattern: 32 before: 5 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:108 -coverage: 98.802% pattern: 32 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:87 -coverage: 98.802% pattern: 32 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:87 -coverage: 98.802% pattern: 32 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:86 -coverage: 98.802% pattern: 32 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:108 -coverage: 98.802% pattern: 32 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:103 -coverage: 98.802% pattern: 32 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:112 -coverage: 98.802% pattern: 32 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:98 -coverage: 98.802% pattern: 32 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:96 -coverage: 98.802% pattern: 32 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:96 -coverage: 98.802% pattern: 32 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 98.802% pattern: 32 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 98.802% pattern: 32 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:100 -coverage: 98.802% pattern: 32 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 98, fault_cnt:110 -coverage: 99.102% pattern: 33 before: 4 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:17. flip_cnt: 0, stem_cnt: 98, fault_cnt:111 -coverage: 99.401% pattern: 34 before: 3 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:87 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:88 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:118 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:98 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:103 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:107 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:88 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:116 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:91 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:103 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:98 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:108 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:93 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:103 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:107 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:90 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:85 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:99 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:102 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:100 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:86 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:103 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:84 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:92 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:107 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:109 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:87 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:103 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:101 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:93 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:103 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:102 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:113 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:111 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:85 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:108 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:103 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:90 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:95 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:100 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:86 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:107 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:100 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:108 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:101 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:110 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:97 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:108 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:88 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:97 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:90 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:98 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:109 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:107 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:111 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:88 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:89 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:88 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:88 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:103 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:107 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:84 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:100 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:90 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:102 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:93 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:88 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:91 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:107 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:108 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:102 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:97 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:102 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:109 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:116 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:89 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:88 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:95 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:103 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:107 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:108 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:103 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:97 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:91 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:108 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:101 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:99 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:98 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:100 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:103 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:97 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:101 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:98 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:99 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:87 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:96 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:86 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:107 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:102 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:103 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:113 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:91 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:98 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:85 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:86 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:107 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:109 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:98 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:96 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:98 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:99 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:87 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:91 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:103 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:85 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:103 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:110 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:109 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:86 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:99 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:87 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:101 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:86 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:87 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:110 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:108 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:98 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:97 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:90 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:103 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:87 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:108 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:89 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:93 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:107 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:108 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:99 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:89 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:101 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:101 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:103 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:95 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:112 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:110 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:94 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:86 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:113 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:109 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:121 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:86 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:102 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:98 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:89 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:96 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:101 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:102 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:86 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:110 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:110 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:103 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:109 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:87 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:102 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:85 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:90 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:103 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:103 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:98 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:109 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:113 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:112 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:110 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:85 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:100 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:97 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:100 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:108 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:86 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:96 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:109 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:111 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:107 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:84 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:107 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:107 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:95 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:86 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:99 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:110 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:101 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:87 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:107 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:96 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:82 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:107 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:90 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:88 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:112 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:108 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:112 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:99 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:96 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:111 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:101 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:90 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:89 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:102 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:101 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:96 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:102 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:93 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:91 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:91 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:108 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:93 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:95 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:97 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:98 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:83 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:89 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:87 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:94 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:107 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:108 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:101 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:85 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:89 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:108 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:89 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:87 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:87 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:112 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:85 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:97 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:102 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:83 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:110 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:112 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:117 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:114 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:103 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:107 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:98 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:107 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:86 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:100 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:100 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:108 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:108 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:86 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:116 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:88 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:98 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:98 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:111 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:87 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:88 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:88 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:100 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:107 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:99 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:127 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:85 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:102 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:110 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:113 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:101 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:94 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:124 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:111 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:96 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:89 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:111 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:88 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:96 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:98 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:86 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:99 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:86 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:110 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:90 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:112 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:110 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:103 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:87 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:125 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:109 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:90 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:113 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:109 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:95 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:112 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:96 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:110 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:89 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:87 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:108 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:115 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:103 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:103 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:108 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:88 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:110 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:96 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:108 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:101 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:88 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:102 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:101 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:111 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:107 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:103 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:99 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:107 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:111 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:94 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:108 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:103 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:95 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:111 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:98 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:88 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:102 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:102 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:92 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:96 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:86 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:108 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:110 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:86 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:86 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:100 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:101 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:101 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:107 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:113 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:87 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:86 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:98 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:87 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:103 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:87 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:96 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:103 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:102 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:88 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:92 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:85 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:97 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:87 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:90 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:108 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:97 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:109 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:98 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:96 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:84 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:96 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:89 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:92 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:102 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:88 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:108 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:103 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:98 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:88 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:99 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:97 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:132 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:107 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:97 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:86 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:88 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:95 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:107 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:115 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:107 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:87 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:100 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:88 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:85 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:84 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:107 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:88 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:87 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:102 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:97 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:98 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:89 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:102 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:98 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:85 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:103 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:86 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:111 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:100 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:85 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:98 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:86 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:101 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:99 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:88 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:85 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:98 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:85 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:87 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:96 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:97 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:108 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:101 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:85 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:101 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:103 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:100 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:113 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:97 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:111 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:99 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:95 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:88 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:91 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:87 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:96 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:88 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:95 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:107 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.401% pattern: 34 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:9. flip_cnt: 0, stem_cnt: 98, fault_cnt:112 -coverage: 99.701% pattern: 35 before: 2 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:107 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:102 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:101 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:108 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:100 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:95 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:110 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:90 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:110 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:111 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:86 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:115 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:89 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:87 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:83 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:108 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:100 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:88 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:112 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:111 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:84 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:109 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:108 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:87 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:102 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:113 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:103 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:100 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:90 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:89 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:87 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:98 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:113 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:103 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:99 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:101 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:110 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:96 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:87 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:85 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:112 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:109 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:111 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:101 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:85 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:98 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:109 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:88 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:97 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:109 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:85 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:111 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:88 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:96 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:116 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:99 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:122 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:102 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:88 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:107 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:102 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:113 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:86 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:112 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:103 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:119 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:90 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:87 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:102 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:100 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:114 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:110 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:110 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:99 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:110 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:108 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:88 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:95 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:86 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:108 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:108 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:99 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:101 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:108 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:113 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:88 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:102 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:111 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:86 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:112 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:107 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:116 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:107 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:87 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:109 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:109 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:101 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:108 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:88 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:88 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:111 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:113 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:98 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:97 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:107 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:85 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:98 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:90 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:87 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:100 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:87 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:113 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:87 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:87 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:96 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:108 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:102 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:109 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:91 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:108 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:115 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:103 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:85 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:107 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:102 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:96 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:101 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:102 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:98 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:102 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:87 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:116 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:87 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:96 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:108 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:102 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:103 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:96 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:109 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:108 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:102 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:103 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:93 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:103 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:111 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:87 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:88 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:101 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:111 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:96 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:88 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:110 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:103 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:99 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:94 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:114 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:118 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:111 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:88 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:88 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:101 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:108 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:102 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:99 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:90 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:107 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:87 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:99 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:86 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:100 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:93 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:85 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:102 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:86 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:98 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:108 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:95 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:98 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:84 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:108 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:109 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:97 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:108 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:115 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:103 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:110 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:103 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:89 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:99 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:94 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:88 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:101 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:111 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:86 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:102 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:87 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:112 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:85 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:110 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:109 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:100 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:97 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:109 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:100 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:112 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:126 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:100 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:97 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:100 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:98 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:88 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:111 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:110 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:109 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:109 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:111 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:88 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:115 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:98 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:108 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:102 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:86 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:89 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:103 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:89 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:103 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:95 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:96 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:103 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:110 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:113 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:86 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:116 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:88 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:107 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:100 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:103 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:94 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:101 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:95 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:90 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:89 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:96 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:116 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:107 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:108 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:109 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:103 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:124 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:88 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:88 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:114 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:97 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:100 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:101 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:86 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:111 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:89 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:90 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:100 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:98 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:97 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:99 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:91 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:102 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:87 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:89 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:97 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:107 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:95 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:87 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:96 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:92 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:107 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:100 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:102 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:84 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:102 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:101 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:102 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:97 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:88 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:109 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:83 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:89 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:99 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:99 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:114 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:107 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:107 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:114 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:98 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:100 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:114 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:89 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:83 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:97 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:112 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:115 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:84 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:88 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:100 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:93 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:85 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:88 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:85 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:98 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:112 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:87 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:88 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:108 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:100 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:111 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:101 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:98 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:92 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:92 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:107 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:100 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:89 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:88 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:110 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:101 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:100 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:84 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:85 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:110 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:86 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:116 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:108 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:103 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:84 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:97 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:108 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:110 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:89 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:98 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:102 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:87 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:99 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:98 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:97 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:94 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:100 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:103 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:107 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:89 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:87 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:104 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:90 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:110 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:102 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:102 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:105 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:94 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:108 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:108 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:100 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:111 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:107 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:116 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:91 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:101 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:93 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:106 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:98 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:100 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:85 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:111 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:85 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:103 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 98, fault_cnt:103 -coverage: 99.701% pattern: 35 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:7. flip_cnt: 0, stem_cnt: 98, fault_cnt:132 -coverage: 100.000% pattern: 36 before: 1 now: 0 -checking valid circuit ... result: 1. - -real 0m44.872s -user 0m44.860s -sys 0m0.004s diff --git a/exp_result/ATPG-LS_b09.bench.txt b/exp_result/ATPG-LS_b09.bench.txt deleted file mode 100644 index dcc2144..0000000 --- a/exp_result/ATPG-LS_b09.bench.txt +++ /dev/null @@ -1,692 +0,0 @@ -make: 'atpg' is up to date. -======================== -parsing file ./benchmark/b09.bench ... Done. -====== Circuit Statistics ====== -PI: 29 -PO: 29 -Gate: 142 -Stem: 79 -Level: 3 -================================ -[SOL] flip: 0, stem: 0, fault:606. flip_cnt: 0, stem_cnt: 79, fault_cnt:113 -coverage: 39.789% pattern: 1 before: 284 now: 171 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:402. flip_cnt: 0, stem_cnt: 79, fault_cnt:91 -coverage: 64.437% pattern: 2 before: 171 now: 101 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:142. flip_cnt: 0, stem_cnt: 79, fault_cnt:90 -coverage: 70.775% pattern: 3 before: 101 now: 83 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:150. flip_cnt: 0, stem_cnt: 79, fault_cnt:108 -coverage: 79.930% pattern: 4 before: 83 now: 57 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:43. flip_cnt: 0, stem_cnt: 79, fault_cnt:116 -coverage: 89.085% pattern: 5 before: 57 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:154. flip_cnt: 0, stem_cnt: 79, fault_cnt:109 -coverage: 93.310% pattern: 6 before: 31 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:17. flip_cnt: 0, stem_cnt: 79, fault_cnt:108 -coverage: 93.662% pattern: 7 before: 19 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:1. flip_cnt: 0, stem_cnt: 79, fault_cnt:111 -coverage: 94.014% pattern: 8 before: 18 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:2. flip_cnt: 0, stem_cnt: 79, fault_cnt:114 -coverage: 94.366% pattern: 9 before: 17 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:2. flip_cnt: 0, stem_cnt: 79, fault_cnt:104 -coverage: 94.718% pattern: 10 before: 16 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 79, fault_cnt:108 -coverage: 95.070% pattern: 11 before: 15 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:111 -coverage: 95.070% pattern: 11 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:110 -coverage: 95.070% pattern: 11 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:107 -coverage: 95.070% pattern: 11 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 79, fault_cnt:87 -coverage: 95.423% pattern: 12 before: 14 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:10. flip_cnt: 0, stem_cnt: 79, fault_cnt:83 -coverage: 97.535% pattern: 13 before: 13 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:113 -coverage: 97.535% pattern: 13 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:111 -coverage: 97.535% pattern: 13 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:119 -coverage: 97.535% pattern: 13 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:106 -coverage: 97.535% pattern: 13 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 79, fault_cnt:95 -coverage: 97.887% pattern: 14 before: 7 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:81 -coverage: 97.887% pattern: 14 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:111 -coverage: 97.887% pattern: 14 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:111 -coverage: 97.887% pattern: 14 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:93 -coverage: 97.887% pattern: 14 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:115 -coverage: 97.887% pattern: 14 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:4. flip_cnt: 0, stem_cnt: 79, fault_cnt:105 -coverage: 98.239% pattern: 15 before: 6 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:105 -coverage: 98.239% pattern: 15 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:111 -coverage: 98.239% pattern: 15 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:114 -coverage: 98.239% pattern: 15 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:16. flip_cnt: 0, stem_cnt: 79, fault_cnt:91 -coverage: 98.592% pattern: 16 before: 5 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:110 -coverage: 98.592% pattern: 16 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:111 -coverage: 98.592% pattern: 16 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:93 -coverage: 98.592% pattern: 16 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:85 -coverage: 98.592% pattern: 16 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:117 -coverage: 98.592% pattern: 16 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:119 -coverage: 98.592% pattern: 16 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:84 -coverage: 98.592% pattern: 16 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:104 -coverage: 98.592% pattern: 16 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:109 -coverage: 98.592% pattern: 16 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:113 -coverage: 98.592% pattern: 16 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:111 -coverage: 98.592% pattern: 16 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:90 -coverage: 98.592% pattern: 16 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:116 -coverage: 98.592% pattern: 16 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:116 -coverage: 98.592% pattern: 16 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:117 -coverage: 98.592% pattern: 16 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:112 -coverage: 98.592% pattern: 16 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:86 -coverage: 98.592% pattern: 16 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:113 -coverage: 98.592% pattern: 16 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:110 -coverage: 98.592% pattern: 16 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:76 -coverage: 98.592% pattern: 16 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:115 -coverage: 98.592% pattern: 16 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:119 -coverage: 98.592% pattern: 16 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:18. flip_cnt: 0, stem_cnt: 79, fault_cnt:89 -coverage: 98.944% pattern: 17 before: 4 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 79, fault_cnt:95 -coverage: 99.296% pattern: 18 before: 3 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:82 -coverage: 99.296% pattern: 18 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:110 -coverage: 99.296% pattern: 18 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:104 -coverage: 99.296% pattern: 18 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:117 -coverage: 99.296% pattern: 18 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:86 -coverage: 99.296% pattern: 18 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:90 -coverage: 99.296% pattern: 18 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:109 -coverage: 99.296% pattern: 18 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:102 -coverage: 99.296% pattern: 18 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:116 -coverage: 99.296% pattern: 18 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:86 -coverage: 99.296% pattern: 18 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:106 -coverage: 99.296% pattern: 18 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:84 -coverage: 99.296% pattern: 18 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:113 -coverage: 99.296% pattern: 18 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:109 -coverage: 99.296% pattern: 18 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:81 -coverage: 99.296% pattern: 18 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:110 -coverage: 99.296% pattern: 18 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:114 -coverage: 99.296% pattern: 18 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:107 -coverage: 99.296% pattern: 18 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:76 -coverage: 99.296% pattern: 18 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:116 -coverage: 99.296% pattern: 18 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:90 -coverage: 99.296% pattern: 18 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:105 -coverage: 99.296% pattern: 18 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:112 -coverage: 99.296% pattern: 18 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:112 -coverage: 99.296% pattern: 18 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:84 -coverage: 99.296% pattern: 18 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:106 -coverage: 99.296% pattern: 18 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:107 -coverage: 99.296% pattern: 18 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:109 -coverage: 99.296% pattern: 18 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:89 -coverage: 99.296% pattern: 18 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:102 -coverage: 99.296% pattern: 18 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:118 -coverage: 99.296% pattern: 18 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:111 -coverage: 99.296% pattern: 18 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:82 -coverage: 99.296% pattern: 18 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:12. flip_cnt: 0, stem_cnt: 79, fault_cnt:97 -coverage: 99.648% pattern: 19 before: 2 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:86 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:79 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:103 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:86 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:114 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:106 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:110 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:112 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:115 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:112 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:113 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:115 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:115 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:82 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:110 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:117 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:118 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:108 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:111 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:110 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:110 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:94 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:76 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:109 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:105 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:106 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:85 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:102 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:116 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:106 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:82 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:108 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:115 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:87 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:105 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:109 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:112 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:107 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:116 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:113 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:84 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:112 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:106 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:110 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:112 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:103 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:102 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:103 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:111 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:78 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:113 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:116 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:93 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:89 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:114 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:107 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:111 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:115 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:117 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:86 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:112 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:116 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:118 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:113 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:103 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:112 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:115 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:81 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:110 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:103 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:84 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:85 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:86 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:90 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:81 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:114 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:107 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:114 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:114 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:108 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:114 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:111 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:110 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:115 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:110 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:103 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:112 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:105 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:113 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:108 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:87 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:90 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:111 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:114 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:87 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:110 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:93 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:79 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:110 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:116 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:86 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:90 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:104 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:90 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:108 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:109 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:118 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:86 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:117 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:80 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:80 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:79 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:111 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:108 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:116 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:89 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:109 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:108 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:86 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:104 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:115 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:112 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:89 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:93 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:110 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:113 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:115 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:85 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:114 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:115 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:118 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:115 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:86 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:112 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:83 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 79, fault_cnt:85 -coverage: 99.648% pattern: 19 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:8. flip_cnt: 0, stem_cnt: 79, fault_cnt:94 -coverage: 100.000% pattern: 20 before: 1 now: 0 -checking valid circuit ... result: 1. - -real 0m6.723s -user 0m6.720s -sys 0m0.000s diff --git a/exp_result/ATPG-LS_b10.bench.txt b/exp_result/ATPG-LS_b10.bench.txt deleted file mode 100644 index 1300a80..0000000 --- a/exp_result/ATPG-LS_b10.bench.txt +++ /dev/null @@ -1,941 +0,0 @@ -make: 'atpg' is up to date. -======================== -parsing file ./benchmark/b10.bench ... Done. -====== Circuit Statistics ====== -PI: 28 -PO: 23 -Gate: 182 -Stem: 91 -Level: 3 -================================ -[SOL] flip: 0, stem: 0, fault:1035. flip_cnt: 0, stem_cnt: 91, fault_cnt:112 -coverage: 30.769% pattern: 1 before: 364 now: 252 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:665. flip_cnt: 0, stem_cnt: 91, fault_cnt:98 -coverage: 45.879% pattern: 2 before: 252 now: 197 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:387. flip_cnt: 0, stem_cnt: 91, fault_cnt:104 -coverage: 56.044% pattern: 3 before: 197 now: 160 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:253. flip_cnt: 0, stem_cnt: 91, fault_cnt:104 -coverage: 60.440% pattern: 4 before: 160 now: 144 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:70. flip_cnt: 0, stem_cnt: 91, fault_cnt:97 -coverage: 62.637% pattern: 5 before: 144 now: 136 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:203. flip_cnt: 0, stem_cnt: 91, fault_cnt:96 -coverage: 70.055% pattern: 6 before: 136 now: 109 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 91, fault_cnt:103 -coverage: 70.879% pattern: 7 before: 109 now: 106 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:256. flip_cnt: 0, stem_cnt: 91, fault_cnt:120 -coverage: 76.923% pattern: 8 before: 106 now: 84 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 91, fault_cnt:104 -coverage: 78.022% pattern: 9 before: 84 now: 80 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:23. flip_cnt: 0, stem_cnt: 91, fault_cnt:104 -coverage: 78.571% pattern: 10 before: 80 now: 78 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:115. flip_cnt: 0, stem_cnt: 91, fault_cnt:103 -coverage: 80.495% pattern: 11 before: 78 now: 71 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:147. flip_cnt: 0, stem_cnt: 91, fault_cnt:113 -coverage: 85.165% pattern: 12 before: 71 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 91, fault_cnt:100 -coverage: 85.989% pattern: 13 before: 54 now: 51 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:54. flip_cnt: 0, stem_cnt: 91, fault_cnt:105 -coverage: 90.659% pattern: 14 before: 51 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:101 -coverage: 90.659% pattern: 14 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:11. flip_cnt: 0, stem_cnt: 91, fault_cnt:98 -coverage: 91.209% pattern: 15 before: 34 now: 32 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:111 -coverage: 91.209% pattern: 15 before: 32 now: 32 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 91, fault_cnt:112 -coverage: 92.308% pattern: 16 before: 32 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:98 -coverage: 92.308% pattern: 16 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 91, fault_cnt:110 -coverage: 92.857% pattern: 17 before: 28 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:106 -coverage: 92.857% pattern: 17 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:106 -coverage: 92.857% pattern: 17 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:16. flip_cnt: 0, stem_cnt: 91, fault_cnt:104 -coverage: 93.132% pattern: 18 before: 26 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:110 -coverage: 93.132% pattern: 18 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:111 -coverage: 93.132% pattern: 18 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:31. flip_cnt: 0, stem_cnt: 91, fault_cnt:110 -coverage: 93.956% pattern: 19 before: 25 now: 22 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:1. flip_cnt: 0, stem_cnt: 91, fault_cnt:99 -coverage: 94.231% pattern: 20 before: 22 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:90 -coverage: 94.231% pattern: 20 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:32. flip_cnt: 0, stem_cnt: 91, fault_cnt:106 -coverage: 94.780% pattern: 21 before: 21 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:101 -coverage: 94.780% pattern: 21 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:98 -coverage: 94.780% pattern: 21 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:41. flip_cnt: 0, stem_cnt: 91, fault_cnt:98 -coverage: 95.604% pattern: 22 before: 19 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:6. flip_cnt: 0, stem_cnt: 91, fault_cnt:112 -coverage: 95.879% pattern: 23 before: 16 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:29. flip_cnt: 0, stem_cnt: 91, fault_cnt:115 -coverage: 96.429% pattern: 24 before: 15 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:103 -coverage: 96.429% pattern: 24 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:105 -coverage: 96.429% pattern: 24 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:118 -coverage: 96.429% pattern: 24 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:107 -coverage: 96.429% pattern: 24 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:16. flip_cnt: 0, stem_cnt: 91, fault_cnt:115 -coverage: 97.527% pattern: 25 before: 13 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:5. flip_cnt: 0, stem_cnt: 91, fault_cnt:111 -coverage: 97.802% pattern: 26 before: 9 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:100 -coverage: 97.802% pattern: 26 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:106 -coverage: 97.802% pattern: 26 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:107 -coverage: 97.802% pattern: 26 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:105 -coverage: 97.802% pattern: 26 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:96 -coverage: 97.802% pattern: 26 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:101 -coverage: 97.802% pattern: 26 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:101 -coverage: 97.802% pattern: 26 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:111 -coverage: 97.802% pattern: 26 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:100 -coverage: 97.802% pattern: 26 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:103 -coverage: 97.802% pattern: 26 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:104 -coverage: 97.802% pattern: 26 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:111 -coverage: 97.802% pattern: 26 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:110 -coverage: 97.802% pattern: 26 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:99 -coverage: 97.802% pattern: 26 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:3. flip_cnt: 0, stem_cnt: 91, fault_cnt:108 -coverage: 98.077% pattern: 27 before: 8 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:16. flip_cnt: 0, stem_cnt: 91, fault_cnt:111 -coverage: 98.626% pattern: 28 before: 7 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:35. flip_cnt: 0, stem_cnt: 91, fault_cnt:106 -coverage: 99.451% pattern: 29 before: 5 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:110 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:106 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:97 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:115 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:112 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:97 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:119 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:101 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:95 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:106 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:107 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:105 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:104 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:100 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:101 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:116 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:114 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:100 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:117 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:101 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:103 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:113 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:104 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:97 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:110 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:94 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:101 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:101 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:106 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:97 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:99 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:103 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:99 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:107 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:103 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:106 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:100 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:96 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:100 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:109 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:91 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:111 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:96 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:101 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:103 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:108 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:102 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:104 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:100 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:102 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:118 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:99 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:98 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:111 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:106 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:94 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:104 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:102 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:102 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:98 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:97 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:117 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:96 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:109 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:108 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:101 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:105 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:95 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:101 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:111 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:112 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:99 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:97 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:104 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:100 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:98 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:107 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:101 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:98 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:98 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:98 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:97 -coverage: 99.451% pattern: 29 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 91, fault_cnt:114 -coverage: 99.725% pattern: 30 before: 2 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:107 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:99 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:109 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:109 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:113 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:101 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:116 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:111 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:102 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:107 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:109 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:103 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:114 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:104 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:101 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:98 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:102 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:99 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:100 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:103 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:101 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:106 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:98 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:102 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:107 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:98 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:106 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:104 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:111 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:103 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:97 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:96 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:102 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:107 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:95 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:109 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:93 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:106 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:108 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:106 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:100 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:113 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:106 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:108 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:100 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:116 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:103 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:102 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:99 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:104 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:106 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:106 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:109 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:95 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:116 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:104 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:94 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:101 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:109 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:98 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:113 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:107 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:98 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:102 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:99 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:116 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:95 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:105 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:104 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:109 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:103 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:108 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:103 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:100 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:102 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:114 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:101 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:104 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:105 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:103 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:107 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:102 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:108 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:97 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:104 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:106 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:110 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:102 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:103 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:113 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:94 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:104 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:98 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:99 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:98 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:99 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:101 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:98 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:108 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:98 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:100 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:104 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:110 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:112 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:96 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:100 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:99 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:106 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:104 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:116 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:105 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:108 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:109 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:97 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:105 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:103 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:108 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:104 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:101 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:107 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:109 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:110 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:99 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:114 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:108 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:98 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:101 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:99 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:84 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:105 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:92 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:113 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:105 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:103 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:113 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:94 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:120 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:117 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:100 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:115 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:101 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:103 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:114 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:106 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:111 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:101 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:105 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:104 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:116 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:99 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:102 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:100 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:103 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:95 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:103 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:99 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:102 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:102 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:108 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:103 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:109 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:105 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:95 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:95 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:102 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:101 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:100 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 91, fault_cnt:104 -coverage: 99.725% pattern: 30 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 91, fault_cnt:118 -coverage: 100.000% pattern: 31 before: 1 now: 0 -checking valid circuit ... result: 1. - -real 0m13.802s -user 0m13.797s -sys 0m0.000s diff --git a/exp_result/ATPG-LS_b11.bench.txt b/exp_result/ATPG-LS_b11.bench.txt deleted file mode 100644 index 9a2b8b3..0000000 --- a/exp_result/ATPG-LS_b11.bench.txt +++ /dev/null @@ -1,24271 +0,0 @@ -make: 'atpg' is up to date. -======================== -parsing file ./benchmark/b11.bench ... Done. -====== Circuit Statistics ====== -PI: 38 -PO: 37 -Gate: 429 -Stem: 214 -Level: 5 -================================ -[SOL] flip: 0, stem: 0, fault:2276. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 20.396% pattern: 1 before: 858 now: 683 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:3660. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 43.240% pattern: 2 before: 683 now: 487 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:1080. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 51.049% pattern: 3 before: 487 now: 420 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:706. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 56.410% pattern: 4 before: 420 now: 374 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:118. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 57.576% pattern: 5 before: 374 now: 364 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:479. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 60.606% pattern: 6 before: 364 now: 338 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:473. flip_cnt: 0, stem_cnt: 214, fault_cnt:201 -coverage: 63.520% pattern: 7 before: 338 now: 313 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:873. flip_cnt: 0, stem_cnt: 214, fault_cnt:268 -coverage: 69.114% pattern: 8 before: 313 now: 265 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:399. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 71.562% pattern: 9 before: 265 now: 244 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:114. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 72.261% pattern: 10 before: 244 now: 238 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 72.611% pattern: 11 before: 238 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 72.727% pattern: 12 before: 235 now: 234 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 214, fault_cnt:193 -coverage: 73.077% pattern: 13 before: 234 now: 231 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:152 -coverage: 73.077% pattern: 13 before: 231 now: 231 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 73.077% pattern: 13 before: 231 now: 231 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:813. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 79.604% pattern: 14 before: 231 now: 175 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 79.720% pattern: 15 before: 175 now: 174 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:273. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 81.702% pattern: 16 before: 174 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 81.702% pattern: 16 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 81.818% pattern: 17 before: 157 now: 156 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 81.818% pattern: 17 before: 156 now: 156 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:323. flip_cnt: 0, stem_cnt: 214, fault_cnt:222 -coverage: 83.800% pattern: 18 before: 156 now: 139 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:513. flip_cnt: 0, stem_cnt: 214, fault_cnt:196 -coverage: 86.946% pattern: 19 before: 139 now: 112 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 214, fault_cnt:301 -coverage: 87.179% pattern: 20 before: 112 now: 110 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 87.179% pattern: 20 before: 110 now: 110 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:92. flip_cnt: 0, stem_cnt: 214, fault_cnt:283 -coverage: 87.762% pattern: 21 before: 110 now: 105 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 87.762% pattern: 21 before: 105 now: 105 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 87.762% pattern: 21 before: 105 now: 105 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 87.762% pattern: 21 before: 105 now: 105 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:209. flip_cnt: 0, stem_cnt: 214, fault_cnt:277 -coverage: 89.044% pattern: 22 before: 105 now: 94 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 89.161% pattern: 23 before: 94 now: 93 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 89.394% pattern: 24 before: 93 now: 91 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 89.394% pattern: 24 before: 91 now: 91 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 89.394% pattern: 24 before: 91 now: 91 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 89.394% pattern: 24 before: 91 now: 91 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 89.860% pattern: 25 before: 91 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 214, fault_cnt:151 -coverage: 89.977% pattern: 26 before: 87 now: 86 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 89.977% pattern: 26 before: 86 now: 86 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 90.559% pattern: 27 before: 86 now: 81 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 214, fault_cnt:284 -coverage: 90.676% pattern: 28 before: 81 now: 80 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:299 -coverage: 90.676% pattern: 28 before: 80 now: 80 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:283 -coverage: 90.676% pattern: 28 before: 80 now: 80 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 90.676% pattern: 28 before: 80 now: 80 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 214, fault_cnt:276 -coverage: 90.909% pattern: 29 before: 80 now: 78 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:277 -coverage: 90.909% pattern: 29 before: 78 now: 78 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 214, fault_cnt:212 -coverage: 91.026% pattern: 30 before: 78 now: 77 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 91.026% pattern: 30 before: 77 now: 77 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 91.259% pattern: 31 before: 77 now: 75 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 91.608% pattern: 32 before: 75 now: 72 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 91.608% pattern: 32 before: 72 now: 72 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 91.608% pattern: 32 before: 72 now: 72 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 214, fault_cnt:205 -coverage: 92.075% pattern: 33 before: 72 now: 68 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 92.075% pattern: 33 before: 68 now: 68 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 92.075% pattern: 33 before: 68 now: 68 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:278 -coverage: 92.075% pattern: 33 before: 68 now: 68 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 92.075% pattern: 33 before: 68 now: 68 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 92.075% pattern: 33 before: 68 now: 68 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 92.075% pattern: 33 before: 68 now: 68 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 92.075% pattern: 33 before: 68 now: 68 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 92.191% pattern: 34 before: 68 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:18. flip_cnt: 0, stem_cnt: 214, fault_cnt:281 -coverage: 92.308% pattern: 35 before: 67 now: 66 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 92.308% pattern: 35 before: 66 now: 66 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:270 -coverage: 92.308% pattern: 35 before: 66 now: 66 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:278 -coverage: 92.308% pattern: 35 before: 66 now: 66 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 92.308% pattern: 35 before: 66 now: 66 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:283 -coverage: 92.308% pattern: 35 before: 66 now: 66 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 92.308% pattern: 35 before: 66 now: 66 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 92.308% pattern: 35 before: 66 now: 66 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 92.308% pattern: 35 before: 66 now: 66 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 92.308% pattern: 35 before: 66 now: 66 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:303 -coverage: 92.308% pattern: 35 before: 66 now: 66 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 92.308% pattern: 35 before: 66 now: 66 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 92.308% pattern: 35 before: 66 now: 66 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 92.308% pattern: 35 before: 66 now: 66 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 92.308% pattern: 35 before: 66 now: 66 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 92.308% pattern: 35 before: 66 now: 66 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 214, fault_cnt:192 -coverage: 92.424% pattern: 36 before: 66 now: 65 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 92.424% pattern: 36 before: 65 now: 65 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:277 -coverage: 92.424% pattern: 36 before: 65 now: 65 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 92.424% pattern: 36 before: 65 now: 65 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 92.424% pattern: 36 before: 65 now: 65 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 92.657% pattern: 37 before: 65 now: 63 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 92.774% pattern: 38 before: 63 now: 62 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 92.774% pattern: 38 before: 62 now: 62 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:193 -coverage: 92.774% pattern: 38 before: 62 now: 62 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 92.774% pattern: 38 before: 62 now: 62 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:192 -coverage: 92.774% pattern: 38 before: 62 now: 62 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 92.890% pattern: 39 before: 62 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 92.890% pattern: 39 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 92.890% pattern: 39 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:158 -coverage: 92.890% pattern: 39 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 92.890% pattern: 39 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 92.890% pattern: 39 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 92.890% pattern: 39 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 92.890% pattern: 39 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 93.007% pattern: 40 before: 61 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 93.007% pattern: 40 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 93.007% pattern: 40 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 93.007% pattern: 40 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 93.007% pattern: 40 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 93.007% pattern: 40 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 93.007% pattern: 40 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 93.007% pattern: 40 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 93.007% pattern: 40 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 93.124% pattern: 41 before: 60 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 93.124% pattern: 41 before: 59 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 93.124% pattern: 41 before: 59 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 93.124% pattern: 41 before: 59 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 93.124% pattern: 41 before: 59 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 93.124% pattern: 41 before: 59 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:152 -coverage: 93.124% pattern: 41 before: 59 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 93.124% pattern: 41 before: 59 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 93.124% pattern: 41 before: 59 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 93.124% pattern: 41 before: 59 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 93.124% pattern: 41 before: 59 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 93.124% pattern: 41 before: 59 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 93.124% pattern: 41 before: 59 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 93.240% pattern: 42 before: 59 now: 58 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:277 -coverage: 93.240% pattern: 42 before: 58 now: 58 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 93.240% pattern: 42 before: 58 now: 58 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:303 -coverage: 93.240% pattern: 42 before: 58 now: 58 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 93.240% pattern: 42 before: 58 now: 58 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 93.240% pattern: 42 before: 58 now: 58 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 93.240% pattern: 42 before: 58 now: 58 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 93.240% pattern: 42 before: 58 now: 58 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 93.240% pattern: 42 before: 58 now: 58 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 93.240% pattern: 42 before: 58 now: 58 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 93.240% pattern: 42 before: 58 now: 58 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 93.240% pattern: 42 before: 58 now: 58 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 93.240% pattern: 42 before: 58 now: 58 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:150 -coverage: 93.240% pattern: 42 before: 58 now: 58 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:66. flip_cnt: 0, stem_cnt: 214, fault_cnt:251 -coverage: 93.706% pattern: 43 before: 58 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:193 -coverage: 93.706% pattern: 43 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:146 -coverage: 93.706% pattern: 43 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 93.706% pattern: 43 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 93.706% pattern: 43 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:192 -coverage: 93.706% pattern: 43 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 93.706% pattern: 43 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 93.823% pattern: 44 before: 54 now: 53 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:156 -coverage: 93.823% pattern: 44 before: 53 now: 53 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 93.823% pattern: 44 before: 53 now: 53 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 93.823% pattern: 44 before: 53 now: 53 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 93.823% pattern: 44 before: 53 now: 53 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 93.823% pattern: 44 before: 53 now: 53 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 93.823% pattern: 44 before: 53 now: 53 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 93.823% pattern: 44 before: 53 now: 53 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 93.823% pattern: 44 before: 53 now: 53 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:280 -coverage: 93.823% pattern: 44 before: 53 now: 53 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:133. flip_cnt: 0, stem_cnt: 214, fault_cnt:223 -coverage: 94.639% pattern: 45 before: 53 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 94.639% pattern: 45 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 94.639% pattern: 45 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 94.639% pattern: 45 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 94.639% pattern: 45 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 94.639% pattern: 45 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:155 -coverage: 94.639% pattern: 45 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 94.639% pattern: 45 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 94.639% pattern: 45 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 94.639% pattern: 45 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 94.639% pattern: 45 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 94.639% pattern: 45 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 94.639% pattern: 45 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 94.639% pattern: 45 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 94.639% pattern: 45 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:303 -coverage: 94.639% pattern: 45 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 94.639% pattern: 45 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 94.639% pattern: 45 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 94.988% pattern: 46 before: 46 now: 43 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 94.988% pattern: 46 before: 43 now: 43 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 94.988% pattern: 46 before: 43 now: 43 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 94.988% pattern: 46 before: 43 now: 43 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:149 -coverage: 94.988% pattern: 46 before: 43 now: 43 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 94.988% pattern: 46 before: 43 now: 43 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 94.988% pattern: 46 before: 43 now: 43 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 94.988% pattern: 46 before: 43 now: 43 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 94.988% pattern: 46 before: 43 now: 43 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 94.988% pattern: 46 before: 43 now: 43 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 94.988% pattern: 46 before: 43 now: 43 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 94.988% pattern: 46 before: 43 now: 43 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 94.988% pattern: 46 before: 43 now: 43 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 94.988% pattern: 46 before: 43 now: 43 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:284 -coverage: 94.988% pattern: 46 before: 43 now: 43 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 95.221% pattern: 47 before: 43 now: 41 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 95.221% pattern: 47 before: 41 now: 41 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 95.221% pattern: 47 before: 41 now: 41 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 95.221% pattern: 47 before: 41 now: 41 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 95.221% pattern: 47 before: 41 now: 41 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 95.221% pattern: 47 before: 41 now: 41 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 214, fault_cnt:204 -coverage: 95.338% pattern: 48 before: 41 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 95.338% pattern: 48 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 95.338% pattern: 48 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 95.338% pattern: 48 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 95.338% pattern: 48 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 95.338% pattern: 48 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 95.338% pattern: 48 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:154 -coverage: 95.338% pattern: 48 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:278 -coverage: 95.338% pattern: 48 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 95.338% pattern: 48 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 95.338% pattern: 48 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 95.338% pattern: 48 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 95.338% pattern: 48 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 95.338% pattern: 48 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 95.338% pattern: 48 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 95.338% pattern: 48 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 95.338% pattern: 48 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 95.338% pattern: 48 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 95.338% pattern: 48 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:304 -coverage: 95.338% pattern: 48 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 95.338% pattern: 48 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:300 -coverage: 95.338% pattern: 48 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:192 -coverage: 95.338% pattern: 48 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 95.338% pattern: 48 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 95.338% pattern: 48 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 95.338% pattern: 48 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 95.338% pattern: 48 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 95.338% pattern: 48 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 95.338% pattern: 48 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 95.338% pattern: 48 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 95.338% pattern: 48 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 95.338% pattern: 48 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 95.338% pattern: 48 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 214, fault_cnt:201 -coverage: 95.688% pattern: 49 before: 40 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 95.688% pattern: 49 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:204 -coverage: 95.688% pattern: 49 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 95.688% pattern: 49 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 95.688% pattern: 49 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 95.688% pattern: 49 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 95.688% pattern: 49 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 95.688% pattern: 49 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 95.688% pattern: 49 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:148 -coverage: 95.688% pattern: 49 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 95.688% pattern: 49 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 95.688% pattern: 49 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 95.688% pattern: 49 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:273 -coverage: 95.688% pattern: 49 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 95.688% pattern: 49 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 95.688% pattern: 49 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 95.688% pattern: 49 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:271 -coverage: 95.688% pattern: 49 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 95.688% pattern: 49 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 95.688% pattern: 49 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 95.688% pattern: 49 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 95.688% pattern: 49 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 95.688% pattern: 49 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 95.688% pattern: 49 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 95.688% pattern: 49 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 95.688% pattern: 49 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:275 -coverage: 95.688% pattern: 49 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 95.688% pattern: 49 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 95.688% pattern: 49 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 95.688% pattern: 49 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:273 -coverage: 95.688% pattern: 49 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 95.688% pattern: 49 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 95.688% pattern: 49 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 95.688% pattern: 49 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 95.688% pattern: 49 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 95.688% pattern: 49 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 95.688% pattern: 49 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 95.688% pattern: 49 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:203 -coverage: 95.688% pattern: 49 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 95.688% pattern: 49 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 95.688% pattern: 49 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 95.688% pattern: 49 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:299 -coverage: 95.688% pattern: 49 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 95.688% pattern: 49 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:158 -coverage: 95.688% pattern: 49 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 95.688% pattern: 49 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:258 -coverage: 95.688% pattern: 49 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:196 -coverage: 95.688% pattern: 49 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 95.688% pattern: 49 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 95.688% pattern: 49 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 95.921% pattern: 50 before: 37 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 95.921% pattern: 50 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 95.921% pattern: 50 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 95.921% pattern: 50 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 95.921% pattern: 50 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:307 -coverage: 95.921% pattern: 50 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 95.921% pattern: 50 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 95.921% pattern: 50 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:197 -coverage: 95.921% pattern: 50 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 95.921% pattern: 50 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 95.921% pattern: 50 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:158 -coverage: 95.921% pattern: 50 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 95.921% pattern: 50 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 95.921% pattern: 50 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:280 -coverage: 95.921% pattern: 50 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 95.921% pattern: 50 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 95.921% pattern: 50 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 95.921% pattern: 50 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:300 -coverage: 95.921% pattern: 50 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 95.921% pattern: 50 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 95.921% pattern: 50 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 95.921% pattern: 50 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 95.921% pattern: 50 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 95.921% pattern: 50 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 95.921% pattern: 50 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 95.921% pattern: 50 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 95.921% pattern: 50 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 95.921% pattern: 50 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:284 -coverage: 95.921% pattern: 50 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 95.921% pattern: 50 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 95.921% pattern: 50 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 95.921% pattern: 50 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:301 -coverage: 95.921% pattern: 50 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 95.921% pattern: 50 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 95.921% pattern: 50 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 95.921% pattern: 50 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:150 -coverage: 95.921% pattern: 50 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 95.921% pattern: 50 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 95.921% pattern: 50 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:198 -coverage: 95.921% pattern: 50 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:283 -coverage: 95.921% pattern: 50 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 95.921% pattern: 50 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 95.921% pattern: 50 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 95.921% pattern: 50 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 95.921% pattern: 50 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:151 -coverage: 95.921% pattern: 50 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 95.921% pattern: 50 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 95.921% pattern: 50 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 95.921% pattern: 50 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:301 -coverage: 95.921% pattern: 50 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 95.921% pattern: 50 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 95.921% pattern: 50 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 95.921% pattern: 50 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 95.921% pattern: 50 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:275 -coverage: 95.921% pattern: 50 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 95.921% pattern: 50 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 95.921% pattern: 50 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 95.921% pattern: 50 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:156 -coverage: 95.921% pattern: 50 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 95.921% pattern: 50 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 95.921% pattern: 50 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 96.037% pattern: 51 before: 35 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:196 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:277 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:158 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:203 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:304 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:158 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:299 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:264 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:304 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:215 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:303 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:305 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:283 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:283 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:145 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:203 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:200 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:149 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:274 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:193 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:273 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:284 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:195 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:283 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:284 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:276 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:299 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:284 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:300 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 96.037% pattern: 51 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 96.154% pattern: 52 before: 34 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:276 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:197 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:198 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:302 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:195 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:301 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:193 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:308 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:149 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:299 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:158 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:148 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:277 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:152 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:279 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:309 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:305 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:306 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:281 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:276 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:257 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:284 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:194 -coverage: 96.154% pattern: 52 before: 33 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 96.503% pattern: 53 before: 33 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:279 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:154 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:299 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:278 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:268 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:300 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:158 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:306 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:281 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:194 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:304 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:192 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:263 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:231 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:300 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:283 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:302 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:151 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:192 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:303 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:283 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:156 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:203 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 96.503% pattern: 53 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 214, fault_cnt:328 -coverage: 96.970% pattern: 54 before: 30 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:195 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:267 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:300 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:156 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:278 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:196 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:204 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:284 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:270 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:196 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:147 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:158 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:275 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:145 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:277 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:281 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:274 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:149 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:276 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:152 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:213 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:269 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:195 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:277 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:202 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:283 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:150 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:265 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:199 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:270 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:158 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:281 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:265 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:258 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:280 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:206 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:284 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:211 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:303 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:158 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:301 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:195 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:201 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:217 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:283 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:158 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:151 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:153 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:225 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:155 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:201 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:308 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:195 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:200 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:277 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:192 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:206 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:202 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:283 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:284 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:278 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:220 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:200 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:196 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:301 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:194 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:151 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:281 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:269 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:272 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:152 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:307 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:301 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:301 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:158 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:280 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:273 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:197 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:205 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:153 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:301 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:301 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:277 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:273 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:200 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:158 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:273 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:224 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:304 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:158 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:306 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:223 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:284 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:278 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:266 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:314 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:272 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:283 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:278 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:301 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:267 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:152 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:196 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:208 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:154 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:284 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:204 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:305 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:270 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:299 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:300 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:192 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:205 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:302 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:198 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:284 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:302 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:212 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:197 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:154 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:277 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:158 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:306 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:156 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:281 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:254 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:309 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:192 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:284 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:192 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:261 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:199 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:273 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:276 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:300 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:283 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:212 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:279 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:210 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:276 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:154 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:308 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:302 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:155 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:216 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:156 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:284 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:270 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:193 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:150 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:271 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:192 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:279 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:306 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:310 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:266 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:302 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:153 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:204 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:274 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:307 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:194 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:300 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:197 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:218 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:283 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:198 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:209 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:207 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:205 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:156 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:301 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:203 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:276 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:193 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:277 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:306 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:281 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:279 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:300 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:208 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:271 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:300 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:280 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:199 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:274 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:196 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:302 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:276 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:303 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:202 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:151 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:156 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:307 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:277 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:272 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:270 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:301 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:276 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:154 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:305 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:153 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:154 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:151 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:202 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:154 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:277 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:195 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:192 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:300 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:283 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:209 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:202 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:205 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:284 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:202 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:269 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:201 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:273 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:268 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:300 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:277 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:199 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:303 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:192 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:280 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:198 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:299 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:300 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:197 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:310 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:283 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:158 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:196 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:275 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:279 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:276 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:154 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:276 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:276 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:299 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:274 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:276 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:276 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:194 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:280 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:153 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:193 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:299 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:192 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 96.970% pattern: 54 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 214, fault_cnt:212 -coverage: 97.086% pattern: 55 before: 26 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:269 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:316 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:272 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:144 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:274 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:196 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:281 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:210 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:280 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:283 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:204 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:199 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:311 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:275 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:156 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:197 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:207 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:271 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:279 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:149 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:276 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:263 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:153 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:199 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:199 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:151 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:311 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:196 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:149 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:154 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:268 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:147 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:155 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:156 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:301 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:303 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:276 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:304 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:198 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:151 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:155 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:197 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:154 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:152 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:208 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:310 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:197 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:280 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:279 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:284 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:283 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:272 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:273 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:283 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:278 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:193 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:193 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:299 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:158 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:192 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:197 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:195 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:283 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:299 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:155 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:284 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:201 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:299 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:303 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:301 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:152 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:303 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:281 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:203 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:273 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:195 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:278 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:300 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:278 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:301 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:196 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:303 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:211 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:192 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:301 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:280 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:278 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:278 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:280 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:197 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:206 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:158 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:156 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:194 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:193 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:273 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:299 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:208 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:195 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:279 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:198 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:280 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:303 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:196 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:304 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:278 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:198 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:279 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 97.086% pattern: 55 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:114. flip_cnt: 0, stem_cnt: 214, fault_cnt:302 -coverage: 97.786% pattern: 56 before: 25 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:158 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:276 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:158 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:156 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:213 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:201 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:299 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:299 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:199 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:192 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:311 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:143 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:278 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:276 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:268 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:300 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:300 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:280 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:266 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:270 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:281 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:266 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:272 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:279 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:199 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:194 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:283 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:149 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:273 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:304 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:299 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:200 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:153 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:158 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:147 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:203 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:215 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:213 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:275 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:284 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:281 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:193 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:281 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:308 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:158 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:301 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:300 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:299 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:304 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:148 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:270 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:271 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:300 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:274 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:269 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:305 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:195 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:266 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:271 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:156 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:284 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:194 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:281 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:193 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:269 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:192 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:192 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:271 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:283 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:278 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:158 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:283 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:281 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:156 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:207 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:266 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:283 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:208 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:302 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:270 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:202 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:155 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:283 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:214 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:299 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:299 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:148 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:198 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:155 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:195 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:272 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:221 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:203 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:205 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:306 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:198 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:299 -coverage: 97.786% pattern: 56 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 214, fault_cnt:328 -coverage: 97.902% pattern: 57 before: 19 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:221 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:277 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:158 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:251 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:197 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:280 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:284 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:158 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:256 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:283 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:193 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:310 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:155 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:277 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:273 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:268 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:275 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:274 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:151 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:301 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:301 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:299 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:302 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:281 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:300 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:194 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:275 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:302 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:205 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:153 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:278 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:212 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:197 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:194 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:270 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:273 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:199 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:275 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:197 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:303 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:205 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:310 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:276 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:257 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:158 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:300 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:277 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:158 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:284 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:275 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:220 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:154 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:278 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:152 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:212 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:275 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:268 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:156 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:269 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:283 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:193 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:299 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:215 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:197 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:303 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:158 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:193 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:310 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:196 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:155 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:284 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:196 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:202 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:301 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:194 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:199 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:300 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:276 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:196 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:302 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:158 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:198 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:196 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:305 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:148 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:198 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:279 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:222 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:205 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:202 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:276 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:208 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:197 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:303 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:274 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:199 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:152 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:194 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:299 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:155 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:158 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:275 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:303 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:322 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:154 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:263 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:277 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:279 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:206 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:147 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:200 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:154 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:302 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:307 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:192 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:281 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:208 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:306 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:150 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:192 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:196 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:151 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:158 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:153 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:198 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:275 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:303 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:201 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:155 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:268 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:197 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:201 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:278 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:156 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:302 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:316 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:271 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:192 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:203 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:312 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:279 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:276 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:303 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:300 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:199 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:307 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:283 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:303 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:197 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:158 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:203 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:193 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:284 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:267 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:155 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:280 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:195 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:269 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:201 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:192 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:284 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:152 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:303 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:301 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:158 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:153 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:305 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:273 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:312 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:203 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:265 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:300 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:153 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:260 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:281 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:208 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:277 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:264 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:300 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:211 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:155 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:195 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:197 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:277 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:302 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:272 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:283 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:192 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:200 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:284 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:194 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:193 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:304 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:268 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:272 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:198 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:156 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:273 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:197 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:302 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:153 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:210 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:158 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:274 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:153 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:274 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:152 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:300 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:265 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:197 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:306 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:209 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:307 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:204 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:273 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:195 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:195 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:299 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:299 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:300 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:195 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:212 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:197 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:152 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:267 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:198 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:196 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:276 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:202 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:192 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:280 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:299 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:153 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:284 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:193 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:199 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:278 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:199 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:147 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:303 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:197 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:198 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:302 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:155 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:283 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:283 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:146 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:281 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:300 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:155 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:208 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:206 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:153 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:308 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:283 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:210 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:193 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:158 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:192 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:204 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:195 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:156 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:158 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:300 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:268 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:209 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:156 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:204 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:212 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:208 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:272 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:203 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:264 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:269 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:193 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:302 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:280 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:279 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:199 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:279 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:299 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:193 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:284 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:156 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:270 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:269 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:309 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:206 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:212 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:153 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:312 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:193 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:211 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:220 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:276 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:198 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:284 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:319 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:192 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:205 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:280 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:202 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:306 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:273 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:154 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:155 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:192 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:300 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:302 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:305 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:307 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:273 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:301 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:154 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:152 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:156 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:158 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:276 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:272 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:158 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:300 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:280 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:203 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:196 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:206 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:281 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:203 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:225 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:263 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:306 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:217 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:307 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:158 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:210 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:271 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:306 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:156 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:199 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:152 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:301 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:277 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:193 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:280 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:278 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:299 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:200 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:192 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:266 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:277 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:278 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:152 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:303 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:301 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:301 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:155 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:274 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:192 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:193 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:281 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:149 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 97.902% pattern: 57 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:58. flip_cnt: 0, stem_cnt: 214, fault_cnt:260 -coverage: 98.368% pattern: 58 before: 18 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:280 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:279 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:299 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:147 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:154 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:263 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:284 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:193 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:199 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:195 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:279 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:307 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:145 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:299 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:281 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:258 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:278 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:284 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:155 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:301 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:196 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:200 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:212 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:272 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:214 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:273 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:273 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:306 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:283 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:208 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:304 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:158 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:302 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:303 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:199 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:316 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:310 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:147 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:202 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:306 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:272 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:192 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:156 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:300 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:302 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:193 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:208 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:273 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:284 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:302 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:268 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:251 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:193 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:226 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:312 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:279 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:300 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:302 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:299 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:193 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:283 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:153 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:199 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:268 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:274 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:305 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:284 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:196 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:261 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:152 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:155 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:192 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:299 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:158 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:143 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:280 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:153 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:279 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:222 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:193 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:279 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:301 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:151 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:256 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:283 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:156 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:208 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:304 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:211 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:279 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:264 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:300 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:276 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:151 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:279 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:156 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:264 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:202 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:224 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:155 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:154 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:158 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:150 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:197 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:158 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:299 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:278 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:302 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:275 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:280 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:154 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:218 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:196 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:194 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:278 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:277 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:283 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:307 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:281 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:153 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:280 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:284 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:284 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:281 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:156 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:194 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:192 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:284 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:204 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:202 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:276 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:299 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:263 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:304 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:194 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:283 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:195 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:308 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:261 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:147 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:204 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:268 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:196 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:203 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:265 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:272 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:155 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:196 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:198 -coverage: 98.368% pattern: 58 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 214, fault_cnt:251 -coverage: 98.485% pattern: 59 before: 14 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:305 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:192 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:200 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:283 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:274 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:277 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:193 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:305 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:305 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:280 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:281 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:305 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:199 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:270 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:197 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:301 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:152 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:222 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:156 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:283 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:317 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:154 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:284 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:209 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:300 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:275 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:201 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:193 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:193 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:267 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:277 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:306 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:153 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:283 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:275 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:270 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:154 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:263 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:195 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:208 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:202 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:281 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:301 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:155 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:304 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:302 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:276 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:271 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:267 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:195 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:283 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:156 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:268 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:195 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:284 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:283 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:313 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:155 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:197 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:301 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:223 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:299 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:209 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:280 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:276 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:272 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:302 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:303 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:196 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:273 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:265 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:300 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:192 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:299 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:195 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:197 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:299 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:284 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:313 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:281 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:192 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:305 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:308 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:273 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:192 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:274 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:193 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:151 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:276 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:148 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:156 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:204 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:274 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:193 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:276 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:158 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:278 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:300 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:251 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:281 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:223 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:151 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:152 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:192 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:269 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:265 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:200 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:158 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:301 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:206 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:154 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:257 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:284 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:202 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:284 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:275 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:152 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:277 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:211 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:203 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:153 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:299 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:204 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:212 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:276 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:152 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:153 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:275 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:305 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:194 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:271 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:210 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:308 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:274 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:152 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:261 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:304 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:194 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:196 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:283 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:284 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:195 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:278 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:281 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:200 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:196 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:271 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:154 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:307 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:302 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:154 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:300 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:200 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:299 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:266 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:158 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:209 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:192 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:262 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:275 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:204 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:192 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:284 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:280 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:270 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:284 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:280 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:299 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:158 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:314 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:154 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:211 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:300 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:205 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:142 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:154 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:277 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:155 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:281 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:192 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:203 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:274 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:306 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:272 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:150 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:302 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:273 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:270 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:258 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:208 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:307 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:311 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:156 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:193 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:276 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:193 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:302 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:196 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:153 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:304 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:158 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:304 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:197 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:155 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:193 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:154 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:308 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:197 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:273 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:149 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:154 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:310 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:270 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:256 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:156 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:209 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:194 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:153 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:284 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:201 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:193 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:281 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:284 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:254 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:299 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:283 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:152 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:193 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:218 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:147 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:247 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:307 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:307 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:219 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:272 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:302 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:158 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:154 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:197 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:200 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:194 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:268 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:196 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:284 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:280 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:158 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:281 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:194 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:260 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:274 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:156 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:284 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:154 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:194 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:201 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:309 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:155 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:281 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:275 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:277 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:192 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:310 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:146 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:308 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:156 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:300 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:201 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:276 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:299 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:274 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:299 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:199 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:280 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:284 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:272 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:274 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:198 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:275 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:152 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:308 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:312 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:192 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:195 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:193 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:311 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:202 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:192 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:156 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:300 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:273 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:284 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:153 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:299 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:266 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:263 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:195 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:194 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:283 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:198 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:275 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:283 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:274 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:153 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:301 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:300 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:300 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:260 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:281 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:266 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:229 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:274 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:299 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:280 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:310 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:206 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:154 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:270 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:198 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:272 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:195 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:310 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:277 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:195 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:194 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:192 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:304 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:304 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:156 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:299 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:277 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:152 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:198 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:200 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:198 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:194 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:281 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:299 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:284 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:266 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:156 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:304 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:153 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:153 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:194 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:153 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:204 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:283 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:195 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:281 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:198 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:283 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:155 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:155 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:299 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:308 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:146 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:300 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:275 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:194 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:195 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:321 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:194 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:272 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:194 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:299 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:192 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:156 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:299 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:204 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:148 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:299 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:195 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:283 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:278 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:269 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:275 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:156 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:300 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:158 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:194 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:268 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:277 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:299 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:197 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:158 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:300 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:281 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:155 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:274 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:195 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:267 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:193 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:299 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:265 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:152 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:195 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:192 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:272 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:193 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:215 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:276 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:304 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:300 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:284 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:307 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:156 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:277 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:201 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:196 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:219 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:276 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:196 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:266 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:198 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:212 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:299 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:270 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:301 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:299 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:262 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:197 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:274 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:199 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:194 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:192 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:151 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:197 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:154 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:192 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:155 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:268 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:283 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:156 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:158 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:279 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:303 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:194 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:274 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:279 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:147 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:262 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:150 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:283 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:259 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:268 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:283 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:283 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:156 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:302 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:150 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:284 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:215 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:193 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:271 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:302 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:277 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:281 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:280 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:308 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:270 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:202 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:156 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:152 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:260 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:280 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:284 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:156 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:154 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:152 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:284 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:281 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:198 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:302 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:257 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:205 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:197 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:266 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:158 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:306 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:284 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:196 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:273 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:194 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:269 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:151 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:154 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:206 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:197 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:192 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:273 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:283 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:272 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:201 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:301 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:300 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:280 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:195 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:275 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:193 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:192 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:192 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:305 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:156 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:313 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:304 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:152 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:207 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:273 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:283 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:278 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:272 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:277 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:194 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:192 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:278 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:273 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:276 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:311 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:194 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:283 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:141 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:192 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:313 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:207 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:272 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:302 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:195 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:152 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:269 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:258 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:192 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:284 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:215 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:258 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:156 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:199 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:255 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:279 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:192 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:212 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:274 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:144 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:275 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:279 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:281 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:280 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:267 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:280 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:197 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:275 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:301 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:250 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:153 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:284 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:154 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:306 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:158 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:258 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:196 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:308 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:194 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:265 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:272 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:199 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:321 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:196 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:284 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:302 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:306 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:265 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:305 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:156 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:199 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:258 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:266 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:272 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:275 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:143 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:283 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:192 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:250 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:279 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:283 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:269 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:202 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:301 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:272 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:296 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:299 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:154 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:300 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:272 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:155 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:156 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:281 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:192 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:280 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:200 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:275 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:279 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:299 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:266 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:199 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:268 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:153 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:273 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:193 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:149 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:149 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:281 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:151 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:195 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:264 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:248 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:262 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:194 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:277 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:158 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:204 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:272 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:278 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:303 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:154 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:301 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:197 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:277 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:202 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:229 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:264 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:155 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:279 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:313 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:212 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:195 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:266 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:158 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:271 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:305 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:302 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:299 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:199 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:284 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:281 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:204 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:194 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:284 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:276 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:307 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:283 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:273 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:305 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:195 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:279 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:298 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:306 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:153 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:274 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:284 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:268 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:273 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:300 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:158 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:300 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:195 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:194 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:319 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:198 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:299 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:275 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:306 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:283 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:264 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:263 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:194 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:285 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:220 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:280 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:304 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:278 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:308 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:284 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:300 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:195 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:225 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:283 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:154 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:156 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:192 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:299 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:302 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:280 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:193 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:270 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:277 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:300 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:274 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:156 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:300 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:188 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:279 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:194 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:277 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:280 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:281 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:272 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:286 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:192 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:300 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:265 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:284 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:258 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:300 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:274 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:192 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:192 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:279 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:290 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:161 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:291 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:162 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:289 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:266 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:292 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:294 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:155 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:268 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:270 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:160 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:265 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:282 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:190 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:163 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:176 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:191 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:183 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:280 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:276 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:295 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:187 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:167 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:178 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:153 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:172 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:186 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:223 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:280 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:293 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:164 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:297 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:159 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:171 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:189 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:284 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:173 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:175 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:288 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:287 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:185 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:157 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:166 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:182 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:169 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:184 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:168 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:179 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:180 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:181 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:174 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:170 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:199 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:177 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 214, fault_cnt:165 -coverage: 98.485% pattern: 59 before: 13 now: 13 -checking valid circuit ... result: 1. diff --git a/exp_result/ATPG-LS_b12.bench.txt b/exp_result/ATPG-LS_b12.bench.txt deleted file mode 100644 index 8f1c673..0000000 --- a/exp_result/ATPG-LS_b12.bench.txt +++ /dev/null @@ -1,2941 +0,0 @@ -make: 'atpg' is up to date. -======================== -parsing file ./benchmark/b12.bench ... Done. -====== Circuit Statistics ====== -PI: 126 -PO: 127 -Gate: 1039 -Stem: 511 -Level: 5 -================================ -[SOL] flip: 0, stem: 0, fault:7336. flip_cnt: 0, stem_cnt: 511, fault_cnt:663 -coverage: 31.906% pattern: 1 before: 2078 now: 1415 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:5752. flip_cnt: 0, stem_cnt: 511, fault_cnt:685 -coverage: 52.839% pattern: 2 before: 1415 now: 980 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:2787. flip_cnt: 0, stem_cnt: 511, fault_cnt:667 -coverage: 60.154% pattern: 3 before: 980 now: 828 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:1039. flip_cnt: 0, stem_cnt: 511, fault_cnt:636 -coverage: 63.956% pattern: 4 before: 828 now: 749 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:796. flip_cnt: 0, stem_cnt: 511, fault_cnt:669 -coverage: 66.073% pattern: 5 before: 749 now: 705 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:566. flip_cnt: 0, stem_cnt: 511, fault_cnt:654 -coverage: 67.565% pattern: 6 before: 705 now: 674 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:544. flip_cnt: 0, stem_cnt: 511, fault_cnt:638 -coverage: 69.153% pattern: 7 before: 674 now: 641 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:580. flip_cnt: 0, stem_cnt: 511, fault_cnt:658 -coverage: 71.511% pattern: 8 before: 641 now: 592 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:304. flip_cnt: 0, stem_cnt: 511, fault_cnt:642 -coverage: 72.281% pattern: 9 before: 592 now: 576 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:324. flip_cnt: 0, stem_cnt: 511, fault_cnt:682 -coverage: 73.725% pattern: 10 before: 576 now: 546 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:456. flip_cnt: 0, stem_cnt: 511, fault_cnt:661 -coverage: 74.880% pattern: 11 before: 546 now: 522 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:640 -coverage: 74.880% pattern: 11 before: 522 now: 522 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 511, fault_cnt:669 -coverage: 74.976% pattern: 12 before: 522 now: 520 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:186. flip_cnt: 0, stem_cnt: 511, fault_cnt:649 -coverage: 75.457% pattern: 13 before: 520 now: 510 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:237. flip_cnt: 0, stem_cnt: 511, fault_cnt:661 -coverage: 76.275% pattern: 14 before: 510 now: 493 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:152. flip_cnt: 0, stem_cnt: 511, fault_cnt:650 -coverage: 76.660% pattern: 15 before: 493 now: 485 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 511, fault_cnt:674 -coverage: 76.901% pattern: 16 before: 485 now: 480 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:636 -coverage: 76.901% pattern: 16 before: 480 now: 480 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:266. flip_cnt: 0, stem_cnt: 511, fault_cnt:610 -coverage: 77.575% pattern: 17 before: 480 now: 466 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 511, fault_cnt:643 -coverage: 77.671% pattern: 18 before: 466 now: 464 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:209. flip_cnt: 0, stem_cnt: 511, fault_cnt:648 -coverage: 78.200% pattern: 19 before: 464 now: 453 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 511, fault_cnt:647 -coverage: 78.393% pattern: 20 before: 453 now: 449 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:228. flip_cnt: 0, stem_cnt: 511, fault_cnt:661 -coverage: 78.970% pattern: 21 before: 449 now: 437 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:262. flip_cnt: 0, stem_cnt: 511, fault_cnt:642 -coverage: 79.644% pattern: 22 before: 437 now: 423 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 511, fault_cnt:653 -coverage: 79.836% pattern: 23 before: 423 now: 419 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:113. flip_cnt: 0, stem_cnt: 511, fault_cnt:615 -coverage: 80.173% pattern: 24 before: 419 now: 412 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 511, fault_cnt:606 -coverage: 80.414% pattern: 25 before: 412 now: 407 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:152. flip_cnt: 0, stem_cnt: 511, fault_cnt:656 -coverage: 80.799% pattern: 26 before: 407 now: 399 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 511, fault_cnt:655 -coverage: 81.039% pattern: 27 before: 399 now: 394 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 511, fault_cnt:641 -coverage: 81.088% pattern: 28 before: 394 now: 393 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 511, fault_cnt:624 -coverage: 81.232% pattern: 29 before: 393 now: 390 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:614 -coverage: 81.232% pattern: 29 before: 390 now: 390 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:662 -coverage: 81.232% pattern: 29 before: 390 now: 390 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 511, fault_cnt:672 -coverage: 81.424% pattern: 30 before: 390 now: 386 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 511, fault_cnt:649 -coverage: 81.521% pattern: 31 before: 386 now: 384 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:623 -coverage: 81.521% pattern: 31 before: 384 now: 384 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:114. flip_cnt: 0, stem_cnt: 511, fault_cnt:664 -coverage: 81.809% pattern: 32 before: 384 now: 378 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:654 -coverage: 81.809% pattern: 32 before: 378 now: 378 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:133. flip_cnt: 0, stem_cnt: 511, fault_cnt:677 -coverage: 82.146% pattern: 33 before: 378 now: 371 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:56. flip_cnt: 0, stem_cnt: 511, fault_cnt:648 -coverage: 82.291% pattern: 34 before: 371 now: 368 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:114. flip_cnt: 0, stem_cnt: 511, fault_cnt:625 -coverage: 82.579% pattern: 35 before: 368 now: 362 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 511, fault_cnt:655 -coverage: 82.628% pattern: 36 before: 362 now: 361 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 511, fault_cnt:629 -coverage: 82.820% pattern: 37 before: 361 now: 357 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 511, fault_cnt:706 -coverage: 82.916% pattern: 38 before: 357 now: 355 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:190. flip_cnt: 0, stem_cnt: 511, fault_cnt:635 -coverage: 83.397% pattern: 39 before: 355 now: 345 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:657 -coverage: 83.397% pattern: 39 before: 345 now: 345 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 511, fault_cnt:651 -coverage: 83.446% pattern: 40 before: 345 now: 344 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 511, fault_cnt:648 -coverage: 83.590% pattern: 41 before: 344 now: 341 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 511, fault_cnt:612 -coverage: 83.638% pattern: 42 before: 341 now: 340 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:190. flip_cnt: 0, stem_cnt: 511, fault_cnt:628 -coverage: 84.119% pattern: 43 before: 340 now: 330 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 511, fault_cnt:619 -coverage: 84.167% pattern: 44 before: 330 now: 329 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:647 -coverage: 84.167% pattern: 44 before: 329 now: 329 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 511, fault_cnt:632 -coverage: 84.264% pattern: 45 before: 329 now: 327 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 511, fault_cnt:620 -coverage: 84.312% pattern: 46 before: 327 now: 326 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 511, fault_cnt:667 -coverage: 84.456% pattern: 47 before: 326 now: 323 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 511, fault_cnt:652 -coverage: 84.504% pattern: 48 before: 323 now: 322 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 511, fault_cnt:664 -coverage: 84.697% pattern: 49 before: 322 now: 318 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:674 -coverage: 84.697% pattern: 49 before: 318 now: 318 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:651 -coverage: 84.697% pattern: 49 before: 318 now: 318 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:657 -coverage: 84.697% pattern: 49 before: 318 now: 318 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:41. flip_cnt: 0, stem_cnt: 511, fault_cnt:639 -coverage: 84.937% pattern: 50 before: 318 now: 313 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:642 -coverage: 84.937% pattern: 50 before: 313 now: 313 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 511, fault_cnt:637 -coverage: 84.986% pattern: 51 before: 313 now: 312 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 511, fault_cnt:660 -coverage: 85.178% pattern: 52 before: 312 now: 308 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 511, fault_cnt:671 -coverage: 85.226% pattern: 53 before: 308 now: 307 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 511, fault_cnt:688 -coverage: 85.419% pattern: 54 before: 307 now: 303 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 511, fault_cnt:624 -coverage: 85.515% pattern: 55 before: 303 now: 301 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:209. flip_cnt: 0, stem_cnt: 511, fault_cnt:679 -coverage: 86.044% pattern: 56 before: 301 now: 290 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 511, fault_cnt:615 -coverage: 86.092% pattern: 57 before: 290 now: 289 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:672 -coverage: 86.092% pattern: 57 before: 289 now: 289 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 511, fault_cnt:646 -coverage: 86.141% pattern: 58 before: 289 now: 288 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:638 -coverage: 86.141% pattern: 58 before: 288 now: 288 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:633 -coverage: 86.141% pattern: 58 before: 288 now: 288 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:637 -coverage: 86.141% pattern: 58 before: 288 now: 288 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 511, fault_cnt:632 -coverage: 86.189% pattern: 59 before: 288 now: 287 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:668 -coverage: 86.189% pattern: 59 before: 287 now: 287 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 511, fault_cnt:667 -coverage: 86.237% pattern: 60 before: 287 now: 286 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 511, fault_cnt:666 -coverage: 86.333% pattern: 61 before: 286 now: 284 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:665 -coverage: 86.333% pattern: 61 before: 284 now: 284 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:620 -coverage: 86.333% pattern: 61 before: 284 now: 284 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:658 -coverage: 86.333% pattern: 61 before: 284 now: 284 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:651 -coverage: 86.333% pattern: 61 before: 284 now: 284 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 511, fault_cnt:647 -coverage: 86.429% pattern: 62 before: 284 now: 282 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 511, fault_cnt:630 -coverage: 86.477% pattern: 63 before: 282 now: 281 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:6. flip_cnt: 0, stem_cnt: 511, fault_cnt:618 -coverage: 86.526% pattern: 64 before: 281 now: 280 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:675 -coverage: 86.526% pattern: 64 before: 280 now: 280 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:183. flip_cnt: 0, stem_cnt: 511, fault_cnt:633 -coverage: 87.007% pattern: 65 before: 280 now: 270 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:670 -coverage: 87.007% pattern: 65 before: 270 now: 270 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:648 -coverage: 87.007% pattern: 65 before: 270 now: 270 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:655 -coverage: 87.007% pattern: 65 before: 270 now: 270 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:635 -coverage: 87.007% pattern: 65 before: 270 now: 270 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 511, fault_cnt:674 -coverage: 87.103% pattern: 66 before: 270 now: 268 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 511, fault_cnt:592 -coverage: 87.199% pattern: 67 before: 268 now: 266 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:198. flip_cnt: 0, stem_cnt: 511, fault_cnt:653 -coverage: 87.777% pattern: 68 before: 266 now: 254 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:643 -coverage: 87.777% pattern: 68 before: 254 now: 254 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:16. flip_cnt: 0, stem_cnt: 511, fault_cnt:625 -coverage: 87.969% pattern: 69 before: 254 now: 250 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:20. flip_cnt: 0, stem_cnt: 511, fault_cnt:652 -coverage: 88.065% pattern: 70 before: 250 now: 248 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:646 -coverage: 88.065% pattern: 70 before: 248 now: 248 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:171. flip_cnt: 0, stem_cnt: 511, fault_cnt:695 -coverage: 88.499% pattern: 71 before: 248 now: 239 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:677 -coverage: 88.499% pattern: 71 before: 239 now: 239 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 511, fault_cnt:653 -coverage: 88.547% pattern: 72 before: 239 now: 238 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 511, fault_cnt:650 -coverage: 88.643% pattern: 73 before: 238 now: 236 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:655 -coverage: 88.643% pattern: 73 before: 236 now: 236 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 511, fault_cnt:651 -coverage: 88.691% pattern: 74 before: 236 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 511, fault_cnt:652 -coverage: 88.835% pattern: 75 before: 235 now: 232 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:638 -coverage: 88.835% pattern: 75 before: 232 now: 232 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:662 -coverage: 88.835% pattern: 75 before: 232 now: 232 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:655 -coverage: 88.835% pattern: 75 before: 232 now: 232 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:643 -coverage: 88.835% pattern: 75 before: 232 now: 232 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:606 -coverage: 88.835% pattern: 75 before: 232 now: 232 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:666 -coverage: 88.835% pattern: 75 before: 232 now: 232 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:81. flip_cnt: 0, stem_cnt: 511, fault_cnt:656 -coverage: 89.124% pattern: 76 before: 232 now: 226 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:655 -coverage: 89.124% pattern: 76 before: 226 now: 226 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 511, fault_cnt:652 -coverage: 89.172% pattern: 77 before: 226 now: 225 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:651 -coverage: 89.172% pattern: 77 before: 225 now: 225 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:636 -coverage: 89.172% pattern: 77 before: 225 now: 225 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:13. flip_cnt: 0, stem_cnt: 511, fault_cnt:636 -coverage: 89.220% pattern: 78 before: 225 now: 224 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:674 -coverage: 89.220% pattern: 78 before: 224 now: 224 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:644 -coverage: 89.220% pattern: 78 before: 224 now: 224 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:640 -coverage: 89.220% pattern: 78 before: 224 now: 224 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:20. flip_cnt: 0, stem_cnt: 511, fault_cnt:633 -coverage: 89.317% pattern: 79 before: 224 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:676 -coverage: 89.317% pattern: 79 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:653 -coverage: 89.317% pattern: 79 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:679 -coverage: 89.317% pattern: 79 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:654 -coverage: 89.317% pattern: 79 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:631 -coverage: 89.317% pattern: 79 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:644 -coverage: 89.317% pattern: 79 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:655 -coverage: 89.317% pattern: 79 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:655 -coverage: 89.317% pattern: 79 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:636 -coverage: 89.317% pattern: 79 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:690 -coverage: 89.317% pattern: 79 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 511, fault_cnt:647 -coverage: 89.413% pattern: 80 before: 222 now: 220 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:639 -coverage: 89.413% pattern: 80 before: 220 now: 220 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:627 -coverage: 89.413% pattern: 80 before: 220 now: 220 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:630 -coverage: 89.413% pattern: 80 before: 220 now: 220 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 511, fault_cnt:672 -coverage: 89.461% pattern: 81 before: 220 now: 219 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:658 -coverage: 89.461% pattern: 81 before: 219 now: 219 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:58. flip_cnt: 0, stem_cnt: 511, fault_cnt:695 -coverage: 89.654% pattern: 82 before: 219 now: 215 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:618 -coverage: 89.654% pattern: 82 before: 215 now: 215 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:646 -coverage: 89.654% pattern: 82 before: 215 now: 215 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:653 -coverage: 89.654% pattern: 82 before: 215 now: 215 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:647 -coverage: 89.654% pattern: 82 before: 215 now: 215 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:604 -coverage: 89.654% pattern: 82 before: 215 now: 215 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:674 -coverage: 89.654% pattern: 82 before: 215 now: 215 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:654 -coverage: 89.654% pattern: 82 before: 215 now: 215 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:645 -coverage: 89.654% pattern: 82 before: 215 now: 215 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:654 -coverage: 89.654% pattern: 82 before: 215 now: 215 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:3. flip_cnt: 0, stem_cnt: 511, fault_cnt:634 -coverage: 89.702% pattern: 83 before: 215 now: 214 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:650 -coverage: 89.702% pattern: 83 before: 214 now: 214 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:602 -coverage: 89.702% pattern: 83 before: 214 now: 214 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:647 -coverage: 89.702% pattern: 83 before: 214 now: 214 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:687 -coverage: 89.702% pattern: 83 before: 214 now: 214 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 511, fault_cnt:669 -coverage: 89.750% pattern: 84 before: 214 now: 213 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:654 -coverage: 89.750% pattern: 84 before: 213 now: 213 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:640 -coverage: 89.750% pattern: 84 before: 213 now: 213 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:644 -coverage: 89.750% pattern: 84 before: 213 now: 213 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:623 -coverage: 89.750% pattern: 84 before: 213 now: 213 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:655 -coverage: 89.750% pattern: 84 before: 213 now: 213 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 511, fault_cnt:619 -coverage: 89.798% pattern: 85 before: 213 now: 212 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:629 -coverage: 89.798% pattern: 85 before: 212 now: 212 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:633 -coverage: 89.798% pattern: 85 before: 212 now: 212 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 511, fault_cnt:668 -coverage: 89.846% pattern: 86 before: 212 now: 211 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:625 -coverage: 89.846% pattern: 86 before: 211 now: 211 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 511, fault_cnt:660 -coverage: 89.894% pattern: 87 before: 211 now: 210 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 511, fault_cnt:602 -coverage: 89.942% pattern: 88 before: 210 now: 209 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:649 -coverage: 89.942% pattern: 88 before: 209 now: 209 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:659 -coverage: 89.942% pattern: 88 before: 209 now: 209 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:664 -coverage: 89.942% pattern: 88 before: 209 now: 209 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 511, fault_cnt:622 -coverage: 89.990% pattern: 89 before: 209 now: 208 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:652 -coverage: 89.990% pattern: 89 before: 208 now: 208 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 511, fault_cnt:620 -coverage: 90.231% pattern: 90 before: 208 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:669 -coverage: 90.231% pattern: 90 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:660 -coverage: 90.231% pattern: 90 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:13. flip_cnt: 0, stem_cnt: 511, fault_cnt:651 -coverage: 90.279% pattern: 91 before: 203 now: 202 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:665 -coverage: 90.279% pattern: 91 before: 202 now: 202 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:658 -coverage: 90.279% pattern: 91 before: 202 now: 202 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:594 -coverage: 90.279% pattern: 91 before: 202 now: 202 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:681 -coverage: 90.279% pattern: 91 before: 202 now: 202 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:647 -coverage: 90.279% pattern: 91 before: 202 now: 202 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 511, fault_cnt:674 -coverage: 90.327% pattern: 92 before: 202 now: 201 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:632 -coverage: 90.327% pattern: 92 before: 201 now: 201 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:624 -coverage: 90.327% pattern: 92 before: 201 now: 201 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:671 -coverage: 90.327% pattern: 92 before: 201 now: 201 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:652 -coverage: 90.327% pattern: 92 before: 201 now: 201 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:636 -coverage: 90.327% pattern: 92 before: 201 now: 201 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:635 -coverage: 90.327% pattern: 92 before: 201 now: 201 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:644 -coverage: 90.327% pattern: 92 before: 201 now: 201 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:634 -coverage: 90.327% pattern: 92 before: 201 now: 201 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:625 -coverage: 90.327% pattern: 92 before: 201 now: 201 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:656 -coverage: 90.327% pattern: 92 before: 201 now: 201 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:644 -coverage: 90.327% pattern: 92 before: 201 now: 201 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 511, fault_cnt:647 -coverage: 90.375% pattern: 93 before: 201 now: 200 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:642 -coverage: 90.375% pattern: 93 before: 200 now: 200 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:673 -coverage: 90.375% pattern: 93 before: 200 now: 200 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:678 -coverage: 90.375% pattern: 93 before: 200 now: 200 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:664 -coverage: 90.375% pattern: 93 before: 200 now: 200 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:617 -coverage: 90.375% pattern: 93 before: 200 now: 200 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:658 -coverage: 90.375% pattern: 93 before: 200 now: 200 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:624 -coverage: 90.375% pattern: 93 before: 200 now: 200 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 511, fault_cnt:649 -coverage: 90.423% pattern: 94 before: 200 now: 199 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:613 -coverage: 90.423% pattern: 94 before: 199 now: 199 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:644 -coverage: 90.423% pattern: 94 before: 199 now: 199 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:596 -coverage: 90.423% pattern: 94 before: 199 now: 199 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:604 -coverage: 90.423% pattern: 94 before: 199 now: 199 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:654 -coverage: 90.423% pattern: 94 before: 199 now: 199 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:645 -coverage: 90.423% pattern: 94 before: 199 now: 199 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:648 -coverage: 90.423% pattern: 94 before: 199 now: 199 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:639 -coverage: 90.423% pattern: 94 before: 199 now: 199 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:639 -coverage: 90.423% pattern: 94 before: 199 now: 199 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:637 -coverage: 90.423% pattern: 94 before: 199 now: 199 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:652 -coverage: 90.423% pattern: 94 before: 199 now: 199 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 511, fault_cnt:638 -coverage: 90.616% pattern: 95 before: 199 now: 195 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:683 -coverage: 90.616% pattern: 95 before: 195 now: 195 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:643 -coverage: 90.616% pattern: 95 before: 195 now: 195 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:693 -coverage: 90.616% pattern: 95 before: 195 now: 195 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:645 -coverage: 90.616% pattern: 95 before: 195 now: 195 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:672 -coverage: 90.616% pattern: 95 before: 195 now: 195 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:680 -coverage: 90.616% pattern: 95 before: 195 now: 195 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:691 -coverage: 90.616% pattern: 95 before: 195 now: 195 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:628 -coverage: 90.616% pattern: 95 before: 195 now: 195 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:608 -coverage: 90.616% pattern: 95 before: 195 now: 195 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:646 -coverage: 90.616% pattern: 95 before: 195 now: 195 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:658 -coverage: 90.616% pattern: 95 before: 195 now: 195 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:601 -coverage: 90.616% pattern: 95 before: 195 now: 195 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:623 -coverage: 90.616% pattern: 95 before: 195 now: 195 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:643 -coverage: 90.616% pattern: 95 before: 195 now: 195 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:692 -coverage: 90.616% pattern: 95 before: 195 now: 195 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:667 -coverage: 90.616% pattern: 95 before: 195 now: 195 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:625 -coverage: 90.616% pattern: 95 before: 195 now: 195 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:648 -coverage: 90.616% pattern: 95 before: 195 now: 195 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:629 -coverage: 90.616% pattern: 95 before: 195 now: 195 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:643 -coverage: 90.616% pattern: 95 before: 195 now: 195 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 511, fault_cnt:656 -coverage: 90.712% pattern: 96 before: 195 now: 193 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:646 -coverage: 90.712% pattern: 96 before: 193 now: 193 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:77. flip_cnt: 0, stem_cnt: 511, fault_cnt:691 -coverage: 90.953% pattern: 97 before: 193 now: 188 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:596 -coverage: 90.953% pattern: 97 before: 188 now: 188 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:639 -coverage: 90.953% pattern: 97 before: 188 now: 188 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:661 -coverage: 90.953% pattern: 97 before: 188 now: 188 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:634 -coverage: 90.953% pattern: 97 before: 188 now: 188 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:632 -coverage: 90.953% pattern: 97 before: 188 now: 188 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:681 -coverage: 90.953% pattern: 97 before: 188 now: 188 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:633 -coverage: 90.953% pattern: 97 before: 188 now: 188 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:663 -coverage: 90.953% pattern: 97 before: 188 now: 188 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 511, fault_cnt:687 -coverage: 91.001% pattern: 98 before: 188 now: 187 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:667 -coverage: 91.001% pattern: 98 before: 187 now: 187 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:656 -coverage: 91.001% pattern: 98 before: 187 now: 187 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 511, fault_cnt:597 -coverage: 91.049% pattern: 99 before: 187 now: 186 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 511, fault_cnt:646 -coverage: 91.290% pattern: 100 before: 186 now: 181 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:590 -coverage: 91.290% pattern: 100 before: 181 now: 181 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:700 -coverage: 91.290% pattern: 100 before: 181 now: 181 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:664 -coverage: 91.290% pattern: 100 before: 181 now: 181 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:681 -coverage: 91.290% pattern: 100 before: 181 now: 181 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:645 -coverage: 91.290% pattern: 100 before: 181 now: 181 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:703 -coverage: 91.290% pattern: 100 before: 181 now: 181 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:670 -coverage: 91.290% pattern: 100 before: 181 now: 181 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:625 -coverage: 91.290% pattern: 100 before: 181 now: 181 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:685 -coverage: 91.290% pattern: 100 before: 181 now: 181 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:93. flip_cnt: 0, stem_cnt: 511, fault_cnt:667 -coverage: 91.578% pattern: 101 before: 181 now: 175 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:639 -coverage: 91.578% pattern: 101 before: 175 now: 175 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:669 -coverage: 91.578% pattern: 101 before: 175 now: 175 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:648 -coverage: 91.578% pattern: 101 before: 175 now: 175 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:665 -coverage: 91.578% pattern: 101 before: 175 now: 175 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:661 -coverage: 91.578% pattern: 101 before: 175 now: 175 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:647 -coverage: 91.578% pattern: 101 before: 175 now: 175 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:670 -coverage: 91.578% pattern: 101 before: 175 now: 175 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:659 -coverage: 91.578% pattern: 101 before: 175 now: 175 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:642 -coverage: 91.578% pattern: 101 before: 175 now: 175 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:641 -coverage: 91.578% pattern: 101 before: 175 now: 175 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 511, fault_cnt:657 -coverage: 91.627% pattern: 102 before: 175 now: 174 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:644 -coverage: 91.627% pattern: 102 before: 174 now: 174 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:675 -coverage: 91.627% pattern: 102 before: 174 now: 174 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:653 -coverage: 91.627% pattern: 102 before: 174 now: 174 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:658 -coverage: 91.627% pattern: 102 before: 174 now: 174 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:637 -coverage: 91.627% pattern: 102 before: 174 now: 174 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:627 -coverage: 91.627% pattern: 102 before: 174 now: 174 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:661 -coverage: 91.627% pattern: 102 before: 174 now: 174 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:632 -coverage: 91.627% pattern: 102 before: 174 now: 174 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:650 -coverage: 91.627% pattern: 102 before: 174 now: 174 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 511, fault_cnt:688 -coverage: 91.723% pattern: 103 before: 174 now: 172 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 511, fault_cnt:662 -coverage: 91.771% pattern: 104 before: 172 now: 171 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:647 -coverage: 91.771% pattern: 104 before: 171 now: 171 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:652 -coverage: 91.771% pattern: 104 before: 171 now: 171 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:640 -coverage: 91.771% pattern: 104 before: 171 now: 171 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:670 -coverage: 91.771% pattern: 104 before: 171 now: 171 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:639 -coverage: 91.771% pattern: 104 before: 171 now: 171 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:594 -coverage: 91.771% pattern: 104 before: 171 now: 171 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:634 -coverage: 91.771% pattern: 104 before: 171 now: 171 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:639 -coverage: 91.771% pattern: 104 before: 171 now: 171 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:629 -coverage: 91.771% pattern: 104 before: 171 now: 171 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:619 -coverage: 91.771% pattern: 104 before: 171 now: 171 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:690 -coverage: 91.771% pattern: 104 before: 171 now: 171 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:633 -coverage: 91.771% pattern: 104 before: 171 now: 171 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:635 -coverage: 91.771% pattern: 104 before: 171 now: 171 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:651 -coverage: 91.771% pattern: 104 before: 171 now: 171 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:657 -coverage: 91.771% pattern: 104 before: 171 now: 171 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:678 -coverage: 91.771% pattern: 104 before: 171 now: 171 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 511, fault_cnt:648 -coverage: 91.819% pattern: 105 before: 171 now: 170 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 511, fault_cnt:661 -coverage: 91.963% pattern: 106 before: 170 now: 167 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 511, fault_cnt:705 -coverage: 92.012% pattern: 107 before: 167 now: 166 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 511, fault_cnt:633 -coverage: 92.060% pattern: 108 before: 166 now: 165 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:643 -coverage: 92.060% pattern: 108 before: 165 now: 165 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:625 -coverage: 92.060% pattern: 108 before: 165 now: 165 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:664 -coverage: 92.060% pattern: 108 before: 165 now: 165 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:674 -coverage: 92.060% pattern: 108 before: 165 now: 165 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:657 -coverage: 92.060% pattern: 108 before: 165 now: 165 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:643 -coverage: 92.060% pattern: 108 before: 165 now: 165 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:667 -coverage: 92.060% pattern: 108 before: 165 now: 165 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:659 -coverage: 92.060% pattern: 108 before: 165 now: 165 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:646 -coverage: 92.060% pattern: 108 before: 165 now: 165 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:633 -coverage: 92.060% pattern: 108 before: 165 now: 165 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:645 -coverage: 92.060% pattern: 108 before: 165 now: 165 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:657 -coverage: 92.060% pattern: 108 before: 165 now: 165 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:667 -coverage: 92.060% pattern: 108 before: 165 now: 165 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:653 -coverage: 92.060% pattern: 108 before: 165 now: 165 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:680 -coverage: 92.060% pattern: 108 before: 165 now: 165 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:654 -coverage: 92.060% pattern: 108 before: 165 now: 165 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:603 -coverage: 92.060% pattern: 108 before: 165 now: 165 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:632 -coverage: 92.060% pattern: 108 before: 165 now: 165 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:649 -coverage: 92.060% pattern: 108 before: 165 now: 165 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:649 -coverage: 92.060% pattern: 108 before: 165 now: 165 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:664 -coverage: 92.060% pattern: 108 before: 165 now: 165 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:685 -coverage: 92.060% pattern: 108 before: 165 now: 165 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:668 -coverage: 92.060% pattern: 108 before: 165 now: 165 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:675 -coverage: 92.060% pattern: 108 before: 165 now: 165 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:644 -coverage: 92.060% pattern: 108 before: 165 now: 165 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:606 -coverage: 92.060% pattern: 108 before: 165 now: 165 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:604 -coverage: 92.060% pattern: 108 before: 165 now: 165 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:637 -coverage: 92.060% pattern: 108 before: 165 now: 165 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:651 -coverage: 92.060% pattern: 108 before: 165 now: 165 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:647 -coverage: 92.060% pattern: 108 before: 165 now: 165 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:692 -coverage: 92.060% pattern: 108 before: 165 now: 165 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:661 -coverage: 92.060% pattern: 108 before: 165 now: 165 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:659 -coverage: 92.060% pattern: 108 before: 165 now: 165 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:648 -coverage: 92.060% pattern: 108 before: 165 now: 165 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:645 -coverage: 92.060% pattern: 108 before: 165 now: 165 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:660 -coverage: 92.060% pattern: 108 before: 165 now: 165 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:647 -coverage: 92.060% pattern: 108 before: 165 now: 165 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 511, fault_cnt:651 -coverage: 92.108% pattern: 109 before: 165 now: 164 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:676 -coverage: 92.108% pattern: 109 before: 164 now: 164 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:669 -coverage: 92.108% pattern: 109 before: 164 now: 164 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:641 -coverage: 92.108% pattern: 109 before: 164 now: 164 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:690 -coverage: 92.108% pattern: 109 before: 164 now: 164 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:668 -coverage: 92.108% pattern: 109 before: 164 now: 164 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:656 -coverage: 92.108% pattern: 109 before: 164 now: 164 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:678 -coverage: 92.108% pattern: 109 before: 164 now: 164 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:684 -coverage: 92.108% pattern: 109 before: 164 now: 164 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:644 -coverage: 92.108% pattern: 109 before: 164 now: 164 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:696 -coverage: 92.108% pattern: 109 before: 164 now: 164 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:658 -coverage: 92.108% pattern: 109 before: 164 now: 164 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:650 -coverage: 92.108% pattern: 109 before: 164 now: 164 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 511, fault_cnt:650 -coverage: 92.204% pattern: 110 before: 164 now: 162 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:624 -coverage: 92.204% pattern: 110 before: 162 now: 162 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:648 -coverage: 92.204% pattern: 110 before: 162 now: 162 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:645 -coverage: 92.204% pattern: 110 before: 162 now: 162 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:653 -coverage: 92.204% pattern: 110 before: 162 now: 162 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:672 -coverage: 92.204% pattern: 110 before: 162 now: 162 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:613 -coverage: 92.204% pattern: 110 before: 162 now: 162 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:654 -coverage: 92.204% pattern: 110 before: 162 now: 162 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:601 -coverage: 92.204% pattern: 110 before: 162 now: 162 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:653 -coverage: 92.204% pattern: 110 before: 162 now: 162 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:650 -coverage: 92.204% pattern: 110 before: 162 now: 162 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:602 -coverage: 92.204% pattern: 110 before: 162 now: 162 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:617 -coverage: 92.204% pattern: 110 before: 162 now: 162 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:680 -coverage: 92.204% pattern: 110 before: 162 now: 162 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:644 -coverage: 92.204% pattern: 110 before: 162 now: 162 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:682 -coverage: 92.204% pattern: 110 before: 162 now: 162 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:657 -coverage: 92.204% pattern: 110 before: 162 now: 162 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:644 -coverage: 92.204% pattern: 110 before: 162 now: 162 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:638 -coverage: 92.204% pattern: 110 before: 162 now: 162 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:639 -coverage: 92.204% pattern: 110 before: 162 now: 162 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 511, fault_cnt:665 -coverage: 92.300% pattern: 111 before: 162 now: 160 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:676 -coverage: 92.300% pattern: 111 before: 160 now: 160 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:658 -coverage: 92.300% pattern: 111 before: 160 now: 160 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:641 -coverage: 92.300% pattern: 111 before: 160 now: 160 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:639 -coverage: 92.300% pattern: 111 before: 160 now: 160 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:678 -coverage: 92.300% pattern: 111 before: 160 now: 160 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:671 -coverage: 92.300% pattern: 111 before: 160 now: 160 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:694 -coverage: 92.300% pattern: 111 before: 160 now: 160 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:660 -coverage: 92.300% pattern: 111 before: 160 now: 160 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:611 -coverage: 92.300% pattern: 111 before: 160 now: 160 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:651 -coverage: 92.300% pattern: 111 before: 160 now: 160 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:678 -coverage: 92.300% pattern: 111 before: 160 now: 160 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:646 -coverage: 92.300% pattern: 111 before: 160 now: 160 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:662 -coverage: 92.300% pattern: 111 before: 160 now: 160 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:666 -coverage: 92.300% pattern: 111 before: 160 now: 160 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:670 -coverage: 92.300% pattern: 111 before: 160 now: 160 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:608 -coverage: 92.300% pattern: 111 before: 160 now: 160 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:639 -coverage: 92.300% pattern: 111 before: 160 now: 160 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:652 -coverage: 92.300% pattern: 111 before: 160 now: 160 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:646 -coverage: 92.300% pattern: 111 before: 160 now: 160 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:639 -coverage: 92.300% pattern: 111 before: 160 now: 160 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:641 -coverage: 92.300% pattern: 111 before: 160 now: 160 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:634 -coverage: 92.300% pattern: 111 before: 160 now: 160 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:632 -coverage: 92.300% pattern: 111 before: 160 now: 160 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:617 -coverage: 92.300% pattern: 111 before: 160 now: 160 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:627 -coverage: 92.300% pattern: 111 before: 160 now: 160 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:628 -coverage: 92.300% pattern: 111 before: 160 now: 160 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:677 -coverage: 92.300% pattern: 111 before: 160 now: 160 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:620 -coverage: 92.300% pattern: 111 before: 160 now: 160 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:687 -coverage: 92.300% pattern: 111 before: 160 now: 160 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:603 -coverage: 92.300% pattern: 111 before: 160 now: 160 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:663 -coverage: 92.300% pattern: 111 before: 160 now: 160 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:646 -coverage: 92.300% pattern: 111 before: 160 now: 160 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:636 -coverage: 92.300% pattern: 111 before: 160 now: 160 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:673 -coverage: 92.300% pattern: 111 before: 160 now: 160 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:646 -coverage: 92.300% pattern: 111 before: 160 now: 160 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:676 -coverage: 92.300% pattern: 111 before: 160 now: 160 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:637 -coverage: 92.300% pattern: 111 before: 160 now: 160 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:680 -coverage: 92.300% pattern: 111 before: 160 now: 160 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:672 -coverage: 92.300% pattern: 111 before: 160 now: 160 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:680 -coverage: 92.300% pattern: 111 before: 160 now: 160 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:664 -coverage: 92.300% pattern: 111 before: 160 now: 160 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 511, fault_cnt:631 -coverage: 92.397% pattern: 112 before: 160 now: 158 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:686 -coverage: 92.397% pattern: 112 before: 158 now: 158 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:673 -coverage: 92.397% pattern: 112 before: 158 now: 158 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:631 -coverage: 92.397% pattern: 112 before: 158 now: 158 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:648 -coverage: 92.397% pattern: 112 before: 158 now: 158 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:626 -coverage: 92.397% pattern: 112 before: 158 now: 158 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:681 -coverage: 92.397% pattern: 112 before: 158 now: 158 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:669 -coverage: 92.397% pattern: 112 before: 158 now: 158 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:652 -coverage: 92.397% pattern: 112 before: 158 now: 158 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:656 -coverage: 92.397% pattern: 112 before: 158 now: 158 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:649 -coverage: 92.397% pattern: 112 before: 158 now: 158 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:650 -coverage: 92.397% pattern: 112 before: 158 now: 158 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:676 -coverage: 92.397% pattern: 112 before: 158 now: 158 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:664 -coverage: 92.397% pattern: 112 before: 158 now: 158 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:675 -coverage: 92.397% pattern: 112 before: 158 now: 158 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:627 -coverage: 92.397% pattern: 112 before: 158 now: 158 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:649 -coverage: 92.397% pattern: 112 before: 158 now: 158 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:634 -coverage: 92.397% pattern: 112 before: 158 now: 158 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 511, fault_cnt:662 -coverage: 92.445% pattern: 113 before: 158 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:643 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:630 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:679 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:595 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:676 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:627 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:654 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:594 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:674 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:660 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:576 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:675 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:655 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:640 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:666 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:638 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:642 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:639 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:642 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:650 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:628 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:700 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:645 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:645 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:657 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:697 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:626 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:632 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:662 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:670 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:651 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:674 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:647 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:700 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:648 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:647 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:638 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:684 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:657 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:637 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:598 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:667 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:599 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:628 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:644 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:685 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:667 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:646 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:646 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:660 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:631 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:637 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:652 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:627 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:647 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:645 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:659 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:634 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:633 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:626 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:646 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:650 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:638 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:678 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:680 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:658 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:655 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:641 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:633 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:618 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:640 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:613 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:614 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:639 -coverage: 92.445% pattern: 113 before: 157 now: 157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:18. flip_cnt: 0, stem_cnt: 511, fault_cnt:673 -coverage: 92.493% pattern: 114 before: 157 now: 156 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 511, fault_cnt:666 -coverage: 92.541% pattern: 115 before: 156 now: 155 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:657 -coverage: 92.541% pattern: 115 before: 155 now: 155 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:653 -coverage: 92.541% pattern: 115 before: 155 now: 155 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:677 -coverage: 92.541% pattern: 115 before: 155 now: 155 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:618 -coverage: 92.541% pattern: 115 before: 155 now: 155 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:648 -coverage: 92.541% pattern: 115 before: 155 now: 155 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:635 -coverage: 92.541% pattern: 115 before: 155 now: 155 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:691 -coverage: 92.541% pattern: 115 before: 155 now: 155 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:603 -coverage: 92.541% pattern: 115 before: 155 now: 155 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:652 -coverage: 92.541% pattern: 115 before: 155 now: 155 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:650 -coverage: 92.541% pattern: 115 before: 155 now: 155 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:635 -coverage: 92.541% pattern: 115 before: 155 now: 155 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:601 -coverage: 92.541% pattern: 115 before: 155 now: 155 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:623 -coverage: 92.541% pattern: 115 before: 155 now: 155 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:642 -coverage: 92.541% pattern: 115 before: 155 now: 155 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:639 -coverage: 92.541% pattern: 115 before: 155 now: 155 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:617 -coverage: 92.541% pattern: 115 before: 155 now: 155 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:662 -coverage: 92.541% pattern: 115 before: 155 now: 155 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:644 -coverage: 92.541% pattern: 115 before: 155 now: 155 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:608 -coverage: 92.541% pattern: 115 before: 155 now: 155 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:620 -coverage: 92.541% pattern: 115 before: 155 now: 155 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:695 -coverage: 92.541% pattern: 115 before: 155 now: 155 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:666 -coverage: 92.541% pattern: 115 before: 155 now: 155 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:624 -coverage: 92.541% pattern: 115 before: 155 now: 155 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:698 -coverage: 92.541% pattern: 115 before: 155 now: 155 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:640 -coverage: 92.541% pattern: 115 before: 155 now: 155 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:663 -coverage: 92.541% pattern: 115 before: 155 now: 155 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:647 -coverage: 92.541% pattern: 115 before: 155 now: 155 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:654 -coverage: 92.541% pattern: 115 before: 155 now: 155 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:639 -coverage: 92.541% pattern: 115 before: 155 now: 155 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:674 -coverage: 92.541% pattern: 115 before: 155 now: 155 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:656 -coverage: 92.541% pattern: 115 before: 155 now: 155 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 511, fault_cnt:649 -coverage: 92.589% pattern: 116 before: 155 now: 154 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:704 -coverage: 92.589% pattern: 116 before: 154 now: 154 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:634 -coverage: 92.589% pattern: 116 before: 154 now: 154 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:646 -coverage: 92.589% pattern: 116 before: 154 now: 154 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:655 -coverage: 92.589% pattern: 116 before: 154 now: 154 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:639 -coverage: 92.589% pattern: 116 before: 154 now: 154 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:671 -coverage: 92.589% pattern: 116 before: 154 now: 154 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:666 -coverage: 92.589% pattern: 116 before: 154 now: 154 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:618 -coverage: 92.589% pattern: 116 before: 154 now: 154 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:597 -coverage: 92.589% pattern: 116 before: 154 now: 154 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:9. flip_cnt: 0, stem_cnt: 511, fault_cnt:648 -coverage: 92.637% pattern: 117 before: 154 now: 153 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:676 -coverage: 92.637% pattern: 117 before: 153 now: 153 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:663 -coverage: 92.637% pattern: 117 before: 153 now: 153 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:650 -coverage: 92.637% pattern: 117 before: 153 now: 153 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:619 -coverage: 92.637% pattern: 117 before: 153 now: 153 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:647 -coverage: 92.637% pattern: 117 before: 153 now: 153 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:668 -coverage: 92.637% pattern: 117 before: 153 now: 153 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:636 -coverage: 92.637% pattern: 117 before: 153 now: 153 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:678 -coverage: 92.637% pattern: 117 before: 153 now: 153 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:649 -coverage: 92.637% pattern: 117 before: 153 now: 153 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:630 -coverage: 92.637% pattern: 117 before: 153 now: 153 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:636 -coverage: 92.637% pattern: 117 before: 153 now: 153 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:632 -coverage: 92.637% pattern: 117 before: 153 now: 153 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:643 -coverage: 92.637% pattern: 117 before: 153 now: 153 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:661 -coverage: 92.637% pattern: 117 before: 153 now: 153 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:647 -coverage: 92.637% pattern: 117 before: 153 now: 153 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:667 -coverage: 92.637% pattern: 117 before: 153 now: 153 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:625 -coverage: 92.637% pattern: 117 before: 153 now: 153 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:630 -coverage: 92.637% pattern: 117 before: 153 now: 153 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:672 -coverage: 92.637% pattern: 117 before: 153 now: 153 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:653 -coverage: 92.637% pattern: 117 before: 153 now: 153 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:691 -coverage: 92.637% pattern: 117 before: 153 now: 153 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:666 -coverage: 92.637% pattern: 117 before: 153 now: 153 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:630 -coverage: 92.637% pattern: 117 before: 153 now: 153 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:667 -coverage: 92.637% pattern: 117 before: 153 now: 153 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:670 -coverage: 92.637% pattern: 117 before: 153 now: 153 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:660 -coverage: 92.637% pattern: 117 before: 153 now: 153 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:677 -coverage: 92.637% pattern: 117 before: 153 now: 153 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:673 -coverage: 92.637% pattern: 117 before: 153 now: 153 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:680 -coverage: 92.637% pattern: 117 before: 153 now: 153 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:684 -coverage: 92.637% pattern: 117 before: 153 now: 153 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:642 -coverage: 92.637% pattern: 117 before: 153 now: 153 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:651 -coverage: 92.637% pattern: 117 before: 153 now: 153 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:630 -coverage: 92.637% pattern: 117 before: 153 now: 153 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:675 -coverage: 92.637% pattern: 117 before: 153 now: 153 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:620 -coverage: 92.637% pattern: 117 before: 153 now: 153 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 511, fault_cnt:714 -coverage: 92.685% pattern: 118 before: 153 now: 152 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:641 -coverage: 92.685% pattern: 118 before: 152 now: 152 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:660 -coverage: 92.685% pattern: 118 before: 152 now: 152 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:637 -coverage: 92.685% pattern: 118 before: 152 now: 152 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:588 -coverage: 92.685% pattern: 118 before: 152 now: 152 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:633 -coverage: 92.685% pattern: 118 before: 152 now: 152 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:655 -coverage: 92.685% pattern: 118 before: 152 now: 152 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 511, fault_cnt:665 -coverage: 92.733% pattern: 119 before: 152 now: 151 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:653 -coverage: 92.733% pattern: 119 before: 151 now: 151 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:663 -coverage: 92.733% pattern: 119 before: 151 now: 151 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:670 -coverage: 92.733% pattern: 119 before: 151 now: 151 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:666 -coverage: 92.733% pattern: 119 before: 151 now: 151 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:621 -coverage: 92.733% pattern: 119 before: 151 now: 151 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:633 -coverage: 92.733% pattern: 119 before: 151 now: 151 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:621 -coverage: 92.733% pattern: 119 before: 151 now: 151 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:660 -coverage: 92.733% pattern: 119 before: 151 now: 151 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:667 -coverage: 92.733% pattern: 119 before: 151 now: 151 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:628 -coverage: 92.733% pattern: 119 before: 151 now: 151 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:602 -coverage: 92.733% pattern: 119 before: 151 now: 151 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:635 -coverage: 92.733% pattern: 119 before: 151 now: 151 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:664 -coverage: 92.733% pattern: 119 before: 151 now: 151 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:619 -coverage: 92.733% pattern: 119 before: 151 now: 151 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:668 -coverage: 92.733% pattern: 119 before: 151 now: 151 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:665 -coverage: 92.733% pattern: 119 before: 151 now: 151 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:626 -coverage: 92.733% pattern: 119 before: 151 now: 151 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:629 -coverage: 92.733% pattern: 119 before: 151 now: 151 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:670 -coverage: 92.733% pattern: 119 before: 151 now: 151 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:642 -coverage: 92.733% pattern: 119 before: 151 now: 151 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:636 -coverage: 92.733% pattern: 119 before: 151 now: 151 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:614 -coverage: 92.733% pattern: 119 before: 151 now: 151 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:697 -coverage: 92.733% pattern: 119 before: 151 now: 151 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:650 -coverage: 92.733% pattern: 119 before: 151 now: 151 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:641 -coverage: 92.733% pattern: 119 before: 151 now: 151 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:666 -coverage: 92.733% pattern: 119 before: 151 now: 151 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:618 -coverage: 92.733% pattern: 119 before: 151 now: 151 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:645 -coverage: 92.733% pattern: 119 before: 151 now: 151 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:647 -coverage: 92.733% pattern: 119 before: 151 now: 151 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:662 -coverage: 92.733% pattern: 119 before: 151 now: 151 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:680 -coverage: 92.733% pattern: 119 before: 151 now: 151 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:589 -coverage: 92.733% pattern: 119 before: 151 now: 151 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:650 -coverage: 92.733% pattern: 119 before: 151 now: 151 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:642 -coverage: 92.733% pattern: 119 before: 151 now: 151 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:611 -coverage: 92.733% pattern: 119 before: 151 now: 151 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:660 -coverage: 92.733% pattern: 119 before: 151 now: 151 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:667 -coverage: 92.733% pattern: 119 before: 151 now: 151 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:602 -coverage: 92.733% pattern: 119 before: 151 now: 151 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:663 -coverage: 92.733% pattern: 119 before: 151 now: 151 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:646 -coverage: 92.733% pattern: 119 before: 151 now: 151 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:623 -coverage: 92.733% pattern: 119 before: 151 now: 151 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:648 -coverage: 92.733% pattern: 119 before: 151 now: 151 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:682 -coverage: 92.733% pattern: 119 before: 151 now: 151 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:651 -coverage: 92.733% pattern: 119 before: 151 now: 151 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:646 -coverage: 92.733% pattern: 119 before: 151 now: 151 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:667 -coverage: 92.733% pattern: 119 before: 151 now: 151 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:673 -coverage: 92.733% pattern: 119 before: 151 now: 151 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:640 -coverage: 92.733% pattern: 119 before: 151 now: 151 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:640 -coverage: 92.733% pattern: 119 before: 151 now: 151 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:629 -coverage: 92.733% pattern: 119 before: 151 now: 151 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:658 -coverage: 92.733% pattern: 119 before: 151 now: 151 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:653 -coverage: 92.733% pattern: 119 before: 151 now: 151 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:629 -coverage: 92.733% pattern: 119 before: 151 now: 151 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:686 -coverage: 92.733% pattern: 119 before: 151 now: 151 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:632 -coverage: 92.733% pattern: 119 before: 151 now: 151 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:660 -coverage: 92.733% pattern: 119 before: 151 now: 151 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:589 -coverage: 92.733% pattern: 119 before: 151 now: 151 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:638 -coverage: 92.733% pattern: 119 before: 151 now: 151 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:501. flip_cnt: 0, stem_cnt: 511, fault_cnt:690 -coverage: 94.273% pattern: 120 before: 151 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:653 -coverage: 94.273% pattern: 120 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:640 -coverage: 94.273% pattern: 120 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:599 -coverage: 94.273% pattern: 120 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:631 -coverage: 94.273% pattern: 120 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:601 -coverage: 94.273% pattern: 120 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:656 -coverage: 94.273% pattern: 120 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:649 -coverage: 94.273% pattern: 120 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:611 -coverage: 94.273% pattern: 120 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:630 -coverage: 94.273% pattern: 120 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:649 -coverage: 94.273% pattern: 120 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:690 -coverage: 94.273% pattern: 120 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:643 -coverage: 94.273% pattern: 120 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:700 -coverage: 94.273% pattern: 120 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:644 -coverage: 94.273% pattern: 120 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:659 -coverage: 94.273% pattern: 120 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:636 -coverage: 94.273% pattern: 120 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:683 -coverage: 94.273% pattern: 120 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:639 -coverage: 94.273% pattern: 120 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:651 -coverage: 94.273% pattern: 120 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:657 -coverage: 94.273% pattern: 120 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:663 -coverage: 94.273% pattern: 120 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:653 -coverage: 94.273% pattern: 120 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:666 -coverage: 94.273% pattern: 120 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:649 -coverage: 94.273% pattern: 120 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:689 -coverage: 94.273% pattern: 120 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:644 -coverage: 94.273% pattern: 120 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:635 -coverage: 94.273% pattern: 120 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:681 -coverage: 94.273% pattern: 120 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:648 -coverage: 94.273% pattern: 120 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:664 -coverage: 94.273% pattern: 120 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:648 -coverage: 94.273% pattern: 120 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:669 -coverage: 94.273% pattern: 120 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:653 -coverage: 94.273% pattern: 120 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:659 -coverage: 94.273% pattern: 120 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:654 -coverage: 94.273% pattern: 120 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:672 -coverage: 94.273% pattern: 120 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:675 -coverage: 94.273% pattern: 120 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:647 -coverage: 94.273% pattern: 120 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 511, fault_cnt:656 -coverage: 94.321% pattern: 121 before: 119 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:656 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:668 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:636 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:635 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:624 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:660 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:684 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:632 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:652 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:649 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:653 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:629 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:652 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:596 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:648 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:668 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:648 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:644 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:633 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:662 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:672 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:669 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:658 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:666 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:652 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:653 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:661 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:632 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:648 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:665 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:603 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:635 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:672 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:625 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:650 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:649 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:651 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:659 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:620 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:651 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:638 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:648 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:700 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:614 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:645 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:625 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:646 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:626 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:674 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:672 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:667 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:611 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:665 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:645 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:692 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:640 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:659 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:597 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:649 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:636 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:645 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:628 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:638 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:688 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:634 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:623 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:702 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:664 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:661 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:624 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:649 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:677 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:666 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:650 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:637 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:644 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:656 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:654 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:609 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:663 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:654 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:679 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:656 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:680 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:662 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:672 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:678 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:658 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:672 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:663 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:645 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:653 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:648 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:650 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:654 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:646 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:646 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:659 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:639 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:639 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:613 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:664 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:661 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:658 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:643 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:667 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:698 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:647 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:638 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:619 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:618 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:662 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:651 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:669 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:648 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:673 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:658 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:665 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:663 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:644 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:623 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:645 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:669 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:675 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:637 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:662 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:660 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:663 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:673 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:655 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:645 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:653 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:655 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:629 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:627 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:665 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:666 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:641 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:634 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:667 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:634 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:585 -coverage: 94.321% pattern: 121 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 511, fault_cnt:685 -coverage: 94.370% pattern: 122 before: 118 now: 117 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:647 -coverage: 94.370% pattern: 122 before: 117 now: 117 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:658 -coverage: 94.370% pattern: 122 before: 117 now: 117 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:634 -coverage: 94.370% pattern: 122 before: 117 now: 117 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:657 -coverage: 94.370% pattern: 122 before: 117 now: 117 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:641 -coverage: 94.370% pattern: 122 before: 117 now: 117 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:644 -coverage: 94.370% pattern: 122 before: 117 now: 117 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:649 -coverage: 94.370% pattern: 122 before: 117 now: 117 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:649 -coverage: 94.370% pattern: 122 before: 117 now: 117 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:666 -coverage: 94.370% pattern: 122 before: 117 now: 117 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:636 -coverage: 94.370% pattern: 122 before: 117 now: 117 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:671 -coverage: 94.370% pattern: 122 before: 117 now: 117 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:647 -coverage: 94.370% pattern: 122 before: 117 now: 117 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:616 -coverage: 94.370% pattern: 122 before: 117 now: 117 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:647 -coverage: 94.370% pattern: 122 before: 117 now: 117 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:642 -coverage: 94.370% pattern: 122 before: 117 now: 117 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:633 -coverage: 94.370% pattern: 122 before: 117 now: 117 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:639 -coverage: 94.370% pattern: 122 before: 117 now: 117 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:638 -coverage: 94.370% pattern: 122 before: 117 now: 117 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:627 -coverage: 94.370% pattern: 122 before: 117 now: 117 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:649 -coverage: 94.370% pattern: 122 before: 117 now: 117 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:640 -coverage: 94.370% pattern: 122 before: 117 now: 117 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:680 -coverage: 94.370% pattern: 122 before: 117 now: 117 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:651 -coverage: 94.370% pattern: 122 before: 117 now: 117 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:626 -coverage: 94.370% pattern: 122 before: 117 now: 117 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:642 -coverage: 94.370% pattern: 122 before: 117 now: 117 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:650 -coverage: 94.370% pattern: 122 before: 117 now: 117 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:657 -coverage: 94.370% pattern: 122 before: 117 now: 117 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:606 -coverage: 94.370% pattern: 122 before: 117 now: 117 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:665 -coverage: 94.370% pattern: 122 before: 117 now: 117 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:650 -coverage: 94.370% pattern: 122 before: 117 now: 117 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:664 -coverage: 94.370% pattern: 122 before: 117 now: 117 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:663 -coverage: 94.370% pattern: 122 before: 117 now: 117 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:664 -coverage: 94.370% pattern: 122 before: 117 now: 117 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:677 -coverage: 94.370% pattern: 122 before: 117 now: 117 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:673 -coverage: 94.370% pattern: 122 before: 117 now: 117 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:14. flip_cnt: 0, stem_cnt: 511, fault_cnt:660 -coverage: 94.418% pattern: 123 before: 117 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:647 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:634 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:650 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:629 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:660 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:669 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:675 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:633 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:681 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:643 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:619 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:652 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:662 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:646 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:642 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:635 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:650 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:675 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:694 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:612 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:644 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:669 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:639 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:607 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:644 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:636 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:681 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:665 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:635 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:633 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:652 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:627 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:637 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:668 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:649 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:683 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:629 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:637 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:643 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:672 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:650 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:681 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:602 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:622 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:628 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:641 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:662 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:644 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:648 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:658 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:636 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:636 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:661 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:642 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:627 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:659 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:691 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:656 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:690 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:677 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:651 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:624 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:641 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:624 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:625 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:618 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:654 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:683 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:643 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:652 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:652 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:627 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:660 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:642 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:667 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:613 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:660 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:649 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:665 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:660 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:685 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:692 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:666 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:631 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:623 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:664 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:623 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:630 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:675 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:664 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:683 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:671 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:682 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:641 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:645 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:647 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:627 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:632 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:635 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:644 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:632 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:637 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:676 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:646 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:641 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:681 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:624 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 511, fault_cnt:639 -coverage: 94.418% pattern: 123 before: 116 now: 116 -checking valid circuit ... result: 1. diff --git a/exp_result/ATPG-LS_b13.bench.txt b/exp_result/ATPG-LS_b13.bench.txt deleted file mode 100644 index 17f4682..0000000 --- a/exp_result/ATPG-LS_b13.bench.txt +++ /dev/null @@ -1,108628 +0,0 @@ -make: 'atpg' is up to date. -======================== -parsing file ./benchmark/b13.bench ... Done. -====== Circuit Statistics ====== -PI: 63 -PO: 63 -Gate: 322 -Stem: 187 -Level: 3 -================================ -[SOL] flip: 0, stem: 0, fault:2149. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 34.783% pattern: 1 before: 644 now: 420 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:900. flip_cnt: 0, stem_cnt: 187, fault_cnt:245 -coverage: 59.627% pattern: 2 before: 420 now: 260 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:627. flip_cnt: 0, stem_cnt: 187, fault_cnt:252 -coverage: 70.807% pattern: 3 before: 260 now: 188 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:433. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 75.311% pattern: 4 before: 188 now: 159 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:369. flip_cnt: 0, stem_cnt: 187, fault_cnt:238 -coverage: 81.832% pattern: 5 before: 159 now: 117 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 83.851% pattern: 6 before: 117 now: 104 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:209. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 85.559% pattern: 7 before: 104 now: 93 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:122. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 86.801% pattern: 8 before: 93 now: 85 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:90. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 89.286% pattern: 9 before: 85 now: 69 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:18. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 89.907% pattern: 10 before: 69 now: 65 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:37. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 92.236% pattern: 11 before: 65 now: 50 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 92.236% pattern: 11 before: 50 now: 50 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:141. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 93.634% pattern: 12 before: 50 now: 41 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 93.789% pattern: 13 before: 41 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 94.255% pattern: 14 before: 40 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:21. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 94.720% pattern: 15 before: 37 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 94.876% pattern: 16 before: 34 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 95.186% pattern: 17 before: 33 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:7. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 95.342% pattern: 18 before: 31 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 187, fault_cnt:203 -coverage: 95.497% pattern: 19 before: 30 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 95.652% pattern: 20 before: 29 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:7. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 95.963% pattern: 21 before: 28 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:9. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 96.118% pattern: 22 before: 26 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 96.118% pattern: 22 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:11. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 96.273% pattern: 23 before: 25 now: 24 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 96.273% pattern: 23 before: 24 now: 24 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 96.273% pattern: 23 before: 24 now: 24 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 187, fault_cnt:243 -coverage: 96.739% pattern: 24 before: 24 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 96.739% pattern: 24 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 96.739% pattern: 24 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:1. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 96.894% pattern: 25 before: 21 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 96.894% pattern: 25 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 96.894% pattern: 25 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 96.894% pattern: 25 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:8. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 97.050% pattern: 26 before: 20 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 97.050% pattern: 26 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 97.050% pattern: 26 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 97.050% pattern: 26 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 97.050% pattern: 26 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:247 -coverage: 97.050% pattern: 26 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 97.050% pattern: 26 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 97.050% pattern: 26 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 97.050% pattern: 26 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 97.050% pattern: 26 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 97.050% pattern: 26 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 97.050% pattern: 26 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 97.050% pattern: 26 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 97.050% pattern: 26 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 97.205% pattern: 27 before: 19 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:203 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:201 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:201 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 97.205% pattern: 27 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:21. flip_cnt: 0, stem_cnt: 187, fault_cnt:238 -coverage: 97.671% pattern: 28 before: 18 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:244 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:203 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 97.671% pattern: 28 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:85. flip_cnt: 0, stem_cnt: 187, fault_cnt:245 -coverage: 98.447% pattern: 29 before: 15 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:249 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:246 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:247 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:242 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:242 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:243 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:237 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:244 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:239 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:248 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:201 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:236 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:236 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:243 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:237 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:236 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:236 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:246 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:249 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:236 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:239 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:242 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:244 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:200 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:244 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:243 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:239 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:245 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:240 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:240 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:202 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:242 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:243 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:246 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:248 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:243 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:248 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:203 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:201 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:248 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:246 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:241 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:252 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:244 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:248 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:199 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:242 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:245 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:203 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:243 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:244 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:249 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:242 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:240 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:250 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:237 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:246 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:241 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:239 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:238 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:244 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:241 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:237 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:237 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:252 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:240 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:245 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:203 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:247 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:248 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:236 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:242 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:243 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:245 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:243 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:248 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:243 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:247 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:243 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:245 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:248 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:203 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:236 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:245 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:202 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:242 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:242 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:245 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:244 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:200 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:245 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:196 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:247 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:246 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:249 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:200 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:239 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:245 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:202 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:238 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:255 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:247 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:251 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:251 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:249 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:201 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:240 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:248 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:237 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:201 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:250 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:243 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:202 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:247 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:239 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:237 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:246 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:241 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:236 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:243 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:248 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:244 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:244 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:197 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:251 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:241 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:236 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:238 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:243 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:240 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:260 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:236 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:241 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:202 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:238 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:250 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:243 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:242 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:243 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:202 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:243 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.447% pattern: 29 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:15. flip_cnt: 0, stem_cnt: 187, fault_cnt:240 -coverage: 98.602% pattern: 30 before: 10 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:246 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:241 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:245 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:240 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:241 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:236 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:244 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:203 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:240 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:201 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:250 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:237 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:203 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:243 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:244 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:241 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:248 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:247 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:240 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:236 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:240 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:245 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:238 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:240 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:250 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:252 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:246 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:238 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:249 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:242 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:248 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:244 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:243 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:245 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:242 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:248 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:243 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:240 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:241 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:238 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:249 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:239 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:242 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:249 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:239 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:241 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:245 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:236 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:244 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:239 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:243 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:236 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:244 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:243 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:199 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:243 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:201 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:242 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:251 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:248 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:200 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:241 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:242 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:248 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:244 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:239 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:198 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:252 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:248 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:239 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:247 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:250 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:237 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:252 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:248 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:247 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:245 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:243 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:200 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:203 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:237 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:243 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:244 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:238 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:247 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:238 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:203 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:251 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:236 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:245 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:243 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:239 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:239 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:244 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:245 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:240 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:244 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:237 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:241 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:238 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:245 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:236 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:239 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:203 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:199 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:250 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:249 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:245 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:240 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:247 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:242 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:246 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:240 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:199 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:245 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:251 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:244 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:203 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:241 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:246 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:238 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:249 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:237 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:245 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:240 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:238 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:239 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:250 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:250 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:238 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:236 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:244 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:202 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:252 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:236 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:246 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:241 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:252 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:245 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:241 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:247 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:203 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:241 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:202 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:202 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:249 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:245 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:254 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:236 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:241 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:242 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:201 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:236 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:237 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:251 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:250 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:243 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:248 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:241 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:244 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:240 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:241 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:241 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:202 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:237 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:244 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:245 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:239 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:245 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:237 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:246 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:238 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:245 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:237 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:247 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:248 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:236 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:244 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:245 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:248 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:241 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:244 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:239 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:237 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:248 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:236 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:243 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:239 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:248 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:203 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:237 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:248 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:245 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:252 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:248 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:244 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:203 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:245 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:199 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:237 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:237 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:243 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:242 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:242 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:236 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:203 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:244 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:238 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:238 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:239 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:199 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:202 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:202 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:203 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:246 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:236 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:236 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:236 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:244 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:236 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:237 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:250 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:240 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:244 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:244 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:238 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:236 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:236 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:240 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:241 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:254 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:246 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:236 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:247 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:245 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:246 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:203 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:246 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:244 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:203 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:247 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:241 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:201 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:246 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:251 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:245 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:256 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:248 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:238 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:238 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:245 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:246 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:203 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:203 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:202 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:236 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:199 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:252 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:242 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:243 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:243 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:239 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:203 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:248 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:242 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:241 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:244 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:236 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:247 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:241 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:253 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:242 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:244 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:240 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:246 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:247 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:252 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:250 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:236 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:242 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:237 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:239 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:236 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:246 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:249 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:241 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:249 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:203 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:244 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:203 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:249 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:241 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:249 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:245 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:203 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:242 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:244 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:245 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:247 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:200 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:242 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:242 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:239 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:245 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:248 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:244 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:203 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:243 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:245 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:250 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:247 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:250 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:237 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:237 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:246 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:238 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:236 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:249 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:251 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:248 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:254 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:244 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:239 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:245 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:241 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:236 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:244 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:241 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:243 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:248 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:243 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:236 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:246 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:236 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:247 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:198 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:244 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:246 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:241 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:239 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:238 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:248 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:239 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:201 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:236 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:201 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:236 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:202 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:251 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:236 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:248 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:250 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:243 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:248 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:244 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:246 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:236 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:247 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:238 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:203 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:202 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:202 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:245 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:236 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:252 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:237 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:202 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:236 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:248 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:238 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:239 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:245 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:236 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:244 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:245 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:238 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:237 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:239 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:246 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:241 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:243 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:250 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:240 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:249 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:238 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:245 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:245 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:238 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:203 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:239 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:197 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:242 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:245 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:239 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:239 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:245 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:238 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:248 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:242 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:236 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:201 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:241 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:246 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:240 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:252 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:248 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:241 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:244 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:203 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:249 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:237 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:245 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:203 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:245 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:254 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:245 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:236 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:203 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:249 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:203 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:245 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:252 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:245 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:239 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:254 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:249 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:203 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:201 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:238 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:247 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:244 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:245 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:247 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:202 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:241 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:254 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:243 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:241 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:255 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:255 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:201 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:236 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:253 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:238 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:238 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:249 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:244 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:237 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:238 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:238 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:200 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:248 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:239 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:248 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:247 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:246 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:246 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:240 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:249 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:246 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:239 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:242 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:237 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:236 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:237 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:246 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:246 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:240 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:251 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:244 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:236 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:203 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:245 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:247 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:242 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:240 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:246 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:198 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:200 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:237 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:242 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:249 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:203 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:247 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:202 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:245 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:239 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:244 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:237 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:244 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:236 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:244 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:236 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:237 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:238 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:240 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:245 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:240 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:251 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:242 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:244 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:238 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:241 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:236 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:237 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:244 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:247 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:241 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:249 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:248 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:237 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:237 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:236 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:252 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:250 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:247 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:240 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:252 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:236 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:237 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:247 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:237 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:239 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:241 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:248 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:200 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:245 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:202 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:241 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:241 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:241 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:250 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:202 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:254 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:236 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:203 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:242 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:242 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:244 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:242 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:243 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:244 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:249 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:202 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:236 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:201 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:246 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:249 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:250 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:245 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:237 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:236 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:239 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:249 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:246 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:237 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:243 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:239 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:245 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:244 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:245 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:244 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:238 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:240 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:244 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:258 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:249 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:251 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:247 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:246 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:249 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:251 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:239 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:246 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:242 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:240 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:240 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:250 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:242 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:251 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:251 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:239 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:236 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:241 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:241 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:242 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:249 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:246 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:237 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:201 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:244 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:244 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:248 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:242 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:241 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:254 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:246 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:253 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:240 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:203 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:238 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:240 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:246 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:240 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:237 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:236 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:255 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:239 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:245 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:236 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:245 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:242 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:248 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:245 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:246 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:249 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:238 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:237 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:236 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:245 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:245 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:242 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:241 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:247 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:200 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:242 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:203 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:240 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:246 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:252 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:241 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:246 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:203 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:237 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:206 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:207 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:234 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:211 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:238 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:232 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:241 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:233 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:199 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:210 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:209 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:202 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:205 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216 -coverage: 98.602% pattern: 30 before: 9 now: 9 -checking valid circuit ... result: 1. diff --git a/exp_result/ATPG-LS_b17.bench.txt b/exp_result/ATPG-LS_b17.bench.txt deleted file mode 100644 index 89f92ec..0000000 --- a/exp_result/ATPG-LS_b17.bench.txt +++ /dev/null @@ -1,10 +0,0 @@ -make: 'atpg' is up to date. -======================== -parsing file ./benchmark/b17.bench ... Done. -====== Circuit Statistics ====== -PI: 1452 -PO: 1512 -Gate: 23710 -Stem: 8257 -Level: 7 -================================ diff --git a/exp_result/ATPG-LS_b20.bench.txt b/exp_result/ATPG-LS_b20.bench.txt deleted file mode 100644 index 08ec913..0000000 --- a/exp_result/ATPG-LS_b20.bench.txt +++ /dev/null @@ -1,79 +0,0 @@ -make: 'atpg' is up to date. -======================== -parsing file ./benchmark/b20.bench ... Done. -====== Circuit Statistics ====== -PI: 522 -PO: 512 -Gate: 8734 -Stem: 3428 -Level: 7 -================================ -[SOL] flip: 0, stem: 0, fault:49107. flip_cnt: 0, stem_cnt: 3428, fault_cnt:3179 -coverage: 18.199% pattern: 1 before: 17468 now: 14289 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:28816. flip_cnt: 0, stem_cnt: 3428, fault_cnt:3009 -coverage: 27.908% pattern: 2 before: 14289 now: 12593 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:31154. flip_cnt: 0, stem_cnt: 3428, fault_cnt:3635 -coverage: 37.423% pattern: 3 before: 12593 now: 10931 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:7652. flip_cnt: 0, stem_cnt: 3428, fault_cnt:2945 -coverage: 39.873% pattern: 4 before: 10931 now: 10503 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:3885. flip_cnt: 0, stem_cnt: 3428, fault_cnt:3014 -coverage: 41.127% pattern: 5 before: 10503 now: 10284 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:5760. flip_cnt: 0, stem_cnt: 3428, fault_cnt:3259 -coverage: 42.896% pattern: 6 before: 10284 now: 9975 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:1034. flip_cnt: 0, stem_cnt: 3428, fault_cnt:3045 -coverage: 43.222% pattern: 7 before: 9975 now: 9918 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:1011. flip_cnt: 0, stem_cnt: 3428, fault_cnt:2979 -coverage: 43.537% pattern: 8 before: 9918 now: 9863 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:381. flip_cnt: 0, stem_cnt: 3428, fault_cnt:2987 -coverage: 43.657% pattern: 9 before: 9863 now: 9842 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:10489. flip_cnt: 0, stem_cnt: 3428, fault_cnt:3399 -coverage: 46.823% pattern: 10 before: 9842 now: 9289 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:153. flip_cnt: 0, stem_cnt: 3428, fault_cnt:2905 -coverage: 46.874% pattern: 11 before: 9289 now: 9280 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:5681. flip_cnt: 0, stem_cnt: 3428, fault_cnt:3417 -coverage: 48.586% pattern: 12 before: 9280 now: 8981 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:63. flip_cnt: 0, stem_cnt: 3428, fault_cnt:3038 -coverage: 48.615% pattern: 13 before: 8981 now: 8976 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 3428, fault_cnt:2944 -coverage: 48.632% pattern: 14 before: 8976 now: 8973 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 3428, fault_cnt:3002 -coverage: 48.655% pattern: 15 before: 8973 now: 8969 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:23. flip_cnt: 0, stem_cnt: 3428, fault_cnt:2898 -coverage: 48.666% pattern: 16 before: 8969 now: 8967 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 3428, fault_cnt:3189 -coverage: 48.683% pattern: 17 before: 8967 now: 8964 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 3428, fault_cnt:3016 -coverage: 48.683% pattern: 17 before: 8964 now: 8964 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 3428, fault_cnt:2987 -coverage: 48.683% pattern: 17 before: 8964 now: 8964 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 3428, fault_cnt:3030 -coverage: 48.695% pattern: 18 before: 8964 now: 8962 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 3428, fault_cnt:3133 -coverage: 48.695% pattern: 18 before: 8962 now: 8962 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:874. flip_cnt: 0, stem_cnt: 3428, fault_cnt:3187 -coverage: 48.958% pattern: 19 before: 8962 now: 8916 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 3428, fault_cnt:3076 -coverage: 48.958% pattern: 19 before: 8916 now: 8916 -checking valid circuit ... result: 1. diff --git a/exp_result/ATPG-LS_b21.bench.txt b/exp_result/ATPG-LS_b21.bench.txt deleted file mode 100644 index 085bc20..0000000 --- a/exp_result/ATPG-LS_b21.bench.txt +++ /dev/null @@ -1,76 +0,0 @@ -make: 'atpg' is up to date. -======================== -parsing file ./benchmark/b21.bench ... Done. -====== Circuit Statistics ====== -PI: 522 -PO: 512 -Gate: 8995 -Stem: 3647 -Level: 8 -================================ -[SOL] flip: 0, stem: 0, fault:51387. flip_cnt: 0, stem_cnt: 3647, fault_cnt:2917 -coverage: 16.215% pattern: 1 before: 17990 now: 15073 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:31083. flip_cnt: 0, stem_cnt: 3647, fault_cnt:2990 -coverage: 26.148% pattern: 2 before: 15073 now: 13286 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:13816. flip_cnt: 0, stem_cnt: 3647, fault_cnt:2964 -coverage: 30.812% pattern: 3 before: 13286 now: 12447 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:8210. flip_cnt: 0, stem_cnt: 3647, fault_cnt:2890 -coverage: 33.346% pattern: 4 before: 12447 now: 11991 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:14317. flip_cnt: 0, stem_cnt: 3647, fault_cnt:3232 -coverage: 37.599% pattern: 5 before: 11991 now: 11226 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:2900. flip_cnt: 0, stem_cnt: 3647, fault_cnt:2982 -coverage: 38.471% pattern: 6 before: 11226 now: 11069 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:1253. flip_cnt: 0, stem_cnt: 3647, fault_cnt:3028 -coverage: 38.844% pattern: 7 before: 11069 now: 11002 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:3176. flip_cnt: 0, stem_cnt: 3647, fault_cnt:2858 -coverage: 39.789% pattern: 8 before: 11002 now: 10832 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:5492. flip_cnt: 0, stem_cnt: 3647, fault_cnt:3168 -coverage: 41.401% pattern: 9 before: 10832 now: 10542 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:290. flip_cnt: 0, stem_cnt: 3647, fault_cnt:2893 -coverage: 41.501% pattern: 10 before: 10542 now: 10524 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:382. flip_cnt: 0, stem_cnt: 3647, fault_cnt:2988 -coverage: 41.618% pattern: 11 before: 10524 now: 10503 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:191. flip_cnt: 0, stem_cnt: 3647, fault_cnt:2956 -coverage: 41.679% pattern: 12 before: 10503 now: 10492 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:152. flip_cnt: 0, stem_cnt: 3647, fault_cnt:2804 -coverage: 41.723% pattern: 13 before: 10492 now: 10484 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:1750. flip_cnt: 0, stem_cnt: 3647, fault_cnt:2770 -coverage: 42.240% pattern: 14 before: 10484 now: 10391 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:78. flip_cnt: 0, stem_cnt: 3647, fault_cnt:2984 -coverage: 42.268% pattern: 15 before: 10391 now: 10386 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 3647, fault_cnt:2959 -coverage: 42.279% pattern: 16 before: 10386 now: 10384 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 3647, fault_cnt:2897 -coverage: 42.279% pattern: 16 before: 10384 now: 10384 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:3610. flip_cnt: 0, stem_cnt: 3647, fault_cnt:3191 -coverage: 43.335% pattern: 17 before: 10384 now: 10194 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:513. flip_cnt: 0, stem_cnt: 3647, fault_cnt:3083 -coverage: 43.485% pattern: 18 before: 10194 now: 10167 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 3647, fault_cnt:2897 -coverage: 43.513% pattern: 19 before: 10167 now: 10162 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:1501. flip_cnt: 0, stem_cnt: 3647, fault_cnt:2843 -coverage: 43.952% pattern: 20 before: 10162 now: 10083 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:4629. flip_cnt: 0, stem_cnt: 3647, fault_cnt:3206 -coverage: 45.309% pattern: 21 before: 10083 now: 9839 -checking valid circuit ... result: 1. diff --git a/exp_result/ATPG-LS_b22.bench.txt b/exp_result/ATPG-LS_b22.bench.txt deleted file mode 100644 index 73df137..0000000 --- a/exp_result/ATPG-LS_b22.bench.txt +++ /dev/null @@ -1,22 +0,0 @@ -make: 'atpg' is up to date. -======================== -parsing file ./benchmark/b22.bench ... Done. -====== Circuit Statistics ====== -PI: 767 -PO: 757 -Gate: 13721 -Stem: 5379 -Level: 8 -================================ -[SOL] flip: 0, stem: 0, fault:75481. flip_cnt: 0, stem_cnt: 5379, fault_cnt:4379 -coverage: 15.957% pattern: 1 before: 27442 now: 23063 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:42481. flip_cnt: 0, stem_cnt: 5379, fault_cnt:4587 -coverage: 24.299% pattern: 2 before: 23063 now: 20774 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19160. flip_cnt: 0, stem_cnt: 5379, fault_cnt:4476 -coverage: 28.613% pattern: 3 before: 20774 now: 19590 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:10322. flip_cnt: 0, stem_cnt: 5379, fault_cnt:4248 -coverage: 30.701% pattern: 4 before: 19590 now: 19017 -checking valid circuit ... result: 1. diff --git a/exp_result/ATPG-LS_c1355.bench.txt b/exp_result/ATPG-LS_c1355.bench.txt deleted file mode 100644 index 37deda7..0000000 --- a/exp_result/ATPG-LS_c1355.bench.txt +++ /dev/null @@ -1,12233 +0,0 @@ -make: 'atpg' is up to date. -======================== -parsing file ./benchmark/c1355.bench ... Done. -====== Circuit Statistics ====== -PI: 41 -PO: 32 -Gate: 587 -Stem: 299 -Level: 7 -================================ -[SOL] flip: 0, stem: 0, fault:2347. flip_cnt: 0, stem_cnt: 299, fault_cnt:192 -coverage: 16.354% pattern: 1 before: 1174 now: 982 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:902. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 24.702% pattern: 2 before: 982 now: 884 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:614. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 30.239% pattern: 3 before: 884 now: 819 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:1689. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 38.330% pattern: 4 before: 819 now: 724 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 38.330% pattern: 4 before: 724 now: 724 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:2508. flip_cnt: 0, stem_cnt: 299, fault_cnt:361 -coverage: 49.574% pattern: 5 before: 724 now: 592 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:1174. flip_cnt: 0, stem_cnt: 299, fault_cnt:287 -coverage: 54.855% pattern: 6 before: 592 now: 530 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 54.855% pattern: 6 before: 530 now: 530 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:1368. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 60.988% pattern: 7 before: 530 now: 458 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 60.988% pattern: 7 before: 458 now: 458 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:703. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 64.140% pattern: 8 before: 458 now: 421 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:1938. flip_cnt: 0, stem_cnt: 299, fault_cnt:462 -coverage: 72.828% pattern: 9 before: 421 now: 319 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:513. flip_cnt: 0, stem_cnt: 299, fault_cnt:292 -coverage: 75.128% pattern: 10 before: 319 now: 292 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:114. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 75.639% pattern: 11 before: 292 now: 286 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:494. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 77.853% pattern: 12 before: 286 now: 260 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 77.853% pattern: 12 before: 260 now: 260 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 77.853% pattern: 12 before: 260 now: 260 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 77.853% pattern: 12 before: 260 now: 260 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:1064. flip_cnt: 0, stem_cnt: 299, fault_cnt:467 -coverage: 82.624% pattern: 13 before: 260 now: 204 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 82.794% pattern: 14 before: 204 now: 202 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 82.794% pattern: 14 before: 202 now: 202 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:228. flip_cnt: 0, stem_cnt: 299, fault_cnt:357 -coverage: 83.816% pattern: 15 before: 202 now: 190 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 83.816% pattern: 15 before: 190 now: 190 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:247. flip_cnt: 0, stem_cnt: 299, fault_cnt:361 -coverage: 84.923% pattern: 16 before: 190 now: 177 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 299, fault_cnt:358 -coverage: 85.349% pattern: 17 before: 177 now: 172 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:228. flip_cnt: 0, stem_cnt: 299, fault_cnt:450 -coverage: 86.371% pattern: 18 before: 172 now: 160 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 86.371% pattern: 18 before: 160 now: 160 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 86.371% pattern: 18 before: 160 now: 160 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 86.371% pattern: 18 before: 160 now: 160 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 86.371% pattern: 18 before: 160 now: 160 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 86.371% pattern: 18 before: 160 now: 160 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 299, fault_cnt:365 -coverage: 86.457% pattern: 19 before: 160 now: 159 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 86.457% pattern: 19 before: 159 now: 159 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 86.457% pattern: 19 before: 159 now: 159 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 86.712% pattern: 20 before: 159 now: 156 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 299, fault_cnt:289 -coverage: 86.882% pattern: 21 before: 156 now: 154 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 86.882% pattern: 21 before: 154 now: 154 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:114. flip_cnt: 0, stem_cnt: 299, fault_cnt:358 -coverage: 87.394% pattern: 22 before: 154 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:152. flip_cnt: 0, stem_cnt: 299, fault_cnt:445 -coverage: 88.075% pattern: 23 before: 148 now: 140 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 88.075% pattern: 23 before: 140 now: 140 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 88.075% pattern: 23 before: 140 now: 140 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 88.330% pattern: 24 before: 140 now: 137 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 299, fault_cnt:365 -coverage: 88.416% pattern: 25 before: 137 now: 136 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:359 -coverage: 88.416% pattern: 25 before: 136 now: 136 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 88.416% pattern: 25 before: 136 now: 136 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 299, fault_cnt:366 -coverage: 88.501% pattern: 26 before: 136 now: 135 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 88.501% pattern: 26 before: 135 now: 135 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:351 -coverage: 88.501% pattern: 26 before: 135 now: 135 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 88.501% pattern: 26 before: 135 now: 135 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 88.501% pattern: 26 before: 135 now: 135 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 88.501% pattern: 26 before: 135 now: 135 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 88.501% pattern: 26 before: 135 now: 135 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 88.501% pattern: 26 before: 135 now: 135 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:152. flip_cnt: 0, stem_cnt: 299, fault_cnt:458 -coverage: 89.182% pattern: 27 before: 135 now: 127 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 299, fault_cnt:287 -coverage: 89.353% pattern: 28 before: 127 now: 125 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:114. flip_cnt: 0, stem_cnt: 299, fault_cnt:452 -coverage: 89.864% pattern: 29 before: 125 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 89.864% pattern: 29 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:288 -coverage: 89.864% pattern: 29 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 89.864% pattern: 29 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 89.864% pattern: 29 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 89.864% pattern: 29 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 89.864% pattern: 29 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 89.864% pattern: 29 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 89.864% pattern: 29 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 89.864% pattern: 29 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 89.864% pattern: 29 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 89.864% pattern: 29 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 89.864% pattern: 29 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 89.864% pattern: 29 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:359 -coverage: 89.864% pattern: 29 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 89.864% pattern: 29 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 89.864% pattern: 29 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 89.864% pattern: 29 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 89.864% pattern: 29 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 89.864% pattern: 29 before: 119 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 299, fault_cnt:369 -coverage: 89.949% pattern: 30 before: 119 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 89.949% pattern: 30 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 89.949% pattern: 30 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 89.949% pattern: 30 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:359 -coverage: 89.949% pattern: 30 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 89.949% pattern: 30 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 89.949% pattern: 30 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 89.949% pattern: 30 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 89.949% pattern: 30 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 89.949% pattern: 30 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 89.949% pattern: 30 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 299, fault_cnt:362 -coverage: 90.204% pattern: 31 before: 118 now: 115 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 90.204% pattern: 31 before: 115 now: 115 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 90.204% pattern: 31 before: 115 now: 115 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 299, fault_cnt:367 -coverage: 90.290% pattern: 32 before: 115 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:288 -coverage: 90.290% pattern: 32 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 90.290% pattern: 32 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:290 -coverage: 90.290% pattern: 32 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 90.290% pattern: 32 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:363 -coverage: 90.290% pattern: 32 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 90.290% pattern: 32 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 90.290% pattern: 32 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:362 -coverage: 90.290% pattern: 32 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 90.290% pattern: 32 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 90.290% pattern: 32 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:363 -coverage: 90.290% pattern: 32 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 299, fault_cnt:445 -coverage: 90.460% pattern: 33 before: 114 now: 112 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 90.460% pattern: 33 before: 112 now: 112 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 90.460% pattern: 33 before: 112 now: 112 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 90.460% pattern: 33 before: 112 now: 112 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 90.460% pattern: 33 before: 112 now: 112 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 90.460% pattern: 33 before: 112 now: 112 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 299, fault_cnt:355 -coverage: 90.630% pattern: 34 before: 112 now: 110 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 90.630% pattern: 34 before: 110 now: 110 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 90.630% pattern: 34 before: 110 now: 110 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 90.630% pattern: 34 before: 110 now: 110 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 90.630% pattern: 34 before: 110 now: 110 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 90.630% pattern: 34 before: 110 now: 110 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 90.630% pattern: 34 before: 110 now: 110 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:359 -coverage: 90.630% pattern: 34 before: 110 now: 110 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:354 -coverage: 90.630% pattern: 34 before: 110 now: 110 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 90.630% pattern: 34 before: 110 now: 110 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 90.630% pattern: 34 before: 110 now: 110 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 90.630% pattern: 34 before: 110 now: 110 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 90.630% pattern: 34 before: 110 now: 110 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 90.630% pattern: 34 before: 110 now: 110 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:361 -coverage: 90.630% pattern: 34 before: 110 now: 110 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:366 -coverage: 90.630% pattern: 34 before: 110 now: 110 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:366 -coverage: 90.630% pattern: 34 before: 110 now: 110 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 90.801% pattern: 35 before: 110 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 90.801% pattern: 35 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 90.801% pattern: 35 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:354 -coverage: 90.801% pattern: 35 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 90.801% pattern: 35 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 299, fault_cnt:453 -coverage: 91.227% pattern: 36 before: 108 now: 103 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 91.227% pattern: 36 before: 103 now: 103 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 91.227% pattern: 36 before: 103 now: 103 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 91.227% pattern: 36 before: 103 now: 103 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 91.227% pattern: 36 before: 103 now: 103 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 91.227% pattern: 36 before: 103 now: 103 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 91.227% pattern: 36 before: 103 now: 103 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 91.227% pattern: 36 before: 103 now: 103 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 91.227% pattern: 36 before: 103 now: 103 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 91.227% pattern: 36 before: 103 now: 103 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 91.227% pattern: 36 before: 103 now: 103 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:287 -coverage: 91.227% pattern: 36 before: 103 now: 103 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:288 -coverage: 91.227% pattern: 36 before: 103 now: 103 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:362 -coverage: 91.227% pattern: 36 before: 103 now: 103 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 91.227% pattern: 36 before: 103 now: 103 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 91.227% pattern: 36 before: 103 now: 103 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 91.227% pattern: 36 before: 103 now: 103 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:371 -coverage: 91.227% pattern: 36 before: 103 now: 103 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:280 -coverage: 91.227% pattern: 36 before: 103 now: 103 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 91.227% pattern: 36 before: 103 now: 103 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 91.227% pattern: 36 before: 103 now: 103 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 91.227% pattern: 36 before: 103 now: 103 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 91.227% pattern: 36 before: 103 now: 103 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 91.227% pattern: 36 before: 103 now: 103 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 91.227% pattern: 36 before: 103 now: 103 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 91.227% pattern: 36 before: 103 now: 103 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 91.227% pattern: 36 before: 103 now: 103 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 91.227% pattern: 36 before: 103 now: 103 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 91.227% pattern: 36 before: 103 now: 103 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 91.227% pattern: 36 before: 103 now: 103 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 91.227% pattern: 36 before: 103 now: 103 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:360 -coverage: 91.227% pattern: 36 before: 103 now: 103 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:192 -coverage: 91.227% pattern: 36 before: 103 now: 103 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 91.227% pattern: 36 before: 103 now: 103 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:367 -coverage: 91.227% pattern: 36 before: 103 now: 103 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 299, fault_cnt:289 -coverage: 91.397% pattern: 37 before: 103 now: 101 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 91.397% pattern: 37 before: 101 now: 101 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:359 -coverage: 91.397% pattern: 37 before: 101 now: 101 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 91.397% pattern: 37 before: 101 now: 101 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 91.397% pattern: 37 before: 101 now: 101 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 91.397% pattern: 37 before: 101 now: 101 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 91.397% pattern: 37 before: 101 now: 101 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 91.397% pattern: 37 before: 101 now: 101 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:369 -coverage: 91.397% pattern: 37 before: 101 now: 101 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 91.397% pattern: 37 before: 101 now: 101 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:368 -coverage: 91.397% pattern: 37 before: 101 now: 101 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:291 -coverage: 91.397% pattern: 37 before: 101 now: 101 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 91.397% pattern: 37 before: 101 now: 101 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 91.397% pattern: 37 before: 101 now: 101 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 91.397% pattern: 37 before: 101 now: 101 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 91.397% pattern: 37 before: 101 now: 101 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:356 -coverage: 91.397% pattern: 37 before: 101 now: 101 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 91.397% pattern: 37 before: 101 now: 101 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 91.397% pattern: 37 before: 101 now: 101 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 91.397% pattern: 37 before: 101 now: 101 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:280 -coverage: 91.397% pattern: 37 before: 101 now: 101 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 91.397% pattern: 37 before: 101 now: 101 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:114. flip_cnt: 0, stem_cnt: 299, fault_cnt:464 -coverage: 91.908% pattern: 38 before: 101 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:289 -coverage: 91.908% pattern: 38 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 91.908% pattern: 38 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 91.908% pattern: 38 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:290 -coverage: 91.908% pattern: 38 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 91.908% pattern: 38 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 91.908% pattern: 38 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:291 -coverage: 91.908% pattern: 38 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 91.908% pattern: 38 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 91.908% pattern: 38 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:364 -coverage: 91.908% pattern: 38 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:358 -coverage: 91.908% pattern: 38 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 91.908% pattern: 38 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 91.908% pattern: 38 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:279 -coverage: 91.908% pattern: 38 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 91.908% pattern: 38 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 91.908% pattern: 38 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 91.908% pattern: 38 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:292 -coverage: 91.908% pattern: 38 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 91.908% pattern: 38 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 91.908% pattern: 38 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:289 -coverage: 91.908% pattern: 38 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:192 -coverage: 91.908% pattern: 38 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 91.908% pattern: 38 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:289 -coverage: 91.908% pattern: 38 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 91.908% pattern: 38 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:171. flip_cnt: 0, stem_cnt: 299, fault_cnt:447 -coverage: 92.675% pattern: 39 before: 95 now: 86 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 92.675% pattern: 39 before: 86 now: 86 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 92.675% pattern: 39 before: 86 now: 86 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 92.675% pattern: 39 before: 86 now: 86 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 92.675% pattern: 39 before: 86 now: 86 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 299, fault_cnt:458 -coverage: 93.101% pattern: 40 before: 86 now: 81 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 93.101% pattern: 40 before: 81 now: 81 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 93.101% pattern: 40 before: 81 now: 81 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:366 -coverage: 93.101% pattern: 40 before: 81 now: 81 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 93.101% pattern: 40 before: 81 now: 81 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 93.101% pattern: 40 before: 81 now: 81 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 93.101% pattern: 40 before: 81 now: 81 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 93.101% pattern: 40 before: 81 now: 81 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:351 -coverage: 93.101% pattern: 40 before: 81 now: 81 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 299, fault_cnt:450 -coverage: 93.526% pattern: 41 before: 81 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 93.526% pattern: 41 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 93.526% pattern: 41 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:289 -coverage: 93.526% pattern: 41 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 93.526% pattern: 41 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 93.526% pattern: 41 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 93.526% pattern: 41 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 93.526% pattern: 41 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 93.526% pattern: 41 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 93.526% pattern: 41 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 93.526% pattern: 41 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 93.526% pattern: 41 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 93.526% pattern: 41 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:364 -coverage: 93.526% pattern: 41 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 93.526% pattern: 41 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 93.526% pattern: 41 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:354 -coverage: 93.526% pattern: 41 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 93.526% pattern: 41 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 93.526% pattern: 41 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:353 -coverage: 93.526% pattern: 41 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:364 -coverage: 93.526% pattern: 41 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:359 -coverage: 93.526% pattern: 41 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 93.526% pattern: 41 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 93.526% pattern: 41 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 93.526% pattern: 41 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:369 -coverage: 93.526% pattern: 41 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 93.526% pattern: 41 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:290 -coverage: 93.526% pattern: 41 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 93.526% pattern: 41 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 93.526% pattern: 41 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 93.526% pattern: 41 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 93.526% pattern: 41 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 93.526% pattern: 41 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 93.526% pattern: 41 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 93.526% pattern: 41 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 299, fault_cnt:451 -coverage: 93.697% pattern: 42 before: 76 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 93.697% pattern: 42 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 93.697% pattern: 42 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 93.697% pattern: 42 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:359 -coverage: 93.697% pattern: 42 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 93.697% pattern: 42 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 299, fault_cnt:446 -coverage: 93.867% pattern: 43 before: 74 now: 72 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 93.867% pattern: 43 before: 72 now: 72 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 299, fault_cnt:454 -coverage: 94.037% pattern: 44 before: 72 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 94.037% pattern: 44 before: 70 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 94.037% pattern: 44 before: 70 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:360 -coverage: 94.037% pattern: 44 before: 70 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 94.037% pattern: 44 before: 70 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:360 -coverage: 94.037% pattern: 44 before: 70 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:365 -coverage: 94.037% pattern: 44 before: 70 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 94.037% pattern: 44 before: 70 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 94.037% pattern: 44 before: 70 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 94.037% pattern: 44 before: 70 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 94.037% pattern: 44 before: 70 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 94.037% pattern: 44 before: 70 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 94.037% pattern: 44 before: 70 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 94.037% pattern: 44 before: 70 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 94.037% pattern: 44 before: 70 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 94.037% pattern: 44 before: 70 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 94.037% pattern: 44 before: 70 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 94.037% pattern: 44 before: 70 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 94.037% pattern: 44 before: 70 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 94.037% pattern: 44 before: 70 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 94.037% pattern: 44 before: 70 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:459 -coverage: 94.037% pattern: 44 before: 70 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:361 -coverage: 94.037% pattern: 44 before: 70 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 94.037% pattern: 44 before: 70 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 94.037% pattern: 44 before: 70 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 94.037% pattern: 44 before: 70 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 94.037% pattern: 44 before: 70 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:349 -coverage: 94.037% pattern: 44 before: 70 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 94.037% pattern: 44 before: 70 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 299, fault_cnt:457 -coverage: 94.123% pattern: 45 before: 70 now: 69 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 94.123% pattern: 45 before: 69 now: 69 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 94.123% pattern: 45 before: 69 now: 69 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:359 -coverage: 94.123% pattern: 45 before: 69 now: 69 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 94.123% pattern: 45 before: 69 now: 69 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 94.123% pattern: 45 before: 69 now: 69 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 94.123% pattern: 45 before: 69 now: 69 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 94.123% pattern: 45 before: 69 now: 69 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:364 -coverage: 94.123% pattern: 45 before: 69 now: 69 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 94.123% pattern: 45 before: 69 now: 69 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:363 -coverage: 94.123% pattern: 45 before: 69 now: 69 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 94.123% pattern: 45 before: 69 now: 69 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 94.123% pattern: 45 before: 69 now: 69 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 94.123% pattern: 45 before: 69 now: 69 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 94.123% pattern: 45 before: 69 now: 69 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 94.123% pattern: 45 before: 69 now: 69 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 94.123% pattern: 45 before: 69 now: 69 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 94.123% pattern: 45 before: 69 now: 69 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 94.123% pattern: 45 before: 69 now: 69 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 94.123% pattern: 45 before: 69 now: 69 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 94.123% pattern: 45 before: 69 now: 69 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 94.123% pattern: 45 before: 69 now: 69 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 94.123% pattern: 45 before: 69 now: 69 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 94.123% pattern: 45 before: 69 now: 69 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 94.123% pattern: 45 before: 69 now: 69 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 94.123% pattern: 45 before: 69 now: 69 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 94.123% pattern: 45 before: 69 now: 69 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 94.123% pattern: 45 before: 69 now: 69 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:357 -coverage: 94.123% pattern: 45 before: 69 now: 69 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:356 -coverage: 94.123% pattern: 45 before: 69 now: 69 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 94.123% pattern: 45 before: 69 now: 69 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 94.123% pattern: 45 before: 69 now: 69 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 94.123% pattern: 45 before: 69 now: 69 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:353 -coverage: 94.123% pattern: 45 before: 69 now: 69 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:280 -coverage: 94.123% pattern: 45 before: 69 now: 69 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 299, fault_cnt:444 -coverage: 94.293% pattern: 46 before: 69 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:287 -coverage: 94.293% pattern: 46 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 94.293% pattern: 46 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 94.293% pattern: 46 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 94.293% pattern: 46 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:351 -coverage: 94.293% pattern: 46 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 94.293% pattern: 46 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 94.293% pattern: 46 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:356 -coverage: 94.293% pattern: 46 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:352 -coverage: 94.293% pattern: 46 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 94.293% pattern: 46 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:114. flip_cnt: 0, stem_cnt: 299, fault_cnt:457 -coverage: 94.804% pattern: 47 before: 67 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 94.804% pattern: 47 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:287 -coverage: 94.804% pattern: 47 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:358 -coverage: 94.804% pattern: 47 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 94.804% pattern: 47 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 94.804% pattern: 47 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 299, fault_cnt:448 -coverage: 94.974% pattern: 48 before: 61 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:287 -coverage: 94.974% pattern: 48 before: 59 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:358 -coverage: 94.974% pattern: 48 before: 59 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 94.974% pattern: 48 before: 59 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:364 -coverage: 94.974% pattern: 48 before: 59 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 94.974% pattern: 48 before: 59 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 94.974% pattern: 48 before: 59 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 94.974% pattern: 48 before: 59 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 94.974% pattern: 48 before: 59 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 94.974% pattern: 48 before: 59 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 94.974% pattern: 48 before: 59 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 299, fault_cnt:459 -coverage: 95.145% pattern: 49 before: 59 now: 57 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:363 -coverage: 95.145% pattern: 49 before: 57 now: 57 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 299, fault_cnt:454 -coverage: 95.315% pattern: 50 before: 57 now: 55 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 95.315% pattern: 50 before: 55 now: 55 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 95.315% pattern: 50 before: 55 now: 55 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 299, fault_cnt:454 -coverage: 95.400% pattern: 51 before: 55 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 95.400% pattern: 51 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 95.400% pattern: 51 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 95.400% pattern: 51 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 95.400% pattern: 51 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 95.400% pattern: 51 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 95.400% pattern: 51 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:366 -coverage: 95.400% pattern: 51 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 95.400% pattern: 51 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 95.400% pattern: 51 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 95.400% pattern: 51 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:192 -coverage: 95.400% pattern: 51 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 95.400% pattern: 51 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 95.400% pattern: 51 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:192 -coverage: 95.400% pattern: 51 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 95.400% pattern: 51 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:365 -coverage: 95.400% pattern: 51 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:279 -coverage: 95.400% pattern: 51 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 95.400% pattern: 51 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 95.400% pattern: 51 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 95.400% pattern: 51 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:353 -coverage: 95.400% pattern: 51 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:288 -coverage: 95.400% pattern: 51 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 95.400% pattern: 51 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 95.400% pattern: 51 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 95.400% pattern: 51 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 95.400% pattern: 51 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 95.400% pattern: 51 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 95.400% pattern: 51 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:361 -coverage: 95.400% pattern: 51 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 95.400% pattern: 51 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 299, fault_cnt:458 -coverage: 95.571% pattern: 52 before: 54 now: 52 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:360 -coverage: 95.571% pattern: 52 before: 52 now: 52 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:359 -coverage: 95.571% pattern: 52 before: 52 now: 52 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 299, fault_cnt:458 -coverage: 95.741% pattern: 53 before: 52 now: 50 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 95.741% pattern: 53 before: 50 now: 50 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 95.741% pattern: 53 before: 50 now: 50 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:288 -coverage: 95.741% pattern: 53 before: 50 now: 50 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 95.741% pattern: 53 before: 50 now: 50 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 95.741% pattern: 53 before: 50 now: 50 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:361 -coverage: 95.741% pattern: 53 before: 50 now: 50 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 95.741% pattern: 53 before: 50 now: 50 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 95.741% pattern: 53 before: 50 now: 50 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 95.741% pattern: 53 before: 50 now: 50 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 95.741% pattern: 53 before: 50 now: 50 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 95.741% pattern: 53 before: 50 now: 50 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 95.741% pattern: 53 before: 50 now: 50 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 95.741% pattern: 53 before: 50 now: 50 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 95.741% pattern: 53 before: 50 now: 50 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 95.741% pattern: 53 before: 50 now: 50 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 95.741% pattern: 53 before: 50 now: 50 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:362 -coverage: 95.741% pattern: 53 before: 50 now: 50 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 95.741% pattern: 53 before: 50 now: 50 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 299, fault_cnt:461 -coverage: 95.911% pattern: 54 before: 50 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 95.911% pattern: 54 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 95.911% pattern: 54 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 95.911% pattern: 54 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 95.911% pattern: 54 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 95.911% pattern: 54 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 95.911% pattern: 54 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 95.911% pattern: 54 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 95.911% pattern: 54 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:355 -coverage: 95.911% pattern: 54 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 95.911% pattern: 54 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 95.911% pattern: 54 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 95.911% pattern: 54 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:458 -coverage: 95.911% pattern: 54 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 95.911% pattern: 54 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 95.911% pattern: 54 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 95.911% pattern: 54 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 95.911% pattern: 54 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 95.911% pattern: 54 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:288 -coverage: 95.911% pattern: 54 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:280 -coverage: 95.911% pattern: 54 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 95.911% pattern: 54 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 95.911% pattern: 54 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 95.911% pattern: 54 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:289 -coverage: 95.911% pattern: 54 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 95.911% pattern: 54 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:359 -coverage: 95.911% pattern: 54 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 95.911% pattern: 54 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 95.911% pattern: 54 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 95.911% pattern: 54 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 95.911% pattern: 54 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 95.911% pattern: 54 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 95.911% pattern: 54 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 95.911% pattern: 54 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 95.911% pattern: 54 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:363 -coverage: 95.911% pattern: 54 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 95.911% pattern: 54 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:362 -coverage: 95.911% pattern: 54 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 95.911% pattern: 54 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 95.911% pattern: 54 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 95.911% pattern: 54 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 95.911% pattern: 54 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 95.911% pattern: 54 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:352 -coverage: 95.911% pattern: 54 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 95.911% pattern: 54 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 95.911% pattern: 54 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 95.911% pattern: 54 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 299, fault_cnt:458 -coverage: 96.082% pattern: 55 before: 48 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 96.082% pattern: 55 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 96.082% pattern: 55 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 96.082% pattern: 55 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 96.082% pattern: 55 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 96.082% pattern: 55 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 299, fault_cnt:462 -coverage: 96.167% pattern: 56 before: 46 now: 45 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:360 -coverage: 96.167% pattern: 56 before: 45 now: 45 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 96.167% pattern: 56 before: 45 now: 45 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:290 -coverage: 96.167% pattern: 56 before: 45 now: 45 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 96.167% pattern: 56 before: 45 now: 45 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 96.167% pattern: 56 before: 45 now: 45 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 96.167% pattern: 56 before: 45 now: 45 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 96.167% pattern: 56 before: 45 now: 45 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 96.167% pattern: 56 before: 45 now: 45 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:361 -coverage: 96.167% pattern: 56 before: 45 now: 45 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 96.167% pattern: 56 before: 45 now: 45 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 96.167% pattern: 56 before: 45 now: 45 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 96.167% pattern: 56 before: 45 now: 45 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 96.167% pattern: 56 before: 45 now: 45 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:192 -coverage: 96.167% pattern: 56 before: 45 now: 45 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 96.167% pattern: 56 before: 45 now: 45 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 96.167% pattern: 56 before: 45 now: 45 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 96.167% pattern: 56 before: 45 now: 45 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:359 -coverage: 96.167% pattern: 56 before: 45 now: 45 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 299, fault_cnt:450 -coverage: 96.252% pattern: 57 before: 45 now: 44 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 96.252% pattern: 57 before: 44 now: 44 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 96.252% pattern: 57 before: 44 now: 44 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 96.252% pattern: 57 before: 44 now: 44 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:353 -coverage: 96.252% pattern: 57 before: 44 now: 44 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 96.252% pattern: 57 before: 44 now: 44 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 96.252% pattern: 57 before: 44 now: 44 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 299, fault_cnt:445 -coverage: 96.422% pattern: 58 before: 44 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 96.422% pattern: 58 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 96.422% pattern: 58 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 96.422% pattern: 58 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 96.422% pattern: 58 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 96.422% pattern: 58 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 96.422% pattern: 58 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:361 -coverage: 96.422% pattern: 58 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:278 -coverage: 96.422% pattern: 58 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 96.422% pattern: 58 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 96.422% pattern: 58 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 96.422% pattern: 58 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 96.422% pattern: 58 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 96.422% pattern: 58 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 96.422% pattern: 58 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 96.422% pattern: 58 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 96.422% pattern: 58 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 96.422% pattern: 58 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:356 -coverage: 96.422% pattern: 58 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 96.422% pattern: 58 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 96.422% pattern: 58 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 96.422% pattern: 58 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:455 -coverage: 96.422% pattern: 58 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 96.422% pattern: 58 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 96.422% pattern: 58 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 96.422% pattern: 58 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 96.422% pattern: 58 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:289 -coverage: 96.422% pattern: 58 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 96.422% pattern: 58 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 96.422% pattern: 58 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:362 -coverage: 96.422% pattern: 58 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 96.422% pattern: 58 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 96.422% pattern: 58 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 96.422% pattern: 58 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 96.422% pattern: 58 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 96.422% pattern: 58 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 96.422% pattern: 58 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 96.422% pattern: 58 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:362 -coverage: 96.422% pattern: 58 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 96.422% pattern: 58 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:355 -coverage: 96.422% pattern: 58 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 96.422% pattern: 58 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 96.422% pattern: 58 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:463 -coverage: 96.422% pattern: 58 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 96.422% pattern: 58 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:361 -coverage: 96.422% pattern: 58 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:455 -coverage: 96.422% pattern: 58 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 96.422% pattern: 58 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:192 -coverage: 96.422% pattern: 58 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:367 -coverage: 96.422% pattern: 58 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 96.422% pattern: 58 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:351 -coverage: 96.422% pattern: 58 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 96.422% pattern: 58 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 96.422% pattern: 58 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 96.422% pattern: 58 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 96.422% pattern: 58 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 96.422% pattern: 58 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 96.422% pattern: 58 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:287 -coverage: 96.422% pattern: 58 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 96.422% pattern: 58 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 96.422% pattern: 58 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 96.422% pattern: 58 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 299, fault_cnt:456 -coverage: 96.593% pattern: 59 before: 42 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:457 -coverage: 96.593% pattern: 59 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 96.593% pattern: 59 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 96.593% pattern: 59 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 96.593% pattern: 59 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 96.593% pattern: 59 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 96.593% pattern: 59 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 96.593% pattern: 59 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 96.593% pattern: 59 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:361 -coverage: 96.593% pattern: 59 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 96.593% pattern: 59 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 96.593% pattern: 59 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 96.593% pattern: 59 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 96.593% pattern: 59 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:456 -coverage: 96.593% pattern: 59 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 96.593% pattern: 59 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 96.593% pattern: 59 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 96.593% pattern: 59 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 96.593% pattern: 59 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 96.593% pattern: 59 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:289 -coverage: 96.593% pattern: 59 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 96.593% pattern: 59 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:368 -coverage: 96.593% pattern: 59 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:361 -coverage: 96.593% pattern: 59 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 96.593% pattern: 59 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:192 -coverage: 96.593% pattern: 59 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 96.593% pattern: 59 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 299, fault_cnt:455 -coverage: 96.763% pattern: 60 before: 40 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:362 -coverage: 96.763% pattern: 60 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 96.763% pattern: 60 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 299, fault_cnt:457 -coverage: 96.934% pattern: 61 before: 38 now: 36 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 96.934% pattern: 61 before: 36 now: 36 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:357 -coverage: 96.934% pattern: 61 before: 36 now: 36 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 96.934% pattern: 61 before: 36 now: 36 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 96.934% pattern: 61 before: 36 now: 36 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 96.934% pattern: 61 before: 36 now: 36 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 299, fault_cnt:460 -coverage: 97.019% pattern: 62 before: 36 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 97.019% pattern: 62 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:292 -coverage: 97.019% pattern: 62 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 97.019% pattern: 62 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 97.019% pattern: 62 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 97.019% pattern: 62 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:442 -coverage: 97.019% pattern: 62 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 299, fault_cnt:454 -coverage: 97.104% pattern: 63 before: 35 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 97.104% pattern: 63 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 97.104% pattern: 63 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 97.104% pattern: 63 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 299, fault_cnt:458 -coverage: 97.274% pattern: 64 before: 34 now: 32 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 97.274% pattern: 64 before: 32 now: 32 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:351 -coverage: 97.274% pattern: 64 before: 32 now: 32 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 97.274% pattern: 64 before: 32 now: 32 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 97.274% pattern: 64 before: 32 now: 32 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:455 -coverage: 97.274% pattern: 64 before: 32 now: 32 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:446 -coverage: 97.274% pattern: 64 before: 32 now: 32 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 97.274% pattern: 64 before: 32 now: 32 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 299, fault_cnt:445 -coverage: 97.359% pattern: 65 before: 32 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 299, fault_cnt:456 -coverage: 97.445% pattern: 66 before: 31 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:288 -coverage: 97.445% pattern: 66 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 97.445% pattern: 66 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 97.445% pattern: 66 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 97.445% pattern: 66 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 97.445% pattern: 66 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:290 -coverage: 97.445% pattern: 66 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 97.445% pattern: 66 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 97.445% pattern: 66 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:291 -coverage: 97.445% pattern: 66 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:363 -coverage: 97.445% pattern: 66 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 97.445% pattern: 66 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:362 -coverage: 97.445% pattern: 66 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 299, fault_cnt:455 -coverage: 97.530% pattern: 67 before: 30 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 97.530% pattern: 67 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 299, fault_cnt:462 -coverage: 97.615% pattern: 68 before: 29 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 97.615% pattern: 68 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:359 -coverage: 97.615% pattern: 68 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 97.615% pattern: 68 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 97.615% pattern: 68 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 97.615% pattern: 68 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 97.615% pattern: 68 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:358 -coverage: 97.615% pattern: 68 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 97.615% pattern: 68 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 97.615% pattern: 68 before: 28 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 299, fault_cnt:459 -coverage: 97.700% pattern: 69 before: 28 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 299, fault_cnt:448 -coverage: 97.785% pattern: 70 before: 27 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 97.785% pattern: 70 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 97.785% pattern: 70 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 97.785% pattern: 70 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 97.785% pattern: 70 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 97.785% pattern: 70 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 97.785% pattern: 70 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 97.785% pattern: 70 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 97.785% pattern: 70 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:442 -coverage: 97.785% pattern: 70 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:355 -coverage: 97.785% pattern: 70 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:362 -coverage: 97.785% pattern: 70 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 97.785% pattern: 70 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 97.785% pattern: 70 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:447 -coverage: 97.785% pattern: 70 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 97.785% pattern: 70 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 97.785% pattern: 70 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 97.785% pattern: 70 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 97.785% pattern: 70 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 97.785% pattern: 70 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 97.785% pattern: 70 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 97.785% pattern: 70 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 97.785% pattern: 70 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:354 -coverage: 97.785% pattern: 70 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 97.785% pattern: 70 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 97.785% pattern: 70 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:287 -coverage: 97.785% pattern: 70 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:357 -coverage: 97.785% pattern: 70 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 97.785% pattern: 70 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 97.785% pattern: 70 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 97.785% pattern: 70 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 97.785% pattern: 70 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 97.785% pattern: 70 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:357 -coverage: 97.785% pattern: 70 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 97.785% pattern: 70 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 97.785% pattern: 70 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:357 -coverage: 97.785% pattern: 70 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 97.785% pattern: 70 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 97.785% pattern: 70 before: 26 now: 26 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 299, fault_cnt:451 -coverage: 97.871% pattern: 71 before: 26 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 97.871% pattern: 71 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 97.871% pattern: 71 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 97.871% pattern: 71 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 97.871% pattern: 71 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 97.871% pattern: 71 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 97.871% pattern: 71 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:358 -coverage: 97.871% pattern: 71 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 97.871% pattern: 71 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 97.871% pattern: 71 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 97.871% pattern: 71 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 97.871% pattern: 71 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 97.871% pattern: 71 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 97.871% pattern: 71 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 97.871% pattern: 71 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 97.871% pattern: 71 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 97.871% pattern: 71 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:358 -coverage: 97.871% pattern: 71 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 97.871% pattern: 71 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 97.871% pattern: 71 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 97.871% pattern: 71 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 97.871% pattern: 71 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 97.871% pattern: 71 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 97.871% pattern: 71 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 97.871% pattern: 71 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 97.871% pattern: 71 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 97.871% pattern: 71 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:367 -coverage: 97.871% pattern: 71 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 299, fault_cnt:459 -coverage: 97.956% pattern: 72 before: 25 now: 24 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 97.956% pattern: 72 before: 24 now: 24 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:359 -coverage: 97.956% pattern: 72 before: 24 now: 24 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 97.956% pattern: 72 before: 24 now: 24 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 299, fault_cnt:459 -coverage: 98.041% pattern: 73 before: 24 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.041% pattern: 73 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.041% pattern: 73 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.041% pattern: 73 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.041% pattern: 73 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 98.041% pattern: 73 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.041% pattern: 73 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:367 -coverage: 98.041% pattern: 73 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.041% pattern: 73 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.041% pattern: 73 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.041% pattern: 73 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.041% pattern: 73 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.041% pattern: 73 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.041% pattern: 73 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.041% pattern: 73 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.041% pattern: 73 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 98.041% pattern: 73 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.041% pattern: 73 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.041% pattern: 73 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:280 -coverage: 98.041% pattern: 73 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:360 -coverage: 98.041% pattern: 73 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.041% pattern: 73 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 98.041% pattern: 73 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.041% pattern: 73 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:364 -coverage: 98.041% pattern: 73 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.041% pattern: 73 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.041% pattern: 73 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.041% pattern: 73 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:287 -coverage: 98.041% pattern: 73 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.041% pattern: 73 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:287 -coverage: 98.041% pattern: 73 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.041% pattern: 73 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.041% pattern: 73 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:456 -coverage: 98.041% pattern: 73 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.041% pattern: 73 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.041% pattern: 73 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.041% pattern: 73 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 98.041% pattern: 73 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.041% pattern: 73 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.041% pattern: 73 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.041% pattern: 73 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.041% pattern: 73 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.041% pattern: 73 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.041% pattern: 73 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.041% pattern: 73 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:353 -coverage: 98.041% pattern: 73 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.041% pattern: 73 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 98.041% pattern: 73 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:366 -coverage: 98.041% pattern: 73 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.041% pattern: 73 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.041% pattern: 73 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:455 -coverage: 98.041% pattern: 73 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 299, fault_cnt:462 -coverage: 98.126% pattern: 74 before: 23 now: 22 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.126% pattern: 74 before: 22 now: 22 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:352 -coverage: 98.126% pattern: 74 before: 22 now: 22 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 299, fault_cnt:448 -coverage: 98.211% pattern: 75 before: 22 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.211% pattern: 75 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.211% pattern: 75 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.211% pattern: 75 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.211% pattern: 75 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:289 -coverage: 98.211% pattern: 75 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.211% pattern: 75 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.211% pattern: 75 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:361 -coverage: 98.211% pattern: 75 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.211% pattern: 75 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:280 -coverage: 98.211% pattern: 75 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 98.211% pattern: 75 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 98.211% pattern: 75 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.211% pattern: 75 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 98.211% pattern: 75 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:356 -coverage: 98.211% pattern: 75 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 98.211% pattern: 75 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.211% pattern: 75 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.211% pattern: 75 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.211% pattern: 75 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.211% pattern: 75 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 98.211% pattern: 75 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.211% pattern: 75 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.211% pattern: 75 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 98.211% pattern: 75 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 98.211% pattern: 75 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.211% pattern: 75 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:452 -coverage: 98.211% pattern: 75 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.211% pattern: 75 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.211% pattern: 75 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:455 -coverage: 98.211% pattern: 75 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:366 -coverage: 98.211% pattern: 75 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.211% pattern: 75 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.211% pattern: 75 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:290 -coverage: 98.211% pattern: 75 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:366 -coverage: 98.211% pattern: 75 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.211% pattern: 75 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.211% pattern: 75 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 299, fault_cnt:458 -coverage: 98.296% pattern: 76 before: 21 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.296% pattern: 76 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.296% pattern: 76 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:287 -coverage: 98.296% pattern: 76 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.296% pattern: 76 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.296% pattern: 76 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:459 -coverage: 98.296% pattern: 76 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:357 -coverage: 98.296% pattern: 76 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.296% pattern: 76 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.296% pattern: 76 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:360 -coverage: 98.296% pattern: 76 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.296% pattern: 76 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:457 -coverage: 98.296% pattern: 76 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.296% pattern: 76 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:356 -coverage: 98.296% pattern: 76 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:287 -coverage: 98.296% pattern: 76 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.296% pattern: 76 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 98.296% pattern: 76 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.296% pattern: 76 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 98.296% pattern: 76 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.296% pattern: 76 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.296% pattern: 76 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:279 -coverage: 98.296% pattern: 76 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.296% pattern: 76 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.296% pattern: 76 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:458 -coverage: 98.296% pattern: 76 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:280 -coverage: 98.296% pattern: 76 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.296% pattern: 76 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:280 -coverage: 98.296% pattern: 76 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.296% pattern: 76 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 98.296% pattern: 76 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:361 -coverage: 98.296% pattern: 76 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.296% pattern: 76 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.296% pattern: 76 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:367 -coverage: 98.296% pattern: 76 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 299, fault_cnt:455 -coverage: 98.467% pattern: 77 before: 20 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:365 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:446 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:288 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:367 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:357 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:362 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:360 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:446 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:362 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:455 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:352 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:453 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:448 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:365 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:356 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:289 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:450 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:355 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:445 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:365 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:352 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:192 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:368 -coverage: 98.467% pattern: 77 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 299, fault_cnt:451 -coverage: 98.637% pattern: 78 before: 18 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.637% pattern: 78 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:367 -coverage: 98.637% pattern: 78 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.637% pattern: 78 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:278 -coverage: 98.637% pattern: 78 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:355 -coverage: 98.637% pattern: 78 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:192 -coverage: 98.637% pattern: 78 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:448 -coverage: 98.637% pattern: 78 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:288 -coverage: 98.637% pattern: 78 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.637% pattern: 78 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 98.637% pattern: 78 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.637% pattern: 78 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.637% pattern: 78 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:289 -coverage: 98.637% pattern: 78 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:360 -coverage: 98.637% pattern: 78 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.637% pattern: 78 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:349 -coverage: 98.637% pattern: 78 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:359 -coverage: 98.637% pattern: 78 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.637% pattern: 78 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.637% pattern: 78 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.637% pattern: 78 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 98.637% pattern: 78 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 98.637% pattern: 78 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.637% pattern: 78 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.637% pattern: 78 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.637% pattern: 78 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:459 -coverage: 98.637% pattern: 78 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.637% pattern: 78 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:280 -coverage: 98.637% pattern: 78 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 98.637% pattern: 78 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.637% pattern: 78 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 98.637% pattern: 78 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.637% pattern: 78 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:365 -coverage: 98.637% pattern: 78 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.637% pattern: 78 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.637% pattern: 78 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.637% pattern: 78 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:449 -coverage: 98.637% pattern: 78 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.637% pattern: 78 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:287 -coverage: 98.637% pattern: 78 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 299, fault_cnt:459 -coverage: 98.722% pattern: 79 before: 16 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.722% pattern: 79 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:356 -coverage: 98.722% pattern: 79 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:359 -coverage: 98.722% pattern: 79 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.722% pattern: 79 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.722% pattern: 79 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.722% pattern: 79 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:459 -coverage: 98.722% pattern: 79 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.722% pattern: 79 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:289 -coverage: 98.722% pattern: 79 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 98.722% pattern: 79 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.722% pattern: 79 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:457 -coverage: 98.722% pattern: 79 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.722% pattern: 79 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.722% pattern: 79 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:288 -coverage: 98.722% pattern: 79 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 98.722% pattern: 79 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 98.722% pattern: 79 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.722% pattern: 79 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 98.722% pattern: 79 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.722% pattern: 79 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 299, fault_cnt:456 -coverage: 98.807% pattern: 80 before: 15 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.807% pattern: 80 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.807% pattern: 80 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.807% pattern: 80 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.807% pattern: 80 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.807% pattern: 80 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:353 -coverage: 98.807% pattern: 80 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.807% pattern: 80 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:354 -coverage: 98.807% pattern: 80 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:288 -coverage: 98.807% pattern: 80 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.807% pattern: 80 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.807% pattern: 80 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.807% pattern: 80 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.807% pattern: 80 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.807% pattern: 80 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.807% pattern: 80 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.807% pattern: 80 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.807% pattern: 80 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.807% pattern: 80 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.807% pattern: 80 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 98.807% pattern: 80 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:363 -coverage: 98.807% pattern: 80 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.807% pattern: 80 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:357 -coverage: 98.807% pattern: 80 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:357 -coverage: 98.807% pattern: 80 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 98.807% pattern: 80 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.807% pattern: 80 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.807% pattern: 80 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:359 -coverage: 98.807% pattern: 80 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:192 -coverage: 98.807% pattern: 80 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.807% pattern: 80 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:359 -coverage: 98.807% pattern: 80 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:443 -coverage: 98.807% pattern: 80 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.807% pattern: 80 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:280 -coverage: 98.807% pattern: 80 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 299, fault_cnt:456 -coverage: 98.893% pattern: 81 before: 14 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:451 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:456 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:445 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:458 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:363 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:369 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:457 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:350 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:363 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:366 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:367 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:360 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:362 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:446 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:450 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:453 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:290 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:363 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:459 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:280 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:363 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:355 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:456 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:460 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:290 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:368 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:291 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:456 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:359 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:288 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:357 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:459 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:447 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:454 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:364 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:357 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:455 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:362 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:355 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.893% pattern: 81 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 299, fault_cnt:457 -coverage: 98.978% pattern: 82 before: 13 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.978% pattern: 82 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.978% pattern: 82 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:353 -coverage: 98.978% pattern: 82 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.978% pattern: 82 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.978% pattern: 82 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.978% pattern: 82 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.978% pattern: 82 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:357 -coverage: 98.978% pattern: 82 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:289 -coverage: 98.978% pattern: 82 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 98.978% pattern: 82 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.978% pattern: 82 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:447 -coverage: 98.978% pattern: 82 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.978% pattern: 82 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 98.978% pattern: 82 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.978% pattern: 82 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:367 -coverage: 98.978% pattern: 82 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.978% pattern: 82 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 98.978% pattern: 82 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:360 -coverage: 98.978% pattern: 82 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:289 -coverage: 98.978% pattern: 82 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:357 -coverage: 98.978% pattern: 82 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 98.978% pattern: 82 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.978% pattern: 82 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 98.978% pattern: 82 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 98.978% pattern: 82 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 299, fault_cnt:453 -coverage: 99.063% pattern: 83 before: 12 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.063% pattern: 83 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.063% pattern: 83 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.063% pattern: 83 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.063% pattern: 83 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.063% pattern: 83 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.063% pattern: 83 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.063% pattern: 83 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:289 -coverage: 99.063% pattern: 83 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.063% pattern: 83 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:360 -coverage: 99.063% pattern: 83 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.063% pattern: 83 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.063% pattern: 83 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.063% pattern: 83 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:360 -coverage: 99.063% pattern: 83 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:287 -coverage: 99.063% pattern: 83 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.063% pattern: 83 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 99.063% pattern: 83 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.063% pattern: 83 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:354 -coverage: 99.063% pattern: 83 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.063% pattern: 83 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.063% pattern: 83 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.063% pattern: 83 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:279 -coverage: 99.063% pattern: 83 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.063% pattern: 83 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:457 -coverage: 99.063% pattern: 83 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:452 -coverage: 99.063% pattern: 83 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.063% pattern: 83 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.063% pattern: 83 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 299, fault_cnt:451 -coverage: 99.148% pattern: 84 before: 11 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:465 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:192 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:358 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:364 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:454 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:280 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:458 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:289 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:361 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:363 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:364 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:449 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:357 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:357 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:365 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:360 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:459 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:362 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:372 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:457 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:366 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:280 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:353 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:192 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:356 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:353 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:365 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:359 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:290 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:289 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:359 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:357 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:363 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:366 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:287 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:192 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:359 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.148% pattern: 84 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 299, fault_cnt:455 -coverage: 99.233% pattern: 85 before: 10 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.233% pattern: 85 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:350 -coverage: 99.233% pattern: 85 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:351 -coverage: 99.233% pattern: 85 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.233% pattern: 85 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.233% pattern: 85 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.233% pattern: 85 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.233% pattern: 85 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.233% pattern: 85 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.233% pattern: 85 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.233% pattern: 85 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.233% pattern: 85 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:456 -coverage: 99.233% pattern: 85 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.233% pattern: 85 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:444 -coverage: 99.233% pattern: 85 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.233% pattern: 85 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.233% pattern: 85 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 99.233% pattern: 85 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.233% pattern: 85 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.233% pattern: 85 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.233% pattern: 85 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.233% pattern: 85 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.233% pattern: 85 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.233% pattern: 85 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:453 -coverage: 99.233% pattern: 85 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:288 -coverage: 99.233% pattern: 85 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.233% pattern: 85 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:358 -coverage: 99.233% pattern: 85 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.233% pattern: 85 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.233% pattern: 85 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.233% pattern: 85 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 99.233% pattern: 85 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.233% pattern: 85 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 99.233% pattern: 85 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:452 -coverage: 99.233% pattern: 85 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.233% pattern: 85 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.233% pattern: 85 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.233% pattern: 85 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.233% pattern: 85 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.233% pattern: 85 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.233% pattern: 85 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.233% pattern: 85 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.233% pattern: 85 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 299, fault_cnt:450 -coverage: 99.319% pattern: 86 before: 9 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.319% pattern: 86 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.319% pattern: 86 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:287 -coverage: 99.319% pattern: 86 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 299, fault_cnt:457 -coverage: 99.404% pattern: 87 before: 8 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:448 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:456 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:192 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:288 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:290 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:356 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:364 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:447 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:449 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:358 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:358 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:287 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:361 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:365 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:280 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:287 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:290 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:359 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:456 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:359 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:357 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:287 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:288 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:357 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:353 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:364 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:353 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:446 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:364 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:455 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:449 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:357 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:450 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:366 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:355 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:362 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:455 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:288 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:359 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:360 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:357 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:456 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:288 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:352 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:355 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:451 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:192 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:463 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:278 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:362 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:445 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:354 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:354 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:289 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:192 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:356 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:290 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:290 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:352 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:358 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:457 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:364 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:358 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:288 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:280 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:459 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:353 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:351 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:358 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:354 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:454 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:290 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:288 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:362 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:280 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:291 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:358 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:280 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:279 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:443 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:289 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:289 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:359 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:365 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:351 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:367 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:366 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:364 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:288 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:360 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:288 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:447 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:280 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:192 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:289 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:451 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:367 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:290 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:291 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:360 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:287 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:360 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:363 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:356 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:445 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:280 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:367 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:192 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:289 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:362 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:359 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:455 -coverage: 99.404% pattern: 87 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 299, fault_cnt:458 -coverage: 99.574% pattern: 88 before: 7 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:356 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:289 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:287 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:455 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:369 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:450 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:361 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:363 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:287 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:280 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:364 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:451 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:288 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:359 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:365 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:288 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:358 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:454 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:446 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:355 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:451 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:290 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:456 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:365 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:362 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:445 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:449 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:451 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:367 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:357 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:357 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:290 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:450 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:362 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:369 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:290 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:288 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:288 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:361 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:192 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:280 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:358 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:362 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:287 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:287 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:357 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:357 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:447 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:445 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:369 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:365 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:287 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:192 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:369 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:453 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:366 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 99.574% pattern: 88 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 299, fault_cnt:447 -coverage: 99.659% pattern: 89 before: 5 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:290 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:447 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:358 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:288 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:355 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:280 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:358 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:356 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:192 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:458 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:280 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:358 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:289 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:456 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:289 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:361 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:289 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:465 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:352 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:287 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:288 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:453 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:363 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:365 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:455 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:290 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:280 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:448 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:289 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:289 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:364 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:288 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:362 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:362 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:368 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:455 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:364 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:460 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:447 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:361 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:280 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:356 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:366 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:447 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:437 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:351 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:366 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:287 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:287 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:354 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:287 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:279 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:280 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:444 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:457 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:353 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:288 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:359 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:359 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:352 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:280 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:461 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:289 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:460 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:280 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:459 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:356 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:448 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:288 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:458 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:288 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:192 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:361 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:352 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:359 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:287 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:364 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:192 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:457 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:358 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:356 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:349 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:461 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:364 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:287 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:456 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:457 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:355 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:454 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:361 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:456 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:357 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:357 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:290 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:454 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:288 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:458 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:364 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:288 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:452 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:365 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:289 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:361 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:287 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:278 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:442 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:359 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:448 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:359 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:351 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:459 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:289 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.659% pattern: 89 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 299, fault_cnt:450 -coverage: 99.744% pattern: 90 before: 4 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:363 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:449 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:362 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:361 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:280 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:288 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:358 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:287 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:457 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:364 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:452 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:363 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:192 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:356 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:280 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:289 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:442 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:361 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:448 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:292 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:357 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:353 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:447 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:368 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:452 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:447 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:352 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:450 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:353 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:287 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:448 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:452 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:442 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:364 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:358 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:288 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:361 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:279 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:289 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:359 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:449 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:459 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:288 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:366 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:356 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:288 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:362 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:451 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:459 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:447 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:279 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:450 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:367 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:287 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:359 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:447 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:361 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:278 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:287 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:357 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:458 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:460 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:363 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:355 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:359 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:362 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:442 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:360 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:458 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:455 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:463 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:358 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:357 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:362 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:368 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:289 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:365 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:368 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:363 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:280 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:353 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:455 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:455 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:290 -coverage: 99.744% pattern: 90 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 299, fault_cnt:446 -coverage: 99.830% pattern: 91 before: 3 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:287 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:460 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:364 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:363 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:357 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:192 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:455 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:449 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:358 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:366 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:364 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:354 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:352 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:280 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:359 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:362 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:287 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:290 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:279 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:458 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:280 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:461 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:458 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:358 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:456 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:364 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:192 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:280 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:446 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:363 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:363 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:364 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:446 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:363 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:289 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:356 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:192 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:448 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:359 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:443 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:287 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:352 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:359 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:454 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:348 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:455 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:288 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:445 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:461 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:464 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:356 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:357 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:280 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:463 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:450 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:454 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:456 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:288 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:352 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:354 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:457 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.830% pattern: 91 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 299, fault_cnt:459 -coverage: 99.915% pattern: 92 before: 2 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:458 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:352 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:280 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:289 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:364 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:280 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:288 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:450 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:288 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:441 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:351 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:279 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:365 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:362 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:365 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:288 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:365 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:288 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:356 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:287 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:369 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:457 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:444 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:351 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:358 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:367 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:445 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:368 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:370 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:280 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:290 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:360 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:359 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:359 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:192 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:362 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:363 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:361 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:360 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:461 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:369 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:287 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:443 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:368 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:290 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:363 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:446 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:361 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:359 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:456 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:451 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:289 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:289 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:280 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:287 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:280 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:452 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:364 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:361 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:358 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:457 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:455 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:290 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:280 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:368 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:366 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:359 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:463 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:362 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:458 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:362 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:367 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:364 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:368 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:279 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:289 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:445 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:357 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:357 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:287 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:351 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:280 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:363 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:289 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:358 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:455 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:458 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:287 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:354 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:289 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:457 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:367 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:459 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:450 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:456 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:368 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:360 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:360 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:362 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:360 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:445 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:287 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:447 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:348 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:350 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:280 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:362 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:352 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:361 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:456 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:363 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:441 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:279 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:287 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:358 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:288 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:353 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:358 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:350 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:290 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:359 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:360 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:447 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:446 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:365 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:457 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:458 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:364 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:456 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:279 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:288 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:360 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:356 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:453 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:352 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:354 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:356 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:354 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:290 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:288 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:356 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:350 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:279 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:447 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:289 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:451 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:279 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:290 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:445 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:359 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:354 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:359 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:367 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:192 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:366 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:287 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:365 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:368 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:287 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:279 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:359 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:363 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:289 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:460 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:449 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:354 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:461 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:443 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:456 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:289 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:451 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:358 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:445 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:288 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:349 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:361 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:357 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:364 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:458 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:192 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:451 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:444 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:456 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:288 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:459 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:351 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:451 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:289 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:287 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:450 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:446 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:287 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:360 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:362 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:357 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:280 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:458 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:459 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:458 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:366 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:440 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:358 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:290 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:452 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:289 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:445 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:451 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:447 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:362 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:290 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:441 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:449 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:354 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:288 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:445 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:290 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:364 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:288 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:455 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:352 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:280 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:448 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:353 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:287 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:350 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:356 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:288 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:458 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:280 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:461 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:457 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:355 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:362 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:287 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:364 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:290 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:364 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:355 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:280 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:288 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:286 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:192 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:280 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:361 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:453 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:357 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:364 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:457 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:357 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:371 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:459 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:460 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:360 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:352 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:290 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:352 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:358 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:453 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:355 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:355 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:354 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:458 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:359 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:288 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:460 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:358 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:350 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:282 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:367 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:360 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:288 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:364 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:444 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:280 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:281 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:288 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:446 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:350 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:284 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:192 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:278 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:350 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:450 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:280 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:360 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:205 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:353 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:362 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:360 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:291 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:285 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:361 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:192 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:353 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:279 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:359 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:357 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:283 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:200 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:364 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 299, fault_cnt:196 -coverage: 99.915% pattern: 92 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 299, fault_cnt:453 -coverage: 100.000% pattern: 93 before: 1 now: 0 -checking valid circuit ... result: 1. - -real 5m54.878s -user 5m54.850s -sys 0m0.016s diff --git a/exp_result/ATPG-LS_c17.bench.txt b/exp_result/ATPG-LS_c17.bench.txt deleted file mode 100644 index 4937c6f..0000000 --- a/exp_result/ATPG-LS_c17.bench.txt +++ /dev/null @@ -1,29 +0,0 @@ -make: 'atpg' is up to date. -======================== -parsing file ./benchmark/c17.bench ... Done. -====== Circuit Statistics ====== -PI: 5 -PO: 2 -Gate: 11 -Stem: 9 -Level: 2 -================================ -[SOL] flip: 0, stem: 0, fault:8. flip_cnt: 0, stem_cnt: 9, fault_cnt:8 -coverage: 36.364% pattern: 1 before: 22 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:4. flip_cnt: 0, stem_cnt: 9, fault_cnt:9 -coverage: 54.545% pattern: 2 before: 14 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:18. flip_cnt: 0, stem_cnt: 9, fault_cnt:9 -coverage: 90.909% pattern: 3 before: 10 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 9, fault_cnt:8 -coverage: 90.909% pattern: 3 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:2. flip_cnt: 0, stem_cnt: 9, fault_cnt:5 -coverage: 100.000% pattern: 4 before: 2 now: 0 -checking valid circuit ... result: 1. - -real 0m0.003s -user 0m0.002s -sys 0m0.000s diff --git a/exp_result/ATPG-LS_c1908.bench.txt b/exp_result/ATPG-LS_c1908.bench.txt deleted file mode 100644 index 6bc947d..0000000 --- a/exp_result/ATPG-LS_c1908.bench.txt +++ /dev/null @@ -1,18373 +0,0 @@ -make: 'atpg' is up to date. -======================== -parsing file ./benchmark/c1908.bench ... Done. -====== Circuit Statistics ====== -PI: 33 -PO: 25 -Gate: 913 -Stem: 410 -Level: 12 -================================ -[SOL] flip: 0, stem: 0, fault:9294. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 27.820% pattern: 1 before: 1826 now: 1318 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:3231. flip_cnt: 0, stem_cnt: 410, fault_cnt:241 -coverage: 38.171% pattern: 2 before: 1318 now: 1129 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:372. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 39.266% pattern: 3 before: 1129 now: 1109 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:3576. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 49.617% pattern: 4 before: 1109 now: 920 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:2204. flip_cnt: 0, stem_cnt: 410, fault_cnt:444 -coverage: 55.969% pattern: 5 before: 920 now: 804 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:1482. flip_cnt: 0, stem_cnt: 410, fault_cnt:542 -coverage: 60.241% pattern: 6 before: 804 now: 726 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:116. flip_cnt: 0, stem_cnt: 410, fault_cnt:198 -coverage: 60.679% pattern: 7 before: 726 now: 718 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:570. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 62.322% pattern: 8 before: 718 now: 688 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:3533. flip_cnt: 0, stem_cnt: 410, fault_cnt:649 -coverage: 72.563% pattern: 9 before: 688 now: 501 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:190. flip_cnt: 0, stem_cnt: 410, fault_cnt:241 -coverage: 73.111% pattern: 10 before: 501 now: 491 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:233. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 73.877% pattern: 11 before: 491 now: 477 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:133. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 74.261% pattern: 12 before: 477 now: 470 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 410, fault_cnt:462 -coverage: 74.480% pattern: 13 before: 470 now: 466 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:152. flip_cnt: 0, stem_cnt: 410, fault_cnt:466 -coverage: 74.918% pattern: 14 before: 466 now: 458 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 74.918% pattern: 14 before: 458 now: 458 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:460 -coverage: 74.918% pattern: 14 before: 458 now: 458 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:478 -coverage: 74.918% pattern: 14 before: 458 now: 458 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:114. flip_cnt: 0, stem_cnt: 410, fault_cnt:438 -coverage: 75.246% pattern: 15 before: 458 now: 452 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 410, fault_cnt:241 -coverage: 75.520% pattern: 16 before: 452 now: 447 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 410, fault_cnt:464 -coverage: 75.630% pattern: 17 before: 447 now: 445 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 75.630% pattern: 17 before: 445 now: 445 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 75.630% pattern: 17 before: 445 now: 445 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 75.630% pattern: 17 before: 445 now: 445 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:1425. flip_cnt: 0, stem_cnt: 410, fault_cnt:641 -coverage: 79.737% pattern: 18 before: 445 now: 370 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:285. flip_cnt: 0, stem_cnt: 410, fault_cnt:221 -coverage: 80.559% pattern: 19 before: 370 now: 355 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 410, fault_cnt:454 -coverage: 80.668% pattern: 20 before: 355 now: 353 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 80.668% pattern: 20 before: 353 now: 353 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 80.778% pattern: 21 before: 353 now: 351 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136 -coverage: 80.778% pattern: 21 before: 351 now: 351 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 80.778% pattern: 21 before: 351 now: 351 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:476 -coverage: 80.778% pattern: 21 before: 351 now: 351 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:475 -coverage: 80.778% pattern: 21 before: 351 now: 351 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:248 -coverage: 80.778% pattern: 21 before: 351 now: 351 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 80.778% pattern: 21 before: 351 now: 351 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:483 -coverage: 80.778% pattern: 21 before: 351 now: 351 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:521 -coverage: 80.778% pattern: 21 before: 351 now: 351 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:469 -coverage: 80.778% pattern: 21 before: 351 now: 351 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:489 -coverage: 80.778% pattern: 21 before: 351 now: 351 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 80.778% pattern: 21 before: 351 now: 351 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:447 -coverage: 80.778% pattern: 21 before: 351 now: 351 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 80.778% pattern: 21 before: 351 now: 351 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:244 -coverage: 80.778% pattern: 21 before: 351 now: 351 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:526 -coverage: 80.778% pattern: 21 before: 351 now: 351 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519 -coverage: 80.778% pattern: 21 before: 351 now: 351 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:134 -coverage: 80.778% pattern: 21 before: 351 now: 351 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 80.778% pattern: 21 before: 351 now: 351 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492 -coverage: 80.778% pattern: 21 before: 351 now: 351 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 80.778% pattern: 21 before: 351 now: 351 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:237 -coverage: 80.778% pattern: 21 before: 351 now: 351 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:462 -coverage: 80.778% pattern: 21 before: 351 now: 351 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:525 -coverage: 80.778% pattern: 21 before: 351 now: 351 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 80.778% pattern: 21 before: 351 now: 351 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:473 -coverage: 80.778% pattern: 21 before: 351 now: 351 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 80.778% pattern: 21 before: 351 now: 351 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 80.778% pattern: 21 before: 351 now: 351 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:912. flip_cnt: 0, stem_cnt: 410, fault_cnt:624 -coverage: 83.406% pattern: 22 before: 351 now: 303 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:442 -coverage: 83.406% pattern: 22 before: 303 now: 303 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:531 -coverage: 83.406% pattern: 22 before: 303 now: 303 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 83.406% pattern: 22 before: 303 now: 303 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:145 -coverage: 83.406% pattern: 22 before: 303 now: 303 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497 -coverage: 83.406% pattern: 22 before: 303 now: 303 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 83.406% pattern: 22 before: 303 now: 303 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 83.406% pattern: 22 before: 303 now: 303 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:722. flip_cnt: 0, stem_cnt: 410, fault_cnt:586 -coverage: 85.487% pattern: 23 before: 303 now: 265 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 410, fault_cnt:462 -coverage: 85.597% pattern: 24 before: 265 now: 263 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497 -coverage: 85.597% pattern: 24 before: 263 now: 263 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 85.597% pattern: 24 before: 263 now: 263 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496 -coverage: 85.597% pattern: 24 before: 263 now: 263 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:238 -coverage: 85.597% pattern: 24 before: 263 now: 263 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 410, fault_cnt:535 -coverage: 85.652% pattern: 25 before: 263 now: 262 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:446 -coverage: 85.652% pattern: 25 before: 262 now: 262 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 410, fault_cnt:467 -coverage: 85.706% pattern: 26 before: 262 now: 261 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 410, fault_cnt:529 -coverage: 85.926% pattern: 27 before: 261 now: 257 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:473 -coverage: 85.926% pattern: 27 before: 257 now: 257 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 85.926% pattern: 27 before: 257 now: 257 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:461 -coverage: 85.926% pattern: 27 before: 257 now: 257 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239 -coverage: 85.926% pattern: 27 before: 257 now: 257 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 85.926% pattern: 27 before: 257 now: 257 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 85.926% pattern: 27 before: 257 now: 257 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 410, fault_cnt:538 -coverage: 86.035% pattern: 28 before: 257 now: 255 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:440 -coverage: 86.035% pattern: 28 before: 255 now: 255 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497 -coverage: 86.035% pattern: 28 before: 255 now: 255 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:480 -coverage: 86.035% pattern: 28 before: 255 now: 255 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:439 -coverage: 86.035% pattern: 28 before: 255 now: 255 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:487 -coverage: 86.035% pattern: 28 before: 255 now: 255 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:448 -coverage: 86.035% pattern: 28 before: 255 now: 255 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 86.035% pattern: 28 before: 255 now: 255 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:451 -coverage: 86.035% pattern: 28 before: 255 now: 255 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185 -coverage: 86.035% pattern: 28 before: 255 now: 255 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:438 -coverage: 86.035% pattern: 28 before: 255 now: 255 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 86.035% pattern: 28 before: 255 now: 255 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 86.035% pattern: 28 before: 255 now: 255 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 86.035% pattern: 28 before: 255 now: 255 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:536 -coverage: 86.035% pattern: 28 before: 255 now: 255 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:128 -coverage: 86.035% pattern: 28 before: 255 now: 255 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497 -coverage: 86.035% pattern: 28 before: 255 now: 255 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 410, fault_cnt:199 -coverage: 86.090% pattern: 29 before: 255 now: 254 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:453 -coverage: 86.090% pattern: 29 before: 254 now: 254 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239 -coverage: 86.090% pattern: 29 before: 254 now: 254 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 86.090% pattern: 29 before: 254 now: 254 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:493 -coverage: 86.090% pattern: 29 before: 254 now: 254 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:458 -coverage: 86.090% pattern: 29 before: 254 now: 254 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:460 -coverage: 86.090% pattern: 29 before: 254 now: 254 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:461 -coverage: 86.090% pattern: 29 before: 254 now: 254 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:474 -coverage: 86.090% pattern: 29 before: 254 now: 254 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:474 -coverage: 86.090% pattern: 29 before: 254 now: 254 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 86.090% pattern: 29 before: 254 now: 254 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:183 -coverage: 86.090% pattern: 29 before: 254 now: 254 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:144 -coverage: 86.090% pattern: 29 before: 254 now: 254 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:478 -coverage: 86.090% pattern: 29 before: 254 now: 254 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:193 -coverage: 86.090% pattern: 29 before: 254 now: 254 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136 -coverage: 86.090% pattern: 29 before: 254 now: 254 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 86.090% pattern: 29 before: 254 now: 254 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 410, fault_cnt:523 -coverage: 86.199% pattern: 30 before: 254 now: 252 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:531 -coverage: 86.199% pattern: 30 before: 252 now: 252 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 86.199% pattern: 30 before: 252 now: 252 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:494 -coverage: 86.199% pattern: 30 before: 252 now: 252 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 86.199% pattern: 30 before: 252 now: 252 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 86.199% pattern: 30 before: 252 now: 252 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 86.199% pattern: 30 before: 252 now: 252 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 86.199% pattern: 30 before: 252 now: 252 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 86.199% pattern: 30 before: 252 now: 252 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136 -coverage: 86.199% pattern: 30 before: 252 now: 252 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 86.199% pattern: 30 before: 252 now: 252 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:466 -coverage: 86.199% pattern: 30 before: 252 now: 252 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:442 -coverage: 86.199% pattern: 30 before: 252 now: 252 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:141 -coverage: 86.199% pattern: 30 before: 252 now: 252 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:443 -coverage: 86.199% pattern: 30 before: 252 now: 252 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:184 -coverage: 86.199% pattern: 30 before: 252 now: 252 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:478 -coverage: 86.199% pattern: 30 before: 252 now: 252 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519 -coverage: 86.199% pattern: 30 before: 252 now: 252 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:114. flip_cnt: 0, stem_cnt: 410, fault_cnt:523 -coverage: 86.528% pattern: 31 before: 252 now: 246 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:231 -coverage: 86.528% pattern: 31 before: 246 now: 246 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520 -coverage: 86.528% pattern: 31 before: 246 now: 246 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:452 -coverage: 86.528% pattern: 31 before: 246 now: 246 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 86.528% pattern: 31 before: 246 now: 246 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:193 -coverage: 86.528% pattern: 31 before: 246 now: 246 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 86.528% pattern: 31 before: 246 now: 246 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 410, fault_cnt:520 -coverage: 86.583% pattern: 32 before: 246 now: 245 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 86.583% pattern: 32 before: 245 now: 245 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 86.583% pattern: 32 before: 245 now: 245 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 86.583% pattern: 32 before: 245 now: 245 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:246 -coverage: 86.583% pattern: 32 before: 245 now: 245 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 86.583% pattern: 32 before: 245 now: 245 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 86.583% pattern: 32 before: 245 now: 245 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:141 -coverage: 86.583% pattern: 32 before: 245 now: 245 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 86.583% pattern: 32 before: 245 now: 245 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:463 -coverage: 86.583% pattern: 32 before: 245 now: 245 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 86.583% pattern: 32 before: 245 now: 245 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 86.583% pattern: 32 before: 245 now: 245 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 86.583% pattern: 32 before: 245 now: 245 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 86.583% pattern: 32 before: 245 now: 245 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:478 -coverage: 86.583% pattern: 32 before: 245 now: 245 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:137 -coverage: 86.583% pattern: 32 before: 245 now: 245 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:456 -coverage: 86.583% pattern: 32 before: 245 now: 245 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:469 -coverage: 86.583% pattern: 32 before: 245 now: 245 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 86.583% pattern: 32 before: 245 now: 245 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 86.583% pattern: 32 before: 245 now: 245 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:141 -coverage: 86.583% pattern: 32 before: 245 now: 245 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:456 -coverage: 86.583% pattern: 32 before: 245 now: 245 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 86.583% pattern: 32 before: 245 now: 245 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 86.583% pattern: 32 before: 245 now: 245 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 86.583% pattern: 32 before: 245 now: 245 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 86.583% pattern: 32 before: 245 now: 245 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:141 -coverage: 86.583% pattern: 32 before: 245 now: 245 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:447 -coverage: 86.583% pattern: 32 before: 245 now: 245 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 86.583% pattern: 32 before: 245 now: 245 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:470 -coverage: 86.583% pattern: 32 before: 245 now: 245 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495 -coverage: 86.583% pattern: 32 before: 245 now: 245 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 86.583% pattern: 32 before: 245 now: 245 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:458 -coverage: 86.583% pattern: 32 before: 245 now: 245 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:488 -coverage: 86.583% pattern: 32 before: 245 now: 245 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:529 -coverage: 86.583% pattern: 32 before: 245 now: 245 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 86.583% pattern: 32 before: 245 now: 245 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:128 -coverage: 86.583% pattern: 32 before: 245 now: 245 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 86.583% pattern: 32 before: 245 now: 245 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:521 -coverage: 86.583% pattern: 32 before: 245 now: 245 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:437. flip_cnt: 0, stem_cnt: 410, fault_cnt:545 -coverage: 87.842% pattern: 33 before: 245 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:448 -coverage: 87.842% pattern: 33 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:474 -coverage: 87.842% pattern: 33 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:472 -coverage: 87.842% pattern: 33 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:183 -coverage: 87.842% pattern: 33 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 87.842% pattern: 33 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:137 -coverage: 87.842% pattern: 33 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:458 -coverage: 87.842% pattern: 33 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519 -coverage: 87.842% pattern: 33 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497 -coverage: 87.842% pattern: 33 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 87.842% pattern: 33 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 87.842% pattern: 33 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:141 -coverage: 87.842% pattern: 33 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:479 -coverage: 87.842% pattern: 33 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 87.842% pattern: 33 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 87.842% pattern: 33 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:988. flip_cnt: 0, stem_cnt: 410, fault_cnt:636 -coverage: 90.690% pattern: 34 before: 222 now: 170 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 90.690% pattern: 34 before: 170 now: 170 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 90.690% pattern: 34 before: 170 now: 170 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 90.690% pattern: 34 before: 170 now: 170 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:469 -coverage: 90.690% pattern: 34 before: 170 now: 170 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 90.690% pattern: 34 before: 170 now: 170 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:464 -coverage: 90.690% pattern: 34 before: 170 now: 170 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 90.690% pattern: 34 before: 170 now: 170 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:476 -coverage: 90.690% pattern: 34 before: 170 now: 170 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 90.690% pattern: 34 before: 170 now: 170 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 90.690% pattern: 34 before: 170 now: 170 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:479 -coverage: 90.690% pattern: 34 before: 170 now: 170 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519 -coverage: 90.690% pattern: 34 before: 170 now: 170 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 90.690% pattern: 34 before: 170 now: 170 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 90.690% pattern: 34 before: 170 now: 170 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 410, fault_cnt:272 -coverage: 90.800% pattern: 35 before: 170 now: 168 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 90.800% pattern: 35 before: 168 now: 168 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:242 -coverage: 90.800% pattern: 35 before: 168 now: 168 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:134 -coverage: 90.800% pattern: 35 before: 168 now: 168 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:190. flip_cnt: 0, stem_cnt: 410, fault_cnt:645 -coverage: 91.347% pattern: 36 before: 168 now: 158 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:137 -coverage: 91.347% pattern: 36 before: 158 now: 158 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 91.347% pattern: 36 before: 158 now: 158 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:450 -coverage: 91.347% pattern: 36 before: 158 now: 158 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 91.347% pattern: 36 before: 158 now: 158 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 91.347% pattern: 36 before: 158 now: 158 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 91.347% pattern: 36 before: 158 now: 158 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 91.347% pattern: 36 before: 158 now: 158 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:528 -coverage: 91.347% pattern: 36 before: 158 now: 158 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:524 -coverage: 91.347% pattern: 36 before: 158 now: 158 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:179 -coverage: 91.347% pattern: 36 before: 158 now: 158 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136 -coverage: 91.347% pattern: 36 before: 158 now: 158 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 91.347% pattern: 36 before: 158 now: 158 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:475 -coverage: 91.347% pattern: 36 before: 158 now: 158 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:248 -coverage: 91.347% pattern: 36 before: 158 now: 158 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 91.347% pattern: 36 before: 158 now: 158 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 91.347% pattern: 36 before: 158 now: 158 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:477 -coverage: 91.347% pattern: 36 before: 158 now: 158 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 91.347% pattern: 36 before: 158 now: 158 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:468 -coverage: 91.347% pattern: 36 before: 158 now: 158 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 91.347% pattern: 36 before: 158 now: 158 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 91.347% pattern: 36 before: 158 now: 158 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:441 -coverage: 91.347% pattern: 36 before: 158 now: 158 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 91.347% pattern: 36 before: 158 now: 158 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 91.347% pattern: 36 before: 158 now: 158 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 91.347% pattern: 36 before: 158 now: 158 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 410, fault_cnt:520 -coverage: 91.621% pattern: 37 before: 158 now: 153 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:452 -coverage: 91.621% pattern: 37 before: 153 now: 153 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 91.621% pattern: 37 before: 153 now: 153 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185 -coverage: 91.621% pattern: 37 before: 153 now: 153 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492 -coverage: 91.621% pattern: 37 before: 153 now: 153 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:453 -coverage: 91.621% pattern: 37 before: 153 now: 153 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:473 -coverage: 91.621% pattern: 37 before: 153 now: 153 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 91.621% pattern: 37 before: 153 now: 153 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 91.621% pattern: 37 before: 153 now: 153 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 91.621% pattern: 37 before: 153 now: 153 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:134 -coverage: 91.621% pattern: 37 before: 153 now: 153 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:481 -coverage: 91.621% pattern: 37 before: 153 now: 153 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 91.621% pattern: 37 before: 153 now: 153 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:472 -coverage: 91.621% pattern: 37 before: 153 now: 153 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:137 -coverage: 91.621% pattern: 37 before: 153 now: 153 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:466 -coverage: 91.621% pattern: 37 before: 153 now: 153 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 91.621% pattern: 37 before: 153 now: 153 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 91.621% pattern: 37 before: 153 now: 153 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 91.621% pattern: 37 before: 153 now: 153 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:448 -coverage: 91.621% pattern: 37 before: 153 now: 153 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 91.621% pattern: 37 before: 153 now: 153 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 91.621% pattern: 37 before: 153 now: 153 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 91.621% pattern: 37 before: 153 now: 153 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 91.621% pattern: 37 before: 153 now: 153 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 410, fault_cnt:594 -coverage: 91.895% pattern: 38 before: 153 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:234 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:234 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:233 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:184 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:431 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:445 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:203 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:246 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:491 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:462 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:485 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:224 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:137 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:230 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:235 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:523 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:145 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:472 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:524 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:461 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:197 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:463 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:232 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:242 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:487 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:137 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:184 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:433 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:203 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:523 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:484 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:446 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:534 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:493 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:467 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:533 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:438 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:465 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:489 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:444 -coverage: 91.895% pattern: 38 before: 148 now: 148 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:228. flip_cnt: 0, stem_cnt: 410, fault_cnt:668 -coverage: 92.552% pattern: 39 before: 148 now: 136 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:485 -coverage: 92.552% pattern: 39 before: 136 now: 136 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:478 -coverage: 92.552% pattern: 39 before: 136 now: 136 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497 -coverage: 92.552% pattern: 39 before: 136 now: 136 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:472 -coverage: 92.552% pattern: 39 before: 136 now: 136 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:477 -coverage: 92.552% pattern: 39 before: 136 now: 136 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:472 -coverage: 92.552% pattern: 39 before: 136 now: 136 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 410, fault_cnt:544 -coverage: 92.607% pattern: 40 before: 136 now: 135 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 92.607% pattern: 40 before: 135 now: 135 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:242 -coverage: 92.607% pattern: 40 before: 135 now: 135 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 92.607% pattern: 40 before: 135 now: 135 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 92.607% pattern: 40 before: 135 now: 135 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 92.607% pattern: 40 before: 135 now: 135 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239 -coverage: 92.607% pattern: 40 before: 135 now: 135 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 92.607% pattern: 40 before: 135 now: 135 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 92.607% pattern: 40 before: 135 now: 135 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 92.607% pattern: 40 before: 135 now: 135 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 92.607% pattern: 40 before: 135 now: 135 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:494 -coverage: 92.607% pattern: 40 before: 135 now: 135 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136 -coverage: 92.607% pattern: 40 before: 135 now: 135 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:141 -coverage: 92.607% pattern: 40 before: 135 now: 135 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 92.607% pattern: 40 before: 135 now: 135 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:129 -coverage: 92.607% pattern: 40 before: 135 now: 135 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:135 -coverage: 92.607% pattern: 40 before: 135 now: 135 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:524 -coverage: 92.607% pattern: 40 before: 135 now: 135 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 410, fault_cnt:630 -coverage: 92.826% pattern: 41 before: 135 now: 131 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:471 -coverage: 92.826% pattern: 41 before: 131 now: 131 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:529 -coverage: 92.826% pattern: 41 before: 131 now: 131 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 92.826% pattern: 41 before: 131 now: 131 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 92.826% pattern: 41 before: 131 now: 131 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 410, fault_cnt:567 -coverage: 93.045% pattern: 42 before: 131 now: 127 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 93.045% pattern: 42 before: 127 now: 127 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 410, fault_cnt:540 -coverage: 93.209% pattern: 43 before: 127 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:246 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:521 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:478 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:490 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:465 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:241 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:244 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:243 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:464 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:475 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:475 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:137 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:522 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:219 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:180 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:475 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:240 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:472 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:462 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:133 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:525 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:474 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:245 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:487 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497 -coverage: 93.209% pattern: 43 before: 124 now: 124 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:114. flip_cnt: 0, stem_cnt: 410, fault_cnt:538 -coverage: 93.538% pattern: 44 before: 124 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:181 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:488 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:135 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:453 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:466 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:461 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:200 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:471 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:238 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:483 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:537 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:461 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:488 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:466 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:478 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:524 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:595 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:459 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:193 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:459 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:471 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:241 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:480 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:238 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:480 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:446 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:441 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:233 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:204 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:484 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:196 -coverage: 93.538% pattern: 44 before: 118 now: 118 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 410, fault_cnt:642 -coverage: 93.757% pattern: 45 before: 118 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 93.757% pattern: 45 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:451 -coverage: 93.757% pattern: 45 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 93.757% pattern: 45 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 93.757% pattern: 45 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 93.757% pattern: 45 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 93.757% pattern: 45 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:493 -coverage: 93.757% pattern: 45 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:193 -coverage: 93.757% pattern: 45 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 93.757% pattern: 45 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 93.757% pattern: 45 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 93.757% pattern: 45 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 93.757% pattern: 45 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 93.757% pattern: 45 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495 -coverage: 93.757% pattern: 45 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 93.757% pattern: 45 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:237 -coverage: 93.757% pattern: 45 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 93.757% pattern: 45 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:476 -coverage: 93.757% pattern: 45 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 93.757% pattern: 45 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 93.757% pattern: 45 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:437 -coverage: 93.757% pattern: 45 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 93.757% pattern: 45 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 93.757% pattern: 45 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 93.757% pattern: 45 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:477 -coverage: 93.757% pattern: 45 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:473 -coverage: 93.757% pattern: 45 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 93.757% pattern: 45 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 93.757% pattern: 45 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 93.757% pattern: 45 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:452 -coverage: 93.757% pattern: 45 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 93.757% pattern: 45 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 93.757% pattern: 45 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:234 -coverage: 93.757% pattern: 45 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:472 -coverage: 93.757% pattern: 45 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519 -coverage: 93.757% pattern: 45 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492 -coverage: 93.757% pattern: 45 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 93.757% pattern: 45 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:481 -coverage: 93.757% pattern: 45 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 93.757% pattern: 45 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:242 -coverage: 93.757% pattern: 45 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 93.757% pattern: 45 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520 -coverage: 93.757% pattern: 45 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:480 -coverage: 93.757% pattern: 45 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:522 -coverage: 93.757% pattern: 45 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 93.757% pattern: 45 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:525 -coverage: 93.757% pattern: 45 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 93.757% pattern: 45 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 93.757% pattern: 45 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:440 -coverage: 93.757% pattern: 45 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:491 -coverage: 93.757% pattern: 45 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:468 -coverage: 93.757% pattern: 45 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495 -coverage: 93.757% pattern: 45 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 93.757% pattern: 45 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:443 -coverage: 93.757% pattern: 45 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 93.757% pattern: 45 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:489 -coverage: 93.757% pattern: 45 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 93.757% pattern: 45 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 93.757% pattern: 45 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:114. flip_cnt: 0, stem_cnt: 410, fault_cnt:537 -coverage: 94.085% pattern: 46 before: 114 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:528 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:198 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:526 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:480 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:523 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:472 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:540 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:452 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:558 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:233 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:240 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:472 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:477 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:240 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:471 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:464 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:183 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:134 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:576 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:247 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:442 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:530 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:465 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:243 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:526 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:466 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:197 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:241 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:470 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:487 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:141 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:133 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:471 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:480 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:578 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:485 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:145 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:193 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:523 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:487 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:525 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:524 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:133 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:477 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:482 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:490 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:491 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:248 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:237 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:454 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:471 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:487 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:463 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:463 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:137 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:457 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:214 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:522 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:240 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:199 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:475 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:196 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:470 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:521 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:580 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:568 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:468 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:449 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:488 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:468 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:527 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:473 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 94.085% pattern: 46 before: 108 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 410, fault_cnt:569 -coverage: 94.250% pattern: 47 before: 108 now: 105 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 94.250% pattern: 47 before: 105 now: 105 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 94.250% pattern: 47 before: 105 now: 105 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 94.250% pattern: 47 before: 105 now: 105 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 94.250% pattern: 47 before: 105 now: 105 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:196 -coverage: 94.250% pattern: 47 before: 105 now: 105 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 94.250% pattern: 47 before: 105 now: 105 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 410, fault_cnt:581 -coverage: 94.304% pattern: 48 before: 105 now: 104 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:231 -coverage: 94.304% pattern: 48 before: 104 now: 104 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 94.304% pattern: 48 before: 104 now: 104 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 94.304% pattern: 48 before: 104 now: 104 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 94.304% pattern: 48 before: 104 now: 104 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:521 -coverage: 94.304% pattern: 48 before: 104 now: 104 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:473 -coverage: 94.304% pattern: 48 before: 104 now: 104 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 94.304% pattern: 48 before: 104 now: 104 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 94.304% pattern: 48 before: 104 now: 104 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:477 -coverage: 94.304% pattern: 48 before: 104 now: 104 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 94.304% pattern: 48 before: 104 now: 104 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:491 -coverage: 94.304% pattern: 48 before: 104 now: 104 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:528 -coverage: 94.304% pattern: 48 before: 104 now: 104 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496 -coverage: 94.304% pattern: 48 before: 104 now: 104 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 94.304% pattern: 48 before: 104 now: 104 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:521 -coverage: 94.304% pattern: 48 before: 104 now: 104 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 94.304% pattern: 48 before: 104 now: 104 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519 -coverage: 94.304% pattern: 48 before: 104 now: 104 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:473 -coverage: 94.304% pattern: 48 before: 104 now: 104 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:183 -coverage: 94.304% pattern: 48 before: 104 now: 104 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 94.304% pattern: 48 before: 104 now: 104 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:196 -coverage: 94.304% pattern: 48 before: 104 now: 104 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 94.304% pattern: 48 before: 104 now: 104 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 94.304% pattern: 48 before: 104 now: 104 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:451 -coverage: 94.304% pattern: 48 before: 104 now: 104 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 94.304% pattern: 48 before: 104 now: 104 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 94.304% pattern: 48 before: 104 now: 104 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:635 -coverage: 94.304% pattern: 48 before: 104 now: 104 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:523 -coverage: 94.304% pattern: 48 before: 104 now: 104 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:463 -coverage: 94.304% pattern: 48 before: 104 now: 104 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 94.304% pattern: 48 before: 104 now: 104 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:490 -coverage: 94.304% pattern: 48 before: 104 now: 104 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:241 -coverage: 94.304% pattern: 48 before: 104 now: 104 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 94.304% pattern: 48 before: 104 now: 104 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 94.304% pattern: 48 before: 104 now: 104 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:456 -coverage: 94.304% pattern: 48 before: 104 now: 104 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:134 -coverage: 94.304% pattern: 48 before: 104 now: 104 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:524 -coverage: 94.304% pattern: 48 before: 104 now: 104 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:487 -coverage: 94.304% pattern: 48 before: 104 now: 104 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136 -coverage: 94.304% pattern: 48 before: 104 now: 104 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:526 -coverage: 94.304% pattern: 48 before: 104 now: 104 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:137 -coverage: 94.304% pattern: 48 before: 104 now: 104 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520 -coverage: 94.304% pattern: 48 before: 104 now: 104 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 94.304% pattern: 48 before: 104 now: 104 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:540 -coverage: 94.304% pattern: 48 before: 104 now: 104 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 94.304% pattern: 48 before: 104 now: 104 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 94.304% pattern: 48 before: 104 now: 104 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 94.304% pattern: 48 before: 104 now: 104 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 94.304% pattern: 48 before: 104 now: 104 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 94.304% pattern: 48 before: 104 now: 104 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:474 -coverage: 94.304% pattern: 48 before: 104 now: 104 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497 -coverage: 94.304% pattern: 48 before: 104 now: 104 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:466 -coverage: 94.304% pattern: 48 before: 104 now: 104 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:461 -coverage: 94.304% pattern: 48 before: 104 now: 104 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 94.304% pattern: 48 before: 104 now: 104 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 94.304% pattern: 48 before: 104 now: 104 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 94.304% pattern: 48 before: 104 now: 104 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 410, fault_cnt:624 -coverage: 94.469% pattern: 49 before: 104 now: 101 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 94.469% pattern: 49 before: 101 now: 101 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 94.469% pattern: 49 before: 101 now: 101 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:454 -coverage: 94.469% pattern: 49 before: 101 now: 101 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 94.469% pattern: 49 before: 101 now: 101 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:78. flip_cnt: 0, stem_cnt: 410, fault_cnt:601 -coverage: 94.797% pattern: 50 before: 101 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:135 -coverage: 94.797% pattern: 50 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:467 -coverage: 94.797% pattern: 50 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 94.797% pattern: 50 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 94.797% pattern: 50 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:525 -coverage: 94.797% pattern: 50 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 94.797% pattern: 50 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:477 -coverage: 94.797% pattern: 50 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 94.797% pattern: 50 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 94.797% pattern: 50 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 94.797% pattern: 50 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:472 -coverage: 94.797% pattern: 50 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492 -coverage: 94.797% pattern: 50 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 94.797% pattern: 50 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 94.797% pattern: 50 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 94.797% pattern: 50 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 94.797% pattern: 50 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 94.797% pattern: 50 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:487 -coverage: 94.797% pattern: 50 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:244 -coverage: 94.797% pattern: 50 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:474 -coverage: 94.797% pattern: 50 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 94.797% pattern: 50 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:480 -coverage: 94.797% pattern: 50 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 94.797% pattern: 50 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 94.797% pattern: 50 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 94.797% pattern: 50 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:452 -coverage: 94.797% pattern: 50 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 94.797% pattern: 50 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 94.797% pattern: 50 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 94.797% pattern: 50 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:523 -coverage: 94.797% pattern: 50 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 94.797% pattern: 50 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496 -coverage: 94.797% pattern: 50 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496 -coverage: 94.797% pattern: 50 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 94.797% pattern: 50 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 94.797% pattern: 50 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 94.797% pattern: 50 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:464 -coverage: 94.797% pattern: 50 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 94.797% pattern: 50 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:133 -coverage: 94.797% pattern: 50 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:479 -coverage: 94.797% pattern: 50 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 94.797% pattern: 50 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:434 -coverage: 94.797% pattern: 50 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 94.797% pattern: 50 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 94.797% pattern: 50 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:476 -coverage: 94.797% pattern: 50 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 94.797% pattern: 50 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 410, fault_cnt:525 -coverage: 94.907% pattern: 51 before: 95 now: 93 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:484 -coverage: 94.907% pattern: 51 before: 93 now: 93 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:182 -coverage: 94.907% pattern: 51 before: 93 now: 93 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 94.907% pattern: 51 before: 93 now: 93 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 94.907% pattern: 51 before: 93 now: 93 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136 -coverage: 94.907% pattern: 51 before: 93 now: 93 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 94.907% pattern: 51 before: 93 now: 93 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 94.907% pattern: 51 before: 93 now: 93 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 94.907% pattern: 51 before: 93 now: 93 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 94.907% pattern: 51 before: 93 now: 93 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 94.907% pattern: 51 before: 93 now: 93 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520 -coverage: 94.907% pattern: 51 before: 93 now: 93 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 94.907% pattern: 51 before: 93 now: 93 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:442 -coverage: 94.907% pattern: 51 before: 93 now: 93 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:141 -coverage: 94.907% pattern: 51 before: 93 now: 93 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 410, fault_cnt:592 -coverage: 95.016% pattern: 52 before: 93 now: 91 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 95.016% pattern: 52 before: 91 now: 91 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 95.016% pattern: 52 before: 91 now: 91 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 95.016% pattern: 52 before: 91 now: 91 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:482 -coverage: 95.016% pattern: 52 before: 91 now: 91 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:180 -coverage: 95.016% pattern: 52 before: 91 now: 91 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492 -coverage: 95.016% pattern: 52 before: 91 now: 91 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:183 -coverage: 95.016% pattern: 52 before: 91 now: 91 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497 -coverage: 95.016% pattern: 52 before: 91 now: 91 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 95.016% pattern: 52 before: 91 now: 91 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:245 -coverage: 95.016% pattern: 52 before: 91 now: 91 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:483 -coverage: 95.016% pattern: 52 before: 91 now: 91 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 95.235% pattern: 53 before: 91 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:482 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:525 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:479 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:237 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:463 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:234 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:524 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:137 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:535 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:572 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:491 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:489 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:493 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:133 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:235 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:243 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:464 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:521 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:196 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:539 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:525 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:247 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:241 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:134 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:199 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:469 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:468 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:488 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:445 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:494 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:245 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:470 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:478 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:476 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:523 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:242 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:141 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:530 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:472 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:235 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:436 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:246 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:552 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:468 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:482 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:523 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:177 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:443 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:458 -coverage: 95.235% pattern: 53 before: 87 now: 87 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 410, fault_cnt:651 -coverage: 95.455% pattern: 54 before: 87 now: 83 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 95.455% pattern: 54 before: 83 now: 83 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:235 -coverage: 95.455% pattern: 54 before: 83 now: 83 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 95.455% pattern: 54 before: 83 now: 83 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 95.455% pattern: 54 before: 83 now: 83 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:475 -coverage: 95.455% pattern: 54 before: 83 now: 83 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 95.455% pattern: 54 before: 83 now: 83 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 95.455% pattern: 54 before: 83 now: 83 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 95.455% pattern: 54 before: 83 now: 83 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:238 -coverage: 95.455% pattern: 54 before: 83 now: 83 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519 -coverage: 95.455% pattern: 54 before: 83 now: 83 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 95.455% pattern: 54 before: 83 now: 83 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497 -coverage: 95.455% pattern: 54 before: 83 now: 83 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:480 -coverage: 95.455% pattern: 54 before: 83 now: 83 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 95.455% pattern: 54 before: 83 now: 83 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:241 -coverage: 95.455% pattern: 54 before: 83 now: 83 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:241 -coverage: 95.455% pattern: 54 before: 83 now: 83 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:450 -coverage: 95.455% pattern: 54 before: 83 now: 83 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 95.455% pattern: 54 before: 83 now: 83 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:198 -coverage: 95.455% pattern: 54 before: 83 now: 83 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:469 -coverage: 95.455% pattern: 54 before: 83 now: 83 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 95.455% pattern: 54 before: 83 now: 83 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 95.455% pattern: 54 before: 83 now: 83 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:242 -coverage: 95.455% pattern: 54 before: 83 now: 83 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:241 -coverage: 95.455% pattern: 54 before: 83 now: 83 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 95.455% pattern: 54 before: 83 now: 83 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:485 -coverage: 95.455% pattern: 54 before: 83 now: 83 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:524 -coverage: 95.455% pattern: 54 before: 83 now: 83 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 95.619% pattern: 55 before: 83 now: 80 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:493 -coverage: 95.619% pattern: 55 before: 80 now: 80 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 95.619% pattern: 55 before: 80 now: 80 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 95.619% pattern: 55 before: 80 now: 80 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 95.619% pattern: 55 before: 80 now: 80 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:193 -coverage: 95.619% pattern: 55 before: 80 now: 80 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:243 -coverage: 95.619% pattern: 55 before: 80 now: 80 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 95.619% pattern: 55 before: 80 now: 80 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:193 -coverage: 95.619% pattern: 55 before: 80 now: 80 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 95.619% pattern: 55 before: 80 now: 80 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:476 -coverage: 95.619% pattern: 55 before: 80 now: 80 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:184 -coverage: 95.619% pattern: 55 before: 80 now: 80 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:545 -coverage: 95.619% pattern: 55 before: 80 now: 80 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 95.619% pattern: 55 before: 80 now: 80 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 95.619% pattern: 55 before: 80 now: 80 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:491 -coverage: 95.619% pattern: 55 before: 80 now: 80 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 95.619% pattern: 55 before: 80 now: 80 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:491 -coverage: 95.619% pattern: 55 before: 80 now: 80 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 95.619% pattern: 55 before: 80 now: 80 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 95.619% pattern: 55 before: 80 now: 80 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:449 -coverage: 95.619% pattern: 55 before: 80 now: 80 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 95.619% pattern: 55 before: 80 now: 80 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:532 -coverage: 95.619% pattern: 55 before: 80 now: 80 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:249 -coverage: 95.619% pattern: 55 before: 80 now: 80 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 95.619% pattern: 55 before: 80 now: 80 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 95.619% pattern: 55 before: 80 now: 80 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 95.619% pattern: 55 before: 80 now: 80 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 95.619% pattern: 55 before: 80 now: 80 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:489 -coverage: 95.619% pattern: 55 before: 80 now: 80 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 95.619% pattern: 55 before: 80 now: 80 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:242 -coverage: 95.619% pattern: 55 before: 80 now: 80 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:475 -coverage: 95.619% pattern: 55 before: 80 now: 80 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 95.619% pattern: 55 before: 80 now: 80 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 95.619% pattern: 55 before: 80 now: 80 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 95.619% pattern: 55 before: 80 now: 80 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:462 -coverage: 95.619% pattern: 55 before: 80 now: 80 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:443 -coverage: 95.619% pattern: 55 before: 80 now: 80 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:244 -coverage: 95.619% pattern: 55 before: 80 now: 80 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:485 -coverage: 95.619% pattern: 55 before: 80 now: 80 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 410, fault_cnt:642 -coverage: 95.838% pattern: 56 before: 80 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 95.838% pattern: 56 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 95.838% pattern: 56 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 95.838% pattern: 56 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:475 -coverage: 95.838% pattern: 56 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:482 -coverage: 95.838% pattern: 56 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 95.838% pattern: 56 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 95.838% pattern: 56 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:533 -coverage: 95.838% pattern: 56 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:483 -coverage: 95.838% pattern: 56 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 95.838% pattern: 56 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239 -coverage: 95.838% pattern: 56 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:241 -coverage: 95.838% pattern: 56 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 95.838% pattern: 56 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:534 -coverage: 95.838% pattern: 56 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:475 -coverage: 95.838% pattern: 56 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:198 -coverage: 95.838% pattern: 56 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:183 -coverage: 95.838% pattern: 56 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 95.838% pattern: 56 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 95.838% pattern: 56 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 95.838% pattern: 56 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:470 -coverage: 95.838% pattern: 56 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 95.838% pattern: 56 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 95.838% pattern: 56 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:493 -coverage: 95.838% pattern: 56 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:566 -coverage: 95.838% pattern: 56 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:470 -coverage: 95.838% pattern: 56 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239 -coverage: 95.838% pattern: 56 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 95.838% pattern: 56 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 95.838% pattern: 56 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 95.838% pattern: 56 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:461 -coverage: 95.838% pattern: 56 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 95.838% pattern: 56 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:522 -coverage: 95.838% pattern: 56 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:526 -coverage: 95.838% pattern: 56 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:477 -coverage: 95.838% pattern: 56 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185 -coverage: 95.838% pattern: 56 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:198 -coverage: 95.838% pattern: 56 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 95.947% pattern: 57 before: 76 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:458 -coverage: 95.947% pattern: 57 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 95.947% pattern: 57 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 95.947% pattern: 57 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 95.947% pattern: 57 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:243 -coverage: 95.947% pattern: 57 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 95.947% pattern: 57 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:480 -coverage: 95.947% pattern: 57 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:489 -coverage: 95.947% pattern: 57 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497 -coverage: 95.947% pattern: 57 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 95.947% pattern: 57 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 95.947% pattern: 57 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495 -coverage: 95.947% pattern: 57 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:145 -coverage: 95.947% pattern: 57 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:522 -coverage: 95.947% pattern: 57 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 95.947% pattern: 57 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 95.947% pattern: 57 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 95.947% pattern: 57 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 95.947% pattern: 57 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:441 -coverage: 95.947% pattern: 57 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:241 -coverage: 95.947% pattern: 57 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 95.947% pattern: 57 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 95.947% pattern: 57 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 95.947% pattern: 57 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 95.947% pattern: 57 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 410, fault_cnt:532 -coverage: 96.057% pattern: 58 before: 74 now: 72 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520 -coverage: 96.057% pattern: 58 before: 72 now: 72 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239 -coverage: 96.057% pattern: 58 before: 72 now: 72 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 96.057% pattern: 58 before: 72 now: 72 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:193 -coverage: 96.057% pattern: 58 before: 72 now: 72 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185 -coverage: 96.057% pattern: 58 before: 72 now: 72 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 410, fault_cnt:496 -coverage: 96.166% pattern: 59 before: 72 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:240 -coverage: 96.166% pattern: 59 before: 70 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 96.166% pattern: 59 before: 70 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492 -coverage: 96.166% pattern: 59 before: 70 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 96.166% pattern: 59 before: 70 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 96.166% pattern: 59 before: 70 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492 -coverage: 96.166% pattern: 59 before: 70 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 96.166% pattern: 59 before: 70 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:462 -coverage: 96.166% pattern: 59 before: 70 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495 -coverage: 96.166% pattern: 59 before: 70 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 96.166% pattern: 59 before: 70 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:536 -coverage: 96.166% pattern: 59 before: 70 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 410, fault_cnt:587 -coverage: 96.331% pattern: 60 before: 70 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:471 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:182 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:219 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:238 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:247 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:465 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:471 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:184 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:241 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:491 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:256 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:460 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:182 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:450 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:557 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:434 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:251 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:201 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:456 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:247 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:458 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:216 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:491 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:494 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:474 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:494 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:458 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:244 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:247 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:471 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:450 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:521 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:471 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:137 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:525 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:235 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:443 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:135 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 96.331% pattern: 60 before: 67 now: 67 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 410, fault_cnt:219 -coverage: 96.495% pattern: 61 before: 67 now: 64 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 96.495% pattern: 61 before: 64 now: 64 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497 -coverage: 96.495% pattern: 61 before: 64 now: 64 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 96.495% pattern: 61 before: 64 now: 64 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:237 -coverage: 96.495% pattern: 61 before: 64 now: 64 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 96.495% pattern: 61 before: 64 now: 64 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:145 -coverage: 96.495% pattern: 61 before: 64 now: 64 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:182 -coverage: 96.495% pattern: 61 before: 64 now: 64 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 96.495% pattern: 61 before: 64 now: 64 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:535 -coverage: 96.495% pattern: 61 before: 64 now: 64 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 410, fault_cnt:596 -coverage: 96.659% pattern: 62 before: 64 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 96.659% pattern: 62 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:489 -coverage: 96.659% pattern: 62 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 96.659% pattern: 62 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:637 -coverage: 96.659% pattern: 62 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:472 -coverage: 96.659% pattern: 62 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:244 -coverage: 96.659% pattern: 62 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 96.659% pattern: 62 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:493 -coverage: 96.659% pattern: 62 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136 -coverage: 96.659% pattern: 62 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 96.659% pattern: 62 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 96.659% pattern: 62 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:493 -coverage: 96.659% pattern: 62 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 96.659% pattern: 62 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:237 -coverage: 96.659% pattern: 62 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 96.659% pattern: 62 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 96.659% pattern: 62 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185 -coverage: 96.659% pattern: 62 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:243 -coverage: 96.659% pattern: 62 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520 -coverage: 96.659% pattern: 62 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 96.659% pattern: 62 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:457 -coverage: 96.659% pattern: 62 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:485 -coverage: 96.659% pattern: 62 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 96.659% pattern: 62 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:476 -coverage: 96.659% pattern: 62 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492 -coverage: 96.659% pattern: 62 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 96.659% pattern: 62 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 96.659% pattern: 62 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:196 -coverage: 96.659% pattern: 62 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:491 -coverage: 96.659% pattern: 62 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 96.659% pattern: 62 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 96.659% pattern: 62 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 96.659% pattern: 62 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 96.659% pattern: 62 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492 -coverage: 96.659% pattern: 62 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 96.659% pattern: 62 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 96.659% pattern: 62 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:524 -coverage: 96.659% pattern: 62 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 96.659% pattern: 62 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 96.659% pattern: 62 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:527 -coverage: 96.659% pattern: 62 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 96.659% pattern: 62 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 96.659% pattern: 62 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 96.659% pattern: 62 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185 -coverage: 96.659% pattern: 62 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:203 -coverage: 96.659% pattern: 62 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:524 -coverage: 96.659% pattern: 62 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 96.659% pattern: 62 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:441 -coverage: 96.659% pattern: 62 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 96.659% pattern: 62 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492 -coverage: 96.659% pattern: 62 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:485 -coverage: 96.659% pattern: 62 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:521 -coverage: 96.659% pattern: 62 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 96.659% pattern: 62 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 96.659% pattern: 62 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 410, fault_cnt:589 -coverage: 96.714% pattern: 63 before: 61 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:521 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:215 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:489 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:572 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:249 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:137 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:134 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:147 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:243 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:456 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:659 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:543 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:241 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:526 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:487 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:202 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:522 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:473 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:522 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:494 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:494 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:446 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:579 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:537 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:465 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:493 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:523 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:593 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:481 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:479 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:595 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:201 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:204 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:460 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:560 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:237 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:245 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:439 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:182 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:474 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:472 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:238 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:193 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:481 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:483 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:579 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:445 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:480 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:468 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:248 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:237 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:524 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:531 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:456 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:465 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:244 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:240 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:484 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:134 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:144 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:475 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:200 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:525 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:525 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:491 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:473 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:521 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:134 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:445 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:243 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:467 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 96.714% pattern: 63 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 410, fault_cnt:649 -coverage: 96.769% pattern: 64 before: 60 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 96.769% pattern: 64 before: 59 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 96.769% pattern: 64 before: 59 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:522 -coverage: 96.769% pattern: 64 before: 59 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 96.769% pattern: 64 before: 59 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 96.769% pattern: 64 before: 59 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 96.769% pattern: 64 before: 59 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 96.769% pattern: 64 before: 59 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:458 -coverage: 96.769% pattern: 64 before: 59 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 96.769% pattern: 64 before: 59 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 96.769% pattern: 64 before: 59 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:184 -coverage: 96.769% pattern: 64 before: 59 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:628 -coverage: 96.769% pattern: 64 before: 59 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:447 -coverage: 96.769% pattern: 64 before: 59 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:240 -coverage: 96.769% pattern: 64 before: 59 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:244 -coverage: 96.769% pattern: 64 before: 59 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:199 -coverage: 96.769% pattern: 64 before: 59 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 96.769% pattern: 64 before: 59 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:451 -coverage: 96.769% pattern: 64 before: 59 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 96.769% pattern: 64 before: 59 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 96.769% pattern: 64 before: 59 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 96.769% pattern: 64 before: 59 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 96.769% pattern: 64 before: 59 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 96.769% pattern: 64 before: 59 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 96.769% pattern: 64 before: 59 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 410, fault_cnt:638 -coverage: 96.988% pattern: 65 before: 59 now: 55 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:493 -coverage: 96.988% pattern: 65 before: 55 now: 55 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 96.988% pattern: 65 before: 55 now: 55 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 96.988% pattern: 65 before: 55 now: 55 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 96.988% pattern: 65 before: 55 now: 55 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 96.988% pattern: 65 before: 55 now: 55 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 96.988% pattern: 65 before: 55 now: 55 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 96.988% pattern: 65 before: 55 now: 55 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 96.988% pattern: 65 before: 55 now: 55 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:439 -coverage: 96.988% pattern: 65 before: 55 now: 55 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:134 -coverage: 96.988% pattern: 65 before: 55 now: 55 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 96.988% pattern: 65 before: 55 now: 55 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 96.988% pattern: 65 before: 55 now: 55 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:525 -coverage: 96.988% pattern: 65 before: 55 now: 55 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 96.988% pattern: 65 before: 55 now: 55 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:456 -coverage: 96.988% pattern: 65 before: 55 now: 55 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:475 -coverage: 96.988% pattern: 65 before: 55 now: 55 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 96.988% pattern: 65 before: 55 now: 55 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 96.988% pattern: 65 before: 55 now: 55 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:490 -coverage: 96.988% pattern: 65 before: 55 now: 55 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:484 -coverage: 96.988% pattern: 65 before: 55 now: 55 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 96.988% pattern: 65 before: 55 now: 55 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 96.988% pattern: 65 before: 55 now: 55 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497 -coverage: 96.988% pattern: 65 before: 55 now: 55 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:580 -coverage: 96.988% pattern: 65 before: 55 now: 55 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 96.988% pattern: 65 before: 55 now: 55 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:149 -coverage: 96.988% pattern: 65 before: 55 now: 55 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 96.988% pattern: 65 before: 55 now: 55 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:523 -coverage: 96.988% pattern: 65 before: 55 now: 55 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:522 -coverage: 96.988% pattern: 65 before: 55 now: 55 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 96.988% pattern: 65 before: 55 now: 55 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 96.988% pattern: 65 before: 55 now: 55 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:184 -coverage: 96.988% pattern: 65 before: 55 now: 55 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:450 -coverage: 96.988% pattern: 65 before: 55 now: 55 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:237 -coverage: 96.988% pattern: 65 before: 55 now: 55 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:544 -coverage: 96.988% pattern: 65 before: 55 now: 55 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 96.988% pattern: 65 before: 55 now: 55 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 96.988% pattern: 65 before: 55 now: 55 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 96.988% pattern: 65 before: 55 now: 55 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 96.988% pattern: 65 before: 55 now: 55 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 96.988% pattern: 65 before: 55 now: 55 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 96.988% pattern: 65 before: 55 now: 55 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 96.988% pattern: 65 before: 55 now: 55 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:486 -coverage: 96.988% pattern: 65 before: 55 now: 55 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:485 -coverage: 96.988% pattern: 65 before: 55 now: 55 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:193 -coverage: 96.988% pattern: 65 before: 55 now: 55 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:493 -coverage: 96.988% pattern: 65 before: 55 now: 55 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:469 -coverage: 96.988% pattern: 65 before: 55 now: 55 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:241 -coverage: 96.988% pattern: 65 before: 55 now: 55 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:594 -coverage: 96.988% pattern: 65 before: 55 now: 55 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 96.988% pattern: 65 before: 55 now: 55 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 96.988% pattern: 65 before: 55 now: 55 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 410, fault_cnt:592 -coverage: 97.043% pattern: 66 before: 55 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:656 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:234 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:266 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:467 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:464 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:195 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:144 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:484 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:577 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:449 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:456 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:243 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:237 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:455 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:463 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:483 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:249 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:435 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:137 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:478 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:238 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:532 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:145 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:555 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:236 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:453 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:525 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:484 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:466 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:466 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:533 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:472 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:536 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:234 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:493 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:243 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:532 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:249 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:491 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:469 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:564 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:471 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:627 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:531 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:180 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:449 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:453 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:442 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:196 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:221 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:523 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:475 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:463 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:455 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:536 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:523 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:242 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:533 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:243 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:474 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:521 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:480 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:232 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:462 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:481 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:440 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:175 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:487 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:134 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:249 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:487 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:659 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:522 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:486 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:586 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:135 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:461 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:486 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:453 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:195 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:461 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:466 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:529 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:525 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:489 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:490 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:525 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:533 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:479 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 97.043% pattern: 66 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 410, fault_cnt:546 -coverage: 97.207% pattern: 67 before: 54 now: 51 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 97.207% pattern: 67 before: 51 now: 51 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:137 -coverage: 97.207% pattern: 67 before: 51 now: 51 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:245 -coverage: 97.207% pattern: 67 before: 51 now: 51 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 97.207% pattern: 67 before: 51 now: 51 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 97.207% pattern: 67 before: 51 now: 51 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 410, fault_cnt:273 -coverage: 97.371% pattern: 68 before: 51 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:530 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:238 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:479 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:592 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:167 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:245 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:455 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:466 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:524 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:536 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:160 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:461 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:474 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:459 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:490 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:531 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:196 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:433 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:445 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:475 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:528 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:457 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:494 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:494 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:441 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:236 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:458 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:195 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:481 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:490 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:134 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:540 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:456 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:474 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:240 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:242 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:481 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:156 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:242 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:521 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:647 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:481 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:458 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:443 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:468 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:466 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:490 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:135 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:452 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:486 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:196 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:182 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:200 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:220 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:525 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:166 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:528 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:481 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:178 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:245 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:241 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:459 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:450 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:182 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:628 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:521 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:479 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:234 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:464 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:462 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:529 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:184 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:490 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:480 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:442 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:143 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:458 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:197 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:234 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:461 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:618 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:479 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:135 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:178 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:240 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:460 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:521 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:535 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:143 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:470 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 97.371% pattern: 68 before: 48 now: 48 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 410, fault_cnt:273 -coverage: 97.481% pattern: 69 before: 48 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:584 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:463 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:477 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:468 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:135 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:456 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:454 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:574 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:524 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:493 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:193 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:245 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:455 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:473 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:249 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:526 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:482 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:137 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:141 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:459 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:445 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:463 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:540 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:482 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:493 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:135 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:642 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:184 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:193 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:523 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:233 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:536 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:135 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:533 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:472 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:471 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:141 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:443 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:461 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:233 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:456 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:240 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:468 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:588 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:195 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:246 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:137 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:479 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:184 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:602 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:183 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:487 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:195 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:451 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:539 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:234 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:590 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:463 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:468 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:134 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:473 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:241 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:472 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:477 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:651 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:565 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:249 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:231 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:444 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:143 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:243 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:459 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:458 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:137 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:437 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:471 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:196 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:195 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:447 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:490 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:462 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:489 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:451 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:475 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:539 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:523 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:528 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:137 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:447 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:439 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:620 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:134 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:456 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:141 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:201 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:525 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:490 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:446 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:523 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:466 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239 -coverage: 97.481% pattern: 69 before: 46 now: 46 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 410, fault_cnt:566 -coverage: 97.700% pattern: 70 before: 46 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:527 -coverage: 97.700% pattern: 70 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:491 -coverage: 97.700% pattern: 70 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 97.700% pattern: 70 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:460 -coverage: 97.700% pattern: 70 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 97.700% pattern: 70 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:249 -coverage: 97.700% pattern: 70 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 97.700% pattern: 70 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:533 -coverage: 97.700% pattern: 70 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 97.700% pattern: 70 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:193 -coverage: 97.700% pattern: 70 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:494 -coverage: 97.700% pattern: 70 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:232 -coverage: 97.700% pattern: 70 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:526 -coverage: 97.700% pattern: 70 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:236 -coverage: 97.700% pattern: 70 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 97.700% pattern: 70 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 97.700% pattern: 70 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496 -coverage: 97.700% pattern: 70 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 97.700% pattern: 70 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239 -coverage: 97.700% pattern: 70 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 97.700% pattern: 70 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:528 -coverage: 97.700% pattern: 70 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 97.700% pattern: 70 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 97.700% pattern: 70 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495 -coverage: 97.700% pattern: 70 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 97.700% pattern: 70 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 97.700% pattern: 70 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 97.700% pattern: 70 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 97.700% pattern: 70 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:143 -coverage: 97.700% pattern: 70 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:531 -coverage: 97.700% pattern: 70 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:479 -coverage: 97.700% pattern: 70 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:522 -coverage: 97.700% pattern: 70 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492 -coverage: 97.700% pattern: 70 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:241 -coverage: 97.700% pattern: 70 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:137 -coverage: 97.700% pattern: 70 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 97.700% pattern: 70 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 97.700% pattern: 70 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:524 -coverage: 97.700% pattern: 70 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:529 -coverage: 97.700% pattern: 70 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:490 -coverage: 97.700% pattern: 70 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 97.700% pattern: 70 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:491 -coverage: 97.700% pattern: 70 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:595 -coverage: 97.700% pattern: 70 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 97.700% pattern: 70 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 97.700% pattern: 70 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520 -coverage: 97.700% pattern: 70 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496 -coverage: 97.700% pattern: 70 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 97.700% pattern: 70 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 410, fault_cnt:588 -coverage: 97.809% pattern: 71 before: 42 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 97.809% pattern: 71 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 97.809% pattern: 71 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 97.809% pattern: 71 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:468 -coverage: 97.809% pattern: 71 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 97.809% pattern: 71 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:233 -coverage: 97.809% pattern: 71 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:530 -coverage: 97.809% pattern: 71 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:133 -coverage: 97.809% pattern: 71 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496 -coverage: 97.809% pattern: 71 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:575 -coverage: 97.809% pattern: 71 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136 -coverage: 97.809% pattern: 71 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 97.809% pattern: 71 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 97.809% pattern: 71 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:526 -coverage: 97.809% pattern: 71 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 97.809% pattern: 71 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 97.809% pattern: 71 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 97.809% pattern: 71 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 97.809% pattern: 71 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 97.809% pattern: 71 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 97.809% pattern: 71 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 97.809% pattern: 71 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 97.809% pattern: 71 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:488 -coverage: 97.809% pattern: 71 before: 40 now: 40 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 410, fault_cnt:641 -coverage: 97.919% pattern: 72 before: 40 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:638 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:523 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:246 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:533 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:626 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:133 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:475 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:461 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:480 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:246 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:522 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:242 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:489 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:193 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:488 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:137 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:235 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:491 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:208 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:477 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:483 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:649 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:238 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:475 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:221 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:628 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:462 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:525 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:237 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:442 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:528 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:464 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:246 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:468 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:471 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:455 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:163 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:490 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:450 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:236 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:181 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:467 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:524 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:488 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:477 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:242 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:474 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:579 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:474 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:460 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:482 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:461 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:184 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:183 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:143 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:656 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:443 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:489 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:528 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:183 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:198 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:478 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:466 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:464 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:521 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:445 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:529 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:485 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:525 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:228 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:481 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:234 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:476 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:459 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:525 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:245 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:463 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:478 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:491 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:472 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:627 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:202 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:134 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:528 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:131 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:486 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:183 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:459 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:145 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:606 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:486 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:465 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:456 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:618 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:449 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:595 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:456 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:493 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:456 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:249 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:215 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:456 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:145 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:490 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:479 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:184 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:525 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:236 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:455 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:457 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:526 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:447 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:544 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:476 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:484 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:471 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:245 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:480 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:644 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:241 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:244 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:484 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:141 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:137 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:585 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:494 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:669 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:469 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:238 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:485 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:134 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:532 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:475 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:251 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:473 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:183 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:522 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:478 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:472 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:241 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:137 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:523 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:242 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:475 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:486 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:470 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:586 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:461 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:193 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:484 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:461 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:437 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:234 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:247 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:243 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:134 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:137 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:528 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:144 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:232 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:145 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:236 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:475 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:466 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:477 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:463 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:529 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:198 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:524 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:460 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:462 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:465 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:196 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:469 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:137 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:446 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:525 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:479 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:494 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:195 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:480 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:135 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:237 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:482 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:465 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:527 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:238 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:533 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:532 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:467 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:491 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:237 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:215 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:456 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:461 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:135 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:461 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:467 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:137 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:494 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:463 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:476 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:484 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:533 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:443 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:166 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:462 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:555 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:521 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:243 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:487 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:484 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:487 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:489 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:240 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:243 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:459 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:193 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:244 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:533 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:245 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:454 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:243 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 97.919% pattern: 72 before: 38 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 410, fault_cnt:542 -coverage: 98.138% pattern: 73 before: 38 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:476 -coverage: 98.138% pattern: 73 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:446 -coverage: 98.138% pattern: 73 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:434 -coverage: 98.138% pattern: 73 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 98.138% pattern: 73 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:245 -coverage: 98.138% pattern: 73 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 98.138% pattern: 73 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:236 -coverage: 98.138% pattern: 73 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 98.138% pattern: 73 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:474 -coverage: 98.138% pattern: 73 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 98.138% pattern: 73 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:431 -coverage: 98.138% pattern: 73 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:479 -coverage: 98.138% pattern: 73 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:230 -coverage: 98.138% pattern: 73 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 98.138% pattern: 73 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:491 -coverage: 98.138% pattern: 73 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 98.138% pattern: 73 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:248 -coverage: 98.138% pattern: 73 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:455 -coverage: 98.138% pattern: 73 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 98.138% pattern: 73 before: 34 now: 34 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 410, fault_cnt:584 -coverage: 98.302% pattern: 74 before: 34 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:237 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:149 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:478 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:470 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:450 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:449 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:240 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:653 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:456 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:471 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:467 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:196 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:196 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:437 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:228 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:523 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:483 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:521 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:459 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:523 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:454 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:576 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:461 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:535 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:531 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:477 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:465 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:528 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:250 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:233 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:490 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:468 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:149 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:235 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:447 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:529 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:204 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:181 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:494 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:462 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:524 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:457 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:531 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:493 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:466 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:236 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:248 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:241 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:483 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:183 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:528 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:134 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:590 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:466 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:243 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:480 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:475 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:241 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:195 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:245 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:479 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:460 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:242 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:478 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:485 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:141 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:522 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:493 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:245 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:183 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:193 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:134 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 98.302% pattern: 74 before: 31 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 410, fault_cnt:650 -coverage: 98.412% pattern: 75 before: 31 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:184 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:141 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:196 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:457 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:493 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:487 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:485 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:134 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:521 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:456 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:196 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:451 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:184 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:237 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:469 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:145 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:457 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:241 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:452 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:461 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:564 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:238 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:460 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:638 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:231 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:196 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:443 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:448 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:236 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:591 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:466 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:483 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:184 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:480 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:484 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:196 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496 -coverage: 98.412% pattern: 75 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 410, fault_cnt:644 -coverage: 98.521% pattern: 76 before: 29 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:442 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:179 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:469 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:525 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:531 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:525 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:240 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:141 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:235 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:645 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:199 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:488 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:468 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:182 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:235 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:479 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:475 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:475 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:490 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:486 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:522 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:235 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:161 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:147 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:523 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:473 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:534 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:528 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:241 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:475 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:465 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:494 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:522 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:525 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:134 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:479 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:450 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:523 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:244 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:236 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:472 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:237 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:135 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:133 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:238 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:182 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:165 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:234 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:472 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:434 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:488 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:572 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:241 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:232 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:521 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:526 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:240 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:481 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:487 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:526 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:202 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:521 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:493 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:184 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:242 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:541 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:483 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:491 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:174 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:620 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:465 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:484 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:489 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:454 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:489 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:473 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:444 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:137 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:479 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:522 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:527 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:452 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:538 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:237 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:534 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:461 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:468 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:241 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:471 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:196 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:489 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:438 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:533 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:206 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:203 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:482 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:474 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:528 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:462 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:526 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:248 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:197 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:473 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:447 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:651 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:466 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:442 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:525 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:494 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 98.521% pattern: 76 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 410, fault_cnt:552 -coverage: 98.631% pattern: 77 before: 27 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:193 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:574 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:659 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:429 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:591 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:465 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:523 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:199 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:183 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:483 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:477 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:470 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:165 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:489 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:433 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:196 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:134 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:145 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:463 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:467 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:134 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:432 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:193 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:549 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:237 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:453 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:237 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:634 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:193 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:233 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:473 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:483 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:485 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:235 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:243 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:464 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:486 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:198 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:464 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:469 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:483 -coverage: 98.631% pattern: 77 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 410, fault_cnt:647 -coverage: 98.740% pattern: 78 before: 25 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:529 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:232 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:197 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:468 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:462 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:491 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:455 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:493 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:463 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:237 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:243 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:486 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:242 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:147 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:467 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:486 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:481 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:236 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:460 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:491 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:490 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:473 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:235 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:436 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:137 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:238 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:197 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:463 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:483 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:470 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:480 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:443 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:461 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:522 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:485 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:485 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:129 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:480 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:448 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:236 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:485 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:234 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:480 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:236 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:236 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:195 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:233 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:137 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:544 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:486 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:195 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:534 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:441 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:489 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:147 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:243 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:134 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:470 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:193 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:196 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:523 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:272 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:595 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:522 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:475 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:527 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:475 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:480 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:247 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:494 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:485 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:147 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:443 -coverage: 98.740% pattern: 78 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 410, fault_cnt:543 -coverage: 98.795% pattern: 79 before: 23 now: 22 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 410, fault_cnt:648 -coverage: 98.850% pattern: 80 before: 22 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:243 -coverage: 98.850% pattern: 80 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 98.850% pattern: 80 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 98.850% pattern: 80 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 98.850% pattern: 80 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 98.850% pattern: 80 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 98.850% pattern: 80 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:454 -coverage: 98.850% pattern: 80 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:486 -coverage: 98.850% pattern: 80 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 98.850% pattern: 80 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136 -coverage: 98.850% pattern: 80 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:521 -coverage: 98.850% pattern: 80 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:242 -coverage: 98.850% pattern: 80 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 98.850% pattern: 80 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:469 -coverage: 98.850% pattern: 80 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:476 -coverage: 98.850% pattern: 80 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:531 -coverage: 98.850% pattern: 80 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:480 -coverage: 98.850% pattern: 80 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:459 -coverage: 98.850% pattern: 80 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 98.850% pattern: 80 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 98.850% pattern: 80 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 98.850% pattern: 80 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 98.850% pattern: 80 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 98.850% pattern: 80 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:523 -coverage: 98.850% pattern: 80 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:461 -coverage: 98.850% pattern: 80 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:526 -coverage: 98.850% pattern: 80 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:522 -coverage: 98.850% pattern: 80 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492 -coverage: 98.850% pattern: 80 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 98.850% pattern: 80 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 98.850% pattern: 80 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 98.850% pattern: 80 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:222 -coverage: 98.850% pattern: 80 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 98.850% pattern: 80 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:465 -coverage: 98.850% pattern: 80 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519 -coverage: 98.850% pattern: 80 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136 -coverage: 98.850% pattern: 80 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495 -coverage: 98.850% pattern: 80 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 98.850% pattern: 80 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 98.850% pattern: 80 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:274 -coverage: 98.850% pattern: 80 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:11. flip_cnt: 0, stem_cnt: 410, fault_cnt:547 -coverage: 98.905% pattern: 81 before: 21 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:488 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:137 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:475 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:487 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:234 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:145 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:491 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:470 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:478 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:234 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:483 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:448 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:470 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:228 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:467 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:482 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:493 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:491 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:475 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:542 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:521 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:178 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:488 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:469 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:528 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:494 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:486 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:196 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:135 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:441 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:195 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:193 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:244 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:527 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:463 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:480 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:590 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:243 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:482 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:459 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:235 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:246 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:473 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:184 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:463 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:476 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:632 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:453 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:198 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:479 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:243 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:193 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:238 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:271 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:232 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:532 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:236 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:458 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:200 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:141 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:493 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:476 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:243 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:466 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:521 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:521 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:181 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:474 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:461 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:547 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:457 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:488 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:532 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:234 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:464 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:463 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:240 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:479 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:450 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:183 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:472 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:469 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:183 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:449 -coverage: 98.905% pattern: 81 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 410, fault_cnt:642 -coverage: 99.124% pattern: 82 before: 20 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:447 -coverage: 99.124% pattern: 82 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 99.124% pattern: 82 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 99.124% pattern: 82 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 99.124% pattern: 82 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 99.124% pattern: 82 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 99.124% pattern: 82 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 99.124% pattern: 82 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:137 -coverage: 99.124% pattern: 82 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 99.124% pattern: 82 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136 -coverage: 99.124% pattern: 82 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 99.124% pattern: 82 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 99.124% pattern: 82 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136 -coverage: 99.124% pattern: 82 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 99.124% pattern: 82 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 99.124% pattern: 82 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 99.124% pattern: 82 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:475 -coverage: 99.124% pattern: 82 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:476 -coverage: 99.124% pattern: 82 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 99.124% pattern: 82 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 99.124% pattern: 82 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 99.124% pattern: 82 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:558 -coverage: 99.124% pattern: 82 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 99.124% pattern: 82 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:534 -coverage: 99.124% pattern: 82 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 99.124% pattern: 82 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 99.124% pattern: 82 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:241 -coverage: 99.124% pattern: 82 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 99.124% pattern: 82 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:457 -coverage: 99.124% pattern: 82 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:442 -coverage: 99.124% pattern: 82 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:133 -coverage: 99.124% pattern: 82 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:522 -coverage: 99.124% pattern: 82 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:465 -coverage: 99.124% pattern: 82 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 99.124% pattern: 82 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:547 -coverage: 99.124% pattern: 82 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 99.124% pattern: 82 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 99.124% pattern: 82 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 99.124% pattern: 82 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 99.124% pattern: 82 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 99.124% pattern: 82 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 99.124% pattern: 82 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 99.124% pattern: 82 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:468 -coverage: 99.124% pattern: 82 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:486 -coverage: 99.124% pattern: 82 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 99.124% pattern: 82 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 99.124% pattern: 82 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:468 -coverage: 99.124% pattern: 82 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:486 -coverage: 99.124% pattern: 82 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:227 -coverage: 99.124% pattern: 82 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 99.124% pattern: 82 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:448 -coverage: 99.124% pattern: 82 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 410, fault_cnt:628 -coverage: 99.233% pattern: 83 before: 16 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:623 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:528 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:195 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:437 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:576 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:444 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:183 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:143 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:444 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:482 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:193 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:236 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:450 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:464 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:524 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:135 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:467 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:466 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:527 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:479 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:483 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:450 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:462 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:238 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:133 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:525 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:237 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:184 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:538 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:584 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:236 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:650 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:144 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:235 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:535 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:465 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:137 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:457 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:196 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:182 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:449 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:469 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:242 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:233 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:238 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:141 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:476 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:199 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:489 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:460 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:535 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:480 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:435 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:533 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:528 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:233 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:243 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:485 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:472 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:238 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:489 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:450 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:267 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:197 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:535 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:243 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:471 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:240 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:228 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:198 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:532 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:241 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:447 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:244 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:443 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:524 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:488 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:183 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:450 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:193 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:490 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:442 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:449 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:489 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:529 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:460 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:236 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:137 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:443 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:134 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:196 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:468 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:183 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:247 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:479 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:528 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:487 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:450 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:454 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:184 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:478 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:242 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:521 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:533 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:147 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:450 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:494 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:147 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:484 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:531 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:461 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:163 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:247 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:486 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:233 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:135 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:470 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:445 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:574 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:531 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:446 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:246 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:534 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:533 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:472 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:193 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:241 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:473 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:472 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:448 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:532 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:141 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:480 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:524 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:537 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:490 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:452 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:483 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:456 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:184 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:553 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:489 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:182 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:234 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:570 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:236 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:242 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:235 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:453 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:196 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:471 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:430 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:468 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:245 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:585 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:587 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:585 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:545 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:491 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:184 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:522 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:527 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:471 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:234 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:459 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:201 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:236 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:245 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:521 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:195 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:196 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:493 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:243 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:568 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:238 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:440 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:143 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:471 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:137 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:198 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:484 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:529 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:193 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:458 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:235 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:486 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:454 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:193 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:465 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:196 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:220 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:135 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:647 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:589 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:179 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:467 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:448 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:133 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:537 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:531 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:464 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:202 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:240 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:452 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:488 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:476 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:525 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:577 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:489 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:462 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:237 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:494 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:245 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:524 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:590 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:454 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:491 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:439 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:487 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:555 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:466 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:432 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:493 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:624 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:475 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:240 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:203 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:236 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:534 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:468 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:471 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:490 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:193 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:473 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:233 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:456 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:147 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:647 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:137 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:481 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:233 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:235 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:451 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:453 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:472 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:242 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:483 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:480 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:467 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:471 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:240 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:471 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:211 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:249 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:240 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:182 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:460 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:471 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:473 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:487 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:467 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:472 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:483 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:184 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:555 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:240 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:184 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:646 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:147 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:475 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:493 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:234 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:559 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:179 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:443 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:144 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:199 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:489 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:234 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:452 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:459 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:490 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:184 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:436 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:558 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:134 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:450 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:481 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:460 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:489 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:472 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:246 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:483 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:135 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:231 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:464 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:522 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:482 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:482 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:471 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:530 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:464 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:527 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:199 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:237 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:529 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:445 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:137 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:479 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:479 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:237 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:196 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:539 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:481 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:458 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:195 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:488 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:442 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:457 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:488 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:233 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:196 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:493 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:469 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:245 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:461 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:488 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:469 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:465 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:209 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:462 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:523 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:464 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:465 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:448 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:494 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:227 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:439 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:591 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:237 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:184 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:457 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:237 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:141 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:479 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:468 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:481 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:245 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:144 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:484 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:527 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:521 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:523 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:459 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:473 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:612 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:443 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:477 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:444 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:465 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:633 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:135 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:461 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:135 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:470 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:195 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:470 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:483 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:531 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:230 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:527 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:581 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:184 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:446 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:486 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:182 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:493 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:242 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:134 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:137 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:243 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:493 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:466 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:471 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:482 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:456 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:526 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:461 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:584 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:137 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:245 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:524 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:146 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:184 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:458 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:455 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:471 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:237 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:531 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:487 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:196 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:144 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:488 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:494 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:485 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:533 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:465 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:134 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:458 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:491 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:463 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:478 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:488 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:137 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:468 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:445 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:236 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:429 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:480 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:226 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:476 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:141 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:472 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:484 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:437 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:473 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:246 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:475 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:199 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:483 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:195 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:474 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:242 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:454 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:237 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:241 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:212 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:196 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:491 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:235 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:141 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:454 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:196 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:448 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:456 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:478 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:195 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:521 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:460 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:474 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:183 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:485 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:251 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:468 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:183 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:184 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:463 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:488 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:652 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:476 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:558 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:487 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:488 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:242 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:478 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:206 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:487 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:458 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:196 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:569 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:464 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:238 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:451 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:524 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:240 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:471 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:490 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:461 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:234 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:525 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:479 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:624 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:165 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:135 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:193 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:494 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:523 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:571 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:193 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:491 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:483 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:493 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:235 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:183 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:469 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:245 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:145 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:477 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:475 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:176 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:532 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:459 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:449 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:196 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:472 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:487 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:448 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:196 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:486 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:461 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:552 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:479 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:526 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:462 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:525 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:532 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:134 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:231 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:470 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:470 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:574 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:135 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:439 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:464 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:468 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:196 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:134 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:610 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:247 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:526 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:462 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:483 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:475 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:204 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:237 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:529 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:475 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:183 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:229 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:145 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:196 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:467 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:521 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:432 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:493 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:234 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:137 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:141 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:233 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:237 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:231 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:472 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:184 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:134 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:240 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:247 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:494 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:441 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:235 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:463 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:183 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:137 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:523 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:525 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:205 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:241 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:137 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:494 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:179 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:486 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:216 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:635 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:491 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:146 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:211 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:591 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:244 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:462 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:457 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:524 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:525 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:454 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:203 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:481 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:532 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:195 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:470 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:242 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:544 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:538 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:242 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:521 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:133 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:475 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:135 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:202 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:530 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:141 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:525 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:523 -coverage: 99.233% pattern: 83 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 410, fault_cnt:568 -coverage: 99.343% pattern: 84 before: 14 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:460 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:521 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:636 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:521 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:245 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:551 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:460 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:135 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:431 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:531 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:177 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:460 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:222 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:473 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:235 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:521 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:474 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:447 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:493 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:236 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:571 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:488 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:241 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:458 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:493 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:524 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:197 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:466 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:198 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:236 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:218 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:193 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:487 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:200 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:477 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:484 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:523 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:146 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:240 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:477 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:567 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:248 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:468 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:447 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:449 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:450 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:525 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:181 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:524 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:530 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:528 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:526 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:591 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:530 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:137 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:445 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:437 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:244 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:460 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:466 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:243 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:243 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:137 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:486 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:134 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:183 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:235 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:184 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:634 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:236 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:521 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:536 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:221 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:135 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:184 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:644 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:468 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:200 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:135 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:240 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:441 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:468 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:493 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:473 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:469 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:208 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:539 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:251 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:451 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:468 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:484 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:522 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:243 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:441 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:135 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:528 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:481 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:160 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:473 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:195 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:229 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:233 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:485 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:490 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:477 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:465 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:135 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:528 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:649 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:182 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:522 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:493 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:482 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:450 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:133 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:486 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:193 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:469 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:532 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:427 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:448 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:241 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:467 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:193 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:204 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:494 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:470 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:130 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:135 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:477 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:537 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:491 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:137 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:241 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:573 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:456 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:494 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:237 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:585 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:527 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:491 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:457 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:144 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:612 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:470 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:494 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:475 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:489 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:494 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:245 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:456 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:485 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:278 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:462 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:489 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:183 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:477 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:246 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:249 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:134 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:528 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:465 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:580 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:486 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:476 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:141 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:568 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:184 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:487 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:458 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:471 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:641 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:135 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:184 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:243 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:143 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:534 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:141 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:493 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:193 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:137 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:141 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:485 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:523 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:198 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:494 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:451 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:465 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:588 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:196 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:594 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:464 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:231 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:585 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:481 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:468 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:521 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:474 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:244 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:494 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:586 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:521 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:494 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:241 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:451 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:245 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:234 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:478 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:476 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:521 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:522 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:237 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:455 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:235 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:479 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:522 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:522 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:204 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:130 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:524 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:481 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:527 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:461 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:532 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:561 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:461 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:465 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:182 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:455 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:493 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:443 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:467 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:494 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:542 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:241 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:629 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:184 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:525 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:494 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:230 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:235 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:463 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:237 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:471 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:240 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:483 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:196 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:477 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:451 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:522 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:486 -coverage: 99.343% pattern: 84 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 410, fault_cnt:648 -coverage: 99.452% pattern: 85 before: 12 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:133 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:459 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:176 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:450 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:137 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:494 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:470 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:491 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:447 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:485 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:473 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:528 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:471 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:536 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:460 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:146 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:182 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:461 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:494 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:489 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:529 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:454 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:480 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:245 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:489 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:145 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:462 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:466 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:240 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:202 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:447 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:243 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:470 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:471 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:582 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:470 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:485 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:473 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:237 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:487 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:460 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:233 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:482 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:568 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:493 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:235 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:478 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:600 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:193 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:525 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:141 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:193 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:467 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:165 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:135 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:244 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:184 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:539 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:554 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:234 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:528 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:486 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:468 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:459 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:461 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:236 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:250 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:236 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:438 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:523 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:485 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:566 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:572 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:242 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:532 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:489 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:237 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:532 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:472 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:234 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:197 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:481 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:240 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:183 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:475 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:475 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:143 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:193 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:468 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:478 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:236 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:144 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:479 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:235 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:241 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:491 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:589 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:482 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:533 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:467 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:530 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:196 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:234 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:238 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:235 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:237 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:470 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:449 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:468 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:486 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:454 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:197 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:522 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:143 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:245 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:594 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:479 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:470 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:143 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:490 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:230 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:467 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:524 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:244 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:490 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:458 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:537 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:240 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:141 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:183 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:442 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:452 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:489 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:245 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:656 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:193 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:485 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:493 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:476 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:525 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:524 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:521 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:195 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:242 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:451 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:488 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:237 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:486 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:464 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:147 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:577 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:243 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:182 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:632 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:459 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:474 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:133 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:532 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:522 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:475 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:195 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:233 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:245 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:450 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:470 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:474 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:137 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:479 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:628 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:522 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:569 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:182 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:482 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:470 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:523 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:527 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:539 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:431 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:538 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:465 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:526 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:231 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:478 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:249 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:494 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:589 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:608 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:197 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:447 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:224 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:494 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:491 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:481 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:485 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:196 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:479 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:530 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:467 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:523 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:469 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:243 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:173 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:463 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:184 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:463 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:134 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:447 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:471 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:195 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:581 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:236 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:456 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:165 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:494 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:460 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:477 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:485 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:470 -coverage: 99.452% pattern: 85 before: 10 now: 10 -checking valid circuit ... result: 1. diff --git a/exp_result/ATPG-LS_c2670.bench.txt b/exp_result/ATPG-LS_c2670.bench.txt deleted file mode 100644 index efa6d2c..0000000 --- a/exp_result/ATPG-LS_c2670.bench.txt +++ /dev/null @@ -1,13489 +0,0 @@ -make: 'atpg' is up to date. -======================== -parsing file ./benchmark/c2670.bench ... Done. -====== Circuit Statistics ====== -PI: 233 -PO: 140 -Gate: 1426 -Stem: 696 -Level: 12 -================================ -[SOL] flip: 0, stem: 0, fault:9705. flip_cnt: 0, stem_cnt: 696, fault_cnt:687 -coverage: 24.088% pattern: 1 before: 2852 now: 2165 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:3507. flip_cnt: 0, stem_cnt: 696, fault_cnt:543 -coverage: 33.275% pattern: 2 before: 2165 now: 1903 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:3895. flip_cnt: 0, stem_cnt: 696, fault_cnt:512 -coverage: 41.830% pattern: 3 before: 1903 now: 1659 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:4605. flip_cnt: 0, stem_cnt: 696, fault_cnt:770 -coverage: 51.122% pattern: 4 before: 1659 now: 1394 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:1103. flip_cnt: 0, stem_cnt: 696, fault_cnt:532 -coverage: 53.682% pattern: 5 before: 1394 now: 1321 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:2262. flip_cnt: 0, stem_cnt: 696, fault_cnt:665 -coverage: 58.310% pattern: 6 before: 1321 now: 1189 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:2837. flip_cnt: 0, stem_cnt: 696, fault_cnt:779 -coverage: 63.885% pattern: 7 before: 1189 now: 1030 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:1748. flip_cnt: 0, stem_cnt: 696, fault_cnt:813 -coverage: 67.216% pattern: 8 before: 1030 now: 935 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:381. flip_cnt: 0, stem_cnt: 696, fault_cnt:683 -coverage: 67.952% pattern: 9 before: 935 now: 914 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:694. flip_cnt: 0, stem_cnt: 696, fault_cnt:479 -coverage: 69.355% pattern: 10 before: 914 now: 874 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:494. flip_cnt: 0, stem_cnt: 696, fault_cnt:741 -coverage: 70.266% pattern: 11 before: 874 now: 848 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:610. flip_cnt: 0, stem_cnt: 696, fault_cnt:585 -coverage: 71.424% pattern: 12 before: 848 now: 815 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:229. flip_cnt: 0, stem_cnt: 696, fault_cnt:530 -coverage: 71.879% pattern: 13 before: 815 now: 802 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:172. flip_cnt: 0, stem_cnt: 696, fault_cnt:430 -coverage: 72.300% pattern: 14 before: 802 now: 790 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 696, fault_cnt:495 -coverage: 72.405% pattern: 15 before: 790 now: 787 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:280. flip_cnt: 0, stem_cnt: 696, fault_cnt:763 -coverage: 73.036% pattern: 16 before: 787 now: 769 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:531 -coverage: 73.036% pattern: 16 before: 769 now: 769 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:21. flip_cnt: 0, stem_cnt: 696, fault_cnt:512 -coverage: 73.107% pattern: 17 before: 769 now: 767 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:190. flip_cnt: 0, stem_cnt: 696, fault_cnt:733 -coverage: 73.457% pattern: 18 before: 767 now: 757 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:482 -coverage: 73.457% pattern: 18 before: 757 now: 757 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:988. flip_cnt: 0, stem_cnt: 696, fault_cnt:744 -coverage: 75.351% pattern: 19 before: 757 now: 703 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:228. flip_cnt: 0, stem_cnt: 696, fault_cnt:544 -coverage: 75.771% pattern: 20 before: 703 now: 691 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 696, fault_cnt:570 -coverage: 75.806% pattern: 21 before: 691 now: 690 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:500 -coverage: 75.806% pattern: 21 before: 690 now: 690 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:171. flip_cnt: 0, stem_cnt: 696, fault_cnt:549 -coverage: 76.122% pattern: 22 before: 690 now: 681 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:190. flip_cnt: 0, stem_cnt: 696, fault_cnt:712 -coverage: 76.473% pattern: 23 before: 681 now: 671 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:482 -coverage: 76.473% pattern: 23 before: 671 now: 671 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:52. flip_cnt: 0, stem_cnt: 696, fault_cnt:442 -coverage: 76.613% pattern: 24 before: 671 now: 667 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:114. flip_cnt: 0, stem_cnt: 696, fault_cnt:568 -coverage: 76.823% pattern: 25 before: 667 now: 661 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:285. flip_cnt: 0, stem_cnt: 696, fault_cnt:766 -coverage: 77.349% pattern: 26 before: 661 now: 646 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 696, fault_cnt:594 -coverage: 77.419% pattern: 27 before: 646 now: 644 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:209. flip_cnt: 0, stem_cnt: 696, fault_cnt:521 -coverage: 77.805% pattern: 28 before: 644 now: 633 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:515 -coverage: 77.805% pattern: 28 before: 633 now: 633 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:171. flip_cnt: 0, stem_cnt: 696, fault_cnt:531 -coverage: 78.121% pattern: 29 before: 633 now: 624 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:114. flip_cnt: 0, stem_cnt: 696, fault_cnt:690 -coverage: 78.331% pattern: 30 before: 624 now: 618 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:8. flip_cnt: 0, stem_cnt: 696, fault_cnt:453 -coverage: 78.366% pattern: 31 before: 618 now: 617 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 696, fault_cnt:611 -coverage: 78.436% pattern: 32 before: 617 now: 615 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 696, fault_cnt:755 -coverage: 78.506% pattern: 33 before: 615 now: 613 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:114. flip_cnt: 0, stem_cnt: 696, fault_cnt:578 -coverage: 78.717% pattern: 34 before: 613 now: 607 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:510 -coverage: 78.717% pattern: 34 before: 607 now: 607 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:599 -coverage: 78.717% pattern: 34 before: 607 now: 607 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:526 -coverage: 78.717% pattern: 34 before: 607 now: 607 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:667 -coverage: 78.717% pattern: 34 before: 607 now: 607 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:452 -coverage: 78.717% pattern: 34 before: 607 now: 607 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 696, fault_cnt:500 -coverage: 78.752% pattern: 35 before: 607 now: 606 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:515 -coverage: 78.752% pattern: 35 before: 606 now: 606 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:587 -coverage: 78.752% pattern: 35 before: 606 now: 606 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:670 -coverage: 78.752% pattern: 35 before: 606 now: 606 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 696, fault_cnt:599 -coverage: 78.822% pattern: 36 before: 606 now: 604 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:490 -coverage: 78.822% pattern: 36 before: 604 now: 604 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:508 -coverage: 78.822% pattern: 36 before: 604 now: 604 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 696, fault_cnt:595 -coverage: 78.857% pattern: 37 before: 604 now: 603 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 696, fault_cnt:644 -coverage: 78.892% pattern: 38 before: 603 now: 602 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:114. flip_cnt: 0, stem_cnt: 696, fault_cnt:481 -coverage: 79.102% pattern: 39 before: 602 now: 596 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:506 -coverage: 79.102% pattern: 39 before: 596 now: 596 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:471 -coverage: 79.102% pattern: 39 before: 596 now: 596 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 696, fault_cnt:648 -coverage: 79.173% pattern: 40 before: 596 now: 594 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:533 -coverage: 79.173% pattern: 40 before: 594 now: 594 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:486 -coverage: 79.173% pattern: 40 before: 594 now: 594 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:515 -coverage: 79.173% pattern: 40 before: 594 now: 594 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:133. flip_cnt: 0, stem_cnt: 696, fault_cnt:626 -coverage: 79.418% pattern: 41 before: 594 now: 587 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:498 -coverage: 79.418% pattern: 41 before: 587 now: 587 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:451 -coverage: 79.418% pattern: 41 before: 587 now: 587 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:511 -coverage: 79.418% pattern: 41 before: 587 now: 587 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:642 -coverage: 79.418% pattern: 41 before: 587 now: 587 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:450 -coverage: 79.418% pattern: 41 before: 587 now: 587 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:266. flip_cnt: 0, stem_cnt: 696, fault_cnt:496 -coverage: 79.909% pattern: 42 before: 587 now: 573 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:641 -coverage: 79.909% pattern: 42 before: 573 now: 573 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:423 -coverage: 79.909% pattern: 42 before: 573 now: 573 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:595 -coverage: 79.909% pattern: 42 before: 573 now: 573 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:627 -coverage: 79.909% pattern: 42 before: 573 now: 573 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:482 -coverage: 79.909% pattern: 42 before: 573 now: 573 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:636 -coverage: 79.909% pattern: 42 before: 573 now: 573 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:583 -coverage: 79.909% pattern: 42 before: 573 now: 573 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:623 -coverage: 79.909% pattern: 42 before: 573 now: 573 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:528 -coverage: 79.909% pattern: 42 before: 573 now: 573 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:630 -coverage: 79.909% pattern: 42 before: 573 now: 573 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:613 -coverage: 79.909% pattern: 42 before: 573 now: 573 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 696, fault_cnt:625 -coverage: 79.979% pattern: 43 before: 573 now: 571 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:740 -coverage: 79.979% pattern: 43 before: 571 now: 571 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:546 -coverage: 79.979% pattern: 43 before: 571 now: 571 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:548 -coverage: 79.979% pattern: 43 before: 571 now: 571 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:656 -coverage: 79.979% pattern: 43 before: 571 now: 571 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:599 -coverage: 79.979% pattern: 43 before: 571 now: 571 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 696, fault_cnt:598 -coverage: 80.119% pattern: 44 before: 571 now: 567 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:626 -coverage: 80.119% pattern: 44 before: 567 now: 567 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:635 -coverage: 80.119% pattern: 44 before: 567 now: 567 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:622 -coverage: 80.119% pattern: 44 before: 567 now: 567 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:654 -coverage: 80.119% pattern: 44 before: 567 now: 567 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:171. flip_cnt: 0, stem_cnt: 696, fault_cnt:633 -coverage: 80.435% pattern: 45 before: 567 now: 558 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:504 -coverage: 80.435% pattern: 45 before: 558 now: 558 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:501 -coverage: 80.435% pattern: 45 before: 558 now: 558 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:114. flip_cnt: 0, stem_cnt: 696, fault_cnt:673 -coverage: 80.645% pattern: 46 before: 558 now: 552 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:526 -coverage: 80.645% pattern: 46 before: 552 now: 552 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:523 -coverage: 80.645% pattern: 46 before: 552 now: 552 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:459 -coverage: 80.645% pattern: 46 before: 552 now: 552 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:462 -coverage: 80.645% pattern: 46 before: 552 now: 552 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:638 -coverage: 80.645% pattern: 46 before: 552 now: 552 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:499 -coverage: 80.645% pattern: 46 before: 552 now: 552 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:605 -coverage: 80.645% pattern: 46 before: 552 now: 552 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:531 -coverage: 80.645% pattern: 46 before: 552 now: 552 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:462 -coverage: 80.645% pattern: 46 before: 552 now: 552 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:623 -coverage: 80.645% pattern: 46 before: 552 now: 552 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 696, fault_cnt:701 -coverage: 80.715% pattern: 47 before: 552 now: 550 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:661 -coverage: 80.715% pattern: 47 before: 550 now: 550 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:654 -coverage: 80.715% pattern: 47 before: 550 now: 550 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:658 -coverage: 80.715% pattern: 47 before: 550 now: 550 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:620 -coverage: 80.715% pattern: 47 before: 550 now: 550 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:611 -coverage: 80.715% pattern: 47 before: 550 now: 550 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:501 -coverage: 80.715% pattern: 47 before: 550 now: 550 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:551 -coverage: 80.715% pattern: 47 before: 550 now: 550 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:572 -coverage: 80.715% pattern: 47 before: 550 now: 550 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:505 -coverage: 80.715% pattern: 47 before: 550 now: 550 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:518 -coverage: 80.715% pattern: 47 before: 550 now: 550 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:432 -coverage: 80.715% pattern: 47 before: 550 now: 550 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:562 -coverage: 80.715% pattern: 47 before: 550 now: 550 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:704 -coverage: 80.715% pattern: 47 before: 550 now: 550 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:453 -coverage: 80.715% pattern: 47 before: 550 now: 550 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:551. flip_cnt: 0, stem_cnt: 696, fault_cnt:791 -coverage: 81.732% pattern: 48 before: 550 now: 521 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:637 -coverage: 81.732% pattern: 48 before: 521 now: 521 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:575 -coverage: 81.732% pattern: 48 before: 521 now: 521 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:479 -coverage: 81.732% pattern: 48 before: 521 now: 521 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:617 -coverage: 81.732% pattern: 48 before: 521 now: 521 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 696, fault_cnt:638 -coverage: 81.872% pattern: 49 before: 521 now: 517 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:712 -coverage: 81.872% pattern: 49 before: 517 now: 517 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:597 -coverage: 81.872% pattern: 49 before: 517 now: 517 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:669 -coverage: 81.872% pattern: 49 before: 517 now: 517 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:482 -coverage: 81.872% pattern: 49 before: 517 now: 517 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:538 -coverage: 81.872% pattern: 49 before: 517 now: 517 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:603 -coverage: 81.872% pattern: 49 before: 517 now: 517 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:571 -coverage: 81.872% pattern: 49 before: 517 now: 517 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:323. flip_cnt: 0, stem_cnt: 696, fault_cnt:593 -coverage: 82.468% pattern: 50 before: 517 now: 500 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:556 -coverage: 82.468% pattern: 50 before: 500 now: 500 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 696, fault_cnt:622 -coverage: 82.609% pattern: 51 before: 500 now: 496 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:563 -coverage: 82.609% pattern: 51 before: 496 now: 496 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:587 -coverage: 82.609% pattern: 51 before: 496 now: 496 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:487 -coverage: 82.609% pattern: 51 before: 496 now: 496 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:518 -coverage: 82.609% pattern: 51 before: 496 now: 496 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:803 -coverage: 82.609% pattern: 51 before: 496 now: 496 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:580 -coverage: 82.609% pattern: 51 before: 496 now: 496 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:577 -coverage: 82.609% pattern: 51 before: 496 now: 496 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:525 -coverage: 82.609% pattern: 51 before: 496 now: 496 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:525 -coverage: 82.609% pattern: 51 before: 496 now: 496 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:627 -coverage: 82.609% pattern: 51 before: 496 now: 496 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:607 -coverage: 82.609% pattern: 51 before: 496 now: 496 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:475 -coverage: 82.609% pattern: 51 before: 496 now: 496 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:585 -coverage: 82.609% pattern: 51 before: 496 now: 496 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:699 -coverage: 82.609% pattern: 51 before: 496 now: 496 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:538 -coverage: 82.609% pattern: 51 before: 496 now: 496 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:622 -coverage: 82.609% pattern: 51 before: 496 now: 496 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:588 -coverage: 82.609% pattern: 51 before: 496 now: 496 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:593 -coverage: 82.609% pattern: 51 before: 496 now: 496 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:553 -coverage: 82.609% pattern: 51 before: 496 now: 496 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:621 -coverage: 82.609% pattern: 51 before: 496 now: 496 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:464 -coverage: 82.609% pattern: 51 before: 496 now: 496 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:572 -coverage: 82.609% pattern: 51 before: 496 now: 496 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:645 -coverage: 82.609% pattern: 51 before: 496 now: 496 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:459 -coverage: 82.609% pattern: 51 before: 496 now: 496 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:464 -coverage: 82.609% pattern: 51 before: 496 now: 496 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:540 -coverage: 82.609% pattern: 51 before: 496 now: 496 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:171. flip_cnt: 0, stem_cnt: 696, fault_cnt:618 -coverage: 82.924% pattern: 52 before: 496 now: 487 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:492 -coverage: 82.924% pattern: 52 before: 487 now: 487 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:679 -coverage: 82.924% pattern: 52 before: 487 now: 487 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:603 -coverage: 82.924% pattern: 52 before: 487 now: 487 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:190. flip_cnt: 0, stem_cnt: 696, fault_cnt:763 -coverage: 83.275% pattern: 53 before: 487 now: 477 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:668 -coverage: 83.275% pattern: 53 before: 477 now: 477 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:569 -coverage: 83.275% pattern: 53 before: 477 now: 477 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:667 -coverage: 83.275% pattern: 53 before: 477 now: 477 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:597 -coverage: 83.275% pattern: 53 before: 477 now: 477 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:664 -coverage: 83.275% pattern: 53 before: 477 now: 477 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:623 -coverage: 83.275% pattern: 53 before: 477 now: 477 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:499 -coverage: 83.275% pattern: 53 before: 477 now: 477 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:465 -coverage: 83.275% pattern: 53 before: 477 now: 477 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:599 -coverage: 83.275% pattern: 53 before: 477 now: 477 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:171. flip_cnt: 0, stem_cnt: 696, fault_cnt:541 -coverage: 83.590% pattern: 54 before: 477 now: 468 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:669 -coverage: 83.590% pattern: 54 before: 468 now: 468 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:602 -coverage: 83.590% pattern: 54 before: 468 now: 468 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:152. flip_cnt: 0, stem_cnt: 696, fault_cnt:681 -coverage: 83.871% pattern: 55 before: 468 now: 460 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:636 -coverage: 83.871% pattern: 55 before: 460 now: 460 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:628 -coverage: 83.871% pattern: 55 before: 460 now: 460 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:584 -coverage: 83.871% pattern: 55 before: 460 now: 460 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:763 -coverage: 83.871% pattern: 55 before: 460 now: 460 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:651 -coverage: 83.871% pattern: 55 before: 460 now: 460 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:587 -coverage: 83.871% pattern: 55 before: 460 now: 460 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:514 -coverage: 83.871% pattern: 55 before: 460 now: 460 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:452 -coverage: 83.871% pattern: 55 before: 460 now: 460 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:708 -coverage: 83.871% pattern: 55 before: 460 now: 460 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:133. flip_cnt: 0, stem_cnt: 696, fault_cnt:728 -coverage: 84.116% pattern: 56 before: 460 now: 453 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:621 -coverage: 84.116% pattern: 56 before: 453 now: 453 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:610 -coverage: 84.116% pattern: 56 before: 453 now: 453 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:627 -coverage: 84.116% pattern: 56 before: 453 now: 453 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:133. flip_cnt: 0, stem_cnt: 696, fault_cnt:600 -coverage: 84.362% pattern: 57 before: 453 now: 446 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:738 -coverage: 84.362% pattern: 57 before: 446 now: 446 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:600 -coverage: 84.362% pattern: 57 before: 446 now: 446 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:209. flip_cnt: 0, stem_cnt: 696, fault_cnt:614 -coverage: 84.748% pattern: 58 before: 446 now: 435 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:587 -coverage: 84.748% pattern: 58 before: 435 now: 435 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:581 -coverage: 84.748% pattern: 58 before: 435 now: 435 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:570 -coverage: 84.748% pattern: 58 before: 435 now: 435 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:607 -coverage: 84.748% pattern: 58 before: 435 now: 435 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:578 -coverage: 84.748% pattern: 58 before: 435 now: 435 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:461 -coverage: 84.748% pattern: 58 before: 435 now: 435 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:577 -coverage: 84.748% pattern: 58 before: 435 now: 435 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:506 -coverage: 84.748% pattern: 58 before: 435 now: 435 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:575 -coverage: 84.748% pattern: 58 before: 435 now: 435 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:744 -coverage: 84.748% pattern: 58 before: 435 now: 435 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:584 -coverage: 84.748% pattern: 58 before: 435 now: 435 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:527 -coverage: 84.748% pattern: 58 before: 435 now: 435 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 696, fault_cnt:648 -coverage: 84.783% pattern: 59 before: 435 now: 434 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 696, fault_cnt:777 -coverage: 84.818% pattern: 60 before: 434 now: 433 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:673 -coverage: 84.818% pattern: 60 before: 433 now: 433 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:427 -coverage: 84.818% pattern: 60 before: 433 now: 433 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:645 -coverage: 84.818% pattern: 60 before: 433 now: 433 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:516 -coverage: 84.818% pattern: 60 before: 433 now: 433 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:171. flip_cnt: 0, stem_cnt: 696, fault_cnt:700 -coverage: 85.133% pattern: 61 before: 433 now: 424 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:668 -coverage: 85.133% pattern: 61 before: 424 now: 424 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:647 -coverage: 85.133% pattern: 61 before: 424 now: 424 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:656 -coverage: 85.133% pattern: 61 before: 424 now: 424 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:502 -coverage: 85.133% pattern: 61 before: 424 now: 424 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:764 -coverage: 85.133% pattern: 61 before: 424 now: 424 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:620 -coverage: 85.133% pattern: 61 before: 424 now: 424 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:590 -coverage: 85.133% pattern: 61 before: 424 now: 424 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:563 -coverage: 85.133% pattern: 61 before: 424 now: 424 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:550 -coverage: 85.133% pattern: 61 before: 424 now: 424 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:572 -coverage: 85.133% pattern: 61 before: 424 now: 424 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:575 -coverage: 85.133% pattern: 61 before: 424 now: 424 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:726 -coverage: 85.133% pattern: 61 before: 424 now: 424 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:561 -coverage: 85.133% pattern: 61 before: 424 now: 424 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:565 -coverage: 85.133% pattern: 61 before: 424 now: 424 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:664 -coverage: 85.133% pattern: 61 before: 424 now: 424 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:485 -coverage: 85.133% pattern: 61 before: 424 now: 424 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:444 -coverage: 85.133% pattern: 61 before: 424 now: 424 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:562 -coverage: 85.133% pattern: 61 before: 424 now: 424 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:583 -coverage: 85.133% pattern: 61 before: 424 now: 424 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:669 -coverage: 85.133% pattern: 61 before: 424 now: 424 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:440 -coverage: 85.133% pattern: 61 before: 424 now: 424 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:489 -coverage: 85.133% pattern: 61 before: 424 now: 424 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:707 -coverage: 85.133% pattern: 61 before: 424 now: 424 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:596 -coverage: 85.133% pattern: 61 before: 424 now: 424 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:570 -coverage: 85.133% pattern: 61 before: 424 now: 424 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:608 -coverage: 85.133% pattern: 61 before: 424 now: 424 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:596 -coverage: 85.133% pattern: 61 before: 424 now: 424 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:511 -coverage: 85.133% pattern: 61 before: 424 now: 424 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:634 -coverage: 85.133% pattern: 61 before: 424 now: 424 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:588 -coverage: 85.133% pattern: 61 before: 424 now: 424 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:469 -coverage: 85.133% pattern: 61 before: 424 now: 424 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:496 -coverage: 85.133% pattern: 61 before: 424 now: 424 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:659 -coverage: 85.133% pattern: 61 before: 424 now: 424 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:559 -coverage: 85.133% pattern: 61 before: 424 now: 424 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:152. flip_cnt: 0, stem_cnt: 696, fault_cnt:652 -coverage: 85.414% pattern: 62 before: 424 now: 416 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:510 -coverage: 85.414% pattern: 62 before: 416 now: 416 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:667 -coverage: 85.414% pattern: 62 before: 416 now: 416 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:521 -coverage: 85.414% pattern: 62 before: 416 now: 416 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:552 -coverage: 85.414% pattern: 62 before: 416 now: 416 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:467 -coverage: 85.414% pattern: 62 before: 416 now: 416 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:114. flip_cnt: 0, stem_cnt: 696, fault_cnt:562 -coverage: 85.624% pattern: 63 before: 416 now: 410 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:442 -coverage: 85.624% pattern: 63 before: 410 now: 410 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:567 -coverage: 85.624% pattern: 63 before: 410 now: 410 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:527 -coverage: 85.624% pattern: 63 before: 410 now: 410 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:553 -coverage: 85.624% pattern: 63 before: 410 now: 410 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:511 -coverage: 85.624% pattern: 63 before: 410 now: 410 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:532 -coverage: 85.624% pattern: 63 before: 410 now: 410 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:607 -coverage: 85.624% pattern: 63 before: 410 now: 410 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:614 -coverage: 85.624% pattern: 63 before: 410 now: 410 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:694 -coverage: 85.624% pattern: 63 before: 410 now: 410 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:644 -coverage: 85.624% pattern: 63 before: 410 now: 410 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:521 -coverage: 85.624% pattern: 63 before: 410 now: 410 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:481 -coverage: 85.624% pattern: 63 before: 410 now: 410 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:478 -coverage: 85.624% pattern: 63 before: 410 now: 410 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:579 -coverage: 85.624% pattern: 63 before: 410 now: 410 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:586 -coverage: 85.624% pattern: 63 before: 410 now: 410 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:620 -coverage: 85.624% pattern: 63 before: 410 now: 410 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:600 -coverage: 85.624% pattern: 63 before: 410 now: 410 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:573 -coverage: 85.624% pattern: 63 before: 410 now: 410 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 696, fault_cnt:723 -coverage: 85.659% pattern: 64 before: 410 now: 409 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:495 -coverage: 85.659% pattern: 64 before: 409 now: 409 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:486 -coverage: 85.659% pattern: 64 before: 409 now: 409 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:609 -coverage: 85.659% pattern: 64 before: 409 now: 409 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:459 -coverage: 85.659% pattern: 64 before: 409 now: 409 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:637 -coverage: 85.659% pattern: 64 before: 409 now: 409 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:592 -coverage: 85.659% pattern: 64 before: 409 now: 409 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:533 -coverage: 85.659% pattern: 64 before: 409 now: 409 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:489 -coverage: 85.659% pattern: 64 before: 409 now: 409 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:595 -coverage: 85.659% pattern: 64 before: 409 now: 409 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:727 -coverage: 85.659% pattern: 64 before: 409 now: 409 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:656 -coverage: 85.659% pattern: 64 before: 409 now: 409 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:502 -coverage: 85.659% pattern: 64 before: 409 now: 409 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:625 -coverage: 85.659% pattern: 64 before: 409 now: 409 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:515 -coverage: 85.659% pattern: 64 before: 409 now: 409 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:627 -coverage: 85.659% pattern: 64 before: 409 now: 409 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:655 -coverage: 85.659% pattern: 64 before: 409 now: 409 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:631 -coverage: 85.659% pattern: 64 before: 409 now: 409 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:535 -coverage: 85.659% pattern: 64 before: 409 now: 409 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:481 -coverage: 85.659% pattern: 64 before: 409 now: 409 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:612 -coverage: 85.659% pattern: 64 before: 409 now: 409 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:712 -coverage: 85.659% pattern: 64 before: 409 now: 409 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:525 -coverage: 85.659% pattern: 64 before: 409 now: 409 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:190. flip_cnt: 0, stem_cnt: 696, fault_cnt:545 -coverage: 86.010% pattern: 65 before: 409 now: 399 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:578 -coverage: 86.010% pattern: 65 before: 399 now: 399 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:552 -coverage: 86.010% pattern: 65 before: 399 now: 399 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:525 -coverage: 86.010% pattern: 65 before: 399 now: 399 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:539 -coverage: 86.010% pattern: 65 before: 399 now: 399 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:588 -coverage: 86.010% pattern: 65 before: 399 now: 399 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:574 -coverage: 86.010% pattern: 65 before: 399 now: 399 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:414 -coverage: 86.010% pattern: 65 before: 399 now: 399 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:610 -coverage: 86.010% pattern: 65 before: 399 now: 399 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:500 -coverage: 86.010% pattern: 65 before: 399 now: 399 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:512 -coverage: 86.010% pattern: 65 before: 399 now: 399 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:460 -coverage: 86.010% pattern: 65 before: 399 now: 399 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:650 -coverage: 86.010% pattern: 65 before: 399 now: 399 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:688 -coverage: 86.010% pattern: 65 before: 399 now: 399 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:602 -coverage: 86.010% pattern: 65 before: 399 now: 399 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:604 -coverage: 86.010% pattern: 65 before: 399 now: 399 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:609 -coverage: 86.010% pattern: 65 before: 399 now: 399 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:512 -coverage: 86.010% pattern: 65 before: 399 now: 399 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:509 -coverage: 86.010% pattern: 65 before: 399 now: 399 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:633 -coverage: 86.010% pattern: 65 before: 399 now: 399 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:700 -coverage: 86.010% pattern: 65 before: 399 now: 399 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:521 -coverage: 86.010% pattern: 65 before: 399 now: 399 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:690 -coverage: 86.010% pattern: 65 before: 399 now: 399 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:741 -coverage: 86.010% pattern: 65 before: 399 now: 399 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:609 -coverage: 86.010% pattern: 65 before: 399 now: 399 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:615 -coverage: 86.010% pattern: 65 before: 399 now: 399 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:510 -coverage: 86.010% pattern: 65 before: 399 now: 399 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:578 -coverage: 86.010% pattern: 65 before: 399 now: 399 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:641 -coverage: 86.010% pattern: 65 before: 399 now: 399 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:567 -coverage: 86.010% pattern: 65 before: 399 now: 399 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:580 -coverage: 86.010% pattern: 65 before: 399 now: 399 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:578 -coverage: 86.010% pattern: 65 before: 399 now: 399 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:536 -coverage: 86.010% pattern: 65 before: 399 now: 399 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:602 -coverage: 86.010% pattern: 65 before: 399 now: 399 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:590 -coverage: 86.010% pattern: 65 before: 399 now: 399 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:704 -coverage: 86.010% pattern: 65 before: 399 now: 399 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:572 -coverage: 86.010% pattern: 65 before: 399 now: 399 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:703 -coverage: 86.010% pattern: 65 before: 399 now: 399 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:589 -coverage: 86.010% pattern: 65 before: 399 now: 399 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:632 -coverage: 86.010% pattern: 65 before: 399 now: 399 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:535 -coverage: 86.010% pattern: 65 before: 399 now: 399 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:556 -coverage: 86.010% pattern: 65 before: 399 now: 399 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:585 -coverage: 86.010% pattern: 65 before: 399 now: 399 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:556 -coverage: 86.010% pattern: 65 before: 399 now: 399 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:637 -coverage: 86.010% pattern: 65 before: 399 now: 399 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:630 -coverage: 86.010% pattern: 65 before: 399 now: 399 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:673 -coverage: 86.010% pattern: 65 before: 399 now: 399 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:519 -coverage: 86.010% pattern: 65 before: 399 now: 399 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:618 -coverage: 86.010% pattern: 65 before: 399 now: 399 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:501 -coverage: 86.010% pattern: 65 before: 399 now: 399 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:656 -coverage: 86.010% pattern: 65 before: 399 now: 399 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:668 -coverage: 86.010% pattern: 65 before: 399 now: 399 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:625 -coverage: 86.010% pattern: 65 before: 399 now: 399 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:616 -coverage: 86.010% pattern: 65 before: 399 now: 399 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:574 -coverage: 86.010% pattern: 65 before: 399 now: 399 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:653 -coverage: 86.010% pattern: 65 before: 399 now: 399 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:517 -coverage: 86.010% pattern: 65 before: 399 now: 399 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:583 -coverage: 86.010% pattern: 65 before: 399 now: 399 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:572 -coverage: 86.010% pattern: 65 before: 399 now: 399 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:662 -coverage: 86.010% pattern: 65 before: 399 now: 399 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:589 -coverage: 86.010% pattern: 65 before: 399 now: 399 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:491 -coverage: 86.010% pattern: 65 before: 399 now: 399 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:670 -coverage: 86.010% pattern: 65 before: 399 now: 399 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:532 -coverage: 86.010% pattern: 65 before: 399 now: 399 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:2775. flip_cnt: 0, stem_cnt: 696, fault_cnt:697 -coverage: 91.199% pattern: 66 before: 399 now: 251 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:627 -coverage: 91.199% pattern: 66 before: 251 now: 251 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:581 -coverage: 91.199% pattern: 66 before: 251 now: 251 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:455 -coverage: 91.199% pattern: 66 before: 251 now: 251 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:636 -coverage: 91.199% pattern: 66 before: 251 now: 251 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:526 -coverage: 91.199% pattern: 66 before: 251 now: 251 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:499 -coverage: 91.199% pattern: 66 before: 251 now: 251 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:623 -coverage: 91.199% pattern: 66 before: 251 now: 251 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:690 -coverage: 91.199% pattern: 66 before: 251 now: 251 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 696, fault_cnt:723 -coverage: 91.269% pattern: 67 before: 251 now: 249 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:547 -coverage: 91.269% pattern: 67 before: 249 now: 249 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:664 -coverage: 91.269% pattern: 67 before: 249 now: 249 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:608 -coverage: 91.269% pattern: 67 before: 249 now: 249 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:676 -coverage: 91.269% pattern: 67 before: 249 now: 249 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:573 -coverage: 91.269% pattern: 67 before: 249 now: 249 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:589 -coverage: 91.269% pattern: 67 before: 249 now: 249 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:641 -coverage: 91.269% pattern: 67 before: 249 now: 249 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:580 -coverage: 91.269% pattern: 67 before: 249 now: 249 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:624 -coverage: 91.269% pattern: 67 before: 249 now: 249 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:575 -coverage: 91.269% pattern: 67 before: 249 now: 249 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:556 -coverage: 91.269% pattern: 67 before: 249 now: 249 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:585 -coverage: 91.269% pattern: 67 before: 249 now: 249 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:817 -coverage: 91.269% pattern: 67 before: 249 now: 249 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:755 -coverage: 91.269% pattern: 67 before: 249 now: 249 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:624 -coverage: 91.269% pattern: 67 before: 249 now: 249 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:764 -coverage: 91.269% pattern: 67 before: 249 now: 249 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:517 -coverage: 91.269% pattern: 67 before: 249 now: 249 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:721 -coverage: 91.269% pattern: 67 before: 249 now: 249 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:152. flip_cnt: 0, stem_cnt: 696, fault_cnt:665 -coverage: 91.550% pattern: 68 before: 249 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:716 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:500 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:639 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:496 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:666 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:508 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:504 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:555 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:620 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:465 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:636 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:752 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:581 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:569 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:505 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:520 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:676 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:496 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:615 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:498 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:546 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:509 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:484 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:778 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:459 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:643 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:541 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:716 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:676 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:441 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:635 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:483 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:511 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:447 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:679 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:733 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:767 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:690 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:635 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:704 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:560 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:697 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:613 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:672 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:519 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:735 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:613 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:511 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:580 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:663 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:507 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:600 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:609 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:667 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:479 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:503 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:784 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:485 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:587 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:603 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:807 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:690 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:616 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:536 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:548 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:462 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:648 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:581 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:530 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:494 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:648 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:643 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:633 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:493 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:578 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:530 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:538 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:722 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:735 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:471 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:598 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:523 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:595 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:680 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:648 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:491 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:543 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:572 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:426 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:523 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:736 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:473 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:614 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:697 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:610 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:504 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:549 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:674 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:683 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:507 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:763 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:483 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:729 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:706 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:558 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:564 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:525 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:597 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:533 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:520 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:594 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:650 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:467 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:529 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:554 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:604 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:502 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:476 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:629 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:593 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:452 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:581 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:509 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:661 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:706 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:582 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:584 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:470 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:528 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:473 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:663 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:761 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:617 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:540 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:632 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:506 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:496 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:477 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:539 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:509 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:646 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:486 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:460 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:731 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:682 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:513 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:551 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:485 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:554 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:565 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:650 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:566 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:464 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:647 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:553 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:540 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:632 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:571 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:593 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:484 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:671 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:466 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:589 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:534 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:374 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:715 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:469 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:693 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:643 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:660 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:638 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:564 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:615 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:681 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:466 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:758 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:535 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:506 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:737 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:593 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:608 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:620 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:471 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:486 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:429 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:516 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:704 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:792 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:671 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:484 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:536 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:605 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:577 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:468 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:674 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:632 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:586 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:584 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:500 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:700 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:761 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:633 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:504 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:548 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:570 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:656 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:441 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:492 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:629 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:609 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:566 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:561 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:783 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:474 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:541 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:595 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:591 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:499 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:624 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:685 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:465 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:561 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:496 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:572 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:527 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:700 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:580 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:652 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:500 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:493 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:577 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:478 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:541 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:695 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:564 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:526 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:671 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:783 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:661 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:474 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:467 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:758 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:571 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:643 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:676 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:591 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:745 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:525 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:786 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:539 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:559 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:471 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:540 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:473 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:524 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:733 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:693 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:499 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:618 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:598 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:645 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:545 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:484 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:663 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:509 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:678 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:640 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:624 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:618 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:732 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:637 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:625 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:582 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:775 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:707 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:644 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:542 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:564 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:519 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:621 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:576 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:756 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:468 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:554 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:676 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:680 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:538 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:707 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:596 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:595 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:765 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:662 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:615 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:655 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:600 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:580 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:534 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:571 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:661 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:663 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:450 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:619 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:558 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:534 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:497 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:608 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:810 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:565 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:452 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:546 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:496 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:660 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:734 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:474 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:507 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:631 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:605 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:611 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:473 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:574 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:494 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:679 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:633 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:671 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:656 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:540 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:625 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:647 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:440 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:606 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:693 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:543 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:607 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:444 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:650 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:519 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:575 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:672 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:557 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:523 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:479 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:484 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:520 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:480 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:685 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:706 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:433 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:832 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:673 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:534 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:484 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:702 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:476 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:626 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:514 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:508 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:499 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:523 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:569 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:663 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:591 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:480 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:501 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:577 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:626 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:692 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:601 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:598 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:743 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:563 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:438 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:499 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:570 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:528 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:459 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:576 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:622 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:691 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:503 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:602 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:753 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:541 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:581 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:510 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:688 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:680 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:642 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:599 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:603 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:640 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:507 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:761 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:623 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:740 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:518 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:443 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:582 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:510 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:577 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:694 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:402 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:515 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:599 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:676 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:455 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:608 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:483 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:450 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:436 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:645 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:685 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:592 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:511 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:589 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:547 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:654 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:599 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:449 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:452 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:546 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:616 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:628 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:599 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:499 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:518 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:623 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:755 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:602 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:654 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:556 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:580 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:660 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:532 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:530 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:596 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:551 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:613 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:715 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:580 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:605 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:596 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:660 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:651 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:610 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:538 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:507 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:516 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:570 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:537 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:731 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:804 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:598 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:522 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:639 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:621 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:599 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:600 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:698 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:575 -coverage: 91.550% pattern: 68 before: 241 now: 241 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:114. flip_cnt: 0, stem_cnt: 696, fault_cnt:705 -coverage: 91.760% pattern: 69 before: 241 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:539 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:533 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:707 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:564 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:697 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:492 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:580 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:495 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:627 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:523 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:842 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:728 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:670 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:484 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:467 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:564 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:509 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:523 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:774 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:622 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:491 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:641 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:628 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:680 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:480 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:574 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:547 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:495 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:664 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:673 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:541 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:548 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:561 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:510 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:514 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:676 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:611 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:627 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:706 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:630 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:515 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:523 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:687 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:625 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:482 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:630 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:603 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:590 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:493 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:513 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:668 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:534 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:546 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:618 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:511 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:752 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:586 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:644 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:633 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:649 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:469 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:509 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:492 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:592 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:598 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:714 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:479 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:599 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:639 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:707 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:538 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:620 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:777 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:544 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:538 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:557 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:579 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:586 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:711 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:578 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:733 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:686 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:539 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:595 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:514 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:616 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:614 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:488 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:702 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:689 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:493 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:686 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:681 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:604 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:487 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:732 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:584 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:445 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:715 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:478 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:565 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:472 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:649 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:517 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:626 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:579 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:546 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:419 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:514 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:550 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:746 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:445 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:498 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:577 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:746 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:500 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:509 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:448 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:727 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:461 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:630 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:673 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:722 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:532 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:468 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:471 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:533 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:760 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:721 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:561 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:484 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:699 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:635 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:483 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:701 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:653 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:684 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:437 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:595 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:516 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:619 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:563 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:607 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:630 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:689 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:456 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:578 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:630 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:712 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:632 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:639 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:565 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:757 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:491 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:473 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:767 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:441 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:698 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:695 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:575 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:463 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:684 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:668 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:600 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:616 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:571 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:593 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:661 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:482 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:731 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:528 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:743 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:507 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:426 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:502 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:618 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:536 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:441 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:526 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:648 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:537 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:497 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:562 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:628 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:509 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:721 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:568 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:615 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:458 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:517 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:659 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:550 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:675 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:614 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:474 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:797 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:499 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:433 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:754 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:650 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:675 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:516 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:454 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:678 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:481 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:510 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:655 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:478 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:619 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:650 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:539 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:579 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:730 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:705 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:513 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:592 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:563 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:754 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:580 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:526 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:558 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:587 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:512 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:628 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:612 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:619 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:603 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:588 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:691 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:558 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:615 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:566 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:671 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:608 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:608 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:469 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:719 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:716 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:686 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:599 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:704 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:632 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:570 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:428 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:577 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:517 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:485 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:620 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:681 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:764 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:615 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:609 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:570 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:479 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:535 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:624 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:783 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:550 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:691 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:592 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:712 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:639 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:532 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:686 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:715 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:433 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:530 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:569 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:517 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:608 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:663 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:509 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:638 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:612 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:700 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:594 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:416 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:772 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:607 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:495 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:565 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:604 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:499 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:526 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:534 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:727 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:699 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:529 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:471 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:539 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:592 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:498 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:628 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:552 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:618 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:480 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:695 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:641 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:467 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:771 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:437 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:622 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:548 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:625 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:649 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:610 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:575 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:706 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:741 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:530 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:703 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:486 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:487 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:651 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:573 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:610 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:503 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:660 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:602 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:622 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:501 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:508 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:710 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:515 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:739 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:605 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:443 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:529 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:590 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:514 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:454 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:562 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:470 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:516 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:617 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:481 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:817 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:671 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:725 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:524 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:601 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:496 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:431 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:618 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:560 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:624 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:386 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:599 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:480 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:782 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:653 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:614 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:619 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:659 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:622 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:465 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:520 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:479 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:549 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:472 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:652 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:651 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:648 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:500 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:667 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:660 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:504 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:613 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:621 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:653 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:517 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:681 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:451 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:647 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:652 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:660 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:702 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:511 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:484 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:487 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:694 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:598 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:486 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:518 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:562 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:593 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:622 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:556 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:614 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:614 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:646 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:592 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:617 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:477 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:510 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:576 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:504 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:532 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:516 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:642 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:632 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:640 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:487 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:548 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:563 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:645 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:595 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:534 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:693 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:483 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:621 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:711 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:459 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:746 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:466 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:620 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:622 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:470 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:665 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:486 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:560 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:783 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:511 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:630 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:726 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:552 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:653 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:656 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:494 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:533 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:643 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:603 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:550 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:528 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:701 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:612 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:615 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:721 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:735 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:573 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:616 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:551 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:563 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:572 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:523 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:575 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:576 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:552 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:492 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:531 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:569 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:524 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:530 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:500 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:654 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:559 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:571 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:432 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:582 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:672 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:667 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:564 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:676 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:638 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:558 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:578 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:730 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:507 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:483 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:579 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:502 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:472 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:511 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:757 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:504 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:510 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:585 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:745 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:777 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:689 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:649 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:599 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:520 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:557 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:570 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:614 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:467 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:661 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:449 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:572 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:631 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:585 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:592 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:587 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:451 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:530 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:575 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:547 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:606 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:634 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:514 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:601 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:667 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:599 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:566 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:648 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:468 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:594 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:663 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:521 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:586 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:557 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:666 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:526 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:744 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:475 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:685 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:791 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:620 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:600 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:508 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:435 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:616 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:566 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:717 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:494 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:527 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:543 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:464 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:623 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:577 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:628 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:487 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:709 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:606 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:766 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:569 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:597 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:586 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:687 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:674 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:796 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:477 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:579 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:497 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:589 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:613 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:516 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:460 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:521 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:565 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:556 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:659 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:576 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:720 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:522 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:471 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:784 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:546 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:613 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:506 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:517 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:608 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:572 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:708 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:623 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:440 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:574 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:658 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:663 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:573 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:522 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:605 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:641 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:700 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:482 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:490 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:540 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:458 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:551 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:534 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:709 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:679 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:575 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:630 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:583 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:669 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:607 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:515 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:580 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:614 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:475 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:456 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:518 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:487 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:559 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:575 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:576 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:645 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:696 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:741 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:397 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:577 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:726 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:740 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:770 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:559 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:548 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:574 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:570 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:534 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:410 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:732 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:488 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:586 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:523 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:664 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:573 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:573 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:623 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:463 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:516 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:452 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:547 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:686 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:527 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:582 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:496 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:520 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:569 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:526 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:628 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:682 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:663 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:575 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:594 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:695 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:560 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:688 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:453 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:501 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:697 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:657 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:636 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:522 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:662 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:559 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:572 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:537 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:466 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:515 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:653 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:439 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:663 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:617 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:541 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:542 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:598 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:517 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:567 -coverage: 91.760% pattern: 69 before: 235 now: 235 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:114. flip_cnt: 0, stem_cnt: 696, fault_cnt:493 -coverage: 91.971% pattern: 70 before: 235 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:495 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:646 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:727 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:453 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:709 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:574 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:667 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:440 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:460 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:444 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:434 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:456 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:644 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:670 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:558 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:601 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:464 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:665 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:568 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:585 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:567 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:540 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:780 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:488 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:657 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:550 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:642 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:522 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:678 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:502 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:524 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:478 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:665 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:644 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:598 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:589 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:765 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:565 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:627 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:575 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:487 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:663 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:513 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:487 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:682 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:654 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:631 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:427 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:496 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:599 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:755 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:658 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:582 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:612 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:496 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:682 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:599 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:606 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:593 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:574 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:451 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:498 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:468 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:450 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:767 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:703 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:619 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:409 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:553 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:787 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:726 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:587 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:516 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:522 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:784 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:600 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:568 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:624 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:747 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:510 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:619 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:794 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:640 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:678 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:505 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:514 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:514 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:634 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:678 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:614 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:559 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:681 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:567 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:529 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:432 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:729 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:584 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:525 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:526 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:540 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:616 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:528 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:578 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:471 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:638 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:618 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:602 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:570 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:721 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:622 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:516 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:609 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:628 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:565 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:741 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:649 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:604 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:637 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:677 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:516 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:531 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:580 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:659 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:669 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:565 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:638 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:552 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:644 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:733 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:554 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:490 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:664 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:690 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:711 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:451 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:549 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:486 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:504 -coverage: 91.971% pattern: 70 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:133. flip_cnt: 0, stem_cnt: 696, fault_cnt:545 -coverage: 92.216% pattern: 71 before: 229 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:668 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:599 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:582 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:632 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:572 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:542 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:640 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:504 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:635 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:713 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:715 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:788 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:679 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:747 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:604 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:575 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:622 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:493 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:536 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:527 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:697 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:538 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:553 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:505 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:786 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:630 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:497 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:543 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:587 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:686 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:485 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:438 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:735 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:487 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:744 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:609 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:490 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:744 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:481 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:504 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:549 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:647 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:626 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:610 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:501 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:446 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:556 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:712 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:429 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:575 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:515 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:635 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:596 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:464 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:672 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:567 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:584 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:621 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:500 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:490 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:477 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:531 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:644 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:591 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:524 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:451 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:433 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:613 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:539 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:606 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:666 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:498 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:475 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:597 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:481 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:665 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:576 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:672 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:621 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:558 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:551 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:715 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:613 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:644 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:645 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:641 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:589 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:500 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:570 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:568 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:773 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:593 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:533 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:563 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:505 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:446 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:507 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:667 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:620 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:573 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:572 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:636 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:556 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:631 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:733 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:646 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:608 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:660 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:544 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:675 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:612 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:500 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:620 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:630 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:592 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:553 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:525 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:638 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:603 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:554 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:533 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:509 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:534 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:608 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:593 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:593 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:538 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:612 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:566 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:413 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:649 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:548 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:599 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:470 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:615 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:452 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:462 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:607 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:642 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:695 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:544 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:654 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:760 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:632 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:483 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:701 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:479 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:701 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:458 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:543 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:524 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:536 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:516 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:566 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:582 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:600 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:611 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:577 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:532 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:524 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:483 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:623 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:467 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:625 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:498 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:588 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:667 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:451 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:488 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:554 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:644 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:694 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:583 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:576 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:539 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:614 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:779 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:535 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:660 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:640 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:480 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:614 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:705 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:752 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:560 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:617 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:683 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:487 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:750 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:544 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:611 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:502 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:509 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:516 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:601 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:580 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:518 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:459 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:454 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:447 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:463 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:743 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:693 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:593 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:601 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:448 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:620 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:646 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:774 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:501 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:424 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:709 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:716 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:432 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:565 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:462 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:747 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:743 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:644 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:566 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:528 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:660 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:576 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:630 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:815 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:649 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:436 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:650 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:571 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:462 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:665 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:648 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:618 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:511 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:555 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:511 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:694 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:631 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:661 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:490 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:571 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:615 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:669 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:815 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:530 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:616 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:558 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:613 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:777 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:637 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:579 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:474 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:589 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:593 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:472 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:717 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:560 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:620 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:687 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:652 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:662 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:645 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:513 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:544 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:595 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:448 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:571 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:540 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:567 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:701 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:600 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:620 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:650 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:519 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:565 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:539 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:702 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:512 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:609 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:578 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:479 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:525 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:563 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:639 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:622 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:554 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:727 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:596 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:510 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:671 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:624 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:630 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:604 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:763 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:540 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:523 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:637 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:607 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:489 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:676 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:605 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:598 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:523 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:616 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:496 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:625 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:519 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:588 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:566 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:620 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:625 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:541 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:432 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:512 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:536 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:618 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:506 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:707 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:633 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:610 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:619 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:602 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:657 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:485 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:501 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:452 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:504 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:600 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:624 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:674 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:727 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:569 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:449 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:579 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:727 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:526 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:579 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:734 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:710 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:701 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:490 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:662 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:518 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:485 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:560 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:555 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:571 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:674 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:434 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:606 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:526 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:490 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:629 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:455 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:617 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:514 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:477 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:574 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:597 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:659 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:714 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:507 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:580 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:601 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:585 -coverage: 92.216% pattern: 71 before: 222 now: 222 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 696, fault_cnt:522 -coverage: 92.356% pattern: 72 before: 222 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:550 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:565 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:510 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:533 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:540 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:571 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:693 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:543 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:490 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:463 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:645 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:646 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:498 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:685 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:579 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:594 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:659 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:723 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:608 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:654 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:722 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:618 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:561 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:772 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:794 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:602 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:601 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:580 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:574 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:633 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:506 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:591 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:541 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:524 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:547 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:685 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:574 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:507 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:739 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:581 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:669 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:663 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:470 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:473 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:623 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:681 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:475 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:505 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:612 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:600 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:519 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:512 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:618 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:536 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:615 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:725 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:579 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:503 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:495 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:505 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:682 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:601 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:587 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:668 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:499 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:546 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:739 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:613 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:631 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:484 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:588 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:597 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:676 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:628 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:530 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:753 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:744 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:554 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:649 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:457 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:506 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:588 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:478 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:624 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:602 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:494 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:460 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:627 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:491 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:517 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:619 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:442 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:628 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:777 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:512 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:578 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:542 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:709 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:481 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:573 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:561 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:554 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:586 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:467 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:626 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:502 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:455 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:747 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:498 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:492 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:616 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:603 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:534 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:561 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:623 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:632 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:510 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:599 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:584 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:775 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:629 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:710 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:742 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:478 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:643 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:598 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:645 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:544 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:677 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:740 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:571 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:596 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:603 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:583 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:451 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:606 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:543 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:597 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:736 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:637 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:484 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:664 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:546 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:566 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:509 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:471 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:522 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:433 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:686 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:492 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:573 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:755 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:634 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:440 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:724 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:542 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:465 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:558 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:706 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:468 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:466 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:661 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:573 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:771 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:672 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:518 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:554 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:667 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:601 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:525 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:653 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:653 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:779 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:513 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:640 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:642 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:538 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:654 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:631 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:580 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:695 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:469 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:636 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:783 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:464 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:731 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:515 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:521 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:581 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:704 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:448 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:731 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:609 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:730 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:669 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:634 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:516 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:486 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:579 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:644 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:600 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:624 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:640 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:533 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:523 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:757 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:724 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:682 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:713 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:500 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:566 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:526 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:548 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:485 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:619 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:519 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:630 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:496 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:680 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:718 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:502 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:662 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:580 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:598 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:506 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:450 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:679 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:549 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:691 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:533 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:526 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:610 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:634 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:516 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:508 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:553 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:477 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:564 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:479 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:694 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:537 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:729 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:496 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:624 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:688 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:470 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:803 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:468 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:646 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:629 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:488 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:691 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:601 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:498 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:543 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:646 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:573 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:462 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:576 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:703 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:540 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:739 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:606 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:596 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:487 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:449 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:539 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:486 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:712 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:469 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:724 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:642 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:755 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:469 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:621 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:575 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:586 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:636 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:595 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:588 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:520 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:595 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:555 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:628 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:699 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:588 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:508 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:455 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:533 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:627 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:667 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:580 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:648 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:679 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:605 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:786 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:778 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:674 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:637 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:516 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:643 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:726 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:508 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:554 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:555 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:542 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:632 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:514 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:516 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:499 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:731 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:530 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:539 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:595 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:491 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:608 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:637 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:592 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:456 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:565 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:484 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:627 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:513 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:558 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:462 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:633 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:610 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:680 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:573 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:726 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:490 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:462 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:613 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:576 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:732 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:497 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:694 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:706 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:600 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:629 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:534 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:599 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:743 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:662 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:621 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:468 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:550 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:605 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:439 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:588 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:536 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:468 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:745 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:587 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:546 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:507 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:595 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:579 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:589 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:571 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:785 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:638 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:666 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:752 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:436 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:469 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:620 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:469 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:588 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:547 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:656 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:527 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:521 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:673 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:673 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:686 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:652 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:645 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:701 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:457 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:728 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:716 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:499 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:600 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:600 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:604 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:630 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:505 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:627 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:629 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:595 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:536 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:627 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:498 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:709 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:471 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:644 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:658 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:601 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:624 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:525 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:510 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:723 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:626 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:575 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:757 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:573 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:423 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:601 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:481 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:544 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:627 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:783 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:569 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:661 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:639 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:500 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:730 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:512 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:573 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:605 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:430 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:620 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:515 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:631 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:486 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:544 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:550 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:716 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:700 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:498 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:512 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:558 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:478 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:606 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:644 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:535 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:584 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:554 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:577 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:560 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:468 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:793 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:525 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:619 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:559 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:544 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:435 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:521 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:551 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:569 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:511 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:586 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:619 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:688 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:501 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:683 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:580 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:498 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:547 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:815 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:637 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:777 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:531 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:603 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:559 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:617 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:643 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:501 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:526 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:762 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:515 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:643 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:584 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:788 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:434 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:518 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:526 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:578 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:528 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:597 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:679 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:564 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:799 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:542 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:587 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:461 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:482 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:483 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:497 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:526 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:596 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:744 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:573 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:518 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:686 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:747 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:613 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:609 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:757 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:639 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:636 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:504 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:779 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:518 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:574 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:684 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:777 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:606 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:528 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:483 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:555 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:742 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:447 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:550 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:515 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:522 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:671 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:500 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:717 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:635 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:687 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:655 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:634 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:616 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:544 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:632 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:662 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:746 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:630 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:535 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:700 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:522 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:641 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:512 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:451 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:673 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:622 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:532 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:643 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:612 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:462 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:509 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:645 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:598 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:502 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:628 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:716 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:790 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:525 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:619 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:565 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:444 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:485 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:556 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:511 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:569 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:672 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:615 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:534 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:512 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:579 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:503 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:502 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:657 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:664 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:731 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:667 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:505 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:656 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:674 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:583 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:655 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:436 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:489 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:582 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:578 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:625 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:515 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:638 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:651 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:587 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:680 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:481 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:587 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:645 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:561 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:526 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:632 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:642 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:537 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:661 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:589 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:536 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:430 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:592 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:463 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:641 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:496 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:486 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:506 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:613 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:560 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:657 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:603 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:756 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:750 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:596 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:628 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:469 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:520 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:683 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:727 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:707 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:619 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:695 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:624 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:650 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:706 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:468 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:617 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:615 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:517 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:483 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:699 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:753 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:624 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:539 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:791 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:565 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:542 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:599 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:512 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:651 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:521 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:678 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:608 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:425 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:481 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:504 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:569 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:470 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:540 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:602 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:512 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:643 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:614 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:689 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:560 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:594 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:744 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:596 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:614 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:534 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:542 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:495 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:583 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:677 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:533 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:468 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:611 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:720 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:682 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:646 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:485 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:576 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:607 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:666 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:416 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:517 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:505 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:634 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:674 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:601 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:484 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:630 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:741 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:484 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:506 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:544 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:712 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:601 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:619 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:732 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:499 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:525 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:579 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:566 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:637 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:605 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:756 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:455 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:463 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:508 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:508 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:501 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:553 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:644 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:777 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:487 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:633 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:630 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:668 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:809 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:512 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:628 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:579 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:663 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:526 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:650 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:719 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:564 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:767 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:621 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:545 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:605 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:660 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:518 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:632 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:533 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:544 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:437 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:541 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:554 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:696 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:642 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:433 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:641 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:496 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:617 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:456 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:634 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:442 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:647 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:541 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:696 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:701 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:677 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:636 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:567 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:544 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:575 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:575 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:580 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:580 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:576 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:565 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:727 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:672 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:689 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:491 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:604 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:686 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:694 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:625 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:676 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:642 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:776 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:690 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:661 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:705 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:551 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:718 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:485 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:525 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:665 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:689 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:635 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:742 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:688 -coverage: 92.356% pattern: 72 before: 218 now: 218 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:152. flip_cnt: 0, stem_cnt: 696, fault_cnt:516 -coverage: 92.637% pattern: 73 before: 218 now: 210 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:755 -coverage: 92.637% pattern: 73 before: 210 now: 210 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:463 -coverage: 92.637% pattern: 73 before: 210 now: 210 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:583 -coverage: 92.637% pattern: 73 before: 210 now: 210 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:582 -coverage: 92.637% pattern: 73 before: 210 now: 210 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:693 -coverage: 92.637% pattern: 73 before: 210 now: 210 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:539 -coverage: 92.637% pattern: 73 before: 210 now: 210 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:666 -coverage: 92.637% pattern: 73 before: 210 now: 210 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:644 -coverage: 92.637% pattern: 73 before: 210 now: 210 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:555 -coverage: 92.637% pattern: 73 before: 210 now: 210 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:557 -coverage: 92.637% pattern: 73 before: 210 now: 210 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:761 -coverage: 92.637% pattern: 73 before: 210 now: 210 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:516 -coverage: 92.637% pattern: 73 before: 210 now: 210 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:615 -coverage: 92.637% pattern: 73 before: 210 now: 210 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:559 -coverage: 92.637% pattern: 73 before: 210 now: 210 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:685 -coverage: 92.637% pattern: 73 before: 210 now: 210 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:747 -coverage: 92.637% pattern: 73 before: 210 now: 210 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:625 -coverage: 92.637% pattern: 73 before: 210 now: 210 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:725 -coverage: 92.637% pattern: 73 before: 210 now: 210 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:527 -coverage: 92.637% pattern: 73 before: 210 now: 210 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:636 -coverage: 92.637% pattern: 73 before: 210 now: 210 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:577 -coverage: 92.637% pattern: 73 before: 210 now: 210 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:618 -coverage: 92.637% pattern: 73 before: 210 now: 210 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:490 -coverage: 92.637% pattern: 73 before: 210 now: 210 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:434 -coverage: 92.637% pattern: 73 before: 210 now: 210 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:655 -coverage: 92.637% pattern: 73 before: 210 now: 210 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:679 -coverage: 92.637% pattern: 73 before: 210 now: 210 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:483 -coverage: 92.637% pattern: 73 before: 210 now: 210 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:703 -coverage: 92.637% pattern: 73 before: 210 now: 210 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:477 -coverage: 92.637% pattern: 73 before: 210 now: 210 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:615 -coverage: 92.637% pattern: 73 before: 210 now: 210 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:527 -coverage: 92.637% pattern: 73 before: 210 now: 210 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:634 -coverage: 92.637% pattern: 73 before: 210 now: 210 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:622 -coverage: 92.637% pattern: 73 before: 210 now: 210 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:536 -coverage: 92.637% pattern: 73 before: 210 now: 210 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:736 -coverage: 92.637% pattern: 73 before: 210 now: 210 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:511 -coverage: 92.637% pattern: 73 before: 210 now: 210 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:611 -coverage: 92.637% pattern: 73 before: 210 now: 210 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:654 -coverage: 92.637% pattern: 73 before: 210 now: 210 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:502 -coverage: 92.637% pattern: 73 before: 210 now: 210 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:433 -coverage: 92.637% pattern: 73 before: 210 now: 210 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:486 -coverage: 92.637% pattern: 73 before: 210 now: 210 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:133. flip_cnt: 0, stem_cnt: 696, fault_cnt:819 -coverage: 92.882% pattern: 74 before: 210 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:618 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:669 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:601 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:477 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:675 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:635 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:536 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:475 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:773 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:485 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:598 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:602 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:532 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:578 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:724 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:452 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:493 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:642 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:702 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:583 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:493 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:525 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:495 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:678 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:546 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:640 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:533 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:486 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:661 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:547 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:566 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:487 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:736 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:699 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:670 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:537 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:681 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:710 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:664 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:533 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:571 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:597 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:544 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:600 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:603 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:584 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:656 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:553 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:507 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:648 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:562 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:453 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:442 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:614 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:576 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:534 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:705 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:550 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:559 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:630 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:503 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:485 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:611 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:529 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:403 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:525 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:658 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:573 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:579 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:656 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:746 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:574 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:480 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:722 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:537 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:649 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:544 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:515 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:662 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:502 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:606 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:610 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:613 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:496 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:695 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:592 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:652 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:570 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:781 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:630 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:677 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:494 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:620 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:588 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:635 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:638 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:544 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:519 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:525 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:469 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:529 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:690 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:686 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:665 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:592 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:633 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:515 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:653 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:662 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:639 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:709 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:530 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:740 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:599 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:501 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:549 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:696 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:600 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:557 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:534 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:457 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:572 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:536 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:514 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:567 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:633 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:606 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:550 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:663 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:680 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:496 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:538 -coverage: 92.882% pattern: 74 before: 203 now: 203 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:1083. flip_cnt: 0, stem_cnt: 696, fault_cnt:938 -coverage: 94.881% pattern: 75 before: 203 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:495 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:487 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:639 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:660 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:489 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:582 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:656 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:727 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:505 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:594 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:578 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:660 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:482 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:722 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:534 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:749 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:641 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:514 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:574 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:740 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:550 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:547 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:490 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:644 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:482 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:570 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:794 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:565 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:679 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:516 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:627 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:496 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:691 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:562 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:499 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:423 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:586 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:650 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:487 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:528 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:524 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:570 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:593 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:551 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:542 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:508 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:549 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:508 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:600 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:504 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:517 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:528 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:544 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:540 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:630 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:791 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:466 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:655 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:453 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:590 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:481 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:571 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:475 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:486 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:623 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:509 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:735 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:485 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:690 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:668 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:421 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:567 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:608 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:582 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:501 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:655 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:519 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:544 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:502 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:465 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:610 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:831 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:597 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:664 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:645 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:657 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:545 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:653 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:625 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:704 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:492 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:524 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:557 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:671 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:657 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:519 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:535 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:490 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:650 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:695 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:568 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:530 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:479 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:640 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:695 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:385 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:706 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:596 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:573 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:489 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:426 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:467 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:592 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:490 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:573 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:458 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:626 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:476 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:595 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:472 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:590 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:497 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:694 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:496 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:508 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:503 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:484 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:673 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:717 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:521 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:558 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:812 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:647 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:690 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:463 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:505 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:589 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:660 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:568 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:579 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:611 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:499 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:718 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:580 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:447 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:462 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:627 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:632 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:487 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:531 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:538 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:623 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:733 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:460 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:486 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:650 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:581 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:558 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:496 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:622 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:585 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:732 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:540 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:442 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:592 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:502 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:648 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:464 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:566 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:622 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:457 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:573 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:611 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:533 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:654 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:618 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:533 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:492 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:618 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:668 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:650 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:540 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:602 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:569 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:690 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:624 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:510 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:611 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:521 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:646 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:554 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:575 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:464 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:492 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:581 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:542 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:625 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:586 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:509 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:578 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:481 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:520 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:474 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:626 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:604 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:535 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:569 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:624 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:567 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:728 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:517 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:530 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:535 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:619 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:733 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:582 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:659 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:565 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:482 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:656 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:638 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:559 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:574 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:487 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:589 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:471 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:581 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:619 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:596 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:652 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:532 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:650 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:574 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:470 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:619 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:560 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:550 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:651 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:770 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:708 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:594 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:616 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:626 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:665 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:568 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:673 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:602 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:459 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:486 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:532 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:627 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:609 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:620 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:516 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:571 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:491 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:725 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:557 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:562 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:555 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:533 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:495 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:645 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:779 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:558 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:495 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:493 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:455 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:513 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:606 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:682 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:580 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:581 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:649 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:515 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:562 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:669 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:595 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:574 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:643 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:490 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:761 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:674 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:551 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:616 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:538 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:463 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:535 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:561 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:608 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:444 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:643 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:461 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:601 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:570 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:604 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:540 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:559 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:631 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:576 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:620 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:618 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:637 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:684 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:676 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:511 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:509 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:576 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:633 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:646 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:698 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:472 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:691 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:575 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:692 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:555 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:561 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:452 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:686 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:521 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:557 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:501 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:750 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:654 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:566 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:517 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:623 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:616 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:640 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:592 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:550 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:506 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:522 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:716 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:478 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:610 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:522 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:423 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:623 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:490 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:450 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:479 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:487 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:522 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:723 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:740 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:583 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:730 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:685 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:624 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:654 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:636 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:518 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:477 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:610 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:517 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:712 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:576 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:531 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:538 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:554 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:633 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:655 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:572 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:471 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:563 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:767 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:603 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:518 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:508 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:479 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:608 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:594 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:666 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:722 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:480 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:502 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:747 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:669 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:475 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:579 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:604 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:658 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:590 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:556 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:578 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:500 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:523 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:645 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:498 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:411 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:581 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:707 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:519 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:708 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:687 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:511 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:502 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:671 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:570 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:730 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:578 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:672 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:716 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:477 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:583 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:585 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:618 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:444 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:544 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:595 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:602 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:628 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:505 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:592 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:613 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:623 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:527 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:677 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:513 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:687 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:660 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:666 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:783 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:687 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:536 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:494 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:467 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:557 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:477 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:605 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:676 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:587 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:627 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:610 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:708 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:471 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:553 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:637 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:616 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:518 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:629 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:666 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:729 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:549 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:528 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:636 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:559 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:556 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:644 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:658 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:635 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:538 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:724 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:623 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:540 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:690 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:592 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:506 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:462 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:529 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:631 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:725 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:513 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:601 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:458 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:605 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:597 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:566 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:555 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:451 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:460 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:582 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:529 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:452 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:534 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:499 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:566 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:528 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:715 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:674 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:618 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:796 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:507 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:632 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:571 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:628 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:527 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:568 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:458 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:555 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:566 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:503 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:478 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:555 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:631 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:623 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:569 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:471 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:604 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:675 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:593 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:597 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:401 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:457 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:664 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:651 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:606 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:671 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:469 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:525 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:455 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:472 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:673 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:612 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:517 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:516 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:479 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:672 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:466 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:646 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:659 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:635 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:565 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:523 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:589 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:596 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:677 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:693 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:549 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:454 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:456 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:599 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:493 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:645 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:644 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:514 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:735 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:519 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:515 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:613 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:616 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:658 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:518 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:704 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:554 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:462 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:612 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:697 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:610 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:575 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:559 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:473 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:509 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:589 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:488 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:484 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:726 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:488 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:605 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:556 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:570 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:638 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:626 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:596 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:670 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:639 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:479 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:520 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:648 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:468 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:524 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:601 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:690 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:665 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:611 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:764 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:527 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:769 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:472 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:603 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:540 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:656 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:583 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:534 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:692 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:610 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:635 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:626 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:742 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:502 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:423 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:752 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:516 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:619 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:543 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:528 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:433 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:469 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:545 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:555 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:541 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:714 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:482 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:509 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:557 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:524 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:478 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:591 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:509 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:699 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:556 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:602 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:751 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:497 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:622 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:504 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:588 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:522 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:573 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:564 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:445 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:710 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:677 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:614 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:464 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:572 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:675 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:500 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:568 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:567 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:675 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:508 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:661 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:594 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:635 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:589 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:547 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:549 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:523 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:422 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:630 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:539 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:494 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:592 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:688 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:649 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:486 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:545 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:768 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:577 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:525 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:732 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:425 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:616 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:629 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:474 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:530 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:589 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:571 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:523 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:691 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:463 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:552 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:626 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:510 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:491 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:593 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:598 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:491 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:756 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:560 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:459 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:673 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:653 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:518 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:660 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:545 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:595 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:447 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:522 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:574 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:464 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:635 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:617 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:487 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:551 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:627 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:621 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:482 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:609 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:582 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:675 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:439 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:615 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:546 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:454 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:504 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:511 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:576 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:615 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:499 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:561 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:704 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:495 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:595 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:622 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:628 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:772 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:569 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:724 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:554 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:439 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:607 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:632 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:611 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:623 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:695 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:599 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:721 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:795 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:583 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:592 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:454 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:608 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:587 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:560 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:647 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:684 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:682 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:622 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:647 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:458 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:700 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:432 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:478 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:767 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:489 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:474 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:563 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:595 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:614 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:612 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:488 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:607 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:564 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:572 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:594 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:692 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:606 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:554 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:590 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:667 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:588 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:609 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:631 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:640 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:546 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:461 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:643 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:521 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:709 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:513 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:594 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:564 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:544 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:642 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:549 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:638 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:655 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:591 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:467 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:556 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:607 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:565 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:582 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:430 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:554 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:639 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:655 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:524 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:686 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:495 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:595 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:578 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:550 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:586 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:475 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:553 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:586 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:552 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:650 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:629 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:531 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:744 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:663 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:583 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:502 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:558 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:546 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:498 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:505 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:611 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:655 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:589 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:592 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:727 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:615 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:491 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:456 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:610 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:493 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:509 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:507 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:697 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:425 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:541 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:751 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:639 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:808 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:728 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:667 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:559 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:524 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:647 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:546 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:618 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:457 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:507 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:634 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:670 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:521 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:494 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:693 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:572 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:537 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:748 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:599 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:695 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:671 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:574 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:494 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:678 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:745 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:576 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:792 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:487 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:600 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:624 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:501 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:616 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:650 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:711 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:653 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:514 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:633 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:560 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:443 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:586 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:559 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:501 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:623 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:572 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:726 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:578 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:498 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:724 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:515 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:510 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:477 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:548 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:472 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:592 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:650 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:501 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:431 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:431 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:562 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:495 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:634 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:565 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:662 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:630 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:658 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:751 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:451 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:550 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:600 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:628 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:667 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:690 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:507 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:519 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:569 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:581 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:622 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:473 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:748 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:603 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:600 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:549 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:494 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:469 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:676 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:502 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:627 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:782 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:484 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:494 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:599 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:490 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:657 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:475 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:497 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:527 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:514 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:516 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:468 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:464 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:498 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:637 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:527 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:613 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:576 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:512 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:708 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:484 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:487 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:628 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:475 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:593 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:496 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:775 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:472 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:540 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:602 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:506 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:772 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:554 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:588 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:494 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:467 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:608 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:499 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:560 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:585 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:526 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:475 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:576 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:661 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:637 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:497 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:679 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:484 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:644 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:502 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:606 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:452 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:517 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:694 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:685 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:459 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:629 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:460 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:602 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:652 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:545 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:567 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:563 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:603 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:474 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:525 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:631 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:645 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:457 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:579 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:667 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:582 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:469 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:465 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:641 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:705 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:672 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:542 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:576 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:581 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:605 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:636 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:495 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:583 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:619 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:658 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:590 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:499 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:635 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:616 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:738 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:751 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:586 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:524 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:450 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:546 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:488 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:722 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:503 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:677 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:667 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:684 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:616 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:622 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:453 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:522 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:664 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:491 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:676 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:519 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:494 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:503 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:504 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:531 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:566 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:647 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:573 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:472 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:654 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:504 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:675 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:641 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:717 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:738 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:545 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:498 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:574 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:614 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:573 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:715 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:611 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:415 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:546 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:520 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:797 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:682 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:568 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:592 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:554 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:502 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:449 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:642 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:515 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:581 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:641 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:621 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:617 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:616 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:516 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:556 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:650 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:703 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:516 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:605 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:551 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:611 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:577 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:597 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:629 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:822 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:640 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:673 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:523 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:618 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:732 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:580 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:531 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:586 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:626 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:567 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:596 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:733 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:604 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:566 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:620 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:525 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:681 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:630 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:529 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:657 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:589 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:752 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:788 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:740 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:681 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:654 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:627 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:558 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:513 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:520 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:529 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:485 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:548 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:519 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:496 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:468 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:574 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:719 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:618 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:653 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:518 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:506 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:556 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:743 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:528 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:587 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:508 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:525 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:522 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:613 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:487 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:505 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:540 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:626 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:599 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:657 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:694 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:485 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:557 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:547 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:547 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:692 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:597 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:476 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:608 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:654 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:750 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:485 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:629 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:415 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:484 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:690 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:553 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:512 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:502 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:574 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:694 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:507 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:720 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:684 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:570 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:575 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:578 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:524 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:512 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:535 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:586 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:652 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:576 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:643 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:546 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:541 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:713 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:589 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:508 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:541 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:511 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:598 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:488 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:473 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:624 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:615 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:499 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:600 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:644 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:502 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:503 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:549 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:489 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:672 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:624 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:583 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:574 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:766 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:497 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:633 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:733 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:444 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:591 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:442 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:710 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:663 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:451 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:493 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:508 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:613 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:596 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:530 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:539 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:595 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:644 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:504 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:385 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:538 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:656 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:580 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:570 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:610 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:752 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:611 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:594 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:623 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:557 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:601 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:454 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:757 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:444 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:643 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:501 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:744 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:528 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:586 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:489 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:445 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:512 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:552 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:776 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:681 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:544 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:573 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:598 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:484 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:652 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:656 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:564 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:557 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:583 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:747 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:644 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:471 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:601 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:461 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:421 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:427 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:672 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:515 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:577 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:709 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:453 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:457 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:633 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:627 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:565 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:522 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:495 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:620 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:481 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:518 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:669 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:554 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:423 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:633 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:606 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:700 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:692 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:538 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:612 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:548 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:445 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:651 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:520 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:521 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:678 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:663 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:507 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:623 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:508 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:618 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:526 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:739 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:626 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:644 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:617 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:656 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:704 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:740 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:613 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:448 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:573 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:554 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:604 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:746 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:681 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:494 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:537 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:584 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:592 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:491 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:522 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:619 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:572 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:654 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:470 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:624 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:452 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:604 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:545 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:459 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:609 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:605 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:529 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:416 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:693 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:626 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:755 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:634 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:452 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:574 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:498 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:682 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:535 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:734 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:627 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:584 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:464 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:620 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:612 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:515 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:486 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:577 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:615 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:522 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:519 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:659 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:547 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:602 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:459 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:505 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:629 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:831 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:583 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:634 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:721 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:797 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:691 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:474 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:663 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:722 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:487 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:549 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:752 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:519 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:616 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:575 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:533 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:627 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:610 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:531 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:528 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:495 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:460 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:562 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:487 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:559 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:727 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:531 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:402 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:451 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:662 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:615 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:647 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:608 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:592 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:565 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:548 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:649 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:557 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:481 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:499 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:587 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:607 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:468 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:617 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:580 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:624 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:456 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:525 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:453 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:627 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:519 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:621 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:563 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:610 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:619 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:671 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:604 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:658 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:446 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:518 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:595 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:581 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:641 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:489 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:709 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:490 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:478 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:639 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:696 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:493 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:666 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:665 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:389 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:617 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:714 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:755 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:590 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:473 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:724 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:630 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:688 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:532 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:656 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:506 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:615 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:653 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:524 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:593 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:621 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:589 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:650 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:568 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:574 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:555 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:799 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:591 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:592 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:490 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:613 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:632 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:633 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:681 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:657 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:532 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:626 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:570 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:496 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:750 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:716 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:568 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:572 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:756 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:447 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:631 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:466 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:438 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:753 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:510 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:551 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:605 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:606 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:481 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:719 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:673 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:668 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:569 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:583 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:577 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:694 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:504 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:554 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:511 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:488 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:491 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:546 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:505 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:652 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:659 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:696 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:631 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:664 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:565 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:464 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:600 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:692 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:644 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:673 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:515 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:462 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:581 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:600 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:461 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:483 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:774 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:557 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:687 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:518 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:492 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:633 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:546 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:556 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:509 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:521 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:492 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:560 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:464 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:607 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:529 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:680 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:521 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:619 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:515 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:610 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:620 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:538 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:608 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:513 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:646 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:507 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:535 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:659 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:569 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:673 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:519 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:486 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:601 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:563 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:566 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:519 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:664 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:566 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:584 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:505 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:519 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:706 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:645 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 696, fault_cnt:614 -coverage: 94.881% pattern: 75 before: 146 now: 146 -checking valid circuit ... result: 1. diff --git a/exp_result/ATPG-LS_c3540.bench.txt b/exp_result/ATPG-LS_c3540.bench.txt deleted file mode 100644 index 7a87ab6..0000000 --- a/exp_result/ATPG-LS_c3540.bench.txt +++ /dev/null @@ -1,1312 +0,0 @@ -make: 'atpg' is up to date. -======================== -parsing file ./benchmark/c3540.bench ... Done. -====== Circuit Statistics ====== -PI: 50 -PO: 22 -Gate: 1719 -Stem: 605 -Level: 14 -================================ -[SOL] flip: 0, stem: 0, fault:7212. flip_cnt: 0, stem_cnt: 605, fault_cnt:384 -coverage: 11.169% pattern: 1 before: 3438 now: 3054 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:6802. flip_cnt: 0, stem_cnt: 605, fault_cnt:474 -coverage: 21.582% pattern: 2 before: 3054 now: 2696 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:4900. flip_cnt: 0, stem_cnt: 605, fault_cnt:409 -coverage: 29.145% pattern: 3 before: 2696 now: 2436 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:3097. flip_cnt: 0, stem_cnt: 605, fault_cnt:348 -coverage: 33.973% pattern: 4 before: 2436 now: 2270 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:3420. flip_cnt: 0, stem_cnt: 605, fault_cnt:414 -coverage: 39.209% pattern: 5 before: 2270 now: 2090 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:2812. flip_cnt: 0, stem_cnt: 605, fault_cnt:376 -coverage: 43.514% pattern: 6 before: 2090 now: 1942 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:1577. flip_cnt: 0, stem_cnt: 605, fault_cnt:383 -coverage: 45.928% pattern: 7 before: 1942 now: 1859 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:3230. flip_cnt: 0, stem_cnt: 605, fault_cnt:589 -coverage: 50.873% pattern: 8 before: 1859 now: 1689 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:1178. flip_cnt: 0, stem_cnt: 605, fault_cnt:360 -coverage: 52.676% pattern: 9 before: 1689 now: 1627 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:190. flip_cnt: 0, stem_cnt: 605, fault_cnt:163 -coverage: 52.967% pattern: 10 before: 1627 now: 1617 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:2052. flip_cnt: 0, stem_cnt: 605, fault_cnt:557 -coverage: 56.108% pattern: 11 before: 1617 now: 1509 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:608. flip_cnt: 0, stem_cnt: 605, fault_cnt:462 -coverage: 57.039% pattern: 12 before: 1509 now: 1477 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:1045. flip_cnt: 0, stem_cnt: 605, fault_cnt:496 -coverage: 58.639% pattern: 13 before: 1477 now: 1422 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:1349. flip_cnt: 0, stem_cnt: 605, fault_cnt:569 -coverage: 60.704% pattern: 14 before: 1422 now: 1351 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:646. flip_cnt: 0, stem_cnt: 605, fault_cnt:336 -coverage: 61.693% pattern: 15 before: 1351 now: 1317 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:893. flip_cnt: 0, stem_cnt: 605, fault_cnt:571 -coverage: 63.060% pattern: 16 before: 1317 now: 1270 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:646. flip_cnt: 0, stem_cnt: 605, fault_cnt:513 -coverage: 64.049% pattern: 17 before: 1270 now: 1236 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:323. flip_cnt: 0, stem_cnt: 605, fault_cnt:452 -coverage: 64.543% pattern: 18 before: 1236 now: 1219 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 605, fault_cnt:499 -coverage: 64.660% pattern: 19 before: 1219 now: 1215 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:722. flip_cnt: 0, stem_cnt: 605, fault_cnt:482 -coverage: 65.765% pattern: 20 before: 1215 now: 1177 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:665. flip_cnt: 0, stem_cnt: 605, fault_cnt:421 -coverage: 66.783% pattern: 21 before: 1177 now: 1142 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:494. flip_cnt: 0, stem_cnt: 605, fault_cnt:479 -coverage: 67.539% pattern: 22 before: 1142 now: 1116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:627. flip_cnt: 0, stem_cnt: 605, fault_cnt:438 -coverage: 68.499% pattern: 23 before: 1116 now: 1083 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:608. flip_cnt: 0, stem_cnt: 605, fault_cnt:419 -coverage: 69.430% pattern: 24 before: 1083 now: 1051 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:152. flip_cnt: 0, stem_cnt: 605, fault_cnt:515 -coverage: 69.663% pattern: 25 before: 1051 now: 1043 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:1938. flip_cnt: 0, stem_cnt: 605, fault_cnt:636 -coverage: 72.629% pattern: 26 before: 1043 now: 941 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 605, fault_cnt:294 -coverage: 72.717% pattern: 27 before: 941 now: 938 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:361. flip_cnt: 0, stem_cnt: 605, fault_cnt:487 -coverage: 73.269% pattern: 28 before: 938 now: 919 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:722. flip_cnt: 0, stem_cnt: 605, fault_cnt:607 -coverage: 74.375% pattern: 29 before: 919 now: 881 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 605, fault_cnt:504 -coverage: 74.520% pattern: 30 before: 881 now: 876 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:133. flip_cnt: 0, stem_cnt: 605, fault_cnt:506 -coverage: 74.724% pattern: 31 before: 876 now: 869 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:114. flip_cnt: 0, stem_cnt: 605, fault_cnt:383 -coverage: 74.898% pattern: 32 before: 869 now: 863 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 605, fault_cnt:558 -coverage: 74.927% pattern: 33 before: 863 now: 862 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:382 -coverage: 74.927% pattern: 33 before: 862 now: 862 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:475 -coverage: 74.927% pattern: 33 before: 862 now: 862 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:1302. flip_cnt: 0, stem_cnt: 605, fault_cnt:472 -coverage: 76.934% pattern: 34 before: 862 now: 793 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:429 -coverage: 76.934% pattern: 34 before: 793 now: 793 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:418. flip_cnt: 0, stem_cnt: 605, fault_cnt:445 -coverage: 77.574% pattern: 35 before: 793 now: 771 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:228. flip_cnt: 0, stem_cnt: 605, fault_cnt:441 -coverage: 77.923% pattern: 36 before: 771 now: 759 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 605, fault_cnt:212 -coverage: 77.952% pattern: 37 before: 759 now: 758 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:304. flip_cnt: 0, stem_cnt: 605, fault_cnt:531 -coverage: 78.418% pattern: 38 before: 758 now: 742 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:304. flip_cnt: 0, stem_cnt: 605, fault_cnt:482 -coverage: 78.883% pattern: 39 before: 742 now: 726 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 605, fault_cnt:540 -coverage: 78.999% pattern: 40 before: 726 now: 722 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:523 -coverage: 78.999% pattern: 40 before: 722 now: 722 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:266. flip_cnt: 0, stem_cnt: 605, fault_cnt:463 -coverage: 79.407% pattern: 41 before: 722 now: 708 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:361. flip_cnt: 0, stem_cnt: 605, fault_cnt:474 -coverage: 79.959% pattern: 42 before: 708 now: 689 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:488 -coverage: 79.959% pattern: 42 before: 689 now: 689 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:269 -coverage: 79.959% pattern: 42 before: 689 now: 689 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 605, fault_cnt:582 -coverage: 80.076% pattern: 43 before: 689 now: 685 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:133. flip_cnt: 0, stem_cnt: 605, fault_cnt:329 -coverage: 80.279% pattern: 44 before: 685 now: 678 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:627. flip_cnt: 0, stem_cnt: 605, fault_cnt:606 -coverage: 81.239% pattern: 45 before: 678 now: 645 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:209. flip_cnt: 0, stem_cnt: 605, fault_cnt:390 -coverage: 81.559% pattern: 46 before: 645 now: 634 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 605, fault_cnt:403 -coverage: 81.646% pattern: 47 before: 634 now: 631 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:470 -coverage: 81.646% pattern: 47 before: 631 now: 631 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:304. flip_cnt: 0, stem_cnt: 605, fault_cnt:539 -coverage: 82.112% pattern: 48 before: 631 now: 615 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:502 -coverage: 82.112% pattern: 48 before: 615 now: 615 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:247. flip_cnt: 0, stem_cnt: 605, fault_cnt:489 -coverage: 82.490% pattern: 49 before: 615 now: 602 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:228. flip_cnt: 0, stem_cnt: 605, fault_cnt:463 -coverage: 82.839% pattern: 50 before: 602 now: 590 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 605, fault_cnt:381 -coverage: 82.868% pattern: 51 before: 590 now: 589 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:497 -coverage: 82.868% pattern: 51 before: 589 now: 589 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:536 -coverage: 82.868% pattern: 51 before: 589 now: 589 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:477 -coverage: 82.868% pattern: 51 before: 589 now: 589 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:505 -coverage: 82.868% pattern: 51 before: 589 now: 589 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:190. flip_cnt: 0, stem_cnt: 605, fault_cnt:410 -coverage: 83.159% pattern: 52 before: 589 now: 579 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:380. flip_cnt: 0, stem_cnt: 605, fault_cnt:573 -coverage: 83.741% pattern: 53 before: 579 now: 559 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:495 -coverage: 83.741% pattern: 53 before: 559 now: 559 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 605, fault_cnt:620 -coverage: 83.857% pattern: 54 before: 559 now: 555 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:393 -coverage: 83.857% pattern: 54 before: 555 now: 555 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 605, fault_cnt:441 -coverage: 83.915% pattern: 55 before: 555 now: 553 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:152. flip_cnt: 0, stem_cnt: 605, fault_cnt:573 -coverage: 84.148% pattern: 56 before: 553 now: 545 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 605, fault_cnt:261 -coverage: 84.177% pattern: 57 before: 545 now: 544 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:361. flip_cnt: 0, stem_cnt: 605, fault_cnt:527 -coverage: 84.729% pattern: 58 before: 544 now: 525 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 605, fault_cnt:300 -coverage: 84.759% pattern: 59 before: 525 now: 524 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:566 -coverage: 84.759% pattern: 59 before: 524 now: 524 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:571 -coverage: 84.759% pattern: 59 before: 524 now: 524 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 605, fault_cnt:357 -coverage: 84.846% pattern: 60 before: 524 now: 521 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:511 -coverage: 84.846% pattern: 60 before: 521 now: 521 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:506 -coverage: 84.846% pattern: 60 before: 521 now: 521 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:588 -coverage: 84.846% pattern: 60 before: 521 now: 521 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:528 -coverage: 84.846% pattern: 60 before: 521 now: 521 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:567 -coverage: 84.846% pattern: 60 before: 521 now: 521 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 605, fault_cnt:454 -coverage: 84.875% pattern: 61 before: 521 now: 520 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 605, fault_cnt:474 -coverage: 84.991% pattern: 62 before: 520 now: 516 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 605, fault_cnt:530 -coverage: 85.020% pattern: 63 before: 516 now: 515 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:512 -coverage: 85.020% pattern: 63 before: 515 now: 515 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:393 -coverage: 85.020% pattern: 63 before: 515 now: 515 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:190. flip_cnt: 0, stem_cnt: 605, fault_cnt:496 -coverage: 85.311% pattern: 64 before: 515 now: 505 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 605, fault_cnt:596 -coverage: 85.340% pattern: 65 before: 505 now: 504 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:518 -coverage: 85.340% pattern: 65 before: 504 now: 504 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 605, fault_cnt:461 -coverage: 85.369% pattern: 66 before: 504 now: 503 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 605, fault_cnt:468 -coverage: 85.515% pattern: 67 before: 503 now: 498 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 605, fault_cnt:431 -coverage: 85.573% pattern: 68 before: 498 now: 496 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:133. flip_cnt: 0, stem_cnt: 605, fault_cnt:440 -coverage: 85.777% pattern: 69 before: 496 now: 489 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 605, fault_cnt:655 -coverage: 85.864% pattern: 70 before: 489 now: 486 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:468 -coverage: 85.864% pattern: 70 before: 486 now: 486 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:380. flip_cnt: 0, stem_cnt: 605, fault_cnt:487 -coverage: 86.446% pattern: 71 before: 486 now: 466 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:341 -coverage: 86.446% pattern: 71 before: 466 now: 466 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:361. flip_cnt: 0, stem_cnt: 605, fault_cnt:420 -coverage: 86.998% pattern: 72 before: 466 now: 447 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 605, fault_cnt:510 -coverage: 87.056% pattern: 73 before: 447 now: 445 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:509 -coverage: 87.056% pattern: 73 before: 445 now: 445 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 605, fault_cnt:442 -coverage: 87.086% pattern: 74 before: 445 now: 444 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:339 -coverage: 87.086% pattern: 74 before: 444 now: 444 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:468 -coverage: 87.086% pattern: 74 before: 444 now: 444 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:261 -coverage: 87.086% pattern: 74 before: 444 now: 444 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:492 -coverage: 87.086% pattern: 74 before: 444 now: 444 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:499 -coverage: 87.086% pattern: 74 before: 444 now: 444 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:530 -coverage: 87.086% pattern: 74 before: 444 now: 444 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:516 -coverage: 87.086% pattern: 74 before: 444 now: 444 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 605, fault_cnt:533 -coverage: 87.202% pattern: 75 before: 444 now: 440 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 605, fault_cnt:607 -coverage: 87.260% pattern: 76 before: 440 now: 438 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 605, fault_cnt:391 -coverage: 87.318% pattern: 77 before: 438 now: 436 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 605, fault_cnt:418 -coverage: 87.376% pattern: 78 before: 436 now: 434 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:494 -coverage: 87.376% pattern: 78 before: 434 now: 434 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 605, fault_cnt:357 -coverage: 87.405% pattern: 79 before: 434 now: 433 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 605, fault_cnt:424 -coverage: 87.435% pattern: 80 before: 433 now: 432 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:546 -coverage: 87.435% pattern: 80 before: 432 now: 432 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 605, fault_cnt:371 -coverage: 87.464% pattern: 81 before: 432 now: 431 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:311 -coverage: 87.464% pattern: 81 before: 431 now: 431 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 605, fault_cnt:426 -coverage: 87.493% pattern: 82 before: 431 now: 430 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 605, fault_cnt:435 -coverage: 87.551% pattern: 83 before: 430 now: 428 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:525 -coverage: 87.551% pattern: 83 before: 428 now: 428 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 605, fault_cnt:401 -coverage: 87.696% pattern: 84 before: 428 now: 423 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:547 -coverage: 87.696% pattern: 84 before: 423 now: 423 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 605, fault_cnt:358 -coverage: 87.725% pattern: 85 before: 423 now: 422 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:403 -coverage: 87.725% pattern: 85 before: 422 now: 422 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:512 -coverage: 87.725% pattern: 85 before: 422 now: 422 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:412 -coverage: 87.725% pattern: 85 before: 422 now: 422 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 605, fault_cnt:381 -coverage: 87.842% pattern: 86 before: 422 now: 418 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 605, fault_cnt:435 -coverage: 87.900% pattern: 87 before: 418 now: 416 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:507 -coverage: 87.900% pattern: 87 before: 416 now: 416 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:540 -coverage: 87.900% pattern: 87 before: 416 now: 416 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:557 -coverage: 87.900% pattern: 87 before: 416 now: 416 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:208 -coverage: 87.900% pattern: 87 before: 416 now: 416 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 605, fault_cnt:460 -coverage: 87.958% pattern: 88 before: 416 now: 414 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:534 -coverage: 87.958% pattern: 88 before: 414 now: 414 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:331 -coverage: 87.958% pattern: 88 before: 414 now: 414 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:171. flip_cnt: 0, stem_cnt: 605, fault_cnt:610 -coverage: 88.220% pattern: 89 before: 414 now: 405 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:395 -coverage: 88.220% pattern: 89 before: 405 now: 405 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:490 -coverage: 88.220% pattern: 89 before: 405 now: 405 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:466 -coverage: 88.220% pattern: 89 before: 405 now: 405 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:525 -coverage: 88.220% pattern: 89 before: 405 now: 405 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:411 -coverage: 88.220% pattern: 89 before: 405 now: 405 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 605, fault_cnt:488 -coverage: 88.278% pattern: 90 before: 405 now: 403 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:508 -coverage: 88.278% pattern: 90 before: 403 now: 403 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:369 -coverage: 88.278% pattern: 90 before: 403 now: 403 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:508 -coverage: 88.278% pattern: 90 before: 403 now: 403 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:474 -coverage: 88.278% pattern: 90 before: 403 now: 403 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:401 -coverage: 88.278% pattern: 90 before: 403 now: 403 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:464 -coverage: 88.278% pattern: 90 before: 403 now: 403 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:541 -coverage: 88.278% pattern: 90 before: 403 now: 403 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:514 -coverage: 88.278% pattern: 90 before: 403 now: 403 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:380 -coverage: 88.278% pattern: 90 before: 403 now: 403 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:401 -coverage: 88.278% pattern: 90 before: 403 now: 403 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 605, fault_cnt:411 -coverage: 88.307% pattern: 91 before: 403 now: 402 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:407 -coverage: 88.307% pattern: 91 before: 402 now: 402 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 605, fault_cnt:408 -coverage: 88.365% pattern: 92 before: 402 now: 400 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:531 -coverage: 88.365% pattern: 92 before: 400 now: 400 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 605, fault_cnt:561 -coverage: 88.424% pattern: 93 before: 400 now: 398 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 605, fault_cnt:389 -coverage: 88.540% pattern: 94 before: 398 now: 394 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:433 -coverage: 88.540% pattern: 94 before: 394 now: 394 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 605, fault_cnt:424 -coverage: 88.685% pattern: 95 before: 394 now: 389 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:504 -coverage: 88.685% pattern: 95 before: 389 now: 389 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:372 -coverage: 88.685% pattern: 95 before: 389 now: 389 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:506 -coverage: 88.685% pattern: 95 before: 389 now: 389 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:574 -coverage: 88.685% pattern: 95 before: 389 now: 389 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:460 -coverage: 88.685% pattern: 95 before: 389 now: 389 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:349 -coverage: 88.685% pattern: 95 before: 389 now: 389 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:277 -coverage: 88.685% pattern: 95 before: 389 now: 389 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:190. flip_cnt: 0, stem_cnt: 605, fault_cnt:377 -coverage: 88.976% pattern: 96 before: 389 now: 379 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:491 -coverage: 88.976% pattern: 96 before: 379 now: 379 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:531 -coverage: 88.976% pattern: 96 before: 379 now: 379 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:327 -coverage: 88.976% pattern: 96 before: 379 now: 379 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:512 -coverage: 88.976% pattern: 96 before: 379 now: 379 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:484 -coverage: 88.976% pattern: 96 before: 379 now: 379 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:442 -coverage: 88.976% pattern: 96 before: 379 now: 379 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:402 -coverage: 88.976% pattern: 96 before: 379 now: 379 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:488 -coverage: 88.976% pattern: 96 before: 379 now: 379 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:349 -coverage: 88.976% pattern: 96 before: 379 now: 379 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:507 -coverage: 88.976% pattern: 96 before: 379 now: 379 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:220 -coverage: 88.976% pattern: 96 before: 379 now: 379 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:451 -coverage: 88.976% pattern: 96 before: 379 now: 379 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:330 -coverage: 88.976% pattern: 96 before: 379 now: 379 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:487 -coverage: 88.976% pattern: 96 before: 379 now: 379 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:442 -coverage: 88.976% pattern: 96 before: 379 now: 379 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:565 -coverage: 88.976% pattern: 96 before: 379 now: 379 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:376 -coverage: 88.976% pattern: 96 before: 379 now: 379 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:568 -coverage: 88.976% pattern: 96 before: 379 now: 379 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:426 -coverage: 88.976% pattern: 96 before: 379 now: 379 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 605, fault_cnt:465 -coverage: 89.005% pattern: 97 before: 379 now: 378 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:522 -coverage: 89.005% pattern: 97 before: 378 now: 378 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:543 -coverage: 89.005% pattern: 97 before: 378 now: 378 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 605, fault_cnt:403 -coverage: 89.092% pattern: 98 before: 378 now: 375 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:284 -coverage: 89.092% pattern: 98 before: 375 now: 375 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:427 -coverage: 89.092% pattern: 98 before: 375 now: 375 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 605, fault_cnt:440 -coverage: 89.151% pattern: 99 before: 375 now: 373 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:481 -coverage: 89.151% pattern: 99 before: 373 now: 373 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:228. flip_cnt: 0, stem_cnt: 605, fault_cnt:632 -coverage: 89.500% pattern: 100 before: 373 now: 361 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 605, fault_cnt:353 -coverage: 89.529% pattern: 101 before: 361 now: 360 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:470 -coverage: 89.529% pattern: 101 before: 360 now: 360 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:358 -coverage: 89.529% pattern: 101 before: 360 now: 360 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:423 -coverage: 89.529% pattern: 101 before: 360 now: 360 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 605, fault_cnt:516 -coverage: 89.645% pattern: 102 before: 360 now: 356 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:484 -coverage: 89.645% pattern: 102 before: 356 now: 356 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:508 -coverage: 89.645% pattern: 102 before: 356 now: 356 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:445 -coverage: 89.645% pattern: 102 before: 356 now: 356 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:484 -coverage: 89.645% pattern: 102 before: 356 now: 356 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:406 -coverage: 89.645% pattern: 102 before: 356 now: 356 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:301 -coverage: 89.645% pattern: 102 before: 356 now: 356 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:435 -coverage: 89.645% pattern: 102 before: 356 now: 356 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:555 -coverage: 89.645% pattern: 102 before: 356 now: 356 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:444 -coverage: 89.645% pattern: 102 before: 356 now: 356 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:283 -coverage: 89.645% pattern: 102 before: 356 now: 356 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:335 -coverage: 89.645% pattern: 102 before: 356 now: 356 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:503 -coverage: 89.645% pattern: 102 before: 356 now: 356 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:568 -coverage: 89.645% pattern: 102 before: 356 now: 356 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 605, fault_cnt:503 -coverage: 89.703% pattern: 103 before: 356 now: 354 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:499 -coverage: 89.703% pattern: 103 before: 354 now: 354 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:522 -coverage: 89.703% pattern: 103 before: 354 now: 354 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:480 -coverage: 89.703% pattern: 103 before: 354 now: 354 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 605, fault_cnt:387 -coverage: 89.820% pattern: 104 before: 354 now: 350 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:496 -coverage: 89.820% pattern: 104 before: 350 now: 350 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:461 -coverage: 89.820% pattern: 104 before: 350 now: 350 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 605, fault_cnt:577 -coverage: 89.849% pattern: 105 before: 350 now: 349 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:270 -coverage: 89.849% pattern: 105 before: 349 now: 349 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:479 -coverage: 89.849% pattern: 105 before: 349 now: 349 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:494 -coverage: 89.849% pattern: 105 before: 349 now: 349 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:544 -coverage: 89.849% pattern: 105 before: 349 now: 349 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:521 -coverage: 89.849% pattern: 105 before: 349 now: 349 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:369 -coverage: 89.849% pattern: 105 before: 349 now: 349 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:634 -coverage: 89.849% pattern: 105 before: 349 now: 349 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:480 -coverage: 89.849% pattern: 105 before: 349 now: 349 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:444 -coverage: 89.849% pattern: 105 before: 349 now: 349 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:463 -coverage: 89.849% pattern: 105 before: 349 now: 349 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:541 -coverage: 89.849% pattern: 105 before: 349 now: 349 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:573 -coverage: 89.849% pattern: 105 before: 349 now: 349 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:504 -coverage: 89.849% pattern: 105 before: 349 now: 349 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:560 -coverage: 89.849% pattern: 105 before: 349 now: 349 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:493 -coverage: 89.849% pattern: 105 before: 349 now: 349 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:370 -coverage: 89.849% pattern: 105 before: 349 now: 349 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:393 -coverage: 89.849% pattern: 105 before: 349 now: 349 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:396 -coverage: 89.849% pattern: 105 before: 349 now: 349 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 605, fault_cnt:439 -coverage: 89.965% pattern: 106 before: 349 now: 345 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:515 -coverage: 89.965% pattern: 106 before: 345 now: 345 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:471 -coverage: 89.965% pattern: 106 before: 345 now: 345 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 605, fault_cnt:496 -coverage: 90.081% pattern: 107 before: 345 now: 341 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:381 -coverage: 90.081% pattern: 107 before: 341 now: 341 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:528 -coverage: 90.081% pattern: 107 before: 341 now: 341 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:283 -coverage: 90.081% pattern: 107 before: 341 now: 341 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:537 -coverage: 90.081% pattern: 107 before: 341 now: 341 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:625 -coverage: 90.081% pattern: 107 before: 341 now: 341 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:581 -coverage: 90.081% pattern: 107 before: 341 now: 341 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:495 -coverage: 90.081% pattern: 107 before: 341 now: 341 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:456 -coverage: 90.081% pattern: 107 before: 341 now: 341 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:504 -coverage: 90.081% pattern: 107 before: 341 now: 341 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:486 -coverage: 90.081% pattern: 107 before: 341 now: 341 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:523 -coverage: 90.081% pattern: 107 before: 341 now: 341 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:457 -coverage: 90.081% pattern: 107 before: 341 now: 341 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:171. flip_cnt: 0, stem_cnt: 605, fault_cnt:420 -coverage: 90.343% pattern: 108 before: 341 now: 332 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:458 -coverage: 90.343% pattern: 108 before: 332 now: 332 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:418 -coverage: 90.343% pattern: 108 before: 332 now: 332 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:395 -coverage: 90.343% pattern: 108 before: 332 now: 332 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:470 -coverage: 90.343% pattern: 108 before: 332 now: 332 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:436 -coverage: 90.343% pattern: 108 before: 332 now: 332 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:453 -coverage: 90.343% pattern: 108 before: 332 now: 332 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:480 -coverage: 90.343% pattern: 108 before: 332 now: 332 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:432 -coverage: 90.343% pattern: 108 before: 332 now: 332 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:330 -coverage: 90.343% pattern: 108 before: 332 now: 332 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:477 -coverage: 90.343% pattern: 108 before: 332 now: 332 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:441 -coverage: 90.343% pattern: 108 before: 332 now: 332 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:493 -coverage: 90.343% pattern: 108 before: 332 now: 332 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:190. flip_cnt: 0, stem_cnt: 605, fault_cnt:386 -coverage: 90.634% pattern: 109 before: 332 now: 322 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:247. flip_cnt: 0, stem_cnt: 605, fault_cnt:490 -coverage: 91.012% pattern: 110 before: 322 now: 309 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:510 -coverage: 91.012% pattern: 110 before: 309 now: 309 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:451 -coverage: 91.012% pattern: 110 before: 309 now: 309 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:542 -coverage: 91.012% pattern: 110 before: 309 now: 309 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:464 -coverage: 91.012% pattern: 110 before: 309 now: 309 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:556 -coverage: 91.012% pattern: 110 before: 309 now: 309 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:468 -coverage: 91.012% pattern: 110 before: 309 now: 309 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:516 -coverage: 91.012% pattern: 110 before: 309 now: 309 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:276 -coverage: 91.012% pattern: 110 before: 309 now: 309 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:294 -coverage: 91.012% pattern: 110 before: 309 now: 309 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:441 -coverage: 91.012% pattern: 110 before: 309 now: 309 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:559 -coverage: 91.012% pattern: 110 before: 309 now: 309 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:365 -coverage: 91.012% pattern: 110 before: 309 now: 309 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:438 -coverage: 91.012% pattern: 110 before: 309 now: 309 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:407 -coverage: 91.012% pattern: 110 before: 309 now: 309 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:152. flip_cnt: 0, stem_cnt: 605, fault_cnt:417 -coverage: 91.245% pattern: 111 before: 309 now: 301 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:389 -coverage: 91.245% pattern: 111 before: 301 now: 301 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:483 -coverage: 91.245% pattern: 111 before: 301 now: 301 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:383 -coverage: 91.245% pattern: 111 before: 301 now: 301 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:533 -coverage: 91.245% pattern: 111 before: 301 now: 301 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:466 -coverage: 91.245% pattern: 111 before: 301 now: 301 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:255 -coverage: 91.245% pattern: 111 before: 301 now: 301 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:525 -coverage: 91.245% pattern: 111 before: 301 now: 301 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:363 -coverage: 91.245% pattern: 111 before: 301 now: 301 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:519 -coverage: 91.245% pattern: 111 before: 301 now: 301 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:323 -coverage: 91.245% pattern: 111 before: 301 now: 301 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:325 -coverage: 91.245% pattern: 111 before: 301 now: 301 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:445 -coverage: 91.245% pattern: 111 before: 301 now: 301 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:441 -coverage: 91.245% pattern: 111 before: 301 now: 301 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:504 -coverage: 91.245% pattern: 111 before: 301 now: 301 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:542 -coverage: 91.245% pattern: 111 before: 301 now: 301 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:333 -coverage: 91.245% pattern: 111 before: 301 now: 301 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:284 -coverage: 91.245% pattern: 111 before: 301 now: 301 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 605, fault_cnt:313 -coverage: 91.274% pattern: 112 before: 301 now: 300 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:533 -coverage: 91.274% pattern: 112 before: 300 now: 300 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 605, fault_cnt:456 -coverage: 91.332% pattern: 113 before: 300 now: 298 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:330 -coverage: 91.332% pattern: 113 before: 298 now: 298 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:495 -coverage: 91.332% pattern: 113 before: 298 now: 298 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:481 -coverage: 91.332% pattern: 113 before: 298 now: 298 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:600 -coverage: 91.332% pattern: 113 before: 298 now: 298 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:534 -coverage: 91.332% pattern: 113 before: 298 now: 298 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:486 -coverage: 91.332% pattern: 113 before: 298 now: 298 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:461 -coverage: 91.332% pattern: 113 before: 298 now: 298 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:266 -coverage: 91.332% pattern: 113 before: 298 now: 298 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:398 -coverage: 91.332% pattern: 113 before: 298 now: 298 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:565 -coverage: 91.332% pattern: 113 before: 298 now: 298 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:446 -coverage: 91.332% pattern: 113 before: 298 now: 298 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 605, fault_cnt:448 -coverage: 91.449% pattern: 114 before: 298 now: 294 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:521 -coverage: 91.449% pattern: 114 before: 294 now: 294 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 605, fault_cnt:372 -coverage: 91.536% pattern: 115 before: 294 now: 291 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:467 -coverage: 91.536% pattern: 115 before: 291 now: 291 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:511 -coverage: 91.536% pattern: 115 before: 291 now: 291 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:561 -coverage: 91.536% pattern: 115 before: 291 now: 291 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:327 -coverage: 91.536% pattern: 115 before: 291 now: 291 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:247. flip_cnt: 0, stem_cnt: 605, fault_cnt:260 -coverage: 91.914% pattern: 116 before: 291 now: 278 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:551 -coverage: 91.914% pattern: 116 before: 278 now: 278 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:333 -coverage: 91.914% pattern: 116 before: 278 now: 278 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:497 -coverage: 91.914% pattern: 116 before: 278 now: 278 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:481 -coverage: 91.914% pattern: 116 before: 278 now: 278 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:390 -coverage: 91.914% pattern: 116 before: 278 now: 278 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:432 -coverage: 91.914% pattern: 116 before: 278 now: 278 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:568 -coverage: 91.914% pattern: 116 before: 278 now: 278 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:482 -coverage: 91.914% pattern: 116 before: 278 now: 278 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:470 -coverage: 91.914% pattern: 116 before: 278 now: 278 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 605, fault_cnt:423 -coverage: 91.972% pattern: 117 before: 278 now: 276 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:475 -coverage: 91.972% pattern: 117 before: 276 now: 276 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:541 -coverage: 91.972% pattern: 117 before: 276 now: 276 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:569 -coverage: 91.972% pattern: 117 before: 276 now: 276 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:493 -coverage: 91.972% pattern: 117 before: 276 now: 276 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:490 -coverage: 91.972% pattern: 117 before: 276 now: 276 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:605 -coverage: 91.972% pattern: 117 before: 276 now: 276 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:493 -coverage: 91.972% pattern: 117 before: 276 now: 276 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 605, fault_cnt:451 -coverage: 92.118% pattern: 118 before: 276 now: 271 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 605, fault_cnt:482 -coverage: 92.147% pattern: 119 before: 271 now: 270 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:415 -coverage: 92.147% pattern: 119 before: 270 now: 270 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:575 -coverage: 92.147% pattern: 119 before: 270 now: 270 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:526 -coverage: 92.147% pattern: 119 before: 270 now: 270 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:241 -coverage: 92.147% pattern: 119 before: 270 now: 270 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:365 -coverage: 92.147% pattern: 119 before: 270 now: 270 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:509 -coverage: 92.147% pattern: 119 before: 270 now: 270 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:461 -coverage: 92.147% pattern: 119 before: 270 now: 270 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:521 -coverage: 92.147% pattern: 119 before: 270 now: 270 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 605, fault_cnt:391 -coverage: 92.292% pattern: 120 before: 270 now: 265 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 605, fault_cnt:538 -coverage: 92.350% pattern: 121 before: 265 now: 263 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:452 -coverage: 92.350% pattern: 121 before: 263 now: 263 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:530 -coverage: 92.350% pattern: 121 before: 263 now: 263 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:559 -coverage: 92.350% pattern: 121 before: 263 now: 263 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:534 -coverage: 92.350% pattern: 121 before: 263 now: 263 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:306 -coverage: 92.350% pattern: 121 before: 263 now: 263 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:246 -coverage: 92.350% pattern: 121 before: 263 now: 263 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:152 -coverage: 92.350% pattern: 121 before: 263 now: 263 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:550 -coverage: 92.350% pattern: 121 before: 263 now: 263 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:506 -coverage: 92.350% pattern: 121 before: 263 now: 263 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:501 -coverage: 92.350% pattern: 121 before: 263 now: 263 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:512 -coverage: 92.350% pattern: 121 before: 263 now: 263 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 605, fault_cnt:390 -coverage: 92.467% pattern: 122 before: 263 now: 259 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:490 -coverage: 92.467% pattern: 122 before: 259 now: 259 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:500 -coverage: 92.467% pattern: 122 before: 259 now: 259 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:499 -coverage: 92.467% pattern: 122 before: 259 now: 259 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:466 -coverage: 92.467% pattern: 122 before: 259 now: 259 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:476 -coverage: 92.467% pattern: 122 before: 259 now: 259 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:465 -coverage: 92.467% pattern: 122 before: 259 now: 259 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:498 -coverage: 92.467% pattern: 122 before: 259 now: 259 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:399 -coverage: 92.467% pattern: 122 before: 259 now: 259 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:514 -coverage: 92.467% pattern: 122 before: 259 now: 259 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:457 -coverage: 92.467% pattern: 122 before: 259 now: 259 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:556 -coverage: 92.467% pattern: 122 before: 259 now: 259 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:590 -coverage: 92.467% pattern: 122 before: 259 now: 259 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:348 -coverage: 92.467% pattern: 122 before: 259 now: 259 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:519 -coverage: 92.467% pattern: 122 before: 259 now: 259 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:440 -coverage: 92.467% pattern: 122 before: 259 now: 259 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:485 -coverage: 92.467% pattern: 122 before: 259 now: 259 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:324 -coverage: 92.467% pattern: 122 before: 259 now: 259 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:505 -coverage: 92.467% pattern: 122 before: 259 now: 259 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:525 -coverage: 92.467% pattern: 122 before: 259 now: 259 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 605, fault_cnt:469 -coverage: 92.583% pattern: 123 before: 259 now: 255 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:517 -coverage: 92.583% pattern: 123 before: 255 now: 255 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:540 -coverage: 92.583% pattern: 123 before: 255 now: 255 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:295 -coverage: 92.583% pattern: 123 before: 255 now: 255 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:312 -coverage: 92.583% pattern: 123 before: 255 now: 255 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:518 -coverage: 92.583% pattern: 123 before: 255 now: 255 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 605, fault_cnt:445 -coverage: 92.641% pattern: 124 before: 255 now: 253 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:507 -coverage: 92.641% pattern: 124 before: 253 now: 253 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:402 -coverage: 92.641% pattern: 124 before: 253 now: 253 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:511 -coverage: 92.641% pattern: 124 before: 253 now: 253 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:491 -coverage: 92.641% pattern: 124 before: 253 now: 253 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:406 -coverage: 92.641% pattern: 124 before: 253 now: 253 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:448 -coverage: 92.641% pattern: 124 before: 253 now: 253 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:338 -coverage: 92.641% pattern: 124 before: 253 now: 253 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:540 -coverage: 92.641% pattern: 124 before: 253 now: 253 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:526 -coverage: 92.641% pattern: 124 before: 253 now: 253 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:359 -coverage: 92.641% pattern: 124 before: 253 now: 253 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:524 -coverage: 92.641% pattern: 124 before: 253 now: 253 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:455 -coverage: 92.641% pattern: 124 before: 253 now: 253 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:295 -coverage: 92.641% pattern: 124 before: 253 now: 253 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:601 -coverage: 92.641% pattern: 124 before: 253 now: 253 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:529 -coverage: 92.641% pattern: 124 before: 253 now: 253 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:329 -coverage: 92.641% pattern: 124 before: 253 now: 253 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:423 -coverage: 92.641% pattern: 124 before: 253 now: 253 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:455 -coverage: 92.641% pattern: 124 before: 253 now: 253 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:480 -coverage: 92.641% pattern: 124 before: 253 now: 253 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:359 -coverage: 92.641% pattern: 124 before: 253 now: 253 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:493 -coverage: 92.641% pattern: 124 before: 253 now: 253 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:114. flip_cnt: 0, stem_cnt: 605, fault_cnt:516 -coverage: 92.816% pattern: 125 before: 253 now: 247 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:496 -coverage: 92.816% pattern: 125 before: 247 now: 247 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:509 -coverage: 92.816% pattern: 125 before: 247 now: 247 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:465 -coverage: 92.816% pattern: 125 before: 247 now: 247 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:522 -coverage: 92.816% pattern: 125 before: 247 now: 247 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:491 -coverage: 92.816% pattern: 125 before: 247 now: 247 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 605, fault_cnt:432 -coverage: 92.932% pattern: 126 before: 247 now: 243 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:530 -coverage: 92.932% pattern: 126 before: 243 now: 243 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:541 -coverage: 92.932% pattern: 126 before: 243 now: 243 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:526 -coverage: 92.932% pattern: 126 before: 243 now: 243 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:577 -coverage: 92.932% pattern: 126 before: 243 now: 243 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:389 -coverage: 92.932% pattern: 126 before: 243 now: 243 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:453 -coverage: 92.932% pattern: 126 before: 243 now: 243 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:454 -coverage: 92.932% pattern: 126 before: 243 now: 243 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:522 -coverage: 92.932% pattern: 126 before: 243 now: 243 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:512 -coverage: 92.932% pattern: 126 before: 243 now: 243 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:344 -coverage: 92.932% pattern: 126 before: 243 now: 243 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:313 -coverage: 92.932% pattern: 126 before: 243 now: 243 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:448 -coverage: 92.932% pattern: 126 before: 243 now: 243 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:565 -coverage: 92.932% pattern: 126 before: 243 now: 243 -checking valid circuit ... result: 1. diff --git a/exp_result/ATPG-LS_c432.bench.txt b/exp_result/ATPG-LS_c432.bench.txt deleted file mode 100644 index 237ee9a..0000000 --- a/exp_result/ATPG-LS_c432.bench.txt +++ /dev/null @@ -1,180163 +0,0 @@ -make: 'atpg' is up to date. -======================== -parsing file ./benchmark/c432.bench ... Done. -====== Circuit Statistics ====== -PI: 36 -PO: 7 -Gate: 196 -Stem: 96 -Level: 6 -================================ -[SOL] flip: 0, stem: 0, fault:460. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 11.735% pattern: 1 before: 392 now: 346 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:967. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 36.480% pattern: 2 before: 346 now: 249 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:532. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 43.622% pattern: 3 before: 249 now: 221 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:239. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 47.194% pattern: 4 before: 221 now: 207 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:37. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 49.235% pattern: 5 before: 207 now: 199 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:10. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 49.745% pattern: 6 before: 199 now: 197 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:494. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 56.378% pattern: 7 before: 197 now: 171 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:361. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 61.224% pattern: 8 before: 171 now: 152 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:170. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 68.622% pattern: 9 before: 152 now: 123 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 68.622% pattern: 9 before: 123 now: 123 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 68.622% pattern: 9 before: 123 now: 123 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:399. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 73.980% pattern: 10 before: 123 now: 102 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:341. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 78.827% pattern: 11 before: 102 now: 83 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:227. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 82.143% pattern: 12 before: 83 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:164. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 84.949% pattern: 13 before: 70 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:255. flip_cnt: 0, stem_cnt: 96, fault_cnt:108 -coverage: 90.561% pattern: 14 before: 59 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:33. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 91.071% pattern: 15 before: 37 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:148. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 94.133% pattern: 16 before: 35 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 94.388% pattern: 17 before: 23 now: 22 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:16. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 94.643% pattern: 18 before: 22 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 94.898% pattern: 19 before: 21 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 94.898% pattern: 19 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 94.898% pattern: 19 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 94.898% pattern: 19 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 95.663% pattern: 20 before: 20 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 95.663% pattern: 20 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 95.918% pattern: 21 before: 17 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 96.684% pattern: 22 before: 16 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 96.684% pattern: 22 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 96.939% pattern: 23 before: 13 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 97.959% pattern: 24 before: 12 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 98.469% pattern: 25 before: 8 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 98.469% pattern: 25 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 98.469% pattern: 25 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 98.469% pattern: 25 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 98.469% pattern: 25 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 98.724% pattern: 26 before: 6 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:1. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 98.980% pattern: 27 before: 5 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 4 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:108 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:101 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:112 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:108 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:110 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:119 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:108 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:111 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:121 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:113 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:119 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:114 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:114 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:113 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:109 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:110 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:110 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:110 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:109 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:120 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:113 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:112 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:101 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:113 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:108 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:120 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:112 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:113 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:101 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:101 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:120 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:108 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:108 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:112 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:119 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:113 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:113 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:113 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:108 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:108 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:113 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:124 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:112 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:123 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:114 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:121 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:113 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:112 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:108 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:112 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:119 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:111 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:108 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:114 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:114 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:110 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:114 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:110 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:108 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:121 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:114 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:113 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:120 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:108 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:112 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:108 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:108 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:121 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:108 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:101 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:113 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:109 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:109 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:108 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:101 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:120 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:101 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:101 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:119 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:114 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:119 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:111 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:114 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:120 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:119 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:109 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:113 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:109 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:121 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:108 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:101 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:109 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:119 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:111 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:112 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:108 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:110 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:120 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:108 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:114 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:111 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:111 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:112 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:114 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:111 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:120 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:114 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:108 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:101 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:114 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:110 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:113 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:101 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:101 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:114 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:121 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:108 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:114 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:111 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:108 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:108 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:119 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:113 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:114 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:113 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:108 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:120 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:108 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:114 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:122 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:112 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:114 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:101 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:108 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:113 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:111 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:109 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:119 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:101 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:120 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:111 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:122 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:121 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:101 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:101 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:101 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:114 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:109 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:119 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:101 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:110 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:114 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:114 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:114 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:121 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:108 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:101 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:112 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:101 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:110 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:101 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:120 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:121 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:120 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:120 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:111 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:119 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:121 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:120 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:113 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:101 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:109 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:123 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:112 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:122 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:109 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:109 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:112 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:119 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:112 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:111 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:119 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:112 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:108 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:110 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:108 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:112 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:110 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:112 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:109 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:111 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:114 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:113 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:114 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:120 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:114 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:114 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:101 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:114 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:114 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:114 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:101 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:101 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:108 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:119 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:114 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:119 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:110 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:101 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:114 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:125 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:112 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:111 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:112 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:110 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:101 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:113 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:101 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:109 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:101 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:101 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:101 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:110 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:111 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:108 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:114 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:119 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:111 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:112 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:114 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:119 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:108 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:111 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:110 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:110 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:119 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:109 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:119 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:113 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:113 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:108 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:122 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:108 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:101 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:119 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:110 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:111 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:110 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:109 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:111 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:101 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:114 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:109 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:114 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:108 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:111 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:101 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:119 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:113 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:121 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:111 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:124 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:114 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:112 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:111 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:113 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:109 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:109 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:114 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:113 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:111 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:109 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:111 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:112 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:113 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:119 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:114 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:120 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:113 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:120 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:120 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:111 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:113 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:108 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:111 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:120 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:101 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:101 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:111 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:122 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:114 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:121 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:110 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:123 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:109 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:108 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:110 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:120 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:114 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:108 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:110 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:101 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:109 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:119 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:113 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:111 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:112 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:120 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:120 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:101 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:108 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:112 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:112 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:119 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:113 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:109 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:109 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:120 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:101 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:113 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:112 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:110 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:101 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:114 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:108 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:112 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:114 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:123 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:123 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:111 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:114 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:114 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:101 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:101 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:111 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:108 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:120 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:101 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:119 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:113 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:121 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:114 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:109 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:109 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:112 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:101 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:108 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:101 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:113 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:111 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:109 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:120 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:109 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:112 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:114 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:101 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:122 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:108 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:108 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:111 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:101 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:112 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:120 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:114 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:113 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:112 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:111 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:114 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:108 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:109 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:120 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:125 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:111 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:123 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:113 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:108 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:112 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:101 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:108 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:114 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:109 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:119 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:113 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:113 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:114 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:114 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:101 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:111 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:110 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:121 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:112 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:119 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:111 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:114 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:119 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:111 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:110 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:114 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:119 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:113 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:122 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:119 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:122 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:101 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:120 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:109 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:111 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:111 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:113 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:101 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:114 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:113 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:112 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:111 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:109 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:109 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:110 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:114 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:101 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:112 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:112 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:110 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:108 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:120 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:113 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:112 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:113 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:120 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:111 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:101 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:114 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:109 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:108 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:108 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:112 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:111 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:120 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:101 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:121 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:108 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:117 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:113 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:114 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:109 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:101 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:101 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:101 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:103 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:111 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:110 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:121 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:94 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:110 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:99 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:111 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:115 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:101 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:106 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:119 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:110 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:101 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:89 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:118 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:110 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:98 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:100 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:22 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:26 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:114 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:97 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:96 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:71 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:102 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:76 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:111 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:104 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:110 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:77 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:95 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:110 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:24 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:73 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:32 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:30 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:87 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:48 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:107 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:91 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:40 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:93 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:53 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:83 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:86 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:33 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:44 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:29 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:61 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:105 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:90 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:43 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:36 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:66 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:82 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:31 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:42 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:72 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:50 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:81 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:114 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:34 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:75 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:69 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:59 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:85 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:88 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:56 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:57 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:79 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:54 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:28 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:63 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:58 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:65 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:116 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:49 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:74 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:47 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:41 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:70 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:35 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:62 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:67 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:39 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:37 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:92 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:55 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:52 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:68 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:60 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:64 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:84 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:120 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:51 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:46 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:80 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:21 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:38 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:27 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:78 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:45 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 96, fault_cnt:25 -coverage: 99.235% pattern: 28 before: 3 now: 3 -checking valid circuit ... result: 1. diff --git a/exp_result/ATPG-LS_c499.bench.txt b/exp_result/ATPG-LS_c499.bench.txt deleted file mode 100644 index b301b8d..0000000 --- a/exp_result/ATPG-LS_c499.bench.txt +++ /dev/null @@ -1,7481 +0,0 @@ -make: 'atpg' is up to date. -======================== -parsing file ./benchmark/c499.bench ... Done. -====== Circuit Statistics ====== -PI: 41 -PO: 32 -Gate: 243 -Stem: 99 -Level: 5 -================================ -[SOL] flip: 0, stem: 0, fault:1004. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 21.399% pattern: 1 before: 486 now: 382 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:432. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 31.687% pattern: 2 before: 382 now: 332 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:82. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 33.745% pattern: 3 before: 332 now: 322 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:582. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 40.947% pattern: 4 before: 322 now: 287 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 41.975% pattern: 5 before: 287 now: 282 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 41.975% pattern: 5 before: 282 now: 282 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 41.975% pattern: 5 before: 282 now: 282 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:405. flip_cnt: 0, stem_cnt: 99, fault_cnt:139 -coverage: 47.942% pattern: 6 before: 282 now: 253 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 47.942% pattern: 6 before: 253 now: 253 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:371. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 56.173% pattern: 7 before: 253 now: 213 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 56.173% pattern: 7 before: 213 now: 213 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:646. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 63.169% pattern: 8 before: 213 now: 179 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:346. flip_cnt: 0, stem_cnt: 99, fault_cnt:200 -coverage: 71.193% pattern: 9 before: 179 now: 140 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:51. flip_cnt: 0, stem_cnt: 99, fault_cnt:134 -coverage: 72.016% pattern: 10 before: 140 now: 136 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 72.016% pattern: 10 before: 136 now: 136 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 72.016% pattern: 10 before: 136 now: 136 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 72.016% pattern: 10 before: 136 now: 136 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 72.016% pattern: 10 before: 136 now: 136 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 72.016% pattern: 10 before: 136 now: 136 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:40. flip_cnt: 0, stem_cnt: 99, fault_cnt:134 -coverage: 72.634% pattern: 11 before: 136 now: 133 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:104. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 74.074% pattern: 12 before: 133 now: 126 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 74.074% pattern: 12 before: 126 now: 126 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 74.074% pattern: 12 before: 126 now: 126 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:2. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 74.280% pattern: 13 before: 126 now: 125 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:4. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 74.691% pattern: 14 before: 125 now: 123 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 74.691% pattern: 14 before: 123 now: 123 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:133. flip_cnt: 0, stem_cnt: 99, fault_cnt:139 -coverage: 76.132% pattern: 15 before: 123 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 76.543% pattern: 16 before: 116 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 76.543% pattern: 16 before: 114 now: 114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:107. flip_cnt: 0, stem_cnt: 99, fault_cnt:200 -coverage: 79.218% pattern: 17 before: 114 now: 101 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 79.218% pattern: 17 before: 101 now: 101 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 79.218% pattern: 17 before: 101 now: 101 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:155. flip_cnt: 0, stem_cnt: 99, fault_cnt:200 -coverage: 81.070% pattern: 18 before: 101 now: 92 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:66. flip_cnt: 0, stem_cnt: 99, fault_cnt:169 -coverage: 81.893% pattern: 19 before: 92 now: 88 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 81.893% pattern: 19 before: 88 now: 88 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 81.893% pattern: 19 before: 88 now: 88 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 82.305% pattern: 20 before: 88 now: 86 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:139 -coverage: 82.305% pattern: 20 before: 86 now: 86 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 99, fault_cnt:134 -coverage: 82.716% pattern: 21 before: 86 now: 84 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:28. flip_cnt: 0, stem_cnt: 99, fault_cnt:132 -coverage: 83.128% pattern: 22 before: 84 now: 82 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 83.128% pattern: 22 before: 82 now: 82 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 83.128% pattern: 22 before: 82 now: 82 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 83.128% pattern: 22 before: 82 now: 82 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 83.539% pattern: 23 before: 82 now: 80 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 83.539% pattern: 23 before: 80 now: 80 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 83.539% pattern: 23 before: 80 now: 80 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:132 -coverage: 83.539% pattern: 23 before: 80 now: 80 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 83.539% pattern: 23 before: 80 now: 80 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 83.539% pattern: 23 before: 80 now: 80 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 83.539% pattern: 23 before: 80 now: 80 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 99, fault_cnt:169 -coverage: 84.362% pattern: 24 before: 80 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 84.362% pattern: 24 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 84.774% pattern: 25 before: 76 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 84.774% pattern: 25 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 84.774% pattern: 25 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 84.774% pattern: 25 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 84.774% pattern: 25 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 84.774% pattern: 25 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 84.774% pattern: 25 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 84.774% pattern: 25 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 84.774% pattern: 25 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 84.774% pattern: 25 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:138 -coverage: 84.774% pattern: 25 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 84.774% pattern: 25 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 85.185% pattern: 26 before: 74 now: 72 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 85.185% pattern: 26 before: 72 now: 72 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 85.185% pattern: 26 before: 72 now: 72 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 85.185% pattern: 26 before: 72 now: 72 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 85.185% pattern: 26 before: 72 now: 72 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 85.185% pattern: 26 before: 72 now: 72 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 85.185% pattern: 26 before: 72 now: 72 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:160 -coverage: 85.185% pattern: 26 before: 72 now: 72 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 85.185% pattern: 26 before: 72 now: 72 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 85.597% pattern: 27 before: 72 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 85.597% pattern: 27 before: 70 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 85.597% pattern: 27 before: 70 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 86.008% pattern: 28 before: 70 now: 68 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 86.008% pattern: 28 before: 68 now: 68 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 86.008% pattern: 28 before: 68 now: 68 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 86.008% pattern: 28 before: 68 now: 68 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:126. flip_cnt: 0, stem_cnt: 99, fault_cnt:192 -coverage: 87.654% pattern: 29 before: 68 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 87.654% pattern: 29 before: 60 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 99, fault_cnt:134 -coverage: 88.066% pattern: 30 before: 60 now: 58 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 88.066% pattern: 30 before: 58 now: 58 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 88.066% pattern: 30 before: 58 now: 58 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 88.066% pattern: 30 before: 58 now: 58 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 88.066% pattern: 30 before: 58 now: 58 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 88.066% pattern: 30 before: 58 now: 58 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 88.066% pattern: 30 before: 58 now: 58 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 88.066% pattern: 30 before: 58 now: 58 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 88.066% pattern: 30 before: 58 now: 58 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 88.066% pattern: 30 before: 58 now: 58 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 88.066% pattern: 30 before: 58 now: 58 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 88.066% pattern: 30 before: 58 now: 58 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 88.066% pattern: 30 before: 58 now: 58 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 88.066% pattern: 30 before: 58 now: 58 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 88.066% pattern: 30 before: 58 now: 58 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 88.066% pattern: 30 before: 58 now: 58 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:100. flip_cnt: 0, stem_cnt: 99, fault_cnt:200 -coverage: 89.712% pattern: 31 before: 58 now: 50 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 89.712% pattern: 31 before: 50 now: 50 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 89.712% pattern: 31 before: 50 now: 50 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:91. flip_cnt: 0, stem_cnt: 99, fault_cnt:192 -coverage: 90.741% pattern: 32 before: 50 now: 45 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:136. flip_cnt: 0, stem_cnt: 99, fault_cnt:200 -coverage: 92.387% pattern: 33 before: 45 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:169 -coverage: 92.387% pattern: 33 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:200 -coverage: 92.387% pattern: 33 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 92.387% pattern: 33 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 92.387% pattern: 33 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:138 -coverage: 92.387% pattern: 33 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:137 -coverage: 92.387% pattern: 33 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 92.387% pattern: 33 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:134 -coverage: 92.387% pattern: 33 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 92.387% pattern: 33 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 92.387% pattern: 33 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 92.387% pattern: 33 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:134 -coverage: 92.387% pattern: 33 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 92.387% pattern: 33 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 92.387% pattern: 33 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 92.387% pattern: 33 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:192 -coverage: 92.387% pattern: 33 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 92.387% pattern: 33 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 92.387% pattern: 33 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 92.387% pattern: 33 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 92.387% pattern: 33 before: 37 now: 37 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 99, fault_cnt:169 -coverage: 92.798% pattern: 34 before: 37 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 92.798% pattern: 34 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 92.798% pattern: 34 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 92.798% pattern: 34 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 92.798% pattern: 34 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 92.798% pattern: 34 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:138 -coverage: 92.798% pattern: 34 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:156 -coverage: 92.798% pattern: 34 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 92.798% pattern: 34 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 92.798% pattern: 34 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 92.798% pattern: 34 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 92.798% pattern: 34 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 92.798% pattern: 34 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 92.798% pattern: 34 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:138 -coverage: 92.798% pattern: 34 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 92.798% pattern: 34 before: 35 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 99, fault_cnt:192 -coverage: 93.827% pattern: 35 before: 35 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:134 -coverage: 93.827% pattern: 35 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 93.827% pattern: 35 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:137 -coverage: 93.827% pattern: 35 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 93.827% pattern: 35 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 93.827% pattern: 35 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 93.827% pattern: 35 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 93.827% pattern: 35 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 93.827% pattern: 35 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:132 -coverage: 93.827% pattern: 35 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 93.827% pattern: 35 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 93.827% pattern: 35 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 93.827% pattern: 35 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 93.827% pattern: 35 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 93.827% pattern: 35 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 93.827% pattern: 35 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 93.827% pattern: 35 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:137 -coverage: 93.827% pattern: 35 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:137 -coverage: 93.827% pattern: 35 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 93.827% pattern: 35 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 93.827% pattern: 35 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 93.827% pattern: 35 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 93.827% pattern: 35 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 93.827% pattern: 35 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 93.827% pattern: 35 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 93.827% pattern: 35 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 93.827% pattern: 35 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 93.827% pattern: 35 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 93.827% pattern: 35 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 93.827% pattern: 35 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 93.827% pattern: 35 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 93.827% pattern: 35 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 93.827% pattern: 35 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:138 -coverage: 93.827% pattern: 35 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 93.827% pattern: 35 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 93.827% pattern: 35 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 93.827% pattern: 35 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 93.827% pattern: 35 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 93.827% pattern: 35 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 93.827% pattern: 35 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 93.827% pattern: 35 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 93.827% pattern: 35 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 93.827% pattern: 35 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:132 -coverage: 93.827% pattern: 35 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 99, fault_cnt:200 -coverage: 94.033% pattern: 36 before: 30 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 94.033% pattern: 36 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 94.033% pattern: 36 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 99, fault_cnt:200 -coverage: 94.856% pattern: 37 before: 29 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 94.856% pattern: 37 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 94.856% pattern: 37 before: 25 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 99, fault_cnt:200 -coverage: 95.062% pattern: 38 before: 25 now: 24 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 95.062% pattern: 38 before: 24 now: 24 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 95.062% pattern: 38 before: 24 now: 24 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 95.062% pattern: 38 before: 24 now: 24 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 95.062% pattern: 38 before: 24 now: 24 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:96 -coverage: 95.062% pattern: 38 before: 24 now: 24 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 95.062% pattern: 38 before: 24 now: 24 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:132 -coverage: 95.062% pattern: 38 before: 24 now: 24 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 95.062% pattern: 38 before: 24 now: 24 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 95.062% pattern: 38 before: 24 now: 24 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 95.062% pattern: 38 before: 24 now: 24 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 95.062% pattern: 38 before: 24 now: 24 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 95.062% pattern: 38 before: 24 now: 24 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 95.062% pattern: 38 before: 24 now: 24 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 95.062% pattern: 38 before: 24 now: 24 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 95.062% pattern: 38 before: 24 now: 24 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 95.062% pattern: 38 before: 24 now: 24 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 95.062% pattern: 38 before: 24 now: 24 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 95.062% pattern: 38 before: 24 now: 24 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 95.062% pattern: 38 before: 24 now: 24 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:7. flip_cnt: 0, stem_cnt: 99, fault_cnt:200 -coverage: 95.267% pattern: 39 before: 24 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:200 -coverage: 95.267% pattern: 39 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 95.267% pattern: 39 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 95.267% pattern: 39 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 95.267% pattern: 39 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 95.267% pattern: 39 before: 23 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:16. flip_cnt: 0, stem_cnt: 99, fault_cnt:200 -coverage: 95.473% pattern: 40 before: 23 now: 22 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:192 -coverage: 95.473% pattern: 40 before: 22 now: 22 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 95.473% pattern: 40 before: 22 now: 22 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 95.473% pattern: 40 before: 22 now: 22 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 95.473% pattern: 40 before: 22 now: 22 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 95.473% pattern: 40 before: 22 now: 22 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 95.473% pattern: 40 before: 22 now: 22 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:200 -coverage: 95.473% pattern: 40 before: 22 now: 22 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 95.473% pattern: 40 before: 22 now: 22 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:62. flip_cnt: 0, stem_cnt: 99, fault_cnt:200 -coverage: 96.296% pattern: 41 before: 22 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 96.296% pattern: 41 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 96.296% pattern: 41 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 96.296% pattern: 41 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 96.296% pattern: 41 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 96.296% pattern: 41 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 96.296% pattern: 41 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 96.296% pattern: 41 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 96.296% pattern: 41 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 96.296% pattern: 41 before: 18 now: 18 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:17. flip_cnt: 0, stem_cnt: 99, fault_cnt:200 -coverage: 96.502% pattern: 42 before: 18 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:138 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:169 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:132 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:160 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:134 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:134 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:169 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:138 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:169 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:139 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:192 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:169 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:200 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:169 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 96.502% pattern: 42 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:18. flip_cnt: 0, stem_cnt: 99, fault_cnt:192 -coverage: 96.708% pattern: 43 before: 17 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 96.708% pattern: 43 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 96.708% pattern: 43 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 96.708% pattern: 43 before: 16 now: 16 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 99, fault_cnt:200 -coverage: 96.914% pattern: 44 before: 16 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 96.914% pattern: 44 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 96.914% pattern: 44 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:168 -coverage: 96.914% pattern: 44 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:134 -coverage: 96.914% pattern: 44 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 96.914% pattern: 44 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 96.914% pattern: 44 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 96.914% pattern: 44 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 96.914% pattern: 44 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 96.914% pattern: 44 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 96.914% pattern: 44 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 96.914% pattern: 44 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 96.914% pattern: 44 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 96.914% pattern: 44 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 96.914% pattern: 44 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 96.914% pattern: 44 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 96.914% pattern: 44 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 96.914% pattern: 44 before: 15 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:17. flip_cnt: 0, stem_cnt: 99, fault_cnt:192 -coverage: 97.119% pattern: 45 before: 15 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:134 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:132 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:132 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:138 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:168 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:134 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:138 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:169 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:200 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 97.119% pattern: 45 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:9. flip_cnt: 0, stem_cnt: 99, fault_cnt:200 -coverage: 97.325% pattern: 46 before: 14 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.325% pattern: 46 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.325% pattern: 46 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.325% pattern: 46 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.325% pattern: 46 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.325% pattern: 46 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:169 -coverage: 97.325% pattern: 46 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.325% pattern: 46 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:139 -coverage: 97.325% pattern: 46 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.325% pattern: 46 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 97.325% pattern: 46 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.325% pattern: 46 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.325% pattern: 46 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.325% pattern: 46 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.325% pattern: 46 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:134 -coverage: 97.325% pattern: 46 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 97.325% pattern: 46 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.325% pattern: 46 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.325% pattern: 46 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.325% pattern: 46 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.325% pattern: 46 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:169 -coverage: 97.325% pattern: 46 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.325% pattern: 46 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.325% pattern: 46 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.325% pattern: 46 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:134 -coverage: 97.325% pattern: 46 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.325% pattern: 46 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 97.325% pattern: 46 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:192 -coverage: 97.325% pattern: 46 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.325% pattern: 46 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 97.325% pattern: 46 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:200 -coverage: 97.325% pattern: 46 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.325% pattern: 46 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.325% pattern: 46 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:139 -coverage: 97.325% pattern: 46 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.325% pattern: 46 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.325% pattern: 46 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.325% pattern: 46 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.325% pattern: 46 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 97.325% pattern: 46 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:96 -coverage: 97.325% pattern: 46 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 97.325% pattern: 46 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.325% pattern: 46 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.325% pattern: 46 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:139 -coverage: 97.325% pattern: 46 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.325% pattern: 46 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 97.325% pattern: 46 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 97.325% pattern: 46 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.325% pattern: 46 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.325% pattern: 46 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 97.325% pattern: 46 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:17. flip_cnt: 0, stem_cnt: 99, fault_cnt:200 -coverage: 97.531% pattern: 47 before: 13 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:137 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:192 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:169 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:169 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:138 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:138 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:132 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:192 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:139 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:132 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:132 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:138 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:137 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:139 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:138 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:138 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:138 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:138 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:169 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:200 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:200 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:200 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:139 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:96 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:169 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:134 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:132 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:169 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:132 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:134 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:132 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:134 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:132 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:138 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:134 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:192 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:192 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:96 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 97.531% pattern: 47 before: 12 now: 12 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:14. flip_cnt: 0, stem_cnt: 99, fault_cnt:192 -coverage: 97.737% pattern: 48 before: 12 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:134 -coverage: 97.737% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 97.737% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.737% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.737% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 97.737% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.737% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 97.737% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.737% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 97.737% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.737% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.737% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 97.737% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.737% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.737% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.737% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.737% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.737% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.737% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.737% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.737% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:160 -coverage: 97.737% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 97.737% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 97.737% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 97.737% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 97.737% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.737% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:137 -coverage: 97.737% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 97.737% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.737% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.737% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.737% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.737% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 97.737% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:134 -coverage: 97.737% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 97.737% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.737% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 97.737% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.737% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.737% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.737% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.737% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.737% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.737% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:132 -coverage: 97.737% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 97.737% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:192 -coverage: 97.737% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.737% pattern: 48 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:15. flip_cnt: 0, stem_cnt: 99, fault_cnt:192 -coverage: 97.942% pattern: 49 before: 11 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:138 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:138 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:137 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:132 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:134 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:169 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:138 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:192 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:169 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:138 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:169 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:138 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:168 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:96 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:134 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:200 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 97.942% pattern: 49 before: 10 now: 10 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:15. flip_cnt: 0, stem_cnt: 99, fault_cnt:200 -coverage: 98.148% pattern: 50 before: 10 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:169 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:139 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:96 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:134 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:192 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:138 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:134 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:134 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:138 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:138 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:138 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:200 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:192 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:192 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:169 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:200 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:192 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:139 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:132 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:192 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:164 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:169 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.148% pattern: 50 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:7. flip_cnt: 0, stem_cnt: 99, fault_cnt:200 -coverage: 98.354% pattern: 51 before: 9 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:132 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:139 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:132 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:134 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:200 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:200 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:169 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:164 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:134 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:164 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:168 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:138 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:192 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:160 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:96 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:134 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:132 -coverage: 98.354% pattern: 51 before: 8 now: 8 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 99, fault_cnt:200 -coverage: 98.560% pattern: 52 before: 8 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:200 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:132 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:139 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:134 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:134 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:132 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:134 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:192 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:200 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:169 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:132 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 98.560% pattern: 52 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 99, fault_cnt:192 -coverage: 98.765% pattern: 53 before: 7 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:169 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:134 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:192 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:169 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:200 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:169 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:134 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:134 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:138 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:138 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:139 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:96 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:200 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:169 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:132 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:169 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:134 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:200 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:134 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:96 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:138 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.765% pattern: 53 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 99, fault_cnt:192 -coverage: 98.971% pattern: 54 before: 6 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:132 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:134 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:138 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:192 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:169 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:192 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:139 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:137 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:96 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:134 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 98.971% pattern: 54 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 99, fault_cnt:200 -coverage: 99.177% pattern: 55 before: 5 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.177% pattern: 55 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.177% pattern: 55 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.177% pattern: 55 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.177% pattern: 55 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.177% pattern: 55 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:132 -coverage: 99.177% pattern: 55 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.177% pattern: 55 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.177% pattern: 55 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:192 -coverage: 99.177% pattern: 55 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 99.177% pattern: 55 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.177% pattern: 55 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.177% pattern: 55 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 99.177% pattern: 55 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:200 -coverage: 99.177% pattern: 55 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.177% pattern: 55 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.177% pattern: 55 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.177% pattern: 55 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.177% pattern: 55 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.177% pattern: 55 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.177% pattern: 55 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 99.177% pattern: 55 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.177% pattern: 55 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:138 -coverage: 99.177% pattern: 55 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.177% pattern: 55 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.177% pattern: 55 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.177% pattern: 55 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 99.177% pattern: 55 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 99, fault_cnt:192 -coverage: 99.383% pattern: 56 before: 4 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:200 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:138 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:169 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:169 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:139 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:192 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:138 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:138 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:138 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:139 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:192 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:132 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:132 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:139 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:138 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:134 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:169 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:169 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:138 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:192 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:160 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:132 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:137 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:134 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:132 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:169 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.383% pattern: 56 before: 3 now: 3 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:11. flip_cnt: 0, stem_cnt: 99, fault_cnt:192 -coverage: 99.588% pattern: 57 before: 3 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:139 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:192 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:200 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:139 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:137 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:192 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:192 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:169 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:192 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:138 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:139 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:192 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:134 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:200 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:139 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:169 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:200 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:192 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:139 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:192 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:192 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:169 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:164 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:200 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:156 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:138 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:138 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:192 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:132 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:138 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:200 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:132 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:169 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:169 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:200 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:200 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:134 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:192 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:169 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:132 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:169 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:132 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:192 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:169 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:134 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:139 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:200 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:96 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:192 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:169 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:192 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:138 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:160 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:200 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:134 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:192 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:134 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:96 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:134 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:132 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:139 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:169 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:134 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:137 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:200 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:169 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:169 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:169 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:138 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:139 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:169 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:192 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:134 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:169 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.588% pattern: 57 before: 2 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 99, fault_cnt:192 -coverage: 99.794% pattern: 58 before: 2 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:200 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:134 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:137 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:134 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:192 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:138 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:200 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:200 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:192 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:132 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:200 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:138 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:169 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:200 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:139 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:96 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:132 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:169 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:169 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:132 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:169 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:192 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:192 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:200 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:96 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:96 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:200 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:169 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:132 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:160 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:134 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:138 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:134 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:169 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:138 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:134 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:192 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:169 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:200 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:138 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:200 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:192 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:169 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:96 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:200 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:200 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:169 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:134 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:138 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:133 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:138 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:137 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:135 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:160 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:165 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:161 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:140 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:157 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:100 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:132 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:109 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 99, fault_cnt:104 -coverage: 99.794% pattern: 58 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:11. flip_cnt: 0, stem_cnt: 99, fault_cnt:200 -coverage: 100.000% pattern: 59 before: 1 now: 0 -checking valid circuit ... result: 1. - -real 1m12.889s -user 1m12.883s -sys 0m0.000s diff --git a/exp_result/ATPG-LS_c5315.bench.txt b/exp_result/ATPG-LS_c5315.bench.txt deleted file mode 100644 index d658c30..0000000 --- a/exp_result/ATPG-LS_c5315.bench.txt +++ /dev/null @@ -1,2434 +0,0 @@ -make: 'atpg' is up to date. -======================== -parsing file ./benchmark/c5315.bench ... Done. -====== Circuit Statistics ====== -PI: 178 -PO: 123 -Gate: 2485 -Stem: 984 -Level: 10 -================================ -[SOL] flip: 0, stem: 0, fault:10765. flip_cnt: 0, stem_cnt: 984, fault_cnt:802 -coverage: 16.137% pattern: 1 before: 4970 now: 4168 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:7281. flip_cnt: 0, stem_cnt: 984, fault_cnt:788 -coverage: 24.527% pattern: 2 before: 4168 now: 3751 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:4076. flip_cnt: 0, stem_cnt: 984, fault_cnt:659 -coverage: 29.296% pattern: 3 before: 3751 now: 3514 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:3188. flip_cnt: 0, stem_cnt: 984, fault_cnt:818 -coverage: 34.085% pattern: 4 before: 3514 now: 3276 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:1372. flip_cnt: 0, stem_cnt: 984, fault_cnt:804 -coverage: 35.734% pattern: 5 before: 3276 now: 3194 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:724. flip_cnt: 0, stem_cnt: 984, fault_cnt:793 -coverage: 36.720% pattern: 6 before: 3194 now: 3145 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:6959. flip_cnt: 0, stem_cnt: 984, fault_cnt:1089 -coverage: 44.386% pattern: 7 before: 3145 now: 2764 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:348. flip_cnt: 0, stem_cnt: 984, fault_cnt:804 -coverage: 44.950% pattern: 8 before: 2764 now: 2736 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:499. flip_cnt: 0, stem_cnt: 984, fault_cnt:779 -coverage: 45.594% pattern: 9 before: 2736 now: 2704 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:3610. flip_cnt: 0, stem_cnt: 984, fault_cnt:928 -coverage: 49.416% pattern: 10 before: 2704 now: 2514 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:9044. flip_cnt: 0, stem_cnt: 984, fault_cnt:1156 -coverage: 58.994% pattern: 11 before: 2514 now: 2038 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:209. flip_cnt: 0, stem_cnt: 984, fault_cnt:807 -coverage: 59.215% pattern: 12 before: 2038 now: 2027 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:209. flip_cnt: 0, stem_cnt: 984, fault_cnt:624 -coverage: 59.437% pattern: 13 before: 2027 now: 2016 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:6080. flip_cnt: 0, stem_cnt: 984, fault_cnt:1245 -coverage: 65.875% pattern: 14 before: 2016 now: 1696 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 984, fault_cnt:690 -coverage: 65.915% pattern: 15 before: 1696 now: 1694 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:304. flip_cnt: 0, stem_cnt: 984, fault_cnt:725 -coverage: 66.237% pattern: 16 before: 1694 now: 1678 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:3382. flip_cnt: 0, stem_cnt: 984, fault_cnt:976 -coverage: 69.819% pattern: 17 before: 1678 now: 1500 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:304. flip_cnt: 0, stem_cnt: 984, fault_cnt:785 -coverage: 70.141% pattern: 18 before: 1500 now: 1484 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:3781. flip_cnt: 0, stem_cnt: 984, fault_cnt:1218 -coverage: 74.145% pattern: 19 before: 1484 now: 1285 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:1767. flip_cnt: 0, stem_cnt: 984, fault_cnt:1008 -coverage: 76.016% pattern: 20 before: 1285 now: 1192 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:114. flip_cnt: 0, stem_cnt: 984, fault_cnt:673 -coverage: 76.137% pattern: 21 before: 1192 now: 1186 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:380. flip_cnt: 0, stem_cnt: 984, fault_cnt:788 -coverage: 76.539% pattern: 22 before: 1186 now: 1166 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 984, fault_cnt:666 -coverage: 76.579% pattern: 23 before: 1166 now: 1164 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:67. flip_cnt: 0, stem_cnt: 984, fault_cnt:641 -coverage: 76.660% pattern: 24 before: 1164 now: 1160 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 984, fault_cnt:806 -coverage: 76.720% pattern: 25 before: 1160 now: 1157 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 984, fault_cnt:788 -coverage: 76.781% pattern: 26 before: 1157 now: 1154 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:761 -coverage: 76.781% pattern: 26 before: 1154 now: 1154 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:769 -coverage: 76.781% pattern: 26 before: 1154 now: 1154 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:657 -coverage: 76.781% pattern: 26 before: 1154 now: 1154 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 984, fault_cnt:818 -coverage: 76.821% pattern: 27 before: 1154 now: 1152 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:342. flip_cnt: 0, stem_cnt: 984, fault_cnt:717 -coverage: 77.183% pattern: 28 before: 1152 now: 1134 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:114. flip_cnt: 0, stem_cnt: 984, fault_cnt:871 -coverage: 77.304% pattern: 29 before: 1134 now: 1128 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 984, fault_cnt:866 -coverage: 77.404% pattern: 30 before: 1128 now: 1123 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:703. flip_cnt: 0, stem_cnt: 984, fault_cnt:944 -coverage: 78.149% pattern: 31 before: 1123 now: 1086 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:2565. flip_cnt: 0, stem_cnt: 984, fault_cnt:1152 -coverage: 80.865% pattern: 32 before: 1086 now: 951 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:741 -coverage: 80.865% pattern: 32 before: 951 now: 951 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:304. flip_cnt: 0, stem_cnt: 984, fault_cnt:844 -coverage: 81.187% pattern: 33 before: 951 now: 935 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:342. flip_cnt: 0, stem_cnt: 984, fault_cnt:846 -coverage: 81.549% pattern: 34 before: 935 now: 917 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 984, fault_cnt:755 -coverage: 81.610% pattern: 35 before: 917 now: 914 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:704 -coverage: 81.610% pattern: 35 before: 914 now: 914 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:662 -coverage: 81.610% pattern: 35 before: 914 now: 914 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:589. flip_cnt: 0, stem_cnt: 984, fault_cnt:944 -coverage: 82.233% pattern: 36 before: 914 now: 883 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:773 -coverage: 82.233% pattern: 36 before: 883 now: 883 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:684. flip_cnt: 0, stem_cnt: 984, fault_cnt:1119 -coverage: 82.958% pattern: 37 before: 883 now: 847 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 984, fault_cnt:816 -coverage: 83.038% pattern: 38 before: 847 now: 843 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:114. flip_cnt: 0, stem_cnt: 984, fault_cnt:771 -coverage: 83.159% pattern: 39 before: 843 now: 837 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:683 -coverage: 83.159% pattern: 39 before: 837 now: 837 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:2584. flip_cnt: 0, stem_cnt: 984, fault_cnt:1160 -coverage: 85.895% pattern: 40 before: 837 now: 701 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:778 -coverage: 85.895% pattern: 40 before: 701 now: 701 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 984, fault_cnt:895 -coverage: 85.956% pattern: 41 before: 701 now: 698 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:687 -coverage: 85.956% pattern: 41 before: 698 now: 698 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:705 -coverage: 85.956% pattern: 41 before: 698 now: 698 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:33. flip_cnt: 0, stem_cnt: 984, fault_cnt:812 -coverage: 86.016% pattern: 42 before: 698 now: 695 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 984, fault_cnt:708 -coverage: 86.056% pattern: 43 before: 695 now: 693 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:681 -coverage: 86.056% pattern: 43 before: 693 now: 693 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:646. flip_cnt: 0, stem_cnt: 984, fault_cnt:1180 -coverage: 86.740% pattern: 44 before: 693 now: 659 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:728 -coverage: 86.740% pattern: 44 before: 659 now: 659 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:696 -coverage: 86.761% pattern: 45 before: 659 now: 658 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:1064. flip_cnt: 0, stem_cnt: 984, fault_cnt:1109 -coverage: 87.887% pattern: 46 before: 658 now: 602 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:661 -coverage: 87.887% pattern: 46 before: 602 now: 602 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:323. flip_cnt: 0, stem_cnt: 984, fault_cnt:1249 -coverage: 88.229% pattern: 47 before: 602 now: 585 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:659 -coverage: 88.229% pattern: 47 before: 585 now: 585 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 984, fault_cnt:771 -coverage: 88.270% pattern: 48 before: 585 now: 583 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:969. flip_cnt: 0, stem_cnt: 984, fault_cnt:1111 -coverage: 89.296% pattern: 49 before: 583 now: 532 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:698 -coverage: 89.296% pattern: 49 before: 532 now: 532 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:792 -coverage: 89.296% pattern: 49 before: 532 now: 532 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 984, fault_cnt:779 -coverage: 89.396% pattern: 50 before: 532 now: 527 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:668 -coverage: 89.396% pattern: 50 before: 527 now: 527 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:698 -coverage: 89.396% pattern: 50 before: 527 now: 527 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:688 -coverage: 89.396% pattern: 50 before: 527 now: 527 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 984, fault_cnt:795 -coverage: 89.477% pattern: 51 before: 527 now: 523 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:668 -coverage: 89.477% pattern: 51 before: 523 now: 523 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:676 -coverage: 89.477% pattern: 51 before: 523 now: 523 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:802 -coverage: 89.477% pattern: 51 before: 523 now: 523 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:775 -coverage: 89.477% pattern: 51 before: 523 now: 523 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 984, fault_cnt:849 -coverage: 89.517% pattern: 52 before: 523 now: 521 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 984, fault_cnt:737 -coverage: 89.577% pattern: 53 before: 521 now: 518 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 984, fault_cnt:715 -coverage: 89.658% pattern: 54 before: 518 now: 514 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 984, fault_cnt:637 -coverage: 89.698% pattern: 55 before: 514 now: 512 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:681 -coverage: 89.698% pattern: 55 before: 512 now: 512 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:1140. flip_cnt: 0, stem_cnt: 984, fault_cnt:1160 -coverage: 90.905% pattern: 56 before: 512 now: 452 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:627. flip_cnt: 0, stem_cnt: 984, fault_cnt:1265 -coverage: 91.569% pattern: 57 before: 452 now: 419 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:437. flip_cnt: 0, stem_cnt: 984, fault_cnt:948 -coverage: 92.032% pattern: 58 before: 419 now: 396 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:811 -coverage: 92.032% pattern: 58 before: 396 now: 396 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:285. flip_cnt: 0, stem_cnt: 984, fault_cnt:1056 -coverage: 92.334% pattern: 59 before: 396 now: 381 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 984, fault_cnt:1053 -coverage: 92.414% pattern: 60 before: 381 now: 377 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:691 -coverage: 92.414% pattern: 60 before: 377 now: 377 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:821 -coverage: 92.414% pattern: 60 before: 377 now: 377 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:785 -coverage: 92.414% pattern: 60 before: 377 now: 377 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:133. flip_cnt: 0, stem_cnt: 984, fault_cnt:931 -coverage: 92.555% pattern: 61 before: 377 now: 370 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:692 -coverage: 92.575% pattern: 62 before: 370 now: 369 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:777 -coverage: 92.596% pattern: 63 before: 369 now: 368 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:753 -coverage: 92.596% pattern: 63 before: 368 now: 368 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:133. flip_cnt: 0, stem_cnt: 984, fault_cnt:1098 -coverage: 92.736% pattern: 64 before: 368 now: 361 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:655 -coverage: 92.736% pattern: 64 before: 361 now: 361 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:688 -coverage: 92.736% pattern: 64 before: 361 now: 361 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:660 -coverage: 92.736% pattern: 64 before: 361 now: 361 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:114. flip_cnt: 0, stem_cnt: 984, fault_cnt:757 -coverage: 92.857% pattern: 65 before: 361 now: 355 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:803 -coverage: 92.857% pattern: 65 before: 355 now: 355 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:668 -coverage: 92.877% pattern: 66 before: 355 now: 354 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:804 -coverage: 92.877% pattern: 66 before: 354 now: 354 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:770 -coverage: 92.897% pattern: 67 before: 354 now: 353 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:671 -coverage: 92.897% pattern: 67 before: 353 now: 353 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:677 -coverage: 92.918% pattern: 68 before: 353 now: 352 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:645 -coverage: 92.918% pattern: 68 before: 352 now: 352 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:798 -coverage: 92.918% pattern: 68 before: 352 now: 352 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:806 -coverage: 92.918% pattern: 68 before: 352 now: 352 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:784 -coverage: 92.918% pattern: 68 before: 352 now: 352 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:794 -coverage: 92.918% pattern: 68 before: 352 now: 352 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:630 -coverage: 92.918% pattern: 68 before: 352 now: 352 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:710 -coverage: 92.918% pattern: 68 before: 352 now: 352 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:342. flip_cnt: 0, stem_cnt: 984, fault_cnt:1224 -coverage: 93.280% pattern: 69 before: 352 now: 334 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:776 -coverage: 93.280% pattern: 69 before: 334 now: 334 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:665 -coverage: 93.280% pattern: 69 before: 334 now: 334 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:669 -coverage: 93.280% pattern: 69 before: 334 now: 334 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:760 -coverage: 93.300% pattern: 70 before: 334 now: 333 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:680 -coverage: 93.300% pattern: 70 before: 333 now: 333 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:768 -coverage: 93.300% pattern: 70 before: 333 now: 333 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:699 -coverage: 93.300% pattern: 70 before: 333 now: 333 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:664 -coverage: 93.300% pattern: 70 before: 333 now: 333 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:266. flip_cnt: 0, stem_cnt: 984, fault_cnt:968 -coverage: 93.581% pattern: 71 before: 333 now: 319 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:676 -coverage: 93.581% pattern: 71 before: 319 now: 319 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:654 -coverage: 93.581% pattern: 71 before: 319 now: 319 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:782 -coverage: 93.581% pattern: 71 before: 319 now: 319 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:650 -coverage: 93.581% pattern: 71 before: 319 now: 319 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:190. flip_cnt: 0, stem_cnt: 984, fault_cnt:980 -coverage: 93.783% pattern: 72 before: 319 now: 309 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 984, fault_cnt:1007 -coverage: 93.863% pattern: 73 before: 309 now: 305 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:760 -coverage: 93.863% pattern: 73 before: 305 now: 305 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:631 -coverage: 93.863% pattern: 73 before: 305 now: 305 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:797 -coverage: 93.863% pattern: 73 before: 305 now: 305 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:589. flip_cnt: 0, stem_cnt: 984, fault_cnt:1232 -coverage: 94.487% pattern: 74 before: 305 now: 274 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:792 -coverage: 94.507% pattern: 75 before: 274 now: 273 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:786 -coverage: 94.507% pattern: 75 before: 273 now: 273 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:822 -coverage: 94.507% pattern: 75 before: 273 now: 273 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:677 -coverage: 94.507% pattern: 75 before: 273 now: 273 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:861 -coverage: 94.507% pattern: 75 before: 273 now: 273 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 984, fault_cnt:1107 -coverage: 94.547% pattern: 76 before: 273 now: 271 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:691 -coverage: 94.547% pattern: 76 before: 271 now: 271 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 984, fault_cnt:1028 -coverage: 94.608% pattern: 77 before: 271 now: 268 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 984, fault_cnt:1034 -coverage: 94.648% pattern: 78 before: 268 now: 266 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:715 -coverage: 94.648% pattern: 78 before: 266 now: 266 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:818 -coverage: 94.648% pattern: 78 before: 266 now: 266 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:692 -coverage: 94.648% pattern: 78 before: 266 now: 266 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:674 -coverage: 94.648% pattern: 78 before: 266 now: 266 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 984, fault_cnt:984 -coverage: 94.748% pattern: 79 before: 266 now: 261 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:799 -coverage: 94.748% pattern: 79 before: 261 now: 261 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:756 -coverage: 94.748% pattern: 79 before: 261 now: 261 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:829 -coverage: 94.748% pattern: 79 before: 261 now: 261 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:885 -coverage: 94.748% pattern: 79 before: 261 now: 261 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:807 -coverage: 94.748% pattern: 79 before: 261 now: 261 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:753 -coverage: 94.748% pattern: 79 before: 261 now: 261 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:133. flip_cnt: 0, stem_cnt: 984, fault_cnt:1052 -coverage: 94.889% pattern: 80 before: 261 now: 254 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:656 -coverage: 94.889% pattern: 80 before: 254 now: 254 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:757 -coverage: 94.889% pattern: 80 before: 254 now: 254 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:829 -coverage: 94.909% pattern: 81 before: 254 now: 253 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 984, fault_cnt:1075 -coverage: 94.950% pattern: 82 before: 253 now: 251 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:665 -coverage: 94.950% pattern: 82 before: 251 now: 251 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1044 -coverage: 94.950% pattern: 82 before: 251 now: 251 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:754 -coverage: 94.950% pattern: 82 before: 251 now: 251 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:772 -coverage: 94.950% pattern: 82 before: 251 now: 251 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:697 -coverage: 94.950% pattern: 82 before: 251 now: 251 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:964 -coverage: 94.950% pattern: 82 before: 251 now: 251 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:675 -coverage: 94.950% pattern: 82 before: 251 now: 251 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:323. flip_cnt: 0, stem_cnt: 984, fault_cnt:1138 -coverage: 95.292% pattern: 83 before: 251 now: 234 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:806 -coverage: 95.292% pattern: 83 before: 234 now: 234 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 984, fault_cnt:939 -coverage: 95.332% pattern: 84 before: 234 now: 232 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:930 -coverage: 95.352% pattern: 85 before: 232 now: 231 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:839 -coverage: 95.352% pattern: 85 before: 231 now: 231 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:820 -coverage: 95.352% pattern: 85 before: 231 now: 231 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:675 -coverage: 95.352% pattern: 85 before: 231 now: 231 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:838 -coverage: 95.372% pattern: 86 before: 231 now: 230 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:773 -coverage: 95.392% pattern: 87 before: 230 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:743 -coverage: 95.392% pattern: 87 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:807 -coverage: 95.392% pattern: 87 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:794 -coverage: 95.392% pattern: 87 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:653 -coverage: 95.392% pattern: 87 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:646 -coverage: 95.392% pattern: 87 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:842 -coverage: 95.392% pattern: 87 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:761 -coverage: 95.392% pattern: 87 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:976 -coverage: 95.392% pattern: 87 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:706 -coverage: 95.392% pattern: 87 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:961 -coverage: 95.392% pattern: 87 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:670 -coverage: 95.392% pattern: 87 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:793 -coverage: 95.392% pattern: 87 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:694 -coverage: 95.392% pattern: 87 before: 229 now: 229 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:1064 -coverage: 95.412% pattern: 88 before: 229 now: 228 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:741 -coverage: 95.412% pattern: 88 before: 228 now: 228 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:733 -coverage: 95.412% pattern: 88 before: 228 now: 228 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:685 -coverage: 95.412% pattern: 88 before: 228 now: 228 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:787 -coverage: 95.412% pattern: 88 before: 228 now: 228 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:668 -coverage: 95.412% pattern: 88 before: 228 now: 228 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:757 -coverage: 95.433% pattern: 89 before: 228 now: 227 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:754 -coverage: 95.433% pattern: 89 before: 227 now: 227 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:785 -coverage: 95.433% pattern: 89 before: 227 now: 227 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:782 -coverage: 95.433% pattern: 89 before: 227 now: 227 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:699 -coverage: 95.433% pattern: 89 before: 227 now: 227 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:742 -coverage: 95.433% pattern: 89 before: 227 now: 227 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:676 -coverage: 95.433% pattern: 89 before: 227 now: 227 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:228. flip_cnt: 0, stem_cnt: 984, fault_cnt:1301 -coverage: 95.674% pattern: 90 before: 227 now: 215 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:753 -coverage: 95.674% pattern: 90 before: 215 now: 215 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:655 -coverage: 95.694% pattern: 91 before: 215 now: 214 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:818 -coverage: 95.694% pattern: 91 before: 214 now: 214 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:666 -coverage: 95.694% pattern: 91 before: 214 now: 214 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:418. flip_cnt: 0, stem_cnt: 984, fault_cnt:1273 -coverage: 96.137% pattern: 92 before: 214 now: 192 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 984, fault_cnt:1150 -coverage: 96.217% pattern: 93 before: 192 now: 188 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:774 -coverage: 96.217% pattern: 93 before: 188 now: 188 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:841 -coverage: 96.217% pattern: 93 before: 188 now: 188 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:762 -coverage: 96.217% pattern: 93 before: 188 now: 188 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:775 -coverage: 96.217% pattern: 93 before: 188 now: 188 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1063 -coverage: 96.217% pattern: 93 before: 188 now: 188 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:687 -coverage: 96.217% pattern: 93 before: 188 now: 188 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:285. flip_cnt: 0, stem_cnt: 984, fault_cnt:1277 -coverage: 96.519% pattern: 94 before: 188 now: 173 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:813 -coverage: 96.519% pattern: 94 before: 173 now: 173 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:683 -coverage: 96.519% pattern: 94 before: 173 now: 173 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:737 -coverage: 96.519% pattern: 94 before: 173 now: 173 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:1036 -coverage: 96.539% pattern: 95 before: 173 now: 172 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:646 -coverage: 96.539% pattern: 95 before: 172 now: 172 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:818 -coverage: 96.539% pattern: 95 before: 172 now: 172 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:681 -coverage: 96.539% pattern: 95 before: 172 now: 172 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:973 -coverage: 96.539% pattern: 95 before: 172 now: 172 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:171. flip_cnt: 0, stem_cnt: 984, fault_cnt:1286 -coverage: 96.720% pattern: 96 before: 172 now: 163 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:171. flip_cnt: 0, stem_cnt: 984, fault_cnt:1166 -coverage: 96.901% pattern: 97 before: 163 now: 154 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:837 -coverage: 96.901% pattern: 97 before: 154 now: 154 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:785 -coverage: 96.901% pattern: 97 before: 154 now: 154 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:674 -coverage: 96.901% pattern: 97 before: 154 now: 154 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:792 -coverage: 96.901% pattern: 97 before: 154 now: 154 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:684 -coverage: 96.901% pattern: 97 before: 154 now: 154 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:956 -coverage: 96.901% pattern: 97 before: 154 now: 154 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:786 -coverage: 96.901% pattern: 97 before: 154 now: 154 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:786 -coverage: 96.901% pattern: 97 before: 154 now: 154 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:712 -coverage: 96.901% pattern: 97 before: 154 now: 154 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:805 -coverage: 96.901% pattern: 97 before: 154 now: 154 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:641 -coverage: 96.901% pattern: 97 before: 154 now: 154 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:819 -coverage: 96.901% pattern: 97 before: 154 now: 154 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:807 -coverage: 96.901% pattern: 97 before: 154 now: 154 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:740 -coverage: 96.901% pattern: 97 before: 154 now: 154 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:676 -coverage: 96.901% pattern: 97 before: 154 now: 154 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:996 -coverage: 96.901% pattern: 97 before: 154 now: 154 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:804 -coverage: 96.901% pattern: 97 before: 154 now: 154 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1244 -coverage: 96.901% pattern: 97 before: 154 now: 154 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:681 -coverage: 96.901% pattern: 97 before: 154 now: 154 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:988 -coverage: 96.901% pattern: 97 before: 154 now: 154 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:380. flip_cnt: 0, stem_cnt: 984, fault_cnt:1162 -coverage: 97.304% pattern: 98 before: 154 now: 134 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 984, fault_cnt:1031 -coverage: 97.344% pattern: 99 before: 134 now: 132 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:947 -coverage: 97.344% pattern: 99 before: 132 now: 132 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:686 -coverage: 97.344% pattern: 99 before: 132 now: 132 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:630 -coverage: 97.344% pattern: 99 before: 132 now: 132 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1055 -coverage: 97.344% pattern: 99 before: 132 now: 132 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:792 -coverage: 97.344% pattern: 99 before: 132 now: 132 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:783 -coverage: 97.344% pattern: 99 before: 132 now: 132 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:766 -coverage: 97.344% pattern: 99 before: 132 now: 132 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:675 -coverage: 97.344% pattern: 99 before: 132 now: 132 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:678 -coverage: 97.344% pattern: 99 before: 132 now: 132 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:247. flip_cnt: 0, stem_cnt: 984, fault_cnt:1338 -coverage: 97.606% pattern: 100 before: 132 now: 119 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 984, fault_cnt:1060 -coverage: 97.646% pattern: 101 before: 119 now: 117 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:766 -coverage: 97.646% pattern: 101 before: 117 now: 117 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:773 -coverage: 97.646% pattern: 101 before: 117 now: 117 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:744 -coverage: 97.646% pattern: 101 before: 117 now: 117 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:743 -coverage: 97.646% pattern: 101 before: 117 now: 117 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:787 -coverage: 97.646% pattern: 101 before: 117 now: 117 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:1169 -coverage: 97.666% pattern: 102 before: 117 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:791 -coverage: 97.666% pattern: 102 before: 116 now: 116 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 984, fault_cnt:1234 -coverage: 97.746% pattern: 103 before: 116 now: 112 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:658 -coverage: 97.746% pattern: 103 before: 112 now: 112 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:805 -coverage: 97.746% pattern: 103 before: 112 now: 112 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:1151 -coverage: 97.767% pattern: 104 before: 112 now: 111 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:763 -coverage: 97.767% pattern: 104 before: 111 now: 111 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:810 -coverage: 97.767% pattern: 104 before: 111 now: 111 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:785 -coverage: 97.767% pattern: 104 before: 111 now: 111 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:794 -coverage: 97.767% pattern: 104 before: 111 now: 111 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:768 -coverage: 97.767% pattern: 104 before: 111 now: 111 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:716 -coverage: 97.767% pattern: 104 before: 111 now: 111 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:692 -coverage: 97.767% pattern: 104 before: 111 now: 111 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:649 -coverage: 97.767% pattern: 104 before: 111 now: 111 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 984, fault_cnt:1147 -coverage: 97.847% pattern: 105 before: 111 now: 107 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:769 -coverage: 97.847% pattern: 105 before: 107 now: 107 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:794 -coverage: 97.847% pattern: 105 before: 107 now: 107 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:1052 -coverage: 97.867% pattern: 106 before: 107 now: 106 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:737 -coverage: 97.867% pattern: 106 before: 106 now: 106 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:675 -coverage: 97.867% pattern: 106 before: 106 now: 106 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 984, fault_cnt:1204 -coverage: 97.928% pattern: 107 before: 106 now: 103 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:912 -coverage: 97.928% pattern: 107 before: 103 now: 103 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:696 -coverage: 97.928% pattern: 107 before: 103 now: 103 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:814 -coverage: 97.928% pattern: 107 before: 103 now: 103 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:827 -coverage: 97.928% pattern: 107 before: 103 now: 103 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:825 -coverage: 97.928% pattern: 107 before: 103 now: 103 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 984, fault_cnt:993 -coverage: 97.968% pattern: 108 before: 103 now: 101 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1137 -coverage: 97.968% pattern: 108 before: 101 now: 101 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:652 -coverage: 97.968% pattern: 108 before: 101 now: 101 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:680 -coverage: 97.968% pattern: 108 before: 101 now: 101 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:1079 -coverage: 97.988% pattern: 109 before: 101 now: 100 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:735 -coverage: 97.988% pattern: 109 before: 100 now: 100 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:695 -coverage: 97.988% pattern: 109 before: 100 now: 100 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:775 -coverage: 98.008% pattern: 110 before: 100 now: 99 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:766 -coverage: 98.008% pattern: 110 before: 99 now: 99 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:678 -coverage: 98.008% pattern: 110 before: 99 now: 99 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:713 -coverage: 98.008% pattern: 110 before: 99 now: 99 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:734 -coverage: 98.008% pattern: 110 before: 99 now: 99 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:840 -coverage: 98.008% pattern: 110 before: 99 now: 99 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:752 -coverage: 98.008% pattern: 110 before: 99 now: 99 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:738 -coverage: 98.008% pattern: 110 before: 99 now: 99 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:819 -coverage: 98.008% pattern: 110 before: 99 now: 99 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 984, fault_cnt:1381 -coverage: 98.048% pattern: 111 before: 99 now: 97 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:801 -coverage: 98.048% pattern: 111 before: 97 now: 97 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:673 -coverage: 98.048% pattern: 111 before: 97 now: 97 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:702 -coverage: 98.048% pattern: 111 before: 97 now: 97 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:797 -coverage: 98.048% pattern: 111 before: 97 now: 97 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:1272 -coverage: 98.068% pattern: 112 before: 97 now: 96 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:763 -coverage: 98.068% pattern: 112 before: 96 now: 96 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:793 -coverage: 98.068% pattern: 112 before: 96 now: 96 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:789 -coverage: 98.068% pattern: 112 before: 96 now: 96 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:915 -coverage: 98.068% pattern: 112 before: 96 now: 96 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:754 -coverage: 98.068% pattern: 112 before: 96 now: 96 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:645 -coverage: 98.068% pattern: 112 before: 96 now: 96 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:772 -coverage: 98.068% pattern: 112 before: 96 now: 96 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:737 -coverage: 98.068% pattern: 112 before: 96 now: 96 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:649 -coverage: 98.068% pattern: 112 before: 96 now: 96 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:656 -coverage: 98.068% pattern: 112 before: 96 now: 96 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:705 -coverage: 98.068% pattern: 112 before: 96 now: 96 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:766 -coverage: 98.068% pattern: 112 before: 96 now: 96 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:817 -coverage: 98.068% pattern: 112 before: 96 now: 96 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:817 -coverage: 98.068% pattern: 112 before: 96 now: 96 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:674 -coverage: 98.068% pattern: 112 before: 96 now: 96 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:670 -coverage: 98.089% pattern: 113 before: 96 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:654 -coverage: 98.089% pattern: 113 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1104 -coverage: 98.089% pattern: 113 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:688 -coverage: 98.089% pattern: 113 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:617 -coverage: 98.089% pattern: 113 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:669 -coverage: 98.089% pattern: 113 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:729 -coverage: 98.089% pattern: 113 before: 95 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 984, fault_cnt:1138 -coverage: 98.169% pattern: 114 before: 95 now: 91 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:724 -coverage: 98.169% pattern: 114 before: 91 now: 91 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:738 -coverage: 98.169% pattern: 114 before: 91 now: 91 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:987 -coverage: 98.169% pattern: 114 before: 91 now: 91 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:776 -coverage: 98.169% pattern: 114 before: 91 now: 91 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:816 -coverage: 98.169% pattern: 114 before: 91 now: 91 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:827 -coverage: 98.169% pattern: 114 before: 91 now: 91 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:1145 -coverage: 98.189% pattern: 115 before: 91 now: 90 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:704 -coverage: 98.189% pattern: 115 before: 90 now: 90 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:721 -coverage: 98.189% pattern: 115 before: 90 now: 90 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1043 -coverage: 98.189% pattern: 115 before: 90 now: 90 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 984, fault_cnt:1285 -coverage: 98.229% pattern: 116 before: 90 now: 88 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1353 -coverage: 98.229% pattern: 116 before: 88 now: 88 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:907 -coverage: 98.229% pattern: 116 before: 88 now: 88 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:698 -coverage: 98.229% pattern: 116 before: 88 now: 88 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:674 -coverage: 98.229% pattern: 116 before: 88 now: 88 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:807 -coverage: 98.229% pattern: 116 before: 88 now: 88 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:847 -coverage: 98.229% pattern: 116 before: 88 now: 88 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:772 -coverage: 98.229% pattern: 116 before: 88 now: 88 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:694 -coverage: 98.229% pattern: 116 before: 88 now: 88 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:699 -coverage: 98.229% pattern: 116 before: 88 now: 88 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:774 -coverage: 98.229% pattern: 116 before: 88 now: 88 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:682 -coverage: 98.229% pattern: 116 before: 88 now: 88 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:767 -coverage: 98.229% pattern: 116 before: 88 now: 88 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:669 -coverage: 98.229% pattern: 116 before: 88 now: 88 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:782 -coverage: 98.229% pattern: 116 before: 88 now: 88 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 984, fault_cnt:1145 -coverage: 98.330% pattern: 117 before: 88 now: 83 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:745 -coverage: 98.330% pattern: 117 before: 83 now: 83 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 984, fault_cnt:1250 -coverage: 98.370% pattern: 118 before: 83 now: 81 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:701 -coverage: 98.370% pattern: 118 before: 81 now: 81 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:704 -coverage: 98.370% pattern: 118 before: 81 now: 81 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:795 -coverage: 98.370% pattern: 118 before: 81 now: 81 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:776 -coverage: 98.370% pattern: 118 before: 81 now: 81 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:685 -coverage: 98.390% pattern: 119 before: 81 now: 80 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 984, fault_cnt:1276 -coverage: 98.471% pattern: 120 before: 80 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:701 -coverage: 98.471% pattern: 120 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:803 -coverage: 98.471% pattern: 120 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:901 -coverage: 98.471% pattern: 120 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:664 -coverage: 98.471% pattern: 120 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:795 -coverage: 98.471% pattern: 120 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:784 -coverage: 98.471% pattern: 120 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:681 -coverage: 98.471% pattern: 120 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:789 -coverage: 98.471% pattern: 120 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:817 -coverage: 98.471% pattern: 120 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:785 -coverage: 98.471% pattern: 120 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:733 -coverage: 98.471% pattern: 120 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:809 -coverage: 98.471% pattern: 120 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:678 -coverage: 98.471% pattern: 120 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:812 -coverage: 98.471% pattern: 120 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1096 -coverage: 98.471% pattern: 120 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:932 -coverage: 98.471% pattern: 120 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:786 -coverage: 98.471% pattern: 120 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:797 -coverage: 98.471% pattern: 120 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:683 -coverage: 98.471% pattern: 120 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:768 -coverage: 98.471% pattern: 120 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:684 -coverage: 98.471% pattern: 120 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1268 -coverage: 98.471% pattern: 120 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:859 -coverage: 98.471% pattern: 120 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1158 -coverage: 98.471% pattern: 120 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:779 -coverage: 98.471% pattern: 120 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1062 -coverage: 98.471% pattern: 120 before: 76 now: 76 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 984, fault_cnt:1052 -coverage: 98.511% pattern: 121 before: 76 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:738 -coverage: 98.511% pattern: 121 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:760 -coverage: 98.511% pattern: 121 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:767 -coverage: 98.511% pattern: 121 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:829 -coverage: 98.511% pattern: 121 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:653 -coverage: 98.511% pattern: 121 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:805 -coverage: 98.511% pattern: 121 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:674 -coverage: 98.511% pattern: 121 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:982 -coverage: 98.511% pattern: 121 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1262 -coverage: 98.511% pattern: 121 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1155 -coverage: 98.511% pattern: 121 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:705 -coverage: 98.511% pattern: 121 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1061 -coverage: 98.511% pattern: 121 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:662 -coverage: 98.511% pattern: 121 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:706 -coverage: 98.511% pattern: 121 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:784 -coverage: 98.511% pattern: 121 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:767 -coverage: 98.511% pattern: 121 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:803 -coverage: 98.511% pattern: 121 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:642 -coverage: 98.511% pattern: 121 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:797 -coverage: 98.511% pattern: 121 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:802 -coverage: 98.511% pattern: 121 before: 74 now: 74 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 984, fault_cnt:1262 -coverage: 98.571% pattern: 122 before: 74 now: 71 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:779 -coverage: 98.571% pattern: 122 before: 71 now: 71 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:754 -coverage: 98.571% pattern: 122 before: 71 now: 71 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:821 -coverage: 98.571% pattern: 122 before: 71 now: 71 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:979 -coverage: 98.571% pattern: 122 before: 71 now: 71 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1158 -coverage: 98.571% pattern: 122 before: 71 now: 71 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:695 -coverage: 98.571% pattern: 122 before: 71 now: 71 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:639 -coverage: 98.571% pattern: 122 before: 71 now: 71 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:685 -coverage: 98.571% pattern: 122 before: 71 now: 71 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:824 -coverage: 98.571% pattern: 122 before: 71 now: 71 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:740 -coverage: 98.571% pattern: 122 before: 71 now: 71 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:813 -coverage: 98.571% pattern: 122 before: 71 now: 71 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:759 -coverage: 98.571% pattern: 122 before: 71 now: 71 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:665 -coverage: 98.571% pattern: 122 before: 71 now: 71 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:655 -coverage: 98.571% pattern: 122 before: 71 now: 71 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:932 -coverage: 98.571% pattern: 122 before: 71 now: 71 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:858 -coverage: 98.571% pattern: 122 before: 71 now: 71 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:670 -coverage: 98.571% pattern: 122 before: 71 now: 71 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:753 -coverage: 98.571% pattern: 122 before: 71 now: 71 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:785 -coverage: 98.592% pattern: 123 before: 71 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:671 -coverage: 98.592% pattern: 123 before: 70 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:808 -coverage: 98.592% pattern: 123 before: 70 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:762 -coverage: 98.592% pattern: 123 before: 70 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:767 -coverage: 98.592% pattern: 123 before: 70 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:632 -coverage: 98.592% pattern: 123 before: 70 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:686 -coverage: 98.592% pattern: 123 before: 70 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:802 -coverage: 98.592% pattern: 123 before: 70 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:683 -coverage: 98.592% pattern: 123 before: 70 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:855 -coverage: 98.592% pattern: 123 before: 70 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1107 -coverage: 98.592% pattern: 123 before: 70 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:775 -coverage: 98.592% pattern: 123 before: 70 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:614 -coverage: 98.592% pattern: 123 before: 70 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:825 -coverage: 98.592% pattern: 123 before: 70 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1002 -coverage: 98.592% pattern: 123 before: 70 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:776 -coverage: 98.592% pattern: 123 before: 70 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:876 -coverage: 98.592% pattern: 123 before: 70 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:815 -coverage: 98.592% pattern: 123 before: 70 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:948 -coverage: 98.592% pattern: 123 before: 70 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:772 -coverage: 98.592% pattern: 123 before: 70 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:717 -coverage: 98.592% pattern: 123 before: 70 now: 70 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 984, fault_cnt:1275 -coverage: 98.672% pattern: 124 before: 70 now: 66 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:786 -coverage: 98.672% pattern: 124 before: 66 now: 66 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:703 -coverage: 98.672% pattern: 124 before: 66 now: 66 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:749 -coverage: 98.672% pattern: 124 before: 66 now: 66 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:977 -coverage: 98.672% pattern: 124 before: 66 now: 66 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1244 -coverage: 98.672% pattern: 124 before: 66 now: 66 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:670 -coverage: 98.672% pattern: 124 before: 66 now: 66 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:764 -coverage: 98.672% pattern: 124 before: 66 now: 66 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:795 -coverage: 98.672% pattern: 124 before: 66 now: 66 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:678 -coverage: 98.672% pattern: 124 before: 66 now: 66 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:970 -coverage: 98.672% pattern: 124 before: 66 now: 66 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:784 -coverage: 98.672% pattern: 124 before: 66 now: 66 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:827 -coverage: 98.672% pattern: 124 before: 66 now: 66 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:815 -coverage: 98.672% pattern: 124 before: 66 now: 66 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:792 -coverage: 98.672% pattern: 124 before: 66 now: 66 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:646 -coverage: 98.672% pattern: 124 before: 66 now: 66 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1129 -coverage: 98.672% pattern: 124 before: 66 now: 66 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:1135 -coverage: 98.692% pattern: 125 before: 66 now: 65 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:871 -coverage: 98.692% pattern: 125 before: 65 now: 65 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:796 -coverage: 98.692% pattern: 125 before: 65 now: 65 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:654 -coverage: 98.692% pattern: 125 before: 65 now: 65 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 984, fault_cnt:1123 -coverage: 98.732% pattern: 126 before: 65 now: 63 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:785 -coverage: 98.732% pattern: 126 before: 63 now: 63 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:771 -coverage: 98.732% pattern: 126 before: 63 now: 63 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:682 -coverage: 98.732% pattern: 126 before: 63 now: 63 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:825 -coverage: 98.732% pattern: 126 before: 63 now: 63 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:679 -coverage: 98.732% pattern: 126 before: 63 now: 63 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:662 -coverage: 98.732% pattern: 126 before: 63 now: 63 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:648 -coverage: 98.732% pattern: 126 before: 63 now: 63 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:839 -coverage: 98.732% pattern: 126 before: 63 now: 63 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1025 -coverage: 98.732% pattern: 126 before: 63 now: 63 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:702 -coverage: 98.732% pattern: 126 before: 63 now: 63 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:810 -coverage: 98.732% pattern: 126 before: 63 now: 63 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:659 -coverage: 98.732% pattern: 126 before: 63 now: 63 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:768 -coverage: 98.732% pattern: 126 before: 63 now: 63 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:774 -coverage: 98.732% pattern: 126 before: 63 now: 63 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:944 -coverage: 98.732% pattern: 126 before: 63 now: 63 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:985 -coverage: 98.732% pattern: 126 before: 63 now: 63 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:863 -coverage: 98.732% pattern: 126 before: 63 now: 63 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:774 -coverage: 98.732% pattern: 126 before: 63 now: 63 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:768 -coverage: 98.732% pattern: 126 before: 63 now: 63 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1065 -coverage: 98.732% pattern: 126 before: 63 now: 63 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:646 -coverage: 98.732% pattern: 126 before: 63 now: 63 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1096 -coverage: 98.732% pattern: 126 before: 63 now: 63 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:773 -coverage: 98.732% pattern: 126 before: 63 now: 63 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1045 -coverage: 98.732% pattern: 126 before: 63 now: 63 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1077 -coverage: 98.732% pattern: 126 before: 63 now: 63 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:867 -coverage: 98.732% pattern: 126 before: 63 now: 63 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:765 -coverage: 98.732% pattern: 126 before: 63 now: 63 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:826 -coverage: 98.732% pattern: 126 before: 63 now: 63 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:687 -coverage: 98.732% pattern: 126 before: 63 now: 63 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:810 -coverage: 98.732% pattern: 126 before: 63 now: 63 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:698 -coverage: 98.732% pattern: 126 before: 63 now: 63 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:665 -coverage: 98.732% pattern: 126 before: 63 now: 63 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:869 -coverage: 98.732% pattern: 126 before: 63 now: 63 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:938 -coverage: 98.732% pattern: 126 before: 63 now: 63 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1020 -coverage: 98.732% pattern: 126 before: 63 now: 63 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1102 -coverage: 98.732% pattern: 126 before: 63 now: 63 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:690 -coverage: 98.732% pattern: 126 before: 63 now: 63 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:756 -coverage: 98.732% pattern: 126 before: 63 now: 63 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:801 -coverage: 98.732% pattern: 126 before: 63 now: 63 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:742 -coverage: 98.732% pattern: 126 before: 63 now: 63 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:769 -coverage: 98.732% pattern: 126 before: 63 now: 63 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:661 -coverage: 98.732% pattern: 126 before: 63 now: 63 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:1095 -coverage: 98.753% pattern: 127 before: 63 now: 62 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:805 -coverage: 98.753% pattern: 127 before: 62 now: 62 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:692 -coverage: 98.753% pattern: 127 before: 62 now: 62 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:773 -coverage: 98.753% pattern: 127 before: 62 now: 62 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1414 -coverage: 98.753% pattern: 127 before: 62 now: 62 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1243 -coverage: 98.753% pattern: 127 before: 62 now: 62 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:910 -coverage: 98.753% pattern: 127 before: 62 now: 62 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:664 -coverage: 98.753% pattern: 127 before: 62 now: 62 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:808 -coverage: 98.753% pattern: 127 before: 62 now: 62 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:670 -coverage: 98.753% pattern: 127 before: 62 now: 62 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1092 -coverage: 98.753% pattern: 127 before: 62 now: 62 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:786 -coverage: 98.753% pattern: 127 before: 62 now: 62 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:789 -coverage: 98.753% pattern: 127 before: 62 now: 62 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:956 -coverage: 98.753% pattern: 127 before: 62 now: 62 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1259 -coverage: 98.753% pattern: 127 before: 62 now: 62 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:639 -coverage: 98.753% pattern: 127 before: 62 now: 62 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:815 -coverage: 98.753% pattern: 127 before: 62 now: 62 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:666 -coverage: 98.773% pattern: 128 before: 62 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:694 -coverage: 98.773% pattern: 128 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:803 -coverage: 98.773% pattern: 128 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:803 -coverage: 98.773% pattern: 128 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1109 -coverage: 98.773% pattern: 128 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:761 -coverage: 98.773% pattern: 128 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:726 -coverage: 98.773% pattern: 128 before: 61 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 984, fault_cnt:1229 -coverage: 98.813% pattern: 129 before: 61 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:671 -coverage: 98.813% pattern: 129 before: 59 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:670 -coverage: 98.813% pattern: 129 before: 59 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:787 -coverage: 98.813% pattern: 129 before: 59 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:661 -coverage: 98.813% pattern: 129 before: 59 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:658 -coverage: 98.813% pattern: 129 before: 59 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:793 -coverage: 98.813% pattern: 129 before: 59 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:769 -coverage: 98.813% pattern: 129 before: 59 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:671 -coverage: 98.813% pattern: 129 before: 59 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:716 -coverage: 98.813% pattern: 129 before: 59 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:807 -coverage: 98.813% pattern: 129 before: 59 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:699 -coverage: 98.813% pattern: 129 before: 59 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1070 -coverage: 98.813% pattern: 129 before: 59 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:769 -coverage: 98.813% pattern: 129 before: 59 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:697 -coverage: 98.813% pattern: 129 before: 59 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:779 -coverage: 98.813% pattern: 129 before: 59 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:797 -coverage: 98.813% pattern: 129 before: 59 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1159 -coverage: 98.813% pattern: 129 before: 59 now: 59 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 984, fault_cnt:1269 -coverage: 98.853% pattern: 130 before: 59 now: 57 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:693 -coverage: 98.853% pattern: 130 before: 57 now: 57 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:814 -coverage: 98.853% pattern: 130 before: 57 now: 57 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:810 -coverage: 98.853% pattern: 130 before: 57 now: 57 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 984, fault_cnt:869 -coverage: 98.913% pattern: 131 before: 57 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:761 -coverage: 98.913% pattern: 131 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:773 -coverage: 98.913% pattern: 131 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:663 -coverage: 98.913% pattern: 131 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:712 -coverage: 98.913% pattern: 131 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:797 -coverage: 98.913% pattern: 131 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:654 -coverage: 98.913% pattern: 131 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:782 -coverage: 98.913% pattern: 131 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:805 -coverage: 98.913% pattern: 131 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:722 -coverage: 98.913% pattern: 131 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:742 -coverage: 98.913% pattern: 131 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:810 -coverage: 98.913% pattern: 131 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:831 -coverage: 98.913% pattern: 131 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:756 -coverage: 98.913% pattern: 131 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:823 -coverage: 98.913% pattern: 131 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:688 -coverage: 98.913% pattern: 131 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:787 -coverage: 98.913% pattern: 131 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:760 -coverage: 98.913% pattern: 131 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:715 -coverage: 98.913% pattern: 131 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1151 -coverage: 98.913% pattern: 131 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:966 -coverage: 98.913% pattern: 131 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:801 -coverage: 98.913% pattern: 131 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:781 -coverage: 98.913% pattern: 131 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:817 -coverage: 98.913% pattern: 131 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:694 -coverage: 98.913% pattern: 131 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:679 -coverage: 98.913% pattern: 131 before: 54 now: 54 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:816 -coverage: 98.934% pattern: 132 before: 54 now: 53 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:691 -coverage: 98.934% pattern: 132 before: 53 now: 53 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:656 -coverage: 98.934% pattern: 132 before: 53 now: 53 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:662 -coverage: 98.934% pattern: 132 before: 53 now: 53 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:867 -coverage: 98.934% pattern: 132 before: 53 now: 53 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 984, fault_cnt:1115 -coverage: 98.994% pattern: 133 before: 53 now: 50 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:667 -coverage: 98.994% pattern: 133 before: 50 now: 50 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:757 -coverage: 98.994% pattern: 133 before: 50 now: 50 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:788 -coverage: 98.994% pattern: 133 before: 50 now: 50 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:677 -coverage: 98.994% pattern: 133 before: 50 now: 50 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:812 -coverage: 98.994% pattern: 133 before: 50 now: 50 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:742 -coverage: 98.994% pattern: 133 before: 50 now: 50 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:817 -coverage: 98.994% pattern: 133 before: 50 now: 50 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:806 -coverage: 98.994% pattern: 133 before: 50 now: 50 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1084 -coverage: 98.994% pattern: 133 before: 50 now: 50 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:775 -coverage: 98.994% pattern: 133 before: 50 now: 50 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:963 -coverage: 98.994% pattern: 133 before: 50 now: 50 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:721 -coverage: 98.994% pattern: 133 before: 50 now: 50 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1018 -coverage: 98.994% pattern: 133 before: 50 now: 50 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:708 -coverage: 98.994% pattern: 133 before: 50 now: 50 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:790 -coverage: 98.994% pattern: 133 before: 50 now: 50 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:704 -coverage: 98.994% pattern: 133 before: 50 now: 50 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:834 -coverage: 98.994% pattern: 133 before: 50 now: 50 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:743 -coverage: 98.994% pattern: 133 before: 50 now: 50 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:963 -coverage: 98.994% pattern: 133 before: 50 now: 50 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:679 -coverage: 98.994% pattern: 133 before: 50 now: 50 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:806 -coverage: 98.994% pattern: 133 before: 50 now: 50 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:653 -coverage: 98.994% pattern: 133 before: 50 now: 50 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:764 -coverage: 98.994% pattern: 133 before: 50 now: 50 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:778 -coverage: 98.994% pattern: 133 before: 50 now: 50 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:671 -coverage: 98.994% pattern: 133 before: 50 now: 50 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:837 -coverage: 98.994% pattern: 133 before: 50 now: 50 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:647 -coverage: 98.994% pattern: 133 before: 50 now: 50 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:788 -coverage: 98.994% pattern: 133 before: 50 now: 50 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:634 -coverage: 98.994% pattern: 133 before: 50 now: 50 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:654 -coverage: 98.994% pattern: 133 before: 50 now: 50 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:678 -coverage: 98.994% pattern: 133 before: 50 now: 50 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:727 -coverage: 98.994% pattern: 133 before: 50 now: 50 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:1137 -coverage: 99.014% pattern: 134 before: 50 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:808 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:686 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:833 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:665 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:794 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:770 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:687 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1195 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1068 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:778 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:726 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:964 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:724 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:792 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:679 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:733 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1029 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:865 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:717 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:677 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:752 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:817 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1209 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:766 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:715 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1279 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:782 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:800 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:767 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:806 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:922 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1278 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:982 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:680 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1141 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:726 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:757 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:862 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1111 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:691 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:857 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:809 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:864 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:707 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:929 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:762 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:766 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:686 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:672 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:742 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:685 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:784 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:819 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:951 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:764 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:806 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:757 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:765 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1097 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:674 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:687 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:786 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:668 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:968 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:628 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:855 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:678 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:829 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1065 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:655 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1265 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:645 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:642 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:772 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:760 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:683 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:781 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:875 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:799 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1084 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1167 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1022 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:679 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1321 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:803 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:780 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:759 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:681 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:754 -coverage: 99.014% pattern: 134 before: 49 now: 49 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 984, fault_cnt:1296 -coverage: 99.054% pattern: 135 before: 49 now: 47 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:677 -coverage: 99.054% pattern: 135 before: 47 now: 47 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 984, fault_cnt:1331 -coverage: 99.095% pattern: 136 before: 47 now: 45 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:809 -coverage: 99.095% pattern: 136 before: 45 now: 45 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:769 -coverage: 99.095% pattern: 136 before: 45 now: 45 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:740 -coverage: 99.095% pattern: 136 before: 45 now: 45 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:797 -coverage: 99.095% pattern: 136 before: 45 now: 45 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:700 -coverage: 99.095% pattern: 136 before: 45 now: 45 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:793 -coverage: 99.095% pattern: 136 before: 45 now: 45 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:708 -coverage: 99.095% pattern: 136 before: 45 now: 45 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:755 -coverage: 99.095% pattern: 136 before: 45 now: 45 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:641 -coverage: 99.095% pattern: 136 before: 45 now: 45 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:669 -coverage: 99.095% pattern: 136 before: 45 now: 45 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:789 -coverage: 99.095% pattern: 136 before: 45 now: 45 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:675 -coverage: 99.095% pattern: 136 before: 45 now: 45 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:798 -coverage: 99.095% pattern: 136 before: 45 now: 45 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1244 -coverage: 99.095% pattern: 136 before: 45 now: 45 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1079 -coverage: 99.095% pattern: 136 before: 45 now: 45 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:803 -coverage: 99.095% pattern: 136 before: 45 now: 45 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:963 -coverage: 99.095% pattern: 136 before: 45 now: 45 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:776 -coverage: 99.095% pattern: 136 before: 45 now: 45 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:655 -coverage: 99.095% pattern: 136 before: 45 now: 45 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:714 -coverage: 99.095% pattern: 136 before: 45 now: 45 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:804 -coverage: 99.095% pattern: 136 before: 45 now: 45 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:989 -coverage: 99.095% pattern: 136 before: 45 now: 45 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:786 -coverage: 99.095% pattern: 136 before: 45 now: 45 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:658 -coverage: 99.095% pattern: 136 before: 45 now: 45 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:704 -coverage: 99.095% pattern: 136 before: 45 now: 45 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1102 -coverage: 99.095% pattern: 136 before: 45 now: 45 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:916 -coverage: 99.095% pattern: 136 before: 45 now: 45 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:706 -coverage: 99.095% pattern: 136 before: 45 now: 45 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1004 -coverage: 99.095% pattern: 136 before: 45 now: 45 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1019 -coverage: 99.095% pattern: 136 before: 45 now: 45 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:773 -coverage: 99.095% pattern: 136 before: 45 now: 45 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:777 -coverage: 99.095% pattern: 136 before: 45 now: 45 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:929 -coverage: 99.095% pattern: 136 before: 45 now: 45 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:823 -coverage: 99.095% pattern: 136 before: 45 now: 45 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 984, fault_cnt:1176 -coverage: 99.135% pattern: 137 before: 45 now: 43 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:821 -coverage: 99.135% pattern: 137 before: 43 now: 43 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:834 -coverage: 99.135% pattern: 137 before: 43 now: 43 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:704 -coverage: 99.135% pattern: 137 before: 43 now: 43 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:655 -coverage: 99.135% pattern: 137 before: 43 now: 43 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1153 -coverage: 99.135% pattern: 137 before: 43 now: 43 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:658 -coverage: 99.135% pattern: 137 before: 43 now: 43 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:800 -coverage: 99.135% pattern: 137 before: 43 now: 43 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:782 -coverage: 99.135% pattern: 137 before: 43 now: 43 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:619 -coverage: 99.135% pattern: 137 before: 43 now: 43 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:678 -coverage: 99.135% pattern: 137 before: 43 now: 43 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:631 -coverage: 99.135% pattern: 137 before: 43 now: 43 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:826 -coverage: 99.135% pattern: 137 before: 43 now: 43 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1063 -coverage: 99.135% pattern: 137 before: 43 now: 43 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:938 -coverage: 99.135% pattern: 137 before: 43 now: 43 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1227 -coverage: 99.135% pattern: 137 before: 43 now: 43 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1021 -coverage: 99.135% pattern: 137 before: 43 now: 43 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:749 -coverage: 99.135% pattern: 137 before: 43 now: 43 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:653 -coverage: 99.135% pattern: 137 before: 43 now: 43 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:764 -coverage: 99.135% pattern: 137 before: 43 now: 43 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:900 -coverage: 99.135% pattern: 137 before: 43 now: 43 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:966 -coverage: 99.135% pattern: 137 before: 43 now: 43 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:756 -coverage: 99.135% pattern: 137 before: 43 now: 43 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1080 -coverage: 99.135% pattern: 137 before: 43 now: 43 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:757 -coverage: 99.135% pattern: 137 before: 43 now: 43 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:765 -coverage: 99.135% pattern: 137 before: 43 now: 43 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:690 -coverage: 99.135% pattern: 137 before: 43 now: 43 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:683 -coverage: 99.135% pattern: 137 before: 43 now: 43 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:999 -coverage: 99.135% pattern: 137 before: 43 now: 43 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1041 -coverage: 99.135% pattern: 137 before: 43 now: 43 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:1297 -coverage: 99.155% pattern: 138 before: 43 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:807 -coverage: 99.155% pattern: 138 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:989 -coverage: 99.155% pattern: 138 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1078 -coverage: 99.155% pattern: 138 before: 42 now: 42 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:806 -coverage: 99.175% pattern: 139 before: 42 now: 41 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:728 -coverage: 99.175% pattern: 139 before: 41 now: 41 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:824 -coverage: 99.175% pattern: 139 before: 41 now: 41 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1255 -coverage: 99.175% pattern: 139 before: 41 now: 41 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:780 -coverage: 99.175% pattern: 139 before: 41 now: 41 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:734 -coverage: 99.175% pattern: 139 before: 41 now: 41 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1144 -coverage: 99.175% pattern: 139 before: 41 now: 41 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:820 -coverage: 99.175% pattern: 139 before: 41 now: 41 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:781 -coverage: 99.175% pattern: 139 before: 41 now: 41 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:798 -coverage: 99.175% pattern: 139 before: 41 now: 41 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1149 -coverage: 99.175% pattern: 139 before: 41 now: 41 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1104 -coverage: 99.175% pattern: 139 before: 41 now: 41 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:667 -coverage: 99.175% pattern: 139 before: 41 now: 41 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:966 -coverage: 99.175% pattern: 139 before: 41 now: 41 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:800 -coverage: 99.175% pattern: 139 before: 41 now: 41 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:698 -coverage: 99.175% pattern: 139 before: 41 now: 41 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1087 -coverage: 99.175% pattern: 139 before: 41 now: 41 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:731 -coverage: 99.175% pattern: 139 before: 41 now: 41 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:780 -coverage: 99.175% pattern: 139 before: 41 now: 41 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:766 -coverage: 99.175% pattern: 139 before: 41 now: 41 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:661 -coverage: 99.175% pattern: 139 before: 41 now: 41 -checking valid circuit ... result: 1. diff --git a/exp_result/ATPG-LS_c6288.bench.txt b/exp_result/ATPG-LS_c6288.bench.txt deleted file mode 100644 index a3f83ee..0000000 --- a/exp_result/ATPG-LS_c6288.bench.txt +++ /dev/null @@ -1,499 +0,0 @@ -make: 'atpg' is up to date. -======================== -parsing file ./benchmark/c6288.bench ... Done. -====== Circuit Statistics ====== -PI: 32 -PO: 32 -Gate: 2448 -Stem: 1488 -Level: 7 -================================ -[SOL] flip: 0, stem: 0, fault:41770. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2199 -coverage: 44.914% pattern: 1 before: 4896 now: 2697 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:17100. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2196 -coverage: 63.297% pattern: 2 before: 2697 now: 1797 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:12844. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2205 -coverage: 77.104% pattern: 3 before: 1797 now: 1121 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:7239. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2201 -coverage: 84.886% pattern: 4 before: 1121 now: 740 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:4275. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2202 -coverage: 89.481% pattern: 5 before: 740 now: 515 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:2660. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2187 -coverage: 92.341% pattern: 6 before: 515 now: 375 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:1634. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2189 -coverage: 94.097% pattern: 7 before: 375 now: 289 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:1121. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2192 -coverage: 95.302% pattern: 8 before: 289 now: 230 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:665. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2201 -coverage: 96.017% pattern: 9 before: 230 now: 195 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:950. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2197 -coverage: 97.038% pattern: 10 before: 195 now: 145 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:380. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2167 -coverage: 97.447% pattern: 11 before: 145 now: 125 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:399. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2191 -coverage: 97.876% pattern: 12 before: 125 now: 104 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:190. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2207 -coverage: 98.080% pattern: 13 before: 104 now: 94 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:190. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2208 -coverage: 98.284% pattern: 14 before: 94 now: 84 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2194 -coverage: 98.366% pattern: 15 before: 84 now: 80 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:152. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2173 -coverage: 98.529% pattern: 16 before: 80 now: 72 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:209. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2185 -coverage: 98.754% pattern: 17 before: 72 now: 61 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2189 -coverage: 98.775% pattern: 18 before: 61 now: 60 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:171. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2190 -coverage: 98.958% pattern: 19 before: 60 now: 51 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2188 -coverage: 99.040% pattern: 20 before: 51 now: 47 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:114. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2194 -coverage: 99.163% pattern: 21 before: 47 now: 41 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2185 -coverage: 99.224% pattern: 22 before: 41 now: 38 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2188 -coverage: 99.265% pattern: 23 before: 38 now: 36 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2206 -coverage: 99.265% pattern: 23 before: 36 now: 36 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2204 -coverage: 99.265% pattern: 23 before: 36 now: 36 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2212 -coverage: 99.285% pattern: 24 before: 36 now: 35 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2203 -coverage: 99.326% pattern: 25 before: 35 now: 33 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2195 -coverage: 99.367% pattern: 26 before: 33 now: 31 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2177 -coverage: 99.387% pattern: 27 before: 31 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2180 -coverage: 99.387% pattern: 27 before: 30 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2235 -coverage: 99.408% pattern: 28 before: 30 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2202 -coverage: 99.408% pattern: 28 before: 29 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2184 -coverage: 99.428% pattern: 29 before: 29 now: 28 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2189 -coverage: 99.449% pattern: 30 before: 28 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2189 -coverage: 99.449% pattern: 30 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2189 -coverage: 99.449% pattern: 30 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2195 -coverage: 99.449% pattern: 30 before: 27 now: 27 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2207 -coverage: 99.489% pattern: 31 before: 27 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2195 -coverage: 99.530% pattern: 32 before: 25 now: 23 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2185 -coverage: 99.551% pattern: 33 before: 23 now: 22 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2195 -coverage: 99.551% pattern: 33 before: 22 now: 22 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2182 -coverage: 99.571% pattern: 34 before: 22 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2185 -coverage: 99.571% pattern: 34 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2233 -coverage: 99.571% pattern: 34 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2188 -coverage: 99.571% pattern: 34 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2177 -coverage: 99.571% pattern: 34 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2198 -coverage: 99.571% pattern: 34 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2194 -coverage: 99.571% pattern: 34 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2197 -coverage: 99.571% pattern: 34 before: 21 now: 21 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2179 -coverage: 99.592% pattern: 35 before: 21 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2223 -coverage: 99.592% pattern: 35 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2187 -coverage: 99.592% pattern: 35 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2208 -coverage: 99.592% pattern: 35 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2183 -coverage: 99.592% pattern: 35 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2202 -coverage: 99.592% pattern: 35 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2183 -coverage: 99.592% pattern: 35 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2196 -coverage: 99.592% pattern: 35 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2195 -coverage: 99.592% pattern: 35 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2162 -coverage: 99.592% pattern: 35 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2198 -coverage: 99.592% pattern: 35 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2194 -coverage: 99.592% pattern: 35 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2192 -coverage: 99.592% pattern: 35 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2187 -coverage: 99.592% pattern: 35 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2189 -coverage: 99.592% pattern: 35 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2203 -coverage: 99.592% pattern: 35 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2189 -coverage: 99.592% pattern: 35 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2191 -coverage: 99.592% pattern: 35 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2181 -coverage: 99.592% pattern: 35 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2194 -coverage: 99.592% pattern: 35 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2195 -coverage: 99.592% pattern: 35 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2181 -coverage: 99.592% pattern: 35 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2199 -coverage: 99.592% pattern: 35 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2192 -coverage: 99.592% pattern: 35 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2195 -coverage: 99.592% pattern: 35 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2189 -coverage: 99.592% pattern: 35 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2212 -coverage: 99.592% pattern: 35 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2209 -coverage: 99.592% pattern: 35 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2210 -coverage: 99.592% pattern: 35 before: 20 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2231 -coverage: 99.612% pattern: 36 before: 20 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2189 -coverage: 99.612% pattern: 36 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2191 -coverage: 99.612% pattern: 36 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2191 -coverage: 99.612% pattern: 36 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2215 -coverage: 99.612% pattern: 36 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2199 -coverage: 99.612% pattern: 36 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2191 -coverage: 99.612% pattern: 36 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2194 -coverage: 99.612% pattern: 36 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2190 -coverage: 99.612% pattern: 36 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2189 -coverage: 99.612% pattern: 36 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2190 -coverage: 99.612% pattern: 36 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2196 -coverage: 99.612% pattern: 36 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2197 -coverage: 99.612% pattern: 36 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2193 -coverage: 99.612% pattern: 36 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2197 -coverage: 99.612% pattern: 36 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2195 -coverage: 99.612% pattern: 36 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2186 -coverage: 99.612% pattern: 36 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2191 -coverage: 99.612% pattern: 36 before: 19 now: 19 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2180 -coverage: 99.653% pattern: 37 before: 19 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2200 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2186 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2209 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2192 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2181 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2196 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2190 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2179 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2195 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2203 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2192 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2180 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2183 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2186 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2182 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2184 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2177 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2180 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2189 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2195 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2185 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2172 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2183 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2188 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2193 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2189 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2184 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2179 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2189 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2213 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2174 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2179 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2192 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2174 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2191 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2194 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2199 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2183 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2224 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2203 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2181 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2187 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2190 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2201 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2179 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2198 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2203 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2195 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2191 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2201 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2194 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2192 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2186 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2188 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2201 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2204 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2216 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2202 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2203 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2174 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2189 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2181 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2186 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2170 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2181 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2190 -coverage: 99.653% pattern: 37 before: 17 now: 17 -checking valid circuit ... result: 1. diff --git a/exp_result/ATPG-LS_c7552.bench.txt b/exp_result/ATPG-LS_c7552.bench.txt deleted file mode 100644 index 9af4176..0000000 --- a/exp_result/ATPG-LS_c7552.bench.txt +++ /dev/null @@ -1,1939 +0,0 @@ -make: 'atpg' is up to date. -======================== -parsing file ./benchmark/c7552.bench ... Done. -====== Circuit Statistics ====== -PI: 207 -PO: 108 -Gate: 3719 -Stem: 1537 -Level: 10 -================================ -[SOL] flip: 0, stem: 0, fault:26624. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1413 -coverage: 18.997% pattern: 1 before: 7438 now: 6025 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:21122. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1740 -coverage: 34.149% pattern: 2 before: 6025 now: 4898 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:7932. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1484 -coverage: 40.199% pattern: 3 before: 4898 now: 4448 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:8685. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1482 -coverage: 46.491% pattern: 4 before: 4448 now: 3980 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:6199. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1429 -coverage: 50.901% pattern: 5 before: 3980 now: 3652 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:4890. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1565 -coverage: 54.369% pattern: 6 before: 3652 now: 3394 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:5742. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1591 -coverage: 58.457% pattern: 7 before: 3394 now: 3090 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:4304. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1610 -coverage: 61.589% pattern: 8 before: 3090 now: 2857 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:2698. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1547 -coverage: 63.498% pattern: 9 before: 2857 now: 2715 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:4898. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1678 -coverage: 67.021% pattern: 10 before: 2715 now: 2453 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:2812. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1628 -coverage: 69.010% pattern: 11 before: 2453 now: 2305 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:1333. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1526 -coverage: 69.965% pattern: 12 before: 2305 now: 2234 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:2603. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1643 -coverage: 71.807% pattern: 13 before: 2234 now: 2097 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:1672. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1485 -coverage: 72.990% pattern: 14 before: 2097 now: 2009 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:2831. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1613 -coverage: 74.993% pattern: 15 before: 2009 now: 1860 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:703. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1434 -coverage: 75.491% pattern: 16 before: 1860 now: 1823 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:1596. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1584 -coverage: 76.620% pattern: 17 before: 1823 now: 1739 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:2414. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1696 -coverage: 78.341% pattern: 18 before: 1739 now: 1611 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:1064. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1555 -coverage: 79.094% pattern: 19 before: 1611 now: 1555 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:1805. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1738 -coverage: 80.371% pattern: 20 before: 1555 now: 1460 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:399. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1507 -coverage: 80.653% pattern: 21 before: 1460 now: 1439 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:3800. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1881 -coverage: 83.342% pattern: 22 before: 1439 now: 1239 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:96. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1483 -coverage: 83.423% pattern: 23 before: 1239 now: 1233 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:665. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1526 -coverage: 83.894% pattern: 24 before: 1233 now: 1198 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:665. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1509 -coverage: 84.364% pattern: 25 before: 1198 now: 1163 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:494. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1570 -coverage: 84.714% pattern: 26 before: 1163 now: 1137 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:437. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1417 -coverage: 85.023% pattern: 27 before: 1137 now: 1114 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:551. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1524 -coverage: 85.413% pattern: 28 before: 1114 now: 1085 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:950. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1642 -coverage: 86.085% pattern: 29 before: 1085 now: 1035 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:133. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1479 -coverage: 86.179% pattern: 30 before: 1035 now: 1028 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:152. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1523 -coverage: 86.287% pattern: 31 before: 1028 now: 1020 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1516 -coverage: 86.314% pattern: 32 before: 1020 now: 1018 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:988. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1818 -coverage: 87.013% pattern: 33 before: 1018 now: 966 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1459 -coverage: 87.013% pattern: 33 before: 966 now: 966 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:570. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1558 -coverage: 87.416% pattern: 34 before: 966 now: 936 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:152. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1488 -coverage: 87.524% pattern: 35 before: 936 now: 928 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:361. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1617 -coverage: 87.779% pattern: 36 before: 928 now: 909 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:304. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1638 -coverage: 87.994% pattern: 37 before: 909 now: 893 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1442 -coverage: 87.994% pattern: 37 before: 893 now: 893 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:228. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1744 -coverage: 88.155% pattern: 38 before: 893 now: 881 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1526 -coverage: 88.196% pattern: 39 before: 881 now: 878 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:399. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1749 -coverage: 88.478% pattern: 40 before: 878 now: 857 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:380. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1531 -coverage: 88.747% pattern: 41 before: 857 now: 837 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:133. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1499 -coverage: 88.841% pattern: 42 before: 837 now: 830 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:266. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1642 -coverage: 89.029% pattern: 43 before: 830 now: 816 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:532. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1751 -coverage: 89.406% pattern: 44 before: 816 now: 788 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:171. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1537 -coverage: 89.527% pattern: 45 before: 788 now: 779 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:228. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1593 -coverage: 89.688% pattern: 46 before: 779 now: 767 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:114. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1473 -coverage: 89.769% pattern: 47 before: 767 now: 761 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:114. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1547 -coverage: 89.849% pattern: 48 before: 761 now: 755 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1463 -coverage: 89.876% pattern: 49 before: 755 now: 753 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:209. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1505 -coverage: 90.024% pattern: 50 before: 753 now: 742 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1423 -coverage: 90.051% pattern: 51 before: 742 now: 740 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:209. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1577 -coverage: 90.199% pattern: 52 before: 740 now: 729 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1477 -coverage: 90.239% pattern: 53 before: 729 now: 726 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1456 -coverage: 90.239% pattern: 53 before: 726 now: 726 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:342. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1477 -coverage: 90.481% pattern: 54 before: 726 now: 708 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:304. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1698 -coverage: 90.696% pattern: 55 before: 708 now: 692 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1472 -coverage: 90.750% pattern: 56 before: 692 now: 688 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:133. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1627 -coverage: 90.844% pattern: 57 before: 688 now: 681 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:760. flip_cnt: 0, stem_cnt: 1537, fault_cnt:2033 -coverage: 91.382% pattern: 58 before: 681 now: 641 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1444 -coverage: 91.382% pattern: 58 before: 641 now: 641 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1544 -coverage: 91.409% pattern: 59 before: 641 now: 639 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:304. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1783 -coverage: 91.624% pattern: 60 before: 639 now: 623 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1522 -coverage: 91.691% pattern: 61 before: 623 now: 618 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1426 -coverage: 91.718% pattern: 62 before: 618 now: 616 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:228. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1586 -coverage: 91.880% pattern: 63 before: 616 now: 604 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1575 -coverage: 91.880% pattern: 63 before: 604 now: 604 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1444 -coverage: 91.906% pattern: 64 before: 604 now: 602 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1853 -coverage: 91.974% pattern: 65 before: 602 now: 597 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1500 -coverage: 92.001% pattern: 66 before: 597 now: 595 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1628 -coverage: 92.068% pattern: 67 before: 595 now: 590 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1517 -coverage: 92.135% pattern: 68 before: 590 now: 585 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:133. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1492 -coverage: 92.229% pattern: 69 before: 585 now: 578 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1459 -coverage: 92.229% pattern: 69 before: 578 now: 578 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1485 -coverage: 92.229% pattern: 69 before: 578 now: 578 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:209. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1900 -coverage: 92.377% pattern: 70 before: 578 now: 567 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1438 -coverage: 92.377% pattern: 70 before: 567 now: 567 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1524 -coverage: 92.377% pattern: 70 before: 567 now: 567 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1561 -coverage: 92.377% pattern: 70 before: 567 now: 567 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1555 -coverage: 92.390% pattern: 71 before: 567 now: 566 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1527 -coverage: 92.404% pattern: 72 before: 566 now: 565 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1441 -coverage: 92.417% pattern: 73 before: 565 now: 564 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1481 -coverage: 92.417% pattern: 73 before: 564 now: 564 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1578 -coverage: 92.417% pattern: 73 before: 564 now: 564 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1535 -coverage: 92.417% pattern: 73 before: 564 now: 564 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1548 -coverage: 92.458% pattern: 74 before: 564 now: 561 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1565 -coverage: 92.485% pattern: 75 before: 561 now: 559 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1454 -coverage: 92.525% pattern: 76 before: 559 now: 556 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1692 -coverage: 92.565% pattern: 77 before: 556 now: 553 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1518 -coverage: 92.606% pattern: 78 before: 553 now: 550 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1642 -coverage: 92.632% pattern: 79 before: 550 now: 548 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1450 -coverage: 92.632% pattern: 79 before: 548 now: 548 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:133. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1947 -coverage: 92.727% pattern: 80 before: 548 now: 541 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1442 -coverage: 92.727% pattern: 80 before: 541 now: 541 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1522 -coverage: 92.753% pattern: 81 before: 541 now: 539 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1523 -coverage: 92.780% pattern: 82 before: 539 now: 537 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:741. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1682 -coverage: 93.305% pattern: 83 before: 537 now: 498 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1632 -coverage: 93.305% pattern: 83 before: 498 now: 498 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1534 -coverage: 93.318% pattern: 84 before: 498 now: 497 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:133. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1475 -coverage: 93.412% pattern: 85 before: 497 now: 490 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1477 -coverage: 93.412% pattern: 85 before: 490 now: 490 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1472 -coverage: 93.412% pattern: 85 before: 490 now: 490 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1490 -coverage: 93.439% pattern: 86 before: 490 now: 488 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1496 -coverage: 93.439% pattern: 86 before: 488 now: 488 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1812 -coverage: 93.493% pattern: 87 before: 488 now: 484 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1582 -coverage: 93.520% pattern: 88 before: 484 now: 482 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:114. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1647 -coverage: 93.600% pattern: 89 before: 482 now: 476 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1542 -coverage: 93.600% pattern: 89 before: 476 now: 476 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1565 -coverage: 93.600% pattern: 89 before: 476 now: 476 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1427 -coverage: 93.600% pattern: 89 before: 476 now: 476 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1481 -coverage: 93.627% pattern: 90 before: 476 now: 474 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1461 -coverage: 93.695% pattern: 91 before: 474 now: 469 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1574 -coverage: 93.695% pattern: 91 before: 469 now: 469 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1548 -coverage: 93.695% pattern: 91 before: 469 now: 469 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1861 -coverage: 93.695% pattern: 91 before: 469 now: 469 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1567 -coverage: 93.721% pattern: 92 before: 469 now: 467 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1755 -coverage: 93.748% pattern: 93 before: 467 now: 465 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1621 -coverage: 93.802% pattern: 94 before: 465 now: 461 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1485 -coverage: 93.802% pattern: 94 before: 461 now: 461 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1600 -coverage: 93.856% pattern: 95 before: 461 now: 457 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1579 -coverage: 93.883% pattern: 96 before: 457 now: 455 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1761 -coverage: 93.937% pattern: 97 before: 455 now: 451 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1432 -coverage: 93.937% pattern: 97 before: 451 now: 451 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1425 -coverage: 93.937% pattern: 97 before: 451 now: 451 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1893 -coverage: 93.977% pattern: 98 before: 451 now: 448 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1421 -coverage: 93.977% pattern: 98 before: 448 now: 448 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1462 -coverage: 93.990% pattern: 99 before: 448 now: 447 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1452 -coverage: 93.990% pattern: 99 before: 447 now: 447 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1864 -coverage: 93.990% pattern: 99 before: 447 now: 447 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1633 -coverage: 94.017% pattern: 100 before: 447 now: 445 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1834 -coverage: 94.017% pattern: 100 before: 445 now: 445 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1903 -coverage: 94.017% pattern: 100 before: 445 now: 445 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1425 -coverage: 94.017% pattern: 100 before: 445 now: 445 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1525 -coverage: 94.017% pattern: 100 before: 445 now: 445 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1490 -coverage: 94.017% pattern: 100 before: 445 now: 445 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1540 -coverage: 94.044% pattern: 101 before: 445 now: 443 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1573 -coverage: 94.044% pattern: 101 before: 443 now: 443 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1564 -coverage: 94.044% pattern: 101 before: 443 now: 443 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1521 -coverage: 94.071% pattern: 102 before: 443 now: 441 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1446 -coverage: 94.071% pattern: 102 before: 441 now: 441 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1600 -coverage: 94.071% pattern: 102 before: 441 now: 441 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1466 -coverage: 94.125% pattern: 103 before: 441 now: 437 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1545 -coverage: 94.125% pattern: 103 before: 437 now: 437 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1556 -coverage: 94.125% pattern: 103 before: 437 now: 437 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1590 -coverage: 94.125% pattern: 103 before: 437 now: 437 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1593 -coverage: 94.125% pattern: 103 before: 437 now: 437 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1450 -coverage: 94.125% pattern: 103 before: 437 now: 437 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1419 -coverage: 94.125% pattern: 103 before: 437 now: 437 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1585 -coverage: 94.125% pattern: 103 before: 437 now: 437 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1567 -coverage: 94.125% pattern: 103 before: 437 now: 437 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1824 -coverage: 94.138% pattern: 104 before: 437 now: 436 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1496 -coverage: 94.138% pattern: 104 before: 436 now: 436 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1503 -coverage: 94.138% pattern: 104 before: 436 now: 436 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1640 -coverage: 94.165% pattern: 105 before: 436 now: 434 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1577 -coverage: 94.165% pattern: 105 before: 434 now: 434 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 1537, fault_cnt:2151 -coverage: 94.192% pattern: 106 before: 434 now: 432 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1646 -coverage: 94.219% pattern: 107 before: 432 now: 430 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1484 -coverage: 94.246% pattern: 108 before: 430 now: 428 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1573 -coverage: 94.246% pattern: 108 before: 428 now: 428 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1519 -coverage: 94.246% pattern: 108 before: 428 now: 428 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1894 -coverage: 94.286% pattern: 109 before: 428 now: 425 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1611 -coverage: 94.286% pattern: 109 before: 425 now: 425 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1548 -coverage: 94.286% pattern: 109 before: 425 now: 425 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1589 -coverage: 94.286% pattern: 109 before: 425 now: 425 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1725 -coverage: 94.326% pattern: 110 before: 425 now: 422 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1465 -coverage: 94.326% pattern: 110 before: 422 now: 422 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1624 -coverage: 94.326% pattern: 110 before: 422 now: 422 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1527 -coverage: 94.326% pattern: 110 before: 422 now: 422 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1819 -coverage: 94.326% pattern: 110 before: 422 now: 422 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1513 -coverage: 94.380% pattern: 111 before: 422 now: 418 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1459 -coverage: 94.380% pattern: 111 before: 418 now: 418 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1737 -coverage: 94.380% pattern: 111 before: 418 now: 418 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1450 -coverage: 94.407% pattern: 112 before: 418 now: 416 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1454 -coverage: 94.407% pattern: 112 before: 416 now: 416 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1816 -coverage: 94.407% pattern: 112 before: 416 now: 416 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1515 -coverage: 94.407% pattern: 112 before: 416 now: 416 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1594 -coverage: 94.407% pattern: 112 before: 416 now: 416 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1550 -coverage: 94.407% pattern: 112 before: 416 now: 416 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:2149 -coverage: 94.407% pattern: 112 before: 416 now: 416 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1436 -coverage: 94.407% pattern: 112 before: 416 now: 416 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1471 -coverage: 94.407% pattern: 112 before: 416 now: 416 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1717 -coverage: 94.407% pattern: 112 before: 416 now: 416 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1435 -coverage: 94.407% pattern: 112 before: 416 now: 416 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1433 -coverage: 94.407% pattern: 112 before: 416 now: 416 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1616 -coverage: 94.407% pattern: 112 before: 416 now: 416 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1446 -coverage: 94.407% pattern: 112 before: 416 now: 416 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1502 -coverage: 94.407% pattern: 112 before: 416 now: 416 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1457 -coverage: 94.407% pattern: 112 before: 416 now: 416 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1471 -coverage: 94.407% pattern: 112 before: 416 now: 416 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1570 -coverage: 94.407% pattern: 112 before: 416 now: 416 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1420 -coverage: 94.407% pattern: 112 before: 416 now: 416 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1623 -coverage: 94.407% pattern: 112 before: 416 now: 416 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1804 -coverage: 94.461% pattern: 113 before: 416 now: 412 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1573 -coverage: 94.515% pattern: 114 before: 412 now: 408 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1516 -coverage: 94.515% pattern: 114 before: 408 now: 408 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1457 -coverage: 94.515% pattern: 114 before: 408 now: 408 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1472 -coverage: 94.515% pattern: 114 before: 408 now: 408 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1575 -coverage: 94.515% pattern: 114 before: 408 now: 408 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1536 -coverage: 94.515% pattern: 114 before: 408 now: 408 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1443 -coverage: 94.515% pattern: 114 before: 408 now: 408 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:2011 -coverage: 94.515% pattern: 114 before: 408 now: 408 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1468 -coverage: 94.515% pattern: 114 before: 408 now: 408 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1506 -coverage: 94.515% pattern: 114 before: 408 now: 408 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1502 -coverage: 94.515% pattern: 114 before: 408 now: 408 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1430 -coverage: 94.515% pattern: 114 before: 408 now: 408 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1526 -coverage: 94.582% pattern: 115 before: 408 now: 403 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1547 -coverage: 94.582% pattern: 115 before: 403 now: 403 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1750 -coverage: 94.582% pattern: 115 before: 403 now: 403 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1701 -coverage: 94.582% pattern: 115 before: 403 now: 403 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1468 -coverage: 94.582% pattern: 115 before: 403 now: 403 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1492 -coverage: 94.582% pattern: 115 before: 403 now: 403 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1560 -coverage: 94.582% pattern: 115 before: 403 now: 403 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1460 -coverage: 94.582% pattern: 115 before: 403 now: 403 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1486 -coverage: 94.582% pattern: 115 before: 403 now: 403 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1467 -coverage: 94.582% pattern: 115 before: 403 now: 403 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1712 -coverage: 94.582% pattern: 115 before: 403 now: 403 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1518 -coverage: 94.582% pattern: 115 before: 403 now: 403 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1533 -coverage: 94.582% pattern: 115 before: 403 now: 403 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1622 -coverage: 94.582% pattern: 115 before: 403 now: 403 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1452 -coverage: 94.582% pattern: 115 before: 403 now: 403 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1418 -coverage: 94.582% pattern: 115 before: 403 now: 403 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1462 -coverage: 94.582% pattern: 115 before: 403 now: 403 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1450 -coverage: 94.582% pattern: 115 before: 403 now: 403 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1658 -coverage: 94.582% pattern: 115 before: 403 now: 403 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1539 -coverage: 94.582% pattern: 115 before: 403 now: 403 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1552 -coverage: 94.582% pattern: 115 before: 403 now: 403 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1562 -coverage: 94.582% pattern: 115 before: 403 now: 403 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1533 -coverage: 94.582% pattern: 115 before: 403 now: 403 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1432 -coverage: 94.582% pattern: 115 before: 403 now: 403 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1425 -coverage: 94.582% pattern: 115 before: 403 now: 403 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1518 -coverage: 94.582% pattern: 115 before: 403 now: 403 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1517 -coverage: 94.582% pattern: 115 before: 403 now: 403 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1446 -coverage: 94.582% pattern: 115 before: 403 now: 403 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1483 -coverage: 94.595% pattern: 116 before: 403 now: 402 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1592 -coverage: 94.595% pattern: 116 before: 402 now: 402 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1505 -coverage: 94.595% pattern: 116 before: 402 now: 402 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1455 -coverage: 94.595% pattern: 116 before: 402 now: 402 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1606 -coverage: 94.595% pattern: 116 before: 402 now: 402 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1498 -coverage: 94.595% pattern: 116 before: 402 now: 402 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1835 -coverage: 94.609% pattern: 117 before: 402 now: 401 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1751 -coverage: 94.609% pattern: 117 before: 401 now: 401 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1586 -coverage: 94.609% pattern: 117 before: 401 now: 401 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1573 -coverage: 94.609% pattern: 117 before: 401 now: 401 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1500 -coverage: 94.609% pattern: 117 before: 401 now: 401 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1528 -coverage: 94.609% pattern: 117 before: 401 now: 401 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1844 -coverage: 94.609% pattern: 117 before: 401 now: 401 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1844 -coverage: 94.609% pattern: 117 before: 401 now: 401 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1515 -coverage: 94.609% pattern: 117 before: 401 now: 401 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1494 -coverage: 94.609% pattern: 117 before: 401 now: 401 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1573 -coverage: 94.609% pattern: 117 before: 401 now: 401 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1922 -coverage: 94.609% pattern: 117 before: 401 now: 401 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1509 -coverage: 94.609% pattern: 117 before: 401 now: 401 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1423 -coverage: 94.609% pattern: 117 before: 401 now: 401 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1503 -coverage: 94.609% pattern: 117 before: 401 now: 401 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1532 -coverage: 94.609% pattern: 117 before: 401 now: 401 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1489 -coverage: 94.609% pattern: 117 before: 401 now: 401 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1508 -coverage: 94.609% pattern: 117 before: 401 now: 401 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1573 -coverage: 94.609% pattern: 117 before: 401 now: 401 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1582 -coverage: 94.609% pattern: 117 before: 401 now: 401 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1561 -coverage: 94.609% pattern: 117 before: 401 now: 401 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1462 -coverage: 94.609% pattern: 117 before: 401 now: 401 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1710 -coverage: 94.609% pattern: 117 before: 401 now: 401 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1560 -coverage: 94.609% pattern: 117 before: 401 now: 401 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1540 -coverage: 94.609% pattern: 117 before: 401 now: 401 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1538 -coverage: 94.609% pattern: 117 before: 401 now: 401 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1871 -coverage: 94.609% pattern: 117 before: 401 now: 401 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1662 -coverage: 94.609% pattern: 117 before: 401 now: 401 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1522 -coverage: 94.609% pattern: 117 before: 401 now: 401 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1600 -coverage: 94.609% pattern: 117 before: 401 now: 401 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1624 -coverage: 94.609% pattern: 117 before: 401 now: 401 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1559 -coverage: 94.609% pattern: 117 before: 401 now: 401 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1775 -coverage: 94.609% pattern: 117 before: 401 now: 401 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1770 -coverage: 94.609% pattern: 117 before: 401 now: 401 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1449 -coverage: 94.609% pattern: 117 before: 401 now: 401 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1434 -coverage: 94.609% pattern: 117 before: 401 now: 401 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1537 -coverage: 94.609% pattern: 117 before: 401 now: 401 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1568 -coverage: 94.609% pattern: 117 before: 401 now: 401 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1648 -coverage: 94.609% pattern: 117 before: 401 now: 401 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1441 -coverage: 94.609% pattern: 117 before: 401 now: 401 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1485 -coverage: 94.609% pattern: 117 before: 401 now: 401 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1436 -coverage: 94.609% pattern: 117 before: 401 now: 401 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1521 -coverage: 94.609% pattern: 117 before: 401 now: 401 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1415 -coverage: 94.609% pattern: 117 before: 401 now: 401 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1732 -coverage: 94.609% pattern: 117 before: 401 now: 401 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1572 -coverage: 94.609% pattern: 117 before: 401 now: 401 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1480 -coverage: 94.609% pattern: 117 before: 401 now: 401 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1811 -coverage: 94.622% pattern: 118 before: 401 now: 400 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1579 -coverage: 94.622% pattern: 118 before: 400 now: 400 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1537 -coverage: 94.622% pattern: 118 before: 400 now: 400 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1559 -coverage: 94.622% pattern: 118 before: 400 now: 400 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1695 -coverage: 94.622% pattern: 118 before: 400 now: 400 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1704 -coverage: 94.622% pattern: 118 before: 400 now: 400 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1613 -coverage: 94.622% pattern: 118 before: 400 now: 400 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1603 -coverage: 94.649% pattern: 119 before: 400 now: 398 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1430 -coverage: 94.649% pattern: 119 before: 398 now: 398 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1510 -coverage: 94.649% pattern: 119 before: 398 now: 398 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1635 -coverage: 94.649% pattern: 119 before: 398 now: 398 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1662 -coverage: 94.649% pattern: 119 before: 398 now: 398 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1486 -coverage: 94.649% pattern: 119 before: 398 now: 398 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1418 -coverage: 94.649% pattern: 119 before: 398 now: 398 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1495 -coverage: 94.649% pattern: 119 before: 398 now: 398 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1523 -coverage: 94.649% pattern: 119 before: 398 now: 398 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:152. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1522 -coverage: 94.757% pattern: 120 before: 398 now: 390 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1524 -coverage: 94.757% pattern: 120 before: 390 now: 390 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1578 -coverage: 94.757% pattern: 120 before: 390 now: 390 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:2157 -coverage: 94.757% pattern: 120 before: 390 now: 390 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1559 -coverage: 94.757% pattern: 120 before: 390 now: 390 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1441 -coverage: 94.757% pattern: 120 before: 390 now: 390 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1500 -coverage: 94.757% pattern: 120 before: 390 now: 390 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1569 -coverage: 94.757% pattern: 120 before: 390 now: 390 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1617 -coverage: 94.757% pattern: 120 before: 390 now: 390 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1772 -coverage: 94.757% pattern: 120 before: 390 now: 390 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1549 -coverage: 94.757% pattern: 120 before: 390 now: 390 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1538 -coverage: 94.757% pattern: 120 before: 390 now: 390 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1847 -coverage: 94.757% pattern: 120 before: 390 now: 390 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1425 -coverage: 94.757% pattern: 120 before: 390 now: 390 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1410 -coverage: 94.757% pattern: 120 before: 390 now: 390 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1611 -coverage: 94.757% pattern: 120 before: 390 now: 390 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1513 -coverage: 94.757% pattern: 120 before: 390 now: 390 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1546 -coverage: 94.757% pattern: 120 before: 390 now: 390 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1448 -coverage: 94.757% pattern: 120 before: 390 now: 390 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1470 -coverage: 94.757% pattern: 120 before: 390 now: 390 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1455 -coverage: 94.757% pattern: 120 before: 390 now: 390 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1558 -coverage: 94.757% pattern: 120 before: 390 now: 390 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1503 -coverage: 94.757% pattern: 120 before: 390 now: 390 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1597 -coverage: 94.757% pattern: 120 before: 390 now: 390 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1535 -coverage: 94.757% pattern: 120 before: 390 now: 390 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1590 -coverage: 94.757% pattern: 120 before: 390 now: 390 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1533 -coverage: 94.757% pattern: 120 before: 390 now: 390 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1534 -coverage: 94.757% pattern: 120 before: 390 now: 390 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1429 -coverage: 94.757% pattern: 120 before: 390 now: 390 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1800 -coverage: 94.757% pattern: 120 before: 390 now: 390 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1442 -coverage: 94.757% pattern: 120 before: 390 now: 390 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1561 -coverage: 94.757% pattern: 120 before: 390 now: 390 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1507 -coverage: 94.757% pattern: 120 before: 390 now: 390 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1451 -coverage: 94.757% pattern: 120 before: 390 now: 390 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1452 -coverage: 94.757% pattern: 120 before: 390 now: 390 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1484 -coverage: 94.757% pattern: 120 before: 390 now: 390 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1482 -coverage: 94.757% pattern: 120 before: 390 now: 390 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1505 -coverage: 94.757% pattern: 120 before: 390 now: 390 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1502 -coverage: 94.757% pattern: 120 before: 390 now: 390 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1518 -coverage: 94.757% pattern: 120 before: 390 now: 390 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1572 -coverage: 94.757% pattern: 120 before: 390 now: 390 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1422 -coverage: 94.757% pattern: 120 before: 390 now: 390 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1481 -coverage: 94.757% pattern: 120 before: 390 now: 390 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1468 -coverage: 94.757% pattern: 120 before: 390 now: 390 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1587 -coverage: 94.757% pattern: 120 before: 390 now: 390 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1561 -coverage: 94.757% pattern: 120 before: 390 now: 390 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1764 -coverage: 94.757% pattern: 120 before: 390 now: 390 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1561 -coverage: 94.757% pattern: 120 before: 390 now: 390 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1454 -coverage: 94.757% pattern: 120 before: 390 now: 390 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1478 -coverage: 94.757% pattern: 120 before: 390 now: 390 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1976 -coverage: 94.757% pattern: 120 before: 390 now: 390 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1597 -coverage: 94.757% pattern: 120 before: 390 now: 390 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1590 -coverage: 94.757% pattern: 120 before: 390 now: 390 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:190. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1517 -coverage: 94.891% pattern: 121 before: 390 now: 380 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1427 -coverage: 94.891% pattern: 121 before: 380 now: 380 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1562 -coverage: 94.891% pattern: 121 before: 380 now: 380 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1472 -coverage: 94.891% pattern: 121 before: 380 now: 380 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1547 -coverage: 94.891% pattern: 121 before: 380 now: 380 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1624 -coverage: 94.891% pattern: 121 before: 380 now: 380 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1458 -coverage: 94.891% pattern: 121 before: 380 now: 380 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1478 -coverage: 94.891% pattern: 121 before: 380 now: 380 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1798 -coverage: 94.891% pattern: 121 before: 380 now: 380 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1428 -coverage: 94.891% pattern: 121 before: 380 now: 380 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1424 -coverage: 94.891% pattern: 121 before: 380 now: 380 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1444 -coverage: 94.891% pattern: 121 before: 380 now: 380 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1515 -coverage: 94.891% pattern: 121 before: 380 now: 380 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1826 -coverage: 94.891% pattern: 121 before: 380 now: 380 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1520 -coverage: 94.891% pattern: 121 before: 380 now: 380 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1476 -coverage: 94.891% pattern: 121 before: 380 now: 380 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1528 -coverage: 94.891% pattern: 121 before: 380 now: 380 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1497 -coverage: 94.891% pattern: 121 before: 380 now: 380 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1443 -coverage: 94.891% pattern: 121 before: 380 now: 380 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1551 -coverage: 94.891% pattern: 121 before: 380 now: 380 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1481 -coverage: 94.891% pattern: 121 before: 380 now: 380 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1553 -coverage: 94.891% pattern: 121 before: 380 now: 380 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1467 -coverage: 94.891% pattern: 121 before: 380 now: 380 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1843 -coverage: 94.891% pattern: 121 before: 380 now: 380 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1536 -coverage: 94.891% pattern: 121 before: 380 now: 380 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1530 -coverage: 94.891% pattern: 121 before: 380 now: 380 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1513 -coverage: 94.891% pattern: 121 before: 380 now: 380 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1416 -coverage: 94.891% pattern: 121 before: 380 now: 380 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1543 -coverage: 94.891% pattern: 121 before: 380 now: 380 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1561 -coverage: 94.891% pattern: 121 before: 380 now: 380 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1555 -coverage: 94.891% pattern: 121 before: 380 now: 380 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1438 -coverage: 94.891% pattern: 121 before: 380 now: 380 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1603 -coverage: 94.945% pattern: 122 before: 380 now: 376 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1530 -coverage: 94.945% pattern: 122 before: 376 now: 376 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1441 -coverage: 94.945% pattern: 122 before: 376 now: 376 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1474 -coverage: 94.945% pattern: 122 before: 376 now: 376 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1865 -coverage: 94.945% pattern: 122 before: 376 now: 376 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1495 -coverage: 94.945% pattern: 122 before: 376 now: 376 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1478 -coverage: 94.945% pattern: 122 before: 376 now: 376 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1835 -coverage: 94.945% pattern: 122 before: 376 now: 376 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1642 -coverage: 94.945% pattern: 122 before: 376 now: 376 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1589 -coverage: 94.945% pattern: 122 before: 376 now: 376 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1479 -coverage: 94.945% pattern: 122 before: 376 now: 376 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1422 -coverage: 94.945% pattern: 122 before: 376 now: 376 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1436 -coverage: 94.945% pattern: 122 before: 376 now: 376 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1568 -coverage: 94.945% pattern: 122 before: 376 now: 376 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1434 -coverage: 94.945% pattern: 122 before: 376 now: 376 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1516 -coverage: 94.945% pattern: 122 before: 376 now: 376 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1449 -coverage: 94.945% pattern: 122 before: 376 now: 376 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1584 -coverage: 94.945% pattern: 122 before: 376 now: 376 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1504 -coverage: 94.945% pattern: 122 before: 376 now: 376 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1571 -coverage: 94.945% pattern: 122 before: 376 now: 376 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1860 -coverage: 94.945% pattern: 122 before: 376 now: 376 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1456 -coverage: 94.945% pattern: 122 before: 376 now: 376 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1541 -coverage: 94.945% pattern: 122 before: 376 now: 376 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1556 -coverage: 94.945% pattern: 122 before: 376 now: 376 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1518 -coverage: 94.945% pattern: 122 before: 376 now: 376 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1414 -coverage: 94.945% pattern: 122 before: 376 now: 376 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1510 -coverage: 94.945% pattern: 122 before: 376 now: 376 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:285. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1683 -coverage: 95.147% pattern: 123 before: 376 now: 361 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1411 -coverage: 95.147% pattern: 123 before: 361 now: 361 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1550 -coverage: 95.147% pattern: 123 before: 361 now: 361 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1733 -coverage: 95.147% pattern: 123 before: 361 now: 361 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1557 -coverage: 95.147% pattern: 123 before: 361 now: 361 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1549 -coverage: 95.147% pattern: 123 before: 361 now: 361 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1557 -coverage: 95.147% pattern: 123 before: 361 now: 361 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1542 -coverage: 95.147% pattern: 123 before: 361 now: 361 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1522 -coverage: 95.147% pattern: 123 before: 361 now: 361 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1506 -coverage: 95.147% pattern: 123 before: 361 now: 361 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1659 -coverage: 95.147% pattern: 123 before: 361 now: 361 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1443 -coverage: 95.147% pattern: 123 before: 361 now: 361 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1560 -coverage: 95.147% pattern: 123 before: 361 now: 361 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1445 -coverage: 95.147% pattern: 123 before: 361 now: 361 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1453 -coverage: 95.147% pattern: 123 before: 361 now: 361 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1593 -coverage: 95.200% pattern: 124 before: 361 now: 357 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1503 -coverage: 95.200% pattern: 124 before: 357 now: 357 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1553 -coverage: 95.200% pattern: 124 before: 357 now: 357 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1516 -coverage: 95.200% pattern: 124 before: 357 now: 357 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1426 -coverage: 95.200% pattern: 124 before: 357 now: 357 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1670 -coverage: 95.200% pattern: 124 before: 357 now: 357 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1586 -coverage: 95.200% pattern: 124 before: 357 now: 357 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1477 -coverage: 95.200% pattern: 124 before: 357 now: 357 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1573 -coverage: 95.200% pattern: 124 before: 357 now: 357 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1508 -coverage: 95.200% pattern: 124 before: 357 now: 357 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1700 -coverage: 95.200% pattern: 124 before: 357 now: 357 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1516 -coverage: 95.200% pattern: 124 before: 357 now: 357 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1534 -coverage: 95.200% pattern: 124 before: 357 now: 357 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1642 -coverage: 95.214% pattern: 125 before: 357 now: 356 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1500 -coverage: 95.214% pattern: 125 before: 356 now: 356 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1585 -coverage: 95.214% pattern: 125 before: 356 now: 356 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1933 -coverage: 95.214% pattern: 125 before: 356 now: 356 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1473 -coverage: 95.214% pattern: 125 before: 356 now: 356 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1488 -coverage: 95.214% pattern: 125 before: 356 now: 356 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1529 -coverage: 95.214% pattern: 125 before: 356 now: 356 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1517 -coverage: 95.214% pattern: 125 before: 356 now: 356 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1504 -coverage: 95.214% pattern: 125 before: 356 now: 356 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1833 -coverage: 95.214% pattern: 125 before: 356 now: 356 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1557 -coverage: 95.214% pattern: 125 before: 356 now: 356 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1731 -coverage: 95.214% pattern: 125 before: 356 now: 356 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1430 -coverage: 95.214% pattern: 125 before: 356 now: 356 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1588 -coverage: 95.214% pattern: 125 before: 356 now: 356 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1560 -coverage: 95.214% pattern: 125 before: 356 now: 356 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1422 -coverage: 95.214% pattern: 125 before: 356 now: 356 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1472 -coverage: 95.214% pattern: 125 before: 356 now: 356 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1398 -coverage: 95.214% pattern: 125 before: 356 now: 356 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1452 -coverage: 95.254% pattern: 126 before: 356 now: 353 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1460 -coverage: 95.254% pattern: 126 before: 353 now: 353 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1559 -coverage: 95.254% pattern: 126 before: 353 now: 353 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1551 -coverage: 95.254% pattern: 126 before: 353 now: 353 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:6. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1896 -coverage: 95.268% pattern: 127 before: 353 now: 352 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1576 -coverage: 95.268% pattern: 127 before: 352 now: 352 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1916 -coverage: 95.268% pattern: 127 before: 352 now: 352 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1544 -coverage: 95.268% pattern: 127 before: 352 now: 352 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1485 -coverage: 95.268% pattern: 127 before: 352 now: 352 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1712 -coverage: 95.268% pattern: 127 before: 352 now: 352 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1592 -coverage: 95.268% pattern: 127 before: 352 now: 352 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1428 -coverage: 95.268% pattern: 127 before: 352 now: 352 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1601 -coverage: 95.268% pattern: 127 before: 352 now: 352 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1640 -coverage: 95.268% pattern: 127 before: 352 now: 352 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1462 -coverage: 95.268% pattern: 127 before: 352 now: 352 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1449 -coverage: 95.268% pattern: 127 before: 352 now: 352 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1456 -coverage: 95.268% pattern: 127 before: 352 now: 352 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1458 -coverage: 95.268% pattern: 127 before: 352 now: 352 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1492 -coverage: 95.268% pattern: 127 before: 352 now: 352 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1749 -coverage: 95.268% pattern: 127 before: 352 now: 352 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1520 -coverage: 95.268% pattern: 127 before: 352 now: 352 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1520 -coverage: 95.268% pattern: 127 before: 352 now: 352 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1416 -coverage: 95.268% pattern: 127 before: 352 now: 352 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1412 -coverage: 95.268% pattern: 127 before: 352 now: 352 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1446 -coverage: 95.268% pattern: 127 before: 352 now: 352 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1421 -coverage: 95.268% pattern: 127 before: 352 now: 352 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1453 -coverage: 95.268% pattern: 127 before: 352 now: 352 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1550 -coverage: 95.268% pattern: 127 before: 352 now: 352 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1652 -coverage: 95.268% pattern: 127 before: 352 now: 352 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1570 -coverage: 95.268% pattern: 127 before: 352 now: 352 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1581 -coverage: 95.268% pattern: 127 before: 352 now: 352 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1447 -coverage: 95.268% pattern: 127 before: 352 now: 352 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1466 -coverage: 95.268% pattern: 127 before: 352 now: 352 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1579 -coverage: 95.268% pattern: 127 before: 352 now: 352 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1423 -coverage: 95.268% pattern: 127 before: 352 now: 352 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1430 -coverage: 95.268% pattern: 127 before: 352 now: 352 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1551 -coverage: 95.268% pattern: 127 before: 352 now: 352 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1751 -coverage: 95.268% pattern: 127 before: 352 now: 352 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1578 -coverage: 95.268% pattern: 127 before: 352 now: 352 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1517 -coverage: 95.268% pattern: 127 before: 352 now: 352 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1700 -coverage: 95.268% pattern: 127 before: 352 now: 352 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1442 -coverage: 95.268% pattern: 127 before: 352 now: 352 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1735 -coverage: 95.268% pattern: 127 before: 352 now: 352 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1568 -coverage: 95.268% pattern: 127 before: 352 now: 352 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1456 -coverage: 95.268% pattern: 127 before: 352 now: 352 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1467 -coverage: 95.268% pattern: 127 before: 352 now: 352 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1524 -coverage: 95.268% pattern: 127 before: 352 now: 352 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1602 -coverage: 95.268% pattern: 127 before: 352 now: 352 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1583 -coverage: 95.268% pattern: 127 before: 352 now: 352 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1516 -coverage: 95.268% pattern: 127 before: 352 now: 352 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1476 -coverage: 95.268% pattern: 127 before: 352 now: 352 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1420 -coverage: 95.268% pattern: 127 before: 352 now: 352 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1491 -coverage: 95.268% pattern: 127 before: 352 now: 352 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1794 -coverage: 95.268% pattern: 127 before: 352 now: 352 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1544 -coverage: 95.268% pattern: 127 before: 352 now: 352 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1504 -coverage: 95.268% pattern: 127 before: 352 now: 352 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1485 -coverage: 95.268% pattern: 127 before: 352 now: 352 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1521 -coverage: 95.268% pattern: 127 before: 352 now: 352 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1446 -coverage: 95.268% pattern: 127 before: 352 now: 352 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:152. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1515 -coverage: 95.375% pattern: 128 before: 352 now: 344 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1530 -coverage: 95.375% pattern: 128 before: 344 now: 344 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1437 -coverage: 95.375% pattern: 128 before: 344 now: 344 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1623 -coverage: 95.375% pattern: 128 before: 344 now: 344 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1525 -coverage: 95.375% pattern: 128 before: 344 now: 344 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:152. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1587 -coverage: 95.483% pattern: 129 before: 344 now: 336 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1432 -coverage: 95.483% pattern: 129 before: 336 now: 336 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1449 -coverage: 95.483% pattern: 129 before: 336 now: 336 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1542 -coverage: 95.483% pattern: 129 before: 336 now: 336 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:266. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1861 -coverage: 95.671% pattern: 130 before: 336 now: 322 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1511 -coverage: 95.671% pattern: 130 before: 322 now: 322 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1433 -coverage: 95.671% pattern: 130 before: 322 now: 322 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1564 -coverage: 95.671% pattern: 130 before: 322 now: 322 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1521 -coverage: 95.671% pattern: 130 before: 322 now: 322 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1748 -coverage: 95.671% pattern: 130 before: 322 now: 322 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1513 -coverage: 95.671% pattern: 130 before: 322 now: 322 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1697 -coverage: 95.684% pattern: 131 before: 322 now: 321 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1601 -coverage: 95.684% pattern: 131 before: 321 now: 321 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1532 -coverage: 95.684% pattern: 131 before: 321 now: 321 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1479 -coverage: 95.684% pattern: 131 before: 321 now: 321 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1536 -coverage: 95.684% pattern: 131 before: 321 now: 321 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1467 -coverage: 95.684% pattern: 131 before: 321 now: 321 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1475 -coverage: 95.684% pattern: 131 before: 321 now: 321 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1534 -coverage: 95.684% pattern: 131 before: 321 now: 321 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1551 -coverage: 95.684% pattern: 131 before: 321 now: 321 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1432 -coverage: 95.684% pattern: 131 before: 321 now: 321 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1590 -coverage: 95.684% pattern: 131 before: 321 now: 321 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1606 -coverage: 95.684% pattern: 131 before: 321 now: 321 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1648 -coverage: 95.684% pattern: 131 before: 321 now: 321 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1386 -coverage: 95.684% pattern: 131 before: 321 now: 321 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1451 -coverage: 95.684% pattern: 131 before: 321 now: 321 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1585 -coverage: 95.684% pattern: 131 before: 321 now: 321 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1437 -coverage: 95.684% pattern: 131 before: 321 now: 321 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1447 -coverage: 95.684% pattern: 131 before: 321 now: 321 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1492 -coverage: 95.684% pattern: 131 before: 321 now: 321 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1724 -coverage: 95.684% pattern: 131 before: 321 now: 321 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1457 -coverage: 95.684% pattern: 131 before: 321 now: 321 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1424 -coverage: 95.684% pattern: 131 before: 321 now: 321 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1661 -coverage: 95.738% pattern: 132 before: 321 now: 317 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1508 -coverage: 95.738% pattern: 132 before: 317 now: 317 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1497 -coverage: 95.738% pattern: 132 before: 317 now: 317 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1596 -coverage: 95.738% pattern: 132 before: 317 now: 317 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1551 -coverage: 95.738% pattern: 132 before: 317 now: 317 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1874 -coverage: 95.738% pattern: 132 before: 317 now: 317 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1557 -coverage: 95.738% pattern: 132 before: 317 now: 317 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1441 -coverage: 95.738% pattern: 132 before: 317 now: 317 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1483 -coverage: 95.738% pattern: 132 before: 317 now: 317 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1626 -coverage: 95.738% pattern: 132 before: 317 now: 317 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1573 -coverage: 95.738% pattern: 132 before: 317 now: 317 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1821 -coverage: 95.738% pattern: 132 before: 317 now: 317 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1898 -coverage: 95.738% pattern: 132 before: 317 now: 317 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1552 -coverage: 95.738% pattern: 132 before: 317 now: 317 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1539 -coverage: 95.738% pattern: 132 before: 317 now: 317 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1479 -coverage: 95.738% pattern: 132 before: 317 now: 317 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1531 -coverage: 95.738% pattern: 132 before: 317 now: 317 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1526 -coverage: 95.738% pattern: 132 before: 317 now: 317 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1531 -coverage: 95.738% pattern: 132 before: 317 now: 317 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1666 -coverage: 95.738% pattern: 132 before: 317 now: 317 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1420 -coverage: 95.738% pattern: 132 before: 317 now: 317 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1528 -coverage: 95.738% pattern: 132 before: 317 now: 317 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1746 -coverage: 95.738% pattern: 132 before: 317 now: 317 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1716 -coverage: 95.738% pattern: 132 before: 317 now: 317 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1439 -coverage: 95.738% pattern: 132 before: 317 now: 317 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1553 -coverage: 95.738% pattern: 132 before: 317 now: 317 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1528 -coverage: 95.738% pattern: 132 before: 317 now: 317 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1496 -coverage: 95.738% pattern: 132 before: 317 now: 317 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1847 -coverage: 95.738% pattern: 132 before: 317 now: 317 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1651 -coverage: 95.738% pattern: 132 before: 317 now: 317 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1420 -coverage: 95.738% pattern: 132 before: 317 now: 317 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1494 -coverage: 95.738% pattern: 132 before: 317 now: 317 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1626 -coverage: 95.738% pattern: 132 before: 317 now: 317 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1472 -coverage: 95.738% pattern: 132 before: 317 now: 317 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1525 -coverage: 95.738% pattern: 132 before: 317 now: 317 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1566 -coverage: 95.738% pattern: 132 before: 317 now: 317 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1858 -coverage: 95.738% pattern: 132 before: 317 now: 317 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1659 -coverage: 95.778% pattern: 133 before: 317 now: 314 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1564 -coverage: 95.778% pattern: 133 before: 314 now: 314 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1487 -coverage: 95.778% pattern: 133 before: 314 now: 314 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1833 -coverage: 95.778% pattern: 133 before: 314 now: 314 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1575 -coverage: 95.778% pattern: 133 before: 314 now: 314 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1593 -coverage: 95.778% pattern: 133 before: 314 now: 314 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1506 -coverage: 95.778% pattern: 133 before: 314 now: 314 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1600 -coverage: 95.778% pattern: 133 before: 314 now: 314 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1580 -coverage: 95.778% pattern: 133 before: 314 now: 314 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1447 -coverage: 95.778% pattern: 133 before: 314 now: 314 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1808 -coverage: 95.778% pattern: 133 before: 314 now: 314 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1553 -coverage: 95.778% pattern: 133 before: 314 now: 314 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1530 -coverage: 95.778% pattern: 133 before: 314 now: 314 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1497 -coverage: 95.778% pattern: 133 before: 314 now: 314 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1459 -coverage: 95.778% pattern: 133 before: 314 now: 314 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1464 -coverage: 95.778% pattern: 133 before: 314 now: 314 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1515 -coverage: 95.778% pattern: 133 before: 314 now: 314 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1598 -coverage: 95.778% pattern: 133 before: 314 now: 314 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1502 -coverage: 95.778% pattern: 133 before: 314 now: 314 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1402 -coverage: 95.778% pattern: 133 before: 314 now: 314 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1854 -coverage: 95.778% pattern: 133 before: 314 now: 314 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1937 -coverage: 95.778% pattern: 133 before: 314 now: 314 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1570 -coverage: 95.778% pattern: 133 before: 314 now: 314 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1693 -coverage: 95.778% pattern: 133 before: 314 now: 314 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1412 -coverage: 95.778% pattern: 133 before: 314 now: 314 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1673 -coverage: 95.778% pattern: 133 before: 314 now: 314 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1713 -coverage: 95.778% pattern: 133 before: 314 now: 314 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1581 -coverage: 95.778% pattern: 133 before: 314 now: 314 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1528 -coverage: 95.778% pattern: 133 before: 314 now: 314 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1585 -coverage: 95.778% pattern: 133 before: 314 now: 314 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1522 -coverage: 95.778% pattern: 133 before: 314 now: 314 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1487 -coverage: 95.778% pattern: 133 before: 314 now: 314 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1482 -coverage: 95.778% pattern: 133 before: 314 now: 314 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1494 -coverage: 95.778% pattern: 133 before: 314 now: 314 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1523 -coverage: 95.778% pattern: 133 before: 314 now: 314 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1476 -coverage: 95.832% pattern: 134 before: 314 now: 310 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1484 -coverage: 95.832% pattern: 134 before: 310 now: 310 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1487 -coverage: 95.832% pattern: 134 before: 310 now: 310 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1484 -coverage: 95.832% pattern: 134 before: 310 now: 310 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1844 -coverage: 95.832% pattern: 134 before: 310 now: 310 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1469 -coverage: 95.832% pattern: 134 before: 310 now: 310 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1482 -coverage: 95.832% pattern: 134 before: 310 now: 310 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1516 -coverage: 95.832% pattern: 134 before: 310 now: 310 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1555 -coverage: 95.832% pattern: 134 before: 310 now: 310 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1501 -coverage: 95.832% pattern: 134 before: 310 now: 310 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1922 -coverage: 95.832% pattern: 134 before: 310 now: 310 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1723 -coverage: 95.832% pattern: 134 before: 310 now: 310 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1599 -coverage: 95.832% pattern: 134 before: 310 now: 310 -checking valid circuit ... result: 1. diff --git a/exp_result/ATPG-LS_c880.bench.txt b/exp_result/ATPG-LS_c880.bench.txt deleted file mode 100644 index 6ac1e0d..0000000 --- a/exp_result/ATPG-LS_c880.bench.txt +++ /dev/null @@ -1,530 +0,0 @@ -make: 'atpg' is up to date. -======================== -parsing file ./benchmark/c880.bench ... Done. -====== Circuit Statistics ====== -PI: 60 -PO: 26 -Gate: 443 -Stem: 165 -Level: 6 -================================ -[SOL] flip: 0, stem: 0, fault:2949. flip_cnt: 0, stem_cnt: 165, fault_cnt:256 -coverage: 28.894% pattern: 1 before: 886 now: 630 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:2909. flip_cnt: 0, stem_cnt: 165, fault_cnt:319 -coverage: 56.321% pattern: 2 before: 630 now: 387 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:738. flip_cnt: 0, stem_cnt: 165, fault_cnt:231 -coverage: 64.447% pattern: 3 before: 387 now: 315 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:1090. flip_cnt: 0, stem_cnt: 165, fault_cnt:288 -coverage: 73.589% pattern: 4 before: 315 now: 234 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:453. flip_cnt: 0, stem_cnt: 165, fault_cnt:272 -coverage: 78.217% pattern: 5 before: 234 now: 193 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:680. flip_cnt: 0, stem_cnt: 165, fault_cnt:293 -coverage: 82.957% pattern: 6 before: 193 now: 151 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 165, fault_cnt:175 -coverage: 83.521% pattern: 7 before: 151 now: 146 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:34. flip_cnt: 0, stem_cnt: 165, fault_cnt:216 -coverage: 83.973% pattern: 8 before: 146 now: 142 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:380. flip_cnt: 0, stem_cnt: 165, fault_cnt:265 -coverage: 86.230% pattern: 9 before: 142 now: 122 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:197. flip_cnt: 0, stem_cnt: 165, fault_cnt:250 -coverage: 87.810% pattern: 10 before: 122 now: 108 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 165, fault_cnt:266 -coverage: 87.923% pattern: 11 before: 108 now: 107 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:283 -coverage: 87.923% pattern: 11 before: 107 now: 107 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 165, fault_cnt:246 -coverage: 88.488% pattern: 12 before: 107 now: 102 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 165, fault_cnt:248 -coverage: 88.713% pattern: 13 before: 102 now: 100 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 165, fault_cnt:244 -coverage: 89.278% pattern: 14 before: 100 now: 95 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 165, fault_cnt:170 -coverage: 89.391% pattern: 15 before: 95 now: 94 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:237. flip_cnt: 0, stem_cnt: 165, fault_cnt:254 -coverage: 90.858% pattern: 16 before: 94 now: 81 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:183. flip_cnt: 0, stem_cnt: 165, fault_cnt:204 -coverage: 93.002% pattern: 17 before: 81 now: 62 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:102. flip_cnt: 0, stem_cnt: 165, fault_cnt:284 -coverage: 94.018% pattern: 18 before: 62 now: 53 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:137. flip_cnt: 0, stem_cnt: 165, fault_cnt:212 -coverage: 95.372% pattern: 19 before: 53 now: 41 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 165, fault_cnt:259 -coverage: 95.598% pattern: 20 before: 41 now: 39 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:18. flip_cnt: 0, stem_cnt: 165, fault_cnt:202 -coverage: 96.388% pattern: 21 before: 39 now: 32 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:5. flip_cnt: 0, stem_cnt: 165, fault_cnt:218 -coverage: 96.614% pattern: 22 before: 32 now: 30 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 165, fault_cnt:268 -coverage: 96.727% pattern: 23 before: 30 now: 29 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:40. flip_cnt: 0, stem_cnt: 165, fault_cnt:318 -coverage: 97.178% pattern: 24 before: 29 now: 25 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:50. flip_cnt: 0, stem_cnt: 165, fault_cnt:186 -coverage: 97.743% pattern: 25 before: 25 now: 20 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 165, fault_cnt:224 -coverage: 98.081% pattern: 26 before: 20 now: 17 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 165, fault_cnt:255 -coverage: 98.307% pattern: 27 before: 17 now: 15 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:8. flip_cnt: 0, stem_cnt: 165, fault_cnt:246 -coverage: 98.420% pattern: 28 before: 15 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:216 -coverage: 98.420% pattern: 28 before: 14 now: 14 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 165, fault_cnt:234 -coverage: 98.533% pattern: 29 before: 14 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:220 -coverage: 98.533% pattern: 29 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:254 -coverage: 98.533% pattern: 29 before: 13 now: 13 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:34. flip_cnt: 0, stem_cnt: 165, fault_cnt:212 -coverage: 98.758% pattern: 30 before: 13 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:253 -coverage: 98.758% pattern: 30 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:274 -coverage: 98.758% pattern: 30 before: 11 now: 11 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 165, fault_cnt:267 -coverage: 98.984% pattern: 31 before: 11 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:241 -coverage: 98.984% pattern: 31 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:238 -coverage: 98.984% pattern: 31 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:197 -coverage: 98.984% pattern: 31 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:216 -coverage: 98.984% pattern: 31 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:239 -coverage: 98.984% pattern: 31 before: 9 now: 9 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 165, fault_cnt:268 -coverage: 99.210% pattern: 32 before: 9 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:247 -coverage: 99.210% pattern: 32 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:313 -coverage: 99.210% pattern: 32 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:211 -coverage: 99.210% pattern: 32 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:330 -coverage: 99.210% pattern: 32 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:252 -coverage: 99.210% pattern: 32 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:269 -coverage: 99.210% pattern: 32 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:200 -coverage: 99.210% pattern: 32 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:182 -coverage: 99.210% pattern: 32 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:201 -coverage: 99.210% pattern: 32 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:272 -coverage: 99.210% pattern: 32 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:255 -coverage: 99.210% pattern: 32 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:246 -coverage: 99.210% pattern: 32 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:260 -coverage: 99.210% pattern: 32 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:241 -coverage: 99.210% pattern: 32 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:257 -coverage: 99.210% pattern: 32 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:241 -coverage: 99.210% pattern: 32 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:340 -coverage: 99.210% pattern: 32 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:242 -coverage: 99.210% pattern: 32 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:228 -coverage: 99.210% pattern: 32 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:163 -coverage: 99.210% pattern: 32 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:219 -coverage: 99.210% pattern: 32 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:252 -coverage: 99.210% pattern: 32 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:310 -coverage: 99.210% pattern: 32 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:272 -coverage: 99.210% pattern: 32 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:223 -coverage: 99.210% pattern: 32 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:250 -coverage: 99.210% pattern: 32 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:265 -coverage: 99.210% pattern: 32 before: 7 now: 7 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 165, fault_cnt:229 -coverage: 99.323% pattern: 33 before: 7 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:223 -coverage: 99.323% pattern: 33 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:251 -coverage: 99.323% pattern: 33 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:239 -coverage: 99.323% pattern: 33 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:259 -coverage: 99.323% pattern: 33 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:288 -coverage: 99.323% pattern: 33 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:211 -coverage: 99.323% pattern: 33 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:235 -coverage: 99.323% pattern: 33 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:227 -coverage: 99.323% pattern: 33 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:231 -coverage: 99.323% pattern: 33 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:217 -coverage: 99.323% pattern: 33 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:301 -coverage: 99.323% pattern: 33 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:252 -coverage: 99.323% pattern: 33 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:228 -coverage: 99.323% pattern: 33 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:219 -coverage: 99.323% pattern: 33 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:240 -coverage: 99.323% pattern: 33 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:180 -coverage: 99.323% pattern: 33 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:270 -coverage: 99.323% pattern: 33 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:209 -coverage: 99.323% pattern: 33 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:283 -coverage: 99.323% pattern: 33 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:189 -coverage: 99.323% pattern: 33 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:188 -coverage: 99.323% pattern: 33 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:205 -coverage: 99.323% pattern: 33 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:225 -coverage: 99.323% pattern: 33 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:185 -coverage: 99.323% pattern: 33 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:259 -coverage: 99.323% pattern: 33 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:208 -coverage: 99.323% pattern: 33 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:256 -coverage: 99.323% pattern: 33 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:200 -coverage: 99.323% pattern: 33 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:246 -coverage: 99.323% pattern: 33 before: 6 now: 6 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:2. flip_cnt: 0, stem_cnt: 165, fault_cnt:198 -coverage: 99.436% pattern: 34 before: 6 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:162 -coverage: 99.436% pattern: 34 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:253 -coverage: 99.436% pattern: 34 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:223 -coverage: 99.436% pattern: 34 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:233 -coverage: 99.436% pattern: 34 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:216 -coverage: 99.436% pattern: 34 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:285 -coverage: 99.436% pattern: 34 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:247 -coverage: 99.436% pattern: 34 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:201 -coverage: 99.436% pattern: 34 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:167 -coverage: 99.436% pattern: 34 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:225 -coverage: 99.436% pattern: 34 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:278 -coverage: 99.436% pattern: 34 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:223 -coverage: 99.436% pattern: 34 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:233 -coverage: 99.436% pattern: 34 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:274 -coverage: 99.436% pattern: 34 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:253 -coverage: 99.436% pattern: 34 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:287 -coverage: 99.436% pattern: 34 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:264 -coverage: 99.436% pattern: 34 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:218 -coverage: 99.436% pattern: 34 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:259 -coverage: 99.436% pattern: 34 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:257 -coverage: 99.436% pattern: 34 before: 5 now: 5 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 165, fault_cnt:285 -coverage: 99.549% pattern: 35 before: 5 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:262 -coverage: 99.549% pattern: 35 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:253 -coverage: 99.549% pattern: 35 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:233 -coverage: 99.549% pattern: 35 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:242 -coverage: 99.549% pattern: 35 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:264 -coverage: 99.549% pattern: 35 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:276 -coverage: 99.549% pattern: 35 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:274 -coverage: 99.549% pattern: 35 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:237 -coverage: 99.549% pattern: 35 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:327 -coverage: 99.549% pattern: 35 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:269 -coverage: 99.549% pattern: 35 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:223 -coverage: 99.549% pattern: 35 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:205 -coverage: 99.549% pattern: 35 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:195 -coverage: 99.549% pattern: 35 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:286 -coverage: 99.549% pattern: 35 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:247 -coverage: 99.549% pattern: 35 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:268 -coverage: 99.549% pattern: 35 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:200 -coverage: 99.549% pattern: 35 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:172 -coverage: 99.549% pattern: 35 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:251 -coverage: 99.549% pattern: 35 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:237 -coverage: 99.549% pattern: 35 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:253 -coverage: 99.549% pattern: 35 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:221 -coverage: 99.549% pattern: 35 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:201 -coverage: 99.549% pattern: 35 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:304 -coverage: 99.549% pattern: 35 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:172 -coverage: 99.549% pattern: 35 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:293 -coverage: 99.549% pattern: 35 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:164 -coverage: 99.549% pattern: 35 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:195 -coverage: 99.549% pattern: 35 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:254 -coverage: 99.549% pattern: 35 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:205 -coverage: 99.549% pattern: 35 before: 4 now: 4 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:33. flip_cnt: 0, stem_cnt: 165, fault_cnt:270 -coverage: 99.774% pattern: 36 before: 4 now: 2 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:15. flip_cnt: 0, stem_cnt: 165, fault_cnt:295 -coverage: 99.887% pattern: 37 before: 2 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:236 -coverage: 99.887% pattern: 37 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:228 -coverage: 99.887% pattern: 37 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:226 -coverage: 99.887% pattern: 37 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:245 -coverage: 99.887% pattern: 37 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:282 -coverage: 99.887% pattern: 37 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:221 -coverage: 99.887% pattern: 37 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:246 -coverage: 99.887% pattern: 37 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:182 -coverage: 99.887% pattern: 37 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:241 -coverage: 99.887% pattern: 37 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:238 -coverage: 99.887% pattern: 37 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:236 -coverage: 99.887% pattern: 37 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:203 -coverage: 99.887% pattern: 37 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:228 -coverage: 99.887% pattern: 37 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:210 -coverage: 99.887% pattern: 37 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:263 -coverage: 99.887% pattern: 37 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:222 -coverage: 99.887% pattern: 37 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:185 -coverage: 99.887% pattern: 37 before: 1 now: 1 -checking valid circuit ... result: 1. -[SOL] flip: 0, stem: 0, fault:16. flip_cnt: 0, stem_cnt: 165, fault_cnt:229 -coverage: 100.000% pattern: 38 before: 1 now: 0 -checking valid circuit ... result: 1. - -real 0m13.726s -user 0m13.723s -sys 0m0.000s diff --git a/fault-simulator b/fault-simulator deleted file mode 160000 index 54d48b9..0000000 --- a/fault-simulator +++ /dev/null @@ -1 +0,0 @@ -Subproject commit 54d48b917c1f5ab7a9ea4c8de2573b649dd73575 diff --git a/gate_encode.txt b/gate_encode.txt deleted file mode 100644 index c82eedc..0000000 --- a/gate_encode.txt +++ /dev/null @@ -1,10 +0,0 @@ - -NOT: -1. -a <=> ~b -2. -a => ~b -~b => a -3. - - diff --git a/makefile b/makefile index 79aab05..43fc9c6 100644 --- a/makefile +++ b/makefile @@ -13,7 +13,7 @@ CPPFLAGS=-O3 -std=c++17 #sources:=main.cpp command.c #变量sources得到当前目录下待编译的.c/.cpp文件的列表，两次调用winldcard、结果连在一起即可 -sources:=$(wildcard *.c) $(wildcard *.cpp) +sources:=$(wildcard *.c) $(wildcard *.cpp) $(wildcard CCAnr/*.cpp) #变量objects得到待生成的.o文件的列表，把sources中每个文件的扩展名换成.o即可。这里两次调用patsubst函数，第1次把sources中所有.cpp换成.o，第2次把第1次结果里所有.c换成.o objects:=$(patsubst %.c,%.o,$(patsubst %.cpp,%.o,$(sources))) diff --git a/res.txt b/res.txt deleted file mode 100644 index 66b69eb..0000000 --- a/res.txt +++ /dev/null @@ -1,90 +0,0 @@ -parsing file c432.bench... -INPUT(1) -tokens: $INPUT$ $($ $1$ $)$ -INPUT(4) -tokens: $INPUT$ $($ $4$ $)$ -INPUT(8) -tokens: $INPUT$ $($ $8$ $)$ -INPUT(11) -tokens: $INPUT$ $($ $11$ $)$ -INPUT(14) -tokens: $INPUT$ $($ $14$ $)$ -INPUT(17) -tokens: $INPUT$ $($ $17$ $)$ -INPUT(21) -tokens: $INPUT$ $($ $21$ $)$ -INPUT(24) -tokens: $INPUT$ $($ $24$ $)$ -INPUT(27) -tokens: $INPUT$ $($ $27$ $)$ -INPUT(30) -tokens: $INPUT$ $($ $30$ $)$ -INPUT(34) -tokens: $INPUT$ $($ $34$ $)$ -INPUT(37) -tokens: $INPUT$ $($ $37$ $)$ -INPUT(40) -tokens: $INPUT$ $($ $40$ $)$ -INPUT(43) -tokens: $INPUT$ $($ $43$ $)$ -INPUT(47) -tokens: $INPUT$ $($ $47$ $)$ -INPUT(50) -tokens: $INPUT$ $($ $50$ $)$ -INPUT(53) -tokens: $INPUT$ $($ $53$ $)$ -INPUT(56) -tokens: $INPUT$ $($ $56$ $)$ -INPUT(60) -tokens: $INPUT$ $($ $60$ $)$ -INPUT(63) -tokens: $INPUT$ $($ $63$ $)$ -INPUT(66) -tokens: $INPUT$ $($ $66$ $)$ -INPUT(69) -tokens: $INPUT$ $($ $69$ $)$ -INPUT(73) -tokens: $INPUT$ $($ $73$ $)$ -INPUT(76) -tokens: $INPUT$ $($ $76$ $)$ -INPUT(79) -tokens: $INPUT$ $($ $79$ $)$ -INPUT(82) -tokens: $INPUT$ $($ $82$ $)$ -INPUT(86) -tokens: $INPUT$ $($ $86$ $)$ -INPUT(89) -tokens: $INPUT$ $($ $89$ $)$ -INPUT(92) -tokens: $INPUT$ $($ $92$ $)$ -INPUT(95) -tokens: $INPUT$ $($ $95$ $)$ -INPUT(99) -tokens: $INPUT$ $($ $99$ $)$ -INPUT(102) -tokens: $INPUT$ $($ $102$ $)$ -INPUT(105) -tokens: $INPUT$ $($ $105$ $)$ -INPUT(108) -tokens: $INPUT$ $($ $108$ $)$ -INPUT(112) -tokens: $INPUT$ $($ $112$ $)$ -INPUT(115) -tokens: $INPUT$ $($ $115$ $)$ -OUTPUT(223) -tokens: $OUTPUT$ $($ $223$ $)$ -OUTPUT(329) -tokens: $OUTPUT$ $($ $329$ $)$ -OUTPUT(370) -tokens: $OUTPUT$ $($ $370$ $)$ -OUTPUT(421) -tokens: $OUTPUT$ $($ $421$ $)$ -OUTPUT(430) -tokens: $OUTPUT$ $($ $430$ $)$ -OUTPUT(431) -tokens: $OUTPUT$ $($ $431$ $)$ -OUTPUT(432) -tokens: $OUTPUT$ $($ $432$ $)$ -118 = NOT(1) -tokens: $118$ $=$ $NOT$ $($ $1$ $)$ -Error while reading line: 118 = NOT(1)